Re: [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices
On 06/12/2011 10:21 PM, Anthony Liguori wrote: It's perfectly fine to have a type called PCIBus that I440FX extends, but qdev shouldn't have explicit knowledge of something called a bus IMHO. Doing this forces a limited mechanism of connecting devices because it creates an artificial tree (by implying a parent/child relationship). It makes composition difficult if not impossible. I think qdev buses are useful as long as they don't enforce their interfaces. That is, a qdev that is a child of a qbus has access to the qbus's interfaces, but also access to other stuff. I see two independent data structures. The first is the instantiation tree. The instantiation tree may look like this: +-- i440fx | | | +-- PIIX3 | | | | | +-- mc146818a | | +-- uart | | +-- DMA | | +-- keyboard controller | | +-- (remaining platform ISA devices | | | +-- UHCI USB controller | +-- IDE controller | +-- e1000 +-- cirrus-vga +-- virtio-balloon-pci +-- IDE disk0 Instantiating i440fx makes a bunch of default stuff. This is composition. Everything else requires explicit instantiation. This is, strictly speaking, the parent/child relationships. If you destroy i440fx, all of it's children have to also go away (by definition). Nothing about bus relationship is implied here. Even if i440fx exposes a PCI bus, the PIIX3 is a child of i440fx even though e1000 is not (even if they're both PCI devices). I bus/device relationship is not imposed, but may hold for some of the devices (but not others). Another example of aggregation is PCI slots and functions. A PCI device is composed of multiple functions that can be hotplugged as one, and share parts of the address. But there is no slot/function bus involved. That said, there absolutely should be the following paths: /i440fx/IDE controller/primary/master - IDE disk0 /i440fx/slot3 - cirrus-vga The expression of bus should just be a bidirectional path (when that makes sense). IOW: /i440fx/slot3 - cirrus-vga /cirrus-vga/bus - i440fx There, of course, can be all sorts of crazy paths through the graph. The following should be valid: /i440fx/slot2 - IDE controller /cirrus-vga/bus/slot2/primary/master But separating out hw paths from instantiation tree has some nice characteristics. The instantiation tree is the obvious place to implement live migration whereas reset would probably walk device paths. Agreed; and it's quite obvious as the bus has a RESET line but no relationship to live migration. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board
Hi, I have a new question about QEMU for virtex-ml507. Can QEMU display X11 on this board? Because I don't see any VGA output when remove -nographic option. QEMU just display monitor console and serial console. Tai Từ: Lê Đức Tài letai_d...@yahoo.com.vn Đến: Edgar E. Iglesias edgar.igles...@gmail.com Cc: Alexander Graf ag...@suse.de; qemu-devel@nongnu.orgDevelopers qemu-devel@nongnu.org Gửi ngày: 10:56:14, Thứ Bảy, 11 tháng 6 2011 Chủ đề: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board Hi, I have a problem when emulating virtex-ml507. Loop device can not be mounted as hda, no partitions are listed. My environment is as following: 1. Qemu 0.14.1 build with libfdt support. 2. Kernel download from Xilinx Git server. config is customized from 44x/virtex_defconfig with enable some option to make kernel can automount filesystem: Under device drivers---block devices: CONFIG_BLK_DEV_LOOP CONFIG_BLK_DEV_RAM CONFIG_BLK_DEV_NBD Under device drivers---ATA/ATAPI/MFM/RLL support CONFIG_IDE_GD CONFIG_IDE_GD_ATA CONFIG_BLK_DEV_GENERIC CONFIG_BLK_DEV_PIIX Under file systems: CONFIG_AUTOFS_FS CONFIG_AUTOFS4_FS Also the ext2, ext3 file systems are supported 3. RFS is busybox Run Qemu: $ qemu-system-ppc -M virtex-ml507 -kernel vmlinux -m 256 -hda rootfs_ppc.ext2 -append console=ttyS0 root=/dev/hda -nographic Output: [0.755969] NET: Registered protocol family 17 [0.760477] hd: no drives specified - use hd=cyl,head,sectors on kernel command line [0.782726] Root-NFS: no NFS server address [0.782932] VFS: Unable to mount root fs via NFS, trying floppy. [0.790541] VFS: Cannot open root device hda or unknown-block(2,0) [0.792438] Please append a correct root= boot option; here are the available partitions: [0.795265] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0) Can you help me for this problem? Thank. TaiLD
Re: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board
On Mon, Jun 13, 2011 at 04:05:59PM +0800, Lê ?c Tài wrote: Hi, I have a new question about QEMU for virtex-ml507. Can QEMU display X11 on this board? Because I don't see any VGA output when remove -nographic option. QEMU just display monitor console and serial console. Tai __ Từ: Lê Äức Tà i letai_d...@yahoo.com.vn Äến: Edgar E. Iglesias edgar.igles...@gmail.com Cc: Alexander Graf ag...@suse.de; qemu-devel@nongnu.orgDevelopers qemu-devel@nongnu.org Gá»i ngà y: 10:56:14, Thứ Bảy, 11 tháng 6 2011 Chủ Äá»: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board Hi, I have a problem when emulating virtex-ml507. Loop device can not be mounted as hda, no partitions are listed. My environment is as following: 1. Qemu 0.14.1 build with libfdt support. 2. Kernel download from Xilinx Git server. config is customized from 44x/virtex_defconfig with enable some option to make kernel can automount filesystem: Under device drivers---block devices: CONFIG_BLK_DEV_LOOP CONFIG_BLK_DEV_RAM CONFIG_BLK_DEV_NBD Under device drivers---ATA/ATAPI/MFM/RLL support CONFIG_IDE_GD CONFIG_IDE_GD_ATA CONFIG_BLK_DEV_GENERIC CONFIG_BLK_DEV_PIIX Under file systems: CONFIG_AUTOFS_FS CONFIG_AUTOFS4_FS Also the ext2, ext3 file systems are supported 3. RFS is busybox Run Qemu: $ qemu-system-ppc -M virtex-ml507 -kernel vmlinux -m 256 -hda rootfs_ppc.ext2 -append console=ttyS0 root=/dev/hda -nographic Output: [0.755969] NET: Registered protocol family 17 [0.760477] hd: no drives specified - use hd=cyl,head,sectors on kernel command line [0.782726] Root-NFS: no NFS server address [0.782932] VFS: Unable to mount root fs via NFS, trying floppy. [0.790541] VFS: Cannot open root device hda or unknown-block(2,0) [0.792438] Please append a correct root= boot option; here are the available partitions: [0.795265] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0) Can you help me for this problem? Hi, The emulated board doesn't have harddisks, you'll need to use ramdisks or the emulated NOR flash. There is no VGA controller. Cheers
Re: [Qemu-devel] [PATCH] CPU consumption optimization of 'qemu-img convert' using bdrv_is_allocated()
On Wed, Jun 08, 2011 at 06:50:25PM +0400, Dmitry Konishchev wrote:
This patch optimizes 'qemu-img convert' operation for volumes which are
almost fully unallocated. Here are the results of simple tests:
The optimization is to check allocation metadata instead of
unconditionally reading and then checking for all zeroes?
diff --git a/qemu-img.c b/qemu-img.c
index 4f162d1..9d905ed 100644
--- a/qemu-img.c
+++ b/qemu-img.c
@@ -38,6 +38,8 @@ typedef struct img_cmd_t {
int (*handler)(int argc, char **argv);
} img_cmd_t;
+static const int SECTOR_SIZE = 512;
Why introduce a new constant instead of using BDRV_SECTOR_SIZE?
+
/* Default to cache=writeback as data integrity is not important for
qemu-tcg. */
#define BDRV_O_FLAGS BDRV_O_CACHE_WB
@@ -531,7 +533,7 @@ static int is_not_zero(const uint8_t *sector, int len)
}
/*
- * Returns true iff the first sector pointed to by 'buf' contains at least
+ * Returns true if the first sector pointed to by 'buf' contains at least
iff is not a typo. It means if and only if.
@@ -912,55 +944,109 @@ static int img_convert(int argc, char **argv)
are present in both the output's and input's base images
(no
need to copy them). */
if (out_baseimg) {
-if (!bdrv_is_allocated(bs[bs_i], sector_num - bs_offset,
- n, n1)) {
-sector_num += n1;
+if (!bdrv_is_allocated(bs[bs_i], sector_num - bs_offset,
n, cur_n)) {
+sector_num += cur_n;
continue;
}
-/* The next 'n1' sectors are allocated in the input
image. Copy
+/* The next 'cur_n' sectors are allocated in the input
image. Copy
only those as they may be followed by unallocated
sectors. */
-n = n1;
+n = cur_n;
}
-} else {
-n1 = n;
}
-ret = bdrv_read(bs[bs_i], sector_num - bs_offset, buf, n);
-if (ret 0) {
-error_report(error while reading);
-goto out;
-}
-/* NOTE: at the same time we convert, we do not write zero
- sectors to have a chance to compress the image. Ideally, we
- should add a specific call to have the info to go faster */
-buf1 = buf;
-while (n 0) {
-/* If the output image is being created as a copy on write
image,
- copy all sectors even the ones containing only NUL bytes,
- because they may differ from the sectors in the base
image.
-
- If the output is to a host device, we also write out
- sectors that are entirely 0, since whatever data was
- already there is garbage, not 0s. */
-if (!has_zero_init || out_baseimg ||
-is_allocated_sectors(buf1, n, n1)) {
-ret = bdrv_write(out_bs, sector_num, buf1, n1);
-if (ret 0) {
-error_report(error while writing);
-goto out;
+/* If the output image is being created as a copy on write image,
+ copy all sectors even the ones containing only zero bytes,
+ because they may differ from the sectors in the base image.
+
+ If the output is to a host device, we also write out
+ sectors that are entirely 0, since whatever data was
+ already there is garbage, not 0s. */
+if (!has_zero_init || out_baseimg) {
+ret = bdrv_read(bs[bs_i], sector_num - bs_offset, buf, n);
+if (ret 0) {
+error_report(error while reading);
+goto out;
+}
+
+ret = bdrv_write(out_bs, sector_num, buf, n);
+if (ret 0) {
+error_report(error while writing);
+goto out;
+}
+
+sector_num += n;
+} else {
+/* Look for the sectors in the image and if they are not
+ allocated - sequentially in all its backing images.
+
+ Write only non-zero bytes to the output image. */
I think the recursive is_allocated() needs its own function. This
function is already long/complex enough :).
Stefan
Re: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board
There is no VGA controller. OK, but virtex-ml507 have a DVI controler. Does QEMU support DVI output? Từ: Edgar E. Iglesias edgar.igles...@gmail.com Đến: Lê ?c Tài letai_d...@yahoo.com.vn Cc: Alexander Graf ag...@suse.de; qemu-devel@nongnu.orgDevelopers qemu-devel@nongnu.org Gửi ngày: 15:13:49, Thứ Hai, 13 tháng 6 2011 Chủ đề: Re: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board On Mon, Jun 13, 2011 at 04:05:59PM +0800, Lê ?c Tài wrote: Hi, I have a new question about QEMU for virtex-ml507. Can QEMU display X11 on this board? Because I don't see any VGA output when remove -nographic option. QEMU just display monitor console and serial console. Tai __ Từ: Lê Äức Tà i letai_d...@yahoo.com.vn Äến: Edgar E. Iglesias edgar.igles...@gmail.com Cc: Alexander Graf ag...@suse.de; qemu-devel@nongnu.orgDevelopers qemu-devel@nongnu.org Gá»i ngà y: 10:56:14, Thứ Bảy, 11 tháng 6 2011 Chủ Äá»: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board Hi, I have a problem when emulating virtex-ml507. Loop device can not be mounted as hda, no partitions are listed. My environment is as following: 1. Qemu 0.14.1 build with libfdt support. 2. Kernel download from Xilinx Git server. config is customized from 44x/virtex_defconfig with enable some option to make kernel can automount filesystem: Under device drivers---block devices: CONFIG_BLK_DEV_LOOP CONFIG_BLK_DEV_RAM CONFIG_BLK_DEV_NBD Under device drivers---ATA/ATAPI/MFM/RLL support CONFIG_IDE_GD CONFIG_IDE_GD_ATA CONFIG_BLK_DEV_GENERIC CONFIG_BLK_DEV_PIIX Under file systems: CONFIG_AUTOFS_FS CONFIG_AUTOFS4_FS Also the ext2, ext3 file systems are supported 3. RFS is busybox Run Qemu: $ qemu-system-ppc -M virtex-ml507 -kernel vmlinux -m 256 -hda rootfs_ppc.ext2 -append console=ttyS0 root=/dev/hda -nographic Output: [0.755969] NET: Registered protocol family 17 [0.760477] hd: no drives specified - use hd=cyl,head,sectors on kernel command line [0.782726] Root-NFS: no NFS server address [0.782932] VFS: Unable to mount root fs via NFS, trying floppy. [0.790541] VFS: Cannot open root device hda or unknown-block(2,0) [0.792438] Please append a correct root= boot option; here are the available partitions: [0.795265] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0) Can you help me for this problem? Hi, The emulated board doesn't have harddisks, you'll need to use ramdisks or the emulated NOR flash. There is no VGA controller. Cheers
Re: [Qemu-devel] [PATCH][uq/master] kvm: x86: Save/restore FPU OP, IP and DP
On 06/11/2011 12:23 PM, Jan Kiszka wrote: From: Jan Kiszkajan.kis...@siemens.com These FPU states are properly maintained by KVM but not yet by TCG. So far we unconditionally set them to 0 in the guest which may cause state corruptions - not only during migration. -#define CPU_SAVE_VERSION 12 +#define CPU_SAVE_VERSION 13 Incrementing the version number seems excessive - I can't imagine a real-life guest will break due to fp pointer corruption However, I don't think we have a mechanism for optional state. We discussed this during the 18th VMState Subsection Symposium and IIRC agreed to re-raise the issue when we encountered it, which appears to be now. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board
On Mon, Jun 13, 2011 at 04:29:10PM +0800, Lê ?c Tài wrote: There is no VGA controller. OK, but virtex-ml507 have a DVI controler. Does QEMU support DVI output? Hi, It's not so much about what you can do with the virtex (I bet you can do lot's of stuff with it) but more limited to the devices available on the reference design. Take a look at: arch/powerpc/boot/dts/virtex440-ml507.dts to see what the reference design provides. QEMU provides only a subset of those devices. But you are of course free to create your own board or qemu machine, with what ever devices you'd like to throw in. Cheers
[Qemu-devel] [Bug 796480] [NEW] Addresses with 4GB differences are consider as one single address in QEMU
Public bug reported:
THIS IS THE ISSUE OF USER MODE EMULATION
Information about guest and host
**
guest: 64 bit x86 user mode binary
host: 32 bit Linux OS
uname -a :Linux KICS-HPCNL-32blue 2.6.33.3-85.fc13.i686.PAE #1 SMP
architecture: intel64
Bug Description
for memory reference instructions, suppose I have two addresses in guest
address space(64 bit)
0x22000
0x32000
as lower 32 bit part of both addresses are same, when particular instructions
are translated into host code(32 bit)
in both above cases the value is loaded from same memory and we get same value.
where actual behaviour was to get two different values.
here is the program which i used to test:
#include stdio.h
#include stdlib.h
#include limits.h
#define SIZE 4294967298 /* 4Gib*/
int main() {
char *array;
unsigned int i;
array = malloc(sizeof(char) * SIZE);
if(array == NULL){
fprintf(stderr, Could not allocate that much memory);
return 1;}
array[0] = 'a';
array[SIZE-2] = 'z';
printf(array[SIZE-2] = %c array[0] = %c\n,array[SIZE-2], array[0]);
return 0;
}
I have 8 gib RAM
I compiled this program on 64 bit linux and run this on 32 bit linux with qemu
QEMU command line and output
**
$x86_64-linux-user/qemu-x86_64 ~/ar_x86
output: array[SIZE-1] = z,array[0] = z
Release information
x86_64 binary is tested with latest release : qemu-0.14.1
and with current development tree as well( live code of QEMU using git)
** Affects: qemu
Importance: Undecided
Status: New
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/796480
Title:
Addresses with 4GB differences are consider as one single address in
QEMU
Status in QEMU:
New
Bug description:
THIS IS THE ISSUE OF USER MODE EMULATION
Information about guest and host
**
guest: 64 bit x86 user mode binary
host: 32 bit Linux OS
uname -a :Linux KICS-HPCNL-32blue 2.6.33.3-85.fc13.i686.PAE #1 SMP
architecture: intel64
Bug Description
for memory reference instructions, suppose I have two addresses in guest
address space(64 bit)
0x22000
0x32000
as lower 32 bit part of both addresses are same, when particular instructions
are translated into host code(32 bit)
in both above cases the value is loaded from same memory and we get same
value. where actual behaviour was to get two different values.
here is the program which i used to test:
#include stdio.h
#include stdlib.h
#include limits.h
#define SIZE 4294967298 /* 4Gib*/
int main() {
char *array;
unsigned int i;
array = malloc(sizeof(char) * SIZE);
if(array == NULL){
fprintf(stderr, Could not allocate that much memory);
return 1;}
array[0] = 'a';
array[SIZE-2] = 'z';
printf(array[SIZE-2] = %c array[0] = %c\n,array[SIZE-2], array[0]);
return 0;
}
I have 8 gib RAM
I compiled this program on 64 bit linux and run this on 32 bit linux with
qemu
QEMU command line and output
**
$x86_64-linux-user/qemu-x86_64 ~/ar_x86
output: array[SIZE-1] = z,array[0] = z
Release information
x86_64 binary is tested with latest release : qemu-0.14.1
and with current development tree as well( live code of QEMU using git)
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/796480/+subscriptions
Re: [Qemu-devel] QEMU suitable for mission critical applications?
Thank you all for your responses. It appears that it would be wise to continue to maintain Sun hardware. On 12 June 2011 22:51, Blue Swirl blauwir...@gmail.com wrote: On Wed, Jun 8, 2011 at 2:19 PM, Stefan Hajnoczi stefa...@gmail.com wrote: On Wed, Jun 8, 2011 at 11:08 AM, Felix Oxley fe...@oxley.org wrote: I have a an (almost) EOL factory planning system running on Solaris Sparc which I would like to move to intel (and preferably virtualise) in order to avoid having to maintain the Sun system and backup system. The text based cobol application runs on this system: SunOS gplan 5.9 Generic_118558-35 sun4u sparc SUNW,Sun-Blade-1500. It is not feasible to recompile the application to x86. Therefore I am looking for alternative solutions. I heard of Transitive QuickTransit, however since being purchased by IBM I do not believe this is being marketed. Right. Would QEMU be suitable for this task? Would I be able to get commercial support? I think it will be difficult to get commerical support for QEMU SPARC. How well QEMU runs sun4u I'm not sure. Not very well yet. For running a single application, it could be possible to develop a Solaris user emulator to run only the applications under x86 Solaris. Personally, I would leave it running untouched since there isn't a low-risk solution. Perhaps others on the list have more information but I wanted to reply in case no one else does so you'll at least have something to go by. Used Sparc hardware is not very expensive either.
Re: [Qemu-devel] [Bug 796480] [NEW] Addresses with 4GB differences are consider as one single address in QEMU
On Mon, 13 Jun 2011, Khansa Butt wrote:
Public bug reported:
THIS IS THE ISSUE OF USER MODE EMULATION
Information about guest and host
**
guest: 64 bit x86 user mode binary
host: 32 bit Linux OS
uname -a :Linux KICS-HPCNL-32blue 2.6.33.3-85.fc13.i686.PAE #1 SMP
architecture: intel64
Bug Description
for memory reference instructions, suppose I have two addresses in guest
address space(64 bit)
0x22000
0x32000
as lower 32 bit part of both addresses are same, when particular instructions
are translated into host code(32 bit)
in both above cases the value is loaded from same memory and we get same
value. where actual behaviour was to get two different values.
here is the program which i used to test:
#include stdio.h
#include stdlib.h
#include limits.h
#define SIZE 4294967298 /* 4Gib*/
int main() {
Invalid declaration of main.
char *array;
unsigned int i;
i is never used.
array = malloc(sizeof(char) * SIZE);
sizeof(char) is by definition 1.
if(array == NULL){
fprintf(stderr, Could not allocate that much memory);
This lacks line termination.
return 1;}
array[0] = 'a';
array[SIZE-2] = 'z';
printf(array[SIZE-2] = %c array[0] = %c\n,array[SIZE-2], array[0]);
return 0;
}
I have 8 gib RAM
I compiled this program on 64 bit linux and run this on 32 bit linux with
qemu
QEMU command line and output
**
$x86_64-linux-user/qemu-x86_64 ~/ar_x86
output: array[SIZE-1] = z,array[0] = z
And this doesn't match what you printf at all (it's spelled SIZE-2 in
the format string in the code snippet above), but since main is misdeclared
(hello UB) all bets are off and nasal monsters are to be expected anyways.
Release information
x86_64 binary is tested with latest release : qemu-0.14.1
and with current development tree as well( live code of QEMU using git)
** Affects: qemu
Importance: Undecided
Status: New
--
mailto:av1...@comtv.ru
Re: [Qemu-devel] [PATCH] CPU consumption optimization of 'qemu-img convert' using bdrv_is_allocated()
On Mon, Jun 13, 2011 at 12:26 PM, Stefan Hajnoczi stefa...@gmail.com wrote: The optimization is to check allocation metadata instead of unconditionally reading and then checking for all zeroes? Yeah, exactly. On Mon, Jun 13, 2011 at 12:26 PM, Stefan Hajnoczi stefa...@gmail.com wrote: Why introduce a new constant instead of using BDRV_SECTOR_SIZE? OK, I'll fix this. On Mon, Jun 13, 2011 at 12:26 PM, Stefan Hajnoczi stefa...@gmail.com wrote: iff is not a typo. It means if and only if. Sorry, I don't know English so good. :) Will revert this. On Mon, Jun 13, 2011 at 12:26 PM, Stefan Hajnoczi stefa...@gmail.com wrote: I think the recursive is_allocated() needs its own function. This function is already long/complex enough :). I haven't done this because in this case I have to pass too lot of local variables to this function. Just not sure that it'll look better. But if you mind I surely can do this. -- Dmitry Konishchev mailto:konishc...@gmail.com
Re: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board
Can you give me any suggestion for create a face vga controler for my virtex board. I just want display a system with X support. Can I reference to the vga of PowerMac emulator? Thank Từ: Edgar E. Iglesias edgar.igles...@gmail.com Đến: Lê ?c Tài letai_d...@yahoo.com.vn Cc: Alexander Graf ag...@suse.de; qemu-devel@nongnu.orgDevelopers qemu-devel@nongnu.org Gửi ngày: 15:49:38, Thứ Hai, 13 tháng 6 2011 Chủ đề: Re: [Qemu-devel] HDD problem with Xilinx virtex-ml507 board On Mon, Jun 13, 2011 at 04:29:10PM +0800, Lê ?c Tài wrote: There is no VGA controller. OK, but virtex-ml507 have a DVI controler. Does QEMU support DVI output? Hi, It's not so much about what you can do with the virtex (I bet you can do lot's of stuff with it) but more limited to the devices available on the reference design. Take a look at: arch/powerpc/boot/dts/virtex440-ml507.dts to see what the reference design provides. QEMU provides only a subset of those devices. But you are of course free to create your own board or qemu machine, with what ever devices you'd like to throw in. Cheers
Re: [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices
On Fri, Jun 10, 2011 at 04:59:08PM +0200, Markus Armbruster wrote: Anthony Liguori aligu...@us.ibm.com writes: On 06/10/2011 03:13 AM, Markus Armbruster wrote: Jan Kiszkajan.kis...@siemens.com writes: Resource management, e.g. IRQs. That will be useful for other types of buses as well. A device should be able to say I need to be connected to an IRQ line. Feels generic to me. More specifically, a device has input IRQs. A device has no idea what number the IRQ is tied to. Devices may also have output IRQs. At the qdev layer, we should be able to connect an arbitrary output IRQ to an arbitrary input IRQ. So the crux of the problem is that: -device isa-serial,id=serial,irq=3 Is very wrong. It ought to look something more like -device piix3,id=piix3 -device isa-serial,id=serial,irq=piix3.irq[3] As Jan pointed out, ISA is a counter-example: your very wrong claim is actually wrong there :) An ISA device is always connected to all the ISA bus's interrupt lines. Device configuration determines how the device uses these lines. The old (non-MSI) PCI interrupts are similar, I think. Each PCI card has 4 irq pins INTA/INTB/INTC/INTD (usually only INTA is used). Chipset has PCI irq router with one or more inputs (PIIX3 has 4 PIRQ[A:D]#). Wiring on the motherboard determines which irq pin is connect to which PCI irq router input. Different slots usually connect the same interrupt line to a different router input in order to spread INTA of different cards between different inputs. PCI irq router is configured to route each input pin to a different (or same) GSI. OS can reconfigure irq router at will using AML methods if they are provided. -- Gleb.
[Qemu-devel] [PATCH RFC] target-ppc: Correctly handle translation address when bus unit ID = 0x07F
From: Hervé Poussineau hpous...@reactos.org
In that case, we want to access memory space instead of I/O controller
interface address space.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Simplify by avoiding reindentation of existing code.
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
Hello Alex,
This patch fixes a hang when booting 40p, please review.
The only vaguely related section in Power ISA 2.06B I could find was the
Programming Note on p. 764 (5.7.1).
6xx_pem.pdf identifies the masked SR bits as Bus unit ID, says nothing
about the 0x07f value though - might that be machine-specific?
Andreas
target-ppc/helper.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index cf2a368..cdf8d15 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -949,8 +949,18 @@ static inline int get_segment(CPUState *env, mmu_ctx_t
*ctx,
ret = -3;
}
} else {
+target_ulong sr;
LOG_MMU(direct store...\n);
/* Direct-store segment : absolutely *BUGGY* for now */
+
+sr = env-sr[eaddr 28];
+if ((sr 0x1FF0) 20 == 0x07f) {
+/* Memory forced */
+ctx-raddr = ((sr 0xF) 28) | (eaddr 0x0FFF);
+ctx-prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+return 0;
+}
+
switch (type) {
case ACCESS_INT:
/* Integer load/store : only access allowed */
--
1.7.5.3
Re: [Qemu-devel] [PATCH2] ppc64: fix mtmsr behavior on 64-bit targets
Am 12.06.2011 um 17:49 schrieb Nathan Whitehorn nwhiteh...@freebsd.org:
The mtmsr instruction is required not to modify the upper 32-bits of the
machine state register, but checks the current value of MSR[SF] to decide
whether to do this. This has the effect of zeroing the upper 32 bits of the
MSR whenever mtmsr is executed in 64-bit mode. Unconditionally preserve the
upper 32-bits in mtmsr for TARGET_PPC64.
Signed-off-by: Nathan Whitehorn nwhiteh...@freebsd.org
---
target-ppc/translate.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 59aef85..38d2e2e 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3884,18 +3884,17 @@ static void gen_mtmsr(DisasContext *ctx)
*/
gen_update_nip(ctx, ctx-nip);
#if defined(TARGET_PPC64)
-if (!ctx-sf_mode) {
-TCGv t0 = tcg_temp_new();
-TCGv t1 = tcg_temp_new();
-tcg_gen_andi_tl(t0, cpu_msr, 0xULL);
-tcg_gen_ext32u_tl(t1, cpu_gpr[rS(ctx-opcode)]);
-tcg_gen_or_tl(t0, t0, t1);
-tcg_temp_free(t1);
-gen_helper_store_msr(t0);
-tcg_temp_free(t0);
-} else
+TCGv t0 = tcg_temp_new();
+TCGv t1 = tcg_temp_new();
You're declaring variables in mid-scope. Please open a new scope :).
+tcg_gen_andi_tl(t0, cpu_msr, 0xULL);
+tcg_gen_ext32u_tl(t1, cpu_gpr[rS(ctx-opcode)]);
+tcg_gen_or_tl(t0, t0, t1);
While at it, this is a perfect scenario for the deposit tcg op! :)
If you feel like this is too cumbersome work for such a small patch, please let
me know and I'll do the changes for you :)
Alex
+tcg_temp_free(t1);
+gen_helper_store_msr(t0);
+tcg_temp_free(t0);
+#else
+gen_helper_store_msr(cpu_gpr[rS(ctx-opcode)]);
#endif
-gen_helper_store_msr(cpu_gpr[rS(ctx-opcode)]);
/* Must stop the translation as machine state (may have) changed */
/* Note that mtmsr is not always defined as context-synchronizing */
gen_stop_exception(ctx);
[Qemu-devel] [Bug 796480] Re: Addresses with 4GB differences are consider as one single address in QEMU
** Description changed:
THIS IS THE ISSUE OF USER MODE EMULATION
Information about guest and host
**
guest: 64 bit x86 user mode binary
host: 32 bit Linux OS
uname -a :Linux KICS-HPCNL-32blue 2.6.33.3-85.fc13.i686.PAE #1 SMP
architecture: intel64
Bug Description
for memory reference instructions, suppose I have two addresses in guest
address space(64 bit)
0x22000
0x32000
as lower 32 bit part of both addresses are same, when particular instructions
are translated into host code(32 bit)
in both above cases the value is loaded from same memory and we get same
value. where actual behaviour was to get two different values.
here is the program which i used to test:
#include stdio.h
#include stdlib.h
#include limits.h
- #define SIZE 4294967298 /* 4Gib*/
+ #define SIZE 4294967297 /* 4Gib*/
int main() {
char *array;
unsigned int i;
array = malloc(sizeof(char) * SIZE);
if(array == NULL){
fprintf(stderr, Could not allocate that much memory);
return 1;}
array[0] = 'a';
array[SIZE-2] = 'z';
printf(array[SIZE-2] = %c array[0] = %c\n,array[SIZE-2], array[0]);
return 0;
}
I have 8 gib RAM
I compiled this program on 64 bit linux and run this on 32 bit linux with
qemu
QEMU command line and output
**
$x86_64-linux-user/qemu-x86_64 ~/ar_x86
output: array[SIZE-1] = z,array[0] = z
Release information
x86_64 binary is tested with latest release : qemu-0.14.1
and with current development tree as well( live code of QEMU using git)
** Description changed:
THIS IS THE ISSUE OF USER MODE EMULATION
Information about guest and host
**
guest: 64 bit x86 user mode binary
host: 32 bit Linux OS
uname -a :Linux KICS-HPCNL-32blue 2.6.33.3-85.fc13.i686.PAE #1 SMP
architecture: intel64
Bug Description
for memory reference instructions, suppose I have two addresses in guest
address space(64 bit)
0x22000
0x32000
as lower 32 bit part of both addresses are same, when particular instructions
are translated into host code(32 bit)
in both above cases the value is loaded from same memory and we get same
value. where actual behaviour was to get two different values.
here is the program which i used to test:
#include stdio.h
#include stdlib.h
#include limits.h
#define SIZE 4294967297 /* 4Gib*/
int main() {
char *array;
unsigned int i;
array = malloc(sizeof(char) * SIZE);
if(array == NULL){
fprintf(stderr, Could not allocate that much memory);
return 1;}
array[0] = 'a';
-array[SIZE-2] = 'z';
-printf(array[SIZE-2] = %c array[0] = %c\n,array[SIZE-2], array[0]);
+array[SIZE-1] = 'z';
+printf(array[SIZE-1] = %c array[0] = %c\n,array[SIZE-1], array[0]);
return 0;
}
I have 8 gib RAM
I compiled this program on 64 bit linux and run this on 32 bit linux with
qemu
QEMU command line and output
**
$x86_64-linux-user/qemu-x86_64 ~/ar_x86
output: array[SIZE-1] = z,array[0] = z
Release information
x86_64 binary is tested with latest release : qemu-0.14.1
and with current development tree as well( live code of QEMU using git)
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/796480
Title:
Addresses with 4GB differences are consider as one single address in
QEMU
Status in QEMU:
New
Bug description:
THIS IS THE ISSUE OF USER MODE EMULATION
Information about guest and host
**
guest: 64 bit x86 user mode binary
host: 32 bit Linux OS
uname -a :Linux KICS-HPCNL-32blue 2.6.33.3-85.fc13.i686.PAE #1 SMP
architecture: intel64
Bug Description
for memory reference instructions, suppose I have two addresses in guest
address space(64 bit)
0x22000
0x32000
as lower 32 bit part of both addresses are same, when particular instructions
are translated into host code(32 bit)
in both above cases the value is loaded from same memory and we get same
value. where actual behaviour was to get two different values.
here is the program which i used to test:
#include stdio.h
#include stdlib.h
#include limits.h
#define SIZE 4294967297 /* 4Gib*/
int main() {
char *array;
unsigned int i;
array = malloc(sizeof(char) * SIZE);
if(array == NULL){
fprintf(stderr, Could not allocate that much memory);
return 1;}
array[0] = 'a';
array[SIZE-1] = 'z';
printf(array[SIZE-1] = %c array[0] = %c\n,array[SIZE-1], array[0]);
return 0;
}
I have 8 gib RAM
I compiled this program on 64 bit linux and run this on 32 bit linux with
qemu
QEMU command
[Qemu-devel] usb-musb: calls usb_packet_complete() on packets with no owner
The function usb_packet_complete() in hw/usb.c says:
/* Notify the controller that an async packet is complete. This should only
be called for packets previously deferred by returning USB_RET_ASYNC from
handle_packet. */
and this is checked by means of an assert(p-owner != NULL). However,
hw/usb-musb.c's musb_packet() function does this:
if (s-port.dev)
ret = usb_handle_packet(s-port.dev, ep-packey[dir].p);
else
ret = USB_RET_NODEV;
if (ret == USB_RET_ASYNC) {
ep-status[dir] = len;
return;
}
ep-status[dir] = ret;
usb_packet_complete(s-port.dev, ep-packey[dir].p);
which will call usb_packet_complete() on packets which did not
return USB_RET_ASYNC from usb_handle_packet, and so trips this
assert.
Any suggestions about what the right way to fix this is?
(I'm a bit confused about the comment that usb_packet_complete
is to 'notify the controller' -- usb-musb is the controller...)
(I do have a repro case but it's in qemu-linaro because it
uses the omap3 port; I can't seem to persuade my n800 image
to actually use the usb-otg.)
thanks
-- PMM
Re: [Qemu-devel] [PATCH] linux-user: Define AT_RANDOM to support target dynamic linkers that do ASLR
unsigned char k_rand_bytes[16]; elf_addr_t __user *u_rand_bytes; ... /* * Generate 16 random bytes for userspace PRNG seeding. */ get_random_bytes(k_rand_bytes, sizeof(k_rand_bytes)); u_rand_bytes = (elf_addr_t __user *) STACK_ALLOC(p, sizeof(k_rand_bytes)); if (__copy_to_user(u_rand_bytes, k_rand_bytes, sizeof(k_rand_bytes))) return -EFAULT; ... NEW_AUX_ENT(AT_RANDOM, (elf_addr_t)(unsigned long)u_rand_bytes); It's clearer to me now, thanks. It is fine with me, I also understand better now. And this now brings me to another point : In that case, it might have sense to also add the auxv AT_RANDOM_SIZE. http://sources.redhat.com/ml/libc-alpha/2008-10/msg00016.html I suggest at minimum a command-line argument to force a particular AT_RANDOM value, for repeatability. Yep, I agree. Laurent.
[Qemu-devel] KVM call agenda for June 14
Please send in any agenda items you are interested in covering. thanks, -juan
Re: [Qemu-devel] [PATCH2] ppc64: fix mtmsr behavior on 64-bit targets
On 06/13/11 05:20, Alexander Graf wrote:
Am 12.06.2011 um 17:49 schrieb Nathan Whitehornnwhiteh...@freebsd.org:
The mtmsr instruction is required not to modify the upper 32-bits of the
machine state register, but checks the current value of MSR[SF] to decide
whether to do this. This has the effect of zeroing the upper 32 bits of the MSR
whenever mtmsr is executed in 64-bit mode. Unconditionally preserve the upper
32-bits in mtmsr for TARGET_PPC64.
Signed-off-by: Nathan Whitehornnwhiteh...@freebsd.org
---
target-ppc/translate.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 59aef85..38d2e2e 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3884,18 +3884,17 @@ static void gen_mtmsr(DisasContext *ctx)
*/
gen_update_nip(ctx, ctx-nip);
#if defined(TARGET_PPC64)
-if (!ctx-sf_mode) {
-TCGv t0 = tcg_temp_new();
-TCGv t1 = tcg_temp_new();
-tcg_gen_andi_tl(t0, cpu_msr, 0xULL);
-tcg_gen_ext32u_tl(t1, cpu_gpr[rS(ctx-opcode)]);
-tcg_gen_or_tl(t0, t0, t1);
-tcg_temp_free(t1);
-gen_helper_store_msr(t0);
-tcg_temp_free(t0);
-} else
+TCGv t0 = tcg_temp_new();
+TCGv t1 = tcg_temp_new();
You're declaring variables in mid-scope. Please open a new scope :).
Does the gen_update_nip(ctx, ctx-nip); need to be first here? If not,
we can just move it to the end and avoid the scoping issue.
+tcg_gen_andi_tl(t0, cpu_msr, 0xULL);
+tcg_gen_ext32u_tl(t1, cpu_gpr[rS(ctx-opcode)]);
+tcg_gen_or_tl(t0, t0, t1);
While at it, this is a perfect scenario for the deposit tcg op! :)
If you feel like this is too cumbersome work for such a small patch, please let
me know and I'll do the changes for you :)
I have no idea what that is, so I'd prefer you do it :)
-Nathan
Re: [Qemu-devel] [PATCH] XBRLE page delta compression for live migration of large memory apps
The proposed patch slipped by with no apparent response - kindly provide
feedback,
Aidan
-Original Message-
From: qemu-devel-bounces+aidan.shribman=sap@nongnu.org
[mailto:qemu-devel-bounces+aidan.shribman=sap@nongnu.org]
On Behalf Of Shribman, Aidan
Sent: Sunday, May 22, 2011 3:01 PM
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH] XBRLE page delta compression
for live migration of large memory apps
Subject: [PATCH] XBRLE page delta compression for live
migration of large memory apps
From: Aidan Shribman aidan.shrib...@sap.com
By using XBRLE (Xor Based Run-Length-Encoding) we can reduce required
bandwidth for transfering of dirty memory pages during live migration
migrate_set_cachesize size
migrate -x url
Qemu host: Ubuntu 10.10
Testing: live migration (w and w/o XBRLE) tested successfully.
Signed-off-by: Benoit Hudzia benoit.hud...@sap.com
Signed-off-by: Petter Svard pett...@cs.umu.se
Signed-off-by: Aidan Shribman aidan.shrib...@sap.com
---
arch_init.c | 647
+
block-migration.c |3 +-
hmp-commands.hx | 36 +++-
hw/hw.h |3 +-
migration-exec.c |6 +-
migration-fd.c|6 +-
migration-tcp.c |6 +-
migration-unix.c |6 +-
migration.c | 33 +++-
migration.h | 23 ++-
qmp-commands.hx | 43 +++-
savevm.c | 13 +-
sysemu.h |3 +-
13 files changed, 749 insertions(+), 79 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 4486925..069cd67 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -27,6 +27,7 @@
#include sys/types.h
#include sys/mman.h
#endif
+#include assert.h
#include config.h
#include monitor.h
#include sysemu.h
@@ -41,6 +42,24 @@
#include gdbstub.h
#include hw/smbios.h
+//#define DEBUG_ARCH_INIT
+#ifdef DEBUG_ARCH_INIT
+#define DPRINTF(fmt, ...) \
+do { fprintf(stdout, arch_init: fmt, ## __VA_ARGS__);
} while (0)
+#else
+#define DPRINTF(fmt, ...) \
+do { } while (0)
+#endif
+
+//#define DEBUG_ARCH_INIT_CKSUM
+#ifdef DEBUG_ARCH_INIT_CKSUM
+#define PAGE_LOG(addr, pdata, fmt, ...) \
+do { page_log(addr, pdata, fmt, ## __VA_ARGS__); } while (0)
+#else
+#define PAGE_LOG(addr, pdata, fmt, ...) \
+do { } while (0)
+#endif
+
#ifdef TARGET_SPARC
int graphic_width = 1024;
int graphic_height = 768;
@@ -88,6 +107,402 @@ const uint32_t arch_type = QEMU_ARCH;
#define RAM_SAVE_FLAG_PAGE 0x08
#define RAM_SAVE_FLAG_EOS 0x10
#define RAM_SAVE_FLAG_CONTINUE 0x20
+#define RAM_SAVE_FLAG_XBRLE0x40
+
+/***/
+/* Page cache for storing previous pages as basis for XBRLE
compression */
+#define CACHE_N_WAY 2 /* 2-way assossiative cache */
+
+typedef struct CacheItem {
+ram_addr_t it_addr;
+unsigned long it_age;
+uint8_t *it_data;
+} CacheItem;
+
+typedef struct CacheBucket {
+CacheItem bkt_item[CACHE_N_WAY];
+} CacheBucket;
+
+static CacheBucket *page_cache;
+static int64_t cache_num_buckets;
+static uint64_t cache_max_item_age;
+static int64_t cache_num_items;
+
+static void cache_init(ssize_t num_buckets);
+static void cache_fini(void);
+static int cache_is_cached(ram_addr_t addr);
+static int cache_get_oldest(CacheBucket *buck);
+static int cache_get_newest(CacheBucket *buck, ram_addr_t addr);
+static void cache_insert(ram_addr_t id, uint8_t *pdata);
+static unsigned long cache_get_cache_pos(ram_addr_t address);
+static CacheItem *cache_item_get(unsigned long pos, int item);
+
+/***/
+/* RAM Migration State */
+typedef struct ArchMigrationState {
+int use_xbrle;
+int64_t xbrle_cache_size;
+} ArchMigrationState;
+
+static ArchMigrationState arch_mig_state;
+
+void arch_set_params(int blk_enable, int shared_base, int use_xbrle,
+int64_t xbrle_cache_size, void *opaque)
+{
+arch_mig_state.use_xbrle = use_xbrle;
+arch_mig_state.xbrle_cache_size = xbrle_cache_size;
+}
+
+/***/
+/* XBRLE (Xor Based Run-Length Encoding) */
+typedef struct XBRLEHeader {
+uint8_t xh_flags;
+uint16_t xh_len;
+uint32_t xh_cksum;
+} XBRLEHeader;
+
+static int rle_encode(uint8_t *src, int slen, uint8_t *dst,
int dlen);
+static int rle_decode(uint8_t *src, int slen, uint8_t *dst,
int dlen);
+#ifdef DEBUG_ARCH_INIT_CKSUM
+static uint32_t page_cksum(uint8_t *buf);
+static void page_log(ram_addr_t addr, uint8_t *pdata, const
char *fmt, ...);
+#endif
+
+/***/
+/* benchmarking */
+typedef struct BenchInfo {
+uint64_t normal_pages;
+uint64_t xbrle_pages;
+uint64_t xbrle_bytes;
+uint64_t xbrle_pages_aborted;
+uint64_t dup_pages;
+uint64_t iterations;
+} BenchInfo;
+
+static
Re: [Qemu-devel] [PATCH2] ppc64: fix mtmsr behavior on 64-bit targets
On 13.06.2011, at 14:52, Nathan Whitehorn wrote:
On 06/13/11 05:20, Alexander Graf wrote:
Am 12.06.2011 um 17:49 schrieb Nathan Whitehornnwhiteh...@freebsd.org:
The mtmsr instruction is required not to modify the upper 32-bits of the
machine state register, but checks the current value of MSR[SF] to decide
whether to do this. This has the effect of zeroing the upper 32 bits of the
MSR whenever mtmsr is executed in 64-bit mode. Unconditionally preserve the
upper 32-bits in mtmsr for TARGET_PPC64.
Signed-off-by: Nathan Whitehornnwhiteh...@freebsd.org
---
target-ppc/translate.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 59aef85..38d2e2e 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3884,18 +3884,17 @@ static void gen_mtmsr(DisasContext *ctx)
*/
gen_update_nip(ctx, ctx-nip);
#if defined(TARGET_PPC64)
-if (!ctx-sf_mode) {
-TCGv t0 = tcg_temp_new();
-TCGv t1 = tcg_temp_new();
-tcg_gen_andi_tl(t0, cpu_msr, 0xULL);
-tcg_gen_ext32u_tl(t1, cpu_gpr[rS(ctx-opcode)]);
-tcg_gen_or_tl(t0, t0, t1);
-tcg_temp_free(t1);
-gen_helper_store_msr(t0);
-tcg_temp_free(t0);
-} else
+TCGv t0 = tcg_temp_new();
+TCGv t1 = tcg_temp_new();
You're declaring variables in mid-scope. Please open a new scope :).
Does the gen_update_nip(ctx, ctx-nip); need to be first here? If not, we can
just move it to the end and avoid the scoping issue.
It makes sure that we know the current instruction pointer in case an interrupt
gets delivered for example. There's a hack to not require this for data
protection interrupts, but others might. In general, we need this whenever we
call a helper function that could manually raise an interrupt. helper_store_msr
does this:
void helper_store_msr (target_ulong val)
{
val = hreg_store_msr(env, val, 0);
if (val != 0) {
env-interrupt_request |= CPU_INTERRUPT_EXITTB;
helper_raise_exception(val);
}
}
So it needs to come before any call to gen_helper_store_msr :).
+tcg_gen_andi_tl(t0, cpu_msr, 0xULL);
+tcg_gen_ext32u_tl(t1, cpu_gpr[rS(ctx-opcode)]);
+tcg_gen_or_tl(t0, t0, t1);
While at it, this is a perfect scenario for the deposit tcg op! :)
If you feel like this is too cumbersome work for such a small patch, please
let me know and I'll do the changes for you :)
I have no idea what that is, so I'd prefer you do it :)
It's a new tcg call that makes the above code a lot easier. Do you want to go
for v3 without changing deposit then? That would be awesome :).
Alex
Re: [Qemu-devel] [PATCH RFC] target-ppc: Correctly handle translation address when bus unit ID = 0x07F
On 13.06.2011, at 12:13, Andreas Färber wrote:
From: Hervé Poussineau hpous...@reactos.org
In that case, we want to access memory space instead of I/O controller
interface address space.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Simplify by avoiding reindentation of existing code.
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
Hello Alex,
This patch fixes a hang when booting 40p, please review.
The only vaguely related section in Power ISA 2.06B I could find was the
Programming Note on p. 764 (5.7.1).
The 601 is not 2.06 compliant, so you need to dig up earlier manuals. Google
revealed this for the 601:
http://www.freescale.com/files/32bit/doc/user_guide/MPC601UM.pdf
6xx_pem.pdf identifies the masked SR bits as Bus unit ID, says nothing
about the 0x07f value though - might that be machine-specific?
Andreas
target-ppc/helper.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index cf2a368..cdf8d15 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -949,8 +949,18 @@ static inline int get_segment(CPUState *env, mmu_ctx_t
*ctx,
ret = -3;
}
} else {
+target_ulong sr;
LOG_MMU(direct store...\n);
This is direct store, so you're in T=1
/* Direct-store segment : absolutely *BUGGY* for now */
+
+sr = env-sr[eaddr 28];
+if ((sr 0x1FF0) 20 == 0x07f) {
This is the BUID, yes.
According to page 70 in the manual I mentioned above, the following passage
applies:
Memory-forced I/O controller interface (BUID = x'07F')—Memory-forced I/O
controller interface operations access memory space. They do not use the
extensions to the memory protocol described for I/O controller interface
accesses, and they bypass the page- and block-translation and protection
mechanisms. The physical address is found by concatenating bits 28–31 of the
respective segment register with bits 4–31 of the effective address. This
address is marked as noncacheable, write- through, and global.
Because memory-forced I/O controller interface accesses address memory space,
they are subject to the same coherency control as other memory reference
operations. More generally, accesses to memory-forced I/O controller interface
segments are considered to be cache-inhibited, write-through and
memory-coherent operations with respect to the 601 cache and bus interface.
Since we don't implement any cache ourselves and MMIO is simply handled
immediately, I don't think there's anything special that needs to be done,
except for mapping it as EA=RA.
+/* Memory forced */
+ctx-raddr = ((sr 0xF) 28) | (eaddr 0x0FFF);
This is exactly the same as ctx-raddr = eaddr, no?
So yes, in general the patch looks fine. Please add some comments to document
what's going on though. I don't think everyone who reads the code wants to dig
the out from the manuals :).
Alex
Re: [Qemu-devel] [PATCH] linux-user: Define AT_RANDOM to support target dynamic linkers that do ASLR
On 06/13/2011 05:03 AM, Laurent Alfonsi wrote: And this now brings me to another point : In that case, it might have sense to also add the auxv AT_RANDOM_SIZE. http://sources.redhat.com/ml/libc-alpha/2008-10/msg00016.html That never made it into the upstream kernel though. r~
[Qemu-devel] Participation Requested: Survey about Open-Source Software Development
Hi, Drs. Jeffrey Carver, Rosanna Guadagno, Debra McCallum, and Mr. Amiangshu Bosu, University of Alabama, and Dr. Lorin Hochstein, University of Southern California, are conducting a survey of open-source software developers. This survey seeks to understand how developers on distributed, virtual teams, like open-source projects, interact with each other to accomplish their tasks. You must be at least 19 years of age to complete the survey. The survey should take approximately 15 minutes to complete. If you are actively participating as a developer, please consider completing our survey. Here is the link to the survey: http://goo.gl/HQnux We apologize for inconvenience and if you receive multiple copies of this email. This survey has been approved by The University of Alabama IRB board. Thanks, Dr. Jeffrey Carver Assistant Professor University of Alabama (v) 205-348-9829 (f) 205-348-0219 http://www.cs.ua.edu/~carver
Re: [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices
On 06/13/2011 03:05 AM, Avi Kivity wrote: On 06/12/2011 10:21 PM, Anthony Liguori wrote: It's perfectly fine to have a type called PCIBus that I440FX extends, but qdev shouldn't have explicit knowledge of something called a bus IMHO. Doing this forces a limited mechanism of connecting devices because it creates an artificial tree (by implying a parent/child relationship). It makes composition difficult if not impossible. I think qdev buses are useful as long as they don't enforce their interfaces. That is, a qdev that is a child of a qbus has access to the qbus's interfaces, but also access to other stuff. I see two independent data structures. The first is the instantiation tree. The instantiation tree may look like this: +-- i440fx | | | +-- PIIX3 | | | | | +-- mc146818a | | +-- uart | | +-- DMA | | +-- keyboard controller | | +-- (remaining platform ISA devices | | | +-- UHCI USB controller | +-- IDE controller | +-- e1000 +-- cirrus-vga +-- virtio-balloon-pci +-- IDE disk0 Instantiating i440fx makes a bunch of default stuff. This is composition. Everything else requires explicit instantiation. This is, strictly speaking, the parent/child relationships. If you destroy i440fx, all of it's children have to also go away (by definition). Nothing about bus relationship is implied here. Even if i440fx exposes a PCI bus, the PIIX3 is a child of i440fx even though e1000 is not (even if they're both PCI devices). I bus/device relationship is not imposed, but may hold for some of the devices (but not others). Another example of aggregation is PCI slots and functions. A PCI device is composed of multiple functions that can be hotplugged as one, and share parts of the address. But there is no slot/function bus involved. Correct. This also hints at how hot plug could work. If devices had properties of type socket that you could connect devices too, a device could conceivably lock the socket after the device is realized (becomes guest visible). Sockets that aren't locked after realize are hot pluggable. Hot plugging simply becomes making a connection post realize. An address is implied by the property path. This gives you a way to allow PCI devices to be plugged in sockets (including multifunction devices) while not allowing individual functions to be hot plugged. Regards, Anthony Liguori Regards, Anthony Liguori
Re: [Qemu-devel] [PATCH v2] block/rbd: Remove unused local variable
On 06/10/2011 01:05 PM, Stefan Weil wrote:
Variable 'snap' is assigned a value that is never used.
Remove snap and the related code.
v2:
The unused variable which was in function rbd_open is now in function
qemu_rbd_create, so the patch needed an update.
Cc: Christian Brunnerc...@muc.de
Cc: Josh Durginjosh.dur...@dreamhost.com
Cc: Kevin Wolfkw...@redhat.com
Signed-off-by: Stefan Weilw...@mail.berlios.de
---
block/rbd.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/block/rbd.c b/block/rbd.c
index bdc448a..d5659cd 100644
--- a/block/rbd.c
+++ b/block/rbd.c
@@ -227,7 +227,6 @@ static int qemu_rbd_create(const char *filename,
QEMUOptionParameter *options)
char name[RBD_MAX_IMAGE_NAME_SIZE];
char snap_buf[RBD_MAX_SNAP_NAME_SIZE];
char conf[RBD_MAX_CONF_SIZE];
-char *snap = NULL;
rados_t cluster;
rados_ioctx_t io_ctx;
int ret;
@@ -238,9 +237,6 @@ static int qemu_rbd_create(const char *filename,
QEMUOptionParameter *options)
conf, sizeof(conf)) 0) {
return -EINVAL;
}
-if (snap_buf[0] != '\0') {
-snap = snap_buf;
-}
/* Read out options */
while (options options-name) {
Looks good to me:
Reviewed-by: Josh Durgin josh.dur...@dreamhost.com
Re: [Qemu-devel] [PATCH v2][ 10/21] qapi: add QMP input visiter
On Fri, 3 Jun 2011 17:33:08 -0500
Michael Roth mdr...@linux.vnet.ibm.com wrote:
+static void qmp_input_type_int(Visiter *v, int64_t *obj, const char *name,
Error **errp)
+{
+QmpInputVisiter *qiv = to_qiv(v);
+QObject *qobj = qmp_input_get_object(qiv, name);
+
+if (!qobj || qobject_type(qobj) != QTYPE_QINT) {
+error_set(errp, QERR_INVALID_PARAMETER_TYPE, name, integer);
+return;
+}
+
+*obj = qint_get_int(qobject_to_qint(qobj));
Let me warn you for an error I just got: if 'name' is NULL and the if test is
true, then error_set() will segfault, because 'name' must not be NULL.
So either, we always pass 'name' in the generated code or we automatically
build a new string if 'name' is NULL.
Re: [Qemu-devel] [PATCH] Changelog: Add explanatory note that this file is no longer updated
On Thu, Jun 09, 2011 at 11:43:12AM +0100, Peter Maydell wrote: Add an explanatory note to the top of Changelog pointing at the wiki and git history for changelogs for more recent releases. I've applied this, thanks. Signed-off-by: Peter Maydell peter.mayd...@linaro.org --- Changelog |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/Changelog b/Changelog index 1c41e14..28a69af 100644 --- a/Changelog +++ b/Changelog @@ -1,3 +1,9 @@ +This file documents changes for QEMU releases 0.12 and earlier. +For changelog information for later releases, see +http://wiki.qemu.org/ChangeLog or look at the git history for +more detailed information. + + version 0.12.0: - Update to SeaBIOS 0.5.0 -- 1.7.1
Re: [Qemu-devel] [PATCH] configure: Detect and don't try to use older libcurl
On Thu, Jun 09, 2011 at 10:54:29PM +0100, Peter Maydell wrote:
Older versions of libcurl don't have some of the features we try to
use, in particular curl_multi_setopt(). Check for this in the 'is
libcurl available?' configure test so we disable curl support if the
library is too old.
Applied, thanks.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
configure |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/configure b/configure
index d38b952..03d693a 100755
--- a/configure
+++ b/configure
@@ -1709,7 +1709,7 @@ fi
if test $curl != no ; then
cat $TMPC EOF
#include curl/curl.h
-int main(void) { return curl_easy_init(); }
+int main(void) { curl_easy_init(); curl_multi_setopt(0, 0, 0); return 0; }
EOF
curl_cflags=`$curlconfig --cflags 2/dev/null`
curl_libs=`$curlconfig --libs 2/dev/null`
--
1.7.1
Re: [Qemu-devel] [RFC v4 00/12] ISA reconfigurability v4
On Wed, Jun 8, 2011 at 9:55 PM, Andreas Färber andreas.faer...@web.de wrote: Hey, I've refined the series to track the state in ISADevice and to expose it as VMState. Error handling has been improved, and setting the state multiple times is no-op now. To read the state, I'm introducing support for bool qdev properties. Some more qdev_prop_get_*() helpers are introduced, too. Still need to do some runtime testing, but I'd like to hear if this is getting mergeable now, especially wrt VMState. Andreas Andreas Färber (11): qdev: Add support for property type bool qdev: Add helpers for reading properties isa: Provide set_state callback isa: Allow to un-assign I/O ports isa: Allow to un-associate an IRQ I like the patches above. But I think the set_state() interface could be improved. For example, cpu_register_io_memory() gives an index which is passed to sysbus_register_mmio(). Then the board can instantiate the device at desired location without caring about the device internals. With set_state(), the device does everything. parallel: Implement ISA set_state callback serial: Implement ISA set_state() callback fdc: Implement ISA set_state() callback ide: Allow to discard I/O ports ide: Implement ISA set_state() callback prep: Add pc87312 Super I/O emulation Hervé Poussineau (1): fdc: Parametrize ISA base, IRQ and DMA Makefile.objs | 1 + default-configs/ppc-softmmu.mak | 2 + hw/fdc.c | 62 -- hw/hw.h | 15 ++ hw/ide/core.c | 8 + hw/ide/internal.h | 1 + hw/ide/isa.c | 32 +++- hw/isa-bus.c | 57 + hw/isa.h | 6 + hw/parallel.c | 69 -- hw/pc87312.c | 470 +++ hw/qdev-properties.c | 88 hw/qdev.h | 13 + hw/serial.c | 30 ++- 14 files changed, 803 insertions(+), 51 deletions(-) create mode 100644 hw/pc87312.c -- 1.7.5.3
Re: [Qemu-devel] [RFC] ppc: qdev-ify CPU creation
On Thu, Jun 9, 2011 at 12:13 AM, Andreas Färber andreas.faer...@web.de wrote: Am 21.12.2010 um 21:01 schrieb Andreas Färber: From: Hervé Poussineau hpous...@reactos.org v1: * Coding style fixes. Signed-off-by: Hervé Poussineau hpous...@reactos.org Cc: Alexander Graf ag...@suse.de Signed-off-by: Andreas Färber andreas.faer...@web.de --- Hello Alex, Seeing the discussions about Leon3, is this the way to go for ppc? Is ppc.[hc] right? The unconditional use of 6xx looks suspicious to me, no? Should we rename cpu_device_irq_request() to cpu_device_irq_request_6xx()? Regards, Andreas Ping? Any guidance on how to proceed with this? The patch looks OK, though the qdev method is not used. Ideally after the patch, the devices and even the board level shouldn't use CPUState but DeviceState.
Re: [Qemu-devel] [PATCH v2] Darwin: Fix compilation warning regarding the deprecated daemon() function
On Thu, Jun 9, 2011 at 9:47 PM, Andreas Färber andreas.faer...@web.de wrote:
Am 07.06.2011 um 05:34 schrieb Alexandre Raymond:
Changes since v1: create a wrapper function named qemu_daemon() in
oslib-posix.c
instead of putting the OS specific workaround in qemu-nbd.c directly.
On OSX = 10.5, daemon() is deprecated, resulting in the following
warning:
8
qemu-nbd.c: In function ‘main’:
qemu-nbd.c:371: warning: ‘daemon’ is deprecated (declared at
/usr/include/stdlib.h:289)
8
The following trick, used in mDNSResponder, takes care of this warning:
http://www.opensource.apple.com/source/mDNSResponder/mDNSResponder-258.18/mDNSPosix/PosixDaemon.c
On OSX, it temporarily renames the daemon() function before including
stdlib.h
and declares it manually as an extern function. This way, the compiler
does not
see the declaration from stdlib.h and thus does not display the warning.
Signed-off-by: Alexandre Raymond cerb...@gmail.com
Acked-by: Andreas Färber andreas.faer...@web.de
Blue, do you want this to go through the cocoa queue (please ack then) or do
you want to apply this directly?
I have a minor style comment, but otherwise this could go via cocoa queue.
I have two further issues on my radar, 1) Alexandre's handleEvent: warning
and 2) the big sigfd issue, and would then send a pull request.
Andreas
---
osdep.h | 1 +
oslib-posix.c | 15 +++
qemu-nbd.c | 2 +-
3 files changed, 17 insertions(+), 1 deletions(-)
diff --git a/osdep.h b/osdep.h
index 970d767..6eb9a49 100644
--- a/osdep.h
+++ b/osdep.h
@@ -88,6 +88,7 @@
# define QEMU_GNUC_PREREQ(maj, min) 0
#endif
+int qemu_daemon(int nochdir, int noclose);
void *qemu_memalign(size_t alignment, size_t size);
void *qemu_vmalloc(size_t size);
void qemu_vfree(void *ptr);
diff --git a/oslib-posix.c b/oslib-posix.c
index 7bc5f7c..5392e25 100644
--- a/oslib-posix.c
+++ b/oslib-posix.c
@@ -26,11 +26,26 @@
* THE SOFTWARE.
*/
+/* The following block of code temporarily renames the daemon() function
so the
+ compiler does not see the warning associated with it in stdlib.h on
OSX */
+#ifdef __APPLE__
+#define daemon qemu_fake_daemon_function
+#include stdlib.h
+#undef daemon
+extern int daemon(int, int);
+#endif
+
#include config-host.h
#include sysemu.h
#include trace.h
#include qemu_socket.h
+
+
+int qemu_daemon(int nochdir, int noclose) {
Here the brace should be on a new line. This is C, not Java.
+ return daemon(nochdir, noclose);
+}
+
void *qemu_oom_check(void *ptr)
{
if (ptr == NULL) {
diff --git a/qemu-nbd.c b/qemu-nbd.c
index e858033..e65cc6c 100644
--- a/qemu-nbd.c
+++ b/qemu-nbd.c
@@ -359,7 +359,7 @@ int main(int argc, char **argv)
if (!verbose) {
/* detach client and server */
- if (daemon(0, 0) == -1) {
+ if (qemu_daemon(0, 0) == -1) {
err(EXIT_FAILURE, Failed to daemonize);
}
}
--
1.7.5
Re: [Qemu-devel] [Bug 796202] [NEW] Doing a 64 bit load from a 32 bit local APIC register is allowed
On Sun, Jun 12, 2011 at 4:03 PM, Robert Uhl 796...@bugs.launchpad.net wrote: Public bug reported: Doing u64 lapic_idregister = (u64) fix_to_virt(FIX_APIC_BASE) + 0x20; and later in an interrupt handler movq (lapic_idregister), %rcx movq (%rcx), %rcx in a linux kernel module works in qemu 0.13.91 but not on real hardware (it simply reboots). On real hardware only movl (%rcx), %ecx works (also in qemu). Thank you for the report. Currently QEMU devices only provide access methods up to 32 bits, a 64 bit access is emulated with two 32 bit accesses. So it is not possible to handle a 32 bit access differently from a 64 bit one for now. So far this hasn't been considered to be a problem for x86, though it is clearly not correct for Sparc and Alpha. This report shows that it is necessary to add 64 bit access methods (or otherwise handle 64 bit accesses more realistically) since x86 is also affected. Adding the 64 bit method would be a major refactoring though and there are other designs possible.
Re: [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices
On Sun, Jun 12, 2011 at 10:21 PM, Anthony Liguori aligu...@us.ibm.com wrote: On 06/12/2011 12:12 PM, Avi Kivity wrote: On 06/10/2011 06:43 PM, Anthony Liguori wrote: What exactly is so very wrong about buses that they need to die? They force a device tree. The device model shouldn't be a tree, but a directed graph. Right. As an example, you configure PCI interrupt routing and the memory controller by writing to a PCI device, which logically doesn't have access to any of this stuff if it's behind the PCI bus. However, I don't think buses should die. They should be available as an easy way to model the devices that do follow the rules. But we should also expose everything else for the exceptional cases. It's perfectly fine to have a type called PCIBus that I440FX extends, but qdev shouldn't have explicit knowledge of something called a bus IMHO. Doing this forces a limited mechanism of connecting devices because it creates an artificial tree (by implying a parent/child relationship). It makes composition difficult if not impossible. I think qdev buses are useful as long as they don't enforce their interfaces. That is, a qdev that is a child of a qbus has access to the qbus's interfaces, but also access to other stuff. I see two independent data structures. The first is the instantiation tree. The instantiation tree may look like this: +-- i440fx | | | +-- PIIX3 | | | | | +-- mc146818a | | +-- uart | | +-- DMA | | +-- keyboard controller | | +-- (remaining platform ISA devices | | | +-- UHCI USB controller | +-- IDE controller | +-- e1000 +-- cirrus-vga +-- virtio-balloon-pci +-- IDE disk0 Instantiating i440fx makes a bunch of default stuff. This is composition. Everything else requires explicit instantiation. This is, strictly speaking, the parent/child relationships. If you destroy i440fx, all of it's children have to also go away (by definition). Nothing about bus relationship is implied here. Even if i440fx exposes a PCI bus, the PIIX3 is a child of i440fx even though e1000 is not (even if they're both PCI devices). I actually like this slot idea in place of buses. But wouldn't there be two classes of devices (or two APIs), slot devices and composable devices? That said, there absolutely should be the following paths: /i440fx/IDE controller/primary/master - IDE disk0 /i440fx/slot3 - cirrus-vga The expression of bus should just be a bidirectional path (when that makes sense). IOW: /i440fx/slot3 - cirrus-vga /cirrus-vga/bus - i440fx There, of course, can be all sorts of crazy paths through the graph. The following should be valid: /i440fx/slot2 - IDE controller /cirrus-vga/bus/slot2/primary/master But separating out hw paths from instantiation tree has some nice characteristics. The instantiation tree is the obvious place to implement live migration whereas reset would probably walk device paths. Regards, Anthony Liguori
[Qemu-devel] [PATCH] error framework: Fix compilation for w32/w64
The declaration of function error_set() should use macro GCC_FMT_ATTR
instead of gcc's format printf attribute.
For w32/w64, both declarations are different and GCC_FMT_ATTR is needed.
Compilation for w64 even failed with the original code because mingw64
defines a macro for printf.
GCC_FMT_ATTR requires qemu-common.h, so add it in error.c
(it's also included by error_int.h but too late).
Remove assert.h which is included by qemu-common.h.
Cc: Luiz Capitulino lcapitul...@redhat.com
Cc: Anthony Liguori aligu...@us.ibm.com
Signed-off-by: Stefan Weil w...@mail.berlios.de
---
error.c |3 ++-
error.h |3 +--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/error.c b/error.c
index 867eec2..74d7398 100644
--- a/error.c
+++ b/error.c
@@ -9,11 +9,12 @@
* This work is licensed under the terms of the GNU LGPL, version 2. See
* the COPYING.LIB file in the top-level directory.
*/
+
+#include qemu-common.h
#include error.h
#include error_int.h
#include qemu-objects.h
#include qerror.h
-#include assert.h
struct Error
{
diff --git a/error.h b/error.h
index 003c855..0f92a6f 100644
--- a/error.h
+++ b/error.h
@@ -25,8 +25,7 @@ typedef struct Error Error;
* Currently, qerror.h defines these error formats. This function is not
* meant to be used outside of QEMU.
*/
-void error_set(Error **err, const char *fmt, ...)
-__attribute__((format(printf, 2, 3)));
+void error_set(Error **err, const char *fmt, ...) GCC_FMT_ATTR(2, 3);
/**
* Returns true if an indirect pointer to an error is pointing to a valid
--
1.7.2.5
Re: [Qemu-devel] [RFC v4 00/12] ISA reconfigurability v4
Am 13.06.2011 um 22:08 schrieb Blue Swirl: On Wed, Jun 8, 2011 at 9:55 PM, Andreas Färber andreas.faer...@web.de wrote: I've refined the series to track the state in ISADevice and to expose it as VMState. Error handling has been improved, and setting the state multiple times is no-op now. To read the state, I'm introducing support for bool qdev properties. Some more qdev_prop_get_*() helpers are introduced, too. Still need to do some runtime testing, but I'd like to hear if this is getting mergeable now, especially wrt VMState. Andreas Andreas Färber (11): qdev: Add support for property type bool qdev: Add helpers for reading properties isa: Provide set_state callback isa: Allow to un-assign I/O ports isa: Allow to un-associate an IRQ I like the patches above. But I think the set_state() interface could be improved. For example, cpu_register_io_memory() gives an index which is passed to sysbus_register_mmio(). Then the board can instantiate the device at desired location without caring about the device internals. With set_state(), the device does everything. Thanks. On IRC, Juan proposed to replace set_state with enable and disable, that's what I hope to post together with VMStateSubsections tonight, as part of the large PReP series. Your proposal I don't understand yet. The ioport handlers are device- specific, so must be registered from within the device. We discussed consolidating that into helpers at ISA level to avoid one call, Gleb further suggested converting to IORange. We can't do that declaratively since some are conditional. Andreas
Re: [Qemu-devel] [PATCH] hw/9118.c: Implement active-low interrupt support
Ping?
On 26 May 2011 17:34, Peter Maydell peter.mayd...@linaro.org wrote:
The 9118 ethernet controller interrupt line is active low unless
the IRQ config register is programmed to set both the IRQ_POL
(polarity: active-high) and IRQ_TYPE (type: push-pull) bits:
implement support for inverting the irq output in other configurations.
This also requires that we support setting the bits in the first
place, and that we correctly preserve them across software reset.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
The motivation for this patch is actually an omap3 platform (overo)
which uses the active-low configuration; the platforms in QEMU
mainline which use it (vexpress and realview) both configure the
chip to active-high, which is why this bug hasn't come to light
before. I've tested that (a) my overo platform works with the
change and (b) it doesn't regress vexpress.
hw/lan9118.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/hw/lan9118.c b/hw/lan9118.c
index 4c42fe9..3f3c05d 100644
--- a/hw/lan9118.c
+++ b/hw/lan9118.c
@@ -228,6 +228,12 @@ static void lan9118_update(lan9118_state *s)
if ((s-irq_cfg IRQ_EN) == 0) {
level = 0;
}
+ if ((s-irq_cfg (IRQ_TYPE | IRQ_POL)) != (IRQ_TYPE | IRQ_POL)) {
+ /* Interrupt is active low unless we're configured as
+ * active-high polarity, push-pull type.
+ */
+ level = !level;
+ }
qemu_set_irq(s-irq, level);
}
@@ -294,8 +300,7 @@ static void phy_reset(lan9118_state *s)
static void lan9118_reset(DeviceState *d)
{
lan9118_state *s = FROM_SYSBUS(lan9118_state, sysbus_from_qdev(d));
-
- s-irq_cfg = ~(IRQ_TYPE | IRQ_POL);
+ s-irq_cfg = (IRQ_TYPE | IRQ_POL);
s-int_sts = 0;
s-int_en = 0;
s-fifo_int = 0x4800;
@@ -904,7 +909,8 @@ static void lan9118_writel(void *opaque,
target_phys_addr_t offset,
switch (offset) {
case CSR_IRQ_CFG:
/* TODO: Implement interrupt deassertion intervals. */
- s-irq_cfg = (s-irq_cfg IRQ_INT) | (val IRQ_EN);
+ val = (IRQ_EN | IRQ_POL | IRQ_TYPE);
+ s-irq_cfg = (s-irq_cfg IRQ_INT) | val;
break;
case CSR_INT_STS:
s-int_sts = ~val;
--
1.7.1
[Qemu-devel] [PATCH 01/10] cocoa: do not create a spurious window for -version
From: Tristan Gingold ging...@adacore.com
When invoked with -version, qemu will exit just after displaying the version,
so there is no need to create a window.
Also handles --XXX options.
Signed-off-by: Tristan Gingold ging...@adacore.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
ui/cocoa.m | 15 ---
1 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index 20f91bc..1ff1ac6 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -865,10 +865,19 @@ int main (int argc, const char * argv[]) {
/* In case we don't need to display a window, let's not do that */
for (i = 1; i argc; i++) {
-if (!strcmp(argv[i], -vnc) ||
-!strcmp(argv[i], -nographic) ||
-!strcmp(argv[i], -curses)) {
+const char *opt = argv[i];
+
+if (opt[0] == '-') {
+/* Treat --foo the same as -foo. */
+if (opt[1] == '-') {
+opt++;
+}
+if (!strcmp(opt, -vnc) ||
+!strcmp(opt, -nographic) ||
+!strcmp(opt, -version) ||
+!strcmp(opt, -curses)) {
return qemu_main(gArgc, gArgv);
+}
}
}
--
1.7.5.3
[Qemu-devel] [PATCH 04/10] Remove warning in printf due to type mismatch
From: Alexandre Raymond cerb...@gmail.com
8
qemu/target-lm32/translate.c: In function ‘gen_intermediate_code_internal’:
qemu/target-lm32/translate.c:1135: warning: format ‘%zd’ expects type ‘signed
size_t’, but argument 4 has type ‘int’
8
Both gen_opc_ptr and gen_opc_buf are uint16_t *. The difference between
pointers is a ptrdiff_t so printf needs '%td'.
Signed-off-by: Alexandre Raymond cerb...@gmail.com
Acked-by: Stefan Weil w...@mail.berlios.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
target-lm32/translate.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index eb21158..5e19725 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1132,7 +1132,7 @@ static void gen_intermediate_code_internal(CPUState *env,
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
qemu_log(\n);
log_target_disas(pc_start, dc-pc - pc_start, 0);
-qemu_log(\nisize=%d osize=%zd\n,
+qemu_log(\nisize=%d osize=%td\n,
dc-pc - pc_start, gen_opc_ptr - gen_opc_buf);
}
#endif
--
1.7.5.3
[Qemu-devel] [PATCH 05/10] configure: Fix check for fdatasync()
From: Alexandre Raymond cerb...@gmail.com
Under Darwin, a symbol exists for the fdatasync() function, so that our
link test succeeds. However _POSIX_SYNCHRONIZED_IO is set to '-1'.
According to POSIX:2008, a value of -1 means the feature is not supported.
A value of 0 means supported at compilation time, and a value greater 0
means supported at both compilation and run time.
Enable fdatasync() only if _POSIX_SYNCHRONIZED_IO is '0'.
Signed-off-by: Alexandre Raymond cerb...@gmail.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
configure |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/configure b/configure
index c931ae8..6101f4e 100755
--- a/configure
+++ b/configure
@@ -2461,7 +2461,13 @@ fi
fdatasync=no
cat $TMPC EOF
#include unistd.h
-int main(void) { return fdatasync(0); }
+int main(void) {
+#if defined(_POSIX_SYNCHRONIZED_IO) _POSIX_SYNCHRONIZED_IO 0
+return fdatasync(0);
+#else
+#abort Not supported
+#endif
+}
EOF
if compile_prog ; then
fdatasync=yes
--
1.7.5.3
[Qemu-devel] [PULL 00/10] Fixes for Cocoa backend
Hello, I've collected a number of warning and usability fixes for the Cocoa frontend and Darwin host. Please pull. Cc: Blue Swirl blauwir...@gmail.com The following changes since commit 0b862cedf36d927818c50584ddd611b0370673df: configure: Detect and don't try to use older libcurl (2011-06-13 21:16:27 +0200) are available in the git repository at: git://repo.or.cz/qemu/afaerber.git cocoa-for-upstream Alexandre Raymond (5): Fix compilation warning due to incorrectly specified type Cocoa: avoid displaying window when command-line contains '-h' or '-help' Remove warning in printf due to type mismatch configure: Fix check for fdatasync() Darwin: Fix compilation warning regarding the deprecated daemon() function Andreas Färber (4): Fix libfdt warnings on Darwin cocoa: Provide central qemu_main() prototype cocoa: Revert dependency on VNC cocoa: Avoid warning related to multiple handleEvent: definitions Tristan Gingold (1): cocoa: do not create a spurious window for -version Makefile.objs |2 +- audio/coreaudio.c |2 +- configure |8 +++- libfdt_env.h|8 ++-- osdep.h |1 + oslib-posix.c | 16 qemu-common.h |5 + qemu-nbd.c |2 +- target-lm32/translate.c |2 +- ui/cocoa.m | 25 ++--- 10 files changed, 53 insertions(+), 18 deletions(-) -- 1.7.5.3
[Qemu-devel] [PATCH 09/10] cocoa: Avoid warning related to multiple handleEvent: definitions
Avoid compiler confusion as to which method signature to use for the
handleEvent: selector on OSX = 10.6 by making the variable type-safe
as opposed to generic 'id' type.
Requires moving the variable definition to after the class definition.
8
ui/cocoa.m: In function ‘cocoa_refresh’:
ui/cocoa.m:997: warning: multiple methods named ‘-handleEvent:’ found
/System/Library/Frameworks/AppKit.framework/Headers/NSTextInputContext.h:84:
warning: using ‘-(BOOL)handleEvent:(NSEvent *)theEvent’
ui/cocoa.m:272: warning: also found ‘-(void)handleEvent:(NSEvent *)event’
8---
Reported-by: Alexandre Raymond cerb...@gmail.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
Tested-by: Alexandre Raymond cerb...@gmail.com
---
ui/cocoa.m |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index 1c54759..515e684 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -63,7 +63,6 @@ typedef struct {
} QEMUScreen;
NSWindow *normalWindow;
-id cocoaView;
static DisplayChangeListener *dcl;
int gArgc;
@@ -278,6 +277,8 @@ static int cocoa_keycode_to_qemu(int keycode)
- (QEMUScreen) gscreen;
@end
+QemuCocoaView *cocoaView;
+
@implementation QemuCocoaView
- (id)initWithFrame:(NSRect)frameRect
{
--
1.7.5.3
[Qemu-devel] [PATCH 02/10] Fix compilation warning due to incorrectly specified type
From: Alexandre Raymond cerb...@gmail.com
In audio/coreaudio.c, a variable named str was assigned const char values,
which resulted in the following warnings:
-8-
audio/coreaudio.c: In function ‘coreaudio_logstatus’:
audio/coreaudio.c:59: warning: initialization discards qualifiers from pointer
target type
audio/coreaudio.c:63: warning: assignment discards qualifiers from pointer
target type
(...)
-8-
Signed-off-by: Alexandre Raymond cerb...@gmail.com
Acked-by: Stefan Weil w...@mail.berlios.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
audio/coreaudio.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/audio/coreaudio.c b/audio/coreaudio.c
index 0a26413..3bd75cd 100644
--- a/audio/coreaudio.c
+++ b/audio/coreaudio.c
@@ -56,7 +56,7 @@ typedef struct coreaudioVoiceOut {
static void coreaudio_logstatus (OSStatus status)
{
-char *str = BUG;
+const char *str = BUG;
switch(status) {
case kAudioHardwareNoError:
--
1.7.5.3
[Qemu-devel] [PATCH 06/10] Fix libfdt warnings on Darwin
Building with libfdt results in the following warnings on Mac OS X: CCppc-softmmu/device_tree.o In file included from /Users/andreas/QEMU/latest64/include/libfdt.h:54, from /Users/andreas/QEMU/qemu/device_tree.c:26: /Users/andreas/QEMU/qemu/libfdt_env.h:25:20: warning: endian.h: No such file or directory /Users/andreas/QEMU/qemu/libfdt_env.h:26:22: warning: byteswap.h: No such file or directory /Users/andreas/QEMU/qemu/libfdt_env.h:28:5: warning: __BYTE_ORDER is not defined /Users/andreas/QEMU/qemu/libfdt_env.h:28:21: warning: __BIG_ENDIAN is not defined Since QEMU's copy of libfdt_env.h only uses bswap_32() and bswap_64(), let QEMU's bswap.h take care of the headers and use its endianness define. Cc: Hollis Blanchard hol...@penguinppc.org Signed-off-by: Andreas Färber andreas.faer...@web.de Acked-by: Alexander Graf ag...@suse.de --- libfdt_env.h |8 ++-- 1 files changed, 2 insertions(+), 6 deletions(-) diff --git a/libfdt_env.h b/libfdt_env.h index ee0419f..90d7f3b 100644 --- a/libfdt_env.h +++ b/libfdt_env.h @@ -19,13 +19,9 @@ #ifndef _LIBFDT_ENV_H #define _LIBFDT_ENV_H -#include stddef.h -#include stdint.h -#include string.h -#include endian.h -#include byteswap.h +#include bswap.h -#if __BYTE_ORDER == __BIG_ENDIAN +#ifdef HOST_WORDS_BIGENDIAN #define fdt32_to_cpu(x)(x) #define cpu_to_fdt32(x)(x) #define fdt64_to_cpu(x)(x) -- 1.7.5.3
[Qemu-devel] [PATCH 08/10] cocoa: Revert dependency on VNC
In 821601ea5b02a68ada479731a4d3d07a9876632a (Make VNC support optional) cocoa.o was moved from ui-obj-$(CONFIG_COCOA) to vnc-obj-$(CONFIG_COCOA), adding a dependency on $(CONFIG_VNC). That must've been unintentional. Cc: Jes Sorensen jes.soren...@redhat.com Cc: Anthony Liguori aligu...@us.ibm.com Signed-off-by: Andreas Färber andreas.faer...@web.de --- Makefile.objs |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/Makefile.objs b/Makefile.objs index 52d8b23..509ab39 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -128,6 +128,7 @@ common-obj-y += $(addprefix audio/, $(audio-obj-y)) ui-obj-y += keymaps.o ui-obj-$(CONFIG_SDL) += sdl.o sdl_zoom.o x_keymap.o +ui-obj-$(CONFIG_COCOA) += cocoa.o ui-obj-$(CONFIG_CURSES) += curses.o vnc-obj-y += vnc.o d3des.o vnc-obj-y += vnc-enc-zlib.o vnc-enc-hextile.o @@ -135,7 +136,6 @@ vnc-obj-y += vnc-enc-tight.o vnc-palette.o vnc-obj-y += vnc-enc-zrle.o vnc-obj-$(CONFIG_VNC_TLS) += vnc-tls.o vnc-auth-vencrypt.o vnc-obj-$(CONFIG_VNC_SASL) += vnc-auth-sasl.o -vnc-obj-$(CONFIG_COCOA) += cocoa.o ifdef CONFIG_VNC_THREAD vnc-obj-y += vnc-jobs-async.o else -- 1.7.5.3
[Qemu-devel] [PATCH 03/10] Cocoa: avoid displaying window when command-line contains '-h' or '-help'
From: Alexandre Raymond cerb...@gmail.com
There was already a check in place to avoid displaying a window
in certain modes such as vnc, nographic or curses.
Add a check for '-h' and '-help' to avoid displaying a window for a split-
second before showing the usage information.
Signed-off-by: Alexandre Raymond cerb...@gmail.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
ui/cocoa.m |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index 1ff1ac6..e1312d3 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -872,7 +872,8 @@ int main (int argc, const char * argv[]) {
if (opt[1] == '-') {
opt++;
}
-if (!strcmp(opt, -vnc) ||
+if (!strcmp(opt, -h) || !strcmp(opt, -help) ||
+!strcmp(opt, -vnc) ||
!strcmp(opt, -nographic) ||
!strcmp(opt, -version) ||
!strcmp(opt, -curses)) {
--
1.7.5.3
[Qemu-devel] [PATCH 10/10] Darwin: Fix compilation warning regarding the deprecated daemon() function
From: Alexandre Raymond cerb...@gmail.com
Changes since v1: create a wrapper function named qemu_daemon() in oslib-posix.c
instead of putting the OS specific workaround in qemu-nbd.c directly.
On OSX = 10.5, daemon() is deprecated, resulting in the following warning:
8
qemu-nbd.c: In function ‘main’:
qemu-nbd.c:371: warning: ‘daemon’ is deprecated (declared at
/usr/include/stdlib.h:289)
8
The following trick, used in mDNSResponder, takes care of this warning:
http://www.opensource.apple.com/source/mDNSResponder/mDNSResponder-258.18/mDNSPosix/PosixDaemon.c
On OSX, it temporarily renames the daemon() function before including stdlib.h
and declares it manually as an extern function. This way, the compiler does not
see the declaration from stdlib.h and thus does not display the warning.
Signed-off-by: Alexandre Raymond cerb...@gmail.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
osdep.h |1 +
oslib-posix.c | 16
qemu-nbd.c|2 +-
3 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/osdep.h b/osdep.h
index 970d767..6eb9a49 100644
--- a/osdep.h
+++ b/osdep.h
@@ -88,6 +88,7 @@
# define QEMU_GNUC_PREREQ(maj, min) 0
#endif
+int qemu_daemon(int nochdir, int noclose);
void *qemu_memalign(size_t alignment, size_t size);
void *qemu_vmalloc(size_t size);
void qemu_vfree(void *ptr);
diff --git a/oslib-posix.c b/oslib-posix.c
index 7bc5f7c..3a18e86 100644
--- a/oslib-posix.c
+++ b/oslib-posix.c
@@ -26,11 +26,27 @@
* THE SOFTWARE.
*/
+/* The following block of code temporarily renames the daemon() function so the
+ compiler does not see the warning associated with it in stdlib.h on OSX */
+#ifdef __APPLE__
+#define daemon qemu_fake_daemon_function
+#include stdlib.h
+#undef daemon
+extern int daemon(int, int);
+#endif
+
#include config-host.h
#include sysemu.h
#include trace.h
#include qemu_socket.h
+
+
+int qemu_daemon(int nochdir, int noclose)
+{
+return daemon(nochdir, noclose);
+}
+
void *qemu_oom_check(void *ptr)
{
if (ptr == NULL) {
diff --git a/qemu-nbd.c b/qemu-nbd.c
index 110d78e..d91c02c 100644
--- a/qemu-nbd.c
+++ b/qemu-nbd.c
@@ -359,7 +359,7 @@ int main(int argc, char **argv)
if (!verbose) {
/* detach client and server */
-if (daemon(0, 0) == -1) {
+if (qemu_daemon(0, 0) == -1) {
err(EXIT_FAILURE, Failed to daemonize);
}
}
--
1.7.5.3
Re: [Qemu-devel] [PATCH v2] Darwin: Fix compilation warning regarding the deprecated daemon() function
Am 13.06.2011 um 22:20 schrieb Blue Swirl:
On Thu, Jun 9, 2011 at 9:47 PM, Andreas Färber
andreas.faer...@web.de wrote:
Am 07.06.2011 um 05:34 schrieb Alexandre Raymond:
Changes since v1: create a wrapper function named qemu_daemon() in
oslib-posix.c
instead of putting the OS specific workaround in qemu-nbd.c
directly.
On OSX = 10.5, daemon() is deprecated, resulting in the following
warning:
8
qemu-nbd.c: In function ‘main’:
qemu-nbd.c:371: warning: ‘daemon’ is deprecated (declared at
/usr/include/stdlib.h:289)
8
The following trick, used in mDNSResponder, takes care of this
warning:
http://www.opensource.apple.com/source/mDNSResponder/mDNSResponder-258.18/mDNSPosix/PosixDaemon.c
On OSX, it temporarily renames the daemon() function before
including
stdlib.h
and declares it manually as an extern function. This way, the
compiler
does not
see the declaration from stdlib.h and thus does not display the
warning.
Signed-off-by: Alexandre Raymond cerb...@gmail.com
Acked-by: Andreas Färber andreas.faer...@web.de
Blue, do you want this to go through the cocoa queue (please ack
then) or do
you want to apply this directly?
I have a minor style comment, but otherwise this could go via cocoa
queue.
I have two further issues on my radar, 1) Alexandre's handleEvent:
warning
and 2) the big sigfd issue, and would then send a pull request.
Andreas
diff --git a/oslib-posix.c b/oslib-posix.c
index 7bc5f7c..5392e25 100644
+int qemu_daemon(int nochdir, int noclose) {
Here the brace should be on a new line.
Fixed.
Andreas
[Qemu-devel] [PATCH 07/10] cocoa: Provide central qemu_main() prototype
This fixes a missing prototype warning in vl.c and obsoletes
the prototype in cocoa.m. Adjust callers in cocoa.m to supply
third argument, which is currently only used on Linux/ppc.
The prototype is designed so that it could be shared with SDL
and other frontends, if desired.
Cc: Alexandre Raymond cerb...@gmail.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
qemu-common.h |5 +
ui/cocoa.m|6 +++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/qemu-common.h b/qemu-common.h
index 39fabc9..109498d 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -132,6 +132,11 @@ static inline char *realpath(const char *path, char
*resolved_path)
#endif /* !defined(NEED_CPU_H) */
+/* main function, renamed */
+#if defined(CONFIG_COCOA)
+int qemu_main(int argc, char **argv, char **envp);
+#endif
+
/* bottom halves */
typedef void QEMUBHFunc(void *opaque);
diff --git a/ui/cocoa.m b/ui/cocoa.m
index e1312d3..1c54759 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -23,6 +23,7 @@
*/
#import Cocoa/Cocoa.h
+#include crt_externs.h
#include qemu-common.h
#include console.h
@@ -61,7 +62,6 @@ typedef struct {
int bitsPerPixel;
} QEMUScreen;
-int qemu_main(int argc, char **argv); // main defined in qemu/vl.c
NSWindow *normalWindow;
id cocoaView;
static DisplayChangeListener *dcl;
@@ -794,7 +794,7 @@ static int cocoa_keycode_to_qemu(int keycode)
COCOA_DEBUG(QemuCocoaAppController: startEmulationWithArgc\n);
int status;
-status = qemu_main(argc, argv);
+status = qemu_main(argc, argv, *_NSGetEnviron());
exit(status);
}
@@ -877,7 +877,7 @@ int main (int argc, const char * argv[]) {
!strcmp(opt, -nographic) ||
!strcmp(opt, -version) ||
!strcmp(opt, -curses)) {
-return qemu_main(gArgc, gArgv);
+return qemu_main(gArgc, gArgv, *_NSGetEnviron());
}
}
}
--
1.7.5.3
[Qemu-devel] [PATCH] Fix typo in cpus.c
filed - failed
Signed-off-by: Alexandre Raymond cerb...@gmail.com
---
cpus.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/cpus.c b/cpus.c
index 1fc34b7..4ab76f0 100644
--- a/cpus.c
+++ b/cpus.c
@@ -297,7 +297,7 @@ static void qemu_event_increment(void)
/* EAGAIN is fine, a read must be pending. */
if (ret 0 errno != EAGAIN) {
-fprintf(stderr, qemu_event_increment: write() filed: %s\n,
+fprintf(stderr, qemu_event_increment: write() failed: %s\n,
strerror(errno));
exit (1);
}
--
1.7.5
[Qemu-devel] [QAPI+QGA 2/3] QAPI code generation infrastructure v3
This is Set 2/3 of the QAPI+QGA patchsets. These patches apply on top of master (set1 merged), and can also be obtained from: git://repo.or.cz/qemu/mdroth.git qapi-backport-set2-v3 (Set1+2 are a backport of some of the QAPI-related work from Anthony's glib tree. The main goal is to get the basic code generation infrastructure in place so that it can be used by the guest agent to implement a QMP-like guest interface, and so that future work regarding the QMP conversion to QAPI can be decoupled from the infrastructure bits. Set3 is the Qemu Guest Agent (virtagent), rebased on the new code QAPI code generation infrastructure. This is the first user of QAPI, QMP will follow.) ___ This patchset introduces the following: - Hard dependency on GLib. This has been floating around the list for a while. Currently the only users are the unit tests for this patchset and the guest agent. We can make both of these a configure option, but based on previous discussions a hard dependency will likely be introduced with subsequent QAPI patches. - A couple additional qlist utility functions used by QAPI. - QAPI schema-based code generation for synchronous QMP/QGA commands and types, and Visitor/dispatch infrastructure to handle marshaling/unmarshaling/dispatch between QAPI and the QMP/QGA wire protocols. - Documentation and unit tests for visitor functions and synchronous command/type generation. CHANGES SINCE V2: - Added cleanup functions for input/output visitor types and fixed a leak in dispatch path. - Corrected spelling from visiter-visitor and updated filenames accordingly. - Re-organized patches so that each new C file can be built as part of the introducting commit (for instances where there were no users of the qapi-obj-y target yet a test build was done by adding the target as a superficial dependency on other tools), and moved code generator patches after the required dependencies. - Made qlist_first/qlist_next accept/return const types. - Moved Visitor interface inline wrapper functions to real ones. - Fixed error-reporting for invalid parameters when parameter name is null. - Removed hard-coded size for QAPI-type allocations done by the input visitor, using generated code to pass in a sizeof() now. - Replaced assert()'s on visitor stack overruns, replaced with an error indication. - Fixed build issue when using a separate build directory. - Added missing copyright headers for scripts, moved external code in ordereddict.py to a seperate patch. - Many thanks to Luiz, Anthony, and everyone else for the excellent review/testing. CHANGES SINCE V1: - Fixed build issue that was missed due to deprecated files being present in source tree. Thanks to Matsuda Daiki for sending fixes. - Fixed grammatical errors in documentation pointed out by Luiz. - Added generated code to the make clean target. CHANGES SINCE V0 (QAPI Infrastructure Round 1): - Fixed known memory leaks in generated code - Stricter error-handling in generated code - Removed currently unused code (generators for events and async/proxied QMP/QGA commands and definition used by the not-yet-introduced QMP server replacement) - Added documentation for code generation scripts/schemas/usage - Addressed review comments from Luiz and Stefan Makefile| 24 +++- Makefile.objs |9 + Makefile.target |1 + configure | 14 ++ docs/qapi-code-gen.txt | 316 ++ module.h|2 + qapi-schema-test.json | 22 +++ qapi/qapi-dealloc-visitor.c | 127 +++ qapi/qapi-dealloc-visitor.h | 26 +++ qapi/qapi-types-core.h | 21 +++ qapi/qapi-visit-core.c | 101 qapi/qapi-visit-core.h | 68 qapi/qmp-core.h | 41 + qapi/qmp-dispatch.c | 76 + qapi/qmp-input-visitor.c| 251 ++ qapi/qmp-input-visitor.h| 27 qapi/qmp-output-visitor.c | 199 qapi/qmp-output-visitor.h | 28 qapi/qmp-registry.c | 26 +++ qerror.h|3 + qlist.h | 11 ++ scripts/ordereddict.py | 128 scripts/qapi-commands.py| 355 +++ scripts/qapi-types.py | 230 scripts/qapi-visit.py | 235 scripts/qapi.py | 203 test-qmp-commands.c | 113 ++ test-visitor.c | 305 + 28 files changed, 2961 insertions(+), 1 deletions(-)
[Qemu-devel] [PATCH v3 02/21] qlist: add qlist_first()/qlist_next()
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
qlist.h | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/qlist.h b/qlist.h
index dbe7b92..d426bd4 100644
--- a/qlist.h
+++ b/qlist.h
@@ -16,6 +16,7 @@
#include qobject.h
#include qemu-queue.h
#include qemu-common.h
+#include qemu-queue.h
typedef struct QListEntry {
QObject *value;
@@ -50,4 +51,14 @@ QObject *qlist_peek(QList *qlist);
int qlist_empty(const QList *qlist);
QList *qobject_to_qlist(const QObject *obj);
+static inline const QListEntry *qlist_first(const QList *qlist)
+{
+return QTAILQ_FIRST(qlist-head);
+}
+
+static inline const QListEntry *qlist_next(const QListEntry *entry)
+{
+return QTAILQ_NEXT(entry, next);
+}
+
#endif /* QLIST_H */
--
1.7.0.4
[Qemu-devel] [PATCH v3 01/21] Add hard build dependency on glib
From: Anthony Liguori aligu...@us.ibm.com GLib is an extremely common library that has a portable thread implementation along with tons of other goodies. GLib and GObject have a fantastic amount of infrastructure we can leverage in QEMU including an object oriented programming infrastructure. Short term, it has a very nice thread pool implementation that we could leverage in something like virtio-9p. It also has a test harness implementation that this series will use. Signed-off-by: Anthony Liguori aligu...@us.ibm.com Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com --- Makefile|2 ++ Makefile.objs |2 ++ Makefile.target |1 + configure | 13 + 4 files changed, 18 insertions(+), 0 deletions(-) diff --git a/Makefile b/Makefile index 096480b..306cd9b 100644 --- a/Makefile +++ b/Makefile @@ -106,6 +106,8 @@ audio/audio.o audio/fmodaudio.o: QEMU_CFLAGS += $(FMOD_CFLAGS) QEMU_CFLAGS+=$(CURL_CFLAGS) +QEMU_CFLAGS+=$(GLIB_CFLAGS) + ui/cocoa.o: ui/cocoa.m ui/sdl.o audio/sdlaudio.o ui/sdl_zoom.o baum.o: QEMU_CFLAGS += $(SDL_CFLAGS) diff --git a/Makefile.objs b/Makefile.objs index 52d8b23..a7807e8 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -368,3 +368,5 @@ vl.o: QEMU_CFLAGS+=$(GPROF_CFLAGS) vl.o: QEMU_CFLAGS+=$(SDL_CFLAGS) +vl.o: QEMU_CFLAGS+=$(GLIB_CFLAGS) + diff --git a/Makefile.target b/Makefile.target index b1a0f6d..0d900e2 100644 --- a/Makefile.target +++ b/Makefile.target @@ -202,6 +202,7 @@ QEMU_CFLAGS += $(VNC_TLS_CFLAGS) QEMU_CFLAGS += $(VNC_SASL_CFLAGS) QEMU_CFLAGS += $(VNC_JPEG_CFLAGS) QEMU_CFLAGS += $(VNC_PNG_CFLAGS) +QEMU_CFLAGS += $(GLIB_CFLAGS) # xen backend driver support obj-i386-$(CONFIG_XEN) += xen_machine_pv.o xen_domainbuild.o diff --git a/configure b/configure index c931ae8..d3a3a96 100755 --- a/configure +++ b/configure @@ -1767,6 +1767,18 @@ EOF fi ## +# glib support probe +if $pkg_config --modversion gthread-2.0 gio-2.0 /dev/null 21 ; then +glib_cflags=`$pkg_config --cflags gthread-2.0 gio-2.0 2/dev/null` +glib_libs=`$pkg_config --libs gthread-2.0 gio-2.0 2/dev/null` +libs_softmmu=$glib_libs $libs_softmmu +libs_tools=$glib_libs $libs_tools +else +echo glib-2.0 required to compile QEMU +exit 1 +fi + +## # kvm probe if test $kvm != no ; then cat $TMPC EOF @@ -2923,6 +2935,7 @@ if test $bluez = yes ; then echo CONFIG_BLUEZ=y $config_host_mak echo BLUEZ_CFLAGS=$bluez_cflags $config_host_mak fi +echo GLIB_CFLAGS=$glib_cflags $config_host_mak if test $xen = yes ; then echo CONFIG_XEN=y $config_host_mak echo CONFIG_XEN_CTRL_INTERFACE_VERSION=$xen_ctrl_version $config_host_mak -- 1.7.0.4
[Qemu-devel] [PATCH v3 06/21] qapi: add QMP output visitor
Type of Visiter class that serves as the inverse of the input visitor:
it takes a series of native C types and uses their values to construct a
corresponding QObject. The command marshaling/dispatcher functions will
use this to convert the output of QMP functions into a QObject that can
be sent over the wire.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
Makefile.objs |2 +-
qapi/qmp-output-visitor.c | 199 +
qapi/qmp-output-visitor.h | 28 +++
3 files changed, 228 insertions(+), 1 deletions(-)
create mode 100644 qapi/qmp-output-visitor.c
create mode 100644 qapi/qmp-output-visitor.h
diff --git a/Makefile.objs b/Makefile.objs
index 2eb90b8..af302ea 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -367,7 +367,7 @@ libcacard-y = cac.o event.o vcard.o vreader.o
vcard_emul_nss.o vcard_emul_type.o
##
# qapi
-qapi-nested-y = qapi-visit-core.o qmp-input-visitor.o
+qapi-nested-y = qapi-visit-core.o qmp-input-visitor.o qmp-output-visitor.o
qapi-obj-y = $(addprefix qapi/, $(qapi-nested-y))
vl.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
diff --git a/qapi/qmp-output-visitor.c b/qapi/qmp-output-visitor.c
new file mode 100644
index 000..30c8c6f
--- /dev/null
+++ b/qapi/qmp-output-visitor.c
@@ -0,0 +1,199 @@
+#include qmp-output-visitor.h
+#include qemu-queue.h
+#include qemu-common.h
+#include qemu-objects.h
+
+typedef struct QStackEntry
+{
+QObject *value;
+QTAILQ_ENTRY(QStackEntry) node;
+} QStackEntry;
+
+typedef QTAILQ_HEAD(QStack, QStackEntry) QStack;
+
+struct QmpOutputVisitor
+{
+Visitor visitor;
+QStack stack;
+};
+
+#define qmp_output_add(qov, name, value) qmp_output_add_obj(qov, name,
QOBJECT(value))
+#define qmp_output_push(qov, value) qmp_output_push_obj(qov, QOBJECT(value))
+
+static QmpOutputVisitor *to_qov(Visitor *v)
+{
+return container_of(v, QmpOutputVisitor, visitor);
+}
+
+static void qmp_output_push_obj(QmpOutputVisitor *qov, QObject *value)
+{
+QStackEntry *e = qemu_mallocz(sizeof(*e));
+
+e-value = value;
+QTAILQ_INSERT_HEAD(qov-stack, e, node);
+}
+
+static QObject *qmp_output_pop(QmpOutputVisitor *qov)
+{
+QStackEntry *e = QTAILQ_FIRST(qov-stack);
+QObject *value;
+QTAILQ_REMOVE(qov-stack, e, node);
+value = e-value;
+qemu_free(e);
+return value;
+}
+
+static QObject *qmp_output_first(QmpOutputVisitor *qov)
+{
+QStackEntry *e = QTAILQ_LAST(qov-stack, QStack);
+return e-value;
+}
+
+static QObject *qmp_output_last(QmpOutputVisitor *qov)
+{
+QStackEntry *e = QTAILQ_FIRST(qov-stack);
+return e-value;
+}
+
+static void qmp_output_add_obj(QmpOutputVisitor *qov, const char *name,
QObject *value)
+{
+QObject *cur;
+
+if (QTAILQ_EMPTY(qov-stack)) {
+qmp_output_push_obj(qov, value);
+return;
+}
+
+cur = qmp_output_last(qov);
+
+switch (qobject_type(cur)) {
+case QTYPE_QDICT:
+qdict_put_obj(qobject_to_qdict(cur), name, value);
+break;
+case QTYPE_QLIST:
+qlist_append_obj(qobject_to_qlist(cur), value);
+break;
+default:
+qobject_decref(qmp_output_pop(qov));
+qmp_output_push_obj(qov, value);
+break;
+}
+}
+
+static void qmp_output_start_struct(Visitor *v, void **obj, const char *kind,
const char *name, size_t unused, Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+QDict *dict = qdict_new();
+
+qmp_output_add(qov, name, dict);
+qmp_output_push(qov, dict);
+}
+
+static void qmp_output_end_struct(Visitor *v, Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+qmp_output_pop(qov);
+}
+
+static void qmp_output_start_list(Visitor *v, const char *name, Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+QList *list = qlist_new();
+
+qmp_output_add(qov, name, list);
+qmp_output_push(qov, list);
+}
+
+static GenericList *qmp_output_next_list(Visitor *v, GenericList **list, Error
**errp)
+{
+GenericList *retval = *list;
+*list = retval-next;
+return retval;
+}
+
+static void qmp_output_end_list(Visitor *v, Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+qmp_output_pop(qov);
+}
+
+static void qmp_output_type_int(Visitor *v, int64_t *obj, const char *name,
Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+qmp_output_add(qov, name, qint_from_int(*obj));
+}
+
+static void qmp_output_type_bool(Visitor *v, bool *obj, const char *name,
Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+qmp_output_add(qov, name, qbool_from_int(*obj));
+}
+
+static void qmp_output_type_str(Visitor *v, char **obj, const char *name,
Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+qmp_output_add(qov, name, qstring_from_str(*obj));
+}
+
+static void qmp_output_type_number(Visitor *v, double *obj, const char *name,
Error **errp)
+{
+QmpOutputVisitor *qov = to_qov(v);
+qmp_output_add(qov, name,
[Qemu-devel] [PATCH v3 07/21] qapi: add QAPI dealloc visitor
Type of Visitor class that can be passed into a qapi-generated C
type's visitor function to free() any heap-allocated data types.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
Makefile.objs |2 +-
qapi/qapi-dealloc-visitor.c | 127 +++
qapi/qapi-dealloc-visitor.h | 26 +
3 files changed, 154 insertions(+), 1 deletions(-)
create mode 100644 qapi/qapi-dealloc-visitor.c
create mode 100644 qapi/qapi-dealloc-visitor.h
diff --git a/Makefile.objs b/Makefile.objs
index af302ea..3860252 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -367,7 +367,7 @@ libcacard-y = cac.o event.o vcard.o vreader.o
vcard_emul_nss.o vcard_emul_type.o
##
# qapi
-qapi-nested-y = qapi-visit-core.o qmp-input-visitor.o qmp-output-visitor.o
+qapi-nested-y = qapi-visit-core.o qmp-input-visitor.o qmp-output-visitor.o
qapi-dealloc-visitor.o
qapi-obj-y = $(addprefix qapi/, $(qapi-nested-y))
vl.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
diff --git a/qapi/qapi-dealloc-visitor.c b/qapi/qapi-dealloc-visitor.c
new file mode 100644
index 000..1fabfe6
--- /dev/null
+++ b/qapi/qapi-dealloc-visitor.c
@@ -0,0 +1,127 @@
+#include qapi-dealloc-visitor.h
+#include qemu-queue.h
+#include qemu-common.h
+#include qemu-objects.h
+
+typedef struct StackEntry
+{
+void *value;
+QTAILQ_ENTRY(StackEntry) node;
+} StackEntry;
+
+struct QapiDeallocVisitor
+{
+Visitor visitor;
+QTAILQ_HEAD(, StackEntry) stack;
+};
+
+static QapiDeallocVisitor *to_qov(Visitor *v)
+{
+return container_of(v, QapiDeallocVisitor, visitor);
+}
+
+static void qapi_dealloc_push(QapiDeallocVisitor *qov, void *value)
+{
+StackEntry *e = qemu_mallocz(sizeof(*e));
+
+e-value = value;
+QTAILQ_INSERT_HEAD(qov-stack, e, node);
+}
+
+static void *qapi_dealloc_pop(QapiDeallocVisitor *qov)
+{
+StackEntry *e = QTAILQ_FIRST(qov-stack);
+QObject *value;
+QTAILQ_REMOVE(qov-stack, e, node);
+value = e-value;
+qemu_free(e);
+return value;
+}
+
+static void qapi_dealloc_start_struct(Visitor *v, void **obj, const char
*kind, const char *name, size_t unused, Error **errp)
+{
+QapiDeallocVisitor *qov = to_qov(v);
+qapi_dealloc_push(qov, obj);
+}
+
+static void qapi_dealloc_end_struct(Visitor *v, Error **errp)
+{
+QapiDeallocVisitor *qov = to_qov(v);
+void **obj = qapi_dealloc_pop(qov);
+if (obj *obj) {
+qemu_free(*obj);
+}
+}
+
+static void qapi_dealloc_start_list(Visitor *v, const char *name, Error **errp)
+{
+}
+
+static GenericList *qapi_dealloc_next_list(Visitor *v, GenericList **list,
Error **errp)
+{
+GenericList *retval = *list;
+if (retval-value) {
+qemu_free(retval-value);
+}
+*list = retval-next;
+return retval;
+}
+
+static void qapi_dealloc_end_list(Visitor *v, Error **errp)
+{
+}
+
+static void qapi_dealloc_type_str(Visitor *v, char **obj, const char *name,
Error **errp)
+{
+if (obj *obj) {
+qemu_free(*obj);
+}
+}
+
+static void qapi_dealloc_type_int(Visitor *v, int64_t *obj, const char *name,
Error **errp)
+{
+}
+
+static void qapi_dealloc_type_bool(Visitor *v, bool *obj, const char *name,
Error **errp)
+{
+}
+
+static void qapi_dealloc_type_number(Visitor *v, double *obj, const char
*name, Error **errp)
+{
+}
+
+static void qapi_dealloc_type_enum(Visitor *v, int *obj, const char *kind,
const char *name, Error **errp)
+{
+}
+
+Visitor *qapi_dealloc_get_visitor(QapiDeallocVisitor *v)
+{
+return v-visitor;
+}
+
+void qapi_dealloc_visitor_cleanup(QapiDeallocVisitor *v)
+{
+qemu_free(v);
+}
+
+QapiDeallocVisitor *qapi_dealloc_visitor_new(void)
+{
+QapiDeallocVisitor *v;
+
+v = qemu_mallocz(sizeof(*v));
+
+v-visitor.start_struct = qapi_dealloc_start_struct;
+v-visitor.end_struct = qapi_dealloc_end_struct;
+v-visitor.start_list = qapi_dealloc_start_list;
+v-visitor.next_list = qapi_dealloc_next_list;
+v-visitor.end_list = qapi_dealloc_end_list;
+v-visitor.type_enum = qapi_dealloc_type_enum;
+v-visitor.type_int = qapi_dealloc_type_int;
+v-visitor.type_bool = qapi_dealloc_type_bool;
+v-visitor.type_str = qapi_dealloc_type_str;
+v-visitor.type_number = qapi_dealloc_type_number;
+
+QTAILQ_INIT(v-stack);
+
+return v;
+}
diff --git a/qapi/qapi-dealloc-visitor.h b/qapi/qapi-dealloc-visitor.h
new file mode 100644
index 000..5842bc7
--- /dev/null
+++ b/qapi/qapi-dealloc-visitor.h
@@ -0,0 +1,26 @@
+/*
+ * Dealloc Visitor
+ *
+ * Copyright IBM, Corp. 2011
+ *
+ * Authors:
+ * Michael Roth mdr...@linux.vnet.ibm.com
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+
+#ifndef QAPI_DEALLOC_VISITOR_H
+#define QAPI_DEALLOC_VISITOR_H
+
+#include qapi-visit-core.h
+
+typedef struct QapiDeallocVisitor QapiDeallocVisitor;
+
+QapiDeallocVisitor
[Qemu-devel] [PATCH v3 04/21] qapi: add QAPI visitor core
Base definitions/includes for Visiter interface used by generated
visiter/marshalling code.
Includes a GenericList type. Our lists require an embedded element.
Since these types are generated, if you want to use them in a different
type of data structure, there's no easy way to add another embedded
element. The solution is to have non-embedded lists and that what this is.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
Makefile.objs |6 +++
qapi/qapi-types-core.h | 21 ++
qapi/qapi-visit-core.c | 101
qapi/qapi-visit-core.h | 68
4 files changed, 196 insertions(+), 0 deletions(-)
create mode 100644 qapi/qapi-types-core.h
create mode 100644 qapi/qapi-visit-core.c
create mode 100644 qapi/qapi-visit-core.h
diff --git a/Makefile.objs b/Makefile.objs
index a7807e8..68d7b5a 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -364,6 +364,12 @@ endif
libcacard-y = cac.o event.o vcard.o vreader.o vcard_emul_nss.o
vcard_emul_type.o card_7816.o
+##
+# qapi
+
+qapi-nested-y = qapi-visit-core.o
+qapi-obj-y = $(addprefix qapi/, $(qapi-nested-y))
+
vl.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
vl.o: QEMU_CFLAGS+=$(SDL_CFLAGS)
diff --git a/qapi/qapi-types-core.h b/qapi/qapi-types-core.h
new file mode 100644
index 000..de733ab
--- /dev/null
+++ b/qapi/qapi-types-core.h
@@ -0,0 +1,21 @@
+/*
+ * Core Definitions for QAPI-generated Types
+ *
+ * Copyright IBM, Corp. 2011
+ *
+ * Authors:
+ * Anthony Liguori aligu...@us.ibm.com
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+
+#ifndef QAPI_TYPES_CORE_H
+#define QAPI_TYPES_CORE_H
+
+#include stdbool.h
+#include stdint.h
+#include error.h
+
+#endif
diff --git a/qapi/qapi-visit-core.c b/qapi/qapi-visit-core.c
new file mode 100644
index 000..948818e
--- /dev/null
+++ b/qapi/qapi-visit-core.c
@@ -0,0 +1,101 @@
+#include qapi/qapi-visit-core.h
+
+void visit_start_handle(Visitor *v, void **obj, const char *kind, const char
*name, Error **errp)
+{
+if (!error_is_set(errp) v-start_handle) {
+v-start_handle(v, obj, kind, name, errp);
+}
+}
+
+void visit_end_handle(Visitor *v, Error **errp)
+{
+if (!error_is_set(errp) v-end_handle) {
+v-end_handle(v, errp);
+}
+}
+
+void visit_start_struct(Visitor *v, void **obj, const char *kind, const char
*name, size_t size, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-start_struct(v, obj, kind, name, size, errp);
+}
+}
+
+void visit_end_struct(Visitor *v, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-end_struct(v, errp);
+}
+}
+
+void visit_start_list(Visitor *v, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-start_list(v, name, errp);
+}
+}
+
+GenericList *visit_next_list(Visitor *v, GenericList **list, Error **errp)
+{
+if (!error_is_set(errp)) {
+return v-next_list(v, list, errp);
+}
+
+return 0;
+}
+
+void visit_end_list(Visitor *v, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-end_list(v, errp);
+}
+}
+
+void visit_start_optional(Visitor *v, bool *present, const char *name, Error
**errp)
+{
+if (!error_is_set(errp) v-start_optional) {
+v-start_optional(v, present, name, errp);
+}
+}
+
+void visit_end_optional(Visitor *v, Error **errp)
+{
+if (!error_is_set(errp) v-end_optional) {
+v-end_optional(v, errp);
+}
+}
+
+void visit_type_enum(Visitor *v, int *obj, const char *kind, const char *name,
Error **errp)
+{
+if (!error_is_set(errp)) {
+v-type_enum(v, obj, kind, name, errp);
+}
+}
+
+void visit_type_int(Visitor *v, int64_t *obj, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-type_int(v, obj, name, errp);
+}
+}
+
+void visit_type_bool(Visitor *v, bool *obj, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-type_bool(v, obj, name, errp);
+}
+}
+
+void visit_type_str(Visitor *v, char **obj, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-type_str(v, obj, name, errp);
+}
+}
+
+void visit_type_number(Visitor *v, double *obj, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+v-type_number(v, obj, name, errp);
+}
+}
diff --git a/qapi/qapi-visit-core.h b/qapi/qapi-visit-core.h
new file mode 100644
index 000..8350a6d
--- /dev/null
+++ b/qapi/qapi-visit-core.h
@@ -0,0 +1,68 @@
+/*
+ * Core Definitions for QAPI Visitor Classes
+ *
+ * Copyright IBM, Corp. 2011
+ *
+ * Authors:
+ * Anthony Liguori aligu...@us.ibm.com
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+#ifndef QAPI_VISITOR_CORE_H
+#define QAPI_VISITOR_CORE_H
+
[Qemu-devel] [PATCH v3 03/21] qapi: add module init types for qapi
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
module.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/module.h b/module.h
index 9263f1c..ef66730 100644
--- a/module.h
+++ b/module.h
@@ -24,12 +24,14 @@ typedef enum {
MODULE_INIT_BLOCK,
MODULE_INIT_DEVICE,
MODULE_INIT_MACHINE,
+MODULE_INIT_QAPI,
MODULE_INIT_MAX
} module_init_type;
#define block_init(function) module_init(function, MODULE_INIT_BLOCK)
#define device_init(function) module_init(function, MODULE_INIT_DEVICE)
#define machine_init(function) module_init(function, MODULE_INIT_MACHINE)
+#define qapi_init(function) module_init(function, MODULE_INIT_QAPI)
void register_module_init(void (*fn)(void), module_init_type type);
--
1.7.0.4
[Qemu-devel] [PATCH v3 08/21] qapi: add QMP command registration/lookup functions
Registration/lookup functions for that provide a lookup table for
dispatching QMP commands.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
Makefile.objs |1 +
qapi/qmp-core.h | 40
qapi/qmp-registry.c | 26 ++
3 files changed, 67 insertions(+), 0 deletions(-)
create mode 100644 qapi/qmp-core.h
create mode 100644 qapi/qmp-registry.c
diff --git a/Makefile.objs b/Makefile.objs
index 3860252..092f314 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -368,6 +368,7 @@ libcacard-y = cac.o event.o vcard.o vreader.o
vcard_emul_nss.o vcard_emul_type.o
# qapi
qapi-nested-y = qapi-visit-core.o qmp-input-visitor.o qmp-output-visitor.o
qapi-dealloc-visitor.o
+qapi-nested-y += qmp-registry.o
qapi-obj-y = $(addprefix qapi/, $(qapi-nested-y))
vl.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
diff --git a/qapi/qmp-core.h b/qapi/qmp-core.h
new file mode 100644
index 000..99e929f
--- /dev/null
+++ b/qapi/qmp-core.h
@@ -0,0 +1,40 @@
+/*
+ * Core Definitions for QAPI/QMP Dispatch
+ *
+ * Copyright IBM, Corp. 2011
+ *
+ * Authors:
+ * Anthony Liguori aligu...@us.ibm.com
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+
+#ifndef QMP_CORE_H
+#define QMP_CORE_H
+
+#include qobject.h
+#include qdict.h
+#include error.h
+
+typedef void (QmpCommandFunc)(QDict *, QObject **, Error **);
+
+typedef enum QmpCommandType
+{
+QCT_NORMAL,
+} QmpCommandType;
+
+typedef struct QmpCommand
+{
+const char *name;
+QmpCommandType type;
+QmpCommandFunc *fn;
+QTAILQ_ENTRY(QmpCommand) node;
+} QmpCommand;
+
+void qmp_register_command(const char *name, QmpCommandFunc *fn);
+QmpCommand *qmp_find_command(const char *name);
+
+#endif
+
diff --git a/qapi/qmp-registry.c b/qapi/qmp-registry.c
new file mode 100644
index 000..d3ff8b3
--- /dev/null
+++ b/qapi/qmp-registry.c
@@ -0,0 +1,26 @@
+#include qapi/qmp-core.h
+
+static QTAILQ_HEAD(, QmpCommand) qmp_commands =
+QTAILQ_HEAD_INITIALIZER(qmp_commands);
+
+void qmp_register_command(const char *name, QmpCommandFunc *fn)
+{
+QmpCommand *cmd = qemu_mallocz(sizeof(*cmd));
+
+cmd-name = name;
+cmd-type = QCT_NORMAL;
+cmd-fn = fn;
+QTAILQ_INSERT_TAIL(qmp_commands, cmd, node);
+}
+
+QmpCommand *qmp_find_command(const char *name)
+{
+QmpCommand *i;
+
+QTAILQ_FOREACH(i, qmp_commands, node) {
+if (strcmp(i-name, name) == 0) {
+return i;
+}
+}
+return NULL;
+}
--
1.7.0.4
[Qemu-devel] [PATCH v3 10/21] qapi: add ordereddict.py helper library
We need this to parse dictionaries with schema ordering intact so that C
prototypes can be generated deterministically.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
scripts/ordereddict.py | 128
1 files changed, 128 insertions(+), 0 deletions(-)
create mode 100644 scripts/ordereddict.py
diff --git a/scripts/ordereddict.py b/scripts/ordereddict.py
new file mode 100644
index 000..e17269f
--- /dev/null
+++ b/scripts/ordereddict.py
@@ -0,0 +1,128 @@
+# Copyright (c) 2009 Raymond Hettinger
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation files
+# (the Software), to deal in the Software without restriction,
+# including without limitation the rights to use, copy, modify, merge,
+# publish, distribute, sublicense, and/or sell copies of the Software,
+# and to permit persons to whom the Software is furnished to do so,
+# subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+# OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+# OTHER DEALINGS IN THE SOFTWARE.
+
+from UserDict import DictMixin
+
+class OrderedDict(dict, DictMixin):
+
+def __init__(self, *args, **kwds):
+if len(args) 1:
+raise TypeError('expected at most 1 arguments, got %d' % len(args))
+try:
+self.__end
+except AttributeError:
+self.clear()
+self.update(*args, **kwds)
+
+def clear(self):
+self.__end = end = []
+end += [None, end, end] # sentinel node for doubly linked list
+self.__map = {} # key -- [key, prev, next]
+dict.clear(self)
+
+def __setitem__(self, key, value):
+if key not in self:
+end = self.__end
+curr = end[1]
+curr[2] = end[1] = self.__map[key] = [key, curr, end]
+dict.__setitem__(self, key, value)
+
+def __delitem__(self, key):
+dict.__delitem__(self, key)
+key, prev, next = self.__map.pop(key)
+prev[2] = next
+next[1] = prev
+
+def __iter__(self):
+end = self.__end
+curr = end[2]
+while curr is not end:
+yield curr[0]
+curr = curr[2]
+
+def __reversed__(self):
+end = self.__end
+curr = end[1]
+while curr is not end:
+yield curr[0]
+curr = curr[1]
+
+def popitem(self, last=True):
+if not self:
+raise KeyError('dictionary is empty')
+if last:
+key = reversed(self).next()
+else:
+key = iter(self).next()
+value = self.pop(key)
+return key, value
+
+def __reduce__(self):
+items = [[k, self[k]] for k in self]
+tmp = self.__map, self.__end
+del self.__map, self.__end
+inst_dict = vars(self).copy()
+self.__map, self.__end = tmp
+if inst_dict:
+return (self.__class__, (items,), inst_dict)
+return self.__class__, (items,)
+
+def keys(self):
+return list(self)
+
+setdefault = DictMixin.setdefault
+update = DictMixin.update
+pop = DictMixin.pop
+values = DictMixin.values
+items = DictMixin.items
+iterkeys = DictMixin.iterkeys
+itervalues = DictMixin.itervalues
+iteritems = DictMixin.iteritems
+
+def __repr__(self):
+if not self:
+return '%s()' % (self.__class__.__name__,)
+return '%s(%r)' % (self.__class__.__name__, self.items())
+
+def copy(self):
+return self.__class__(self)
+
+@classmethod
+def fromkeys(cls, iterable, value=None):
+d = cls()
+for key in iterable:
+d[key] = value
+return d
+
+def __eq__(self, other):
+if isinstance(other, OrderedDict):
+if len(self) != len(other):
+return False
+for p, q in zip(self.items(), other.items()):
+if p != q:
+return False
+return True
+return dict.__eq__(self, other)
+
+def __ne__(self, other):
+return not self == other
+
--
1.7.0.4
[Qemu-devel] [PATCH v3 05/21] qapi: add QMP input visitor
A type of Visiter class that is used to walk a qobject's
structure and assign each entry to the corresponding native C type.
Command marshaling function will use this to pull out QMP command
parameters recieved over the wire and pass them as native arguments
to the corresponding C functions.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
Makefile.objs|2 +-
qapi/qmp-input-visitor.c | 251 ++
qapi/qmp-input-visitor.h | 27 +
qerror.h |3 +
4 files changed, 282 insertions(+), 1 deletions(-)
create mode 100644 qapi/qmp-input-visitor.c
create mode 100644 qapi/qmp-input-visitor.h
diff --git a/Makefile.objs b/Makefile.objs
index 68d7b5a..2eb90b8 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -367,7 +367,7 @@ libcacard-y = cac.o event.o vcard.o vreader.o
vcard_emul_nss.o vcard_emul_type.o
##
# qapi
-qapi-nested-y = qapi-visit-core.o
+qapi-nested-y = qapi-visit-core.o qmp-input-visitor.o
qapi-obj-y = $(addprefix qapi/, $(qapi-nested-y))
vl.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
diff --git a/qapi/qmp-input-visitor.c b/qapi/qmp-input-visitor.c
new file mode 100644
index 000..9344d37
--- /dev/null
+++ b/qapi/qmp-input-visitor.c
@@ -0,0 +1,251 @@
+#include qmp-input-visitor.h
+#include qemu-queue.h
+#include qemu-common.h
+#include qemu-objects.h
+#include qerror.h
+
+#define QIV_STACK_SIZE 1024
+
+typedef struct StackObject
+{
+QObject *obj;
+const QListEntry *entry;
+} StackObject;
+
+struct QmpInputVisitor
+{
+Visitor visitor;
+QObject *obj;
+StackObject stack[QIV_STACK_SIZE];
+int nb_stack;
+};
+
+static QmpInputVisitor *to_qiv(Visitor *v)
+{
+return container_of(v, QmpInputVisitor, visitor);
+}
+
+static QObject *qmp_input_get_object(QmpInputVisitor *qiv, const char *name)
+{
+QObject *qobj;
+
+if (qiv-nb_stack == 0) {
+qobj = qiv-obj;
+} else {
+qobj = qiv-stack[qiv-nb_stack - 1].obj;
+}
+
+if (name qobject_type(qobj) == QTYPE_QDICT) {
+return qdict_get(qobject_to_qdict(qobj), name);
+} else if (qiv-nb_stack 0 qobject_type(qobj) == QTYPE_QLIST) {
+return qlist_entry_obj(qiv-stack[qiv-nb_stack - 1].entry);
+}
+
+return qobj;
+}
+
+static void qmp_input_push(QmpInputVisitor *qiv, QObject *obj, Error **errp)
+{
+qiv-stack[qiv-nb_stack].obj = obj;
+if (qobject_type(obj) == QTYPE_QLIST) {
+qiv-stack[qiv-nb_stack].entry = qlist_first(qobject_to_qlist(obj));
+}
+qiv-nb_stack++;
+
+if (qiv-nb_stack = QIV_STACK_SIZE) {
+error_set(errp, QERR_QAPI_VISITOR_STACK_OVERRUN);
+return;
+}
+}
+
+static void qmp_input_pop(QmpInputVisitor *qiv, Error **errp)
+{
+qiv-nb_stack--;
+if (qiv-nb_stack 0) {
+error_set(errp, QERR_QAPI_VISITOR_STACK_OVERRUN);
+return;
+}
+}
+
+static void qmp_input_start_struct(Visitor *v, void **obj, const char *kind,
const char *name, size_t size, Error **errp)
+{
+QmpInputVisitor *qiv = to_qiv(v);
+QObject *qobj = qmp_input_get_object(qiv, name);
+
+if (!qobj || qobject_type(qobj) != QTYPE_QDICT) {
+error_set(errp, QERR_INVALID_PARAMETER_TYPE, name ? name : null,
QDict);
+return;
+}
+
+qmp_input_push(qiv, qobj, errp);
+if (error_is_set(errp)) {
+return;
+}
+
+if (obj) {
+*obj = qemu_mallocz(size);
+}
+}
+
+static void qmp_input_end_struct(Visitor *v, Error **errp)
+{
+QmpInputVisitor *qiv = to_qiv(v);
+
+qmp_input_pop(qiv, errp);
+}
+
+static void qmp_input_start_list(Visitor *v, const char *name, Error **errp)
+{
+QmpInputVisitor *qiv = to_qiv(v);
+QObject *qobj = qmp_input_get_object(qiv, name);
+
+if (!qobj || qobject_type(qobj) != QTYPE_QLIST) {
+error_set(errp, QERR_INVALID_PARAMETER_TYPE, name ? name : null,
list);
+return;
+}
+
+qmp_input_push(qiv, qobj, errp);
+}
+
+static GenericList *qmp_input_next_list(Visitor *v, GenericList **list, Error
**errp)
+{
+QmpInputVisitor *qiv = to_qiv(v);
+GenericList *entry;
+StackObject *so = qiv-stack[qiv-nb_stack - 1];
+
+if (so-entry == NULL) {
+return NULL;
+}
+
+entry = qemu_mallocz(sizeof(*entry));
+if (*list) {
+so-entry = qlist_next(so-entry);
+if (so-entry == NULL) {
+qemu_free(entry);
+return NULL;
+}
+(*list)-next = entry;
+}
+*list = entry;
+
+
+return entry;
+}
+
+static void qmp_input_end_list(Visitor *v, Error **errp)
+{
+QmpInputVisitor *qiv = to_qiv(v);
+
+qmp_input_pop(qiv, errp);
+}
+
+static void qmp_input_type_int(Visitor *v, int64_t *obj, const char *name,
Error **errp)
+{
+QmpInputVisitor *qiv = to_qiv(v);
+QObject *qobj = qmp_input_get_object(qiv, name);
+
+if (!qobj || qobject_type(qobj) != QTYPE_QINT) {
+error_set(errp,
[Qemu-devel] [PATCH v3 19/21] qapi: add test-qmp-commands, tests for gen. marshalling/dispatch code
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
test-qmp-commands.c | 113 +++
1 files changed, 113 insertions(+), 0 deletions(-)
create mode 100644 test-qmp-commands.c
diff --git a/test-qmp-commands.c b/test-qmp-commands.c
new file mode 100644
index 000..7752904
--- /dev/null
+++ b/test-qmp-commands.c
@@ -0,0 +1,113 @@
+#include glib.h
+#include qemu-objects.h
+#include test-qmp-commands.h
+#include qapi/qmp-core.h
+#include module.h
+
+void qmp_user_def_cmd(Error **errp)
+{
+}
+
+void qmp_user_def_cmd1(UserDefOne * ud1, Error **errp)
+{
+}
+
+UserDefTwo * qmp_user_def_cmd2(UserDefOne * ud1a, UserDefOne * ud1b, Error
**errp)
+{
+UserDefTwo *ret;
+UserDefOne *ud1c = qemu_mallocz(sizeof(UserDefOne));
+UserDefOne *ud1d = qemu_mallocz(sizeof(UserDefOne));
+
+ud1c-string = strdup(ud1a-string);
+ud1c-integer = ud1a-integer;
+ud1d-string = strdup(ud1b-string);
+ud1d-integer = ud1b-integer;
+
+ret = qemu_mallocz(sizeof(UserDefTwo));
+ret-string = strdup(blah1);
+ret-dict.string = strdup(blah2);
+ret-dict.dict.userdef = ud1c;
+ret-dict.dict.string = strdup(blah3);
+ret-dict.has_dict2 = true;
+ret-dict.dict2.userdef = ud1d;
+ret-dict.dict2.string = strdup(blah4);
+
+return ret;
+}
+
+/* test commands with no input and no return value */
+static void test_dispatch_cmd(void)
+{
+QDict *req = qdict_new();
+QObject *resp;
+
+qdict_put_obj(req, execute, QOBJECT(qstring_from_str(user_def_cmd)));
+
+resp = qmp_dispatch(QOBJECT(req));
+assert(resp != NULL);
+assert(!qdict_haskey(qobject_to_qdict(resp), error));
+g_print(\nresp: %s\n, qstring_get_str(qobject_to_json(resp)));
+
+qobject_decref(resp);
+QDECREF(req);
+}
+
+/* test commands that return an error due to invalid parameters */
+static void test_dispatch_cmd_error(void)
+{
+QDict *req = qdict_new();
+QObject *resp;
+
+qdict_put_obj(req, execute, QOBJECT(qstring_from_str(user_def_cmd2)));
+
+resp = qmp_dispatch(QOBJECT(req));
+assert(resp != NULL);
+assert(qdict_haskey(qobject_to_qdict(resp), error));
+g_print(\nresp: %s\n, qstring_get_str(qobject_to_json_pretty(resp)));
+
+qobject_decref(resp);
+QDECREF(req);
+}
+
+/* test commands that involve both input parameters and return values */
+static void test_dispatch_cmd_io(void)
+{
+QDict *req = qdict_new();
+QDict *args = qdict_new();
+QDict *ud1a = qdict_new();
+QDict *ud1b = qdict_new();
+QObject *resp;
+
+qdict_put_obj(ud1a, integer, QOBJECT(qint_from_int(42)));
+qdict_put_obj(ud1a, string, QOBJECT(qstring_from_str(hello)));
+qdict_put_obj(ud1b, integer, QOBJECT(qint_from_int(422)));
+qdict_put_obj(ud1b, string, QOBJECT(qstring_from_str(hello2)));
+qdict_put_obj(args, ud1a, QOBJECT(ud1a));
+qdict_put_obj(args, ud1b, QOBJECT(ud1b));
+qdict_put_obj(req, arguments, QOBJECT(args));
+
+qdict_put_obj(req, execute, QOBJECT(qstring_from_str(user_def_cmd2)));
+
+/* TODO: put in full payload and check for errors */
+resp = qmp_dispatch(QOBJECT(req));
+assert(resp != NULL);
+assert(!qdict_haskey(qobject_to_qdict(resp), error));
+g_print(\nresp: %s\n, qstring_get_str(qobject_to_json_pretty(resp)));
+
+qobject_decref(resp);
+QDECREF(req);
+}
+
+int main(int argc, char **argv)
+{
+g_test_init(argc, argv, NULL);
+
+g_test_add_func(/0.15/dispatch_cmd, test_dispatch_cmd);
+g_test_add_func(/0.15/dispatch_cmd_error, test_dispatch_cmd_error);
+g_test_add_func(/0.15/dispatch_cmd_io, test_dispatch_cmd_io);
+
+module_call_init(MODULE_INIT_QAPI);
+g_test_run();
+
+return 0;
+}
--
1.7.0.4
[Qemu-devel] [PATCH v3 12/21] qapi: add qapi-types.py code generator
This is the code generator for qapi types. It will generation the
following files:
$(prefix)qapi-types.h - C types corresponding to types defined in
the schema you pass in
$(prefix)qapi-types.c - Cleanup functions for the above C types
The $(prefix) is used to as a namespace to keep the generated code from
one schema/code-generation separated from others so code and be
generated from multiple schemas with clobbering previously created code.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
scripts/qapi-types.py | 230 +
1 files changed, 230 insertions(+), 0 deletions(-)
create mode 100644 scripts/qapi-types.py
diff --git a/scripts/qapi-types.py b/scripts/qapi-types.py
new file mode 100644
index 000..c8d6b2f
--- /dev/null
+++ b/scripts/qapi-types.py
@@ -0,0 +1,230 @@
+#
+# QAPI types generator
+#
+# Copyright IBM, Corp. 2011
+#
+# Authors:
+# Anthony Liguori aligu...@us.ibm.com
+#
+# This work is licensed under the terms of the GNU GPLv2.
+# See the COPYING.LIB file in the top-level directory.
+
+from ordereddict import OrderedDict
+from qapi import *
+import sys
+import os
+import getopt
+
+def generate_fwd_struct(name, members):
+return mcgen('''
+typedef struct %(name)s %(name)s;
+
+typedef struct %(name)sList
+{
+%(name)s *value;
+struct %(name)sList *next;
+} %(name)sList;
+''',
+ name=name)
+
+def generate_struct(structname, fieldname, members):
+ret = mcgen('''
+struct %(name)s
+{
+''',
+ name=structname)
+
+for argname, argentry, optional, structured in parse_args(members):
+if optional:
+ret += mcgen('''
+bool has_%(c_name)s;
+''',
+ c_name=c_var(argname))
+if structured:
+push_indent()
+ret += generate_struct(, argname, argentry)
+pop_indent()
+else:
+ret += mcgen('''
+%(c_type)s %(c_name)s;
+''',
+ c_type=c_type(argentry), c_name=c_var(argname))
+
+if len(fieldname):
+fieldname = + fieldname
+ret += mcgen('''
+}%(field)s;
+''',
+field=fieldname)
+
+return ret
+
+def generate_handle(name, typeinfo):
+return mcgen('''
+typedef struct %(name)s
+{
+%(c_type)s handle;
+} %(name)s;
+
+typedef struct %(name)sList
+{
+%(name)s *value;
+struct %(name)sList *next;
+} %(name)sList;
+''',
+ name=name, c_type=c_type(typeinfo))
+
+def generate_enum(name, values):
+ret = mcgen('''
+typedef enum %(name)s
+{
+''',
+name=name)
+
+i = 1
+for value in values:
+ret += mcgen('''
+%(abbrev)s_%(value)s = %(i)d,
+''',
+ abbrev=de_camel_case(name).upper(),
+ value=c_var(value).upper(),
+ i=i)
+i += 1
+
+ret += mcgen('''
+} %(name)s;
+''',
+ name=name)
+
+return ret
+
+def generate_union(name, typeinfo):
+ret = mcgen('''
+struct %(name)s
+{
+%(name)sKind kind;
+union {
+''',
+name=name)
+
+for key in typeinfo:
+ret += mcgen('''
+%(c_type)s %(c_name)s;
+''',
+ c_type=c_type(typeinfo[key]),
+ c_name=c_var(key))
+
+ret += mcgen('''
+};
+};
+''')
+
+return ret
+
+def generate_type_cleanup_decl(name):
+ret = mcgen('''
+void qapi_free_%(type)s(%(c_type)s obj);
+''',
+c_type=c_type(name),type=name)
+return ret
+
+def generate_type_cleanup(name):
+ret = mcgen('''
+void qapi_free_%(type)s(%(c_type)s obj)
+{
+QapiDeallocVisitor *md;
+Visitor *v;
+
+if (!obj) {
+return;
+}
+
+md = qapi_dealloc_visitor_new();
+v = qapi_dealloc_get_visitor(md);
+visit_type_%(type)s(v, obj, NULL, NULL);
+qapi_dealloc_visitor_cleanup(md);
+}
+''',
+c_type=c_type(name),type=name)
+return ret
+
+
+try:
+opts, args = getopt.gnu_getopt(sys.argv[1:], p:o:, [prefix=,
output-dir=])
+except getopt.GetoptError, err:
+print str(err)
+sys.exit(1)
+
+output_dir =
+prefix =
+c_file = 'qapi-types.c'
+h_file = 'qapi-types.h'
+
+for o, a in opts:
+if o in (-p, --prefix):
+prefix = a
+elif o in (-o, --output-dir):
+output_dir = a + /
+
+c_file = output_dir + prefix + c_file
+h_file = output_dir + prefix + h_file
+
+if os.path.isdir(output_dir) == False:
+os.makedirs(output_dir)
+
+fdef = open(c_file, 'w')
+fdecl = open(h_file, 'w')
+
+fdef.write(mcgen('''
+/* AUTOMATICALLY GENERATED, DO NOT MODIFY */
+
+#include qapi/qapi-dealloc-visitor.h
+#include %(prefix)sqapi-types.h
+#include %(prefix)sqapi-visit.h
+
+''', prefix=prefix))
+
+fdecl.write(mcgen('''
+/* AUTOMATICALLY GENERATED, DO NOT MODIFY */
+#ifndef %(guard)s
+#define %(guard)s
+
+#include qapi/qapi-types-core.h
+''',
+ guard=guardname(h_file)))
+
+exprs = parse_schema(sys.stdin)
+
+for
[Qemu-devel] [PATCH v3 13/21] qapi: add qapi-visit.py code generator
This is the code generator for qapi visiter functions used to
marshal/unmarshal/dealloc qapi types. It generates the following 2
files:
$(prefix)qapi-visit.c: visiter function for a particular c type, used
to automagically convert qobjects into the
corresponding C type and vice-versa, and well
as for deallocation memory for an existing C
type
$(prefix)qapi-visit.h: declarations for previously mentioned visiter
functions
$(prefix) is used as decribed for qapi-types.py
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
scripts/qapi-visit.py | 235 +
1 files changed, 235 insertions(+), 0 deletions(-)
create mode 100644 scripts/qapi-visit.py
diff --git a/scripts/qapi-visit.py b/scripts/qapi-visit.py
new file mode 100644
index 000..0eb45c9
--- /dev/null
+++ b/scripts/qapi-visit.py
@@ -0,0 +1,235 @@
+#
+# QAPI visitor generator
+#
+# Copyright IBM, Corp. 2011
+#
+# Authors:
+# Anthony Liguori aligu...@us.ibm.com
+# Michael Rothmdr...@linux.vnet.ibm.com
+#
+# This work is licensed under the terms of the GNU GPLv2.
+# See the COPYING.LIB file in the top-level directory.
+
+from ordereddict import OrderedDict
+from qapi import *
+import sys
+import os
+import getopt
+
+def generate_visit_struct_body(field_prefix, members):
+ret =
+if len(field_prefix):
+field_prefix = field_prefix + .
+for argname, argentry, optional, structured in parse_args(members):
+if optional:
+ret += mcgen('''
+visit_start_optional(m, (obj *obj) ? (*obj)-%(c_prefix)shas_%(c_name)s :
NULL, %(name)s, errp);
+if ((*obj)-%(prefix)shas_%(c_name)s) {
+''',
+ c_prefix=c_var(field_prefix), prefix=field_prefix,
+ c_name=c_var(argname), name=argname)
+push_indent()
+
+if structured:
+ret += mcgen('''
+visit_start_struct(m, NULL, , %(name)s, 0, errp);
+''',
+ name=argname)
+ret += generate_visit_struct_body(field_prefix + argname, argentry)
+ret += mcgen('''
+visit_end_struct(m, errp);
+''')
+else:
+ret += mcgen('''
+visit_type_%(type)s(m, (obj *obj) ? (*obj)-%(c_prefix)s%(c_name)s : NULL,
%(name)s, errp);
+''',
+ c_prefix=c_var(field_prefix), prefix=field_prefix,
+ type=type_name(argentry), c_name=c_var(argname),
+ name=argname)
+
+if optional:
+pop_indent()
+ret += mcgen('''
+}
+visit_end_optional(m, errp);
+''')
+return ret
+
+def generate_visit_struct(name, members):
+ret = mcgen('''
+
+void visit_type_%(name)s(Visitor *m, %(name)s ** obj, const char *name, Error
**errp)
+{
+visit_start_struct(m, (void **)obj, %(name)s, name, sizeof(%(name)s),
errp);
+''',
+name=name)
+push_indent()
+ret += generate_visit_struct_body(, members)
+pop_indent()
+
+ret += mcgen('''
+visit_end_struct(m, errp);
+}
+''')
+return ret
+
+def generate_visit_list(name, members):
+return mcgen('''
+
+void visit_type_%(name)sList(Visitor *m, %(name)sList ** obj, const char
*name, Error **errp)
+{
+GenericList *i;
+
+visit_start_list(m, name, errp);
+
+for (i = visit_next_list(m, (GenericList **)obj, errp); i; i =
visit_next_list(m, i, errp)) {
+%(name)sList *native_i = (%(name)sList *)i;
+visit_type_%(name)s(m, native_i-value, NULL, errp);
+}
+
+visit_end_list(m, errp);
+}
+''',
+name=name)
+
+def generate_visit_handle(name, typeinfo):
+return mcgen('''
+
+void visit_type_%(name)s(Visitor *m, %(name)s ** obj, const char *name, Error
**errp)
+{
+visit_start_handle(m, (void **)obj, %(name)s, name, errp);
+visit_type_%(type_name)s(m, (*obj)-handle, handle, errp);
+visit_end_handle(m, errp);
+}
+''',
+name=name, type_name=type_name(typeinfo))
+
+def generate_visit_enum(name, members):
+return mcgen('''
+
+void visit_type_%(name)s(Visitor *m, %(name)s * obj, const char *name, Error
**errp)
+{
+visit_type_enum(m, (int *)obj, %(name)s, name, errp);
+}
+''',
+ name=name)
+
+def generate_visit_union(name, members):
+ret = generate_visit_enum('%sKind' % name, members.keys())
+
+ret += mcgen('''
+
+void visit_type_%(name)s(Visitor *m, %(name)s ** obj, const char *name, Error
**errp)
+{
+}
+''',
+ name=name)
+
+return ret
+
+def generate_declaration(name, members, genlist=True):
+ret = mcgen('''
+
+void visit_type_%(name)s(Visitor *m, %(name)s ** obj, const char *name, Error
**errp);
+''',
+name=name)
+
+if genlist:
+ret += mcgen('''
+void visit_type_%(name)sList(Visitor *m, %(name)sList ** obj, const char
*name, Error **errp);
+''',
+ name=name)
+
+
[Qemu-devel] [RFC 03/23] prep: Prepare emulation of an IBM RS/6000 6015 / 7020 (40p)
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/ppc_prep.c | 62 +
1 files changed, 62 insertions(+), 0 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index b3efd3c..071c149 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -763,6 +763,61 @@ static void ppc_prep_init (ram_addr_t ram_size,
register_ioport_write(0x0F00, 4, 1, PPC_debug_write, NULL);
}
+static void ibm_40p_init(ram_addr_t ram_size,
+ const char *boot_device,
+ const char *kernel_filename,
+ const char *kernel_cmdline,
+ const char *initrd_filename,
+ const char *cpu_model)
+{
+CPUState *env;
+char *filename;
+int bios_size;
+ram_addr_t ram_offset, bios_offset;
+
+// IBM E15 graphic adapter (S3 Vision864)
+// PowerPC 601
+// PCI, ISA
+// 16 MB RAM
+// Audio Crystal 4231
+// SCSI-2
+// Parallel ECP / 2 Serials 16550 (on Super I/O)
+
+/* init CPU */
+if (cpu_model == NULL)
+cpu_model = 601;
+env = ppc_prep_new_cpu(cpu_model);
+
+/* allocate RAM */
+ram_offset = qemu_ram_alloc(NULL, ppc_prep.ram, ram_size);
+cpu_register_physical_memory(0, ram_size, ram_offset);
+
+/* allocate and load BIOS */
+bios_offset = qemu_ram_alloc(NULL, ppc_prep.bios, BIOS_SIZE);
+if (bios_name == NULL)
+bios_name = P12H0456.IMG;
+filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+if (filename) {
+bios_size = get_image_size(filename);
+} else {
+bios_size = -1;
+}
+if (bios_size 0 bios_size = BIOS_SIZE) {
+target_phys_addr_t bios_addr;
+bios_size = (bios_size + 0xfff) ~0xfff;
+bios_addr = (uint32_t)(-BIOS_SIZE);
+cpu_register_physical_memory(bios_addr, bios_size,
+ bios_offset | IO_MEM_ROM);
+bios_size = load_image_targphys(filename, bios_addr, bios_size);
+}
+if (bios_size 0 || bios_size BIOS_SIZE) {
+hw_error(qemu: could not load PPC PReP bios '%s'\n, bios_name);
+}
+if (filename) {
+qemu_free(filename);
+}
+}
+
static QEMUMachine prep_machine = {
.name = prep,
.desc = PowerPC PREP platform,
@@ -770,9 +825,16 @@ static QEMUMachine prep_machine = {
.max_cpus = MAX_CPUS,
};
+static QEMUMachine ibm_40p_machine = {
+.name = 40p,
+.desc = IBM RS/6000 7020 (40p),
+.init = ibm_40p_init,
+};
+
static void prep_machine_init(void)
{
qemu_register_machine(prep_machine);
+qemu_register_machine(ibm_40p_machine);
}
machine_init(prep_machine_init);
--
1.7.5.3
[Qemu-devel] [PATCH v3 09/21] qapi: add QMP dispatch functions
Given an object recieved via QMP, this code uses the dispatch table
provided by qmp_registry.c to call the corresponding marshalling/dispatch
function and format return values/errors for delivery to the QMP.
Currently only synchronous QMP functions are supported, but this will
also be used for async QMP functions and QMP guest proxy dispatch as
well.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
Makefile.objs |2 +-
qapi/qmp-core.h |1 +
qapi/qmp-dispatch.c | 76 +++
3 files changed, 78 insertions(+), 1 deletions(-)
create mode 100644 qapi/qmp-dispatch.c
diff --git a/Makefile.objs b/Makefile.objs
index 092f314..7e82587 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -368,7 +368,7 @@ libcacard-y = cac.o event.o vcard.o vreader.o
vcard_emul_nss.o vcard_emul_type.o
# qapi
qapi-nested-y = qapi-visit-core.o qmp-input-visitor.o qmp-output-visitor.o
qapi-dealloc-visitor.o
-qapi-nested-y += qmp-registry.o
+qapi-nested-y += qmp-registry.o qmp-dispatch.o
qapi-obj-y = $(addprefix qapi/, $(qapi-nested-y))
vl.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
diff --git a/qapi/qmp-core.h b/qapi/qmp-core.h
index 99e929f..f1c26e4 100644
--- a/qapi/qmp-core.h
+++ b/qapi/qmp-core.h
@@ -35,6 +35,7 @@ typedef struct QmpCommand
void qmp_register_command(const char *name, QmpCommandFunc *fn);
QmpCommand *qmp_find_command(const char *name);
+QObject *qmp_dispatch(QObject *request);
#endif
diff --git a/qapi/qmp-dispatch.c b/qapi/qmp-dispatch.c
new file mode 100644
index 000..5bf41ea
--- /dev/null
+++ b/qapi/qmp-dispatch.c
@@ -0,0 +1,76 @@
+#include qemu-objects.h
+#include qapi/qmp-core.h
+#include json-parser.h
+#include error.h
+#include error_int.h
+#include qerror.h
+
+static QObject *qmp_dispatch_err(QObject *request, Error **errp)
+{
+const char *command;
+QDict *args, *dict;
+QmpCommand *cmd;
+QObject *ret = NULL;
+
+if (qobject_type(request) != QTYPE_QDICT) {
+error_set(errp, QERR_JSON_PARSE_ERROR, request is not a dictionary);
+goto out;
+}
+
+dict = qobject_to_qdict(request);
+if (!qdict_haskey(dict, execute)) {
+error_set(errp, QERR_JSON_PARSE_ERROR, no execute key);
+goto out;
+}
+
+command = qdict_get_str(dict, execute);
+cmd = qmp_find_command(command);
+if (cmd == NULL) {
+error_set(errp, QERR_COMMAND_NOT_FOUND, command);
+goto out;
+}
+
+if (!qdict_haskey(dict, arguments)) {
+args = qdict_new();
+} else {
+args = qdict_get_qdict(dict, arguments);
+QINCREF(args);
+}
+
+switch (cmd-type) {
+case QCT_NORMAL:
+cmd-fn(args, ret, errp);
+if (!error_is_set(errp) ret == NULL) {
+ret = QOBJECT(qdict_new());
+}
+break;
+}
+
+QDECREF(args);
+
+out:
+
+return ret;
+}
+
+QObject *qmp_dispatch(QObject *request)
+{
+Error *err = NULL;
+QObject *ret;
+QDict *rsp;
+
+ret = qmp_dispatch_err(request, err);
+
+rsp = qdict_new();
+if (err) {
+qdict_put_obj(rsp, error, error_get_qobject(err));
+error_free(err);
+} else if (ret) {
+qdict_put_obj(rsp, return, ret);
+} else {
+QDECREF(rsp);
+return NULL;
+}
+
+return QOBJECT(rsp);
+}
--
1.7.0.4
[Qemu-devel] [RFC 07/23] 40p: Add a PCI to ISA bridge (i82378)
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Don't create an ISA bus at machine level, the i82378 does that.
Cc: Markus Armbruster arm...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/ppc_prep.c |9 -
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 50cb6c7..27e1d14 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -775,8 +775,10 @@ static void ibm_40p_init(ram_addr_t ram_size,
char *filename;
int bios_size;
ram_addr_t ram_offset, bios_offset;
+qemu_irq *cpu_exit_irq;
DeviceState *dev;
PCIBus *pci_bus;
+PCIDevice *pci;
// IBM E15 graphic adapter (S3 Vision864)
// PowerPC 601
@@ -823,7 +825,12 @@ static void ibm_40p_init(ram_addr_t ram_size,
/* PCI host */
dev = sysbus_create_simple(prep-pci, 0x8080, NULL);
pci_bus = (PCIBus *)qdev_get_child_bus(dev, pci);
-(void)pci_bus;
+
+/* PCI - ISA bridge */
+pci = pci_create_simple(pci_bus, PCI_DEVFN(1, 0), i82378);
+cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
+qdev_connect_gpio_out(pci-qdev, 0, env-irq_inputs[PPC6xx_INPUT_INT]);
+qdev_connect_gpio_out(pci-qdev, 1, *cpu_exit_irq);
}
static QEMUMachine prep_machine = {
--
1.7.5.3
[Qemu-devel] [PATCH RFC 01/23] prep: Refactor CPU initialization
To cope with upcoming PReP machines and as a first step towards
pending qdev'ification of the ppc CPU, move CPU initialization
to a helper function, similar to pc_new_cpu().
Cc: Hervé Poussineau hpous...@reactos.org
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/ppc_prep.c | 47 +++
1 files changed, 31 insertions(+), 16 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 0e9cfc2..b3efd3c 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -525,6 +525,36 @@ static void cpu_request_exit(void *opaque, int irq, int
level)
}
}
+static void prep_cpu_reset(void *opaque)
+{
+CPUState *env = opaque;
+
+cpu_reset(env);
+}
+
+static CPUState *ppc_prep_new_cpu(const char *cpu_model)
+{
+CPUState *env;
+
+env = cpu_init(cpu_model);
+if (!env) {
+fprintf(stderr, Unable to find PowerPC CPU definition\n);
+exit(1);
+}
+if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
+hw_error(Only 6xx bus is supported on PREP machine\n);
+}
+if (env-flags POWERPC_FLAG_RTC_CLK) {
+/* POWER / PowerPC 601 RTC clock frequency is 7.8125 MHz */
+cpu_ppc_tb_init(env, 7812500UL);
+} else {
+/* Set time-base frequency to 100 Mhz */
+cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
+}
+qemu_register_reset(prep_cpu_reset, env);
+return env;
+}
+
/* PowerPC PREP hardware initialisation */
static void ppc_prep_init (ram_addr_t ram_size,
const char *boot_device,
@@ -557,19 +587,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
if (cpu_model == NULL)
cpu_model = 602;
for (i = 0; i smp_cpus; i++) {
-env = cpu_init(cpu_model);
-if (!env) {
-fprintf(stderr, Unable to find PowerPC CPU definition\n);
-exit(1);
-}
-if (env-flags POWERPC_FLAG_RTC_CLK) {
-/* POWER / PowerPC 601 RTC clock frequency is 7.8125 MHz */
-cpu_ppc_tb_init(env, 7812500UL);
-} else {
-/* Set time-base frequency to 100 Mhz */
-cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
-}
-qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
+env = ppc_prep_new_cpu(cpu_model);
}
/* allocate RAM */
@@ -644,9 +662,6 @@ static void ppc_prep_init (ram_addr_t ram_size,
}
isa_mem_base = 0xc000;
-if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
-hw_error(Only 6xx bus is supported on PREP machine\n);
-}
i8259 = i8259_init(first_cpu-irq_inputs[PPC6xx_INPUT_INT]);
pci_bus = pci_prep_init(i8259);
/* Hmm, prep has no pci-isa bridge ??? */
--
1.7.5.3
[Qemu-devel] [PATCH v3 11/21] qapi: add qapi.py helper libraries
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
scripts/qapi.py | 203 +++
1 files changed, 203 insertions(+), 0 deletions(-)
create mode 100644 scripts/qapi.py
diff --git a/scripts/qapi.py b/scripts/qapi.py
new file mode 100644
index 000..56af232
--- /dev/null
+++ b/scripts/qapi.py
@@ -0,0 +1,203 @@
+#
+# QAPI helper library
+#
+# Copyright IBM, Corp. 2011
+#
+# Authors:
+# Anthony Liguori aligu...@us.ibm.com
+#
+# This work is licensed under the terms of the GNU GPLv2.
+# See the COPYING.LIB file in the top-level directory.
+
+from ordereddict import OrderedDict
+
+def tokenize(data):
+while len(data):
+if data[0] in ['{', '}', ':', ',', '[', ']']:
+yield data[0]
+data = data[1:]
+elif data[0] in ' \n':
+data = data[1:]
+elif data[0] == ':
+data = data[1:]
+string = ''
+while data[0] != ':
+string += data[0]
+data = data[1:]
+data = data[1:]
+yield string
+
+def parse(tokens):
+if tokens[0] == '{':
+ret = OrderedDict()
+tokens = tokens[1:]
+while tokens[0] != '}':
+key = tokens[0]
+tokens = tokens[1:]
+
+tokens = tokens[1:] # :
+
+value, tokens = parse(tokens)
+
+if tokens[0] == ',':
+tokens = tokens[1:]
+
+ret[key] = value
+tokens = tokens[1:]
+return ret, tokens
+elif tokens[0] == '[':
+ret = []
+tokens = tokens[1:]
+while tokens[0] != ']':
+value, tokens = parse(tokens)
+if tokens[0] == ',':
+tokens = tokens[1:]
+ret.append(value)
+tokens = tokens[1:]
+return ret, tokens
+else:
+return tokens[0], tokens[1:]
+
+def evaluate(string):
+return parse(map(lambda x: x, tokenize(string)))[0]
+
+def parse_schema(fp):
+exprs = []
+expr = ''
+expr_eval = None
+
+for line in fp:
+if line.startswith('#') or line == '\n':
+continue
+
+if line.startswith(' '):
+expr += line
+elif expr:
+expr_eval = evaluate(expr)
+if expr_eval.has_key('enum'):
+add_enum(expr_eval['enum'])
+elif expr_eval.has_key('union'):
+add_enum('%sKind' % expr_eval['union'])
+exprs.append(expr_eval)
+expr = line
+else:
+expr += line
+
+if expr:
+expr_eval = evaluate(expr)
+if expr_eval.has_key('enum'):
+add_enum(expr_eval['enum'])
+elif expr_eval.has_key('union'):
+add_enum('%sKind' % expr_eval['union'])
+exprs.append(expr_eval)
+
+return exprs
+
+def parse_args(typeinfo):
+for member in typeinfo:
+argname = member
+argentry = typeinfo[member]
+optional = False
+structured = False
+if member.startswith('*'):
+argname = member[1:]
+optional = True
+if isinstance(argentry, OrderedDict):
+structured = True
+yield (argname, argentry, optional, structured)
+
+def de_camel_case(name):
+new_name = ''
+for ch in name:
+if ch.isupper() and new_name:
+new_name += '_'
+if ch == '-':
+new_name += '_'
+else:
+new_name += ch.lower()
+return new_name
+
+def camel_case(name):
+new_name = ''
+first = True
+for ch in name:
+if ch in ['_', '-']:
+first = True
+elif first:
+new_name += ch.upper()
+first = False
+else:
+new_name += ch.lower()
+return new_name
+
+def c_var(name):
+return '_'.join(name.split('-')).lstrip(*)
+
+def c_list_type(name):
+return '%sList' % name
+
+def type_name(name):
+if type(name) == list:
+return c_list_type(name[0])
+return name
+
+enum_types = []
+
+def add_enum(name):
+global enum_types
+enum_types.append(name)
+
+def is_enum(name):
+global enum_types
+return (name in enum_types)
+
+def c_type(name):
+if name == 'str':
+return 'char *'
+elif name == 'int':
+return 'int64_t'
+elif name == 'bool':
+return 'bool'
+elif name == 'number':
+return 'double'
+elif type(name) == list:
+return '%s *' % c_list_type(name[0])
+elif is_enum(name):
+return name
+elif name == None or len(name) == 0:
+return 'void'
+elif name == name.upper():
+return '%sEvent *' % camel_case(name)
+else:
+return '%s *' % name
+
+def genindent(count):
+ret =
+for i in range(count):
+ret +=
+return ret
+
+indent_level = 0
+
+def push_indent(indent_amount=4):
+global indent_level
+indent_level += indent_amount
+
+def
[Qemu-devel] [PATCH v3 20/21] qapi: Makefile changes to build test-qmp-commands
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com --- Makefile |8 +++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/Makefile b/Makefile index 6083085..6adf1a9 100644 --- a/Makefile +++ b/Makefile @@ -146,7 +146,7 @@ check-qfloat: check-qfloat.o qfloat.o $(CHECK_PROG_DEPS) check-qjson: check-qjson.o qfloat.o qint.o qdict.o qstring.o qlist.o qbool.o qjson.o json-streamer.o json-lexer.o json-parser.o error.o qerror.o qemu-error.o $(CHECK_PROG_DEPS) qapi-dir := qapi-generated -$(qapi-obj-y) test-visitor.o: QEMU_CFLAGS += -I $(qapi-dir) +$(qapi-obj-y) test-visitor.o test-qmp-commands.o: QEMU_CFLAGS += -I $(qapi-dir) $(qapi-dir)/test-qapi-types.c: $(qapi-dir)/test-qapi-types.h $(qapi-dir)/test-qapi-types.h: $(SRC_PATH)/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-types.py @@ -154,10 +154,16 @@ $(qapi-dir)/test-qapi-types.h: $(SRC_PATH)/qapi-schema-test.json $(SRC_PATH)/scr $(qapi-dir)/test-qapi-visit.c: $(qapi-dir)/test-qapi-visit.h $(qapi-dir)/test-qapi-visit.h: $(SRC_PATH)/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-visit.py $(call quiet-command,python $(SRC_PATH)/scripts/qapi-visit.py -o $(qapi-dir) -p test- $, GEN $@) +$(qapi-dir)/test-qmp-commands.h: $(qapi-dir)/test-qmp-marshal.c +$(qapi-dir)/test-qmp-marshal.c: $(SRC_PATH)/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-commands.py + $(call quiet-command,python $(SRC_PATH)/scripts/qapi-commands.py -o $(qapi-dir) -p test- $, GEN $@) test-visitor.o: $(addprefix $(qapi-dir)/, test-qapi-types.c test-qapi-types.h test-qapi-visit.c test-qapi-visit.h) test-visitor: test-visitor.o qfloat.o qint.o qdict.o qstring.o qlist.o qbool.o $(qapi-obj-y) error.o osdep.o qemu-malloc.o $(oslib-obj-y) qjson.o json-streamer.o json-lexer.o json-parser.o qerror.o qemu-error.o qemu-tool.o $(qapi-dir)/test-qapi-visit.o $(qapi-dir)/test-qapi-types.o +test-qmp-commands.o: $(addprefix $(qapi-dir)/, test-qapi-types.c test-qapi-types.h test-qapi-visit.c test-qapi-visit.h test-qmp-marshal.c test-qmp-commands.h) +test-qmp-commands: test-qmp-commands.o qfloat.o qint.o qdict.o qstring.o qlist.o qbool.o $(qapi-obj-y) error.o osdep.o qemu-malloc.o $(oslib-obj-y) qjson.o json-streamer.o json-lexer.o json-parser.o qerror.o qemu-error.o qemu-tool.o $(qapi-dir)/test-qapi-visit.o $(qapi-dir)/test-qapi-types.o $(qapi-dir)/test-qmp-marshal.o module.o + QEMULIBS=libhw32 libhw64 libuser libdis libdis-user clean: -- 1.7.0.4
[Qemu-devel] [RFC 00/23] PReP 40P emulation
Hi, Based mostly on earlier work by Hervé Poussineau, this RFC series adds emulation of a real '40p' IBM PReP machine as an addition to the existing 'prep' machine. It does some general cleanups and qdev'ification that will benefit further PReP machines, such as the BeBox. This series supersedes my preparatory ISA reconfigurability series, by adding the i82378 PCI-ISA bridge on which it is to be used. The qdev and ISA device patches up to pc87312 should allow for cherry-picking. The state of -M prep (on Darwin/ppc64 and OSol/amd64) is that my 2.4.36.1 Linux kernel hardly gets to the root prompt (INIT: Id n respawning too fast: disabled for 5 minutes), both before and after. Firmware for -M 40p can be downloaded here: ftp://ftp.boulder.ibm.com/rs6000/firmware/7020-40p/P12H0456.IMG With some additional patches on top of this series (memory-forced I/O, a PCI BAR issue and a parallel ioport conflict) after about one and a half minutes it gets to the graphical boot screen with keyboard icon, after about seven and a half minutes to the floppy icon and after a really looong time gets to a third, memory(?) icon. TODOs: * improve ISA ioport vs. IORange handling and naming * fix a few -M prep System I/O ports broken by qdev'ification * possibly make -M prep use i82378, too (broke Linux boot) * IBM8514/A cleanup, RAMDAC support for colors * 7020 had max. 6x 32 MB = 192 MB RAM Regards, Andreas Cc: Hervé Poussineau hpous...@reactos.org Andreas Färber (21): prep: Refactor CPU initialization prep: qdev'ify PCI prep: Prepare emulation of an IBM RS/6000 6015 / 7020 (40p) 40p: Add PCI host prep: Add i82374 DMA emulation prep: Add i82378 PCI-to-ISA bridge emulation 40p: Add a PCI to ISA bridge (i82378) qdev: Add support for property type bool qdev: Add helpers for reading properties isa: Provide enable and disable callbacks isa: Allow to un-assign I/O ports isa: Allow to un-associate an IRQ parallel: Implement ISA state callbacks serial: Implement ISA state callbacks fdc: Implement ISA state callbacks ide: Allow to discard I/O ports ide: Implement ISA state callbacks prep: Add pc87312 Super I/O emulation 40p: Add the Super I/O chip (pc87312) prep: qdev'ify System I/O (WIP) 40p: Add an 8514/A graphics card Hervé Poussineau (2): fdc: Parametrize ISA base, IRQ and DMA 40p: Add an audio card and a keyboard Makefile.objs |4 + Makefile.target |1 + default-configs/ppc-softmmu.mak |7 + hw/fdc.c| 118 ++- hw/hw.h | 15 + hw/i82374.c | 133 hw/i82378.c | 298 + hw/ide/core.c |8 + hw/ide/internal.h |1 + hw/ide/isa.c| 98 ++- hw/isa-bus.c| 71 hw/isa.h|8 + hw/parallel.c | 75 +++-- hw/pc87312.c| 495 hw/pci_ids.h|4 + hw/ppc_prep.c | 316 ++ hw/ppc_prep.h | 24 ++ hw/prep_pci.c | 126 ++-- hw/prep_systemio.c | 335 +++ hw/qdev-properties.c| 96 ++- hw/qdev.h | 13 + hw/serial.c | 91 +- hw/vga-s3.c | 694 +++ 23 files changed, 2812 insertions(+), 219 deletions(-) create mode 100644 hw/i82374.c create mode 100644 hw/i82378.c create mode 100644 hw/pc87312.c create mode 100644 hw/ppc_prep.h create mode 100644 hw/prep_systemio.c create mode 100644 hw/vga-s3.c -- 1.7.5.3
[Qemu-devel] [RFC v5 10/23] isa: Provide enable and disable callbacks
To allow enabling/disabling present ISA devices without hotplug,
keep track of state and add a helper to avoid enabling twice.
Since the properties to be configured are defined at device level,
delegate the actual work to callback functions. Use separate ones
for enable and disable, otherwise the functions ended up as a big
if statement.
If no callback is supplied, the device can't be disabled.
Prepare VMSTATE_ISA_DEVICE for devices that support disabling.
Legacy devices never change their state and won't need this yet.
For those that do, supply a needed callback.
Cc: Gerd Hoffmann kra...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Cc: Juan Quintela quint...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/hw.h | 15 +++
hw/isa-bus.c | 39 +++
hw/isa.h |6 ++
3 files changed, 60 insertions(+), 0 deletions(-)
diff --git a/hw/hw.h b/hw/hw.h
index 56447a7..32226b1 100644
--- a/hw/hw.h
+++ b/hw/hw.h
@@ -628,6 +628,21 @@ extern const VMStateInfo vmstate_info_unused_buffer;
.info = vmstate_info_unused_buffer, \
.flags= VMS_BUFFER, \
}
+
+extern const VMStateDescription vmstate_isa_device;
+
+#define VMSTATE_ISA_DEVICE_V(_field, _state, _version) { \
+.name = (stringify(_field)), \
+.version_id = (_version), \
+.size = sizeof(ISADevice), \
+.vmsd = vmstate_isa_device, \
+.flags = VMS_STRUCT,\
+.offset = vmstate_offset_value(_state, _field, ISADevice), \
+}
+
+#define VMSTATE_ISA_DEVICE(_field, _state) \
+VMSTATE_ISA_DEVICE_V(_field, _state, 0)
+
extern const VMStateDescription vmstate_pci_device;
#define VMSTATE_PCI_DEVICE(_field, _state) { \
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 2765543..bbafb75 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -112,6 +112,9 @@ static int isa_qdev_init(DeviceState *qdev, DeviceInfo
*base)
dev-isairq[0] = -1;
dev-isairq[1] = -1;
+dev-enabled = true; /* XXX for legacy devices without qdev property */
+
+dev-initially_enabled = dev-enabled;
return info-init(dev);
}
@@ -156,6 +159,42 @@ ISADevice *isa_create_simple(const char *name)
return dev;
}
+const VMStateDescription vmstate_isa_device = {
+.name = ISADevice,
+.version_id = 1,
+.minimum_version_id = 1,
+.fields = (VMStateField []) {
+VMSTATE_BOOL(enabled, ISADevice),
+VMSTATE_END_OF_LIST()
+}
+};
+
+int isa_set_state(ISADevice *dev, bool enabled)
+{
+ISADeviceInfo *info = DO_UPCAST(ISADeviceInfo, qdev, dev-qdev.info);
+isa_qdev_initfn statefn = enabled ? info-enable : info-disable;
+int err;
+
+if (dev-enabled == enabled) {
+return 0;
+} else if (statefn == NULL) {
+return -1;
+}
+err = statefn(dev);
+if (err 0) {
+return err;
+}
+dev-enabled = enabled;
+return err;
+}
+
+bool isa_vmstate_needed(void *opaque)
+{
+ISADevice *s = opaque;
+
+return s-initially_enabled != s-enabled;
+}
+
static void isabus_dev_print(Monitor *mon, DeviceState *dev, int indent)
{
ISADevice *d = DO_UPCAST(ISADevice, qdev, dev);
diff --git a/hw/isa.h b/hw/isa.h
index d2b6126..1eefd17 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -16,12 +16,16 @@ struct ISADevice {
int nirqs;
uint16_t ioports[32];
int nioports;
+bool enabled;
+bool initially_enabled;
};
typedef int (*isa_qdev_initfn)(ISADevice *dev);
struct ISADeviceInfo {
DeviceInfo qdev;
isa_qdev_initfn init;
+isa_qdev_initfn enable;
+isa_qdev_initfn disable;
};
ISABus *isa_bus_new(DeviceState *dev);
@@ -34,6 +38,8 @@ void isa_qdev_register(ISADeviceInfo *info);
ISADevice *isa_create(const char *name);
ISADevice *isa_try_create(const char *name);
ISADevice *isa_create_simple(const char *name);
+int isa_set_state(ISADevice *dev, bool enabled);
+bool isa_vmstate_needed(void *opaque);
extern target_phys_addr_t isa_mem_base;
--
1.7.5.3
[Qemu-devel] [PATCH v3 14/21] qapi: add qapi-commands.py code generator
This is the code generator for qapi command marshaling/dispatch.
Currently only generators for synchronous qapi/qmp functions are
supported. This script generates the following files:
$(prefix)qmp-marshal.c: command marshal/dispatch functions for each
QMP command defined in the schema. Functions
generated by qapi-visit.py are used to
convert qobjects recieved from the wire into
function parameters, and uses the same
visiter functions to convert native C return
values to qobjects from transmission back
over the wire.
$(prefix)qmp-commands.h: Function prototypes for the QMP commands
specified in the schema.
$(prefix) is used in the same manner as with qapi-types.py
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
scripts/qapi-commands.py | 355 ++
1 files changed, 355 insertions(+), 0 deletions(-)
create mode 100644 scripts/qapi-commands.py
diff --git a/scripts/qapi-commands.py b/scripts/qapi-commands.py
new file mode 100644
index 000..23821ba
--- /dev/null
+++ b/scripts/qapi-commands.py
@@ -0,0 +1,355 @@
+#
+# QAPI command marshaller generator
+#
+# Copyright IBM, Corp. 2011
+#
+# Authors:
+# Anthony Liguori aligu...@us.ibm.com
+# Michael Rothmdr...@linux.vnet.ibm.com
+#
+# This work is licensed under the terms of the GNU GPLv2.
+# See the COPYING.LIB file in the top-level directory.
+
+from ordereddict import OrderedDict
+from qapi import *
+import sys
+import os
+import getopt
+
+def generate_decl_enum(name, members, genlist=True):
+return mcgen('''
+
+void visit_type_%(name)s(Visitor *m, %(name)s * obj, const char *name, Error
**errp);
+''',
+name=name)
+
+def generate_command_decl(name, args, ret_type):
+arglist=
+for argname, argtype, optional, structured in parse_args(args):
+argtype = c_type(argtype)
+if argtype == char *:
+argtype = const char *
+if optional:
+arglist += bool has_%s, % c_var(argname)
+arglist += %s %s, % (argtype, c_var(argname))
+return mcgen('''
+%(ret_type)s qmp_%(name)s(%(args)sError **errp);
+''',
+ ret_type=c_type(ret_type), name=c_var(name),
args=arglist).strip()
+
+def gen_sync_call(name, args, ret_type, indent=0):
+ret =
+arglist=
+retval=
+if ret_type:
+retval = retval =
+for argname, argtype, optional, structured in parse_args(args):
+if optional:
+arglist += has_%s, % c_var(argname)
+arglist += %s, % (c_var(argname))
+push_indent(indent)
+ret = mcgen('''
+%(retval)sqmp_%(name)s(%(args)serrp);
+
+''',
+name=c_var(name), args=arglist, retval=retval).rstrip()
+if ret_type:
+ret += \n + mcgen(
+%(marshal_output_call)s
+''',
+marshal_output_call=gen_marshal_output_call(name,
ret_type)).rstrip()
+pop_indent(indent)
+return ret.rstrip()
+
+
+def gen_marshal_output_call(name, ret_type):
+if not ret_type:
+return
+return qmp_marshal_output_%s(retval, ret, errp); % c_var(name)
+
+def gen_visitor_output_containers_decl(ret_type):
+ret =
+push_indent()
+if ret_type:
+ret += mcgen('''
+QmpOutputVisitor *mo;
+QapiDeallocVisitor *md;
+Visitor *v;
+''')
+pop_indent()
+
+return ret
+
+def gen_visitor_input_containers_decl(args):
+ret =
+
+push_indent()
+if len(args) 0:
+ret += mcgen('''
+QmpInputVisitor *mi;
+QapiDeallocVisitor *md;
+Visitor *v;
+''')
+pop_indent()
+
+return ret.rstrip()
+
+def gen_visitor_input_vars_decl(args):
+ret =
+push_indent()
+for argname, argtype, optional, structured in parse_args(args):
+if optional:
+ret += mcgen('''
+bool has_%(argname)s = false;
+''',
+ argname=c_var(argname))
+if c_type(argtype).endswith(*):
+ret += mcgen('''
+%(argtype)s %(argname)s = NULL;
+''',
+ argname=c_var(argname), argtype=c_type(argtype))
+else:
+ret += mcgen('''
+%(argtype)s %(argname)s;
+''',
+ argname=c_var(argname), argtype=c_type(argtype))
+
+pop_indent()
+return ret.rstrip()
+
+def gen_visitor_input_block(args, obj, dealloc=False):
+ret =
+if len(args) == 0:
+return ret
+
+push_indent()
+
+if dealloc:
+ret += mcgen('''
+md = qapi_dealloc_visitor_new();
+v = qapi_dealloc_get_visitor(md);
+''')
+else:
+ret += mcgen('''
+mi = qmp_input_visitor_new(%(obj)s);
+v = qmp_input_get_visitor(mi);
+''',
+ obj=obj)
+
+for argname, argtype, optional, structured in parse_args(args):
+if optional:
+ret += mcgen('''
+visit_start_optional(v, has_%(c_name)s,
[Qemu-devel] [RFC 05/23] prep: Add i82374 DMA emulation
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Confine to CONFIG_I82374.
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
Makefile.objs |1 +
default-configs/ppc-softmmu.mak |1 +
hw/i82374.c | 133 +++
3 files changed, 135 insertions(+), 0 deletions(-)
create mode 100644 hw/i82374.c
diff --git a/Makefile.objs b/Makefile.objs
index 509ab39..b0e4c09 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -201,6 +201,7 @@ hw-obj-$(CONFIG_FDC) += fdc.o
hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o
hw-obj-$(CONFIG_APM) += pm_smbus.o apm.o
hw-obj-$(CONFIG_DMA) += dma.o
+hw-obj-$(CONFIG_I82374) += i82374.o
hw-obj-$(CONFIG_HPET) += hpet.o
hw-obj-$(CONFIG_APPLESMC) += applesmc.o
hw-obj-$(CONFIG_SMARTCARD) += usb-ccid.o ccid-card-passthru.o
diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
index 4563742..1d1a7c2 100644
--- a/default-configs/ppc-softmmu.mak
+++ b/default-configs/ppc-softmmu.mak
@@ -11,6 +11,7 @@ CONFIG_I8254=y
CONFIG_PCKBD=y
CONFIG_FDC=y
CONFIG_DMA=y
+CONFIG_I82374=y
CONFIG_OPENPIC=y
CONFIG_PREP_PCI=y
CONFIG_MACIO=y
diff --git a/hw/i82374.c b/hw/i82374.c
new file mode 100644
index 000..383cf1b
--- /dev/null
+++ b/hw/i82374.c
@@ -0,0 +1,133 @@
+/*
+ * QEMU Intel 82374 emulation (Enhanced DMA controller)
+ *
+ * Copyright (c) 2010 Herve Poussineau
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include isa.h
+
+//#define DEBUG_I82374
+
+#ifdef DEBUG_I82374
+#define DPRINTF(fmt, ...) \
+do { fprintf(stderr, i82374: fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF(fmt, ...) \
+do {} while (0)
+#endif
+#define BADF(fmt, ...) \
+do { fprintf(stderr, i82374 ERROR: fmt , ## __VA_ARGS__); } while (0)
+
+typedef struct I82374State {
+uint8_t commands[8];
+} I82374State;
+
+static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
+{
+uint32_t val = 0;
+
+BADF(%s: %08x\n, __func__, nport);
+
+DPRINTF(%s: %08x=%08x\n, __func__, nport, val);
+return val;
+}
+
+static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
+{
+DPRINTF(%s: %08x=%08x\n, __func__, nport, data);
+
+if (data != 0x42) {
+/* Not Stop S/G command */
+BADF(%s: %08x=%08x\n, __func__, nport, data);
+}
+}
+
+static uint32_t i82374_read_status(void *opaque, uint32_t nport)
+{
+uint32_t val = 0;
+
+BADF(%s: %08x\n, __func__, nport);
+
+DPRINTF(%s: %08x=%08x\n, __func__, nport, val);
+return val;
+}
+
+static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t
data)
+{
+DPRINTF(%s: %08x=%08x\n, __func__, nport, data);
+
+BADF(%s: %08x=%08x\n, __func__, nport, data);
+}
+
+static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
+{
+uint32_t val = 0;
+
+BADF(%s: %08x\n, __func__, nport);
+
+DPRINTF(%s: %08x=%08x\n, __func__, nport, val);
+return val;
+}
+
+static void i82374_init(I82374State *s)
+{
+DMA_init(1, NULL);
+memset(s-commands, 0, sizeof(s-commands));
+}
+
+typedef struct ISAi82374State {
+ISADevice dev;
+uint32_t iobase;
+I82374State state;
+} ISAi82374State;
+
+static int i82374_isa_init(ISADevice *dev)
+{
+ISAi82374State *isa = DO_UPCAST(ISAi82374State, dev, dev);
+I82374State *s = isa-state;
+
+register_ioport_read(isa-iobase + 0x0A, 1, 1, i82374_read_isr, s);
+register_ioport_write(isa-iobase + 0x10, 8, 1, i82374_write_command, s);
+register_ioport_read(isa-iobase + 0x18, 8, 1, i82374_read_status, s);
+register_ioport_write(isa-iobase + 0x20, 0x20, 1,
i82374_write_descriptor, s);
+register_ioport_read(isa-iobase + 0x20, 0x20, 1, i82374_read_descriptor,
s);
+
+i82374_init(s);
+
+return 0;
+}
+
+static ISADeviceInfo i82374_isa_info = {
+.qdev.name = i82374,
+.qdev.size = sizeof(ISAi82374State),
+.init = i82374_isa_init,
+.qdev.props =
[Qemu-devel] [RFC v5 18/23] ide: Implement ISA state callbacks
Add enabled qdev property, and implement enable and disable callbacks.
Incorporate ISA VMState as well as I/O bases and IRQ as subsection,
and implement pre_load and post_load callbacks.
Cc: Gerd Hoffmann kra...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Cc: Juan Quintela quint...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/ide/isa.c | 98 +++---
1 files changed, 93 insertions(+), 5 deletions(-)
diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index 4ac7453..de8b949 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.c
@@ -41,6 +41,9 @@ typedef struct ISAIDEState {
uint32_t iobase2;
uint32_t isairq;
qemu_irq irq;
+uint32_t initial_iobase;
+uint32_t initial_iobase2;
+uint32_t initial_isairq;
} ISAIDEState;
static void isa_ide_reset(DeviceState *d)
@@ -50,27 +53,109 @@ static void isa_ide_reset(DeviceState *d)
ide_bus_reset(s-bus);
}
+static int isa_ide_enable(ISADevice *dev)
+{
+ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, dev);
+
+ide_init_ioport(s-bus, s-iobase, s-iobase2);
+
+isa_init_ioport_range(dev, s-iobase, 8);
+isa_init_ioport(dev, s-iobase2);
+
+isa_init_irq(dev, s-irq, s-isairq);
+
+return 0;
+}
+
+static int isa_ide_disable(ISADevice *dev)
+{
+ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, dev);
+
+ide_discard_ioport(s-iobase, s-iobase2);
+
+isa_discard_ioport_range(dev, s-iobase2, 1);
+isa_discard_ioport_range(dev, s-iobase, 8);
+
+isa_uninit_irq(dev, s-irq, s-isairq);
+
+return 0;
+}
+
+static int isa_ide_pre_load(void *opaque)
+{
+ISAIDEState *s = opaque;
+
+isa_set_state(s-dev, false);
+return 0;
+}
+
+static int isa_ide_post_load(void *opaque, int version_id)
+{
+ISAIDEState *s = opaque;
+ISADevice *dev = s-dev;
+
+if (dev-enabled) {
+isa_ide_enable(dev);
+}
+return 0;
+}
+
+static bool isa_ide_isaconfig_needed(void *opaque)
+{
+ISAIDEState *s = opaque;
+
+return isa_vmstate_needed(s-dev) ||
+s-initial_iobase != s-iobase ||
+s-initial_iobase2 != s-iobase2 ||
+s-initial_isairq != s-isairq;
+}
+
+static const VMStateDescription vmstate_ide_isa_config = {
+.name = isa-ide/isa-config,
+.version_id = 1,
+.minimum_version_id = 1,
+.fields = (VMStateField []) {
+VMSTATE_ISA_DEVICE(dev, ISAIDEState),
+VMSTATE_UINT32(iobase, ISAIDEState),
+VMSTATE_UINT32(iobase2, ISAIDEState),
+VMSTATE_UINT32(isairq, ISAIDEState),
+VMSTATE_END_OF_LIST()
+},
+};
+
static const VMStateDescription vmstate_ide_isa = {
.name = isa-ide,
.version_id = 3,
.minimum_version_id = 0,
.minimum_version_id_old = 0,
+.pre_load = isa_ide_pre_load,
+.post_load = isa_ide_post_load,
.fields = (VMStateField []) {
VMSTATE_IDE_BUS(bus, ISAIDEState),
VMSTATE_IDE_DRIVES(bus.ifs, ISAIDEState),
VMSTATE_END_OF_LIST()
-}
+},
+.subsections = (VMStateSubsection []) {
+{
+.vmsd = vmstate_ide_isa_config,
+.needed = isa_ide_isaconfig_needed,
+}, {
+}
+},
};
static int isa_ide_initfn(ISADevice *dev)
{
ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, dev);
+s-initial_iobase = s-iobase;
+s-initial_iobase2 = s-iobase2;
+s-initial_isairq = s-isairq;
+
ide_bus_new(s-bus, s-dev.qdev, 0);
-ide_init_ioport(s-bus, s-iobase, s-iobase2);
-isa_init_irq(dev, s-irq, s-isairq);
-isa_init_ioport_range(dev, s-iobase, 8);
-isa_init_ioport(dev, s-iobase2);
+if (dev-enabled) {
+isa_ide_enable(dev);
+}
ide_init2(s-bus, s-irq);
vmstate_register(dev-qdev, 0, vmstate_ide_isa, s);
return 0;
@@ -102,11 +187,14 @@ static ISADeviceInfo isa_ide_info = {
.qdev.fw_name = ide,
.qdev.size = sizeof(ISAIDEState),
.init = isa_ide_initfn,
+.enable = isa_ide_enable,
+.disable = isa_ide_disable,
.qdev.reset = isa_ide_reset,
.qdev.props = (Property[]) {
DEFINE_PROP_HEX32(iobase, ISAIDEState, iobase, 0x1f0),
DEFINE_PROP_HEX32(iobase2, ISAIDEState, iobase2, 0x3f6),
DEFINE_PROP_UINT32(irq,ISAIDEState, isairq, 14),
+DEFINE_PROP_BOOL(enabled, ISAIDEState, dev.enabled, true),
DEFINE_PROP_END_OF_LIST(),
},
};
--
1.7.5.3
[Qemu-devel] [PATCH v5 15/23] fdc: Parametrize ISA base, IRQ and DMA
From: Hervé Poussineau hpous...@reactos.org
Keep the PC values as defaults but allow to override them for PReP.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Cc: Markus Armbruster arm...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/fdc.c | 27 +++
1 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/hw/fdc.c b/hw/fdc.c
index edf0360..f4e3e0d 100644
--- a/hw/fdc.c
+++ b/hw/fdc.c
@@ -425,6 +425,9 @@ typedef struct FDCtrlSysBus {
typedef struct FDCtrlISABus {
ISADevice busdev;
+uint32_t iobase;
+uint32_t irq;
+uint32_t dma;
struct FDCtrl state;
int32_t bootindexA;
int32_t bootindexB;
@@ -1895,26 +1898,23 @@ static int isabus_fdc_init1(ISADevice *dev)
{
FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
FDCtrl *fdctrl = isa-state;
-int iobase = 0x3f0;
-int isairq = 6;
-int dma_chann = 2;
int ret;
-register_ioport_read(iobase + 0x01, 5, 1,
+register_ioport_read(isa-iobase + 0x01, 5, 1,
fdctrl_read_port, fdctrl);
-register_ioport_read(iobase + 0x07, 1, 1,
+register_ioport_read(isa-iobase + 0x07, 1, 1,
fdctrl_read_port, fdctrl);
-register_ioport_write(iobase + 0x01, 5, 1,
+register_ioport_write(isa-iobase + 0x01, 5, 1,
fdctrl_write_port, fdctrl);
-register_ioport_write(iobase + 0x07, 1, 1,
+register_ioport_write(isa-iobase + 0x07, 1, 1,
fdctrl_write_port, fdctrl);
-isa_init_ioport_range(dev, iobase, 6);
-isa_init_ioport(dev, iobase + 7);
+isa_init_ioport_range(dev, isa-iobase, 6);
+isa_init_ioport(dev, isa-iobase + 7);
-isa_init_irq(isa-busdev, fdctrl-irq, isairq);
-fdctrl-dma_chann = dma_chann;
+isa_init_irq(isa-busdev, fdctrl-irq, isa-irq);
+fdctrl-dma_chann = isa-dma;
-qdev_set_legacy_instance_id(dev-qdev, iobase, 2);
+qdev_set_legacy_instance_id(dev-qdev, isa-iobase, 2);
ret = fdctrl_init_common(fdctrl);
add_boot_device_path(isa-bootindexA, dev-qdev, /floppy@0);
@@ -1979,6 +1979,9 @@ static ISADeviceInfo isa_fdc_info = {
.qdev.vmsd = vmstate_isa_fdc,
.qdev.reset = fdctrl_external_reset_isa,
.qdev.props = (Property[]) {
+DEFINE_PROP_HEX32(iobase, FDCtrlISABus, iobase, 0x3f0),
+DEFINE_PROP_UINT32(irq, FDCtrlISABus, irq, 6),
+DEFINE_PROP_UINT32(dma, FDCtrlISABus, dma, 2),
DEFINE_PROP_DRIVE(driveA, FDCtrlISABus, state.drives[0].bs),
DEFINE_PROP_DRIVE(driveB, FDCtrlISABus, state.drives[1].bs),
DEFINE_PROP_INT32(bootindexA, FDCtrlISABus, bootindexA, -1),
--
1.7.5.3
[Qemu-devel] [PATCH v3 15/21] qapi: test schema used for unit tests
This is how QMP commands/parameters/types would be defined. We use a
subset of that functionality here to implement functions/types for unit
testing.
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
qapi-schema-test.json | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
create mode 100644 qapi-schema-test.json
diff --git a/qapi-schema-test.json b/qapi-schema-test.json
new file mode 100644
index 000..3acedad
--- /dev/null
+++ b/qapi-schema-test.json
@@ -0,0 +1,22 @@
+# *-*- Mode: Python -*-*
+
+# for testing enums
+{ 'enum': 'EnumOne',
+ 'data': [ 'value1', 'value2', 'value3' ] }
+{ 'type': 'NestedEnumsOne',
+ 'data': { 'enum1': 'EnumOne', '*enum2': 'EnumOne', 'enum3': 'EnumOne',
'*enum4': 'EnumOne' } }
+
+# for testing nested structs
+{ 'type': 'UserDefOne',
+ 'data': { 'integer': 'int', 'string': 'str' } }
+
+{ 'type': 'UserDefTwo',
+ 'data': { 'string': 'str',
+'dict': { 'string': 'str',
+ 'dict': { 'userdef': 'UserDefOne', 'string': 'str' },
+ '*dict2': { 'userdef': 'UserDefOne', 'string': 'str' } }
} }
+
+# testing commands
+{ 'command': 'user_def_cmd', 'data': {} }
+{ 'command': 'user_def_cmd1', 'data': {'ud1a': 'UserDefOne'} }
+{ 'command': 'user_def_cmd2', 'data': {'ud1a': 'UserDefOne', 'ud1b':
'UserDefOne'}, 'returns': 'UserDefTwo' }
--
1.7.0.4
[Qemu-devel] [PATCH v5 09/23] qdev: Add helpers for reading properties
Add helpers qdev_prop_get_*() to access all integer qdev properties
as well as string properties.
This effectively turns qdev properties from write-only to read/write,
allowing to inspect a private DeviceState.
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/qdev-properties.c | 53 ++
hw/qdev.h|8 +++
2 files changed, 61 insertions(+), 0 deletions(-)
diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 3ad6f93..92bc095 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -673,6 +673,24 @@ void qdev_prop_set(DeviceState *dev, const char *name,
void *src, enum PropertyT
qdev_prop_cpy(dev, prop, src);
}
+void *qdev_prop_get(DeviceState *dev, const char *name, enum PropertyType type)
+{
+Property *prop;
+
+prop = qdev_prop_find(dev, name);
+if (!prop) {
+fprintf(stderr, %s: property \%s.%s\ not found\n,
+__FUNCTION__, dev-info-name, name);
+abort();
+}
+if (prop-info-type != type) {
+fprintf(stderr, %s: property \%s.%s\ type mismatch\n,
+__FUNCTION__, dev-info-name, name);
+abort();
+}
+return qdev_get_prop_ptr(dev, prop);
+}
+
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_BIT);
@@ -683,36 +701,71 @@ void qdev_prop_set_bool(DeviceState *dev, const char
*name, bool value)
qdev_prop_set(dev, name, value, PROP_TYPE_BOOL);
}
+bool qdev_prop_get_bool(DeviceState *dev, const char *name)
+{
+return *(bool *)qdev_prop_get(dev, name, PROP_TYPE_BOOL);
+}
+
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_UINT8);
}
+uint8_t qdev_prop_get_uint8(DeviceState *dev, const char *name)
+{
+return *(uint8_t *)qdev_prop_get(dev, name, PROP_TYPE_UINT8);
+}
+
void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_UINT16);
}
+uint16_t qdev_prop_get_uint16(DeviceState *dev, const char *name)
+{
+return *(uint16_t *)qdev_prop_get(dev, name, PROP_TYPE_UINT16);
+}
+
void qdev_prop_set_uint32(DeviceState *dev, const char *name, uint32_t value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_UINT32);
}
+uint32_t qdev_prop_get_uint32(DeviceState *dev, const char *name)
+{
+return *(uint32_t *)qdev_prop_get(dev, name, PROP_TYPE_UINT32);
+}
+
void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_INT32);
}
+int32_t qdev_prop_get_int32(DeviceState *dev, const char *name)
+{
+return *(int32_t *)qdev_prop_get(dev, name, PROP_TYPE_INT32);
+}
+
void qdev_prop_set_uint64(DeviceState *dev, const char *name, uint64_t value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_UINT64);
}
+uint64_t qdev_prop_get_uint64(DeviceState *dev, const char *name)
+{
+return *(uint64_t *)qdev_prop_get(dev, name, PROP_TYPE_UINT64);
+}
+
void qdev_prop_set_string(DeviceState *dev, const char *name, char *value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_STRING);
}
+char *qdev_prop_get_string(DeviceState *dev, const char *name)
+{
+return (char *)qdev_prop_get(dev, name, PROP_TYPE_STRING);
+}
+
int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState
*value)
{
int res;
diff --git a/hw/qdev.h b/hw/qdev.h
index f05166d..71bd230 100644
--- a/hw/qdev.h
+++ b/hw/qdev.h
@@ -301,14 +301,22 @@ void *qdev_get_prop_ptr(DeviceState *dev, Property *prop);
int qdev_prop_exists(DeviceState *dev, const char *name);
int qdev_prop_parse(DeviceState *dev, const char *name, const char *value);
void qdev_prop_set(DeviceState *dev, const char *name, void *src, enum
PropertyType type);
+void *qdev_prop_get(DeviceState *dev, const char *name, enum PropertyType
type);
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value);
void qdev_prop_set_bool(DeviceState *dev, const char *name, bool value);
+bool qdev_prop_get_bool(DeviceState *dev, const char *name);
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value);
+uint8_t qdev_prop_get_uint8(DeviceState *dev, const char *name);
void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value);
+uint16_t qdev_prop_get_uint16(DeviceState *dev, const char *name);
void qdev_prop_set_uint32(DeviceState *dev, const char *name, uint32_t value);
+uint32_t qdev_prop_get_uint32(DeviceState *dev, const char *name);
void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value);
+int32_t qdev_prop_get_int32(DeviceState *dev, const char *name);
void qdev_prop_set_uint64(DeviceState *dev, const char *name, uint64_t value);
+uint64_t qdev_prop_get_uint64(DeviceState *dev, const char *name);
void qdev_prop_set_string(DeviceState *dev, const char *name, char *value);
+char
[Qemu-devel] [RFC v5 17/23] ide: Allow to discard I/O ports
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/ide/core.c |8
hw/ide/internal.h |1 +
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 95beb17..8fa2201 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -1761,6 +1761,14 @@ void ide_init_ioport(IDEBus *bus, int iobase, int
iobase2)
register_ioport_read(iobase, 4, 4, ide_data_readl, bus);
}
+void ide_discard_ioport(int iobase, int iobase2)
+{
+isa_unassign_ioport(iobase, 8);
+if (iobase2 != 0) {
+isa_unassign_ioport(iobase2, 1);
+}
+}
+
static bool is_identify_set(void *opaque, int version_id)
{
IDEState *s = opaque;
diff --git a/hw/ide/internal.h b/hw/ide/internal.h
index c2b35ec..dc0a2c9 100644
--- a/hw/ide/internal.h
+++ b/hw/ide/internal.h
@@ -564,6 +564,7 @@ void ide_init2(IDEBus *bus, qemu_irq irq);
void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0,
DriveInfo *hd1, qemu_irq irq);
void ide_init_ioport(IDEBus *bus, int iobase, int iobase2);
+void ide_discard_ioport(int iobase, int iobase2);
void ide_exec_cmd(IDEBus *bus, uint32_t val);
void ide_dma_cb(void *opaque, int ret);
--
1.7.5.3
[Qemu-devel] [PATCH v3 17/21] qapi: configure, Fix build issue when using seperate build dir
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com --- configure |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/configure b/configure index d3a3a96..3d73780 100755 --- a/configure +++ b/configure @@ -3549,6 +3549,7 @@ DIRS=tests tests/cris slirp audio block net pc-bios/optionrom DIRS=$DIRS pc-bios/spapr-rtas DIRS=$DIRS roms/seabios roms/vgabios DIRS=$DIRS fsdev ui +DIRS=$DIRS qapi FILES=Makefile tests/Makefile FILES=$FILES tests/cris/Makefile tests/cris/.gdbinit FILES=$FILES pc-bios/optionrom/Makefile pc-bios/keymaps -- 1.7.0.4
[Qemu-devel] [RFC v5 19/23] prep: Add pc87312 Super I/O emulation
This provides floppy and IDE controllers as well as
serial and parallel ports.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Create all devices ahead of time and enable/disable as needed.
Check the qdev properties for whether a change is necessary.
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
Makefile.objs |1 +
default-configs/ppc-softmmu.mak |2 +
hw/pc87312.c| 495 +++
3 files changed, 498 insertions(+), 0 deletions(-)
create mode 100644 hw/pc87312.c
diff --git a/Makefile.objs b/Makefile.objs
index fb57bbf..7bb6b1a 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -211,6 +211,7 @@ hw-obj-$(CONFIG_SMARTCARD_NSS) += ccid-card-emulated.o
hw-obj-$(CONFIG_OPENPIC) += openpic.o
hw-obj-$(CONFIG_PREP_PCI) += prep_pci.o
hw-obj-$(CONFIG_I82378) += i82378.o
+hw-obj-$(CONFIG_PC87312) += pc87312.o
# Mac shared devices
hw-obj-$(CONFIG_MACIO) += macio.o
hw-obj-$(CONFIG_CUDA) += cuda.o
diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
index df64ee6..0999008 100644
--- a/default-configs/ppc-softmmu.mak
+++ b/default-configs/ppc-softmmu.mak
@@ -7,6 +7,7 @@ CONFIG_ESCC=y
CONFIG_M48T59=y
CONFIG_VGA_PCI=y
CONFIG_SERIAL=y
+CONFIG_PARALLEL=y
CONFIG_I8254=y
CONFIG_PCKBD=y
CONFIG_FDC=y
@@ -15,6 +16,7 @@ CONFIG_I82374=y
CONFIG_OPENPIC=y
CONFIG_PREP_PCI=y
CONFIG_I82378=y
+CONFIG_PC87312=y
CONFIG_MACIO=y
CONFIG_PCSPK=y
CONFIG_CUDA=y
diff --git a/hw/pc87312.c b/hw/pc87312.c
new file mode 100644
index 000..14b58ed
--- /dev/null
+++ b/hw/pc87312.c
@@ -0,0 +1,495 @@
+/*
+ * QEMU National Semiconductor PC87312 (Super I/O)
+ *
+ * Copyright (c) 2010 Herve Poussineau
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include isa.h
+#include fdc.h
+#include ide.h
+
+//#define DEBUG_PC87312
+
+#ifdef DEBUG_PC87312
+#define DPRINTF(fmt, ...) \
+do { fprintf(stderr, pc87312: fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF(fmt, ...) \
+do {} while (0)
+#endif
+
+#define BADF(fmt, ...) \
+do { fprintf(stderr, pc87312 ERROR: fmt , ## __VA_ARGS__); } while (0)
+
+#define REG_FER 0
+#define REG_FAR 1
+#define REG_PTR 2
+
+#define FER regs[REG_FER]
+#define FAR regs[REG_FAR]
+#define PTR regs[REG_PTR]
+
+#define FER_PARALLEL_EN 0x01
+#define FER_UART1_EN 0x02
+#define FER_UART2_EN 0x04
+#define FER_FDC_EN0x08
+#define FER_FDC_4 0x10
+#define FER_FDC_ADDR 0x20
+#define FER_IDE_EN0x40
+#define FER_IDE_ADDR 0x80
+
+#define FAR_PARALLEL_ADDR 0x03
+#define FAR_UART1_ADDR0x0C
+#define FAR_UART2_ADDR0x30
+#define FAR_UART_3_4 0xC0
+
+#define PTR_POWER_DOWN0x01
+#define PTR_CLOCK_DOWN0x02
+#define PTR_PWDN 0x04
+#define PTR_IRQ_5_7 0x08
+#define PTR_UART1_TEST0x10
+#define PTR_UART2_TEST0x20
+#define PTR_LOCK_CONF 0x40
+#define PTR_EPP_MODE 0x80
+
+typedef struct PC87312State {
+uint8_t config; /* initial configuration */
+
+struct {
+DeviceState *dev;
+CharDriverState *chr;
+} parallel;
+
+struct {
+DeviceState *dev;
+CharDriverState *chr;
+} uart[2];
+
+struct {
+DeviceState *dev;
+BlockDriverState *drive[2];
+uint32_t base;
+} fdc;
+
+struct {
+DeviceState *dev;
+uint32_t base;
+} ide;
+
+uint8_t read_id_step;
+uint8_t selected_index;
+
+uint8_t regs[3];
+} PC87312State;
+
+
+/* Parallel port */
+
+static inline bool is_parallel_enabled(PC87312State *s)
+{
+return s-FER FER_PARALLEL_EN;
+}
+
+static const uint32_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
+
+static inline uint32_t get_parallel_iobase(PC87312State *s)
+{
+return parallel_base[s-FAR FAR_PARALLEL_ADDR];
+}
+
+static const uint32_t parallel_irq[] = { 5, 7, 5, 0 };
+
+static inline uint32_t get_parallel_irq(PC87312State *s)
+{
+int idx;
+idx = (s-FAR
[Qemu-devel] [RFC v5 11/23] isa: Allow to un-assign I/O ports
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/isa-bus.c | 15 +++
hw/isa.h |1 +
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index bbafb75..6e33d80 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -105,6 +105,21 @@ void isa_init_ioport(ISADevice *dev, uint16_t ioport)
isa_init_ioport_range(dev, ioport, 1);
}
+void isa_discard_ioport_range(ISADevice *dev, uint16_t start, uint16_t length)
+{
+int i, j;
+for (i = 0; i dev-nioports; i++) {
+if (dev-ioports[i] == start) {
+for (j = 0; j dev-nioports - i; j++) {
+dev-ioports[i + j] = dev-ioports[i + length + j];
+}
+dev-nioports -= length;
+break;
+}
+}
+assert(dev-nioports = 0);
+}
+
static int isa_qdev_init(DeviceState *qdev, DeviceInfo *base)
{
ISADevice *dev = DO_UPCAST(ISADevice, qdev, qdev);
diff --git a/hw/isa.h b/hw/isa.h
index 1eefd17..fe1a20c 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -34,6 +34,7 @@ qemu_irq isa_get_irq(int isairq);
void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
void isa_init_ioport(ISADevice *dev, uint16_t ioport);
void isa_init_ioport_range(ISADevice *dev, uint16_t start, uint16_t length);
+void isa_discard_ioport_range(ISADevice *dev, uint16_t start, uint16_t length);
void isa_qdev_register(ISADeviceInfo *info);
ISADevice *isa_create(const char *name);
ISADevice *isa_try_create(const char *name);
--
1.7.5.3
[Qemu-devel] [RFC 22/23] prep: qdev'ify System I/O (WIP)
PReP defines a number of 1-byte registers
Signed-off-by: Hervé Poussineau hpous...@reactos.org
v1:
* Rebased: Fix I/O port types for ppc64 compatibility.
Use Little Endian for parity error register.
* Drop iobase property. It was not being set to another value,
ignored for reads and writes, and the spec makes no promises
about register locations being en bloque.
* Generalize this as System I/O rather than I/O 0x800 and
integrate Special Port 0x0092. It was implementing the parity
error register at 0xBFFFEFF0 anyway.
* The v1.1 spec has parity read as 0x0840 rather than 0x841, so
cover both.
* Turn board identification into a qdev property.
* Migrate remaining standard I/O ports from prep machine.
* Add some VMState support.
Add to 40p machine.
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
Makefile.target|1 +
hw/ppc_prep.c | 165 ++
hw/ppc_prep.h | 24
hw/prep_systemio.c | 335
4 files changed, 399 insertions(+), 126 deletions(-)
create mode 100644 hw/ppc_prep.h
create mode 100644 hw/prep_systemio.c
diff --git a/Makefile.target b/Makefile.target
index b1a0f6d..b67b1f7 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -242,6 +242,7 @@ obj-ppc-y = ppc.o
obj-ppc-y += vga.o
# PREP target
obj-ppc-y += i8259.o mc146818rtc.o
+obj-ppc-y += prep_systemio.o
obj-ppc-y += ppc_prep.o
# OldWorld PowerMac
obj-ppc-y += ppc_oldworld.o
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 4759a03..6ae1635 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -21,6 +21,7 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
+#include ppc_prep.h
#include hw.h
#include nvram.h
#include pc.h
@@ -258,117 +259,55 @@ static CPUReadMemoryFunc * const PPC_XCSR_read[] = {
#endif
/* Fake super-io ports for PREP platform (Intel 82378ZB) */
-typedef struct sysctrl_t {
-qemu_irq reset_irq;
-M48t59State *nvram;
-uint8_t state;
-uint8_t syscontrol;
-uint8_t fake_io[2];
-int contiguous_map;
-int endian;
-} sysctrl_t;
-
-enum {
-STATE_HARDFILE = 0x01,
-};
-
-static sysctrl_t *sysctrl;
-
static void PREP_io_write (void *opaque, uint32_t addr, uint32_t val)
{
-sysctrl_t *sysctrl = opaque;
+uint8_t *fake_io = opaque;
PPC_IO_DPRINTF(0x%08 PRIx32 = 0x%02 PRIx32 \n, addr - PPC_IO_BASE,
val);
-sysctrl-fake_io[addr - 0x0398] = val;
+fake_io[addr - 0x0398] = val;
}
static uint32_t PREP_io_read (void *opaque, uint32_t addr)
{
-sysctrl_t *sysctrl = opaque;
+uint8_t *fake_io = opaque;
PPC_IO_DPRINTF(0x%08 PRIx32 = 0x%02 PRIx32 \n, addr - PPC_IO_BASE,
- sysctrl-fake_io[addr - 0x0398]);
-return sysctrl-fake_io[addr - 0x0398];
+ fake_io[addr - 0x0398]);
+return fake_io[addr - 0x0398];
}
+#if 0
static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val)
{
-sysctrl_t *sysctrl = opaque;
-
PPC_IO_DPRINTF(0x%08 PRIx32 = 0x%02 PRIx32 \n,
addr - PPC_IO_BASE, val);
switch (addr) {
-case 0x0092:
-/* Special port 92 */
-/* Check soft reset asked */
-if (val 0x01) {
-qemu_irq_raise(sysctrl-reset_irq);
-} else {
-qemu_irq_lower(sysctrl-reset_irq);
-}
-/* Check LE mode */
-if (val 0x02) {
-sysctrl-endian = 1;
-} else {
-sysctrl-endian = 0;
-}
-break;
-case 0x0800:
-/* Motorola CPU configuration register : read-only */
-break;
-case 0x0802:
-/* Motorola base module feature register : read-only */
-break;
-case 0x0803:
-/* Motorola base module status register : read-only */
-break;
-case 0x0808:
-/* Hardfile light register */
-if (val 1)
-sysctrl-state |= STATE_HARDFILE;
-else
-sysctrl-state = ~STATE_HARDFILE;
-break;
case 0x0810:
/* Password protect 1 register */
-if (sysctrl-nvram != NULL)
-m48t59_toggle_lock(sysctrl-nvram, 1);
+// TODO m48t59_toggle_lock(sysctrl-nvram, 1);
break;
case 0x0812:
/* Password protect 2 register */
-if (sysctrl-nvram != NULL)
-m48t59_toggle_lock(sysctrl-nvram, 2);
+// TODO m48t59_toggle_lock(sysctrl-nvram, 2);
break;
case 0x0814:
/* L2 invalidate register */
//tlb_flush(first_cpu, 1);
break;
-case 0x081C:
-/* system control register */
-sysctrl-syscontrol = val 0x0F;
-break;
-case 0x0850:
-/* I/O map type register */
-sysctrl-contiguous_map = val 0x01;
-break;
default:
printf(ERROR: unaffected IO port write: %04 PRIx32
= %02 PRIx32\n, addr,
[Qemu-devel] [PATCH v3 18/21] qapi: Makefile changes to build test-visitor
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com --- Makefile | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/Makefile b/Makefile index 306cd9b..6083085 100644 --- a/Makefile +++ b/Makefile @@ -145,6 +145,19 @@ check-qlist: check-qlist.o qlist.o qint.o $(CHECK_PROG_DEPS) check-qfloat: check-qfloat.o qfloat.o $(CHECK_PROG_DEPS) check-qjson: check-qjson.o qfloat.o qint.o qdict.o qstring.o qlist.o qbool.o qjson.o json-streamer.o json-lexer.o json-parser.o error.o qerror.o qemu-error.o $(CHECK_PROG_DEPS) +qapi-dir := qapi-generated +$(qapi-obj-y) test-visitor.o: QEMU_CFLAGS += -I $(qapi-dir) + +$(qapi-dir)/test-qapi-types.c: $(qapi-dir)/test-qapi-types.h +$(qapi-dir)/test-qapi-types.h: $(SRC_PATH)/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-types.py + $(call quiet-command,python $(SRC_PATH)/scripts/qapi-types.py -o $(qapi-dir) -p test- $, GEN $@) +$(qapi-dir)/test-qapi-visit.c: $(qapi-dir)/test-qapi-visit.h +$(qapi-dir)/test-qapi-visit.h: $(SRC_PATH)/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-visit.py + $(call quiet-command,python $(SRC_PATH)/scripts/qapi-visit.py -o $(qapi-dir) -p test- $, GEN $@) + +test-visitor.o: $(addprefix $(qapi-dir)/, test-qapi-types.c test-qapi-types.h test-qapi-visit.c test-qapi-visit.h) +test-visitor: test-visitor.o qfloat.o qint.o qdict.o qstring.o qlist.o qbool.o $(qapi-obj-y) error.o osdep.o qemu-malloc.o $(oslib-obj-y) qjson.o json-streamer.o json-lexer.o json-parser.o qerror.o qemu-error.o qemu-tool.o $(qapi-dir)/test-qapi-visit.o $(qapi-dir)/test-qapi-types.o + QEMULIBS=libhw32 libhw64 libuser libdis libdis-user clean: @@ -152,11 +165,12 @@ clean: rm -f config.mak op-i386.h opc-i386.h gen-op-i386.h op-arm.h opc-arm.h gen-op-arm.h rm -f qemu-options.def rm -f *.o *.d *.a $(TOOLS) TAGS cscope.* *.pod *~ */*~ - rm -f slirp/*.o slirp/*.d audio/*.o audio/*.d block/*.o block/*.d net/*.o net/*.d fsdev/*.o fsdev/*.d ui/*.o ui/*.d + rm -f slirp/*.o slirp/*.d audio/*.o audio/*.d block/*.o block/*.d net/*.o net/*.d fsdev/*.o fsdev/*.d ui/*.o ui/*.d qapi/*.o qapi/*.d rm -f qemu-img-cmds.h rm -f trace.c trace.h trace.c-timestamp trace.h-timestamp rm -f trace-dtrace.dtrace trace-dtrace.dtrace-timestamp rm -f trace-dtrace.h trace-dtrace.h-timestamp + rm -rf $(qapi-dir) $(MAKE) -C tests clean for d in $(ALL_SUBDIRS) $(QEMULIBS) libcacard; do \ if test -d $$d; then $(MAKE) -C $$d $@ || exit 1; fi; \ -- 1.7.0.4
[Qemu-devel] [RFC 04/23] 40p: Add PCI host
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Avoid global variable for PCIBus. Inline PCI bus creation.
Suppress potential gcc 4.6 write-only variable warning.
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/ppc_prep.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 071c149..50cb6c7 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -38,6 +38,7 @@
#include loader.h
#include mc146818rtc.h
#include blockdev.h
+#include sysbus.h
//#define HARD_DEBUG_PPC_IO
//#define DEBUG_PPC_IO
@@ -774,6 +775,8 @@ static void ibm_40p_init(ram_addr_t ram_size,
char *filename;
int bios_size;
ram_addr_t ram_offset, bios_offset;
+DeviceState *dev;
+PCIBus *pci_bus;
// IBM E15 graphic adapter (S3 Vision864)
// PowerPC 601
@@ -816,6 +819,11 @@ static void ibm_40p_init(ram_addr_t ram_size,
if (filename) {
qemu_free(filename);
}
+
+/* PCI host */
+dev = sysbus_create_simple(prep-pci, 0x8080, NULL);
+pci_bus = (PCIBus *)qdev_get_child_bus(dev, pci);
+(void)pci_bus;
}
static QEMUMachine prep_machine = {
--
1.7.5.3
[Qemu-devel] [RFC 20/23] 40p: Add the Super I/O chip (pc87312)
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Set the floppy properties with raw qdev_prop_set() for now because
qdev_prop_set_drive() also calls bdrv_attach(), which can't be called
twice for a drive. Having it attached to the isa-fdc seems nicer.
Signed-off-by: Andreas Färber andreas.faer...@web.de
prep: Manually set floppy properties
---
hw/ppc_prep.c | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 27e1d14..935d1e9 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -779,6 +779,8 @@ static void ibm_40p_init(ram_addr_t ram_size,
DeviceState *dev;
PCIBus *pci_bus;
PCIDevice *pci;
+ISADevice *isa;
+DriveInfo *drive;
// IBM E15 graphic adapter (S3 Vision864)
// PowerPC 601
@@ -831,6 +833,21 @@ static void ibm_40p_init(ram_addr_t ram_size,
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
qdev_connect_gpio_out(pci-qdev, 0, env-irq_inputs[PPC6xx_INPUT_INT]);
qdev_connect_gpio_out(pci-qdev, 1, *cpu_exit_irq);
+
+/* Super I/O (parallel + serial ports) */
+isa = isa_create(isa-pc87312);
+qdev_prop_set_chr(isa-qdev, parallel, parallel_hds[0]);
+qdev_prop_set_chr(isa-qdev, uart1, serial_hds[0]);
+qdev_prop_set_chr(isa-qdev, uart2, serial_hds[1]);
+drive = drive_get(IF_FLOPPY, 0, 0);
+if (drive) {
+qdev_prop_set(isa-qdev, floppyA, drive-bdrv, PROP_TYPE_DRIVE);
+}
+drive = drive_get(IF_FLOPPY, 0, 1);
+if (drive) {
+qdev_prop_set(isa-qdev, floppyB, drive-bdrv, PROP_TYPE_DRIVE);
+}
+qdev_init_nofail(isa-qdev);
}
static QEMUMachine prep_machine = {
--
1.7.5.3
[Qemu-devel] [PATCH v3 21/21] qapi: add QAPI code generation documentation
Signed-off-by: Michael Roth mdr...@linux.vnet.ibm.com
---
docs/qapi-code-gen.txt | 316
1 files changed, 316 insertions(+), 0 deletions(-)
create mode 100644 docs/qapi-code-gen.txt
diff --git a/docs/qapi-code-gen.txt b/docs/qapi-code-gen.txt
new file mode 100644
index 000..b7befb5
--- /dev/null
+++ b/docs/qapi-code-gen.txt
@@ -0,0 +1,316 @@
+= How to use the QAPI code generator =
+
+* Note: as of this writing, QMP does not use QAPI. Eventually QMP
+commands will be converted to use QAPI internally. The following
+information describes QMP/QAPI as it will exist after the
+conversion.
+
+QAPI is a native C API within QEMU which provides management-level
+functionality to internal/external users. For external
+users/processes, this interface is made available by a JSON-based
+QEMU Monitor protocol that is provided by the QMP server.
+
+To map QMP-defined interfaces to the native C QAPI implementations,
+a JSON-based schema is used to define types and function
+signatures, and a set of scripts is used to generate types/signatures,
+and marshaling/dispatch code. The QEMU Guest Agent also uses these
+scripts, paired with a seperate schema, to generate
+marshaling/dispatch code for the guest agent server running in the
+guest.
+
+This document will describe how the schemas, scripts, and resulting
+code is used.
+
+
+== QMP/Guest agent schema ==
+
+This file defines the types, commands, and events used by QMP. It should
+fully describe the interface used by QMP.
+
+This file is designed to be loosely based on JSON although it's technically
+executable Python. While dictionaries are used, they are parsed as
+OrderedDicts so that ordering is preserved.
+
+There are two basic syntaxes used, type definitions and command definitions.
+
+The first syntax defines a type and is represented by a dictionary. There are
+two kinds of types that are supported: complex user-defined types, and enums.
+
+A complex type is a dictionary containing a single key who's value is a
+dictionary. This corresponds to a struct in C or an Object in JSON. An
+example of a complex type is:
+
+ { 'type': 'MyType',
+ 'data' { 'member1': 'str', 'member2': 'int', '*member3': 'str } }
+
+The use of '*' as a prefix to the name means the member is optional. Optional
+members should always be added to the end of the dictionary to preserve
+backwards compatibility.
+
+An enumeration type is a dictionary containing a single key who's value is a
+list of strings. An example enumeration is:
+
+ { 'enum': 'MyEnum', 'data': [ 'value1', 'value2', 'value3' ] }
+
+Generally speaking, complex types and enums should always use CamelCase for
+the type names.
+
+Commands are defined by using a list containing three members. The first
+member is the command name, the second member is a dictionary containing
+arguments, and the third member is the return type.
+
+An example command is:
+
+ { 'command': 'my-command',
+ 'data': { 'arg1': 'str', '*arg2': 'str' },
+ 'returns': 'str' ]
+
+Command names should be all lower case with words separated by a hyphen.
+
+
+== Code generation ==
+
+Schemas are fed into 3 scripts to generate all the code/files that, paired
+with the core QAPI libraries, comprise everything required to take JSON
+commands read in by a QMP/guest agent server, unmarshal the arguments into
+the underlying C types, call into the corresponding C function, and map the
+response back to a QMP/guest agent response to be returned to the user.
+
+As an example, we'll use the following schema, which describes a single
+complex user-defined type (which will produce a C struct, along with a list
+node structure that can be used to chain together a list of such types in
+case we want to accept/return a list of this type with a command), and a
+command which takes that type as a parameter and returns the same type:
+
+mdroth@illuin:~/w/qemu2.git$ cat example-schema.json
+{ 'type': 'UserDefOne',
+ 'data': { 'integer': 'int', 'string': 'str' } }
+
+{ 'command': 'my-command',
+ 'data':{'arg1': 'UserDefOne'},
+ 'returns': 'UserDefOne' }
+mdroth@illuin:~/w/qemu2.git$
+
+=== scripts/qapi-types.py ===
+
+Used to generate the C types defined by a schema. The following files are
+created:
+
+$(prefix)qapi-types.h - C types corresponding to types defined in
+the schema you pass in
+$(prefix)qapi-types.c - Cleanup functions for the above C types
+
+The $(prefix) is an optional parameter used as a namespace to keep the
+generated code from one schema/code-generation separated from others so code
+can be generated/used from multiple schemas without clobbering previously
+created code.
+
+Example:
+
+mdroth@illuin:~/w/qemu2.git$ python scripts/qapi-types.py \
+ --output-dir=qapi-generated --prefix=example- example-schema.json
+mdroth@illuin:~/w/qemu2.git$ cat qapi-generated/example-qapi-types.c
+/* AUTOMATICALLY GENERATED, DO NOT
[Qemu-devel] [RFC 02/23] prep: qdev'ify PCI
Don't always keep pointer to PIC, but keep only references
to required IRQs. Add a PCI host.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Avoid adding qemu_irq state by reusing SysBus facilities.
This allows to qdev'ify the PCIDevice, too, by banning
hardcoded IRQ numbers into pci_prep_init() wrapper.
Cc: Michael S. Tsirkin m...@redhat.com
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/prep_pci.c | 126 -
1 files changed, 97 insertions(+), 29 deletions(-)
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index f88b825..2554d86 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -2,6 +2,8 @@
* QEMU PREP PCI host
*
* Copyright (c) 2006 Fabrice Bellard
+ * Copyright (c) 2010 Herve Poussineau
+ * Copyright (c) 2010-2011 Andreas Faerber
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the Software), to
deal
@@ -27,7 +29,14 @@
#include pci_host.h
#include prep_pci.h
-typedef PCIHostState PREPPCIState;
+typedef struct PREPPCIState {
+PCIHostState host_state;
+} PREPPCIState;
+
+typedef struct PRePPCIBusState {
+SysBusDevice busdev;
+PREPPCIState state;
+} PRePPCIBusState;
static inline uint32_t PPC_PCIIO_config(target_phys_addr_t addr)
{
@@ -43,28 +52,28 @@ static inline uint32_t PPC_PCIIO_config(target_phys_addr_t
addr)
static void PPC_PCIIO_writeb (void *opaque, target_phys_addr_t addr, uint32_t
val)
{
PREPPCIState *s = opaque;
-pci_data_write(s-bus, PPC_PCIIO_config(addr), val, 1);
+pci_data_write(s-host_state.bus, PPC_PCIIO_config(addr), val, 1);
}
static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr, uint32_t
val)
{
PREPPCIState *s = opaque;
val = bswap16(val);
-pci_data_write(s-bus, PPC_PCIIO_config(addr), val, 2);
+pci_data_write(s-host_state.bus, PPC_PCIIO_config(addr), val, 2);
}
static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr, uint32_t
val)
{
PREPPCIState *s = opaque;
val = bswap32(val);
-pci_data_write(s-bus, PPC_PCIIO_config(addr), val, 4);
+pci_data_write(s-host_state.bus, PPC_PCIIO_config(addr), val, 4);
}
static uint32_t PPC_PCIIO_readb (void *opaque, target_phys_addr_t addr)
{
PREPPCIState *s = opaque;
uint32_t val;
-val = pci_data_read(s-bus, PPC_PCIIO_config(addr), 1);
+val = pci_data_read(s-host_state.bus, PPC_PCIIO_config(addr), 1);
return val;
}
@@ -72,7 +81,7 @@ static uint32_t PPC_PCIIO_readw (void *opaque,
target_phys_addr_t addr)
{
PREPPCIState *s = opaque;
uint32_t val;
-val = pci_data_read(s-bus, PPC_PCIIO_config(addr), 2);
+val = pci_data_read(s-host_state.bus, PPC_PCIIO_config(addr), 2);
val = bswap16(val);
return val;
}
@@ -81,7 +90,7 @@ static uint32_t PPC_PCIIO_readl (void *opaque,
target_phys_addr_t addr)
{
PREPPCIState *s = opaque;
uint32_t val;
-val = pci_data_read(s-bus, PPC_PCIIO_config(addr), 4);
+val = pci_data_read(s-host_state.bus, PPC_PCIIO_config(addr), 4);
val = bswap32(val);
return val;
}
@@ -105,40 +114,99 @@ static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
static void prep_set_irq(void *opaque, int irq_num, int level)
{
-qemu_irq *pic = opaque;
+PRePPCIBusState *s = opaque;
+SysBusDevice *sysbus = s-busdev;
-qemu_set_irq(pic[(irq_num 1) ? 11 : 9] , level);
+if (sysbus-irqp[irq_num] != NULL) {
+qemu_set_irq(*sysbus-irqp[irq_num], level);
+}
}
+static int prep_pci_host_init(PCIDevice *d)
+{
+pci_config_set_vendor_id(d-config, PCI_VENDOR_ID_MOTOROLA);
+pci_config_set_device_id(d-config, PCI_DEVICE_ID_MOTOROLA_RAVEN);
+d-config[0x08] = 0x00; // revision
+pci_config_set_class(d-config, PCI_CLASS_BRIDGE_HOST);
+d-config[0x0C] = 0x08; // cache_line_size
+d-config[0x0D] = 0x10; // latency_timer
+d-config[0x34] = 0x00; // capabilities_pointer
+
+return 0;
+}
+
+/* Motorola Raven */
+static PCIDeviceInfo prep_pci_host_info = {
+.qdev.name = prep-pci,
+.qdev.size = sizeof(PCIDevice),
+.init = prep_pci_host_init,
+.qdev.props = (Property[]) {
+DEFINE_PROP_END_OF_LIST()
+},
+};
+
PCIBus *pci_prep_init(qemu_irq *pic)
{
-PREPPCIState *s;
-PCIDevice *d;
-int PPC_io_memory;
+DeviceState *dev;
+SysBusDevice *sysbus;
+
+/* PReP PCI bus */
+dev = qdev_create(NULL, prep-pci);
+sysbus = sysbus_from_qdev(dev);
-s = qemu_mallocz(sizeof(PREPPCIState));
-s-bus = pci_register_bus(NULL, pci,
- prep_set_irq, prep_map_irq, pic, 0, 4);
+/* Allocate and initialize both IRQs before init */
+sysbus_init_irq(sysbus, pic[9]);
+sysbus_init_irq(sysbus, pic[11]);
-pci_host_conf_register_ioport(0xcf8, s);
+qdev_init_nofail(dev);
-pci_host_data_register_ioport(0xcfc, s);
+
[Qemu-devel] [RFC v5 13/23] parallel: Implement ISA state callbacks
Add enabled qdev property, and implement enable and disable callbacks.
Cc: Gerd Hoffmann kra...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/parallel.c | 75 +
1 files changed, 54 insertions(+), 21 deletions(-)
diff --git a/hw/parallel.c b/hw/parallel.c
index cc853a5..8315894 100644
--- a/hw/parallel.c
+++ b/hw/parallel.c
@@ -446,6 +446,55 @@ static void parallel_reset(void *opaque)
s-last_read_offset = ~0U;
}
+static int parallel_isa_enable(ISADevice *dev)
+{
+ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
+ParallelState *s = isa-state;
+int base;
+
+isa_init_irq(dev, s-irq, isa-isairq);
+
+base = isa-iobase;
+if (s-hw_driver) {
+register_ioport_write(base, 8, 1, parallel_ioport_write_hw, s);
+register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s);
+isa_init_ioport_range(dev, base, 8);
+
+register_ioport_write(base + 4, 1, 2,
parallel_ioport_eppdata_write_hw2, s);
+register_ioport_read(base + 4, 1, 2, parallel_ioport_eppdata_read_hw2,
s);
+register_ioport_write(base + 4, 1, 4,
parallel_ioport_eppdata_write_hw4, s);
+register_ioport_read(base + 4, 1, 4, parallel_ioport_eppdata_read_hw4,
s);
+isa_init_ioport(dev, base + 4);
+register_ioport_write(base + 0x400, 8, 1, parallel_ioport_ecp_write,
s);
+register_ioport_read(base + 0x400, 8, 1, parallel_ioport_ecp_read, s);
+isa_init_ioport_range(dev, base + 0x400, 8);
+}
+else {
+register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s);
+register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s);
+isa_init_ioport_range(dev, base, 8);
+}
+return 0;
+}
+
+static int parallel_isa_disable(ISADevice *dev)
+{
+ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
+ParallelState *s = isa-state;
+
+isa_uninit_irq(dev, s-irq, isa-isairq);
+
+isa_discard_ioport_range(dev, isa-iobase, 8);
+isa_unassign_ioport(isa-iobase, 8);
+if (s-hw_driver) {
+isa_discard_ioport_range(dev, isa-iobase + 4, 1);
+isa_unassign_ioport(isa-iobase + 4, 1);
+isa_discard_ioport_range(dev, isa-iobase + 0x400, 8);
+isa_unassign_ioport(isa-iobase + 0x400, 8);
+}
+return 0;
+}
+
static const int isa_parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static int parallel_isa_initfn(ISADevice *dev)
@@ -453,7 +502,6 @@ static int parallel_isa_initfn(ISADevice *dev)
static int index;
ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
ParallelState *s = isa-state;
-int base;
uint8_t dummy;
if (!s-chr) {
@@ -469,8 +517,6 @@ static int parallel_isa_initfn(ISADevice *dev)
isa-iobase = isa_parallel_io[isa-index];
index++;
-base = isa-iobase;
-isa_init_irq(dev, s-irq, isa-isairq);
qemu_register_reset(parallel_reset, s);
if (qemu_chr_ioctl(s-chr, CHR_IOCTL_PP_READ_STATUS, dummy) == 0) {
@@ -478,24 +524,8 @@ static int parallel_isa_initfn(ISADevice *dev)
s-status = dummy;
}
-if (s-hw_driver) {
-register_ioport_write(base, 8, 1, parallel_ioport_write_hw, s);
-register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s);
-isa_init_ioport_range(dev, base, 8);
-
-register_ioport_write(base+4, 1, 2, parallel_ioport_eppdata_write_hw2,
s);
-register_ioport_read(base+4, 1, 2, parallel_ioport_eppdata_read_hw2,
s);
-register_ioport_write(base+4, 1, 4, parallel_ioport_eppdata_write_hw4,
s);
-register_ioport_read(base+4, 1, 4, parallel_ioport_eppdata_read_hw4,
s);
-isa_init_ioport(dev, base+4);
-register_ioport_write(base+0x400, 8, 1, parallel_ioport_ecp_write, s);
-register_ioport_read(base+0x400, 8, 1, parallel_ioport_ecp_read, s);
-isa_init_ioport_range(dev, base+0x400, 8);
-}
-else {
-register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s);
-register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s);
-isa_init_ioport_range(dev, base, 8);
+if (dev-enabled) {
+parallel_isa_enable(dev);
}
return 0;
}
@@ -581,11 +611,14 @@ static ISADeviceInfo parallel_isa_info = {
.qdev.name = isa-parallel,
.qdev.size = sizeof(ISAParallelState),
.init = parallel_isa_initfn,
+.enable = parallel_isa_enable,
+.disable= parallel_isa_disable,
.qdev.props = (Property[]) {
DEFINE_PROP_UINT32(index, ISAParallelState, index, -1),
DEFINE_PROP_HEX32(iobase, ISAParallelState, iobase, -1),
DEFINE_PROP_UINT32(irq, ISAParallelState, isairq, 7),
DEFINE_PROP_CHR(chardev, ISAParallelState, state.chr),
+DEFINE_PROP_BOOL(enabled, ISAParallelState, dev.enabled, true),
DEFINE_PROP_END_OF_LIST(),
},
};
--
[Qemu-devel] [PATCH v5 08/23] qdev: Add support for property type bool
VMState supports the type bool but qdev instead supports bit, backed by
uint32_t. Therefore let's add DEFINE_PROP_BOOL() and qdev_prop_set_bool().
Since, e.g., enabled=on does not look nice, parse/print yes and no.
Also support on/off as secondary values and vice versa.
Cc: Juan Quintela quint...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/qdev-properties.c | 43 +--
hw/qdev.h|5 +
2 files changed, 46 insertions(+), 2 deletions(-)
diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index eff2d24..3ad6f93 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -40,9 +40,11 @@ static void qdev_prop_cpy(DeviceState *dev, Property *props,
void *src)
/* Bit */
static int parse_bit(DeviceState *dev, Property *prop, const char *str)
{
-if (!strncasecmp(str, on, 2))
+if (!strncasecmp(str, on, 2) ||
+!strncasecmp(str, yes, 3))
bit_prop_set(dev, prop, true);
-else if (!strncasecmp(str, off, 3))
+else if (!strncasecmp(str, off, 3) ||
+ !strncasecmp(str, no, 2))
bit_prop_set(dev, prop, false);
else
return -EINVAL;
@@ -63,6 +65,38 @@ PropertyInfo qdev_prop_bit = {
.print = print_bit,
};
+/* --- bool --- */
+
+static int parse_bool(DeviceState *dev, Property *prop, const char *str)
+{
+bool *ptr = qdev_get_prop_ptr(dev, prop);
+
+if (strncasecmp(str, yes, 3) == 0 ||
+strncasecmp(str, on, 2) == 0) {
+*ptr = true;
+} else if (strncasecmp(str, no, 2) == 0 ||
+ strncasecmp(str, off, 3) == 0) {
+*ptr = false;
+} else {
+return -EINVAL;
+}
+return 0;
+}
+
+static int print_bool(DeviceState *dev, Property *prop, char *dest, size_t len)
+{
+bool *ptr = qdev_get_prop_ptr(dev, prop);
+return snprintf(dest, len, (*ptr) ? yes : no);
+}
+
+PropertyInfo qdev_prop_bool = {
+.name = yes/no,
+.type = PROP_TYPE_BOOL,
+.size = sizeof(bool),
+.parse = parse_bool,
+.print = print_bool,
+};
+
/* --- 8bit integer --- */
static int parse_uint8(DeviceState *dev, Property *prop, const char *str)
@@ -644,6 +678,11 @@ void qdev_prop_set_bit(DeviceState *dev, const char *name,
bool value)
qdev_prop_set(dev, name, value, PROP_TYPE_BIT);
}
+void qdev_prop_set_bool(DeviceState *dev, const char *name, bool value)
+{
+qdev_prop_set(dev, name, value, PROP_TYPE_BOOL);
+}
+
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_UINT8);
diff --git a/hw/qdev.h b/hw/qdev.h
index 8a13ec9..f05166d 100644
--- a/hw/qdev.h
+++ b/hw/qdev.h
@@ -101,6 +101,7 @@ enum PropertyType {
PROP_TYPE_VLAN,
PROP_TYPE_PTR,
PROP_TYPE_BIT,
+PROP_TYPE_BOOL,
};
struct PropertyInfo {
@@ -219,6 +220,7 @@ int do_device_del(Monitor *mon, const QDict *qdict, QObject
**ret_data);
/*** qdev-properties.c ***/
extern PropertyInfo qdev_prop_bit;
+extern PropertyInfo qdev_prop_bool;
extern PropertyInfo qdev_prop_uint8;
extern PropertyInfo qdev_prop_uint16;
extern PropertyInfo qdev_prop_uint32;
@@ -257,6 +259,8 @@ extern PropertyInfo qdev_prop_pci_devfn;
.defval= (bool[]) { (_defval) }, \
}
+#define DEFINE_PROP_BOOL(_n, _s, _f, _d)\
+DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_bool, bool)
#define DEFINE_PROP_UINT8(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint8, uint8_t)
#define DEFINE_PROP_UINT16(_n, _s, _f, _d) \
@@ -298,6 +302,7 @@ int qdev_prop_exists(DeviceState *dev, const char *name);
int qdev_prop_parse(DeviceState *dev, const char *name, const char *value);
void qdev_prop_set(DeviceState *dev, const char *name, void *src, enum
PropertyType type);
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value);
+void qdev_prop_set_bool(DeviceState *dev, const char *name, bool value);
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value);
void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value);
void qdev_prop_set_uint32(DeviceState *dev, const char *name, uint32_t value);
--
1.7.5.3
[Qemu-devel] [RFC 06/23] prep: Add i82378 PCI-to-ISA bridge emulation
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Inverse endianness in order to work on x86 and ppc host.
Create ISA bus in this device (suggested by Markus).
Cc: Markus Armbruster arm...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
Makefile.objs |1 +
default-configs/ppc-softmmu.mak |2 +
hw/i82378.c | 298 +++
hw/pci_ids.h|1 +
4 files changed, 302 insertions(+), 0 deletions(-)
create mode 100644 hw/i82378.c
diff --git a/Makefile.objs b/Makefile.objs
index b0e4c09..fb57bbf 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -210,6 +210,7 @@ hw-obj-$(CONFIG_SMARTCARD_NSS) += ccid-card-emulated.o
# PPC devices
hw-obj-$(CONFIG_OPENPIC) += openpic.o
hw-obj-$(CONFIG_PREP_PCI) += prep_pci.o
+hw-obj-$(CONFIG_I82378) += i82378.o
# Mac shared devices
hw-obj-$(CONFIG_MACIO) += macio.o
hw-obj-$(CONFIG_CUDA) += cuda.o
diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
index 1d1a7c2..df64ee6 100644
--- a/default-configs/ppc-softmmu.mak
+++ b/default-configs/ppc-softmmu.mak
@@ -14,7 +14,9 @@ CONFIG_DMA=y
CONFIG_I82374=y
CONFIG_OPENPIC=y
CONFIG_PREP_PCI=y
+CONFIG_I82378=y
CONFIG_MACIO=y
+CONFIG_PCSPK=y
CONFIG_CUDA=y
CONFIG_ADB=y
CONFIG_MAC_NVRAM=y
diff --git a/hw/i82378.c b/hw/i82378.c
new file mode 100644
index 000..181e441
--- /dev/null
+++ b/hw/i82378.c
@@ -0,0 +1,298 @@
+/*
+ * QEMU Intel i82378 emulation (PCI to ISA bridge)
+ *
+ * Copyright (c) 2010-2011 Herve Poussineau
+ * Copyright (c) 2003-2007 Jocelyn Mayer
+ * Copyright (c) 2010 Andreas Faerber
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see http://www.gnu.org/licenses/.
+ */
+
+#include pci.h
+#include pc.h
+
+//#define DEBUG_I82378
+
+#ifdef DEBUG_I82378
+#define DPRINTF(fmt, ...) \
+do { fprintf(stderr, i82378: fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF(fmt, ...) \
+do {} while (0)
+#endif
+
+#define BADF(fmt, ...) \
+do { fprintf(stderr, i82378 ERROR: fmt , ## __VA_ARGS__); } while (0)
+
+#ifdef HOST_WORDS_BIGENDIAN
+#define DEVICE_INVERSE_ENDIAN DEVICE_LITTLE_ENDIAN
+#else
+#define DEVICE_INVERSE_ENDIAN DEVICE_BIG_ENDIAN
+#endif
+
+typedef struct I82378State {
+qemu_irq out[2];
+int s_io;
+int s_mem;
+} I82378State;
+
+typedef struct PCIi82378State {
+PCIDevice pci_dev;
+uint32_t isa_io_base;
+uint32_t isa_mem_base;
+I82378State state;
+} PCIi82378State;
+
+static inline target_phys_addr_t i82378_io_address(I82378State *state,
+ target_phys_addr_t addr)
+{
+if (true) {
+return addr 0x;
+} else {
+return (addr 0x1F) | ((addr 0x007FFF000) 7);
+}
+}
+
+static void i82378_io_writeb(void *opaque,
+ target_phys_addr_t addr, uint32_t value)
+{
+I82378State *s = opaque;
+DPRINTF(%s: TARGET_FMT_plx =%02x\n, __func__, addr, value);
+addr = i82378_io_address(s, addr);
+cpu_outb(addr, value);
+}
+
+static void i82378_io_writew(void *opaque,
+ target_phys_addr_t addr, uint32_t value)
+{
+I82378State *s = opaque;
+DPRINTF(%s: TARGET_FMT_plx =%04x\n, __func__, addr, value);
+addr = i82378_io_address(s, addr);
+cpu_outw(addr, value);
+}
+
+static void i82378_io_writel(void *opaque,
+ target_phys_addr_t addr, uint32_t value)
+{
+I82378State *s = opaque;
+DPRINTF(%s: TARGET_FMT_plx =%08x\n, __func__, addr, value);
+addr = i82378_io_address(s, addr);
+cpu_outl(addr, value);
+}
+
+static uint32_t i82378_io_readb(void *opaque, target_phys_addr_t addr)
+{
+I82378State *s = opaque;
+DPRINTF(%s: TARGET_FMT_plx \n, __func__, addr);
+addr = i82378_io_address(s, addr);
+return cpu_inb(addr);
+}
+
+static uint32_t i82378_io_readw(void *opaque, target_phys_addr_t addr)
+{
+I82378State *s = opaque;
+DPRINTF(%s: TARGET_FMT_plx \n, __func__, addr);
+addr = i82378_io_address(s, addr);
+return cpu_inw(addr);
+}
+
+static uint32_t i82378_io_readl(void *opaque, target_phys_addr_t addr)
+{
+I82378State *s = opaque;
+DPRINTF(%s: TARGET_FMT_plx \n, __func__, addr);
+addr = i82378_io_address(s, addr);
+return cpu_inl(addr);
+}
+
+static CPUWriteMemoryFunc * const i82378_io_write[] = {
+i82378_io_writeb,
+
[Qemu-devel] [RFC v5 12/23] isa: Allow to un-associate an IRQ
ISADevices keep a list of numeric IRQs. Remove one from that list.
Also optionally NULL the qemu_irq, calling it uninit for symmetry.
Cc: Gerd Hoffmann kra...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/isa-bus.c | 17 +
hw/isa.h |1 +
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 6e33d80..d037ed3 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -80,6 +80,23 @@ void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq)
dev-nirqs++;
}
+void isa_uninit_irq(ISADevice *dev, qemu_irq *p, int isairq)
+{
+int i, j;
+for (i = 0; i dev-nirqs; i++) {
+if (dev-isairq[i] == isairq) {
+for (j = i + 1; j dev-nirqs; j++) {
+dev-isairq[j - 1] = dev-isairq[j];
+}
+dev-nirqs--;
+break;
+}
+}
+if (p != NULL) {
+*p = NULL;
+}
+}
+
static void isa_init_ioport_one(ISADevice *dev, uint16_t ioport)
{
assert(dev-nioports ARRAY_SIZE(dev-ioports));
diff --git a/hw/isa.h b/hw/isa.h
index fe1a20c..72829bb 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -32,6 +32,7 @@ ISABus *isa_bus_new(DeviceState *dev);
void isa_bus_irqs(qemu_irq *irqs);
qemu_irq isa_get_irq(int isairq);
void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
+void isa_uninit_irq(ISADevice *dev, qemu_irq *p, int isairq);
void isa_init_ioport(ISADevice *dev, uint16_t ioport);
void isa_init_ioport_range(ISADevice *dev, uint16_t start, uint16_t length);
void isa_discard_ioport_range(ISADevice *dev, uint16_t start, uint16_t length);
--
1.7.5.3
[Qemu-devel] [RFC 21/23] 40p: Add an audio card and a keyboard
From: Hervé Poussineau hpous...@reactos.org
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
default-configs/ppc-softmmu.mak |1 +
hw/ppc_prep.c |8
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
index 0999008..303929f 100644
--- a/default-configs/ppc-softmmu.mak
+++ b/default-configs/ppc-softmmu.mak
@@ -19,6 +19,7 @@ CONFIG_I82378=y
CONFIG_PC87312=y
CONFIG_MACIO=y
CONFIG_PCSPK=y
+CONFIG_CS4231A=y
CONFIG_CUDA=y
CONFIG_ADB=y
CONFIG_MAC_NVRAM=y
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 935d1e9..4759a03 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -848,6 +848,14 @@ static void ibm_40p_init(ram_addr_t ram_size,
qdev_prop_set(isa-qdev, floppyB, drive-bdrv, PROP_TYPE_DRIVE);
}
qdev_init_nofail(isa-qdev);
+
+/* Audio */
+isa = isa_create(cs4231a);
+qdev_prop_set_uint32(isa-qdev, iobase, 0x830);
+qdev_prop_set_uint32(isa-qdev, irq, 10);
+qdev_init_nofail(isa-qdev);
+
+isa_create_simple(i8042);
}
static QEMUMachine prep_machine = {
--
1.7.5.3
[Qemu-devel] [RFC v5 14/23] serial: Implement ISA state callbacks
Add enabled qdev property, and implement enable and disable callbacks.
Incorporate ISA VMState as well as I/O base and IRQ as subsection, and
implement pre_load and post_load callbacks.
Cc: Gerd Hoffmann kra...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Cc: Juan Quintela quint...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/serial.c | 91 +++---
1 files changed, 86 insertions(+), 5 deletions(-)
diff --git a/hw/serial.c b/hw/serial.c
index 0ee61dd..7a63b7d 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -161,6 +161,8 @@ typedef struct ISASerialState {
uint32_t iobase;
uint32_t isairq;
SerialState state;
+uint32_t initial_iobase;
+uint32_t initial_isairq;
} ISASerialState;
static void serial_receive1(void *opaque, const uint8_t *buf, int size);
@@ -752,6 +754,31 @@ void serial_set_frequency(SerialState *s, uint32_t
frequency)
serial_update_parameters(s);
}
+static int serial_isa_enable(ISADevice *dev)
+{
+ISASerialState *isa = DO_UPCAST(ISASerialState, dev, dev);
+SerialState *s = isa-state;
+
+isa_init_irq(dev, s-irq, isa-isairq);
+
+register_ioport_write(isa-iobase, 8, 1, serial_ioport_write, s);
+register_ioport_read(isa-iobase, 8, 1, serial_ioport_read, s);
+isa_init_ioport_range(dev, isa-iobase, 8);
+return 0;
+}
+
+static int serial_isa_disable(ISADevice *dev)
+{
+ISASerialState *isa = DO_UPCAST(ISASerialState, dev, dev);
+SerialState *s = isa-state;
+
+isa_uninit_irq(dev, s-irq, isa-isairq);
+
+isa_discard_ioport_range(dev, isa-iobase, 8);
+isa_unassign_ioport(isa-iobase, 8);
+return 0;
+}
+
static const int isa_serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8,
0x2e8 };
static const int isa_serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
@@ -771,25 +798,76 @@ static int serial_isa_initfn(ISADevice *dev)
isa-isairq = isa_serial_irq[isa-index];
index++;
+isa-initial_iobase = isa-iobase;
+isa-initial_isairq = isa-isairq;
+
s-baudbase = 115200;
-isa_init_irq(dev, s-irq, isa-isairq);
serial_init_core(s);
qdev_set_legacy_instance_id(dev-qdev, isa-iobase, 3);
-register_ioport_write(isa-iobase, 8, 1, serial_ioport_write, s);
-register_ioport_read(isa-iobase, 8, 1, serial_ioport_read, s);
-isa_init_ioport_range(dev, isa-iobase, 8);
+if (dev-enabled) {
+serial_isa_enable(dev);
+}
return 0;
}
+static int serial_isa_pre_load(void *opaque)
+{
+ISASerialState *s = opaque;
+
+isa_set_state(s-dev, false);
+return 0;
+}
+
+static int serial_isa_post_load(void *opaque, int version_id)
+{
+ISASerialState *s = opaque;
+ISADevice *dev = s-dev;
+
+if (dev-enabled) {
+serial_isa_enable(dev);
+}
+return 0;
+}
+
+static bool serial_isa_config_needed(void *opaque)
+{
+ISASerialState *s = opaque;
+
+return isa_vmstate_needed(s-dev) ||
+s-initial_iobase != s-iobase ||
+s-initial_isairq != s-isairq;
+}
+
+static const VMStateDescription vmstate_isa_serial_isaconfig = {
+.name = serial/isa-config,
+.version_id = 1,
+.minimum_version_id = 1,
+.fields = (VMStateField []) {
+VMSTATE_ISA_DEVICE(dev, ISASerialState),
+VMSTATE_UINT32(iobase, ISASerialState),
+VMSTATE_UINT32(isairq, ISASerialState),
+VMSTATE_END_OF_LIST()
+},
+};
+
static const VMStateDescription vmstate_isa_serial = {
.name = serial,
.version_id = 3,
.minimum_version_id = 2,
+.pre_load = serial_isa_pre_load,
+.post_load = serial_isa_post_load,
.fields = (VMStateField []) {
VMSTATE_STRUCT(state, ISASerialState, 0, vmstate_serial, SerialState),
VMSTATE_END_OF_LIST()
-}
+},
+.subsections = (VMStateSubsection []) {
+{
+.vmsd = vmstate_isa_serial_isaconfig,
+.needed = serial_isa_config_needed,
+}, {
+}
+},
};
SerialState *serial_init(int base, qemu_irq irq, int baudbase,
@@ -962,11 +1040,14 @@ static ISADeviceInfo serial_isa_info = {
.qdev.size = sizeof(ISASerialState),
.qdev.vmsd = vmstate_isa_serial,
.init = serial_isa_initfn,
+.enable = serial_isa_enable,
+.disable= serial_isa_disable,
.qdev.props = (Property[]) {
DEFINE_PROP_UINT32(index, ISASerialState, index, -1),
DEFINE_PROP_HEX32(iobase, ISASerialState, iobase, -1),
DEFINE_PROP_UINT32(irq, ISASerialState, isairq, -1),
DEFINE_PROP_CHR(chardev, ISASerialState, state.chr),
+DEFINE_PROP_BOOL(enabled, ISASerialState, dev.enabled, true),
DEFINE_PROP_END_OF_LIST(),
},
};
--
1.7.5.3
[Qemu-devel] [RFC 23/23] 40p: Add an 8514/A graphics card
The IBM E15 is equivalent to an S3 Vision864.
Lacking S3 SDAC (86C716) support, the DAC indizes are translated
to greyscale colors. This works sufficiently to observe firmware
boot progress.
Cc: Hervé Poussineau hpous...@reactos.org
Fixed off-by-one drawing issue.
Replaced hardcoded color for RECT.
Separate I/O debug output for readability.
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
Makefile.objs |1 +
default-configs/ppc-softmmu.mak |1 +
hw/pci_ids.h|3 +
hw/ppc_prep.c |2 +
hw/vga-s3.c | 694 +++
5 files changed, 701 insertions(+), 0 deletions(-)
create mode 100644 hw/vga-s3.c
diff --git a/Makefile.objs b/Makefile.objs
index 7bb6b1a..0893c85 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -270,6 +270,7 @@ hw-obj-y += qdev-addr.o
hw-obj-$(CONFIG_VGA_PCI) += vga-pci.o
hw-obj-$(CONFIG_VGA_ISA) += vga-isa.o
hw-obj-$(CONFIG_VGA_ISA_MM) += vga-isa-mm.o
+hw-obj-$(CONFIG_VGA_S3) += vga-s3.o
hw-obj-$(CONFIG_VMWARE_VGA) += vmware_vga.o
hw-obj-$(CONFIG_VMMOUSE) += vmmouse.o
diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
index 303929f..ab74392 100644
--- a/default-configs/ppc-softmmu.mak
+++ b/default-configs/ppc-softmmu.mak
@@ -6,6 +6,7 @@ CONFIG_ISA_MMIO=y
CONFIG_ESCC=y
CONFIG_M48T59=y
CONFIG_VGA_PCI=y
+CONFIG_VGA_S3=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/pci_ids.h b/hw/pci_ids.h
index d3bef0e..821421c 100644
--- a/hw/pci_ids.h
+++ b/hw/pci_ids.h
@@ -97,6 +97,9 @@
#define PCI_VENDOR_ID_FREESCALE 0x1957
#define PCI_DEVICE_ID_MPC8533E 0x0030
+#define PCI_VENDOR_ID_S3 0x5333
+#define PCI_DEVICE_ID_S3_864 0x88c0
+
#define PCI_VENDOR_ID_INTEL 0x8086
#define PCI_DEVICE_ID_INTEL_823780x0484
#define PCI_DEVICE_ID_INTEL_824410x1237
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 6ae1635..9085f89 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -747,6 +747,8 @@ static void ibm_40p_init(ram_addr_t ram_size,
qdev_prop_set_uint8(isa-qdev, board-identification, 0xfc);
qdev_init_nofail(isa-qdev);
+pci_create_simple(pci_bus, PCI_DEVFN(2, 0), S3-864);
+
/* Super I/O (parallel + serial ports) */
isa = isa_create(isa-pc87312);
qdev_prop_set_chr(isa-qdev, parallel, parallel_hds[0]);
diff --git a/hw/vga-s3.c b/hw/vga-s3.c
new file mode 100644
index 000..9b0bc13
--- /dev/null
+++ b/hw/vga-s3.c
@@ -0,0 +1,694 @@
+/*
+ * QEMU PCI IBM 8514/A Emulator.
+ *
+ * Copyright (c) 2010 Hervé Poussineau
+ * Copyright (c) 2010-2011 Andreas Färber
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* Documentation available at
+ * http://www.datasheetarchive.com/Indexer/Datasheet-06/DSA0091551.html
+ */
+
+#include console.h
+#include pci.h
+#include vga_int.h
+#include pixel_ops.h
+
+//#define DEBUG_8514
+//#define DEBUG_8514_IO
+
+#ifdef DEBUG_8514
+#define DPRINTF(fmt, ...) \
+do { printf(8514: fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF(fmt, ...) do {} while (0)
+#endif
+#ifdef DEBUG_8514_IO
+#define DPRINTF_IO(fmt, ...) \
+do { printf(8514: fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF_IO(fmt, ...) do {} while (0)
+#endif
+#define BADF(fmt, ...) \
+do { fprintf(stderr, 8514 ERROR: fmt , ## __VA_ARGS__);} while (0)
+
+enum {
+REG_CMD = 0x9AE8,
+REG_PIX_TRANS = 0xE2E8,
+};
+
+#define GP_STAT_BUSY 0x0200
+
+#define CMD_WRTDATA 0x0001
+#define CMD_PLANAR 0x0002
+#define CMD_LASTPIX 0x0004
+#define CMD_LINETYPE 0x0008
+#define CMD_DRAW 0x0010
+#define CMD_INC_X0x0020
+#define CMD_YMAJAXIS 0x0040
+#define CMD_INC_Y0x0080
+#define CMD_PCDATA 0x0100
+#define CMD_16BIT0x0200
+#define CMD_BYTSEQ 0x1000
+#define CMD_CMD_MASK 0xE000
+
+#define CMD_CMD_NOP0x
+#define
[Qemu-devel] [PATCH] Fix signal handling when io-thread is disabled
This fix effectively blocks, in the main thread, the signals handled by signalfd or the compatibility signal thread. This way, such signals are received synchronously in the main thread through sigfd_handler() instead of triggering the signal handler directly, asynchronously. Signed-off-by: Alexandre Raymond cerb...@gmail.com --- cpus.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/cpus.c b/cpus.c index 4ab76f0..b6366b5 100644 --- a/cpus.c +++ b/cpus.c @@ -411,6 +411,7 @@ static int qemu_signal_init(void) sigaddset(set, SIGIO); sigaddset(set, SIGALRM); } +pthread_sigmask(SIG_BLOCK, set, NULL); #endif sigfd = qemu_signalfd(set); -- 1.7.5
[Qemu-devel] [RFC v5 16/23] fdc: Implement ISA state callbacks
Add enabled qdev property, and implement enable and disable callbacks.
Incorporate ISA VMState as well as I/O base and IRQ as subsection,
and implement pre_load and post_load callbacks.
Cc: Gerd Hoffmann kra...@redhat.com
Cc: Markus Armbruster arm...@redhat.com
Cc: Juan Quintela quint...@redhat.com
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/fdc.c | 91 +++--
1 files changed, 88 insertions(+), 3 deletions(-)
diff --git a/hw/fdc.c b/hw/fdc.c
index f4e3e0d..778fb58 100644
--- a/hw/fdc.c
+++ b/hw/fdc.c
@@ -431,6 +431,8 @@ typedef struct FDCtrlISABus {
struct FDCtrl state;
int32_t bootindexA;
int32_t bootindexB;
+uint32_t initial_iobase;
+uint32_t initial_irq;
} FDCtrlISABus;
static uint32_t fdctrl_read (void *opaque, uint32_t reg)
@@ -1894,11 +1896,10 @@ static int fdctrl_init_common(FDCtrl *fdctrl)
return fdctrl_connect_drives(fdctrl);
}
-static int isabus_fdc_init1(ISADevice *dev)
+static int isabus_fdc_enable(ISADevice *dev)
{
FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
FDCtrl *fdctrl = isa-state;
-int ret;
register_ioport_read(isa-iobase + 0x01, 5, 1,
fdctrl_read_port, fdctrl);
@@ -1912,7 +1913,58 @@ static int isabus_fdc_init1(ISADevice *dev)
isa_init_ioport(dev, isa-iobase + 7);
isa_init_irq(isa-busdev, fdctrl-irq, isa-irq);
+
+return 0;
+}
+
+static int isabus_fdc_disable(ISADevice *dev)
+{
+FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
+FDCtrl *fdctrl = isa-state;
+
+isa_discard_ioport_range(dev, isa-iobase + 0x07, 1);
+isa_discard_ioport_range(dev, isa-iobase + 0x01, 5);
+isa_unassign_ioport(isa-iobase + 7, 1);
+isa_unassign_ioport(isa-iobase, 6);
+
+isa_uninit_irq(isa-busdev, fdctrl-irq, isa-irq);
+fdctrl-irq = NULL;
+
+return 0;
+}
+
+static int isabus_fdc_pre_load(void *opaque)
+{
+FDCtrlISABus *s = opaque;
+
+isa_set_state(s-busdev, false);
+return 0;
+}
+
+static int isabus_fdc_post_load(void *opaque, int version_id)
+{
+FDCtrlISABus *s = opaque;
+ISADevice *dev = s-busdev;
+
+if (dev-enabled) {
+isabus_fdc_enable(dev);
+}
+return 0;
+}
+
+static int isabus_fdc_init1(ISADevice *dev)
+{
+FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
+FDCtrl *fdctrl = isa-state;
+int ret;
+
+isa-initial_iobase = isa-iobase;
+isa-initial_irq = isa-irq;
+
fdctrl-dma_chann = isa-dma;
+if (dev-enabled) {
+isabus_fdc_enable(dev);
+}
qdev_set_legacy_instance_id(dev-qdev, isa-iobase, 2);
ret = fdctrl_init_common(fdctrl);
@@ -1960,18 +2012,50 @@ static int sun4m_fdc_init1(SysBusDevice *dev)
return fdctrl_init_common(fdctrl);
}
+static bool isabus_fdc_isaconfig_needed(void *opaque)
+{
+FDCtrlISABus *s = opaque;
+
+return isa_vmstate_needed(s-busdev) ||
+s-initial_iobase != s-iobase ||
+s-initial_irq != s-irq;
+}
+
+static const VMStateDescription vmstate_isa_fdc_isaconfig = {
+.name = fdc/isa-config,
+.version_id = 1,
+.minimum_version_id = 1,
+.fields = (VMStateField []) {
+VMSTATE_ISA_DEVICE(busdev, FDCtrlISABus),
+VMSTATE_UINT32(iobase, FDCtrlISABus),
+VMSTATE_UINT32(irq, FDCtrlISABus),
+VMSTATE_END_OF_LIST()
+},
+};
+
static const VMStateDescription vmstate_isa_fdc ={
.name = fdc,
.version_id = 2,
.minimum_version_id = 2,
+.pre_load = isabus_fdc_pre_load,
+.post_load = isabus_fdc_post_load,
.fields = (VMStateField []) {
VMSTATE_STRUCT(state, FDCtrlISABus, 0, vmstate_fdc, FDCtrl),
VMSTATE_END_OF_LIST()
-}
+},
+.subsections = (VMStateSubsection []) {
+{
+.vmsd = vmstate_isa_fdc_isaconfig,
+.needed = isabus_fdc_isaconfig_needed,
+}, {
+}
+},
};
static ISADeviceInfo isa_fdc_info = {
.init = isabus_fdc_init1,
+.enable = isabus_fdc_enable,
+.disable = isabus_fdc_disable,
.qdev.name = isa-fdc,
.qdev.fw_name = fdc,
.qdev.size = sizeof(FDCtrlISABus),
@@ -1986,6 +2070,7 @@ static ISADeviceInfo isa_fdc_info = {
DEFINE_PROP_DRIVE(driveB, FDCtrlISABus, state.drives[1].bs),
DEFINE_PROP_INT32(bootindexA, FDCtrlISABus, bootindexA, -1),
DEFINE_PROP_INT32(bootindexB, FDCtrlISABus, bootindexB, -1),
+DEFINE_PROP_BOOL(enabled, FDCtrlISABus, busdev.enabled, true),
DEFINE_PROP_END_OF_LIST(),
},
};
--
1.7.5.3
