Re: [Qemu-devel] QEMU savevm RAM page offsets
I didn't mean to imply that the savevm format is broken and needed fixing. I was just wondering if the data is there and I simply hadn't found it. Upgrading QEMU is not an option at the moment since these are tightly controlled productions machines. Is it possible to loadvm a savevm file from 1.0 with 1.6 to then use guest-memory-dump? >>> >>> Yes, it should, but one important thing since 1.0 has been the merger of >>> qemu-kvm and QEMU. What distribution are you using? I know Fedora >>> allows qemu-kvm-1.0 to QEMU-1.6 compatibility, but I don't know about >>> others. >> >> Ubuntu 12.04 >> >> >>> Michael Tokarev is the maintainer of the Debian package, so he may be >>> able to answer. >>> >>> Alternatively, you can modify your utility to simply add 512 MB to the >>> addresses above 3.5 GB. >> >> Is it really as simple as that? Isn't the OS (particularly Windows) >> possibly doing some crazy remapping that needs to be taken into >> account? meminfo on a VM with 4GB running Windows 2008 shows the >> following: >> >> C:\Users\Administrator\Desktop\MemInfo\amd64>MemInfo.exe -r >> MemInfo v2.10 - Show PFN database information >> Copyright (C) 2007-2009 Alex Ionescu >> www.alex-ionescu.com >> >> Physical Memory Range: 1000 to 0009B000 (154 pages, 616 >> KB) >> Physical Memory Range: 0010 to DFFFD000 (917245 >> pages, 3668980 KB) >> Physical Memory Range: 0001 to 00012000 (131072 >> pages, 524288 KB) >> MmHighestPhysicalPage: 1179648 > > That should be fine, I think. The 384 KB hole between 640KB and 1MB is > actually contiguously backed by RAMBlock, it is just not (necessarily) > presented as conventional memory to the guest. You can treat the [0, > 0x0e000) left-closed, right-open interval as contiguous. Indeed simply adding a 512 MB hole between 3.5 GB and 4 GB did the trick. Thanks a lot. > Again, check out the diagram in 4/4 that I linked before. Compare it to > pc_init1() in "hw/pc_piix.c", at tag "v1.0" in > . Look for the > variable "below_4g_mem_size". Nice diagram and very helpful. Thanks ...Juerg > Laszlo
Re: [Qemu-devel] [PATCH v2 for 1.6] w32: Add missing version.o to all executables (fix regression)
Am 16.08.2013 00:19, schrieb Michael Roth: > Quoting Stefan Weil (2013-08-08 13:18:07) >> > QEMU executables for w32, w64 had included meta information built from >> > version.rc. These rules were changed several times some months ago. >> > >> > The latest version added version.o to the tools, but not to the system >> > emulations. >> > >> > This patch adds the meta information to all system emulations again. >> > >> > Signed-off-by: Stefan Weil > I seem to be getting build errors with this patch when doing a Fedora 18 mingw > crossbuild. I thought it was specific to qemu-ga so I disabled it to confirm > and it looks like version.o is never being built, so all targets fail when > linking. > > Reverting this patch seems to fix things > That's strange. Exactly the same command line works on Debian wheezy. version.o is built right at the beginning: ... QOM debugging yes GEN x86_64-softmmu/config-devices.mak GEN qemu-options.def GEN config-host.h GEN qmp-commands.h GEN qapi-types.h GEN qapi-visit.h GEN trace/generated-events.h GEN trace/generated-tracers.h GEN tests/test-qapi-types.h GEN tests/test-qapi-visit.h GEN tests/test-qmp-commands.h GEN config-all-devices.mak RC/home/stefan/src/qemu/qemu.org/spelling/version.o rm /home/stefan/src/qemu/qemu.org/spelling/config-host.h-timestamp GEN config-host.h GEN qemu-monitor.texi GEN qemu-img-cmds.texi ... Here are the dependency rules which should trigger building of version.o: $ grep version-.*obj Makefile* *mak Makefile:Makefile: $(version-obj-y) $(version-lobj-y) Makefile.objs:version-obj-$(CONFIG_WIN32) += $(BUILD_DIR)/version.o Makefile.objs:version-lobj-$(CONFIG_WIN32) += $(BUILD_DIR)/version.lo Could you please check the values of version-obj-y, version-lobj-y? Do you use a special make program? Do you get the same problem when running make without -j4 (no parallel build)? My patch was a hack for 1.6, but I did not expect that it might cause any problems. A better solution would extend version.rc and compile it each time when linking, so version.o can include build information. Regards, Stefan
[Qemu-devel] [PATCH] exec: Fix non-power-of-2 sized accesses
Since commit 23326164 we align access sizes to match the alignment of
the address, but we don't align the access size itself. This means we
let illegal access sizes (ex. 3) slip through if the address is
sufficiently aligned (ex. 4). This results in an abort which would be
easy for a guest to trigger. Account for aligning the access size.
Signed-off-by: Alex Williamson
Cc: qemu-sta...@nongnu.org
---
In the example I saw the guest was doing a 4-byte read at I/O port
0xcd7. We satisfy the first byte with a 1-byte read leaving 3 bytes
remaining at an 8-byte aligned address... boom. ffs() caused weird
stack smashing errors here, so I just did a loop since it can only
run for a few iterations max.
exec.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/exec.c b/exec.c
index 3ca9381..652fc3a 100644
--- a/exec.c
+++ b/exec.c
@@ -1924,6 +1924,13 @@ static int memory_access_size(MemoryRegion *mr, unsigned
l, hwaddr addr)
}
}
+/* Size must be a power of 2 */
+if (l & (l - 1)) {
+while (l & (access_size_max - 1) && access_size_max > 1) {
+access_size_max >>= 1;
+}
+}
+
/* Don't attempt accesses larger than the maximum. */
if (l > access_size_max) {
l = access_size_max;
Re: [Qemu-devel] [PATCH V7 0/8] add internal snapshot support at block device level
于 2013-8-7 11:00, Wenchao Xia 写道: >This series brings internal snapshot support at block devices level, now we > have two three methods to do block snapshot lively: 1) backing chain, > 2) internal one and 3) drive-back up approach. > > Comparation: > Advantages:Disadvantages: > 1)delta data, taken fast, export, sizeperformance, delete slow. > 2) taken fast, delete fast, performance, size delta data, format > 3) performance, export, format taken slow, delta data, size, host > I/O > >I think in most case, saving vmstate in an standalone file is better than > saving it inside qcow2, So suggest treat internal snapshot as block level > methods and not encourage user to savevm in qcow2 any more. > > Implemention details: >To avoid trouble, this serial have hide ID in create interfaces, this make > sure no chaos of ID and name will be introduced by these interfaces. >There is one patch may be common to Pavel's savvm transaction, patch 1/11, > others are not quite related. Patch 1/11 will not set errp when no snapshot > find, since patch 3/11 need to distinguish real error case. > > Next steps to better full VM snapshot: >Improve internal snapshot's export capability. >Better vmstate saving. > >Thanks Kevin to give advisement about how add it in qmp_transaction, oldest > version comes drom Dietmar Maurer. > > v3: >General: >Rebased after Stenfan's driver-backup patch V6. > >Address Eric's comments: >4/9: grammar fix and better doc. >5/9: parameter name is mandatory now. grammar fix. >6/9: redesiged interface: take both id and name as optional parameter, > return > the deleted snapshot's info. > >Address Stefan's comments: >4/9: add '' around %s in message. drop code comments about vm_clock. >9/9: better doc, refined the code and add more test case. > > v4: >Address Stefan's comments: >4/9: use error_setg_errno() to show error reason for > bdrv_snapshot_create(), > spell fix and better doc. >5/9: better doc. >6/9: remove spurious ';' in code, spell fix and better doc. > > v5: >Address Kevin's comments: >3/8, 4/8, 8/8: remove the limit of numeric snapshot name. >General change: >4/8: use existing type as parameter in qapi schema. > > v6: >Address Stefan's comments: >2/8: macro STR_PRINT_CHAR was renamed as STR_OR_NULL, and moved into patch > 5, > since implement function in this patch do not printf snapshot id any more, as > Kevin's suggestion. >Address Kevin's comments: >2/8: remove device, id, name info in the error message, use error message > in > existing caller. A new function bdrv_snapshot_delete_by_id_or_name() is added > to make the usage clear while keep logic unchanged. >3/8: remove device info in error message when name is empty. Use else if > after call of bdrv_snapshot_find_by_id_and_name(). >Other: >2/8: refined the comments in code for bdrv_snapshot_delete(). >3/8: in error reporting, change format from "reason is: '%s'" to > "reason is: %s". > > v7: >rebased on upstream, target for 1.7. > > Wenchao Xia (8): >1 snapshot: new function bdrv_snapshot_find_by_id_and_name() >2 snapshot: distinguish id and name in snapshot delete >3 qmp: add internal snapshot support in qmp_transaction >4 qmp: add interface blockdev-snapshot-internal-sync >5 qmp: add interface blockdev-snapshot-delete-internal-sync >6 hmp: add interface hmp_snapshot_blkdev_internal >7 hmp: add interface hmp_snapshot_delete_blkdev_internal >8 qemu-iotests: add 057 internal snapshot for block device test case > > block/qcow2-snapshot.c | 55 +++--- > block/qcow2.h |5 +- > block/rbd.c| 21 - > block/sheepdog.c |5 +- > block/snapshot.c | 131 ++- > blockdev.c | 190 > hmp-commands.hx| 37 ++- > hmp.c | 22 > hmp.h |2 + > include/block/block_int.h |5 +- > include/block/snapshot.h | 14 +++- > include/qemu-common.h |3 + > qapi-schema.json | 66 +++- > qemu-img.c | 11 ++- > qmp-commands.hx| 104 -- > savevm.c | 32 +++--- > tests/qemu-iotests/057 | 259 > > tests/qemu-iotests/057.out |5 + > tests/qemu-iotests/group |1 + > 19 files changed, 914 insertions(+), 54 deletions(-) > create mode 100755 tests/qemu-iotests/057 > create mode 100644 tests/qemu-iotests/057.out > > Any comments for it? -- Best Regards Wenchao Xia
[Qemu-devel] [PATCH] Adds the ability to use the command key in the guest operating system.
Signed-off-by: John Arbuckle
Deciding when and how to send the command key has not been easy. A simple
protocol that this patch implements is send the command key to the guest
operating system when the mouse is grabbed. Otherwise send the command key
to QEMU.
---
ui/cocoa.m | 21 -
1 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index be49179..9a57f57 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -129,8 +129,8 @@ int keymap[] =
14, // 51 0x330x0eBKSPQZ_BACKSPACE
0, // 52 0x34Undefined
1, // 53 0x350x01ESC QZ_ESCAPE
-0, // 54 0x36QZ_RMETA
-0, // 55 0x37QZ_LMETA
+219,// 54 0x36QZ_RMETA
+219,// 55 0x37QZ_LMETA
42, // 56 0x380x2aL SHFT QZ_LSHIFT
58, // 57 0x390x3aCAPSQZ_CAPSLOCK
56, // 58 0x3A0x38L ALT QZ_LALT
@@ -512,21 +512,24 @@ QemuCocoaView *cocoaView;
}
// release Mouse grab when pressing ctrl+alt
-if (!isFullscreen && ([event modifierFlags] &
NSControlKeyMask) && ([event modifierFlags] & NSAlternateKeyMask)) {
+if (([event modifierFlags] & NSControlKeyMask) && ([event
modifierFlags] & NSAlternateKeyMask)) {
[self ungrabMouse];
}
break;
case NSKeyDown:
+keycode = cocoa_keycode_to_qemu([event keyCode]);
-// forward command Key Combos
+// if command key is down
if ([event modifierFlags] & NSCommandKeyMask) {
-[NSApp sendEvent:event];
-return;
+if (isMouseGrabed == YES) {// if sending the command
key to the guest
+kbd_put_keycode(219); // send command key
+kbd_put_keycode(keycode); // send any other key
+} else { // if sending the command
key to QEMU
+[NSApp sendEvent:event];
+return;
+}
}
-// default
-keycode = cocoa_keycode_to_qemu([event keyCode]);
-
// handle control + alt Key Combos (ctrl+alt is reserved for
QEMU)
if (([event modifierFlags] & NSControlKeyMask) && ([event
modifierFlags] & NSAlternateKeyMask)) {
switch (keycode) {
--
1.7.5.4
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On Thu, 2013-08-15 at 19:28 -0500, Anthony Liguori wrote: > On Thu, Aug 15, 2013 at 7:20 PM, Benjamin Herrenschmidt > wrote: > > On Thu, 2013-08-15 at 16:47 +0200, Andreas Färber wrote: > >> comparing values for closest match. So that if you have a v2.4 and QEMU > >> knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR. > > > > Another thing to keep in mind is that we will want eventually to support > > POWER7 compatibility more on POWER8 with HV KVM. I am not certain what > > the "right" way to do it via qemu command line is, whether we would > > have a -cpu entry (-cpu POWER7_COMPAT ?) or such... > > But this doesn't change the hardware PVR value right, just the virtual > PVR that's in the device tree? Right. > Maybe you need to change some state of the virtual VCPU but from a QEMU > point of view, it's still a POWER8 VCPU (it's just in power7 compat mode). Sure, as long as TCG does the right thing (some instructions must be forbidden etc...). That's more what I had in mind... > > Additionally, the trick here is that qemu must be able to change its model > > at runtime (a reset is permitted). This is how PAPR defines the > > reconfiguration > > reboot (for that and other things). > > I don't think the model changes. It's just a flag in the power8 vcpu state. > > No different IMHO between jumping from real mode to protected mode to > long mode on x86. Ok. Cheers, Ben. > Regards, > > Anthony Liguori > > > IE. The guest kernel will call FW early on, while still operating under > > OFW (from prom_init) indicating what it supports, and if that doesn't > > include > > P8, we need to reconfigure the CPU model to be P7 compat (we are allowed to > > reboot and reload the same kernel, which is generally what pHyp does, but > > we'd like to try avoiding it as much as possible). > > > > Cheers, > > Ben. > > > > > >
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On Thu, Aug 15, 2013 at 7:20 PM, Benjamin Herrenschmidt wrote: > On Thu, 2013-08-15 at 16:47 +0200, Andreas Färber wrote: >> comparing values for closest match. So that if you have a v2.4 and QEMU >> knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR. > > Another thing to keep in mind is that we will want eventually to support > POWER7 compatibility more on POWER8 with HV KVM. I am not certain what > the "right" way to do it via qemu command line is, whether we would > have a -cpu entry (-cpu POWER7_COMPAT ?) or such... But this doesn't change the hardware PVR value right, just the virtual PVR that's in the device tree? Maybe you need to change some state of the virtual VCPU but from a QEMU point of view, it's still a POWER8 VCPU (it's just in power7 compat mode). > Additionally, the trick here is that qemu must be able to change its model > at runtime (a reset is permitted). This is how PAPR defines the > reconfiguration > reboot (for that and other things). I don't think the model changes. It's just a flag in the power8 vcpu state. No different IMHO between jumping from real mode to protected mode to long mode on x86. Regards, Anthony Liguori > IE. The guest kernel will call FW early on, while still operating under > OFW (from prom_init) indicating what it supports, and if that doesn't include > P8, we need to reconfigure the CPU model to be P7 compat (we are allowed to > reboot and reload the same kernel, which is generally what pHyp does, but > we'd like to try avoiding it as much as possible). > > Cheers, > Ben. > > >
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On Thu, 2013-08-15 at 16:47 +0200, Andreas Färber wrote: > When we instantiate a -cpu POWER9 then having one POWER9_vX.Y around to > back it doesn't really hurt. Unlike ARM's MIDR there doesn't seem to be > an encoding of IBM vendor or POWER family in the PVR. The macros and > their new implementation are not the way they are because I consider > them the nicest thing in the world but because the name+pvr+svr+family > combination made them work for the whole zoo of models we carry around > and started to give us some inheritance through QOM. Making the POWER7 > family non-abstract would require the same kind of macro "overloading" > for POWERPC_FAMILY that I'm trying to contain for POWERPC_DEF ATM. So > what I am still thinking about is how to handle there being multiple > matches for a PVR - I am considering putting them into a list and > comparing values for closest match. So that if you have a v2.4 and QEMU > knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR. Another thing to keep in mind is that we will want eventually to support POWER7 compatibility more on POWER8 with HV KVM. I am not certain what the "right" way to do it via qemu command line is, whether we would have a -cpu entry (-cpu POWER7_COMPAT ?) or such... Additionally, the trick here is that qemu must be able to change its model at runtime (a reset is permitted). This is how PAPR defines the reconfiguration reboot (for that and other things). IE. The guest kernel will call FW early on, while still operating under OFW (from prom_init) indicating what it supports, and if that doesn't include P8, we need to reconfigure the CPU model to be P7 compat (we are allowed to reboot and reload the same kernel, which is generally what pHyp does, but we'd like to try avoiding it as much as possible). Cheers, Ben.
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On 08/15/2013 03:23 PM, Peter Maydell wrote: On 15 August 2013 23:18, Guenter Roeck wrote: But doesn't that mean that there is _currently_ no problem ? If so, we can introduce the additional code when the problem really shows up. Being Preemptive is good, but if it is not really needed today I would rather have today's problems resolved and bother about tomorrow's when they show up. Conceptually the two parts go together: rely on correct irq routing, tell qemu we rely on correct irq routing. It's only one extra line... Ok if Russel accepts it ... Guenter
Re: [Qemu-devel] [PATCH v2 3/4] spapr: Improve device tree CPU node for -cpu host with unknown OF name
Am 16.08.2013 00:35, schrieb Andreas Färber:
> Whenever DeviceClass::fw_name is not available, derive it from the CPU's
> type name, resorting to the parent's type in case of -cpu host, and fill
> it in for that class in a PAPR-compliant way with "PowerPC," prefix.
Ugh, obviously forgot to edit the commit message after splitting this
off from the preceding patch... ;)
Andreas
>
> Reported-by: Prerna Saxena
> Signed-off-by: Andreas Färber
> ---
> hw/ppc/spapr.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 6d984dc..0e9be32 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -344,6 +344,10 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
> const char *typename;
>
> typename = object_class_get_name(oc);
> +if (kvm_enabled() &&
> +strcmp(typename, "host-" TYPE_POWERPC_CPU) == 0) {
> +typename =
> object_class_get_name(object_class_get_parent(oc));
> +}
> nodename = g_strndup(typename,
> strlen(typename) - strlen("-"
> TYPE_POWERPC_CPU));
> dc->fw_name = g_strdup_printf("PowerPC,%s", nodename);
>
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] [PATCH v2 3/4] spapr: Improve device tree CPU node for -cpu host with unknown OF name
Whenever DeviceClass::fw_name is not available, derive it from the CPU's
type name, resorting to the parent's type in case of -cpu host, and fill
it in for that class in a PAPR-compliant way with "PowerPC," prefix.
Reported-by: Prerna Saxena
Signed-off-by: Andreas Färber
---
hw/ppc/spapr.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 6d984dc..0e9be32 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -344,6 +344,10 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
const char *typename;
typename = object_class_get_name(oc);
+if (kvm_enabled() &&
+strcmp(typename, "host-" TYPE_POWERPC_CPU) == 0) {
+typename = object_class_get_name(object_class_get_parent(oc));
+}
nodename = g_strndup(typename,
strlen(typename) - strlen("-"
TYPE_POWERPC_CPU));
dc->fw_name = g_strdup_printf("PowerPC,%s", nodename);
--
1.8.1.4
[Qemu-devel] [PATCH v2 4/4] spapr: Suppress underscores in device tree CPU node
PAPR requires that PowerPC, shall not contain underscores, so skip
any underscores in the type name.
Reported-by: Prerna Saxena
Signed-off-by: Andreas Färber
---
hw/ppc/spapr.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 0e9be32..137e060 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -264,7 +264,7 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
char qemu_hypertas_prop[] = "hcall-memop1";
uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
-int i, smt = kvmppc_smt_threads();
+int i, j, smt = kvmppc_smt_threads();
unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
fdt = g_malloc0(FDT_MAX_SIZE);
@@ -350,6 +350,17 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
}
nodename = g_strndup(typename,
strlen(typename) - strlen("-"
TYPE_POWERPC_CPU));
+for (i = j = 0; j < strlen(nodename); i++, j++) {
+if (nodename[j] == '_') {
+j++;
+}
+if (j > i) {
+nodename[i] = nodename[j];
+}
+}
+if (j > i) {
+nodename[i] = '\0';
+}
dc->fw_name = g_strdup_printf("PowerPC,%s", nodename);
g_free(nodename);
}
--
1.8.1.4
[Qemu-devel] [PATCH v2 1/4] target-ppc: Fill in OpenFirmware names for some PowerPCCPU families
Set the expected values for POWER7, POWER7+, POWER8 and POWER5+. Note that POWER5+ and POWER7+ are intentionally lacking the '+', so the lack of a POWER7P family constitutes no problem. Signed-off-by: Andreas Färber --- target-ppc/translate_init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 13b290c..28ca447 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7102,6 +7102,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); +dc->fw_name = "PowerPC,POWER5"; dc->desc = "POWER5+"; pcc->init_proc = init_proc_power5plus; pcc->check_pow = check_pow_970FX; @@ -7212,6 +7213,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); +dc->fw_name = "PowerPC,POWER7"; dc->desc = "POWER7"; pcc->init_proc = init_proc_POWER7; pcc->check_pow = check_pow_nocheck; @@ -7246,6 +7248,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); +dc->fw_name = "PowerPC,POWER8"; dc->desc = "POWER8"; pcc->init_proc = init_proc_POWER7; pcc->check_pow = check_pow_nocheck; -- 1.8.1.4
[Qemu-devel] [PATCH v2 2/4] spapr: Use DeviceClass::fw_name for device tree CPU node
Instead of relying on cpu_model, obtain the device tree node label
per CPU. Use DeviceClass::fw_name when available. This implicitly
resolves HOST@0 node labels for those CPUs through inheritance.
Whenever DeviceClass::fw_name is not available, derive it from the CPU's
type name and fill it in for that class with a "PowerPC," prefix for
PAPR compliance.
As a consequence, spapr_fixup_cpu_dt() can operate on each CPU's fw_name,
obsoleting sPAPREnvironment::cpu_model, and spapr_create_fdt_skel() can
drop its cpu_model argument.
Signed-off-by: Prerna Saxena
Signed-off-by: Andreas Färber
---
hw/ppc/spapr.c | 36
include/hw/ppc/spapr.h | 1 -
2 files changed, 16 insertions(+), 21 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 16bfab9..6d984dc 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -165,9 +165,8 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment
*spapr)
int smt = kvmppc_smt_threads();
uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
-assert(spapr->cpu_model);
-
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
+DeviceClass *dc = DEVICE_GET_CLASS(cpu);
uint32_t associativity[] = {cpu_to_be32(0x5),
cpu_to_be32(0x0),
cpu_to_be32(0x0),
@@ -179,7 +178,7 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment
*spapr)
continue;
}
-snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model,
+snprintf(cpu_model, 32, "/cpus/%s@%x", dc->fw_name,
cpu->cpu_index);
offset = fdt_path_offset(fdt, cpu_model);
@@ -249,8 +248,7 @@ static size_t create_page_sizes_prop(CPUPPCState *env,
uint32_t *prop,
} while (0)
-static void *spapr_create_fdt_skel(const char *cpu_model,
- hwaddr initrd_base,
+static void *spapr_create_fdt_skel(hwaddr initrd_base,
hwaddr initrd_size,
hwaddr kernel_size,
const char *boot_device,
@@ -266,7 +264,6 @@ static void *spapr_create_fdt_skel(const char *cpu_model,
char qemu_hypertas_prop[] = "hcall-memop1";
uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
-char *modelname;
int i, smt = kvmppc_smt_threads();
unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
@@ -322,18 +319,10 @@ static void *spapr_create_fdt_skel(const char *cpu_model,
_FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
_FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
-modelname = g_strdup(cpu_model);
-
-for (i = 0; i < strlen(modelname); i++) {
-modelname[i] = toupper(modelname[i]);
-}
-
-/* This is needed during FDT finalization */
-spapr->cpu_model = g_strdup(modelname);
-
for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
+DeviceClass *dc = DEVICE_GET_CLASS(cs);
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
int index = cs->cpu_index;
uint32_t servers_prop[smp_threads];
@@ -350,7 +339,17 @@ static void *spapr_create_fdt_skel(const char *cpu_model,
continue;
}
-nodename = g_strdup_printf("%s@%x", modelname, index);
+if (dc->fw_name == NULL) {
+ObjectClass *oc = OBJECT_CLASS(pcc);
+const char *typename;
+
+typename = object_class_get_name(oc);
+nodename = g_strndup(typename,
+ strlen(typename) - strlen("-"
TYPE_POWERPC_CPU));
+dc->fw_name = g_strdup_printf("PowerPC,%s", nodename);
+g_free(nodename);
+}
+nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
_FDT((fdt_begin_node(fdt, nodename)));
@@ -430,8 +429,6 @@ static void *spapr_create_fdt_skel(const char *cpu_model,
_FDT((fdt_end_node(fdt)));
}
-g_free(modelname);
-
_FDT((fdt_end_node(fdt)));
/* RTAS */
@@ -1308,8 +1305,7 @@ static void ppc_spapr_init(QEMUMachineInitArgs *args)
&savevm_htab_handlers, spapr);
/* Prepare the device tree */
-spapr->fdt_skel = spapr_create_fdt_skel(cpu_model,
-initrd_base, initrd_size,
+spapr->fdt_skel = spapr_create_fdt_skel(initrd_base, initrd_size,
kernel_size,
boot_device, kernel_cmdline,
spapr->epow_irq);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 9fc1972..b4a7656 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -27,7 +27,6 @@ typedef struct sPAPREnvironmen
[Qemu-devel] [PATCH v2 0/4] target-ppc: Tidy sPAPR device tree CPU nodes
Hello Prerna and Alex, This series cleans up the fdt CPU nodes for -M pseries as attempted by Prerna. v2 reuses DeviceClass::fw_name for name storage and cleans up sPAPR code to not rely on machine-global cpu_model or sPAPREnvironment::cpu_model. Underscores are avoided by using fw_name that doesn't have them for known CPUs or by stripping them explicitly. Regards, Andreas preview -> v2: * Set fw_name at family level rather than model level, saving macro extensions. * Appended patch stripping underscores (Prerna). v1 / Prerna's v3 -> preview: * Instead of overwriting cpu_model with parent's type name for -cpu host, set fw_name for some models and read type / parent's types otherwise. * Don't pass cpu_model to functions, determine name per CPU iterated. * Avoid walking alias list by taking fw_name or model part of type name. Cc: Prerna Saxena Cc: Alexander Graf Cc: Alexey Kardashevskiy Cc: Benjamin Herrenschmidt Cc: Thomas Huth Cc: Anthony Liguori Cc: qemu-...@nongnu.org Andreas Färber (4): target-ppc: Fill in OpenFirmware names for some PowerPCCPU families spapr: Use DeviceClass::fw_name for device tree CPU node spapr: Improve device tree CPU node for -cpu host with unknown OF name spapr: Suppress underscores in device tree CPU node hw/ppc/spapr.c | 53 +++-- include/hw/ppc/spapr.h | 1 - target-ppc/translate_init.c | 3 +++ 3 files changed, 35 insertions(+), 22 deletions(-) -- 1.8.1.4
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On 15 August 2013 23:18, Guenter Roeck wrote: > But doesn't that mean that there is _currently_ no problem ? If so, > we can introduce the additional code when the problem really shows up. > Being Preemptive is good, but if it is not really needed today > I would rather have today's problems resolved and bother about tomorrow's > when they show up. Conceptually the two parts go together: rely on correct irq routing, tell qemu we rely on correct irq routing. It's only one extra line... -- PMM
Re: [Qemu-devel] [PATCH v2 for 1.6] w32: Add missing version.o to all executables (fix regression)
Quoting Stefan Weil (2013-08-08 13:18:07) > QEMU executables for w32, w64 had included meta information built from > version.rc. These rules were changed several times some months ago. > > The latest version added version.o to the tools, but not to the system > emulations. > > This patch adds the meta information to all system emulations again. > > Signed-off-by: Stefan Weil I seem to be getting build errors with this patch when doing a Fedora 18 mingw crossbuild. I thought it was specific to qemu-ga so I disabled it to confirm and it looks like version.o is never being built, so all targets fail when linking. Reverting this patch seems to fix things Output follows: [mdroth@vm5 qemu-build2]$ rm -rf * && /home/mdroth/w/qemu2.git/configure --target-list=x86_64-softmmu --cross-prefix=i686-w64-mingw32- --disable-guest-agent && make -j4 Install prefixc:/Program Files/QEMU BIOS directoryc:/Program Files/QEMU binary directory c:/Program Files/QEMU library directory c:/Program Files/QEMU/lib libexec directory c:/Program Files/QEMU/libexec include directory c:/Program Files/QEMU/include config directory c:/Program Files/QEMU local state directory queried at runtime Source path /home/mdroth/w/qemu2.git C compileri686-w64-mingw32-gcc Host C compiler cc Objective-C compiler i686-w64-mingw32-gcc CFLAGS-O2 -D_FORTIFY_SOURCE=2 -g QEMU_CFLAGS -m32 -D__USE_MINGW_ANSI_STDIO=1 -DWIN32_LEAN_AND_MEAN -DWINVER=0x501 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -Wendif-labels -Wmissing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-all -I/usr/i686-w64-mingw32/sys-root/mingw/include -I/usr/i686-w64-mingw32/sys-root/mingw/include/p11-kit-1 -I/usr/i686-w64-mingw32/sys-root/mingw/include/pixman-1 -I$(SRC_PATH)/dtc/libfdt LDFLAGS -Wl,--nxcompat -Wl,--no-seh -Wl,--dynamicbase -Wl,--warn-common -m32 -g make make install install pythonpython smbd /usr/sbin/smbd host CPU i386 host big endian no target list x86_64-softmmu tcg debug enabled no gprof enabled no sparse enabledno strip binariesyes profiler no static build no -Werror enabled no pixmansystem SDL support no GTK support no curses supportno curl support no mingw32 support yes Audio drivers winwave Block whitelist (rw) Block whitelist (ro) Mixer emulation no VirtFS supportno VNC support yes VNC TLS support yes VNC SASL support no VNC JPEG support no VNC PNG support no VNC WS supportyes xen support no brlapi supportno bluez supportno Documentation no GUEST_BASEyes PIE no vde support no Linux AIO support no ATTR/XATTR support no Install blobs yes KVM support no RDMA support no TCG interpreter no fdt support yes preadv supportno fdatasync no madvise no posix_madvise no sigev_thread_id no uuid support no libcap-ng support no vhost-net support no vhost-scsi support no Trace backend nop Trace output file trace- spice support no (/) rbd support no xfsctl supportno nss used no libusbno usb net redir no GLX support no libiscsi support no build guest agent no seccomp support no coroutine backend win32 GlusterFS support no virtio-blk-data-plane no gcov gcov gcov enabled no TPM support no libssh2 support no TPM passthrough no QOM debugging yes GEN x86_64-softmmu/config-devices.mak mkdir -p dtc/libfdt GEN config-/home/mdroth/qemu-build2/host.h GEN config-host.h mkdir -p dtc/tests GEN qemu-options.def GEN qmp-commands.h GEN qapi-types.h GEN qapi-visit.h GEN trace/generated-events.h GEN trace/generated-tracers.h GEN tests/test-qapi-types.h GEN tests/test-qapi-visit.h GEN tests/test-qmp-commands.h GEN config-all-devices.mak DEP /home/mdroth/w/qemu2.git/dtc/tests/dumptrees.c DEP /home/mdroth/w/qemu2.git/dtc/tests/trees.S DEP /home/mdroth/w/qemu2.git/dtc/tests/testutils.c DEP /home/mdroth/w/qemu2.git/dtc/tests/value-labels.c DEP /home/mdroth/w/qemu2.git/dtc/tests/asm_tree_dump.c DEP /home/mdroth/w/qemu2.git/dtc/tests/truncated_property.c DEP /home/mdroth/w/qemu2.git/dtc/tests/path_offset_aliases.c DEP /home/mdroth/w/qemu2.git/dtc/tests/add_subnode_with_nops.c DEP /home/mdroth/w/qemu2.git/dtc/tests/dtb_reverse.c DEP /home/mdroth/w/qemu2.git/dtc/tests/dtbs_equal_unordered.c DEP /home/mdroth/w/qemu2.git/dtc/tests/dtbs_equal_ordered.c DEP /home/mdroth/w/qemu2.git/dtc/tests/extra-terminating-null.c DEP /home/mdroth
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On 08/15/2013 02:49 PM, Peter Maydell wrote:
On 15 August 2013 21:50, Guenter Roeck wrote:
On Thu, Aug 15, 2013 at 07:05:22PM +0100, Peter Maydell wrote:
It needs to go in the same patch, because a kernel with the fixed
irq remapping must also tell QEMU it is fixed; if you split the
two then at the point between the two patches the kernel is
broken for bisection purposes.
Thinking about it - is that really true ? My image with the
patch applied works just fine under qemu 1.5.2, and unless
I am missing something it won't work with qemu 1.4 anyway.
So what exactly is broken ?
You're OK unless the kernel happens to pick the same interrupt
number to write to PCI_INTERRUPT_LINE as one of the previous
broken kernel versions did (in which case QEMU will incorrectly
assume you're a broken kernel). This can't happen with the way
the kernel is currently picking interrupt numbers (ie with a
straightforward relationship between h/w irqs and values written),
but as I understand from Arnd there is a plan to move to a
different approach ("sparse irqs") at which point this won't hold:
http://lists.gnu.org/archive/html/qemu-devel/2013-03/msg04579.html
So it's better for the kernel to make sure it gets the
behaviour it wants rather than getting unpleasant surprises
later.
But doesn't that mean that there is _currently_ no problem ? If so,
we can introduce the additional code when the problem really shows up.
Being Preemptive is good, but if it is not really needed today
I would rather have today's problems resolved and bother about tomorrow's
when they show up.
Guenter
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On 15 August 2013 21:50, Guenter Roeck wrote:
> On Thu, Aug 15, 2013 at 07:05:22PM +0100, Peter Maydell wrote:
>> It needs to go in the same patch, because a kernel with the fixed
>> irq remapping must also tell QEMU it is fixed; if you split the
>> two then at the point between the two patches the kernel is
>> broken for bisection purposes.
>>
> Thinking about it - is that really true ? My image with the
> patch applied works just fine under qemu 1.5.2, and unless
> I am missing something it won't work with qemu 1.4 anyway.
> So what exactly is broken ?
You're OK unless the kernel happens to pick the same interrupt
number to write to PCI_INTERRUPT_LINE as one of the previous
broken kernel versions did (in which case QEMU will incorrectly
assume you're a broken kernel). This can't happen with the way
the kernel is currently picking interrupt numbers (ie with a
straightforward relationship between h/w irqs and values written),
but as I understand from Arnd there is a plan to move to a
different approach ("sparse irqs") at which point this won't hold:
http://lists.gnu.org/archive/html/qemu-devel/2013-03/msg04579.html
So it's better for the kernel to make sure it gets the
behaviour it wants rather than getting unpleasant surprises
later.
-- PMM
[Qemu-devel] [PATCHv11 07/31] aio / timers: Make qemu_run_timers and qemu_run_all_timers return progress
Make qemu_run_timers and qemu_run_all_timers return progress
so that aio_poll etc. can determine whether a timer has been
run.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 21 +++--
qemu-timer.c | 18 --
2 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index fcc3ca0..fcb6a42 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -92,8 +92,25 @@ bool timer_pending(QEMUTimer *ts);
bool timer_expired(QEMUTimer *timer_head, int64_t current_time);
uint64_t timer_expire_time_ns(QEMUTimer *ts);
-void qemu_run_timers(QEMUClock *clock);
-void qemu_run_all_timers(void);
+/**
+ * qemu_run_timers:
+ * @clock: clock on which to operate
+ *
+ * Run all the timers associated with a clock.
+ *
+ * Returns: true if any timer ran.
+ */
+bool qemu_run_timers(QEMUClock *clock);
+
+/**
+ * qemu_run_all_timers:
+ *
+ * Run all the timers associated with every clock.
+ *
+ * Returns: true if any timer ran.
+ */
+bool qemu_run_all_timers(void);
+
void configure_alarms(char const *opt);
void init_clocks(void);
int init_timer_alarm(void);
diff --git a/qemu-timer.c b/qemu-timer.c
index f224b62..4a10315 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -446,13 +446,14 @@ bool timer_expired(QEMUTimer *timer_head, int64_t
current_time)
return timer_expired_ns(timer_head, current_time * timer_head->scale);
}
-void qemu_run_timers(QEMUClock *clock)
+bool qemu_run_timers(QEMUClock *clock)
{
QEMUTimer *ts;
int64_t current_time;
+bool progress = false;
if (!clock->enabled)
-return;
+return progress;
current_time = qemu_get_clock_ns(clock);
for(;;) {
@@ -466,7 +467,9 @@ void qemu_run_timers(QEMUClock *clock)
/* run the callback (the timer list can be modified) */
ts->cb(ts->opaque);
+progress = true;
}
+return progress;
}
int64_t qemu_get_clock_ns(QEMUClock *clock)
@@ -521,20 +524,23 @@ uint64_t timer_expire_time_ns(QEMUTimer *ts)
return timer_pending(ts) ? ts->expire_time : -1;
}
-void qemu_run_all_timers(void)
+bool qemu_run_all_timers(void)
{
+bool progress = false;
alarm_timer->pending = false;
/* vm time timers */
-qemu_run_timers(vm_clock);
-qemu_run_timers(rt_clock);
-qemu_run_timers(host_clock);
+progress |= qemu_run_timers(vm_clock);
+progress |= qemu_run_timers(rt_clock);
+progress |= qemu_run_timers(host_clock);
/* rearm timer, if not periodic */
if (alarm_timer->expired) {
alarm_timer->expired = false;
qemu_rearm_alarm_timer(alarm_timer);
}
+
+return progress;
}
#ifdef _WIN32
--
1.7.9.5
Re: [Qemu-devel] [PATCH for-next 6/8] tcg-i386: Use new return-argument ld/st helpers
On 08/15/2013 08:54 AM, Aurelien Jarno wrote: >> > # define GETRA() ((uintptr_t)__builtin_return_address(0)) >> > -# define GETPC_LDST() ((uintptr_t)(GETRA() + 7 + \ >> > -*(int32_t *)((void *)GETRA() + 3) - >> > 1)) >> > +/* The return address argument for ldst is passed directly. */ >> > +# define GETPC_LDST() (abort(), 0) > Why an abort here, while in the arm version, you adds support for > not defining GETPC_LDST? > GETPC_LDST is for the original helpers, when called from TCG. In the arm case, TCG still uses the original helpers, so GETPC_LDST is used. In the i386, TCG never uses the original helpers, so GETPC_LDST should never be used. We could do like arm and completely drop the check, I suppose. r~
[Qemu-devel] [PATCHv11 15/31] aio / timers: Convert aio_poll to use AioContext timers' deadline
Convert aio_poll to use deadline based on AioContext's timers.
aio_poll has been changed to return accurately whether progress
has occurred. Prior to this commit, aio_poll always returned
true if g_poll was entered, whether or not any progress was
made. This required a change to tests/test-aio.c where an
assert was backwards.
Signed-off-by: Alex Bligh
---
aio-posix.c | 20 +---
aio-win32.c | 22 +++---
tests/test-aio.c |4 ++--
3 files changed, 34 insertions(+), 12 deletions(-)
diff --git a/aio-posix.c b/aio-posix.c
index b68eccd..e5b89ab 100644
--- a/aio-posix.c
+++ b/aio-posix.c
@@ -166,6 +166,10 @@ static bool aio_dispatch(AioContext *ctx)
g_free(tmp);
}
}
+
+/* Run our timers */
+progress |= timerlistgroup_run_timers(&ctx->tlg);
+
return progress;
}
@@ -232,9 +236,9 @@ bool aio_poll(AioContext *ctx, bool blocking)
}
/* wait until next event */
-ret = g_poll((GPollFD *)ctx->pollfds->data,
- ctx->pollfds->len,
- blocking ? -1 : 0);
+ret = qemu_poll_ns((GPollFD *)ctx->pollfds->data,
+ ctx->pollfds->len,
+ blocking ? timerlistgroup_deadline_ns(&ctx->tlg) : 0);
/* if we have any readable fds, dispatch event */
if (ret > 0) {
@@ -245,11 +249,13 @@ bool aio_poll(AioContext *ctx, bool blocking)
node->pfd.revents = pfd->revents;
}
}
-if (aio_dispatch(ctx)) {
-progress = true;
-}
+}
+
+/* Run dispatch even if there were no readable fds to run timers */
+if (aio_dispatch(ctx)) {
+progress = true;
}
assert(progress || busy);
-return true;
+return progress;
}
diff --git a/aio-win32.c b/aio-win32.c
index 38723bf..479b871 100644
--- a/aio-win32.c
+++ b/aio-win32.c
@@ -98,6 +98,7 @@ bool aio_poll(AioContext *ctx, bool blocking)
HANDLE events[MAXIMUM_WAIT_OBJECTS + 1];
bool busy, progress;
int count;
+int timeout;
progress = false;
@@ -111,6 +112,9 @@ bool aio_poll(AioContext *ctx, bool blocking)
progress = true;
}
+/* Run timers */
+progress |= timerlistgroup_run_timers(&ctx->tlg);
+
/*
* Then dispatch any pending callbacks from the GSource.
*
@@ -174,8 +178,11 @@ bool aio_poll(AioContext *ctx, bool blocking)
/* wait until next event */
while (count > 0) {
-int timeout = blocking ? INFINITE : 0;
-int ret = WaitForMultipleObjects(count, events, FALSE, timeout);
+int ret;
+
+timeout = blocking ?
+qemu_timeout_ns_to_ms(timerlistgroup_deadline_ns(&ctx->tlg)) : 0;
+ret = WaitForMultipleObjects(count, events, FALSE, timeout);
/* if we have any signaled events, dispatch event */
if ((DWORD) (ret - WAIT_OBJECT_0) >= count) {
@@ -214,6 +221,15 @@ bool aio_poll(AioContext *ctx, bool blocking)
events[ret - WAIT_OBJECT_0] = events[--count];
}
+if (blocking) {
+/* Run the timers a second time. We do this because otherwise aio_wait
+ * will not note progress - and will stop a drain early - if we have
+ * a timer that was not ready to run entering g_poll but is ready
+ * after g_poll. This will only do anything if a timer has expired.
+ */
+progress |= timerlistgroup_run_timers(ctx->timer_list);
+}
+
assert(progress || busy);
-return true;
+return progress;
}
diff --git a/tests/test-aio.c b/tests/test-aio.c
index 2d7ec4c..eedf7f8 100644
--- a/tests/test-aio.c
+++ b/tests/test-aio.c
@@ -316,13 +316,13 @@ static void test_wait_event_notifier_noflush(void)
event_notifier_set(&data.e);
g_assert(aio_poll(ctx, false));
g_assert_cmpint(data.n, ==, 1);
-g_assert(aio_poll(ctx, false));
+g_assert(!aio_poll(ctx, false));
g_assert_cmpint(data.n, ==, 1);
event_notifier_set(&data.e);
g_assert(aio_poll(ctx, false));
g_assert_cmpint(data.n, ==, 2);
-g_assert(aio_poll(ctx, false));
+g_assert(!aio_poll(ctx, false));
g_assert_cmpint(data.n, ==, 2);
event_notifier_set(&dummy.e);
--
1.7.9.5
[Qemu-devel] [PATCHv11 14/31] aio / timers: Add aio_timer_init & aio_timer_new wrappers
Add aio_timer_init and aio_timer_new wrapper functions.
Signed-off-by: Alex Bligh
---
include/block/aio.h | 43 +++
1 file changed, 43 insertions(+)
diff --git a/include/block/aio.h b/include/block/aio.h
index 84d7366..d19d9d2 100644
--- a/include/block/aio.h
+++ b/include/block/aio.h
@@ -256,4 +256,47 @@ void qemu_aio_set_fd_handler(int fd,
void *opaque);
#endif
+/**
+ * aio_timer_new:
+ * @ctx: the aio context
+ * @type: the clock type
+ * @scale: the scale
+ * @cb: the callback to call on timer expiry
+ * @opaque: the opaque pointer to pass to the callback
+ *
+ * Allocate a new timer attached to the context @ctx.
+ * The function is responsible for memory allocation.
+ *
+ * The preferred interface is aio_timer_init. Use that
+ * unless you really need dynamic memory allocation.
+ *
+ * Returns: a pointer to the new timer
+ */
+static inline QEMUTimer *aio_timer_new(AioContext *ctx, QEMUClockType type,
+ int scale,
+ QEMUTimerCB *cb, void *opaque)
+{
+return timer_new_tl(ctx->tlg.tl[type], scale, cb, opaque);
+}
+
+/**
+ * aio_timer_init:
+ * @ctx: the aio context
+ * @ts: the timer
+ * @type: the clock type
+ * @scale: the scale
+ * @cb: the callback to call on timer expiry
+ * @opaque: the opaque pointer to pass to the callback
+ *
+ * Initialise a new timer attached to the context @ctx.
+ * The caller is responsible for memory allocation.
+ */
+static inline void aio_timer_init(AioContext *ctx,
+ QEMUTimer *ts, QEMUClockType type,
+ int scale,
+ QEMUTimerCB *cb, void *opaque)
+{
+timer_init(ts, ctx->tlg.tl[type], scale, cb, opaque);
+}
+
#endif
--
1.7.9.5
[Qemu-devel] [PATCHv11 11/31] aio / timers: Add QEMUTimerListGroup to AioContext
Add a QEMUTimerListGroup each AioContext (meaning a QEMUTimerList
associated with each clock is added) and delete it when the
AioContext is freed.
Signed-off-by: Alex Bligh
---
async.c |2 ++
include/block/aio.h |4
tests/test-aio.c |3 +++
tests/test-thread-pool.c |3 +++
4 files changed, 12 insertions(+)
diff --git a/async.c b/async.c
index 5ce3633..ae2c700 100644
--- a/async.c
+++ b/async.c
@@ -205,6 +205,7 @@ aio_ctx_finalize(GSource *source)
event_notifier_cleanup(&ctx->notifier);
qemu_mutex_destroy(&ctx->bh_lock);
g_array_free(ctx->pollfds, TRUE);
+timerlistgroup_deinit(&ctx->tlg);
}
static GSourceFuncs aio_source_funcs = {
@@ -244,6 +245,7 @@ AioContext *aio_context_new(void)
aio_set_event_notifier(ctx, &ctx->notifier,
(EventNotifierHandler *)
event_notifier_test_and_clear, NULL);
+timerlistgroup_init(&ctx->tlg);
return ctx;
}
diff --git a/include/block/aio.h b/include/block/aio.h
index f6fbd6a..84d7366 100644
--- a/include/block/aio.h
+++ b/include/block/aio.h
@@ -19,6 +19,7 @@
#include "qemu/queue.h"
#include "qemu/event_notifier.h"
#include "qemu/thread.h"
+#include "qemu/timer.h"
typedef struct BlockDriverAIOCB BlockDriverAIOCB;
typedef void BlockDriverCompletionFunc(void *opaque, int ret);
@@ -73,6 +74,9 @@ struct AioContext {
/* Thread pool for performing work and receiving completion callbacks */
struct ThreadPool *thread_pool;
+
+/* TimerLists for calling timers - one per clock type */
+QEMUTimerListGroup tlg;
};
/* Returns 1 if there are still outstanding AIO requests; 0 otherwise */
diff --git a/tests/test-aio.c b/tests/test-aio.c
index c173870..2d7ec4c 100644
--- a/tests/test-aio.c
+++ b/tests/test-aio.c
@@ -12,6 +12,7 @@
#include
#include "block/aio.h"
+#include "qemu/timer.h"
AioContext *ctx;
@@ -628,6 +629,8 @@ int main(int argc, char **argv)
{
GSource *src;
+init_clocks();
+
ctx = aio_context_new();
src = aio_get_g_source(ctx);
g_source_attach(src, NULL);
diff --git a/tests/test-thread-pool.c b/tests/test-thread-pool.c
index b62338f..27d6190 100644
--- a/tests/test-thread-pool.c
+++ b/tests/test-thread-pool.c
@@ -3,6 +3,7 @@
#include "block/aio.h"
#include "block/thread-pool.h"
#include "block/block.h"
+#include "qemu/timer.h"
static AioContext *ctx;
static ThreadPool *pool;
@@ -205,6 +206,8 @@ int main(int argc, char **argv)
{
int ret;
+init_clocks();
+
ctx = aio_context_new();
pool = aio_get_thread_pool(ctx);
--
1.7.9.5
[Qemu-devel] [PATCHv11 25/31] aio / timers: Remove main_loop_timerlist
Now we have timerlistgroups implemented and main_loop_tlg, we
no longer need the concept of a default timer list associated
with each clock. Remove it and simplify initialisation of
clocks and timer lists.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h |6 +
qemu-timer.c | 63 ++
2 files changed, 28 insertions(+), 41 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index d90e437..eeb814d 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -65,7 +65,6 @@ struct QEMUTimer {
};
extern QEMUTimerListGroup main_loop_tlg;
-extern QEMUClock *qemu_clocks[QEMU_CLOCK_MAX];
/*
* QEMUClock & QEMUClockType
@@ -79,10 +78,7 @@ extern QEMUClock *qemu_clocks[QEMU_CLOCK_MAX];
*
* Returns: a pointer to the QEMUClock object
*/
-static inline QEMUClock *qemu_clock_ptr(QEMUClockType type)
-{
-return qemu_clocks[type];
-}
+QEMUClock *qemu_clock_ptr(QEMUClockType type);
/**
* qemu_clock_get_ns;
diff --git a/qemu-timer.c b/qemu-timer.c
index e81e651..8498651 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -45,7 +45,6 @@
/* timers */
struct QEMUClock {
-QEMUTimerList *main_loop_timerlist;
QLIST_HEAD(, QEMUTimerList) timerlists;
NotifierList reset_notifiers;
@@ -56,7 +55,7 @@ struct QEMUClock {
};
QEMUTimerListGroup main_loop_tlg;
-QEMUClock *qemu_clocks[QEMU_CLOCK_MAX];
+QEMUClock qemu_clocks[QEMU_CLOCK_MAX];
/* A QEMUTimerList is a list of timers attached to a clock. More
* than one QEMUTimerList can be attached to each clock, for instance
@@ -73,24 +72,30 @@ struct QEMUTimerList {
void *notify_opaque;
};
+/**
+ * qemu_clock_ptr:
+ * @type: type of clock
+ *
+ * Translate a clock type into a pointer to QEMUClock object.
+ *
+ * Returns: a pointer to the QEMUClock object
+ */
+QEMUClock *qemu_clock_ptr(QEMUClockType type)
+{
+return &qemu_clocks[type];
+}
+
static bool timer_expired_ns(QEMUTimer *timer_head, int64_t current_time)
{
return timer_head && (timer_head->expire_time <= current_time);
}
-static QEMUTimerList *timerlist_new_from_clock(QEMUClock *clock,
- QEMUTimerListNotifyCB *cb,
- void *opaque)
+QEMUTimerList *timerlist_new(QEMUClockType type,
+ QEMUTimerListNotifyCB *cb,
+ void *opaque)
{
QEMUTimerList *timer_list;
-
-/* Assert if we do not have a clock. If you see this
- * assertion in means that the clocks have not been
- * initialised before a timerlist is needed. This
- * normally happens if an AioContext is used before
- * init_clocks() is called within main().
- */
-assert(clock);
+QEMUClock *clock = qemu_clock_ptr(type);
timer_list = g_malloc0(sizeof(QEMUTimerList));
timer_list->clock = clock;
@@ -100,36 +105,25 @@ static QEMUTimerList *timerlist_new_from_clock(QEMUClock
*clock,
return timer_list;
}
-QEMUTimerList *timerlist_new(QEMUClockType type,
- QEMUTimerListNotifyCB *cb, void *opaque)
-{
-return timerlist_new_from_clock(qemu_clock_ptr(type), cb, opaque);
-}
-
void timerlist_free(QEMUTimerList *timer_list)
{
assert(!timerlist_has_timers(timer_list));
if (timer_list->clock) {
QLIST_REMOVE(timer_list, list);
-if (timer_list->clock->main_loop_timerlist == timer_list) {
-timer_list->clock->main_loop_timerlist = NULL;
-}
}
g_free(timer_list);
}
-static QEMUClock *qemu_clock_new(QEMUClockType type)
+static void qemu_clock_init(QEMUClockType type)
{
-QEMUClock *clock;
+QEMUClock *clock = qemu_clock_ptr(type);
-clock = g_malloc0(sizeof(QEMUClock));
clock->type = type;
clock->enabled = true;
clock->last = INT64_MIN;
QLIST_INIT(&clock->timerlists);
notifier_list_init(&clock->reset_notifiers);
-clock->main_loop_timerlist = timerlist_new_from_clock(clock, NULL, NULL);
-return clock;
+main_loop_tlg.tl[type] = timerlist_new(type, NULL, NULL);
}
bool qemu_clock_use_for_deadline(QEMUClockType type)
@@ -164,7 +158,7 @@ bool timerlist_has_timers(QEMUTimerList *timer_list)
bool qemu_clock_has_timers(QEMUClockType type)
{
return timerlist_has_timers(
-qemu_clock_ptr(type)->main_loop_timerlist);
+main_loop_tlg.tl[type]);
}
bool timerlist_expired(QEMUTimerList *timer_list)
@@ -177,7 +171,7 @@ bool timerlist_expired(QEMUTimerList *timer_list)
bool qemu_clock_expired(QEMUClockType type)
{
return timerlist_expired(
-qemu_clock_ptr(type)->main_loop_timerlist);
+main_loop_tlg.tl[type]);
}
/*
@@ -227,7 +221,7 @@ QEMUClockType timerlist_get_clock(QEMUTimerList *timer_list)
QEMUTimerList *qemu_clock_get_main_loop_timerlist(QEMUClockType type)
{
-return qemu_clock_ptr(type)->main_loop_timerlist;
+return main_loop_tlg.tl[type];
}
void timerlis
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On Thu, Aug 15, 2013 at 07:05:22PM +0100, Peter Maydell wrote: > On 15 August 2013 18:54, Guenter Roeck wrote: > > On Thu, Aug 15, 2013 at 05:45:42PM +0100, Peter Maydell wrote: > >> On 13 August 2013 04:40, Guenter Roeck wrote: > >> > Patch tested and working with qemu 1.5.2, using the configuration file > >> > from the yocto project. Patch applied on top of kernel version 3.11-rc5. > >> > >> OK, I tested this on PB926+PCI backplane hardware, and it is > >> definitely better than current mainline, in that the test USB > >> card that I have no longer causes the kernel to generate this sort of > >> backtrace: > >> > > Do you mean my patch fixes the traceback below as a side effect ? > > Would be great ... it would be one more reason to get it applied. > > Yes, exactly -- the kernel currently has the wrong irq mapping, > which causes the traceback (ie h/w asserts irq 93 but the kernel > is listening on something else). That the patch fixes this confirms > that it is the behaviour of hardware as well as of QEMU. > > >> However it still doesn't seem to reliably detect the USB harddisk > >> plugged into the card, so I think there may be further issues, possibly > >> some subset of those Arnd identified and fixed with this patch: > >> http://permalink.gmane.org/gmane.linux.ports.arm.kernel/93397 > >> > > Does it get better if you apply Arnd's patch ? > > Arnd's patch is ancient and won't apply as is (due to intervening > changes and also because some of the things it fixes were fixed > in later patches); I'm currently trying to extract the relevant parts. > > If you want you can confirm that I/O port PCI access is broken on > QEMU too -- disable CONFIG_SCSI_SYM53C8XX_MMIO so > the driver uses PCI IO rather than MMIO and you'll see QEMU's > SCSI device doesn't work any more. > > >> so I'd like to continue testing. > >> > >> The other thing this patch should (IMHO) have is the > >> line in pci_versatile_setup() which tells QEMU that the > >> kernel really does expect hardware-like behaviour: > > >> (Without this line QEMU will guess whether the kernel is broken > >> or not and will get it right most but not necessarily all of the time.) > >> > > Might make sense, but I think it should be a separate patch. > > It needs to go in the same patch, because a kernel with the fixed > irq remapping must also tell QEMU it is fixed; if you split the > two then at the point between the two patches the kernel is > broken for bisection purposes. > Thinking about it - is that really true ? My image with the patch applied works just fine under qemu 1.5.2, and unless I am missing something it won't work with qemu 1.4 anyway. So what exactly is broken ? Thanks, Guenter
[Qemu-devel] Development tree is now open for 1.7
Happy hacking! Regards, Anthony Liguori
Re: [Qemu-devel] [PATCH for-next 4/8] tcg: Add mmu helpers that take a return address argument
On 08/15/2013 08:54 AM, Aurelien Jarno wrote: > Why removing this st*_cmmu versions? There might be a good reason, but > it should be indicated in the patch description. Though the prototypes existed, the bodies were never generated. We already ifdef out the store functions in the template when invoked for reading for code. r~
[Qemu-devel] [ANNOUNCE] QEMU 1.6.0 is now available
Hi,
On behalf of the QEMU Team, I'd like to announce the availability of
the QEMU 1.6.0 release. This release consists 1,600+ commmits from
129 authors.
http://wiki.qemu.org/download/qemu-1.6.0.tar.bz2
The full list of changes are available at:
http://wiki.qemu.org/ChangeLog/1.6
Highlights include:
* Support for live migration over RDMA
* TCG target for aarch64.
* Support for auto-convergence in live migration ("CPU stunning")
* The XHCI (USB 3.0) controller supports live migration.
* New device "nvme" provides a PCI device that implements the NVMe
standard.
* ACPI hotplug of devices behind a PCI bridge is supported
* The 32-bit ARMv8 LDA/STL instructions for load-acquire/store-release
are supported
* Experimental support for virtio-mmio for vexpress-a9 and vexpress-a15 boards
* Mac OS X guests supported (10.2-10.4 for PPC, 10.4 for PPC64)
* pSeries guests support live migration and savevm.
* BSDs now support the GTK+ user interface.
* Support for the pc machine type in Xen
* Support for TUN/TAP on Mac OS X
* And lots more...
Regards,
Anthony Liguori
[Qemu-devel] [PATCHv11 24/31] aio / timers: Rearrange timer.h & make legacy functions call non-legacy
Rearrange timer.h so it is in order by function type.
Make legacy functions call non-legacy functions rather than vice-versa.
Convert cpus.c to use new API.
Signed-off-by: Alex Bligh
---
cpus.c | 112 -
hw/acpi/piix4.c |2 +-
hw/input/tsc2005.c |4 +-
hw/input/tsc210x.c |4 +-
hw/sparc64/sun4u.c |4 +-
include/qemu/timer.h | 614 --
main-loop.c |2 +-
qemu-timer.c | 100 +---
qtest.c |2 +-
savevm.c |8 +-
stubs/clock-warp.c |2 +-
11 files changed, 477 insertions(+), 377 deletions(-)
diff --git a/cpus.c b/cpus.c
index 673d506..a6d7833 100644
--- a/cpus.c
+++ b/cpus.c
@@ -202,7 +202,7 @@ static void icount_adjust(void)
return;
}
cur_time = cpu_get_clock();
-cur_icount = qemu_get_clock_ns(vm_clock);
+cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
delta = cur_icount - cur_time;
/* FIXME: This is a very crude algorithm, somewhat prone to oscillation.
*/
if (delta > 0
@@ -223,15 +223,16 @@ static void icount_adjust(void)
static void icount_adjust_rt(void *opaque)
{
-qemu_mod_timer(icount_rt_timer,
- qemu_get_clock_ms(rt_clock) + 1000);
+timer_mod(icount_rt_timer,
+ qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000);
icount_adjust();
}
static void icount_adjust_vm(void *opaque)
{
-qemu_mod_timer(icount_vm_timer,
- qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
+timer_mod(icount_vm_timer,
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+ get_ticks_per_sec() / 10);
icount_adjust();
}
@@ -247,22 +248,22 @@ static void icount_warp_rt(void *opaque)
}
if (runstate_is_running()) {
-int64_t clock = qemu_get_clock_ns(rt_clock);
+int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
int64_t warp_delta = clock - vm_clock_warp_start;
if (use_icount == 1) {
qemu_icount_bias += warp_delta;
} else {
/*
- * In adaptive mode, do not let the vm_clock run too
+ * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too
* far ahead of real time.
*/
int64_t cur_time = cpu_get_clock();
-int64_t cur_icount = qemu_get_clock_ns(vm_clock);
+int64_t cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
int64_t delta = cur_time - cur_icount;
qemu_icount_bias += MIN(warp_delta, delta);
}
-if (qemu_clock_expired(vm_clock)) {
-qemu_clock_notify(vm_clock);
+if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) {
+qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
}
}
vm_clock_warp_start = -1;
@@ -270,19 +271,19 @@ static void icount_warp_rt(void *opaque)
void qtest_clock_warp(int64_t dest)
{
-int64_t clock = qemu_get_clock_ns(vm_clock);
+int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
assert(qtest_enabled());
while (clock < dest) {
-int64_t deadline = qemu_clock_deadline_ns_all(vm_clock);
+int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
int64_t warp = MIN(dest - clock, deadline);
qemu_icount_bias += warp;
-qemu_run_timers(vm_clock);
-clock = qemu_get_clock_ns(vm_clock);
+qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL);
+clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
}
-qemu_clock_notify(vm_clock);
+qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
}
-void qemu_clock_warp(QEMUClock *clock)
+void qemu_clock_warp(QEMUClockType type)
{
int64_t deadline;
@@ -291,20 +292,20 @@ void qemu_clock_warp(QEMUClock *clock)
* applicable to other clocks. But a clock argument removes the
* need for if statements all over the place.
*/
-if (clock != vm_clock || !use_icount) {
+if (type != QEMU_CLOCK_VIRTUAL || !use_icount) {
return;
}
/*
- * If the CPUs have been sleeping, advance the vm_clock timer now. This
- * ensures that the deadline for the timer is computed correctly below.
+ * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now.
+ * This ensures that the deadline for the timer is computed correctly
below.
* This also makes sure that the insn counter is synchronized before the
* CPU starts running, in case the CPU is woken by an event other than
- * the earliest vm_clock timer.
+ * the earliest QEMU_CLOCK_VIRTUAL timer.
*/
icount_warp_rt(NULL);
-if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) {
-qemu_del_timer(icount_warp_timer);
+if (!all_cpu_threads_idle() || !qemu_clock_has_timers(QEMU_CLOCK_VIRTUAL))
{
+timer_del(icount_warp_timer);
return;
}
@@ -313,12 +314,12 @@ void qemu_clock_warp(
[Qemu-devel] [PATCHv11 31/31] aio / timers: Remove legacy interface
Remove the legacy interface from include/qemu/timers.h.
Ensure struct QEMUClock is not exposed at all.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 214 +-
qemu-timer.c | 35 +
2 files changed, 5 insertions(+), 244 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index eeb814d..44093ff 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -45,7 +45,6 @@ typedef enum {
QEMU_CLOCK_MAX
} QEMUClockType;
-typedef struct QEMUClock QEMUClock;
typedef struct QEMUTimerList QEMUTimerList;
struct QEMUTimerListGroup {
@@ -67,20 +66,10 @@ struct QEMUTimer {
extern QEMUTimerListGroup main_loop_tlg;
/*
- * QEMUClock & QEMUClockType
+ * QEMUClockType
*/
-/**
- * qemu_clock_ptr:
- * @type: type of clock
- *
- * Translate a clock type into a pointer to QEMUClock object.
- *
- * Returns: a pointer to the QEMUClock object
- */
-QEMUClock *qemu_clock_ptr(QEMUClockType type);
-
-/**
+/*
* qemu_clock_get_ns;
* @type: the clock type
*
@@ -655,205 +644,6 @@ static inline int64_t get_ticks_per_sec(void)
return 10LL;
}
-/**
- * LEGACY API SECTION
- *
- * All these calls will be deleted in due course
- */
-
-/* These three clocks are maintained here with separate variable
- * names for compatibility only.
- */
-#define rt_clock (qemu_clock_ptr(QEMU_CLOCK_REALTIME))
-#define vm_clock (qemu_clock_ptr(QEMU_CLOCK_VIRTUAL))
-#define host_clock (qemu_clock_ptr(QEMU_CLOCK_HOST))
-
-/** LEGACY
- * qemu_get_clock_ns:
- * @clock: the clock to operate on
- *
- * Get the nanosecond value of a clock
- *
- * Returns: the clock value in nanoseconds
- */
-int64_t qemu_get_clock_ns(QEMUClock *clock);
-
-/** LEGACY
- * qemu_get_clock_ms:
- * @clock: the clock to operate on
- *
- * Get the millisecond value of a clock
- *
- * Returns: the clock value in milliseconds
- */
-static inline int64_t qemu_get_clock_ms(QEMUClock *clock)
-{
-return qemu_get_clock_ns(clock) / SCALE_MS;
-}
-
-/** LEGACY
- * qemu_register_clock_reset_notifier:
- * @clock: the clock to operate on
- * @notifier: the notifier function
- *
- * Register a notifier function to call when the clock
- * concerned is reset.
- */
-void qemu_register_clock_reset_notifier(QEMUClock *clock,
-Notifier *notifier);
-
-/** LEGACY
- * qemu_unregister_clock_reset_notifier:
- * @clock: the clock to operate on
- * @notifier: the notifier function
- *
- * Unregister a notifier function to call when the clock
- * concerned is reset.
- */
-void qemu_unregister_clock_reset_notifier(QEMUClock *clock,
- Notifier *notifier);
-
-/** LEGACY
- * qemu_new_timer:
- * @clock: the clock to operate on
- * @scale: the scale of the clock
- * @cb: the callback function to call when the timer expires
- * @opaque: an opaque pointer to pass to the callback
- *
- * Produce a new timer attached to clock @clock. This is a legacy
- * function. Use timer_new instead.
- *
- * Returns: a pointer to the new timer allocated.
- */
-QEMUTimer *qemu_new_timer(QEMUClock *clock, int scale,
- QEMUTimerCB *cb, void *opaque);
-
-/** LEGACY
- * qemu_free_timer:
- * @ts: the timer to operate on
- *
- * free the timer @ts. @ts must not be active.
- *
- * This is a legacy function. Use timer_free instead.
- */
-static inline void qemu_free_timer(QEMUTimer *ts)
-{
-timer_free(ts);
-}
-
-/** LEGACY
- * qemu_del_timer:
- * @ts: the timer to operate on
- *
- * Delete a timer. This makes it inactive. It does not free
- * memory.
- *
- * This is a legacy function. Use timer_del instead.
- */
-static inline void qemu_del_timer(QEMUTimer *ts)
-{
-timer_del(ts);
-}
-
-/** LEGACY
- * qemu_mod_timer_ns:
- * @ts: the timer to operate on
- * @expire_time: the expiry time in nanoseconds
- *
- * Modify a timer such that the expiry time is @expire_time
- * as measured in nanoseconds
- *
- * This is a legacy function. Use timer_mod_ns.
- */
-static inline void qemu_mod_timer_ns(QEMUTimer *ts, int64_t expire_time)
-{
-timer_mod_ns(ts, expire_time);
-}
-
-/** LEGACY
- * qemu_mod_timer:
- * @ts: the timer to operate on
- * @expire_time: the expiry time
- *
- * Modify a timer such that the expiry time is @expire_time
- * as measured in the timer's scale
- *
- * This is a legacy function. Use timer_mod.
- */
-static inline void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time)
-{
-timer_mod(ts, expire_time);
-}
-
-/** LEGACY
- * qemu_run_timers:
- * @clock: clock on which to operate
- *
- * Run all the timers associated with the default timer list
- * of a clock.
- *
- * Returns: true if any timer ran.
- */
-bool qemu_run_timers(QEMUClock *clock);
-
-/** LEGACY
- * qemu_new_timer_ns:
- * @clock: the clock to associate with the timer
- * @callback: the callback to call when the timer expires
- * @opaque: the opaque pointer to pass to the callba
[Qemu-devel] [PATCHv11 19/31] aio / timers: Use all timerlists in icount warp calculations
Notify all timerlists derived from vm_clock in icount warp
calculations.
When calculating timer delay based on vm_clock deadline, use
all timerlists.
For compatibility, maintain an apparent bug where when using
icount, if no vm_clock timer was set, qemu_clock_deadline
would return INT32_MAX and always set an icount clock expiry
about 2 seconds ahead.
NB: thread safety - when different timerlists sit on different
threads, this will need some locking.
Signed-off-by: Alex Bligh
---
cpus.c | 46 +-
include/qemu/timer.h | 13 +
qemu-timer.c | 16
qtest.c |2 +-
4 files changed, 67 insertions(+), 10 deletions(-)
diff --git a/cpus.c b/cpus.c
index 0f65e76..673d506 100644
--- a/cpus.c
+++ b/cpus.c
@@ -262,7 +262,7 @@ static void icount_warp_rt(void *opaque)
qemu_icount_bias += MIN(warp_delta, delta);
}
if (qemu_clock_expired(vm_clock)) {
-qemu_notify_event();
+qemu_clock_notify(vm_clock);
}
}
vm_clock_warp_start = -1;
@@ -273,13 +273,13 @@ void qtest_clock_warp(int64_t dest)
int64_t clock = qemu_get_clock_ns(vm_clock);
assert(qtest_enabled());
while (clock < dest) {
-int64_t deadline = qemu_clock_deadline(vm_clock);
+int64_t deadline = qemu_clock_deadline_ns_all(vm_clock);
int64_t warp = MIN(dest - clock, deadline);
qemu_icount_bias += warp;
qemu_run_timers(vm_clock);
clock = qemu_get_clock_ns(vm_clock);
}
-qemu_notify_event();
+qemu_clock_notify(vm_clock);
}
void qemu_clock_warp(QEMUClock *clock)
@@ -314,7 +314,18 @@ void qemu_clock_warp(QEMUClock *clock)
}
vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
-deadline = qemu_clock_deadline(vm_clock);
+/* We want to use the earliest deadline from ALL vm_clocks */
+deadline = qemu_clock_deadline_ns_all(vm_clock);
+
+/* Maintain prior (possibly buggy) behaviour where if no deadline
+ * was set (as there is no vm_clock timer) or it is more than
+ * INT32_MAX nanoseconds ahead, we still use INT32_MAX
+ * nanoseconds.
+ */
+if ((deadline < 0) || (deadline > INT32_MAX)) {
+deadline = INT32_MAX;
+}
+
if (deadline > 0) {
/*
* Ensure the vm_clock proceeds even when the virtual CPU goes to
@@ -333,8 +344,8 @@ void qemu_clock_warp(QEMUClock *clock)
* packets continuously instead of every 100ms.
*/
qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline);
-} else {
-qemu_notify_event();
+} else if (deadline == 0) {
+qemu_clock_notify(vm_clock);
}
}
@@ -866,8 +877,13 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
while (1) {
tcg_exec_all();
-if (use_icount && qemu_clock_deadline(vm_clock) <= 0) {
-qemu_notify_event();
+
+if (use_icount) {
+int64_t deadline = qemu_clock_deadline_ns_all(vm_clock);
+
+if (deadline == 0) {
+qemu_clock_notify(vm_clock);
+}
}
qemu_tcg_wait_io_event();
}
@@ -1145,11 +1161,23 @@ static int tcg_cpu_exec(CPUArchState *env)
#endif
if (use_icount) {
int64_t count;
+int64_t deadline;
int decr;
qemu_icount -= (env->icount_decr.u16.low + env->icount_extra);
env->icount_decr.u16.low = 0;
env->icount_extra = 0;
-count = qemu_icount_round(qemu_clock_deadline(vm_clock));
+deadline = qemu_clock_deadline_ns_all(vm_clock);
+
+/* Maintain prior (possibly buggy) behaviour where if no deadline
+ * was set (as there is no vm_clock timer) or it is more than
+ * INT32_MAX nanoseconds ahead, we still use INT32_MAX
+ * nanoseconds.
+ */
+if ((deadline < 0) || (deadline > INT32_MAX)) {
+deadline = INT32_MAX;
+}
+
+count = qemu_icount_round(deadline);
qemu_icount += count;
decr = (count > 0x) ? 0x : count;
count -= decr;
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index dcfaba9..bbe1bb9 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -103,6 +103,7 @@ int64_t qemu_clock_deadline(QEMUClock *clock);
* @clock: the clock to operate on
*
* Calculate the timeout of the earliest expiring timer
+ * on the default timer list associated with the clock
* in nanoseconds, or -1 if no timer is set to expire.
*
* Returns: time until expiry in nanoseconds or -1
@@ -126,6 +127,18 @@ int64_t qemu_clock_deadline_ns(QEMUClock *clock);
bool qemu_clock_use_for_deadline(QEMUClock *clock);
/**
+ * qemu_clock_use_for_deadline:
+ * @clock: the clock to operate on
+ *
+ * Calculate the deadline across all timer lists associated
+ * with a clock (as opposed to just the default one)
+ * in nanoseconds, or -1 if no timer is set to
[Qemu-devel] [PATCHv11 29/31] aio / timers: Add scripts/switch-timer-api
Add scripts/switch-timer-api to programatically rewrite source
files to use the new timer system.
Signed-off-by: Alex Bligh
---
scripts/switch-timer-api | 178 ++
1 file changed, 178 insertions(+)
diff --git a/scripts/switch-timer-api b/scripts/switch-timer-api
new file mode 100755
index 000..a369a08
--- /dev/null
+++ b/scripts/switch-timer-api
@@ -0,0 +1,178 @@
+#!/usr/bin/perl
+
+use strict;
+use warnings;
+use Getopt::Long;
+use FindBin;
+
+my @legacy = qw(qemu_clock_ptr qemu_get_clock_ns qemu_get_clock_ms
qemu_register_clock_reset_notifier qemu_unregister_clock_reset_notifier
qemu_new_timer qemu_free_timer qemu_del_timer qemu_mod_timer_ns qemu_mod_timer
qemu_run_timers qemu_new_timer_ns qemu_new_timer_us qemu_new_timer_ms);
+my $legacyre = '\b('.join('|', @legacy).')\b';
+my $option_git;
+my $option_dryrun;
+my $option_quiet;
+my $option_rtc;
+my $suffix=".tmp.$$";
+my @files;
+my $getfiles = 'git grep -l -E \'\b((host|rt|vm|rtc)_clock\b|qemu_\w*timer)\'
| egrep \'\.[ch]$\' | egrep -v \'qemu-timer\.c$|include/qemu/timer\.h$\'';
+
+sub Syntax
+{
+print STDERR < \$option_dryrun,
+ "git|g" => \$option_git,
+"quiet|q" => \$option_quiet,
+"rtc|r" => \$option_rtc,
+ "help|h" => sub { Syntax(); exit(0); }
+))
+{
+Syntax();
+die "Bad options";
+}
+
+if ($#ARGV >=0)
+{
+ @files = @ARGV;
+}
+else
+{
+ @files = split(/\s+/, `$getfiles`);
+}
+
+foreach my $file (@files)
+{
+ die "Cannot find $file" unless (-f $file && -r $file);
+}
+}
+
+sub DoWarn
+{
+my $text = shift @_;
+my $line = shift @_;
+return if ($option_quiet);
+chomp ($line);
+print STDERR "$text\n";
+print STDERR "$line\n\n";
+}
+
+sub Process
+{
+my $ifn = shift @_;
+my $ofn = $ifn.$suffix;
+
+my $intext;
+my $outtext;
+my $linenum = 0;
+
+open my $input, "<", $ifn || die "Cannot open $ifn for read: $!";
+
+while (<$input>)
+{
+ my $line = $_;
+ $intext .= $line;
+ $linenum++;
+
+ # fix the specific uses
+ unless ($option_rtc)
+ {
+ $line =~
s/\bqemu_new_timer(_[num]s)\s*\((vm_|rt_|host_)clock\b/timer_new$1(XXX_$2clock/g;
+ $line =~
s/\bqemu_new_timer\s*\((vm_|rt_|host_)clock\b/timer_new(XXX_$1clock/g;
+ $line =~
s/\bqemu_get_clock(_[num]s)\s*\((vm_|rt_|host_)clock\b/qemu_clock_get$1(XXX_$2clock/g;
+ }
+
+ # rtc is different
+ $line =~
s/\bqemu_new_timer(_[num]s)\s*\(rtc_clock\b/timer_new$1(rtc_clock/g;
+ $line =~ s/\bqemu_new_timer\s*\(rtc_clock\b/timer_new(rtc_clock/g;
+ $line =~
s/\bqemu_get_clock(_[num]s)\s*\(rtc_clock\b/qemu_clock_get$1(rtc_clock/g;
+ $line =~
s/\bqemu_register_clock_reset_notifier\s*\(rtc_clock\b/qemu_register_clock_reset_notifier(qemu_clock_ptr(rtc_clock)/g;
+
+ unless ($option_rtc)
+ {
+ # fix up comments
+ $line =~ s/\b(vm_|rt_|host_)clock\b/XXX_$1clock/g if ($line =~
m,^[/ ]+\*,);
+
+ # spurious fprintf error reporting
+ $line =~ s/: qemu_new_timer_ns failed/: timer_new_ns failed/g;
+
+ # these have just changed name
+ $line =~ s/\bqemu_mod_timer\b/timer_mod/g;
+ $line =~ s/\bqemu_mod_timer_(ns|us|ms)\b/timer_mod_$1/g;
+ $line =~ s/\bqemu_free_timer\b/timer_free/g;
+ $line =~ s/\bqemu_del_timer\b/timer_del/g;
+ }
+
+ # fix up rtc_clock
+ $line =~ s/QEMUClock \*rtc_clock;/QEMUClockType rtc_clock;/g;
+ $line =~ s/\brtc_clock = (vm_|rt_|host_)clock\b/rtc_clock =
XXX_$1clock/g;
+
+ unless ($option_rtc)
+ {
+ # replace any more general uses
+ $line =~ s/\b(vm_|rt_|host_)clock\b/qemu_clock_ptr(XXX_$1clock)/g;
+ }
+
+ # fix up the place holders
+ $line =~ s/\bXXX_vm_clock\b/QEMU_CLOCK_VIRTUAL/g;
+ $line =~ s/\bXXX_rt_clock\b/QEMU_CLOCK_REALTIME/g;
+ $line =~ s/\bXXX_host_clock\b/QEMU_CLOCK_HOST/g;
+
+ unless ($option_rtc)
+ {
+ DoWarn("$ifn:$linenum WARNING: timer $1 not fixed up", $line) if
($line =~ /\b((vm_|rt_|host_)clock)\b/);
+ DoWarn("$ifn:$linenum WARNING: function $1 not fixed up", $line) if
($line =~ /\b(qemu_new_timer\w+)\b/);
+ DoWarn("$ifn:$linenum WARNING: legacy function $1 remains", $line)
if ($line =~ /$legacyre/o);
+ }
+
+ $outtext .= $line;
+}
+
+close $input;
+
+if ($intext ne $outtext)
+{
+ print STDERR "Patching $ifn\n" unless ($option_quiet);
+ unless ($option_dryrun)
+ {
+ open my $output, ">", $ofn || die "Cannot open $ofn for write: $!";
+ print $output $outtext;
+ close $output;
+ rename ($ofn, $ifn) || die "Cannot rename temp file to $ifn: $!";
+ return 1;
+ }
+}
+return 0;
+}
+
+sub DoCommit
+{
+my $file = s
[Qemu-devel] [PATCHv11 21/31] aio / timers: Remove alarm timers
Remove alarm timers from qemu-timers.c now we use g_poll / ppoll
instead.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h |3 -
main-loop.c |4 -
qemu-timer.c | 500 +-
vl.c |4 +-
4 files changed, 4 insertions(+), 507 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 8a6c401..b77a1bc 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -635,9 +635,6 @@ bool qemu_run_timers(QEMUClock *clock);
*/
bool qemu_run_all_timers(void);
-void configure_alarms(char const *opt);
-int init_timer_alarm(void);
-
/**
* initclocks:
*
diff --git a/main-loop.c b/main-loop.c
index afc3e31..1d0e030 100644
--- a/main-loop.c
+++ b/main-loop.c
@@ -131,10 +131,6 @@ int qemu_init_main_loop(void)
GSource *src;
init_clocks();
-if (init_timer_alarm() < 0) {
-fprintf(stderr, "could not initialize alarm timer\n");
-exit(1);
-}
ret = qemu_signal_init();
if (ret) {
diff --git a/qemu-timer.c b/qemu-timer.c
index c56ae9e..acc3bcf 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -33,10 +33,6 @@
#include
#endif
-#ifdef _WIN32
-#include
-#endif
-
#ifdef CONFIG_PPOLL
#include
#endif
@@ -77,174 +73,11 @@ struct QEMUTimerList {
void *notify_opaque;
};
-struct qemu_alarm_timer {
-char const *name;
-int (*start)(struct qemu_alarm_timer *t);
-void (*stop)(struct qemu_alarm_timer *t);
-void (*rearm)(struct qemu_alarm_timer *t, int64_t nearest_delta_ns);
-#if defined(__linux__)
-timer_t timer;
-int fd;
-#elif defined(_WIN32)
-HANDLE timer;
-#endif
-bool expired;
-bool pending;
-};
-
-static struct qemu_alarm_timer *alarm_timer;
-
static bool timer_expired_ns(QEMUTimer *timer_head, int64_t current_time)
{
return timer_head && (timer_head->expire_time <= current_time);
}
-static int64_t qemu_next_alarm_deadline(void)
-{
-int64_t delta = INT64_MAX;
-int64_t rtdelta;
-int64_t hdelta;
-
-if (!use_icount && vm_clock->enabled &&
-vm_clock->main_loop_timerlist->active_timers) {
-delta = vm_clock->main_loop_timerlist->active_timers->expire_time -
-qemu_get_clock_ns(vm_clock);
-}
-if (host_clock->enabled &&
-host_clock->main_loop_timerlist->active_timers) {
-hdelta = host_clock->main_loop_timerlist->active_timers->expire_time -
-qemu_get_clock_ns(host_clock);
-if (hdelta < delta) {
-delta = hdelta;
-}
-}
-if (rt_clock->enabled &&
-rt_clock->main_loop_timerlist->active_timers) {
-rtdelta = (rt_clock->main_loop_timerlist->active_timers->expire_time -
- qemu_get_clock_ns(rt_clock));
-if (rtdelta < delta) {
-delta = rtdelta;
-}
-}
-
-return delta;
-}
-
-static void qemu_rearm_alarm_timer(struct qemu_alarm_timer *t)
-{
-int64_t nearest_delta_ns = qemu_next_alarm_deadline();
-if (nearest_delta_ns < INT64_MAX) {
-t->rearm(t, nearest_delta_ns);
-}
-}
-
-/* TODO: MIN_TIMER_REARM_NS should be optimized */
-#define MIN_TIMER_REARM_NS 25
-
-#ifdef _WIN32
-
-static int mm_start_timer(struct qemu_alarm_timer *t);
-static void mm_stop_timer(struct qemu_alarm_timer *t);
-static void mm_rearm_timer(struct qemu_alarm_timer *t, int64_t delta);
-
-static int win32_start_timer(struct qemu_alarm_timer *t);
-static void win32_stop_timer(struct qemu_alarm_timer *t);
-static void win32_rearm_timer(struct qemu_alarm_timer *t, int64_t delta);
-
-#else
-
-static int unix_start_timer(struct qemu_alarm_timer *t);
-static void unix_stop_timer(struct qemu_alarm_timer *t);
-static void unix_rearm_timer(struct qemu_alarm_timer *t, int64_t delta);
-
-#ifdef __linux__
-
-static int dynticks_start_timer(struct qemu_alarm_timer *t);
-static void dynticks_stop_timer(struct qemu_alarm_timer *t);
-static void dynticks_rearm_timer(struct qemu_alarm_timer *t, int64_t delta);
-
-#endif /* __linux__ */
-
-#endif /* _WIN32 */
-
-static struct qemu_alarm_timer alarm_timers[] = {
-#ifndef _WIN32
-#ifdef __linux__
-{"dynticks", dynticks_start_timer,
- dynticks_stop_timer, dynticks_rearm_timer},
-#endif
-{"unix", unix_start_timer, unix_stop_timer, unix_rearm_timer},
-#else
-{"mmtimer", mm_start_timer, mm_stop_timer, mm_rearm_timer},
-{"dynticks", win32_start_timer, win32_stop_timer, win32_rearm_timer},
-#endif
-{NULL, }
-};
-
-static void show_available_alarms(void)
-{
-int i;
-
-printf("Available alarm timers, in order of precedence:\n");
-for (i = 0; alarm_timers[i].name; i++)
-printf("%s\n", alarm_timers[i].name);
-}
-
-void configure_alarms(char const *opt)
-{
-int i;
-int cur = 0;
-int count = ARRAY_SIZE(alarm_timers) - 1;
-char *arg;
-char *name;
-struct qemu_alarm_timer tmp;
-
-if (is_help_option(opt)) {
-show_available_alarms();
-exit(0);
-}
-
-arg
[Qemu-devel] [PATCHv11 20/31] aio / timers: Add documentation and new format calls
Add documentation for existing qemu timer calls. Add new format
calls of the format timer_XXX rather than qemu_XXX_timer
for consistency.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 206 --
1 file changed, 184 insertions(+), 22 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index bbe1bb9..8a6c401 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -93,8 +93,52 @@ static inline QEMUClock *qemu_clock_ptr(QEMUClockType type)
#define vm_clock (qemu_clock_ptr(QEMU_CLOCK_VIRTUAL))
#define host_clock (qemu_clock_ptr(QEMU_CLOCK_HOST))
+/**
+ * qemu_get_clock_ns:
+ * @clock: the clock to operate on
+ *
+ * Get the nanosecond value of a clock
+ *
+ * Returns: the clock value in nanoseconds
+ */
int64_t qemu_get_clock_ns(QEMUClock *clock);
+
+/**
+ * qemu_clock_get_ns;
+ * @type: the clock type
+ *
+ * Get the nanosecond value of a clock with
+ * type @type
+ *
+ * Returns: the clock value in nanoseconds
+ */
+static inline int64_t qemu_clock_get_ns(QEMUClockType type)
+{
+return qemu_get_clock_ns(qemu_clock_ptr(type));
+}
+
+/**
+ * qemu_clock_has_timers:
+ * @clock: the clock to operate on
+ *
+ * Determines whether a clock's default timer list
+ * has timers attached
+ *
+ * Returns: true if the clock's default timer list
+ * has timers attached
+ */
bool qemu_clock_has_timers(QEMUClock *clock);
+
+/**
+ * qemu_clock_expired:
+ * @clock: the clock to operate on
+ *
+ * Determines whether a clock's default timer list
+ * has an expired clock.
+ *
+ * Returns: true if the clock's default timer list has
+ * an expired timer
+ */
bool qemu_clock_expired(QEMUClock *clock);
int64_t qemu_clock_deadline(QEMUClock *clock);
@@ -294,7 +338,7 @@ void timerlistgroup_deinit(QEMUTimerListGroup *tlg);
bool timerlistgroup_run_timers(QEMUTimerListGroup *tlg);
/**
- * timerlistgroup_deadline_ns
+ * timerlistgroup_deadline_ns:
* @tlg: the timer list group
*
* Determine the deadline of the soonest timer to
@@ -330,13 +374,57 @@ int qemu_timeout_ns_to_ms(int64_t ns);
* Returns: number of fds ready
*/
int qemu_poll_ns(GPollFD *fds, uint nfds, int64_t timeout);
+
+/**
+ * qemu_clock_enable:
+ * @clock: the clock to operate on
+ * @enabled: true to enable, false to disable
+ *
+ * Enable or disable a clock
+ */
void qemu_clock_enable(QEMUClock *clock, bool enabled);
+
+/**
+ * qemu_clock_warp:
+ * @clock: the clock to operate on
+ *
+ * Warp a clock to a new value
+ */
void qemu_clock_warp(QEMUClock *clock);
+/**
+ * qemu_register_clock_reset_notifier:
+ * @clock: the clock to operate on
+ * @notifier: the notifier function
+ *
+ * Register a notifier function to call when the clock
+ * concerned is reset.
+ */
void qemu_register_clock_reset_notifier(QEMUClock *clock, Notifier *notifier);
+
+/**
+ * qemu_unregister_clock_reset_notifier:
+ * @clock: the clock to operate on
+ * @notifier: the notifier function
+ *
+ * Unregister a notifier function to call when the clock
+ * concerned is reset.
+ */
void qemu_unregister_clock_reset_notifier(QEMUClock *clock,
Notifier *notifier);
+/**
+ * qemu_new_timer:
+ * @clock: the clock to operate on
+ * @scale: the scale of the clock
+ * @cb: the callback function to call when the timer expires
+ * @opaque: an opaque pointer to pass to the callback
+ *
+ * Produce a new timer attached to clock @clock. This is a legacy
+ * function. Use timer_new instead.
+ *
+ * Returns: a pointer to the new timer allocated.
+ */
QEMUTimer *qemu_new_timer(QEMUClock *clock, int scale,
QEMUTimerCB *cb, void *opaque);
@@ -401,21 +489,21 @@ static inline QEMUTimer *timer_new(QEMUClockType type,
int scale,
return timer_new_tl(main_loop_tlg.tl[type], scale, cb, opaque);
}
+/**
+ * qemu_free_timer:
+ * @ts: the timer to operate on
+ *
+ * free the timer @ts. @ts must not be active.
+ *
+ * This is a legacy function. Use timer_free instead.
+ */
void qemu_free_timer(QEMUTimer *ts);
-void qemu_del_timer(QEMUTimer *ts);
-void qemu_mod_timer_ns(QEMUTimer *ts, int64_t expire_time);
-void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
-bool timer_pending(QEMUTimer *ts);
-bool timer_expired(QEMUTimer *timer_head, int64_t current_time);
-uint64_t timer_expire_time_ns(QEMUTimer *ts);
-
-/* New format calling conventions for timers */
/**
* timer_free:
- * @ts: the timer
+ * @ts: the timer to operate on
*
- * Free a timer (it must not be on the active list)
+ * free the timer @ts. @ts must not be active.
*/
static inline void timer_free(QEMUTimer *ts)
{
@@ -423,10 +511,22 @@ static inline void timer_free(QEMUTimer *ts)
}
/**
+ * qemu_del_timer:
+ * @ts: the timer to operate on
+ *
+ * Delete a timer. This makes it inactive. It does not free
+ * memory.
+ *
+ * This is a legacy function. Use timer_del instead.
+ */
+void qemu_del_timer(QEMUTimer *ts);
+
+/**
* timer_del:
- * @ts: the timer
+ * @ts: th
[Qemu-devel] [PATCHv11 26/31] aio / timers: Convert rtc_clock to be a QEMUClockType
Convert rtc_clock to be a QEMUClockType
Move rtc_clock users to use the new API
Signed-off-by: Alex Bligh
---
hw/arm/omap1.c|4 ++--
hw/arm/pxa2xx.c | 35 +++
hw/arm/strongarm.c| 10 +-
hw/timer/m48t59.c |4 ++--
hw/timer/mc146818rtc.c| 28 +++-
hw/timer/pl031.c | 13 +++--
hw/timer/twl92230.c |8
include/sysemu/sysemu.h |2 +-
target-alpha/sys_helper.c |2 +-
vl.c | 10 +-
10 files changed, 61 insertions(+), 55 deletions(-)
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 19be5fc..9dc5abd 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -2894,7 +2894,7 @@ static void omap_rtc_reset(struct omap_rtc_s *s)
s->pm_am = 0;
s->auto_comp = 0;
s->round = 0;
-s->tick = qemu_get_clock_ms(rtc_clock);
+s->tick = qemu_clock_get_ms(rtc_clock);
memset(&s->alarm_tm, 0, sizeof(s->alarm_tm));
s->alarm_tm.tm_mday = 0x01;
s->status = 1 << 7;
@@ -2915,7 +2915,7 @@ static struct omap_rtc_s *omap_rtc_init(MemoryRegion
*system_memory,
s->irq = timerirq;
s->alarm = alarmirq;
-s->clk = qemu_new_timer_ms(rtc_clock, omap_rtc_tick, s);
+s->clk = timer_new_ms(rtc_clock, omap_rtc_tick, s);
omap_rtc_reset(s);
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 17ddd3f..331bc72 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -842,7 +842,7 @@ static inline void pxa2xx_rtc_int_update(PXA2xxRTCState *s)
static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s)
{
-int64_t rt = qemu_get_clock_ms(rtc_clock);
+int64_t rt = qemu_clock_get_ms(rtc_clock);
s->last_rcnr += ((rt - s->last_hz) << 15) /
(1000 * ((s->rttr & 0x) + 1));
s->last_rdcr += ((rt - s->last_hz) << 15) /
@@ -852,7 +852,7 @@ static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s)
static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)
{
-int64_t rt = qemu_get_clock_ms(rtc_clock);
+int64_t rt = qemu_clock_get_ms(rtc_clock);
if (s->rtsr & (1 << 12))
s->last_swcr += (rt - s->last_sw) / 10;
s->last_sw = rt;
@@ -860,7 +860,7 @@ static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)
static void pxa2xx_rtc_piupdate(PXA2xxRTCState *s)
{
-int64_t rt = qemu_get_clock_ms(rtc_clock);
+int64_t rt = qemu_clock_get_ms(rtc_clock);
if (s->rtsr & (1 << 15))
s->last_swcr += rt - s->last_pi;
s->last_pi = rt;
@@ -986,16 +986,19 @@ static uint64_t pxa2xx_rtc_read(void *opaque, hwaddr addr,
case PIAR:
return s->piar;
case RCNR:
-return s->last_rcnr + ((qemu_get_clock_ms(rtc_clock) - s->last_hz) <<
15) /
-(1000 * ((s->rttr & 0x) + 1));
+return s->last_rcnr +
+((qemu_clock_get_ms(rtc_clock) - s->last_hz) << 15) /
+(1000 * ((s->rttr & 0x) + 1));
case RDCR:
-return s->last_rdcr + ((qemu_get_clock_ms(rtc_clock) - s->last_hz) <<
15) /
-(1000 * ((s->rttr & 0x) + 1));
+return s->last_rdcr +
+((qemu_clock_get_ms(rtc_clock) - s->last_hz) << 15) /
+(1000 * ((s->rttr & 0x) + 1));
case RYCR:
return s->last_rycr;
case SWCR:
if (s->rtsr & (1 << 12))
-return s->last_swcr + (qemu_get_clock_ms(rtc_clock) - s->last_sw)
/ 10;
+return s->last_swcr +
+(qemu_clock_get_ms(rtc_clock) - s->last_sw) / 10;
else
return s->last_swcr;
default:
@@ -1135,14 +1138,14 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)
s->last_swcr = (tm.tm_hour << 19) |
(tm.tm_min << 13) | (tm.tm_sec << 7);
s->last_rtcpicr = 0;
-s->last_hz = s->last_sw = s->last_pi = qemu_get_clock_ms(rtc_clock);
-
-s->rtc_hz= qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_hz_tick,s);
-s->rtc_rdal1 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_rdal1_tick, s);
-s->rtc_rdal2 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_rdal2_tick, s);
-s->rtc_swal1 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_swal1_tick, s);
-s->rtc_swal2 = qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_swal2_tick, s);
-s->rtc_pi= qemu_new_timer_ms(rtc_clock, pxa2xx_rtc_pi_tick,s);
+s->last_hz = s->last_sw = s->last_pi = qemu_clock_get_ms(rtc_clock);
+
+s->rtc_hz= timer_new_ms(rtc_clock, pxa2xx_rtc_hz_tick,s);
+s->rtc_rdal1 = timer_new_ms(rtc_clock, pxa2xx_rtc_rdal1_tick, s);
+s->rtc_rdal2 = timer_new_ms(rtc_clock, pxa2xx_rtc_rdal2_tick, s);
+s->rtc_swal1 = timer_new_ms(rtc_clock, pxa2xx_rtc_swal1_tick, s);
+s->rtc_swal2 = timer_new_ms(rtc_clock, pxa2xx_rtc_swal2_tick, s);
+s->rtc_pi= timer_new_ms(rtc_clock, pxa2xx_rtc_pi_tick,s);
sysbus_init_irq(dev, &s->rtc_irq);
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 82a9492..a7f8113 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -269,7 +269,7
[Qemu-devel] [PATCHv11 28/31] aio / timers: Add test harness for AioContext timers
Add a test harness for AioContext timers. The g_source equivalent is
unsatisfactory as it suffers from false wakeups.
Signed-off-by: Alex Bligh
---
tests/test-aio.c | 136 ++
1 file changed, 136 insertions(+)
diff --git a/tests/test-aio.c b/tests/test-aio.c
index eedf7f8..f751543 100644
--- a/tests/test-aio.c
+++ b/tests/test-aio.c
@@ -32,6 +32,15 @@ typedef struct {
int max;
} BHTestData;
+typedef struct {
+QEMUTimer timer;
+QEMUClockType clock_type;
+int n;
+int max;
+int64_t ns;
+AioContext *ctx;
+} TimerTestData;
+
static void bh_test_cb(void *opaque)
{
BHTestData *data = opaque;
@@ -40,6 +49,24 @@ static void bh_test_cb(void *opaque)
}
}
+static void timer_test_cb(void *opaque)
+{
+TimerTestData *data = opaque;
+if (++data->n < data->max) {
+timer_mod(&data->timer,
+ qemu_clock_get_ns(data->clock_type) + data->ns);
+}
+}
+
+static void dummy_io_handler_read(void *opaque)
+{
+}
+
+static int dummy_io_handler_flush(void *opaque)
+{
+return 1;
+}
+
static void bh_delete_cb(void *opaque)
{
BHTestData *data = opaque;
@@ -341,6 +368,65 @@ static void test_wait_event_notifier_noflush(void)
event_notifier_cleanup(&data.e);
}
+static void test_timer_schedule(void)
+{
+TimerTestData data = { .n = 0, .ctx = ctx, .ns = SCALE_MS * 750LL,
+ .max = 2,
+ .clock_type = QEMU_CLOCK_VIRTUAL };
+int pipefd[2];
+
+/* aio_poll will not block to wait for timers to complete unless it has
+ * an fd to wait on. Fixing this breaks other tests. So create a dummy one.
+ */
+g_assert(!pipe2(pipefd, O_NONBLOCK));
+aio_set_fd_handler(ctx, pipefd[0],
+ dummy_io_handler_read, NULL, dummy_io_handler_flush,
+ NULL);
+aio_poll(ctx, false);
+
+aio_timer_init(ctx, &data.timer, data.clock_type,
+ SCALE_NS, timer_test_cb, &data);
+timer_mod(&data.timer,
+ qemu_clock_get_ns(data.clock_type) +
+ data.ns);
+
+g_assert_cmpint(data.n, ==, 0);
+
+/* timer_mod may well cause an event notifer to have gone off,
+ * so clear that
+ */
+do {} while (aio_poll(ctx, false));
+
+g_assert(!aio_poll(ctx, false));
+g_assert_cmpint(data.n, ==, 0);
+
+sleep(1);
+g_assert_cmpint(data.n, ==, 0);
+
+g_assert(aio_poll(ctx, false));
+g_assert_cmpint(data.n, ==, 1);
+
+/* timer_mod called by our callback */
+do {} while (aio_poll(ctx, false));
+
+g_assert(!aio_poll(ctx, false));
+g_assert_cmpint(data.n, ==, 1);
+
+g_assert(aio_poll(ctx, true));
+g_assert_cmpint(data.n, ==, 2);
+
+/* As max is now 2, an event notifier should not have gone off */
+
+g_assert(!aio_poll(ctx, false));
+g_assert_cmpint(data.n, ==, 2);
+
+aio_set_fd_handler(ctx, pipefd[0], NULL, NULL, NULL, NULL);
+close(pipefd[0]);
+close(pipefd[1]);
+
+timer_del(&data.timer);
+}
+
/* Now the same tests, using the context as a GSource. They are
* very similar to the ones above, with g_main_context_iteration
* replacing aio_poll. However:
@@ -623,6 +709,54 @@ static void test_source_wait_event_notifier_noflush(void)
event_notifier_cleanup(&data.e);
}
+static void test_source_timer_schedule(void)
+{
+TimerTestData data = { .n = 0, .ctx = ctx, .ns = SCALE_MS * 750LL,
+ .max = 2,
+ .clock_type = QEMU_CLOCK_VIRTUAL };
+int pipefd[2];
+int64_t expiry;
+
+/* aio_poll will not block to wait for timers to complete unless it has
+ * an fd to wait on. Fixing this breaks other tests. So create a dummy one.
+ */
+g_assert(!pipe2(pipefd, O_NONBLOCK));
+aio_set_fd_handler(ctx, pipefd[0],
+ dummy_io_handler_read, NULL, dummy_io_handler_flush,
+ NULL);
+do {} while (g_main_context_iteration(NULL, false));
+
+aio_timer_init(ctx, &data.timer, data.clock_type,
+ SCALE_NS, timer_test_cb, &data);
+expiry = qemu_clock_get_ns(data.clock_type) +
+data.ns;
+timer_mod(&data.timer, expiry);
+
+g_assert_cmpint(data.n, ==, 0);
+
+sleep(1);
+g_assert_cmpint(data.n, ==, 0);
+
+g_assert(g_main_context_iteration(NULL, false));
+g_assert_cmpint(data.n, ==, 1);
+
+/* The comment above was not kidding when it said this wakes up itself */
+do {
+g_assert(g_main_context_iteration(NULL, true));
+} while (qemu_clock_get_ns(data.clock_type) <= expiry);
+sleep(1);
+g_main_context_iteration(NULL, false);
+
+g_assert_cmpint(data.n, ==, 2);
+
+aio_set_fd_handler(ctx, pipefd[0], NULL, NULL, NULL, NULL);
+close(pipefd[0]);
+close(pipefd[1]);
+
+timer_del(&data.timer);
+}
+
+
/* End of tests. */
int main(int argc, char **argv)
@@ -651,6 +785,7 @@ int main(int argc, char **ar
[Qemu-devel] [PATCHv11 23/31] aio / timers: Add qemu_clock_get_ms and qemu_clock_get_ms
Add utility functions qemu_clock_get_ms and qemu_clock_get_us
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 28
1 file changed, 28 insertions(+)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 3e9506c..63b964f 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -118,6 +118,34 @@ static inline int64_t qemu_clock_get_ns(QEMUClockType type)
}
/**
+ * qemu_clock_get_ms;
+ * @type: the clock type
+ *
+ * Get the millisecond value of a clock with
+ * type @type
+ *
+ * Returns: the clock value in milliseconds
+ */
+static inline int64_t qemu_clock_get_ms(QEMUClockType type)
+{
+return qemu_clock_get_ns(type) / SCALE_MS;
+}
+
+/**
+ * qemu_clock_get_us;
+ * @type: the clock type
+ *
+ * Get the microsecond value of a clock with
+ * type @type
+ *
+ * Returns: the clock value in microseconds
+ */
+static inline int64_t qemu_clock_get_us(QEMUClockType type)
+{
+return qemu_clock_get_ns(type) / SCALE_US;
+}
+
+/**
* qemu_clock_has_timers:
* @clock: the clock to operate on
*
--
1.7.9.5
[Qemu-devel] [PATCHv11 27/31] aio / timers: convert block_job_sleep_ns and co_sleep_ns to new API
Convert block_job_sleep_ns and co_sleep_ns to use the new timer
API.
Signed-off-by: Alex Bligh
---
block/backup.c|4 ++--
block/commit.c|2 +-
block/mirror.c|4 ++--
block/stream.c|2 +-
blockjob.c|4 ++--
include/block/blockjob.h |2 +-
include/block/coroutine.h |2 +-
qemu-coroutine-sleep.c| 10 +-
8 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/block/backup.c b/block/backup.c
index 6ae8a05..e12b3b1 100644
--- a/block/backup.c
+++ b/block/backup.c
@@ -272,9 +272,9 @@ static void coroutine_fn backup_run(void *opaque)
uint64_t delay_ns = ratelimit_calculate_delay(
&job->limit, job->sectors_read);
job->sectors_read = 0;
-block_job_sleep_ns(&job->common, rt_clock, delay_ns);
+block_job_sleep_ns(&job->common, QEMU_CLOCK_REALTIME,
delay_ns);
} else {
-block_job_sleep_ns(&job->common, rt_clock, 0);
+block_job_sleep_ns(&job->common, QEMU_CLOCK_REALTIME, 0);
}
if (block_job_is_cancelled(&job->common)) {
diff --git a/block/commit.c b/block/commit.c
index 2227fc2..51a1ab3 100644
--- a/block/commit.c
+++ b/block/commit.c
@@ -103,7 +103,7 @@ wait:
/* Note that even when no rate limit is applied we need to yield
* with no pending I/O here so that bdrv_drain_all() returns.
*/
-block_job_sleep_ns(&s->common, rt_clock, delay_ns);
+block_job_sleep_ns(&s->common, QEMU_CLOCK_REALTIME, delay_ns);
if (block_job_is_cancelled(&s->common)) {
break;
}
diff --git a/block/mirror.c b/block/mirror.c
index bed4a7e..ead567e 100644
--- a/block/mirror.c
+++ b/block/mirror.c
@@ -439,13 +439,13 @@ static void coroutine_fn mirror_run(void *opaque)
delay_ns = 0;
}
-block_job_sleep_ns(&s->common, rt_clock, delay_ns);
+block_job_sleep_ns(&s->common, QEMU_CLOCK_REALTIME, delay_ns);
if (block_job_is_cancelled(&s->common)) {
break;
}
} else if (!should_complete) {
delay_ns = (s->in_flight == 0 && cnt == 0 ? SLICE_TIME : 0);
-block_job_sleep_ns(&s->common, rt_clock, delay_ns);
+block_job_sleep_ns(&s->common, QEMU_CLOCK_REALTIME, delay_ns);
} else if (cnt == 0) {
/* The two disks are in sync. Exit and report successful
* completion.
diff --git a/block/stream.c b/block/stream.c
index 7fe9e48..0ef1b9d 100644
--- a/block/stream.c
+++ b/block/stream.c
@@ -110,7 +110,7 @@ wait:
/* Note that even when no rate limit is applied we need to yield
* with no pending I/O here so that bdrv_drain_all() returns.
*/
-block_job_sleep_ns(&s->common, rt_clock, delay_ns);
+block_job_sleep_ns(&s->common, QEMU_CLOCK_REALTIME, delay_ns);
if (block_job_is_cancelled(&s->common)) {
break;
}
diff --git a/blockjob.c b/blockjob.c
index ca80df1..7edc945 100644
--- a/blockjob.c
+++ b/blockjob.c
@@ -187,7 +187,7 @@ int block_job_cancel_sync(BlockJob *job)
return (data.cancelled && data.ret == 0) ? -ECANCELED : data.ret;
}
-void block_job_sleep_ns(BlockJob *job, QEMUClock *clock, int64_t ns)
+void block_job_sleep_ns(BlockJob *job, QEMUClockType type, int64_t ns)
{
assert(job->busy);
@@ -200,7 +200,7 @@ void block_job_sleep_ns(BlockJob *job, QEMUClock *clock,
int64_t ns)
if (block_job_is_paused(job)) {
qemu_coroutine_yield();
} else {
-co_sleep_ns(clock, ns);
+co_sleep_ns(type, ns);
}
job->busy = true;
}
diff --git a/include/block/blockjob.h b/include/block/blockjob.h
index c290d07..d530409 100644
--- a/include/block/blockjob.h
+++ b/include/block/blockjob.h
@@ -141,7 +141,7 @@ void *block_job_create(const BlockJobType *job_type,
BlockDriverState *bs,
* Put the job to sleep (assuming that it wasn't canceled) for @ns
* nanoseconds. Canceling the job will interrupt the wait immediately.
*/
-void block_job_sleep_ns(BlockJob *job, QEMUClock *clock, int64_t ns);
+void block_job_sleep_ns(BlockJob *job, QEMUClockType type, int64_t ns);
/**
* block_job_completed:
diff --git a/include/block/coroutine.h b/include/block/coroutine.h
index 17f5851..4232569 100644
--- a/include/block/coroutine.h
+++ b/include/block/coroutine.h
@@ -213,7 +213,7 @@ void qemu_co_rwlock_unlock(CoRwlock *lock);
* Note this function uses timers and hence only works when a main loop is in
* use. See main-loop.h and do not use from qemu-tool programs.
*/
-void coroutine_fn co_sleep_ns(QEMUClock *clock, int64_t ns);
+void coroutine_fn co_sleep_ns(QEMUClockType type, int64_t ns);
/**
* Yield until a file descriptor becomes readable
diff --git a/qemu-coroutine-sleep.c b/qemu-coroutine-sleep.c
index 169ce5c..f6db978 100644
-
[Qemu-devel] [PATCHv11 08/31] aio / timers: Split QEMUClock into QEMUClock and QEMUTimerList
Split QEMUClock into QEMUClock and QEMUTimerList so that we can
have more than one QEMUTimerList associated with the same clock.
Introduce a main_loop_timerlist concept and make existing
qemu_clock_* calls that actually should operate on a QEMUTimerList
call the relevant QEMUTimerList implementations, using the clock's
default timerlist. This vastly reduces the invasiveness of this
change and means the API stays constant for existing users.
Introduce a list of QEMUTimerLists associated with each clock
so that reenabling the clock can cause all the notifiers
to be called. Note the code to do the notifications is added
in a later patch.
Switch QEMUClockType to an enum. Remove global variables vm_clock,
host_clock and rt_clock and add compatibility defines. Do not
fix qemu_next_alarm_deadline as it's going to be deleted.
Add qemu_clock_use_for_deadline to indicate whether a particular
clock should be used for deadline calculations. When use_icount
is true, vm_clock should not be used for deadline calculations
as it does not contain a nanosecond count. Instead, icount
timeouts come from the execution thread doing aio_notify or
qemu_notify as appropriate. This function is used in the next
patch.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 348 ++
qemu-timer.c | 207 ++
2 files changed, 476 insertions(+), 79 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index fcb6a42..0201aaf 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -1,6 +1,7 @@
#ifndef QEMU_TIMER_H
#define QEMU_TIMER_H
+#include "qemu/typedefs.h"
#include "qemu-common.h"
#include "qemu/main-loop.h"
#include "qemu/notify.h"
@@ -11,34 +12,84 @@
#define SCALE_US 1000
#define SCALE_NS 1
-#define QEMU_CLOCK_REALTIME 0
-#define QEMU_CLOCK_VIRTUAL 1
-#define QEMU_CLOCK_HOST 2
+/**
+ * QEMUClockType:
+ *
+ * The following clock types are available:
+ *
+ * @QEMU_CLOCK_REALTIME: Real time clock
+ *
+ * The real time clock should be used only for stuff which does not
+ * change the virtual machine state, as it is run even if the virtual
+ * machine is stopped. The real time clock has a frequency of 1000
+ * Hz.
+ *
+ * Formerly rt_clock
+ *
+ * @QEMU_CLOCK_VIRTUAL: virtual clock
+ *
+ * The virtual clock is only run during the emulation. It is stopped
+ * when the virtual machine is stopped. Virtual timers use a high
+ * precision clock, usually cpu cycles (use ticks_per_sec).
+ *
+ * Formerly vm_clock
+ *
+ * @QEMU_CLOCK_HOST: host clock
+ *
+ * The host clock should be use for device models that emulate accurate
+ * real time sources. It will continue to run when the virtual machine
+ * is suspended, and it will reflect system time changes the host may
+ * undergo (e.g. due to NTP). The host clock has the same precision as
+ * the virtual clock.
+ *
+ * Formerly host_clock
+ */
+
+typedef enum {
+QEMU_CLOCK_REALTIME = 0,
+QEMU_CLOCK_VIRTUAL = 1,
+QEMU_CLOCK_HOST = 2,
+QEMU_CLOCK_MAX
+} QEMUClockType;
typedef struct QEMUClock QEMUClock;
+typedef struct QEMUTimerList QEMUTimerList;
typedef void QEMUTimerCB(void *opaque);
-/* The real time clock should be used only for stuff which does not
- change the virtual machine state, as it is run even if the virtual
- machine is stopped. The real time clock has a frequency of 1000
- Hz. */
-extern QEMUClock *rt_clock;
+struct QEMUTimer {
+int64_t expire_time;/* in nanoseconds */
+QEMUTimerList *timer_list;
+QEMUTimerCB *cb;
+void *opaque;
+QEMUTimer *next;
+int scale;
+};
+
+extern QEMUClock *qemu_clocks[QEMU_CLOCK_MAX];
-/* The virtual clock is only run during the emulation. It is stopped
- when the virtual machine is stopped. Virtual timers use a high
- precision clock, usually cpu cycles (use ticks_per_sec). */
-extern QEMUClock *vm_clock;
+/**
+ * qemu_clock_ptr:
+ * @type: type of clock
+ *
+ * Translate a clock type into a pointer to QEMUClock object.
+ *
+ * Returns: a pointer to the QEMUClock object
+ */
+static inline QEMUClock *qemu_clock_ptr(QEMUClockType type)
+{
+return qemu_clocks[type];
+}
-/* The host clock should be use for device models that emulate accurate
- real time sources. It will continue to run when the virtual machine
- is suspended, and it will reflect system time changes the host may
- undergo (e.g. due to NTP). The host clock has the same precision as
- the virtual clock. */
-extern QEMUClock *host_clock;
+/* These three clocks are maintained here with separate variable
+ * names for compatibility only.
+ */
+#define rt_clock (qemu_clock_ptr(QEMU_CLOCK_REALTIME))
+#define vm_clock (qemu_clock_ptr(QEMU_CLOCK_VIRTUAL))
+#define host_clock (qemu_clock_ptr(QEMU_CLOCK_HOST))
int64_t qemu_get_clock_ns(QEMUClock *clock);
-int64_t qemu_clock_has_timers(QEMUClock *clock);
-int64_t qemu_clock_expired(QEMUClock *clock);
+bool qemu_clock_has_timers(QEMUClock *clock);
+
[Qemu-devel] [PATCHv11 18/31] aio / timers: Introduce new API timer_new and friends
Introduce new API for creating timers - timer_new and
_ns, _ms, _us derivatives.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 69 ++
1 file changed, 69 insertions(+)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 619b7a2..dcfaba9 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -370,6 +370,24 @@ static inline QEMUTimer *timer_new_tl(QEMUTimerList
*timer_list,
return ts;
}
+/**
+ * timer_new:
+ * @type: the clock type to use
+ * @scale: the scale value for the tiemr
+ * @cb: the callback to be called when the timer expires
+ * @opaque: the opaque pointer to be passed to the callback
+ *
+ * Creeate a new timer and associate it with the default
+ * timer list for the clock type @type.
+ *
+ * Returns: a pointer to the timer
+ */
+static inline QEMUTimer *timer_new(QEMUClockType type, int scale,
+ QEMUTimerCB *cb, void *opaque)
+{
+return timer_new_tl(main_loop_tlg.tl[type], scale, cb, opaque);
+}
+
void qemu_free_timer(QEMUTimer *ts);
void qemu_del_timer(QEMUTimer *ts);
void qemu_mod_timer_ns(QEMUTimer *ts, int64_t expire_time);
@@ -493,6 +511,23 @@ static inline QEMUTimer *qemu_new_timer_ns(QEMUClock
*clock, QEMUTimerCB *cb,
}
/**
+ * timer_new_ns:
+ * @clock: the clock to associate with the timer
+ * @callback: the callback to call when the timer expires
+ * @opaque: the opaque pointer to pass to the callback
+ *
+ * Create a new timer with nanosecond scale on the default timer list
+ * associated with the clock.
+ *
+ * Returns: a pointer to the newly created timer
+ */
+static inline QEMUTimer *timer_new_ns(QEMUClockType type, QEMUTimerCB *cb,
+ void *opaque)
+{
+return timer_new(type, SCALE_NS, cb, opaque);
+}
+
+/**
* qemu_new_timer_us:
* @clock: the clock to associate with the timer
* @callback: the callback to call when the timer expires
@@ -511,6 +546,23 @@ static inline QEMUTimer *qemu_new_timer_us(QEMUClock
*clock,
}
/**
+ * timer_new_us:
+ * @clock: the clock to associate with the timer
+ * @callback: the callback to call when the timer expires
+ * @opaque: the opaque pointer to pass to the callback
+ *
+ * Create a new timer with microsecond scale on the default timer list
+ * associated with the clock.
+ *
+ * Returns: a pointer to the newly created timer
+ */
+static inline QEMUTimer *timer_new_us(QEMUClockType type, QEMUTimerCB *cb,
+ void *opaque)
+{
+return timer_new(type, SCALE_US, cb, opaque);
+}
+
+/**
* qemu_new_timer_ms:
* @clock: the clock to associate with the timer
* @callback: the callback to call when the timer expires
@@ -528,6 +580,23 @@ static inline QEMUTimer *qemu_new_timer_ms(QEMUClock
*clock,
return qemu_new_timer(clock, SCALE_MS, cb, opaque);
}
+/**
+ * timer_new_ms:
+ * @clock: the clock to associate with the timer
+ * @callback: the callback to call when the timer expires
+ * @opaque: the opaque pointer to pass to the callback
+ *
+ * Create a new timer with millisecond scale on the default timer list
+ * associated with the clock.
+ *
+ * Returns: a pointer to the newly created timer
+ */
+static inline QEMUTimer *timer_new_ms(QEMUClockType type, QEMUTimerCB *cb,
+ void *opaque)
+{
+return timer_new(type, SCALE_MS, cb, opaque);
+}
+
static inline int64_t qemu_get_clock_ms(QEMUClock *clock)
{
return qemu_get_clock_ns(clock) / SCALE_MS;
--
1.7.9.5
[Qemu-devel] [PATCHv11 22/31] aio / timers: Remove legacy qemu_clock_deadline & qemu_timerlist_deadline
Remove qemu_clock_deadline and qemu_timerlist_deadline now we are using
the ns functions throughout.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 16
qemu-timer.c | 20
2 files changed, 36 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index b77a1bc..3e9506c 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -140,7 +140,6 @@ bool qemu_clock_has_timers(QEMUClock *clock);
* an expired timer
*/
bool qemu_clock_expired(QEMUClock *clock);
-int64_t qemu_clock_deadline(QEMUClock *clock);
/**
* qemu_clock_deadline_ns:
@@ -246,21 +245,6 @@ bool timerlist_has_timers(QEMUTimerList *timer_list);
bool timerlist_expired(QEMUTimerList *timer_list);
/**
- * timerlist_deadline:
- * @timer_list: the timer list to operate on
- *
- * Determine the deadline for a timer_list. This is
- * a legacy function which returns INT32_MAX if the
- * timer list has no timers or if the earliest timer
- * expires later than INT32_MAX nanoseconds away.
- *
- * Returns: the number of nanoseconds until the earliest
- * timer expires or INT32_MAX in the situations listed
- * above
- */
-int64_t timerlist_deadline(QEMUTimerList *timer_list);
-
-/**
* timerlist_deadline_ns:
* @timer_list: the timer list to operate on
*
diff --git a/qemu-timer.c b/qemu-timer.c
index acc3bcf..2f27c8d 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -176,26 +176,6 @@ bool qemu_clock_expired(QEMUClock *clock)
return timerlist_expired(clock->main_loop_timerlist);
}
-int64_t timerlist_deadline(QEMUTimerList *timer_list)
-{
-/* To avoid problems with overflow limit this to 2^32. */
-int64_t delta = INT32_MAX;
-
-if (timer_list->clock->enabled && timer_list->active_timers) {
-delta = timer_list->active_timers->expire_time -
-qemu_get_clock_ns(timer_list->clock);
-}
-if (delta < 0) {
-delta = 0;
-}
-return delta;
-}
-
-int64_t qemu_clock_deadline(QEMUClock *clock)
-{
-return timerlist_deadline(clock->main_loop_timerlist);
-}
-
/*
* As above, but return -1 for no deadline, and do not cap to 2^32
* as we know the result is always positive.
--
1.7.9.5
[Qemu-devel] [PATCHv11 16/31] aio / timers: Convert mainloop to use timeout
Convert mainloop to use timeout from default timerlist group
(i.e. the current 3 static timers)
Signed-off-by: Alex Bligh
---
main-loop.c | 45 ++---
1 file changed, 34 insertions(+), 11 deletions(-)
diff --git a/main-loop.c b/main-loop.c
index a44fff6..afc3e31 100644
--- a/main-loop.c
+++ b/main-loop.c
@@ -155,10 +155,11 @@ static int max_priority;
static int glib_pollfds_idx;
static int glib_n_poll_fds;
-static void glib_pollfds_fill(uint32_t *cur_timeout)
+static void glib_pollfds_fill(int64_t *cur_timeout)
{
GMainContext *context = g_main_context_default();
int timeout = 0;
+int64_t timeout_ns;
int n;
g_main_context_prepare(context, &max_priority);
@@ -174,9 +175,13 @@ static void glib_pollfds_fill(uint32_t *cur_timeout)
glib_n_poll_fds);
} while (n != glib_n_poll_fds);
-if (timeout >= 0 && timeout < *cur_timeout) {
-*cur_timeout = timeout;
+if (timeout < 0) {
+timeout_ns = -1;
+} else {
+timeout_ns = (int64_t)timeout * (int64_t)SCALE_MS;
}
+
+*cur_timeout = qemu_soonest_timeout(timeout_ns, *cur_timeout);
}
static void glib_pollfds_poll(void)
@@ -191,7 +196,7 @@ static void glib_pollfds_poll(void)
#define MAX_MAIN_LOOP_SPIN (1000)
-static int os_host_main_loop_wait(uint32_t timeout)
+static int os_host_main_loop_wait(int64_t timeout)
{
int ret;
static int spin_counter;
@@ -214,7 +219,7 @@ static int os_host_main_loop_wait(uint32_t timeout)
notified = true;
}
-timeout = 1;
+timeout = SCALE_MS;
}
if (timeout > 0) {
@@ -224,7 +229,7 @@ static int os_host_main_loop_wait(uint32_t timeout)
spin_counter++;
}
-ret = g_poll((GPollFD *)gpollfds->data, gpollfds->len, timeout);
+ret = qemu_poll_ns((GPollFD *)gpollfds->data, gpollfds->len, timeout);
if (timeout > 0) {
qemu_mutex_lock_iothread();
@@ -373,7 +378,7 @@ static void pollfds_poll(GArray *pollfds, int nfds, fd_set
*rfds,
}
}
-static int os_host_main_loop_wait(uint32_t timeout)
+static int os_host_main_loop_wait(int64_t timeout)
{
GMainContext *context = g_main_context_default();
GPollFD poll_fds[1024 * 2]; /* this is probably overkill */
@@ -382,6 +387,7 @@ static int os_host_main_loop_wait(uint32_t timeout)
PollingEntry *pe;
WaitObjects *w = &wait_objects;
gint poll_timeout;
+int64_t poll_timeout_ns;
static struct timeval tv0;
fd_set rfds, wfds, xfds;
int nfds;
@@ -419,12 +425,17 @@ static int os_host_main_loop_wait(uint32_t timeout)
poll_fds[n_poll_fds + i].events = G_IO_IN;
}
-if (poll_timeout < 0 || timeout < poll_timeout) {
-poll_timeout = timeout;
+if (poll_timeout < 0) {
+poll_timeout_ns = -1;
+} else {
+poll_timeout_ns = (int64_t)poll_timeout * (int64_t)SCALE_MS;
}
+poll_timeout_ns = qemu_soonest_timeout(poll_timeout_ns, timeout);
+
qemu_mutex_unlock_iothread();
-g_poll_ret = g_poll(poll_fds, n_poll_fds + w->num, poll_timeout);
+g_poll_ret = qemu_poll_ns(poll_fds, n_poll_fds + w->num, poll_timeout_ns);
+
qemu_mutex_lock_iothread();
if (g_poll_ret > 0) {
for (i = 0; i < w->num; i++) {
@@ -449,6 +460,7 @@ int main_loop_wait(int nonblocking)
{
int ret;
uint32_t timeout = UINT32_MAX;
+int64_t timeout_ns;
if (nonblocking) {
timeout = 0;
@@ -462,7 +474,18 @@ int main_loop_wait(int nonblocking)
slirp_pollfds_fill(gpollfds);
#endif
qemu_iohandler_fill(gpollfds);
-ret = os_host_main_loop_wait(timeout);
+
+if (timeout == UINT32_MAX) {
+timeout_ns = -1;
+} else {
+timeout_ns = (uint64_t)timeout * (int64_t)(SCALE_MS);
+}
+
+timeout_ns = qemu_soonest_timeout(timeout_ns,
+ timerlistgroup_deadline_ns(
+ &main_loop_tlg));
+
+ret = os_host_main_loop_wait(timeout_ns);
qemu_iohandler_poll(gpollfds, ret);
#ifdef CONFIG_SLIRP
slirp_pollfds_poll(gpollfds, (ret < 0));
--
1.7.9.5
[Qemu-devel] [PATCHv11 17/31] aio / timers: On timer modification, qemu_notify or aio_notify
On qemu_mod_timer_ns, ensure qemu_notify or aio_notify is called to
end the appropriate poll(), irrespective of use_icount value.
On qemu_clock_enable, ensure qemu_notify or aio_notify is called for
all QEMUTimerLists attached to the QEMUClock.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h |9 +
qemu-timer.c | 13 ++---
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 843dfe1..619b7a2 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -136,6 +136,15 @@ bool qemu_clock_use_for_deadline(QEMUClock *clock);
QEMUTimerList *qemu_clock_get_main_loop_timerlist(QEMUClock *clock);
/**
+ * qemu_clock_nofify:
+ * @clock: the clock to operate on
+ *
+ * Call the notifier callback connected with the default timer
+ * list linked to the clock, or qemu_notify() if none.
+ */
+void qemu_clock_notify(QEMUClock *clock);
+
+/**
* timerlist_new:
* @type: the clock type to associate with the timerlist
* @cb: the callback to call on notification
diff --git a/qemu-timer.c b/qemu-timer.c
index c1de3d3..ec25bcc 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -304,11 +304,20 @@ bool qemu_clock_use_for_deadline(QEMUClock *clock)
return !(use_icount && (clock->type == QEMU_CLOCK_VIRTUAL));
}
+void qemu_clock_notify(QEMUClock *clock)
+{
+QEMUTimerList *timer_list;
+QLIST_FOREACH(timer_list, &clock->timerlists, list) {
+timerlist_notify(timer_list);
+}
+}
+
void qemu_clock_enable(QEMUClock *clock, bool enabled)
{
bool old = clock->enabled;
clock->enabled = enabled;
if (enabled && !old) {
+qemu_clock_notify(clock);
qemu_rearm_alarm_timer(alarm_timer);
}
}
@@ -522,9 +531,7 @@ void qemu_mod_timer_ns(QEMUTimer *ts, int64_t expire_time)
}
/* Interrupt execution to force deadline recalculation. */
qemu_clock_warp(ts->timer_list->clock);
-if (use_icount) {
-timerlist_notify(ts->timer_list);
-}
+timerlist_notify(ts->timer_list);
}
}
--
1.7.9.5
[Qemu-devel] [PATCHv11 05/31] aio / timers: add ppoll support with qemu_poll_ns
Add qemu_poll_ns which works like g_poll but takes a nanosecond
timeout.
Signed-off-by: Alex Bligh
---
configure| 19 +++
include/qemu/timer.h | 12
qemu-timer.c | 24
3 files changed, 55 insertions(+)
diff --git a/configure b/configure
index 18fa608..5659412 100755
--- a/configure
+++ b/configure
@@ -2818,6 +2818,22 @@ if compile_prog "" "" ; then
dup3=yes
fi
+# check for ppoll support
+ppoll=no
+cat > $TMPC << EOF
+#include
+
+int main(void)
+{
+struct pollfd pfd = { .fd = 0, .events = 0, .revents = 0 };
+ppoll(&pfd, 1, 0, 0);
+return 0;
+}
+EOF
+if compile_prog "" "" ; then
+ ppoll=yes
+fi
+
# check for epoll support
epoll=no
cat > $TMPC << EOF
@@ -3814,6 +3830,9 @@ fi
if test "$dup3" = "yes" ; then
echo "CONFIG_DUP3=y" >> $config_host_mak
fi
+if test "$ppoll" = "yes" ; then
+ echo "CONFIG_PPOLL=y" >> $config_host_mak
+fi
if test "$epoll" = "yes" ; then
echo "CONFIG_EPOLL=y" >> $config_host_mak
fi
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index e0a51a1..fcc3ca0 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -63,6 +63,18 @@ int64_t qemu_clock_deadline_ns(QEMUClock *clock);
*/
int qemu_timeout_ns_to_ms(int64_t ns);
+/**
+ * qemu_poll_ns:
+ * @fds: Array of file descriptors
+ * @nfds: number of file descriptors
+ * @timeout: timeout in nanoseconds
+ *
+ * Perform a poll like g_poll but with a timeout in nanoseconds.
+ * See g_poll documentation for further details.
+ *
+ * Returns: number of fds ready
+ */
+int qemu_poll_ns(GPollFD *fds, uint nfds, int64_t timeout);
void qemu_clock_enable(QEMUClock *clock, bool enabled);
void qemu_clock_warp(QEMUClock *clock);
diff --git a/qemu-timer.c b/qemu-timer.c
index be29adf..4bf05d4 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -37,6 +37,10 @@
#include
#endif
+#ifdef CONFIG_PPOLL
+#include
+#endif
+
/***/
/* timers */
@@ -323,6 +327,26 @@ int qemu_timeout_ns_to_ms(int64_t ns)
}
+/* qemu implementation of g_poll which uses a nanosecond timeout but is
+ * otherwise identical to g_poll
+ */
+int qemu_poll_ns(GPollFD *fds, uint nfds, int64_t timeout)
+{
+#ifdef CONFIG_PPOLL
+if (timeout < 0) {
+return ppoll((struct pollfd *)fds, nfds, NULL, NULL);
+} else {
+struct timespec ts;
+ts.tv_sec = timeout / 10LL;
+ts.tv_nsec = timeout % 10LL;
+return ppoll((struct pollfd *)fds, nfds, &ts, NULL);
+}
+#else
+return g_poll(fds, nfds, qemu_timeout_ns_to_ms(timeout));
+#endif
+}
+
+
QEMUTimer *qemu_new_timer(QEMUClock *clock, int scale,
QEMUTimerCB *cb, void *opaque)
{
--
1.7.9.5
[Qemu-devel] [PATCHv11 00/31] aio / timers: Add AioContext timers and use ppoll
[ This patch set is available from git at: https://github.com/abligh/qemu/tree/aio-timers11 As autogenerated patch 30 of the series is too large for the mailing list. ] This patch series adds support for timers attached to an AioContext clock which get called within aio_poll. In doing so it removes alarm timers and moves to use ppoll where possible. This patch set 'sort of' passes make check (see below for caveat) including a new test harness for the aio timers, but has not been tested much beyond that. In particular, the win32 changes have not even been compile tested. Equally, alterations to use_icount are untested. Caveat: I have had to alter tests/test-aio.c so the following error no longer occurs. ERROR:tests/test-aio.c:346:test_wait_event_notifier_noflush: assertion failed: (aio_poll(ctx, false)) As gar as I can tell, this check was incorrect, in that it checking aio_poll makes progress when in fact it should not make progress. I fixed an issue where aio_poll was (as far as I can tell) wrongly returning true on a timeout, and that generated this error. Note also the comment on patch 19 in relation to a possible bug in cpus.c. The penultimate patch is patch which is created in an automated manner using scripts/switch-timer-api, added in this patch set. It violates some coding standards (e.g. line length >= 80 characters), but this is preferable in terms of giving a provably correct conversion. This patch is too large for the mailing list, so EITHER: get it from git at the URL at the top of this message. OR: Do the following: 1. Apply patches -0029 inclusive 2. Run scripts/switch-timer-api 3. git commit -a (+ suitable commit message) 4. Apply patch 0031 If there is demand I can split it one commit per file. This patch set has been compile tested & make check tested on a 'christmas-tree' configuration, meaning a configuration with every --enable-* value tested that can be easily configured on Ubuntu Precise, after application of each patch. Changes since v10: * Rebase to 1ee2dae (1.6.0 release) * Attempt to fix double 'typedef struct' issue by only having typedef struct in typedefs.h (cannot test, my compiler doesn't complain) Changes since v9: * Rebase to master 2e985fe * Wrap QEMUTimerListGroup in a struct as we're keeping it for the time being Changes since v8: * PR_SET_TIMERSLACK commit should have relevant configure patch within * Delete timerlist_set_notify_cb, put into timerlist_new * Add missing QLIST_INIT of clock->timerlists * Fix documentation for timerlist_get_clock * Rename qemu_timer_xxx to timer_xxx * Remove unintentional change to pc-bios/slof.bin * Introduce timer_init and aio_timer_init Changes since v7: * Rebase to master 6fdf98f281f85ae6e2883bed2f691bcfe33b1f9f * Add qemu_clock_get_ms and qemu_clock_get_ms * Rename qemu_get_clock to qemu_clock_ptr * Reorder qemu-timer.h to utilise the legacy API * Hide qemu_clock_new & qemu_clock_free * Rename default_timerlist to main_loop_timerlist * Remove main_loop_timerlist once main_loop_tlg is in * Add script to convert to new API * Make rtc_clock use new API * Convert tests/test-aio to use new API * Run script on entire source code * Remove legacy API functions Changes since v6: * Fix build failure in vnc-auth-sasl.c * Split first patch into 3 * Add assert on timerlist_free * Fix ==/= error on qemu_clock_use_for_deadline * Remove unnecessary cast in aio_timerlist_notify * Fix bad deadline comparison in aio_ctx_check * Add assert to timerlist_new_from_clock to check init_clocks * Use timer_list not tl * Change default_timerlistgroup to main_loop_timerlistgroup * Add comment on commit for qemu_clock_use_for_deadline * Fixed various include file issues * Convert *_has_timers and *_has_expired to return bool * Make loop variable consistent when looping through clock types * Add documentation to existing qemu_timer calls * Remove qemu_clock_deadline and move to qemu_clock_deadline_ns Changes since v5: * Rebase onto master (b9ac5d9) * Fix spacing in typedef QEMUTimerList * Rename 'QEMUClocks' extern to 'qemu_clocks' Changes since v4: * Rename qemu_timerlist_ functions to timer_list (per Paolo Bonzini) * Rename qemu_timer_.*timerlist.* to timer_ (per Paolo Bonzini) * Use enum for QEMUClockType * Put clocks into an array; remove global variables * Introduce QEMUTimerListGroup - a timeliest of each type * Add a QEMUTimerListGroup to AioContext * Use a callback on timer modification, rather than binding in AioContext into the timeliest * Make cpus.c iterate over all timerlists when it does a notify * Make cpus.c icount timeout use soonest timeout across all timerlists Changes since v3: * Split up QEMUClock and QEMUClock list * Improve commenting * Fix comment in vl.c * Change test/test-aio.c to reflect correct behaviour in aio_poll. Changes since v2: * Reordered to remove alarm timers last * Added prctl(PR_SET_TIMERSLACK, 1, ...) * Renamed qemu_g_poll_ns to qemu_poll_ns * Moved declaration of above & drop glib
[Qemu-devel] [PATCHv11 13/31] aio / timers: aio_ctx_prepare sets timeout from AioContext timers
Calculate the timeout in aio_ctx_prepare taking into account
the timers attached to the AioContext.
Alter aio_ctx_check similarly.
Signed-off-by: Alex Bligh
---
async.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/async.c b/async.c
index 2b9ba9b..d8656cc 100644
--- a/async.c
+++ b/async.c
@@ -150,13 +150,14 @@ aio_ctx_prepare(GSource *source, gint*timeout)
{
AioContext *ctx = (AioContext *) source;
QEMUBH *bh;
+int deadline;
for (bh = ctx->first_bh; bh; bh = bh->next) {
if (!bh->deleted && bh->scheduled) {
if (bh->idle) {
/* idle bottom halves will be polled at least
* every 10ms */
-*timeout = 10;
+*timeout = qemu_soonest_timeout(*timeout, 10);
} else {
/* non-idle bottom halves will be executed
* immediately */
@@ -166,6 +167,14 @@ aio_ctx_prepare(GSource *source, gint*timeout)
}
}
+deadline = qemu_timeout_ns_to_ms(timerlistgroup_deadline_ns(&ctx->tlg));
+if (deadline == 0) {
+*timeout = 0;
+return true;
+} else {
+*timeout = qemu_soonest_timeout(*timeout, deadline);
+}
+
return false;
}
@@ -180,7 +189,7 @@ aio_ctx_check(GSource *source)
return true;
}
}
-return aio_pending(ctx);
+return aio_pending(ctx) || (timerlistgroup_deadline_ns(&ctx->tlg) == 0);
}
static gboolean
--
1.7.9.5
[Qemu-devel] [PATCHv11 03/31] aio / timers: add qemu-timer.c utility functions
Add utility functions to qemu-timer.c for nanosecond timing.
Add qemu_clock_deadline_ns to calculate deadlines to
nanosecond accuracy.
Add utility function qemu_soonest_timeout to calculate soonest deadline.
Add qemu_timeout_ns_to_ms to convert a timeout in nanoseconds back to
milliseconds for when ppoll is not used.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h | 42 ++
qemu-timer.c | 50 ++
2 files changed, 92 insertions(+)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index da43cbe..e0a51a1 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -40,6 +40,29 @@ int64_t qemu_get_clock_ns(QEMUClock *clock);
int64_t qemu_clock_has_timers(QEMUClock *clock);
int64_t qemu_clock_expired(QEMUClock *clock);
int64_t qemu_clock_deadline(QEMUClock *clock);
+
+/**
+ * qemu_clock_deadline_ns:
+ * @clock: the clock to operate on
+ *
+ * Calculate the timeout of the earliest expiring timer
+ * in nanoseconds, or -1 if no timer is set to expire.
+ *
+ * Returns: time until expiry in nanoseconds or -1
+ */
+int64_t qemu_clock_deadline_ns(QEMUClock *clock);
+
+/**
+ * qemu_timeout_ns_to_ms:
+ * @ns: nanosecond timeout value
+ *
+ * Convert a nanosecond timeout value (or -1) to
+ * a millisecond value (or -1), always rounding up.
+ *
+ * Returns: millisecond timeout value
+ */
+int qemu_timeout_ns_to_ms(int64_t ns);
+
void qemu_clock_enable(QEMUClock *clock, bool enabled);
void qemu_clock_warp(QEMUClock *clock);
@@ -67,6 +90,25 @@ int64_t cpu_get_ticks(void);
void cpu_enable_ticks(void);
void cpu_disable_ticks(void);
+/**
+ * qemu_soonest_timeout:
+ * @timeout1: first timeout in nanoseconds (or -1 for infinite)
+ * @timeout2: second timeout in nanoseconds (or -1 for infinite)
+ *
+ * Calculates the soonest of two timeout values. -1 means infinite, which
+ * is later than any other value.
+ *
+ * Returns: soonest timeout value in nanoseconds (or -1 for infinite)
+ */
+static inline int64_t qemu_soonest_timeout(int64_t timeout1, int64_t timeout2)
+{
+/* we can abuse the fact that -1 (which means infinite) is a maximal
+ * value when cast to unsigned. As this is disgusting, it's kept in
+ * one inline function.
+ */
+return ((uint64_t) timeout1 < (uint64_t) timeout2) ? timeout1 : timeout2;
+}
+
static inline QEMUTimer *qemu_new_timer_ns(QEMUClock *clock, QEMUTimerCB *cb,
void *opaque)
{
diff --git a/qemu-timer.c b/qemu-timer.c
index 4117add..df8f12b 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -273,6 +273,56 @@ int64_t qemu_clock_deadline(QEMUClock *clock)
return delta;
}
+/*
+ * As above, but return -1 for no deadline, and do not cap to 2^32
+ * as we know the result is always positive.
+ */
+
+int64_t qemu_clock_deadline_ns(QEMUClock *clock)
+{
+int64_t delta;
+
+if (!clock->enabled || !clock->active_timers) {
+return -1;
+}
+
+delta = clock->active_timers->expire_time - qemu_get_clock_ns(clock);
+
+if (delta <= 0) {
+return 0;
+}
+
+return delta;
+}
+
+/* Transition function to convert a nanosecond timeout to ms
+ * This is used where a system does not support ppoll
+ */
+int qemu_timeout_ns_to_ms(int64_t ns)
+{
+int64_t ms;
+if (ns < 0) {
+return -1;
+}
+
+if (!ns) {
+return 0;
+}
+
+/* Always round up, because it's better to wait too long than to wait too
+ * little and effectively busy-wait
+ */
+ms = (ns + SCALE_MS - 1) / SCALE_MS;
+
+/* To avoid overflow problems, limit this to 2^31, i.e. approx 25 days */
+if (ms > (int64_t) INT32_MAX) {
+ms = INT32_MAX;
+}
+
+return (int) ms;
+}
+
+
QEMUTimer *qemu_new_timer(QEMUClock *clock, int scale,
QEMUTimerCB *cb, void *opaque)
{
--
1.7.9.5
[Qemu-devel] [PATCHv11 12/31] aio / timers: Add a notify callback to QEMUTimerList
Add a notify pointer to QEMUTimerList so it knows what to notify
on a timer change.
Signed-off-by: Alex Bligh
---
async.c |7 ++-
include/qemu/timer.h | 27 +++
qemu-timer.c | 31 ---
3 files changed, 53 insertions(+), 12 deletions(-)
diff --git a/async.c b/async.c
index ae2c700..2b9ba9b 100644
--- a/async.c
+++ b/async.c
@@ -234,6 +234,11 @@ void aio_notify(AioContext *ctx)
event_notifier_set(&ctx->notifier);
}
+static void aio_timerlist_notify(void *opaque)
+{
+aio_notify(opaque);
+}
+
AioContext *aio_context_new(void)
{
AioContext *ctx;
@@ -245,7 +250,7 @@ AioContext *aio_context_new(void)
aio_set_event_notifier(ctx, &ctx->notifier,
(EventNotifierHandler *)
event_notifier_test_and_clear, NULL);
-timerlistgroup_init(&ctx->tlg);
+timerlistgroup_init(&ctx->tlg, aio_timerlist_notify, ctx);
return ctx;
}
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 38b7021..843dfe1 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -59,6 +59,7 @@ struct QEMUTimerListGroup {
};
typedef void QEMUTimerCB(void *opaque);
+typedef void QEMUTimerListNotifyCB(void *opaque);
struct QEMUTimer {
int64_t expire_time;/* in nanoseconds */
@@ -137,13 +138,16 @@ QEMUTimerList
*qemu_clock_get_main_loop_timerlist(QEMUClock *clock);
/**
* timerlist_new:
* @type: the clock type to associate with the timerlist
+ * @cb: the callback to call on notification
+ * @opaque: the opaque pointer to pass to the callback
*
* Create a new timerlist associated with the clock of
* type @type.
*
* Returns: a pointer to the QEMUTimerList created
*/
-QEMUTimerList *timerlist_new(QEMUClockType type);
+QEMUTimerList *timerlist_new(QEMUClockType type,
+ QEMUTimerListNotifyCB *cb, void *opaque);
/**
* timerlist_free:
@@ -224,13 +228,28 @@ QEMUClock *timerlist_get_clock(QEMUTimerList *timer_list);
bool timerlist_run_timers(QEMUTimerList *timer_list);
/**
+ * timerlist_notify:
+ * @timer_list: the timer list to use
+ *
+ * call the notifier callback associated with the timer list.
+ */
+void timerlist_notify(QEMUTimerList *timer_list);
+
+/**
* timerlistgroup_init:
* @tlg: the timer list group
+ * @cb: the callback to call when a notify is required
+ * @opaque: the opaque pointer to be passed to the callback.
*
* Initialise a timer list group. This must already be
- * allocated in memory and zeroed.
- */
-void timerlistgroup_init(QEMUTimerListGroup *tlg);
+ * allocated in memory and zeroed. The notifier callback is
+ * called whenever a clock in the timer list group is
+ * reenabled or whenever a timer associated with any timer
+ * list is modified. If @cb is specified as null, qemu_notify()
+ * is used instead.
+ */
+void timerlistgroup_init(QEMUTimerListGroup *tlg,
+ QEMUTimerListNotifyCB *cb, void *opaque);
/**
* timerlistgroup_deinit:
diff --git a/qemu-timer.c b/qemu-timer.c
index 2f346c9..c1de3d3 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -73,6 +73,8 @@ struct QEMUTimerList {
QEMUClock *clock;
QEMUTimer *active_timers;
QLIST_ENTRY(QEMUTimerList) list;
+QEMUTimerListNotifyCB *notify_cb;
+void *notify_opaque;
};
struct qemu_alarm_timer {
@@ -243,7 +245,9 @@ next:
}
}
-static QEMUTimerList *timerlist_new_from_clock(QEMUClock *clock)
+static QEMUTimerList *timerlist_new_from_clock(QEMUClock *clock,
+ QEMUTimerListNotifyCB *cb,
+ void *opaque)
{
QEMUTimerList *timer_list;
@@ -257,13 +261,16 @@ static QEMUTimerList *timerlist_new_from_clock(QEMUClock
*clock)
timer_list = g_malloc0(sizeof(QEMUTimerList));
timer_list->clock = clock;
+timer_list->notify_cb = cb;
+timer_list->notify_opaque = opaque;
QLIST_INSERT_HEAD(&clock->timerlists, timer_list, list);
return timer_list;
}
-QEMUTimerList *timerlist_new(QEMUClockType type)
+QEMUTimerList *timerlist_new(QEMUClockType type,
+ QEMUTimerListNotifyCB *cb, void *opaque)
{
-return timerlist_new_from_clock(qemu_clock_ptr(type));
+return timerlist_new_from_clock(qemu_clock_ptr(type), cb, opaque);
}
void timerlist_free(QEMUTimerList *timer_list)
@@ -288,7 +295,7 @@ static QEMUClock *qemu_clock_new(QEMUClockType type)
clock->last = INT64_MIN;
QLIST_INIT(&clock->timerlists);
notifier_list_init(&clock->reset_notifiers);
-clock->main_loop_timerlist = timerlist_new_from_clock(clock);
+clock->main_loop_timerlist = timerlist_new_from_clock(clock, NULL, NULL);
return clock;
}
@@ -386,6 +393,15 @@ QEMUTimerList
*qemu_clock_get_main_loop_timerlist(QEMUClock *clock)
return clock->main_loop_timerlist;
}
+void timerlist_notify(QEMUTimerList *timer_list)
+{
+if (timer
[Qemu-devel] [PATCHv11 04/31] aio / timers: Consistent treatment of disabled clocks for deadlines
Make treatment of disabled clocks consistent in deadline calculation
Signed-off-by: Alex Bligh
---
qemu-timer.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qemu-timer.c b/qemu-timer.c
index df8f12b..be29adf 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -264,7 +264,7 @@ int64_t qemu_clock_deadline(QEMUClock *clock)
/* To avoid problems with overflow limit this to 2^32. */
int64_t delta = INT32_MAX;
-if (clock->active_timers) {
+if (clock->enabled && clock->active_timers) {
delta = clock->active_timers->expire_time - qemu_get_clock_ns(clock);
}
if (delta < 0) {
--
1.7.9.5
[Qemu-devel] [PATCHv11 09/31] aio / timers: Untangle include files
include/qemu/timer.h has no need to include main-loop.h and doing so causes an issue for the next patch. Unfortunately various files assume including timers.h will pull in main-loop.h. Untangle this mess. Signed-off-by: Alex Bligh --- dma-helpers.c |1 + hw/dma/xilinx_axidma.c|1 + hw/timer/arm_timer.c |1 + hw/timer/exynos4210_mct.c |1 + hw/timer/exynos4210_pwm.c |1 + hw/timer/grlib_gptimer.c |2 ++ hw/timer/imx_epit.c |1 + hw/timer/imx_gpt.c|1 + hw/timer/lm32_timer.c |1 + hw/timer/puv3_ost.c |1 + hw/timer/sh_timer.c |1 + hw/timer/slavio_timer.c |1 + hw/timer/xilinx_timer.c |1 + hw/tpm/tpm_tis.c |1 + hw/usb/hcd-uhci.c |1 + include/block/aio.h |5 +++-- include/block/block_int.h |1 + include/block/coroutine.h |1 + include/qemu/timer.h |1 - include/qemu/typedefs.h |2 ++ migration-exec.c |1 + migration-fd.c|1 + migration-tcp.c |1 + migration-unix.c |1 + migration.c |1 + nbd.c |1 + net/net.c |1 + net/socket.c |1 + qemu-coroutine-io.c |1 + qemu-io-cmds.c|1 + qemu-nbd.c|1 + slirp/misc.c |1 + thread-pool.c |1 + ui/vnc-auth-sasl.h|1 + ui/vnc-auth-vencrypt.c|2 +- ui/vnc-ws.c |1 + 36 files changed, 39 insertions(+), 4 deletions(-) diff --git a/dma-helpers.c b/dma-helpers.c index 499550f..c9620a5 100644 --- a/dma-helpers.c +++ b/dma-helpers.c @@ -11,6 +11,7 @@ #include "trace.h" #include "qemu/range.h" #include "qemu/thread.h" +#include "qemu/main-loop.h" /* #define DEBUG_IOMMU */ diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index a48e3ba..59e8e35 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -27,6 +27,7 @@ #include "hw/ptimer.h" #include "qemu/log.h" #include "qapi/qmp/qerror.h" +#include "qemu/main-loop.h" #include "hw/stream.h" diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index acfea59..a47afde 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -12,6 +12,7 @@ #include "qemu-common.h" #include "hw/qdev.h" #include "hw/ptimer.h" +#include "qemu/main-loop.h" /* Common timer implementation. */ diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index a8009a4..13b1889 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -54,6 +54,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qemu/main-loop.h" #include "qemu-common.h" #include "hw/ptimer.h" diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c index a52f0f6..1aa8f4d 100644 --- a/hw/timer/exynos4210_pwm.c +++ b/hw/timer/exynos4210_pwm.c @@ -23,6 +23,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" #include "qemu-common.h" +#include "qemu/main-loop.h" #include "hw/ptimer.h" #include "hw/arm/exynos4210.h" diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 7c1055a..74c16d6 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -25,6 +25,8 @@ #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/ptimer.h" +#include "qemu/timer.h" +#include "qemu/main-loop.h" #include "trace.h" diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 117dc7b..efe2ff9 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -18,6 +18,7 @@ #include "hw/ptimer.h" #include "hw/sysbus.h" #include "hw/arm/imx.h" +#include "qemu/main-loop.h" #define TYPE_IMX_EPIT "imx.epit" diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index 87db0e1..f2d1975 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -18,6 +18,7 @@ #include "hw/ptimer.h" #include "hw/sysbus.h" #include "hw/arm/imx.h" +#include "qemu/main-loop.h" #define TYPE_IMX_GPT "imx.gpt" diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c index 986e6a1..8ed138c 100644 --- a/hw/timer/lm32_timer.c +++ b/hw/timer/lm32_timer.c @@ -27,6 +27,7 @@ #include "qemu/timer.h" #include "hw/ptimer.h" #include "qemu/error-report.h" +#include "qemu/main-loop.h" #define DEFAULT_FREQUENCY (50*100) diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c index 4bd2b76..fa9eefd 100644 --- a/hw/timer/puv3_ost.c +++ b/hw/timer/puv3_ost.c @@ -10,6 +10,7 @@ */ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qemu/main-loop.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c index 251a10d..07f0670 100644 --- a/hw/timer/sh_timer.c +++ b/hw/timer/sh_timer.c @@ -11,6 +11,7 @@ #include "hw/hw.h" #include "hw/sh4/sh.h" #include "qemu/timer.h" +#include "qemu/main-loop.h" #include "exec/address-spaces.h" #include "hw/ptimer.h" diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer
[Qemu-devel] [PATCHv11 06/31] aio / timers: Add prctl(PR_SET_TIMERSLACK, 1, ...) to reduce timer slack
Where supported, called prctl(PR_SET_TIMERSLACK, 1, ...) to
set one nanosecond timer slack to increase precision of timer
calls.
Signed-off-by: Alex Bligh
---
configure| 18 ++
qemu-timer.c |7 +++
2 files changed, 25 insertions(+)
diff --git a/configure b/configure
index 5659412..0a55c20 100755
--- a/configure
+++ b/configure
@@ -2834,6 +2834,21 @@ if compile_prog "" "" ; then
ppoll=yes
fi
+# check for prctl(PR_SET_TIMERSLACK , ... ) support
+prctl_pr_set_timerslack=no
+cat > $TMPC << EOF
+#include
+
+int main(void)
+{
+prctl(PR_SET_TIMERSLACK, 1, 0, 0, 0);
+return 0;
+}
+EOF
+if compile_prog "" "" ; then
+ prctl_pr_set_timerslack=yes
+fi
+
# check for epoll support
epoll=no
cat > $TMPC << EOF
@@ -3833,6 +3848,9 @@ fi
if test "$ppoll" = "yes" ; then
echo "CONFIG_PPOLL=y" >> $config_host_mak
fi
+if test "$prctl_pr_set_timerslack" = "yes" ; then
+ echo "CONFIG_PRCTL_PR_SET_TIMERSLACK=y" >> $config_host_mak
+fi
if test "$epoll" = "yes" ; then
echo "CONFIG_EPOLL=y" >> $config_host_mak
fi
diff --git a/qemu-timer.c b/qemu-timer.c
index 4bf05d4..f224b62 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -41,6 +41,10 @@
#include
#endif
+#ifdef CONFIG_PRCTL_PR_SET_TIMERSLACK
+#include
+#endif
+
/***/
/* timers */
@@ -507,6 +511,9 @@ void init_clocks(void)
vm_clock = qemu_clock_new(QEMU_CLOCK_VIRTUAL);
host_clock = qemu_clock_new(QEMU_CLOCK_HOST);
}
+#ifdef CONFIG_PRCTL_PR_SET_TIMERSLACK
+prctl(PR_SET_TIMERSLACK, 1, 0, 0, 0);
+#endif
}
uint64_t timer_expire_time_ns(QEMUTimer *ts)
--
1.7.9.5
[Qemu-devel] [PATCHv11 10/31] aio / timers: Add QEMUTimerListGroup and helper functions
Add QEMUTimerListGroup and helper functions, to represent
a QEMUTimerList associated with each clock. Add a default
QEMUTimerListGroup representing the default timer lists
which are not associated with any other object (e.g.
an AioContext as added by future patches).
Signed-off-by: Alex Bligh
---
include/qemu/timer.h| 49 +++
include/qemu/typedefs.h |1 +
qemu-timer.c| 42
3 files changed, 92 insertions(+)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index ef24ef9..38b7021 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -53,6 +53,11 @@ typedef enum {
typedef struct QEMUClock QEMUClock;
typedef struct QEMUTimerList QEMUTimerList;
+
+struct QEMUTimerListGroup {
+QEMUTimerList *tl[QEMU_CLOCK_MAX];
+};
+
typedef void QEMUTimerCB(void *opaque);
struct QEMUTimer {
@@ -64,6 +69,7 @@ struct QEMUTimer {
int scale;
};
+extern QEMUTimerListGroup main_loop_tlg;
extern QEMUClock *qemu_clocks[QEMU_CLOCK_MAX];
/**
@@ -218,6 +224,49 @@ QEMUClock *timerlist_get_clock(QEMUTimerList *timer_list);
bool timerlist_run_timers(QEMUTimerList *timer_list);
/**
+ * timerlistgroup_init:
+ * @tlg: the timer list group
+ *
+ * Initialise a timer list group. This must already be
+ * allocated in memory and zeroed.
+ */
+void timerlistgroup_init(QEMUTimerListGroup *tlg);
+
+/**
+ * timerlistgroup_deinit:
+ * @tlg: the timer list group
+ *
+ * Deinitialise a timer list group. This must already be
+ * initialised. Note the memory is not freed.
+ */
+void timerlistgroup_deinit(QEMUTimerListGroup *tlg);
+
+/**
+ * timerlistgroup_run_timers:
+ * @tlg: the timer list group
+ *
+ * Run the timers associated with a timer list group.
+ * This will run timers on multiple clocks.
+ *
+ * Returns: true if any timer callback ran
+ */
+bool timerlistgroup_run_timers(QEMUTimerListGroup *tlg);
+
+/**
+ * timerlistgroup_deadline_ns
+ * @tlg: the timer list group
+ *
+ * Determine the deadline of the soonest timer to
+ * expire associated with any timer list linked to
+ * the timer list group. Only clocks suitable for
+ * deadline calculation are included.
+ *
+ * Returns: the deadline in nanoseconds or -1 if no
+ * timers are to expire.
+ */
+int64_t timerlistgroup_deadline_ns(QEMUTimerListGroup *tlg);
+
+/**
* qemu_timeout_ns_to_ms:
* @ns: nanosecond timeout value
*
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
index cae94ff..3205540 100644
--- a/include/qemu/typedefs.h
+++ b/include/qemu/typedefs.h
@@ -4,6 +4,7 @@
/* A load of opaque types so that device init declarations don't have to
pull in all the real definitions. */
typedef struct QEMUTimer QEMUTimer;
+typedef struct QEMUTimerListGroup QEMUTimerListGroup;
typedef struct QEMUFile QEMUFile;
typedef struct QEMUBH QEMUBH;
diff --git a/qemu-timer.c b/qemu-timer.c
index 2a83928..2f346c9 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -59,6 +59,7 @@ struct QEMUClock {
bool enabled;
};
+QEMUTimerListGroup main_loop_tlg;
QEMUClock *qemu_clocks[QEMU_CLOCK_MAX];
/* A QEMUTimerList is a list of timers attached to a clock. More
@@ -564,6 +565,46 @@ bool qemu_run_timers(QEMUClock *clock)
return timerlist_run_timers(clock->main_loop_timerlist);
}
+void timerlistgroup_init(QEMUTimerListGroup *tlg)
+{
+QEMUClockType type;
+for (type = 0; type < QEMU_CLOCK_MAX; type++) {
+tlg->tl[type] = timerlist_new(type);
+}
+}
+
+void timerlistgroup_deinit(QEMUTimerListGroup *tlg)
+{
+QEMUClockType type;
+for (type = 0; type < QEMU_CLOCK_MAX; type++) {
+timerlist_free(tlg->tl[type]);
+}
+}
+
+bool timerlistgroup_run_timers(QEMUTimerListGroup *tlg)
+{
+QEMUClockType type;
+bool progress = false;
+for (type = 0; type < QEMU_CLOCK_MAX; type++) {
+progress |= timerlist_run_timers(tlg->tl[type]);
+}
+return progress;
+}
+
+int64_t timerlistgroup_deadline_ns(QEMUTimerListGroup *tlg)
+{
+int64_t deadline = -1;
+QEMUClockType type;
+for (type = 0; type < QEMU_CLOCK_MAX; type++) {
+if (qemu_clock_use_for_deadline(tlg->tl[type]->clock)) {
+deadline = qemu_soonest_timeout(deadline,
+timerlist_deadline_ns(
+tlg->tl[type]));
+}
+}
+return deadline;
+}
+
int64_t qemu_get_clock_ns(QEMUClock *clock)
{
int64_t now, last;
@@ -605,6 +646,7 @@ void init_clocks(void)
for (type = 0; type < QEMU_CLOCK_MAX; type++) {
if (!qemu_clocks[type]) {
qemu_clocks[type] = qemu_clock_new(type);
+main_loop_tlg.tl[type] = qemu_clocks[type]->main_loop_timerlist;
}
}
--
1.7.9.5
[Qemu-devel] [PATCHv11 01/31] aio / timers: Rename qemu_timer_* functions
Rename four functions in preparation for new API.
Rename qemu_timer_expired to timer_expired
Rename qemu_timer_expire_time_ns to timer_expire_time_ns
Rename qemu_timer_pending to timer_pending
Rename qemu_timer_expired_ns to timer_expired_ns
Signed-off-by: Alex Bligh
---
backends/baum.c|6 +++---
hw/input/tsc2005.c |2 +-
hw/input/tsc210x.c |2 +-
hw/mips/cputimer.c |4 ++--
hw/openrisc/cputimer.c |2 +-
hw/timer/mc146818rtc.c |6 +++---
hw/usb/redirect.c |4 ++--
include/qemu/timer.h |6 +++---
qemu-timer.c | 20 ++--
savevm.c |2 +-
10 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/backends/baum.c b/backends/baum.c
index 62aa784..b08e1d5 100644
--- a/backends/baum.c
+++ b/backends/baum.c
@@ -314,9 +314,9 @@ static int baum_eat_packet(BaumDriverState *baum, const
uint8_t *buf, int len)
return 0; \
if (*cur++ != ESC) { \
DPRINTF("Broken packet %#2x, tossing\n", req); \
- if (qemu_timer_pending(baum->cellCount_timer)) { \
-qemu_del_timer(baum->cellCount_timer); \
-baum_cellCount_timer_cb(baum); \
+if (timer_pending(baum->cellCount_timer)) {\
+qemu_del_timer(baum->cellCount_timer); \
+baum_cellCount_timer_cb(baum); \
} \
return (cur - 2 - buf); \
} \
diff --git a/hw/input/tsc2005.c b/hw/input/tsc2005.c
index a771cd5..ebd1b7e 100644
--- a/hw/input/tsc2005.c
+++ b/hw/input/tsc2005.c
@@ -513,7 +513,7 @@ static int tsc2005_load(QEMUFile *f, void *opaque, int
version_id)
for (i = 0; i < 8; i ++)
s->tr[i] = qemu_get_be32(f);
-s->busy = qemu_timer_pending(s->timer);
+s->busy = timer_pending(s->timer);
tsc2005_pin_update(s);
return 0;
diff --git a/hw/input/tsc210x.c b/hw/input/tsc210x.c
index 9b854e7..0067f98 100644
--- a/hw/input/tsc210x.c
+++ b/hw/input/tsc210x.c
@@ -1093,7 +1093,7 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int
version_id)
for (i = 0; i < 0x14; i ++)
qemu_get_be16s(f, &s->filter_data[i]);
-s->busy = qemu_timer_pending(s->timer);
+s->busy = timer_pending(s->timer);
qemu_set_irq(s->pint, !s->irq);
qemu_set_irq(s->davint, !s->dav);
diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
index e0266bf..739bbac 100644
--- a/hw/mips/cputimer.c
+++ b/hw/mips/cputimer.c
@@ -72,8 +72,8 @@ uint32_t cpu_mips_get_count (CPUMIPSState *env)
uint64_t now;
now = qemu_get_clock_ns(vm_clock);
-if (qemu_timer_pending(env->timer)
-&& qemu_timer_expired(env->timer, now)) {
+if (timer_pending(env->timer)
+&& timer_expired(env->timer, now)) {
/* The timer has already expired. */
cpu_mips_timer_expire(env);
}
diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c
index 4144b34..9a09f5c 100644
--- a/hw/openrisc/cputimer.c
+++ b/hw/openrisc/cputimer.c
@@ -72,7 +72,7 @@ static void openrisc_timer_cb(void *opaque)
OpenRISCCPU *cpu = opaque;
if ((cpu->env.ttmr & TTMR_IE) &&
- qemu_timer_expired(cpu->env.timer, qemu_get_clock_ns(vm_clock))) {
+ timer_expired(cpu->env.timer, qemu_get_clock_ns(vm_clock))) {
CPUState *cs = CPU(cpu);
cpu->env.ttmr |= TTMR_IP;
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index 3c3baac..d12f6e7 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -252,7 +252,7 @@ static void check_update_timer(RTCState *s)
* the alarm time. */
next_update_time = s->next_alarm_time;
}
-if (next_update_time != qemu_timer_expire_time_ns(s->update_timer)) {
+if (next_update_time != timer_expire_time_ns(s->update_timer)) {
qemu_mod_timer(s->update_timer, next_update_time);
}
}
@@ -587,8 +587,8 @@ static int update_in_progress(RTCState *s)
if (!rtc_running(s)) {
return 0;
}
-if (qemu_timer_pending(s->update_timer)) {
-int64_t next_update_time = qemu_timer_expire_time_ns(s->update_timer);
+if (timer_pending(s->update_timer)) {
+int64_t next_update_time = timer_expire_time_ns(s->update_timer);
/* Latch UIP until the timer expires. */
if (qemu_get_clock_ns(rtc_clock) >= (next_update_time -
UIP_HOLD_LENGTH)) {
s->cmos_data[RTC_REG_A] |= REG_A_UIP;
diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c
index e3b9f32..8fee3d3 100644
--- a/hw/usb/redirect.c
+++ b/hw/usb/redirect.c
@@ -1493,7 +1493,7 @@ static void usbredir_device_connect(void *priv,
USBRedirDevice *dev = priv;
const char *speed;
-if (qemu_timer_pending(dev->attach_timer) || dev->dev.attached) {
+if (timer_pending(dev->attach_timer) || dev->dev.attached) {
ERROR("Received device connect while already connected\n");
return;
}
@@ -1588,7 +1588,7 @
[Qemu-devel] [PATCHv11 02/31] aio / timers: Rename qemu_new_clock and expose clock types
Rename qemu_new_clock to qemu_clock_new.
Expose clock types.
Signed-off-by: Alex Bligh
---
include/qemu/timer.h |4
qemu-timer.c | 12
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index a9afdb3..da43cbe 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -11,6 +11,10 @@
#define SCALE_US 1000
#define SCALE_NS 1
+#define QEMU_CLOCK_REALTIME 0
+#define QEMU_CLOCK_VIRTUAL 1
+#define QEMU_CLOCK_HOST 2
+
typedef struct QEMUClock QEMUClock;
typedef void QEMUTimerCB(void *opaque);
diff --git a/qemu-timer.c b/qemu-timer.c
index 682c50f..4117add 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -40,10 +40,6 @@
/***/
/* timers */
-#define QEMU_CLOCK_REALTIME 0
-#define QEMU_CLOCK_VIRTUAL 1
-#define QEMU_CLOCK_HOST 2
-
struct QEMUClock {
QEMUTimer *active_timers;
@@ -231,7 +227,7 @@ QEMUClock *rt_clock;
QEMUClock *vm_clock;
QEMUClock *host_clock;
-static QEMUClock *qemu_new_clock(int type)
+static QEMUClock *qemu_clock_new(int type)
{
QEMUClock *clock;
@@ -433,9 +429,9 @@ void qemu_unregister_clock_reset_notifier(QEMUClock *clock,
Notifier *notifier)
void init_clocks(void)
{
if (!rt_clock) {
-rt_clock = qemu_new_clock(QEMU_CLOCK_REALTIME);
-vm_clock = qemu_new_clock(QEMU_CLOCK_VIRTUAL);
-host_clock = qemu_new_clock(QEMU_CLOCK_HOST);
+rt_clock = qemu_clock_new(QEMU_CLOCK_REALTIME);
+vm_clock = qemu_clock_new(QEMU_CLOCK_VIRTUAL);
+host_clock = qemu_clock_new(QEMU_CLOCK_HOST);
}
}
--
1.7.9.5
[Qemu-devel] [PATCH v3] slirp: Port redirection option behave differently on Linux and Windows
From: Taimoor Mirza
port redirection code uses SO_REUSEADDR socket option before binding to
host port. Behavior of SO_REUSEADDR is different on Windows and Linux.
Relaunching QEMU with same host and guest port redirection values on Linux
throws error but on Windows it does not throw any error.
Problem is discussed in
http://lists.gnu.org/archive/html/qemu-devel/2013-04/msg03089.html
Signed-off-by: Taimoor Mirza
---
Changes in v3:
- Removed extra commit
Changes in v2:
- Changed #ifdef to #ifndef as SO_REUSEADDR should not be set in case of
Windows.
slirp/socket.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/slirp/socket.c b/slirp/socket.c
index 8e8819c..25d60e7 100644
--- a/slirp/socket.c
+++ b/slirp/socket.c
@@ -627,7 +627,9 @@ tcp_listen(Slirp *slirp, uint32_t haddr, u_int hport,
uint32_t laddr,
addr.sin_port = hport;
if (((s = qemu_socket(AF_INET,SOCK_STREAM,0)) < 0) ||
+#ifndef _WIN32
(qemu_setsockopt(s, SOL_SOCKET, SO_REUSEADDR, &opt, sizeof(int)) <
0) ||
+#endif
(bind(s,(struct sockaddr *)&addr, sizeof(addr)) < 0) ||
(listen(s,1) < 0)) {
int tmperrno = errno; /* Don't clobber the real reason we
failed */
--
1.7.5.4
Re: [Qemu-devel] [Bug 1196727] Re: SLIRP on Windows 7 64-bit host or is it me?
Am 15.08.2013 19:55, schrieb Kenneth Salerno: > I confirmed it wasn't my host, I successfully ran a test on the same > host with a 32-bit QEMU build and SLIRP works fine, for 1.6.0-rc3 as > well. > > It could be my x86_64-w64-mingw32-gcc compiler version, I tested 4.8 and > 4.7, maybe they're too new? Is there a specific gcc version known to > work? I can build a new cross-compiler if need be. > > The reason I want the 64-bit build to work is to raise the guest memory. > Hello, it's possible to raise the guest memory for 32 bit QEMU running on 64 bit Windows with this patch: http://patchwork.ozlabs.org/patch/171743/ Maybe you can also try this 64-bit QEMU for Windows: http://qemu.weilnetz.de/w64/qemu-w64-setup-20130813.exe It was built using a cross compiler on Debian Linux. Regards, Stefan
Re: [Qemu-devel] [PATCH v2] slirp: Port redirection option behave differently on Linux and Windows
--On 15 August 2013 23:13:28 +0500 Taimoor wrote: diff --git a/slirp/socket.c b/slirp/socket.c index 8e8819c..e4685bb 100644 --- a/slirp/socket.c +++ b/slirp/socket.c @@ -1,4 +1,4 @@ -/* +x/* * Copyright (c) 1995 Danny Gasparovski. * * Please read the file COPYRIGHT for the @@ -627,7 +627,9 @@ tcp_listen(Slirp *slirp, uint32_t haddr, u_int hport, You appear to have introduced an additional character at the top of the file. -- Alex Bligh
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On Thu, Aug 15, 2013 at 07:05:22PM +0100, Peter Maydell wrote: > On 15 August 2013 18:54, Guenter Roeck wrote: > > On Thu, Aug 15, 2013 at 05:45:42PM +0100, Peter Maydell wrote: > >> On 13 August 2013 04:40, Guenter Roeck wrote: > >> > Patch tested and working with qemu 1.5.2, using the configuration file > >> > from the yocto project. Patch applied on top of kernel version 3.11-rc5. > >> > >> OK, I tested this on PB926+PCI backplane hardware, and it is > >> definitely better than current mainline, in that the test USB > >> card that I have no longer causes the kernel to generate this sort of > >> backtrace: > >> > > Do you mean my patch fixes the traceback below as a side effect ? > > Would be great ... it would be one more reason to get it applied. > > Yes, exactly -- the kernel currently has the wrong irq mapping, > which causes the traceback (ie h/w asserts irq 93 but the kernel > is listening on something else). That the patch fixes this confirms > that it is the behaviour of hardware as well as of QEMU. > > >> However it still doesn't seem to reliably detect the USB harddisk > >> plugged into the card, so I think there may be further issues, possibly > >> some subset of those Arnd identified and fixed with this patch: > >> http://permalink.gmane.org/gmane.linux.ports.arm.kernel/93397 > >> > > Does it get better if you apply Arnd's patch ? > > Arnd's patch is ancient and won't apply as is (due to intervening > changes and also because some of the things it fixes were fixed > in later patches); I'm currently trying to extract the relevant parts. > > If you want you can confirm that I/O port PCI access is broken on > QEMU too -- disable CONFIG_SCSI_SYM53C8XX_MMIO so > the driver uses PCI IO rather than MMIO and you'll see QEMU's > SCSI device doesn't work any more. > > >> so I'd like to continue testing. > >> > >> The other thing this patch should (IMHO) have is the > >> line in pci_versatile_setup() which tells QEMU that the > >> kernel really does expect hardware-like behaviour: > > >> (Without this line QEMU will guess whether the kernel is broken > >> or not and will get it right most but not necessarily all of the time.) > >> > > Might make sense, but I think it should be a separate patch. > > It needs to go in the same patch, because a kernel with the fixed > irq remapping must also tell QEMU it is fixed; if you split the > two then at the point between the two patches the kernel is > broken for bisection purposes. > > > If I understand correctly, my patch fixes the SCSI problem. > > Is that correct ? If so, can we get it applied to mainline ? > > I'd rather get to a point where I have the hardware definitely > completely working first. There's no real hurry, this has been > broken for months and months. > Ok with me, if it doesn't get lost. Until it gets fixed, arm status on 3.10 kernels will show as "failed" for qemu test runs. Thanks, Guenter
Re: [Qemu-devel] [RFC] [PATCHv10 19/31] aio / timers: Use all timerlists in icount warp calculations
On 15 Aug 2013, at 13:37, Alex Bligh wrote: >> I see no value in a spurious wakeup if no deadline was set, but it's >> harmless. >> >> As for overflow, I don't really understand how INT32_MAX prevents >> overflow. If the base timer value we're adding to is already huge then >> INT32_MAX could still overflow it. > > This is my understanding. I don't think we need to worry about overflowing > int64_t. I think this /might/ refer to the similar bit of nastiness in tcg_cpu_exec, where the parameter gets sent off to qemu_icount_round. It isn't evident this has been built with signed integers in mind. I'm hesitant to fix one without the other. Given no one has been jumping up and down saying "I know how icount works and you should just delete these", I think I'll leave them in for v11, as the result is every two and a half seconds there's an extra wake up when using icount, as far as I can tell. If the jumping up and down person appears, he/she can delete a few lines. So v11 is currently planned just to fix Jan's include file issue. -- Alex Bligh
[Qemu-devel] [PATCH v2] slirp: Port redirection option behave differently on Linux and Windows
From: Taimoor Mirza
port redirection code uses SO_REUSEADDR socket option before binding to
host port. Behavior of SO_REUSEADDR is different on Windows and Linux.
Relaunching QEMU with same host and guest port redirection values on Linux
throws error but on Windows it does not throw any error.
Problem is discussed in
http://lists.gnu.org/archive/html/qemu-devel/2013-04/msg03089.html
Signed-off-by: Taimoor Mirza
---
Changed #ifdef to #ifndef as SO_REUSEADDR should not be set in case of Windows.
slirp/socket.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/slirp/socket.c b/slirp/socket.c
index 8e8819c..e4685bb 100644
--- a/slirp/socket.c
+++ b/slirp/socket.c
@@ -1,4 +1,4 @@
-/*
+x/*
* Copyright (c) 1995 Danny Gasparovski.
*
* Please read the file COPYRIGHT for the
@@ -627,7 +627,9 @@ tcp_listen(Slirp *slirp, uint32_t haddr, u_int hport,
uint32_t laddr,
addr.sin_port = hport;
if (((s = qemu_socket(AF_INET,SOCK_STREAM,0)) < 0) ||
+#ifndef _WIN32
(qemu_setsockopt(s, SOL_SOCKET, SO_REUSEADDR, &opt, sizeof(int)) <
0) ||
+#endif
(bind(s,(struct sockaddr *)&addr, sizeof(addr)) < 0) ||
(listen(s,1) < 0)) {
int tmperrno = errno; /* Don't clobber the real reason we
failed */
--
1.7.5.4
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On 15 August 2013 18:54, Guenter Roeck wrote: > On Thu, Aug 15, 2013 at 05:45:42PM +0100, Peter Maydell wrote: >> On 13 August 2013 04:40, Guenter Roeck wrote: >> > Patch tested and working with qemu 1.5.2, using the configuration file >> > from the yocto project. Patch applied on top of kernel version 3.11-rc5. >> >> OK, I tested this on PB926+PCI backplane hardware, and it is >> definitely better than current mainline, in that the test USB >> card that I have no longer causes the kernel to generate this sort of >> backtrace: >> > Do you mean my patch fixes the traceback below as a side effect ? > Would be great ... it would be one more reason to get it applied. Yes, exactly -- the kernel currently has the wrong irq mapping, which causes the traceback (ie h/w asserts irq 93 but the kernel is listening on something else). That the patch fixes this confirms that it is the behaviour of hardware as well as of QEMU. >> However it still doesn't seem to reliably detect the USB harddisk >> plugged into the card, so I think there may be further issues, possibly >> some subset of those Arnd identified and fixed with this patch: >> http://permalink.gmane.org/gmane.linux.ports.arm.kernel/93397 >> > Does it get better if you apply Arnd's patch ? Arnd's patch is ancient and won't apply as is (due to intervening changes and also because some of the things it fixes were fixed in later patches); I'm currently trying to extract the relevant parts. If you want you can confirm that I/O port PCI access is broken on QEMU too -- disable CONFIG_SCSI_SYM53C8XX_MMIO so the driver uses PCI IO rather than MMIO and you'll see QEMU's SCSI device doesn't work any more. >> so I'd like to continue testing. >> >> The other thing this patch should (IMHO) have is the >> line in pci_versatile_setup() which tells QEMU that the >> kernel really does expect hardware-like behaviour: >> (Without this line QEMU will guess whether the kernel is broken >> or not and will get it right most but not necessarily all of the time.) >> > Might make sense, but I think it should be a separate patch. It needs to go in the same patch, because a kernel with the fixed irq remapping must also tell QEMU it is fixed; if you split the two then at the point between the two patches the kernel is broken for bisection purposes. > If I understand correctly, my patch fixes the SCSI problem. > Is that correct ? If so, can we get it applied to mainline ? I'd rather get to a point where I have the hardware definitely completely working first. There's no real hurry, this has been broken for months and months. -- PMM
[Qemu-devel] [Bug 1196727] Re: SLIRP on Windows 7 64-bit host or is it me?
I confirmed it wasn't my host, I successfully ran a test on the same host with a 32-bit QEMU build and SLIRP works fine, for 1.6.0-rc3 as well. It could be my x86_64-w64-mingw32-gcc compiler version, I tested 4.8 and 4.7, maybe they're too new? Is there a specific gcc version known to work? I can build a new cross-compiler if need be. The reason I want the 64-bit build to work is to raise the guest memory. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1196727 Title: SLIRP on Windows 7 64-bit host or is it me? Status in QEMU: New Bug description: Version: 1.5.1 and tried latest in Git, compiled for x86_64 Windows 64-bit Host: Windows 7 64-bit Guest: FreeBSD 9.1 i386, RHEL 6.4 x86_64, SLES 11.2 x86_64, OpenSUSE 12.3 ppc64, Fedora 18 ppc64 libiconv: 1.14 glib: 2.28.8 gettext: 0.18.1.1 pixman: 0.30.0 libSDL: 1.2.14 Driver: virtio-net-pci Emu: full (non-KVM) I'm new to Windows 7 64-bit as a host for QEMU (previously I was running QEMU on Windows XP with no issues) so it could be me, now on Windows 7 SLIRP only works for me connecting internally from the host to the guest via SLIRP redirect, but any outbound requests from the guest to the Internet are failing with the following: if_start... m_get... m = 61f7bd40 ip_input... m = 61f7bd40 m_len = 48 tcp_input... m = 61f7bd40 iphlen = 20 inso = 0 tcp_fconnect... so = 33e140 connect()ing, addr.sin_port=80, addr.sin_addr.s_addr=206.190.36.45 tcp fconnect errno = 10035-Unknown error icmp_error... msrc = 61f7bd40 msrc_len = 48 10.0.2.5 to 206.190.36.45 m_get... m = 61f7b6c0 ip_output... so = 0 m0 = 61f7b6c0 if_output... so = 0 ifm = 61f7b6c0 if_start... arp_table_search... ip = 0x502000a found hw addr = 52:54:00:12:34:56 m_free... m = 61f7b6c0 tcp_close... tp = 377840 m_free... m = 0 m_free... m = 61f7bd40 Am I doing something wrong with my Windows host configuration or is this a bug in SLIRP only on W64 and not W32? To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1196727/+subscriptions
Re: [Qemu-devel] [PATCH 1/2] tcg/mips: detect available host instructions at runtime
On Thu, 15 Aug 2013, Aurelien Jarno wrote: > > The MIPS32 instructions missing from Vr5500 are the EJTAG stuff (DERET > > and SDBBP), JR.HB/JALR.HB (hmm, weird -- these are actually not guaranteed > > to work on all MIPS32 chips either, e.g. the 4Kc didn't support these > > encodings and trapped), SYNC, three-argument MFCx/MTCx instructions (CP0, > > CP2, CP3 register set selection) and two-argument BC2* instructions (extra > > CP2 condition bits). > > So far the only use case of detecting the MIPS32 ISA is actually to use > MUL instead of MULT. All the others instructions not supported by the > Vr5500 are not used by QEMU, which uses only non-privileged instructions. > JR.HB/JALR.HB seems anyway to be supported only on MIPS32R2. Great! > > All it looks like pretty obscure stuff to me as far as QEMU is concerned, > > so perhaps checking for MUL is good enough. But I'm not the QEMU expert > > here, so I'm just raising the issue in hope that you or someone else > > knows. > > The question is to know if there are other chips which implement MUL, > but not the other MIPS32 non-privileged (and non-FPU) instructions? For > example MOVN and MOVZ is implemented on MIPS4 and Loongson that's why > there is another test for them. The only other processor that supports the MIPS32 MUL instruction is the IDT R4650 chip, but that does not have a TLB MMU and therefore I think can be safely disregarded. It won't run Linux or any such OS. NEC Vr5400 chips (the Vr5432 is the only variant that's been actually taped out) support a MUL instruction that has the same semantics but a different encoding. It shouldn't be a problem though as this assembly piece uses .set mips32r2 and therefore the MIPS32 encoding should be produced instead. You may want to double check it with -march=vr5400 and a small assembly source with code extracted from this piece though. Maciej
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On Thu, Aug 15, 2013 at 05:45:42PM +0100, Peter Maydell wrote: > On 13 August 2013 04:40, Guenter Roeck wrote: > > Patch tested and working with qemu 1.5.2, using the configuration file > > from the yocto project. Patch applied on top of kernel version 3.11-rc5. > > OK, I tested this on PB926+PCI backplane hardware, and it is > definitely better than current mainline, in that the test USB > card that I have no longer causes the kernel to generate this sort of > backtrace: > Do you mean my patch fixes the traceback below as a side effect ? Would be great ... it would be one more reason to get it applied. > ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver > ehci-pci: EHCI PCI platform driver > ehci-pci :00:1e.2: EHCI Host Controller > ehci-pci :00:1e.2: new USB bus registered, assigned bus number 1 > ehci-pci :00:1e.2: irq 91, io mem 0x50002000 > ehci-pci :00:1e.2: USB 2.0 started, EHCI 1.00 > usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 > usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 > usb usb1: Product: EHCI Host Controller > usb usb1: Manufacturer: Linux 3.10.0+ ehci_hcd > usb usb1: SerialNumber: :00:1e.2 > hub 1-0:1.0: USB hub found > hub 1-0:1.0: 3 ports detected > ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver > ohci-pci: OHCI PCI platform driver > ohci-pci :00:1e.0: OHCI PCI host controller > ohci-pci :00:1e.0: new USB bus registered, assigned bus number 2 > irq 93: nobody cared (try booting with the "irqpoll" option) > CPU: 0 PID: 1 Comm: swapper Not tainted 3.10.0+ #9 > [] (unwind_backtrace+0x0/0xf0) from [] > (show_stack+0x10/0x14) > [] (show_stack+0x10/0x14) from [] > (__report_bad_irq+0x24/0xb8) > [] (__report_bad_irq+0x24/0xb8) from [] > (note_interrupt+0x1cc/0x230) > [] (note_interrupt+0x1cc/0x230) from [] > (handle_irq_event_percpu+0xac/0x1c4) > [] (handle_irq_event_percpu+0xac/0x1c4) from [] > (handle_irq_event+0x28/0x38) > [] (handle_irq_event+0x28/0x38) from [] > (handle_level_irq+0x80/0xd4) > [] (handle_level_irq+0x80/0xd4) from [] > (generic_handle_irq+0x2c/0x40) > [] (generic_handle_irq+0x2c/0x40) from [] > (fpga_irq_handle+0x3c/0x50) > [] (fpga_irq_handle+0x3c/0x50) from [] > (generic_handle_irq+0x2c/0x40) > [] (generic_handle_irq+0x2c/0x40) from [] > (handle_IRQ+0x30/0x84) > [] (handle_IRQ+0x30/0x84) from [] > (vic_handle_irq+0x5c/0x9c) > [] (vic_handle_irq+0x5c/0x9c) from [] > (__irq_svc+0x40/0x4c) > Exception stack(0xc7829cc8 to 0xc7829d10) > 9cc0: 0001 000a 0100 2013 0002 0024 > 9ce0: c7828000 c0476980 3fb96c1c c0443950 c04693c0 0001 c0456a50 c7829d10 > 9d00: c0025f38 c0025fa8 2013 > [] (__irq_svc+0x40/0x4c) from [] (__do_softirq+0x80/0x1b4) > [] (__do_softirq+0x80/0x1b4) from [] (irq_exit+0x54/0x90) > [] (irq_exit+0x54/0x90) from [] (handle_IRQ+0x34/0x84) > [] (handle_IRQ+0x34/0x84) from [] > (vic_handle_irq+0x5c/0x9c) > [] (vic_handle_irq+0x5c/0x9c) from [] > (__irq_svc+0x40/0x4c) > Exception stack(0xc7829d80 to 0xc7829dc8) > 9d80: 005d 2000 c79bb7e0 c0446990 6013 c79c > 9da0: 005d c04469c4 0001 c7829dc8 c00555c8 c0054460 > 9dc0: 4013 > [] (__irq_svc+0x40/0x4c) from [] (__setup_irq+0x1f4/0x3f0) > [] (__setup_irq+0x1f4/0x3f0) from [] > (request_threaded_irq+0xb4/0x138) > [] (request_threaded_irq+0xb4/0x138) from [] > (usb_add_hcd+0x4f0/0x6f0) > [] (usb_add_hcd+0x4f0/0x6f0) from [] > (usb_hcd_pci_probe+0x200/0x36c) > [] (usb_hcd_pci_probe+0x200/0x36c) from [] > (pci_device_probe+0x68/0x90) > [] (pci_device_probe+0x68/0x90) from [] > (driver_probe_device+0x78/0x200) > [] (driver_probe_device+0x78/0x200) from [] > (__driver_attach+0x8c/0x90) > [] (__driver_attach+0x8c/0x90) from [] > (bus_for_each_dev+0x58/0x88) > [] (bus_for_each_dev+0x58/0x88) from [] > (bus_add_driver+0xd8/0x220) > [] (bus_add_driver+0xd8/0x220) from [] > (driver_register+0x78/0x144) > [] (driver_register+0x78/0x144) from [] > (do_one_initcall+0x94/0x154) > [] (do_one_initcall+0x94/0x154) from [] > (kernel_init_freeable+0xec/0x1b0) > [] (kernel_init_freeable+0xec/0x1b0) from [] > (kernel_init+0x8/0xe4) > [] (kernel_init+0x8/0xe4) from [] > (ret_from_fork+0x14/0x24) > handlers: > [] usb_hcd_irq > Disabling IRQ #93 > > However it still doesn't seem to reliably detect the USB harddisk > plugged into the card, so I think there may be further issues, possibly > some subset of those Arnd identified and fixed with this patch: > http://permalink.gmane.org/gmane.linux.ports.arm.kernel/93397 > Does it get better if you apply Arnd's patch ? > so I'd like to continue testing. > > The other thing this patch should (IMHO) have is the > line in pci_versatile_setup() which tells QEMU that the > kernel really does expect hardware-like behaviour: > > --- a/arch/arm/mach-versatile/pci.c > +++ b/arch/arm/mach-versatile/pci.c > @@ -295,6 +295,19 @@ int __init pci_versatile_setup(int nr, struct > pci_sys_data *
Re: [Qemu-devel] [PATCH 1/2] tcg/mips: detect available host instructions at runtime
On Thu, Aug 15, 2013 at 05:52:55PM +0100, Maciej W. Rozycki wrote:
> On Thu, 15 Aug 2013, Aurelien Jarno wrote:
>
> > +/* Probe for MIPS32 instructions. As no subsetting is allowed
> > + by the specification, it is only necessary to probe for one
> > + of the instructions. */
> > +#ifndef use_mips32_instructions
> > +got_sigill = 0;
> > +asm volatile(".set push\n"
> > + ".set mips32\n"
> > + "mult $zero, $zero\n"
> > + ".set pop\n"
> > + : : : );
> > +use_mips32_instructions = !got_sigill;
> > +#endif
>
> Are you sure? MULT is an ISA I instruction. Perhaps you meant the
> three-argument MUL? But that might be slightly usafe as a MIPS32 ISA
> detector because that instruction was also implemented on the earlier NEC
> Vr5500 chips. By the look at opcodes/mips-opc.c in binutils Vr5500 chips
> implement most, but not all MIPS32 ISA instructions. So the question is
> -- how close the host has to be?
It's indeed a typo. It should be MUL and no MULT.
> The MIPS32 instructions missing from Vr5500 are the EJTAG stuff (DERET
> and SDBBP), JR.HB/JALR.HB (hmm, weird -- these are actually not guaranteed
> to work on all MIPS32 chips either, e.g. the 4Kc didn't support these
> encodings and trapped), SYNC, three-argument MFCx/MTCx instructions (CP0,
> CP2, CP3 register set selection) and two-argument BC2* instructions (extra
> CP2 condition bits).
So far the only use case of detecting the MIPS32 ISA is actually to use
MUL instead of MULT. All the others instructions not supported by the
Vr5500 are not used by QEMU, which uses only non-privileged instructions.
JR.HB/JALR.HB seems anyway to be supported only on MIPS32R2.
> All it looks like pretty obscure stuff to me as far as QEMU is concerned,
> so perhaps checking for MUL is good enough. But I'm not the QEMU expert
> here, so I'm just raising the issue in hope that you or someone else
> knows.
The question is to know if there are other chips which implement MUL,
but not the other MIPS32 non-privileged (and non-FPU) instructions? For
example MOVN and MOVZ is implemented on MIPS4 and Loongson that's why
there is another test for them.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
On 13 August 2013 04:40, Guenter Roeck wrote: > Patch tested and working with qemu 1.5.2, using the configuration file > from the yocto project. Patch applied on top of kernel version 3.11-rc5. OK, I tested this on PB926+PCI backplane hardware, and it is definitely better than current mainline, in that the test USB card that I have no longer causes the kernel to generate this sort of backtrace: ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver ehci-pci: EHCI PCI platform driver ehci-pci :00:1e.2: EHCI Host Controller ehci-pci :00:1e.2: new USB bus registered, assigned bus number 1 ehci-pci :00:1e.2: irq 91, io mem 0x50002000 ehci-pci :00:1e.2: USB 2.0 started, EHCI 1.00 usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb1: Product: EHCI Host Controller usb usb1: Manufacturer: Linux 3.10.0+ ehci_hcd usb usb1: SerialNumber: :00:1e.2 hub 1-0:1.0: USB hub found hub 1-0:1.0: 3 ports detected ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver ohci-pci: OHCI PCI platform driver ohci-pci :00:1e.0: OHCI PCI host controller ohci-pci :00:1e.0: new USB bus registered, assigned bus number 2 irq 93: nobody cared (try booting with the "irqpoll" option) CPU: 0 PID: 1 Comm: swapper Not tainted 3.10.0+ #9 [] (unwind_backtrace+0x0/0xf0) from [] (show_stack+0x10/0x14) [] (show_stack+0x10/0x14) from [] (__report_bad_irq+0x24/0xb8) [] (__report_bad_irq+0x24/0xb8) from [] (note_interrupt+0x1cc/0x230) [] (note_interrupt+0x1cc/0x230) from [] (handle_irq_event_percpu+0xac/0x1c4) [] (handle_irq_event_percpu+0xac/0x1c4) from [] (handle_irq_event+0x28/0x38) [] (handle_irq_event+0x28/0x38) from [] (handle_level_irq+0x80/0xd4) [] (handle_level_irq+0x80/0xd4) from [] (generic_handle_irq+0x2c/0x40) [] (generic_handle_irq+0x2c/0x40) from [] (fpga_irq_handle+0x3c/0x50) [] (fpga_irq_handle+0x3c/0x50) from [] (generic_handle_irq+0x2c/0x40) [] (generic_handle_irq+0x2c/0x40) from [] (handle_IRQ+0x30/0x84) [] (handle_IRQ+0x30/0x84) from [] (vic_handle_irq+0x5c/0x9c) [] (vic_handle_irq+0x5c/0x9c) from [] (__irq_svc+0x40/0x4c) Exception stack(0xc7829cc8 to 0xc7829d10) 9cc0: 0001 000a 0100 2013 0002 0024 9ce0: c7828000 c0476980 3fb96c1c c0443950 c04693c0 0001 c0456a50 c7829d10 9d00: c0025f38 c0025fa8 2013 [] (__irq_svc+0x40/0x4c) from [] (__do_softirq+0x80/0x1b4) [] (__do_softirq+0x80/0x1b4) from [] (irq_exit+0x54/0x90) [] (irq_exit+0x54/0x90) from [] (handle_IRQ+0x34/0x84) [] (handle_IRQ+0x34/0x84) from [] (vic_handle_irq+0x5c/0x9c) [] (vic_handle_irq+0x5c/0x9c) from [] (__irq_svc+0x40/0x4c) Exception stack(0xc7829d80 to 0xc7829dc8) 9d80: 005d 2000 c79bb7e0 c0446990 6013 c79c 9da0: 005d c04469c4 0001 c7829dc8 c00555c8 c0054460 9dc0: 4013 [] (__irq_svc+0x40/0x4c) from [] (__setup_irq+0x1f4/0x3f0) [] (__setup_irq+0x1f4/0x3f0) from [] (request_threaded_irq+0xb4/0x138) [] (request_threaded_irq+0xb4/0x138) from [] (usb_add_hcd+0x4f0/0x6f0) [] (usb_add_hcd+0x4f0/0x6f0) from [] (usb_hcd_pci_probe+0x200/0x36c) [] (usb_hcd_pci_probe+0x200/0x36c) from [] (pci_device_probe+0x68/0x90) [] (pci_device_probe+0x68/0x90) from [] (driver_probe_device+0x78/0x200) [] (driver_probe_device+0x78/0x200) from [] (__driver_attach+0x8c/0x90) [] (__driver_attach+0x8c/0x90) from [] (bus_for_each_dev+0x58/0x88) [] (bus_for_each_dev+0x58/0x88) from [] (bus_add_driver+0xd8/0x220) [] (bus_add_driver+0xd8/0x220) from [] (driver_register+0x78/0x144) [] (driver_register+0x78/0x144) from [] (do_one_initcall+0x94/0x154) [] (do_one_initcall+0x94/0x154) from [] (kernel_init_freeable+0xec/0x1b0) [] (kernel_init_freeable+0xec/0x1b0) from [] (kernel_init+0x8/0xe4) [] (kernel_init+0x8/0xe4) from [] (ret_from_fork+0x14/0x24) handlers: [] usb_hcd_irq Disabling IRQ #93 However it still doesn't seem to reliably detect the USB harddisk plugged into the card, so I think there may be further issues, possibly some subset of those Arnd identified and fixed with this patch: http://permalink.gmane.org/gmane.linux.ports.arm.kernel/93397 so I'd like to continue testing. The other thing this patch should (IMHO) have is the line in pci_versatile_setup() which tells QEMU that the kernel really does expect hardware-like behaviour: --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c @@ -295,6 +295,19 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys) __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2); /* +* For many years the kernel and QEMU were symbiotically buggy +* in that they both assumed the same broken IRQ mapping. +* QEMU therefore attempts to auto-detect old broken kernels +* so that they still work on newer QEMU as they did on old +* QEMU. Since we now use the correct (ie matching-hardware) +* IRQ mapping we write a defin
Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support
On 15.08.2013, at 18:22, Andreas Färber wrote: > Am 15.08.2013 17:58, schrieb Alexander Graf: >> >> On 15.08.2013, at 17:48, Andreas Färber wrote: >> >>> Am 15.08.2013 17:30, schrieb Alexander Graf: On 15.08.2013, at 17:11, Andreas Färber wrote: > Am 15.08.2013 15:12, schrieb Anthony Liguori: >> Everyone is talking past each other and no one is addressing the real >> problem. There are two distinct issues here: >> >> 1) We have two ABIs that cannot be changed unless there's a very good >> reason to. Alexey's original patch breaks both. The guest ABI >> cannot change given a fixed command line. >> >> IOW, the exposed PVR value for -cpu POWER7 cannot change across >> versions of QEMU or when running on different hardware. This breaks >> live migration and save/resume. >> >> We also cannot break the command line interface. If the last version >> of QEMU supported -cpu POWER7_v2.1, then we must continue to support >> that. > > 1a) How should -cpu 0xDEADBEEF or -cpu DEADBEEF behave. > > I expect it to error out as before > rather than applying the same fuzz/mask that -cpu host might. I actually think it'd make sense to apply the same fuzz/mask, don't you think? >>> >>> I think "-cpu host" has the semantics of give-me-what-the-host-has. But >>> -cpu 0xDEADBEEF is asking for PVR DEADBEEF and having it silently return >>> a guest-visible DEADBEBE is going to be undesired. >> >> -cpu host on 0xDEADBEEF should give us a 0xDEADBEEF cpu. -cpu 0xDEADBEEF >> should give us a 0xDEADBEEF cpu :). > > Then we mustn't tweak translate_init.c:cpu_class_by_pvr() to return > deviating results! Which is what the change to > ppc_cpu_compare_class_pvr() is essentially resulting in if I am not > completely off track. And therefore my calling to handle this at a Did anyone ever say the patch is correct? > higher level (KVM init), where the user's intentions are clear, rather > than to blur our internal API. Otherwise the _by_pvr() function would Yes. > need to create a new class or modify an existing one when the function > can't know what the function call was actually intended for. Yes :). Alex
Re: [Qemu-devel] [PATCH 1/2] tcg/mips: detect available host instructions at runtime
On Thu, 15 Aug 2013, Aurelien Jarno wrote:
> +/* Probe for MIPS32 instructions. As no subsetting is allowed
> + by the specification, it is only necessary to probe for one
> + of the instructions. */
> +#ifndef use_mips32_instructions
> +got_sigill = 0;
> +asm volatile(".set push\n"
> + ".set mips32\n"
> + "mult $zero, $zero\n"
> + ".set pop\n"
> + : : : );
> +use_mips32_instructions = !got_sigill;
> +#endif
Are you sure? MULT is an ISA I instruction. Perhaps you meant the
three-argument MUL? But that might be slightly usafe as a MIPS32 ISA
detector because that instruction was also implemented on the earlier NEC
Vr5500 chips. By the look at opcodes/mips-opc.c in binutils Vr5500 chips
implement most, but not all MIPS32 ISA instructions. So the question is
-- how close the host has to be?
The MIPS32 instructions missing from Vr5500 are the EJTAG stuff (DERET
and SDBBP), JR.HB/JALR.HB (hmm, weird -- these are actually not guaranteed
to work on all MIPS32 chips either, e.g. the 4Kc didn't support these
encodings and trapped), SYNC, three-argument MFCx/MTCx instructions (CP0,
CP2, CP3 register set selection) and two-argument BC2* instructions (extra
CP2 condition bits).
All it looks like pretty obscure stuff to me as far as QEMU is concerned,
so perhaps checking for MUL is good enough. But I'm not the QEMU expert
here, so I'm just raising the issue in hope that you or someone else
knows.
Maciej
Re: [Qemu-devel] [RFC] Convert AioContext to Gsource sub classes
Quoting Michael Roth (2013-08-15 10:23:20) > Quoting Wenchao Xia (2013-08-13 03:44:39) > > 于 2013-8-13 1:01, Michael Roth 写道: > > > Quoting Paolo Bonzini (2013-08-12 02:30:28) > > >>> 1) rename AioContext to AioSource. > > >>>This is my major purpose, which declare it is not a "context" > > >>> concept, > > >>> and GMainContext is the entity represent the thread's activity. > > >> > > >> Note that the nested event loops in QEMU are _very_ different from > > >> glib nested event loops. In QEMU, nested event loops only run block > > >> layer events. In glib, they run all events. That's why you need > > >> AioContext. > > > > > > Would it be possible to use glib for our nested loops as well by just > > > setting a higher priority for the AioContext GSource? > > > > > > Stefan and I were considering how we could make use of his "drop > > > ioflush" patches to use a common mechanism to register fd events, but > > > still allow us to distinguish between AioContext and non-AioContext > > > for nested loops. I was originally thinking of using prepare() functions > > > to filter out non-AioContext events, but that requires we implement > > > on GSource's with that in mind, and non make use of pre-baked ones > > > like GIOChannel's, and bakes block stuff into every event source > > > implementation. > > > > >Besides priority, also g_source_set_can_recurse() can help. > >With a deeper think, I found a harder problem: > > g_main_context_acquire() and g_main_context_release(). In release, > > pending BH/IO call back need to be cleared, but this action can't > > be triggered automatically when user call g_main_context_release(). > > I don't understand why this is a requirement, gmctx_acquire/release ensure > that only one thread attempts to iterate the main loop at a time. this > isn't currently an issue in qemu, and if we re-implemented qemu_aio_wait() > to use the same glib interfaces, the tracking of in-flight requests would > be moved to the block layer via Stefan's 'drop io_flush' patches, which > moves that block-specific logic out of the main loop/AioContext GSource > by design. Are there other areas where you see this as a problem? I think I understand better what you're referring to, you mean that if qemu_aio_wait was called, and was implementated to essentially call g_main_context_iterate(), that after, say, 1 iteration, the iothread/dataplane thread might acquire the main loop and dispatch block/non-block events between qemu_aio_wait() returned? The simple approach would be to have qemu_aio_wait() call g_main_context_acquire/release at the start end of the function, which would ensure that this never happens. > > >For the above reason, I tend to think, maybe we should t wrap all of > > Glib's mainloop into custom encapsulation, such as QContext, Add the > > aio poll logic in q_context_release(). Use QContext * in every caller > > to hide GMainContext *, so QContext layer play the role of clear > > event loop API. > > > > > Priorities didn't cross my mind though, but it seems pretty > > > straightfoward... > > > > > > AioContext could then just be a container of sorts for managing > > > bottom-halves and AioContext FDs and binding them to the proper > > > GMainContext/MainLoop, but the underlying GSources could > > > still be driven by a normal glib-based mainloop, just with a specific > > > priority in the nested case. > > > > > >> > > >>> 2) Break AioSource into FdSource and BhSource. > > >>>This make custom code less and simpler, one Gsource for one kind of > > >>> job. It is not necessary but IMHO it will make things clear when add > > >>> more things into main loop: add a new Gsource sub class, avoid to > > >>> always have relationship with AioContext. > > >> > > >> But this is only complicating things work since users rely on both file- > > >> descriptor APIs and bottom half APIs. > > > > > > Taking things a step further, maybe AioContext can stop being a > > > block-specific construct, but actually be the "QContext" we've > > > discussed in the past for managing multiple event loops. All > > > the block stuff would be hidden away in the GSource priority. > > > > > > For instance, > > > > > > #ifndef _WIN32 > > > > > > qemu_aio_set_fd_handler(fd, ...): > > > aio_set_fd_handler(qemu_aio_context, fd, ..., QEMU_PRIORITY_BLOCK) > > > > > > qemu_set_fd_handler(fd, ...): > > > aio_set_fd_handler(qemu_aio_context, fd, ..., G_PRIORITY_DEFAULT) > > > > > > #else > > > > > > qemu_add_wait_object(fd, ...): > > > add_wait_object(qemu_aio_context, fd, ...) > > > > > > qemu_set_fd_handler(fd, ...): > > > set_socket_handler(qemu_aio_context, fd, ..., G_PRIORITY_DEFAULT) > > > > > > #endif > > > > > > qemu_bh_schedule: > > > bh_schedule(qemu_aio_context, ...) > > > > > > etc... > > > > > > I'll be sending patches this week for moving > > > add_wait_object/qemu_set_fd_handler to GSources, the non-global ones use > > > GMainContext * to specify a non-default thread/con
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On 15.08.2013, at 18:08, Andreas Färber wrote:
> Am 15.08.2013 17:51, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 17:43, Andreas Färber wrote:
>>
>>> Am 15.08.2013 17:29, schrieb Alexander Graf:
On 15.08.2013, at 16:47, Andreas Färber wrote:
> There is nothing wrong with finding a mask or wildcard solution to that
> problem, I already indicated so on the original POWER+ patch. The point
> of the whole discussion is how to get there in the least invasive way.
> Not whether, just how.
>
> I think - unlike Alex apparently - that the least invasive way is to
> leave models as they are and to add masking support to families and KVM
> code only.
Not sure I understand. What is KVM specific about this?
>>>
>>> -cpu host is, it's in kvm.c.
>>>
>>> These patches are changing sort comparison code in translate_ppc.c
>>> though, which is used in multiple places.
>>>
> I'm already trying to get away from extending the
> POWERPC_DEF* macros for Prerna's fw_name, which are starting to get a
> big conflict point these days and a future pain if everyone extends them
> for the feature of the day. Note that I started with reading v3, not
> everything from the start, and am therefore not pointing fingers at
> anyone. It may be that you were given some unfortunate suggestions and
> too quick in implementing them.
>
> When we instantiate a -cpu POWER9 then having one POWER9_vX.Y around to
> back it doesn't really hurt. Unlike ARM's MIDR there doesn't seem to be
> an encoding of IBM vendor or POWER family in the PVR. The macros and
> their new implementation are not the way they are because I consider
> them the nicest thing in the world but because the name+pvr+svr+family
> combination made them work for the whole zoo of models we carry around
> and started to give us some inheritance through QOM. Making the POWER7
> family non-abstract would require the same kind of macro "overloading"
> for POWERPC_FAMILY that I'm trying to contain for POWERPC_DEF ATM. So
> what I am still thinking about is how to handle there being multiple
> matches for a PVR - I am considering putting them into a list and
> comparing values for closest match. So that if you have a v2.4 and QEMU
> knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR.
I think this goes into the wrong direction. We should have one single
unified scheme to model core versions and -cpu host should be able to
override them for a family, no? I don't see how instantiating a POWER7_v20
object on a POWER7_v23 system is any improvement over instantiating a
POWER7 object.
>>>
>>> There is no one unified scheme, as we have discussed in your absence.
>>>
>>> My point is, a) -cpu POWER7 should result in valid values
>>
>> Yes :)
>
> ...which requires a specific vX.Y PVR in addition to the mask, i.e. a
> model in our current terms. :)
>
> Consider that there may be differences between models within one family,
> otherwise there would be little point to distinguish them.
>
>>> and b) you
>>> asked to have a unified macro scheme that works for all CPUs, you got
>>> it, now instead you are asking for something that is nice to POWERx, and
>>> we cannot make POWERx family different from the rest wrt macros unless
>>> we break the scheme, which you specifically wanted to have, to avoid
>>> boilerplate QOM code you said. Now you want the full customization
>>> goodness that you were against just before! :)
>>
>> Ah, nonono, I don't want POWER to be any different. I want things unified
>> and consistent. Any time I mention "POWER7" I also mean "e500" or "440" or
>> any other family class we have out there.
>>
>> What I was proposing was to make _all_ families non-abstract and have _all_
>> families support major/minor parameters.
>
> Again, I pointed out looong ago on the POWER7+ patch
> http://patchwork.ozlabs.org/patch/264176/
> (which you really could've looked up yourself by now!)
> that major/minor does not apply to all CPUs. It works for POWER and for
> e500, but that's about it. I specifically gave 440 as an example where
> it doesn't!
Even 440 cores seem to have a matching mask, at least in Linux:
{
.pvr_mask = 0xffff,
.pvr_value = 0x4850,
.cpu_name = "440GR Rev. A",
.cpu_features = CPU_FTRS_44X,
.cpu_user_features = COMMON_USER_BOOKE,
.mmu_features = MMU_FTR_TYPE_44x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc440",
},
But you're right, there isn't as much of a scheme to them as with the others.
So for 440 we would need the intermediate l
Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support
Am 15.08.2013 17:58, schrieb Alexander Graf: > > On 15.08.2013, at 17:48, Andreas Färber wrote: > >> Am 15.08.2013 17:30, schrieb Alexander Graf: >>> >>> On 15.08.2013, at 17:11, Andreas Färber wrote: >>> Am 15.08.2013 15:12, schrieb Anthony Liguori: > Everyone is talking past each other and no one is addressing the real > problem. There are two distinct issues here: > > 1) We have two ABIs that cannot be changed unless there's a very good > reason to. Alexey's original patch breaks both. The guest ABI > cannot change given a fixed command line. > > IOW, the exposed PVR value for -cpu POWER7 cannot change across > versions of QEMU or when running on different hardware. This breaks > live migration and save/resume. > > We also cannot break the command line interface. If the last version > of QEMU supported -cpu POWER7_v2.1, then we must continue to support > that. 1a) How should -cpu 0xDEADBEEF or -cpu DEADBEEF behave. I expect it to error out as before rather than applying the same fuzz/mask that -cpu host might. >>> >>> I actually think it'd make sense to apply the same fuzz/mask, don't you >>> think? >> >> I think "-cpu host" has the semantics of give-me-what-the-host-has. But >> -cpu 0xDEADBEEF is asking for PVR DEADBEEF and having it silently return >> a guest-visible DEADBEBE is going to be undesired. > > -cpu host on 0xDEADBEEF should give us a 0xDEADBEEF cpu. -cpu 0xDEADBEEF > should give us a 0xDEADBEEF cpu :). Then we mustn't tweak translate_init.c:cpu_class_by_pvr() to return deviating results! Which is what the change to ppc_cpu_compare_class_pvr() is essentially resulting in if I am not completely off track. And therefore my calling to handle this at a higher level (KVM init), where the user's intentions are clear, rather than to blur our internal API. Otherwise the _by_pvr() function would need to create a new class or modify an existing one when the function can't know what the function call was actually intended for. Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support
On 15.08.2013, at 17:48, Andreas Färber wrote: > Am 15.08.2013 17:30, schrieb Alexander Graf: >> >> On 15.08.2013, at 17:11, Andreas Färber wrote: >> >>> Am 15.08.2013 15:12, schrieb Anthony Liguori: Everyone is talking past each other and no one is addressing the real problem. There are two distinct issues here: 1) We have two ABIs that cannot be changed unless there's a very good reason to. Alexey's original patch breaks both. The guest ABI cannot change given a fixed command line. IOW, the exposed PVR value for -cpu POWER7 cannot change across versions of QEMU or when running on different hardware. This breaks live migration and save/resume. We also cannot break the command line interface. If the last version of QEMU supported -cpu POWER7_v2.1, then we must continue to support that. >>> >>> 1a) How should -cpu 0xDEADBEEF or -cpu DEADBEEF behave. >>> >>> I expect it to error out as before >>> rather than applying the same fuzz/mask that -cpu host might. >> >> I actually think it'd make sense to apply the same fuzz/mask, don't you >> think? > > I think "-cpu host" has the semantics of give-me-what-the-host-has. But > -cpu 0xDEADBEEF is asking for PVR DEADBEEF and having it silently return > a guest-visible DEADBEBE is going to be undesired. -cpu host on 0xDEADBEEF should give us a 0xDEADBEEF cpu. -cpu 0xDEADBEEF should give us a 0xDEADBEEF cpu :). Alex
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
Am 15.08.2013 17:51, schrieb Alexander Graf: > > On 15.08.2013, at 17:43, Andreas Färber wrote: > >> Am 15.08.2013 17:29, schrieb Alexander Graf: >>> >>> On 15.08.2013, at 16:47, Andreas Färber wrote: >>> There is nothing wrong with finding a mask or wildcard solution to that problem, I already indicated so on the original POWER+ patch. The point of the whole discussion is how to get there in the least invasive way. Not whether, just how. I think - unlike Alex apparently - that the least invasive way is to leave models as they are and to add masking support to families and KVM code only. >>> >>> Not sure I understand. What is KVM specific about this? >> >> -cpu host is, it's in kvm.c. >> >> These patches are changing sort comparison code in translate_ppc.c >> though, which is used in multiple places. >> >>> I'm already trying to get away from extending the POWERPC_DEF* macros for Prerna's fw_name, which are starting to get a big conflict point these days and a future pain if everyone extends them for the feature of the day. Note that I started with reading v3, not everything from the start, and am therefore not pointing fingers at anyone. It may be that you were given some unfortunate suggestions and too quick in implementing them. When we instantiate a -cpu POWER9 then having one POWER9_vX.Y around to back it doesn't really hurt. Unlike ARM's MIDR there doesn't seem to be an encoding of IBM vendor or POWER family in the PVR. The macros and their new implementation are not the way they are because I consider them the nicest thing in the world but because the name+pvr+svr+family combination made them work for the whole zoo of models we carry around and started to give us some inheritance through QOM. Making the POWER7 family non-abstract would require the same kind of macro "overloading" for POWERPC_FAMILY that I'm trying to contain for POWERPC_DEF ATM. So what I am still thinking about is how to handle there being multiple matches for a PVR - I am considering putting them into a list and comparing values for closest match. So that if you have a v2.4 and QEMU knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR. >>> >>> I think this goes into the wrong direction. We should have one single >>> unified scheme to model core versions and -cpu host should be able to >>> override them for a family, no? I don't see how instantiating a POWER7_v20 >>> object on a POWER7_v23 system is any improvement over instantiating a >>> POWER7 object. >> >> There is no one unified scheme, as we have discussed in your absence. >> >> My point is, a) -cpu POWER7 should result in valid values > > Yes :) ...which requires a specific vX.Y PVR in addition to the mask, i.e. a model in our current terms. :) Consider that there may be differences between models within one family, otherwise there would be little point to distinguish them. >> and b) you >> asked to have a unified macro scheme that works for all CPUs, you got >> it, now instead you are asking for something that is nice to POWERx, and >> we cannot make POWERx family different from the rest wrt macros unless >> we break the scheme, which you specifically wanted to have, to avoid >> boilerplate QOM code you said. Now you want the full customization >> goodness that you were against just before! :) > > Ah, nonono, I don't want POWER to be any different. I want things unified and > consistent. Any time I mention "POWER7" I also mean "e500" or "440" or any > other family class we have out there. > > What I was proposing was to make _all_ families non-abstract and have _all_ > families support major/minor parameters. Again, I pointed out looong ago on the POWER7+ patch http://patchwork.ozlabs.org/patch/264176/ (which you really could've looked up yourself by now!) that major/minor does not apply to all CPUs. It works for POWER and for e500, but that's about it. I specifically gave 440 as an example where it doesn't! Note that there's no strict necessity for "host" to be derived from any existing model, it seemed convenient to me at the time. It could just as well be created in-place in KVM code iff you can figure out via ioctls or assembly code what MMU, flags, etc. to fill in beyond PVR - not sure which fields are even relevant for KVM, I just looked for patterns and possible OOD / build-time optimizations in that code. :) Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support
Andreas Färber writes: > Am 15.08.2013 15:12, schrieb Anthony Liguori: >> Everyone is talking past each other and no one is addressing the real >> problem. There are two distinct issues here: >> >> 1) We have two ABIs that cannot be changed unless there's a very good >>reason to. Alexey's original patch breaks both. The guest ABI >>cannot change given a fixed command line. >> >>IOW, the exposed PVR value for -cpu POWER7 cannot change across >>versions of QEMU or when running on different hardware. This breaks >>live migration and save/resume. >> >>We also cannot break the command line interface. If the last version >>of QEMU supported -cpu POWER7_v2.1, then we must continue to support >>that. > > 1a) How should -cpu 0xDEADBEEF or -cpu DEADBEEF behave. > > I expect it to error out as before Correct although that can't be guaranteed. Maybe there is a 'DEADBEEF' cpu model in the future. This is the architecture of the ripvanwinkle and eieio instructions after all :-) > rather than applying the same fuzz/mask that -cpu host might. Fuzzing CPU models sounds like an awful idea to me. Regards, Anthony Liguori > That would let us implement our own fuzz logic in kvm.c, > operating on a GSList of ObjectClasses to handle multiple matches. > > Regards, > Andreas
[Qemu-devel] [PATCH 1/2] tcg/mips: detect available host instructions at runtime
Now that TCG supports enabling and disabling ops at runtime, it's
possible to detect the available host instructions at runtime, and
enable the corresponding ops accordingly.
Unfortunately it's not easy to probe for available instructions on
MIPS, the information is partially available in /proc/cpuinfo, and
not available in AUXV. This patch therefore probes for the instructions
by trying to execute them and by catching a possible SIGILL signal.
Signed-off-by: Aurelien Jarno
---
tcg/mips/tcg-target.c | 211 -
tcg/mips/tcg-target.h | 50 +++-
2 files changed, 169 insertions(+), 92 deletions(-)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 793532e..4e6b712 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -422,83 +422,83 @@ static inline void tcg_out_movi(TCGContext *s, TCGType
type,
static inline void tcg_out_bswap16(TCGContext *s, TCGReg ret, TCGReg arg)
{
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
-#else
-/* ret and arg can't be register at */
-if (ret == TCG_REG_AT || arg == TCG_REG_AT) {
-tcg_abort();
-}
+if (use_mips32r2_instructions) {
+tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
+} else {
+/* ret and arg can't be register at */
+if (ret == TCG_REG_AT || arg == TCG_REG_AT) {
+tcg_abort();
+}
-tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 8);
-tcg_out_opc_sa(s, OPC_SLL, ret, arg, 8);
-tcg_out_opc_imm(s, OPC_ANDI, ret, ret, 0xff00);
-tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
-#endif
+tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 8);
+tcg_out_opc_sa(s, OPC_SLL, ret, arg, 8);
+tcg_out_opc_imm(s, OPC_ANDI, ret, ret, 0xff00);
+tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
+}
}
static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg)
{
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
-tcg_out_opc_reg(s, OPC_SEH, ret, 0, ret);
-#else
-/* ret and arg can't be register at */
-if (ret == TCG_REG_AT || arg == TCG_REG_AT) {
-tcg_abort();
-}
+if (use_mips32r2_instructions) {
+tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
+tcg_out_opc_reg(s, OPC_SEH, ret, 0, ret);
+} else {
+/* ret and arg can't be register at */
+if (ret == TCG_REG_AT || arg == TCG_REG_AT) {
+tcg_abort();
+}
-tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 8);
-tcg_out_opc_sa(s, OPC_SLL, ret, arg, 24);
-tcg_out_opc_sa(s, OPC_SRA, ret, ret, 16);
-tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
-#endif
+tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 8);
+tcg_out_opc_sa(s, OPC_SLL, ret, arg, 24);
+tcg_out_opc_sa(s, OPC_SRA, ret, ret, 16);
+tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
+}
}
static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
{
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
-tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16);
-#else
-/* ret and arg must be different and can't be register at */
-if (ret == arg || ret == TCG_REG_AT || arg == TCG_REG_AT) {
-tcg_abort();
-}
+if (use_mips32r2_instructions) {
+tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
+tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16);
+} else {
+/* ret and arg must be different and can't be register at */
+if (ret == arg || ret == TCG_REG_AT || arg == TCG_REG_AT) {
+tcg_abort();
+}
-tcg_out_opc_sa(s, OPC_SLL, ret, arg, 24);
+tcg_out_opc_sa(s, OPC_SLL, ret, arg, 24);
-tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 24);
-tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
+tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 24);
+tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
-tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_AT, arg, 0xff00);
-tcg_out_opc_sa(s, OPC_SLL, TCG_REG_AT, TCG_REG_AT, 8);
-tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
+tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_AT, arg, 0xff00);
+tcg_out_opc_sa(s, OPC_SLL, TCG_REG_AT, TCG_REG_AT, 8);
+tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
-tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 8);
-tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_AT, TCG_REG_AT, 0xff00);
-tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
-#endif
+tcg_out_opc_sa(s, OPC_SRL, TCG_REG_AT, arg, 8);
+tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_AT, TCG_REG_AT, 0xff00);
+tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_REG_AT);
+}
}
static inline void tcg_out_ext8s(TCGContext *s, TCGReg ret, TCGReg arg)
{
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-tcg_out_opc_reg(s, OPC_SEB, ret, 0, arg);
-#else
-tcg_out_op
[Qemu-devel] [PATCH 2/2] tcg/mips: only enable ext8s/ext16s ops on MIPS32R2
On MIPS ext8s and ext16s ops are implemented with a dedicated instruction only on MIPS32R2, otherwise the same kind of implementation than at TCG level (shift left followed by shift right) is used. Change that by only implementing the ext8s and ext16s ops on MIPS32R2 so that optimizations can be done by the optimizer. Keep the shift implementation as it is also used internally by the ld/st routines. Signed-off-by: Aurelien Jarno --- tcg/mips/tcg-target.h |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 43072e3..76ee831 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -105,8 +105,6 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_rem_i32 1 #define TCG_TARGET_HAS_not_i32 1 #define TCG_TARGET_HAS_nor_i32 1 -#define TCG_TARGET_HAS_ext8s_i321 -#define TCG_TARGET_HAS_ext16s_i32 1 #define TCG_TARGET_HAS_andc_i32 0 #define TCG_TARGET_HAS_orc_i32 0 #define TCG_TARGET_HAS_eqv_i32 0 @@ -118,6 +116,8 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_bswap16_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_bswap32_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_deposit_i32 use_mips32r2_instructions +#define TCG_TARGET_HAS_ext8s_i32use_mips32r2_instructions +#define TCG_TARGET_HAS_ext16s_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_rot_i32 use_mips32r2_instructions /* optional instructions automatically implemented */ -- 1.7.10.4
Re: [Qemu-devel] [PATCH for-next 6/8] tcg-i386: Use new return-argument ld/st helpers
On Mon, Aug 05, 2013 at 08:07:23AM -1000, Richard Henderson wrote:
> Discontinue the jump-around-jump-to-jump scheme, trading it for a single
> immediate move instruction. The two extra jumps always consume 7 bytes,
> whereas the immediate move is either 5 or 7 bytes depending on where the
> code_gen_buffer gets located.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/exec-all.h | 13 +--
> tcg/i386/tcg-target.c | 100
> +---
> 2 files changed, 46 insertions(+), 67 deletions(-)
>
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 5920f73..b70028a 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -326,18 +326,9 @@ extern uintptr_t tci_tb_ptr;
> (6) jump to corresponding code of the next of fast path
> */
> # if defined(__i386__) || defined(__x86_64__)
> -/* To avoid broken disassembling, long jmp is used for embedding fast path
> pc,
> - so that the destination is the next code of fast path, though this jmp is
> - never executed.
> -
> - call MMU helper
> - jmp POST_PROC (2byte)<- GETRA()
> - jmp NEXT_CODE (5byte)
> - POST_PROCESS ... <- GETRA() + 7
> - */
> # define GETRA() ((uintptr_t)__builtin_return_address(0))
> -# define GETPC_LDST() ((uintptr_t)(GETRA() + 7 + \
> -*(int32_t *)((void *)GETRA() + 3) - 1))
> +/* The return address argument for ldst is passed directly. */
> +# define GETPC_LDST() (abort(), 0)
Why an abort here, while in the arm version, you adds support for
not defining GETPC_LDST?
> # elif defined (_ARCH_PPC) && !defined (_ARCH_PPC64)
> # define GETRA() ((uintptr_t)__builtin_return_address(0))
> # define GETPC_LDST() ((uintptr_t) ((*(int32_t *)(GETRA() - 4)) - 1))
> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
> index 8addfa1..c7a02a3 100644
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -190,11 +190,11 @@ static int target_parse_constraint(TCGArgConstraint
> *ct, const char **pct_str)
> /* qemu_ld/st address constraint */
> case 'L':
> ct->ct |= TCG_CT_REG;
> -#if TCG_TARGET_REG_BITS == 64
> +if (TCG_TARGET_REG_BITS == 64) {
> tcg_regset_set32(ct->u.regs, 0, 0x);
> -#else
> +} else {
> tcg_regset_set32(ct->u.regs, 0, 0xff);
> -#endif
> +}
> tcg_regset_reset_reg(ct->u.regs, TCG_REG_L0);
> tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1);
> break;
> @@ -1015,22 +1015,24 @@ static void tcg_out_jmp(TCGContext *s,
> tcg_target_long dest)
>
> #include "exec/softmmu_defs.h"
>
> -/* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr,
> - int mmu_idx) */
> -static const void *qemu_ld_helpers[4] = {
> -helper_ldb_mmu,
> -helper_ldw_mmu,
> -helper_ldl_mmu,
> -helper_ldq_mmu,
> +/* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
> + * int mmu_idx, uintptr_t ra)
> + */
> +static const void * const qemu_ld_helpers[4] = {
> +helper_ret_ldb_mmu,
> +helper_ret_ldw_mmu,
> +helper_ret_ldl_mmu,
> +helper_ret_ldq_mmu,
> };
>
> -/* helper signature: helper_st_mmu(CPUState *env, target_ulong addr,
> - uintxx_t val, int mmu_idx) */
> -static const void *qemu_st_helpers[4] = {
> -helper_stb_mmu,
> -helper_stw_mmu,
> -helper_stl_mmu,
> -helper_stq_mmu,
> +/* helper signature: helper_ret_st_mmu(CPUState *env, target_ulong addr,
> + * uintxx_t val, int mmu_idx, uintptr_t
> ra)
> + */
> +static const void * const qemu_st_helpers[4] = {
> +helper_ret_stb_mmu,
> +helper_ret_stw_mmu,
> +helper_ret_stl_mmu,
> +helper_ret_stq_mmu,
> };
>
> static void add_qemu_ldst_label(TCGContext *s,
> @@ -1458,6 +1460,12 @@ static void add_qemu_ldst_label(TCGContext *s,
> }
> }
>
> +/* See the GETPC definition in include/exec/exec-all.h. */
> +static inline uintptr_t do_getpc(uint8_t *raddr)
> +{
> +return (uintptr_t)raddr - 1;
> +}
> +
> /*
> * Generate code for the slow path for a load at the end of block
> */
> @@ -1490,33 +1498,21 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s,
> TCGLabelQemuLdst *l)
>
> tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, l->mem_index);
> tcg_out_st(s, TCG_TYPE_I32, TCG_REG_EAX, TCG_REG_ESP, ofs);
> +ofs += 4;
> +
> +tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_EAX, do_getpc(l->raddr));
> +tcg_out_st(s, TCG_TYPE_I32, TCG_REG_EAX, TCG_REG_ESP, ofs);
Same as the other patch, this can be done in one instruction.
> } else {
> -tcg_out_mov(s, TCG_TYPE_I64, tcg_target_call_iarg_regs[0],
> TCG_AREG0);
> +tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0],
> TCG_AREG0);
> /* The second argument is already loaded with addrlo. */
> tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2],
>
Re: [Qemu-devel] [PATCH for-next 4/8] tcg: Add mmu helpers that take a return address argument
On Mon, Aug 05, 2013 at 08:07:21AM -1000, Richard Henderson wrote:
> Allow the code that tcg generates to be less obtuse, passing in
> the return address directly instead of computing it in the helper.
>
> Maintain the old entrance point unchanged as an alternate entry point.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/softmmu_defs.h | 46
> ++---
> include/exec/softmmu_template.h | 42 +++--
> 2 files changed, 55 insertions(+), 33 deletions(-)
>
> diff --git a/include/exec/softmmu_defs.h b/include/exec/softmmu_defs.h
> index 1f25e33..e55e717 100644
> --- a/include/exec/softmmu_defs.h
> +++ b/include/exec/softmmu_defs.h
> @@ -9,29 +9,41 @@
> #ifndef SOFTMMU_DEFS_H
> #define SOFTMMU_DEFS_H
>
> +uint8_t helper_ret_ldb_mmu(CPUArchState *env, target_ulong addr,
> + int mmu_idx, uintptr_t retaddr);
> +uint16_t helper_ret_ldw_mmu(CPUArchState *env, target_ulong addr,
> +int mmu_idx, uintptr_t retaddr);
> +uint32_t helper_ret_ldl_mmu(CPUArchState *env, target_ulong addr,
> +int mmu_idx, uintptr_t retaddr);
> +uint64_t helper_ret_ldq_mmu(CPUArchState *env, target_ulong addr,
> +int mmu_idx, uintptr_t retaddr);
> +
> +void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
> +int mmu_idx, uintptr_t retaddr);
> +void helper_ret_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
> +int mmu_idx, uintptr_t retaddr);
> +void helper_ret_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
> +int mmu_idx, uintptr_t retaddr);
> +void helper_ret_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
> +int mmu_idx, uintptr_t retaddr);
> +
> uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
> -int mmu_idx);
> uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
> -int mmu_idx);
> uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
> -int mmu_idx);
> uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
> -int mmu_idx);
> +
> +void helper_stb_mmu(CPUArchState *env, target_ulong addr,
> +uint8_t val, int mmu_idx);
> +void helper_stw_mmu(CPUArchState *env, target_ulong addr,
> +uint16_t val, int mmu_idx);
> +void helper_stl_mmu(CPUArchState *env, target_ulong addr,
> +uint32_t val, int mmu_idx);
> +void helper_stq_mmu(CPUArchState *env, target_ulong addr,
> +uint64_t val, int mmu_idx);
>
> uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stb_cmmu(CPUArchState *env, target_ulong addr, uint8_t val,
> -int mmu_idx);
> uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stw_cmmu(CPUArchState *env, target_ulong addr, uint16_t val,
> - int mmu_idx);
> uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stl_cmmu(CPUArchState *env, target_ulong addr, uint32_t val,
> - int mmu_idx);
> uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
> -void helper_stq_cmmu(CPUArchState *env, target_ulong addr, uint64_t val,
> - int mmu_idx);
> -#endif
> +
> +#endif /* SOFTMMU_DEFS_H */
Why removing this st*_cmmu versions? There might be a good reason, but
it should be indicated in the patch description.
> diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
> index 8584902..7d8bcb5 100644
> --- a/include/exec/softmmu_template.h
> +++ b/include/exec/softmmu_template.h
> @@ -78,15 +78,18 @@ static inline DATA_TYPE glue(io_read,
> SUFFIX)(CPUArchState *env,
> }
>
> /* handle all cases except unaligned access which span two pages */
> +#ifdef SOFTMMU_CODE_ACCESS
> +static
> +#endif
> DATA_TYPE
> -glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong
> addr,
> - int mmu_idx)
> +glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
> + target_ulong addr, int mmu_idx,
> + uintptr_t retaddr)
> {
> DATA_TYPE res;
> int index;
> target_ulong tlb_addr;
> hwaddr ioaddr;
> -uintptr_t retaddr;
>
> /* test if there is match for unaligned or IO access */
>
Re: [Qemu-devel] [PATCH for-next 3/8] tcg-i386: Tidy qemu_ld/st slow path
On Mon, Aug 05, 2013 at 08:07:20AM -1000, Richard Henderson wrote:
> Use existing stack space for arguments; don't push/pop.
> Use less ifdefs and more C ifs.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/i386/tcg-target.c | 159
> +-
> 1 file changed, 68 insertions(+), 91 deletions(-)
>
> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
> index 456bd9e..8addfa1 100644
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -1461,22 +1461,12 @@ static void add_qemu_ldst_label(TCGContext *s,
> /*
> * Generate code for the slow path for a load at the end of block
> */
> -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *label)
> +static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
> {
> -int s_bits;
> -int opc = label->opc;
> -int mem_index = label->mem_index;
> -#if TCG_TARGET_REG_BITS == 32
> -int stack_adjust;
> -int addrlo_reg = label->addrlo_reg;
> -int addrhi_reg = label->addrhi_reg;
> -#endif
> -int data_reg = label->datalo_reg;
> -int data_reg2 = label->datahi_reg;
> -uint8_t *raddr = label->raddr;
> -uint8_t **label_ptr = &label->label_ptr[0];
> -
> -s_bits = opc & 3;
> +int opc = l->opc;
> +int s_bits = opc & 3;
> +TCGReg data_reg;
> +uint8_t **label_ptr = &l->label_ptr[0];
>
> /* resolve label address */
> *(uint32_t *)label_ptr[0] = (uint32_t)(s->code_ptr - label_ptr[0] - 4);
> @@ -1484,22 +1474,28 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s,
> TCGLabelQemuLdst *label)
> *(uint32_t *)label_ptr[1] = (uint32_t)(s->code_ptr - label_ptr[1] -
> 4);
> }
>
> -#if TCG_TARGET_REG_BITS == 32
> -tcg_out_pushi(s, mem_index);
> -stack_adjust = 4;
> -if (TARGET_LONG_BITS == 64) {
> -tcg_out_push(s, addrhi_reg);
> -stack_adjust += 4;
> +if (TCG_TARGET_REG_BITS == 32) {
> +int ofs = 0;
> +
> +tcg_out_st(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP, ofs);
> +ofs += 4;
> +
> +tcg_out_st(s, TCG_TYPE_I32, l->addrlo_reg, TCG_REG_ESP, ofs);
> +ofs += 4;
> +
> +if (TARGET_LONG_BITS == 64) {
> +tcg_out_st(s, TCG_TYPE_I32, l->addrhi_reg, TCG_REG_ESP, ofs);
> +ofs += 4;
> +}
> +
> +tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, l->mem_index);
> +tcg_out_st(s, TCG_TYPE_I32, TCG_REG_EAX, TCG_REG_ESP, ofs);
The same way the previous code was able to push an immediate, it should
be possible to directly store an immediate value here:
tcg_out_modrm_offset(s, OPC_MOVL_EvIz, 0, TCG_REG_ESP, ofs);
tcg_out32(s, l->mem_index);
> +} else {
> +tcg_out_mov(s, TCG_TYPE_I64, tcg_target_call_iarg_regs[0],
> TCG_AREG0);
> +/* The second argument is already loaded with addrlo. */
> +tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2],
> + l->mem_index);
> }
> -tcg_out_push(s, addrlo_reg);
> -stack_adjust += 4;
> -tcg_out_push(s, TCG_AREG0);
> -stack_adjust += 4;
> -#else
> -tcg_out_mov(s, TCG_TYPE_I64, tcg_target_call_iarg_regs[0], TCG_AREG0);
> -/* The second argument is already loaded with addrlo. */
> -tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2], mem_index);
> -#endif
>
> /* Code generation of qemu_ld/st's slow path calling MMU helper
>
> @@ -1518,18 +1514,10 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s,
> TCGLabelQemuLdst *label)
> tcg_out8(s, 5);
> /* Dummy backward jump having information of fast path'pc for MMU
> helpers */
> tcg_out8(s, OPC_JMP_long);
> -*(int32_t *)s->code_ptr = (int32_t)(raddr - s->code_ptr - 4);
> +*(int32_t *)s->code_ptr = (int32_t)(l->raddr - s->code_ptr - 4);
> s->code_ptr += 4;
>
> -#if TCG_TARGET_REG_BITS == 32
> -if (stack_adjust == (TCG_TARGET_REG_BITS / 8)) {
> -/* Pop and discard. This is 2 bytes smaller than the add. */
> -tcg_out_pop(s, TCG_REG_ECX);
> -} else if (stack_adjust != 0) {
> -tcg_out_addi(s, TCG_REG_CALL_STACK, stack_adjust);
> -}
> -#endif
> -
> +data_reg = l->datalo_reg;
> switch(opc) {
> case 0 | 4:
> tcg_out_ext8s(s, data_reg, TCG_REG_EAX, P_REXW);
> @@ -1557,10 +1545,10 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s,
> TCGLabelQemuLdst *label)
> } else if (data_reg == TCG_REG_EDX) {
> /* xchg %edx, %eax */
> tcg_out_opc(s, OPC_XCHG_ax_r32 + TCG_REG_EDX, 0, 0, 0);
> -tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_EAX);
> +tcg_out_mov(s, TCG_TYPE_I32, l->datahi_reg, TCG_REG_EAX);
> } else {
> tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_EAX);
> -tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_EDX);
> +tcg_out_mov(s, TCG_TYPE_I32, l->datahi_reg, TCG_REG_EDX);
> }
> break;
>
Re: [Qemu-devel] [PATCH for-next 5/8] tcg: Tidy softmmu_template.h
On Mon, Aug 05, 2013 at 08:07:22AM -1000, Richard Henderson wrote:
> Avoid a loop in the tlb_fill path; the fill will either succeed or
> generate an exception.
>
> Inline the slow_ld/st function; it was a complete copy of the main
> helper except for the actual cross-page unaligned code, and the
> compiler was inlining it anyway.
>
> Add unlikely markers optimizing for the most common case of simple
> tlb miss.
>
> Make sure the compiler can optimize away the unaligned paths for a
> 1 byte access.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/softmmu_template.h | 287
> +++-
> 1 file changed, 104 insertions(+), 183 deletions(-)
>
> diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
> index 7d8bcb5..03e5155 100644
> --- a/include/exec/softmmu_template.h
> +++ b/include/exec/softmmu_template.h
> @@ -54,10 +54,6 @@
> #define ADDR_READ addr_read
> #endif
>
> -static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
> -target_ulong addr,
> -int mmu_idx,
> -uintptr_t retaddr);
> static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
>hwaddr physaddr,
>target_ulong addr,
> @@ -86,52 +82,67 @@ glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(CPUArchState
> *env,
> target_ulong addr, int mmu_idx,
> uintptr_t retaddr)
> {
> -DATA_TYPE res;
> -int index;
> -target_ulong tlb_addr;
> -hwaddr ioaddr;
> +int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
> +target_ulong tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;
> +uintptr_t haddr;
>
> -/* test if there is match for unaligned or IO access */
> -/* XXX: could done more in memory macro in a non portable way */
> -index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
> - redo:
> -tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;
> -if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK |
> TLB_INVALID_MASK))) {
> -if (tlb_addr & ~TARGET_PAGE_MASK) {
> -/* IO access */
> -if ((addr & (DATA_SIZE - 1)) != 0)
> -goto do_unaligned_access;
> -ioaddr = env->iotlb[mmu_idx][index];
> -res = glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr);
> -} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >=
> TARGET_PAGE_SIZE) {
> -/* slow unaligned access (it spans two pages or IO) */
> -do_unaligned_access:
> +/* If the TLB entry is for a different page, reload and try again. */
> +if ((addr & TARGET_PAGE_MASK)
Checkpatch complains about a whitespace at the end.
> + != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
> #ifdef ALIGNED_ONLY
> +if ((addr & (DATA_SIZE - 1)) != 0) {
> do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx,
> retaddr);
> +}
> #endif
> -res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(env, addr,
> - mmu_idx, retaddr);
> -} else {
> -/* unaligned/aligned access in the same page */
> -uintptr_t addend;
> -#ifdef ALIGNED_ONLY
> -if ((addr & (DATA_SIZE - 1)) != 0) {
> -do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx,
> retaddr);
> -}
> -#endif
> -addend = env->tlb_table[mmu_idx][index].addend;
> -res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(intptr_t)
> -(addr + addend));
> +tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
> +tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;
> +}
> +
> +/* Handle an IO access. */
> +if (unlikely(tlb_addr & ~TARGET_PAGE_MASK)) {
> +hwaddr ioaddr;
> +if ((addr & (DATA_SIZE - 1)) != 0) {
> +goto do_unaligned_access;
> }
> -} else {
> +ioaddr = env->iotlb[mmu_idx][index];
> +return glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr);
> +}
> +
> +/* Handle slow unaligned access (it spans two pages or IO). */
> +if (DATA_SIZE > 1
> +&& unlikely((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1
> +>= TARGET_PAGE_SIZE)) {
> +target_ulong addr1, addr2;
> +DATA_TYPE res1, res2, res;
> +unsigned shift;
> +do_unaligned_access:
> #ifdef ALIGNED_ONLY
> -if ((addr & (DATA_SIZE - 1)) != 0)
> -do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx,
> retaddr);
> +do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
> #endif
> -
Re: [Qemu-devel] [PATCH for-next 2/8] tcg-i386: Try pc-relative lea for constant formation
On Mon, Aug 05, 2013 at 08:07:19AM -1000, Richard Henderson wrote:
> Use a 7 byte lea before the ultimate 10 byte movq.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/i386/tcg-target.c | 19 ---
> 1 file changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
> index 841bd75..456bd9e 100644
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -541,19 +541,32 @@ static inline void tcg_out_mov(TCGContext *s, TCGType
> type,
> static void tcg_out_movi(TCGContext *s, TCGType type,
> TCGReg ret, tcg_target_long arg)
> {
> +tcg_target_long diff;
> +
> if (arg == 0) {
> tgen_arithr(s, ARITH_XOR, ret, ret);
> return;
> } else if (arg == (uint32_t)arg || type == TCG_TYPE_I32) {
> tcg_out_opc(s, OPC_MOVL_Iv + LOWREGMASK(ret), 0, ret, 0);
> tcg_out32(s, arg);
> +return;
> } else if (arg == (int32_t)arg) {
> tcg_out_modrm(s, OPC_MOVL_EvIz + P_REXW, 0, ret);
> tcg_out32(s, arg);
> -} else {
> -tcg_out_opc(s, OPC_MOVL_Iv + P_REXW + LOWREGMASK(ret), 0, ret, 0);
> -tcg_out64(s, arg);
> +return;
> }
Now that all the else parts end up with a return, it would improve
readability to remove them and keep only the ifs.
> +
> +/* Try a 7 byte pc-relative lea before the 10 byte movq. */
> +diff = arg - ((tcg_target_long)s->code_ptr + 7);
> +if (diff == (int32_t)diff) {
> +tcg_out_opc(s, OPC_LEA | P_REXW, ret, 0, 0);
> +tcg_out8(s, (LOWREGMASK(ret) << 3) | 5);
> +tcg_out32(s, diff);
> +return;
> +}
> +
> +tcg_out_opc(s, OPC_MOVL_Iv + P_REXW + LOWREGMASK(ret), 0, ret, 0);
> +tcg_out64(s, arg);
> }
>
> static inline void tcg_out_pushi(TCGContext *s, tcg_target_long val)
Otherwise it looks good.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] [PATCH for-next 1/8] tcg-i386: Add and use tcg_out64
On Mon, Aug 05, 2013 at 08:07:18AM -1000, Richard Henderson wrote:
> No point in splitting the write into 32-bit pieces.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/i386/tcg-target.c | 3 +--
> tcg/tcg.c | 6 ++
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
> index 87eeab3..841bd75 100644
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -552,8 +552,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
> tcg_out32(s, arg);
> } else {
> tcg_out_opc(s, OPC_MOVL_Iv + P_REXW + LOWREGMASK(ret), 0, ret, 0);
> -tcg_out32(s, arg);
> -tcg_out32(s, arg >> 31 >> 1);
> +tcg_out64(s, arg);
> }
> }
>
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index dac8224..9355b57 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -131,6 +131,12 @@ static inline void tcg_out32(TCGContext *s, uint32_t v)
> s->code_ptr += 4;
> }
>
> +static inline void tcg_out64(TCGContext *s, uint64_t v)
> +{
> +*(uint64_t *)s->code_ptr = v;
> +s->code_ptr += 8;
> +}
> +
> /* label relocation processing */
>
> static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
Reviewed-by: Aurelien Jarno
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On 15.08.2013, at 17:43, Andreas Färber wrote: > Am 15.08.2013 17:29, schrieb Alexander Graf: >> >> On 15.08.2013, at 16:47, Andreas Färber wrote: >> >>> There is nothing wrong with finding a mask or wildcard solution to that >>> problem, I already indicated so on the original POWER+ patch. The point >>> of the whole discussion is how to get there in the least invasive way. >>> Not whether, just how. >>> >>> I think - unlike Alex apparently - that the least invasive way is to >>> leave models as they are and to add masking support to families and KVM >>> code only. >> >> Not sure I understand. What is KVM specific about this? > > -cpu host is, it's in kvm.c. > > These patches are changing sort comparison code in translate_ppc.c > though, which is used in multiple places. > >> >>> I'm already trying to get away from extending the >>> POWERPC_DEF* macros for Prerna's fw_name, which are starting to get a >>> big conflict point these days and a future pain if everyone extends them >>> for the feature of the day. Note that I started with reading v3, not >>> everything from the start, and am therefore not pointing fingers at >>> anyone. It may be that you were given some unfortunate suggestions and >>> too quick in implementing them. >>> >>> When we instantiate a -cpu POWER9 then having one POWER9_vX.Y around to >>> back it doesn't really hurt. Unlike ARM's MIDR there doesn't seem to be >>> an encoding of IBM vendor or POWER family in the PVR. The macros and >>> their new implementation are not the way they are because I consider >>> them the nicest thing in the world but because the name+pvr+svr+family >>> combination made them work for the whole zoo of models we carry around >>> and started to give us some inheritance through QOM. Making the POWER7 >>> family non-abstract would require the same kind of macro "overloading" >>> for POWERPC_FAMILY that I'm trying to contain for POWERPC_DEF ATM. So >>> what I am still thinking about is how to handle there being multiple >>> matches for a PVR - I am considering putting them into a list and >>> comparing values for closest match. So that if you have a v2.4 and QEMU >>> knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR. >> >> I think this goes into the wrong direction. We should have one single >> unified scheme to model core versions and -cpu host should be able to >> override them for a family, no? I don't see how instantiating a POWER7_v20 >> object on a POWER7_v23 system is any improvement over instantiating a POWER7 >> object. > > There is no one unified scheme, as we have discussed in your absence. > > My point is, a) -cpu POWER7 should result in valid values Yes :) > and b) you > asked to have a unified macro scheme that works for all CPUs, you got > it, now instead you are asking for something that is nice to POWERx, and > we cannot make POWERx family different from the rest wrt macros unless > we break the scheme, which you specifically wanted to have, to avoid > boilerplate QOM code you said. Now you want the full customization > goodness that you were against just before! :) Ah, nonono, I don't want POWER to be any different. I want things unified and consistent. Any time I mention "POWER7" I also mean "e500" or "440" or any other family class we have out there. What I was proposing was to make _all_ families non-abstract and have _all_ families support major/minor parameters. > Andreas > > P.S. Please configure your mail client to break lines. Replying is > really hard this way... Phew - no idea how :). Alex
Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support
Am 15.08.2013 17:30, schrieb Alexander Graf: > > On 15.08.2013, at 17:11, Andreas Färber wrote: > >> Am 15.08.2013 15:12, schrieb Anthony Liguori: >>> Everyone is talking past each other and no one is addressing the real >>> problem. There are two distinct issues here: >>> >>> 1) We have two ABIs that cannot be changed unless there's a very good >>> reason to. Alexey's original patch breaks both. The guest ABI >>> cannot change given a fixed command line. >>> >>> IOW, the exposed PVR value for -cpu POWER7 cannot change across >>> versions of QEMU or when running on different hardware. This breaks >>> live migration and save/resume. >>> >>> We also cannot break the command line interface. If the last version >>> of QEMU supported -cpu POWER7_v2.1, then we must continue to support >>> that. >> >> 1a) How should -cpu 0xDEADBEEF or -cpu DEADBEEF behave. >> >>I expect it to error out as before >>rather than applying the same fuzz/mask that -cpu host might. > > I actually think it'd make sense to apply the same fuzz/mask, don't you think? I think "-cpu host" has the semantics of give-me-what-the-host-has. But -cpu 0xDEADBEEF is asking for PVR DEADBEEF and having it silently return a guest-visible DEADBEBE is going to be undesired. We could of course report our closest match on stderr for the user to decide. Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
Am 15.08.2013 17:29, schrieb Alexander Graf: > > On 15.08.2013, at 16:47, Andreas Färber wrote: > >> There is nothing wrong with finding a mask or wildcard solution to that >> problem, I already indicated so on the original POWER+ patch. The point >> of the whole discussion is how to get there in the least invasive way. >> Not whether, just how. >> >> I think - unlike Alex apparently - that the least invasive way is to >> leave models as they are and to add masking support to families and KVM >> code only. > > Not sure I understand. What is KVM specific about this? -cpu host is, it's in kvm.c. These patches are changing sort comparison code in translate_ppc.c though, which is used in multiple places. > >> I'm already trying to get away from extending the >> POWERPC_DEF* macros for Prerna's fw_name, which are starting to get a >> big conflict point these days and a future pain if everyone extends them >> for the feature of the day. Note that I started with reading v3, not >> everything from the start, and am therefore not pointing fingers at >> anyone. It may be that you were given some unfortunate suggestions and >> too quick in implementing them. >> >> When we instantiate a -cpu POWER9 then having one POWER9_vX.Y around to >> back it doesn't really hurt. Unlike ARM's MIDR there doesn't seem to be >> an encoding of IBM vendor or POWER family in the PVR. The macros and >> their new implementation are not the way they are because I consider >> them the nicest thing in the world but because the name+pvr+svr+family >> combination made them work for the whole zoo of models we carry around >> and started to give us some inheritance through QOM. Making the POWER7 >> family non-abstract would require the same kind of macro "overloading" >> for POWERPC_FAMILY that I'm trying to contain for POWERPC_DEF ATM. So >> what I am still thinking about is how to handle there being multiple >> matches for a PVR - I am considering putting them into a list and >> comparing values for closest match. So that if you have a v2.4 and QEMU >> knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR. > > I think this goes into the wrong direction. We should have one single unified > scheme to model core versions and -cpu host should be able to override them > for a family, no? I don't see how instantiating a POWER7_v20 object on a > POWER7_v23 system is any improvement over instantiating a POWER7 object. There is no one unified scheme, as we have discussed in your absence. My point is, a) -cpu POWER7 should result in valid values and b) you asked to have a unified macro scheme that works for all CPUs, you got it, now instead you are asking for something that is nice to POWERx, and we cannot make POWERx family different from the rest wrt macros unless we break the scheme, which you specifically wanted to have, to avoid boilerplate QOM code you said. Now you want the full customization goodness that you were against just before! :) Andreas P.S. Please configure your mail client to break lines. Replying is really hard this way... -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On 15.08.2013, at 16:47, Andreas Färber wrote: > Am 15.08.2013 15:55, schrieb Alexey Kardashevskiy: >> On 08/15/2013 09:48 PM, Andreas Färber wrote: >>> Am 15.08.2013 13:03, schrieb Alexander Graf: On 15.08.2013, at 12:52, Andreas Färber wrote: > Am 15.08.2013 10:45, schrieb Alexander Graf: >> >> Yes, I think it makes sense to keep the full PVR around when we want to >> be specific. What I'm referring to is class specific logic that can >> assemble major/minor numbers from the command line. So >> >> -cpu POWER7,major=2,minor=0 >> >> would result in a PVR value that is identical to POWER7_v2.0. The >> assembly of this PVR value is class specific, because different classes >> of CPUs have different semantics for their major and minor numbers. >> >> That way in the future we won't have to add any new version specific CPU >> types but instead the user can assemble those himself, making everyone's >> life a lot easier. >> >> My point was that if we have that logic, we could at the same place just >> say "if my major/minor is 0, default to something reasonable". >> >> But let's ask Andreas whether he has a better idea here :). > > If you read the previous discussion on the initial POWER7+ patch, I > believe I had proposed major-version / minor-version or so properties at > family level, to be able to use different implementations or none at all > where we don't see a scheme. Sounds like a good idea. > However if we want to use that from -cpu as > in your example above, we would have to implement custom parsing code > for cpu_model, which I would rather avoid, given we want to replace it > with -device in the future. Can't we make this generic QOM property parsing code? -cpu POWER7,major-version=2,minor-version=0 would do cpu = new POWER7(major-version = 2, minor_version = 0); and then the POWER7 class can decide what to do with this additional information? >>> >>> That is "custom parsing code for cpu_model" in target-ppc then. x86 has >>> its own implementation and so does sparc, both not fully QOM'ified yet, >>> so there is no one-size-fits-all. >>> > But maybe I didn't fully catch the exact question. :) > > The custom parenting strikes me as a wrong consequence of us not having > fully QOM'ified / cleaned up the family classes yet. We had discussed > two ways: Either have, e.g., POWER7+ inherit from POWER7 (which looks > like the only reason this is being done here) and/or have, e.g., POWER5+ > copy and modify 970fx values via #defines. IIUC the family parenting is orthogonal to this. Here we're looking at having families as classes at all. Currently we don't - we only have explicit versioned implementations as classes. >>> >>> That's simply not true!!! All is hidden by macros as requested by you - >>> sounds as if that was a bad idea after all. :/ >>> >>> We do have the following: >>> >>> "object" >>> +- "device" >>> +- "cpu" >>> +- "powerpc64-cpu" >>> +- "POWER7-family-powerpc64-cpu" -> POWERPC_FAMILY() >>>+- "POWER7_v2.0-powerpc64-cpu" -> POWERPC_DEF_SVR() >>> +- "host-powerpc64-cpu" (depending on host PVR) >>> >>> That's why I was saying: If we need POWER7+-specific family code, we >>> need to have a POWER7P family and not reuse POWER7 as conveniently done >>> today. All is there to implement properties or whatever at that level. >>> >>> And that's also why trying to do the parent tweaking in >>> POWERPC_DEF_FAMILY_MEMBER() is bogus. The existing infrastructure just >>> needs to be used the right way, sigh. >>> >>> And to clean up the aliases business, we should simply move them into >>> the POWER7_v2.0-powerpc64-cpu level class as an array, I think. That >>> would greatly simplify -cpu ?, and the alias-to-type lookup would get >>> faster at the same time since we wouldn't be looking at unavailable >>> models anymore. >>> Whether we have PowerPC `- POWER7 `- POWER7+ `- POWER7+ v1.0 or PowerPC `- POWER7+ `- POWER7+ v1.0 is a different question I think. >>> >>> My question is: Why are you guys trying to create yet another type for >>> "POWER7" when we already have one. The only plausible-to-me explanation >>> was that avoidance of separate POWER7P family was the core cause, but >>> apparently the core problem is that no one except me is actually >>> grasping the macro'fied code or at least you lost the overview during >>> your vacation... :( >> >> >> I am not trying to add any additional POWER7. We do not have POWER7 in QEMU >> at all, just some approaching/approximation (whatever word suits, sorry for >> my weak, terrible english). POWER7 (forget about POWER7+ and others) with >> PVR=0x003FAABB
Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support
On 15.08.2013, at 17:11, Andreas Färber wrote: > Am 15.08.2013 15:12, schrieb Anthony Liguori: >> Everyone is talking past each other and no one is addressing the real >> problem. There are two distinct issues here: >> >> 1) We have two ABIs that cannot be changed unless there's a very good >> reason to. Alexey's original patch breaks both. The guest ABI >> cannot change given a fixed command line. >> >> IOW, the exposed PVR value for -cpu POWER7 cannot change across >> versions of QEMU or when running on different hardware. This breaks >> live migration and save/resume. >> >> We also cannot break the command line interface. If the last version >> of QEMU supported -cpu POWER7_v2.1, then we must continue to support >> that. > > 1a) How should -cpu 0xDEADBEEF or -cpu DEADBEEF behave. > >I expect it to error out as before >rather than applying the same fuzz/mask that -cpu host might. I actually think it'd make sense to apply the same fuzz/mask, don't you think? Alex
[Qemu-devel] [PATCH 2/2] enable TLS in build and activate test-tls in make check
From: Paolo Bonzini
Reviewed-by: Mike Day
---
configure | 63 ++
include/qemu/tls.h | 127 +
include/qom/cpu.h | 2 +-
tests/Makefile | 2 +-
tests/test-tls.c | 87
5 files changed, 252 insertions(+), 29 deletions(-)
create mode 100644 tests/test-tls.c
diff --git a/configure b/configure
index 18fa608..baf61c8 100755
--- a/configure
+++ b/configure
@@ -285,6 +285,7 @@ fi
ar="${AR-${cross_prefix}ar}"
as="${AS-${cross_prefix}as}"
cpp="${CPP-$cc -E}"
+nm="${NM-${cross_prefix}nm}"
objcopy="${OBJCOPY-${cross_prefix}objcopy}"
ld="${LD-${cross_prefix}ld}"
libtool="${LIBTOOL-${cross_prefix}libtool}"
@@ -1241,6 +1242,29 @@ if compile_prog "-Werror -fno-gcse" "" ; then
TRANSLATE_OPT_CFLAGS=-fno-gcse
fi
+##
+# Using __thread is either faster than pthread_get/setspecific,
+# or (if using GCC's "emutls" feature) exactly the same. So
+# we always use it if available.
+
+cat > $TMPC << EOF
+__thread int x;
+
+int main(void)
+{
+ x = 42;
+ return x;
+}
+EOF
+if compile_prog "-Werror" "" ; then
+ tls=yes
+else
+ tls=no
+fi
+
+##
+# Position Independent executables
+
if test "$static" = "yes" ; then
if test "$pie" = "yes" ; then
error_exit "static and pie are mutually incompatible"
@@ -1260,19 +1284,18 @@ if test "$pie" = ""; then
fi
if test "$pie" != "no" ; then
+ if test "$CONFIG_TLS" = yes; then
+THREAD=__thread
+ else
+THREAD=
+ fi
cat > $TMPC << EOF
-
-#ifdef __linux__
-# define THREAD __thread
-#else
-# define THREAD
-#endif
-
-static THREAD int tls_var;
+static $THREAD int tls_var;
int main(void) { return tls_var; }
EOF
+ unset THREAD
if compile_prog "-fPIE -DPIE" "-pie"; then
QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS"
LDFLAGS="-pie $LDFLAGS"
@@ -3184,6 +3207,22 @@ if test "$trace_backend" = "dtrace"; then
fi
##
+# check for TLS runtime
+
+# Some versions of mingw include the "magic" definitions that make
+# TLS work, some don't. Check for it.
+
+if test "$mingw32" = yes; then
+ cat > $TMPC << EOF
+int main(void) { return 0; }
+EOF
+ compile_prog "" ""
+ if $nm $TMPE | grep _tls_used > /dev/null 2>&1; then
+mingw32_tls_runtime=yes
+ fi
+fi
+
+##
# check and set a backend for coroutine
# We prefer ucontext, but it's not always possible. The fallback
@@ -3677,6 +3716,9 @@ if test "$mingw32" = "yes" ; then
version_micro=0
echo
"CONFIG_FILEVERSION=$version_major,$version_minor,$version_subminor,$version_micro"
>> $config_host_mak
echo
"CONFIG_PRODUCTVERSION=$version_major,$version_minor,$version_subminor,$version_micro"
>> $config_host_mak
+ if test "$mingw32_tls_runtime" = yes; then
+echo "CONFIG_MINGW32_TLS_RUNTIME=y" >> $config_host_mak
+ fi
else
echo "CONFIG_POSIX=y" >> $config_host_mak
fi
@@ -3979,6 +4021,10 @@ if test "$cpuid_h" = "yes" ; then
echo "CONFIG_CPUID_H=y" >> $config_host_mak
fi
+if test "$tls" = "yes" ; then
+ echo "CONFIG_TLS=y" >> $config_host_mak
+fi
+
if test "$int128" = "yes" ; then
echo "CONFIG_INT128=y" >> $config_host_mak
fi
@@ -4107,6 +4153,7 @@ echo "OBJCC=$objcc" >> $config_host_mak
echo "AR=$ar" >> $config_host_mak
echo "AS=$as" >> $config_host_mak
echo "CPP=$cpp" >> $config_host_mak
+echo "NM=$nm" >> $config_host_mak
echo "OBJCOPY=$objcopy" >> $config_host_mak
echo "LD=$ld" >> $config_host_mak
echo "WINDRES=$windres" >> $config_host_mak
diff --git a/include/qemu/tls.h b/include/qemu/tls.h
index b92ea9d..c878aaa 100644
--- a/include/qemu/tls.h
+++ b/include/qemu/tls.h
@@ -1,7 +1,7 @@
/*
* Abstraction layer for defining and using TLS variables
*
- * Copyright (c) 2011 Red Hat, Inc
+ * Copyright (c) 2011, 2013 Red Hat, Inc
* Copyright (c) 2011 Linaro Limited
*
* Authors:
@@ -25,28 +25,117 @@
#ifndef QEMU_TLS_H
#define QEMU_TLS_H
-/* Per-thread variables. Note that we only have implementations
- * which are really thread-local on Linux; the dummy implementations
- * define plain global variables.
+#ifdef CONFIG_WIN32
+
+/* Do not use GCC's "emutls" path on Windows, it is slower.
+ *
+ * The initial contents of TLS variables are placed in the .tls section.
+ * The linker takes all section starting with ".tls$", sorts them and puts
+ * the contents in a single ".tls" section. qemu-thread-win32.c defines
+ * special symbols in .tls$000 and .tls$ZZZ that represent the beginning
+ * and end of TLS memory. The linker and run-time library then cooperate
+ * to copy memory between those symbols in the TLS area of new threads.
*
- * This means that for the moment use should be restricted to
- * per-VCPU variables, which are OK because:
- * - the only -user mode supporting multiple VCPU threads is linux-user
- * - TCG system mode is single-threaded regarding VCPUs
- * -
[Qemu-devel] [RFC PATCH 0/2] v2.1 RCU Implementation for QEMU
This series applies on top today's git.qemu.org/master and is online at: https://github.com/ncultra/qemu/tree/rcu-for-1.7 Paolo Bonzini (2): fixed tests/Makefile to correctly link rcutorture enable TLS in build and activate test-tls in make check configure | 63 ++ include/qemu/tls.h | 127 + include/qom/cpu.h | 2 +- tests/Makefile | 14 -- tests/test-tls.c | 87 5 files changed, 261 insertions(+), 32 deletions(-) create mode 100644 tests/test-tls.c -- 1.8.3.1
[Qemu-devel] [PATCH 1/2] fixed tests/Makefile to correctly link rcutorture
From: Paolo Bonzini Reviewed-by: Mike Day --- tests/Makefile | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/tests/Makefile b/tests/Makefile index b4a52b4..4d68d28 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -44,9 +44,14 @@ check-unit-y += tests/test-cutils$(EXESUF) gcov-files-test-cutils-y += util/cutils.c check-unit-y += tests/test-mul64$(EXESUF) gcov-files-test-mul64-y = util/host-utils.c +check-unit-y += tests/test-tls$(EXESUF) +# all code tested by test-tls is inside tls.h +gcov-files-test-tls-y = check-unit-y += tests/test-int128$(EXESUF) # all code tested by test-int128 is inside int128.h gcov-files-test-int128-y = +check-unit-y += tests/rcutorture$(EXESUF) +gcov-files-rcutorture-y = util/rcu.c check-unit-y += tests/test-bitops$(EXESUF) check-block-$(CONFIG_POSIX) += tests/qemu-iotests-quick.sh @@ -99,8 +104,8 @@ test-obj-y = tests/check-qint.o tests/check-qstring.o tests/check-qdict.o \ tests/test-string-input-visitor.o tests/test-qmp-output-visitor.o \ tests/test-qmp-input-visitor.o tests/test-qmp-input-strict.o \ tests/test-qmp-commands.o tests/test-visitor-serialization.o \ - tests/test-x86-cpuid.o tests/test-mul64.o tests/rcutortore.o \ -tests/test-int128.o + tests/test-x86-cpuid.o tests/test-mul64.o tests/test-int128.o \ + tests/test-tls.o tests/rcutorture.o test-qapi-obj-y = tests/test-qapi-visit.o tests/test-qapi-types.o @@ -123,8 +128,9 @@ tests/test-hbitmap$(EXESUF): tests/test-hbitmap.o libqemuutil.a libqemustub.a tests/test-x86-cpuid$(EXESUF): tests/test-x86-cpuid.o tests/test-xbzrle$(EXESUF): tests/test-xbzrle.o xbzrle.o page_cache.o libqemuutil.a tests/test-cutils$(EXESUF): tests/test-cutils.o util/cutils.o +tests/rcutorture$(EXESUF): tests/rcutorture.o libqemuutil.a tests/test-int128$(EXESUF): tests/test-int128.o +tests/test-tls$(EXESUF): tests/test-tls.o libqemuutil.a +tests/rcutorture$(EXESUF): tests/rcutorture.o libqemuutil.a tests/test-qapi-types.c tests/test-qapi-types.h :\ $(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-types.py -- 1.8.3.1
Re: [Qemu-devel] [RFC] Convert AioContext to Gsource sub classes
Quoting Wenchao Xia (2013-08-13 03:44:39) > 于 2013-8-13 1:01, Michael Roth 写道: > > Quoting Paolo Bonzini (2013-08-12 02:30:28) > >>> 1) rename AioContext to AioSource. > >>>This is my major purpose, which declare it is not a "context" concept, > >>> and GMainContext is the entity represent the thread's activity. > >> > >> Note that the nested event loops in QEMU are _very_ different from > >> glib nested event loops. In QEMU, nested event loops only run block > >> layer events. In glib, they run all events. That's why you need > >> AioContext. > > > > Would it be possible to use glib for our nested loops as well by just > > setting a higher priority for the AioContext GSource? > > > > Stefan and I were considering how we could make use of his "drop > > ioflush" patches to use a common mechanism to register fd events, but > > still allow us to distinguish between AioContext and non-AioContext > > for nested loops. I was originally thinking of using prepare() functions > > to filter out non-AioContext events, but that requires we implement > > on GSource's with that in mind, and non make use of pre-baked ones > > like GIOChannel's, and bakes block stuff into every event source > > implementation. > > >Besides priority, also g_source_set_can_recurse() can help. >With a deeper think, I found a harder problem: > g_main_context_acquire() and g_main_context_release(). In release, > pending BH/IO call back need to be cleared, but this action can't > be triggered automatically when user call g_main_context_release(). I don't understand why this is a requirement, gmctx_acquire/release ensure that only one thread attempts to iterate the main loop at a time. this isn't currently an issue in qemu, and if we re-implemented qemu_aio_wait() to use the same glib interfaces, the tracking of in-flight requests would be moved to the block layer via Stefan's 'drop io_flush' patches, which moves that block-specific logic out of the main loop/AioContext GSource by design. Are there other areas where you see this as a problem? >For the above reason, I tend to think, maybe we should t wrap all of > Glib's mainloop into custom encapsulation, such as QContext, Add the > aio poll logic in q_context_release(). Use QContext * in every caller > to hide GMainContext *, so QContext layer play the role of clear > event loop API. > > > Priorities didn't cross my mind though, but it seems pretty > > straightfoward... > > > > AioContext could then just be a container of sorts for managing > > bottom-halves and AioContext FDs and binding them to the proper > > GMainContext/MainLoop, but the underlying GSources could > > still be driven by a normal glib-based mainloop, just with a specific > > priority in the nested case. > > > >> > >>> 2) Break AioSource into FdSource and BhSource. > >>>This make custom code less and simpler, one Gsource for one kind of > >>> job. It is not necessary but IMHO it will make things clear when add > >>> more things into main loop: add a new Gsource sub class, avoid to > >>> always have relationship with AioContext. > >> > >> But this is only complicating things work since users rely on both file- > >> descriptor APIs and bottom half APIs. > > > > Taking things a step further, maybe AioContext can stop being a > > block-specific construct, but actually be the "QContext" we've > > discussed in the past for managing multiple event loops. All > > the block stuff would be hidden away in the GSource priority. > > > > For instance, > > > > #ifndef _WIN32 > > > > qemu_aio_set_fd_handler(fd, ...): > > aio_set_fd_handler(qemu_aio_context, fd, ..., QEMU_PRIORITY_BLOCK) > > > > qemu_set_fd_handler(fd, ...): > > aio_set_fd_handler(qemu_aio_context, fd, ..., G_PRIORITY_DEFAULT) > > > > #else > > > > qemu_add_wait_object(fd, ...): > > add_wait_object(qemu_aio_context, fd, ...) > > > > qemu_set_fd_handler(fd, ...): > > set_socket_handler(qemu_aio_context, fd, ..., G_PRIORITY_DEFAULT) > > > > #endif > > > > qemu_bh_schedule: > > bh_schedule(qemu_aio_context, ...) > > > > etc... > > > > I'll be sending patches this week for moving > > add_wait_object/qemu_set_fd_handler to GSources, the non-global ones use > > GMainContext * to specify a non-default thread/context, but can be easily > > changed, or we can just do aioctx->g_main_context at the call sites. > > There's some nice possibilities in using the former though: avoiding > > O(n) lookups for stuff like finding the GSource for a particular > > event/event type, for instance, by storing pointers to the GSource or > > some kind of hashmap lookup. But probably better to discuss that aspect > > with some context so I'll try to get those patches out soon. > > > >> > > More reasons: > > When I thinking how to bind library code to a thread context, it may > > need to add Context's concept into API of block.c. If I use AioContext, > > there will need a wrapper API to run the event loop. But If I got > > glib
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On 15.08.2013, at 16:43, Alexey Kardashevskiy wrote:
> On 08/15/2013 06:45 PM, Alexander Graf wrote:
>>
>> On 15.08.2013, at 10:06, Alexey Kardashevskiy wrote:
>>
>>> On 08/15/2013 05:55 PM, Alexander Graf wrote:
On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
> IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
> a CPU version in lower 16 bits. Since there is no significant change
> in behavior between versions, there is no point to add every single CPU
> version in QEMU's CPU list. Also, new CPU versions of already supported
> CPU won't break the existing code.
>
> This adds a PVR mask support which means that aliases are replaced with
> another layer in POWERPC CPU class hierarchy. The patch adds intermediate
> POWER7, POWER7+ and POWER8 CPU classes and makes use of those in
> specific versioned POWERPC CPUs.
>
> Cc: Andreas Färber
> Signed-off-by: Alexey Kardashevskiy
>
> ---
> Changes:
> v3:
> * renamed macros to describe the functionality better
> * added default PVR value for the powerpc cpu family (what alias used to
> do)
>
> v2:
> * aliases are replaced with another level in class hierarchy
> ---
> target-ppc/cpu-models.c | 54
> -
> target-ppc/cpu-models.h | 7 ++
> target-ppc/cpu-qom.h| 2 ++
> target-ppc/translate_init.c | 4 ++--
> 4 files changed, 50 insertions(+), 17 deletions(-)
>
> diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
> index 8dea560..e48004b 100644
> --- a/target-ppc/cpu-models.c
> +++ b/target-ppc/cpu-models.c
> @@ -35,7 +35,8 @@
> /* PowerPC CPU definitions
> */
> #define POWERPC_DEF_PREFIX(pvr, svr, type)
> \
> glue(glue(glue(glue(pvr, _), svr), _), type)
> -#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type)
>\
> +#define POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, _pvr_mask,
> _pvr_default, \
> + _svr, _type, _parent)
>\
> static void
> \
> glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_class_init)
> \
> (ObjectClass *oc, void *data)
> \
> @@ -44,6 +45,8 @@
> PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
> \
>
> \
> pcc->pvr = _pvr;
> \
> +pcc->pvr_default = _pvr_default;
>\
> +pcc->pvr_mask = _pvr_mask;
>\
> pcc->svr = _svr;
> \
> dc->desc = _desc;
> \
> }
> \
> @@ -51,7 +54,7 @@
> static const TypeInfo
> \
> glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_type_info) = {
> \
> .name = _name "-" TYPE_POWERPC_CPU,
> \
> -.parent = stringify(_type) "-family-" TYPE_POWERPC_CPU,
>\
> +.parent = _parent,
>\
> .class_init =
> \
> glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_class_init),
> \
> };
> \
> @@ -66,9 +69,24 @@
> type_init(
> \
> glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_register_types))
>
> +#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type)
>\
> +POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, CPU_POWERPC_DEFAULT_MASK,
> 0, \
> + _svr, _type,
>\
> + stringify(_type) "-family-" TYPE_POWERPC_CPU)
> +
> #define POWERPC_DEF(_name, _pvr, _type, _desc)
> \
> POWERPC_DEF_SVR(_name, _desc, _pvr, POWERPC_SVR_NONE, _type)
>
> +#define POWERPC_DEF_FAMILY(_name, _pvr, _pvr_mask, _pvr_default,
>\
> + _type, _desc)
>\
> +POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, _pvr_mask,
Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support
Am 15.08.2013 15:12, schrieb Anthony Liguori: > Everyone is talking past each other and no one is addressing the real > problem. There are two distinct issues here: > > 1) We have two ABIs that cannot be changed unless there's a very good >reason to. Alexey's original patch breaks both. The guest ABI >cannot change given a fixed command line. > >IOW, the exposed PVR value for -cpu POWER7 cannot change across >versions of QEMU or when running on different hardware. This breaks >live migration and save/resume. > >We also cannot break the command line interface. If the last version >of QEMU supported -cpu POWER7_v2.1, then we must continue to support >that. 1a) How should -cpu 0xDEADBEEF or -cpu DEADBEEF behave. I expect it to error out as before rather than applying the same fuzz/mask that -cpu host might. That would let us implement our own fuzz logic in kvm.c, operating on a GSList of ObjectClasses to handle multiple matches. Regards, Andreas > >If there's a good reason to break either of these, that's fine but >that justification needs be up front in the patch commit message. > > 2) The only "-cpu" that makes sense is "-cpu host" for KVM on HV (or >whatever ya'll call it). POWER does not have the ability to >virtualize the hardware PVR value. There is a virtual PVR in the >device tree but that's orthogonal to what we think of as the VCPU (it >essentially means IIUC that the cpu is compatible with that PVR). > >We should explicitly disallow any -cpu value when KVM on HV is >enabled other than host. > >The implementation of "-cpu host" is also goofy on PPC. -cpu host >does a match on existing CPU models meaning that we have to define a >CPU model for any possible CPU we run on. This would require having >every possible CPU model implemented in QEMU which is silly. >Instead, we should have a passthrough CPU model for use with "-cpu >host" which is essentially what Alexey's patch turns -cpu POWER7 >into. -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [Qemu-ppc] VSX Instruction Set Implementation
Hi Jacques, On 15.08.2013, at 16:42, Jacques Mony wrote: > Hello, > > After going through the archives, I read an interesting thread regarding > unimplemented instruction set from PowerISA 2.06. The specific instruction > that seems to be called by AIX is stxvd2x, from VSX Instruction Set (new in > 2.06 as I can understand). > > How do one start to implement a instruction sub-set? Where to start? I see > there are helpers, TCG, etc… is there a tutorial that explains where to > start? I already know it will have to support new encoding forms (XX1-form , > XX2-form…) which is not being used yet (afaik), but for the rest, I’m a bit > lost. There is a tiny bit of documentation, but mostly it's all about reading code. I think a good place to start is a patch set that implements instructions. Check out this one from Aurelien: https://lists.gnu.org/archive/html/qemu-devel/2013-04/msg02569.html There is also some documentation available at the QEMU wiki: http://wiki.qemu.org/Documentation/TCG I also did a talk on TCG last year that should give you a high level idea on how it works: http://chemnitzer.linux-tage.de/2012/vortraege/1062 Just get yourself through these and try to figure out what's going on. Keep in mind that TCG is a JIT, so you have 2 phases: 1) translation (guest -> tcg -> host code) 2) execution (host code gets executed) If you still have questions left after that, please feel free to ask again :). Alex
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
Am 15.08.2013 15:55, schrieb Alexey Kardashevskiy: > On 08/15/2013 09:48 PM, Andreas Färber wrote: >> Am 15.08.2013 13:03, schrieb Alexander Graf: >>> >>> On 15.08.2013, at 12:52, Andreas Färber wrote: >>> Am 15.08.2013 10:45, schrieb Alexander Graf: > > Yes, I think it makes sense to keep the full PVR around when we want to > be specific. What I'm referring to is class specific logic that can > assemble major/minor numbers from the command line. So > > -cpu POWER7,major=2,minor=0 > > would result in a PVR value that is identical to POWER7_v2.0. The > assembly of this PVR value is class specific, because different classes > of CPUs have different semantics for their major and minor numbers. > > That way in the future we won't have to add any new version specific CPU > types but instead the user can assemble those himself, making everyone's > life a lot easier. > > My point was that if we have that logic, we could at the same place just > say "if my major/minor is 0, default to something reasonable". > > But let's ask Andreas whether he has a better idea here :). If you read the previous discussion on the initial POWER7+ patch, I believe I had proposed major-version / minor-version or so properties at family level, to be able to use different implementations or none at all where we don't see a scheme. >>> >>> Sounds like a good idea. >>> However if we want to use that from -cpu as in your example above, we would have to implement custom parsing code for cpu_model, which I would rather avoid, given we want to replace it with -device in the future. >>> >>> Can't we make this generic QOM property parsing code? >>> >>> -cpu POWER7,major-version=2,minor-version=0 >>> >>> would do >>> >>> cpu = new POWER7(major-version = 2, minor_version = 0); >>> >>> and then the POWER7 class can decide what to do with this additional >>> information? >> >> That is "custom parsing code for cpu_model" in target-ppc then. x86 has >> its own implementation and so does sparc, both not fully QOM'ified yet, >> so there is no one-size-fits-all. >> But maybe I didn't fully catch the exact question. :) The custom parenting strikes me as a wrong consequence of us not having fully QOM'ified / cleaned up the family classes yet. We had discussed two ways: Either have, e.g., POWER7+ inherit from POWER7 (which looks like the only reason this is being done here) and/or have, e.g., POWER5+ copy and modify 970fx values via #defines. >>> >>> IIUC the family parenting is orthogonal to this. Here we're looking at >>> having families as classes at all. Currently we don't - we only have >>> explicit versioned implementations as classes. >> >> That's simply not true!!! All is hidden by macros as requested by you - >> sounds as if that was a bad idea after all. :/ >> >> We do have the following: >> >> "object" >> +- "device" >>+- "cpu" >> +- "powerpc64-cpu" >> +- "POWER7-family-powerpc64-cpu" -> POWERPC_FAMILY() >> +- "POWER7_v2.0-powerpc64-cpu" -> POWERPC_DEF_SVR() >>+- "host-powerpc64-cpu" (depending on host PVR) >> >> That's why I was saying: If we need POWER7+-specific family code, we >> need to have a POWER7P family and not reuse POWER7 as conveniently done >> today. All is there to implement properties or whatever at that level. >> >> And that's also why trying to do the parent tweaking in >> POWERPC_DEF_FAMILY_MEMBER() is bogus. The existing infrastructure just >> needs to be used the right way, sigh. >> >> And to clean up the aliases business, we should simply move them into >> the POWER7_v2.0-powerpc64-cpu level class as an array, I think. That >> would greatly simplify -cpu ?, and the alias-to-type lookup would get >> faster at the same time since we wouldn't be looking at unavailable >> models anymore. >> >>> Whether we have >>> >>> PowerPC >>> `- POWER7 >>> `- POWER7+ >>> `- POWER7+ v1.0 >>> >>> or >>> >>> PowerPC >>> `- POWER7+ >>> `- POWER7+ v1.0 >>> >>> is a different question I think. >> >> My question is: Why are you guys trying to create yet another type for >> "POWER7" when we already have one. The only plausible-to-me explanation >> was that avoidance of separate POWER7P family was the core cause, but >> apparently the core problem is that no one except me is actually >> grasping the macro'fied code or at least you lost the overview during >> your vacation... :( > > > I am not trying to add any additional POWER7. We do not have POWER7 in QEMU > at all, just some approaching/approximation (whatever word suits, sorry for > my weak, terrible english). POWER7 (forget about POWER7+ and others) with > PVR=0x003FAABB would still be absolutely valid POWER7 everywhere but QEMU > (until we support the exact PVR with the specific patch which would add > _anything_ new but just definition). Sorry for my dee
Re: [Qemu-devel] [RFC PATCH v3] powerpc: add PVR mask support
On 08/15/2013 06:45 PM, Alexander Graf wrote:
>
> On 15.08.2013, at 10:06, Alexey Kardashevskiy wrote:
>
>> On 08/15/2013 05:55 PM, Alexander Graf wrote:
>>>
>>> On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
>>>
IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
a CPU version in lower 16 bits. Since there is no significant change
in behavior between versions, there is no point to add every single CPU
version in QEMU's CPU list. Also, new CPU versions of already supported
CPU won't break the existing code.
This adds a PVR mask support which means that aliases are replaced with
another layer in POWERPC CPU class hierarchy. The patch adds intermediate
POWER7, POWER7+ and POWER8 CPU classes and makes use of those in
specific versioned POWERPC CPUs.
Cc: Andreas Färber
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v3:
* renamed macros to describe the functionality better
* added default PVR value for the powerpc cpu family (what alias used to
do)
v2:
* aliases are replaced with another level in class hierarchy
---
target-ppc/cpu-models.c | 54
-
target-ppc/cpu-models.h | 7 ++
target-ppc/cpu-qom.h| 2 ++
target-ppc/translate_init.c | 4 ++--
4 files changed, 50 insertions(+), 17 deletions(-)
diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
index 8dea560..e48004b 100644
--- a/target-ppc/cpu-models.c
+++ b/target-ppc/cpu-models.c
@@ -35,7 +35,8 @@
/* PowerPC CPU definitions
*/
#define POWERPC_DEF_PREFIX(pvr, svr, type)
\
glue(glue(glue(glue(pvr, _), svr), _), type)
-#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type)
\
+#define POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, _pvr_mask, _pvr_default,
\
+ _svr, _type, _parent)
\
static void
\
glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_class_init)
\
(ObjectClass *oc, void *data)
\
@@ -44,6 +45,8 @@
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
\
\
pcc->pvr = _pvr;
\
+pcc->pvr_default = _pvr_default;
\
+pcc->pvr_mask = _pvr_mask;
\
pcc->svr = _svr;
\
dc->desc = _desc;
\
}
\
@@ -51,7 +54,7 @@
static const TypeInfo
\
glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_type_info) = {
\
.name = _name "-" TYPE_POWERPC_CPU,
\
-.parent = stringify(_type) "-family-" TYPE_POWERPC_CPU,
\
+.parent = _parent,
\
.class_init =
\
glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_class_init),
\
};
\
@@ -66,9 +69,24 @@
type_init(
\
glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_register_types))
+#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type)
\
+POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, CPU_POWERPC_DEFAULT_MASK, 0,
\
+ _svr, _type,
\
+ stringify(_type) "-family-" TYPE_POWERPC_CPU)
+
#define POWERPC_DEF(_name, _pvr, _type, _desc)
\
POWERPC_DEF_SVR(_name, _desc, _pvr, POWERPC_SVR_NONE, _type)
+#define POWERPC_DEF_FAMILY(_name, _pvr, _pvr_mask, _pvr_default,
\
+ _type, _desc)
\
+POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, _pvr_mask, _pvr_default,
\
+ POWERPC_SVR_NONE, _type,
\
+ stringify(_ty
Re: [Qemu-devel] minimal linux distribution for qemu
On 15 August 2013 15:18, Herbei Dacian wrote: > but you said that "qemu-system-arm" is not maintained and it doesn't work. No, I said that the arguments you were giving it were requesting a model of an obsolete board, and you should ask it to emulate a different board. -- PMM
[Qemu-devel] [PATCH v2 10/10] target-ppc: add support for extended mtfsf/mtfsfi forms
Hi
I am seeing a regression with 1.5.0 release where the following program
#include
#include
int main(int argc, char * argv[])
{
double f = 1234.67;
printf("floor(%f) = %f\n", f, floor(f));
return 0;
}
when compiled without any -O options which means it calls the glitch's floor()
function which uses mtfsfi
results in
floor(1234.67) = 1235.00
where as expected result is
floor(1234.67) = 1234.00
Git bisect suggests indicates this patch where it started to regress
The machine emulated is mac99 which is pre ISA 2.05
Same program (statically linked) seems to work fine on real hardware, therefore
it seems to me that its a Qemu problem
Let me know if you need more information.
Thanks
-Khem
Re: [Qemu-devel] [PATCH] target-ppc: fix bit extraction for FPBF and FPL
On Aug 15, 2013, at 4:32 AM, Aurelien Jarno wrote: > Bit extraction for the FP BF and L field of the MTFSFI and MTFSF > instructions is wrong and doesn't match the reference manual (which > explain the bit number in big endian format). It has been broken in > commit 7d08d85645def18eac2a9d672c1868a35e0bcf79. > > This patch fixes this, which in turn fixes the problem reported by > Khem Raj about the floor() function of libm. > > Reported-by: Khem Raj > Signed-off-by: Aurelien Jarno > --- > target-ppc/translate.c |4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > I don't know if we still have time to get this into 1.6, hence the Cc: > to stable. In anycase it also needs to be fixed in 1.5. > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index f07d70d..41f4048 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -428,9 +428,9 @@ EXTRACT_HELPER(CRM, 12, 8); > EXTRACT_HELPER(SR, 16, 4); > > /* mtfsf/mtfsfi */ > -EXTRACT_HELPER(FPBF, 19, 3); > +EXTRACT_HELPER(FPBF, 23, 3); > EXTRACT_HELPER(FPIMM, 12, 4); > -EXTRACT_HELPER(FPL, 21, 1); > +EXTRACT_HELPER(FPL, 25, 1); > EXTRACT_HELPER(FPFLM, 17, 8); > EXTRACT_HELPER(FPW, 16, 1); > > -- > 1.7.10.4 > Thanks for quick turnaround, I have tested this patch and fixes the said issue.
