Re: [Qemu-devel] [PATCH] m25p80: add basic support for the SFPD command
Hi Cedric, On [2019 Jan 21] Mon 17:00:02, Cédric Le Goater wrote: > JEDEC STANDARD JESD216 for Serial Flash Discovery Parameters (SFDP) > provides a mean to describe the features of a serial flash device > using a set of internal parameter tables. > > This is the initial framework for the RDSFPD command which is given Is it possible that above should be RDSFDP? (In that case we need to do s/PD/DP/ + s/pd/dp/ in the code aswell) > access to a private SFPD area under the flash. This area now needs to > be populated with the flash device characteristics, presumingly with > the values from the FlashPartInfo array. > > Signed-off-by: Cédric Le Goater > --- > hw/block/m25p80.c | 67 +++ > 1 file changed, 67 insertions(+) > > diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c > index e8dfa14b332f..581a9e1fb82e 100644 > --- a/hw/block/m25p80.c > +++ b/hw/block/m25p80.c > @@ -340,6 +340,7 @@ typedef enum { > BULK_ERASE = 0xc7, > READ_FSR = 0x70, > RDCR = 0x15, > +RDSFPD = 0x5a, > > READ = 0x03, > READ4 = 0x13, > @@ -405,6 +406,7 @@ typedef enum { > STATE_COLLECTING_DATA, > STATE_COLLECTING_VAR_LEN_DATA, > STATE_READING_DATA, > +STATE_READING_SFPD, > } CMDState; > > typedef enum { > @@ -456,6 +458,8 @@ typedef struct Flash { > > int64_t dirty_page; > > +#define M25P80_SFPD_AREA_SIZE 0x100 > +uint8_t sfpd_area[M25P80_SFPD_AREA_SIZE]; > const FlashPartInfo *pi; > > } Flash; > @@ -626,6 +630,8 @@ static inline int get_addr_length(Flash *s) > } > > switch (s->cmd_in_progress) { > + case RDSFPD: > + return 3; > case PP4: > case PP4_4: > case QPP_4: > @@ -748,11 +754,55 @@ static void complete_collecting_data(Flash *s) >" by device\n"); > } > break; > + > +case RDSFPD: > +if (s->cur_addr < M25P80_SFPD_AREA_SIZE) { > +s->state = STATE_READING_SFPD; > +} else { > +qemu_log_mask(LOG_GUEST_ERROR, > + "M25P80: Invalid SFPD address %#" PRIx32 "\n", > + s->cur_addr); > +} > +break; > + > default: > break; > } > } > > +static void reset_memory_sfpd(Flash *s) > +{ > +s->sfpd_area[0x00] = 'S'; > +s->sfpd_area[0x01] = 'F'; > +s->sfpd_area[0x02] = 'P'; We also need to swap here so [0x02] == 'D' and [0x02] == 'P'. > +s->sfpd_area[0x03] = 'D'; > + > +s->sfpd_area[0x04] = 0x00; /* SFDP Minor Revision Number */ > +s->sfpd_area[0x05] = 0x01; /* SFDP Major Revision Number */ > +s->sfpd_area[0x06] = 0x01; /* Number of Parameter Headers */ > +s->sfpd_area[0x07] = 0xFF; /* Unused */ > + > +s->sfpd_area[0x08] = 0x00; /* ID Number. 0x0 : JEDEC */ > +s->sfpd_area[0x09] = 0x00; /* Parameter Table Minor Revision */ > +s->sfpd_area[0x0A] = 0x01; /* Parameter Table Major Revision */ > +s->sfpd_area[0x0B] = 0x09; /* Parameter Table Length (DWORD) */ > +s->sfpd_area[0x0C] = 0x30; /* Parameter Table Pointer */ > +s->sfpd_area[0x0D] = 0x00; /* Parameter Table Pointer */ > +s->sfpd_area[0x0E] = 0x00; /* Parameter Table Pointer */ > +s->sfpd_area[0x0F] = 0xFF; /* Unused */ > + > +s->sfpd_area[0x10] = s->pi->id[0]; /* ID Number. Manufacturer */ > +s->sfpd_area[0x11] = 0x00; /* Parameter Table Minor Revision */ > +s->sfpd_area[0x12] = 0x01; /* Parameter Table Major Revision */ > +s->sfpd_area[0x13] = 0x04; /* Parameter Table Length (DWORD) */ > +s->sfpd_area[0x14] = 0x60; /* Parameter Table Pointer */ > +s->sfpd_area[0x15] = 0x00; /* Parameter Table Pointer */ > +s->sfpd_area[0x16] = 0x00; /* Parameter Table Pointer */ > +s->sfpd_area[0x17] = 0xFF; /* Unused */ > + > +/* TODO: populate accordingly to chip model */ Could an option be to move this into the FlashPartInfo perhaps? (Since the SFDP area will vary between flashes it is maybe easier to scale if put there...) Best regards, Francisco Iglesias > +} > + > static void reset_memory(Flash *s) > { > s->cmd_in_progress = NOP; > @@ -822,6 +872,8 @@ static void reset_memory(Flash *s) > break; > } > > +reset_memory_sfpd(s); > + > DB_PRINT_L(0, "Reset done.\n"); > } > > @@ -1049,6 +1101,13 @@ static void decode_new_cmd(Flash *s, uint32_t value) > s->state = STATE_READING_DATA; > break; > > +case RDSFPD: > +s->needed_bytes = get_addr_length(s) + 1 ; /* SFPD addr + dummy */ > +s->pos = 0; > +s->len = 0; > +s->state = STATE_COLLECTING_DATA; > +break; > + > case RDCR: > s->data[0] = s->volatile_cfg & 0xFF; > s->data[0] |= (!!s->four_bytes_address_mode) << 5; > @@ -1241,6 +1300,8 @@ static uint32_t m25p80_transfer8(SSISlave *ss, uint32_t > tx) > } > > r = s->data[s->pos]; > +DB_PRINT_L(1, "READ DATA 0x%" PRIx32 "=%" PRIx8 "\n", s-
Re: [Qemu-devel] [PATCH 0/5] misc fixes to deal with icon location changes
On 29.01.19 12:39, Daniel P. Berrangé wrote: > This is a few misc fixes identified after the icon location changes > were merged. Most importantly it deals with the nsis installer file > manifest. > > Daniel P. Berrangé (5): > nsis: don't install files into /tmp > make: don't insert a '/' after $(DESTDIR) > nsis: ensure we always pass -W64 flag to nsis installer script > nsis: fix location of icons to be bundled in the installer > configure: stop trying to link non-existant bmp file from bios dir > > Makefile | 23 +-- > configure | 1 - > qemu.nsi | 4 ++-- > 3 files changed, 15 insertions(+), 13 deletions(-) > There was also a file rename which needs to be handled, otherwise NSIS still fails: File: "/tmp/qemu-nsis\qemu_logo_no_text.svg" -> no files found. The new qemu.svg still includes the old file name. That could be fixed, too. Regards, Stefan
Re: [Qemu-devel] [PATCH 07/10] monitor: Expose pvrdma device statistics counters
Eric Blake writes: > On 1/31/19 2:08 PM, Yuval Shaia wrote: >> On Thu, Jan 31, 2019 at 07:17:16AM -0600, Eric Blake wrote: >>> On 1/31/19 7:08 AM, Yuval Shaia wrote: Signed-off-by: Yuval Shaia --- hmp-commands-info.hx | 14 ++ monitor.c| 6 ++ 2 files changed, 20 insertions(+) >> >> Hi Eric, >> >>> >>> Commit message should state WHY this is being added as an HMP-only >>> command, and does not have a QMP counterpart. It may be okay if the >>> interface is only designed to be useful to developers, but having that >>> justification in the git log is important. >> >> Thanks for your review. >> >> See, i need this interface mainly for development/debug purposes, to help >> troubleshot problems and to give insights to what device "is doing". >> >> Trace points are great but not effective in high load. >> QMP as i see it, and correct me if i'm wrong, is used to report management >> events etc and also here, is not effective in high load. If QMP is not effective, HMP won't be effective, either. But I guess you mean something else, namely QMP *events* aren't effective, but *polling* is. That's an argument for polling, not an argument for not supporting QMP. >> I choose this interface as it is interactive, i.e. whenever i need the info >> i trigger 'info pvrdmastats' command from the monitor console. >> >> During my research i notice that some devices (or families) have nice user >> interface via virsh (blkstat, ifstat, memstat etc). Is it the preferred way >> for non-devel/debug purposes? Libvirt interfaces like these are built on top of *QMP* interfaces. If a libvirt interface would be useful, that's another argument for supporting QMP. > Using existing HMP-only debug interfaces as the design you copied is > indeed acceptable justification for making yours HMP-only as well. So > now you just need to copy the rationale from this email into your commit > message, so it doesn't get lost. Yes. If we conclude HMP-only is okay, then the rationale for it goes into your commit message. If we conclude we want HMP and QMP, I'll be happy to assist you with adapting your patch. HMP commands without a QMP equivalent are okay if their functionality makes no sense in QMP, or is of use only for human users. Example for "makes no sense in QMP": setting the current CPU, because a QMP monitor doesn't have a current CPU. Examples for "is of use only for human users": HMP command "help", the integrated pocket calculator. Debugging commands are kind of borderline. Debugging is commonly a human activity, where HMP is just fine. However, humans create tools to assist with their activities, and then QMP is useful. While I wouldn't encourage HMP-only for the debugging use case, I wouldn't veto it. "Device statistics" sounds like it should have debugging uses. But statistics often have non-debugging uses as well. What use cases can you imagine for this command? >> If this is the correct method for this purpose then let me know and i'll >> update the git log message accordingly.
Re: [Qemu-devel] [PATCH 1/5] nsis: don't install files into /tmp
On 29.01.19 22:07, Eric Blake wrote: > On 1/29/19 5:39 AM, Daniel P. Berrangé wrote: >> The nsis installer target has to run 'make install' to populate a >> directory tree with content for the package. Replace the current >> usage of '/tmp/qemu-nsis' with a location underneath the build >> directory. This ensures that when a developer cleans their build >> directory, any left over files from the installer build process >> are also purged. >> >> Signed-off-by: Daniel P. Berrangé >> --- >> Makefile | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> > > Should "qemu-nsis-vroot/" be added to .gitignore for the sake of in-tree > builds? Yes. I suggest to use INSTDIR=$(BUILD_DIR)/qemu-nsis-vroot.tmp. Then it is already covered by the existing pattern *.tmp in .gitignore. With that modification Signed-off-by: Stefan Weil > >> diff --git a/Makefile b/Makefile >> index de898eab62..362a98d275 100644 >> --- a/Makefile >> +++ b/Makefile >> @@ -907,7 +907,7 @@ endif >> .PHONY: installer >> installer: $(INSTALLER) >> >> -INSTDIR=/tmp/qemu-nsis >> +INSTDIR=$(BUILD_DIR)/qemu-nsis-vroot >> >> $(INSTALLER): $(SRC_PATH)/qemu.nsi >> $(MAKE) install prefix=${INSTDIR} >> > signature.asc Description: OpenPGP digital signature
Re: [Qemu-devel] [PATCH 3/5] nsis: ensure we always pass -W64 flag to nsis installer script
On 29.01.19 12:39, Daniel P. Berrangé wrote: > The code to set the -W64 flag is inside a conditional block that only > executes when we are bundling DLLs with the installer. This results in > QEMU being installed in the wrong location on 64-bit hosts when DLLs > are not bundled. > > Signed-off-by: Daniel P. Berrangé > --- > Makefile | 5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/Makefile b/Makefile > index 14a463564e..97a6727358 100644 > --- a/Makefile > +++ b/Makefile > @@ -893,11 +893,14 @@ INSTALLER = qemu-setup-$(VERSION)$(EXESUF) > > nsisflags = -V2 -NOCD > > +ifeq ($(ARCH),x86_64) > +nsisflags += -DW64 > +endif > + > ifneq ($(wildcard $(SRC_PATH)/dll),) > ifeq ($(ARCH),x86_64) > # 64 bit executables > DLL_PATH = $(SRC_PATH)/dll/w64 > -nsisflags += -DW64 > else > # 32 bit executables > DLL_PATH = $(SRC_PATH)/dll/w32 > Technically this is fine, therefore Signed-off-by: Stefan Weil But I wonder whether a Windows installer without bundled DLLs makes sense. If it doesn't, we could as well fail if the DLL path is empty. Regards Stefan
Re: [Qemu-devel] [PATCH RFCv2 4/9] virtio-pmem: Prototype
David Hildenbrand writes: > On 31.01.19 19:19, Markus Armbruster wrote: >> David Hildenbrand writes: >> >>> From: Pankaj Gupta >>> >>> This is the current protoype of virtio-pmem. Support will require >>> machine changes for the architectures that will support it, so it will >>> not yet be compiled. >>> >>> TODO: >>> - Use separate struct for tracking requests internally >>> - Move request/response structs to linux headers >>> - Factor out linux header sync >>> - Drop debug printfs >>> >>> Signed-off-by: Pankaj Gupta >>> [ MemoryDevice/MemoryRegion changes, cleanups, addr property "memaddr", >>> split up patches, unplug handler ] >>> Signed-off-by: David Hildenbrand >>> --- >> [...] >>> diff --git a/include/standard-headers/linux/virtio_ids.h >>> b/include/standard-headers/linux/virtio_ids.h >>> index 6d5c3b2d4f..346389565a 100644 >>> --- a/include/standard-headers/linux/virtio_ids.h >>> +++ b/include/standard-headers/linux/virtio_ids.h >>> @@ -43,5 +43,6 @@ >>> #define VIRTIO_ID_INPUT18 /* virtio input */ >>> #define VIRTIO_ID_VSOCK19 /* virtio vsock transport */ >>> #define VIRTIO_ID_CRYPTO 20 /* virtio crypto */ >>> +#define VIRTIO_ID_PMEM 25 /* virtio pmem */ >>> >>> #endif /* _LINUX_VIRTIO_IDS_H */ >>> diff --git a/qapi/misc.json b/qapi/misc.json >>> index 24d20a880a..b71eca2666 100644 >>> --- a/qapi/misc.json >>> +++ b/qapi/misc.json >>> @@ -2949,16 +2949,42 @@ >>>} >>> } >>> >>> +## >>> +# @VirtioPMEMDeviceInfo: >>> +# >>> +# VirtioPMEM state information >>> +# >>> +# @id: device's ID >>> +# >>> +# @memaddr: physical address in memory, where device is mapped >>> +# >>> +# @size: size of memory that the device provides >>> +# >>> +# @memdev: memory backend linked with device >>> +# >>> +# Since: 4.0 >>> +## >> >> This is like PCDIMMDeviceInfo less @slot, @node, @hotplugged, >> @hotpluggable, and with @addr renamed to @memaddr. >> >> Any particular reason for the rename? > > I answered the same question already and thought I documented it > somewhere ... but looks like it went missing. Looks like my end-of-year mental garbage collection was overeager again. > We cannot use the "addr" property as that is already used e.g. for > virtio-pci/pci devices. And we will have e.g. virtio-pmem-pci as a proy. > So we have to chose a different one (unfortunately). We decided to also > use the name of the property in this struct here, as it will otherwise > be terribly confusing for the user. > > -device virtio-pmem-pci,id=p0,bus=bux0,addr=0x01,memaddr=0x100... > >> >>> +{ 'struct': 'VirtioPMEMDeviceInfo', >>> + 'data': { '*id': 'str', >>> +'memaddr': 'size', >>> +'size': 'size', >>> +'memdev': 'str' >>> + } >>> +} >>> + >>> ## >>> # @MemoryDeviceInfo: >>> # >>> # Union containing information about a memory device >>> # >>> +# nvdimm is included since 2.12. virtio-pmem is included since 4.0. >>> +# >> >> Let's stick to the way we document similar things elsewhere: >> >># @nvdimm: since 2.12 >># >># @virtio-pmem: since 4.0 > > Sounds good, doesn't work :) > > (tried this already, the checker will complain that these fields don't > exist) Doc generator shortcoming *sigh*. QAPI part Acked-by: Markus Armbruster > Thanks! > >># >> >>> # Since: 2.1 >>> ## >>> { 'union': 'MemoryDeviceInfo', >>>'data': { 'dimm': 'PCDIMMDeviceInfo', >>> -'nvdimm': 'PCDIMMDeviceInfo' >>> +'nvdimm': 'PCDIMMDeviceInfo', >>> +'virtio-pmem': 'VirtioPMEMDeviceInfo' >>>} >>> }
[Qemu-devel] [PATCH] ui/cocoa.m: Fix macOS 10.14 deprecation warnings
macOS 10.14 deprecated NSOnState/NSOffState in favour of NSControlStateValueOn/NSControlStateValueOff. Use the new constants, and #define them to the old ones when compiling against a pre-10.13 SDK. Also [NSGraphicsContext graphicsPort] is now deprecated, use [NSGraphicsContext CGContext] when available. Signed-off-by: Brendan Shanks --- ui/cocoa.m | 28 ++-- 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index ddc058e76e..e2567d6946 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -54,6 +54,9 @@ #ifndef MAC_OS_X_VERSION_10_12 #define MAC_OS_X_VERSION_10_12 101200 #endif +#ifndef MAC_OS_X_VERSION_10_13 +#define MAC_OS_X_VERSION_10_13 101300 +#endif /* macOS 10.12 deprecated many constants, #define the new names for older SDKs */ #if MAC_OS_X_VERSION_MAX_ALLOWED < MAC_OS_X_VERSION_10_12 @@ -90,6 +93,14 @@ #if MAC_OS_X_VERSION_MAX_ALLOWED < MAC_OS_X_VERSION_10_9 #define NSModalResponseOK NSFileHandlingPanelOKButton #endif +/* 10.14 deprecates NSOnState and NSOffState in favor of + * NSControlStateValueOn/Off, which were introduced in 10.13. + * Define for older versions + */ +#if MAC_OS_X_VERSION_MAX_ALLOWED < MAC_OS_X_VERSION_10_13 +#define NSControlStateValueOn NSOnState +#define NSControlStateValueOff NSOffState +#endif //#define DEBUG @@ -377,7 +388,12 @@ - (void) drawRect:(NSRect) rect COCOA_DEBUG("QemuCocoaView: drawRect\n"); // get CoreGraphic context +#if MAC_OS_X_VERSION_MAX_ALLOWED < MAC_OS_X_VERSION_10_10 CGContextRef viewContextRef = [[NSGraphicsContext currentContext] graphicsPort]; +#else +CGContextRef viewContextRef = [[NSGraphicsContext currentContext] CGContext]; +#endif + CGContextSetInterpolationQuality (viewContextRef, kCGInterpolationNone); CGContextSetShouldAntialias (viewContextRef, NO); @@ -1147,9 +1163,9 @@ - (void)zoomToFit:(id) sender { stretch_video = !stretch_video; if (stretch_video == true) { -[sender setState: NSOnState]; +[sender setState: NSControlStateValueOn]; } else { -[sender setState: NSOffState]; +[sender setState: NSControlStateValueOff]; } } @@ -1390,15 +1406,15 @@ - (void)adjustSpeed:(id)sender { /* Unselect the currently selected item */ for (NSMenuItem *item in [menu itemArray]) { -if (item.state == NSOnState) { -[item setState: NSOffState]; +if (item.state == NSControlStateValueOn) { +[item setState: NSControlStateValueOff]; break; } } } // check the menu item -[sender setState: NSOnState]; +[sender setState: NSControlStateValueOn]; // get the throttle percentage throttle_pct = [sender tag]; @@ -1502,7 +1518,7 @@ int main (int argc, const char * argv[]) { initWithTitle: [NSString stringWithFormat: @"%d%%", percentage] action:@selector(adjustSpeed:) keyEquivalent:@""] autorelease]; if (percentage == 100) { -[menuItem setState: NSOnState]; +[menuItem setState: NSControlStateValueOn]; } /* Calculate the throttle percentage */ -- 2.17.2 (Apple Git-113)
Re: [Qemu-devel] [PATCH] hw/s390x: Fix the function arguments in the pci stub file
On 2019-02-01 07:14, Thomas Huth wrote: > On 2019-01-31 19:08, Paolo Bonzini wrote: >> On 31/01/19 19:00, Thomas Huth wrote: > (and the prototypes in the header) anymore, so if you try to compile s390x > without CONFIG_PCI, the build currently fails. > Fixes: 468a93898a97 ("s390x/pci: pass the retaddr to all PCI instructions") > Signed-off-by: Thomas Huth > --- > hw/s390x/s390-pci-stub.c | 16 +--- > 1 file changed, 9 insertions(+), 7 deletions(-) This file seems to be in danger of bitrot. Do you think it'll be easier to test rarely used configs like that after we switch to Kconfig? >>> I hope so, yes. There will be a new --without-default-devices options >>> for "configure" (which matches "make allnoconfig" from the kernel) - if >>> we do it right in the Kconfig file for s390x, it should be possible to >>> catch this problem with that option. >> >> Yes, it will be in .travis.yml too. >> >> Right now there is a "select PCI" in the hw/s390x/Kconfig file, but >> probably it's best to add a config S390_ZPCI with "default y if >> S390_CCW_VIRTIO" and "select PCI" in it. Not a blocker, but I can >> integrate it if you send me a fixup patch. > > Yes, that's what I had in mind, too. I'll send a fixup patch... Actually, disabling the s390-pci code works from a compiling+linking point of view, but when you then try to start the machine, it fails: $ s390x-softmmu/qemu-system-s390x -nographic qemu-system-s390x: Unknown device 's390-pcihost' for default sysbus Aborted (core dumped) IIRC we originally wanted to make the "s390-pcihost" device really optional, but then decided not to do it since it would break migration. So the status of the "PCI disablement" got stuck somewhere inbetween, where we've created the switch for the Makefile and the stub file, but never really got it to a point where it could really really be disabled. So I see two options now: 1) Finally really make the device optional, at least for new machine types, so we can really disable CONFIG_PCI and get a working executable. 2) Scratch the idea completely to make this optional, always link the s390-pci-bus.o and s390-pci-inst.o files unconditionally, and remove the s390-pci-stub.c file. I assume options 2 is preferred, since we likely rather want to move into the PCI direction in the long run, instead of ignoring it... Other opinions? Thomas
Re: [Qemu-devel] [PATCH 0/2] archive-source.sh: Clone the submodules locally and add to MAINTAINERS
Patchew URL: https://patchew.org/QEMU/20190124010023.24397-1-phi...@redhat.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/bin/bash time make docker-test-mingw@fedora SHOW_ENV=1 J=14 === TEST SCRIPT END === The full log is available at http://patchew.org/logs/20190124010023.24397-1-phi...@redhat.com/testing.docker-mingw@fedora/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
Re: [Qemu-devel] [PATCH v3 0/8] Build ACPI Heterogeneous Memory Attribute Table (HMAT)
Patchew URL: https://patchew.org/QEMU/20190131071658.29120-1-tao3...@intel.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/bin/bash time make docker-test-mingw@fedora SHOW_ENV=1 J=14 === TEST SCRIPT END === LINKaarch64-softmmu/qemu-system-aarch64w.exe numa.o:numa.c:(.rdata$.refptr.hmat_cache_info[.refptr.hmat_cache_info]+0x0): undefined reference to `hmat_cache_info' numa.o:numa.c:(.rdata$.refptr.hmat_lb_info[.refptr.hmat_lb_info]+0x0): undefined reference to `hmat_lb_info' collect2: error: ld returned 1 exit status make[1]: *** [Makefile:199: qemu-system-aarch64w.exe] Error 1 make: *** [Makefile:429: subdir-aarch64-softmmu] Error 2 Traceback (most recent call last): The full log is available at http://patchew.org/logs/20190131071658.29120-1-tao3...@intel.com/testing.docker-mingw@fedora/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
Re: [Qemu-devel] [PATCH v3] scripts: use git archive in archive-source
Hi, > > tar_file=$(realpath "$1") > > -list_file="${tar_file}.list" > > -vroot_dir="${tar_file}.vroot" > > +sub_file=$(mktemp "${tar_file%.tar}.sub..tar") > > +sub_tdir=$(mktemp -d "${tar_file%.tar}.sub.") > > mktemp is not specified by POSIX; and FreeBSD man pages for mktemp > suggest that if you don't use XX as the suffix that you are not > guaranteed correct behavior. Are you sure this is portable enough? Do > you need both a temp file and dir, or can you create the file name of > your choice inside a temp dir, where only the dir has to have a > randomized name? Yes, storing temp tar in the temp dir should work. > > + status="$(git submodule status "$sm")" > > + smhash="${status# }" > > + smhash="${smhash#+}" > > + smhash="${smhash#-}" > > These three lines can be consolidated into one: > smhash=${status#[ +-]} Ah, cool. Learned a new trick. > > + smdir="$sub_tdir/$sm" > > + smurl="$(git config -f .gitmodules submodule.${sm}.url)" > > + echo "NOTICE: using temporary clone for submodule $sm" > > + git clone "$smurl" "$smdir" > > + test $? -ne 0 && error "failed to clone submodule $sm" > > I know we don't want to affect the developer's normal checkout, but is > it worth storing the temporary clone in a specifically-named > subdirectory of their checkout instead Hmm, we could do "git submodule init + git archive + git submodule deinit". With git storing a bare repo in .git/modules/$submodule these days (and not deleting it on deinit) that'll effectively cache things. It's a (temporary) modification of the checkout though. Alternatively we could clone to $HOME/.cache/$somewhere, similar to the vm tests which store downloads (and soon vm images too) below $HOME/.cache/qemu-vm/. cheers, Gerd
Re: [Qemu-devel] [PATCH] hw/s390x: Fix the function arguments in the pci stub file
On 2019-01-31 19:08, Paolo Bonzini wrote: > On 31/01/19 19:00, Thomas Huth wrote: (and the prototypes in the header) anymore, so if you try to compile s390x without CONFIG_PCI, the build currently fails. >>> Fixes: 468a93898a97 ("s390x/pci: pass the retaddr to all PCI instructions") >>> Signed-off-by: Thomas Huth --- hw/s390x/s390-pci-stub.c | 16 +--- 1 file changed, 9 insertions(+), 7 deletions(-) >>> This file seems to be in danger of bitrot. Do you think it'll be easier >>> to test rarely used configs like that after we switch to Kconfig? >> I hope so, yes. There will be a new --without-default-devices options >> for "configure" (which matches "make allnoconfig" from the kernel) - if >> we do it right in the Kconfig file for s390x, it should be possible to >> catch this problem with that option. > > Yes, it will be in .travis.yml too. > > Right now there is a "select PCI" in the hw/s390x/Kconfig file, but > probably it's best to add a config S390_ZPCI with "default y if > S390_CCW_VIRTIO" and "select PCI" in it. Not a blocker, but I can > integrate it if you send me a fixup patch. Yes, that's what I had in mind, too. I'll send a fixup patch... Thomas
Re: [Qemu-devel] [Qemu-block] [PATCH] block: Fix invalidate_cache error path for parent activation
On Thu, Jan 31, 2019 at 03:31:51PM +0100, Kevin Wolf wrote: > bdrv_co_invalidate_cache() clears the BDRV_O_INACTIVE flag before > actually activating a node so that the correct permissions etc. are > taken. In case of errors, the flag must be restored so that the next > call to bdrv_co_invalidate_cache() retries activation. > > Restoring the flag was missing in the error path for a failed > parent->role->activate() call. The consequence is that this attempt to > activate all images correctly fails because we still set errp, however > on the next attempt BDRV_O_INACTIVE is already clear, so we return > success without actually retrying the failed action. > > An example where this is observable in practice is migration to a QEMU > instance that has a raw format block node attached to a guest device > with share-rw=off (the default) while another process holds > BLK_PERM_WRITE for the same image. In this case, all activation steps > before parent->role->activate() succeed because raw can tolerate other > writers to the image. Only the parent callback (in particular > blk_root_activate()) tries to implement the share-rw=on property and > requests exclusive write permissions. This fails when the migration > completes and correctly displays an error. However, a manual 'cont' will > incorrectly resume the VM without calling blk_root_activate() again. > > This case is described in more detail in the following bug report: > https://bugzilla.redhat.com/show_bug.cgi?id=1531888 > > Fix this by correctly restoring the BDRV_O_INACTIVE flag in the error > path. > > Cc: qemu-sta...@nongnu.org > Signed-off-by: Kevin Wolf > --- > block.c | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Stefan Hajnoczi signature.asc Description: PGP signature
Re: [Qemu-devel] [Qemu-block] [PATCH] qtest.py: Wait for the result of qtest commands
On Thu, Jan 31, 2019 at 02:38:10PM +0200, Alberto Garcia wrote: > The cmd() method of the QEMUQtestProtocol class sends a qtest command > to QEMU but doesn't wait for the return message ("OK", "FAIL", "ERR"). > Because of this, it can return control to the caller before the > command has actually finished. > > In cases like clock_step or clock_set this means that cmd() can return > before all the timers triggered by the clock change have been fired. > This can be fixed by making cmd() wait for the output of the qtest > command. > > This fixes iotests 093 and 136, which are flaky since commit > 8258292e18c39480b64eba9f3551 when the machine is under heavy workload. > > Signed-off-by: Alberto Garcia > --- > scripts/qtest.py | 6 ++ > 1 file changed, 6 insertions(+) Reviewed-by: Stefan Hajnoczi signature.asc Description: PGP signature
Re: [Qemu-devel] [Qemu-block] Guest unresponsive after Virtqueue size exceeded error
On Thu, Jan 31, 2019 at 11:32:32AM +, Fernando Casas Schössow wrote: > Sorry for resurrecting this thread after so long but I just upgraded the host > to Qemu 3.1 and libvirt 4.10 and I'm still facing this problem. > At the moment I cannot use virtio disks (virtio-blk nor virtio-scsi) with my > guests in order to avoid this issue so as a workaround I'm using SATA > emulated storage which is not ideal but is perfectly stable. > > Do you have any suggestions on how can I progress troubleshooting? > Qemu is not crashing so I don't have any dumps that can be analyzed. The > guest is just "stuck" and all I can do is destroy it and start it again. > It's really frustrating that after all this time I couldn't find the cause > for this issue so any ideas are welcome. Hi Fernando, Please post your QEMU command-line (ps aux | grep qemu) and the details of the guest operating system and version. Stefan signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH v11 for-4.0 11/11] qemu_thread: supplement error handling for touch_all_pages
It seems that this poor patch is left alone. :( I sent all, but this patch failed to join them, so sorry for that.. Could we just let it be? Have a nice day, thanks Fei 在 2019/2/1 下午1:25, Fei Li 写道: From: Fei Li Supplement the error handling for touch_all_pages: add an Error parameter for it to propagate the error to its caller to do the handling in case it fails. Cc: Markus Armbruster Signed-off-by: Fei Li --- util/oslib-posix.c | 26 -- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/util/oslib-posix.c b/util/oslib-posix.c index b6c2ee270d..b4dd3d8970 100644 --- a/util/oslib-posix.c +++ b/util/oslib-posix.c @@ -435,7 +435,7 @@ static inline int get_memset_num_threads(int smp_cpus) } static bool touch_all_pages(char *area, size_t hpagesize, size_t numpages, -int smp_cpus) +int smp_cpus, Error **errp) { size_t numpages_per_thread; size_t size_per_thread; @@ -452,20 +452,29 @@ static bool touch_all_pages(char *area, size_t hpagesize, size_t numpages, memset_thread[i].numpages = (i == (memset_num_threads - 1)) ? numpages : numpages_per_thread; memset_thread[i].hpagesize = hpagesize; -/* TODO: let the callers handle the error instead of abort() here */ -qemu_thread_create(&memset_thread[i].pgthread, "touch_pages", - do_touch_pages, &memset_thread[i], - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&memset_thread[i].pgthread, "touch_pages", + do_touch_pages, &memset_thread[i], + QEMU_THREAD_JOINABLE, errp) < 0) { +memset_thread_failed = true; +break; +} addr += size_per_thread; numpages -= numpages_per_thread; } + +memset_num_threads = i; for (i = 0; i < memset_num_threads; i++) { qemu_thread_join(&memset_thread[i].pgthread); } g_free(memset_thread); memset_thread = NULL; -return memset_thread_failed; +if (memset_thread_failed) { +error_append_hint(errp, "os_mem_prealloc: Insufficient free host " + "memory pages available to allocate guest RAM"); +return false; +} +return true; } void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus, @@ -488,10 +497,7 @@ void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus, } /* touch pages simultaneously */ -if (touch_all_pages(area, hpagesize, numpages, smp_cpus)) { -error_setg(errp, "os_mem_prealloc: Insufficient free host memory " -"pages available to allocate guest RAM"); -} +touch_all_pages(area, hpagesize, numpages, smp_cpus, errp); ret = sigaction(SIGBUS, &oldact, NULL); if (ret) {
Re: [Qemu-devel] [PATCH v11 for-4.0 09/11] qemu_thread: supplement error handling for migration
在 2019/2/1 下午1:18, Fei Li 写道: From: Fei Li Update qemu_thread_create()'s callers by - setting an error on qemu_thread_create() failure for callers that set an error on failure; - reporting the error and returning failure for callers that return an error code on failure; - reporting the error and setting some state for callers that just report errors and choose not to continue on. Besides, make compress_threads_save_cleanup() cope with partially initialized comp_param[i] to adapt to the new qemu_thread_create() failure case. Hi David, I got your Reviewed-by in last version at an early stage, but later one issue is raised by Markus due to the improper “[patch v9 16/16] qemu_thread_join: fix segmentation fault”. Thus in this v11, I do an update for the following two functions: compress_threads_save_cleanup() & compress_threads_save_setup() Please help to review again, thanks :) Have a nice day Fei Cc: Markus Armbruster Cc: Dr. David Alan Gilbert Signed-off-by: Fei Li Reviewed-by: Dr. David Alan Gilbert --- migration/migration.c| 35 +--- migration/postcopy-ram.c | 16 ++--- migration/ram.c | 70 ++-- migration/savevm.c | 12 --- 4 files changed, 89 insertions(+), 44 deletions(-) diff --git a/migration/migration.c b/migration/migration.c index 1da71211c8..0034ca1334 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -447,10 +447,13 @@ static void process_incoming_migration_co(void *opaque) goto fail; } -/* TODO: let the further caller handle the error instead of abort() */ -qemu_thread_create(&mis->colo_incoming_thread, "COLO incoming", - colo_process_incoming_thread, mis, - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&mis->colo_incoming_thread, "COLO incoming", + colo_process_incoming_thread, mis, + QEMU_THREAD_JOINABLE, &local_err) < 0) { +error_reportf_err(local_err, "failed to create " + "colo_process_incoming_thread: "); +goto fail; +} mis->have_colo_incoming_thread = true; qemu_coroutine_yield(); @@ -2349,6 +2352,7 @@ out: static int open_return_path_on_source(MigrationState *ms, bool create_thread) { +Error *local_err = NULL; ms->rp_state.from_dst_file = qemu_file_get_return_path(ms->to_dst_file); if (!ms->rp_state.from_dst_file) { @@ -2362,10 +2366,15 @@ static int open_return_path_on_source(MigrationState *ms, return 0; } -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&ms->rp_state.rp_thread, "return path", - source_return_path_thread, ms, - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&ms->rp_state.rp_thread, "return path", + source_return_path_thread, ms, + QEMU_THREAD_JOINABLE, &local_err) < 0) { +error_reportf_err(local_err, + "failed to create source_return_path_thread: "); +qemu_fclose(ms->rp_state.from_dst_file); +ms->rp_state.from_dst_file = NULL; +return -1; + } trace_open_return_path_on_source_continue(); @@ -3201,9 +3210,13 @@ void migrate_fd_connect(MigrationState *s, Error *error_in) migrate_fd_cleanup(s); return; } -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&s->thread, "live_migration", migration_thread, s, - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&s->thread, "live_migration", migration_thread, s, + QEMU_THREAD_JOINABLE, &error_in) < 0) { +error_reportf_err(error_in, "failed to create migration_thread: "); +migrate_set_state(&s->state, s->state, MIGRATION_STATUS_FAILED); +migrate_fd_cleanup(s); +return; +} s->migration_thread_running = true; } diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c index 221ea24919..0934a1403a 100644 --- a/migration/postcopy-ram.c +++ b/migration/postcopy-ram.c @@ -1083,6 +1083,8 @@ retry: int postcopy_ram_enable_notify(MigrationIncomingState *mis) { +Error *local_err = NULL; + /* Open the fd for the kernel to give us userfaults */ mis->userfault_fd = syscall(__NR_userfaultfd, O_CLOEXEC | O_NONBLOCK); if (mis->userfault_fd == -1) { @@ -1109,10 +,16 @@ int postcopy_ram_enable_notify(MigrationIncomingState *mis) } qemu_sem_init(&mis->fault_thread_sem, 0); -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&mis->fault_thre
[Qemu-devel] [PATCH v11 for-4.0 11/11] qemu_thread: supplement error handling for touch_all_pages
From: Fei Li Supplement the error handling for touch_all_pages: add an Error parameter for it to propagate the error to its caller to do the handling in case it fails. Cc: Markus Armbruster Signed-off-by: Fei Li --- util/oslib-posix.c | 26 -- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/util/oslib-posix.c b/util/oslib-posix.c index b6c2ee270d..b4dd3d8970 100644 --- a/util/oslib-posix.c +++ b/util/oslib-posix.c @@ -435,7 +435,7 @@ static inline int get_memset_num_threads(int smp_cpus) } static bool touch_all_pages(char *area, size_t hpagesize, size_t numpages, -int smp_cpus) +int smp_cpus, Error **errp) { size_t numpages_per_thread; size_t size_per_thread; @@ -452,20 +452,29 @@ static bool touch_all_pages(char *area, size_t hpagesize, size_t numpages, memset_thread[i].numpages = (i == (memset_num_threads - 1)) ? numpages : numpages_per_thread; memset_thread[i].hpagesize = hpagesize; -/* TODO: let the callers handle the error instead of abort() here */ -qemu_thread_create(&memset_thread[i].pgthread, "touch_pages", - do_touch_pages, &memset_thread[i], - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&memset_thread[i].pgthread, "touch_pages", + do_touch_pages, &memset_thread[i], + QEMU_THREAD_JOINABLE, errp) < 0) { +memset_thread_failed = true; +break; +} addr += size_per_thread; numpages -= numpages_per_thread; } + +memset_num_threads = i; for (i = 0; i < memset_num_threads; i++) { qemu_thread_join(&memset_thread[i].pgthread); } g_free(memset_thread); memset_thread = NULL; -return memset_thread_failed; +if (memset_thread_failed) { +error_append_hint(errp, "os_mem_prealloc: Insufficient free host " + "memory pages available to allocate guest RAM"); +return false; +} +return true; } void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus, @@ -488,10 +497,7 @@ void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus, } /* touch pages simultaneously */ -if (touch_all_pages(area, hpagesize, numpages, smp_cpus)) { -error_setg(errp, "os_mem_prealloc: Insufficient free host memory " -"pages available to allocate guest RAM"); -} +touch_all_pages(area, hpagesize, numpages, smp_cpus, errp); ret = sigaction(SIGBUS, &oldact, NULL); if (ret) { -- 2.17.2 (Apple Git-113)
[Qemu-devel] [PATCH v11 for-4.0 09/11] qemu_thread: supplement error handling for migration
From: Fei Li Update qemu_thread_create()'s callers by - setting an error on qemu_thread_create() failure for callers that set an error on failure; - reporting the error and returning failure for callers that return an error code on failure; - reporting the error and setting some state for callers that just report errors and choose not to continue on. Besides, make compress_threads_save_cleanup() cope with partially initialized comp_param[i] to adapt to the new qemu_thread_create() failure case. Cc: Markus Armbruster Cc: Dr. David Alan Gilbert Signed-off-by: Fei Li Reviewed-by: Dr. David Alan Gilbert --- migration/migration.c| 35 +--- migration/postcopy-ram.c | 16 ++--- migration/ram.c | 70 ++-- migration/savevm.c | 12 --- 4 files changed, 89 insertions(+), 44 deletions(-) diff --git a/migration/migration.c b/migration/migration.c index 1da71211c8..0034ca1334 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -447,10 +447,13 @@ static void process_incoming_migration_co(void *opaque) goto fail; } -/* TODO: let the further caller handle the error instead of abort() */ -qemu_thread_create(&mis->colo_incoming_thread, "COLO incoming", - colo_process_incoming_thread, mis, - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&mis->colo_incoming_thread, "COLO incoming", + colo_process_incoming_thread, mis, + QEMU_THREAD_JOINABLE, &local_err) < 0) { +error_reportf_err(local_err, "failed to create " + "colo_process_incoming_thread: "); +goto fail; +} mis->have_colo_incoming_thread = true; qemu_coroutine_yield(); @@ -2349,6 +2352,7 @@ out: static int open_return_path_on_source(MigrationState *ms, bool create_thread) { +Error *local_err = NULL; ms->rp_state.from_dst_file = qemu_file_get_return_path(ms->to_dst_file); if (!ms->rp_state.from_dst_file) { @@ -2362,10 +2366,15 @@ static int open_return_path_on_source(MigrationState *ms, return 0; } -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&ms->rp_state.rp_thread, "return path", - source_return_path_thread, ms, - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&ms->rp_state.rp_thread, "return path", + source_return_path_thread, ms, + QEMU_THREAD_JOINABLE, &local_err) < 0) { +error_reportf_err(local_err, + "failed to create source_return_path_thread: "); +qemu_fclose(ms->rp_state.from_dst_file); +ms->rp_state.from_dst_file = NULL; +return -1; + } trace_open_return_path_on_source_continue(); @@ -3201,9 +3210,13 @@ void migrate_fd_connect(MigrationState *s, Error *error_in) migrate_fd_cleanup(s); return; } -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&s->thread, "live_migration", migration_thread, s, - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&s->thread, "live_migration", migration_thread, s, + QEMU_THREAD_JOINABLE, &error_in) < 0) { +error_reportf_err(error_in, "failed to create migration_thread: "); +migrate_set_state(&s->state, s->state, MIGRATION_STATUS_FAILED); +migrate_fd_cleanup(s); +return; +} s->migration_thread_running = true; } diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c index 221ea24919..0934a1403a 100644 --- a/migration/postcopy-ram.c +++ b/migration/postcopy-ram.c @@ -1083,6 +1083,8 @@ retry: int postcopy_ram_enable_notify(MigrationIncomingState *mis) { +Error *local_err = NULL; + /* Open the fd for the kernel to give us userfaults */ mis->userfault_fd = syscall(__NR_userfaultfd, O_CLOEXEC | O_NONBLOCK); if (mis->userfault_fd == -1) { @@ -1109,10 +,16 @@ int postcopy_ram_enable_notify(MigrationIncomingState *mis) } qemu_sem_init(&mis->fault_thread_sem, 0); -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&mis->fault_thread, "postcopy/fault", - postcopy_ram_fault_thread, mis, - QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&mis->fault_thread, "postcopy/fault", + postcopy_ram_fault_thread, mis, + QEMU_THREAD_JOINABLE, &local_err) < 0) { +error_reportf_err(local_err, + "failed to create postcopy_ram_fault_thread: "); +close(mis->us
Re: [Qemu-devel] [PATCH v2 1/5] virtio-blk: add acct_failed param to virtio_blk_handle_rw_error()
On Thu, Jan 31, 2019 at 04:19:10PM +0100, Stefano Garzarella wrote: > We add acct_failed param in order to use virtio_blk_handle_rw_error() > also when is not required to call block_acct_failed(). (eg. a discard > operation is failed) > > Signed-off-by: Stefano Garzarella > --- > hw/block/virtio-blk.c | 10 ++ > 1 file changed, 6 insertions(+), 4 deletions(-) Reviewed-by: Stefan Hajnoczi signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH v5 2/8] target/ppc: rework vmrg{l, h}{b, h, w} instructions to use Vsr* macros
On 1/30/19 12:36 PM, Mark Cave-Ayland wrote: > The current implementations make use of the endian-specific macros MRGLO/MRGHI > and also reference HI_IDX and LO_IDX directly to calculate array offsets. > > Rework the implementation to use the Vsr* macros so that these per-endian > references can be removed. > > Signed-off-by: Mark Cave-Ayland > --- > target/ppc/int_helper.c | 54 > + > 1 file changed, 19 insertions(+), 35 deletions(-) Reviewed-by: Richard Henderson r~
[Qemu-devel] [PATCH v11 for-4.0 06/11] qemu_thread: supplement error handling for emulated_realize
From: Fei Li Utilize the existed errp to propagate the error and do the corresponding cleanup to replace the temporary &error_abort. Cc: Markus Armbruster Cc: Gerd Hoffmann Signed-off-by: Fei Li --- hw/usb/ccid-card-emulated.c | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index 0b170f6328..19b4b9a8fa 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -544,11 +544,16 @@ static void emulated_realize(CCIDCardState *base, Error **errp) error_setg(errp, "%s: failed to initialize vcard", TYPE_EMULATED_CCID); goto out2; } -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&card->event_thread_id, "ccid/event", event_thread, - card, QEMU_THREAD_JOINABLE, &error_abort); -qemu_thread_create(&card->apdu_thread_id, "ccid/apdu", handle_apdu_thread, - card, QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&card->event_thread_id, "ccid/event", event_thread, + card, QEMU_THREAD_JOINABLE, errp) < 0) { +goto out2; +} +if (qemu_thread_create(&card->apdu_thread_id, "ccid/apdu", + handle_apdu_thread, card, + QEMU_THREAD_JOINABLE, errp) < 0) { +qemu_thread_join(&card->event_thread_id); +goto out2; +} return; -- 2.17.2 (Apple Git-113)
Re: [Qemu-devel] [PATCH 00/18] Acceptance Tests: target architecture support
>> I think, the term "arch" is a little problematic in QEMU parlance. IMHO, >> "target" should be used instead. ("arch" is used in Linux kernel community) > Naming things is hard, so this is a valid discussion. But, I have to > say that I also find "arch" in this context to be descriptive enough. This is not a "naming" problem, but a fundamental terminology convention used in QEMU. I am truly dissapointed that you chose to disrespect it. Aleksandar
[Qemu-devel] [PATCH v11 for-4.0 00/11] qemu_thread_create: propagate the error to callers to handle
Hi, This idea comes from BiteSizedTasks, and this patch series implement the error checking of qemu_thread_create: make qemu_thread_create return a flag to indicate if it succeeded rather than failing with an error; make all callers check it. The first patch modifies the qemu_thread_create() by passing &error_abort and returing a value to indicate if it succeeds. The next 10 patches will improve on &error_abort for callers who could handle more properly. Please help to review, thanks a lot! v11: - Resend as I sent the last version in a mess.. v10: - Make qemu_thread_create() return -errno instead of a Boolean. - Add more cleanup for pci_edu_realize()/emulated_realize(). - Polish for iothread_complete()/compress_threads_save_cleanup()/ vnc_start_worker_thread()/touch_all_pages. - Change to return H_HARDWARE for h_resize_hpt_prepare(). - Remove five derivative patches as they have been merged. v9: - To ease the review and involve the appropriate maintainers, split the previous 6/7 patch into 10 patches: the 6/16 patch passes the &error_abort to qemu_thread_create() everywhere, and the next 9 patches will improve on &error_abort for callers who need. - Add a new patch 5/7 to unify error handling for process_incoming_migration_co(). - Merge the previous 2/7 to current 7/16 to collaboratively handle for qemu_X_start_vcpu and for the qemu_init_vpcu in each arch. - Add comment for multifd_recv_new_channel() in current patch 2/7. v8: - Remove previous two patches trying to fix the multifd issue on the source side, as we are still waiting for maintainer's opinions. - Use atomic_read to get multifd_recv_state->count in patch 3/7. - Get three more "Reviewed-by:". v7: - Split the previous multifd-migration into two patches: the src and the dst. For the dst, only dump the error instead of quitting. - Safely do the cleanup for postcopy_ram_enable_notify(). - Split the previous migration-error-handling patch into two patches. v6: - Add a new migration-multifd related patch. BTW, delete the previous vnc related patch as it has been upstreamed. - Use error_setg_errno() to set the errno when qemu_thread_create() fails for both Linux and Windows implementation. - Optimize the first patch, less codes are needed v5: - Remove `errno = err` in qemu_thread_create() for Linux, and change `return errno` to `return -1` in qemu_signal_init() to indicate the error in case qemu_thread_create() fails. - Delete the v4-added qemu_cond/mutex_destroy() in iothread_complete() as the destroy() will be done by its callers' object_unref(). v4: - Separate the migration compression patch from this series - Add one more error handling patch related with migration - Add more cleaning up code for touched functions v3: - Add two migration related patches to fix the segmentaion fault - Extract the segmentation fault fix from v2's last patch to be a separate patch v2: - Pass errp straightly instead of using a local_err & error_propagate - Return a bool: false/true to indicate if one function succeeds - Merge v1's last two patches into one to avoid the compile error - Fix one omitted error in patch1 and update some error messages Fei Li (11): qemu_thread: make qemu_thread_create() take Error ** argument qemu_thread: supplement error handling for qemu_X_start_vcpu qemu_thread: supplement error handling for qmp_dump_guest_memory qemu_thread: supplement error handling for pci_edu_realize qemu_thread: supplement error handling for h_resize_hpt_prepare qemu_thread: supplement error handling for emulated_realize qemu_thread: supplement error handling for iothread_complete qemu_thread: supplement error handling for qemu_signalfd_compat qemu_thread: supplement error handling for migration qemu_thread: supplement error handling for vnc_start_worker_thread qemu_thread: supplement error handling for touch_all_pages accel/tcg/user-exec-stub.c | 3 +- cpus.c | 69 - dump.c | 2 +- hw/misc/edu.c | 11 +- hw/ppc/spapr_hcall.c| 10 - hw/rdma/rdma_backend.c | 3 +- hw/usb/ccid-card-emulated.c | 14 +-- include/qemu/thread.h | 6 +-- include/qom/cpu.h | 2 +- io/task.c | 3 +- iothread.c | 18 ++--- migration/migration.c | 30 +++--- migration/postcopy-ram.c| 14 ++- migration/ram.c | 66 +-- migration/savevm.c | 11 -- target/alpha/cpu.c | 4 +- target/arm/cpu.c| 4 +- target/cris/cpu.c | 4 +- target/hppa/cpu.c | 4 +- target/i386/cpu.c | 4 +- target/lm32/cpu.c | 4 +- target/m68k/cpu.c | 4 +- target/microblaze/cpu.c | 4 +- target/mips/cpu.c | 4 +- target/moxie/cpu
[Qemu-devel] [PATCH v11 for-4.0 01/11] qemu_thread: make qemu_thread_create() take Error ** argument
From: Fei Li qemu_thread_create() abort()s on error. Not nice. Give it a return value and an Error ** argument, so it can return success/failure. Considering qemu_thread_create() is quite widely used in qemu, split this into two steps: this patch passes the &error_abort to qemu_thread_create() everywhere, and the next 10 patches will improve on &error_abort for callers who need. To differentiate callers who need the improvement, temporarily add the "TODO:" comment for them. Cc: Markus Armbruster Cc: Paolo Bonzini Signed-off-by: Fei Li --- cpus.c | 23 +++ dump.c | 3 ++- hw/misc/edu.c | 4 +++- hw/ppc/spapr_hcall.c| 4 +++- hw/rdma/rdma_backend.c | 3 ++- hw/usb/ccid-card-emulated.c | 5 +++-- include/qemu/thread.h | 6 +++--- io/task.c | 3 ++- iothread.c | 3 ++- migration/migration.c | 11 --- migration/postcopy-ram.c| 4 +++- migration/ram.c | 12 migration/savevm.c | 3 ++- tests/atomic_add-bench.c| 3 ++- tests/iothread.c| 2 +- tests/qht-bench.c | 3 ++- tests/rcutorture.c | 3 ++- tests/test-aio.c| 2 +- tests/test-rcu-list.c | 3 ++- ui/vnc-jobs.c | 6 -- util/compatfd.c | 6 -- util/oslib-posix.c | 3 ++- util/qemu-thread-posix.c| 30 +++--- util/qemu-thread-win32.c| 13 ++--- util/rcu.c | 3 ++- util/thread-pool.c | 4 +++- 26 files changed, 114 insertions(+), 51 deletions(-) diff --git a/cpus.c b/cpus.c index b09b702712..843a0f06a2 100644 --- a/cpus.c +++ b/cpus.c @@ -1961,15 +1961,17 @@ static void qemu_tcg_init_vcpu(CPUState *cpu) snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", cpu->cpu_index); +/* TODO: let the callers handle the error instead of abort() here */ qemu_thread_create(cpu->thread, thread_name, qemu_tcg_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE); + cpu, QEMU_THREAD_JOINABLE, &error_abort); } else { /* share a single thread for all cpus with TCG */ snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "ALL CPUs/TCG"); +/* TODO: let the callers handle the error instead of abort() here */ qemu_thread_create(cpu->thread, thread_name, qemu_tcg_rr_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE); + cpu, QEMU_THREAD_JOINABLE, &error_abort); single_tcg_halt_cond = cpu->halt_cond; single_tcg_cpu_thread = cpu->thread; @@ -1997,8 +1999,9 @@ static void qemu_hax_start_vcpu(CPUState *cpu) snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/HAX", cpu->cpu_index); +/* TODO: let the further caller handle the error instead of abort() here */ qemu_thread_create(cpu->thread, thread_name, qemu_hax_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE); + cpu, QEMU_THREAD_JOINABLE, &error_abort); #ifdef _WIN32 cpu->hThread = qemu_thread_get_handle(cpu->thread); #endif @@ -2013,8 +2016,9 @@ static void qemu_kvm_start_vcpu(CPUState *cpu) qemu_cond_init(cpu->halt_cond); snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/KVM", cpu->cpu_index); +/* TODO: let the further caller handle the error instead of abort() here */ qemu_thread_create(cpu->thread, thread_name, qemu_kvm_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE); + cpu, QEMU_THREAD_JOINABLE, &error_abort); } static void qemu_hvf_start_vcpu(CPUState *cpu) @@ -2031,8 +2035,9 @@ static void qemu_hvf_start_vcpu(CPUState *cpu) snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/HVF", cpu->cpu_index); +/* TODO: let the further caller handle the error instead of abort() here */ qemu_thread_create(cpu->thread, thread_name, qemu_hvf_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE); + cpu, QEMU_THREAD_JOINABLE, &error_abort); } static void qemu_whpx_start_vcpu(CPUState *cpu) @@ -2044,8 +2049,9 @@ static void qemu_whpx_start_vcpu(CPUState *cpu) qemu_cond_init(cpu->halt_cond); snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/WHPX", cpu->cpu_index); +/* TODO: let the further caller handle the error instead of abort() here */ qemu_thread_create(cpu->thread, thread_name, qemu_whpx_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE); + cpu, QEMU_THREAD_JOINABLE, &error_abort); #ifdef _WIN32 cpu->hThread = qemu_thread_get_handle(cpu->thread); #endif @@ -2060,8 +2066,9 @@ static void qemu_dummy_start_vcp
[Qemu-devel] [PATCH v11 for-4.0 08/11] qemu_thread: supplement error handling for qemu_signalfd_compat
From: Fei Li For qemu_signalfd_compat: set errno, do some cleanup, and return -1 to replace the temporary &error_abort when failing to create sigwait_compat. Cc: Markus Armbruster Cc: Eric Blake Signed-off-by: Fei Li --- util/compatfd.c | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/util/compatfd.c b/util/compatfd.c index c3d8448264..9d642475fc 100644 --- a/util/compatfd.c +++ b/util/compatfd.c @@ -71,6 +71,7 @@ static int qemu_signalfd_compat(const sigset_t *mask) struct sigfd_compat_info *info; QemuThread thread; int fds[2]; +int ret; info = malloc(sizeof(*info)); if (info == NULL) { @@ -89,9 +90,15 @@ static int qemu_signalfd_compat(const sigset_t *mask) memcpy(&info->mask, mask, sizeof(*mask)); info->fd = fds[1]; -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&thread, "signalfd_compat", sigwait_compat, - info, QEMU_THREAD_DETACHED, &error_abort); +ret = qemu_thread_create(&thread, "signalfd_compat", sigwait_compat, + info, QEMU_THREAD_DETACHED, NULL); +if (ret < 0) { +close(fds[0]); +close(fds[1]); +free(info); +errno = -ret; +return -1; +} return fds[0]; } -- 2.17.2 (Apple Git-113)
[Qemu-devel] [PATCH v11 for-4.0 05/11] qemu_thread: supplement error handling for h_resize_hpt_prepare
From: Fei Li Add a local_err to hold the error, and return the corresponding error code to replace the temporary &error_abort. Cc: Markus Armbruster Cc: David Gibson Signed-off-by: Fei Li Acked-by: David Gibson --- hw/ppc/spapr_hcall.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index bee2895b94..5ef73bef0e 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -478,6 +478,7 @@ static target_ulong h_resize_hpt_prepare(PowerPCCPU *cpu, sPAPRPendingHPT *pending = spapr->pending_hpt; uint64_t current_ram_size; int rc; +Error *local_err = NULL; if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED) { return H_AUTHORITY; @@ -538,10 +539,13 @@ static target_ulong h_resize_hpt_prepare(PowerPCCPU *cpu, pending->shift = shift; pending->ret = H_HARDWARE; -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&pending->thread, "sPAPR HPT prepare", - hpt_prepare_thread, pending, - QEMU_THREAD_DETACHED, &error_abort); +if (qemu_thread_create(&pending->thread, "sPAPR HPT prepare", + hpt_prepare_thread, pending, + QEMU_THREAD_DETACHED, &local_err) < 0) { +error_reportf_err(local_err, "failed to create hpt_prepare_thread: "); +g_free(pending); +return H_HARDWARE; +} spapr->pending_hpt = pending; -- 2.17.2 (Apple Git-113)
[Qemu-devel] [PATCH v11 for-4.0 03/11] qemu_thread: supplement error handling for qmp_dump_guest_memory
From: Fei Li Utilize the existed errp to propagate the error instead of the temporary &error_abort. Cc: Markus Armbruster Cc: Marc-André Lureau Signed-off-by: Fei Li --- dump.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/dump.c b/dump.c index e4886bc9c3..92cc277015 100644 --- a/dump.c +++ b/dump.c @@ -2020,9 +2020,8 @@ void qmp_dump_guest_memory(bool paging, const char *file, if (detach_p) { /* detached dump */ s->detached = true; -/* TODO: let the further caller handle the error instead of abort() */ qemu_thread_create(&s->dump_thread, "dump_thread", dump_thread, - s, QEMU_THREAD_DETACHED, &error_abort); + s, QEMU_THREAD_DETACHED, errp); } else { /* sync dump */ dump_process(s, errp); -- 2.17.2 (Apple Git-113)
[Qemu-devel] [PATCH v11 for-4.0 07/11] qemu_thread: supplement error handling for iothread_complete
From: Fei Li For iothread_complete: utilize the existed errp to propagate the error and do the corresponding cleanup to replace the temporary &error_abort. Cc: Markus Armbruster Cc: Stefan Hajnoczi Cc: Eric Blake Signed-off-by: Fei Li --- iothread.c | 19 +-- 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/iothread.c b/iothread.c index 8e8aa01999..ea2e553dc5 100644 --- a/iothread.c +++ b/iothread.c @@ -148,6 +148,7 @@ static void iothread_complete(UserCreatable *obj, Error **errp) Error *local_error = NULL; IOThread *iothread = IOTHREAD(obj); char *name, *thread_name; +int thread_ok; iothread->stopping = false; iothread->running = true; @@ -164,9 +165,7 @@ static void iothread_complete(UserCreatable *obj, Error **errp) &local_error); if (local_error) { error_propagate(errp, local_error); -aio_context_unref(iothread->ctx); -iothread->ctx = NULL; -return; +goto fail; } qemu_mutex_init(&iothread->init_done_lock); @@ -178,11 +177,15 @@ static void iothread_complete(UserCreatable *obj, Error **errp) */ name = object_get_canonical_path_component(OBJECT(obj)); thread_name = g_strdup_printf("IO %s", name); -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&iothread->thread, thread_name, iothread_run, - iothread, QEMU_THREAD_JOINABLE, &error_abort); +thread_ok = qemu_thread_create(&iothread->thread, thread_name, iothread_run, + iothread, QEMU_THREAD_JOINABLE, errp); g_free(thread_name); g_free(name); +if (thread_ok < 0) { +qemu_cond_destroy(&iothread->init_done_cond); +qemu_mutex_destroy(&iothread->init_done_lock); +goto fail; +} /* Wait for initialization to complete */ qemu_mutex_lock(&iothread->init_done_lock); @@ -191,6 +194,10 @@ static void iothread_complete(UserCreatable *obj, Error **errp) &iothread->init_done_lock); } qemu_mutex_unlock(&iothread->init_done_lock); +return; +fail: +aio_context_unref(iothread->ctx); +iothread->ctx = NULL; } typedef struct { -- 2.17.2 (Apple Git-113)
[Qemu-devel] [PATCH v11 for-4.0 10/11] qemu_thread: supplement error handling for vnc_start_worker_thread
From: Fei Li Supplement the error handling for vnc_thread_worker_thread: add an Error parameter for it to propagate the error to its caller to handle in case it fails, and make it return a Boolean to indicate whether it succeeds. Cc: Markus Armbruster Cc: Gerd Hoffmann Signed-off-by: Fei Li --- ui/vnc-jobs.c | 17 +++-- ui/vnc-jobs.h | 2 +- ui/vnc.c | 4 +++- 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/ui/vnc-jobs.c b/ui/vnc-jobs.c index 5712f1f501..1371895513 100644 --- a/ui/vnc-jobs.c +++ b/ui/vnc-jobs.c @@ -332,16 +332,21 @@ static bool vnc_worker_thread_running(void) return queue; /* Check global queue */ } -void vnc_start_worker_thread(void) +bool vnc_start_worker_thread(Error **errp) { VncJobQueue *q; -if (vnc_worker_thread_running()) -return ; +if (vnc_worker_thread_running()) { +return true; +} q = vnc_queue_init(); -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&q->thread, "vnc_worker", vnc_worker_thread, - q, QEMU_THREAD_DETACHED, &error_abort); +if (qemu_thread_create(&q->thread, "vnc_worker", vnc_worker_thread, + q, QEMU_THREAD_DETACHED, errp) < 0) { +vnc_queue_clear(q); +return false; +} queue = q; /* Set global queue */ + +return true; } diff --git a/ui/vnc-jobs.h b/ui/vnc-jobs.h index 59f66bcc35..14640593db 100644 --- a/ui/vnc-jobs.h +++ b/ui/vnc-jobs.h @@ -37,7 +37,7 @@ void vnc_job_push(VncJob *job); void vnc_jobs_join(VncState *vs); void vnc_jobs_consume_buffer(VncState *vs); -void vnc_start_worker_thread(void); +bool vnc_start_worker_thread(Error **errp); /* Locks */ static inline int vnc_trylock_display(VncDisplay *vd) diff --git a/ui/vnc.c b/ui/vnc.c index 6002d09407..2ab920f1a7 100644 --- a/ui/vnc.c +++ b/ui/vnc.c @@ -3255,7 +3255,9 @@ void vnc_display_init(const char *id, Error **errp) vd->connections_limit = 32; qemu_mutex_init(&vd->mutex); -vnc_start_worker_thread(); +if (!vnc_start_worker_thread(errp)) { +return; +} vd->dcl.ops = &dcl_ops; register_displaychangelistener(&vd->dcl); -- 2.17.2 (Apple Git-113)
[Qemu-devel] [PATCH v11 for-4.0 04/11] qemu_thread: supplement error handling for pci_edu_realize
From: Fei Li Utilize the existed errp to propagate the error and do the corresponding cleanup to replace the temporary &error_abort. Cc: Markus Armbruster Cc: Jiri Slaby Signed-off-by: Fei Li --- hw/misc/edu.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/hw/misc/edu.c b/hw/misc/edu.c index 21adbfddce..8fe232b6d6 100644 --- a/hw/misc/edu.c +++ b/hw/misc/edu.c @@ -356,9 +356,14 @@ static void pci_edu_realize(PCIDevice *pdev, Error **errp) qemu_mutex_init(&edu->thr_mutex); qemu_cond_init(&edu->thr_cond); -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(&edu->thread, "edu", edu_fact_thread, - edu, QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(&edu->thread, "edu", edu_fact_thread, + edu, QEMU_THREAD_JOINABLE, errp) < 0) { +qemu_cond_destroy(&edu->thr_cond); +qemu_mutex_destroy(&edu->thr_mutex); +timer_del(&edu->dma_timer); +msi_uninit(pdev); +return; +} memory_region_init_io(&edu->mmio, OBJECT(edu), &edu_mmio_ops, edu, "edu-mmio", 1 * MiB); -- 2.17.2 (Apple Git-113)
[Qemu-devel] [PATCH v11 for-4.0 02/11] qemu_thread: supplement error handling for qemu_X_start_vcpu
From: Fei Li The callers of qemu_init_vcpu() already passed the **errp to handle errors. In view of this, add a new Error parameter to qemu_init_vcpu() and all qemu_X_start_vcpu() functions called by qemu_init_vcpu() to propagate the error and let the further callers check it. Besides, make qemu_init_vcpu() return a Boolean value to let its callers know whether it succeeds. Cc: Paolo Bonzini Signed-off-by: Fei Li Reviewed-by: Fam Zheng Reviewed-by: Juan Quintela --- accel/tcg/user-exec-stub.c | 3 +- cpus.c | 74 +++-- include/qom/cpu.h | 2 +- target/alpha/cpu.c | 4 +- target/arm/cpu.c| 4 +- target/cris/cpu.c | 4 +- target/hppa/cpu.c | 4 +- target/i386/cpu.c | 4 +- target/lm32/cpu.c | 4 +- target/m68k/cpu.c | 4 +- target/microblaze/cpu.c | 4 +- target/mips/cpu.c | 4 +- target/moxie/cpu.c | 4 +- target/nios2/cpu.c | 4 +- target/openrisc/cpu.c | 4 +- target/ppc/translate_init.inc.c | 4 +- target/riscv/cpu.c | 4 +- target/s390x/cpu.c | 4 +- target/sh4/cpu.c| 4 +- target/sparc/cpu.c | 4 +- target/tilegx/cpu.c | 4 +- target/tricore/cpu.c| 4 +- target/unicore32/cpu.c | 4 +- target/xtensa/cpu.c | 4 +- 24 files changed, 108 insertions(+), 55 deletions(-) diff --git a/accel/tcg/user-exec-stub.c b/accel/tcg/user-exec-stub.c index a32b4496af..f8c38a375c 100644 --- a/accel/tcg/user-exec-stub.c +++ b/accel/tcg/user-exec-stub.c @@ -10,8 +10,9 @@ void cpu_resume(CPUState *cpu) { } -void qemu_init_vcpu(CPUState *cpu) +bool qemu_init_vcpu(CPUState *cpu, Error **errp) { +return true; } /* User mode emulation does not support record/replay yet. */ diff --git a/cpus.c b/cpus.c index 843a0f06a2..4ed7d62e58 100644 --- a/cpus.c +++ b/cpus.c @@ -1931,7 +1931,7 @@ void cpu_remove_sync(CPUState *cpu) /* For temporary buffers for forming a name */ #define VCPU_THREAD_NAME_SIZE 16 -static void qemu_tcg_init_vcpu(CPUState *cpu) +static void qemu_tcg_init_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; static QemuCond *single_tcg_halt_cond; @@ -1961,17 +1961,20 @@ static void qemu_tcg_init_vcpu(CPUState *cpu) snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", cpu->cpu_index); -/* TODO: let the callers handle the error instead of abort() here */ -qemu_thread_create(cpu->thread, thread_name, qemu_tcg_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(cpu->thread, thread_name, + qemu_tcg_cpu_thread_fn, cpu, + QEMU_THREAD_JOINABLE, errp) < 0) { +return; +} } else { /* share a single thread for all cpus with TCG */ snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "ALL CPUs/TCG"); -/* TODO: let the callers handle the error instead of abort() here */ -qemu_thread_create(cpu->thread, thread_name, - qemu_tcg_rr_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(cpu->thread, thread_name, + qemu_tcg_rr_cpu_thread_fn, cpu, + QEMU_THREAD_JOINABLE, errp) < 0) { +return; +} single_tcg_halt_cond = cpu->halt_cond; single_tcg_cpu_thread = cpu->thread; @@ -1989,7 +1992,7 @@ static void qemu_tcg_init_vcpu(CPUState *cpu) } } -static void qemu_hax_start_vcpu(CPUState *cpu) +static void qemu_hax_start_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; @@ -1999,15 +2002,16 @@ static void qemu_hax_start_vcpu(CPUState *cpu) snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/HAX", cpu->cpu_index); -/* TODO: let the further caller handle the error instead of abort() here */ -qemu_thread_create(cpu->thread, thread_name, qemu_hax_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE, &error_abort); +if (qemu_thread_create(cpu->thread, thread_name, qemu_hax_cpu_thread_fn, + cpu, QEMU_THREAD_JOINABLE, errp) < 0) { +return; +} #ifdef _WIN32 cpu->hThread = qemu_thread_get_handle(cpu->thread); #endif } -static void qemu_kvm_start_vcpu(CPUState *cpu) +static void qemu_kvm_start_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; @@ -2016,12 +2020,11 @@ static void qemu_kvm_start_vcpu(CPUState *cpu) qemu_cond_init(cpu->halt_cond); snprintf(thread_nam
Re: [Qemu-devel] [PATCH v2 5/5] tests/virtio-blk: add test for WRITE_ZEROES command
On Thu, Jan 31, 2019 at 04:19:14PM +0100, Stefano Garzarella wrote: > If the WRITE_ZEROES feature is enabled, we check this command > in the test_basic(). > > Signed-off-by: Stefano Garzarella > --- > tests/virtio-blk-test.c | 60 + > 1 file changed, 60 insertions(+) Reviewed-by: Stefan Hajnoczi signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH v11 for-4.0 00/11] qemu_thread_create: propagate the error to callers to handle
Sorry again! Please omit this email. It seems there's something wrong with my send-email.. :( Have a nice day Fei 在 2019/2/1 下午1:09, Fei Li 写道: Hi, This idea comes from BiteSizedTasks, and this patch series implement the error checking of qemu_thread_create: make qemu_thread_create return a flag to indicate if it succeeded rather than failing with an error; make all callers check it. The first patch modifies the qemu_thread_create() by passing &error_abort and returing a value to indicate if it succeeds. The next 10 patches will improve on &error_abort for callers who could handle more properly. Please help to review, thanks a lot! v11: - Resend as I sent the last version in a mess.. v10: - Make qemu_thread_create() return -errno instead of a Boolean. - Add more cleanup for pci_edu_realize()/emulated_realize(). - Polish for iothread_complete()/compress_threads_save_cleanup()/ vnc_start_worker_thread()/touch_all_pages. - Change to return H_HARDWARE for h_resize_hpt_prepare(). - Remove five derivative patches as they have been merged. v9: - To ease the review and involve the appropriate maintainers, split the previous 6/7 patch into 10 patches: the 6/16 patch passes the &error_abort to qemu_thread_create() everywhere, and the next 9 patches will improve on &error_abort for callers who need. - Add a new patch 5/7 to unify error handling for process_incoming_migration_co(). - Merge the previous 2/7 to current 7/16 to collaboratively handle for qemu_X_start_vcpu and for the qemu_init_vpcu in each arch. - Add comment for multifd_recv_new_channel() in current patch 2/7. v8: - Remove previous two patches trying to fix the multifd issue on the source side, as we are still waiting for maintainer's opinions. - Use atomic_read to get multifd_recv_state->count in patch 3/7. - Get three more "Reviewed-by:". v7: - Split the previous multifd-migration into two patches: the src and the dst. For the dst, only dump the error instead of quitting. - Safely do the cleanup for postcopy_ram_enable_notify(). - Split the previous migration-error-handling patch into two patches. v6: - Add a new migration-multifd related patch. BTW, delete the previous vnc related patch as it has been upstreamed. - Use error_setg_errno() to set the errno when qemu_thread_create() fails for both Linux and Windows implementation. - Optimize the first patch, less codes are needed v5: - Remove `errno = err` in qemu_thread_create() for Linux, and change `return errno` to `return -1` in qemu_signal_init() to indicate the error in case qemu_thread_create() fails. - Delete the v4-added qemu_cond/mutex_destroy() in iothread_complete() as the destroy() will be done by its callers' object_unref(). v4: - Separate the migration compression patch from this series - Add one more error handling patch related with migration - Add more cleaning up code for touched functions v3: - Add two migration related patches to fix the segmentaion fault - Extract the segmentation fault fix from v2's last patch to be a separate patch v2: - Pass errp straightly instead of using a local_err & error_propagate - Return a bool: false/true to indicate if one function succeeds - Merge v1's last two patches into one to avoid the compile error - Fix one omitted error in patch1 and update some error messages Fei Li (11): qemu_thread: make qemu_thread_create() take Error ** argument qemu_thread: supplement error handling for qemu_X_start_vcpu qemu_thread: supplement error handling for qmp_dump_guest_memory qemu_thread: supplement error handling for pci_edu_realize qemu_thread: supplement error handling for h_resize_hpt_prepare qemu_thread: supplement error handling for emulated_realize qemu_thread: supplement error handling for iothread_complete qemu_thread: supplement error handling for qemu_signalfd_compat qemu_thread: supplement error handling for migration qemu_thread: supplement error handling for vnc_start_worker_thread qemu_thread: supplement error handling for touch_all_pages accel/tcg/user-exec-stub.c | 3 +- cpus.c | 69 - dump.c | 2 +- hw/misc/edu.c | 11 +- hw/ppc/spapr_hcall.c| 10 - hw/rdma/rdma_backend.c | 3 +- hw/usb/ccid-card-emulated.c | 14 +-- include/qemu/thread.h | 6 +-- include/qom/cpu.h | 2 +- io/task.c | 3 +- iothread.c | 18 ++--- migration/migration.c | 30 +++--- migration/postcopy-ram.c| 14 ++- migration/ram.c | 66 +-- migration/savevm.c | 11 -- target/alpha/cpu.c | 4 +- target/arm/cpu.c| 4 +- target/cris/cpu.c | 4 +- target/hppa/cpu.c | 4 +- target/i386/cpu.c
Re: [Qemu-devel] [PATCH v2 4/5] tests/virtio-blk: change assert on data_size in virtio_blk_request()
On Thu, Jan 31, 2019 at 04:19:13PM +0100, Stefano Garzarella wrote: > The size of data in the virtio_blk_request must be a multiple > of 512 bytes for IN and OUT requests, or a multiple of the size > of struct virtio_blk_discard_write_zeroes for DISCARD and > WRITE_ZEROES requests. > > Signed-off-by: Stefano Garzarella > --- > tests/virtio-blk-test.c | 15 ++- > 1 file changed, 14 insertions(+), 1 deletion(-) Reviewed-by: Stefan Hajnoczi signature.asc Description: PGP signature
[Qemu-devel] [PATCH v11 for-4.0 00/11] qemu_thread_create: propagate the error to callers to handle
Hi, This idea comes from BiteSizedTasks, and this patch series implement the error checking of qemu_thread_create: make qemu_thread_create return a flag to indicate if it succeeded rather than failing with an error; make all callers check it. The first patch modifies the qemu_thread_create() by passing &error_abort and returing a value to indicate if it succeeds. The next 10 patches will improve on &error_abort for callers who could handle more properly. Please help to review, thanks a lot! v11: - Resend as I sent the last version in a mess.. v10: - Make qemu_thread_create() return -errno instead of a Boolean. - Add more cleanup for pci_edu_realize()/emulated_realize(). - Polish for iothread_complete()/compress_threads_save_cleanup()/ vnc_start_worker_thread()/touch_all_pages. - Change to return H_HARDWARE for h_resize_hpt_prepare(). - Remove five derivative patches as they have been merged. v9: - To ease the review and involve the appropriate maintainers, split the previous 6/7 patch into 10 patches: the 6/16 patch passes the &error_abort to qemu_thread_create() everywhere, and the next 9 patches will improve on &error_abort for callers who need. - Add a new patch 5/7 to unify error handling for process_incoming_migration_co(). - Merge the previous 2/7 to current 7/16 to collaboratively handle for qemu_X_start_vcpu and for the qemu_init_vpcu in each arch. - Add comment for multifd_recv_new_channel() in current patch 2/7. v8: - Remove previous two patches trying to fix the multifd issue on the source side, as we are still waiting for maintainer's opinions. - Use atomic_read to get multifd_recv_state->count in patch 3/7. - Get three more "Reviewed-by:". v7: - Split the previous multifd-migration into two patches: the src and the dst. For the dst, only dump the error instead of quitting. - Safely do the cleanup for postcopy_ram_enable_notify(). - Split the previous migration-error-handling patch into two patches. v6: - Add a new migration-multifd related patch. BTW, delete the previous vnc related patch as it has been upstreamed. - Use error_setg_errno() to set the errno when qemu_thread_create() fails for both Linux and Windows implementation. - Optimize the first patch, less codes are needed v5: - Remove `errno = err` in qemu_thread_create() for Linux, and change `return errno` to `return -1` in qemu_signal_init() to indicate the error in case qemu_thread_create() fails. - Delete the v4-added qemu_cond/mutex_destroy() in iothread_complete() as the destroy() will be done by its callers' object_unref(). v4: - Separate the migration compression patch from this series - Add one more error handling patch related with migration - Add more cleaning up code for touched functions v3: - Add two migration related patches to fix the segmentaion fault - Extract the segmentation fault fix from v2's last patch to be a separate patch v2: - Pass errp straightly instead of using a local_err & error_propagate - Return a bool: false/true to indicate if one function succeeds - Merge v1's last two patches into one to avoid the compile error - Fix one omitted error in patch1 and update some error messages Fei Li (11): qemu_thread: make qemu_thread_create() take Error ** argument qemu_thread: supplement error handling for qemu_X_start_vcpu qemu_thread: supplement error handling for qmp_dump_guest_memory qemu_thread: supplement error handling for pci_edu_realize qemu_thread: supplement error handling for h_resize_hpt_prepare qemu_thread: supplement error handling for emulated_realize qemu_thread: supplement error handling for iothread_complete qemu_thread: supplement error handling for qemu_signalfd_compat qemu_thread: supplement error handling for migration qemu_thread: supplement error handling for vnc_start_worker_thread qemu_thread: supplement error handling for touch_all_pages accel/tcg/user-exec-stub.c | 3 +- cpus.c | 69 - dump.c | 2 +- hw/misc/edu.c | 11 +- hw/ppc/spapr_hcall.c| 10 - hw/rdma/rdma_backend.c | 3 +- hw/usb/ccid-card-emulated.c | 14 +-- include/qemu/thread.h | 6 +-- include/qom/cpu.h | 2 +- io/task.c | 3 +- iothread.c | 18 ++--- migration/migration.c | 30 +++--- migration/postcopy-ram.c| 14 ++- migration/ram.c | 66 +-- migration/savevm.c | 11 -- target/alpha/cpu.c | 4 +- target/arm/cpu.c| 4 +- target/cris/cpu.c | 4 +- target/hppa/cpu.c | 4 +- target/i386/cpu.c | 4 +- target/lm32/cpu.c | 4 +- target/m68k/cpu.c | 4 +- target/microblaze/cpu.c | 4 +- target/mips/cpu.c | 4 +- target/moxie/cpu
Re: [Qemu-devel] [PATCH v1 00/14] testing/next (binfmt_misc, vm-build and BSD CI)
Patchew URL: https://patchew.org/QEMU/20190125140017.6092-1-alex.ben...@linaro.org/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/bin/bash time make docker-test-mingw@fedora SHOW_ENV=1 J=14 === TEST SCRIPT END === The full log is available at http://patchew.org/logs/20190125140017.6092-1-alex.ben...@linaro.org/testing.docker-mingw@fedora/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
Re: [Qemu-devel] [PATCH v2 3/5] virtio-blk: add DISCARD and WRITE ZEROES features
On Thu, Jan 31, 2019 at 04:19:12PM +0100, Stefano Garzarella wrote: > diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c > index 542ec52536..34ee676895 100644 > --- a/hw/block/virtio-blk.c > +++ b/hw/block/virtio-blk.c > @@ -147,6 +147,30 @@ out: > aio_context_release(blk_get_aio_context(s->conf.conf.blk)); > } > > +static void virtio_blk_discard_wzeroes_complete(void *opaque, int ret) > +{ > +VirtIOBlockReq *req = opaque; > +VirtIOBlock *s = req->dev; > +bool is_wzeroes = (virtio_ldl_p(VIRTIO_DEVICE(req->dev), &req->out.type) > & s/req->dev/s/ > + ~VIRTIO_BLK_T_BARRIER) == VIRTIO_BLK_T_WRITE_ZEROES; > + > +aio_context_acquire(blk_get_aio_context(s->conf.conf.blk)); > +if (ret) { > +if (virtio_blk_handle_rw_error(req, -ret, 0, is_wzeroes)) { The third argument is bool, please use false instead of 0. > +goto out; > +} > +} > + > +virtio_blk_req_complete(req, VIRTIO_BLK_S_OK); > +if (is_wzeroes) { > +block_acct_done(blk_get_stats(req->dev->blk), &req->acct); s/req->dev->blk/s->blk/ > +static uint8_t virtio_blk_handle_dwz(VirtIOBlockReq *req, bool is_wzeroes, > +struct virtio_blk_discard_write_zeroes *dwz_hdr) > +{ > +VirtIOBlock *s = req->dev; > +uint64_t sector; > +uint32_t num_sectors, flags; > +uint8_t err_status; > +int bytes; > + > +sector = virtio_ldq_p(VIRTIO_DEVICE(req->dev), &dwz_hdr->sector); Here and throughout the rest of the function: VirtIODevice *vdev = VIRTIO_DEVICE(s); s/VIRTIO_DEVICE(req->dev)/vdev/ and then to clean up the remaining instances: s/req->dev/s/ > +if (is_wzeroes) { /* VIRTIO_BLK_T_WRITE_ZEROES */ > +int blk_aio_flags = 0; > + > +if (s->conf.wz_may_unmap && The inconsistent naming is a bit messy and could confuse readers: write_zeroes vs wzeroes vs wz The VIRTIO spec and QEMU code uses write_zeroes, please stick to that even though it is longer. s/is_wzeroes/is_write_zeroes/ s/wz_map_unmap/write_zeroes_may_unmap/ s/virtio_blk_discard_wzeroes_complete/virtio_blk_discard_write_zeroes_complete/ This is a question of style and a local dwz_hdr variable does make the code easier to read, so I'm not totally against shortening the name, but please consistently use the long form in user-visible options, struct field names, and function names because these things have a large scope. > @@ -765,6 +904,22 @@ static void virtio_blk_update_config(VirtIODevice *vdev, > uint8_t *config) > blkcfg.alignment_offset = 0; > blkcfg.wce = blk_enable_write_cache(s->blk); > virtio_stw_p(vdev, &blkcfg.num_queues, s->conf.num_queues); > +if (s->conf.discard_wzeroes) { > +virtio_stl_p(vdev, &blkcfg.max_discard_sectors, > + s->conf.dwz_max_sectors); > +virtio_stl_p(vdev, &blkcfg.discard_sector_alignment, > + blk_size >> BDRV_SECTOR_BITS); > +virtio_stl_p(vdev, &blkcfg.max_write_zeroes_sectors, > + s->conf.dwz_max_sectors); > +blkcfg.write_zeroes_may_unmap = s->conf.wz_may_unmap; Does this need to be an option since MAY_UNMAP is advisory anyway? Another way of asking: what happens in the worst case if the guest sends MAY_UNMAP but the QEMU block device doesn't support unmap? Dropping this option would make the user interface simpler (no need to worry about the flag) and the implementation too. signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH for-4.0 00/11] qemu_thread_create: propagate the error to callers to handle
在 2019/2/1 上午2:05, Markus Armbruster 写道: I'm afraid you made a bit of a mess :) "[PATCH for-4.0 00/11]" suggests this is v1 of eleven patches. Awkward, I forgot the v10.. =-O Fei Li writes: Hi, This idea comes from BiteSizedTasks, and this patch series implement the error checking of qemu_thread_create: make qemu_thread_create return a flag to indicate if it succeeded rather than failing with an error; make all callers check it. The first patch modifies the qemu_thread_create() by passing &error_abort and returing a value to indicate if it succeeds. The next 10 patches will improve on &error_abort for callers who could handle more properly. Please help to review, thanks a lot! v10: - Make qemu_thread_create() return -errno instead of a Boolean. - Add more cleanup for pci_edu_realize()/emulated_realize(). - Polish for iothread_complete()/compress_threads_save_cleanup()/ vnc_start_worker_thread()/touch_all_pages. - Change to return H_HARDWARE for h_resize_hpt_prepare(). - Remove five derivative patches as they have been merged. It's actually v10. Yes. [...] Fei Li (11): qemu_thread: make qemu_thread_create() take Error ** argument qemu_thread: supplement error handling for qemu_X_start_vcpu qemu_thread: supplement error handling for qmp_dump_guest_memory qemu_thread: supplement error handling for pci_edu_realize qemu_thread: supplement error handling for h_resize_hpt_prepare qemu_thread: supplement error handling for emulated_realize qemu_thread: supplement error handling for iothread_complete qemu_thread: supplement error handling for qemu_signalfd_compat qemu_thread: supplement error handling for migration qemu_thread: supplement error handling for vnc_start_worker_thread qemu_thread: supplement error handling for touch_all_pages It is eleven patches. However, I got only 01-07/11 with this cover letter. A later batch (no cover letter) has 07-11/11 and 07-09/11 again. I could guess which of the duplicates I should review, but that's work. Just resend the whole thing as v11, please. Ok, and sorry for the trouble. Have a nice day, thanks Fei [...]
Re: [Qemu-devel] [PATCH v2 2/5] virtio-blk: add "discard-wzeroes" boolean property
On Thu, Jan 31, 2019 at 04:19:11PM +0100, Stefano Garzarella wrote: > In order to avoid migration issues, we enable DISCARD and > WRITE ZEROES features only for machine type >= 4.0 Please use two separate properties that correspond to the VIRTIO_BLK_F_DISCARD and VIRTIO_BLK_F_WRITE_ZEROES virtio-blk feature bits. signature.asc Description: PGP signature
Re: [Qemu-devel] [RFC PATCH v3 2/7] target/ppc: Add ppc_get_trace_int_handler_addr
On 19/01/2019 01:07, Fabiano Rosas wrote: > The upcoming single step functionality (KVM HV) needs to write to the > Trace Interrupt handler's address for its mechanism to work. The > address is calculated by applying an offset according to the value of > the Alternate Interrupt Location (AIL) bits in the LPCR register. > > Signed-off-by: Fabiano Rosas > --- > target/ppc/cpu.h | 1 + > target/ppc/excp_helper.c | 12 > 2 files changed, 13 insertions(+) > > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > index 486abaf99b..2185ef5e67 100644 > --- a/target/ppc/cpu.h > +++ b/target/ppc/cpu.h > @@ -1256,6 +1256,7 @@ struct PPCVirtualHypervisorClass { > OBJECT_GET_CLASS(PPCVirtualHypervisorClass, (obj), \ > TYPE_PPC_VIRTUAL_HYPERVISOR) > > +target_ulong ppc_get_trace_int_handler_addr(CPUState *cs); > void ppc_cpu_do_interrupt(CPUState *cpu); > bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req); > void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index 337a3ef8bb..5d13d05c3b 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -746,6 +746,18 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int > excp_model, int excp) > check_tlb_flush(env, false); > } > > +target_ulong ppc_get_trace_int_handler_addr(CPUState *cs) > +{ > +PowerPCCPU *cpu = POWERPC_CPU(cs); > +CPUPPCState *env = &cpu->env; > +int ail; > + > +ail = (env->spr[SPR_LPCR] & LPCR_AIL) >> LPCR_AIL_SHIFT; > +return env->excp_vectors[POWERPC_EXCP_TRACE] | > +ppc_excp_vector_offset(cs, ail); This fails with: cpu_abort(cs, "Invalid AIL combination %d\n", ail) as @ail calculates as 0 when I am just about to start a guest and try to set breakpoint at the initial $nip (set here: https://git.qemu.org/?p=qemu.git;a=blob;f=hw/ppc/spapr_cpu_core.c;h=993759db47fa33b11a984c3043049297b06c0420;hb=38441756b70eec5807b5f60dad11a93a91199866#l90 ) This is long before h_set_mode is called. > +} > + > + > void ppc_cpu_do_interrupt(CPUState *cs) > { > PowerPCCPU *cpu = POWERPC_CPU(cs); > -- Alexey
Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 2/3] target/ppc: Add GDB callbacks for SPRs
On 01/02/2019 08:57, Fabiano Rosas wrote: > Alexey Kardashevskiy writes: > >> On 31/01/2019 03:30, Fabiano Rosas wrote: >>> Alexey Kardashevskiy writes: >>> but this is a register which does not have endianness, the endianness appears here because the interface between gdb and qemu is uint8_t*==bytestream but this interface should have fixed endianness imho (now it is bigendian afaict). Something is not right here... >>> >>> Having a fixed endianness would not work because GDB have no way of >>> knowing how to represent what comes from the remote end. >> >> It definitely would. A register is stored as "unsigned long" in QEMU and >> all gdb has to do is printf("%lx") and that is it. > > OK, but something is not clear to me. Even if GDB just printf("%lx") the > value, we would still have to bswap when the host is LE, right? Not for %lx, this should just print a correct value. > QEMU BE: > (gdb) x/8xb &env->spr[287] > 0x11391760: 0x000x000x000x000x000x4e0x120x00 > > QEMU LE: > (gdb) x/8xb &env->spr[287] > 0x75bd98c0: 0x010x020x4b0x000x000x000x000x00 > >> The problem is that >> we want to pass it as a byte stream from the gdb_read_register() hook >> all the way to gdb and for some reason gdb does not define endianness of >> that stream but rather tries guessing the endianness which is broken. > > GDB does define the endianness of the stream (in a way): > > "Each byte of register data is described by two hex digits. The bytes > with the register are transmitted in target byte order." > > https://sourceware.org/gdb/current/onlinedocs/gdb/Packets.html#Packets Target byte order changes all the time so we need a endian-agnostic way of knowing the current endianness. > >> Today I was debugging rtas/clientinterface calls which a little endian >> kernel makes and these calls need to switch to the big endian first. And >> gdb goes nuts when this switch happens (note that I did not give an ELF >> to gdb this time so it picked LE itself). Even if it could fetch the >> endianness from QEMU, it would fail as it is an LE bit in MSR which is a >> register which is parsed according to the gdb's idea of endianness :) > > I think it would be possible to define another packet for the remote > protocol that informs the endianness explicitly at each time the guest > stops. If you provide more info on how to reproduce that issue I could > put in my list or go bug GDB folks about it. > >>> It will >>> always check the target endianness before printing a value, even if it >>> refers to a register: >>> >>> https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob;f=gdb/findvar.c;hb=HEAD#l49 >>> >>> So in our case the contents of mem_buf need to match both the guest >>> endianness *and* what GDB has set for 'show endian' because it will >>> detect it automatically from the ELF. If it guesses incorrectly because >>> there is no ELF, we need to use the 'set endian' command. >>> >>> By the way, this is already the behavior for the registers that are >>> already implemented (e.g. $msr). Here's the commit that introduced >>> that: >>> >>> https://git.qemu.org/?p=qemu.git;a=commitdiff;h=8a286ce4502356ce0b97a2424a2cb7 >>> >>> Now, what might be a source of confusion here is the fact that we >>> *always* do a bswap when the host is LE because QEMU thinks that the ppc >>> guest is always BE. That requires the maybe_bswap function to make >>> things right in the end. >>> >>> What I could do is try to improve this by only swapping when the >>> guest's actual endianness (msr_le) is different from the host's. >> >> The bytestream for registers should have fixed endianness. But looking >> at the gdb code makes me think it is not going to happen :( > > Yes, I can't think of a way to fix that without changing the way GDB > exhibits the values or the remote protocol. > > May I proceed with this series as it is with the bswaps? > >>> That >>> is not entirely within the scope of this patch, though. >> >> True. But since you are touching this, may be you could fix gdb too :) >> >> Does gdb tell QEMU about what endianness it thinks that QEMU is using? >> Or can it read it from QEMU? I cannot easily spot this in QEMU... > > GDB currently does not tell and does not ask about endianness. So I > believe there is room for improvement here. I could not find it in the > documentation but I think that GDB supports file transfers and it asks > for the ELF in some scenarios. This approach could be one way of > informing it about the endianness, although it has its own shortcomings. There is no ELF in my scenario really. What I did was: 1. hack qemu to not load slof.bin but load vmlinux instead and changed starting pc to where I loaded the kernel (I did not have to but it is a lot easier to ditch slof and set breakpoint in gdb before starting the guest). 2. start a guest, connect external gdb and observe garbage in $pc and disassemb
Re: [Qemu-devel] [Qemu-ppc] [PATCH] hw/ppc: Don't include m48t59.h if it is not necessary
On Thu, Jan 31, 2019 at 03:12:48PM +0100, Thomas Huth wrote: > On 2019-01-30 18:21, Philippe Mathieu-Daudé wrote: > > On 1/30/19 5:39 PM, Thomas Huth wrote: > >> These files don't use anything from m48t59.h, so no need to include > >> this header here. > >> > >> Signed-off-by: Thomas Huth > >> --- > >> hw/ppc/mac_newworld.c | 1 - > >> hw/ppc/mac_oldworld.c | 1 - > >> hw/ppc/ppc.c | 2 -- > >> hw/ppc/ppc_booke.c| 1 - > >> 4 files changed, 5 deletions(-) > >> > >> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c > >> index bb19eab..f1c8400 100644 > >> --- a/hw/ppc/mac_newworld.c > >> +++ b/hw/ppc/mac_newworld.c > >> @@ -53,7 +53,6 @@ > >> #include "hw/ppc/mac.h" > >> #include "hw/input/adb.h" > >> #include "hw/ppc/mac_dbdma.h" > >> -#include "hw/timer/m48t59.h" > >> #include "hw/pci/pci.h" > >> #include "net/net.h" > >> #include "sysemu/sysemu.h" > >> diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c > >> index 817f70e..98d531d 100644 > >> --- a/hw/ppc/mac_oldworld.c > >> +++ b/hw/ppc/mac_oldworld.c > >> @@ -30,7 +30,6 @@ > >> #include "hw/ppc/ppc.h" > >> #include "mac.h" > >> #include "hw/input/adb.h" > >> -#include "hw/timer/m48t59.h" > >> #include "sysemu/sysemu.h" > >> #include "net/net.h" > >> #include "hw/isa/isa.h" > >> diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c > >> index 98b409f..cffdc39 100644 > >> --- a/hw/ppc/ppc.c > >> +++ b/hw/ppc/ppc.c > >> @@ -30,10 +30,8 @@ > >> #include "qemu/timer.h" > >> #include "sysemu/sysemu.h" > >> #include "sysemu/cpus.h" > >> -#include "hw/timer/m48t59.h" > >> #include "qemu/log.h" > >> #include "qemu/error-report.h" > >> -#include "hw/loader.h" > > > > I supposed the "hw/loader.h" change slipped in by mistake. > > I should have mentioned it in the patch description, I guess. ppc.c also > compiles without this line, so it can be removed, too. Fair enough, applied to ppc-for-4.0. > > Thomas > -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH qemu] spapr_pci: Fix endianness in assigned-addresses property
On Fri, Feb 01, 2019 at 11:56:22AM +1100, Alexey Kardashevskiy wrote: > reg->phys_hi and assigned->phys_hi are big endian but we do an extra > byteswap anyway when copying reg->phys_hi to assigned->phys_hi. > To make things slightly more messy, we also add a relocatable bit (b_n()) > although in the right endianness. > > This fixes endianness of assigned->phys_hi. > > This is unlikely to produce any visible difference though as we should end up > there only in the case of PCI hotplug and even then I am not sure if > (d->io_regions[i].addr == PCI_BAR_UNMAPPED) == true. > > Signed-off-by: Alexey Kardashevskiy Applied to ppc-for-4.0, thanks. > --- > hw/ppc/spapr_pci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index b74f263..a174952 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -964,7 +964,7 @@ static void populate_resource_props(PCIDevice *d, > ResourceProps *rp) > } > > assigned = &rp->assigned[assigned_idx++]; > -assigned->phys_hi = cpu_to_be32(reg->phys_hi | b_n(1)); > +assigned->phys_hi = cpu_to_be32(be32_to_cpu(reg->phys_hi) | b_n(1)); > assigned->phys_mid = cpu_to_be32(d->io_regions[i].addr >> 32); > assigned->phys_lo = cpu_to_be32(d->io_regions[i].addr); > assigned->size_hi = reg->size_hi; -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson signature.asc Description: PGP signature
Re: [Qemu-devel] [PATCH] monitor: Add whitelist support for QMP commands
On Thu, Jan 31, 2019 at 11:26:37PM +0300, Julia Suvorova wrote: > The whitelist option allows to run a reduced monitor with a subset of > QMP commands. This allows the monitor to run in secure mode, which is > convenient for sending commands via the WebSocket monitor using the > web UI. This is planned to be done on micro:bit board. > > The list of allowed commands should be written to a file, one per line. > The command line will look like this: > -mon chardev_name,mode=control,whitelist=path_to_file > > Signed-off-by: Julia Suvorova > --- Please include a test case. tests/qmp-cmd-test.c looks like a starting point. Interesting cases: 1. QMP negotiation still works. 2. A whitelisted command succeeds. 3. A forbidden command fails with the expected error. > +static void monitor_qmp_cleanup_commands(Monitor *mon) > +{ > +QmpCommand *cmd, *next_cmd; > + > +if (!monitor_is_qmp(mon) || > +mon->qmp.commands == &qmp_cap_negotiation_commands) { > +return; > +} Checking side-effects can be avoided with a bool flag: if (!mon->qmp_commands_needs_free) { return; } Any place that allocates qmp.commands must set this flag and then we don't need to worry whether we're checking the right side-effects in the cleanup function. I think this makes the code easier to read but it's just a suggestion. > diff --git a/qemu-options.hx b/qemu-options.hx > index 521511ec13..e5d1b7dfb5 100644 > --- a/qemu-options.hx > +++ b/qemu-options.hx > @@ -3195,12 +3195,16 @@ Like -qmp but uses pretty JSON formatting. > ETEXI > > DEF("mon", HAS_ARG, QEMU_OPTION_mon, \ > -"-mon [chardev=]name[,mode=readline|control][,pretty[=on|off]]\n", > QEMU_ARCH_ALL) > +"-mon [chardev=]name[,mode=readline|control][,pretty[=on|off]]" \ > +"[,whitelist=file]\n", QEMU_ARCH_ALL) > STEXI > -@item -mon [chardev=]name[,mode=readline|control][,pretty[=on|off]] > +@item -mon > [chardev=]name[,mode=readline|control][,pretty[=on|off]][,whitelist=@var{file}] Your change reminded me that "[chardev=]name" should be "[chardev=]@var{name}" since 'name' isn't a string literal but a variable. This is a pre-existing issue but please add a patch to this series to fix it. > @findex -mon > Setup monitor on chardev @var{name}. @code{pretty} turns on JSON pretty > printing > easing human reading and debugging. > +The @code{whitelist} option disables all commands except those specified in > +@var{file}. The file must contain one command name per line. This option is > only > +avaliable in 'control' mode. s/avaliable/available/ signature.asc Description: PGP signature
Re: [Qemu-devel] Configuring pflash devices for OVMF firmware
> -Original Message- > From: Paolo Bonzini [mailto:pbonz...@redhat.com] > Sent: Friday, February 1, 2019 7:55 > To: Alexandro Sanchez Bach ; 'Markus Armbruster' > > Cc: 'Peter Maydell' ; 'Peter Krempa' > ; 'Qemu-block' ; 'Libvirt' > ; 'QEMU Developers' ; > 'László Érsek' ; 'Justin Terry (VM)' > ; Ning, Yu > Subject: Re: [Qemu-devel] Configuring pflash devices for OVMF firmware > > On 01/02/19 00:28, Alexandro Sanchez Bach wrote: > > (CC'd Yu Ning @ Intel's HAXM team) > > > > Not sure, if I'm understanding the issue correctly, but isn't > > `HAX_VM_IOCTL_SET_RAM2` with the `HAX_RAM_INFO_ROM` flag precisely > > what you are looking for? > > > > More precisely, HAX_VM_IOCTL_SET_RAM2 maps an HVA range to a GPA > > range, the HAX_RAM_INFO_ROM flag should allow only guest memory reads > > to that range [1]. When the guest attempts to write, this should > > trigger a VM exit that will be handled by QEMU. > > The missing handling is in the hypervisor: > > if (ret == -EACCES) { > /* > * For some reason, during boot-up, Chrome OS guests make > hundreds of > * attempts to write to GPAs close to 4GB, which are mapped into > BIOS > * (read-only) and thus result in EPT violations. > * TODO: Handle this case properly. > */ > hax_warning("%s: Unexpected EPT violation cause. Skipping > instruction" > " (len=%u)\n", __func__, > vcpu->vmx.exit_instr_length); > advance_rip(vcpu); > return HAX_EXIT; > } > > > Also, this seems to be handled here: > > > https://github.com/qemu/qemu/blob/15bede554162dda822cd762c689edb6fa3 > 2b > > 6e3b/target/i386/hax-mem.c#L205-L207 > > Right, though to be precise it should be changed to > > if (memory_region_is_rom(section->mr) || >memory_region_is_romd(section->mr)) { flags |= > HAX_RAM_INFO_ROM; > } > > for that to work. > Thank you both for outlining the changes we have to make in order to support ROMD memory regions! The only question is whether we should pass a new flag to HAX_VM_IOCTL_SET_RAM2 for ROMD, so the hypervisor could respond differently to writes to ROM and ROMD regions. Would that be useful at all? What would happen if HAXM asked QEMU to emulate a write to ROM? HAXM didn't implement ROMD support at first, because the guests we tested could boot without it (including Chrome OS). Now that this feature has become more popular (and we want to be able to boot OVMF), I think it's time to get it done. I'd like to get to it after the Lunar New Year holidays, but if anyone can finish it sooner, I'll be happy to merge their patch into HAXM. -Yu
[Qemu-devel] [PATCH v4 1/3] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories
From: Steffen Görtz The nRF51 contains three regions of non-volatile memory (NVM): - CODE (R/W): contains code - FICR (R): Factory information like code size, chip id etc. - UICR (R/W): Changeable configuration data. Lock bits, Code protection configuration, Bootloader address, Nordic SoftRadio configuration, Firmware configuration. Read and write access to the memories is managed by the Non-volatile memory controller. Memory schema: [ CPU ] -+- [ NVM, either FICR, UICR or CODE ] | | \- [ NVMC ] Signed-off-by: Steffen Görtz Signed-off-by: Stefan Hajnoczi Tested-by: Joel Stanley Reviewed-by: Peter Maydell --- v4: * assert(offset + size <= s->flash_size) [Peter] v3: * Fix endianness of s->storage[] [Peter] * Fix off-by-one that prevented clearing the last page of flash * Add missing memory_region_flush_rom_device() call to flash_write() v2: * Fix device-introspect-test segfault due to missing owner when initializing FICR and UICR memory regions [Peter] * Fix off-by-one assertion checks [Peter] * Fix missing whitespace at end of comment [Peter] * Clear UICR on reset - we'd need a block device for true non-volatility [Peter] * Use memory_region_flush_rom_device() to dirty/invalidate memory [Peter] --- hw/nvram/Makefile.objs | 1 + include/hw/nvram/nrf51_nvm.h | 64 ++ hw/nvram/nrf51_nvm.c | 388 +++ 3 files changed, 453 insertions(+) create mode 100644 include/hw/nvram/nrf51_nvm.h create mode 100644 hw/nvram/nrf51_nvm.c diff --git a/hw/nvram/Makefile.objs b/hw/nvram/Makefile.objs index b318e53a43..26f7b4ca35 100644 --- a/hw/nvram/Makefile.objs +++ b/hw/nvram/Makefile.objs @@ -5,3 +5,4 @@ common-obj-y += fw_cfg.o common-obj-y += chrp_nvram.o common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o obj-$(CONFIG_PSERIES) += spapr_nvram.o +obj-$(CONFIG_NRF51_SOC) += nrf51_nvm.o diff --git a/include/hw/nvram/nrf51_nvm.h b/include/hw/nvram/nrf51_nvm.h new file mode 100644 index 00..3792e4a9fe --- /dev/null +++ b/include/hw/nvram/nrf51_nvm.h @@ -0,0 +1,64 @@ +/* + * Nordic Semiconductor nRF51 non-volatile memory + * + * It provides an interface to erase regions in flash memory. + * Furthermore it provides the user and factory information registers. + * + * QEMU interface: + * + sysbus MMIO regions 0: NVMC peripheral registers + * + sysbus MMIO regions 1: FICR peripheral registers + * + sysbus MMIO regions 2: UICR peripheral registers + * + flash-size property: flash size in bytes. + * + * Accuracy of the peripheral model: + * + Code regions (MPU configuration) are disregarded. + * + * Copyright 2018 Steffen Görtz + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + * + */ +#ifndef NRF51_NVM_H +#define NRF51_NVM_H + +#include "hw/sysbus.h" +#define TYPE_NRF51_NVM "nrf51_soc.nvm" +#define NRF51_NVM(obj) OBJECT_CHECK(NRF51NVMState, (obj), TYPE_NRF51_NVM) + +#define NRF51_UICR_FIXTURE_SIZE 64 + +#define NRF51_NVMC_SIZE 0x1000 + +#define NRF51_NVMC_READY0x400 +#define NRF51_NVMC_READY_READY 0x01 +#define NRF51_NVMC_CONFIG 0x504 +#define NRF51_NVMC_CONFIG_MASK 0x03 +#define NRF51_NVMC_CONFIG_WEN 0x01 +#define NRF51_NVMC_CONFIG_EEN 0x02 +#define NRF51_NVMC_ERASEPCR10x508 +#define NRF51_NVMC_ERASEPCR00x510 +#define NRF51_NVMC_ERASEALL 0x50C +#define NRF51_NVMC_ERASEUICR0x514 +#define NRF51_NVMC_ERASE0x01 + +#define NRF51_UICR_SIZE 0x100 + +typedef struct NRF51NVMState { +SysBusDevice parent_obj; + +MemoryRegion mmio; +MemoryRegion ficr; +MemoryRegion uicr; +MemoryRegion flash; + +uint32_t uicr_content[NRF51_UICR_FIXTURE_SIZE]; +uint32_t flash_size; +uint8_t *storage; + +uint32_t config; + +} NRF51NVMState; + + +#endif diff --git a/hw/nvram/nrf51_nvm.c b/hw/nvram/nrf51_nvm.c new file mode 100644 index 00..7d94cef1db --- /dev/null +++ b/hw/nvram/nrf51_nvm.c @@ -0,0 +1,388 @@ +/* + * Nordic Semiconductor nRF51 non-volatile memory + * + * It provides an interface to erase regions in flash memory. + * Furthermore it provides the user and factory information registers. + * + * Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf + * + * See nRF51 reference manual and product sheet sections: + * + Non-Volatile Memory Controller (NVMC) + * + Factory Information Configuration Registers (FICR) + * + User Information Configuration Registers (UICR) + * + * Copyright 2018 Steffen Görtz + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/log.h" +#include "exec/address-spaces.h" +#include "hw/arm/nrf51.h" +#include "hw/nvram/nrf51_nvm.h" + +/* + * FICR Registers Assignments + * CODEPAGESIZE 0x010 + * CODESIZE 0x014 + * CLENR00x028 + * PPFC 0x02C + * NUMRAMBLOCK
[Qemu-devel] [PATCH v4 3/3] tests/microbit-test: Add tests for nRF51 NVMC
From: Steffen Görtz Signed-off-by: Steffen Görtz Signed-off-by: Stefan Hajnoczi Acked-by: Thomas Huth Reviewed-by: Peter Maydell --- tests/microbit-test.c | 108 ++ 1 file changed, 108 insertions(+) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index 3bad947b6c..04e199ec33 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -21,6 +21,7 @@ #include "hw/arm/nrf51.h" #include "hw/char/nrf51_uart.h" #include "hw/gpio/nrf51_gpio.h" +#include "hw/nvram/nrf51_nvm.h" #include "hw/timer/nrf51_timer.h" #include "hw/i2c/microbit_i2c.h" @@ -156,6 +157,112 @@ static void test_microbit_i2c(void) qtest_quit(qts); } +#define FLASH_SIZE (256 * NRF51_PAGE_SIZE) + +static void fill_and_erase(QTestState *qts, hwaddr base, hwaddr size, + uint32_t address_reg) +{ +hwaddr i; + +/* Erase Page */ +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02); +qtest_writel(qts, NRF51_NVMC_BASE + address_reg, base); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); + +/* Check memory */ +for (i = 0; i < size / 4; i++) { +g_assert_cmpuint(qtest_readl(qts, base + i * 4), ==, 0x); +} + +/* Fill memory */ +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01); +for (i = 0; i < size / 4; i++) { +qtest_writel(qts, base + i * 4, i); +g_assert_cmpuint(qtest_readl(qts, base + i * 4), ==, i); +} +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); +} + +static void test_nrf51_nvmc(void) +{ +uint32_t value; +hwaddr i; +QTestState *qts = qtest_init("-M microbit"); + +/* Test always ready */ +value = qtest_readl(qts, NRF51_NVMC_BASE + NRF51_NVMC_READY); +g_assert_cmpuint(value & 0x01, ==, 0x01); + +/* Test write-read config register */ +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x03); +g_assert_cmpuint(qtest_readl(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG), + ==, 0x03); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); +g_assert_cmpuint(qtest_readl(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG), + ==, 0x00); + +/* Test PCR0 */ +fill_and_erase(qts, NRF51_FLASH_BASE, NRF51_PAGE_SIZE, + NRF51_NVMC_ERASEPCR0); +fill_and_erase(qts, NRF51_FLASH_BASE + NRF51_PAGE_SIZE, + NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR0); + +/* Test PCR1 */ +fill_and_erase(qts, NRF51_FLASH_BASE, NRF51_PAGE_SIZE, + NRF51_NVMC_ERASEPCR1); +fill_and_erase(qts, NRF51_FLASH_BASE + NRF51_PAGE_SIZE, + NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR1); + +/* Erase all */ +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEALL, 0x01); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); + +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01); +for (i = 0; i < FLASH_SIZE / 4; i++) { +qtest_writel(qts, NRF51_FLASH_BASE + i * 4, i); +g_assert_cmpuint(qtest_readl(qts, NRF51_FLASH_BASE + i * 4), ==, i); +} +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); + +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEALL, 0x01); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); + +for (i = 0; i < FLASH_SIZE / 4; i++) { +g_assert_cmpuint(qtest_readl(qts, NRF51_FLASH_BASE + i * 4), + ==, 0x); +} + +/* Erase UICR */ +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEUICR, 0x01); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); + +for (i = 0; i < NRF51_UICR_SIZE / 4; i++) { +g_assert_cmpuint(qtest_readl(qts, NRF51_UICR_BASE + i * 4), + ==, 0x); +} + +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01); +for (i = 0; i < NRF51_UICR_SIZE / 4; i++) { +qtest_writel(qts, NRF51_UICR_BASE + i * 4, i); +g_assert_cmpuint(qtest_readl(qts, NRF51_UICR_BASE + i * 4), ==, i); +} +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); + +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEUICR, 0x01); +qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00); + +for (i = 0; i < NRF51_UICR_SIZE / 4; i++) { +g_assert_cmpuint(qtest_readl(qts, NRF51_UICR_BASE + i * 4), + ==, 0x); +} + +qtest_quit(qts); +} + static void test_nrf51_gpio(void) { size_t i; @@ -392,6 +499,7 @@ int main(int argc, char **argv) qtest_add_func("/microbit/nrf51/uart", test_nrf51_uart); qtest_add_func("/microbit/nrf51/gpio",
[Qemu-devel] [PATCH v4 2/3] arm: Instantiate NRF51 special NVM's and NVMC
From: Steffen Görtz Instantiates UICR, FICR, FLASH and NVMC in nRF51 SOC. Signed-off-by: Steffen Görtz Reviewed-by: Peter Maydell Reviewed-by: Stefan Hajnoczi Signed-off-by: Stefan Hajnoczi --- include/hw/arm/nrf51_soc.h | 2 ++ hw/arm/nrf51_soc.c | 41 +++--- 2 files changed, 31 insertions(+), 12 deletions(-) diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index fbdefc07e4..fd7fcc71a5 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -15,6 +15,7 @@ #include "hw/char/nrf51_uart.h" #include "hw/misc/nrf51_rng.h" #include "hw/gpio/nrf51_gpio.h" +#include "hw/nvram/nrf51_nvm.h" #include "hw/timer/nrf51_timer.h" #define TYPE_NRF51_SOC "nrf51-soc" @@ -32,6 +33,7 @@ typedef struct NRF51State { NRF51UARTState uart; NRF51RNGState rng; +NRF51NVMState nvm; NRF51GPIOState gpio; NRF51TimerState timer[NRF51_NUM_TIMERS]; diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 1630c27594..b839daea8b 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -29,8 +29,10 @@ * are supported in the future, add a sub-class of NRF51SoC for * the specific variants */ -#define NRF51822_FLASH_SIZE (256 * NRF51_PAGE_SIZE) -#define NRF51822_SRAM_SIZE (16 * NRF51_PAGE_SIZE) +#define NRF51822_FLASH_PAGES256 +#define NRF51822_SRAM_PAGES 16 +#define NRF51822_FLASH_SIZE (NRF51822_FLASH_PAGES * NRF51_PAGE_SIZE) +#define NRF51822_SRAM_SIZE (NRF51822_SRAM_PAGES * NRF51_PAGE_SIZE) #define BASE_TO_IRQ(base) ((base >> 12) & 0x1F) @@ -81,14 +83,6 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1); -memory_region_init_rom(&s->flash, OBJECT(s), "nrf51.flash", s->flash_size, -&err); -if (err) { -error_propagate(errp, err); -return; -} -memory_region_add_subregion(&s->container, NRF51_FLASH_BASE, &s->flash); - memory_region_init_ram(&s->sram, NULL, "nrf51.sram", s->sram_size, &err); if (err) { error_propagate(errp, err); @@ -121,6 +115,29 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) qdev_get_gpio_in(DEVICE(&s->cpu), BASE_TO_IRQ(NRF51_RNG_BASE))); +/* UICR, FICR, NVMC, FLASH */ +object_property_set_uint(OBJECT(&s->nvm), s->flash_size, "flash-size", + &err); +if (err) { +error_propagate(errp, err); +return; +} + +object_property_set_bool(OBJECT(&s->nvm), true, "realized", &err); +if (err) { +error_propagate(errp, err); +return; +} + +mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 0); +memory_region_add_subregion_overlap(&s->container, NRF51_NVMC_BASE, mr, 0); +mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 1); +memory_region_add_subregion_overlap(&s->container, NRF51_FICR_BASE, mr, 0); +mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 2); +memory_region_add_subregion_overlap(&s->container, NRF51_UICR_BASE, mr, 0); +mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 3); +memory_region_add_subregion_overlap(&s->container, NRF51_FLASH_BASE, mr, 0); + /* GPIO */ object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); if (err) { @@ -158,8 +175,6 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE, NRF51_IOMEM_SIZE); -create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE, -NRF51_FICR_SIZE); create_unimplemented_device("nrf51_soc.private", NRF51_PRIVATE_BASE, NRF51_PRIVATE_SIZE); } @@ -186,6 +201,8 @@ static void nrf51_soc_init(Object *obj) sysbus_init_child_obj(obj, "rng", &s->rng, sizeof(s->rng), TYPE_NRF51_RNG); +sysbus_init_child_obj(obj, "nvm", &s->nvm, sizeof(s->nvm), TYPE_NRF51_NVM); + sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), TYPE_NRF51_GPIO); -- 2.20.1
[Qemu-devel] [PATCH v4 0/3] arm: microbit Non-Volatile Memory Controller
v4: * assert(offset + size <= s->flash_size) [Peter] v3: * Fix endianness of s->storage[], tested by Joel Stanley on big-endian ppc [Peter] * Fix off-by-one that prevented clearing the last page of flash * Add missing memory_region_flush_rom_device() call to flash_write() v2: * Add Patch 2 to call memory_region_flush_rom_device() from pflash devices [Peter] This series adds the Non-Volatile Memory Controller, which controls access to the User Information Control Registers (UICR), Factory Information Control Registers (FICR), and flash memory. This is the last piece of microbit work needed to make basic programs like Micropython "Hello world" work under QEMU. Originally sent as part of Steffen's longer microbit device emulation series, I extracted this and deferred it until later because cleanups were necessary: * Use memory_region_flush_rom_device() to dirty/invalidate memory [Peter] ^--- Paolo: I CCed you on this new memory API * Fix device-introspect-test segfault due to missing owner when initializing FICR and UICR memory regions [Peter] * Fix off-by-one assertion checks [Peter] * Fix missing whitespace at end of comment [Peter] * Clear UICR on reset - we'd need a block device for true non-volatility [Peter] Steffen Görtz (3): hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories arm: Instantiate NRF51 special NVM's and NVMC tests/microbit-test: Add tests for nRF51 NVMC hw/nvram/Makefile.objs | 1 + include/hw/arm/nrf51_soc.h | 2 + include/hw/nvram/nrf51_nvm.h | 64 ++ hw/arm/nrf51_soc.c | 41 ++-- hw/nvram/nrf51_nvm.c | 388 +++ tests/microbit-test.c| 108 ++ 6 files changed, 592 insertions(+), 12 deletions(-) create mode 100644 include/hw/nvram/nrf51_nvm.h create mode 100644 hw/nvram/nrf51_nvm.c -- 2.20.1
Re: [Qemu-devel] [PATCH v5 3/6] libvhost-user: Support tracking inflight I/O in shared memory
On 2019/1/30 下午1:48, Yongji Xie wrote: On Wed, 30 Jan 2019 at 10:32, Jason Wang wrote: On 2019/1/22 下午4:31, elohi...@gmail.com wrote: +static int +vu_queue_inflight_get(VuDev *dev, VuVirtq *vq, int desc_idx) +{ +if (!has_feature(dev->protocol_features, +VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { +return 0; +} + +if (unlikely(!vq->inflight)) { +return -1; +} + +vq->inflight->desc[desc_idx].inuse = 1; + +vq->inflight->desc[desc_idx].avail_idx = vq->last_avail_idx; + +return 0; +} + +static int +vu_queue_inflight_pre_put(VuDev *dev, VuVirtq *vq, int desc_idx) +{ +if (!has_feature(dev->protocol_features, +VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { +return 0; +} + +if (unlikely(!vq->inflight)) { +return -1; +} + +vq->inflight->desc[desc_idx].used_idx = vq->used_idx; + +barrier(); + +vq->inflight->desc[desc_idx].version++; + +return 0; +} You probably need WRITE_ONCE() semantic (e.g volatile) to make sure the value reach memory. The cache line should have been flushed during crash. So we can see the correct value when backend reconnecting. If so, compile barrier should be enough here, right? Maybe I worry too much but it's not about flushing cache, but about whether or not compiler can generate mov to memory instead of mov to registers. Thanks Thanks, Yongji
Re: [Qemu-devel] [PATCH v5 3/6] libvhost-user: Support tracking inflight I/O in shared memory
On 2019/1/30 上午11:58, Yongji Xie wrote: On Wed, 30 Jan 2019 at 10:32, Jason Wang wrote: On 2019/1/22 下午4:31, elohi...@gmail.com wrote: +static int +vu_queue_inflight_get(VuDev *dev, VuVirtq *vq, int desc_idx) +{ +if (!has_feature(dev->protocol_features, +VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { +return 0; +} + +if (unlikely(!vq->inflight)) { +return -1; +} + +vq->inflight->desc[desc_idx].inuse = 1; + +vq->inflight->desc[desc_idx].avail_idx = vq->last_avail_idx; + +return 0; +} + +static int +vu_queue_inflight_pre_put(VuDev *dev, VuVirtq *vq, int desc_idx) +{ +if (!has_feature(dev->protocol_features, +VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { +return 0; +} + +if (unlikely(!vq->inflight)) { +return -1; +} + +vq->inflight->desc[desc_idx].used_idx = vq->used_idx; + +barrier(); + +vq->inflight->desc[desc_idx].version++; + +return 0; +} You probably need WRITE_ONCE() semantic (e.g volatile) to make sure the value reach memory. Is it enough to declare those variables as volatile? Thanks, Yongji I think so. Thanks
[Qemu-devel] [RFC PATCH] target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
The lo,hi order is different from the comments. And in commit 1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128"), it changes the original code logic. So just restore the old code logic before this commit: do_paired_cmpxchg64_be(): cmpv = int128_make128(env->exclusive_high, env->exclusive_val); newv = int128_make128(new_hi, new_lo); Fixes: 1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128") Signed-off-by: Catherine Ho --- I didn't see any obvious real error case here, so set it as RFC target/arm/helper-a64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 101fa6d3ea..70850e564d 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -583,8 +583,8 @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr, * High and low need to be switched here because this is not actually a * 128bit store but two doublewords stored consecutively */ -Int128 cmpv = int128_make128(env->exclusive_val, env->exclusive_high); -Int128 newv = int128_make128(new_lo, new_hi); +Int128 cmpv = int128_make128(env->exclusive_high, env->exclusive_val); +Int128 newv = int128_make128(new_hi, new_lo); Int128 oldv; uintptr_t ra = GETPC(); uint64_t o0, o1; -- 2.17.1
[Qemu-devel] [PATCH] pc-dimm: use same mechanism for [get|set]_addr
[get|set]_addr are two counterpart to access PCDIMMDevice.addr. Since we have already set up a property PC_DIMM_ADDR_PROP for this field and use this mechanism in set_addr, it would be more proper to use the same mechanism in set_addr. This patch uses object_property_get_uint() to replace the direct memory access to make [get|set]_addr with the same mechanism. Signed-off-by: Wei Yang --- hw/mem/pc-dimm.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c index 0c9b9e8292..c0658b9b88 100644 --- a/hw/mem/pc-dimm.c +++ b/hw/mem/pc-dimm.c @@ -204,9 +204,7 @@ static MemoryRegion *pc_dimm_get_memory_region(PCDIMMDevice *dimm, Error **errp) static uint64_t pc_dimm_md_get_addr(const MemoryDeviceState *md) { -const PCDIMMDevice *dimm = PC_DIMM(md); - -return dimm->addr; +return object_property_get_uint(OBJECT(md), PC_DIMM_ADDR_PROP, NULL); } static void pc_dimm_md_set_addr(MemoryDeviceState *md, uint64_t addr, -- 2.19.1
[Qemu-devel] [PATCH qemu] spapr_pci: Fix endianness in assigned-addresses property
reg->phys_hi and assigned->phys_hi are big endian but we do an extra byteswap anyway when copying reg->phys_hi to assigned->phys_hi. To make things slightly more messy, we also add a relocatable bit (b_n()) although in the right endianness. This fixes endianness of assigned->phys_hi. This is unlikely to produce any visible difference though as we should end up there only in the case of PCI hotplug and even then I am not sure if (d->io_regions[i].addr == PCI_BAR_UNMAPPED) == true. Signed-off-by: Alexey Kardashevskiy --- hw/ppc/spapr_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index b74f263..a174952 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -964,7 +964,7 @@ static void populate_resource_props(PCIDevice *d, ResourceProps *rp) } assigned = &rp->assigned[assigned_idx++]; -assigned->phys_hi = cpu_to_be32(reg->phys_hi | b_n(1)); +assigned->phys_hi = cpu_to_be32(be32_to_cpu(reg->phys_hi) | b_n(1)); assigned->phys_mid = cpu_to_be32(d->io_regions[i].addr >> 32); assigned->phys_lo = cpu_to_be32(d->io_regions[i].addr); assigned->size_hi = reg->size_hi; -- 2.17.1
[Qemu-devel] [PATCH qemu] spapr/rtas: Force big endian compile for rtas
At the moment the rtas's Makefile uses generic QEMU rules which means that when QEMU is compiled on a little endian system, the spapr-rtas.bin is compiled as little endian too which is incorrect as it is always executed in big endian mode. This enforces -mbig by defining %.o:%.S rule as spapr-rtas.bin is a standalone guest binary which should not depend on QEMU flags anyway. Signed-off-by: Alexey Kardashevskiy --- pc-bios/spapr-rtas/Makefile | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/pc-bios/spapr-rtas/Makefile b/pc-bios/spapr-rtas/Makefile index f26dd42..4b9bb12 100644 --- a/pc-bios/spapr-rtas/Makefile +++ b/pc-bios/spapr-rtas/Makefile @@ -14,8 +14,11 @@ $(call set-vpath, $(SRC_PATH)/pc-bios/spapr-rtas) build-all: spapr-rtas.bin +%.o: %.S + $(call quiet-command,$(CCAS) -mbig -c -o $@ $<,"CCAS","$(TARGET_DIR)$@") + %.img: %.o - $(call quiet-command,$(CC) -nostdlib -o $@ $<,"Building","$(TARGET_DIR)$@") + $(call quiet-command,$(CC) -nostdlib -mbig -o $@ $<,"Building","$(TARGET_DIR)$@") %.bin: %.img $(call quiet-command,$(OBJCOPY) -O binary -j .text $< $@,"Building","$(TARGET_DIR)$@") -- 2.17.1
Re: [Qemu-devel] Configuring pflash devices for OVMF firmware
On 01/02/19 00:28, Alexandro Sanchez Bach wrote: > (CC'd Yu Ning @ Intel's HAXM team) > > Not sure, if I'm understanding the issue correctly, but isn't > `HAX_VM_IOCTL_SET_RAM2` with the `HAX_RAM_INFO_ROM` flag precisely > what you are looking for? > > More precisely, HAX_VM_IOCTL_SET_RAM2 maps an HVA range to a GPA > range, the HAX_RAM_INFO_ROM flag should allow only guest memory reads > to that range [1]. When the guest attempts to write, this should > trigger a VM exit that will be handled by QEMU. The missing handling is in the hypervisor: if (ret == -EACCES) { /* * For some reason, during boot-up, Chrome OS guests make hundreds of * attempts to write to GPAs close to 4GB, which are mapped into BIOS * (read-only) and thus result in EPT violations. * TODO: Handle this case properly. */ hax_warning("%s: Unexpected EPT violation cause. Skipping instruction" " (len=%u)\n", __func__, vcpu->vmx.exit_instr_length); advance_rip(vcpu); return HAX_EXIT; } > Also, this seems to be handled here: > https://github.com/qemu/qemu/blob/15bede554162dda822cd762c689edb6fa32b6e3b/target/i386/hax-mem.c#L205-L207 Right, though to be precise it should be changed to if (memory_region_is_rom(section->mr) || memory_region_is_romd(section->mr)) { flags |= HAX_RAM_INFO_ROM; } for that to work. Paolo
Re: [Qemu-devel] Configuring pflash devices for OVMF firmware
>> This is all greek to me. I take it there's something wrong with these >> accelerators that makes (read-only?) flash memory not work, even >> though the read-only mapping we now create for traditional BIOS works. >> Weird, but I'm of course willing to take your word for it. > Yes, as I wrote in the other message even read-only flash memory supports > commands, and these accelerators do not support direct reads + MMIO writes on > the same memory slot. > At least I checked HAX code and it doesn't; I don't know about WHPX. (CC'd Yu Ning @ Intel's HAXM team) Not sure, if I'm understanding the issue correctly, but isn't `HAX_VM_IOCTL_SET_RAM2` with the `HAX_RAM_INFO_ROM` flag precisely what you are looking for? More precisely, HAX_VM_IOCTL_SET_RAM2 maps an HVA range to a GPA range, the HAX_RAM_INFO_ROM flag should allow only guest memory reads to that range [1]. When the guest attempts to write, this should trigger a VM exit that will be handled by QEMU. Also, this seems to be handled here: https://github.com/qemu/qemu/blob/15bede554162dda822cd762c689edb6fa32b6e3b/target/i386/hax-mem.c#L205-L207 Best, Alexandro [1] https://github.com/intel/haxm/blob/master/docs/api.md
Re: [Qemu-devel] [PATCH] target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
On 1/31/19 5:07 AM, Peter Maydell wrote: > The {IOE, DZE, OFE, UFE, IXE, IDE} bits in the FPSCR/FPCR are for > enabling trapped IEEE floating point exceptions (where IEEE exception > conditions cause a CPU exception rather than updating the FPSR status > bits). QEMU doesn't implement this (and nor does the hardware we're > modelling), but for implementations which don't implement trapped > exception handling these control bits are supposed to be RAZ/WI. > This allows guest code to test for whether the feature is present > by trying to write to the bit and checking whether it sticks. > > QEMU is incorrectly making these bits read as written. Make them > RAZ/WI as the architecture requires. > > In particular this was causing problems for the NetBSD automatic > test suite. > > Reported-by: Martin Husemann > Signed-off-by: Peter Maydell > --- > Martin: this is a different fix to the one I suggested you test, > because I realized we need to make these bits RAZ/WI in the aarch32 > FPSCR as well as the aarch64 FPCR, but it should have the same effect. > > General note: the difference between "RAZ/WI" and "RES0" is a bit > subtle (see the Arm ARM glossary), but the main distinction is that > RES0 bits can often be implemented as reads-as-written whilst > RAZ/WI bits never can. > --- > target/arm/cpu.h| 6 ++ > target/arm/helper.c | 6 ++ > 2 files changed, 12 insertions(+) Reviewed-by: Richard Henderson r~
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de * [new tag] patchew/20190131210851.9842-1-richard.hender...@linaro.org -> patchew/20190131210851.9842-1-richard.hender...@linaro.org Switched to a new branch 'test' 8fbe349 target/riscv: Remaining rvc insn reuse 32 bit translators 24ac6df target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 a872fb0 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 b15e98a target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns 8620f8c target/riscv: Convert @cs_2 insns to share translation functions 34fdff0 target/riscv: Remove decode_RV32_64G() 18fef41 target/riscv: Remove gen_system() 0c7096a target/riscv: Rename trans_arith to gen_arith 11b4396 target/riscv: Remove manual decoding of RV32/64M insn 03ea617 target/riscv: Remove shift and slt insn manual decoding b9d345c target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists f9f6281 target/riscv: Move gen_arith_imm() decoding into trans_* functions 28988be target/riscv: Remove manual decoding from gen_store() b227163 target/riscv: Remove manual decoding from gen_load() 2d9466d target/riscv: Remove manual decoding from gen_branch() 389dfb1 target/riscv: Remove gen_jalr() 015e21b target/riscv: Convert quadrant 2 of RVXC insns to decodetree f7599be target/riscv: Convert quadrant 1 of RVXC insns to decodetree b43b908 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 9def3a0 target/riscv: Convert RV priv insns to decodetree cb6a85c target/riscv: Convert RV64D insns to decodetree de12358 target/riscv: Convert RV32D insns to decodetree 3637746 target/riscv: Convert RV64F insns to decodetree f7f1cee target/riscv: Convert RV32F insns to decodetree ff48f82 target/riscv: Convert RV64A insns to decodetree 59216b4 target/riscv: Convert RV32A insns to decodetree ecd3e26 target/riscv: Convert RVXM insns to decodetree f925ddf target/riscv: Convert RVXI csr insns to decodetree 0521076 target/riscv: Convert RVXI fence insns to decodetree 96ef5df target/riscv: Convert RVXI arithmetic insns to decodetree 720d36f target/riscv: Convert RV64I load/store insns to decodetree 4ca2a53 target/riscv: Convert RV32I load/store insns to decodetree 797e17e target/riscv: Convert RVXI branch insns to decodetree 5fe471c target/riscv: Activate decodetree and implemnt LUI & AUIPC 2f6484f target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit 2f6484fc8b40 (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 5fe471c8d889 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit 797e17e309d8 (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit 4ca2a533ae0f (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit 720d36fcb482 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit 96ef5df64035 (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 052107679d38 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit f925ddff48df (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit ecd3e263f4d3 (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report
Re: [Qemu-devel] Configuring pflash devices for OVMF firmware
On 31/01/19 13:12, Markus Armbruster wrote: > Paolo Bonzini writes: > >> On 31/01/19 10:41, Markus Armbruster wrote: >>> Paolo Bonzini writes: >>> On 31/01/19 09:40, Markus Armbruster wrote: >> Maybe we should just add pflash block properties to the machine? And >> then it can create the devices if the properties are set to a non-empty >> value. > What exactly do you have in mind? Something like > > -machine q35,ovmf-code=OVMF-CODE-NODE,ovmf-data=OVMF-DATA-NODE > > where OVMF-CODE-NODE and OVMF-DATA-NODE are block backend node names, > i.e. > > -blockdev > file,node-name=OVMF-CODE-NODE,read-only=on,filename=/usr/share/edk2/ovmf/OVMF_CODE.fd > -blockdev file,node-name=OVMF-DATA-NODE,read-only=on,filename=... Yes, though I would call it pflash0 and pflash1. >>> >>> Digression... should we put traditional BIOS in flash as well? Only for >>> new machine types, obviously. >> >> The blocker was that very old KVM didn't support ROMD memory regions. >> Now on one hand we don't support those old kernel versions anymore; on >> the other hand we have HAX and WHPX that do not support ROMD at all. > > This is all greek to me. I take it there's something wrong with these > accelerators that makes (read-only?) flash memory not work, even though > the read-only mapping we now create for traditional BIOS works. Weird, > but I'm of course willing to take your word for it. Yes, as I wrote in the other message even read-only flash memory supports commands, and these accelerators do not support direct reads + MMIO writes on the same memory slot. At least I checked HAX code and it doesn't; I don't know about WHPX. > Aside: accepting incomplete accelerators, then letting their > incompleteness hold back things doesn't strike me as sound policy. Yes, there is a balance to be found between that and accepting features from known out-of-tree forks, in order to help these out-of-tree forks not remain forever on very old releases. However, another important question is---if you changed the default from -bios to -pflash, would you also flip secure from off to on? Only TCG and KVM supports SMM, and it's quite unlikely that the other accelerators will support it (there are also "philosophical" debates behind that choice...). > Do we reject these accelerators when the user asks for firmware in > flash? Or do we let the guest run into some more or less obscure > failure? For HAX it just fails to boot I think. Paolo
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Type: series Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu aefcd28366..e8977901b7 master -> master t [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de Switched to a new branch 'test' 84d9232271 target/riscv: Remaining rvc insn reuse 32 bit translators d914ca8ad6 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 d91d36a5a5 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 96a7dd7cc4 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns 4be75db113 target/riscv: Convert @cs_2 insns to share translation functions 5df6fa908b target/riscv: Remove decode_RV32_64G() 9e15d220cb target/riscv: Remove gen_system() 569b624066 target/riscv: Rename trans_arith to gen_arith ab8fe35848 target/riscv: Remove manual decoding of RV32/64M insn 35c8b7cf65 target/riscv: Remove shift and slt insn manual decoding aa1fcbc0b2 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists 09af9d97eb target/riscv: Move gen_arith_imm() decoding into trans_* functions 2b6c72f3da target/riscv: Remove manual decoding from gen_store() 1d3a7b5cb7 target/riscv: Remove manual decoding from gen_load() 0551b57210 target/riscv: Remove manual decoding from gen_branch() 129eb0e041 target/riscv: Remove gen_jalr() 65a653d84d target/riscv: Convert quadrant 2 of RVXC insns to decodetree faca63ff69 target/riscv: Convert quadrant 1 of RVXC insns to decodetree 0e9ac5bbcb target/riscv: Convert quadrant 0 of RVXC insns to decodetree 8871e9f09a target/riscv: Convert RV priv insns to decodetree 4ffcac38e7 target/riscv: Convert RV64D insns to decodetree 8b13dafd4a target/riscv: Convert RV32D insns to decodetree f59e9b8655 target/riscv: Convert RV64F insns to decodetree 8cd874a0eb target/riscv: Convert RV32F insns to decodetree 4f9f53aa9e target/riscv: Convert RV64A insns to decodetree 17aee59b02 target/riscv: Convert RV32A insns to decodetree e93a947b94 target/riscv: Convert RVXM insns to decodetree 87454d7d1d target/riscv: Convert RVXI csr insns to decodetree 11f83510fd target/riscv: Convert RVXI fence insns to decodetree 40bf83abf8 target/riscv: Convert RVXI arithmetic insns to decodetree 6f109f635b target/riscv: Convert RV64I load/store insns to decodetree 1bdc022b7c target/riscv: Convert RV32I load/store insns to decodetree ad3f70396f target/riscv: Convert RVXI branch insns to decodetree 693a52f261 target/riscv: Activate decodetree and implemnt LUI & AUIPC b098fdaf40 target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit b098fdaf40da (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 693a52f261fd (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit ad3f70396f2e (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit 1bdc022b7ca3 (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit 6f109f635b03 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit 40bf83abf814 (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 11f83510fd16 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit 87454d7d1d12 (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit e93a947b945f (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false
Re: [Qemu-devel] [PATCH 0/5] hw/arm/boot: Support DTB autoload for firmware-only boots
On 1/31/19 3:22 AM, Peter Maydell wrote: > Peter Maydell (5): > hw/arm/boot: Fix block comment style in arm_load_kernel() > hw/arm/boot: Factor out "direct kernel boot" code into its own > function > hw/arm/boot: Factor out "set up firmware boot" code > hw/arm/boot: Clarify why arm_setup_firmware_boot() doesn't set > env->boot_info > hw/arm/boot: Support DTB autoload for firmware-only boots > > hw/arm/boot.c | 166 +- > 1 file changed, 96 insertions(+), 70 deletions(-) Nice cleanup. Reviewed-by: Richard Henderson r~
Re: [Qemu-devel] [RFC PATCH 10/11] qcow2: Store data file name in the image
On Thu, Jan 31, 2019 at 8:20 PM Kevin Wolf wrote: > Rather than requiring that the external data file node is passed > explicitly when creating the qcow2 node, store the filename in the > designated header extension during .bdrv_create and read it from there > as a default during .bdrv_open. > If the data file is the backing file, we don't need this change. > > Signed-off-by: Kevin Wolf > --- > block/qcow2.h | 1 + > block/qcow2.c | 69 +- > tests/qemu-iotests/082.out | 27 +++ > 3 files changed, 96 insertions(+), 1 deletion(-) > > diff --git a/block/qcow2.h b/block/qcow2.h > index e2114900b4..a1e2600643 100644 > --- a/block/qcow2.h > +++ b/block/qcow2.h > @@ -341,6 +341,7 @@ typedef struct BDRVQcow2State { > * override) */ > char *image_backing_file; > char *image_backing_format; > +char *image_data_file; > > CoQueue compress_wait_queue; > int nb_compress_threads; > diff --git a/block/qcow2.c b/block/qcow2.c > index 6cf862e8b9..4959bf16a4 100644 > --- a/block/qcow2.c > +++ b/block/qcow2.c > @@ -398,6 +398,20 @@ static int qcow2_read_extensions(BlockDriverState > *bs, uint64_t start_offset, > #endif > break; > > +case QCOW2_EXT_MAGIC_DATA_FILE: > +{ > +s->image_data_file = g_malloc0(ext.len + 1); > +ret = bdrv_pread(bs->file, offset, s->image_data_file, > ext.len); > +if (ret < 0) { > +error_setg_errno(errp, -ret, "ERROR: Could not data file > name"); > +return ret; > +} > +#ifdef DEBUG_EXT > +printf("Qcow2: Got external data file %s\n", > s->image_data_file); > +#endif > +break; > +} > + > default: > /* unknown magic - save it in case we need to rewrite the > header */ > /* If you add a new feature, make sure to also update the fast > @@ -1444,7 +1458,18 @@ static int coroutine_fn > qcow2_do_open(BlockDriverState *bs, QDict *options, > /* Open external data file */ > if (s->incompatible_features & QCOW2_INCOMPAT_DATA_FILE) { > s->data_file = bdrv_open_child(NULL, options, "data-file", bs, > - &child_file, false, errp); > + &child_file, false, &local_err); > +if (!s->data_file) { > +if (s->image_data_file) { > +error_free(local_err); > +local_err = NULL; > +s->data_file = bdrv_open_child(s->image_data_file, > options, > + "data-file", bs, > &child_file, > + false, errp); > +} else { > +error_propagate(errp, local_err); > +} > +} > if (!s->data_file) { > ret = -EINVAL; > goto fail; > @@ -1627,6 +1652,7 @@ static int coroutine_fn > qcow2_do_open(BlockDriverState *bs, QDict *options, > return ret; > > fail: > +g_free(s->image_data_file); > if (has_data_file(bs)) { > bdrv_unref_child(bs, s->data_file); > } > @@ -2246,6 +2272,7 @@ static void qcow2_close(BlockDriverState *bs) > g_free(s->unknown_header_fields); > cleanup_unknown_header_ext(bs); > > +g_free(s->image_data_file); > g_free(s->image_backing_file); > g_free(s->image_backing_format); > > @@ -2422,6 +2449,19 @@ int qcow2_update_header(BlockDriverState *bs) > buflen -= ret; > } > > +/* External data file header extension */ > +if (has_data_file(bs) && s->image_data_file) { > +ret = header_ext_add(buf, QCOW2_EXT_MAGIC_DATA_FILE, > + s->image_data_file, > strlen(s->image_data_file), > + buflen); > +if (ret < 0) { > +goto fail; > +} > + > +buf += ret; > +buflen -= ret; > +} > + > /* Full disk encryption header pointer extension */ > if (s->crypto_header.offset != 0) { > s->crypto_header.offset = cpu_to_be64(s->crypto_header.offset); > @@ -3166,6 +3206,7 @@ static int coroutine_fn qcow2_co_create_opts(const > char *filename, QemuOpts *opt > QDict *qdict; > Visitor *v; > BlockDriverState *bs = NULL; > +BlockDriverState *data_bs = NULL; > Error *local_err = NULL; > const char *val; > int ret; > @@ -3229,6 +3270,26 @@ static int coroutine_fn qcow2_co_create_opts(const > char *filename, QemuOpts *opt > goto finish; > } > > +/* Create and open an external data file (protocol layer) */ > +val = qdict_get_try_str(qdict, BLOCK_OPT_DATA_FILE); > +if (val) { > +ret = bdrv_create_file(val, opts, errp); > +if (ret < 0) { > +goto finish; > +} > + > +data_bs = bdrv_open(val, NULL, NULL, > +BDRV_O_RDWR | BDRV_O_RESIZE | BDR
Re: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU
Patchew URL: https://patchew.org/QEMU/1548410831-19553-1-git-send-email-pbonz...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU Message-id: 1548410831-19553-1-git-send-email-pbonz...@redhat.com Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com -> patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone' Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex' Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3' Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3' Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out 'd4e7d7ac663fcb55f1b93575445fcbca372f17a7' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out '9b7ab2fa020341dee8bf9df6c9cf40003e0136df' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588' Cloning into 'tests/fp/berkeley-softfloat-3'... Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037' Cloning into 'tests/fp/berkeley-testfloat-3'... Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' a79752a kconfig: introduce CONFIG_TEST_DEVICES c9d0fe6 i386-softmmu.mak: remove all CONFIG_* except boards definitions 6f1e6af isa: express SuperIO dependencies with Kconfig dc95811 tpm: express dependencies with
Re: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU
Patchew URL: https://patchew.org/QEMU/1548410831-19553-1-git-send-email-pbonz...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1548410831-19553-1-git-send-email-pbonz...@redhat.com Subject: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com -> patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com Switched to a new branch 'test' a79752a kconfig: introduce CONFIG_TEST_DEVICES c9d0fe6 i386-softmmu.mak: remove all CONFIG_* except boards definitions 6f1e6af isa: express SuperIO dependencies with Kconfig dc95811 tpm: express dependencies with Kconfig af23f11 virtio: express virtio dependencies with Kconfig fc253a0 vfio: express vfio dependencies with Kconfig 04964ca hyperv: express dependencies with kconfig 0e23a1e display: express dependencies with kconfig 8d0e47d ptimer: express dependencies with Kconfig 70ffc63 i2c: express dependencies with Kconfig 1b10271 i386: express dependencies with Kconfig 4d30a49 isa: express dependencies with kconfig f4d520f scsi: express dependencies with Kconfig 3646562 build: convert usb.mak to Kconfig 47589bd build: convert sound.mak to Kconfig b96574e build: convert pci.mak to Kconfig 8cc438c hw/pci/Makefile.objs: make pcie configurable fcc8bb5 ide: express dependencies with Kconfig 860ef3a minikconf: implement allnoconfig and defconfig 934e485 build: switch to Kconfig d253933 kconfig: introduce kconfig files 47c5e5d hw/display: make edid configurable 3c7f935 minikconfig: add semantic analysis 36b08f2 minikconfig: add AST 1ad0a25 minikconfig: add parser skeleton 1733dbf hw/vfio/Makefile.objs: Create new CONFIG_* variables for VFIO core and PCI b863897 hw/i2c/Makefile.objs: Create new CONFIG_* variables for EEPROM and ACPI controller c91ddd4 hw/tricore/Makefile.objs: Create CONFIG_* for tricore a9bf8be hw/openrisc/Makefile.objs: Create CONFIG_* for openrisc d2cdd2a hw/moxie/Makefile.objs: Conditionally build moxie 892410c hw/hppa/Makefile.objs: Create CONFIG_* for hppa ae6333d hw/cris/Makefile.objs: Create CONFIG_* for cris b9d2911 hw/alpha/Makefile.objs: Create CONFIG_* for alpha 3c3acae hw/sparc64/Makefile.objs: Create CONFIG_* for sparc64 0a96788 hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards 530165e hw/nios2/Makefile.objs: Conditionally build nios2 fbaef04 hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_fpga conditionally 9043ba2 hw/lm32/Makefile.objs: Conditionally build lm32 and milkmyst 811303a hw/sparc/Makefile.objs: CONFIG_* for sun4m and leon3 created 2f7135f hw/s390/Makefile.objs: Create new CONFIG_* variables for s390x boards and devices af8b566 hw/sh4/Makefile.objs: New CONFIG_* varibales created for sh4 boards and device cecc461 hw/ppc/Makefile.objs: Build all boards conditinally with CONFIG_* 4bf7173 hw/mips/Makefile.objs: Create CONFIG_* for r4k, malta, mipssim boards 6aed799 hw/microblaze/Makefile.objs: Create configs for petalogix and xilinx boards 3997152 hw/m68k/Makefile.objs: Conditionally build boards 530a866 hw/arm/Makefile.objs: CONFIG_VIRT created for virt board fa54373 hw/i386/Makefile.objs: Build pc_piix* and pc_q35 boards 1b6abb7 build: actually use CONFIG_PAM f6b12fb hw/pci-host/Makefile.objs: make CONFIGS clear for PCI EXPRESS 14d967c vfio: move conditional up to hw/Makefile.objs bfa4428 ide: split ioport registration to a separate file 305912d arm: disable CONFIG_SERIAL_ISA === OUTPUT BEGIN === 1/52 Checking commit 305912d25e1c (arm: disable CONFIG_SERIAL_ISA) 2/52 Checking commit bfa4428a4fa5 (ide: split ioport registration to a separate file) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #71: new file mode 100644 WARNING: Block comments use a leading /* on a separate line #132: FILE: hw/ide/ioport.c:57: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA WARNING: Block comments use * on subsequent lines #133: FILE: hw/ide/ioport.c:58: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA + bridge has been setup properly to always register with ISA. */ WARNING: Block comments use a trailing */ on a separate line #133: FILE: hw/ide/ioport.c:58: + bridge has been setup properly to always register with ISA. */ total: 0 errors, 4 warnings, 113 lines checked Patch 2/52 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/52 Checking commit 14d967c0bd06 (vfio: move conditional up to hw/Makefile.objs) 4/52 Checking commit f6b12fb162a0 (hw/pci-host/Makefi
Re: [Qemu-devel] [PATCH 41/52] isa: express dependencies with kconfig
On 1/31/19 11:14 PM, Paolo Bonzini wrote: > On 31/01/19 22:22, Philippe Mathieu-Daudé wrote: >> I kinda disagree with the SuperIO generated configs here, but partly my >> fault because the previous Makefile.objs missed the CONFIG_ISA_SUPERIO >> (I missed to review eae2e2e96bf from Thomas where is introduced >> CONFIG_SMC37C669). >> So introducing ISA_SUPERIO simplifies this files and SouthBridge >> devices. I'm not sure how to provide this patch: > > The problem is different SuperIO chips can have or lack > floppy/serial/parallel, and so they end up having different dependencies. > > Config symbols are a tool to generate working QEMUs (where working = > build and pass device-introspect-test more or less), they needn't > reflect precisely the topology of the machine. The model implementation is: - abstract SuperIO parent which can instantiate all configs, - child implementation. Childs require their parent, and even if the parent will instantiate them without all properties, the parent needs to link with them. In short, if a SuperIO child requires ISA_SUPERIO, it also requires to link to serial/parallel/floppy/ide. That's why I prefer the explicit dependencies. Oh, actually if we correctly use the TYPE_XXX names, it might link. The only problem would be trying to instantiate a device via QMP then?
Re: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU
Patchew URL: https://patchew.org/QEMU/1548410831-19553-1-git-send-email-pbonz...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU Type: series Message-id: 1548410831-19553-1-git-send-email-pbonz...@redhat.com === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com -> patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com Switched to a new branch 'test' a79752a802 kconfig: introduce CONFIG_TEST_DEVICES c9d0fe6e67 i386-softmmu.mak: remove all CONFIG_* except boards definitions 6f1e6af4d9 isa: express SuperIO dependencies with Kconfig dc95811473 tpm: express dependencies with Kconfig af23f11ab9 virtio: express virtio dependencies with Kconfig fc253a0747 vfio: express vfio dependencies with Kconfig 04964cac83 hyperv: express dependencies with kconfig 0e23a1e99a display: express dependencies with kconfig 8d0e47d5b0 ptimer: express dependencies with Kconfig 70ffc63c86 i2c: express dependencies with Kconfig 1b10271dfb i386: express dependencies with Kconfig 4d30a49e26 isa: express dependencies with kconfig f4d520f1f7 scsi: express dependencies with Kconfig 36465626a3 build: convert usb.mak to Kconfig 47589bdbf2 build: convert sound.mak to Kconfig b96574e955 build: convert pci.mak to Kconfig 8cc438ca12 hw/pci/Makefile.objs: make pcie configurable fcc8bb50ce ide: express dependencies with Kconfig 860ef3a709 minikconf: implement allnoconfig and defconfig 934e48569c build: switch to Kconfig d253933815 kconfig: introduce kconfig files 47c5e5d250 hw/display: make edid configurable 3c7f935afa minikconfig: add semantic analysis 36b08f2e7a minikconfig: add AST 1ad0a25337 minikconfig: add parser skeleton 1733dbf5ab hw/vfio/Makefile.objs: Create new CONFIG_* variables for VFIO core and PCI b863897de3 hw/i2c/Makefile.objs: Create new CONFIG_* variables for EEPROM and ACPI controller c91ddd4eaa hw/tricore/Makefile.objs: Create CONFIG_* for tricore a9bf8be75a hw/openrisc/Makefile.objs: Create CONFIG_* for openrisc d2cdd2af82 hw/moxie/Makefile.objs: Conditionally build moxie 892410c5e9 hw/hppa/Makefile.objs: Create CONFIG_* for hppa ae6333d373 hw/cris/Makefile.objs: Create CONFIG_* for cris b9d2911c9d hw/alpha/Makefile.objs: Create CONFIG_* for alpha 3c3acae8cd hw/sparc64/Makefile.objs: Create CONFIG_* for sparc64 0a96788079 hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards 530165e2ef hw/nios2/Makefile.objs: Conditionally build nios2 fbaef04334 hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_fpga conditionally 9043ba2da9 hw/lm32/Makefile.objs: Conditionally build lm32 and milkmyst 811303a984 hw/sparc/Makefile.objs: CONFIG_* for sun4m and leon3 created 2f7135f01e hw/s390/Makefile.objs: Create new CONFIG_* variables for s390x boards and devices af8b56692c hw/sh4/Makefile.objs: New CONFIG_* varibales created for sh4 boards and device cecc461ab2 hw/ppc/Makefile.objs: Build all boards conditinally with CONFIG_* 4bf7173a1c hw/mips/Makefile.objs: Create CONFIG_* for r4k, malta, mipssim boards 6aed799dc5 hw/microblaze/Makefile.objs: Create configs for petalogix and xilinx boards 3997152f27 hw/m68k/Makefile.objs: Conditionally build boards 530a866837 hw/arm/Makefile.objs: CONFIG_VIRT created for virt board fa54373219 hw/i386/Makefile.objs: Build pc_piix* and pc_q35 boards 1b6abb71d5 build: actually use CONFIG_PAM f6b12fb162 hw/pci-host/Makefile.objs: make CONFIGS clear for PCI EXPRESS 14d967c0bd vfio: move conditional up to hw/Makefile.objs bfa4428a4f ide: split ioport registration to a separate file 305912d25e arm: disable CONFIG_SERIAL_ISA === OUTPUT BEGIN === 1/52 Checking commit 305912d25e1c (arm: disable CONFIG_SERIAL_ISA) 2/52 Checking commit bfa4428a4fa5 (ide: split ioport registration to a separate file) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #71: new file mode 100644 WARNING: Block comments use a leading /* on a separate line #132: FILE: hw/ide/ioport.c:57: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA WARNING: Block comments use * on subsequent lines #133: FILE: hw/ide/ioport.c:58: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA + bridge has been setup properly to always register with ISA. */ WARNING: Block comments use a trailing */ on a separate line #133: FILE: hw/ide/ioport.c:58: + bridge has been setup properly to always register with ISA. */ total: 0 errors, 4 warnings, 113 lines checked Patch 2/52 has style problems, please review. If any of these errors are false positives report them to the maintainer, see
Re: [Qemu-devel] [PATCH 43/52] i2c: express dependencies with Kconfig
On 31/01/19 23:10, Philippe Mathieu-Daudé wrote: > config SMBUS > bool > select I2C > > config SMBUS_EEPROM > bool > select SMBUS > > (or 'depends on') Sure. Paolo
Re: [Qemu-devel] [PATCH 41/52] isa: express dependencies with kconfig
On 31/01/19 22:22, Philippe Mathieu-Daudé wrote: > I kinda disagree with the SuperIO generated configs here, but partly my > fault because the previous Makefile.objs missed the CONFIG_ISA_SUPERIO > (I missed to review eae2e2e96bf from Thomas where is introduced > CONFIG_SMC37C669). > So introducing ISA_SUPERIO simplifies this files and SouthBridge > devices. I'm not sure how to provide this patch: The problem is different SuperIO chips can have or lack floppy/serial/parallel, and so they end up having different dependencies. Config symbols are a tool to generate working QEMUs (where working = build and pass device-introspect-test more or less), they needn't reflect precisely the topology of the machine. Paolo
Re: [Qemu-devel] [PATCH] monitor: Add whitelist support for QMP commands
Patchew URL: https://patchew.org/QEMU/20190131202637.4062-1-jus...@mail.ru/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20190131202637.4062-1-jus...@mail.ru Subject: [Qemu-devel] [PATCH] monitor: Add whitelist support for QMP commands === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20190130155733.32742-1-da...@redhat.com -> patchew/20190130155733.32742-1-da...@redhat.com * [new tag] patchew/20190131202637.4062-1-jus...@mail.ru -> patchew/20190131202637.4062-1-jus...@mail.ru Switched to a new branch 'test' 5b7f9be monitor: Add whitelist support for QMP commands === OUTPUT BEGIN === ERROR: Author email address is mangled by the mailing list #2: Author: Julia Suvorova via Qemu-devel total: 1 errors, 0 warnings, 206 lines checked Commit 5b7f9be0bbd6 (monitor: Add whitelist support for QMP commands) has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190131202637.4062-1-jus...@mail.ru/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
Re: [Qemu-devel] [PATCH 40/52] scsi: express dependencies with Kconfig
On 31/01/19 22:23, Philippe Mathieu-Daudé wrote: > You missed: > > -common-obj-y += scsi-disk.o emulation.o > -common-obj-y += scsi-generic.o scsi-bus.o > +common-obj-$(CONFIG_SCSI) += scsi-disk.o emulation.o > +common-obj-$(CONFIG_SCSI) += scsi-generic.o scsi-bus.o > I didn't: :) devices-dirs-$(CONFIG_SCSI) += scsi/ Paolo
Re: [Qemu-devel] [RFC PATCH v4 00/44] Support Kconfig in QEMU
Patchew URL: https://patchew.org/QEMU/20190123065618.3520-1-yang.zh...@intel.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/bin/bash time make docker-test-mingw@fedora SHOW_ENV=1 J=14 === TEST SCRIPT END === The full log is available at http://patchew.org/logs/20190123065618.3520-1-yang.zh...@intel.com/testing.docker-mingw@fedora/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
Re: [Qemu-devel] [PATCH 33/52] build: switch to Kconfig
On 31/01/19 22:48, Philippe Mathieu-Daudé wrote: > There is something I don't understand here: Does CONFIG_XEN in > Kconfig.host take precedence over the target configs? I'm looking at > these configs: > > if supported_xen_target $target; then > echo "CONFIG_XEN=n" >> $config_target_mak > if test "$xen_pci_passthrough" = yes; then > echo "CONFIG_XEN_PCI_PASSTHROUGH=y" >> "$config_target_mak" > fi > fi You're right, Kconfig.host should contain CONFIG_XEN_BACKEND and not CONFIG_XEN. Paolo
Re: [Qemu-devel] [PATCH 31/52] hw/display: make edid configurable
On 1/25/19 11:06 AM, Paolo Bonzini wrote: > From: Yang Zhong > > Use CONFIG_EDID to make edid-generate.c and edid-region.c > configurable. > > Signed-off-by: Yang Zhong > Reviewed-by: Thomas Huth > Message-Id: <20190123065618.3520-26-yang.zh...@intel.com> > Signed-off-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé > --- > default-configs/pci.mak | 1 + > hw/display/Makefile.objs | 4 +--- > 2 files changed, 2 insertions(+), 3 deletions(-) > > diff --git a/default-configs/pci.mak b/default-configs/pci.mak > index 037636f..0552190 100644 > --- a/default-configs/pci.mak > +++ b/default-configs/pci.mak > @@ -49,3 +49,4 @@ CONFIG_IVSHMEM_DEVICE=$(CONFIG_IVSHMEM) > CONFIG_ROCKER=y > CONFIG_VFIO=$(CONFIG_LINUX) > CONFIG_VFIO_PCI=y > +CONFIG_EDID=y > diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs > index 97acd5b..a8e23c8 100644 > --- a/hw/display/Makefile.objs > +++ b/hw/display/Makefile.objs > @@ -1,4 +1,4 @@ > -common-obj-y += edid-generate.o > +common-obj-$(CONFIG_EDID) += edid-generate.o edid-region.o > > common-obj-$(CONFIG_FW_CFG_DMA) += ramfb.o > common-obj-$(CONFIG_FW_CFG_DMA) += ramfb-standalone.o > @@ -15,12 +15,10 @@ common-obj-$(CONFIG_SSD0323) += ssd0323.o > common-obj-$(CONFIG_XEN) += xenfb.o > > common-obj-$(CONFIG_VGA_PCI) += vga-pci.o > -common-obj-$(CONFIG_VGA_PCI) += edid-region.o > common-obj-$(CONFIG_VGA_ISA) += vga-isa.o > common-obj-$(CONFIG_VGA_ISA_MM) += vga-isa-mm.o > common-obj-$(CONFIG_VMWARE_VGA) += vmware_vga.o > common-obj-$(CONFIG_BOCHS_DISPLAY) += bochs-display.o > -common-obj-$(CONFIG_BOCHS_DISPLAY) += edid-region.o > > common-obj-$(CONFIG_BLIZZARD) += blizzard.o > common-obj-$(CONFIG_EXYNOS4) += exynos4210_fimd.o >
Re: [Qemu-devel] [PATCH 43/52] i2c: express dependencies with Kconfig
Hi Paolo, On 1/25/19 11:07 AM, Paolo Bonzini wrote: > Signed-off-by: Paolo Bonzini > Signed-off-by: Yang Zhong > Acked-by: Thomas Huth > Message-Id: <20190123065618.3520-38-yang.zh...@intel.com> > Signed-off-by: Paolo Bonzini > --- > default-configs/i386-softmmu.mak | 2 -- > hw/Makefile.objs | 2 +- > hw/audio/Kconfig | 1 + > hw/display/Kconfig | 3 +++ > hw/gpio/Kconfig | 1 + > hw/i2c/Kconfig | 6 ++ > hw/i386/Kconfig | 1 + > hw/input/Kconfig | 1 + > hw/isa/Kconfig | 1 + > hw/misc/Kconfig | 4 > hw/timer/Kconfig | 3 +++ > 11 files changed, 22 insertions(+), 3 deletions(-) > > diff --git a/default-configs/i386-softmmu.mak > b/default-configs/i386-softmmu.mak > index 9eb9a5e..4aa04e4 100644 > --- a/default-configs/i386-softmmu.mak > +++ b/default-configs/i386-softmmu.mak > @@ -22,8 +22,6 @@ CONFIG_NVDIMM=y > CONFIG_ACPI_NVDIMM=y > CONFIG_PXB=y > CONFIG_ACPI_VMGENID=y > -CONFIG_SMBUS_EEPROM=y > -CONFIG_I2C=y > CONFIG_PCI_DEVICES=y > > # Boards: > diff --git a/hw/Makefile.objs b/hw/Makefile.objs > index e2fcd6a..225f6cc 100644 > --- a/hw/Makefile.objs > +++ b/hw/Makefile.objs > @@ -10,7 +10,7 @@ devices-dirs-$(CONFIG_SOFTMMU) += display/ > devices-dirs-$(CONFIG_SOFTMMU) += dma/ > devices-dirs-$(CONFIG_SOFTMMU) += gpio/ > devices-dirs-$(CONFIG_HYPERV) += hyperv/ > -devices-dirs-$(CONFIG_SOFTMMU) += i2c/ > +devices-dirs-$(CONFIG_I2C) += i2c/ > devices-dirs-$(CONFIG_SOFTMMU) += ide/ > devices-dirs-$(CONFIG_SOFTMMU) += input/ > devices-dirs-$(CONFIG_SOFTMMU) += intc/ > diff --git a/hw/audio/Kconfig b/hw/audio/Kconfig > index 01aea55..e9c6fed 100644 > --- a/hw/audio/Kconfig > +++ b/hw/audio/Kconfig > @@ -40,6 +40,7 @@ config PCSPK > > config WM8750 > bool > +depends on I2C > > config PL041 > bool > diff --git a/hw/display/Kconfig b/hw/display/Kconfig > index 64a5764..66044ca 100644 > --- a/hw/display/Kconfig > +++ b/hw/display/Kconfig > @@ -24,9 +24,11 @@ config PL110 > > config SII9022 > bool > +depends on I2C > > config SSD0303 > bool > +depends on I2C > > config SSD0323 > bool > @@ -71,6 +73,7 @@ config MILKYMIST_TMU2 > > config SM501 > bool > +depends on I2C > > config TCX > bool > diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig > index d0a4abf..9227cb5 100644 > --- a/hw/gpio/Kconfig > +++ b/hw/gpio/Kconfig > @@ -1,5 +1,6 @@ > config MAX7310 > bool > +depends on I2C > > config PL061 > bool > diff --git a/hw/i2c/Kconfig b/hw/i2c/Kconfig > index d6d4402..74c9328 100644 > --- a/hw/i2c/Kconfig > +++ b/hw/i2c/Kconfig > @@ -3,18 +3,24 @@ config I2C > > config SMBUS_EEPROM > bool > +depends on I2C Can we have: config SMBUS bool select I2C config SMBUS_EEPROM bool select SMBUS (or 'depends on') > > config DDC > bool > +depends on I2C > > config VERSATILE_I2C > bool > +select I2C > > config ACPI_SMBUS > bool > +select I2C select SMBUS > > config BITBANG_I2C > bool > +select I2C > > config IMX_I2C > bool > +select I2C > diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig > index 8814b7c..966c97c 100644 > --- a/hw/i386/Kconfig > +++ b/hw/i386/Kconfig > @@ -27,6 +27,7 @@ config PC_ACPI > select ACPI_X86 > select ACPI_CPU_HOTPLUG > select ACPI_MEMORY_HOTPLUG > +select SMBUS_EEPROM > depends on ACPI_SMBUS > > config I440FX > diff --git a/hw/input/Kconfig b/hw/input/Kconfig > index bdb4237..ec014a9 100644 > --- a/hw/input/Kconfig > +++ b/hw/input/Kconfig > @@ -3,6 +3,7 @@ config ADB > > config LM832X > bool > +depends on I2C > > config PCKBD > bool > diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig > index 6f0812d..fcd87b4 100644 > --- a/hw/isa/Kconfig > +++ b/hw/isa/Kconfig > @@ -19,6 +19,7 @@ config PIIX4 > config VT82C686 > bool > select ISA_BUS > +select ACPI_SMBUS > > config SMC37C669 > bool > diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig > index ca051fb..0680d1e 100644 > --- a/hw/misc/Kconfig > +++ b/hw/misc/Kconfig > @@ -7,9 +7,11 @@ config MAX111X > > config TMP105 > bool > +depends on I2C > > config TMP421 > bool > +depends on I2C > > config ISA_DEBUG > bool > @@ -34,6 +36,7 @@ config EDU > > config PCA9552 > bool > +depends on I2C > > config PL310 > bool > @@ -100,3 +103,4 @@ config PVPANIC > > config AUX > bool > +select I2C > diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig > index 7dbc121..e1a6e74 100644 > --- a/hw/timer/Kconfig > +++ b/hw/timer/Kconfig > @@ -9,6 +9,7 @@ config A9_GTIMER > > config DS1338 > bool > +depends on I2C > > config HPET > bool > @@ -18,6 +19,7 @@ config I8254 > > config M41T80 > bool > +depends on I2C > > config M48T59 > bool
[Qemu-devel] [RFC PATCH 0/3] lm32: convert to new common tcg infrastructure
The main problem here is, that there is no prebuilt compiler packages. Thus I have to build the toolchain from scratch. I don't know if this is OK in the docker image. For now only binutils is built. But then, I'll have to pass the LD and AS environment variables, too. And it won't work with the native host cross toolchain - unless we'll probe for the assembler and linker, too. Any ideas? Michael Walle (3): tests/docker: add debian-lm32-cross image tests/tcg: also pass AS and LD variables tests/tcg/lm32: enable system tests tests/docker/Makefile.include | 5 +- tests/docker/dockerfiles/debian-lm32-cross.docker | 31 +++ tests/tcg/Makefile.include| 13 ++- tests/tcg/lm32/Makefile | 106 -- tests/tcg/lm32/Makefile.include | 8 ++ tests/tcg/lm32/Makefile.softmmu-target| 33 +++ 6 files changed, 86 insertions(+), 110 deletions(-) create mode 100644 tests/docker/dockerfiles/debian-lm32-cross.docker delete mode 100644 tests/tcg/lm32/Makefile create mode 100644 tests/tcg/lm32/Makefile.include create mode 100644 tests/tcg/lm32/Makefile.softmmu-target -- 2.11.0
[Qemu-devel] [RFC PATCH 2/3] tests/tcg: also pass AS and LD variables
The lm32 architecture doesn't need the complete compiler. In fact, only the building of GCC is skipped to make building the docker image faster. Signed-off-by: Michael Walle --- tests/tcg/Makefile.include | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/tests/tcg/Makefile.include b/tests/tcg/Makefile.include index 73b5626fc5..19b81400f5 100644 --- a/tests/tcg/Makefile.include +++ b/tests/tcg/Makefile.include @@ -41,17 +41,26 @@ ifneq ($(DOCKER_IMAGE),) # We also need the Docker make rules to depend on include $(SRC_PATH)/tests/docker/Makefile.include -DOCKER_COMPILE_CMD="$(DOCKER_SCRIPT) cc --user $(shell id -u) \ +DOCKER_CC_CMD="$(DOCKER_SCRIPT) cc --user $(shell id -u) \ --cc $(DOCKER_CROSS_COMPILER) \ -i qemu:$(DOCKER_IMAGE) \ -s $(SRC_PATH) -- " +DOCKER_AS_CMD="$(DOCKER_SCRIPT) cc --user $(shell id -u) \ + --cc $(DOCKER_CROSS_ASSEMBLER) \ + -i qemu:$(DOCKER_IMAGE) \ + -s $(SRC_PATH) -- " +DOCKER_LD_CMD="$(DOCKER_SCRIPT) cc --user $(shell id -u) \ + --cc $(DOCKER_CROSS_LINKER) \ + -i qemu:$(DOCKER_IMAGE) \ + -s $(SRC_PATH) -- " DOCKER_PREREQ=docker-image-$(DOCKER_IMAGE) .PHONY: docker-build-guest-tests docker-build-guest-tests: $(DOCKER_PREREQ) $(call quiet-command, \ (mkdir -p tests && cd tests && \ - $(MAKE) -f $(TCG_MAKE) CC=$(DOCKER_COMPILE_CMD) \ + $(MAKE) -f $(TCG_MAKE) CC=$(DOCKER_CC_CMD) \ + AS=$(DOCKER_AS_CMD) LD=$(DOCKER_LD_CMD) \ BUILD_STATIC=y \ EXTRA_CFLAGS=$(DOCKER_CROSS_COMPILER_CFLAGS)), \ "BUILD","$(TARGET_NAME) guest-tests with docker qemu:$(DOCKER_IMAGE)") -- 2.11.0
Re: [Qemu-devel] [PATCH] target/s390x: Fix LGPL version in the file header comments
On 1/30/19 7:01 AM, Eric Blake wrote: > On 1/29/19 7:51 AM, Cornelia Huck wrote: >> Given that there have been several of these cases (and that there's a >> lot of boilerplate in general): Should we adopt SPDX license >> identifiers for QEMU, as the Linux kernel did? They also discovered and >> fixed some problems/oddities while at it. > > I'm also in favor of SPDX license identifiers - their brevity and > machine-parsability favors more accurate usage and fewer copy/paste > mistake propagation. +1. r~
[Qemu-devel] [RFC PATCH 3/3] tests/tcg/lm32: enable system tests
Convert the existing to the new common cross build infrastructure. Signed-off-by: Michael Walle --- tests/tcg/lm32/Makefile| 106 - tests/tcg/lm32/Makefile.include| 8 +++ tests/tcg/lm32/Makefile.softmmu-target | 33 ++ 3 files changed, 41 insertions(+), 106 deletions(-) delete mode 100644 tests/tcg/lm32/Makefile create mode 100644 tests/tcg/lm32/Makefile.include create mode 100644 tests/tcg/lm32/Makefile.softmmu-target diff --git a/tests/tcg/lm32/Makefile b/tests/tcg/lm32/Makefile deleted file mode 100644 index 57e7363b2c..00 --- a/tests/tcg/lm32/Makefile +++ /dev/null @@ -1,106 +0,0 @@ --include ../../../config-host.mak - -CROSS=lm32-elf- - -SIM = qemu-system-lm32 -SIMFLAGS = -M lm32-evr -nographic -semihosting -net none -kernel - -CC = $(CROSS)gcc -AS = $(CROSS)as -AS = $(CC) -x assembler -SIZE= $(CROSS)size -LD = $(CC) -OBJCOPY = $(CROSS)objcopy - -TSRC_PATH = $(SRC_PATH)/tests/tcg/lm32 - -LDFLAGS = -T$(TSRC_PATH)/linker.ld -ASFLAGS += -Wa,-I,$(TSRC_PATH)/ - -CRT= crt.o -HELPER = helper.o -TESTCASES += test_add.tst -TESTCASES += test_addi.tst -TESTCASES += test_and.tst -TESTCASES += test_andhi.tst -TESTCASES += test_andi.tst -TESTCASES += test_b.tst -TESTCASES += test_be.tst -TESTCASES += test_bg.tst -TESTCASES += test_bge.tst -TESTCASES += test_bgeu.tst -TESTCASES += test_bgu.tst -TESTCASES += test_bi.tst -TESTCASES += test_bne.tst -TESTCASES += test_break.tst -TESTCASES += test_bret.tst -TESTCASES += test_call.tst -TESTCASES += test_calli.tst -TESTCASES += test_cmpe.tst -TESTCASES += test_cmpei.tst -TESTCASES += test_cmpg.tst -TESTCASES += test_cmpgi.tst -TESTCASES += test_cmpge.tst -TESTCASES += test_cmpgei.tst -TESTCASES += test_cmpgeu.tst -TESTCASES += test_cmpgeui.tst -TESTCASES += test_cmpgu.tst -TESTCASES += test_cmpgui.tst -TESTCASES += test_cmpne.tst -TESTCASES += test_cmpnei.tst -TESTCASES += test_divu.tst -TESTCASES += test_eret.tst -TESTCASES += test_lb.tst -TESTCASES += test_lbu.tst -TESTCASES += test_lh.tst -TESTCASES += test_lhu.tst -TESTCASES += test_lw.tst -TESTCASES += test_modu.tst -TESTCASES += test_mul.tst -TESTCASES += test_muli.tst -TESTCASES += test_nor.tst -TESTCASES += test_nori.tst -TESTCASES += test_or.tst -TESTCASES += test_ori.tst -TESTCASES += test_orhi.tst -#TESTCASES += test_rcsr.tst -TESTCASES += test_ret.tst -TESTCASES += test_sb.tst -TESTCASES += test_scall.tst -TESTCASES += test_sextb.tst -TESTCASES += test_sexth.tst -TESTCASES += test_sh.tst -TESTCASES += test_sl.tst -TESTCASES += test_sli.tst -TESTCASES += test_sr.tst -TESTCASES += test_sri.tst -TESTCASES += test_sru.tst -TESTCASES += test_srui.tst -TESTCASES += test_sub.tst -TESTCASES += test_sw.tst -#TESTCASES += test_wcsr.tst -TESTCASES += test_xnor.tst -TESTCASES += test_xnori.tst -TESTCASES += test_xor.tst -TESTCASES += test_xori.tst - -all: build - -%.o: $(TSRC_PATH)/%.c - $(CC) $(CFLAGS) -c $< -o $@ - -%.o: $(TSRC_PATH)/%.S - $(AS) $(ASFLAGS) -c $< -o $@ - -%.tst: %.o $(TSRC_PATH)/macros.inc $(CRT) $(HELPER) - $(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $(HELPER) $< -o $@ - -build: $(TESTCASES) - -check: $(TESTCASES:test_%.tst=check_%) - -check_%: test_%.tst - @$(SIM) $(SIMFLAGS) $< - -clean: - $(RM) -fr $(TESTCASES) $(CRT) $(HELPER) diff --git a/tests/tcg/lm32/Makefile.include b/tests/tcg/lm32/Makefile.include new file mode 100644 index 00..f36f23031d --- /dev/null +++ b/tests/tcg/lm32/Makefile.include @@ -0,0 +1,8 @@ +# +# Makefile.include for all CRIS targets +# + +DOCKER_IMAGE=debian-lm32-cross +DOCKER_CROSS_COMPILER=lm32-elf-gcc +DOCKER_CROSS_ASSEMBLER=lm32-elf-as +DOCKER_CROSS_LINKER=lm32-elf-ld diff --git a/tests/tcg/lm32/Makefile.softmmu-target b/tests/tcg/lm32/Makefile.softmmu-target new file mode 100644 index 00..71a1a1802b --- /dev/null +++ b/tests/tcg/lm32/Makefile.softmmu-target @@ -0,0 +1,33 @@ +# +# lm32 softmmu tests +# + +LM32_SRC = $(SRC_PATH)/tests/tcg/lm32 +LM32_ALL = $(wildcard $(LM32_SRC)/test_*.S) +LM32_TESTS = $(patsubst $(LM32_SRC)/%.S, %, $(LM32_ALL)) +# Filter out common blobs and broken tests +LM32_BROKEN_TESTS = +LM32_USABLE_TESTS = $(filter-out $(LM32_BROKEN_TESTS), $(LM32_TESTS)) +LM32_RUNS = $(patsubst %, run-%, $(LM32_USABLE_TESTS)) + +# add to the list of tests +TESTS += $(LM32_USABLE_TESTS) +VPATH += $(LM32_SRC) + +QEMU_OPTS = -M lm32-evr -nographic -semihosting -net none -serial none -monitor none -kernel + +INCLUDE_DIRS = $(SRC_PATH)/tests/tcg/lm32 +LM32_INC = $(addprefix -I,$(INCLUDE_DIRS)) + +LDFLAGS = -T$(SRC_PATH)/tests/tcg/lm32/linker.ld + +CRT= crt.o helper.o + +$(LM32_USABLE_TESTS): macros.inc $(CRT) Makefile.softmmu-target + +# special rule for common blobs +%.o: %.S + $(AS) $(LM32_INC) $(ASFLAGS) -c $< -o $@ + +%: %.o + $(LD) $(LM32_INC) $< -o $@ $(LDFLAGS) $(CRT) -- 2.11.0
Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 2/3] target/ppc: Add GDB callbacks for SPRs
Alexey Kardashevskiy writes: > On 31/01/2019 03:30, Fabiano Rosas wrote: >> Alexey Kardashevskiy writes: >> >>> >>> but this is a register which does not have endianness, the endianness >>> appears here because the interface between gdb and qemu is >>> uint8_t*==bytestream but this interface should have fixed endianness >>> imho (now it is bigendian afaict). >>> >>> Something is not right here... >> >> Having a fixed endianness would not work because GDB have no way of >> knowing how to represent what comes from the remote end. > > It definitely would. A register is stored as "unsigned long" in QEMU and > all gdb has to do is printf("%lx") and that is it. OK, but something is not clear to me. Even if GDB just printf("%lx") the value, we would still have to bswap when the host is LE, right? QEMU BE: (gdb) x/8xb &env->spr[287] 0x11391760: 0x000x000x000x000x000x4e0x120x00 QEMU LE: (gdb) x/8xb &env->spr[287] 0x75bd98c0: 0x010x020x4b0x000x000x000x000x00 > The problem is that > we want to pass it as a byte stream from the gdb_read_register() hook > all the way to gdb and for some reason gdb does not define endianness of > that stream but rather tries guessing the endianness which is broken. GDB does define the endianness of the stream (in a way): "Each byte of register data is described by two hex digits. The bytes with the register are transmitted in target byte order." https://sourceware.org/gdb/current/onlinedocs/gdb/Packets.html#Packets > Today I was debugging rtas/clientinterface calls which a little endian > kernel makes and these calls need to switch to the big endian first. And > gdb goes nuts when this switch happens (note that I did not give an ELF > to gdb this time so it picked LE itself). Even if it could fetch the > endianness from QEMU, it would fail as it is an LE bit in MSR which is a > register which is parsed according to the gdb's idea of endianness :) I think it would be possible to define another packet for the remote protocol that informs the endianness explicitly at each time the guest stops. If you provide more info on how to reproduce that issue I could put in my list or go bug GDB folks about it. >> It will >> always check the target endianness before printing a value, even if it >> refers to a register: >> >> https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob;f=gdb/findvar.c;hb=HEAD#l49 >> >> So in our case the contents of mem_buf need to match both the guest >> endianness *and* what GDB has set for 'show endian' because it will >> detect it automatically from the ELF. If it guesses incorrectly because >> there is no ELF, we need to use the 'set endian' command. >> >> By the way, this is already the behavior for the registers that are >> already implemented (e.g. $msr). Here's the commit that introduced >> that: >> >> https://git.qemu.org/?p=qemu.git;a=commitdiff;h=8a286ce4502356ce0b97a2424a2cb7 >> >> Now, what might be a source of confusion here is the fact that we >> *always* do a bswap when the host is LE because QEMU thinks that the ppc >> guest is always BE. That requires the maybe_bswap function to make >> things right in the end. >> >> What I could do is try to improve this by only swapping when the >> guest's actual endianness (msr_le) is different from the host's. > > The bytestream for registers should have fixed endianness. But looking > at the gdb code makes me think it is not going to happen :( Yes, I can't think of a way to fix that without changing the way GDB exhibits the values or the remote protocol. May I proceed with this series as it is with the bswaps? >> That >> is not entirely within the scope of this patch, though. > > True. But since you are touching this, may be you could fix gdb too :) > > Does gdb tell QEMU about what endianness it thinks that QEMU is using? > Or can it read it from QEMU? I cannot easily spot this in QEMU... GDB currently does not tell and does not ask about endianness. So I believe there is room for improvement here. I could not find it in the documentation but I think that GDB supports file transfers and it asks for the ELF in some scenarios. This approach could be one way of informing it about the endianness, although it has its own shortcomings.
Re: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU
Patchew URL: https://patchew.org/QEMU/1548410831-19553-1-git-send-email-pbonz...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU Type: series Message-id: 1548410831-19553-1-git-send-email-pbonz...@redhat.com === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com -> patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com Switched to a new branch 'test' 12539e4899 kconfig: introduce CONFIG_TEST_DEVICES 2fadac69d9 i386-softmmu.mak: remove all CONFIG_* except boards definitions 8c1fb84ff4 isa: express SuperIO dependencies with Kconfig 8e3174384e tpm: express dependencies with Kconfig 7ffb3fa21b virtio: express virtio dependencies with Kconfig 5a72a0c385 vfio: express vfio dependencies with Kconfig a597633380 hyperv: express dependencies with kconfig 1ef5cc5fb7 display: express dependencies with kconfig fdd2c128b7 ptimer: express dependencies with Kconfig fdf78be1f4 i2c: express dependencies with Kconfig 9b937662f4 i386: express dependencies with Kconfig 583608364d isa: express dependencies with kconfig 7a26eaae95 scsi: express dependencies with Kconfig 74950a85f9 build: convert usb.mak to Kconfig 069934d3cb build: convert sound.mak to Kconfig 5d186272f9 build: convert pci.mak to Kconfig f08f56a670 hw/pci/Makefile.objs: make pcie configurable f4642a7c62 ide: express dependencies with Kconfig 5a452a1fc1 minikconf: implement allnoconfig and defconfig 8aa73695da build: switch to Kconfig 26b1ac2c0b kconfig: introduce kconfig files c4119d6e81 hw/display: make edid configurable 9a6e43617c minikconfig: add semantic analysis afcf405ac2 minikconfig: add AST 2f64711b7c minikconfig: add parser skeleton 18ac9b6814 hw/vfio/Makefile.objs: Create new CONFIG_* variables for VFIO core and PCI 5e30d1f03e hw/i2c/Makefile.objs: Create new CONFIG_* variables for EEPROM and ACPI controller 8254b1b5e1 hw/tricore/Makefile.objs: Create CONFIG_* for tricore 150eb60214 hw/openrisc/Makefile.objs: Create CONFIG_* for openrisc b1fe09618b hw/moxie/Makefile.objs: Conditionally build moxie baf0d866cb hw/hppa/Makefile.objs: Create CONFIG_* for hppa 13aa0274be hw/cris/Makefile.objs: Create CONFIG_* for cris 1098821e31 hw/alpha/Makefile.objs: Create CONFIG_* for alpha aa55c758c4 hw/sparc64/Makefile.objs: Create CONFIG_* for sparc64 3d4876ad59 hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards c2ce7cf461 hw/nios2/Makefile.objs: Conditionally build nios2 60bf62c31c hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_fpga conditionally 6a9dfa037f hw/lm32/Makefile.objs: Conditionally build lm32 and milkmyst e341e43ea7 hw/sparc/Makefile.objs: CONFIG_* for sun4m and leon3 created c02d4cdf59 hw/s390/Makefile.objs: Create new CONFIG_* variables for s390x boards and devices d90d4f8bb0 hw/sh4/Makefile.objs: New CONFIG_* varibales created for sh4 boards and device aa9c376735 hw/ppc/Makefile.objs: Build all boards conditinally with CONFIG_* 4feddc17c4 hw/mips/Makefile.objs: Create CONFIG_* for r4k, malta, mipssim boards d681b512df hw/microblaze/Makefile.objs: Create configs for petalogix and xilinx boards 8a86443748 hw/m68k/Makefile.objs: Conditionally build boards 9321f38d4c hw/arm/Makefile.objs: CONFIG_VIRT created for virt board 67293f7ac0 hw/i386/Makefile.objs: Build pc_piix* and pc_q35 boards a2f1b83828 build: actually use CONFIG_PAM 48ca0b0bb0 hw/pci-host/Makefile.objs: make CONFIGS clear for PCI EXPRESS f9385aff8c vfio: move conditional up to hw/Makefile.objs 3c1f0c425e ide: split ioport registration to a separate file de15bc290e arm: disable CONFIG_SERIAL_ISA === OUTPUT BEGIN === 1/52 Checking commit de15bc290e9c (arm: disable CONFIG_SERIAL_ISA) 2/52 Checking commit 3c1f0c425e86 (ide: split ioport registration to a separate file) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #71: new file mode 100644 WARNING: Block comments use a leading /* on a separate line #132: FILE: hw/ide/ioport.c:57: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA WARNING: Block comments use * on subsequent lines #133: FILE: hw/ide/ioport.c:58: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA + bridge has been setup properly to always register with ISA. */ WARNING: Block comments use a trailing */ on a separate line #133: FILE: hw/ide/ioport.c:58: + bridge has been setup properly to always register with ISA. */ total: 0 errors, 4 warnings, 113 lines checked Patch 2/52 has style problems, please review. If any of these errors are false positives report them to the maintainer, see
[Qemu-devel] [RFC PATCH 1/3] tests/docker: add debian-lm32-cross image
Unfortunately, there is no debian package for the lm32 toolchain. To keep the build times short, only build the binutils from scratch. Signed-off-by: Michael Walle --- tests/docker/Makefile.include | 5 ++-- tests/docker/dockerfiles/debian-lm32-cross.docker | 31 +++ 2 files changed, 34 insertions(+), 2 deletions(-) create mode 100644 tests/docker/dockerfiles/debian-lm32-cross.docker diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include index 0b9c8828e1..055bfc594d 100644 --- a/tests/docker/Makefile.include +++ b/tests/docker/Makefile.include @@ -90,6 +90,7 @@ docker-image-debian-amd64: docker-image-debian9 docker-image-debian-armel-cross: docker-image-debian9 docker-image-debian-armhf-cross: docker-image-debian9 docker-image-debian-arm64-cross: docker-image-debian9 +docker-image-debian-lm32-cross: docker-image-debian9 docker-image-debian-mips-cross: docker-image-debian9 docker-image-debian-mipsel-cross: docker-image-debian9 docker-image-debian-mips64el-cross: docker-image-debian9 @@ -114,8 +115,8 @@ docker-image-tricore-cross: docker-image-debian9 # These images may be good enough for building tests but not for test builds DOCKER_PARTIAL_IMAGES += debian-alpha-cross debian-hppa-cross debian-m68k-cross debian-sh4-cross DOCKER_PARTIAL_IMAGES += debian-sparc64-cross debian-mips64-cross debian-riscv64-cross -DOCKER_PARTIAL_IMAGES += debian-tricore-cross debian-powerpc-cross fedora-i386-cross -DOCKER_PARTIAL_IMAGES += fedora-cris-cross +DOCKER_PARTIAL_IMAGES += debian-tricore-cross debian-powerpc-cross debian-lm32-cross +DOCKER_PARTIAL_IMAGES += fedora-i386-cross fedora-cris-cross # Rules for building linux-user powered images # diff --git a/tests/docker/dockerfiles/debian-lm32-cross.docker b/tests/docker/dockerfiles/debian-lm32-cross.docker new file mode 100644 index 00..1114d8ac6d --- /dev/null +++ b/tests/docker/dockerfiles/debian-lm32-cross.docker @@ -0,0 +1,31 @@ +# +# Docker LatticeMico32 cross-compiler target +# +# This docker target builds on the debian Stretch base image. +# +# Copyright (c) 2019 Michael Walle +# Copyright (c) 2018 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: GPL-2.0-or-later +# +FROM qemu:debian9 + +MAINTAINER Michael Walle + +RUN apt-get update && \ +DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata +RUN DEBIAN_FRONTEND=noninteractive eatmydata \ +apt-get install -y --no-install-recommends \ +wget + +ENV BINUTILS_VERSION 2.31 + +RUN wget http://ftp.gnu.org/gnu/binutils/binutils-$BINUTILS_VERSION.tar.xz && \ +tar -xJf binutils-$BINUTILS_VERSION.tar.xz -C /usr/src && \ +cd /usr/src/binutils-$BINUTILS_VERSION && \ +./configure --prefix=/usr --disable-nls --target=lm32-elf && \ +make && make install && \ +rm -rf /usr/src/binutils-$BINUTILS_VERSION + +# This image isn't designed for building QEMU but building tests +ENV QEMU_CONFIGURE_OPTS --disable-system --disable-user -- 2.11.0
Re: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU
Patchew URL: https://patchew.org/QEMU/1548410831-19553-1-git-send-email-pbonz...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1548410831-19553-1-git-send-email-pbonz...@redhat.com Subject: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com -> patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com Switched to a new branch 'test' 12539e4 kconfig: introduce CONFIG_TEST_DEVICES 2fadac6 i386-softmmu.mak: remove all CONFIG_* except boards definitions 8c1fb84 isa: express SuperIO dependencies with Kconfig 8e31743 tpm: express dependencies with Kconfig 7ffb3fa virtio: express virtio dependencies with Kconfig 5a72a0c vfio: express vfio dependencies with Kconfig a597633 hyperv: express dependencies with kconfig 1ef5cc5 display: express dependencies with kconfig fdd2c12 ptimer: express dependencies with Kconfig fdf78be i2c: express dependencies with Kconfig 9b93766 i386: express dependencies with Kconfig 5836083 isa: express dependencies with kconfig 7a26eaa scsi: express dependencies with Kconfig 74950a8 build: convert usb.mak to Kconfig 069934d build: convert sound.mak to Kconfig 5d18627 build: convert pci.mak to Kconfig f08f56a hw/pci/Makefile.objs: make pcie configurable f4642a7 ide: express dependencies with Kconfig 5a452a1 minikconf: implement allnoconfig and defconfig 8aa7369 build: switch to Kconfig 26b1ac2 kconfig: introduce kconfig files c4119d6 hw/display: make edid configurable 9a6e436 minikconfig: add semantic analysis afcf405 minikconfig: add AST 2f64711 minikconfig: add parser skeleton 18ac9b6 hw/vfio/Makefile.objs: Create new CONFIG_* variables for VFIO core and PCI 5e30d1f hw/i2c/Makefile.objs: Create new CONFIG_* variables for EEPROM and ACPI controller 8254b1b hw/tricore/Makefile.objs: Create CONFIG_* for tricore 150eb60 hw/openrisc/Makefile.objs: Create CONFIG_* for openrisc b1fe096 hw/moxie/Makefile.objs: Conditionally build moxie baf0d86 hw/hppa/Makefile.objs: Create CONFIG_* for hppa 13aa027 hw/cris/Makefile.objs: Create CONFIG_* for cris 1098821 hw/alpha/Makefile.objs: Create CONFIG_* for alpha aa55c75 hw/sparc64/Makefile.objs: Create CONFIG_* for sparc64 3d4876a hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards c2ce7cf hw/nios2/Makefile.objs: Conditionally build nios2 60bf62c hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_fpga conditionally 6a9dfa0 hw/lm32/Makefile.objs: Conditionally build lm32 and milkmyst e341e43 hw/sparc/Makefile.objs: CONFIG_* for sun4m and leon3 created c02d4cd hw/s390/Makefile.objs: Create new CONFIG_* variables for s390x boards and devices d90d4f8 hw/sh4/Makefile.objs: New CONFIG_* varibales created for sh4 boards and device aa9c376 hw/ppc/Makefile.objs: Build all boards conditinally with CONFIG_* 4feddc1 hw/mips/Makefile.objs: Create CONFIG_* for r4k, malta, mipssim boards d681b51 hw/microblaze/Makefile.objs: Create configs for petalogix and xilinx boards 8a86443 hw/m68k/Makefile.objs: Conditionally build boards 9321f38 hw/arm/Makefile.objs: CONFIG_VIRT created for virt board 67293f7 hw/i386/Makefile.objs: Build pc_piix* and pc_q35 boards a2f1b83 build: actually use CONFIG_PAM 48ca0b0 hw/pci-host/Makefile.objs: make CONFIGS clear for PCI EXPRESS f9385af vfio: move conditional up to hw/Makefile.objs 3c1f0c4 ide: split ioport registration to a separate file de15bc2 arm: disable CONFIG_SERIAL_ISA === OUTPUT BEGIN === 1/52 Checking commit de15bc290e9c (arm: disable CONFIG_SERIAL_ISA) 2/52 Checking commit 3c1f0c425e86 (ide: split ioport registration to a separate file) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #71: new file mode 100644 WARNING: Block comments use a leading /* on a separate line #132: FILE: hw/ide/ioport.c:57: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA WARNING: Block comments use * on subsequent lines #133: FILE: hw/ide/ioport.c:58: +/* ??? Assume only ISA and PCI configurations, and that the PCI-ISA + bridge has been setup properly to always register with ISA. */ WARNING: Block comments use a trailing */ on a separate line #133: FILE: hw/ide/ioport.c:58: + bridge has been setup properly to always register with ISA. */ total: 0 errors, 4 warnings, 113 lines checked Patch 2/52 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/52 Checking commit f9385aff8c74 (vfio: move conditional up to hw/Makefile.objs) 4/52 Checking commit 48ca0b0bb040 (hw/pci-host/Makefi
Re: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU
Patchew URL: https://patchew.org/QEMU/1548410831-19553-1-git-send-email-pbonz...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [RFC PATCH v5 00/52] Support Kconfig in QEMU Message-id: 1548410831-19553-1-git-send-email-pbonz...@redhat.com Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com -> patchew/1548410831-19553-1-git-send-email-pbonz...@redhat.com Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone' Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex' Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3' Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3' Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out 'd4e7d7ac663fcb55f1b93575445fcbca372f17a7' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out '9b7ab2fa020341dee8bf9df6c9cf40003e0136df' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588' Cloning into 'tests/fp/berkeley-softfloat-3'... Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037' Cloning into 'tests/fp/berkeley-testfloat-3'... Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' 12539e4 kconfig: introduce CONFIG_TEST_DEVICES 2fadac6 i386-softmmu.mak: remove all CONFIG_* except boards definitions 8c1fb84 isa: express SuperIO dependencies with Kconfig 8e31743 tpm: express dependencies with
Re: [Qemu-devel] [PATCH] monitor: Add whitelist support for QMP commands
On 01.02.2019 0:03, Eric Blake wrote: On 1/31/19 2:26 PM, Julia Suvorova via Qemu-devel wrote: The whitelist option allows to run a reduced monitor with a subset of QMP commands. This allows the monitor to run in secure mode, which is convenient for sending commands via the WebSocket monitor using the web UI. This is planned to be done on micro:bit board. The list of allowed commands should be written to a file, one per line. The command line will look like this: -mon chardev_name,mode=control,whitelist=path_to_file Signed-off-by: Julia Suvorova --- -void monitor_init(Chardev *chr, int flags) +static void process_whitelist_file(Monitor *mon, const char *whitelist_file) +{ +char cmd_name[256]; +FILE *fd = fopen(whitelist_file, "r"); If you use qemu_open() here (followed by fdopen if you still prefer fscanf over read), then you can support "/dev/fdset/NNN" to auto-magically support someone passing in the whitelist via an inherited file descriptor, rather than having to be somewhere on disk that qemu can directly open(). Cool, thanks! + +if (fd == NULL) { +error_report("Could not open whitelist file: %s", strerror(errno)); +exit(1); +} + +mon->whitelist = g_hash_table_new_full(g_str_hash, + g_str_equal, + g_free, + NULL); + +g_hash_table_add(mon->whitelist, g_strdup("qmp_capabilities")); +g_hash_table_add(mon->whitelist, g_strdup("query-commands")); + +while (fscanf(fd, "%255s", cmd_name) == 1) { %255s fits your cmd_name array declaration and stops consuming at either 255 bytes or at the first whitespace encountered, but where do you check for overflow from a file that passes more than 255 non-whitespace bytes without a newline? Also, this is a bit sloppy in that it skips all leading whitespace, rather than ensuring that the user actually passed newline-separated command names. Does glib provide any interfaces for more easily reading in an array of lines from a file? With glib it would be something like that: g_mapped_file_new_from_fd() : fd -> GMappedFile g_mapped_file_get_contents() : GMappedFile -> char * g_strsplit_set() : char * -> char ** All this would need to be released afterwards. Do you think it would be better? Best regards, Julia Suvorova.
Re: [Qemu-devel] [PATCH 05/52] build: actually use CONFIG_PAM
On 1/25/19 11:06 AM, Paolo Bonzini wrote: > Do not link it unconditionally into all binaries. Nice :) > Signed-off-by: Paolo Bonzini > Signed-off-by: Yang Zhong > Reviewed-by: Thomas Huth > Message-Id: <20190123065618.3520-3-yang.zh...@intel.com> > Signed-off-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé > --- > default-configs/i386-softmmu.mak | 1 + > hw/pci-host/Makefile.objs| 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/default-configs/i386-softmmu.mak > b/default-configs/i386-softmmu.mak > index 2f919df..48da996 100644 > --- a/default-configs/i386-softmmu.mak > +++ b/default-configs/i386-softmmu.mak > @@ -67,3 +67,4 @@ CONFIG_I2C=y > CONFIG_SEV=$(CONFIG_KVM) > CONFIG_VTD=y > CONFIG_AMD_IOMMU=y > +CONFIG_PAM=y > diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs > index 073d512..a9cd3e0 100644 > --- a/hw/pci-host/Makefile.objs > +++ b/hw/pci-host/Makefile.objs > @@ -1,4 +1,4 @@ > -common-obj-y += pam.o > +common-obj-$(CONFIG_PAM) += pam.o > > # PPC devices > common-obj-$(CONFIG_PREP_PCI) += prep.o >
Re: [Qemu-devel] [PATCH 10/52] hw/mips/Makefile.objs: Create CONFIG_* for r4k, malta, mipssim boards
On 1/25/19 11:06 AM, Paolo Bonzini wrote: > From: Ákos Kovács > > Add the new configs to default-configs/mips*-sofmmu.mak. > > Signed-off-by: Ákos Kovács > Signed-off-by: Paolo Bonzini > Signed-off-by: Yang Zhong > Message-Id: <20190123065618.3520-8-yang.zh...@intel.com> > Reviewed-by: Thomas Huth > Signed-off-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé > --- > default-configs/mips-softmmu-common.mak | 3 +++ > hw/mips/Makefile.objs | 5 +++-- > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/default-configs/mips-softmmu-common.mak > b/default-configs/mips-softmmu-common.mak > index fae2347..479fb4d 100644 > --- a/default-configs/mips-softmmu-common.mak > +++ b/default-configs/mips-softmmu-common.mak > @@ -36,3 +36,6 @@ CONFIG_EMPTY_SLOT=y > CONFIG_MIPS_CPS=y > CONFIG_MIPS_ITU=y > CONFIG_I2C=y > +CONFIG_R4K=y > +CONFIG_MALTA=y > +CONFIG_MIPSSIM=y > diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs > index 17a311a..525809a 100644 > --- a/hw/mips/Makefile.objs > +++ b/hw/mips/Makefile.objs > @@ -1,7 +1,8 @@ > -obj-y += mips_r4k.o mips_malta.o mips_mipssim.o > obj-y += addr.o mips_int.o > +obj-$(CONFIG_R4K) += mips_r4k.o > +obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o > +obj-$(CONFIG_MIPSSIM) += mips_mipssim.o > obj-$(CONFIG_JAZZ) += mips_jazz.o > obj-$(CONFIG_FULONG) += mips_fulong2e.o > -obj-y += gt64xxx_pci.o > obj-$(CONFIG_MIPS_CPS) += cps.o > obj-$(CONFIG_MIPS_BOSTON) += boston.o >
Re: [Qemu-devel] [Qemu-block] [RFC PATCH 00/11] qcow2: External data files
On Thu, Jan 31, 2019 at 7:57 PM Kevin Wolf wrote: This will be very useful for new oVirt Cinder based storage. Thanks for working on this! I did not see any discussion about this here, but I did not follow this list closely lately. Do we have more info on this? a feature page describing the use cases and the limitations? There are use cases where raw images are given (e.g. existing physical > disks), but advanced features like dirty bitmaps or backing files are > wanted that require use of a proper image format like qcow2. > > This series adds an incompatible feature bit to qcow2 which allows to > use an external data file: Metadata is kept in the qcow2 file like > usual, but guest data is written to an external file. Clusters in the > data file are not reference counted, instead we use a flat layout where > host cluster offset == guest cluster offset. The external data file is > therefore readable as a raw image (though writing to it invalidates the > associated qcow2 metadata). Features that require refcounting such as > internal snapshots or compression are not supposed in such setups. > Makes sense. In oVirt we would like to use this only for raw images on legacy storage (no snapshot), or on LUNs managed via cinderlib, when the underlying storage provides snapshots and thin provisioning. If a user wants snapshot on legacy storage, they can add a qcow2 layer and use incremental backup in this layer. > > There are a few reasons why this is still RFC: > > - The resulting code passes qemu-iotests, so we don't regress on normal > qcow2 files, but testing with external data files is still minimal > (converting an existing image and confirming it reads back unmodified; > installing a guest OS and making sure it boots). We need at least some > qemu-iotests cases. > > - QAPI documentation is missing > > - Discard isn't passed through to the data file yet > > - s->image_data_file isn't correct, it gets the value from the attached > node rather than just from the image file. This means that on header > updates we might be writing "back" a path that wasn't there before. > > - Probably something else I just can't remember now :-) > I think the most interesting questions regarding this is how we bind a raw image to the metadata qcow2 image, so the image cannot be used outside of a management system. I don't think this would safe enough without such mechanism. I think Fam suggested in the past to encrypt the some part of the image, e.g the first cluster, so it is not usable without the qcow2 image. The management system should be able to detach a raw image from the qcow2 image using qemu-img, which will invalidate the metadata in the attached qcow2 image, and make the image usable outside of the system. If an attached image is replicated to another storage, the the original qcow2 image is lost, a user should be able to use qemu-img to detach the image, making it usable outside the system, or use qemu-img to attach is to a new qcow2 layer, allowing the system to use the image again. Another question is how you attach existing raw image to qcow2 layer, enabling incremental backup with this volume. Do start recording changes from the point of the attachment, so anything not in the qcow2 layer will be available when using full backup? Nir > > Kevin Wolf (11): > qcow2: Extend spec for external data files > qcow2: Basic definitions for external data files > qcow2: Pass bs to qcow2_get_cluster_type() > qcow2: Prepare qcow2_get_cluster_type() for external data file > qcow2: Prepare count_contiguous_clusters() for external data file > qcow2: Don't assume 0 is an invalid cluster offset > qcow2: External file I/O > qcow2: Add basic data-file infrastructure > qcow2: Creating images with external data file > qcow2: Store data file name in the image > qcow2: Add data file to ImageInfoSpecificQCow2 > > qapi/block-core.json | 5 +- > docs/interop/qcow2.txt | 19 - > block/qcow2.h | 40 +++-- > include/block/block_int.h | 1 + > block/qcow2-bitmap.c | 7 +- > block/qcow2-cache.c| 6 +- > block/qcow2-cluster.c | 144 +++- > block/qcow2-refcount.c | 40 ++--- > block/qcow2-snapshot.c | 7 +- > block/qcow2.c | 166 ++--- > tests/qemu-iotests/031.out | 8 +- > tests/qemu-iotests/036.out | 4 +- > tests/qemu-iotests/061.out | 14 ++-- > tests/qemu-iotests/082.out | 27 ++ > 14 files changed, 372 insertions(+), 116 deletions(-) > > -- > 2.20.1 > > >
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de * [new tag] patchew/20190131211931.16216-1-sv...@stackframe.org -> patchew/20190131211931.16216-1-sv...@stackframe.org Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone' Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex' Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3' Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3' Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out 'd4e7d7ac663fcb55f1b93575445fcbca372f17a7' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out '9b7ab2fa020341dee8bf9df6c9cf40003e0136df' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588' Cloning into 'tests/fp/berkeley-softfloat-3'... Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037' Cloning into 'tests/fp/berkeley-testfloat-3'... Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' 291fb33 target/riscv: Remaining rvc insn reuse 32 bit translators f234c9a targe
Re: [Qemu-devel] [PATCH 33/52] build: switch to Kconfig
Hi Paolo, On 1/25/19 11:06 AM, Paolo Bonzini wrote: > The make_device_config.sh script is replaced by minikconf, which > is modified to support the same command line as its predecessor. > > The roots of the parsing are default-configs/*.mak, Kconfig.host and > hw/Kconfig. One difference with make_device_config.sh is that all symbols > have to be defined in a Kconfig file, including those coming from the > configure script. This is the reason for the Kconfig.host file introduced > in the previous patch. Whenever a file in default-configs/*.mak used > $(...) to refer to a config-host.mak symbol, this is replaced by a > Kconfig dependency; this part must be done already in this patch > for bisectability. > > Signed-off-by: Paolo Bonzini > Signed-off-by: Yang Zhong > Acked-by: Thomas Huth > Message-Id: <20190123065618.3520-28-yang.zh...@intel.com> > Signed-off-by: Paolo Bonzini > --- > Kconfig.host | 3 ++- > Makefile | 19 --- > Makefile.target | 7 ++- > configure | 3 +++ > default-configs/arm-softmmu.mak | 2 -- > default-configs/i386-softmmu.mak | 5 + > default-configs/lm32-softmmu.mak | 1 - > default-configs/pci.mak | 1 - > default-configs/ppc-softmmu.mak | 1 - > default-configs/ppc64-softmmu.mak | 6 -- > default-configs/s390x-softmmu.mak | 4 +--- > default-configs/virtio.mak| 3 --- > hw/9pfs/Kconfig | 1 + > hw/block/Kconfig | 1 + > hw/display/Kconfig| 4 > hw/i386/Kconfig | 6 +- > hw/input/Kconfig | 5 + > hw/intc/Kconfig | 12 > hw/misc/Kconfig | 2 ++ > hw/ppc/Kconfig| 4 > hw/scsi/Kconfig | 6 ++ > hw/tpm/Kconfig| 2 ++ > hw/vfio/Kconfig | 11 +++ > rules.mak | 2 +- > scripts/make_device_config.sh | 30 -- > 25 files changed, 83 insertions(+), 58 deletions(-) > delete mode 100644 scripts/make_device_config.sh > > diff --git a/Kconfig.host b/Kconfig.host > index f43f418..3772627 100644 > --- a/Kconfig.host > +++ b/Kconfig.host > @@ -1,5 +1,6 @@ > # These are "proxy" symbols used to pass config-host.mak values > -# down to Kconfig. > +# down to Kconfig. See also MINIKCONF_ARGS in the Makefile: > +# these two need to be kept in sync. > > config KVM > bool > diff --git a/Makefile b/Makefile > index de898ea..70b9aec 100644 > --- a/Makefile > +++ b/Makefile > @@ -326,9 +326,22 @@ endif > > -include $(SUBDIR_DEVICES_MAK_DEP) > > -%/config-devices.mak: default-configs/%.mak > $(SRC_PATH)/scripts/make_device_config.sh > - $(call quiet-command, \ > -$(SHELL) $(SRC_PATH)/scripts/make_device_config.sh $< > $*-config-devices.mak.d $@ > $@.tmp,"GEN","$@.tmp") > +# This has to be kept in sync with Kconfig.host. > +MINIKCONF_ARGS = \ > +$@ $*-config.devices.mak.d $< $(MINIKCONF_INPUTS) \ > +CONFIG_KVM=$(CONFIG_KVM) \ > +CONFIG_SPICE=$(CONFIG_SPICE) \ > +CONFIG_TPM=$(CONFIG_TPM) \ > +CONFIG_XEN=$(CONFIG_XEN) \ There is something I don't understand here: Does CONFIG_XEN in Kconfig.host take precedence over the target configs? I'm looking at these configs: if supported_xen_target $target; then echo "CONFIG_XEN=n" >> $config_target_mak if test "$xen_pci_passthrough" = yes; then echo "CONFIG_XEN_PCI_PASSTHROUGH=y" >> "$config_target_mak" fi fi It seems Kconfig.host has precedence over them, so if all targets are trying to build with Xen even if they don't support it. I cc'ed the Xen team, it would be nice if one of them also tests this. > +CONFIG_OPENGL=$(CONFIG_OPENGL) \ > +CONFIG_VHOST_USER=$(CONFIG_VHOST_USER) \ > +CONFIG_LINUX=$(CONFIG_LINUX) > + > +MINIKCONF_INPUTS = $(SRC_PATH)/Kconfig.host $(SRC_PATH)/hw/Kconfig > +MINIKCONF = $(PYTHON) $(SRC_PATH)/scripts/minikconf.py \ > + > +%/config-devices.mak: default-configs/%.mak $(MINIKCONF_INPUTS) > + $(call quiet-command, $(MINIKCONF) $(MINIKCONF_ARGS) > $@.tmp, "GEN", > "$@.tmp") > $(call quiet-command, if test -f $@; then \ > if cmp -s $@.old $@; then \ > mv $@.tmp $@; \ > diff --git a/Makefile.target b/Makefile.target > index 39f72e8..f31692c 100644 > --- a/Makefile.target > +++ b/Makefile.target > @@ -4,9 +4,12 @@ BUILD_DIR?=$(CURDIR)/.. > > include ../config-host.mak > include config-target.mak > -include config-devices.mak > include $(SRC_PATH)/rules.mak > > +ifdef CONFIG_SOFTMMU > +include config-devices.mak > +endif > + > $(call set-vpath, $(SRC_PATH):$(BUILD_DIR)) > ifdef CONFIG_LINUX > QEMU_CFLAGS += -I../linux-headers > @@ -190,7 +193,9 @@ all-obj-$(CONFIG_SOFTMMU) += $(crypto-obj-y) > all-obj-$(CONFIG_SOFTMMU) += $(io-obj-y) > all-obj-$(CONFIG_SOFTMMU)
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Type: series Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de Switched to a new branch 'test' 291fb3378a target/riscv: Remaining rvc insn reuse 32 bit translators f234c9a301 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 16680b13d8 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 8c27631fd4 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns d2bb2de935 target/riscv: Convert @cs_2 insns to share translation functions 24f04339fe target/riscv: Remove decode_RV32_64G() 8e284b2972 target/riscv: Remove gen_system() 7fdd5f104c target/riscv: Rename trans_arith to gen_arith 696cd56967 target/riscv: Remove manual decoding of RV32/64M insn 81c0dbfad9 target/riscv: Remove shift and slt insn manual decoding 69947ae047 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists b162444c18 target/riscv: Move gen_arith_imm() decoding into trans_* functions 9d189f830c target/riscv: Remove manual decoding from gen_store() b9e24ac0d5 target/riscv: Remove manual decoding from gen_load() 543c238dc7 target/riscv: Remove manual decoding from gen_branch() 1ecefc4283 target/riscv: Remove gen_jalr() 4251a010bd target/riscv: Convert quadrant 2 of RVXC insns to decodetree 3a0627ae71 target/riscv: Convert quadrant 1 of RVXC insns to decodetree 135f107593 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 8833d537b5 target/riscv: Convert RV priv insns to decodetree 28b613a932 target/riscv: Convert RV64D insns to decodetree 02b797edd5 target/riscv: Convert RV32D insns to decodetree 27cc348b3b target/riscv: Convert RV64F insns to decodetree b0857e0983 target/riscv: Convert RV32F insns to decodetree b578a96842 target/riscv: Convert RV64A insns to decodetree 26ca8f5631 target/riscv: Convert RV32A insns to decodetree 0ef195feef target/riscv: Convert RVXM insns to decodetree d22f711d7d target/riscv: Convert RVXI csr insns to decodetree 34de7f7504 target/riscv: Convert RVXI fence insns to decodetree da5403e39d target/riscv: Convert RVXI arithmetic insns to decodetree f8d0548e2d target/riscv: Convert RV64I load/store insns to decodetree 7f40538802 target/riscv: Convert RV32I load/store insns to decodetree d5b10e4501 target/riscv: Convert RVXI branch insns to decodetree 26e2990ada target/riscv: Activate decodetree and implemnt LUI & AUIPC 2d78010a7d target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit 2d78010a7d7b (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 26e2990adad9 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit d5b10e450153 (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit 7f40538802f9 (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit f8d0548e2da9 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit da5403e39dfc (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 34de7f750472 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit d22f711d7ddb (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit 0ef195feef49 (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHE
Re: [Qemu-devel] [Qemu-block] [RFC PATCH 01/11] qcow2: Extend spec for external data files
On Thu, Jan 31, 2019 at 8:43 PM Eric Blake wrote: ... > > @@ -450,8 +461,10 @@ Standard Cluster Descriptor: > > 1 - 8:Reserved (set to 0) > > > > 9 - 55:Bits 9-55 of host cluster offset. Must be aligned > to a > > -cluster boundary. If the offset is 0, the cluster is > > -unallocated. > > +cluster boundary. If the offset is 0 and bit 63 is > clear, > > +the cluster is unallocated. The offset may only be > 0 with > > +bit 63 set (indicating a host cluster offset of 0) > when an > > +external data file is used. > > Does that mean that the value 0x is invalid for external data > files, and that 0x0001 is special-cased to mean read the contents of > the external file (and NOT that the cluster reads as all zeroes)? Is > bit 0 allowed to be set for any other clusters when there is an external > data file? And if so, are we requiring that it only be set when the > external file is known to read as zero, or can we run into the situation > where qcow2 says the cluster reads as 0 but the host file contains > garbage? Should the external file header contain a flag that states > whether writes to the image should wipe vs. leave unchanged a cluster in > the external file when the qcow2 metadata prefers to grab that cluster's > contents as all-0s or by reading from the backing file? I hope we are not going to mix qcow2 layer with data file and backing file in the same chain. For oVirt we would never want to have a backing chain when using qcow2 metadata layer. I think this is the same use case for KubeVirt. > There are > security vs. speed implications - security insists on wiping the host > file to NOT leave stale data, but that slows things down compared to > just leaving garbage if the qcow2 metadata can effectively ignore those > parts of the external file - hence a knob may be worth exposing? > Since qcow2 is just used to managed metadata about a raw file, I don't think it should do any optimizations like this. What if we implement this differently - a qcow2 layer that keeps only metadata for a backing file? All reads will go directly to the backing file, since there is no data in the qcow2 file. All writes will go directly to the backing file, since no data should be in the qcow2 file. But before writing, update the qcow2 metadata to reference the cluster that will be written to the backing file. Nir
Re: [Qemu-devel] [PATCH 0/4] TPM patches for stable-3.0.0 (v3.0.1)
On 1/31/19 1:51 PM, no-re...@patchew.org wrote: Patchew URL: https://patchew.org/QEMU/20190121170731.2500692-1-stef...@linux.ibm.com/ Seems unrelated to the series I sent...
Re: [Qemu-devel] [PATCH] tcg: add early clober modifier in atomic16_cmpxchg on aarch64
On 1/30/19 12:59 AM, Catherine Ho wrote: > Without this patch, gcc might up the Input/Output registers and > cause unpredictable error. > > Fixes: 1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128") > > Signed-off-by: Catherine Ho Queued, thanks. r~
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de Switched to a new branch 'test' 291fb33 target/riscv: Remaining rvc insn reuse 32 bit translators f234c9a target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 16680b1 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 8c27631 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns d2bb2de target/riscv: Convert @cs_2 insns to share translation functions 24f0433 target/riscv: Remove decode_RV32_64G() 8e284b2 target/riscv: Remove gen_system() 7fdd5f1 target/riscv: Rename trans_arith to gen_arith 696cd56 target/riscv: Remove manual decoding of RV32/64M insn 81c0dbf target/riscv: Remove shift and slt insn manual decoding 69947ae target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists b162444 target/riscv: Move gen_arith_imm() decoding into trans_* functions 9d189f8 target/riscv: Remove manual decoding from gen_store() b9e24ac target/riscv: Remove manual decoding from gen_load() 543c238 target/riscv: Remove manual decoding from gen_branch() 1ecefc4 target/riscv: Remove gen_jalr() 4251a01 target/riscv: Convert quadrant 2 of RVXC insns to decodetree 3a0627a target/riscv: Convert quadrant 1 of RVXC insns to decodetree 135f107 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 8833d53 target/riscv: Convert RV priv insns to decodetree 28b613a target/riscv: Convert RV64D insns to decodetree 02b797e target/riscv: Convert RV32D insns to decodetree 27cc348 target/riscv: Convert RV64F insns to decodetree b0857e0 target/riscv: Convert RV32F insns to decodetree b578a96 target/riscv: Convert RV64A insns to decodetree 26ca8f5 target/riscv: Convert RV32A insns to decodetree 0ef195f target/riscv: Convert RVXM insns to decodetree d22f711 target/riscv: Convert RVXI csr insns to decodetree 34de7f7 target/riscv: Convert RVXI fence insns to decodetree da5403e target/riscv: Convert RVXI arithmetic insns to decodetree f8d0548 target/riscv: Convert RV64I load/store insns to decodetree 7f40538 target/riscv: Convert RV32I load/store insns to decodetree d5b10e4 target/riscv: Convert RVXI branch insns to decodetree 26e2990 target/riscv: Activate decodetree and implemnt LUI & AUIPC 2d78010 target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit 2d78010a7d7b (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 26e2990adad9 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit d5b10e450153 (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit 7f40538802f9 (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit f8d0548e2da9 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit da5403e39dfc (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 34de7f750472 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit d22f711d7ddb (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit 0ef195feef49 (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 10/35 Checking commit 26ca8f56316d (target/riscv: Convert RV32A insns to decodetree) W
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Type: series Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de Switched to a new branch 'test' 0b8b161ee9 target/riscv: Remaining rvc insn reuse 32 bit translators c572ee3c49 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 4f6990dd63 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 978ba13fad target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns 6950276f0b target/riscv: Convert @cs_2 insns to share translation functions 6800d2f774 target/riscv: Remove decode_RV32_64G() 52e9366cfe target/riscv: Remove gen_system() ae15272edc target/riscv: Rename trans_arith to gen_arith 44cb4f52be target/riscv: Remove manual decoding of RV32/64M insn 061c8f4edb target/riscv: Remove shift and slt insn manual decoding 38903407bb target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists 0e4b69edcc target/riscv: Move gen_arith_imm() decoding into trans_* functions 68786b751d target/riscv: Remove manual decoding from gen_store() 9724ef941d target/riscv: Remove manual decoding from gen_load() 8b7259ecd2 target/riscv: Remove manual decoding from gen_branch() e1a89f8fa3 target/riscv: Remove gen_jalr() 3997202158 target/riscv: Convert quadrant 2 of RVXC insns to decodetree ef701a0633 target/riscv: Convert quadrant 1 of RVXC insns to decodetree ffedb662db target/riscv: Convert quadrant 0 of RVXC insns to decodetree 80efd9e0d7 target/riscv: Convert RV priv insns to decodetree 3936560c24 target/riscv: Convert RV64D insns to decodetree b2cfe9c051 target/riscv: Convert RV32D insns to decodetree ef187b9c6f target/riscv: Convert RV64F insns to decodetree 549ce3e937 target/riscv: Convert RV32F insns to decodetree f12ae436a4 target/riscv: Convert RV64A insns to decodetree d2d3a0129f target/riscv: Convert RV32A insns to decodetree f2a1e72600 target/riscv: Convert RVXM insns to decodetree 123c4ce4d6 target/riscv: Convert RVXI csr insns to decodetree 0a7cb7b951 target/riscv: Convert RVXI fence insns to decodetree 23c598c7e8 target/riscv: Convert RVXI arithmetic insns to decodetree 251bd0658a target/riscv: Convert RV64I load/store insns to decodetree b950690c00 target/riscv: Convert RV32I load/store insns to decodetree c7c44352c5 target/riscv: Convert RVXI branch insns to decodetree b9b322714c target/riscv: Activate decodetree and implemnt LUI & AUIPC 0b8dcc589a target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit 0b8dcc589a0b (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit b9b322714c83 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit c7c44352c524 (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit b950690c000c (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit 251bd0658ab8 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit 23c598c7e86f (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 0a7cb7b951af (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit 123c4ce4d6bc (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit f2a1e72600c7 (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHE
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone' Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex' Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3' Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3' Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out 'd4e7d7ac663fcb55f1b93575445fcbca372f17a7' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out '9b7ab2fa020341dee8bf9df6c9cf40003e0136df' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588' Cloning into 'tests/fp/berkeley-softfloat-3'... Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037' Cloning into 'tests/fp/berkeley-testfloat-3'... Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' 0b8b161 target/riscv: Remaining rvc insn reuse 32 bit translators c572ee3 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 4f6990d target/riscv: Splice fsw_sd and flw_ld for riscv3
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de * [new tag] patchew/20190131210851.9842-1-richard.hender...@linaro.org -> patchew/20190131210851.9842-1-richard.hender...@linaro.org Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone' Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex' Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3' Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3' Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out 'd4e7d7ac663fcb55f1b93575445fcbca372f17a7' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out '9b7ab2fa020341dee8bf9df6c9cf40003e0136df' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588' Cloning into 'tests/fp/berkeley-softfloat-3'... Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037' Cloning into 'tests/fp/berkeley-testfloat-3'... Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' ed5d29b target/riscv: Remaining rvc insn reuse 32 bit translators
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbast...@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20190122092909.5341-1-kbast...@mail.uni-paderborn.de Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbast...@mail.uni-paderborn.de * [new tag] patchew/20190131211931.16216-1-sv...@stackframe.org -> patchew/20190131211931.16216-1-sv...@stackframe.org Switched to a new branch 'test' 9e8165d target/riscv: Remaining rvc insn reuse 32 bit translators e66c95c target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 efb9740 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 3c31768 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns 795b478 target/riscv: Convert @cs_2 insns to share translation functions 110406e target/riscv: Remove decode_RV32_64G() 976eb72 target/riscv: Remove gen_system() 0edf15c target/riscv: Rename trans_arith to gen_arith dfa6dc2 target/riscv: Remove manual decoding of RV32/64M insn 5a6623c target/riscv: Remove shift and slt insn manual decoding 42aa254 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists f6ead4a target/riscv: Move gen_arith_imm() decoding into trans_* functions 132f8da target/riscv: Remove manual decoding from gen_store() 2e18729 target/riscv: Remove manual decoding from gen_load() 308b594 target/riscv: Remove manual decoding from gen_branch() 12f3dae target/riscv: Remove gen_jalr() 663d608 target/riscv: Convert quadrant 2 of RVXC insns to decodetree f689ec9 target/riscv: Convert quadrant 1 of RVXC insns to decodetree baba3b6 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 222b932 target/riscv: Convert RV priv insns to decodetree 57d7252 target/riscv: Convert RV64D insns to decodetree 85126a6 target/riscv: Convert RV32D insns to decodetree 4b1f8c6 target/riscv: Convert RV64F insns to decodetree ca3cfe3 target/riscv: Convert RV32F insns to decodetree 70fd254 target/riscv: Convert RV64A insns to decodetree d05a7c9 target/riscv: Convert RV32A insns to decodetree f56b79a target/riscv: Convert RVXM insns to decodetree f5805d1 target/riscv: Convert RVXI csr insns to decodetree 0d45dd0 target/riscv: Convert RVXI fence insns to decodetree 197e9af target/riscv: Convert RVXI arithmetic insns to decodetree f4195b8 target/riscv: Convert RV64I load/store insns to decodetree c44be19 target/riscv: Convert RV32I load/store insns to decodetree 944c287 target/riscv: Convert RVXI branch insns to decodetree 2b11f0f target/riscv: Activate decodetree and implemnt LUI & AUIPC a377eaf target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit a377eafc5405 (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 2b11f0fa7dd5 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit 944c2876b315 (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit c44be19b1c8f (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit f4195b886030 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit 197e9af1264b (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 0d45dd0abfc6 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit f5805d1ea703 (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit f56b79ac87ee (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report them to the m