Re: [Qemu-devel] Does the -smp option use threads?
Do you have plan to multi-thread? 2007/4/28, Paul Brook [EMAIL PROTECTED]: On Friday 27 April 2007, Jonathan Kalbfeld wrote: Suppose I run QEMU on a T1000 with an 8-way CPU and I tell it to simulate 8x SMP. WIll it spawn a separate thread for each dynamic translation activity? No. qemu is single-threaded. Paul
[Qemu-devel] scsi patch
scsi.tex patch reduces unnecessary mismatch.
lsi.txt corrects mismatch condition.
When the mismatch happens, register ia saves the instruction address.
However, QEMU call lsi_bad_phase first, update new dsp and
then save it into register ia.
The patch correct this problem.
Another fix is in the table indirect addressing.
s-rbc is the same as s-dbc in direct, indirect, and table indirect mode.
I test 25 times debian installation automatically and there is no problem in
scsi.
The steps follow http://www.aurel32.net/info/debian_arm_qemu.php
will work well !!!
Index: hw/scsi-disk.c
===
RCS file: /sources/qemu/qemu/hw/scsi-disk.c,v
retrieving revision 1.13
diff -u -p -r1.13 scsi-disk.c
--- hw/scsi-disk.c 29 Aug 2006 04:52:16 - 1.13
+++ hw/scsi-disk.c 25 Apr 2007 04:55:11 -
@@ -345,7 +345,7 @@ int32_t scsi_send_command(SCSIDevice *s,
DPRINTF(Request Sense (len %d)\n, len);
if (len 4)
goto fail;
-memset(buf, 0, 4);
+memset(outbuf, 0, 4);
outbuf[0] = 0xf0;
outbuf[1] = 0;
outbuf[2] = s-sense;
@@ -371,7 +371,7 @@ int32_t scsi_send_command(SCSIDevice *s,
Some later commands are also implemented. */
outbuf[2] = 3;
outbuf[3] = 2; /* Format 2 */
- outbuf[4] = 32;
+ outbuf[4] = 31;
/* Sync data transfer and TCQ. */
outbuf[7] = 0x10 | (s-tcq ? 0x02 : 0);
r-buf_len = 36;
@@ -404,10 +404,11 @@ int32_t scsi_send_command(SCSIDevice *s,
p += 4;
if ((page == 8 || page == 0x3f)) {
/* Caching page. */
+memset(p,0,20);
p[0] = 8;
p[1] = 0x12;
p[2] = 4; /* WCE */
-p += 19;
+p += 20;
}
if ((page == 0x3f || page == 0x2a)
(bdrv_get_type_hint(s-bdrv) == BDRV_TYPE_CDROM)) {
@@ -437,7 +438,7 @@ int32_t scsi_send_command(SCSIDevice *s,
p[19] = (16 * 176) 0xff;
p[20] = (16 * 176) 8; // 16x write speed current
p[21] = (16 * 176) 0xff;
-p += 21;
+p += 22;
}
r-buf_len = p - outbuf;
outbuf[0] = r-buf_len - 4;
Index: hw/lsi53c895a.c
===
RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v
retrieving revision 1.8
diff -u -p -r1.8 lsi53c895a.c
--- hw/lsi53c895a.c 22 Apr 2007 17:18:38 - 1.8
+++ hw/lsi53c895a.c 25 Apr 2007 04:55:11 -
@@ -855,6 +855,7 @@ again:
offset = sxt24(addr);
cpu_physical_memory_read(s-dsa + offset, (uint8_t *)buf, 8);
s-dbc = cpu_to_le32(buf[0]);
+s-rbc = s-dbc;
addr = cpu_to_le32(buf[1]);
}
if ((s-sstat1 PHASE_MASK) != ((insn 24) 7)) {
@@ -864,6 +865,8 @@ again:
break;
}
s-dnad = addr;
+/* ??? Set ESA. */
+s-ia = s-dsp - 8;
switch (s-sstat1 0x7) {
case PHASE_DO:
s-waiting = 2;
@@ -898,8 +901,6 @@ again:
s-sbc = s-dbc;
s-rbc -= s-dbc;
s-ua = addr + s-dbc;
-/* ??? Set ESA. */
-s-ia = s-dsp - 8;
break;
case 1: /* IO or Read/Write instruction. */
[Qemu-devel] scsi interface patch
I am sorry. The new attached file is created by (cvs diff -up).
2007/4/22, Hetz Ben Hamo [EMAIL PROTECTED]:
The standard way to submitting patches is unified diff's (diff -u)
Could you re-post your patch in unified format please?
Thanks,
Hetz
On 4/22/07, Wang Cheng Yeh [EMAIL PROTECTED] wrote:
The number of responded bytes from scsi device do not match the expected
value of lsi53c895a driver.
hence, the mismatch interrupt happen, but the driver does not always
handle
it correctly.
My patch make the responded bytes as expected and the interrupt will not
happen.
Index: hw/scsi-disk.c
===
RCS file: /sources/qemu/qemu/hw/scsi-disk.c,v
retrieving revision 1.13
diff -r1.13 scsi-disk.c
359c359
memset(outbuf, 0, 36);
---
memset(outbuf, 0, len);
377c377
r-buf_len = 36;
---
r-buf_len = len;
442a443,446
for(;r-buf_lenlen;r-buf_len++)
{
*p++=0;
}
--
Skepticism is the lazy person's default position.
Visit my blog (hebrew) for things that (sometimes) matter:
http://wp.dad-answers.com
Index: hw/scsi-disk.c
===
RCS file: /sources/qemu/qemu/hw/scsi-disk.c,v
retrieving revision 1.13
diff -u -p -r1.13 scsi-disk.c
--- hw/scsi-disk.c 29 Aug 2006 04:52:16 - 1.13
+++ hw/scsi-disk.c 22 Apr 2007 13:11:49 -
@@ -356,7 +356,7 @@ int32_t scsi_send_command(SCSIDevice *s,
if (len 36) {
BADF(Inquiry buffer too small (%d)\n, len);
}
- memset(outbuf, 0, 36);
+ memset(outbuf, 0, len);
if (bdrv_get_type_hint(s-bdrv) == BDRV_TYPE_CDROM) {
outbuf[0] = 5;
outbuf[1] = 0x80;
@@ -374,7 +374,7 @@ int32_t scsi_send_command(SCSIDevice *s,
outbuf[4] = 32;
/* Sync data transfer and TCQ. */
outbuf[7] = 0x10 | (s-tcq ? 0x02 : 0);
- r-buf_len = 36;
+ r-buf_len = len;
break;
case 0x16:
DPRINTF(Reserve(6)\n);
@@ -440,6 +440,10 @@ int32_t scsi_send_command(SCSIDevice *s,
p += 21;
}
r-buf_len = p - outbuf;
+for(;r-buf_lenlen;r-buf_len++)
+{
+*p++=0;
+}
outbuf[0] = r-buf_len - 4;
if (r-buf_len len)
r-buf_len = len;
Re: [Qemu-devel] scsi interface patch
Linux kernel 2.6.18 from http://www.aurel32.net/info/debian_arm_qemu.php will get this mismatch. I don't know the real hardware implement inside scsi. I just modify the hardware emulation consist with the linux driver. Because the hardware emulation is not 100% complete and many parts are not implemented, the mismatch issue the interrupt and the ISR work well in real hardware, but not in QEMU. The problem maybe inside the mismatch condition, but I am not familiar with the mismatch handler. The patch can workaround the mismatch condition. Maybe we should improve the mismatch condition. 2007/4/22, Paul Brook [EMAIL PROTECTED]: On Sunday 22 April 2007 03:01, Wang Cheng Yeh wrote: The number of responded bytes from scsi device do not match the expected value of lsi53c895a driver. hence, the mismatch interrupt happen, but the driver does not always handle it correctly. My patch make the responded bytes as expected and the interrupt will not happen. What makes you think padding the response with zeros is the right thing to do? I think this is a bug elsewhere (maybe in your device driver). Paul
[Qemu-devel] new scsi interface patch
The previous patch is not correct as Paul Brook said.
I read the standard and know the allocation length.
And then, I find the number of length is not correct.
Please review the new patch.
Index: hw/scsi-disk.c
===
RCS file: /sources/qemu/qemu/hw/scsi-disk.c,v
retrieving revision 1.13
diff -u -p -r1.13 scsi-disk.c
--- hw/scsi-disk.c 29 Aug 2006 04:52:16 - 1.13
+++ hw/scsi-disk.c 23 Apr 2007 01:00:06 -
@@ -371,7 +371,7 @@ int32_t scsi_send_command(SCSIDevice *s,
Some later commands are also implemented. */
outbuf[2] = 3;
outbuf[3] = 2; /* Format 2 */
- outbuf[4] = 32;
+ outbuf[4] = 31;
/* Sync data transfer and TCQ. */
outbuf[7] = 0x10 | (s-tcq ? 0x02 : 0);
r-buf_len = 36;
@@ -407,7 +407,7 @@ int32_t scsi_send_command(SCSIDevice *s,
p[0] = 8;
p[1] = 0x12;
p[2] = 4; /* WCE */
-p += 19;
+p += 20;
}
if ((page == 0x3f || page == 0x2a)
(bdrv_get_type_hint(s-bdrv) == BDRV_TYPE_CDROM)) {
@@ -437,7 +437,7 @@ int32_t scsi_send_command(SCSIDevice *s,
p[19] = (16 * 176) 0xff;
p[20] = (16 * 176) 8; // 16x write speed current
p[21] = (16 * 176) 0xff;
-p += 21;
+p += 22;
}
r-buf_len = p - outbuf;
outbuf[0] = r-buf_len - 4;
[Qemu-devel] scsi interface patch
The number of responded bytes from scsi device do not match the expected
value of lsi53c895a driver.
hence, the mismatch interrupt happen, but the driver does not always handle
it correctly.
My patch make the responded bytes as expected and the interrupt will not
happen.
Index: hw/scsi-disk.c
===
RCS file: /sources/qemu/qemu/hw/scsi-disk.c,v
retrieving revision 1.13
diff -r1.13 scsi-disk.c
359c359
memset(outbuf, 0, 36);
---
memset(outbuf, 0, len);
377c377
r-buf_len = 36;
---
r-buf_len = len;
442a443,446
for(;r-buf_lenlen;r-buf_len++)
{
*p++=0;
}
[Qemu-devel] lsi53c895a patch
just some typo, but without hurt. Index: hw/lsi53c895a.c === RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v retrieving revision 1.7 diff -u -p -r1.7 lsi53c895a.c --- hw/lsi53c895a.c 17 Apr 2007 23:53:10 - 1.7 +++ hw/lsi53c895a.c 22 Apr 2007 02:08:25 - @@ -1389,7 +1389,7 @@ static void lsi_reg_writeb(LSIState *s, break; case 0x02: /* SCNTL2 */ val = ~(LSI_SCNTL2_WSR | LSI_SCNTL2_WSS); -s-scntl3 = val; +s-scntl2 = val; break; case 0x03: /* SCNTL3 */ s-scntl3 = val; @@ -1457,19 +1457,19 @@ static void lsi_reg_writeb(LSIState *s, } s-ctest5 = val; break; -case 0x2c: /* DSPS[0:7] */ +case 0x2c: /* DSP[0:7] */ s-dsp = 0xff00; s-dsp |= val; break; -case 0x2d: /* DSPS[8:15] */ +case 0x2d: /* DSP[8:15] */ s-dsp = 0x00ff; s-dsp |= val 8; break; -case 0x2e: /* DSPS[16:23] */ +case 0x2e: /* DSP[16:23] */ s-dsp = 0xff00; s-dsp |= val 16; break; -case 0x2f: /* DSPS[14:31] */ +case 0x2f: /* DSP[24:31] */ s-dsp = 0x00ff; s-dsp |= val 24; if ((s-dmode LSI_DMODE_MAN) == 0
[Qemu-devel] another lsi53c895a patch
Index: hw/lsi53c895a.c
===
RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v
retrieving revision 1.6
diff -u -p -r1.6 lsi53c895a.c
--- hw/lsi53c895a.c 7 Apr 2007 18:14:41 - 1.6
+++ hw/lsi53c895a.c 17 Apr 2007 02:12:05 -
@@ -1434,10 +1434,13 @@ static void lsi_reg_writeb(LSIState *s,
if (val LSI_ISTAT0_SRST) {
lsi_soft_reset(s);
}
+break;
case 0x16: /* MBOX0 */
s-mbox0 = val;
+break;
case 0x17: /* MBOX1 */
s-mbox1 = val;
+break;
case 0x1b: /* CTEST3 */
s-ctest3 = val 0x0f;
break;
Re: [Qemu-devel] qemu Makefile.target vl.h hw/acpi.c hw/adlib.c ...
BTW, I have a small PREP test image that I can publish. I am planning since some time to add to the QEMU web site an automatic regression testing system which will automatically launch many OSes with the current CVS version. I had no time to do it recently, but if no one does it before I'll try to complete it ! Regards, Fabrice. I think the installation will cover more than just kernel booting. I have debian auto installation files for regression test. They are just a auto config file and a script to do regression test. The only problem is if the system hangs, the script will also hang. If anyone needs these files, I will release here. The installation just follows the URL http://www.aurel32.net/info/debian_arm_qemu.php
[Qemu-devel] fix some bugs from code review
thanks Index: hw/lsi53c895a.c === RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v retrieving revision 1.4 diff -r1.4 lsi53c895a.c 1048a1049 s-carry = op1; Index: hw/smc91c111.c === RCS file: /sources/qemu/qemu/hw/smc91c111.c,v retrieving revision 1.5 diff -r1.5 smc91c111.c 449c449,451 case 8: /* Free memory available. */ --- case 8: /* Memory size. */ return NUM_PACKETS; case 9: /* Free memory available. */ 460,461d461 case 9: /* Memory size. */ return NUM_PACKETS; Index: target-arm/translate.c === RCS file: /sources/qemu/qemu/target-arm/translate.c,v retrieving revision 1.47 diff -r1.47 translate.c 2586c2586 cpu_fprintf(f, PSR=%08x %c%c%c%c %c %s%d %x\n, --- cpu_fprintf(f, PSR=%08x %c%c%c%c %c %s%d\n,
[Qemu-devel] please review smc91c111 network bug fix
address mapping error and cause arm versatile unstable.
Index: hw/smc91c111.c
===
RCS file: /sources/qemu/qemu/hw/smc91c111.c,v
retrieving revision 1.5
diff -u -r1.5 smc91c111.c
--- hw/smc91c111.c 21 Dec 2006 17:23:49 - 1.5
+++ hw/smc91c111.c 24 Mar 2007 18:15:21 -
@@ -446,7 +446,9 @@
case 7:
/* Not implemented. */
return 0;
-case 8: /* Free memory available. */
+case 8: /* Memory size. */
+return NUM_PACKETS;
+case 9: /* Free memory available. */
{
int i;
int n;
@@ -457,8 +459,6 @@
}
return n;
}
-case 9: /* Memory size. */
-return NUM_PACKETS;
case 10: case 11: /* RPCR */
/* Not implemented. */
return 0;
___
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Re: [Qemu-devel] scsi patch
because (1) address of SCRATCHA is 0x34 (2) address from SCRATCHB to SCRATCHR are 0x5c ~ 0x9f you just see the code about part (2). I think the access code is right. 2007/3/19, Thiemo Seufer [EMAIL PROTECTED]: ? wrote: --- ../../tmp/qemu-0.9.0/hw/lsi53c895a.c2007-02-06 07:01: 54.0 +0800 +++ lsi53c895a.c2007-03-08 20:50:03.094098835 +0800 @@ -251,7 +251,7 @@ uint32_t ia; uint32_t sbc; uint32_t csbc; -uint32_t scratch[13]; /* SCRATCHA-SCRATCHR */ +uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */ This still looks inconsistent. SCRATCHR suggests 18 available registers, but the code below handles only 17 scratch registers. Could you check what's the right thing there? Otherwise the patch looks good. Thiemo ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] please review this scsi patch
thanks diff Description: Binary data ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
