Re: [PATCH] riscv/sifive_u: fix a memory leak in soc_realize()
On Tue, 10 Dec 2019 10:38:29 PST (-0800), alistai...@gmail.com wrote: On Mon, Dec 9, 2019 at 11:15 PM wrote: From: Pan Nengyuan Fix a minor memory leak in riscv_sifive_u_soc_realize() Reported-by: Euler Robot Signed-off-by: Pan Nengyuan Reviewed-by: Alistair Francis Thanks. This is in the queue, I'm hoping to submit a PR after the H patch set is ready to go. Alistair --- hw/riscv/sifive_u.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0140e95..0e12b3c 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) SIFIVE_U_PLIC_CONTEXT_BASE, SIFIVE_U_PLIC_CONTEXT_STRIDE, memmap[SIFIVE_U_PLIC].size); +g_free(plic_hart_config); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base, serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ)); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base, -- 2.7.2.windows.1
Re: [PATCH] riscv/sifive_u: fix a memory leak in soc_realize()
On Mon, Dec 9, 2019 at 11:15 PM wrote: > > From: Pan Nengyuan > > Fix a minor memory leak in riscv_sifive_u_soc_realize() > > Reported-by: Euler Robot > Signed-off-by: Pan Nengyuan Reviewed-by: Alistair Francis Alistair > --- > hw/riscv/sifive_u.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > index 0140e95..0e12b3c 100644 > --- a/hw/riscv/sifive_u.c > +++ b/hw/riscv/sifive_u.c > @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, > Error **errp) > SIFIVE_U_PLIC_CONTEXT_BASE, > SIFIVE_U_PLIC_CONTEXT_STRIDE, > memmap[SIFIVE_U_PLIC].size); > +g_free(plic_hart_config); > sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base, > serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ)); > sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base, > -- > 2.7.2.windows.1 > > >
Re: [PATCH] riscv/sifive_u: fix a memory leak in soc_realize()
On 12/10/19 8:14 AM, pannengy...@huawei.com wrote: From: Pan Nengyuan Fix a minor memory leak in riscv_sifive_u_soc_realize() Reported-by: Euler Robot Signed-off-by: Pan Nengyuan --- hw/riscv/sifive_u.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0140e95..0e12b3c 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) SIFIVE_U_PLIC_CONTEXT_BASE, SIFIVE_U_PLIC_CONTEXT_STRIDE, memmap[SIFIVE_U_PLIC].size); +g_free(plic_hart_config); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base, serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ)); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base, Reviewed-by: Philippe Mathieu-Daudé
[PATCH] riscv/sifive_u: fix a memory leak in soc_realize()
From: Pan Nengyuan Fix a minor memory leak in riscv_sifive_u_soc_realize() Reported-by: Euler Robot Signed-off-by: Pan Nengyuan --- hw/riscv/sifive_u.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0140e95..0e12b3c 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) SIFIVE_U_PLIC_CONTEXT_BASE, SIFIVE_U_PLIC_CONTEXT_STRIDE, memmap[SIFIVE_U_PLIC].size); +g_free(plic_hart_config); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base, serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ)); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base, -- 2.7.2.windows.1
