Re: [PATCH v3 4/4] target/i386: Add notes for versioned CPU models

2020-03-02 Thread Tao Xu 

On 2/29/2020 5:52 AM, Eduardo Habkost wrote:

On Wed, Feb 12, 2020 at 04:13:28PM +0800, Tao Xu wrote:

Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.

Signed-off-by: Tao Xu 
---

Changes in v2:
 - correct the note of Cascadelake v3 (Xiaoyao)
---
  target/i386/cpu.c | 54 ++-
  1 file changed, 25 insertions(+), 29 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 81a039beb6..739ef4ce91 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
  {
  .version = 2,
  .alias = "Nehalem-IBRS",
+.note = "IBRS",
  .props = (PropValue[]) {
  { "spec-ctrl", "on" },
-{ "model-id",
-  "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
  { /* end of list */ }


Changing model-id is guest-visible, so we can't do this.  The
same applies to the other models where model-id is being removed.

I suggest using the .note property only on the CPU model versions
that don't have custom model-id set yet, or when existing
information on model-id is incomplete.

For future CPU model versions, we can start using only .note and
stop changing model-id.



Got it,thanks!

Re: [PATCH v3 4/4] target/i386: Add notes for versioned CPU models

2020-02-28 Thread Eduardo Habkost 
On Wed, Feb 12, 2020 at 04:13:28PM +0800, Tao Xu wrote:
> Add which features are added or removed in this version. Remove the
> changed model-id in versioned CPU models, to keep the model name
> unchanged at /proc/cpuinfo inside the VM.
> 
> Signed-off-by: Tao Xu 
> ---
> 
> Changes in v2:
> - correct the note of Cascadelake v3 (Xiaoyao)
> ---
>  target/i386/cpu.c | 54 ++-
>  1 file changed, 25 insertions(+), 29 deletions(-)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 81a039beb6..739ef4ce91 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  {
>  .version = 2,
>  .alias = "Nehalem-IBRS",
> +.note = "IBRS",
>  .props = (PropValue[]) {
>  { "spec-ctrl", "on" },
> -{ "model-id",
> -  "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
>  { /* end of list */ }

Changing model-id is guest-visible, so we can't do this.  The
same applies to the other models where model-id is being removed.

I suggest using the .note property only on the CPU model versions
that don't have custom model-id set yet, or when existing
information on model-id is incomplete.

For future CPU model versions, we can start using only .note and
stop changing model-id.

-- 
Eduardo

Re: [PATCH v3 4/4] target/i386: Add notes for versioned CPU models

2020-02-12 Thread Tao Xu 

On 2/12/2020 5:00 PM, Igor Mammedov wrote:

On Wed, 12 Feb 2020 16:13:28 +0800
Tao Xu  wrote:


Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.

Signed-off-by: Tao Xu 
---

Changes in v2:
 - correct the note of Cascadelake v3 (Xiaoyao)
---
  target/i386/cpu.c | 54 ++-
  1 file changed, 25 insertions(+), 29 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 81a039beb6..739ef4ce91 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c

[...]

@@ -3142,6 +3130,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
  .versions = (X86CPUVersionDefinition[]) {
  { .version = 1 },
  { .version = 2,
+  .note = "ARCH_CAPABILITIES",


what's ARCH_CAPABILITIES?



These are some features exposed by MSR_IA32_ARCH_CAPABILITIES. For 
Cascadelake, these are "rdctl-no" "ibrs-all" "skip-l1dfl-vmentry" "mds-no"

Re: [PATCH v3 4/4] target/i386: Add notes for versioned CPU models

2020-02-12 Thread Igor Mammedov 
On Wed, 12 Feb 2020 16:13:28 +0800
Tao Xu  wrote:

> Add which features are added or removed in this version. Remove the
> changed model-id in versioned CPU models, to keep the model name
> unchanged at /proc/cpuinfo inside the VM.
> 
> Signed-off-by: Tao Xu 
> ---
> 
> Changes in v2:
> - correct the note of Cascadelake v3 (Xiaoyao)
> ---
>  target/i386/cpu.c | 54 ++-
>  1 file changed, 25 insertions(+), 29 deletions(-)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 81a039beb6..739ef4ce91 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  {
>  .version = 2,
>  .alias = "Nehalem-IBRS",
> +.note = "IBRS",
>  .props = (PropValue[]) {
>  { "spec-ctrl", "on" },
> -{ "model-id",
> -  "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
>  { /* end of list */ }
>  }
>  },
> @@ -2359,10 +2358,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  {
>  .version = 2,
>  .alias = "Westmere-IBRS",
> +.note = "IBRS",
>  .props = (PropValue[]) {
>  { "spec-ctrl", "on" },
> -{ "model-id",
> -  "Westmere E56xx/L56xx/X56xx (IBRS update)" },
>  { /* end of list */ }
>  }
>  },
> @@ -2445,10 +2443,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  {
>  .version = 2,
>  .alias = "SandyBridge-IBRS",
> +.note = "IBRS",
>  .props = (PropValue[]) {
>  { "spec-ctrl", "on" },
> -{ "model-id",
> -  "Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
>  { /* end of list */ }
>  }
>  },
> @@ -2537,10 +2534,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  {
>  .version = 2,
>  .alias = "IvyBridge-IBRS",
> +.note = "IBRS",
>  .props = (PropValue[]) {
>  { "spec-ctrl", "on" },
> -{ "model-id",
> -  "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
>  { /* end of list */ }
>  }
>  },
> @@ -2634,17 +2630,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  {
>  .version = 2,
>  .alias = "Haswell-noTSX",
> +.note = "no TSX",
>  .props = (PropValue[]) {
>  { "hle", "off" },
>  { "rtm", "off" },
>  { "stepping", "1" },
> -{ "model-id", "Intel Core Processor (Haswell, no TSX)", 
> },
>  { /* end of list */ }
>  },
>  },
>  {
>  .version = 3,
>  .alias = "Haswell-IBRS",
> +.note = "IBRS",
>  .props = (PropValue[]) {
>  /* Restore TSX features removed by -v2 above */
>  { "hle", "on" },
> @@ -2655,21 +2652,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
>   */
>  { "stepping", "4" },
>  { "spec-ctrl", "on" },
> -{ "model-id",
> -  "Intel Core Processor (Haswell, IBRS)" },
>  { /* end of list */ }
>  }
>  },
>  {
>  .version = 4,
>  .alias = "Haswell-noTSX-IBRS",
> +.note = "no TSX, IBRS",
>  .props = (PropValue[]) {
>  { "hle", "off" },
>  { "rtm", "off" },
>  /* spec-ctrl was already enabled by -v3 above */
>  { "stepping", "1" },
> -{ "model-id",
> -  "Intel Core Processor (Haswell, no TSX, IBRS)" },
>  { /* end of list */ }
>  }
>  },
> @@ -2765,35 +2759,33 @@ static X86CPUDefinition builtin_x86_defs[] = {
>  {
>  .version = 2,
>  .alias = "Broadwell-noTSX",
> +.note = "no TSX",
>  .props = (PropValue[]) {
>  { "hle", "off" },
>  { "rtm", "off" },
> -{ "model-id", "Intel Core Processor (Broadwell, no 
> TSX)", },
>  { /* end of list */ }
>  },
>  },
>  {
>  .version = 3,
>  .alias = "Broadwell-IBRS",
> +.note = "IBRS",
>

[PATCH v3 4/4] target/i386: Add notes for versioned CPU models

2020-02-12 Thread Tao Xu 
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.

Signed-off-by: Tao Xu 
---

Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
 target/i386/cpu.c | 54 ++-
 1 file changed, 25 insertions(+), 29 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 81a039beb6..739ef4ce91 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
 {
 .version = 2,
 .alias = "Nehalem-IBRS",
+.note = "IBRS",
 .props = (PropValue[]) {
 { "spec-ctrl", "on" },
-{ "model-id",
-  "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
 { /* end of list */ }
 }
 },
@@ -2359,10 +2358,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
 {
 .version = 2,
 .alias = "Westmere-IBRS",
+.note = "IBRS",
 .props = (PropValue[]) {
 { "spec-ctrl", "on" },
-{ "model-id",
-  "Westmere E56xx/L56xx/X56xx (IBRS update)" },
 { /* end of list */ }
 }
 },
@@ -2445,10 +2443,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
 {
 .version = 2,
 .alias = "SandyBridge-IBRS",
+.note = "IBRS",
 .props = (PropValue[]) {
 { "spec-ctrl", "on" },
-{ "model-id",
-  "Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
 { /* end of list */ }
 }
 },
@@ -2537,10 +2534,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
 {
 .version = 2,
 .alias = "IvyBridge-IBRS",
+.note = "IBRS",
 .props = (PropValue[]) {
 { "spec-ctrl", "on" },
-{ "model-id",
-  "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
 { /* end of list */ }
 }
 },
@@ -2634,17 +2630,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
 {
 .version = 2,
 .alias = "Haswell-noTSX",
+.note = "no TSX",
 .props = (PropValue[]) {
 { "hle", "off" },
 { "rtm", "off" },
 { "stepping", "1" },
-{ "model-id", "Intel Core Processor (Haswell, no TSX)", },
 { /* end of list */ }
 },
 },
 {
 .version = 3,
 .alias = "Haswell-IBRS",
+.note = "IBRS",
 .props = (PropValue[]) {
 /* Restore TSX features removed by -v2 above */
 { "hle", "on" },
@@ -2655,21 +2652,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
  */
 { "stepping", "4" },
 { "spec-ctrl", "on" },
-{ "model-id",
-  "Intel Core Processor (Haswell, IBRS)" },
 { /* end of list */ }
 }
 },
 {
 .version = 4,
 .alias = "Haswell-noTSX-IBRS",
+.note = "no TSX, IBRS",
 .props = (PropValue[]) {
 { "hle", "off" },
 { "rtm", "off" },
 /* spec-ctrl was already enabled by -v3 above */
 { "stepping", "1" },
-{ "model-id",
-  "Intel Core Processor (Haswell, no TSX, IBRS)" },
 { /* end of list */ }
 }
 },
@@ -2765,35 +2759,33 @@ static X86CPUDefinition builtin_x86_defs[] = {
 {
 .version = 2,
 .alias = "Broadwell-noTSX",
+.note = "no TSX",
 .props = (PropValue[]) {
 { "hle", "off" },
 { "rtm", "off" },
-{ "model-id", "Intel Core Processor (Broadwell, no TSX)", 
},
 { /* end of list */ }
 },
 },
 {
 .version = 3,
 .alias = "Broadwell-IBRS",
+.note = "IBRS",
 .props = (PropValue[]) {
 /* Restore TSX features removed by -v2 above */
 { "hle", "on" },
 { "rtm", "on" },
 { "spec-ctrl", "on" },
-{ "model-id",
-  "Intel Core Processo