Re: [Qemu-devel] [PATCH v3 3/4] softfloat: use floatx80_infinity in softfloat
Le 24/02/2018 à 18:26, Richard Henderson a écrit :
> On 02/24/2018 09:21 AM, Laurent Vivier wrote:
>> I think the change should be in fact:
>>
>> @@ -4549,10 +4555,7 @@ int64_t floatx80_to_int64(floatx80 a,
>> float_status *status)
>> if ( shiftCount <= 0 ) {
>> if ( shiftCount ) {
>> float_raise(float_flag_invalid, status);
>> -if (! aSign
>> - || (( aExp == 0x7FFF )
>> - && ( aSig != LIT64( 0x8000 ) ) )
>> - ) {
>> +if (!aSign || floatx80_is_any_nan(a)) {
>> return LIT64( 0x7FFF );
>> }
>> return (int64_t) LIT64( 0x8000 );
>>
>> Do you agree?
>
> Yep, looks good.
Thank you.
And according to your previous comment, floatx80_is_infinity() should
become:
static inline int floatx80_is_infinity(floatx80 a)
{
#if defined(TARGET_M68K)
return (a.high & 0x7fff) == floatx80_infinity.high && !(a.low << 1);
#else
return (a.high & 0x7fff) == floatx80_infinity.high &&
a.low == floatx80_infinity.low;
#endif
}
Laurent
Re: [Qemu-devel] [PATCH v3 3/4] softfloat: use floatx80_infinity in softfloat
On 02/24/2018 09:21 AM, Laurent Vivier wrote:
> I think the change should be in fact:
>
> @@ -4549,10 +4555,7 @@ int64_t floatx80_to_int64(floatx80 a,
> float_status *status)
> if ( shiftCount <= 0 ) {
> if ( shiftCount ) {
> float_raise(float_flag_invalid, status);
> -if (! aSign
> - || (( aExp == 0x7FFF )
> - && ( aSig != LIT64( 0x8000 ) ) )
> - ) {
> +if (!aSign || floatx80_is_any_nan(a)) {
> return LIT64( 0x7FFF );
> }
> return (int64_t) LIT64( 0x8000 );
>
> Do you agree?
Yep, looks good.
r~
Re: [Qemu-devel] [PATCH v3 3/4] softfloat: use floatx80_infinity in softfloat
Le 24/02/2018 à 03:26, Richard Henderson a écrit :
> On 02/23/2018 06:59 AM, Laurent Vivier wrote:
>> @@ -4550,8 +4556,8 @@ int64_t floatx80_to_int64(floatx80 a, float_status
>> *status)
>> if ( shiftCount ) {
>> float_raise(float_flag_invalid, status);
>> if (! aSign
>> - || (( aExp == 0x7FFF )
>> - && ( aSig != LIT64( 0x8000 ) ) )
>> + || ((aExp == floatx80_infinity_high)
>> + && (aSig != floatx80_infinity_low))
>> ) {
>
> As long as you're cleaning this up, m68k ignores the explicit integer bit when
> considering an infinity. However, Intel doesn't ignore the bit -- it appears
> to treat 7fff.0* as a NaN.
According to the comment above the function:
"... If `a' is a NaN, the largest positive integer is returned.
Otherwise, if the conversion overflows, the largest integer with the
same sign as `a' is returned."
I think the change should be in fact:
@@ -4549,10 +4555,7 @@ int64_t floatx80_to_int64(floatx80 a,
float_status *status)
if ( shiftCount <= 0 ) {
if ( shiftCount ) {
float_raise(float_flag_invalid, status);
-if (! aSign
- || (( aExp == 0x7FFF )
- && ( aSig != LIT64( 0x8000 ) ) )
- ) {
+if (!aSign || floatx80_is_any_nan(a)) {
return LIT64( 0x7FFF );
}
return (int64_t) LIT64( 0x8000 );
Do you agree?
Thanks,
Laurent
Re: [Qemu-devel] [PATCH v3 3/4] softfloat: use floatx80_infinity in softfloat
On 02/23/2018 06:59 AM, Laurent Vivier wrote:
> @@ -4550,8 +4556,8 @@ int64_t floatx80_to_int64(floatx80 a, float_status
> *status)
> if ( shiftCount ) {
> float_raise(float_flag_invalid, status);
> if (! aSign
> - || (( aExp == 0x7FFF )
> - && ( aSig != LIT64( 0x8000 ) ) )
> + || ((aExp == floatx80_infinity_high)
> + && (aSig != floatx80_infinity_low))
> ) {
As long as you're cleaning this up, m68k ignores the explicit integer bit when
considering an infinity. However, Intel doesn't ignore the bit -- it appears
to treat 7fff.0* as a NaN.
r~
[Qemu-devel] [PATCH v3 3/4] softfloat: use floatx80_infinity in softfloat
Since f3218a8 ("softfloat: add floatx80 constants")
floatx80_infinity is defined but never used.
This patch updates floatx80 functions to use
this definition.
This allows to define a different default Infinity
value on m68k: the m68k FPU defines infinity with
all bits set to zero in the mantissa.
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
---
CC: Aurelien Jarno
fpu/softfloat-specialize.h | 14 ++
fpu/softfloat.c| 38 ++
include/fpu/softfloat.h| 9 +++--
3 files changed, 47 insertions(+), 14 deletions(-)
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 46126e9e0a..9ccb59422c 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -177,6 +177,20 @@ floatx80 floatx80_default_nan(float_status *status)
return r;
}
+/*
+| The pattern for a default generated extended double-precision inf.
+**/
+
+#define floatx80_infinity_high 0x7FFF
+#if defined(TARGET_M68K)
+#define floatx80_infinity_low LIT64(0x)
+#else
+#define floatx80_infinity_low LIT64(0x8000)
+#endif
+
+const floatx80 floatx80_infinity
+= make_floatx80_init(floatx80_infinity_high, floatx80_infinity_low);
+
/*
| The pattern for a default generated quadruple-precision NaN.
**/
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index fb4853682e..70a86e156c 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -2636,7 +2636,9 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision,
flag zSign,
) {
return packFloatx80( zSign, 0x7FFE, ~ roundMask );
}
-return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000 ) );
+return packFloatx80(zSign,
+floatx80_infinity_high,
+floatx80_infinity_low);
}
if ( zExp <= 0 ) {
isTiny =
@@ -3182,7 +3184,9 @@ floatx80 float32_to_floatx80(float32 a, float_status
*status)
if (aSig) {
return commonNaNToFloatx80(float32ToCommonNaN(a, status), status);
}
-return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000 ) );
+return packFloatx80(aSign,
+floatx80_infinity_high,
+floatx80_infinity_low);
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
@@ -4037,7 +4041,9 @@ floatx80 float64_to_floatx80(float64 a, float_status
*status)
if (aSig) {
return commonNaNToFloatx80(float64ToCommonNaN(a, status), status);
}
-return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000 ) );
+return packFloatx80(aSign,
+floatx80_infinity_high,
+floatx80_infinity_low);
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
@@ -4550,8 +4556,8 @@ int64_t floatx80_to_int64(floatx80 a, float_status
*status)
if ( shiftCount ) {
float_raise(float_flag_invalid, status);
if (! aSign
- || (( aExp == 0x7FFF )
- && ( aSig != LIT64( 0x8000 ) ) )
+ || ((aExp == floatx80_infinity_high)
+ && (aSig != floatx80_infinity_low))
) {
return LIT64( 0x7FFF );
}
@@ -4858,7 +4864,9 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b,
flag zSign,
if ((uint64_t)(bSig << 1)) {
return propagateFloatx80NaN(a, b, status);
}
-return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000 ) );
+return packFloatx80(zSign,
+floatx80_infinity_high,
+floatx80_infinity_low);
}
if ( aExp == 0 ) ++expDiff;
shift64ExtraRightJamming( aSig, 0, - expDiff, , );
@@ -4933,7 +4941,8 @@ static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b,
flag zSign,
if ((uint64_t)(bSig << 1)) {
return propagateFloatx80NaN(a, b, status);
}
-return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000 ) );
+return packFloatx80(zSign ^ 1, floatx80_infinity_high,
+floatx80_infinity_low);
}
if ( aExp == 0 ) ++expDiff;
shift128RightJamming( aSig, 0, - expDiff, , );
@@ -5038,7 +5047,8 @@ floatx80 floatx80_mul(floatx80 a, floatx80 b,
float_status *status)
return
