Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-17 Thread Aleksandar Markovic 
Hi, Leon,

I cannot say thank you enough for all your valuable feedback.

Just wanted to give you a heads up that in the next version of this patch 
series (planned for tomorrow (Monday) or the day after tomorrow), I am going to 
integrate all your suggestions from this thread, including name "status" 
instead of "fst", and also following segment in cpu.h:

/* op_helper.c */
uint32_t float_class_s(uint32_t arg, float_status *fst);
uint64_t float_class_d(uint64_t arg, float_status *fst);

(unless you tell me not to do so)

Also, I think there will be some improvements in the patch related to 
, that are currently being analysed and tested here.

Sincerely,
Aleksandar

From: Aleksandar Markovic
Sent: Friday, April 15, 2016 4:38 AM
To: Leon Alrae; Aleksandar Markovic; qemu-devel@nongnu.org
Cc: pro...@gmail.com; kbast...@mail.uni-paderborn.de; 
mark.cave-ayl...@ilande.co.uk; ag...@suse.de; blauwir...@gmail.com; 
jcmvb...@gmail.com; qemu-...@nongnu.org; qemu-...@nongnu.org; Petar Jovanovic; 
pbonz...@redhat.com; Miodrag Dinic; edgar.igles...@gmail.com; 
g...@mprc.pku.edu.cn; afaer...@suse.de; aurel...@aurel32.net; r...@twiddle.net; 
Maciej Rozycki
Subject: RE: [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning 
of signaling NaN bit

Hi, Leon,

There is one more subtle point here. The question is: Where to put declarations 
of two new functions? This is a new case in the organization of mips-specific 
source code files. File helpers.h does not seem to be a good place, cpu.h - 
maybe, but still looks clumsy to me.

IMHO, my solution from earlier versions of this patch series, in spite of 
containing code duplication, is superior in the sense of keeping current 
mips-specific source code file relations intact, respecting autonomy of 
msa_helpers.c, and is the best overall.

Yours,
Aleksandar


From: Leon Alrae
Sent: Friday, April 15, 2016 3:41 AM
To: Aleksandar Markovic; Aleksandar Markovic; qemu-devel@nongnu.org
Cc: pro...@gmail.com; kbast...@mail.uni-paderborn.de; 
mark.cave-ayl...@ilande.co.uk; ag...@suse.de; blauwir...@gmail.com; 
jcmvb...@gmail.com; qemu-...@nongnu.org; qemu-...@nongnu.org; Petar Jovanovic; 
pbonz...@redhat.com; Miodrag Dinic; edgar.igles...@gmail.com; 
g...@mprc.pku.edu.cn; afaer...@suse.de; aurel...@aurel32.net; r...@twiddle.net; 
Maciej Rozycki
Subject: Re: [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning 
of signaling NaN bit

On 15/04/16 09:48, Aleksandar Markovic wrote:
> Agreed. This looks much better, and is simpler and faster. Though, it looks 
> to me that "fst" should be called "status" instead (just not to break 
> consistency throughout SoftFloat library and in other places of assigning 
> name "status" to the last argument of any function if its type is 
> float_status*). If you agree, I am going to replace name "fst" with name 
> "status" in the code that you provided, otherwise as-is.

Yes, "status" will be fine.

Leon

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-15 Thread Aleksandar Markovic 
Hi, Leon,

There is one more subtle point here. The question is: Where to put declarations 
of two new functions? This is a new case in the organization of mips-specific 
source code files. File helpers.h does not seem to be a good place, cpu.h - 
maybe, but still looks clumsy to me.

IMHO, my solution from earlier versions of this patch series, in spite of 
containing code duplication, is superior in the sense of keeping current 
mips-specific source code file relations intact, respecting autonomy of 
msa_helpers.c, and is the best overall.

Yours,
Aleksandar


From: Leon Alrae
Sent: Friday, April 15, 2016 3:41 AM
To: Aleksandar Markovic; Aleksandar Markovic; qemu-devel@nongnu.org
Cc: pro...@gmail.com; kbast...@mail.uni-paderborn.de; 
mark.cave-ayl...@ilande.co.uk; ag...@suse.de; blauwir...@gmail.com; 
jcmvb...@gmail.com; qemu-...@nongnu.org; qemu-...@nongnu.org; Petar Jovanovic; 
pbonz...@redhat.com; Miodrag Dinic; edgar.igles...@gmail.com; 
g...@mprc.pku.edu.cn; afaer...@suse.de; aurel...@aurel32.net; r...@twiddle.net; 
Maciej Rozycki
Subject: Re: [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning 
of signaling NaN bit

On 15/04/16 09:48, Aleksandar Markovic wrote:
> Agreed. This looks much better, and is simpler and faster. Though, it looks 
> to me that "fst" should be called "status" instead (just not to break 
> consistency throughout SoftFloat library and in other places of assigning 
> name "status" to the last argument of any function if its type is 
> float_status*). If you agree, I am going to replace name "fst" with name 
> "status" in the code that you provided, otherwise as-is.

Yes, "status" will be fine.

Leon

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-15 Thread Leon Alrae 
On 15/04/16 09:48, Aleksandar Markovic wrote:
> Agreed. This looks much better, and is simpler and faster. Though, it looks 
> to me that "fst" should be called "status" instead (just not to break 
> consistency throughout SoftFloat library and in other places of assigning 
> name "status" to the last argument of any function if its type is 
> float_status*). If you agree, I am going to replace name "fst" with name 
> "status" in the code that you provided, otherwise as-is.

Yes, "status" will be fine.

Leon

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-15 Thread Aleksandar Markovic 
Agreed. This looks much better, and is simpler and faster. Though, it looks to 
me that "fst" should be called "status" instead (just not to break consistency 
throughout SoftFloat library and in other places of assigning name "status" to 
the last argument of any function if its type is float_status*). If you agree, 
I am going to replace name "fst" with name "status" in the code that you 
provided, otherwise as-is.

From: Leon Alrae
Sent: Thursday, April 14, 2016 8:31 AM
To: Aleksandar Markovic; qemu-devel@nongnu.org
Cc: pro...@gmail.com; kbast...@mail.uni-paderborn.de; 
mark.cave-ayl...@ilande.co.uk; ag...@suse.de; blauwir...@gmail.com; 
jcmvb...@gmail.com; Aleksandar Markovic; qemu-...@nongnu.org; 
qemu-...@nongnu.org; Petar Jovanovic; pbonz...@redhat.com; Miodrag Dinic; 
edgar.igles...@gmail.com; g...@mprc.pku.edu.cn; afaer...@suse.de; 
aurel...@aurel32.net; r...@twiddle.net; Maciej Rozycki
Subject: Re: [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning 
of signaling NaN bit

On 12/04/2016 13:58, Aleksandar Markovic wrote:
> @@ -3200,11 +3200,17 @@ FLOAT_RINT(rint_d, 64)
>  #define FLOAT_CLASS_POSITIVE_ZERO  0x200
>
>  #define FLOAT_CLASS(name, bits)  \
> -uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg)\
> +uint ## bits ## _t helper_float_ ## name (CPUMIPSState *env, \
> + uint ## bits ## _t arg, uint32_t is_msa)\
>  {\
> -if (float ## bits ## _is_signaling_nan(arg)) {   \
> +float_status* fst;   \
> + \
> +fst = (is_msa == 1) ?\
> +&env->active_tc.msa_fp_status : &env->active_fpu.fp_status;  \
> + \
> +if (float ## bits ## _is_signaling_nan(arg, fst)) {  \
>  return FLOAT_CLASS_SIGNALING_NAN;\
> -} else if (float ## bits ## _is_quiet_nan(arg)) {\
> +} else if (float ## bits ## _is_quiet_nan(arg, fst)) {   \
>  return FLOAT_CLASS_QUIET_NAN;\
>  } else if (float ## bits ## _is_neg(arg)) {  \
>  if (float ## bits ## _is_infinity(arg)) {\

Let's make it a common function which takes float_status passed from FPU and
MSA helpers and avoid is_msa:


 #define FLOAT_CLASS(name, bits)  \
-uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg)\
+uint ## bits ## _t float_ ## name (uint ## bits ## _t arg,   \
+   float_status *fst)\
 {\
-if (float ## bits ## _is_signaling_nan(arg)) {   \
+if (float ## bits ## _is_signaling_nan(arg, fst)) {  \
 return FLOAT_CLASS_SIGNALING_NAN;\
-} else if (float ## bits ## _is_quiet_nan(arg)) {\
+} else if (float ## bits ## _is_quiet_nan(arg, fst)) {   \
 return FLOAT_CLASS_QUIET_NAN;\
 } else if (float ## bits ## _is_neg(arg)) {  \
 if (float ## bits ## _is_infinity(arg)) {\
@@ -3227,6 +3228,12 @@ uint ## bits ## _t helper_float_ ## name (uint ## bits 
## _t arg)\
 return FLOAT_CLASS_POSITIVE_NORMAL;  \
 }\
 }\
+}\
+ \
+uint ## bits ## _t helper_float_ ## name (CPUMIPSState *env, \
+  uint ## bits ## _t arg)\
+{\
+return float_ ## name(arg, &env->active_fpu.fp_status);  \
 }

 FLOAT_CLASS(class_s, 32)


And in MSA:


+float_status *status = &env->active_tc.msa_fp_status;
 if (df == DF_WORD) {
-pwd->w[0] = helper_float_class_s(pws->w[0]);
-pwd->w[1] = helper_float_class_s(pws->w[1]);
-pwd->w[2] = helper_float_class_s(pws->w[2]);
-pwd->w[3] = helper_float_class_s(pws->w[3]);
+pwd->w[0] = float_class_s(pws->w[0], status);
+pwd->w[1] = float_class_s(pws->w[1], status);
+pwd->w[2] = float_class_s(pws->w[2], status);
+pwd->w[3] = float_class_s(pws->w[3], status);
 } else {
-pwd->d[0] = helper_float_class_d(pws->d[0]);
-pwd->d[1] = helper_float_class_d(pws

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-14 Thread Leon Alrae 
On 12/04/2016 13:58, Aleksandar Markovic wrote:
> @@ -3200,11 +3200,17 @@ FLOAT_RINT(rint_d, 64)
>  #define FLOAT_CLASS_POSITIVE_ZERO  0x200
>  
>  #define FLOAT_CLASS(name, bits)  \
> -uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg)\
> +uint ## bits ## _t helper_float_ ## name (CPUMIPSState *env, \
> + uint ## bits ## _t arg, uint32_t is_msa)\
>  {\
> -if (float ## bits ## _is_signaling_nan(arg)) {   \
> +float_status* fst;   \
> + \
> +fst = (is_msa == 1) ?\
> +&env->active_tc.msa_fp_status : &env->active_fpu.fp_status;  \
> + \
> +if (float ## bits ## _is_signaling_nan(arg, fst)) {  \
>  return FLOAT_CLASS_SIGNALING_NAN;\
> -} else if (float ## bits ## _is_quiet_nan(arg)) {\
> +} else if (float ## bits ## _is_quiet_nan(arg, fst)) {   \
>  return FLOAT_CLASS_QUIET_NAN;\
>  } else if (float ## bits ## _is_neg(arg)) {  \
>  if (float ## bits ## _is_infinity(arg)) {\

Let's make it a common function which takes float_status passed from FPU and
MSA helpers and avoid is_msa:


 #define FLOAT_CLASS(name, bits)  \
-uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg)\
+uint ## bits ## _t float_ ## name (uint ## bits ## _t arg,   \
+   float_status *fst)\
 {\
-if (float ## bits ## _is_signaling_nan(arg)) {   \
+if (float ## bits ## _is_signaling_nan(arg, fst)) {  \
 return FLOAT_CLASS_SIGNALING_NAN;\
-} else if (float ## bits ## _is_quiet_nan(arg)) {\
+} else if (float ## bits ## _is_quiet_nan(arg, fst)) {   \
 return FLOAT_CLASS_QUIET_NAN;\
 } else if (float ## bits ## _is_neg(arg)) {  \
 if (float ## bits ## _is_infinity(arg)) {\
@@ -3227,6 +3228,12 @@ uint ## bits ## _t helper_float_ ## name (uint ## bits 
## _t arg)\
 return FLOAT_CLASS_POSITIVE_NORMAL;  \
 }\
 }\
+}\
+ \
+uint ## bits ## _t helper_float_ ## name (CPUMIPSState *env, \
+  uint ## bits ## _t arg)\
+{\
+return float_ ## name(arg, &env->active_fpu.fp_status);  \
 }

 FLOAT_CLASS(class_s, 32)


And in MSA:


+float_status *status = &env->active_tc.msa_fp_status;
 if (df == DF_WORD) {
-pwd->w[0] = helper_float_class_s(pws->w[0]);
-pwd->w[1] = helper_float_class_s(pws->w[1]);
-pwd->w[2] = helper_float_class_s(pws->w[2]);
-pwd->w[3] = helper_float_class_s(pws->w[3]);
+pwd->w[0] = float_class_s(pws->w[0], status);
+pwd->w[1] = float_class_s(pws->w[1], status);
+pwd->w[2] = float_class_s(pws->w[2], status);
+pwd->w[3] = float_class_s(pws->w[3], status);
 } else {
-pwd->d[0] = helper_float_class_d(pws->d[0]);
-pwd->d[1] = helper_float_class_d(pws->d[1]);
+pwd->d[0] = float_class_d(pws->d[0], status);
+pwd->d[1] = float_class_d(pws->d[1], status);
 }


Thanks,
Leon

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-13 Thread Eduardo Habkost 
On Wed, Apr 13, 2016 at 06:41:48PM +, Aleksandar Markovic wrote:
> Hello, Eduardo,
> 
> I greatly appreciate your time spent on this matter and your unfailing 
> attention to detail.
> 
> For Alpha and Xtensa, this is for sure, they will zero their CPU objects, as 
> you hinted:
> 
> target-alpha/cpu.c:
>   162  cpu_class = object_class_by_name(TYPE("ev67"));
>   163  }
>   164: cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class)));
>   165  
>   166  object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> 
> target-xtensa/helper.c:
>   125  }
>   126  
>   127: cpu = XTENSA_CPU(object_new(object_class_get_name(oc)));
>   128  env = &cpu->env;
>   129  
> 
> So, I will remove their set_snan_bit_is_one(0) calls, as you suggested.
> 
> This leaves only ppc, s390x, and TriCore calling set_snan_bit_is_one(0) it 
> this
> patch series..

All CPU objects are created using object_new(), and are already
zeroed on initialization.

ppc CPUs are created using cpu_ppc_init(), which reuses
cpu_generic_init(), which calls object_new().

s390x CPUs are created by s390x_new_cpu(), which calls
cpu_s390x_create(), which calls object_new().

tricore CPUs are created by cpu_tricore_init(), which reuses
cpu_generic_init().

-- 
Eduardo

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-13 Thread Aleksandar Markovic 
Hello, Eduardo,

I greatly appreciate your time spent on this matter and your unfailing 
attention to detail.

For Alpha and Xtensa, this is for sure, they will zero their CPU objects, as 
you hinted:

target-alpha/cpu.c:
  162  cpu_class = object_class_by_name(TYPE("ev67"));
  163  }
  164: cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class)));
  165  
  166  object_property_set_bool(OBJECT(cpu), true, "realized", NULL);

target-xtensa/helper.c:
  125  }
  126  
  127: cpu = XTENSA_CPU(object_new(object_class_get_name(oc)));
  128  env = &cpu->env;
  129  

So, I will remove their set_snan_bit_is_one(0) calls, as you suggested.

This leaves only ppc, s390x, and TriCore calling set_snan_bit_is_one(0) it this
patch series..

I'll take one more look at them tomorrow, and will get back to you.

Yours,
Aleksandar


From: Eduardo Habkost [ehabk...@redhat.com]
Sent: Tuesday, April 12, 2016 11:45 AM
To: Aleksandar Markovic
Cc: qemu-devel@nongnu.org; pro...@gmail.com; kbast...@mail.uni-paderborn.de; 
mark.cave-ayl...@ilande.co.uk; ag...@suse.de; Maciej Rozycki; Petar Jovanovic; 
blauwir...@gmail.com; jcmvb...@gmail.com; Aleksandar Markovic; 
qemu-...@nongnu.org; qemu-...@nongnu.org; edgar.igles...@gmail.com; Miodrag 
Dinic; pbonz...@redhat.com; g...@mprc.pku.edu.cn; Leon Alrae; afaer...@suse.de; 
aurel...@aurel32.net; r...@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement 
run-time-configurable meaning of signaling NaN bit

On Tue, Apr 12, 2016 at 02:58:03PM +0200, Aleksandar Markovic wrote:
[...]
>   4) Updated code for all platforms to reflect changes in SoftFloat library.
>  This change is twofolds: it includes modifications of SoftFloat library
>  functions invocations, and an addition of invocation of function
>  set_snan_bit_is_one() during CPU initialization, with arguments that
>  are appropriate for each particular platform.
>
>  In order to be at the same time accurate in relation to floating point
>  arithmetics and consistent with a particular platform code, following
>  principle is adopted related to invocations of new function
>  set_snan_bit_is_one():
>
>  1. If a target platform doesn't use SoftFloat library, nothing is added.
> (cris, lm32, moxie)
>  2. Else, if a target platform's signaling bit meaning is "1 is
> signaling", explicit invocation of set_snan_bit_is_one(1) is added.
> (mips, sh4, unicore32)
>   (for mips this will change in the second patch of this
>   series, but this very patch leaves mips features as
>   they currently are.)
>  3. Else, if a target platform explicitly sets other fields of its
> float_status structure(s), explicit invocation of
> set_snan_bit_is_one(0) is added.
> (ppc, s390x, tricore)
>  4. Else, if a target platform doesn't explicitly set its structure
> CPUXXXState, explicit invocation of set_snan_bit_is_one(0) is added.
> (alpha, xtensa)

The CPU struct is zeroed by object_new() when the CPU object is
created, so the field is already set to 0 by default on all
architectures. You shouldn't need set_snan_bit_is_one(0) calls on
CPU initialization on any architecture.


>  5. For remaining cases, nothing is added. (Those cases explicitly set
> their CPUXXXState/float_status structures to 0, and thus implicitly
> perform set_snan_bit_is_one(0).)
> (arm, i386, m68k, microblaze, openrisc, sparc)
>

--
Eduardo

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-13 Thread Leon Alrae 
On 12/04/16 13:58, Aleksandar Markovic wrote:
> @@ -322,14 +327,14 @@ int float32_is_quiet_nan( float32 a_ )
>  | NaN; otherwise returns 0.
>  
> **/
>  
> -int float32_is_signaling_nan( float32 a_ )
> +int float32_is_signaling_nan( float32 a_, float_status *status )
>  {
>  uint32_t a = float32_val(a_);
> -#if SNAN_BIT_IS_ONE
> -return ((uint32_t)(a << 1) >= 0xff80);
> -#else
> -return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003F );
> -#endif
> +if (status->snan_bit_is_one) {
> +return ((uint32_t)(a << 1) >= 0xff80);
> +} else {
> +return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003F );
> +}

Please correct the style while touching the lines.

Thanks,
Leon

Re: [Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-12 Thread Eduardo Habkost 
On Tue, Apr 12, 2016 at 02:58:03PM +0200, Aleksandar Markovic wrote:
[...]
>   4) Updated code for all platforms to reflect changes in SoftFloat library.
>  This change is twofolds: it includes modifications of SoftFloat library
>  functions invocations, and an addition of invocation of function
>  set_snan_bit_is_one() during CPU initialization, with arguments that
>  are appropriate for each particular platform.
> 
>  In order to be at the same time accurate in relation to floating point
>  arithmetics and consistent with a particular platform code, following
>  principle is adopted related to invocations of new function
>  set_snan_bit_is_one():
> 
>  1. If a target platform doesn't use SoftFloat library, nothing is added.
> (cris, lm32, moxie)
>  2. Else, if a target platform's signaling bit meaning is "1 is
> signaling", explicit invocation of set_snan_bit_is_one(1) is added.
> (mips, sh4, unicore32)
>   (for mips this will change in the second patch of this
>   series, but this very patch leaves mips features as
>   they currently are.)
>  3. Else, if a target platform explicitly sets other fields of its
> float_status structure(s), explicit invocation of
> set_snan_bit_is_one(0) is added.
> (ppc, s390x, tricore)
>  4. Else, if a target platform doesn't explicitly set its structure
> CPUXXXState, explicit invocation of set_snan_bit_is_one(0) is added.
> (alpha, xtensa)

The CPU struct is zeroed by object_new() when the CPU object is
created, so the field is already set to 0 by default on all
architectures. You shouldn't need set_snan_bit_is_one(0) calls on
CPU initialization on any architecture.


>  5. For remaining cases, nothing is added. (Those cases explicitly set
> their CPUXXXState/float_status structures to 0, and thus implicitly
> perform set_snan_bit_is_one(0).)
> (arm, i386, m68k, microblaze, openrisc, sparc)
> 

-- 
Eduardo

[Qemu-devel] [PATCH v4 1/9] softfloat: Implement run-time-configurable meaning of signaling NaN bit

2016-04-12 Thread Aleksandar Markovic 
From: Aleksandar Markovic 

This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.

Background:

In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).

Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.

Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.

QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.

On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.

The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.

IMPORTANT:

This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in the next patch.

Further break down of changes:

  1) Added field snan_bit_is_one to the structure float_status, and
 correspondent setter function set_snan_bit_is_one().

  2) Constants _default_nan
 (used both internally and externally) converted to functions
 _default_nan(float_status*).
 This is necessary since they are dependent on signaling bit meaning.
 At the same time, for the sake of code cleanup and simplicity, constants
 _default_nan_ (used only internally within
 SoftFloat library) are removed, as not needed.

  3) Added a float_status* argument to SoftFloat library functions
 XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
 XXX_maybe_silence_nan(XXX a_). This argument must be present in
 order to enable correct invocation of new version of functions
 XXX_default_nan(). (XXX is 
 here)

  4) Updated code for all platforms to reflect changes in SoftFloat library.
 This change is twofolds: it includes modifications of SoftFloat library
 functions invocations, and an addition of invocation of function
 set_snan_bit_is_one() during CPU initialization, with arguments that
 are appropriate for each particular platform.

 In order to be at the same time accurate in relation to floating point
 arithmetics and consistent with a particular platform code, following
 principle is adopted related to invocations of new function
 set_snan_bit_is_one():

 1. If a target platform doesn't use SoftFloat library, nothing is added.
(cris, lm32, moxie)
 2. Else, if a target platform's signaling bit meaning is "1 is
signaling", explicit invocation of set_snan_bit_is_one(1) is added.
(mips, sh4, unicore32)
  (for mips this will change in the second patch of this
  series, but this very patch leaves mips features as
  they currently are.)
 3. El