Re: [Qemu-devel] [PULL 1/8] target-sh4: use bit number for SR constants
On 3 June 2015 at 15:34, Aurelien Jarno wrote: > On 2015-06-03 09:09, Aurelien Jarno wrote: >> On 2015-06-02 19:01, Christopher Covington wrote: >> > I like using the BIT() macro for this kind of thing. >> >> Thanks for the hint, I'll come with an additional patch to fix that in >> the code. > > Unfortunately it doesn't seem as easy as it appears. The BIT() macro uses > long types Yeah, I've always taken it as really only being intended for working with the bitmap functions, on account of the weird choice of "long". -- PMM
Re: [Qemu-devel] [PULL 1/8] target-sh4: use bit number for SR constants
On 2015-06-03 09:09, Aurelien Jarno wrote: > On 2015-06-02 19:01, Christopher Covington wrote: > > Hi Aurelien, > > > > On 06/01/2015 05:29 PM, Aurelien Jarno wrote: > > > Use the bit number for SR constants instead of using a bit mask. This > > > make possible to also use the constants for shifts. > > > > > > Reviewed-by: Richard Henderson > > > Signed-off-by: Aurelien Jarno > > > --- > > > target-sh4/cpu.c | 3 +- > > > target-sh4/cpu.h | 30 ++-- > > > target-sh4/gdbstub.c | 4 +-- > > > target-sh4/helper.c| 27 +- > > > target-sh4/op_helper.c | 26 - > > > target-sh4/translate.c | 75 > > > ++ > > > 6 files changed, 85 insertions(+), 80 deletions(-) > > > > > > diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c > > > index d187a2b..cccb14f 100644 > > > --- a/target-sh4/cpu.c > > > +++ b/target-sh4/cpu.c > > > @@ -61,7 +61,8 @@ static void superh_cpu_reset(CPUState *s) > > > env->fpscr = FPSCR_PR; /* value for userspace according to the > > > kernel */ > > > set_float_rounding_mode(float_round_nearest_even, &env->fp_status); > > > /* ?! */ > > > #else > > > -env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; > > > +env->sr = (1u << SR_MD) | (1u << SR_RB) | (1u << SR_BL) | > > > + (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << > > > SR_I0); > > > > I like using the BIT() macro for this kind of thing. > > Thanks for the hint, I'll come with an additional patch to fix that in > the code. Unfortunately it doesn't seem as easy as it appears. The BIT() macro uses long types, so you can't invert it to create a mask without casting it first, otherwise GCC complains. For example: | target-sh4/translate.c: In function ‘_decode_opc’: | target-sh4/translate.c:408:42: error: large integer implicitly truncated to unsigned type [-Werror=overflow] | tcg_gen_andi_i32(cpu_sr, cpu_sr, ~BIT(SR_S)); -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] [PULL 1/8] target-sh4: use bit number for SR constants
On 2015-06-02 19:01, Christopher Covington wrote: > Hi Aurelien, > > On 06/01/2015 05:29 PM, Aurelien Jarno wrote: > > Use the bit number for SR constants instead of using a bit mask. This > > make possible to also use the constants for shifts. > > > > Reviewed-by: Richard Henderson > > Signed-off-by: Aurelien Jarno > > --- > > target-sh4/cpu.c | 3 +- > > target-sh4/cpu.h | 30 ++-- > > target-sh4/gdbstub.c | 4 +-- > > target-sh4/helper.c| 27 +- > > target-sh4/op_helper.c | 26 - > > target-sh4/translate.c | 75 > > ++ > > 6 files changed, 85 insertions(+), 80 deletions(-) > > > > diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c > > index d187a2b..cccb14f 100644 > > --- a/target-sh4/cpu.c > > +++ b/target-sh4/cpu.c > > @@ -61,7 +61,8 @@ static void superh_cpu_reset(CPUState *s) > > env->fpscr = FPSCR_PR; /* value for userspace according to the kernel > > */ > > set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* > > ?! */ > > #else > > -env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; > > +env->sr = (1u << SR_MD) | (1u << SR_RB) | (1u << SR_BL) | > > + (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << > > SR_I0); > > I like using the BIT() macro for this kind of thing. Thanks for the hint, I'll come with an additional patch to fix that in the code. -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] [PULL 1/8] target-sh4: use bit number for SR constants
Hi Aurelien, On 06/01/2015 05:29 PM, Aurelien Jarno wrote: > Use the bit number for SR constants instead of using a bit mask. This > make possible to also use the constants for shifts. > > Reviewed-by: Richard Henderson > Signed-off-by: Aurelien Jarno > --- > target-sh4/cpu.c | 3 +- > target-sh4/cpu.h | 30 ++-- > target-sh4/gdbstub.c | 4 +-- > target-sh4/helper.c| 27 +- > target-sh4/op_helper.c | 26 - > target-sh4/translate.c | 75 > ++ > 6 files changed, 85 insertions(+), 80 deletions(-) > > diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c > index d187a2b..cccb14f 100644 > --- a/target-sh4/cpu.c > +++ b/target-sh4/cpu.c > @@ -61,7 +61,8 @@ static void superh_cpu_reset(CPUState *s) > env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */ > set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* > ?! */ > #else > -env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; > +env->sr = (1u << SR_MD) | (1u << SR_RB) | (1u << SR_BL) | > + (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << SR_I0); I like using the BIT() macro for this kind of thing. Chris -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
