CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Wed Jun 2 00:00:39 UTC 2021 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: s/leading spaces/tabs/ To generate a diff of this commit: cvs rdiff -u -r1.301 -r1.302 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu May 27 13:32:54 UTC 2021 Modified Files: src/sys/arch/mips/mips: mips_emul.c Log Message: Print the CP0 status register too in the debug trap code. To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/mips/mips/mips_emul.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon May 24 07:27:39 UTC 2021 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: Whitespace alignment nit. To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu May 13 06:15:29 UTC 2021 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: Update ISA for some "L" variant instructions after checking the R4400 UM. To generate a diff of this commit: cvs rdiff -u -r1.55 -r1.56 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu May 13 04:55:12 UTC 2021 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: Note which ISA the unimplemented instructions belong to. To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu May 13 03:41:46 UTC 2021 Modified Files: src/sys/arch/mips/mips: mips_fputrap.c Log Message: If we're going to print a number in hex, at least put a 0x in front of it. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/mips/mips_fputrap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue May 11 14:41:08 UTC 2021 Modified Files: src/sys/arch/mips/mips: mips_fpu.c Log Message: Use "static" in the function intro if the function is static. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/mips/mips/mips_fpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu Apr 29 08:45:29 UTC 2021 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: Fix another misplaced label for cvt_s_w() but use a named local label and redo fix for cvt_d_w() in rev 1.52 the same way. To generate a diff of this commit: cvs rdiff -u -r1.53 -r1.54 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu Apr 29 08:14:08 UTC 2021 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: Move a comment slighty so that it's before two #ifdef blocks that do the same thing instead of in the middle of them. To generate a diff of this commit: cvs rdiff -u -r1.52 -r1.53 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu Apr 29 08:11:38 UTC 2021 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: Move a branch target in cvt_d_w() to where it will be hit for either case of an #ifdef block of code. Fixes an FP emulation problem if compiled with -mips32 or -mips64. To generate a diff of this commit: cvs rdiff -u -r1.51 -r1.52 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Sun Apr 18 10:40:34 UTC 2021 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: move softint_cleanup, which is a part of softint_fast_dispatch(), into the section of code known as softint_fast_dispatch(). previous: db> x/i softint_cleanup netbsd:cpu_switchto+0xd4: ld t0,0(t8) except that cpu_switchto() ends at cpu_switchto+0xd0. now: db> x/i softint_cleanup netbsd:softint_fast_dispatch+0xa4: ld t0,0(t8) tested on OCTEON. To generate a diff of this commit: cvs rdiff -u -r1.226 -r1.227 src/sys/arch/mips/mips/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Apr 12 11:35:22 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_disasm.c Log Message: Print target addresses similar to aarch64 as "address " instead of " [addr:address]". Uses less columns, a bit easier on the eyes. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/mips/mips/db_disasm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Mon Apr 12 02:23:41 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: avoid duplicate "ddb_regs" in crash with GCC 10 and -fcommon default. To generate a diff of this commit: cvs rdiff -u -r1.92 -r1.93 src/sys/arch/mips/mips/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Wed Apr 7 14:27:39 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_disasm.c Log Message: Add a # to a %x printf format to get some 0x hex number prefixes. To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/mips/mips/db_disasm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Wed Apr 7 02:59:01 UTC 2021 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: Basic dtrace trap support. Mostly from FreeBSD. To generate a diff of this commit: cvs rdiff -u -r1.260 -r1.261 src/sys/arch/mips/mips/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue Apr 6 13:11:22 UTC 2021 Modified Files: src/sys/arch/mips/mips: mips_stacktrace.c Log Message: If we're going to print a number in hex, at least put a 0x in front of it so we can cut'n'paste it into gdb directly. This has only annoyed me for 25 or so years... Wrap a long long while here. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/mips/mips_stacktrace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Apr 5 07:27:11 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_disasm.c Log Message: Fix cut'n'paste typo - OP_CVM_DMUL is dmul, not baddu. To generate a diff of this commit: cvs rdiff -u -r1.38 -r1.39 src/sys/arch/mips/mips/db_disasm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Apr 5 06:38:01 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_disasm.c Log Message: gcc/gas also emits "or ...,zero" as well as "addu/daddu ...,zero" for a "move" pseudo instruction. Disassemble the "or" case as a "move" too. To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37 src/sys/arch/mips/mips/db_disasm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Apr 5 06:35:04 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_disasm.c Log Message: Allow disassembly in XKSEG for LP64 kernels. Can now x/i on modules with an N64 kernel. To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36 src/sys/arch/mips/mips/db_disasm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src
Committed By: simonb
Date: Mon Apr 5 06:28:31 UTC 2021
Modified Files:
src/sys/arch/mips/mips: db_disasm.c
Log Message:
For bc{0,1,2}{t,f} check for the TRUE value not the MASK value (even
though they're the same).
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/mips/mips/db_disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Mar 29 03:22:18 UTC 2021 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: (Very) minimal kernel support for dtrace on MIPS; enough to system call tracing to work for example. To generate a diff of this commit: cvs rdiff -u -r1.259 -r1.260 src/sys/arch/mips/mips/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue Mar 16 07:34:44 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_disasm.c Log Message: Disassemble TEQ correctly. XXX: May be others that use this format? To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/mips/mips/db_disasm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: christos Date: Sun Mar 7 15:10:06 UTC 2021 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: add TRAP_SIGDEBUG support to mips. To generate a diff of this commit: cvs rdiff -u -r1.256 -r1.257 src/sys/arch/mips/mips/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue Feb 9 13:28:47 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_trace.c Log Message: Remove a macro that has never been used. To generate a diff of this commit: cvs rdiff -u -r1.48 -r1.49 src/sys/arch/mips/mips/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue Feb 9 13:26:25 UTC 2021 Modified Files: src/sys/arch/mips/mips: db_trace.c Log Message: Trailing whitespace, remove extra blank line. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/mips/mips/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Thu Jan 7 17:28:20 UTC 2021 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: Fix build for non-_MIPS_NEED_BUS_DMA_BOUNCE platforms To generate a diff of this commit: cvs rdiff -u -r1.43 -r1.44 src/sys/arch/mips/mips/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: thorpej Date: Mon Jan 4 18:09:01 UTC 2021 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: malloc(9) -> kmem(9) To generate a diff of this commit: cvs rdiff -u -r1.42 -r1.43 src/sys/arch/mips/mips/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sun Dec 20 15:59:28 UTC 2020 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Remove bogus KASSERT - can't assert a spin mutex is !mutex_owned. To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/mips/mips/pmap_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sun Dec 20 12:27:20 UTC 2020 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Remove old part of comment To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/mips/mips/pmap_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Sun Sep 27 10:35:57 UTC 2020 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: only look for cpunode.h on OCTEON. that's the only direct caller of *_kern_nonmaskable_intr(). To generate a diff of this commit: cvs rdiff -u -r1.111 -r1.112 src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Sat Sep 26 20:38:27 UTC 2020 Modified Files: src/sys/arch/mips/mips: db_trace.c Log Message: redo much of rev 1.45 and make the _KERNEL path look like it used to before. while it uses less total lines of code and looks less ugly, the merged crash+ddb code here is less correct and harder to follow for the kernel path. To generate a diff of this commit: cvs rdiff -u -r1.46 -r1.47 src/sys/arch/mips/mips/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Sep 26 08:21:27 UTC 2020 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S lock_stubs_ras.S Log Message: Expose the atomicvec vectors via EXPORT_OBJECT so ksyms(4) address lookups can find them. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/mips/lock_stubs_llsc.S cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/mips/lock_stubs_ras.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Sep 26 08:21:10 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Use EXPORT for start and EXPORT_OBJECT for kernel_text instead of by-hand exporting. Using EXPORT_OBJECT for kernel_text also fixes "bt/a" from DDB. To generate a diff of this commit: cvs rdiff -u -r1.225 -r1.226 src/sys/arch/mips/mips/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Sep 26 04:11:48 UTC 2020 Modified Files: src/sys/arch/mips/mips: db_trace.c Log Message: Including once should be sufficient. To generate a diff of this commit: cvs rdiff -u -r1.45 -r1.46 src/sys/arch/mips/mips/db_trace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Thu Sep 24 08:14:08 UTC 2020 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: fix build on non rmx or octeon systems. To generate a diff of this commit: cvs rdiff -u -r1.110 -r1.111 src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Thu Sep 24 03:17:18 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_stacktrace.c Log Message: skip kernel-only code on crash. XXX: we could make verylocore work with a symbol look for crash. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/mips/mips_stacktrace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Thu Sep 24 02:12:01 UTC 2020 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: fix octeon !DDB builds. To generate a diff of this commit: cvs rdiff -u -r1.109 -r1.110 src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Wed Sep 23 09:56:33 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_stacktrace.c Log Message: make !DDB kernels build. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/mips/mips_stacktrace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Thu Sep 10 17:26:38 UTC 2020 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Typo in a comment To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/mips/mips/pmap_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Wed Sep 2 01:33:27 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Octeon CN70XX CPUs have a COP0 config5 register. XXX: The presense of these are defined by the MIPS architecture, should probe. To generate a diff of this commit: cvs rdiff -u -r1.299 -r1.300 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Aug 23 03:21:58 UTC 2020 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Add /v to show only valid TLBs. Align tlb display nicely if > 100 TLBs. Sort commands in the command dispatch function. To generate a diff of this commit: cvs rdiff -u -r1.90 -r1.91 src/sys/arch/mips/mips/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Aug 22 05:52:00 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore_mips1.S Log Message: Change previous LP64 check to n32/n64. To generate a diff of this commit: cvs rdiff -u -r1.94 -r1.95 src/sys/arch/mips/mips/locore_mips1.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Aug 22 05:32:11 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore_mips1.S Log Message: Explicitly #error if this is compiled with _LP64. To generate a diff of this commit: cvs rdiff -u -r1.93 -r1.94 src/sys/arch/mips/mips/locore_mips1.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue Aug 18 11:21:26 UTC 2020 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Remove an extra word from a comment to make it more readable. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/mips/mips/pmap_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Mon Aug 17 21:50:14 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_stacktrace.c Log Message: avoid build failure on !DBB kernels. should fix arc, emips, ews4800mips, mipsco, newsmips and pmax builds. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/mips/mips_stacktrace.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Mon Aug 17 15:22:51 UTC 2020 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Give a hint to what the IPI numbers are, i.e. "(A/R)" meaning active and requested respectively To generate a diff of this commit: cvs rdiff -u -r1.57 -r1.58 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: mrg Date: Mon Aug 17 03:22:13 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: enable dumppcb. To generate a diff of this commit: cvs rdiff -u -r1.298 -r1.299 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Wed Aug 12 08:57:03 UTC 2020 Modified Files: src/sys/arch/mips/mips: genassym.cf Log Message: No need for MIPS_EBASE_CPUNUM now that asm.h supports __BITS To generate a diff of this commit: cvs rdiff -u -r1.70 -r1.71 src/sys/arch/mips/mips/genassym.cf Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sun Aug 9 09:23:17 UTC 2020 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: ONe '#' is enough for a comment To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/mips/mips/spl.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sun Aug 9 08:33:52 UTC 2020 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: This file is only ever used when MULTIPROCESSOR so unifdef MULTIPROCESSOR To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/mips/mips/lock_stubs_llsc.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sun Aug 9 07:09:35 UTC 2020 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Add a comment To generate a diff of this commit: cvs rdiff -u -r1.160 -r1.161 src/sys/arch/mips/mips/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sun Aug 9 06:43:29 UTC 2020 Modified Files: src/sys/arch/mips/mips: syscall.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.49 -r1.50 src/sys/arch/mips/mips/syscall.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sun Aug 2 06:51:47 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Add all the Cavium Networks cpu ids To generate a diff of this commit: cvs rdiff -u -r1.67 -r1.68 src/sys/arch/mips/mips/cache.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sat Aug 1 09:29:18 UTC 2020 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.86 -r1.87 src/sys/arch/mips/mips/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Aug 1 07:09:41 UTC 2020 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: Add a comment to say that an Octeon "sync 4" is "syncw" - sync all writes. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/mips/mips/lock_stubs_llsc.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Sat Aug 1 05:45:30 UTC 2020 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/mips/mips/spl.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Fri Jul 31 20:04:18 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Whitespace / comment alignment To generate a diff of this commit: cvs rdiff -u -r1.224 -r1.225 src/sys/arch/mips/mips/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Fri Jul 31 20:03:20 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.223 -r1.224 src/sys/arch/mips/mips/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Fri Jul 31 08:06:33 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Fix TLB count probe on MIPS32R2+/MIPS64R2+ for CPUs that have a Config4 register with a Config4[MMUExtDef] value. To generate a diff of this commit: cvs rdiff -u -r1.297 -r1.298 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Fri Jul 31 03:07:36 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: CN70XX also has Config6 (CvmMemCtl2) and Config7 (CvmVMConfig) registers. To generate a diff of this commit: cvs rdiff -u -r1.296 -r1.297 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Fri Jul 31 02:58:03 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: CN70XX has a config4 CP0 register. To generate a diff of this commit: cvs rdiff -u -r1.295 -r1.296 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Thu Jul 30 07:31:30 UTC 2020 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Update a comment To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/mips/mips/pmap_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jul 26 07:57:06 UTC 2020 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Rework "machine cp0" command and support macros to use CP0 reg defines instead of magic numbers for CP0 regs with a select number. To generate a diff of this commit: cvs rdiff -u -r1.85 -r1.86 src/sys/arch/mips/mips/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jul 26 07:47:27 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore_octeon.S Log Message: Adjust for new CP0 reg names, comment out most of the Cavium CP0 specific functions that are unused. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/mips/mips/locore_octeon.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: jmcneill Date: Wed Jul 22 15:00:49 UTC 2020 Modified Files: src/sys/arch/mips/mips: ipifuncs.c Log Message: Handle IPI_KPREEMPT To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/mips/mips/ipifuncs.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: jmcneill Date: Mon Jul 20 14:59:57 UTC 2020 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: No need for cpu_hatch_lock after all since we hatch secondaries one at a time To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Mon Jul 20 14:38:38 UTC 2020 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Fix non-MULTIPROCESSOR build To generate a diff of this commit: cvs rdiff -u -r1.53 -r1.54 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: jmcneill Date: Mon Jul 20 14:19:41 UTC 2020 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Serialize CPU hatch annoucement printfs and wait for CPUs to start before returning from cpu_boot_secondary_processors. To generate a diff of this commit: cvs rdiff -u -r1.52 -r1.53 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: skrll Date: Mon Jul 20 10:53:48 UTC 2020 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Move exc_step definition under MIPS64_OCTEON and use it in the zeroising memset as length for correctness. To generate a diff of this commit: cvs rdiff -u -r1.51 -r1.52 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Jul 20 03:26:07 UTC 2020 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Less magic numbers. To generate a diff of this commit: cvs rdiff -u -r1.50 -r1.51 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Jul 20 03:24:59 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore_octeon.S Log Message: Remove check/limit for only 2 cores. Use MIPS_EBASE_CPUNUM instead of magic numbers. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/mips/locore_octeon.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Jul 20 03:23:43 UTC 2020 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Use MIPS_EBASE_CPUNUM instead of magic numbers. To generate a diff of this commit: cvs rdiff -u -r1.222 -r1.223 src/sys/arch/mips/mips/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Jul 20 03:22:39 UTC 2020 Modified Files: src/sys/arch/mips/mips: genassym.cf Log Message: Expose MIPS_EBASE_CPUNUM. To generate a diff of this commit: cvs rdiff -u -r1.69 -r1.70 src/sys/arch/mips/mips/genassym.cf Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jul 19 09:30:08 UTC 2020 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: A little KNF. To generate a diff of this commit: cvs rdiff -u -r1.49 -r1.50 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu Jul 16 13:32:06 UTC 2020 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: Fix variable name for BUS_DMA_DEBUG. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/mips/mips/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Jul 13 12:56:58 UTC 2020 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Make sure declaration of db_mach_reset_cmd() is available always, not just #ifdef OCTEON. To generate a diff of this commit: cvs rdiff -u -r1.84 -r1.85 src/sys/arch/mips/mips/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 28 13:33:06 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Fix mm_md_kernacc() for 64 bit kernels (including n32): - FAULT for any physical address less than start of cached XKPHY address. - Pass any remaining physical address less then end of RAM. - Pass any remaining physical address within the KEGS0 kernel address range. Ignore all remaining addresses and fall back to uvm_kernacc() for checking virtual address ranges. Fixes pmap(1) (and probably other kmem grovellers). To generate a diff of this commit: cvs rdiff -u -r1.293 -r1.294 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu Jun 25 11:48:40 UTC 2020 Modified Files: src/sys/arch/mips/mips: fp.S Log Message: Fix a tyop in a comment. To generate a diff of this commit: cvs rdiff -u -r1.50 -r1.51 src/sys/arch/mips/mips/fp.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu Jun 25 08:00:49 UTC 2020 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: Fix tyop in an acient comment. To generate a diff of this commit: cvs rdiff -u -r1.253 -r1.254 src/sys/arch/mips/mips/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Jun 15 07:55:45 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: KNF- wrap some long lines. To generate a diff of this commit: cvs rdiff -u -r1.292 -r1.293 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Mon Jun 15 00:31:21 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Remove mips32r2 error introduced in previous commit; there no MP support at all for 32-bit MIPSNN kernels. To generate a diff of this commit: cvs rdiff -u -r1.290 -r1.291 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 14 14:45:12 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Revert thinko in previous. To generate a diff of this commit: cvs rdiff -u -r1.289 -r1.290 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 14 14:40:24 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Include room for the trailing NUL in the way name string. To generate a diff of this commit: cvs rdiff -u -r1.288 -r1.289 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: tsutsui Date: Sun Jun 14 14:16:49 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Use 32 byte cacheline ops (not 16 byte ones) for R5000 picache. PR/55138 Commented "I think this is bad copy&paste" from skrll@. No visible regression on Cobalt Qube 2700 (Rm5230) through whole installation using netbsd-9 based Cobalt RestoreCD/USB. To generate a diff of this commit: cvs rdiff -u -r1.66 -r1.67 src/sys/arch/mips/mips/cache.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: tsutsui Date: Sun Jun 14 14:02:39 UTC 2020 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: Fix inconsistent mips_o32, _mips_o32, and __mips_o32 macro. PR/54216 Not sure what the original intention was, but no responce for a year, and no visible regression on Cobalt Qube 2700 (Rm5230) through whole installation using netbsd-9 based Cobalt RestoreCD/USB. To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/mips/mips/bus_dma.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 14 12:58:01 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Support Octeon Cavium cnMIPS I, II and III cores that have various non-standard cache configurations (in terms of following MIPS spec for defining cache configurations). Move (most) Octeon support into a single place. To generate a diff of this commit: cvs rdiff -u -r1.65 -r1.66 src/sys/arch/mips/mips/cache.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 14 12:07:44 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Move some "case 0" statements to be first in their switch statements. To generate a diff of this commit: cvs rdiff -u -r1.64 -r1.65 src/sys/arch/mips/mips/cache.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 14 12:02:07 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Adjust previous - move consolidated debug printfs _after_ core specific overrides, not before them. To generate a diff of this commit: cvs rdiff -u -r1.63 -r1.64 src/sys/arch/mips/mips/cache.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 14 09:55:37 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: Make core specific overrides a bit more readable / scalable (switch instead of if / else / ...). Move debug printfs to after core specific overrides in case any config is updated. To generate a diff of this commit: cvs rdiff -u -r1.62 -r1.63 src/sys/arch/mips/mips/cache.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sun Jun 14 09:41:18 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache.c Log Message: KNF police - long lines and comments. To generate a diff of this commit: cvs rdiff -u -r1.61 -r1.62 src/sys/arch/mips/mips/cache.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Jun 13 14:45:17 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Correct a comment (or at least comment on what we do instead of half of what we do). To generate a diff of this commit: cvs rdiff -u -r1.286 -r1.287 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Jun 13 12:53:42 UTC 2020 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: Add a comment to say that instruction encoding 0x7c03e83b is "rdhwr $3,$29". To generate a diff of this commit: cvs rdiff -u -r1.107 -r1.108 src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Wed Jun 10 01:42:17 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Protect using mipsNN_foo() functions with an #ifdef MIPSNN. Fixes non-MIPSNN kernel compiles pointed out by tsutsui@. To generate a diff of this commit: cvs rdiff -u -r1.284 -r1.285 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue Jun 9 06:18:01 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: If we are on a SiByte or Cavium CPU with an FPU, report as "built-in FPU" instead of saying it's an unknown FPU type. XXX - add any other CPUs to this list? To generate a diff of this commit: cvs rdiff -u -r1.283 -r1.284 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Tue Jun 9 06:01:49 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Dynamically build the wayname strings instead of using a sparse array populated with random N-ways entries. Not only results in smaller code, but also handles cases with 39-way caches without extra work. To generate a diff of this commit: cvs rdiff -u -r1.282 -r1.283 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat Jun 6 14:30:44 UTC 2020 Modified Files: src/sys/arch/mips/mips: cache_octeon.c Log Message: Increase readability by reducing #ifdef using a macro. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/mips/cache_octeon.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Thu Jun 4 15:42:31 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Tidy up some ugly output from mips_page_physload() when a segment starts and finishes in the same page. To generate a diff of this commit: cvs rdiff -u -r1.281 -r1.282 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: tsutsui Date: Sat May 30 04:11:22 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_mcclock_loop.S Log Message: Revert 0(sp) -> CALLFRAME_S0(sp) changes in rev 1.4. 0(sp) is safe here even on O32 because the only callee function mips_cp0_cause_read() doesn't take arguments, but it's caller's responsibility to choose proper stackframe region and the name of CALLFRAME_S0 is just confusing. No binary change. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/mips/mips_mcclock_loop.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat May 23 10:48:44 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Add SiByte SB-1 rev 0x11 cores and CN70xx CPUs to the CPU table. To generate a diff of this commit: cvs rdiff -u -r1.279 -r1.280 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/mips/mips
Module Name:src Committed By: simonb Date: Sat May 23 11:33:56 UTC 2020 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: The Cavium CN70xx PRID covers both the CN70xx and CN71xx CPU families. To generate a diff of this commit: cvs rdiff -u -r1.280 -r1.281 src/sys/arch/mips/mips/mips_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
