CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: skrll
Date: Sun Dec 31 09:45:58 UTC 2023
Modified Files:
src/sys/arch/arm/rockchip: rk_gmac.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/rockchip/rk_gmac.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_gmac.c
diff -u src/sys/arch/arm/rockchip/rk_gmac.c:1.21 src/sys/arch/arm/rockchip/rk_gmac.c:1.22
--- src/sys/arch/arm/rockchip/rk_gmac.c:1.21 Fri Nov 12 22:02:08 2021
+++ src/sys/arch/arm/rockchip/rk_gmac.c Sun Dec 31 09:45:58 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_gmac.c,v 1.21 2021/11/12 22:02:08 jmcneill Exp $ */
+/* $NetBSD: rk_gmac.c,v 1.22 2023/12/31 09:45:58 skrll Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.21 2021/11/12 22:02:08 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.22 2023/12/31 09:45:58 skrll Exp $");
#include
#include
@@ -370,7 +370,7 @@ rk_gmac_setup_clocks(int phandle)
static const char * const clknames[] = {
#if 0
"stmmaceth",
- "mac_clk_rx",
+ "mac_clk_rx",
"mac_clk_tx",
"clk_mac_ref",
"clk_mac_refout",
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: skrll Date: Sun Dec 31 09:45:58 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk_gmac.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/rockchip/rk_gmac.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: skrll Date: Wed Dec 27 07:46:21 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk3399_pcie.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/rk3399_pcie.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk3399_pcie.c diff -u src/sys/arch/arm/rockchip/rk3399_pcie.c:1.20 src/sys/arch/arm/rockchip/rk3399_pcie.c:1.21 --- src/sys/arch/arm/rockchip/rk3399_pcie.c:1.20 Sun Mar 26 19:10:33 2023 +++ src/sys/arch/arm/rockchip/rk3399_pcie.c Wed Dec 27 07:46:20 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: rk3399_pcie.c,v 1.20 2023/03/26 19:10:33 andvar Exp $ */ +/* $NetBSD: rk3399_pcie.c,v 1.21 2023/12/27 07:46:20 skrll Exp $ */ /* * Copyright (c) 2018 Mark Kettenis * @@ -17,7 +17,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.20 2023/03/26 19:10:33 andvar Exp $"); +__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.21 2023/12/27 07:46:20 skrll Exp $"); #include #include @@ -249,7 +249,7 @@ rkpcie_attach(device_t parent, device_t fdtbus_regulator_enable(regulator); fdtbus_regulator_release(regulator); } - + fdtbus_clock_assign(phandle); clock_enable_all(phandle); @@ -301,7 +301,7 @@ again: delay(1000); /* TPERST. use 1ms */ delayed_ms += 1; - + reset_deassert(phandle, "pm"); reset_deassert(phandle, "aclk"); reset_deassert(phandle, "pclk");
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: skrll Date: Wed Dec 27 07:46:21 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk3399_pcie.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/rk3399_pcie.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Oct 17 19:13:05 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk3588_cru.c Log Message: rk3588_cru: fix clock id for BIGCORE1 To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3588_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk3588_cru.c diff -u src/sys/arch/arm/rockchip/rk3588_cru.c:1.1 src/sys/arch/arm/rockchip/rk3588_cru.c:1.2 --- src/sys/arch/arm/rockchip/rk3588_cru.c:1.1 Tue Aug 23 05:39:06 2022 +++ src/sys/arch/arm/rockchip/rk3588_cru.c Tue Oct 17 19:13:05 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: rk3588_cru.c,v 1.1 2022/08/23 05:39:06 ryo Exp $ */ +/* $NetBSD: rk3588_cru.c,v 1.2 2023/10/17 19:13:05 tnn Exp $ */ /*- * Copyright (c) 2022 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: rk3588_cru.c,v 1.1 2022/08/23 05:39:06 ryo Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rk3588_cru.c,v 1.2 2023/10/17 19:13:05 tnn Exp $"); #include #include @@ -636,7 +636,7 @@ static struct rk_cru_clk rk3588_cru_clks CLKSEL_CON(BIGCORE0, 1), /* div1_reg */ __BITS(4,0), /* div1_mask */ armclk_b01_rates), - RK_CPU_CORE2(RK3588_ARMCLK_B01, "armclk_b23", mux_armclkb23_parents, + RK_CPU_CORE2(RK3588_ARMCLK_B23, "armclk_b23", mux_armclkb23_parents, CLKSEL_CON(BIGCORE1, 0), /* reg */ __BITS(7,6), 2, 1, /* mux_mask, mux_main, mux_alt */ CLKSEL_CON(BIGCORE1, 0), /* div0_reg */ @@ -673,7 +673,6 @@ static struct rk_cru_clk rk3588_cru_clks "armclk_b23", CLKGATE_CON(BIGCORE1, 0), 13), - RK_COMPOSITE(RK3588_CLK_50M_SRC, "clk_50m_src", gpll_cpll_parents, CLKSEL_CON(0, 0), __BITS(5,5), __BITS(4,0),
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Oct 17 19:13:05 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk3588_cru.c Log Message: rk3588_cru: fix clock id for BIGCORE1 To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3588_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Oct 17 18:23:55 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk3588_cru.h Log Message: rk3588_cru: sync clock id numbers with mainline Linux The previous constants came from the Rockchip board support package, but we want to be compatible with upstream device tree. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3588_cru.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk3588_cru.h diff -u src/sys/arch/arm/rockchip/rk3588_cru.h:1.1 src/sys/arch/arm/rockchip/rk3588_cru.h:1.2 --- src/sys/arch/arm/rockchip/rk3588_cru.h:1.1 Tue Aug 23 05:39:06 2022 +++ src/sys/arch/arm/rockchip/rk3588_cru.h Tue Oct 17 18:23:55 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: rk3588_cru.h,v 1.1 2022/08/23 05:39:06 ryo Exp $ */ +/* $NetBSD: rk3588_cru.h,v 1.2 2023/10/17 18:23:55 tnn Exp $ */ /*- * Copyright (c) 2022 Ryo Shimizu @@ -28,727 +28,726 @@ #ifndef _RK3588_CRU_H_ #define _RK3588_CRU_H_ -#define RK3588_PLL_B0PLL 1 -#define RK3588_PLL_B1PLL 2 -#define RK3588_PLL_LPLL3 -#define RK3588_PLL_V0PLL 4 -#define RK3588_PLL_AUPLL 5 -#define RK3588_PLL_CPLL6 -#define RK3588_PLL_GPLL7 -#define RK3588_PLL_NPLL8 -#define RK3588_PLL_PPLL9 -#define RK3588_ARMCLK_L10 -#define RK3588_ARMCLK_B01 11 -#define RK3588_ARMCLK_B23 12 -/* 13 */ -/* 14 */ -/* 15 */ -/* 16 */ -/* 17 */ -/* 18 */ -/* 19 */ -#define RK3588_PCLK_BIGCORE0_ROOT 20 -#define RK3588_PCLK_BIGCORE0_PVTM 21 -#define RK3588_PCLK_BIGCORE1_ROOT 22 -#define RK3588_PCLK_BIGCORE1_PVTM 23 -#define RK3588_PCLK_DSU_S_ROOT 24 -#define RK3588_PCLK_DSU_ROOT 25 -#define RK3588_PCLK_DSU_NS_ROOT 26 -#define RK3588_PCLK_LITCORE_PVTM 27 -#define RK3588_PCLK_DBG28 -#define RK3588_PCLK_DSU29 -#define RK3588_PCLK_S_DAPLITE 30 -#define RK3588_PCLK_M_DAPLITE 31 -#define RK3588_MBIST_MCLK_PDM1 32 -#define RK3588_MBIST_CLK_ACDCDIG 33 -#define RK3588_HCLK_I2S2_2CH 34 -#define RK3588_HCLK_I2S3_2CH 35 -#define RK3588_CLK_I2S2_2CH_SRC 36 -#define RK3588_CLK_I2S2_2CH_FRAC 37 -#define RK3588_CLK_I2S2_2CH 38 -#define RK3588_MCLK_I2S2_2CH 39 -#define RK3588_I2S2_2CH_MCLKOUT 40 -#define RK3588_CLK_DAC_ACDCDIG 41 -#define RK3588_CLK_I2S3_2CH_SRC 42 -#define RK3588_CLK_I2S3_2CH_FRAC 43 -#define RK3588_CLK_I2S3_2CH 44 -#define RK3588_MCLK_I2S3_2CH 45 -#define RK3588_I2S3_2CH_MCLKOUT 46 -#define RK3588_PCLK_ACDCDIG 47 -#define RK3588_HCLK_I2S0_8CH 48 -#define RK3588_CLK_I2S0_8CH_TX_SRC 49 -#define RK3588_CLK_I2S0_8CH_TX_FRAC 50 -#define RK3588_MCLK_I2S0_8CH_TX 51 -#define RK3588_CLK_I2S0_8CH_TX 52 -#define RK3588_CLK_I2S0_8CH_RX_SRC 53 -#define RK3588_CLK_I2S0_8CH_RX_FRAC 54 -#define RK3588_MCLK_I2S0_8CH_RX 55 -#define RK3588_CLK_I2S0_8CH_RX 56 -#define RK3588_I2S0_8CH_MCLKOUT 57 -#define RK3588_HCLK_PDM1 58 -#define RK3588_MCLK_PDM1 59 -#define RK3588_HCLK_AUDIO_ROOT 60 -#define RK3588_PCLK_AUDIO_ROOT 61 -#define RK3588_HCLK_SPDIF0 62 -#define RK3588_CLK_SPDIF0_SRC 63 -#define RK3588_CLK_SPDIF0_FRAC 64 -#define RK3588_MCLK_SPDIF0 65 -#define RK3588_CLK_SPDIF0 66 -#define RK3588_CLK_SPDIF1 67 -#define RK3588_HCLK_SPDIF1 68 -#define RK3588_CLK_SPDIF1_SRC 69 -#define RK3588_CLK_SPDIF1_FRAC 70 -#define RK3588_MCLK_SPDIF1 71 -#define RK3588_ACLK_AV1_ROOT 72 -#define RK3588_ACLK_AV173 -#define RK3588_PCLK_AV1_ROOT 74 -#define RK3588_PCLK_AV175 -#define RK3588_PCLK_MAILBOX0 76 -#define RK3588_PCLK_MAILBOX1 77 -#define RK3588_PCLK_MAILBOX2 78 -#define RK3588_PCLK_PMU2 79 -#define RK3588_PCLK_PMUCM0_INTMUX 80 -#define RK3588_PCLK_DDRCM0_INTMUX 81 -#define RK3588_PCLK_TOP82 -#define RK3588_PCLK_PWM1 83 -#define RK3588_CLK_PWM184 -#define RK3588_CLK_PWM1_CAPTURE 85 -#define RK3588_PCLK_PWM2 86 -#define RK3588_CLK_PWM287 -#define RK3588_CLK_PWM2_CAPTURE 88 -#define RK3588_PCLK_PWM3 89 -#define RK3588_CLK_PWM390 -#define RK3588_CLK_PWM3_CAPTURE 91 -#define RK3588_PCLK_BUSTIMER0 92 -#define RK3588_PCLK_BUSTIMER1 93 -#define RK3588_CLK_BUS_TIMER_ROOT 94 -#define RK3588_CLK_BUSTIMER0 95 -#define RK3588_CLK_BUSTIMER1 96 -#define RK3588_CLK_BUSTIMER2 97 -#define RK3588_CLK_BUSTIMER3 98 -#define RK3588_CLK_BUSTIMER4 99 -#define RK3588_CLK_BUSTIMER5 100 -#define RK3588_CLK_BUSTIMER6 101 -#define RK3588_CLK_BUSTIMER7 102 -#define RK3588_CLK_BUSTIMER8 103 -#define RK3588_CLK_BUSTIMER9 104 -#define RK3588_CLK_BUSTIMER10 105 -#define RK3588_CLK_BUSTIMER11 106 -#define RK3588_PCLK_WDT0 107 -#define RK3588_TCLK_WDT0 108 -/* 109 */ -/* 110 */ -#define RK3588_PCLK_CAN0 111 -#define RK3588_CLK_CAN0112 -#define RK3588_PCLK_CAN1 113 -#define RK3588_CLK_CAN1114 -#define RK3588_PCLK_CAN2 115 -#define RK3588_CLK_CAN2116 -#define RK3588_ACLK_DECOM 117 -#define RK3588_PCLK_DECOM 118 -#de
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Oct 17 18:23:55 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk3588_cru.h Log Message: rk3588_cru: sync clock id numbers with mainline Linux The previous constants came from the Rockchip board support package, but we want to be compatible with upstream device tree. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3588_cru.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: tnn
Date: Tue Oct 17 17:31:12 UTC 2023
Modified Files:
src/sys/arch/arm/rockchip: rk_gpio.c
Log Message:
rk_gpio: add support for version 2 controller
Based on PR 57597 from Johann Rudloff.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_gpio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_gpio.c
diff -u src/sys/arch/arm/rockchip/rk_gpio.c:1.6 src/sys/arch/arm/rockchip/rk_gpio.c:1.7
--- src/sys/arch/arm/rockchip/rk_gpio.c:1.6 Tue Oct 17 15:09:18 2023
+++ src/sys/arch/arm/rockchip/rk_gpio.c Tue Oct 17 17:31:12 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_gpio.c,v 1.6 2023/10/17 15:09:18 tnn Exp $ */
+/* $NetBSD: rk_gpio.c,v 1.7 2023/10/17 17:31:12 tnn Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_gpio.c,v 1.6 2023/10/17 15:09:18 tnn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_gpio.c,v 1.7 2023/10/17 17:31:12 tnn Exp $");
#include
#include
@@ -55,6 +55,26 @@ __KERNEL_RCSID(0, "$NetBSD: rk_gpio.c,v
#define GPIO_PORTA_EOI_REG 0x004c
#define GPIO_EXT_PORTA_REG 0x0050
#define GPIO_LS_SYNC_REG 0x0060
+#define GPIO_VER_ID_REG 0x0078
+#define GPIO_VER_ID_GPIOV2 0x0101157c
+
+/*
+ * In "version 2" GPIO controllers, half of each register is used by the
+ * write_enable mask, so the 32 pins are spread over two registers.
+ *
+ * pins 0 - 15 go into the GPIO_SWPORT_*_L register
+ * pins 16 - 31 go into the GPIO_SWPORT_*_H register
+ */
+#define GPIOV2_SWPORT_DR_BASE 0x
+#define GPIOV2_SWPORT_DR_REG(pin) \
+ (GPIOV2_SWPORT_DR_BASE + GPIOV2_REG_OFFSET(pin))
+#define GPIOV2_SWPORT_DDR_BASE 0x0008
+#define GPIOV2_SWPORT_DDR_REG(pin) \
+ (GPIOV2_SWPORT_DDR_BASE + GPIOV2_REG_OFFSET(pin))
+#define GPIOV2_EXT_PORT_REG 0x0070
+#define GPIOV2_REG_OFFSET(pin) (((pin) >> 4) << 2)
+#define GPIOV2_DATA_MASK(pin) (__BIT((pin) & 0xF))
+#define GPIOV2_WRITE_MASK(pin) (__BIT(((pin) & 0xF) | 0x10))
static const struct device_compatible_entry compat_data[] = {
{ .compat = "rockchip,gpio-bank" },
@@ -223,18 +243,58 @@ rk_gpio_pin_ctl(void *priv, int pin, int
mutex_exit(&sc->sc_lock);
}
+static int
+rk_gpio_v2_pin_read(void *priv, int pin)
+{
+ struct rk_gpio_softc * const sc = priv;
+ uint32_t data;
+ int val;
+
+ KASSERT(pin < __arraycount(sc->sc_pins));
+
+ const uint32_t data_mask = __BIT(pin);
+
+ /* No lock required for reads */
+ data = RD4(sc, GPIOV2_EXT_PORT_REG);
+ val = __SHIFTOUT(data, data_mask);
+
+ return val;
+}
+
+static void
+rk_gpio_v2_pin_write(void *priv, int pin, int val)
+{
+ struct rk_gpio_softc * const sc = priv;
+ uint32_t data;
+
+ KASSERT(pin < __arraycount(sc->sc_pins));
+
+ const uint32_t write_mask = GPIOV2_WRITE_MASK(pin);
+
+ /* No lock required for writes on v2 controllers */
+ data = val ? GPIOV2_DATA_MASK(pin) : 0;
+ WR4(sc, GPIOV2_SWPORT_DR_REG(pin), write_mask | data);
+}
+
+static void
+rk_gpio_v2_pin_ctl(void *priv, int pin, int flags)
+{
+ struct rk_gpio_softc * const sc = priv;
+ uint32_t ddr;
+
+ KASSERT(pin < __arraycount(sc->sc_pins));
+
+ /* No lock required for writes on v2 controllers */
+ ddr = (flags & GPIO_PIN_OUTPUT) ? GPIOV2_DATA_MASK(pin) : 0;
+ WR4(sc, GPIOV2_SWPORT_DDR_REG(pin), GPIOV2_WRITE_MASK(pin) | ddr);
+}
+
static void
rk_gpio_attach_ports(struct rk_gpio_softc *sc)
{
- struct gpio_chipset_tag *gp = &sc->sc_gp;
struct gpiobus_attach_args gba;
u_int pin;
- gp->gp_cookie = sc;
- gp->gp_pin_read = rk_gpio_pin_read;
- gp->gp_pin_write = rk_gpio_pin_write;
- gp->gp_pin_ctl = rk_gpio_pin_ctl;
-
for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) {
sc->sc_pins[pin].pin_num = pin;
sc->sc_pins[pin].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
@@ -242,7 +302,7 @@ rk_gpio_attach_ports(struct rk_gpio_soft
}
memset(&gba, 0, sizeof(gba));
- gba.gba_gc = gp;
+ gba.gba_gc = &sc->sc_gp;
gba.gba_pins = sc->sc_pins;
gba.gba_npins = __arraycount(sc->sc_pins);
sc->sc_gpiodev = config_found(sc->sc_dev, &gba, NULL, CFARGS_NONE);
@@ -260,11 +320,14 @@ static void
rk_gpio_attach(device_t parent, device_t self, void *aux)
{
struct rk_gpio_softc * const sc = device_private(self);
+ struct gpio_chipset_tag * const gp = &sc->sc_gp;
struct fdt_attach_args * const faa = aux;
const int phandle = faa->faa_phandle;
struct clk *clk;
bus_addr_t addr;
bus_size_t size;
+ uint32_t ver_id;
+ int ver;
if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
aprint_error(": couldn't get registers\n");
@@ -282,10 +345,31 @@ rk_gpio_attach(device_t parent, device_t
aprint_error(": couldn't map registers\n");
return;
}
+
+ gp->gp_cookie = sc;
+ ver_id = RD4(sc, GPIO_VER_ID_REG);
+ switch (ver_id) {
+ case 0: /* VER_ID not implemented in v1 but reads back as 0 */
+ ver = 1;
+ gp->gp_pin_read = rk_gpio_pin_read;
+ gp->gp_pin_write = rk_gpio_pin_write
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Oct 17 17:31:12 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk_gpio.c Log Message: rk_gpio: add support for version 2 controller Based on PR 57597 from Johann Rudloff. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_gpio.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Oct 17 15:09:18 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk_gpio.c Log Message: rk_gpio: de-duplicate some code from the fdtbus accessors Make fdtbus accessors implementation agnostic and use the chipset tag to call into implementation code. This makes it easy to populate the chipset tag with alternate implementation needed for v2 controllers. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_gpio.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: tnn
Date: Tue Oct 17 15:09:18 UTC 2023
Modified Files:
src/sys/arch/arm/rockchip: rk_gpio.c
Log Message:
rk_gpio: de-duplicate some code from the fdtbus accessors
Make fdtbus accessors implementation agnostic and use the chipset tag
to call into implementation code. This makes it easy to populate the
chipset tag with alternate implementation needed for v2 controllers.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_gpio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_gpio.c
diff -u src/sys/arch/arm/rockchip/rk_gpio.c:1.5 src/sys/arch/arm/rockchip/rk_gpio.c:1.6
--- src/sys/arch/arm/rockchip/rk_gpio.c:1.5 Sat Aug 7 16:18:45 2021
+++ src/sys/arch/arm/rockchip/rk_gpio.c Tue Oct 17 15:09:18 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_gpio.c,v 1.5 2021/08/07 16:18:45 thorpej Exp $ */
+/* $NetBSD: rk_gpio.c,v 1.6 2023/10/17 15:09:18 tnn Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_gpio.c,v 1.5 2021/08/07 16:18:45 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_gpio.c,v 1.6 2023/10/17 15:09:18 tnn Exp $");
#include
#include
@@ -90,30 +90,12 @@ static void rk_gpio_attach(device_t, dev
CFATTACH_DECL_NEW(rk_gpio, sizeof(struct rk_gpio_softc),
rk_gpio_match, rk_gpio_attach, NULL, NULL);
-static int
-rk_gpio_ctl(struct rk_gpio_softc *sc, u_int pin, int flags)
-{
- uint32_t ddr;
-
- KASSERT(mutex_owned(&sc->sc_lock));
-
- ddr = RD4(sc, GPIO_SWPORTA_DDR_REG);
- if (flags & GPIO_PIN_INPUT)
- ddr &= ~__BIT(pin);
- else if (flags & GPIO_PIN_OUTPUT)
- ddr |= __BIT(pin);
- WR4(sc, GPIO_SWPORTA_DDR_REG, ddr);
-
- return 0;
-}
-
static void *
rk_gpio_acquire(device_t dev, const void *data, size_t len, int flags)
{
struct rk_gpio_softc * const sc = device_private(dev);
struct rk_gpio_pin *gpin;
const u_int *gpio = data;
- int error;
if (len != 12)
return NULL;
@@ -124,12 +106,7 @@ rk_gpio_acquire(device_t dev, const void
if (pin >= __arraycount(sc->sc_pins))
return NULL;
- mutex_enter(&sc->sc_lock);
- error = rk_gpio_ctl(sc, pin, flags);
- mutex_exit(&sc->sc_lock);
-
- if (error != 0)
- return NULL;
+ sc->sc_gp.gp_pin_ctl(sc, pin, flags);
gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP);
gpin->pin_sc = sc;
@@ -146,9 +123,9 @@ rk_gpio_release(device_t dev, void *priv
struct rk_gpio_softc * const sc = device_private(dev);
struct rk_gpio_pin *pin = priv;
- mutex_enter(&sc->sc_lock);
- rk_gpio_ctl(pin->pin_sc, pin->pin_nr, GPIO_PIN_INPUT);
- mutex_exit(&sc->sc_lock);
+ KASSERT(sc == pin->pin_sc);
+
+ sc->sc_gp.gp_pin_ctl(sc, pin->pin_nr, GPIO_PIN_INPUT);
kmem_free(pin, sizeof(*pin));
}
@@ -158,16 +135,11 @@ rk_gpio_read(device_t dev, void *priv, b
{
struct rk_gpio_softc * const sc = device_private(dev);
struct rk_gpio_pin *pin = priv;
- uint32_t data;
int val;
KASSERT(sc == pin->pin_sc);
- const uint32_t data_mask = __BIT(pin->pin_nr);
-
- /* No lock required for reads */
- data = RD4(sc, GPIO_EXT_PORTA_REG);
- val = __SHIFTOUT(data, data_mask);
+ val = sc->sc_gp.gp_pin_read(sc, pin->pin_nr);
if (!raw && pin->pin_actlo)
val = !val;
@@ -179,23 +151,13 @@ rk_gpio_write(device_t dev, void *priv,
{
struct rk_gpio_softc * const sc = device_private(dev);
struct rk_gpio_pin *pin = priv;
- uint32_t data;
KASSERT(sc == pin->pin_sc);
- const uint32_t data_mask = __BIT(pin->pin_nr);
-
if (!raw && pin->pin_actlo)
val = !val;
- mutex_enter(&sc->sc_lock);
- data = RD4(sc, GPIO_SWPORTA_DR_REG);
- if (val)
- data |= data_mask;
- else
- data &= ~data_mask;
- WR4(sc, GPIO_SWPORTA_DR_REG, data);
- mutex_exit(&sc->sc_lock);
+ sc->sc_gp.gp_pin_write(sc, pin->pin_nr, val);
}
static struct fdtbus_gpio_controller_func rk_gpio_funcs = {
@@ -247,11 +209,17 @@ static void
rk_gpio_pin_ctl(void *priv, int pin, int flags)
{
struct rk_gpio_softc * const sc = priv;
+ uint32_t ddr;
KASSERT(pin < __arraycount(sc->sc_pins));
mutex_enter(&sc->sc_lock);
- rk_gpio_ctl(sc, pin, flags);
+ ddr = RD4(sc, GPIO_SWPORTA_DDR_REG);
+ if (flags & GPIO_PIN_INPUT)
+ ddr &= ~__BIT(pin);
+ else if (flags & GPIO_PIN_OUTPUT)
+ ddr |= __BIT(pin);
+ WR4(sc, GPIO_SWPORTA_DDR_REG, ddr);
mutex_exit(&sc->sc_lock);
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Tue Apr 11 08:40:20 UTC 2023
Modified Files:
src/sys/arch/arm/rockchip: rk_dwhdmi.c
Log Message:
arm/rockchip: Omit needless functions.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/rockchip/rk_dwhdmi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_dwhdmi.c
diff -u src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.7 src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.8
--- src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.7 Sun Dec 19 11:01:10 2021
+++ src/sys/arch/arm/rockchip/rk_dwhdmi.c Tue Apr 11 08:40:19 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_dwhdmi.c,v 1.7 2021/12/19 11:01:10 riastradh Exp $ */
+/* $NetBSD: rk_dwhdmi.c,v 1.8 2023/04/11 08:40:19 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_dwhdmi.c,v 1.7 2021/12/19 11:01:10 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_dwhdmi.c,v 1.8 2023/04/11 08:40:19 riastradh Exp $");
#include
#include
@@ -106,54 +106,21 @@ rk_dwhdmi_select_input(struct rk_dwhdmi_
syscon_unlock(sc->sc_grf);
}
-static bool
-rk_dwhdmi_encoder_mode_fixup(struct drm_encoder *encoder,
-const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode)
-{
- return true;
-}
-
-static void
-rk_dwhdmi_encoder_mode_set(struct drm_encoder *encoder,
-struct drm_display_mode *mode, struct drm_display_mode *adjusted)
-{
-}
-
static void
rk_dwhdmi_encoder_enable(struct drm_encoder *encoder)
{
-}
-
-static void
-rk_dwhdmi_encoder_disable(struct drm_encoder *encoder)
-{
-}
-
-static void
-rk_dwhdmi_encoder_prepare(struct drm_encoder *encoder)
-{
struct rk_dwhdmi_softc * const sc = to_rk_dwhdmi_encoder(encoder);
const u_int crtc_index = drm_crtc_index(encoder->crtc);
rk_dwhdmi_select_input(sc, crtc_index);
}
-static void
-rk_dwhdmi_encoder_commit(struct drm_encoder *encoder)
-{
-}
-
static const struct drm_encoder_funcs rk_dwhdmi_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
static const struct drm_encoder_helper_funcs rk_dwhdmi_encoder_helper_funcs = {
- .prepare = rk_dwhdmi_encoder_prepare,
- .mode_fixup = rk_dwhdmi_encoder_mode_fixup,
- .mode_set = rk_dwhdmi_encoder_mode_set,
.enable = rk_dwhdmi_encoder_enable,
- .disable = rk_dwhdmi_encoder_disable,
- .commit = rk_dwhdmi_encoder_commit,
};
static int
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Tue Apr 11 08:40:20 UTC 2023 Modified Files: src/sys/arch/arm/rockchip: rk_dwhdmi.c Log Message: arm/rockchip: Omit needless functions. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/rockchip/rk_dwhdmi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: yamt Date: Sat Nov 19 09:17:57 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: files.rockchip Log Message: arm/rockchip: fix build w/o MULTIPROCESSOR To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/rockchip/files.rockchip Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/files.rockchip diff -u src/sys/arch/arm/rockchip/files.rockchip:1.28 src/sys/arch/arm/rockchip/files.rockchip:1.29 --- src/sys/arch/arm/rockchip/files.rockchip:1.28 Tue Aug 23 05:40:46 2022 +++ src/sys/arch/arm/rockchip/files.rockchip Sat Nov 19 09:17:57 2022 @@ -1,4 +1,4 @@ -# $NetBSD: files.rockchip,v 1.28 2022/08/23 05:40:46 ryo Exp $ +# $NetBSD: files.rockchip,v 1.29 2022/11/19 09:17:57 yamt Exp $ # # Configuration info for Rockchip family SoCs # @@ -6,7 +6,7 @@ file arch/arm/rockchip/rk_platform.c soc_rockchip -file arch/arm/rockchip/rk3066_smp.c soc_rk3288 +file arch/arm/rockchip/rk3066_smp.c soc_rk3288 & multiprocessor # Clock and reset unit (CRU) device rkcru: rk_cru
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: yamt Date: Sat Nov 19 09:17:57 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: files.rockchip Log Message: arm/rockchip: fix build w/o MULTIPROCESSOR To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/rockchip/files.rockchip Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sun Oct 30 23:10:43 UTC 2022
Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c
Log Message:
Remove dirty fb IOCTL callback introduced in latest drm update.
Not sure how this got here, but the rkdrm driver does not need to do
damage tracking as it uses Normal-NC (uncached) mappings.
PR# port-arm/56596
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/rk_drm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.20 src/sys/arch/arm/rockchip/rk_drm.c:1.21
--- src/sys/arch/arm/rockchip/rk_drm.c:1.20 Sun Sep 25 07:50:15 2022
+++ src/sys/arch/arm/rockchip/rk_drm.c Sun Oct 30 23:10:43 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $ */
+/* $NetBSD: rk_drm.c,v 1.21 2022/10/30 23:10:43 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.21 2022/10/30 23:10:43 jmcneill Exp $");
#include
#include
@@ -255,7 +255,6 @@ rk_drm_fb_destroy(struct drm_framebuffer
static const struct drm_framebuffer_funcs rk_drm_framebuffer_funcs = {
.create_handle = rk_drm_fb_create_handle,
.destroy = rk_drm_fb_destroy,
- .dirty = drm_atomic_helper_dirtyfb,
};
static struct drm_framebuffer *
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sun Oct 30 23:10:43 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: Remove dirty fb IOCTL callback introduced in latest drm update. Not sure how this got here, but the rkdrm driver does not need to do damage tracking as it uses Normal-NC (uncached) mappings. PR# port-arm/56596 To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Sun Sep 25 07:50:15 UTC 2022
Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c rk_fb.c
Log Message:
rkdrm: Set is_console on the drm device, not the fb child.
The drm device is represented by a rockchip,display-subsystem node in
the device tree. The fb child is a purely software abstraction used
by drm.
The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/rockchip/rk_drm.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_fb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.19 src/sys/arch/arm/rockchip/rk_drm.c:1.20
--- src/sys/arch/arm/rockchip/rk_drm.c:1.19 Thu Apr 21 21:22:25 2022
+++ src/sys/arch/arm/rockchip/rk_drm.c Sun Sep 25 07:50:15 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.c,v 1.19 2022/04/21 21:22:25 andvar Exp $ */
+/* $NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.19 2022/04/21 21:22:25 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $");
#include
#include
@@ -133,6 +133,11 @@ rk_drm_attach(device_t parent, device_t
aprint_normal("\n");
+#ifdef WSDISPLAY_MULTICONS
+ const bool is_console = true;
+ prop_dictionary_set_bool(dict, "is_console", is_console);
+#endif
+
sc->sc_dev = self;
sc->sc_dmat = faa->faa_dmat;
sc->sc_bst = faa->faa_bst;
Index: src/sys/arch/arm/rockchip/rk_fb.c
diff -u src/sys/arch/arm/rockchip/rk_fb.c:1.6 src/sys/arch/arm/rockchip/rk_fb.c:1.7
--- src/sys/arch/arm/rockchip/rk_fb.c:1.6 Sun Dec 19 12:45:19 2021
+++ src/sys/arch/arm/rockchip/rk_fb.c Sun Sep 25 07:50:15 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_fb.c,v 1.6 2021/12/19 12:45:19 riastradh Exp $ */
+/* $NetBSD: rk_fb.c,v 1.7 2022/09/25 07:50:15 riastradh Exp $ */
/*-
* Copyright (c) 2015-2019 Jared McNeill
@@ -29,7 +29,7 @@
#include "opt_wsdisplay_compat.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.6 2021/12/19 12:45:19 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.7 2022/09/25 07:50:15 riastradh Exp $");
#include
#include
@@ -88,12 +88,6 @@ rk_fb_attach(device_t parent, device_t s
aprint_naive("\n");
aprint_normal("\n");
-#ifdef WSDISPLAY_MULTICONS
- prop_dictionary_t dict = device_properties(self);
- const bool is_console = true;
- prop_dictionary_set_bool(dict, "is_console", is_console);
-#endif
-
rk_task_init(&sc->sc_attach_task, &rk_fb_init);
rk_task_schedule(parent, &sc->sc_attach_task);
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Sep 25 07:50:15 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c rk_fb.c Log Message: rkdrm: Set is_console on the drm device, not the fb child. The drm device is represented by a rockchip,display-subsystem node in the device tree. The fb child is a purely software abstraction used by drm. The is_console property is used by MD firmware logic to mark which actual device in hardware bus enumeration like PCI or FDT the system has chosen for the console early at boot, so hanging it on the node for the real hardware device makes more sense than hanging it on the software abstraction, and is consistent with recent changes to drmfb to respect its setting on other platforms for hardware devices. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/rockchip/rk_drm.c cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_fb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: ryo
Date: Sun Sep 18 21:33:57 UTC 2022
Modified Files:
src/sys/arch/arm/rockchip: rk_cru.c
Log Message:
KNF. 80 columns, use tab. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_cru.c
diff -u src/sys/arch/arm/rockchip/rk_cru.c:1.9 src/sys/arch/arm/rockchip/rk_cru.c:1.10
--- src/sys/arch/arm/rockchip/rk_cru.c:1.9 Sat Nov 17 16:51:51 2018
+++ src/sys/arch/arm/rockchip/rk_cru.c Sun Sep 18 21:33:57 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru.c,v 1.9 2018/11/17 16:51:51 jakllsch Exp $ */
+/* $NetBSD: rk_cru.c,v 1.10 2022/09/18 21:33:57 ryo Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -30,7 +30,7 @@
#include "opt_console.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_cru.c,v 1.9 2018/11/17 16:51:51 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_cru.c,v 1.10 2022/09/18 21:33:57 ryo Exp $");
#include
#include
@@ -144,7 +144,8 @@ rk_cru_clock_get_rate(void *priv, struct
clkp_parent = clk_get_parent(clkp);
if (clkp_parent == NULL) {
- aprint_debug("%s: no parent for %s\n", __func__, clk->base.name);
+ aprint_debug("%s: no parent for %s\n", __func__,
+ clk->base.name);
return 0;
}
@@ -161,7 +162,8 @@ rk_cru_clock_set_rate(void *priv, struct
if (clkp->flags & CLK_SET_RATE_PARENT) {
clkp_parent = clk_get_parent(clkp);
if (clkp_parent == NULL) {
- aprint_error("%s: no parent for %s\n", __func__, clk->base.name);
+ aprint_error("%s: no parent for %s\n", __func__,
+ clk->base.name);
return ENXIO;
}
return clk_set_rate(clkp_parent, rate);
@@ -183,7 +185,8 @@ rk_cru_clock_round_rate(void *priv, stru
if (clkp->flags & CLK_SET_RATE_PARENT) {
clkp_parent = clk_get_parent(clkp);
if (clkp_parent == NULL) {
- aprint_error("%s: no parent for %s\n", __func__, clk->base.name);
+ aprint_error("%s: no parent for %s\n", __func__,
+ clk->base.name);
return 0;
}
return clk_round_rate(clkp_parent, rate);
@@ -230,8 +233,7 @@ rk_cru_clock_disable(void *priv, struct
}
static int
-rk_cru_clock_set_parent(void *priv, struct clk *clkp,
-struct clk *clkp_parent)
+rk_cru_clock_set_parent(void *priv, struct clk *clkp, struct clk *clkp_parent)
{
struct rk_cru_softc * const sc = priv;
struct rk_cru_clk *clk = (struct rk_cru_clk *)clkp;
@@ -298,7 +300,8 @@ rk_cru_attach(struct rk_cru_softc *sc)
int i;
if (of_hasprop(sc->sc_phandle, "rockchip,grf")) {
- sc->sc_grf = fdtbus_syscon_acquire(sc->sc_phandle, "rockchip,grf");
+ sc->sc_grf = fdtbus_syscon_acquire(sc->sc_phandle,
+ "rockchip,grf");
if (sc->sc_grf == NULL) {
aprint_error(": couldn't get grf syscon\n");
return ENXIO;
@@ -355,13 +358,13 @@ rk_cru_print(struct rk_cru_softc *sc)
default: type = "???"; break;
}
- aprint_debug_dev(sc->sc_dev,
+ aprint_debug_dev(sc->sc_dev,
"%3d %-14s %2s %-14s %-7s ",
clk->id,
- clk->base.name,
- clkp_parent ? "<-" : "",
- clkp_parent ? clkp_parent->name : "",
- type);
+ clk->base.name,
+ clkp_parent ? "<-" : "",
+ clkp_parent ? clkp_parent->name : "",
+ type);
aprint_debug("%10d Hz\n", clk_get_rate(&clk->base));
}
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: ryo Date: Sun Sep 18 21:33:57 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: rk_cru.c Log Message: KNF. 80 columns, use tab. NFC. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: ryo
Date: Tue Aug 23 05:33:39 UTC 2022
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_arm.c
Log Message:
- change struct rk_cru_arm and RK_CPU macros to allow mux and div registers to
be specified independently.
Allow more div-regs to be specified in the future.
- commonize RK*_PLL() macro.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/rockchip/rk3399_cru.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_cru.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk_cru_arm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.24 src/sys/arch/arm/rockchip/rk3399_cru.c:1.25
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.24 Tue Aug 23 05:32:18 2022
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Tue Aug 23 05:33:39 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.24 2022/08/23 05:32:18 ryo Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.25 2022/08/23 05:33:39 ryo Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.24 2022/08/23 05:32:18 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.25 2022/08/23 05:33:39 ryo Exp $");
#include
#include
@@ -440,8 +440,9 @@ static struct rk_cru_clk rk3399_cru_clks
RK_GATE(0, "clk_core_l_gpll_src", "gpll", CLKGATE_CON(0), 3),
RK_CPU(RK3399_ARMCLKL, "armclkl", armclkl_parents,
- CLKSEL_CON(0), /* reg */
+ CLKSEL_CON(0), /* mux_reg */
__BITS(7,6), 0, 3, /* mux_mask, mux_main, mux_alt */
+ CLKSEL_CON(0), /* div_reg */
__BITS(4,0), /* div_mask */
armclkl_rates),
@@ -451,8 +452,9 @@ static struct rk_cru_clk rk3399_cru_clks
RK_GATE(0, "clk_core_b_gpll_src", "gpll", CLKGATE_CON(1), 3),
RK_CPU(RK3399_ARMCLKB, "armclkb", armclkb_parents,
- CLKSEL_CON(2), /* reg */
+ CLKSEL_CON(2), /* mux_reg */
__BITS(7,6), 1, 3, /* mux_mask, mux_main, mux_alt */
+ CLKSEL_CON(2), /* div_reg */
__BITS(4,0), /* div_mask */
armclkb_rates),
Index: src/sys/arch/arm/rockchip/rk_cru.h
diff -u src/sys/arch/arm/rockchip/rk_cru.h:1.9 src/sys/arch/arm/rockchip/rk_cru.h:1.10
--- src/sys/arch/arm/rockchip/rk_cru.h:1.9 Tue Aug 23 05:32:18 2022
+++ src/sys/arch/arm/rockchip/rk_cru.h Tue Aug 23 05:33:39 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru.h,v 1.9 2022/08/23 05:32:18 ryo Exp $ */
+/* $NetBSD: rk_cru.h,v 1.10 2022/08/23 05:33:39 ryo Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -88,7 +88,7 @@ u_int rk_cru_pll_get_rate(struct rk_cru_
int rk_cru_pll_set_rate(struct rk_cru_softc *, struct rk_cru_clk *, u_int);
const char *rk_cru_pll_get_parent(struct rk_cru_softc *, struct rk_cru_clk *);
-#define RK_PLL(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates) \
+#define RK_PLL_FLAGS(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates, _flags) \
{ \
.id = (_id), \
.type = RK_CRU_PLL,\
@@ -102,31 +102,17 @@ const char *rk_cru_pll_get_parent(struct
.u.pll.lock_mask = (_lock_mask), \
.u.pll.rates = (_rates), \
.u.pll.nrates = __arraycount(_rates), \
- .u.pll.flags = 0,\
+ .u.pll.flags = _flags,\
.get_rate = rk_cru_pll_get_rate, \
.set_rate = rk_cru_pll_set_rate, \
.get_parent = rk_cru_pll_get_parent, \
}
+#define RK_PLL(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates) \
+ RK_PLL_FLAGS(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates, 0)
+
#define RK3288_PLL(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates) \
- { \
- .id = (_id), \
- .type = RK_CRU_PLL,\
- .base.name = (_name),\
- .base.flags = 0,\
- .u.pll.parents = (_parents), \
- .u.pll.nparents = __arraycount(_parents), \
- .u.pll.con_base = (_con_base), \
- .u.pll.mode_reg = (_mode_reg), \
- .u.pll.mode_mask = (_mode_mask), \
- .u.pll.lock_mask = (_lock_mask), \
- .u.pll.rates = (_rates), \
- .u.pll.nrates = __arraycount(_rates), \
- .u.pll.flags = RK_PLL_RK3288, \
- .get_rate = rk_cru_pll_get_rate, \
- .set_rate = rk_cru_pll_set_rate, \
- .get_parent = rk_cru_pll_get_parent, \
- }
+ RK_PLL_FLAGS(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates, RK_PLL_RK3288)
/* ARM clocks */
@@ -152,12 +138,17 @@ struct rk_cru_cpu_rate {
struct rk_regmaskval divs[2];
};
-struct rk_cru_arm {
+struct rk_regmask {
bus_size_t reg;
+ uint32_t mask;
+};
+
+struct rk_cru_arm {
+ bus_size_t mux_reg;
uint32_t mux_mask;
u_int mux_main;
u_int mux_alt;
- uint32_t div_mask;
+ struct rk_regmask divs[1];
const char **parents;
u_int nparents;
const struct rk_cru_arm_rate *rates;
@@ -179,11 +170,12 @@ int rk_
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: ryo Date: Tue Aug 23 05:33:39 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_arm.c Log Message: - change struct rk_cru_arm and RK_CPU macros to allow mux and div registers to be specified independently. Allow more div-regs to be specified in the future. - commonize RK*_PLL() macro. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/rockchip/rk3399_cru.c cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_cru.h cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk_cru_arm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: ryo
Date: Tue Aug 23 05:32:18 UTC 2022
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_arm.c
Log Message:
Make .reg1 and .reg2 of struct rk_cru_cpu_rate into array, and change the type
of those to bus_size_t and uint32_t.
Array size may increase in the future.
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/rockchip/rk3399_cru.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/rockchip/rk_cru.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk_cru_arm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.23 src/sys/arch/arm/rockchip/rk3399_cru.c:1.24
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.23 Fri Nov 12 22:02:08 2021
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Tue Aug 23 05:32:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.23 2021/11/12 22:02:08 jmcneill Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.24 2022/08/23 05:32:18 ryo Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.23 2021/11/12 22:02:08 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.24 2022/08/23 05:32:18 ryo Exp $");
#include
#include
@@ -143,15 +143,22 @@ static const struct rk_cru_pll_rate pll_
#define RK3399_ATCLK_MASK __BITS(4,0)
#define RK3399_PDBG_MASK __BITS(12,8)
+#define RK3399_CPU_RATE(_rate, _reg0, _reg0_mask, _reg0_val, _reg1, _reg1_mask, _reg1_val)\
+ { \
+ .rate = (_rate), \
+ .divs[0] = { .reg = (_reg0), .mask = (_reg0_mask), .val = (_reg0_val) },\
+ .divs[1] = { .reg = (_reg1), .mask = (_reg1_mask), .val = (_reg1_val) },\
+ }
+
#define RK3399_CPUL_RATE(_rate, _aclkm, _atclk, _pdbg) \
- RK_CPU_RATE(_rate, \
+ RK3399_CPU_RATE(_rate, \
CLKSEL_CON(0), RK3399_ACLKM_MASK, \
__SHIFTIN((_aclkm), RK3399_ACLKM_MASK), \
CLKSEL_CON(1), RK3399_ATCLK_MASK|RK3399_PDBG_MASK, \
__SHIFTIN((_atclk), RK3399_ATCLK_MASK)|__SHIFTIN((_pdbg), RK3399_PDBG_MASK))
#define RK3399_CPUB_RATE(_rate, _aclkm, _atclk, _pdbg) \
- RK_CPU_RATE(_rate, \
+ RK3399_CPU_RATE(_rate, \
CLKSEL_CON(2), RK3399_ACLKM_MASK, \
__SHIFTIN((_aclkm), RK3399_ACLKM_MASK), \
CLKSEL_CON(3), RK3399_ATCLK_MASK|RK3399_PDBG_MASK, \
Index: src/sys/arch/arm/rockchip/rk_cru.h
diff -u src/sys/arch/arm/rockchip/rk_cru.h:1.8 src/sys/arch/arm/rockchip/rk_cru.h:1.9
--- src/sys/arch/arm/rockchip/rk_cru.h:1.8 Fri Nov 12 22:02:08 2021
+++ src/sys/arch/arm/rockchip/rk_cru.h Tue Aug 23 05:32:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru.h,v 1.8 2021/11/12 22:02:08 jmcneill Exp $ */
+/* $NetBSD: rk_cru.h,v 1.9 2022/08/23 05:32:18 ryo Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -141,18 +141,16 @@ struct rk_cru_arm_rate {
.div = (_div), \
}
-struct rk_cru_cpu_rate {
- u_int rate;
- u_int reg1, reg1_mask, reg1_val;
- u_int reg2, reg2_mask, reg2_val;
+struct rk_regmaskval {
+ bus_size_t reg;
+ uint32_t mask;
+ uint32_t val;
};
-#define RK_CPU_RATE(_rate, _reg1, _reg1_mask, _reg1_val, _reg2, _reg2_mask, _reg2_val) \
- { \
- .rate = (_rate), \
- .reg1 = (_reg1), .reg1_mask = (_reg1_mask), .reg1_val = (_reg1_val), \
- .reg2 = (_reg2), .reg2_mask = (_reg2_mask), .reg2_val = (_reg2_val), \
- }
+struct rk_cru_cpu_rate {
+ u_int rate;
+ struct rk_regmaskval divs[2];
+};
struct rk_cru_arm {
bus_size_t reg;
Index: src/sys/arch/arm/rockchip/rk_cru_arm.c
diff -u src/sys/arch/arm/rockchip/rk_cru_arm.c:1.2 src/sys/arch/arm/rockchip/rk_cru_arm.c:1.3
--- src/sys/arch/arm/rockchip/rk_cru_arm.c:1.2 Sat Sep 1 19:35:53 2018
+++ src/sys/arch/arm/rockchip/rk_cru_arm.c Tue Aug 23 05:32:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru_arm.c,v 1.2 2018/09/01 19:35:53 jmcneill Exp $ */
+/* $NetBSD: rk_cru_arm.c,v 1.3 2022/08/23 05:32:18 ryo Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_cru_arm.c,v 1.2 2018/09/01 19:35:53 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_cru_arm.c,v 1.3 2022/08/23 05:32:18 ryo Exp $");
#include
#include
@@ -147,13 +147,11 @@ rk_cru_arm_set_rate_cpurates(struct rk_c
if (error != 0)
goto done;
- write_mask = cpu_rate->reg1_mask << 16;
- write_val = cpu_rate->reg1_val;
- CRU_WRITE(sc, cpu_rate->reg1, write_mask | write_val);
-
- write_mask = cpu_rate->reg2_mask << 16;
- write_val = cpu_rate->reg2_val;
- CRU_WRITE(sc, cpu_rate->reg2, write_mask | write_val);
+ for (int i = 0; i < __arraycount(cpu_rate->divs); i++) {
+ write_mask = cpu_rate->divs[i].mask << 16;
+ write_val = cpu_rate->divs[i].val;
+ CRU_WRITE(sc, cpu_rate->divs[i].reg, write_mask | write_val);
+ }
write_mask = arm->div_mask << 16;
write_val = __SHIFTIN(0, arm->div_mask);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: ryo Date: Tue Aug 23 05:32:18 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_arm.c Log Message: Make .reg1 and .reg2 of struct rk_cru_cpu_rate into array, and change the type of those to bus_size_t and uint32_t. Array size may increase in the future. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/rockchip/rk3399_cru.c cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/rockchip/rk_cru.h cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk_cru_arm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Fri May 13 09:49:44 UTC 2022
Modified Files:
src/sys/arch/arm/rockchip: rk_v1crypto.c
Log Message:
rkv1crypto(4): Fix units in RNG repeated-output health test.
This code was intended to check whether the two 4-word halves of an
8-word, 32-byte, 256-bit sample were repeated.
Instead, it accidentally checked whether the first 4 _bytes_ of the
two halves were repeated.
The effect was a false alarm rate of 1/2^32, instead of a false alarm
rate of 1/2^128, with no change on the true alarm rate in the event
of an RNG wedged producing all-zero or all-one bits. 1/2^128 is an
acceptable false alarm rate; 1/2^32, not so much.
(The false alarm right might be higher if the samples are not
perfectly uniformly distributed, which they most likey aren't,
although the documentation doesn't give any details other than
suggesting it's a ring oscillator under the hood, which provides
entropy from jitter induced by thermal noise. This driver records
half a bit of entropy per bit of sample to be reasonably
conservative.)
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_v1crypto.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_v1crypto.c
diff -u src/sys/arch/arm/rockchip/rk_v1crypto.c:1.9 src/sys/arch/arm/rockchip/rk_v1crypto.c:1.10
--- src/sys/arch/arm/rockchip/rk_v1crypto.c:1.9 Fri Apr 8 23:14:21 2022
+++ src/sys/arch/arm/rockchip/rk_v1crypto.c Fri May 13 09:49:44 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_v1crypto.c,v 1.9 2022/04/08 23:14:21 riastradh Exp $ */
+/* $NetBSD: rk_v1crypto.c,v 1.10 2022/05/13 09:49:44 riastradh Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: rk_v1crypto.c,v 1.9 2022/04/08 23:14:21 riastradh Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk_v1crypto.c,v 1.10 2022/05/13 09:49:44 riastradh Exp $");
#include
@@ -268,7 +268,7 @@ rk_v1crypto_rng_get(size_t nbytes, void
device_printf(self, "timed out\n");
break;
}
- if (consttime_memequal(buf, buf + n/2, n/2)) {
+ if (consttime_memequal(buf, buf + n/2, sizeof(buf[0]) * n/2)) {
device_printf(self, "failed repeated output test\n");
break;
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Fri May 13 09:49:44 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: rk_v1crypto.c Log Message: rkv1crypto(4): Fix units in RNG repeated-output health test. This code was intended to check whether the two 4-word halves of an 8-word, 32-byte, 256-bit sample were repeated. Instead, it accidentally checked whether the first 4 _bytes_ of the two halves were repeated. The effect was a false alarm rate of 1/2^32, instead of a false alarm rate of 1/2^128, with no change on the true alarm rate in the event of an RNG wedged producing all-zero or all-one bits. 1/2^128 is an acceptable false alarm rate; 1/2^32, not so much. (The false alarm right might be higher if the samples are not perfectly uniformly distributed, which they most likey aren't, although the documentation doesn't give any details other than suggesting it's a ring oscillator under the hood, which provides entropy from jitter induced by thermal noise. This driver records half a bit of entropy per bit of sample to be reasonably conservative.) To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_v1crypto.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Fri Apr 8 23:14:21 UTC 2022
Modified Files:
src/sys/arch/arm/rockchip: rk_v1crypto.c
Log Message:
rk_v1crypto(4): Fix missing `error =' assignment.
This is not likely to fail, but let's avoid suppressing an unlikely
error.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/rockchip/rk_v1crypto.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_v1crypto.c
diff -u src/sys/arch/arm/rockchip/rk_v1crypto.c:1.8 src/sys/arch/arm/rockchip/rk_v1crypto.c:1.9
--- src/sys/arch/arm/rockchip/rk_v1crypto.c:1.8 Sat Mar 19 11:37:05 2022
+++ src/sys/arch/arm/rockchip/rk_v1crypto.c Fri Apr 8 23:14:21 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_v1crypto.c,v 1.8 2022/03/19 11:37:05 riastradh Exp $ */
+/* $NetBSD: rk_v1crypto.c,v 1.9 2022/04/08 23:14:21 riastradh Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: rk_v1crypto.c,v 1.8 2022/03/19 11:37:05 riastradh Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk_v1crypto.c,v 1.9 2022/04/08 23:14:21 riastradh Exp $");
#include
@@ -300,7 +300,7 @@ rk_v1crypto_sysctl_attach(struct rk_v1cr
}
/* hw.rkv1cryptoN.rng (`struct', 32-byte array) */
- sysctl_createv(&cy->cy_log, 0, &cy->cy_root_node, NULL,
+ error = sysctl_createv(&cy->cy_log, 0, &cy->cy_root_node, NULL,
CTLFLAG_PERMANENT|CTLFLAG_READONLY|CTLFLAG_PRIVATE, CTLTYPE_STRUCT,
"rng", SYSCTL_DESCR("Read up to 32 bytes out of the TRNG"),
&rk_v1crypto_sysctl_rng, 0, sc, 0, CTL_CREATE, CTL_EOL);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Fri Apr 8 23:14:21 UTC 2022 Modified Files: src/sys/arch/arm/rockchip: rk_v1crypto.c Log Message: rk_v1crypto(4): Fix missing `error =' assignment. This is not likely to fail, but let's avoid suppressing an unlikely error. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/rockchip/rk_v1crypto.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Mon Dec 20 00:27:17 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c rk_vop.c
Log Message:
rkdrm: Implement vblank.
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/rockchip/rk_drm.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/rockchip/rk_vop.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.17 src/sys/arch/arm/rockchip/rk_drm.c:1.18
--- src/sys/arch/arm/rockchip/rk_drm.c:1.17 Sun Dec 19 12:45:04 2021
+++ src/sys/arch/arm/rockchip/rk_drm.c Mon Dec 20 00:27:17 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.c,v 1.17 2021/12/19 12:45:04 riastradh Exp $ */
+/* $NetBSD: rk_drm.c,v 1.18 2021/12/20 00:27:17 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.17 2021/12/19 12:45:04 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.18 2021/12/20 00:27:17 riastradh Exp $");
#include
#include
@@ -77,10 +77,6 @@ static void rk_drm_attach(device_t, devi
static void rk_drm_init(device_t);
static vmem_t *rk_drm_alloc_cma_pool(struct drm_device *, size_t);
-static uint32_t rk_drm_get_vblank_counter(struct drm_device *, unsigned int);
-static int rk_drm_enable_vblank(struct drm_device *, unsigned int);
-static void rk_drm_disable_vblank(struct drm_device *, unsigned int);
-
static int rk_drm_load(struct drm_device *, unsigned long);
static void rk_drm_unload(struct drm_device *);
@@ -99,10 +95,6 @@ static struct drm_driver rk_drm_driver =
.dumb_create = drm_gem_cma_dumb_create,
.dumb_destroy = drm_gem_dumb_destroy,
- .get_vblank_counter = rk_drm_get_vblank_counter,
- .enable_vblank = rk_drm_enable_vblank,
- .disable_vblank = rk_drm_disable_vblank,
-
.name = DRIVER_NAME,
.desc = DRIVER_DESC,
.date = DRIVER_DATE,
@@ -440,7 +432,7 @@ rk_drm_load(struct drm_device *ddev, uns
drm_fb_helper_initial_config(&fbdev->helper, 32);
- /* XXX */
+ /* XXX Delegate this to rk_vop.c? */
ddev->irq_enabled = true;
drm_vblank_init(ddev, num_crtc);
@@ -454,50 +446,6 @@ drmerr:
return error;
}
-static uint32_t
-rk_drm_get_vblank_counter(struct drm_device *ddev, unsigned int crtc)
-{
- struct rk_drm_softc * const sc = rk_drm_private(ddev);
-
- if (crtc >= __arraycount(sc->sc_vbl))
- return 0;
-
- if (sc->sc_vbl[crtc].get_vblank_counter == NULL)
- return 0;
-
- return sc->sc_vbl[crtc].get_vblank_counter(sc->sc_vbl[crtc].priv);
-}
-
-static int
-rk_drm_enable_vblank(struct drm_device *ddev, unsigned int crtc)
-{
- struct rk_drm_softc * const sc = rk_drm_private(ddev);
-
- if (crtc >= __arraycount(sc->sc_vbl))
- return 0;
-
- if (sc->sc_vbl[crtc].enable_vblank == NULL)
- return 0;
-
- sc->sc_vbl[crtc].enable_vblank(sc->sc_vbl[crtc].priv);
-
- return 0;
-}
-
-static void
-rk_drm_disable_vblank(struct drm_device *ddev, unsigned int crtc)
-{
- struct rk_drm_softc * const sc = rk_drm_private(ddev);
-
- if (crtc >= __arraycount(sc->sc_vbl))
- return;
-
- if (sc->sc_vbl[crtc].disable_vblank == NULL)
- return;
-
- sc->sc_vbl[crtc].disable_vblank(sc->sc_vbl[crtc].priv);
-}
-
static void
rk_drm_unload(struct drm_device *ddev)
{
Index: src/sys/arch/arm/rockchip/rk_vop.c
diff -u src/sys/arch/arm/rockchip/rk_vop.c:1.15 src/sys/arch/arm/rockchip/rk_vop.c:1.16
--- src/sys/arch/arm/rockchip/rk_vop.c:1.15 Sun Dec 19 12:45:27 2021
+++ src/sys/arch/arm/rockchip/rk_vop.c Mon Dec 20 00:27:17 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_vop.c,v 1.15 2021/12/19 12:45:27 riastradh Exp $ */
+/* $NetBSD: rk_vop.c,v 1.16 2021/12/20 00:27:17 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.15 2021/12/19 12:45:27 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.16 2021/12/20 00:27:17 riastradh Exp $");
#include
#include
@@ -50,6 +50,7 @@ __KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1
#include
#include
#include
+#include
#define VOP_REG_CFG_DONE 0x
#define REG_LOAD_EN __BIT(0)
@@ -104,6 +105,26 @@ __KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1
#define VOP_DSP_VACT_ST_END 0x0194
#define DSP_VACT_ST __BITS(28,16)
#define DSP_VACT_END __BITS(12,0)
+#define VOP_INTR_EN0 0x0280
+#define VOP_INTR_CLEAR0 0x0284
+#define VOP_INTR_STATUS0 0x0288
+#define VOP_INTR_RAW_STATUS0 0x028c
+#define VOP_INTR0_DMA_FINISH __BIT(15)
+#define VOP_INTR0_MMU __BIT(14)
+#define VOP_INTR0_DSP_HOLD_VALID __BIT(13)
+#define VOP_INTR0_FS_FIELD __BIT(12)
+#define VOP_INTR0_POST_BUF_EMPTY __BIT(11)
+#define VOP_INTR0_HWC_EMPTY __BIT(10)
+#define VOP_INTR0_WIN3_EMPTY __BIT(9)
+#define VOP_INTR0_WIN2_EMPTY __BIT(8)
+#define VOP_INTR0_WIN1_EMPTY __BIT(7)
+#define VOP_INTR0_WIN0_EMPTY __BIT(6)
+#define VOP_INTR0_BUS_ERROR __BIT(5)
+#de
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Mon Dec 20 00:27:17 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c rk_vop.c Log Message: rkdrm: Implement vblank. To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/rockchip/rk_drm.c cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/rockchip/rk_vop.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Sun Dec 19 12:45:27 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_vop.c
Log Message:
rkdrm: Implement atomic disable for planes.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_vop.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_vop.c
diff -u src/sys/arch/arm/rockchip/rk_vop.c:1.14 src/sys/arch/arm/rockchip/rk_vop.c:1.15
--- src/sys/arch/arm/rockchip/rk_vop.c:1.14 Sun Dec 19 12:45:12 2021
+++ src/sys/arch/arm/rockchip/rk_vop.c Sun Dec 19 12:45:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_vop.c,v 1.14 2021/12/19 12:45:12 riastradh Exp $ */
+/* $NetBSD: rk_vop.c,v 1.15 2021/12/19 12:45:27 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.14 2021/12/19 12:45:12 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.15 2021/12/19 12:45:27 riastradh Exp $");
#include
#include
@@ -344,9 +344,13 @@ rk_vop_plane_atomic_update(struct drm_pl
}
static void
-rk_vop_plane_atomic_disable(struct drm_plane *plane, struct drm_plane_state *state)
+rk_vop_plane_atomic_disable(struct drm_plane *plane,
+struct drm_plane_state *state)
{
- DRM_DEBUG_KMS("[PLANE:%s] disable TODO\n", plane->name);
+ struct rk_vop_plane *vop_plane = to_rk_vop_plane(plane);
+ struct rk_vop_softc * const sc = vop_plane->sc;
+
+ WR4(sc, VOP_WIN0_CTRL, 0); /* clear WIN0_EN */
}
static const struct drm_plane_helper_funcs rk_vop_plane_helper_funcs = {
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:45:27 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_vop.c Log Message: rkdrm: Implement atomic disable for planes. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_vop.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Sun Dec 19 12:45:20 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_fb.c
Log Message:
rkdrm: Turn display off and back on again at config_interrupts.
This grody kludge works around whatever we're doing wrong in the
initial modeset that causes it not to take.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_fb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_fb.c
diff -u src/sys/arch/arm/rockchip/rk_fb.c:1.5 src/sys/arch/arm/rockchip/rk_fb.c:1.6
--- src/sys/arch/arm/rockchip/rk_fb.c:1.5 Sun Dec 19 12:28:27 2021
+++ src/sys/arch/arm/rockchip/rk_fb.c Sun Dec 19 12:45:19 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_fb.c,v 1.5 2021/12/19 12:28:27 riastradh Exp $ */
+/* $NetBSD: rk_fb.c,v 1.6 2021/12/19 12:45:19 riastradh Exp $ */
/*-
* Copyright (c) 2015-2019 Jared McNeill
@@ -29,7 +29,7 @@
#include "opt_wsdisplay_compat.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.5 2021/12/19 12:28:27 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.6 2021/12/19 12:45:19 riastradh Exp $");
#include
#include
@@ -99,6 +99,25 @@ rk_fb_attach(device_t parent, device_t s
}
static void
+rk_fb_turnoffandbackonagain(device_t self)
+{
+ struct rk_fb_softc *sc = device_private(self);
+ struct rk_drmfb_attach_args * const sfa = &sc->sc_sfa;
+
+ /*
+ * This is a grody kludge to turn the display off and back on
+ * again at boot; otherwise the initial modeset doesn't take.
+ * This is surely a bug somewhere in rk_vop.c or nearby, but I
+ * haven't been able to find it, and this gives us almost the
+ * same effect.
+ */
+ mutex_lock(&sfa->sfa_fb_helper->lock);
+ drm_client_modeset_dpms(&sfa->sfa_fb_helper->client, DRM_MODE_DPMS_OFF);
+ drm_client_modeset_dpms(&sfa->sfa_fb_helper->client, DRM_MODE_DPMS_ON);
+ mutex_unlock(&sfa->sfa_fb_helper->lock);
+}
+
+static void
rk_fb_init(struct rk_drm_task *task)
{
struct rk_fb_softc * const sc =
@@ -123,6 +142,8 @@ rk_fb_init(struct rk_drm_task *task)
}
pmf_device_register1(self, NULL, NULL, rk_fb_shutdown);
+
+ config_interrupts(self, rk_fb_turnoffandbackonagain);
}
static bool
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:45:20 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_fb.c Log Message: rkdrm: Turn display off and back on again at config_interrupts. This grody kludge works around whatever we're doing wrong in the initial modeset that causes it not to take. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_fb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Sun Dec 19 12:45:12 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_vop.c
Log Message:
rkdrm: Reset vop for 10us on attach.
This avoids creepy lines slowly appearing, and freezing themselves
semipermanently on the display, until the first successful modeset.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/rockchip/rk_vop.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_vop.c
diff -u src/sys/arch/arm/rockchip/rk_vop.c:1.13 src/sys/arch/arm/rockchip/rk_vop.c:1.14
--- src/sys/arch/arm/rockchip/rk_vop.c:1.13 Sun Dec 19 12:43:37 2021
+++ src/sys/arch/arm/rockchip/rk_vop.c Sun Dec 19 12:45:12 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_vop.c,v 1.13 2021/12/19 12:43:37 riastradh Exp $ */
+/* $NetBSD: rk_vop.c,v 1.14 2021/12/19 12:45:12 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.13 2021/12/19 12:43:37 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.14 2021/12/19 12:45:12 riastradh Exp $");
#include
#include
@@ -624,13 +624,25 @@ rk_vop_attach(device_t parent, device_t
fdtbus_clock_assign(phandle);
+ /* assert all the reset signals for 20us */
+ for (n = 0; n < __arraycount(reset_names); n++) {
+ rst = fdtbus_reset_get(phandle, reset_names[n]);
+ if (rst == NULL || fdtbus_reset_assert(rst) != 0) {
+ aprint_error(": couldn't assert reset %s\n",
+ reset_names[n]);
+ return;
+ }
+ }
+ DELAY(10);
for (n = 0; n < __arraycount(reset_names); n++) {
rst = fdtbus_reset_get(phandle, reset_names[n]);
if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
- aprint_error(": couldn't de-assert reset %s\n", reset_names[n]);
+ aprint_error(": couldn't de-assert reset %s\n",
+ reset_names[n]);
return;
}
}
+
for (n = 0; n < __arraycount(clock_names); n++) {
if (fdtbus_clock_enable(phandle, clock_names[n], true) != 0) {
aprint_error(": couldn't enable clock %s\n", clock_names[n]);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:45:12 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_vop.c Log Message: rkdrm: Reset vop for 10us on attach. This avoids creepy lines slowly appearing, and freezing themselves semipermanently on the display, until the first successful modeset. To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/rockchip/rk_vop.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:45:05 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: rkdrm: Comment why we config_defer rk_drm_init. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk_drm.c diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.16 src/sys/arch/arm/rockchip/rk_drm.c:1.17 --- src/sys/arch/arm/rockchip/rk_drm.c:1.16 Sun Dec 19 12:43:37 2021 +++ src/sys/arch/arm/rockchip/rk_drm.c Sun Dec 19 12:45:04 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk_drm.c,v 1.16 2021/12/19 12:43:37 riastradh Exp $ */ +/* $NetBSD: rk_drm.c,v 1.17 2021/12/19 12:45:04 riastradh Exp $ */ /*- * Copyright (c) 2019 Jared D. McNeill @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.16 2021/12/19 12:43:37 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.17 2021/12/19 12:45:04 riastradh Exp $"); #include #include @@ -167,6 +167,10 @@ rk_drm_attach(device_t parent, device_t fdt_remove_bycompat(fb_compatible); + /* + * Wait until rk_vop is attached as a sibling to this device -- + * we need that to actually display our framebuffer. + */ config_defer(self, rk_drm_init); }
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:45:05 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: rkdrm: Comment why we config_defer rk_drm_init. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:43:29 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: rkdrm: Do drm_mode_config_reset on init. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk_drm.c diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.14 src/sys/arch/arm/rockchip/rk_drm.c:1.15 --- src/sys/arch/arm/rockchip/rk_drm.c:1.14 Sun Dec 19 12:28:44 2021 +++ src/sys/arch/arm/rockchip/rk_drm.c Sun Dec 19 12:43:29 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk_drm.c,v 1.14 2021/12/19 12:28:44 riastradh Exp $ */ +/* $NetBSD: rk_drm.c,v 1.15 2021/12/19 12:43:29 riastradh Exp $ */ /*- * Copyright (c) 2019 Jared D. McNeill @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.14 2021/12/19 12:28:44 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.15 2021/12/19 12:43:29 riastradh Exp $"); #include #include @@ -410,6 +410,8 @@ rk_drm_load(struct drm_device *ddev, uns goto drmerr; } + drm_mode_config_reset(ddev); + fbdev = kmem_zalloc(sizeof(*fbdev), KM_SLEEP); drm_fb_helper_prepare(ddev, &fbdev->helper, &rk_drm_fb_helper_funcs);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:43:29 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: rkdrm: Do drm_mode_config_reset on init. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:28:35 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: rockchip/drm: use drm_helper_mode_fill_fb_struct or say why not. Author: phone Committer: Taylor R Campbell To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk_drm.c diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.12 src/sys/arch/arm/rockchip/rk_drm.c:1.13 --- src/sys/arch/arm/rockchip/rk_drm.c:1.12 Sun Dec 19 12:28:27 2021 +++ src/sys/arch/arm/rockchip/rk_drm.c Sun Dec 19 12:28:35 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk_drm.c,v 1.12 2021/12/19 12:28:27 riastradh Exp $ */ +/* $NetBSD: rk_drm.c,v 1.13 2021/12/19 12:28:35 riastradh Exp $ */ /*- * Copyright (c) 2019 Jared D. McNeill @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.12 2021/12/19 12:28:27 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.13 2021/12/19 12:28:35 riastradh Exp $"); #include #include @@ -269,16 +269,8 @@ rk_drm_fb_create(struct drm_device *ddev return NULL; fb = kmem_zalloc(sizeof(*fb), KM_SLEEP); + drm_helper_mode_fill_fb_struct(ddev, &fb->base, cmd); fb->obj = to_drm_gem_cma_obj(gem_obj); - fb->base.pitches[0] = cmd->pitches[0]; - fb->base.pitches[1] = cmd->pitches[1]; - fb->base.pitches[2] = cmd->pitches[2]; - fb->base.offsets[0] = cmd->offsets[0]; - fb->base.offsets[1] = cmd->offsets[2]; - fb->base.offsets[2] = cmd->offsets[1]; - fb->base.width = cmd->width; - fb->base.height = cmd->height; - fb->base.format = drm_format_info(cmd->pixel_format); error = drm_framebuffer_init(ddev, &fb->base, &rk_drm_framebuffer_funcs); if (error != 0) @@ -330,10 +322,14 @@ rk_drm_fb_probe(struct drm_fb_helper *he return -ENOMEM; } + /* similar to drm_helper_mode_fill_fb_struct(), but we have no cmd */ fb->pitches[0] = pitch; fb->offsets[0] = 0; fb->width = width; fb->height = height; + fb->dev = ddev; + fb->modifier = 0; + fb->flags = 0; #ifdef __ARM_BIG_ENDIAN fb->format = drm_format_info(DRM_FORMAT_BGRX); #else
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:28:35 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: rockchip/drm: use drm_helper_mode_fill_fb_struct or say why not. Author: phone Committer: Taylor R Campbell To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: riastradh
Date: Sun Dec 19 12:28:27 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c rk_drm.h rk_fb.c
Log Message:
rockchip/drm: use an explicit task queue to avoid config_defer pitfalls.
Author: phone
Committer: Taylor R Campbell
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk_drm.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_drm.h
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_fb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.11 src/sys/arch/arm/rockchip/rk_drm.c:1.12
--- src/sys/arch/arm/rockchip/rk_drm.c:1.11 Sun Dec 19 11:25:48 2021
+++ src/sys/arch/arm/rockchip/rk_drm.c Sun Dec 19 12:28:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.c,v 1.11 2021/12/19 11:25:48 riastradh Exp $ */
+/* $NetBSD: rk_drm.c,v 1.12 2021/12/19 12:28:27 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.11 2021/12/19 11:25:48 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.12 2021/12/19 12:28:27 riastradh Exp $");
#include
#include
@@ -82,6 +82,8 @@ static void rk_drm_disable_vblank(struct
static int rk_drm_load(struct drm_device *, unsigned long);
static void rk_drm_unload(struct drm_device *);
+static void rk_drm_task_work(struct work *, void *);
+
static struct drm_driver rk_drm_driver = {
.driver_features = DRIVER_MODESET | DRIVER_GEM,
.dev_priv_size = 0,
@@ -131,6 +133,14 @@ rk_drm_attach(device_t parent, device_t
sc->sc_dmat = faa->faa_dmat;
sc->sc_bst = faa->faa_bst;
sc->sc_phandle = faa->faa_phandle;
+ sc->sc_task_thread = NULL;
+ SIMPLEQ_INIT(&sc->sc_tasks);
+ if (workqueue_create(&sc->sc_task_wq, "rkdrm",
+ &rk_drm_task_work, NULL, PRI_NONE, IPL_NONE, WQ_MPSAFE)) {
+ aprint_error_dev(self, "unable to create workqueue\n");
+ sc->sc_task_wq = NULL;
+ return;
+ }
aprint_naive("\n");
@@ -164,16 +174,40 @@ rk_drm_init(device_t dev)
struct drm_driver * const driver = &rk_drm_driver;
int error;
+ /*
+ * Cause any tasks issued synchronously during attach to be
+ * processed at the end of this function.
+ */
+ sc->sc_task_thread = curlwp;
+
error = -drm_dev_register(sc->sc_ddev, 0);
if (error) {
aprint_error_dev(dev, "couldn't register DRM device: %d\n",
error);
- return;
+ goto out;
}
+ sc->sc_dev_registered = true;
aprint_normal_dev(dev, "initialized %s %d.%d.%d %s on minor %d\n",
driver->name, driver->major, driver->minor, driver->patchlevel,
driver->date, sc->sc_ddev->primary->index);
+
+ /*
+ * Process asynchronous tasks queued synchronously during
+ * attach. This will be for display detection to attach a
+ * framebuffer, so we have the opportunity for a console device
+ * to attach before autoconf has completed, in time for init(8)
+ * to find that console without panicking.
+ */
+ while (!SIMPLEQ_EMPTY(&sc->sc_tasks)) {
+ struct rk_drm_task *const task = SIMPLEQ_FIRST(&sc->sc_tasks);
+
+ SIMPLEQ_REMOVE_HEAD(&sc->sc_tasks, rdt_u.queue);
+ (*task->rdt_fn)(task);
+ }
+
+out: /* Cause any subesquent tasks to be processed by the workqueue. */
+ atomic_store_relaxed(&sc->sc_task_thread, NULL);
}
static vmem_t *
@@ -484,3 +518,31 @@ rk_drm_port_device(struct fdt_device_por
return NULL;
}
+
+static void
+rk_drm_task_work(struct work *work, void *cookie)
+{
+ struct rk_drm_task *task = container_of(work, struct rk_drm_task,
+ rdt_u.work);
+
+ (*task->rdt_fn)(task);
+}
+
+void
+rk_task_init(struct rk_drm_task *task,
+void (*fn)(struct rk_drm_task *))
+{
+
+ task->rdt_fn = fn;
+}
+
+void
+rk_task_schedule(device_t self, struct rk_drm_task *task)
+{
+ struct rk_drm_softc *sc = device_private(self);
+
+ if (atomic_load_relaxed(&sc->sc_task_thread) == curlwp)
+ SIMPLEQ_INSERT_TAIL(&sc->sc_tasks, task, rdt_u.queue);
+ else
+ workqueue_enqueue(sc->sc_task_wq, &task->rdt_u.work, NULL);
+}
Index: src/sys/arch/arm/rockchip/rk_drm.h
diff -u src/sys/arch/arm/rockchip/rk_drm.h:1.1 src/sys/arch/arm/rockchip/rk_drm.h:1.2
--- src/sys/arch/arm/rockchip/rk_drm.h:1.1 Sat Nov 9 23:30:14 2019
+++ src/sys/arch/arm/rockchip/rk_drm.h Sun Dec 19 12:28:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.h,v 1.1 2019/11/09 23:30:14 jmcneill Exp $ */
+/* $NetBSD: rk_drm.h,v 1.2 2021/12/19 12:28:27 riastradh Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -29,6 +29,7 @@
#ifndef _ARM_RK_DRM_H
#define _ARM_RK_DRM_H
+#include
#include
#include
@@ -62,6 +63,12 @@ struct rk_drm_softc {
int sc_phandle;
+ struct lwp *sc_task_thread;
+ SIMPLEQ_HEAD(, rk_drm_task) sc_tasks;
+ struct workqueue *sc_task_wq;
+
+ bool sc_dev_registered;
+
struct rk_drm_vblank sc_vbl[RK_DRM_MAX_CRTC];
};
@@ -90,10 +97,22 @@ struct rk_drmfb_att
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: riastradh Date: Sun Dec 19 12:28:27 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c rk_drm.h rk_fb.c Log Message: rockchip/drm: use an explicit task queue to avoid config_defer pitfalls. Author: phone Committer: Taylor R Campbell To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk_drm.c cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_drm.h cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_fb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sat Nov 13 15:17:22 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk3066_smp.c
Log Message:
Write back and invalidate cache before starting secondary CPUs.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3066_smp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3066_smp.c
diff -u src/sys/arch/arm/rockchip/rk3066_smp.c:1.1 src/sys/arch/arm/rockchip/rk3066_smp.c:1.2
--- src/sys/arch/arm/rockchip/rk3066_smp.c:1.1 Fri Nov 12 22:02:08 2021
+++ src/sys/arch/arm/rockchip/rk3066_smp.c Sat Nov 13 15:17:22 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3066_smp.c,v 1.1 2021/11/12 22:02:08 jmcneill Exp $ */
+/* $NetBSD: rk3066_smp.c,v 1.2 2021/11/13 15:17:22 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill
@@ -30,7 +30,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: rk3066_smp.c,v 1.1 2021/11/12 22:02:08 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk3066_smp.c,v 1.2 2021/11/13 15:17:22 jmcneill Exp $");
#include
#include
@@ -141,26 +141,15 @@ rk3066_smp_enable(int cpus_phandle, u_in
static int
cpu_enable_rk3066(int phandle)
{
- static uint32_t enabled;
uint64_t mpidr;
- int error = 0;
fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
const u_int cpuno = __SHIFTOUT(mpidr, MPIDR_AFF0);
- const bool is_enabled = enabled & __BIT(cpuno);
- if (!is_enabled) {
- error = rk3066_smp_enable(OF_parent(phandle), cpuno);
- if (error == 0) {
- enabled |= __BIT(cpuno);
- }
- } else {
- printf("WARNING: CPU enable called more than once for CPU %u\n",
- cpuno);
- }
+ cpu_dcache_wbinv_all();
- return error;
+ return rk3066_smp_enable(OF_parent(phandle), cpuno);
}
ARM_CPU_METHOD(rk3066, "rockchip,rk3066-smp", cpu_enable_rk3066);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 15:17:22 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3066_smp.c Log Message: Write back and invalidate cache before starting secondary CPUs. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3066_smp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sat Nov 13 11:46:32 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk3288_cru.c rk_tsadc.c
Log Message:
Add support for RK3288 temperature sensors.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk3288_cru.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_tsadc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3288_cru.c
diff -u src/sys/arch/arm/rockchip/rk3288_cru.c:1.4 src/sys/arch/arm/rockchip/rk3288_cru.c:1.5
--- src/sys/arch/arm/rockchip/rk3288_cru.c:1.4 Sat Nov 13 01:29:08 2021
+++ src/sys/arch/arm/rockchip/rk3288_cru.c Sat Nov 13 11:46:32 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3288_cru.c,v 1.4 2021/11/13 01:29:08 jmcneill Exp $ */
+/* $NetBSD: rk3288_cru.c,v 1.5 2021/11/13 11:46:32 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.4 2021/11/13 01:29:08 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.5 2021/11/13 11:46:32 jmcneill Exp $");
#include
#include
@@ -263,6 +263,14 @@ static struct rk_cru_clk rk3288_cru_clks
__BIT(11), /* gate_mask */
0),
+ /* TSADC */
+ RK_COMPOSITE_NOMUX(RK3288_SCLK_TSADC, "sclk_tsadc", "xin32k",
+ CLKSEL_CON(2), /* div_reg */
+ __BITS(5,0), /* div_mask */
+ CLKGATE_CON(2), /* gate_reg */
+ __BIT(7), /* gate_mask */
+ 0),
+
RK_DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLKSEL_CON(1), __BITS(2,0), 0),
RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0),
RK_DIV(0, "pclk_pd_alive", "gpll", CLKSEL_CON(33), __BITS(12,8), 0),
@@ -290,6 +298,7 @@ static struct rk_cru_clk rk3288_cru_clks
RK_GATE(RK3288_PCLK_I2C3, "pclk_i2c3", "pclk_peri", CLKGATE_CON(6), 14),
RK_GATE(RK3288_PCLK_I2C4, "pclk_i2c4", "pclk_peri", CLKGATE_CON(6), 15),
RK_GATE(RK3288_PCLK_I2C5, "pclk_i2c5", "pclk_peri", CLKGATE_CON(7), 0),
+ RK_GATE(RK3288_PCLK_TSADC, "pclk_tsadc", "pclk_peri", CLKGATE_CON(7), 2),
RK_GATE(RK3288_HCLK_USBHOST0, "hclk_host0", "hclk_peri", CLKGATE_CON(7), 6),
RK_GATE(RK3288_HCLK_USBHOST1, "hclk_host1", "hclk_peri", CLKGATE_CON(7), 7),
RK_GATE(RK3288_HCLK_HSIC, "hclk_hsic", "hclk_peri", CLKGATE_CON(7), 8),
Index: src/sys/arch/arm/rockchip/rk_tsadc.c
diff -u src/sys/arch/arm/rockchip/rk_tsadc.c:1.14 src/sys/arch/arm/rockchip/rk_tsadc.c:1.15
--- src/sys/arch/arm/rockchip/rk_tsadc.c:1.14 Sat Sep 11 20:28:03 2021
+++ src/sys/arch/arm/rockchip/rk_tsadc.c Sat Nov 13 11:46:32 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_tsadc.c,v 1.14 2021/09/11 20:28:03 andvar Exp $ */
+/* $NetBSD: rk_tsadc.c,v 1.15 2021/11/13 11:46:32 jmcneill Exp $ */
/*
* Copyright (c) 2019 Matthew R. Green
@@ -30,7 +30,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v 1.14 2021/09/11 20:28:03 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v 1.15 2021/11/13 11:46:32 jmcneill Exp $");
/*
* Driver for the TSADC temperature sensor monitor in RK3328 and RK3399.
@@ -93,9 +93,10 @@ __KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v
#define TSADC_INT_EN_HT_INTEN_SRC1 __BIT(1)
#define TSADC_INT_EN_HT_INTEN_SRC0 __BIT(0)
#define TSADC_INT_PD0x0c
-#define TSADC_INT_PD_EOC_INT_PD__BIT(16)
+#define TSADC_INT_PD_EOC_INT_PD_V3 __BIT(16)
#define TSADC_INT_PD_LT_IRQ_SRC1 __BIT(13)
#define TSADC_INT_PD_LT_IRQ_SRC0 __BIT(12)
+#define TSADC_INT_PD_EOC_INT_PD_V2 __BIT(8)
#define TSADC_INT_PD_TSHUT_O_SRC1 __BIT(5)
#define TSADC_INT_PD_TSHUT_O_SRC0 __BIT(4)
#define TSADC_INT_PD_HT_IRQ_SRC1 __BIT(1)
@@ -125,6 +126,8 @@ __KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v
#define TSADC_COMP1_LOW_INT 0x84
#define TSADC_COMP1_LOW_INT_COMP_SRC1 __BITS(11,0)
+#define RK3288_TSADC_AUTO_PERIOD_TIME 250 /* 250ms */
+#define RK3288_TSADC_AUTO_PERIOD_HT_TIME 50 /* 50ms */
#define RK3328_TSADC_AUTO_PERIOD_TIME 250 /* 250ms */
#define RK3399_TSADC_AUTO_PERIOD_TIME 1875 /* 2.5ms */
#define TSADC_HT_DEBOUNCE_COUNT 4
@@ -165,13 +168,16 @@ typedef struct rk_data_array {
struct rk_tsadc_softc;
typedef struct rk_data {
+ const char *rd_name;
const rk_data_array *rd_array;
size_t rd_size;
void (*rd_init)(struct rk_tsadc_softc *, int, int);
bool rd_decr; /* lower values -> higher temp */
unsigned rd_min, rd_max;
unsigned rd_auto_period;
+ unsigned rd_auto_period_ht;
unsigned rd_num_sensors;
+ unsigned rd_version;
} rk_data;
/* Per-sensor data */
@@ -216,7 +222,7 @@ static int rk_tsadc_init_clocks(struct r
static void rk_tsadc_init_counts(struct rk_tsadc_softc *);
static void rk_tsadc_tshut_set(struct rk_tsadc_softc *s);
static void rk_tsadc_init_tshut(stru
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 11:46:32 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c rk_tsadc.c Log Message: Add support for RK3288 temperature sensors. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk3288_cru.c cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_tsadc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:29:08 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Add pwm and spi clocks To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk3288_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:29:08 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Add pwm and spi clocks To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk3288_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk3288_cru.c diff -u src/sys/arch/arm/rockchip/rk3288_cru.c:1.3 src/sys/arch/arm/rockchip/rk3288_cru.c:1.4 --- src/sys/arch/arm/rockchip/rk3288_cru.c:1.3 Sat Nov 13 01:07:09 2021 +++ src/sys/arch/arm/rockchip/rk3288_cru.c Sat Nov 13 01:29:08 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk3288_cru.c,v 1.3 2021/11/13 01:07:09 jmcneill Exp $ */ +/* $NetBSD: rk3288_cru.c,v 1.4 2021/11/13 01:29:08 jmcneill Exp $ */ /*- * Copyright (c) 2021 Jared McNeill @@ -28,7 +28,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.3 2021/11/13 01:07:09 jmcneill Exp $"); +__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.4 2021/11/13 01:29:08 jmcneill Exp $"); #include #include @@ -240,6 +240,29 @@ static struct rk_cru_clk rk3288_cru_clks __BIT(4), /* gate_mask */ 0), + /* SPI */ + RK_COMPOSITE(RK3288_SCLK_SPI0, "sclk_spi0", mux_2plls_parents, + CLKSEL_CON(25), /* muxdiv_reg */ + __BIT(7), /* mux_mask */ + __BITS(6,0), /* div_mask */ + CLKGATE_CON(2), /* gate_reg */ + __BIT(9), /* gate_mask */ + 0), + RK_COMPOSITE(RK3288_SCLK_SPI1, "sclk_spi1", mux_2plls_parents, + CLKSEL_CON(25), /* muxdiv_reg */ + __BIT(15), /* mux_mask */ + __BITS(14,8), /* div_mask */ + CLKGATE_CON(2), /* gate_reg */ + __BIT(10), /* gate_mask */ + 0), + RK_COMPOSITE(RK3288_SCLK_SPI2, "sclk_spi2", mux_2plls_parents, + CLKSEL_CON(39), /* muxdiv_reg */ + __BIT(7), /* mux_mask */ + __BITS(6,0), /* div_mask */ + CLKGATE_CON(2), /* gate_reg */ + __BIT(11), /* gate_mask */ + 0), + RK_DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLKSEL_CON(1), __BITS(2,0), 0), RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0), RK_DIV(0, "pclk_pd_alive", "gpll", CLKSEL_CON(33), __BITS(12,8), 0), @@ -260,6 +283,9 @@ static struct rk_cru_clk rk3288_cru_clks RK_GATE(RK3288_SCLK_MAC_TX, "sclk_mac_tx", "mac_clk", CLKGATE_CON(5), 1), RK_GATE(RK3288_SCLK_MACREF, "sclk_macref", "mac_clk", CLKGATE_CON(5), 2), RK_GATE(RK3288_SCLK_MACREF_OUT, "sclk_macref_out", "mac_clk", CLKGATE_CON(5), 3), + RK_GATE(RK3288_PCLK_SPI0, "pclk_spi0", "pclk_peri", CLKGATE_CON(6), 4), + RK_GATE(RK3288_PCLK_SPI1, "pclk_spi1", "pclk_peri", CLKGATE_CON(6), 5), + RK_GATE(RK3288_PCLK_SPI2, "pclk_spi2", "pclk_peri", CLKGATE_CON(6), 6), RK_GATE(RK3288_PCLK_I2C1, "pclk_i2c1", "pclk_peri", CLKGATE_CON(6), 13), RK_GATE(RK3288_PCLK_I2C3, "pclk_i2c3", "pclk_peri", CLKGATE_CON(6), 14), RK_GATE(RK3288_PCLK_I2C4, "pclk_i2c4", "pclk_peri", CLKGATE_CON(6), 15), @@ -279,6 +305,7 @@ static struct rk_cru_clk rk3288_cru_clks RK_GATE(RK3288_ACLK_CRYPTO, "aclk_crypto", "aclk_cpu", CLKGATE_CON(11), 6), RK_GATE(RK3288_HCLK_CRYPTO, "hclk_crypto", "hclk_cpu", CLKGATE_CON(11), 7), RK_GATE(RK3288_PCLK_UART2, "pclk_uart2", "pclk_cpu", CLKGATE_CON(11), 9), + RK_GATE(RK3288_PCLK_RKPWM, "pclk_rkpwm", "pclk_cpu", CLKGATE_CON(11), 11), RK_GATE(RK3288_SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLKGATE_CON(13), 4), RK_GATE(RK3288_SCLK_OTGPHY1, "sclk_otgphy1", "xin24m", CLKGATE_CON(13), 5), RK_GATE(RK3288_SCLK_OTGPHY2, "sclk_otgphy2", "xin24m", CLKGATE_CON(13), 6),
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sat Nov 13 01:08:15 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_i2c.c
Log Message:
Match rockchip,rk3288-i2c
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk_i2c.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_i2c.c
diff -u src/sys/arch/arm/rockchip/rk_i2c.c:1.11 src/sys/arch/arm/rockchip/rk_i2c.c:1.12
--- src/sys/arch/arm/rockchip/rk_i2c.c:1.11 Fri Nov 12 22:02:08 2021
+++ src/sys/arch/arm/rockchip/rk_i2c.c Sat Nov 13 01:08:15 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_i2c.c,v 1.11 2021/11/12 22:02:08 jmcneill Exp $ */
+/* $NetBSD: rk_i2c.c,v 1.12 2021/11/13 01:08:15 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.11 2021/11/12 22:02:08 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.12 2021/11/13 01:08:15 jmcneill Exp $");
#include
#include
@@ -104,9 +104,7 @@ __KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1
#define RKI2C_HAS_PCLK __BIT(0)
static const struct device_compatible_entry compat_data[] = {
-#if notyet
{ .compat = "rockchip,rk3288-i2c", .value = 0 },
-#endif
{ .compat = "rockchip,rk3399-i2c", .value = RKI2C_HAS_PCLK },
DEVICE_COMPAT_EOL
};
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:08:15 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_i2c.c Log Message: Match rockchip,rk3288-i2c To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk_i2c.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:07:09 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Fix width of aclk_cpu_pre divider field To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk3288_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk3288_cru.c diff -u src/sys/arch/arm/rockchip/rk3288_cru.c:1.2 src/sys/arch/arm/rockchip/rk3288_cru.c:1.3 --- src/sys/arch/arm/rockchip/rk3288_cru.c:1.2 Sat Nov 13 00:34:07 2021 +++ src/sys/arch/arm/rockchip/rk3288_cru.c Sat Nov 13 01:07:09 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk3288_cru.c,v 1.2 2021/11/13 00:34:07 jmcneill Exp $ */ +/* $NetBSD: rk3288_cru.c,v 1.3 2021/11/13 01:07:09 jmcneill Exp $ */ /*- * Copyright (c) 2021 Jared McNeill @@ -28,7 +28,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.2 2021/11/13 00:34:07 jmcneill Exp $"); +__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.3 2021/11/13 01:07:09 jmcneill Exp $"); #include #include @@ -240,7 +240,7 @@ static struct rk_cru_clk rk3288_cru_clks __BIT(4), /* gate_mask */ 0), - RK_DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLKSEL_CON(1), __BITS(3,0), 0), + RK_DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLKSEL_CON(1), __BITS(2,0), 0), RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0), RK_DIV(0, "pclk_pd_alive", "gpll", CLKSEL_CON(33), __BITS(12,8), 0),
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 01:07:09 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: Fix width of aclk_cpu_pre divider field To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk3288_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:34:07 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: rk3288: add watchdog and rng clocks To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3288_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk3288_cru.c diff -u src/sys/arch/arm/rockchip/rk3288_cru.c:1.1 src/sys/arch/arm/rockchip/rk3288_cru.c:1.2 --- src/sys/arch/arm/rockchip/rk3288_cru.c:1.1 Fri Nov 12 22:02:08 2021 +++ src/sys/arch/arm/rockchip/rk3288_cru.c Sat Nov 13 00:34:07 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk3288_cru.c,v 1.1 2021/11/12 22:02:08 jmcneill Exp $ */ +/* $NetBSD: rk3288_cru.c,v 1.2 2021/11/13 00:34:07 jmcneill Exp $ */ /*- * Copyright (c) 2021 Jared McNeill @@ -28,7 +28,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.1 2021/11/12 22:02:08 jmcneill Exp $"); +__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.2 2021/11/13 00:34:07 jmcneill Exp $"); #include #include @@ -102,6 +102,12 @@ static struct rk_cru_clk rk3288_cru_clks __BIT(15), /* mux_mask */ __BITS(7,3), /* div_mask */ 0), + RK_COMPOSITE_NOMUX(RK3288_ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", + CLKSEL_CON(1), /* div_reg */ + __BITS(9,8), /* div_mask */ + CLKGATE_CON(0), /* gate_reg */ + __BIT(4), /* gate_mask */ + 0), RK_COMPOSITE_NOMUX(RK3288_PCLK_CPU, "pclk_cpu", "aclk_cpu_pre", CLKSEL_CON(1), /* div_reg */ __BITS(14,12), /* div_mask */ @@ -226,6 +232,14 @@ static struct rk_cru_clk rk3288_cru_clks __BIT(5), /* gate_mask */ 0), + /* Crypto */ + RK_COMPOSITE_NOMUX(RK3288_SCLK_CRYPTO, "crypto", "aclk_cpu_pre", + CLKSEL_CON(26), /* div_reg */ + __BITS(7,6), /* div_mask */ + CLKGATE_CON(5), /* gate_reg */ + __BIT(4), /* gate_mask */ + 0), + RK_DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLKSEL_CON(1), __BITS(3,0), 0), RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0), RK_DIV(0, "pclk_pd_alive", "gpll", CLKSEL_CON(33), __BITS(12,8), 0), @@ -238,6 +252,7 @@ static struct rk_cru_clk rk3288_cru_clks RK_MUX(0, "uart_src", mux_2plls_parents, CLKSEL_CON(15), __BIT(15)), RK_MUX(RK3288_SCLK_MAC, "mac_clk", mac_parents, CLKSEL_CON(21), __BIT(4)), + RK_GATE(RK3288_ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", CLKGATE_CON(0), 3), RK_GATE(0, "gpll_aclk_cpu", "gpll", CLKGATE_CON(0), 10), RK_GATE(0, "cpll_aclk_cpu", "cpll", CLKGATE_CON(0), 11), RK_GATE(RK3288_ACLK_PERI, "aclk_peri", "aclk_peri_src", CLKGATE_CON(2), 1), @@ -260,6 +275,9 @@ static struct rk_cru_clk rk3288_cru_clks RK_GATE(RK3288_HCLK_EMMC, "hclk_emmc", "hclk_peri", CLKGATE_CON(8), 6), RK_GATE(RK3288_PCLK_I2C0, "pclk_i2c0", "pclk_cpu", CLKGATE_CON(10), 2), RK_GATE(RK3288_PCLK_I2C2, "pclk_i2c2", "pclk_cpu", CLKGATE_CON(10), 3), + RK_GATE(RK3288_ACLK_DMAC1, "aclk_dmac1", "aclk_cpu", CLKGATE_CON(10), 12), + RK_GATE(RK3288_ACLK_CRYPTO, "aclk_crypto", "aclk_cpu", CLKGATE_CON(11), 6), + RK_GATE(RK3288_HCLK_CRYPTO, "hclk_crypto", "hclk_cpu", CLKGATE_CON(11), 7), RK_GATE(RK3288_PCLK_UART2, "pclk_uart2", "pclk_cpu", CLKGATE_CON(11), 9), RK_GATE(RK3288_SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLKGATE_CON(13), 4), RK_GATE(RK3288_SCLK_OTGPHY1, "sclk_otgphy1", "xin24m", CLKGATE_CON(13), 5), @@ -273,6 +291,7 @@ static struct rk_cru_clk rk3288_cru_clks RK_GATE(RK3288_PCLK_GPIO7, "pclk_gpio7", "pclk_pd_alive", CLKGATE_CON(14), 7), RK_GATE(RK3288_PCLK_GPIO8, "pclk_gpio8", "pclk_pd_alive", CLKGATE_CON(14), 8), RK_GATE(RK3288_PCLK_GPIO0, "pclk_gpio0", "pclk_pd_pmu", CLKGATE_CON(17), 4), + RK_SECURE_GATE(RK3288_PCLK_WDT, "pclk_wdt", "pclk_pd_alive"), }; static int
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 13 00:34:07 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_cru.c Log Message: rk3288: add watchdog and rng clocks To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3288_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Fri Nov 12 22:53:21 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk3288_iomux.c
Log Message:
Fix register accesses to PMU registers. Unlike the GRF ones, a RMW cycle
is required to update settings here.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3288_iomux.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3288_iomux.c
diff -u src/sys/arch/arm/rockchip/rk3288_iomux.c:1.1 src/sys/arch/arm/rockchip/rk3288_iomux.c:1.2
--- src/sys/arch/arm/rockchip/rk3288_iomux.c:1.1 Fri Nov 12 22:02:08 2021
+++ src/sys/arch/arm/rockchip/rk3288_iomux.c Fri Nov 12 22:53:20 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3288_iomux.c,v 1.1 2021/11/12 22:02:08 jmcneill Exp $ */
+/* $NetBSD: rk3288_iomux.c,v 1.2 2021/11/12 22:53:20 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk3288_iomux.c,v 1.1 2021/11/12 22:02:08 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk3288_iomux.c,v 1.2 2021/11/12 22:53:20 jmcneill Exp $");
#include
#include
@@ -84,6 +84,8 @@ struct rk3288_iomux_reg {
syscon_read_4((reg)->syscon, (off))
#define WR4(reg, off, val) \
syscon_write_4((reg)->syscon, (off), (val))
+#define ISPMU(sc, reg) \
+ ((reg)->syscon == (sc)->sc_pmu)
static int rk3288_iomux_match(device_t, cfdata_t, void *);
static void rk3288_iomux_attach(device_t, device_t, void *);
@@ -178,17 +180,13 @@ rk3288_iomux_set_bias(struct rk3288_iomu
return;
}
- val = GPIO_P_CTL_MASK << (reg->pull_bit + 16);
+ if (ISPMU(sc, reg)) {
+ val = RD4(reg, reg->pull_reg);
+ val &= ~(GPIO_P_CTL_MASK << reg->pull_bit);
+ } else {
+ val = GPIO_P_CTL_MASK << (reg->pull_bit + 16);
+ }
val |= p << reg->pull_bit;
-
-#ifdef RK3288_IOMUX_DEBUG
- const uint32_t oval = RD4(reg, reg->pull_reg);
- printf("%s: wr %#x -> %#x (%#x)\n", __func__,
- oval & (GPIO_P_CTL_MASK << reg->pull_bit),
- val & 0x,
- GPIO_P_CTL_MASK << reg->pull_bit);
-#endif
-
WR4(reg, reg->pull_reg, val);
}
@@ -216,8 +214,13 @@ rk3288_iomux_set_drive_strength(struct r
return;
}
- val = GPIO_E_CTL_MASK << (reg->drv_bit + 16);
- val |= e << reg->drv_bit;
+ if (ISPMU(sc, reg)) {
+ val = RD4(reg, reg->drv_reg);
+ val &= ~(GPIO_E_CTL_MASK << reg->drv_bit);
+ } else {
+ val = GPIO_E_CTL_MASK << (reg->drv_bit + 16);
+ }
+ val = e << reg->drv_bit;
WR4(reg, reg->drv_reg, val);
}
@@ -229,9 +232,14 @@ rk3288_iomux_set_mux(struct rk3288_iomux
KASSERT(reg->mux_reg != -1);
- val = ((reg->flags & IOMUX_4BIT) ? 0xf : 0x3) << (reg->mux_bit + 16);
+ const uint32_t mask = (reg->flags & IOMUX_4BIT) ? 0xf : 0x3;
+ if (ISPMU(sc, reg)) {
+ val = RD4(reg, reg->mux_reg);
+ val &= ~(mask << reg->mux_bit);
+ } else {
+ val = mask << (reg->mux_bit + 16);
+ }
val |= mux << reg->mux_bit;
-
WR4(reg, reg->mux_reg, val);
}
@@ -254,14 +262,6 @@ rk3288_iomux_config(struct rk3288_iomux_
printf(" bias %d drv %d mux %u\n", bias, drv, mux);
#endif
- /* XXX
- * ASUS Tinkerboard goes nuts if we update any PMU bias fields.
- * Skip them until we figure out why.
- */
- if (reg->syscon == sc->sc_pmu) {
- bias = -1;
- }
-
LOCK(reg);
if (bias != -1) {
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Fri Nov 12 22:53:21 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk3288_iomux.c Log Message: Fix register accesses to PMU registers. Unlike the GRF ones, a RMW cycle is required to update settings here. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk3288_iomux.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Re: CVS commit: src/sys/arch/arm/rockchip
Oops. The change was to make sure that a devicetree node with a "rockchip,grf" property on a device type that doesn't provide a config struct doesn't deref a NULL ptr. On Fri, 1 Jan 2021, Jared D. McNeill wrote: Module Name:src Committed By: jmcneill Date: Fri Jan 1 11:44:41 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_i2s.c Log Message: rk_i2s.c To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_i2s.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jakllsch Date: Fri Nov 29 15:24:22 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c Log Message: add RK3399 DisplayPort clocks To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/rockchip/rk3399_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jakllsch
Date: Fri Nov 29 15:24:22 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c
Log Message:
add RK3399 DisplayPort clocks
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/rockchip/rk3399_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.15 src/sys/arch/arm/rockchip/rk3399_cru.c:1.16
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.15 Fri Nov 29 15:20:28 2019
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Fri Nov 29 15:24:21 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.15 2019/11/29 15:20:28 jakllsch Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.16 2019/11/29 15:24:21 jakllsch Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.15 2019/11/29 15:20:28 jakllsch Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.16 2019/11/29 15:24:21 jakllsch Exp $");
#include
#include
@@ -353,6 +353,7 @@ static const char * mux_pll_src_cpll_gpl
static const char * mux_pll_src_cpll_gpll_upll_parents[] = { "cpll", "gpll", "upll" };
static const char * mux_pll_src_cpll_gpll_npll_24m_parents[] = { "cpll", "gpll", "npll", "xin24m" };
static const char * mux_pll_src_cpll_gpll_npll_ppll_upll_24m_parents[] = { "cpll", "gpll", "npll", "ppll", "upll", "xin24m" };
+static const char * mux_pll_src_npll_cpll_gpll_parents[] = { "npll", "cpll", "gpll" };
static const char * mux_pll_src_vpll_cpll_gpll_parents[] = { "vpll", "cpll", "gpll" };
static const char * mux_pll_src_vpll_cpll_gpll_npll_parents[] = { "vpll", "cpll", "gpll", "npll" };
static const char * mux_aclk_perilp0_parents[] = { "cpll_aclk_perilp0_src", "gpll_aclk_perilp0_src" };
@@ -1005,6 +1006,15 @@ static struct rk_cru_clk rk3399_cru_clks
RK_GATE(RK3399_PCLK_EDP_NOC, "pclk_edp_noc", "pclk_edp", CLKGATE_CON(32), 12),
RK_GATE(RK3399_PCLK_EDP_CTRL, "pclk_edp_ctrl", "pclk_edp", CLKGATE_CON(32), 13),
+ RK_COMPOSITE(RK3399_SCLK_DP_CORE, "clk_dp_core", mux_pll_src_npll_cpll_gpll_parents,
+ CLKSEL_CON(46), /* muxdiv_reg */
+ __BITS(7,6), /* mux_mask */
+ __BITS(4,0), /* div_mask */
+ CLKGATE_CON(11), /* gate_reg */
+ __BIT(8), /* gate_mask */
+ 0),
+ RK_GATE(RK3399_PCLK_DP_CTRL, "pclk_dp_ctrl", "pclk_hdcp", CLKGATE_CON(29), 7),
+
};
static const struct rk3399_init_param {
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jakllsch Date: Fri Nov 29 15:20:28 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c Log Message: add RK3399 eDP clocks To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk3399_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jakllsch
Date: Fri Nov 29 15:20:28 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c
Log Message:
add RK3399 eDP clocks
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk3399_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.14 src/sys/arch/arm/rockchip/rk3399_cru.c:1.15
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.14 Fri Nov 29 15:00:20 2019
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Fri Nov 29 15:20:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.14 2019/11/29 15:00:20 jakllsch Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.15 2019/11/29 15:20:28 jakllsch Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.14 2019/11/29 15:00:20 jakllsch Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.15 2019/11/29 15:20:28 jakllsch Exp $");
#include
#include
@@ -993,6 +993,18 @@ static struct rk_cru_clk rk3399_cru_clks
CLKGATE_CON(8), /* gate_reg */
__BIT(12), /* gate_mask */
RK_COMPOSITE_SET_RATE_PARENT),
+
+ /* eDP */
+ RK_COMPOSITE(RK3399_PCLK_EDP, "pclk_edp", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(44), /* muxdiv_reg */
+ __BIT(15), /* mux_mask */
+ __BITS(13,8), /* div_mask */
+ CLKGATE_CON(11), /* gate_reg */
+ __BIT(11), /* gate_mask */
+ 0),
+ RK_GATE(RK3399_PCLK_EDP_NOC, "pclk_edp_noc", "pclk_edp", CLKGATE_CON(32), 12),
+ RK_GATE(RK3399_PCLK_EDP_CTRL, "pclk_edp_ctrl", "pclk_edp", CLKGATE_CON(32), 13),
+
};
static const struct rk3399_init_param {
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jakllsch
Date: Fri Nov 29 15:00:20 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c
Log Message:
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/rockchip/rk3399_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.13 src/sys/arch/arm/rockchip/rk3399_cru.c:1.14
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.13 Sat Nov 16 13:23:13 2019
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Fri Nov 29 15:00:20 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.13 2019/11/16 13:23:13 jmcneill Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.14 2019/11/29 15:00:20 jakllsch Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.13 2019/11/16 13:23:13 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.14 2019/11/29 15:00:20 jakllsch Exp $");
#include
#include
@@ -349,7 +349,7 @@ static const char * armclkb_parents[] =
static const char * mux_clk_tsadc_parents[] = { "xin24m", "xin32k" };
static const char * mux_pll_src_cpll_gpll_parents[] = { "cpll", "gpll" };
static const char * mux_pll_src_cpll_gpll_npll_parents[] = { "cpll", "gpll", "npll" };
-static const char * mux_pll_src_cpll_gpll_ppll_parents[] = { "cpll", "gpll", "npll" };
+static const char * mux_pll_src_cpll_gpll_ppll_parents[] = { "cpll", "gpll", "ppll" };
static const char * mux_pll_src_cpll_gpll_upll_parents[] = { "cpll", "gpll", "upll" };
static const char * mux_pll_src_cpll_gpll_npll_24m_parents[] = { "cpll", "gpll", "npll", "xin24m" };
static const char * mux_pll_src_cpll_gpll_npll_ppll_upll_24m_parents[] = { "cpll", "gpll", "npll", "ppll", "upll", "xin24m" };
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jakllsch Date: Fri Nov 29 15:00:20 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c Log Message: fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[] To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/rockchip/rk3399_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Fri Nov 29 00:36:22 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_pcie.c Log Message: Do not crash if the optional vpcie3v3-supply property is missing or the regulator can not be found. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk3399_pcie.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Fri Nov 29 00:36:22 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_pcie.c
Log Message:
Do not crash if the optional vpcie3v3-supply property is missing or the
regulator can not be found.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk3399_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_pcie.c
diff -u src/sys/arch/arm/rockchip/rk3399_pcie.c:1.6 src/sys/arch/arm/rockchip/rk3399_pcie.c:1.7
--- src/sys/arch/arm/rockchip/rk3399_pcie.c:1.6 Sun Jun 23 16:15:43 2019
+++ src/sys/arch/arm/rockchip/rk3399_pcie.c Fri Nov 29 00:36:22 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_pcie.c,v 1.6 2019/06/23 16:15:43 jmcneill Exp $ */
+/* $NetBSD: rk3399_pcie.c,v 1.7 2019/11/29 00:36:22 jmcneill Exp $ */
/*
* Copyright (c) 2018 Mark Kettenis
*
@@ -17,7 +17,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.6 2019/06/23 16:15:43 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.7 2019/11/29 00:36:22 jmcneill Exp $");
#include
#include
@@ -241,8 +241,10 @@ rkpcie_attach(device_t parent, device_t
struct fdtbus_regulator *regulator;
regulator = fdtbus_regulator_acquire(phandle, "vpcie3v3-supply");
- fdtbus_regulator_enable(regulator);
- fdtbus_regulator_release(regulator);
+ if (regulator != NULL) {
+ fdtbus_regulator_enable(regulator);
+ fdtbus_regulator_release(regulator);
+ }
fdtbus_clock_assign(phandle);
clock_enable_all(phandle);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 16 13:25:33 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_dwhdmi.c Log Message: Add audio support To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk_dwhdmi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sat Nov 16 13:25:33 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_dwhdmi.c
Log Message:
Add audio support
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk_dwhdmi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_dwhdmi.c
diff -u src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.2 src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.3
--- src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.2 Sun Nov 10 12:07:50 2019
+++ src/sys/arch/arm/rockchip/rk_dwhdmi.c Sat Nov 16 13:25:33 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_dwhdmi.c,v 1.2 2019/11/10 12:07:50 jmcneill Exp $ */
+/* $NetBSD: rk_dwhdmi.c,v 1.3 2019/11/16 13:25:33 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_dwhdmi.c,v 1.2 2019/11/10 12:07:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_dwhdmi.c,v 1.3 2019/11/16 13:25:33 jmcneill Exp $");
#include
#include
@@ -194,6 +194,21 @@ rk_dwhdmi_mode_set(struct dwhdmi_softc *
dwhdmi_phy_mode_set(dsc, mode, adjusted_mode);
}
+static audio_dai_tag_t
+rk_dwhdmi_dai_get_tag(device_t dev, const void *data, size_t len)
+{
+ struct rk_dwhdmi_softc * const sc = device_private(dev);
+
+ if (len != 4)
+ return NULL;
+
+ return &sc->sc_base.sc_dai;
+}
+
+static struct fdtbus_dai_controller_func rk_dwhdmi_dai_funcs = {
+ .get_tag = rk_dwhdmi_dai_get_tag
+};
+
static int
rk_dwhdmi_match(device_t parent, cfdata_t cf, void *aux)
{
@@ -287,6 +302,8 @@ rk_dwhdmi_attach(device_t parent, device
sc->sc_ports.dp_ep_activate = rk_dwhdmi_ep_activate;
sc->sc_ports.dp_ep_get_data = rk_dwhdmi_ep_get_data;
fdt_ports_register(&sc->sc_ports, self, phandle, EP_DRM_BRIDGE);
+
+ fdtbus_register_dai_controller(self, phandle, &rk_dwhdmi_dai_funcs);
}
CFATTACH_DECL_NEW(rk_dwhdmi, sizeof(struct rk_dwhdmi_softc),
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 16 13:24:03 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: files.rockchip Added Files: src/sys/arch/arm/rockchip: rk_i2s.c Log Message: Add driver for Rockchip I2S/PCM controller. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/rockchip/files.rockchip cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/rockchip/rk_i2s.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 16 13:24:03 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: files.rockchip Added Files: src/sys/arch/arm/rockchip: rk_i2s.c Log Message: Add driver for Rockchip I2S/PCM controller. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/rockchip/files.rockchip cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/rockchip/rk_i2s.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/files.rockchip diff -u src/sys/arch/arm/rockchip/files.rockchip:1.21 src/sys/arch/arm/rockchip/files.rockchip:1.22 --- src/sys/arch/arm/rockchip/files.rockchip:1.21 Sat Nov 9 23:30:14 2019 +++ src/sys/arch/arm/rockchip/files.rockchip Sat Nov 16 13:24:03 2019 @@ -1,4 +1,4 @@ -# $NetBSD: files.rockchip,v 1.21 2019/11/09 23:30:14 jmcneill Exp $ +# $NetBSD: files.rockchip,v 1.22 2019/11/16 13:24:03 jmcneill Exp $ # # Configuration info for Rockchip family SoCs # @@ -103,6 +103,11 @@ file arch/arm/rockchip/rk_vop.c rk_vop attach dwhdmi at fdt with rk_dwhdmi file arch/arm/rockchip/rk_dwhdmi.c rk_dwhdmi +# I2S/PCM controller +device rki2s +attach rki2s at fdt with rk_i2s +filearch/arm/rockchip/rk_i2s.c rk_i2s + # SOC parameters defflag opt_soc.h SOC_ROCKCHIP defflag opt_soc.h SOC_RK3328: SOC_ROCKCHIP Added files: Index: src/sys/arch/arm/rockchip/rk_i2s.c diff -u /dev/null src/sys/arch/arm/rockchip/rk_i2s.c:1.1 --- /dev/null Sat Nov 16 13:24:03 2019 +++ src/sys/arch/arm/rockchip/rk_i2s.c Sat Nov 16 13:24:03 2019 @@ -0,0 +1,638 @@ +/* $NetBSD: rk_i2s.c,v 1.1 2019/11/16 13:24:03 jmcneill Exp $ */ + +/*- + * Copyright (c) 2019 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__KERNEL_RCSID(0, "$NetBSD: rk_i2s.c,v 1.1 2019/11/16 13:24:03 jmcneill Exp $"); + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#define RK_I2S_FIFO_DEPTH 32 +#define RK_I2S_SAMPLE_RATE 48000 + +#define I2S_TXCR 0x00 +#define TXCR_RCNT __BITS(22,17) +#define TXCR_TCSR __BITS(16,15) +#define TXCR_HWT __BIT(14) +#define TXCR_SJM __BIT(12) +#define TXCR_FBM __BIT(11) +#define TXCR_IBM __BITS(10,9) +#define TXCR_PBM __BITS(8,7) +#define TXCR_TFS __BIT(5) +#define TXCR_VDW __BITS(4,0) +#define I2S_RXCR 0x04 +#define RXCR_RCSR __BITS(16,15) +#define RXCR_HWT __BIT(14) +#define RXCR_SJM __BIT(12) +#define RXCR_FBM __BIT(11) +#define RXCR_IBM __BITS(10,9) +#define RXCR_PBM __BITS(8,7) +#define RXCR_TFS __BIT(5) +#define RXCR_VDW __BITS(4,0) +#define I2S_CKR 0x08 +#define CKR_TRCM __BITS(29,28) +#define CKR_MSS __BIT(27) +#define CKR_CKP __BIT(26) +#define CKR_RLP __BIT(25) +#define CKR_TLP __BIT(24) +#define CKR_MDIV __BITS(23,16) +#define CKR_RSD __BITS(15,8) +#define CKR_TSD __BITS(7,0) +#define I2S_TXFIFOLR 0x0c +#define TXFIFOLR_TFL(n) __BITS((n) * 6 + 5, (n) * 6) +#define I2S_DMACR 0x10 +#define DMACR_RDE __BIT(24) +#define DMACR_RDL __BITS(20,16) +#define DMACR_TDE __BIT(8) +#define DMACR_TDL __BITS(4,0) +#define I2S_INTCR 0x14 +#define INTCR_RFT __BITS(24,20) +#define INTCR_RXOIC __BIT(18) +#define INTCR_RXOIE __BIT(17) +#define INTCR_RXFIE __BIT(16) +#define INTCR_TFT __BITS(8,4) +#define INTCR_TXUIC __BIT(2) +#define INTCR_TXUIE __BIT(1) +#define INTCR_TXEIE __BIT(0) +#define I2S_INTSR 0x18 +#define INTSR_RXOI __BIT(17) +#define INTSR_RXFI __BIT(16) +#define INTSR_TXUI __BIT(1) +#define INTSR_TXEI __BIT(0) +#define I2S_XFER 0x1c +#define XFER_RXS __BIT(1) +#define XFER_
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 16 13:23:13 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_composite.c Log Message: Add support for I2S clocks. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/rockchip/rk3399_cru.c cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_cru.h cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_cru_composite.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sat Nov 16 13:23:13 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_composite.c
Log Message:
Add support for I2S clocks.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/rockchip/rk3399_cru.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_cru.h
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_cru_composite.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.12 src/sys/arch/arm/rockchip/rk3399_cru.c:1.13
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.12 Sun Nov 10 11:43:04 2019
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Sat Nov 16 13:23:13 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.12 2019/11/10 11:43:04 jmcneill Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.13 2019/11/16 13:23:13 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.12 2019/11/10 11:43:04 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.13 2019/11/16 13:23:13 jmcneill Exp $");
#include
#include
@@ -361,6 +361,11 @@ static const char * mux_aclk_perihp_pare
static const char * mux_aclk_cci_parents[] = { "cpll_aclk_cci_src", "gpll_aclk_cci_src", "npll_aclk_cci_src", "vpll_aclk_cci_src" };
static const char * mux_dclk_vop0_parents[] = { "dclk_vop0_div", "dclk_vop0_frac" };
static const char * mux_dclk_vop1_parents[] = { "dclk_vop1_div", "dclk_vop1_frac" };
+static const char * mux_i2s0_parents[] = { "clk_i2s0_div", "clk_i2s0_frac", "clkin_i2s", "xin12m" };
+static const char * mux_i2s1_parents[] = { "clk_i2s1_div", "clk_i2s1_frac", "clkin_i2s", "xin12m" };
+static const char * mux_i2s2_parents[] = { "clk_i2s2_div", "clk_i2s2_frac", "clkin_i2s", "xin12m" };
+static const char * mux_i2sch_parents[] = { "clk_i2s0", "clk_i2s1", "clk_i2s2" };
+static const char * mux_i2sout_parents[] = { "clk_i2sout_src", "xin12m" };
static const char * mux_uart0_parents[] = { "clk_uart0_div", "clk_uart0_frac", "xin24m" };
static const char * mux_uart1_parents[] = { "clk_uart1_div", "clk_uart1_frac", "xin24m" };
static const char * mux_uart2_parents[] = { "clk_uart2_div", "clk_uart2_frac", "xin24m" };
@@ -939,13 +944,73 @@ static struct rk_cru_clk rk3399_cru_clks
0),
RK_GATE(RK3399_PCLK_HDMI_CTRL, "pclk_hdmi_ctrl", "pclk_hdcp", CLKGATE_CON(29), 6),
RK_GATE(RK3399_SCLK_HDMI_SFR, "clk_hdmi_sfr", "xin24m", CLKGATE_CON(11), 6),
+
+ /* I2S2 */
+ RK_COMPOSITE(0, "clk_i2s0_div", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(28), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(8), /* gate_reg */
+ __BIT(3), /* gate_mask */
+ 0),
+ RK_COMPOSITE(0, "clk_i2s1_div", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(29), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(8), /* gate_reg */
+ __BIT(6), /* gate_mask */
+ 0),
+ RK_COMPOSITE(0, "clk_i2s2_div", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(30), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(8), /* gate_reg */
+ __BIT(9), /* gate_mask */
+ 0),
+ RK_COMPOSITE_FRAC(0, "clk_i2s0_frac", "clk_i2s0_div",
+ CLKSEL_CON(96), /* frac_reg */
+ 0),
+ RK_COMPOSITE_FRAC(0, "clk_i2s1_frac", "clk_i2s1_div",
+ CLKSEL_CON(97), /* frac_reg */
+ 0),
+ RK_COMPOSITE_FRAC(0, "clk_i2s2_frac", "clk_i2s2_div",
+ CLKSEL_CON(98), /* frac_reg */
+ 0),
+ RK_MUX(0, "clk_i2s0_mux", mux_i2s0_parents, CLKSEL_CON(28), __BITS(9,8)),
+ RK_MUX(0, "clk_i2s1_mux", mux_i2s1_parents, CLKSEL_CON(29), __BITS(9,8)),
+ RK_MUX(0, "clk_i2s2_mux", mux_i2s2_parents, CLKSEL_CON(30), __BITS(9,8)),
+ RK_GATE(RK3399_SCLK_I2S0_8CH, "clk_i2s0", "clk_i2s0_mux", CLKGATE_CON(8), 5),
+ RK_GATE(RK3399_SCLK_I2S1_8CH, "clk_i2s1", "clk_i2s1_mux", CLKGATE_CON(8), 8),
+ RK_GATE(RK3399_SCLK_I2S2_8CH, "clk_i2s2", "clk_i2s2_mux", CLKGATE_CON(8), 11),
+ RK_GATE(RK3399_HCLK_I2S0_8CH, "hclk_i2s0", "hclk_perilp1", CLKGATE_CON(34), 0),
+ RK_GATE(RK3399_HCLK_I2S1_8CH, "hclk_i2s1", "hclk_perilp1", CLKGATE_CON(34), 1),
+ RK_GATE(RK3399_HCLK_I2S2_8CH, "hclk_i2s2", "hclk_perilp1", CLKGATE_CON(34), 2),
+ RK_MUX(0, "clk_i2sout_src", mux_i2sch_parents, CLKSEL_CON(31), __BITS(1,0)),
+ RK_COMPOSITE(RK3399_SCLK_I2S_8CH_OUT, "clk_i2sout", mux_i2sout_parents,
+ CLKSEL_CON(31), /* muxdiv_reg */
+ __BIT(2), /* mux_mask */
+ 0, /* div_mask */
+ CLKGATE_CON(8), /* gate_reg */
+ __BIT(12), /* gate_mask */
+ RK_COMPOSITE_SET_RATE_PARENT),
+};
+
+static const struct rk3399_init_param {
+ const char *clk;
+ const char *parent;
+} rk3399_init_params[] = {
+ { .clk = "clk_i2s0_mux", .parent
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Thu Nov 14 20:39:46 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c
Log Message:
Remove debug output
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_drm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.1 src/sys/arch/arm/rockchip/rk_drm.c:1.2
--- src/sys/arch/arm/rockchip/rk_drm.c:1.1 Sat Nov 9 23:30:14 2019
+++ src/sys/arch/arm/rockchip/rk_drm.c Thu Nov 14 20:39:46 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $ */
+/* $NetBSD: rk_drm.c,v 1.2 2019/11/14 20:39:46 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.2 2019/11/14 20:39:46 jmcneill Exp $");
#include
#include
@@ -134,8 +134,6 @@ rk_drm_attach(device_t parent, device_t
sc->sc_bst = faa->faa_bst;
sc->sc_phandle = faa->faa_phandle;
- drm_debug = 0xff;
-
aprint_naive("\n");
if (prop_dictionary_get_bool(dict, "disabled", &is_disabled) && is_disabled) {
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Thu Nov 14 20:39:46 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: Remove debug output To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Thu Nov 14 20:31:50 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_vop.c Log Message: Fix a few swapped fields To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_vop.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk_vop.c diff -u src/sys/arch/arm/rockchip/rk_vop.c:1.1 src/sys/arch/arm/rockchip/rk_vop.c:1.2 --- src/sys/arch/arm/rockchip/rk_vop.c:1.1 Sat Nov 9 23:30:14 2019 +++ src/sys/arch/arm/rockchip/rk_vop.c Thu Nov 14 20:31:50 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: rk_vop.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $ */ +/* $NetBSD: rk_vop.c,v 1.2 2019/11/14 20:31:50 jmcneill Exp $ */ /*- * Copyright (c) 2019 Jared D. McNeill @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1.2 2019/11/14 20:31:50 jmcneill Exp $"); #include #include @@ -90,14 +90,14 @@ __KERNEL_RCSID(0, "$NetBSD: rk_vop.c,v 1 #define DSP_VACT_ST_POST __BITS(28,16) #define DSP_VACT_END_POST __BITS(12,0) #define VOP_DSP_HTOTAL_HS_END 0x0188 -#define DSP_HTOTAL __BITS(28,16) -#define DSP_HS_END __BITS(12,0) +#define DSP_HS_END __BITS(28,16) +#define DSP_HTOTAL __BITS(12,0) #define VOP_DSP_HACT_ST_END 0x018c #define DSP_HACT_ST __BITS(28,16) #define DSP_HACT_END __BITS(12,0) #define VOP_DSP_VTOTAL_VS_END 0x0190 -#define DSP_VTOTAL __BITS(28,16) -#define DSP_VS_END __BITS(12,0) +#define DSP_VS_END __BITS(28,16) +#define DSP_VTOTAL __BITS(12,0) #define VOP_DSP_VACT_ST_END 0x0194 #define DSP_VACT_ST __BITS(28,16) #define DSP_VACT_END __BITS(12,0) @@ -306,8 +306,8 @@ rk_vop_mode_set(struct drm_crtc *crtc, s __SHIFTIN(vactive - 1, WIN0_DSP_HEIGHT); WR4(sc, VOP_WIN0_DSP_INFO, val); - val = __SHIFTIN(hsync_len + hback_porch, WIN0_DSP_YST) | - __SHIFTIN(vsync_len + vback_porch, WIN0_DSP_XST); + val = __SHIFTIN(hsync_len + hback_porch, WIN0_DSP_XST) | + __SHIFTIN(vsync_len + vback_porch, WIN0_DSP_YST); WR4(sc, VOP_WIN0_DSP_ST, val); WR4(sc, VOP_WIN0_COLOR_KEY, 0);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Thu Nov 14 20:31:50 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_vop.c Log Message: Fix a few swapped fields To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_vop.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sun Nov 10 12:07:51 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_dwhdmi.c
Log Message:
Fix typo in phy config table
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_dwhdmi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_dwhdmi.c
diff -u src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.1 src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.2
--- src/sys/arch/arm/rockchip/rk_dwhdmi.c:1.1 Sat Nov 9 23:30:14 2019
+++ src/sys/arch/arm/rockchip/rk_dwhdmi.c Sun Nov 10 12:07:50 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_dwhdmi.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $ */
+/* $NetBSD: rk_dwhdmi.c,v 1.2 2019/11/10 12:07:50 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_dwhdmi.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_dwhdmi.c,v 1.2 2019/11/10 12:07:50 jmcneill Exp $");
#include
#include
@@ -64,7 +64,7 @@ static const struct dwhdmi_phy_config rk
{ 74250, 0x8009, 0x0004, 0x0272 },
{ 148500, 0x802b, 0x0004, 0x028d },
{ 297000, 0x8039, 0x0005, 0x028d },
- { 584000, 0x8039, 0x, 0x019d },
+ { 594000, 0x8039, 0x, 0x019d },
{ 0, 0x, 0x, 0x }
};
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sun Nov 10 12:07:51 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_dwhdmi.c Log Message: Fix typo in phy config table To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_dwhdmi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sun Nov 10 11:43:04 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_composite.c
Log Message:
Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL
rates.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk3399_cru.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_cru.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk_cru_composite.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.11 src/sys/arch/arm/rockchip/rk3399_cru.c:1.12
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.11 Sat Nov 9 23:29:48 2019
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Sun Nov 10 11:43:04 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.11 2019/11/09 23:29:48 jmcneill Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.12 2019/11/10 11:43:04 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.11 2019/11/09 23:29:48 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.12 2019/11/10 11:43:04 jmcneill Exp $");
#include
#include
@@ -271,20 +271,21 @@ rk3399_cru_pll_set_rate(struct rk_cru_so
struct rk_cru_pll *pll = &clk->u.pll;
const struct rk_cru_pll_rate *pll_rate = NULL;
uint32_t val;
- int retry;
+ int retry, best_diff;
KASSERT(clk->type == RK_CRU_PLL);
if (pll->rates == NULL || rate == 0)
return EIO;
- for (int i = 0; i < pll->nrates; i++)
- if (pll->rates[i].rate == rate) {
+ best_diff = INT_MAX;
+ for (int i = 0; i < pll->nrates; i++) {
+ const int diff = (int)rate - (int)pll->rates[i].rate;
+ if (abs(diff) < best_diff) {
pll_rate = &pll->rates[i];
- break;
+ best_diff = abs(diff);
}
- if (pll_rate == NULL)
- return EINVAL;
+ }
val = __SHIFTIN(PLL_WORK_MODE_SLOW, PLL_WORK_MODE) | (PLL_WORK_MODE << 16);
CRU_WRITE(sc, pll->con_base + PLL_CON3, val);
@@ -869,7 +870,7 @@ static struct rk_cru_clk rk3399_cru_clks
__BITS(7,0), /* div_mask */
CLKGATE_CON(10), /* gate_reg */
__BIT(12), /* gate_mask */
- 0),
+ RK_COMPOSITE_SET_RATE_PARENT),
RK_GATE(RK3399_ACLK_VOP0, "aclk_vop0", "aclk_vop0_pre", CLKGATE_CON(28), 3),
RK_GATE(RK3399_HCLK_VOP0, "hclk_vop0", "hclk_vop0_pre", CLKGATE_CON(28), 2),
RK_MUX(RK3399_DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_parents, CLKSEL_CON(49), __BIT(11)),
@@ -894,7 +895,7 @@ static struct rk_cru_clk rk3399_cru_clks
__BITS(7,0), /* div_mask */
CLKGATE_CON(10), /* gate_reg */
__BIT(13), /* gate_mask */
- 0),
+ RK_COMPOSITE_SET_RATE_PARENT),
RK_GATE(RK3399_ACLK_VOP1, "aclk_vop1", "aclk_vop1_pre", CLKGATE_CON(28), 7),
RK_GATE(RK3399_HCLK_VOP1, "hclk_vop1", "hclk_vop1_pre", CLKGATE_CON(28), 6),
RK_MUX(RK3399_DCLK_VOP1, "dclk_vop1", mux_dclk_vop1_parents, CLKSEL_CON(50), __BIT(11)),
@@ -944,12 +945,21 @@ static void
rk3399_cru_init(struct rk_cru_softc *sc)
{
struct rk_cru_clk *clk;
+ uint32_t write_mask, write_val;
/*
* Force an update of BPLL to bring it out of slow mode.
*/
clk = rk_cru_clock_find(sc, "armclkb");
clk_set_rate(&clk->base, clk_get_rate(&clk->base));
+
+ /*
+ * Set DCLK_VOP0 and DCLK_VOP1 dividers to 1.
+ */
+ write_mask = __BITS(7,0) << 16;
+ write_val = 0;
+ CRU_WRITE(sc, CLKSEL_CON(49), write_mask | write_val);
+ CRU_WRITE(sc, CLKSEL_CON(50), write_mask | write_val);
}
static int
Index: src/sys/arch/arm/rockchip/rk_cru.h
diff -u src/sys/arch/arm/rockchip/rk_cru.h:1.5 src/sys/arch/arm/rockchip/rk_cru.h:1.6
--- src/sys/arch/arm/rockchip/rk_cru.h:1.5 Sat Oct 19 12:55:21 2019
+++ src/sys/arch/arm/rockchip/rk_cru.h Sun Nov 10 11:43:04 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru.h,v 1.5 2019/10/19 12:55:21 tnn Exp $ */
+/* $NetBSD: rk_cru.h,v 1.6 2019/11/10 11:43:04 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -204,6 +204,7 @@ struct rk_cru_composite {
u_int nparents;
u_int flags;
#define RK_COMPOSITE_ROUND_DOWN 0x01
+#define RK_COMPOSITE_SET_RATE_PARENT 0x02
};
int rk_cru_composite_enable(struct rk_cru_softc *, struct rk_cru_clk *, int);
Index: src/sys/arch/arm/rockchip/rk_cru_composite.c
diff -u src/sys/arch/arm/rockchip/rk_cru_composite.c:1.3 src/sys/arch/arm/rockchip/rk_cru_composite.c:1.4
--- src/sys/arch/arm/rockchip/rk_cru_composite.c:1.3 Tue Jun 19 01:24:17 2018
+++ src/sys/arch/arm/rockchip/rk_cru_composite.c Sun Nov 10 11:43:04 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru_composite.c,v 1.3 2018/06/19 01:24:17 jmcneill Exp $ */
+/* $NetBSD: rk_cru_composite.c,v 1.4 2019/11/10 11:43:04 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_cru_composite.c,v 1.3 2018/06/19 01:24:17 jmcneill Exp $");
+__KERNEL_RCSID(
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sun Nov 10 11:43:04 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h rk_cru_composite.c Log Message: Force DCLK_VOP0/1 dividers to 1 and select closest match when setting PLL rates. To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk3399_cru.c cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_cru.h cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk_cru_composite.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 9 23:30:14 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: files.rockchip Added Files: src/sys/arch/arm/rockchip: rk_drm.c rk_drm.h rk_dwhdmi.c rk_fb.c rk_vop.c Log Message: WIP display driver for Rockchip RK3399 To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/files.rockchip cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/rockchip/rk_drm.c \ src/sys/arch/arm/rockchip/rk_drm.h src/sys/arch/arm/rockchip/rk_dwhdmi.c \ src/sys/arch/arm/rockchip/rk_fb.c src/sys/arch/arm/rockchip/rk_vop.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sat Nov 9 23:30:14 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: files.rockchip
Added Files:
src/sys/arch/arm/rockchip: rk_drm.c rk_drm.h rk_dwhdmi.c rk_fb.c
rk_vop.c
Log Message:
WIP display driver for Rockchip RK3399
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/files.rockchip
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/rockchip/rk_drm.c \
src/sys/arch/arm/rockchip/rk_drm.h src/sys/arch/arm/rockchip/rk_dwhdmi.c \
src/sys/arch/arm/rockchip/rk_fb.c src/sys/arch/arm/rockchip/rk_vop.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/files.rockchip
diff -u src/sys/arch/arm/rockchip/files.rockchip:1.20 src/sys/arch/arm/rockchip/files.rockchip:1.21
--- src/sys/arch/arm/rockchip/files.rockchip:1.20 Mon Aug 5 15:22:59 2019
+++ src/sys/arch/arm/rockchip/files.rockchip Sat Nov 9 23:30:14 2019
@@ -1,4 +1,4 @@
-# $NetBSD: files.rockchip,v 1.20 2019/08/05 15:22:59 tnn Exp $
+# $NetBSD: files.rockchip,v 1.21 2019/11/09 23:30:14 jmcneill Exp $
#
# Configuration info for Rockchip family SoCs
#
@@ -83,6 +83,26 @@ device rkpwm: pwm
attach rkpwm at fdt with rk_pwm
file arch/arm/rockchip/rk_pwm.c rk_pwm
+# DRM master
+define rkfbbus { }
+device rkdrm: drmkms, ddc_read_edid, rkfbbus
+attach rkdrm at fdt with rk_drm
+file arch/arm/rockchip/rk_drm.c rk_drm
+
+# DRM framebuffer console
+device rkfb: rkfbbus, drmfb, wsemuldisplaydev
+attach rkfb at rkfbbus with rk_fb
+file arch/arm/rockchip/rk_fb.c rk_fb
+
+# Visual Output Processor
+device rkvop: drmkms
+attach rkvop at fdt with rk_vop
+file arch/arm/rockchip/rk_vop.c rk_vop
+
+# HDMI TX (Designware based)
+attach dwhdmi at fdt with rk_dwhdmi
+file arch/arm/rockchip/rk_dwhdmi.c rk_dwhdmi
+
# SOC parameters
defflag opt_soc.h SOC_ROCKCHIP
defflag opt_soc.h SOC_RK3328: SOC_ROCKCHIP
Added files:
Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u /dev/null src/sys/arch/arm/rockchip/rk_drm.c:1.1
--- /dev/null Sat Nov 9 23:30:14 2019
+++ src/sys/arch/arm/rockchip/rk_drm.c Sat Nov 9 23:30:14 2019
@@ -0,0 +1,514 @@
+/* $NetBSD: rk_drm.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2019 Jared D. McNeill
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+#define RK_DRM_MAX_WIDTH 3840
+#define RK_DRM_MAX_HEIGHT 2160
+
+static TAILQ_HEAD(, rk_drm_ports) rk_drm_ports =
+TAILQ_HEAD_INITIALIZER(rk_drm_ports);
+
+static const char * const compatible[] = {
+ "rockchip,display-subsystem",
+ NULL
+};
+
+static const char * fb_compatible[] = {
+ "simple-framebuffer",
+ NULL
+};
+
+static int rk_drm_match(device_t, cfdata_t, void *);
+static void rk_drm_attach(device_t, device_t, void *);
+
+static void rk_drm_init(device_t);
+static vmem_t *rk_drm_alloc_cma_pool(struct drm_device *, size_t);
+
+static int rk_drm_set_busid(struct drm_device *, struct drm_master *);
+
+static uint32_t rk_drm_get_vblank_counter(struct drm_device *, unsigned int);
+static int rk_drm_enable_vblank(struct drm_device *, unsigned int);
+static void rk_drm_disable_vblank(struct drm_device *, unsigned int);
+
+static int rk_drm_load(struct drm_device *, unsigned long);
+static int rk_drm_unload(struct drm_device *);
+
+static struct drm_driver rk_drm_driver = {
+ .driver_features = DRIVER_MODESET | DRIVER_GEM |
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Sat Nov 9 23:29:48 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c
Log Message:
Add HDMI and VOP clocks
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/rockchip/rk3399_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.10 src/sys/arch/arm/rockchip/rk3399_cru.c:1.11
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.10 Sat Oct 19 12:55:21 2019
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Sat Nov 9 23:29:48 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.10 2019/10/19 12:55:21 tnn Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.11 2019/11/09 23:29:48 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.10 2019/10/19 12:55:21 tnn Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.11 2019/11/09 23:29:48 jmcneill Exp $");
#include
#include
@@ -348,13 +348,18 @@ static const char * armclkb_parents[] =
static const char * mux_clk_tsadc_parents[] = { "xin24m", "xin32k" };
static const char * mux_pll_src_cpll_gpll_parents[] = { "cpll", "gpll" };
static const char * mux_pll_src_cpll_gpll_npll_parents[] = { "cpll", "gpll", "npll" };
+static const char * mux_pll_src_cpll_gpll_ppll_parents[] = { "cpll", "gpll", "npll" };
static const char * mux_pll_src_cpll_gpll_upll_parents[] = { "cpll", "gpll", "upll" };
static const char * mux_pll_src_cpll_gpll_npll_24m_parents[] = { "cpll", "gpll", "npll", "xin24m" };
static const char * mux_pll_src_cpll_gpll_npll_ppll_upll_24m_parents[] = { "cpll", "gpll", "npll", "ppll", "upll", "xin24m" };
+static const char * mux_pll_src_vpll_cpll_gpll_parents[] = { "vpll", "cpll", "gpll" };
+static const char * mux_pll_src_vpll_cpll_gpll_npll_parents[] = { "vpll", "cpll", "gpll", "npll" };
static const char * mux_aclk_perilp0_parents[] = { "cpll_aclk_perilp0_src", "gpll_aclk_perilp0_src" };
static const char * mux_hclk_perilp1_parents[] = { "cpll_hclk_perilp1_src", "gpll_hclk_perilp1_src" };
static const char * mux_aclk_perihp_parents[] = { "cpll_aclk_perihp_src", "gpll_aclk_perihp_src" };
static const char * mux_aclk_cci_parents[] = { "cpll_aclk_cci_src", "gpll_aclk_cci_src", "npll_aclk_cci_src", "vpll_aclk_cci_src" };
+static const char * mux_dclk_vop0_parents[] = { "dclk_vop0_div", "dclk_vop0_frac" };
+static const char * mux_dclk_vop1_parents[] = { "dclk_vop1_div", "dclk_vop1_frac" };
static const char * mux_uart0_parents[] = { "clk_uart0_div", "clk_uart0_frac", "xin24m" };
static const char * mux_uart1_parents[] = { "clk_uart1_div", "clk_uart1_frac", "xin24m" };
static const char * mux_uart2_parents[] = { "clk_uart2_div", "clk_uart2_frac", "xin24m" };
@@ -403,7 +408,7 @@ static struct rk_cru_clk rk3399_cru_clks
__BIT(31), /* lock_mask */
pll_rates),
RK3399_PLL(RK3399_PLL_VPLL, "vpll", pll_parents,
- PLL_CON(43), /* con_base */
+ PLL_CON(48), /* con_base */
PLL_CON(51), /* mode_reg */
__BIT(8), /* mode_mask */
__BIT(31), /* lock_mask */
@@ -843,6 +848,96 @@ static struct rk_cru_clk rk3399_cru_clks
__BIT(1), /* gate_mask */
RK_COMPOSITE_ROUND_DOWN),
RK_GATE(RK3399_PCLK_TSADC, "pclk_tsadc", "pclk_perilp1", CLKGATE_CON(22), 13),
+
+ /* VOP0 */
+ RK_COMPOSITE(RK3399_ACLK_VOP0_PRE, "aclk_vop0_pre", mux_pll_src_vpll_cpll_gpll_npll_parents,
+ CLKSEL_CON(47), /* muxdiv_reg */
+ __BITS(7,6), /* mux_mask */
+ __BITS(4,0), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(8), /* gate_mask */
+ 0),
+ RK_COMPOSITE_NOMUX(0, "hclk_vop0_pre", "aclk_vop0_pre",
+ CLKSEL_CON(47), /* div_reg */
+ __BITS(12,8), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(9), /* gate_mask */
+ 0),
+ RK_COMPOSITE(RK3399_DCLK_VOP0_DIV, "dclk_vop0_div", mux_pll_src_vpll_cpll_gpll_parents,
+ CLKSEL_CON(49), /* muxdiv_reg */
+ __BITS(9,8), /* mux_mask */
+ __BITS(7,0), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(12), /* gate_mask */
+ 0),
+ RK_GATE(RK3399_ACLK_VOP0, "aclk_vop0", "aclk_vop0_pre", CLKGATE_CON(28), 3),
+ RK_GATE(RK3399_HCLK_VOP0, "hclk_vop0", "hclk_vop0_pre", CLKGATE_CON(28), 2),
+ RK_MUX(RK3399_DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_parents, CLKSEL_CON(49), __BIT(11)),
+
+ /* VOP1 */
+ RK_COMPOSITE(RK3399_ACLK_VOP1_PRE, "aclk_vop1_pre", mux_pll_src_vpll_cpll_gpll_npll_parents,
+ CLKSEL_CON(48), /* muxdiv_reg */
+ __BITS(7,6), /* mux_mask */
+ __BITS(4,0), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(10), /* gate_mask */
+ 0),
+ RK_COMPOSITE_NOMUX(0, "hclk_vop1_pre", "aclk_vop1_pre",
+ CLKSEL_CON(48), /* div_reg */
+ __BITS(12,8), /* div_mask */
+ CLKGATE_CON(10), /* g
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sat Nov 9 23:29:48 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c Log Message: Add HDMI and VOP clocks To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/rockchip/rk3399_cru.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: tnn
Date: Sat Nov 9 17:21:48 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_gmac.c
Log Message:
rk_gmac: clean up code for setting up clock delay lines a bit
- break long lines
- move toggle to enable it under a single #ifdef notyet
I've tested it and it works, but I'm keeping the #ifdef notyet for now
because it didn't solve the original problem I was debugging.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_gmac.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_gmac.c
diff -u src/sys/arch/arm/rockchip/rk_gmac.c:1.14 src/sys/arch/arm/rockchip/rk_gmac.c:1.15
--- src/sys/arch/arm/rockchip/rk_gmac.c:1.14 Sun Jul 21 08:24:32 2019
+++ src/sys/arch/arm/rockchip/rk_gmac.c Sat Nov 9 17:21:48 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_gmac.c,v 1.14 2019/07/21 08:24:32 mrg Exp $ */
+/* $NetBSD: rk_gmac.c,v 1.15 2019/11/09 17:21:48 tnn Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.14 2019/07/21 08:24:32 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.15 2019/11/09 17:21:48 tnn Exp $");
#include
#include
@@ -90,7 +90,7 @@ struct rk_gmac_softc {
#define RK3328_GRF_MAC_CON1_TXDLY_EN __BIT(0)
static void
-rk3328_gmac_set_mode_rgmii(struct dwc_gmac_softc *sc, u_int tx_delay, u_int rx_delay)
+rk3328_gmac_set_mode_rgmii(struct dwc_gmac_softc *sc, u_int tx_delay, u_int rx_delay, bool set_delay)
{
struct rk_gmac_softc * const rk_sc = (struct rk_gmac_softc *)sc;
uint32_t write_mask, write_val;
@@ -98,19 +98,30 @@ rk3328_gmac_set_mode_rgmii(struct dwc_gm
syscon_lock(rk_sc->sc_syscon);
write_mask = (RK3328_GRF_MAC_CON1_MODE | RK3328_GRF_MAC_CON1_SEL) << 16;
- write_val = __SHIFTIN(RK3328_GRF_MAC_CON1_SEL_RGMII, RK3328_GRF_MAC_CON1_SEL);
- syscon_write_4(rk_sc->sc_syscon, RK3328_GRF_MAC_CON1, write_mask | write_val);
+ write_val = __SHIFTIN(RK3328_GRF_MAC_CON1_SEL_RGMII,
+ RK3328_GRF_MAC_CON1_SEL);
+ syscon_write_4(rk_sc->sc_syscon, RK3328_GRF_MAC_CON1,
+ write_mask | write_val);
-#if notyet
- write_mask = (RK3328_GRF_MAC_CON0_TXDLY | RK3328_GRF_MAC_CON0_RXDLY) << 16;
- write_val = __SHIFTIN(tx_delay, RK3328_GRF_MAC_CON0_TXDLY) |
+ if (set_delay) {
+ write_mask = (
+ RK3328_GRF_MAC_CON0_TXDLY |
+ RK3328_GRF_MAC_CON0_RXDLY) << 16;
+ write_val =
+ __SHIFTIN(tx_delay, RK3328_GRF_MAC_CON0_TXDLY) |
__SHIFTIN(rx_delay, RK3328_GRF_MAC_CON0_RXDLY);
- syscon_write_4(rk_sc->sc_syscon, RK3328_GRF_MAC_CON0, write_mask | write_val);
+ syscon_write_4(rk_sc->sc_syscon, RK3328_GRF_MAC_CON0,
+ write_mask | write_val);
- write_mask = (RK3328_GRF_MAC_CON1_RXDLY_EN | RK3328_GRF_MAC_CON1_TXDLY_EN) << 16;
- write_val = RK3328_GRF_MAC_CON1_RXDLY_EN | RK3328_GRF_MAC_CON1_TXDLY_EN;
- syscon_write_4(rk_sc->sc_syscon, RK3328_GRF_MAC_CON1, write_mask | write_val);
-#endif
+ write_mask = (
+ RK3328_GRF_MAC_CON1_RXDLY_EN |
+ RK3328_GRF_MAC_CON1_TXDLY_EN) << 16;
+ write_val =
+ RK3328_GRF_MAC_CON1_RXDLY_EN |
+ RK3328_GRF_MAC_CON1_TXDLY_EN;
+ syscon_write_4(rk_sc->sc_syscon, RK3328_GRF_MAC_CON1,
+ write_mask | write_val);
+ }
syscon_unlock(rk_sc->sc_syscon);
}
@@ -163,32 +174,34 @@ rk3328_gmac_set_speed_rgmii(struct dwc_g
#define RK3399_GRF_SOC_CON6_GMAC_CLK_TX_DL_CFG __BITS(6,0)
static void
-rk3399_gmac_set_mode_rgmii(struct dwc_gmac_softc *sc, u_int tx_delay, u_int rx_delay)
+rk3399_gmac_set_mode_rgmii(struct dwc_gmac_softc *sc, u_int tx_delay,
+u_int rx_delay, bool set_delay)
{
struct rk_gmac_softc * const rk_sc = (struct rk_gmac_softc *)sc;
-
- const uint32_t con5_mask =
- (RK3399_GRF_SOC_CON5_RMII_MODE | RK3399_GRF_SOC_CON5_GMAC_PHY_INTF_SEL) << 16;
- const uint32_t con5 = __SHIFTIN(1, RK3399_GRF_SOC_CON5_GMAC_PHY_INTF_SEL);
-
-#if notyet
- const uint32_t con6_mask =
- (RK3399_GRF_SOC_CON6_GMAC_RXCLK_DLY_ENA |
- RK3399_GRF_SOC_CON6_GMAC_TXCLK_DLY_ENA |
- RK3399_GRF_SOC_CON6_GMAC_CLK_RX_DL_CFG |
- RK3399_GRF_SOC_CON6_GMAC_CLK_TX_DL_CFG) << 16;
- const uint32_t con6 =
- (tx_delay ? RK3399_GRF_SOC_CON6_GMAC_TXCLK_DLY_ENA : 0) |
- (rx_delay ? RK3399_GRF_SOC_CON6_GMAC_RXCLK_DLY_ENA : 0) |
- __SHIFTIN(rx_delay, RK3399_GRF_SOC_CON6_GMAC_CLK_RX_DL_CFG) |
- __SHIFTIN(tx_delay, RK3399_GRF_SOC_CON6_GMAC_CLK_TX_DL_CFG);
-#endif
+ uint32_t write_mask, write_val;
syscon_lock(rk_sc->sc_syscon);
- syscon_write_4(rk_sc->sc_syscon, RK3399_GRF_SOC_CON5, con5 | con5_mask);
-#if notyet
- syscon_write_4(rk_sc->sc_syscon, RK3399_GRF_SOC_CON6, con6 | con6_mask);
-#endif
+
+ write_mask = (
+ RK3399_GRF_SOC_CON5_RMII_MODE |
+ RK3399_GRF_SOC_CON5_GMAC_PHY_INTF_SEL) << 16;
+ write_val = __SHIFTIN(1, RK3399_GRF_SOC_CON5_GMAC_PHY_INTF_SEL);
+ syscon_write_4(rk_sc->sc_syscon, RK3399_GRF_SOC_CON5,
+ write_mask | write_val);
+
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Sat Nov 9 17:21:48 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_gmac.c Log Message: rk_gmac: clean up code for setting up clock delay lines a bit - break long lines - move toggle to enable it under a single #ifdef notyet I've tested it and it works, but I'm keeping the #ifdef notyet for now because it didn't solve the original problem I was debugging. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/rockchip/rk_gmac.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Fri Nov 8 00:35:16 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_i2c.c Log Message: Support reads of more than 32 bytes in a single xfer. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_i2c.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Fri Nov 8 00:35:16 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_i2c.c
Log Message:
Support reads of more than 32 bytes in a single xfer.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_i2c.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_i2c.c
diff -u src/sys/arch/arm/rockchip/rk_i2c.c:1.5 src/sys/arch/arm/rockchip/rk_i2c.c:1.6
--- src/sys/arch/arm/rockchip/rk_i2c.c:1.5 Wed Sep 18 12:49:34 2019
+++ src/sys/arch/arm/rockchip/rk_i2c.c Fri Nov 8 00:35:16 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_i2c.c,v 1.5 2019/09/18 12:49:34 tnn Exp $ */
+/* $NetBSD: rk_i2c.c,v 1.6 2019/11/08 00:35:16 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.5 2019/09/18 12:49:34 tnn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.6 2019/11/08 00:35:16 jmcneill Exp $");
#include
#include
@@ -284,7 +284,7 @@ rk_i2c_write(struct rk_i2c_softc *sc, i2
static int
rk_i2c_read(struct rk_i2c_softc *sc, i2c_addr_t addr,
const uint8_t *cmd, size_t cmdlen, uint8_t *buf,
-size_t buflen, int flags, bool send_start)
+size_t buflen, int flags, bool send_start, bool last_ack)
{
uint32_t rxdata[8];
uint32_t con, mrxaddr, mrxraddr;
@@ -296,24 +296,27 @@ rk_i2c_read(struct rk_i2c_softc *sc, i2c
if (cmdlen > 3)
return EINVAL;
- mode = RKI2C_CON_I2C_MODE_RTX;
- con = RKI2C_CON_I2C_EN | RKI2C_CON_ACK | __SHIFTIN(mode, RKI2C_CON_I2C_MODE);
+ mode = send_start ? RKI2C_CON_I2C_MODE_RTX : RKI2C_CON_I2C_MODE_RX;
+ con = RKI2C_CON_I2C_EN | __SHIFTIN(mode, RKI2C_CON_I2C_MODE);
WR4(sc, RKI2C_CON, con);
if (send_start && (error = rk_i2c_start(sc)) != 0)
return error;
- mrxaddr = __SHIFTIN((addr << 1) | 1, RKI2C_MRXADDR_SADDR) |
- RKI2C_MRXADDR_ADDLVLD;
- WR4(sc, RKI2C_MRXADDR, mrxaddr);
- for (n = 0, mrxraddr = 0; n < cmdlen; n++) {
- mrxraddr |= cmd[n] << (n * 8);
- mrxraddr |= (RKI2C_MRXRADDR_ADDLVLD << n);
+ if (send_start) {
+ mrxaddr = __SHIFTIN((addr << 1) | 1, RKI2C_MRXADDR_SADDR) |
+ RKI2C_MRXADDR_ADDLVLD;
+ WR4(sc, RKI2C_MRXADDR, mrxaddr);
+ for (n = 0, mrxraddr = 0; n < cmdlen; n++) {
+ mrxraddr |= cmd[n] << (n * 8);
+ mrxraddr |= (RKI2C_MRXRADDR_ADDLVLD << n);
+ }
+ WR4(sc, RKI2C_MRXRADDR, mrxraddr);
}
- WR4(sc, RKI2C_MRXRADDR, mrxraddr);
- /* Acknowledge last byte read */
- con |= RKI2C_CON_ACK;
+ if (last_ack) {
+ con |= RKI2C_CON_ACK;
+ }
WR4(sc, RKI2C_CON, con);
/* Receive data. Slave address goes in the lower 8 bits of MRXADDR */
@@ -321,8 +324,14 @@ rk_i2c_read(struct rk_i2c_softc *sc, i2c
if ((error = rk_i2c_wait(sc, RKI2C_IPD_MBRFIPD)) != 0)
return error;
+#if 0
bus_space_read_region_4(sc->sc_bst, sc->sc_bsh, RKI2C_RXDATA(0),
rxdata, howmany(buflen, 4));
+#else
+ for (n = 0; n < roundup(buflen, 4); n += 4)
+ rxdata[n/4] = RD4(sc, RKI2C_RXDATA(n/4));
+#endif
+
memcpy(buf, rxdata, buflen);
return 0;
@@ -339,7 +348,19 @@ rk_i2c_exec(void *priv, i2c_op_t op, i2c
KASSERT(mutex_owned(&sc->sc_lock));
if (I2C_OP_READ_P(op)) {
- error = rk_i2c_read(sc, addr, cmdbuf, cmdlen, buf, buflen, flags, send_start);
+ uint8_t *databuf = buf;
+ while (buflen > 0) {
+ const size_t datalen = uimin(buflen, 32);
+ const bool last_ack = datalen == buflen;
+ error = rk_i2c_read(sc, addr, cmdbuf, cmdlen, databuf, datalen, flags, send_start, last_ack);
+ if (error != 0)
+break;
+ databuf += datalen;
+ buflen -= datalen;
+ send_start = false;
+ cmdbuf = NULL;
+ cmdlen = 0;
+ }
} else {
error = rk_i2c_write(sc, addr, cmdbuf, cmdlen, buf, buflen, flags, send_start);
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: tnn
Date: Sat Oct 19 12:55:21 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h
Log Message:
rk3399: add definition for the watchdog timer clock gate
The watchdog timer clock gate is a bit special because it's a secure
gate that can only be accessed from EL3. We still need a dummy gate
definition for it so that dwcwdt(4) can infer the frequency via the
parent clock. The gate is enabled by default by U-Boot.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk3399_cru.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_cru.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.9 src/sys/arch/arm/rockchip/rk3399_cru.c:1.10
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.9 Sun Aug 4 17:09:07 2019
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Sat Oct 19 12:55:21 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.9 2019/08/04 17:09:07 tnn Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.10 2019/10/19 12:55:21 tnn Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.9 2019/08/04 17:09:07 tnn Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.10 2019/10/19 12:55:21 tnn Exp $");
#include
#include
@@ -804,6 +804,9 @@ static struct rk_cru_clk rk3399_cru_clks
RK_GATE(RK3399_PCLK_SPI4, "pclk_rkspi4", "pclk_perilp1", CLKGATE_CON(23), 13),
RK_GATE(RK3399_PCLK_SPI5, "pclk_rkspi5", "hclk_perilp1", CLKGATE_CON(34), 5),
+ /* Watchdog */
+ RK_SECURE_GATE(RK3399_PCLK_WDT, "pclk_wdt", "pclk_alive" /*, SECURE_CLKGATE_CON(3), 8 */),
+
/* PCIe */
RK_GATE(RK3399_ACLK_PERF_PCIE, "aclk_perf_pcie", "aclk_perihp", CLKGATE_CON(20), 2),
RK_GATE(RK3399_ACLK_PCIE, "aclk_pcie", "aclk_perihp", CLKGATE_CON(20), 10),
Index: src/sys/arch/arm/rockchip/rk_cru.h
diff -u src/sys/arch/arm/rockchip/rk_cru.h:1.4 src/sys/arch/arm/rockchip/rk_cru.h:1.5
--- src/sys/arch/arm/rockchip/rk_cru.h:1.4 Sat Sep 1 19:35:53 2018
+++ src/sys/arch/arm/rockchip/rk_cru.h Sat Oct 19 12:55:21 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru.h,v 1.4 2018/09/01 19:35:53 jmcneill Exp $ */
+/* $NetBSD: rk_cru.h,v 1.5 2019/10/19 12:55:21 tnn Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -268,6 +268,15 @@ const char *rk_cru_gate_get_parent(struc
.get_parent = rk_cru_gate_get_parent, \
}
+#define RK_SECURE_GATE(_id, _name, _pname) \
+ { \
+ .id = (_id), \
+ .type = RK_CRU_GATE,\
+ .base.name = (_name),\
+ .u.gate.parent = (_pname), \
+ .get_parent = rk_cru_gate_get_parent, \
+ }
+
/* Mux clocks */
struct rk_cru_mux {
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Sat Oct 19 12:55:21 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_cru.c rk_cru.h Log Message: rk3399: add definition for the watchdog timer clock gate The watchdog timer clock gate is a bit special because it's a secure gate that can only be accessed from EL3. We still need a dummy gate definition for it so that dwcwdt(4) can infer the frequency via the parent clock. The gate is enabled by default by U-Boot. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk3399_cru.c cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_cru.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: skrll
Date: Fri Oct 18 06:51:02 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_pwm.c
Log Message:
Use PRIxBUSADDR
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_pwm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_pwm.c
diff -u src/sys/arch/arm/rockchip/rk_pwm.c:1.1 src/sys/arch/arm/rockchip/rk_pwm.c:1.2
--- src/sys/arch/arm/rockchip/rk_pwm.c:1.1 Wed May 1 10:41:33 2019
+++ src/sys/arch/arm/rockchip/rk_pwm.c Fri Oct 18 06:51:02 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_pwm.c,v 1.1 2019/05/01 10:41:33 jmcneill Exp $ */
+/* $NetBSD: rk_pwm.c,v 1.2 2019/10/18 06:51:02 skrll Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk_pwm.c,v 1.1 2019/05/01 10:41:33 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk_pwm.c,v 1.2 2019/10/18 06:51:02 skrll Exp $");
#include
#include
@@ -221,8 +221,8 @@ rk_pwm_attach(device_t parent, device_t
sc->sc_bst = faa->faa_bst;
error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
if (error) {
- aprint_error(": couldn't map %#" PRIx64 ": %d",
- (uint64_t)addr, error);
+ aprint_error(": couldn't map %#" PRIxBUSADDR ": %d",
+ addr, error);
return;
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: skrll Date: Fri Oct 18 06:51:02 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_pwm.c Log Message: Use PRIxBUSADDR To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_pwm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Wed Sep 18 12:49:35 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_i2c.c Log Message: rkiic: coalesce smbus-style writes into a single transaction There seems to be a hw controller bug. Split cmd/data writes caused corrupt transfers, with junk bytes witten into the rk808 pmic registers. This may have caused us to operate with out-of-spec core voltage. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_i2c.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: tnn
Date: Wed Sep 18 12:49:35 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_i2c.c
Log Message:
rkiic: coalesce smbus-style writes into a single transaction
There seems to be a hw controller bug. Split cmd/data writes caused corrupt
transfers, with junk bytes witten into the rk808 pmic registers.
This may have caused us to operate with out-of-spec core voltage.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk_i2c.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_i2c.c
diff -u src/sys/arch/arm/rockchip/rk_i2c.c:1.4 src/sys/arch/arm/rockchip/rk_i2c.c:1.5
--- src/sys/arch/arm/rockchip/rk_i2c.c:1.4 Sun Sep 2 10:07:17 2018
+++ src/sys/arch/arm/rockchip/rk_i2c.c Wed Sep 18 12:49:34 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_i2c.c,v 1.4 2018/09/02 10:07:17 jmcneill Exp $ */
+/* $NetBSD: rk_i2c.c,v 1.5 2019/09/18 12:49:34 tnn Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.4 2018/09/02 10:07:17 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_i2c.c,v 1.5 2019/09/18 12:49:34 tnn Exp $");
#include
#include
@@ -244,8 +244,8 @@ rk_i2c_stop(struct rk_i2c_softc *sc)
}
static int
-rk_i2c_write(struct rk_i2c_softc *sc, i2c_addr_t addr, const uint8_t *buf,
-size_t buflen, int flags, bool send_start)
+rk_i2c_write(struct rk_i2c_softc *sc, i2c_addr_t addr, const uint8_t *cmd,
+size_t cmdlen, const uint8_t *buf, size_t buflen, int flags, bool send_start)
{
union {
uint8_t data8[32];
@@ -254,8 +254,10 @@ rk_i2c_write(struct rk_i2c_softc *sc, i2
uint32_t con;
u_int mode;
int error;
+ size_t len;
- if (buflen > 31)
+ len = cmdlen + buflen;
+ if (len > 31)
return EINVAL;
mode = RKI2C_CON_I2C_MODE_TX;
@@ -267,10 +269,11 @@ rk_i2c_write(struct rk_i2c_softc *sc, i2
/* Transmit data. Slave address goes in the lower 8 bits of TXDATA0 */
txdata.data8[0] = addr << 1;
- memcpy(&txdata.data8[1], buf, buflen);
+ memcpy(&txdata.data8[1], cmd, cmdlen);
+ memcpy(&txdata.data8[1 + cmdlen], buf, buflen);
bus_space_write_region_4(sc->sc_bst, sc->sc_bsh, RKI2C_TXDATA(0),
- txdata.data32, howmany(buflen + 1, 4));
- WR4(sc, RKI2C_MTXCNT, __SHIFTIN(buflen + 1, RKI2C_MTXCNT_MTXCNT));
+ txdata.data32, howmany(len + 1, 4));
+ WR4(sc, RKI2C_MTXCNT, __SHIFTIN(len + 1, RKI2C_MTXCNT_MTXCNT));
if ((error = rk_i2c_wait(sc, RKI2C_IPD_MBTFIPD)) != 0)
return error;
@@ -338,16 +341,9 @@ rk_i2c_exec(void *priv, i2c_op_t op, i2c
if (I2C_OP_READ_P(op)) {
error = rk_i2c_read(sc, addr, cmdbuf, cmdlen, buf, buflen, flags, send_start);
} else {
- if (cmdlen > 0) {
- error = rk_i2c_write(sc, addr, cmdbuf, cmdlen, flags, send_start);
- if (error != 0)
-goto done;
- send_start = false;
- }
- error = rk_i2c_write(sc, addr, buf, buflen, flags, send_start);
+ error = rk_i2c_write(sc, addr, cmdbuf, cmdlen, buf, buflen, flags, send_start);
}
-done:
if (error != 0 || I2C_OP_STOP_P(op))
rk_i2c_stop(sc);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: tnn
Date: Tue Aug 20 23:32:33 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk3399_iomux.c
Log Message:
rk3399_iomux: add some #ifdef'd out code to enable the on-chip debug port
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk3399_iomux.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_iomux.c
diff -u src/sys/arch/arm/rockchip/rk3399_iomux.c:1.4 src/sys/arch/arm/rockchip/rk3399_iomux.c:1.5
--- src/sys/arch/arm/rockchip/rk3399_iomux.c:1.4 Tue Apr 30 22:42:32 2019
+++ src/sys/arch/arm/rockchip/rk3399_iomux.c Tue Aug 20 23:32:33 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_iomux.c,v 1.4 2019/04/30 22:42:32 jmcneill Exp $ */
+/* $NetBSD: rk3399_iomux.c,v 1.5 2019/08/20 23:32:33 tnn Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -29,7 +29,7 @@
//#define RK3399_IOMUX_DEBUG
#include
-__KERNEL_RCSID(0, "$NetBSD: rk3399_iomux.c,v 1.4 2019/04/30 22:42:32 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk3399_iomux.c,v 1.5 2019/08/20 23:32:33 tnn Exp $");
#include
#include
@@ -450,6 +450,36 @@ rk3399_iomux_match(device_t parent, cfda
return of_match_compat_data(faa->faa_phandle, compat_data);
}
+#ifdef RK3399_IOMUX_FORCE_ENABLE_SWJ_DP
+/*
+ * This enables the SWJ-DP (Serial Wire JTAG Debug Port).
+ * If you enable this you must also disable sdhc due to pin conflicts.
+ */
+static void
+rk3399_iomux_force_enable_swj_dp(struct rk3399_iomux_softc * const sc)
+{
+ struct syscon * const syscon = sc->sc_syscon[RK_IOMUX_REGS_GRF];
+ uint32_t val;
+
+ aprint_normal_dev(sc->sc_dev, "enabling on-chip debugging\n");
+#define GRF_GPIO4B_IOMUX 0xe024
+#define GRF_GPIO4B_IOMUX_TCK __BITS(5,4)
+#define GRF_GPIO4B_IOMUX_TMS __BITS(7,6)
+#define GRF_SOC_CON7 0xe21c
+#define GRF_SOC_CON7_FORCE_JTAG __BIT(12)
+ LOCK(syscon);
+ val = RD4(syscon, GRF_GPIO4B_IOMUX);
+ val &= ~(GRF_GPIO4B_IOMUX_TCK | GRF_GPIO4B_IOMUX_TMS);
+ val |= __SHIFTIN(0x2, GRF_GPIO4B_IOMUX_TCK);
+ val |= __SHIFTIN(0x2, GRF_GPIO4B_IOMUX_TMS);
+ WR4(syscon, GRF_GPIO4B_IOMUX, val);
+ val = RD4(syscon, GRF_SOC_CON7);
+ val |= GRF_SOC_CON7_FORCE_JTAG;
+ WR4(syscon, GRF_SOC_CON7, val);
+ UNLOCK(syscon);
+}
+#endif
+
static void
rk3399_iomux_attach(device_t parent, device_t self, void *aux)
{
@@ -492,4 +522,8 @@ rk3399_iomux_attach(device_t parent, dev
config_found(self, &cfaa, NULL);
}
+
+#ifdef RK3399_IOMUX_FORCE_ENABLE_SWJ_DP
+ rk3399_iomux_force_enable_swj_dp(sc);
+#endif
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Aug 20 23:32:33 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk3399_iomux.c Log Message: rk3399_iomux: add some #ifdef'd out code to enable the on-chip debug port To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/rockchip/rk3399_iomux.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: tnn Date: Tue Aug 13 17:15:55 UTC 2019 Modified Files: src/sys/arch/arm/rockchip: rk_spi.c Log Message: rk_spi: register controller with fdt To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk_spi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
