CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: mrg Date: Sun Jul 11 22:41:39 UTC 2021 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: i386.c i386.h netbsd-elf.h netbsd64.h Log Message: define a X86_32_ASAN_BIT_OFFSET macro that defaults differently on netbsd/i386 than other x86-32 targets. fixes PR#56280. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/external/gpl3/gcc/dist/gcc/config/i386/i386.c cvs rdiff -u -r1.14 -r1.15 src/external/gpl3/gcc/dist/gcc/config/i386/i386.h \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/i386.c diff -u src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.24 src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.25 --- src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.24 Sun Apr 11 00:02:13 2021 +++ src/external/gpl3/gcc/dist/gcc/config/i386/i386.c Sun Jul 11 22:41:38 2021 @@ -1399,7 +1399,7 @@ ix86_asan_shadow_offset (void) { return TARGET_LP64 ? (TARGET_MACHO ? (HOST_WIDE_INT_1 << 44) : HOST_WIDE_INT_C (0x7fff8000)) - : (HOST_WIDE_INT_1 << 29); + : (HOST_WIDE_INT_1 << X86_32_ASAN_BIT_OFFSET); } /* Argument support functions. */ Index: src/external/gpl3/gcc/dist/gcc/config/i386/i386.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/i386.h:1.14 src/external/gpl3/gcc/dist/gcc/config/i386/i386.h:1.15 --- src/external/gpl3/gcc/dist/gcc/config/i386/i386.h:1.14 Sun Apr 11 00:02:14 2021 +++ src/external/gpl3/gcc/dist/gcc/config/i386/i386.h Sun Jul 11 22:41:39 2021 @@ -2975,6 +2975,9 @@ extern enum attr_cpu ix86_schedule; #define NUM_X86_64_MS_CLOBBERED_REGS 12 #endif +/* Standard location for 32-bit ASAN shadow map. */ +#define X86_32_ASAN_BIT_OFFSET 29 + /* Local variables: version-control: t Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.14 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.15 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.14 Sun Apr 11 00:02:14 2021 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h Sun Jul 11 22:41:39 2021 @@ -129,3 +129,7 @@ along with GCC; see the file COPYING3. /* Preserve i386 psABI */ #undef PREFERRED_STACK_BOUNDARY_DEFAULT #define PREFERRED_STACK_BOUNDARY_DEFAULT MIN_STACK_BOUNDARY + +/* NetBSD/x86 on 32-bit places the ASAN shadow map at 0x4000. */ +#undef X86_32_ASAN_BIT_OFFSET +#define X86_32_ASAN_BIT_OFFSET 30 Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.14 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.15 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.14 Sun Apr 11 00:02:14 2021 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Sun Jul 11 22:41:39 2021 @@ -73,3 +73,7 @@ along with GCC; see the file COPYING3. ((TARGET_64BIT || TARGET_SSE) ? 128 : 32) #define HAVE_ENABLE_EXECUTE_STACK + +/* NetBSD/x86 on 32-bit places the ASAN shadow map at 0x4000. */ +#undef X86_32_ASAN_BIT_OFFSET +#define X86_32_ASAN_BIT_OFFSET 30
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: mrg Date: Thu Apr 11 00:17:44 UTC 2019 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: netbsd-elf.h netbsd64.h Log Message: be sure to keep cc1_cpu the CC1*_SPEC. fixes x86 -mtune=native without killing -cxx-isystem. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.10 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.11 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.10 Sat Jan 19 12:10:06 2019 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h Thu Apr 11 00:17:44 2019 @@ -41,6 +41,16 @@ along with GCC; see the file COPYING3. #define CPP_SPEC "%(netbsd_cpp_spec)" +/* Provide C11_SPEC/CC1PLUS_SPEC appropriate for NetBSD/i386. */ +#define NETBSD_CC1_CPU_SPEC " %(cc1_cpu) " + +#undef CC1_SPEC +#define CC1_SPEC NETBSD_CC1_AND_CC1PLUS_SPEC NETBSD_CC1_CPU_SPEC + +#undef CC1PLUS_SPEC +#define CC1PLUS_SPEC NETBSD_CC1_AND_CC1PLUS_SPEC NETBSD_CC1_CPU_SPEC + + /* Make gcc agree with */ #undef SIZE_TYPE Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.10 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.11 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.10 Sat Jan 19 12:10:06 2019 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Thu Apr 11 00:17:44 2019 @@ -44,6 +44,16 @@ along with GCC; see the file COPYING3. #define CPP_SPEC "%(netbsd_cpp_spec)" +/* Provide C11_SPEC/CC1PLUS_SPEC appropriate for NetBSD/x86-64. */ +#define NETBSD_CC1_CPU_SPEC " %(cc1_cpu) " + +#undef CC1_SPEC +#define CC1_SPEC NETBSD_CC1_AND_CC1PLUS_SPEC NETBSD_CC1_CPU_SPEC + +#undef CC1PLUS_SPEC +#define CC1PLUS_SPEC NETBSD_CC1_AND_CC1PLUS_SPEC NETBSD_CC1_CPU_SPEC + + /* Output assembler code to FILE to call the profiler. */ #undef FUNCTION_PROFILER
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: maya Date: Fri Jul 28 22:23:05 UTC 2017 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: i386.c Log Message: Apply upstream patch: Incorrect codegen from rdseed intrinsic use (CVE-2017-11671) We should not expand call arguments in between flags reg setting and flags reg using instructions, as it may expand with flags reg clobbering insn (ADD in this case). Attached patch moves expansion out of the link. Also, change zero-extension to non-flags reg clobbering sequence in case we perform zero-extension with and. 2017-03-25 Uros BizjakTo generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/external/gpl3/gcc/dist/gcc/config/i386/i386.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/i386.c diff -u src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.12 src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.13 --- src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.12 Tue Jun 7 06:14:17 2016 +++ src/external/gpl3/gcc/dist/gcc/config/i386/i386.c Fri Jul 28 22:23:05 2017 @@ -39529,9 +39529,6 @@ ix86_expand_builtin (tree exp, rtx targe mode0 = DImode; rdrand_step: - op0 = gen_reg_rtx (mode0); - emit_insn (GEN_FCN (icode) (op0)); - arg0 = CALL_EXPR_ARG (exp, 0); op1 = expand_normal (arg0); if (!address_operand (op1, VOIDmode)) @@ -39539,6 +39536,10 @@ rdrand_step: op1 = convert_memory_address (Pmode, op1); op1 = copy_addr_to_reg (op1); } + + op0 = gen_reg_rtx (mode0); + emit_insn (GEN_FCN (icode) (op0)); + emit_move_insn (gen_rtx_MEM (mode0, op1), op0); op1 = gen_reg_rtx (SImode); @@ -39547,8 +39548,20 @@ rdrand_step: /* Emit SImode conditional move. */ if (mode0 == HImode) { - op2 = gen_reg_rtx (SImode); - emit_insn (gen_zero_extendhisi2 (op2, op0)); + if (TARGET_ZERO_EXTEND_WITH_AND + && optimize_function_for_speed_p (cfun)) + { + op2 = force_reg (SImode, const0_rtx); + + emit_insn (gen_movstricthi + (gen_lowpart (HImode, op2), op0)); + } + else + { + op2 = gen_reg_rtx (SImode); + + emit_insn (gen_zero_extendhisi2 (op2, op0)); + } } else if (mode0 == SImode) op2 = op0; @@ -39580,9 +39593,6 @@ rdrand_step: mode0 = DImode; rdseed_step: - op0 = gen_reg_rtx (mode0); - emit_insn (GEN_FCN (icode) (op0)); - arg0 = CALL_EXPR_ARG (exp, 0); op1 = expand_normal (arg0); if (!address_operand (op1, VOIDmode)) @@ -39590,6 +39600,10 @@ rdseed_step: op1 = convert_memory_address (Pmode, op1); op1 = copy_addr_to_reg (op1); } + + op0 = gen_reg_rtx (mode0); + emit_insn (GEN_FCN (icode) (op0)); + emit_move_insn (gen_rtx_MEM (mode0, op1), op0); op2 = gen_reg_rtx (QImode);
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: christos Date: Mon May 29 03:51:24 UTC 2017 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: netbsd64.h Log Message: remove bogus indirect call for profiling (mcount) To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.7 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.8 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.7 Fri Aug 19 01:11:09 2016 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Sun May 28 23:51:24 2017 @@ -50,9 +50,9 @@ along with GCC; see the file COPYING3. #define FUNCTION_PROFILER(FILE, LABELNO)\ { \ if (TARGET_64BIT && flag_pic) \ -fprintf (FILE, "\tcall *__mcount@PLT\n");\ +fprintf (FILE, "\tcall __mcount@PLT\n");\ else if (flag_pic) \ -fprintf (FILE, "\tcall *__mcount@PLT\n");\ +fprintf (FILE, "\tcall __mcount@PLT\n");\ else \ fprintf (FILE, "\tcall __mcount\n");\ }
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: mrg Date: Sun Mar 27 17:17:59 UTC 2016 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: netbsd64.h Log Message: revert most of the previous and re-do it to be valid, re-fixing i386 psABI support with -m32. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.5 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.6 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.5 Sun Mar 27 04:18:09 2016 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Sun Mar 27 17:17:59 2016 @@ -66,6 +66,11 @@ along with GCC; see the file COPYING3. fprintf (FILE, "\tcall __mcount\n");\ } +/* Preserve i386 psABI */ +#undef PREFERRED_STACK_BOUNDARY_DEFAULT +#define PREFERRED_STACK_BOUNDARY_DEFAULT \ + ((TARGET_64BIT || TARGET_SSE) ? 128 : 32) + #define HAVE_ENABLE_EXECUTE_STACK #define IX86_MAYBE_NO_LIBGCC_TFMODE
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: mrg Date: Sun Mar 27 04:18:09 UTC 2016 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: netbsd64.h Log Message: don't set PREFERRED_STACK_BOUNDARY_DEFAULT, in particular, don't set it to 64 (8 bytes) for 64-bit targets, where 16 byte alignment is required. this fixes GCC 5 and ssh on modern intel cpus, and perhaps more. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.4 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.5 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.4 Sun Jan 24 09:43:33 2016 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Sun Mar 27 04:18:09 2016 @@ -66,10 +66,6 @@ along with GCC; see the file COPYING3. fprintf (FILE, "\tcall __mcount\n");\ } -/* Preserve i386 psABI */ -#undef PREFERRED_STACK_BOUNDARY_DEFAULT -#define PREFERRED_STACK_BOUNDARY_DEFAULT MIN_STACK_BOUNDARY - #define HAVE_ENABLE_EXECUTE_STACK #define IX86_MAYBE_NO_LIBGCC_TFMODE
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: mrg Date: Sun Mar 13 01:05:59 UTC 2016 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: t-netbsd64 Log Message: fix a comment. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 \ src/external/gpl3/gcc/dist/gcc/config/i386/t-netbsd64 Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/t-netbsd64 diff -u src/external/gpl3/gcc/dist/gcc/config/i386/t-netbsd64:1.1 src/external/gpl3/gcc/dist/gcc/config/i386/t-netbsd64:1.2 --- src/external/gpl3/gcc/dist/gcc/config/i386/t-netbsd64:1.1 Wed Jun 29 04:59:10 2011 +++ src/external/gpl3/gcc/dist/gcc/config/i386/t-netbsd64 Sun Mar 13 01:05:59 2016 @@ -1,4 +1,4 @@ -# NetBSD has (will have) "non-native" libraries in /usr/lib/. +# NetBSD has "non-native" libraries in /usr/lib/. # For NetBSD/amd64 we thus have /usr/lib and /usr/lib/i386. MULTILIB_OPTIONS = m64/m32
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: christos Date: Sun Nov 22 20:47:05 UTC 2015 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: cpuid.h Log Message: Fix logic bug where __cpuid gets called when __get_cpuid_max() returns 0. This happens when __level == 0, from libgcc/config/i386/cpuinfo.c#285. This breaks early i486 CPUs which don't have cpuid XXX: pullup-7 To generate a diff of this commit: cvs rdiff -u -r1.1.1.2 -r1.2 \ src/external/gpl3/gcc/dist/gcc/config/i386/cpuid.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/cpuid.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/cpuid.h:1.1.1.2 src/external/gpl3/gcc/dist/gcc/config/i386/cpuid.h:1.2 --- src/external/gpl3/gcc/dist/gcc/config/i386/cpuid.h:1.1.1.2 Sat Mar 1 03:43:18 2014 +++ src/external/gpl3/gcc/dist/gcc/config/i386/cpuid.h Sun Nov 22 15:47:05 2015 @@ -259,8 +259,9 @@ __get_cpuid (unsigned int __level, unsigned int *__ecx, unsigned int *__edx) { unsigned int __ext = __level & 0x8000; + unsigned int __maxlevel = __get_cpuid_max (__ext, 0); - if (__get_cpuid_max (__ext, 0) < __level) + if (__maxlevel == 0 || __maxlevel < __level) return 0; __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx);
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: martin Date: Sat Mar 8 19:15:32 UTC 2014 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: pmm_malloc.h Log Message: Kill the throw() on a forward declaration for posix_memalign (it does not match our base declaration and may cause warnings). Ok: joerg To generate a diff of this commit: cvs rdiff -u -r1.1.1.2 -r1.2 \ src/external/gpl3/gcc/dist/gcc/config/i386/pmm_malloc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/pmm_malloc.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/pmm_malloc.h:1.1.1.2 src/external/gpl3/gcc/dist/gcc/config/i386/pmm_malloc.h:1.2 --- src/external/gpl3/gcc/dist/gcc/config/i386/pmm_malloc.h:1.1.1.2 Sat Mar 1 08:43:17 2014 +++ src/external/gpl3/gcc/dist/gcc/config/i386/pmm_malloc.h Sat Mar 8 19:15:32 2014 @@ -31,7 +31,7 @@ #ifndef __cplusplus extern int posix_memalign (void **, size_t, size_t); #else -extern C int posix_memalign (void **, size_t, size_t) throw (); +extern C int posix_memalign (void **, size_t, size_t); #endif static __inline void *
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: dsl Date: Sun Dec 30 16:13:57 UTC 2012 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: driver-i386.c Log Message: If -march=native is specified, only enable AVX if the processor supports it and the OS has enabled XGETBV for application use. It might need to also check XCR0[2] (having executed XGETBV) to check that the kernel actually supports saving the YMM registers, but I suspect the kernel might defer setting that until the first fault. See vol 1 section 13.5 of the Intel SDM (intel_x86_325462.pdf). Fixes toolchain/45673 To generate a diff of this commit: cvs rdiff -u -r1.1.1.2 -r1.2 \ src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c diff -u src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c:1.1.1.2 src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c:1.2 --- src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c:1.1.1.2 Tue Sep 18 06:15:11 2012 +++ src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c Sun Dec 30 16:13:57 2012 @@ -436,7 +436,8 @@ const char *host_detect_local_cpu (int a has_ssse3 = ecx bit_SSSE3; has_sse4_1 = ecx bit_SSE4_1; has_sse4_2 = ecx bit_SSE4_2; - has_avx = ecx bit_AVX; + /* Don't check XCR0[2] - I think that can be 'lazy enabled' by the OS */ + has_avx = (ecx bit_AVX) (ecx bit_OSXSAVE); has_cmpxchg16b = ecx bit_CMPXCHG16B; has_movbe = ecx bit_MOVBE; has_popcnt = ecx bit_POPCNT;
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: dsl Date: Sun Dec 30 20:16:59 UTC 2012 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: i386.c Log Message: No need to check both TARGET_64BIT and ix86_preferred_stack_boundary = 64, if the former is true the latter is also true. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/external/gpl3/gcc/dist/gcc/config/i386/i386.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/i386.c diff -u src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.3 src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.4 --- src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.3 Tue Sep 18 07:04:41 2012 +++ src/external/gpl3/gcc/dist/gcc/config/i386/i386.c Sun Dec 30 20:16:58 2012 @@ -20222,7 +20222,7 @@ ix86_local_alignment (tree exp, enum mac TYPE_FIELDS (type)) { if (DECL_MODE (TYPE_FIELDS (type)) == DFmode align 64 - (TARGET_64BIT || ix86_preferred_stack_boundary = 64)) + ix86_preferred_stack_boundary = 64) return 64; if (ALIGN_MODE_128 (DECL_MODE (TYPE_FIELDS (type))) align 128) return 128; @@ -20232,7 +20232,7 @@ ix86_local_alignment (tree exp, enum mac { if (TYPE_MODE (type) == DFmode align 64 - (TARGET_64BIT || ix86_preferred_stack_boundary = 64)) + ix86_preferred_stack_boundary = 64) return 64; if (ALIGN_MODE_128 (TYPE_MODE (type)) align 128) return 128;
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: joerg Date: Sat Oct 6 14:10:46 UTC 2012 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: i386.h Log Message: PR 46978: ICE on spilling MMX registers GCC/i386 has code to lower the required alignment for long long to 32bit as the CPU doesn't need more. It is also using the same mode for setting up the MMX registers and in turn, the stack slots reserved for spilling require 32bit alignment. The actual vector types used keep the original 64bit alignment, so when the compiler wants to spill a MMX register, it hits an assertion. Fix this by using the vector type as raw type for MMX registers. To generate a diff of this commit: cvs rdiff -u -r1.1.1.2 -r1.2 \ src/external/gpl3/gcc/dist/gcc/config/i386/i386.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/i386.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/i386.h:1.1.1.2 src/external/gpl3/gcc/dist/gcc/config/i386/i386.h:1.2 --- src/external/gpl3/gcc/dist/gcc/config/i386/i386.h:1.1.1.2 Tue Sep 18 06:15:11 2012 +++ src/external/gpl3/gcc/dist/gcc/config/i386/i386.h Sat Oct 6 14:10:46 2012 @@ -1085,6 +1085,7 @@ enum target_cpu_default #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ (CC_REGNO_P (REGNO) ? VOIDmode \ + : MMX_REGNO_P (REGNO) ? V8QImode \ : (MODE) == VOIDmode (NREGS) != 1 ? VOIDmode \ : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false) \ : (MODE) == HImode !TARGET_PARTIAL_REG_STALL ? SImode \
CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Module Name:src Committed By: joerg Date: Fri Sep 14 13:00:01 UTC 2012 Modified Files: src/external/gpl3/gcc/dist/gcc/config/i386: i386.c netbsd-elf.h netbsd64.h Log Message: Fix GCC to correctly implement the i386 psABI on NetBSD. This consists of two parts: - for NetBSD/i386 and NetBSD/AMD64 with -m32, use a default stack alignment of 23bit as specified by the ABI - ensure that double and long long variables on the stack are by default only aligned to 32bit, if there is nothing else in the function needing a larger stack alignment The combination ensures that SSE variables on the stack trigger the realignment logic, but just using double or long long doesn't. To generate a diff of this commit: cvs rdiff -u -r1.1.1.1 -r1.2 \ src/external/gpl3/gcc/dist/gcc/config/i386/i386.c \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h cvs rdiff -u -r1.2 -r1.3 \ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/external/gpl3/gcc/dist/gcc/config/i386/i386.c diff -u src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.1.1.1 src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.2 --- src/external/gpl3/gcc/dist/gcc/config/i386/i386.c:1.1.1.1 Tue Jun 21 01:22:07 2011 +++ src/external/gpl3/gcc/dist/gcc/config/i386/i386.c Fri Sep 14 13:00:01 2012 @@ -20104,7 +20104,9 @@ ix86_local_alignment (tree exp, enum mac if (!TARGET_64BIT align == 64 ix86_preferred_stack_boundary 64 - (mode == DImode || (type TYPE_MODE (type) == DImode)) + (mode == DImode || (type TYPE_MODE (type) == DImode) + || mode == DFmode || (type TYPE_MODE (type) == DFmode) + || mode == DCmode || (type TYPE_MODE (type) == DCmode)) (!type || !TYPE_USER_ALIGN (type)) (!decl || !DECL_USER_ALIGN (decl))) align = 32; @@ -20150,7 +20152,8 @@ ix86_local_alignment (tree exp, enum mac || TREE_CODE (type) == QUAL_UNION_TYPE) TYPE_FIELDS (type)) { - if (DECL_MODE (TYPE_FIELDS (type)) == DFmode align 64) + if (DECL_MODE (TYPE_FIELDS (type)) == DFmode align 64 + (TARGET_64BIT || ix86_preferred_stack_boundary = 64)) return 64; if (ALIGN_MODE_128 (DECL_MODE (TYPE_FIELDS (type))) align 128) return 128; @@ -20159,7 +20162,8 @@ ix86_local_alignment (tree exp, enum mac || TREE_CODE (type) == INTEGER_TYPE) { - if (TYPE_MODE (type) == DFmode align 64) + if (TYPE_MODE (type) == DFmode align 64 + (TARGET_64BIT || ix86_preferred_stack_boundary = 64)) return 64; if (ALIGN_MODE_128 (TYPE_MODE (type)) align 128) return 128; Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.1.1.1 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.2 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h:1.1.1.1 Tue Jun 21 01:22:04 2011 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h Fri Sep 14 13:00:01 2012 @@ -70,3 +70,7 @@ along with GCC; see the file COPYING3. #define ENABLE_EXECUTE_STACK NETBSD_ENABLE_EXECUTE_STACK #define TARGET_VERSION fprintf (stderr, (NetBSD/x86_64 ELF)); + +/* Preserve i386 psABI */ +#undef PREFERRED_STACK_BOUNDARY_DEFAULT +#define PREFERRED_STACK_BOUNDARY_DEFAULT MIN_STACK_BOUNDARY Index: src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h diff -u src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.2 src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.3 --- src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h:1.2 Thu Feb 2 13:07:33 2012 +++ src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h Fri Sep 14 13:00:01 2012 @@ -126,3 +126,7 @@ along with GCC; see the file COPYING3. #undef X87_ENABLE_ARITH #define X87_ENABLE_ARITH(MODE) \ (flag_excess_precision == EXCESS_PRECISION_FAST || (MODE) == DFmode) + +/* Preserve i386 psABI */ +#undef PREFERRED_STACK_BOUNDARY_DEFAULT +#define PREFERRED_STACK_BOUNDARY_DEFAULT MIN_STACK_BOUNDARY