CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: thorpej Date: Mon Jan 4 18:14:38 UTC 2021 Modified Files: src/sys/arch/mips/ralink: ralink_intr.c Log Message: malloc(9) -> kmem(9) To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/ralink/ralink_intr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_intr.c diff -u src/sys/arch/mips/ralink/ralink_intr.c:1.6 src/sys/arch/mips/ralink/ralink_intr.c:1.7 --- src/sys/arch/mips/ralink/ralink_intr.c:1.6 Sun Nov 10 21:16:30 2019 +++ src/sys/arch/mips/ralink/ralink_intr.c Mon Jan 4 18:14:38 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_intr.c,v 1.6 2019/11/10 21:16:30 chs Exp $ */ +/* $NetBSD: ralink_intr.c,v 1.7 2021/01/04 18:14:38 thorpej Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,14 +29,14 @@ #define __INTR_PRIVATE #include -__KERNEL_RCSID(0, "$NetBSD: ralink_intr.c,v 1.6 2019/11/10 21:16:30 chs Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_intr.c,v 1.7 2021/01/04 18:14:38 thorpej Exp $"); #include #include #include #include #include -#include +#include #include #include @@ -267,7 +267,7 @@ ra_intr_establish(int intr, int (*func)( { struct evbmips_intrhand *ih; - ih = malloc(sizeof(*ih), M_DEVBUF, M_WAITOK); + ih = kmem_alloc(sizeof(*ih), KM_SLEEP); ih->ih_func = func; ih->ih_arg = arg; ih->ih_irq = intr; @@ -310,7 +310,7 @@ ra_intr_disestablish(void *arg) splx(s); - free(ih, M_DEVBUF); + kmem_free(ih, sizeof(*ih)); } /*
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: martin Date: Tue Mar 10 11:07:39 UTC 2020 Modified Files: src/sys/arch/mips/ralink: ralink_gpio.c Log Message: gcc thinks the static "led_index" could get out of range - not sure how that should happen, but test for >= instead of == on the array size. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/mips/ralink/ralink_gpio.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_gpio.c diff -u src/sys/arch/mips/ralink/ralink_gpio.c:1.7 src/sys/arch/mips/ralink/ralink_gpio.c:1.8 --- src/sys/arch/mips/ralink/ralink_gpio.c:1.7 Mon Jun 3 06:04:20 2019 +++ src/sys/arch/mips/ralink/ralink_gpio.c Tue Mar 10 11:07:39 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_gpio.c,v 1.7 2019/06/03 06:04:20 msaitoh Exp $ */ +/* $NetBSD: ralink_gpio.c,v 1.8 2020/03/10 11:07:39 martin Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,7 +29,7 @@ /* ra_gpio.c -- Ralink 3052 gpio driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_gpio.c,v 1.7 2019/06/03 06:04:20 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_gpio.c,v 1.8 2020/03/10 11:07:39 martin Exp $"); #include #include @@ -1580,7 +1580,7 @@ ra_gpio_toggle_LED(void *arg) (1 << (led_array1[led_index++] - SS_OFFSET))); #endif - if (led_index == (sizeof(led_array1))) { + if (led_index >= (sizeof(led_array1))) { led_index = 0; for (int i = 0; i < sizeof(led_array1); i++) { ra_gpio_pin_write(sc, led_array1[i], 1);
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: thorpej Date: Sat Jan 12 15:44:08 UTC 2019 Modified Files: src/sys/arch/mips/ralink: ralink_com.c Log Message: Explicitly size the regmap array. To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/ralink/ralink_com.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_com.c diff -u src/sys/arch/mips/ralink/ralink_com.c:1.8 src/sys/arch/mips/ralink/ralink_com.c:1.9 --- src/sys/arch/mips/ralink/ralink_com.c:1.8 Fri Jan 11 23:10:40 2019 +++ src/sys/arch/mips/ralink/ralink_com.c Sat Jan 12 15:44:08 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_com.c,v 1.8 2019/01/11 23:10:40 thorpej Exp $ */ +/* $NetBSD: ralink_com.c,v 1.9 2019/01/12 15:44:08 thorpej Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -130,7 +130,7 @@ /* ralink_com.c -- Ralink 3052 uart console driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_com.c,v 1.8 2019/01/11 23:10:40 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_com.c,v 1.9 2019/01/12 15:44:08 thorpej Exp $"); #include "locators.h" #include @@ -367,7 +367,7 @@ ralink_com_attach(device_t parent, devic com_attach_subr(sc); } -static const bus_size_t ralink_com_regmap[] = { +static const bus_size_t ralink_com_regmap[COM_REGMAP_NENTRIES] = { [COM_REG_RXDATA] = RA_UART_RBR, [COM_REG_TXDATA] = RA_UART_TBR, [COM_REG_DLBL] = RA_UART_DLL,
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: ryo Date: Wed Oct 5 15:39:31 UTC 2016 Modified Files: src/sys/arch/mips/ralink: ralink_eth.c ralink_reg.h Log Message: KNF; indent, spaces and tabs. No functional change. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/mips/ralink/ralink_eth.c cvs rdiff -u -r1.7 -r1.8 src/sys/arch/mips/ralink/ralink_reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_eth.c diff -u src/sys/arch/mips/ralink/ralink_eth.c:1.9 src/sys/arch/mips/ralink/ralink_eth.c:1.10 --- src/sys/arch/mips/ralink/ralink_eth.c:1.9 Fri Jun 10 13:27:12 2016 +++ src/sys/arch/mips/ralink/ralink_eth.c Wed Oct 5 15:39:31 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_eth.c,v 1.9 2016/06/10 13:27:12 ozaki-r Exp $ */ +/* $NetBSD: ralink_eth.c,v 1.10 2016/10/05 15:39:31 ryo Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,7 +29,7 @@ /* ralink_eth.c -- Ralink Ethernet Driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_eth.c,v 1.9 2016/06/10 13:27:12 ozaki-r Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_eth.c,v 1.10 2016/10/05 15:39:31 ryo Exp $"); #include #include @@ -63,12 +63,12 @@ __KERNEL_RCSID(0, "$NetBSD: ralink_eth.c #include #if 0 #define CPDEBUG/* XXX TMP DEBUG FIXME */ -#define RALINK_ETH_DEBUG /* XXX TMP DEBUG FIXME */ +#define RALINK_ETH_DEBUG /* XXX TMP DEBUG FIXME */ #define ENABLE_RALINK_DEBUG_ERROR 1 #define ENABLE_RALINK_DEBUG_MISC 1 #define ENABLE_RALINK_DEBUG_INFO 1 #define ENABLE_RALINK_DEBUG_FORCE 1 -#define ENABLE_RALINK_DEBUG_REG 1 +#define ENABLE_RALINK_DEBUG_REG 1 #endif #include @@ -77,49 +77,49 @@ __KERNEL_RCSID(0, "$NetBSD: ralink_eth.c struct ralink_rx_desc { uint32_t data_ptr; uint32_t rxd_info1; -#define RXD_LEN1(x) (((x) >> 0) & 0x3fff) -#define RXD_LAST1(1 << 14) -#define RXD_LEN0(x) (((x) >> 16) & 0x3fff) -#define RXD_LAST0(1 << 30) -#define RXD_DDONE(1 << 31) +#define RXD_LEN1(x) (((x) >> 0) & 0x3fff) +#define RXD_LAST1 (1 << 14) +#define RXD_LEN0(x) (((x) >> 16) & 0x3fff) +#define RXD_LAST0 (1 << 30) +#define RXD_DDONE (1 << 31) uint32_t unused; uint32_t rxd_info2; -#define RXD_FOE(x) (((x) >> 0) & 0x3fff) -#define RXD_FVLD (1 << 14) -#define RXD_INFO(x) (((x) >> 16) & 0xff) -#define RXD_PORT(x) (((x) >> 24) & 0x7) -#define RXD_INFO_CPU (1 << 27) -#define RXD_L4_FAIL (1 << 28) -#define RXD_IP_FAIL (1 << 29) -#define RXD_L4_VLD (1 << 30) -#define RXD_IP_VLD (1 << 31) +#define RXD_FOE(x) (((x) >> 0) & 0x3fff) +#define RXD_FVLD (1 << 14) +#define RXD_INFO(x) (((x) >> 16) & 0xff) +#define RXD_PORT(x) (((x) >> 24) & 0x7) +#define RXD_INFO_CPU (1 << 27) +#define RXD_L4_FAIL (1 << 28) +#define RXD_IP_FAIL (1 << 29) +#define RXD_L4_VLD (1 << 30) +#define RXD_IP_VLD (1 << 31) }; /* PDMA RX Descriptor Format */ struct ralink_tx_desc { uint32_t data_ptr0; uint32_t txd_info1; -#define TXD_LEN1(x) (((x) & 0x3fff) << 0) -#define TXD_LAST1(1 << 14) -#define TXD_BURST(1 << 15) -#define TXD_LEN0(x) (((x) & 0x3fff) << 16) -#define TXD_LAST0(1 << 30) -#define TXD_DDONE(1 << 31) +#define TXD_LEN1(x) (((x) & 0x3fff) << 0) +#define TXD_LAST1 (1 << 14) +#define TXD_BURST (1 << 15) +#define TXD_LEN0(x) (((x) & 0x3fff) << 16) +#define TXD_LAST0 (1 << 30) +#define TXD_DDONE (1 << 31) uint32_t data_ptr1; uint32_t txd_info2; -#define TXD_VIDX(x) (((x) & 0xf) << 0) -#define TXD_VPRI(x) (((x) & 0x7) << 4) -#define TXD_VEN (1 << 7) -#define TXD_SIDX(x) (((x) & 0xf) << 8) -#define TXD_SEN(x) (1 << 13) -#define TXD_QN(x)(((x) & 0x7) << 16) -#define TXD_PN(x)(((x) & 0x7) << 24) -#define TXD_PN_CPU 0 -#define TXD_PN_GDMA1 1 -#define TXD_PN_GDMA2 2 -#define TXD_TCP_EN (1 << 29) -#define TXD_UDP_EN (1 << 30) -#define TXD_IP_EN(1 << 31) +#define TXD_VIDX(x) (((x) & 0xf) << 0) +#define TXD_VPRI(x) (((x) & 0x7) << 4) +#define TXD_VEN (1 << 7) +#define TXD_SIDX(x) (((x) & 0xf) << 8) +#define TXD_SEN(x) (1 << 13) +#define TXD_QN(x) (((x) & 0x7) << 16) +#define TXD_PN(x) (((x) & 0x7) << 24) +#define TXD_PN_CPU 0 +#define TXD_PN_GDMA1 1 +#define TXD_PN_GDMA2 2 +#define TXD_TCP_EN (1 << 29) +#define TXD_UDP_EN (1 << 30) +#define TXD_IP_EN (1 << 31) }; /* TODO: @@ -255,7 +255,8 @@ static int ralink_eth_mii_read(device_t static void ralink_eth_mii_write(device_t, int, int, int); CFATTACH_DECL_NEW(reth, sizeof(struct ralink_eth_softc), -ralink_eth_match, ralink_eth_attach, ralink_eth_detach, ralink_eth_activate); +ralink_eth_match, ralink_eth_attach, ralink_eth_detach, +ralink_eth_activate); static inline uint32_t sy_read(const ralink_eth_softc_t *sc, const bus_size_t off) @@ -317,44 +318,44 @@ ralink_eth_attach(device_t parent, devic aprint_normal(": Ralink Ethernet\n"); evcnt_attach_dynamic(&sc->sc_evcnt_spurious_intr, EVCNT_TYPE_INTR, NULL, - de
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Wed Apr 30 00:54:47 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_ehci.c Log Message: Remove cfg1 manip, moved elsewhere. Use aprintf_normal_dev for some debug printfs To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/ralink/ralink_ehci.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_ehci.c diff -u src/sys/arch/mips/ralink/ralink_ehci.c:1.4 src/sys/arch/mips/ralink/ralink_ehci.c:1.5 --- src/sys/arch/mips/ralink/ralink_ehci.c:1.4 Tue Apr 29 17:10:07 2014 +++ src/sys/arch/mips/ralink/ralink_ehci.c Wed Apr 30 00:54:47 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_ehci.c,v 1.4 2014/04/29 17:10:07 matt Exp $ */ +/* $NetBSD: ralink_ehci.c,v 1.5 2014/04/30 00:54:47 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,7 +29,7 @@ /* ralink_ehci.c -- Ralink EHCI USB Driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_ehci.c,v 1.4 2014/04/29 17:10:07 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_ehci.c,v 1.5 2014/04/30 00:54:47 matt Exp $"); #include #include @@ -86,13 +86,8 @@ ralink_ehci_attach(device_t parent, devi struct ralink_ehci_softc * const sc = device_private(self); const struct mainbus_attach_args *ma = aux; struct ralink_usb_hc *ruh; - uint32_t r; - bus_space_handle_t sysctl_memh; usbd_status status; int error; -#ifdef RALINK_EHCI_DEBUG - const char *const devname = device_xname(self); -#endif aprint_naive(": EHCI USB controller\n"); aprint_normal(": EHCI USB controller\n"); @@ -102,22 +97,6 @@ ralink_ehci_attach(device_t parent, devi sc->sc_ehci.iot = ma->ma_memt; sc->sc_ehci.sc_bus.dmatag = ma->ma_dmat; - /* Map Sysctl registers */ - if (((error = bus_space_map(ma->ma_memt, RA_SYSCTL_BASE, 0x1, - 0, &sysctl_memh) != 0)) != 0) { - aprint_error_dev(self, "can't map Sysctl registers, " - "error=%d\n", error); - return; - } - - /* The USB block defaults PHY0 to device mode, change to host mode */ - r = bus_space_read_4(ma->ma_memt, sysctl_memh, RA_SYSCTL_CFG1); - r |= (1 << 10); - bus_space_write_4(ma->ma_memt, sysctl_memh, RA_SYSCTL_CFG1, r); - - /* done with Sysctl regs */ - bus_space_unmap(ma->ma_memt, sysctl_memh, 0x1); - /* Map EHCI registers */ if ((error = bus_space_map(sc->sc_ehci.iot, RA_USB_EHCI_BASE, RA_USB_BLOCK_SIZE, 0, &sc->sc_ehci.ioh)) != 0) { @@ -129,16 +108,16 @@ ralink_ehci_attach(device_t parent, devi sc->sc_ehci.sc_size = RA_USB_BLOCK_SIZE; sc->sc_ehci.sc_bus.usbrev = USBREV_2_0; -#ifdef RALINK_EHCI_DEBUG - printf("%s sc: %p ma: %p\n", devname, sc, ma); - printf("%s memt: %p dmat: %p\n", devname, ma->ma_memt, ma->ma_dmat); - printf("%s: EHCI HCCAPBASE=0x%x\n", devname, +#if defined(RALINK_EHCI_DEBUG) + aprint_normal_dev(self, "sc %p ma %p\n", sc, ma); + aprint_normal_dev(self, "memt %p dmat %p\n", ma->ma_memt, ma->ma_dmat); + aprint_normal_dev(self, "EHCI HCCAPBASE=%#x\n", EREAD4(&sc->sc_ehci, EHCI_CAPLENGTH)); - printf("%s: EHCI HCSPARAMS=0x%x\n", devname, + aprint_normal_dev(self, "EHCI HCSPARAMS=%#x\n", EREAD4(&sc->sc_ehci, EHCI_HCSPARAMS)); - printf("%s: EHCI HCCPARAMS=0x%x\n", devname, + aprint_normal_dev(self, "EHCI HCCPARAMS=%#x\n", EREAD4(&sc->sc_ehci, EHCI_HCCPARAMS)); - printf("%s: EHCI HCSP_PORTROUTE=0x%x\n", devname, + aprint_normal_dev(self, "EHCI HCSP_PORTROUTE=%#x\n", EREAD4(&sc->sc_ehci, EHCI_HCSP_PORTROUTE)); #endif @@ -146,12 +125,10 @@ ralink_ehci_attach(device_t parent, devi sc->sc_ehci.sc_offs = EREAD1(&sc->sc_ehci, EHCI_CAPLENGTH); EOWRITE4(&sc->sc_ehci, EHCI_USBINTR, 0); -#ifdef RALINK_EHCI_DEBUG - printf("%s: EHCI USBCMD=0x%x\n", devname, - EOREAD4(&sc->sc_ehci, EHCI_USBCMD)); - printf("%s: EHCI USBSTS=0x%x\n", devname, - EOREAD4(&sc->sc_ehci, EHCI_USBSTS)); - printf("%s: EHCI USBINTR=0x%x\n", devname, +#if defined(RALINK_EHCI_DEBUG) + aprint_normal_dev(self, "EHCI USBCMD=%#x USBSTS=%#x USBINTR=%#x\n", + EOREAD4(&sc->sc_ehci, EHCI_USBCMD), + EOREAD4(&sc->sc_ehci, EHCI_USBSTS), EOREAD4(&sc->sc_ehci, EHCI_USBINTR)); #endif
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Wed Apr 30 00:53:31 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_reg.h Log Message: Fix a few more register definitions. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/ralink/ralink_reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_reg.h diff -u src/sys/arch/mips/ralink/ralink_reg.h:1.6 src/sys/arch/mips/ralink/ralink_reg.h:1.7 --- src/sys/arch/mips/ralink/ralink_reg.h:1.6 Tue Apr 29 17:09:17 2014 +++ src/sys/arch/mips/ralink/ralink_reg.h Wed Apr 30 00:53:31 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_reg.h,v 1.6 2014/04/29 17:09:17 matt Exp $ */ +/* $NetBSD: ralink_reg.h,v 1.7 2014/04/30 00:53:31 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -55,6 +55,10 @@ #endif #define RA_BUS_FREQ 16600 /* DDR speed */ #define RA_UART_FREQ 4000 +#elif defined(MT7620) +#define RA_CLOCK_RATE 58000 +#define RA_BUS_FREQ (RA_CLOCK_RATE / 3) +#define RA_UART_FREQ 4000 #else /* Ralink dev board */ #define RA_CLOCK_RATE 38400 @@ -114,7 +118,7 @@ #if defined(RT3052) || defined(RT3050) #define RA_FLASH_BASE 0x1F00 #define RA_FLASH_END 0x1F7F -#elif defined(RT3883) +#elif defined(RT3883) || defined(MT7620) #define RA_FLASH_BASE 0x1C00 #define RA_FLASH_END 0x1DFF #endif @@ -207,7 +211,7 @@ #define SYSCTL_CLKCFG1_FE_GDMA_PCLK_EN __BIT(22) #define SYSCTL_CLKCFG1_PCIE_CLK_EN_3883 __BIT(21) #define SYSCTL_CLKCFG1_UPHY1_CLK_EN __BIT(20) -#define SYSCTL_CLKCFG1_PCIE_CLK_EN __BIT(19) +#define SYSCTL_CLKCFG1_PCI_CLK_EN __BIT(19) #define SYSCTL_CLKCFG1_UPHY0_CLK_EN_3883 __BIT(18) #define SYSCTL_CLKCFG1_GE2_CLK_EN_3883 __BIT(17) #define SYSCTL_CLKCFG1_GE1_CLK_EN_3883 __BIT(16) @@ -219,7 +223,7 @@ #define SYSCTL_CLKCFG1_UPHY0_CLK_EN_7620 __BIT(25) #define SYSCTL_CLKCFG1_ESW_CLK_EN __BIT(23) #define SYSCTL_CLKCFG1_FE_CLK_EN __BIT(21) -#define SYSCTL_CLKCFG1_UART_CLK_EN __BIT(19) +#define SYSCTL_CLKCFG1_UARTL_CLK_EN __BIT(19) #define SYSCTL_CLKCFG1_SPI_CLK_EN __BIT(18) #define SYSCTL_CLKCFG1_I2S_CLK_EN __BIT(17) #define SYSCTL_CLKCFG1_I2C_CLK_EN __BIT(16) @@ -256,7 +260,7 @@ #define RST_EPHY_7620 __BIT(24) #define RST_PCIE_3883 __BIT(23) #define RST_ESW_7620 __BIT(23) -#define RST_UHST_3883 __BIT(22) +#define RST_UHST __BIT(22) #define RST_FE __BIT(21) #define RST_WLAN __BIT(20) #define RST_UARTL __BIT(19)
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Wed Apr 30 00:52:49 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_mainbus.c Log Message: Instead of mainbus0 (root): Ralink System Bus be more explicit about the system: mainbus0 (root): Mediatek MT7620 System Bus To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ralink/ralink_mainbus.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_mainbus.c diff -u src/sys/arch/mips/ralink/ralink_mainbus.c:1.3 src/sys/arch/mips/ralink/ralink_mainbus.c:1.4 --- src/sys/arch/mips/ralink/ralink_mainbus.c:1.3 Wed Mar 26 17:42:00 2014 +++ src/sys/arch/mips/ralink/ralink_mainbus.c Wed Apr 30 00:52:49 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_mainbus.c,v 1.3 2014/03/26 17:42:00 christos Exp $ */ +/* $NetBSD: ralink_mainbus.c,v 1.4 2014/04/30 00:52:49 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_mainbus.c,v 1.3 2014/03/26 17:42:00 christos Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_mainbus.c,v 1.4 2014/04/30 00:52:49 matt Exp $"); #include #include @@ -86,16 +86,33 @@ mainbus_attach(device_t parent, device_t { mainbus_softc_t * const sc = device_private(self); struct mainbus_attach_args ma; + union { + char buf[9]; + uint32_t id[2]; + } xid; mainbus_found = true; - aprint_naive(": Ralink System Bus\n"); - aprint_normal(": Ralink System Bus\n"); - sc->sc_dev = self; + sc->sc_memt = &ra_bus_memt; + sc->sc_dmat = &ra_bus_dmat; + + xid.id[0] = bus_space_read_4(sc->sc_memt, ra_sysctl_bsh, RA_SYSCTL_ID0); + xid.id[1] = bus_space_read_4(sc->sc_memt, ra_sysctl_bsh, RA_SYSCTL_ID1); + xid.buf[8] = '\0'; + if (xid.buf[6] == ' ') { + xid.buf[6] = '\0'; + } else if (xid.buf[7] == ' ') { + xid.buf[7] = '\0'; + } + const char * const manuf = xid.buf[0] == 'M' ? "Mediatek" : "Ralink"; + + aprint_naive(": %s %s System Bus\n", manuf, xid.buf); + aprint_normal(": %s %s System Bus\n", manuf, xid.buf); + ma.ma_name = NULL; - ma.ma_memt = sc->sc_memt = &ra_bus_memt; - ma.ma_dmat = sc->sc_dmat = &ra_bus_dmat; + ma.ma_memt = sc->sc_memt; + ma.ma_dmat = sc->sc_dmat; /* attach critical devices */ mainbus_attach_critical(sc);
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Wed Apr 30 00:51:26 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_com.c Log Message: comment a #endif To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ralink/ralink_com.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_com.c diff -u src/sys/arch/mips/ralink/ralink_com.c:1.3 src/sys/arch/mips/ralink/ralink_com.c:1.4 --- src/sys/arch/mips/ralink/ralink_com.c:1.3 Wed Feb 1 02:05:14 2012 +++ src/sys/arch/mips/ralink/ralink_com.c Wed Apr 30 00:51:26 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_com.c,v 1.3 2012/02/01 02:05:14 matt Exp $ */ +/* $NetBSD: ralink_com.c,v 1.4 2014/04/30 00:51:26 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -130,7 +130,7 @@ /* ralink_com.c -- Ralink 3052 uart console driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_com.c,v 1.3 2012/02/01 02:05:14 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_com.c,v 1.4 2014/04/30 00:51:26 matt Exp $"); #include #include @@ -232,7 +232,7 @@ ralink_console_early(void) { cn_tab = &ralink_earlycons; } -#endif +#endif /* RALINK_CONSOLE_EARLY */ int
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Wed Apr 30 00:51:01 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_bus.c ralink_var.h Log Message: Add a static bus_space_handle_t for the core (sysctl) registers. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ralink/ralink_bus.c cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/ralink/ralink_var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_bus.c diff -u src/sys/arch/mips/ralink/ralink_bus.c:1.2 src/sys/arch/mips/ralink/ralink_bus.c:1.3 --- src/sys/arch/mips/ralink/ralink_bus.c:1.2 Thu Jul 28 15:38:49 2011 +++ src/sys/arch/mips/ralink/ralink_bus.c Wed Apr 30 00:51:01 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_bus.c,v 1.2 2011/07/28 15:38:49 matt Exp $ */ +/* $NetBSD: ralink_bus.c,v 1.3 2014/04/30 00:51:01 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -69,7 +69,7 @@ #include "locators.h" #include -__KERNEL_RCSID(0, "$NetBSD: ralink_bus.c,v 1.2 2011/07/28 15:38:49 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_bus.c,v 1.3 2014/04/30 00:51:01 matt Exp $"); #define _MIPS_BUS_DMA_PRIVATE #include @@ -91,10 +91,18 @@ struct mips_bus_dma_tag ra_bus_dmat = { ._dmatag_ops = _BUS_DMATAG_OPS_INITIALIZER, }; +const bus_space_handle_t ra_sysctl_bsh = +(bus_space_handle_t) RA_IOREG_VADDR(RA_SYSCTL_BASE, 0); + void ra_bus_init(void) { ra_bus_bus_mem_init(&ra_bus_memt, NULL); +#ifdef DIAGNOSTIC + bus_space_handle_t bsh = 0xdeadfa11; + bus_space_map(&ra_bus_memt, RA_SYSCTL_BASE, 0x100, 0, &bsh); + KASSERT(ra_sysctl_bsh == bsh); +#endif } /* Index: src/sys/arch/mips/ralink/ralink_var.h diff -u src/sys/arch/mips/ralink/ralink_var.h:1.5 src/sys/arch/mips/ralink/ralink_var.h:1.6 --- src/sys/arch/mips/ralink/ralink_var.h:1.5 Wed Feb 1 02:05:14 2012 +++ src/sys/arch/mips/ralink/ralink_var.h Wed Apr 30 00:51:01 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_var.h,v 1.5 2012/02/01 02:05:14 matt Exp $ */ +/* $NetBSD: ralink_var.h,v 1.6 2014/04/30 00:51:01 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -41,8 +41,9 @@ extern int ra_spiflash_read(void *, vad extern void ra_gpio_toggle_LED(void *); -extern struct mips_bus_space ra_bus_memt; -extern struct mips_bus_dma_tag ra_bus_dmat; +extern struct mips_bus_space ra_bus_memt; +extern struct mips_bus_dma_tag ra_bus_dmat; +extern const bus_space_handle_t ra_sysctl_bsh; struct mainbus_attach_args { const char *ma_name;
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Tue Apr 29 17:21:24 UTC 2014 Added Files: src/sys/arch/mips/ralink: ralink_pci.c Log Message: Stub for PCI/PCIe support for RT3883/MT7620 To generate a diff of this commit: cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/ralink/ralink_pci.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Added files: Index: src/sys/arch/mips/ralink/ralink_pci.c diff -u /dev/null src/sys/arch/mips/ralink/ralink_pci.c:1.1 --- /dev/null Tue Apr 29 17:21:24 2014 +++ src/sys/arch/mips/ralink/ralink_pci.c Tue Apr 29 17:21:24 2014 @@ -0,0 +1,71 @@ +/* $NetBSD: ralink_pci.c,v 1.1 2014/04/29 17:21:24 matt Exp $ */ +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "opt_pci.h" + +#include + +__KERNEL_RCSID(1, "$NetBSD: ralink_pci.c,v 1.1 2014/04/29 17:21:24 matt Exp $"); + +#include + +#include +#include + +#include +#include + +struct ralink_pci_softc { + device_t sc_dev; +}; + +static int ralink_pci_match(device_t, cfdata_t, void *); +static void ralink_pci_attach(device_t, device_t, void *); + +CFATTACH_DECL_NEW(ralink_pci, sizeof(struct ralink_pci_softc), +ralink_pci_match, ralink_pci_attach, NULL, NULL); + +static int +ralink_pci_match(device_t parent, cfdata_t cf, void *aux) +{ + return 1; +} + +static void +ralink_pci_attach(device_t parent, device_t self, void *aux) +{ + struct ralink_pci_softc * const sc = device_private(self); + + sc->sc_dev = self; + + aprint_naive(": Ralink PCIe Controller\n"); + aprint_normal(": Ralink PCIe Controller\n"); +} +
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Tue Apr 29 17:10:07 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_ehci.c ralink_ohci.c Log Message: Clean these up and move some defines to ralink_reg.h To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ralink/ralink_ehci.c cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ralink/ralink_ohci.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_ehci.c diff -u src/sys/arch/mips/ralink/ralink_ehci.c:1.3 src/sys/arch/mips/ralink/ralink_ehci.c:1.4 --- src/sys/arch/mips/ralink/ralink_ehci.c:1.3 Fri Jul 20 02:14:02 2012 +++ src/sys/arch/mips/ralink/ralink_ehci.c Tue Apr 29 17:10:07 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_ehci.c,v 1.3 2012/07/20 02:14:02 matt Exp $ */ +/* $NetBSD: ralink_ehci.c,v 1.4 2014/04/29 17:10:07 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,7 +29,7 @@ /* ralink_ehci.c -- Ralink EHCI USB Driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_ehci.c,v 1.3 2012/07/20 02:14:02 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_ehci.c,v 1.4 2014/04/29 17:10:07 matt Exp $"); #include #include @@ -47,9 +47,6 @@ __KERNEL_RCSID(0, "$NetBSD: ralink_ehci. #include #include -#define RT3XXX_EHCI_BASE 0x101c -#define RT3XXX_BLOCK_SIZE 0x1000 - struct ralink_ehci_softc { struct ehci_softc sc_ehci; void *sc_ih; @@ -122,14 +119,14 @@ ralink_ehci_attach(device_t parent, devi bus_space_unmap(ma->ma_memt, sysctl_memh, 0x1); /* Map EHCI registers */ - if ((error = bus_space_map(sc->sc_ehci.iot, RT3XXX_EHCI_BASE, - RT3XXX_BLOCK_SIZE, 0, &sc->sc_ehci.ioh)) != 0) { + if ((error = bus_space_map(sc->sc_ehci.iot, RA_USB_EHCI_BASE, + RA_USB_BLOCK_SIZE, 0, &sc->sc_ehci.ioh)) != 0) { aprint_error_dev(self, "can't map EHCI registers, " "error=%d\n", error); return; } - sc->sc_ehci.sc_size = RT3XXX_BLOCK_SIZE; + sc->sc_ehci.sc_size = RA_USB_BLOCK_SIZE; sc->sc_ehci.sc_bus.usbrev = USBREV_2_0; #ifdef RALINK_EHCI_DEBUG Index: src/sys/arch/mips/ralink/ralink_ohci.c diff -u src/sys/arch/mips/ralink/ralink_ohci.c:1.2 src/sys/arch/mips/ralink/ralink_ohci.c:1.3 --- src/sys/arch/mips/ralink/ralink_ohci.c:1.2 Thu Jul 28 15:38:49 2011 +++ src/sys/arch/mips/ralink/ralink_ohci.c Tue Apr 29 17:10:07 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_ohci.c,v 1.2 2011/07/28 15:38:49 matt Exp $ */ +/* $NetBSD: ralink_ohci.c,v 1.3 2014/04/29 17:10:07 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -31,7 +31,7 @@ #include "ehci.h" #include -__KERNEL_RCSID(0, "$NetBSD: ralink_ohci.c,v 1.2 2011/07/28 15:38:49 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_ohci.c,v 1.3 2014/04/29 17:10:07 matt Exp $"); #include #include @@ -51,9 +51,6 @@ __KERNEL_RCSID(0, "$NetBSD: ralink_ohci. #define OREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a)) #define OWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x)) -#define RT3XXX_OHCI_BASE 0x101c1000 -#define RT3XXX_BLOCK_SIZE 0x1000 - struct ralink_ohci_softc { struct ohci_softc sc_ohci; #if NEHCI > 0 @@ -86,7 +83,7 @@ static void ralink_ohci_attach(device_t parent, device_t self, void *aux) { struct ralink_ohci_softc * const sc = device_private(self); - const struct mainbus_attach_args *ma = aux; + const struct mainbus_attach_args * const ma = aux; usbd_status status; int error; #ifdef RALINK_OHCI_DEBUG @@ -102,14 +99,14 @@ ralink_ohci_attach(device_t parent, devi sc->sc_ohci.sc_bus.dmatag = ma->ma_dmat; /* Map I/O registers */ - if ((error = bus_space_map(sc->sc_ohci.iot, RT3XXX_OHCI_BASE, - RT3XXX_BLOCK_SIZE, 0, &sc->sc_ohci.ioh)) != 0) { + if ((error = bus_space_map(sc->sc_ohci.iot, RA_USB_OHCI_BASE, + RA_USB_BLOCK_SIZE, 0, &sc->sc_ohci.ioh)) != 0) { aprint_error_dev(self, "can't map OHCI registers, " "error=%d\n", error); return; } - sc->sc_ohci.sc_size = RT3XXX_BLOCK_SIZE; + sc->sc_ohci.sc_size = RA_USB_BLOCK_SIZE; #ifdef RALINK_OHCI_DEBUG printf("%s sc: %p ma: %p\n", devname, sc, ma);
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Tue Apr 29 17:09:17 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_reg.h Log Message: More MT7620 definitions To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/ralink/ralink_reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_reg.h diff -u src/sys/arch/mips/ralink/ralink_reg.h:1.5 src/sys/arch/mips/ralink/ralink_reg.h:1.6 --- src/sys/arch/mips/ralink/ralink_reg.h:1.5 Sat Apr 19 12:48:03 2014 +++ src/sys/arch/mips/ralink/ralink_reg.h Tue Apr 29 17:09:17 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_reg.h,v 1.5 2014/04/19 12:48:03 matt Exp $ */ +/* $NetBSD: ralink_reg.h,v 1.6 2014/04/29 17:09:17 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -33,6 +33,10 @@ #ifndef _RALINK_REG_H_ #define _RALINK_REG_H_ +#ifdef _KERNEL_OPT +#include "opt_rasoc.h" +#endif + #include #if defined(RT3050) @@ -103,6 +107,9 @@ #define RA_USB_OTG_BASE 0x101C #if defined(RT3883) || defined(MT7620) #define RA_USB_HOST_BASE 0x101C +#define RA_USB_BLOCK_SIZE 0x1000 +#define RA_USB_EHCI_BASE (RA_USB_HOST_BASE + 0x) +#define RA_USB_OHCI_BASE (RA_USB_EHCI_BASE + RA_USB_BLOCK_SIZE) #endif #if defined(RT3052) || defined(RT3050) #define RA_FLASH_BASE 0x1F00 @@ -164,6 +171,71 @@ #endif #if defined(RT3883) || defined(MT7620) +#define SYSCTL_CFG1_GE2_MODE __BITS(15,14) +#define SYSCTL_CFG1_GE1_MODE __BITS(13,12) +#define GE_MODE_RGMII 0 // RGMII mode (10/100/1000) +#define GE_MODE_MII 1 // MII mode (10/100) +#define GE_MODE_RMII 2 // Reverse MMI (10/100) +#define SYSCTL_CFG1_USB0_HOST_MODE __BIT(10) +#define SYSCTL_CFG1_PCIE_RC_MODE __BIT(8) +#endif +#if defined(RT3883) +#define SYSCTL_CFG1_PCI_HOST_MODE __BIT(7) +#define SYSCTL_CFG1_PCI_66M_MODE __BIT(6) +#endif + +#if defined(RT3883) || defined(MT7620) +#define SYSCTL_CLKCFG0_REFCLK0_RATE __BITS(11,9) +#endif +#if defined(RT3883) +#define SYSCTL_CLKCFG0_OSC_1US_DIV_3883 __BITS(21,16) +#define SYSCTL_CLKCFG0_REFCLK1_RATE __BITS(15,13) +#define SYSCTL_CLKCFG0_REFCLK0_IS_OUT __BIT(8) +#define SYSCTL_CLKCFG0_CPU_FREQ_ADJ __BITS(3,0) +#endif +#if defined(MT7620) +#define SYSCTL_CLKCFG0_OSC_1US_DIV_7620 __BITS(29,24) +#define SYSCTL_CLKCFG0_INT_CLK_FDIV __BITS(22,18) +#define SYSCTL_CLKCFG0_INT_CLK_FFRAC __BITS(16,12) +#define SYSCTL_CLKCFG0_PERI_CLK_SEL __BIT(4) +#define SYSCTL_CLKCFG0_EPHY_USE_25M __BIT(3) +#endif + +#if defined(RT3883) +#define SYSCTL_CLKCFG1_PBUS_DIV2 __BIT(30) +#define SYSCTL_CLKCFG1_SYS_TCK_EN __BIT(29) +#define SYSCTL_CLKCFG1_FE_GDMA_PCLK_EN __BIT(22) +#define SYSCTL_CLKCFG1_PCIE_CLK_EN_3883 __BIT(21) +#define SYSCTL_CLKCFG1_UPHY1_CLK_EN __BIT(20) +#define SYSCTL_CLKCFG1_PCIE_CLK_EN __BIT(19) +#define SYSCTL_CLKCFG1_UPHY0_CLK_EN_3883 __BIT(18) +#define SYSCTL_CLKCFG1_GE2_CLK_EN_3883 __BIT(17) +#define SYSCTL_CLKCFG1_GE1_CLK_EN_3883 __BIT(16) +#endif +#if defined(MT7620) +#define SYSCTL_CLKCFG1_SDHC_CLK_EN __BIT(30) +#define SYSCTL_CLKCFG1_AUX_SYS_TCK_EN __BIT(28) +#define SYSCTL_CLKCFG1_PCIE_CLK_EN_7620 __BIT(26) +#define SYSCTL_CLKCFG1_UPHY0_CLK_EN_7620 __BIT(25) +#define SYSCTL_CLKCFG1_ESW_CLK_EN __BIT(23) +#define SYSCTL_CLKCFG1_FE_CLK_EN __BIT(21) +#define SYSCTL_CLKCFG1_UART_CLK_EN __BIT(19) +#define SYSCTL_CLKCFG1_SPI_CLK_EN __BIT(18) +#define SYSCTL_CLKCFG1_I2S_CLK_EN __BIT(17) +#define SYSCTL_CLKCFG1_I2C_CLK_EN __BIT(16) +#define SYSCTL_CLKCFG1_NAND_CLK_EN __BIT(15) +#define SYSCTL_CLKCFG1_GDMA_CLK_EN __BIT(14) +#define SYSCTL_CLKCFG1_GPIO_CLK_EN __BIT(13) +#define SYSCTL_CLKCFG1_UART_CLK_EN __BIT(12) +#define SYSCTL_CLKCFG1_PCM_CLK_EN __BIT(11) +#define SYSCTL_CLKCFG1_MC_CLK_EN __BIT(10) +#define SYSCTL_CLKCFG1_INTC_CLK_EN __BIT(9) +#define SYSCTL_CLKCFG1_TIMER_CLK_EN __BIT(8) +#define SYSCTL_CLKCFG1_GE2_CLK_EN_7620 __BIT(7) +#define SYSCTL_CLKCFG1_GE1_CLK_EN_7620 __BIT(6) +#endif + +#if defined(RT3883) || defined(MT7620) /* 3883 doesn't have memo regs, use teststat instead */ #define RA_SYSCTL_MEMO0 0x18 #define RA_SYSCTL_MEMO1 0x1C @@ -172,14 +244,19 @@ #define RA_SYSCTL_MEMO1 0x6C #endif -#define RST_PPE __BIT(31) -#define RST_SDHC __BIT(30) -#define RST_MIPS_CNT __BIT(28) -#define RST_PCIE0 __BIT(26) -#define RST_UHST0 __BIT(25) -#define RST_EPHY __BIT(24) -#define RST_SW __BIT(23) -#define RST_OTG __BIT(22) +#define RST_PPE_7620 __BIT(31) +#define RST_SDHC_7620 __BIT(30) +#define RST_MIPS_CNT_7620 __BIT(28) +#define RST_PCIPCIE_3883 __BIT(27) +#define RST_FLASH_3883 __BIT(26) +#define RST_PCIE0_7620 __BIT(26) +#define RST_UDEV_3883 __BIT(25) +#define RST_UHST0_7620 __BIT(25) +#define RST_PCI_3883 __BIT(24) +#define RST_EPHY_7620 __BIT(24) +#define RST_PCIE_3883 __BIT(23) +#define RST_ESW_7620 __BIT(23) +#define RST_UHST_3883 __BIT(22) #define RST_FE __BIT(21) #define RST_WLAN __BIT(20) #de
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Sat Apr 19 12:48:03 UTC 2014 Modified Files: src/sys/arch/mips/ralink: ralink_reg.h Log Message: Add PCI register definitions To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/ralink/ralink_reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_reg.h diff -u src/sys/arch/mips/ralink/ralink_reg.h:1.4 src/sys/arch/mips/ralink/ralink_reg.h:1.5 --- src/sys/arch/mips/ralink/ralink_reg.h:1.4 Sun Feb 12 01:51:52 2012 +++ src/sys/arch/mips/ralink/ralink_reg.h Sat Apr 19 12:48:03 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_reg.h,v 1.4 2012/02/12 01:51:52 oki Exp $ */ +/* $NetBSD: ralink_reg.h,v 1.5 2014/04/19 12:48:03 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -36,76 +36,80 @@ #include #if defined(RT3050) -#define RA_CLOCK_RATE 32000 -#define RA_BUS_FREQ(RA_CLOCK_RATE / 3) -#define RA_UART_FREQ RA_BUS_FREQ +#define RA_CLOCK_RATE 32000 +#define RA_BUS_FREQ (RA_CLOCK_RATE / 3) +#define RA_UART_FREQ RA_BUS_FREQ #elif defined(RT3052) -#define RA_CLOCK_RATE 38400 -#define RA_BUS_FREQ(RA_CLOCK_RATE / 3) -#define RA_UART_FREQ RA_BUS_FREQ +#define RA_CLOCK_RATE 38400 +#define RA_BUS_FREQ (RA_CLOCK_RATE / 3) +#define RA_UART_FREQ RA_BUS_FREQ #elif defined(RT3883) #if 0 -#define RA_CLOCK_RATE 48000 +#define RA_CLOCK_RATE 48000 #else -#define RA_CLOCK_RATE 5 +#define RA_CLOCK_RATE 5 #endif -#define RA_BUS_FREQ16600 /* DDR speed */ -#define RA_UART_FREQ 4000 +#define RA_BUS_FREQ 16600 /* DDR speed */ +#define RA_UART_FREQ 4000 #else /* Ralink dev board */ -#define RA_CLOCK_RATE 38400 -#define RA_BUS_FREQ(RA_CLOCK_RATE / 3) -#define RA_UART_FREQ RA_BUS_FREQ +#define RA_CLOCK_RATE 38400 +#define RA_BUS_FREQ (RA_CLOCK_RATE / 3) +#define RA_UART_FREQ RA_BUS_FREQ #endif -#define RA_BAUDRATECONSPEED -#define RA_SERIAL_CLKDIV 16 - -#define RA_SRAM_BASE 0x -#define RA_SRAM_END0x0FFF -#define RA_SYSCTL_BASE 0x1000 -#define RA_TIMER_BASE 0x1100 -#define RA_INTCTL_BASE 0x1200 -#define RA_MEMCTL_BASE 0x1300 +#define RA_BAUDRATE CONSPEED +#define RA_SERIAL_CLKDIV 16 + +#define RA_SRAM_BASE 0x +#define RA_SRAM_END 0x0FFF +#define RA_SYSCTL_BASE 0x1000 +#define RA_TIMER_BASE 0x1100 +#define RA_INTCTL_BASE 0x1200 +#define RA_MEMCTL_BASE 0x1300 #if defined(RT3052) || defined(RT3050) -#define RA_PCM_BASE0x1400 +#define RA_PCM_BASE 0x1400 #endif -#define RA_UART_BASE 0x1500 -#define RA_PIO_BASE0x1600 +#define RA_UART_BASE 0x1500 +#define RA_PIO_BASE 0x1600 #if defined(RT3052) || defined(RT3050) -#define RA_GDMA_BASE 0x1700 +#define RA_GDMA_BASE 0x1700 #elif defined(RT3883) -#define RA_FLASHCTL_BASE 0x1700 +#define RA_FLASHCTL_BASE 0x1700 #endif -#define RA_NANDCTL_BASE0x1800 -#define RA_I2C_BASE0x1900 -#define RA_I2S_BASE0x1A00 -#define RA_SPI_BASE0x1B00 -#define RA_UART_LITE_BASE 0x1C00 -#if defined(RT3883) -#define RA_PCM_BASE0x10002000 -#define RA_GDMA_BASE 0x10002800 -#define RA_CODEC1_BASE 0x10003000 -#define RA_CODEC2_BASE 0x10003800 -#endif -#define RA_FRAME_ENGINE_BASE 0x1010 -#define RA_ETH_SW_BASE 0x1011 -#define RA_ROM_BASE0x10118000 +#define RA_NANDCTL_BASE 0x1800 +#define RA_I2C_BASE 0x1900 +#define RA_I2S_BASE 0x1A00 +#define RA_SPI_BASE 0x1B00 +#define RA_UART_LITE_BASE 0x1C00 #if defined(RT3883) -#define RA_USB_DEVICE_BASE 0x1012 -#define RA_PCI_BASE0x1014 +#define RA_PCM_BASE 0x10002000 +#define RA_GDMA_BASE 0x10002800 +#define RA_CODEC1_BASE 0x10003000 +#define RA_CODEC2_BASE 0x10003800 #endif -#define RA_11N_MAC_BASE0x1018 -#define RA_USB_OTG_BASE0x101C -#if defined(RT3883) -#define RA_USB_HOST_BASE 0x101C +#define RA_FRAME_ENGINE_BASE 0x1010 +#define RA_ETH_SW_BASE 0x1011 +#define RA_ROM_BASE 0x10118000 +#if defined(RT3883) || defined(MT7620) +#define RA_USB_DEVICE_BASE 0x1012 +#if defined(MT7620) +#define RA_SDHC_BASE 0x1013 +#endif +#define RA_PCI_BASE 0x1014 +#define RA_PCIWIN_BASE 0x1015 +#endif +#define RA_11N_MAC_BASE 0x1018 +#define RA_USB_OTG_BASE 0x101C +#if defined(RT3883) || defined(MT7620) +#define RA_USB_HOST_BASE 0x101C #endif #if defined(RT3052) || defined(RT3050) -#define RA_FLASH_BASE 0x1F00 -#define RA_FLASH_END
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: oki Date: Sun Feb 12 01:51:53 UTC 2012 Modified Files: src/sys/arch/mips/ralink: ralink_reg.h Log Message: add RT3050 SYSCTL_CFG0 values. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ralink/ralink_reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_reg.h diff -u src/sys/arch/mips/ralink/ralink_reg.h:1.3 src/sys/arch/mips/ralink/ralink_reg.h:1.4 --- src/sys/arch/mips/ralink/ralink_reg.h:1.3 Wed Aug 3 16:27:15 2011 +++ src/sys/arch/mips/ralink/ralink_reg.h Sun Feb 12 01:51:52 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_reg.h,v 1.3 2011/08/03 16:27:15 matt Exp $ */ +/* $NetBSD: ralink_reg.h,v 1.4 2012/02/12 01:51:52 oki Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -127,6 +127,18 @@ #define RA_SYSCTL_RSTSTAT 0x38 #define RA_SYSCTL_GPIOMODE 0x60 +#if defined(RT3050) || defined(RT3052) +#define SYSCTL_CFG0_INIC_EE_SDRAM __BIT(29) +#define SYSCTL_CFG0_INIC_8MB_SDRAM __BIT(28) +#define SYSCTL_CFG0_GE0_MODE __BITS(24,25) +#define SYSCTL_CFG0_BYPASS_PLL __BIT(21) +#define SYSCTL_CFG0_BE __BIT(20) +#define SYSCTL_CFG0_CPU_CLK_SEL __BIT(18) +#define SYSCTL_CFG0_BOOT_FROM __BITS(16,17) +#define SYSCTL_CFG0_TEST_CODE __BITS(8,15) +#define SYSCTL_CFG0_SRAM_CS_MODE __BITS(2,3) +#define SYSCTL_CFG0_SDRAM_CLK_DRV __BIT(0) +#else #define SYSCTL_CFG0_BE __BIT(19) #define SYSCTL_CFG0_DRAM_SIZE __BITS(12,14) #define SYSCTL_CFG0_DRAM_2MB 0 @@ -136,6 +148,7 @@ #define SYSCTL_CFG0_DRAM_64MB 4 #define SYSCTL_CFG0_DRAM_128MB 5 #define SYSCTL_CFG0_DRAM_256MB 6 +#endif #if defined(RT3883) /* 3883 doesn't have memo regs, use teststat instead */
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: oki Date: Tue Aug 23 08:10:08 UTC 2011 Modified Files: src/sys/arch/mips/ralink: ralink_eth.c Log Message: make compile with options RT3050. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/mips/ralink/ralink_eth.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_eth.c diff -u src/sys/arch/mips/ralink/ralink_eth.c:1.4 src/sys/arch/mips/ralink/ralink_eth.c:1.5 --- src/sys/arch/mips/ralink/ralink_eth.c:1.4 Wed Aug 3 17:34:27 2011 +++ src/sys/arch/mips/ralink/ralink_eth.c Tue Aug 23 08:10:08 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_eth.c,v 1.4 2011/08/03 17:34:27 matt Exp $ */ +/* $NetBSD: ralink_eth.c,v 1.5 2011/08/23 08:10:08 oki Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,7 +29,7 @@ /* ralink_eth.c -- Ralink Ethernet Driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_eth.c,v 1.4 2011/08/03 17:34:27 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_eth.c,v 1.5 2011/08/23 08:10:08 oki Exp $"); #include #include @@ -734,7 +734,7 @@ bus_space_write_4(sc->sc_memt, sc->sc_sw_memh, RA_ETH_SW_SGC2, 0x); bus_space_write_4(sc->sc_memt, sc->sc_sw_memh, RA_ETH_SW_PFC1, - 0x0040); /* check VLAN tag on port forward */); + 0x0040); /* check VLAN tag on port forward */ bus_space_write_4(sc->sc_memt, sc->sc_sw_memh, RA_ETH_SW_VLANI0, 0x2001); bus_space_write_4(sc->sc_memt, sc->sc_sw_memh, RA_ETH_SW_PVIDC0, @@ -764,38 +764,38 @@ /* do some mii magic TODO: define these registers/bits */ /* lower down PHY 10Mbps mode power */ /* select local register */ - ralink_eth_mii_write(&sc->sc_dev, 0, 31, 0x8000); + ralink_eth_mii_write(sc->sc_dev, 0, 31, 0x8000); for (i=0;i<5;i++){ /* set TX10 waveform coefficient */ - ralink_eth_mii_write(&sc->sc_dev, i, 26, 0x1601); + ralink_eth_mii_write(sc->sc_dev, i, 26, 0x1601); /* set TX100/TX10 AD/DA current bias */ - ralink_eth_mii_write(&sc->sc_dev, i, 29, 0x7058); + ralink_eth_mii_write(sc->sc_dev, i, 29, 0x7058); /* set TX100 slew rate control */ - ralink_eth_mii_write(&sc->sc_dev, i, 30, 0x0018); + ralink_eth_mii_write(sc->sc_dev, i, 30, 0x0018); } /* PHY IOT */ /* select global register */ - ralink_eth_mii_write(&sc->sc_dev, 0, 31, 0x0); + ralink_eth_mii_write(sc->sc_dev, 0, 31, 0x0); /* tune TP_IDL tail and head waveform */ - ralink_eth_mii_write(&sc->sc_dev, 0, 22, 0x052f); + ralink_eth_mii_write(sc->sc_dev, 0, 22, 0x052f); /* set TX10 signal amplitude threshold to minimum */ - ralink_eth_mii_write(&sc->sc_dev, 0, 17, 0x0fe0); + ralink_eth_mii_write(sc->sc_dev, 0, 17, 0x0fe0); /* set squelch amplitude to higher threshold */ - ralink_eth_mii_write(&sc->sc_dev, 0, 18, 0x40ba); + ralink_eth_mii_write(sc->sc_dev, 0, 18, 0x40ba); /* longer TP_IDL tail length */ - ralink_eth_mii_write(&sc->sc_dev, 0, 14, 0x65); + ralink_eth_mii_write(sc->sc_dev, 0, 14, 0x65); /* select local register */ - ralink_eth_mii_write(&sc->sc_dev, 0, 31, 0x8000); + ralink_eth_mii_write(sc->sc_dev, 0, 31, 0x8000); #else /* GE1 + GigSW */ fe_write(sc, RA_FE_MDIO_CFG1, @@ -1571,7 +1571,7 @@ else data |= GPIOMODE_MDIO; - sy_write(sc, RA__GPIOMODE, data); + sy_write(sc, RA_SYSCTL_GPIOMODE, data); } #else #define ralink_eth_mdio_enable(sc, enable) @@ -1612,7 +1612,7 @@ static int ralink_eth_mii_read(device_t self, int phy_addr, int phy_reg) { - const ralink_eth_softc_t *sc = device_private(self); + ralink_eth_softc_t *sc = device_private(self); KASSERT(sc != NULL); #if 0 printf("%s() phy_addr: %d phy_reg: %d\n", __func__, phy_addr, phy_reg); @@ -1642,7 +1642,7 @@ #if defined(RT3050) || defined(RT3052) sw_write(sc, RA_ETH_SW_PCTL0, - PCTL0_RD_CMD | PCTL0_REG(phy_reg) | PCTL0_ADDR(phy_addr); + PCTL0_RD_CMD | PCTL0_REG(phy_reg) | PCTL0_ADDR(phy_addr)); #else fe_write(sc, RA_FE_MDIO_ACCESS, MDIO_ACCESS_PHY_ADDR(phy_addr) | MDIO_ACCESS_REG(phy_reg)); @@ -1680,7 +1680,7 @@ static void ralink_eth_mii_write(device_t self, int phy_addr, int phy_reg, int val) { - const ralink_eth_softc_t *sc = device_private(self); + ralink_eth_softc_t *sc = device_private(self); KASSERT(sc != NULL); #if 0 printf("%s() phy_addr: %d phy_reg: %d val: 0x%04x\n",
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Wed Aug 3 16:27:15 UTC 2011 Modified Files: src/sys/arch/mips/ralink: ralink_reg.h Log Message: Add some defintions for SYSCTL_CFG0 To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ralink/ralink_reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_reg.h diff -u src/sys/arch/mips/ralink/ralink_reg.h:1.2 src/sys/arch/mips/ralink/ralink_reg.h:1.3 --- src/sys/arch/mips/ralink/ralink_reg.h:1.2 Thu Jul 28 15:38:49 2011 +++ src/sys/arch/mips/ralink/ralink_reg.h Wed Aug 3 16:27:15 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_reg.h,v 1.2 2011/07/28 15:38:49 matt Exp $ */ +/* $NetBSD: ralink_reg.h,v 1.3 2011/08/03 16:27:15 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -127,6 +127,16 @@ #define RA_SYSCTL_RSTSTAT 0x38 #define RA_SYSCTL_GPIOMODE 0x60 +#define SYSCTL_CFG0_BE __BIT(19) +#define SYSCTL_CFG0_DRAM_SIZE __BITS(12,14) +#define SYSCTL_CFG0_DRAM_2MB 0 +#define SYSCTL_CFG0_DRAM_8MB 1 +#define SYSCTL_CFG0_DRAM_16MB 2 +#define SYSCTL_CFG0_DRAM_32MB 3 +#define SYSCTL_CFG0_DRAM_64MB 4 +#define SYSCTL_CFG0_DRAM_128MB 5 +#define SYSCTL_CFG0_DRAM_256MB 6 + #if defined(RT3883) /* 3883 doesn't have memo regs, use teststat instead */ #define RA_SYSCTL_MEMO00x18
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Wed Aug 3 16:26:53 UTC 2011 Modified Files: src/sys/arch/mips/ralink: ralink_var.h Log Message: Deal with RA_CONSOLE_EARLY a little more sanely To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ralink/ralink_var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/ralink/ralink_var.h diff -u src/sys/arch/mips/ralink/ralink_var.h:1.3 src/sys/arch/mips/ralink/ralink_var.h:1.4 --- src/sys/arch/mips/ralink/ralink_var.h:1.3 Mon Aug 1 23:01:40 2011 +++ src/sys/arch/mips/ralink/ralink_var.h Wed Aug 3 16:26:53 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_var.h,v 1.3 2011/08/01 23:01:40 matt Exp $ */ +/* $NetBSD: ralink_var.h,v 1.4 2011/08/03 16:26:53 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -57,8 +57,7 @@ /* helper defines */ #define MS_TO_HZ(ms) ((ms) * hz / 1000) -#if 0 -#define RA_CONSOLE_EARLY 1 +#ifdef RA_CONSOLE_EARLY extern void ra_console_early(void); #endif
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: cliff Date: Tue Aug 2 03:38:48 UTC 2011 Added Files: src/sys/arch/mips/ralink: ralink_cfi.c Log Message: CFI NOR support for mips/ralink To generate a diff of this commit: cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/ralink/ralink_cfi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Added files: Index: src/sys/arch/mips/ralink/ralink_cfi.c diff -u /dev/null src/sys/arch/mips/ralink/ralink_cfi.c:1.1 --- /dev/null Tue Aug 2 03:38:48 2011 +++ src/sys/arch/mips/ralink/ralink_cfi.c Tue Aug 2 03:38:48 2011 @@ -0,0 +1,191 @@ +/* $NetBSD: ralink_cfi.c,v 1.1 2011/08/02 03:38:48 cliff Exp $ */ +/*- + * Copyright (c) 2011 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Cliff Neighbors. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * NOR CFI driver support for ralink + */ + +#include "opt_flash.h" +#include "locators.h" + +#include +__KERNEL_RCSID(0, "$NetBSD: ralink_cfi.c,v 1.1 2011/08/02 03:38:48 cliff Exp $"); + +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include +#include + + +static int ra_cfi_match(device_t, cfdata_t, void *); +static void ra_cfi_attach(device_t, device_t, void *); +static int ra_cfi_detach(device_t, int); + +struct ra_cfi_softc { + device_t sc_dev; + device_t sc_nordev; + struct cfi sc_cfi; + bus_addr_t sc_addr; + bus_size_t sc_size; + struct nor_interface sc_nor_if; +}; + +CFATTACH_DECL_NEW(ralink_cfi, sizeof(struct ra_cfi_softc), ra_cfi_match, +ra_cfi_attach, ra_cfi_detach, NULL); + +/* + * ra_cfi_addr - return bus address for the CFI NOR flash + */ +static inline bus_addr_t +ra_cfi_addr(struct mainbus_attach_args * const ma) +{ + return RA_FLASH_BASE; /* XXX configure TBD */ +} + +static int +ra_cfi_match(device_t parent, cfdata_t match, void *aux) +{ + struct mainbus_attach_args * const ma = aux; + bus_size_t tmpsize = CFI_QRY_MIN_MAP_SIZE; + bus_addr_t addr; + struct cfi cfi; + int rv; + + KASSERT(ma->ma_memt != NULL); + + addr = ra_cfi_addr(ma); +#ifdef NOTYET + if (addr == MAINBUSCF_ADDR_DEFAULT) { + aprint_error("%s: no base address\n", __func__); + return 0; + } +#endif + + cfi.cfi_bst = ma->ma_memt; + int error = bus_space_map(cfi.cfi_bst, addr, tmpsize, 0, &cfi.cfi_bsh); + if (error != 0) { + aprint_error("%s: cannot map %#" PRIxBUSSIZE" at offset %#" + PRIxBUSADDR ", error %d\n", __func__, tmpsize, addr, error); + return false; + } + + if (! cfi_probe(&cfi)) { + aprint_debug("%s: probe addr %#" PRIxBUSADDR + ", CFI not found\n", __func__, addr); + rv = 0; + } else { + rv = 1; + } + + bus_space_unmap(cfi.cfi_bst, cfi.cfi_bsh, tmpsize); + + return rv; +} + +static void +ra_cfi_attach(device_t parent, device_t self, void *aux) +{ + struct ra_cfi_softc *sc = device_private(self); + struct mainbus_attach_args * const ma = aux; + struct cfi_query_data * const qryp = &sc->sc_cfi.cfi_qry_data; + const bus_size_t tmpsize = CFI_QRY_MIN_MAP_SIZE; + bool found; + int error; + + aprint_normal("\n"); + + sc->sc_dev = self; + sc->sc_cfi.cfi_bst = ma->ma_memt; + sc->sc_addr = ra_cfi_addr(ma); + + /* map enough to identify, remap later when size is known */ + error = bus_space_map(sc->sc_cfi.cfi_bst, sc->sc_addr, tmpsize, + 0, &sc->sc_cfi.cfi_bsh); + if (error != 0) { + aprint_error_dev(self, "could not map error %d\n", error); + return; + } + + found = cfi_identify(&sc->sc_cfi); + + bus_space_unmap(sc->sc_cfi.cfi_bst, sc->sc_cfi.cfi_bsh, tmpsize); + + if (! found) { + /* should not happen, we already probed OK in match */ + apr
CVS commit: src/sys/arch/mips/ralink
Module Name:src Committed By: matt Date: Mon Aug 1 23:01:40 UTC 2011 Modified Files: src/sys/arch/mips/ralink: ralink_eth.c ralink_var.h Log Message: Use Modified files: Index: src/sys/arch/mips/ralink/ralink_eth.c diff -u src/sys/arch/mips/ralink/ralink_eth.c:1.2 src/sys/arch/mips/ralink/ralink_eth.c:1.3 --- src/sys/arch/mips/ralink/ralink_eth.c:1.2 Thu Jul 28 15:38:49 2011 +++ src/sys/arch/mips/ralink/ralink_eth.c Mon Aug 1 23:01:40 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_eth.c,v 1.2 2011/07/28 15:38:49 matt Exp $ */ +/* $NetBSD: ralink_eth.c,v 1.3 2011/08/01 23:01:40 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,14 +29,16 @@ /* ralink_eth.c -- Ralink Ethernet Driver */ #include -__KERNEL_RCSID(0, "$NetBSD: ralink_eth.c,v 1.2 2011/07/28 15:38:49 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: ralink_eth.c,v 1.3 2011/08/01 23:01:40 matt Exp $"); #include +#include #include #include #include #include #include +#include #include #include #include @@ -53,9 +55,6 @@ #include -#include -#include - #include #include #include Index: src/sys/arch/mips/ralink/ralink_var.h diff -u src/sys/arch/mips/ralink/ralink_var.h:1.2 src/sys/arch/mips/ralink/ralink_var.h:1.3 --- src/sys/arch/mips/ralink/ralink_var.h:1.2 Thu Jul 28 15:38:49 2011 +++ src/sys/arch/mips/ralink/ralink_var.h Mon Aug 1 23:01:40 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: ralink_var.h,v 1.2 2011/07/28 15:38:49 matt Exp $ */ +/* $NetBSD: ralink_var.h,v 1.3 2011/08/01 23:01:40 matt Exp $ */ /*- * Copyright (c) 2011 CradlePoint Technology, Inc. * All rights reserved. @@ -29,7 +29,7 @@ #ifndef _RALINK_VAR_H_ #define _RALINK_VAR_H_ -#include +#include extern void ralink_com_early(int);