svn commit: r368604 - in head/sys/powerpc: include powerpc
Author: bdragon
Date: Sun Dec 13 03:58:43 2020
New Revision: 368604
URL: https://svnweb.freebsd.org/changeset/base/368604
Log:
[PowerPC] Floating-point exception trap followup
* Fix incorrect operation on 32-bit caused by incorrectly-sized storage
for a temporary FPSCR.
* Fix several whitespace problems.
* Don't try to enable VSX during cleanup_fpscr().
Reviewed by: alfredo, jhibbits (earlier version)
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D27453
Modified:
head/sys/powerpc/include/cpufunc.h
head/sys/powerpc/powerpc/exec_machdep.c
head/sys/powerpc/powerpc/fpu.c
Modified: head/sys/powerpc/include/cpufunc.h
==
--- head/sys/powerpc/include/cpufunc.h Sun Dec 13 02:21:54 2020
(r368603)
+++ head/sys/powerpc/include/cpufunc.h Sun Dec 13 03:58:43 2020
(r368604)
@@ -163,21 +163,21 @@ mttb(u_quad_t time)
mtspr(TBR_TBWL, (uint32_t)(time & 0x));
}
-
static __inline register_t
mffs(void)
{
- register_t value;
+ uint64_t value;
__asm __volatile ("mffs 0; stfd 0,0(%0)"
:: "b"());
- return (value);
+ return ((register_t)value);
}
static __inline void
-mtfsf(register_t value)
+mtfsf(uint64_t value)
{
+
__asm __volatile ("lfd 0,0(%0); mtfsf 0xff,0"
:: "b"());
}
Modified: head/sys/powerpc/powerpc/exec_machdep.c
==
--- head/sys/powerpc/powerpc/exec_machdep.c Sun Dec 13 02:21:54 2020
(r368603)
+++ head/sys/powerpc/powerpc/exec_machdep.c Sun Dec 13 03:58:43 2020
(r368604)
@@ -239,14 +239,13 @@ sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask
usfp = (void *)((sp - rndfsize) & ~0xFul);
}
- /*
+ /*
* Set Floating Point facility to "Ignore Exceptions Mode" so signal
-* handler can run.
+* handler can run.
*/
if (td->td_pcb->pcb_flags & PCB_FPU)
tf->srr1 = tf->srr1 & ~(PSL_FE0 | PSL_FE1);
-
/*
* Set up the registers to return to sigcode.
*
@@ -334,10 +333,10 @@ sys_sigreturn(struct thread *td, struct sigreturn_args
if (error != 0)
return (error);
- /*
+ /*
* Save FPU state if needed. User may have changed it on
-* signal handler
-*/
+* signal handler
+*/
if (uc.uc_mcontext.mc_srr1 & PSL_FP)
save_fpu(td);
Modified: head/sys/powerpc/powerpc/fpu.c
==
--- head/sys/powerpc/powerpc/fpu.c Sun Dec 13 02:21:54 2020
(r368603)
+++ head/sys/powerpc/powerpc/fpu.c Sun Dec 13 03:58:43 2020
(r368604)
@@ -209,7 +209,6 @@ save_fpu_nodrop(struct thread *td)
save_fpu_int(td);
}
-
/*
* Clear Floating-Point Status and Control Register
*/
@@ -217,19 +216,18 @@ void
cleanup_fpscr()
{
register_t msr;
- msr = mfmsr();
- mtmsr(msr | PSL_FP | PSL_VSX);
+ msr = mfmsr();
+ mtmsr(msr | PSL_FP);
mtfsf(0);
isync();
mtmsr(msr);
}
-
/*
- * * Returns the current fp exception
- * */
+ * Get the current fp exception
+ */
u_int
get_fpu_exception(struct thread *td)
{
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svn commit: r368290 - in head/sys/powerpc: include powerpc
Author: bdragon
Date: Thu Dec 3 01:39:59 2020
New Revision: 368290
URL: https://svnweb.freebsd.org/changeset/base/368290
Log:
[PowerPC64LE] Fix LE VSX/fpr interop
In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.
In LE, we need to have a dword of padding before the fprs so they end up
on the correct side, as the struct may be manipulated by either the FP
routines or the VSX routines.
Additionally, when saving and restoring fprs, we need to explicitly target
the fpr union member so it gets offset correctly on LE.
Fixes weirdness with FP registers in VSX-using programs (A FPR that was
saved by the FP routines but restored by the VSX routines was becoming 0
due to being loaded to the wrong side of the VSR.)
Original patch by jhibbits.
Reviewed by: jhibbits
Differential Revision:https://reviews.freebsd.org/D27431
Modified:
head/sys/powerpc/include/pcb.h
head/sys/powerpc/powerpc/fpu.c
Modified: head/sys/powerpc/include/pcb.h
==
--- head/sys/powerpc/include/pcb.h Wed Dec 2 23:16:24 2020
(r368289)
+++ head/sys/powerpc/include/pcb.h Thu Dec 3 01:39:59 2020
(r368290)
@@ -37,6 +37,8 @@
#ifndef _MACHINE_PCB_H_
#define_MACHINE_PCB_H_
+#include
+
#include
#ifndef _STANDALONE
@@ -62,8 +64,16 @@ struct pcb {
#definePCB_CFSCR 0x40/* Process had FSCR updated */
struct fpu {
union {
+#if _BYTE_ORDER == _BIG_ENDIAN
double fpr;
uint32_t vsr[4];
+#else
+ uint32_t vsr[4];
+ struct {
+ double padding;
+ double fpr;
+ };
+#endif
} fpr[32];
double fpscr; /* FPSCR stored as double for easier access */
} pcb_fpu; /* Floating point processor */
Modified: head/sys/powerpc/powerpc/fpu.c
==
--- head/sys/powerpc/powerpc/fpu.c Wed Dec 2 23:16:24 2020
(r368289)
+++ head/sys/powerpc/powerpc/fpu.c Thu Dec 3 01:39:59 2020
(r368290)
@@ -79,7 +79,7 @@ save_fpu_int(struct thread *td)
#undef SFP
} else {
#define SFP(n) __asm ("stfd " #n ", 0(%0)" \
- :: "b"(>pcb_fpu.fpr[n]));
+ :: "b"(>pcb_fpu.fpr[n].fpr));
SFP(0); SFP(1); SFP(2); SFP(3);
SFP(4); SFP(5); SFP(6); SFP(7);
SFP(8); SFP(9); SFP(10);SFP(11);
@@ -164,7 +164,7 @@ enable_fpu(struct thread *td)
#undef LFP
} else {
#define LFP(n) __asm ("lfd " #n ", 0(%0)" \
- :: "b"(>pcb_fpu.fpr[n]));
+ :: "b"(>pcb_fpu.fpr[n].fpr));
LFP(0); LFP(1); LFP(2); LFP(3);
LFP(4); LFP(5); LFP(6); LFP(7);
LFP(8); LFP(9); LFP(10);LFP(11);
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Re: svn commit: r367701 - head/lib/libutil
That would explain why I see what I see -- I did not install an updated libc
yet.
On Sun, Nov 15, 2020, at 1:34 PM, Scott Long wrote:
> It is a magical namespace, in that it comes from libc, not from the
> kernel. Please make sure that you’ve installed a more recent libc, I
> guess? I just did a full build and install, and I’m unable to
> replicate the problem. Maybe there’s a static-linked pkg running
> around somewhere? I’m at a loss for better ideas.
>
> Scott
>
>
> > On Nov 15, 2020, at 12:30 PM, Brandon Bergren wrote:
> >
> > I think the problem is that user.* is somehow magically namespaced, so
> > doing a "dumb" sysctlbyname will get the wrong one.
> >
> > sysctl (the tool) does:
> > __sysctl("sysctl.name2oid
> > user.localbase",2,0xfbfffde98,0xfbfffda98,0x810809000,14) = 0 (0x0)
> > __sysctl("sysctl.oidfmt
> > user.localbase",4,0xfbfffdef8,0xfbfffd690,0x0,0) = 0 (0x0)
> > __sysctl("sysctl.name { 8.21 }",4,0xfbfffc8f8,0xfbfffc480,0x0,0) =
> > 0 (0x0)
> > __sysctl("sysctl.oidfmt
> > user.localbase",4,0xfbfffd0f8,0xfbfffc488,0x0,0) = 0 (0x0)
> > __sysctl("user.localbase",2,0x0,0xfbfffc480,0x0,0) = 0 (0x0)
> > __sysctl("user.localbase",2,0x81080a000,0xfbfffd0f8,0x0,0) = 0 (0x0)
> >
> > and picks up /usr/local.
> >
> > whereas libutil is currently just doing
> > __sysctlbyname("user.localbase",14,0xfbfffd4f8,0xfbfffd440,0x0,0) =
> > 0 (0x0)
> >
> > which is returning the builtin "" from the static kernel variable.
> >
> > On Sun, Nov 15, 2020, at 1:26 PM, Jessica Clarke wrote:
> >> On 15 Nov 2020, at 19:10, Brandon Bergren wrote:
> >>>
> >>> On powerpc64 and powerpc64le, there is some really weird behavior
> >>> happening around the sysctl itself:
> >>>
> >>> root@crow:~ # pkg
> >>> The package management tool is not yet installed on your system.
> >>> Do you want to fetch and install it now? [y/N]: N
> >>> root@crow:~ # sysctl user.localbase
> >>> user.localbase: /usr/local
> >>> root@crow:~ # pkg
> >>> The package management tool is not yet installed on your system.
> >>> Do you want to fetch and install it now? [y/N]: N
> >>> root@crow:~ # sysctl user.localbase=/usr/local
> >>> user.localbase: /usr/local -> /usr/local
> >>> root@crow:~ # pkg
> >>> pkg: not enough arguments
> >>> Usage: pkg [-v] [-d] [-l] [-N] [-j |-c |-r
> >>> ] [-C ] [-R ] [-o
> >>> var=value] [-4|-6] []
> >>>
> >>> For more information on available commands and options see 'pkg help'.
> >>> root@crow:~ #
> >>>
> >>>
> >>> I would double check very closely that the sysctl is being called
> >>> correctly, the sysctl tool manages to read it out, but libutil does not.
> >>
> >> That's odd. What does truss say?
> >>
> >> Jess
> >>
> >>> On Sun, Nov 15, 2020, at 1:06 PM, Scott Long wrote:
> >>>>
> >>>>> On Nov 15, 2020, at 12:01 PM, Jessica Clarke wrote:
> >>>>>>
> >>>>>> I felt similar concerns, but my misunderstanding of strlcpy() drove the
> >>>>>> result. Since the use case for getlocalbase() lends itself to also use
> >>>>>> strlcat()/strlcpy(), I was trying to replicate the API semantics of
> >>>>>> those,
> >>>>>> at least to the limit of my understanding. Thanks for the feedback,
> >>>>>> I’ll
> >>>>>> look at it some more.
> >>>>>
> >>>>> Thanks. ENOMEM also feels inappropriate as no allocation is taking
> >>>>> place. Perhaps ENAMETOOLONG, which is used in similar cases for things
> >>>>> like gethostbyname? Though sysctlbyname uses ENOMEM instead... sigh.
> >>>>>
> >>>>
> >>>> Yep, I wasn’t happy with ENOMEM either but I couldn’t find anything
> >>>> better.
> >>>>
> >>>>> Also, if pathlen has already been checked against SSIZE_MAX (giving
> >>>>> EINVAL) and tmplen against pathlen there's no need to then check tmplen
> >>>>> against SSIZE_MAX.
> >>>>>
> >>>>
> >>>> Done.
> >>>>
> >>>>> I'd be happy to give a review on Phabricator if/when you have a new
> >>>>> patch.
> >>>>>
> >>>>
> >>>> https://reviews.freebsd.org/D27227
> >>>>
> >>>> Thanks,
> >>>> Scott
> >>>>
> >>>>
> >>>
> >>> --
> >>> Brandon Bergren
> >>> bdra...@freebsd.org
> >>
> >>
> >
> > --
> > Brandon Bergren
> > bdra...@freebsd.org
>
>
--
Brandon Bergren
bdra...@freebsd.org
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Re: svn commit: r367701 - head/lib/libutil
I think the problem is that user.* is somehow magically namespaced, so doing a
"dumb" sysctlbyname will get the wrong one.
sysctl (the tool) does:
__sysctl("sysctl.name2oid
user.localbase",2,0xfbfffde98,0xfbfffda98,0x810809000,14) = 0 (0x0)
__sysctl("sysctl.oidfmt
user.localbase",4,0xfbfffdef8,0xfbfffd690,0x0,0) = 0 (0x0)
__sysctl("sysctl.name { 8.21 }",4,0xfbfffc8f8,0xfbfffc480,0x0,0) = 0
(0x0)
__sysctl("sysctl.oidfmt
user.localbase",4,0xfbfffd0f8,0xfbfffc488,0x0,0) = 0 (0x0)
__sysctl("user.localbase",2,0x0,0xfbfffc480,0x0,0) = 0 (0x0)
__sysctl("user.localbase",2,0x81080a000,0xfbfffd0f8,0x0,0) = 0 (0x0)
and picks up /usr/local.
whereas libutil is currently just doing
__sysctlbyname("user.localbase",14,0xfbfffd4f8,0xfbfffd440,0x0,0) = 0
(0x0)
which is returning the builtin "" from the static kernel variable.
On Sun, Nov 15, 2020, at 1:26 PM, Jessica Clarke wrote:
> On 15 Nov 2020, at 19:10, Brandon Bergren wrote:
> >
> > On powerpc64 and powerpc64le, there is some really weird behavior happening
> > around the sysctl itself:
> >
> > root@crow:~ # pkg
> > The package management tool is not yet installed on your system.
> > Do you want to fetch and install it now? [y/N]: N
> > root@crow:~ # sysctl user.localbase
> > user.localbase: /usr/local
> > root@crow:~ # pkg
> > The package management tool is not yet installed on your system.
> > Do you want to fetch and install it now? [y/N]: N
> > root@crow:~ # sysctl user.localbase=/usr/local
> > user.localbase: /usr/local -> /usr/local
> > root@crow:~ # pkg
> > pkg: not enough arguments
> > Usage: pkg [-v] [-d] [-l] [-N] [-j |-c |-r
> > ] [-C ] [-R ] [-o var=value]
> > [-4|-6] []
> >
> > For more information on available commands and options see 'pkg help'.
> > root@crow:~ #
> >
> >
> > I would double check very closely that the sysctl is being called
> > correctly, the sysctl tool manages to read it out, but libutil does not.
>
> That's odd. What does truss say?
>
> Jess
>
> > On Sun, Nov 15, 2020, at 1:06 PM, Scott Long wrote:
> >>
> >>> On Nov 15, 2020, at 12:01 PM, Jessica Clarke wrote:
> >>>>
> >>>> I felt similar concerns, but my misunderstanding of strlcpy() drove the
> >>>> result. Since the use case for getlocalbase() lends itself to also use
> >>>> strlcat()/strlcpy(), I was trying to replicate the API semantics of
> >>>> those,
> >>>> at least to the limit of my understanding. Thanks for the feedback, I’ll
> >>>> look at it some more.
> >>>
> >>> Thanks. ENOMEM also feels inappropriate as no allocation is taking
> >>> place. Perhaps ENAMETOOLONG, which is used in similar cases for things
> >>> like gethostbyname? Though sysctlbyname uses ENOMEM instead... sigh.
> >>>
> >>
> >> Yep, I wasn’t happy with ENOMEM either but I couldn’t find anything better.
> >>
> >>> Also, if pathlen has already been checked against SSIZE_MAX (giving
> >>> EINVAL) and tmplen against pathlen there's no need to then check tmplen
> >>> against SSIZE_MAX.
> >>>
> >>
> >> Done.
> >>
> >>> I'd be happy to give a review on Phabricator if/when you have a new
> >>> patch.
> >>>
> >>
> >> https://reviews.freebsd.org/D27227
> >>
> >> Thanks,
> >> Scott
> >>
> >>
> >
> > --
> > Brandon Bergren
> > bdra...@freebsd.org
>
>
--
Brandon Bergren
bdra...@freebsd.org
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Re: svn commit: r367701 - head/lib/libutil
On powerpc64 and powerpc64le, there is some really weird behavior happening around the sysctl itself: root@crow:~ # pkg The package management tool is not yet installed on your system. Do you want to fetch and install it now? [y/N]: N root@crow:~ # sysctl user.localbase user.localbase: /usr/local root@crow:~ # pkg The package management tool is not yet installed on your system. Do you want to fetch and install it now? [y/N]: N root@crow:~ # sysctl user.localbase=/usr/local user.localbase: /usr/local -> /usr/local root@crow:~ # pkg pkg: not enough arguments Usage: pkg [-v] [-d] [-l] [-N] [-j |-c |-r ] [-C ] [-R ] [-o var=value] [-4|-6] [] For more information on available commands and options see 'pkg help'. root@crow:~ # I would double check very closely that the sysctl is being called correctly, the sysctl tool manages to read it out, but libutil does not. On Sun, Nov 15, 2020, at 1:06 PM, Scott Long wrote: > > > On Nov 15, 2020, at 12:01 PM, Jessica Clarke wrote: > >> > >> I felt similar concerns, but my misunderstanding of strlcpy() drove the > >> result. Since the use case for getlocalbase() lends itself to also use > >> strlcat()/strlcpy(), I was trying to replicate the API semantics of those, > >> at least to the limit of my understanding. Thanks for the feedback, I’ll > >> look at it some more. > > > > Thanks. ENOMEM also feels inappropriate as no allocation is taking > > place. Perhaps ENAMETOOLONG, which is used in similar cases for things > > like gethostbyname? Though sysctlbyname uses ENOMEM instead... sigh. > > > > Yep, I wasn’t happy with ENOMEM either but I couldn’t find anything better. > > > Also, if pathlen has already been checked against SSIZE_MAX (giving > > EINVAL) and tmplen against pathlen there's no need to then check tmplen > > against SSIZE_MAX. > > > > Done. > > > I'd be happy to give a review on Phabricator if/when you have a new > > patch. > > > > https://reviews.freebsd.org/D27227 > > Thanks, > Scott > > -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r367687 - in head: sbin/nvmecontrol usr.sbin/mailwrapper usr.sbin/pkg
> --- head/usr.sbin/pkg/pkg.c Sat Nov 14 17:57:50 2020(r367686)
> +++ head/usr.sbin/pkg/pkg.c Sat Nov 14 18:01:14 2020(r367687)
> @@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -1037,6 +1038,7 @@ main(int argc, char *argv[])
> {
> char pkgpath[MAXPATHLEN];
> const char *pkgarg;
> + size_t len;
> int i;
> bool bootstrap_only, force, yes;
>
> @@ -1045,8 +1047,11 @@ main(int argc, char *argv[])
> pkgarg = NULL;
> yes = false;
>
> - snprintf(pkgpath, MAXPATHLEN, "%s/sbin/pkg",
> - getenv("LOCALBASE") ? getenv("LOCALBASE") : _PATH_LOCALBASE);
> + if ((len = getlocalbase(pkgpath, MAXPATHLEN)) != 0) {
> + fprintf(stderr, "Cannot determine local path\n");
> + exit(EXIT_FAILURE);
> + }
This logic is broken, it is failing on kernels that DO have user.localbase.
> + strlcat(pkgpath, "/sbin/pkg", MAXPATHLEN - len);
>
> if (argc > 1 && strcmp(argv[1], "bootstrap") == 0) {
> bootstrap_only = true;
>
--
Brandon Bergren
bdra...@freebsd.org
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svn commit: r367644 - head/sys/powerpc/aim
Author: bdragon
Date: Fri Nov 13 16:56:03 2020
New Revision: 367644
URL: https://svnweb.freebsd.org/changeset/base/367644
Log:
[PowerPC64LE] Radix MMU fixes for LE.
There were many, many endianness fixes needed for Radix MMU. The Radix
pagetable is stored in BE (as it is read and written to by the MMU hw),
so we need to convert back and forth every time we interact with it when
running in LE.
With these changes, I can successfully boot with radix enabled on POWER9 hw.
Reviewed by: luporl, jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D27181
Modified:
head/sys/powerpc/aim/mmu_radix.c
Modified: head/sys/powerpc/aim/mmu_radix.c
==
--- head/sys/powerpc/aim/mmu_radix.cFri Nov 13 16:49:41 2020
(r367643)
+++ head/sys/powerpc/aim/mmu_radix.cFri Nov 13 16:56:03 2020
(r367644)
@@ -309,7 +309,7 @@ pmap_l3e_to_pte(pt_entry_t *l3e, vm_offset_t va)
pt_entry_t *pte;
vm_paddr_t ptepa;
- ptepa = (*l3e & NLB_MASK);
+ ptepa = (be64toh(*l3e) & NLB_MASK);
pte = (pt_entry_t *)PHYS_TO_DMAP(ptepa);
return ([pmap_pte_index(va)]);
}
@@ -321,7 +321,7 @@ pmap_l2e_to_l3e(pt_entry_t *l2e, vm_offset_t va)
pt_entry_t *l3e;
vm_paddr_t l3pa;
- l3pa = (*l2e & NLB_MASK);
+ l3pa = (be64toh(*l2e) & NLB_MASK);
l3e = (pml3_entry_t *)PHYS_TO_DMAP(l3pa);
return ([pmap_pml3e_index(va)]);
}
@@ -333,7 +333,7 @@ pmap_l1e_to_l2e(pt_entry_t *l1e, vm_offset_t va)
pt_entry_t *l2e;
vm_paddr_t l2pa;
- l2pa = (*l1e & NLB_MASK);
+ l2pa = (be64toh(*l1e) & NLB_MASK);
l2e = (pml2_entry_t *)PHYS_TO_DMAP(l2pa);
return ([pmap_pml2e_index(va)]);
@@ -352,7 +352,7 @@ pmap_pml2e(pmap_t pmap, vm_offset_t va)
pt_entry_t *l1e;
l1e = pmap_pml1e(pmap, va);
- if (l1e == NULL || (*l1e & RPTE_VALID) == 0)
+ if (l1e == NULL || (be64toh(*l1e) & RPTE_VALID) == 0)
return (NULL);
return (pmap_l1e_to_l2e(l1e, va));
}
@@ -363,7 +363,7 @@ pmap_pml3e(pmap_t pmap, vm_offset_t va)
pt_entry_t *l2e;
l2e = pmap_pml2e(pmap, va);
- if (l2e == NULL || (*l2e & RPTE_VALID) == 0)
+ if (l2e == NULL || (be64toh(*l2e) & RPTE_VALID) == 0)
return (NULL);
return (pmap_l2e_to_l3e(l2e, va));
}
@@ -374,7 +374,7 @@ pmap_pte(pmap_t pmap, vm_offset_t va)
pt_entry_t *l3e;
l3e = pmap_pml3e(pmap, va);
- if (l3e == NULL || (*l3e & RPTE_VALID) == 0)
+ if (l3e == NULL || (be64toh(*l3e) & RPTE_VALID) == 0)
return (NULL);
return (pmap_l3e_to_pte(l3e, va));
}
@@ -819,13 +819,13 @@ pa_cmp(const void *a, const void *b)
#definepte_load_clear(ptep)atomic_swap_long(ptep, 0)
#definepte_store(ptep, pte) do { \
MPASS((pte) & (RPTE_EAA_R | RPTE_EAA_W | RPTE_EAA_X)); \
- *(u_long *)(ptep) = (u_long)((pte) | PG_V | RPTE_LEAF); \
+ *(u_long *)(ptep) = htobe64((u_long)((pte) | PG_V | RPTE_LEAF)); \
} while (0)
/*
* NB: should only be used for adding directories - not for direct mappings
*/
#definepde_store(ptep, pa) do {\
- *(u_long *)(ptep) = (u_long)(pa|RPTE_VALID|RPTE_SHIFT); \
+ *(u_long *)(ptep) = htobe64((u_long)(pa|RPTE_VALID|RPTE_SHIFT)); \
} while (0)
#definepte_clear(ptep) do {\
@@ -885,7 +885,7 @@ kvtopte(vm_offset_t va)
pt_entry_t *l3e;
l3e = pmap_pml3e(kernel_pmap, va);
- if ((*l3e & RPTE_VALID) == 0)
+ if ((be64toh(*l3e) & RPTE_VALID) == 0)
return (NULL);
return (pmap_l3e_to_pte(l3e, va));
}
@@ -897,8 +897,8 @@ mmu_radix_kenter(vm_offset_t va, vm_paddr_t pa)
pte = kvtopte(va);
MPASS(pte != NULL);
- *pte = pa | RPTE_VALID | RPTE_LEAF | RPTE_EAA_R | RPTE_EAA_W | \
- RPTE_EAA_P | PG_M | PG_A;
+ *pte = htobe64(pa | RPTE_VALID | RPTE_LEAF | RPTE_EAA_R | \
+ RPTE_EAA_W | RPTE_EAA_P | PG_M | PG_A);
}
bool
@@ -915,17 +915,17 @@ pmap_nofault_pte(pmap_t pmap, vm_offset_t va, int *is_
va &= PG_PS_FRAME;
l3e = pmap_pml3e(pmap, va);
- if (l3e == NULL || (*l3e & PG_V) == 0)
+ if (l3e == NULL || (be64toh(*l3e) & PG_V) == 0)
return (NULL);
- if (*l3e & RPTE_LEAF) {
+ if (be64toh(*l3e) & RPTE_LEAF) {
*is_l3e = 1;
return (l3e);
}
*is_l3e = 0;
va &= PG_FRAME;
pte = pmap_l3e_to_pte(l3e, va);
- if (pte == NULL || (*pte & PG_V) == 0)
+ if (pte == NULL || (be64toh(*pte) & PG_V) == 0)
return (NULL);
return (pte);
}
@@ -942,7 +942,7 @@ pmap_nofault(pmap_t pmap, vm_offset_t va, vm_prot_t fl
retry:
if ((pte =
svn commit: r367643 - in head: sys/dev/ofw usr.sbin/ofwdump
Author: bdragon
Date: Fri Nov 13 16:49:41 2020
New Revision: 367643
URL: https://svnweb.freebsd.org/changeset/base/367643
Log:
[PowerPC] Allow traversal of oversize OF properties.
In standards such as LoPAPR, property names in excess of the usual 31
characters exist.
This breaks property traversal.
While in IEEE 1275-1994, nextprop is defined explicitly to work with a
32-byte region of memory, using a larger buffer should be fine. There is
actually no way to pass a buffer length to the nextprop call in the OF
client interface, so SLOF actually just blindly overflows the buffer.
So we have to defensively make the buffer larger, to avoid memory
corruption when reading out long properties on live OF systems.
Note also that on real-mode OF, things are pretty tight because we are
allocating against a static bounce buffer in low memory, so we can't just
use a huge buffer to work around this without it being wasteful of our
limited amount of 32-bit physical memory.
This allows a patched ofwdump to operate properly on SLOF (i.e. pseries)
systems, as well as any other PowerPC systems with overlength properties.
Reviewed by: jhibbits
MFC after:2 weeks
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D26669
Modified:
head/sys/dev/ofw/openfirmio.c
head/sys/dev/ofw/openfirmio.h
head/usr.sbin/ofwdump/ofwdump.c
Modified: head/sys/dev/ofw/openfirmio.c
==
--- head/sys/dev/ofw/openfirmio.c Fri Nov 13 16:47:42 2020
(r367642)
+++ head/sys/dev/ofw/openfirmio.c Fri Nov 13 16:49:41 2020
(r367643)
@@ -115,7 +115,7 @@ openfirm_ioctl(struct cdev *dev, u_long cmd, caddr_t d
phandle_t node;
int len, ok, error;
char *name, *value;
- char newname[32];
+ char newname[OFIOCSUGGPROPNAMELEN];
if ((flags & FREAD) == 0)
return (EBADF);
@@ -222,8 +222,19 @@ openfirm_ioctl(struct cdev *dev, u_long cmd, caddr_t d
break;
}
len = strlen(newname) + 1;
- if (len > of->of_buflen)
+ if (len > of->of_buflen) {
+ /*
+* Passed buffer was insufficient.
+*
+* Instead of returning an error here, truncate the
+* property name to fit the buffer.
+*
+* This allows us to retain compatibility with old
+* tools which always pass a 32 character buffer.
+*/
len = of->of_buflen;
+ newname[len - 1] = '\0';
+ }
else
of->of_buflen = len;
error = copyout(newname, of->of_buf, len);
Modified: head/sys/dev/ofw/openfirmio.h
==
--- head/sys/dev/ofw/openfirmio.h Fri Nov 13 16:47:42 2020
(r367642)
+++ head/sys/dev/ofw/openfirmio.h Fri Nov 13 16:49:41 2020
(r367643)
@@ -76,4 +76,18 @@ struct ofiocdesc {
/* Maximum accepted value length (maximum of nvramrc property). */
#defineOFIOCMAXVALUE 8192
+/*
+ * While IEEE 1275-1994 states in 3.2.2.1.1 that property names are 1-31
+ * printable characters, in practice, this limit has been ignored.
+ * Noncompliant properties have been codified in standards such as LoPAPR.
+ *
+ * This is a suggested buffer length that should be large enough to hold
+ * any property name currently seen in device trees, without being overly
+ * wasteful of memory.
+ *
+ * If a future version of the Devicetree specification updates the property
+ * names length requirement, this value will be updated to match.
+ */
+#defineOFIOCSUGGPROPNAMELEN64
+
#endif /* _DEV_OFW_OPENFIRMIO_H_ */
Modified: head/usr.sbin/ofwdump/ofwdump.c
==
--- head/usr.sbin/ofwdump/ofwdump.c Fri Nov 13 16:47:42 2020
(r367642)
+++ head/usr.sbin/ofwdump/ofwdump.c Fri Nov 13 16:49:41 2020
(r367643)
@@ -144,7 +144,7 @@ static void
ofw_dump_properties(int fd, phandle_t n, int level, int raw, int str)
{
int nlen;
- char prop[32];
+ char prop[OFIOCSUGGPROPNAMELEN];
for (nlen = ofw_firstprop(fd, n, prop, sizeof(prop)); nlen != 0;
nlen = ofw_nextprop(fd, n, prop, prop, sizeof(prop)))
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svn commit: r367496 - head/sys/powerpc/aim
Author: bdragon
Date: Sun Nov 8 23:34:06 2020
New Revision: 367496
URL: https://svnweb.freebsd.org/changeset/base/367496
Log:
[PowerPC] Fix powerpc64le boot after HPT superpages addition
The HPT is always stored in big-endian, as it is accessed directly by the
hardware as well as the kernel. As such, it is necessary to convert values
to and from native endian when running on LE.
Some unconverted accesses snuck in accidentally with r367417.
Apply the appropriate conversions to fix boot hanging on powerpc64le.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/moea64_native.c
Modified: head/sys/powerpc/aim/moea64_native.c
==
--- head/sys/powerpc/aim/moea64_native.cSun Nov 8 22:30:13 2020
(r367495)
+++ head/sys/powerpc/aim/moea64_native.cSun Nov 8 23:34:06 2020
(r367496)
@@ -384,7 +384,7 @@ moea64_pte_clear_native(struct pvo_entry *pvo, uint64_
static __always_inline int64_t
moea64_pte_unset_locked(volatile struct lpte *pt, uint64_t vpn)
{
- uint64_t ptelo;
+ uint64_t ptelo, ptehi;
/*
* Invalidate the pte, briefly locking it to collect RC bits. No
@@ -392,9 +392,10 @@ moea64_pte_unset_locked(volatile struct lpte *pt, uint
*/
isync();
critical_enter();
- pt->pte_hi = htobe64((be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED);
+ ptehi = (be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED;
+ pt->pte_hi = htobe64(ptehi);
PTESYNC();
- TLBIE(vpn, pt->pte_hi);
+ TLBIE(vpn, ptehi);
ptelo = be64toh(pt->pte_lo);
*((volatile int32_t *)(>pte_hi) + 1) = 0; /* Release lock */
critical_exit();
@@ -416,7 +417,7 @@ moea64_pte_unset_native(struct pvo_entry *pvo)
rw_rlock(_eviction_lock);
- if ((be64toh(pt->pte_hi & LPTE_AVPN_MASK)) != pvo_ptevpn) {
+ if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != pvo_ptevpn) {
/* Evicted */
STAT_MOEA64(moea64_pte_overflow--);
ret = -1;
@@ -433,7 +434,7 @@ moea64_pte_replace_inval_native(struct pvo_entry *pvo,
volatile struct lpte *pt)
{
struct lpte properpt;
- uint64_t ptelo;
+ uint64_t ptelo, ptehi;
moea64_pte_from_pvo(pvo, );
@@ -452,9 +453,10 @@ moea64_pte_replace_inval_native(struct pvo_entry *pvo,
*/
isync();
critical_enter();
- pt->pte_hi = htobe64((be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED);
+ ptehi = (be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED;
+ pt->pte_hi = htobe64(ptehi);
PTESYNC();
- TLBIE(pvo->pvo_vpn, pt->pte_hi);
+ TLBIE(pvo->pvo_vpn, ptehi);
ptelo = be64toh(pt->pte_lo);
EIEIO();
pt->pte_lo = htobe64(properpt.pte_lo);
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Re: svn commit: r367229 - in head/sys/contrib/openzfs: include/sys/zstd module/zstd
On Sat, Oct 31, 2020, at 4:56 PM, Warner Losh wrote: > Go for it. > > Warner > Done in r367235. I did an additional 32 bit build fix in r367238 (to readelf.c) that should fix the tree the rest of the way. (Could use a sanity check on that one fwiw, I have a vague suspicion that there should be some bounds checking there to deal with malicious files) ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r367238 - head/contrib/elftoolchain/readelf
Author: bdragon
Date: Sat Oct 31 22:14:37 2020
New Revision: 367238
URL: https://svnweb.freebsd.org/changeset/base/367238
Log:
Fix 32-bit build after r367209
Fix build on systems with a 32-bit size_t.
Since it's being passed as a pointer, a 64-bit write to it will overflow.
MFC with: r367209
Modified:
head/contrib/elftoolchain/readelf/readelf.c
Modified: head/contrib/elftoolchain/readelf/readelf.c
==
--- head/contrib/elftoolchain/readelf/readelf.c Sat Oct 31 22:04:13 2020
(r367237)
+++ head/contrib/elftoolchain/readelf/readelf.c Sat Oct 31 22:14:37 2020
(r367238)
@@ -6909,8 +6909,8 @@ get_symbol_value(struct readelf *re, int symtab, int i
* Returns true if sucessful, false otherwise.
*/
static bool decompress_section(struct section *s,
-unsigned char *compressed_data_buffer, uint64_t compressed_size,
-unsigned char **ret_buf, uint64_t *ret_sz)
+unsigned char *compressed_data_buffer, size_t compressed_size,
+unsigned char **ret_buf, size_t *ret_sz)
{
GElf_Shdr sh;
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Re: svn commit: r367209 - in head: contrib/elftoolchain/readelf usr.bin/readelf
On Sat, Oct 31, 2020, at 3:03 PM, Brandon Bergren wrote:
> This appears to have broken the build on platforms with a 32 bit
> size_t, given the current state of the tinderbox.
>
> On Sat, Oct 31, 2020, at 10:27 AM, Ed Maste wrote:
> > Author: emaste
> > Date: Sat Oct 31 15:27:45 2020
> > New Revision: 367209
> > URL: https://svnweb.freebsd.org/changeset/base/367209
> >
>
This seems more correct to me:
It's not like it could have been larger than size_t anyway, since there is no
way to malloc more than that anyway.
Index: contrib/elftoolchain/readelf/readelf.c
===
--- contrib/elftoolchain/readelf/readelf.c (revision 367230)
+++ contrib/elftoolchain/readelf/readelf.c (working copy)
@@ -6909,8 +6909,8 @@
* Returns true if sucessful, false otherwise.
*/
static bool decompress_section(struct section *s,
-unsigned char *compressed_data_buffer, uint64_t compressed_size,
-unsigned char **ret_buf, uint64_t *ret_sz)
+unsigned char *compressed_data_buffer, size_t compressed_size,
+unsigned char **ret_buf, size_t *ret_sz)
{
GElf_Shdr sh;
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svn commit: r367235 - head/sys/contrib/openzfs/include/os/freebsd/spl/sys
Author: bdragon Date: Sat Oct 31 21:11:34 2020 New Revision: 367235 URL: https://svnweb.freebsd.org/changeset/base/367235 Log: Fix 32-bit build after r367229. The use of atomic_sub_64() in zfs_zstd.c was breaking the 32-bit build on platforms without native 64-bit atomics due to atomic_sub_64() not being available, and no fallback being provided in _STANDALONE. Provide a standalone stub to match atomic_add_64() using simple math. While this is not actually atomic, it does not matter in libsa context, since it always runs single-threaded and does not run under a scheduler. Reviewed by: mjg (in email) Modified: head/sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h Modified: head/sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h == --- head/sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.hSat Oct 31 20:28:13 2020(r367234) +++ head/sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.hSat Oct 31 21:11:34 2020(r367235) @@ -188,6 +188,8 @@ atomic_cas_ptr(volatile void *target, void *cmp, void */ #undef atomic_add_64 #defineatomic_add_64(ptr, val) *(ptr) += val +#undef atomic_sub_64 +#defineatomic_sub_64(ptr, val) *(ptr) -= val #endif /* !_STANDALONE */ #endif /* !_OPENSOLARIS_SYS_ATOMIC_H_ */ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r367229 - in head/sys/contrib/openzfs: include/sys/zstd module/zstd
Yeah, that is what was happening. The minimal implementation needed for libsa was missing. On Sat, Oct 31, 2020, at 3:33 PM, Brandon Bergren wrote: > Maybe this is it?: > > Index: sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h > === > --- sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h (revision > 367230) > +++ sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h (working copy) > @@ -188,6 +188,8 @@ > */ > #undef atomic_add_64 > #define atomic_add_64(ptr, val) *(ptr) += val > +#undef atomic_sub_64 > +#define atomic_sub_64(ptr, val) *(ptr) -= val > #endif /* !_STANDALONE */ > > #endif /* !_OPENSOLARIS_SYS_ATOMIC_H_ */ > > > Note that there is also another build failure in the tree at the moment. > > On Sat, Oct 31, 2020, at 3:25 PM, Brandon Bergren wrote: > > Actually, looking at it again, it looks like the spl header is doing it > > wrong and not providing a fallback for atomic_sub_64, it's just > > defining it to atomic_subtract_64 and assuming that exists. > > > > On Sat, Oct 31, 2020, at 3:23 PM, Mateusz Guzik wrote: > > > Yep, jenkins told me. Working on it. > > > > > > On 10/31/20, Brandon Bergren wrote: > > > > This doesn't compile on platforms such as powerpc without pulling in the > > > > opensolaris atomics header from the spl that does locking emulation of > > > > 64 > > > > bit atomics, as platforms that don't have native 64 bit atomics do not > > > > provide them in the system header. > > > > -- > Brandon Bergren > bdra...@imap.cc > -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r367229 - in head/sys/contrib/openzfs: include/sys/zstd module/zstd
Maybe this is it?: Index: sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h === --- sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h (revision 367230) +++ sys/contrib/openzfs/include/os/freebsd/spl/sys/atomic.h (working copy) @@ -188,6 +188,8 @@ */ #undef atomic_add_64 #defineatomic_add_64(ptr, val) *(ptr) += val +#undef atomic_sub_64 +#define atomic_sub_64(ptr, val) *(ptr) -= val #endif /* !_STANDALONE */ #endif /* !_OPENSOLARIS_SYS_ATOMIC_H_ */ Note that there is also another build failure in the tree at the moment. On Sat, Oct 31, 2020, at 3:25 PM, Brandon Bergren wrote: > Actually, looking at it again, it looks like the spl header is doing it > wrong and not providing a fallback for atomic_sub_64, it's just > defining it to atomic_subtract_64 and assuming that exists. > > On Sat, Oct 31, 2020, at 3:23 PM, Mateusz Guzik wrote: > > Yep, jenkins told me. Working on it. > > > > On 10/31/20, Brandon Bergren wrote: > > > This doesn't compile on platforms such as powerpc without pulling in the > > > opensolaris atomics header from the spl that does locking emulation of 64 > > > bit atomics, as platforms that don't have native 64 bit atomics do not > > > provide them in the system header. > -- Brandon Bergren bdra...@imap.cc ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r367229 - in head/sys/contrib/openzfs: include/sys/zstd module/zstd
Actually, looking at it again, it looks like the spl header is doing it wrong and not providing a fallback for atomic_sub_64, it's just defining it to atomic_subtract_64 and assuming that exists. On Sat, Oct 31, 2020, at 3:23 PM, Mateusz Guzik wrote: > Yep, jenkins told me. Working on it. > > On 10/31/20, Brandon Bergren wrote: > > This doesn't compile on platforms such as powerpc without pulling in the > > opensolaris atomics header from the spl that does locking emulation of 64 > > bit atomics, as platforms that don't have native 64 bit atomics do not > > provide them in the system header. ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r367229 - in head/sys/contrib/openzfs: include/sys/zstd module/zstd
This doesn't compile on platforms such as powerpc without pulling in the opensolaris atomics header from the spl that does locking emulation of 64 bit atomics, as platforms that don't have native 64 bit atomics do not provide them in the system header. On Sat, Oct 31, 2020, at 2:07 PM, Mateusz Guzik wrote: > Author: mjg > Date: Sat Oct 31 19:07:32 2020 > New Revision: 367229 > URL: https://svnweb.freebsd.org/changeset/base/367229 > > Log: > zfs: zstd: track allocator statistics > > This applies: > commit c4ede65bdfca11b532403620bbf0d6e33f0c1c1d > Author: Mateusz Guzik > Date: Fri Oct 30 23:26:10 2020 +0100 > > zstd: track allocator statistics > > Note that this only tracks sizes as requested by the caller. > Actual allocated space will almost always be bigger (e.g., rounded up to > the next power of 2 or page size). Additionally the allocated buffer may > be holding other areas hostage. Nonetheless, this is a starting point > for tracking memory usage in zstd. > > from openzfs > > Modified: > head/sys/contrib/openzfs/include/sys/zstd/zstd.h > head/sys/contrib/openzfs/module/zstd/zfs_zstd.c > ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r367209 - in head: contrib/elftoolchain/readelf usr.bin/readelf
This appears to have broken the build on platforms with a 32 bit size_t, given the current state of the tinderbox. On Sat, Oct 31, 2020, at 10:27 AM, Ed Maste wrote: > Author: emaste > Date: Sat Oct 31 15:27:45 2020 > New Revision: 367209 > URL: https://svnweb.freebsd.org/changeset/base/367209 > ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366063 - head/sys/powerpc/ofw
Author: bdragon
Date: Wed Sep 23 04:09:02 2020
New Revision: 366063
URL: https://svnweb.freebsd.org/changeset/base/366063
Log:
[PowerPC64LE] Fix RTAS LE calls in pseries.
Similar to OPAL calls, switch to big endian to do calls to RTAS.
(Missed this one when I was doing the bulk commit of PowerPC64LE support.)
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/ofw/ofwcall64.S
head/sys/powerpc/ofw/rtas.c
Modified: head/sys/powerpc/ofw/ofwcall64.S
==
--- head/sys/powerpc/ofw/ofwcall64.SWed Sep 23 03:19:20 2020
(r366062)
+++ head/sys/powerpc/ofw/ofwcall64.SWed Sep 23 04:09:02 2020
(r366063)
@@ -296,9 +296,29 @@ ASENTRY_NOPROF(rtascall)
std %r6,16(%r1) /* Save MSR */
std %r9,24(%r1) /* Save reference PC for high 32 bits */
+#ifdef __LITTLE_ENDIAN__
+ /* Atomic context switch w/ endian change */
+ li %r7, 0
+ mtmsrd %r7, 1 /* Clear PSL_EE|PSL_RI */
+ addis %r7,%r2,TOC_REF(rtasmsr)@ha
+ ld %r7,TOC_REF(rtasmsr)@l(%r7)
+ ld %r7,0(%r7)
+ mtsrr0 %r5
+ mtsrr1 %r7
+ LOAD_LR_NIA
+1:
+ mflr%r5
+ addi%r5, %r5, (2f-1b)
+ mtlr%r5
+ li %r5, 0
+ rfid
+2:
+ RETURN_TO_NATIVE_ENDIAN
+#else
/* Finally, branch to RTAS */
mtctr %r5
bctrl
+#endif
/*
* Reload stack pointer, MSR, reg PC from the reg save area in r1. We
Modified: head/sys/powerpc/ofw/rtas.c
==
--- head/sys/powerpc/ofw/rtas.c Wed Sep 23 03:19:20 2020(r366062)
+++ head/sys/powerpc/ofw/rtas.c Wed Sep 23 04:09:02 2020(r366063)
@@ -29,6 +29,7 @@
#include
__FBSDID("$FreeBSD$");
+#include
#include
#include
#include
@@ -90,7 +91,7 @@ rtas_setup(void *junk)
/* RTAS must be called with everything turned off in MSR */
rtasmsr = mfmsr();
- rtasmsr &= ~(PSL_IR | PSL_DR | PSL_EE | PSL_SE);
+ rtasmsr &= ~(PSL_IR | PSL_DR | PSL_EE | PSL_SE | PSL_LE);
#ifdef __powerpc64__
rtasmsr &= ~PSL_SF;
#endif
@@ -215,17 +216,17 @@ rtas_call_method(cell_t token, int nargs, int nreturns
if (!rtas_exists() || nargs + nreturns > 12)
return (-1);
- args.token = token;
+ args.token = htobe32(token);
va_start(ap, nreturns);
mtx_lock_spin(_mtx);
rtas_bounce_offset = 0;
- args.nargs = nargs;
- args.nreturns = nreturns;
+ args.nargs = htobe32(nargs);
+ args.nreturns = htobe32(nreturns);
for (n = 0; n < nargs; n++)
- args.args_n_results[n] = va_arg(ap, cell_t);
+ args.args_n_results[n] = htobe32(va_arg(ap, cell_t));
argsptr = rtas_real_map(, sizeof(args));
@@ -250,7 +251,7 @@ rtas_call_method(cell_t token, int nargs, int nreturns
return (result);
for (n = nargs; n < nargs + nreturns; n++)
- *va_arg(ap, cell_t *) = args.args_n_results[n];
+ *va_arg(ap, cell_t *) = be32toh(args.args_n_results[n]);
return (result);
}
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svn commit: r366062 - head/sys/sys
Author: bdragon Date: Wed Sep 23 03:19:20 2020 New Revision: 366062 URL: https://svnweb.freebsd.org/changeset/base/366062 Log: __FreeBSD_version bump for introduction of the powerpc64le arch. Although this is technically not a breaking change, I believe it is best to have a fresh version to use to define where the starting point was here. Modified: head/sys/sys/param.h Modified: head/sys/sys/param.h == --- head/sys/sys/param.hWed Sep 23 03:12:58 2020(r366061) +++ head/sys/sys/param.hWed Sep 23 03:19:20 2020(r366062) @@ -60,7 +60,7 @@ * in the range 5 to 9. */ #undef __FreeBSD_version -#define __FreeBSD_version 1300115 /* Master, propagated to newvers */ +#define __FreeBSD_version 1300116 /* Master, propagated to newvers */ /* * __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD, ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366061 - head/share/man/man7
Author: bdragon Date: Wed Sep 23 03:12:58 2020 New Revision: 366061 URL: https://svnweb.freebsd.org/changeset/base/366061 Log: arch(7): PowerPC64LE architecture definition Document the new powerpc64le arch's initial specifications. Certain things are subject to change while this is experimental. The most likely change is that long double may switch to quad, dependent on POWER8 emulation assistance for __float128 being set up in the compiler (as POWER8 does not have IEEE-compatible 128-bit hardware float, unlike POWER9.) Sponsored by: Tag1 Consulting, Inc. Modified: head/share/man/man7/arch.7 Modified: head/share/man/man7/arch.7 == --- head/share/man/man7/arch.7 Wed Sep 23 03:02:45 2020(r366060) +++ head/share/man/man7/arch.7 Wed Sep 23 03:12:58 2020(r366061) @@ -26,7 +26,7 @@ .\" .\" $FreeBSD$ .\" -.Dd June 23, 2020 +.Dd September 22, 2020 .Dt ARCH 7 .Os .Sh NAME @@ -110,6 +110,7 @@ architectures, the final release. .It powerpc Ta 6.0 .It powerpcspe Ta 12.0 .It powerpc64 Ta 6.0 +.It powerpc64le Ta 13.0 .It riscv64 Ta 12.0 .It riscv64sf Ta 12.0 .It sparc64 Ta 5.0 Ta 12.x @@ -206,6 +207,7 @@ Machine-dependent type sizes: .It powerpc Ta 4 Ta 8 Ta 8 .It powerpcspe Ta 4 Ta 8 Ta 8 .It powerpc64 Ta 8 Ta 8 Ta 8 +.It powerpc64le Ta 8 Ta 8 Ta 8 .It riscv64 Ta 8 Ta 16 Ta 8 .It riscv64sf Ta 8 Ta 16 Ta 8 .El @@ -232,6 +234,7 @@ is 8 bytes on all supported architectures except i386. .It powerpc Ta bigTa unsigned .It powerpcspe Ta bigTa unsigned .It powerpc64 Ta bigTa unsigned +.It powerpc64le Ta little Ta unsigned .It riscv64 Ta little Ta signed .It riscv64sf Ta little Ta signed .El @@ -255,6 +258,7 @@ is 8 bytes on all supported architectures except i386. .It powerpc Ta 4K .It powerpcspe Ta 4K .It powerpc64 Ta 4K +.It powerpc64le Ta 4K .It riscv64 Ta 4K, 2M, 1G .It riscv64sf Ta 4K, 2M, 1G .El @@ -278,6 +282,7 @@ is 8 bytes on all supported architectures except i386. .It powerpc Ta hard Ta hard, double precision .It powerpcspe Ta hard Ta hard, double precision .It powerpc64 Ta hard Ta hard, double precision +.It powerpc64le Ta hard Ta hard, double precision .It riscv64 Ta hard Ta hard, quad precision .It riscv64sf Ta soft Ta soft, quad precision .El @@ -311,7 +316,7 @@ or similar things like boot sequences. .It arm Ta arm Ta armv6, armv7 .It i386 Ta i386 Ta i386 .It mips Ta mips Ta mips, mipsel, mips64, mips64el, mipshf, mipselhf, mips64elhf, mipsn32 -.It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64 +.It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64, powerpc64le .It riscv Ta riscv Ta riscv64, riscv64sf .El .Ss Predefined Macros @@ -356,6 +361,7 @@ Architecture-specific macros: .It powerpc Ta Dv __powerpc__ .It powerpcspe Ta Dv __powerpc__ , Dv __SPE__ .It powerpc64 Ta Dv __powerpc__ , Dv __powerpc64__ +.It powerpc64le Ta Dv __powerpc__ , Dv __powerpc64__ .It riscv64 Ta Dv __riscv , Dv __riscv_xlen == 64 .It riscv64sf Ta Dv __riscv , Dv __riscv_xlen == 64 , Dv __riscv_float_abi_soft .El ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366058 - head/usr.sbin/ntp
Author: bdragon Date: Wed Sep 23 02:37:27 2020 New Revision: 366058 URL: https://svnweb.freebsd.org/changeset/base/366058 Log: [PowerPC] Fix multiple ntp configuration issues * powerpc time_t is 64 bit, not 32 bit. * Add definition for powerpc64le. With this, powerpc64le ntpd and ntpdate operate correctly instead of corrupting the clock and exiting. Tested on powerpc64, powerpc64le, and powerpc. No feedback from cy@. I am a bit confused as to how SIZEOF_TIME_T being wrong ever worked on powerpc, it being big endian and all. Sponsored by: Tag1 Consulting, Inc. Differential Revision:https://reviews.freebsd.org/D26379 Modified: head/usr.sbin/ntp/config.h Modified: head/usr.sbin/ntp/config.h == --- head/usr.sbin/ntp/config.h Wed Sep 23 02:28:19 2020(r366057) +++ head/usr.sbin/ntp/config.h Wed Sep 23 02:37:27 2020(r366058) @@ -1548,7 +1548,7 @@ #define SIZEOF_SIGNED_CHAR 1 /* The size of `time_t', as computed by sizeof. */ -#if defined(__i386__) || defined(__powerpc__) +#if defined(__i386__) #define SIZEOF_TIME_T 4 #else #define SIZEOF_TIME_T 8 @@ -1580,6 +1580,8 @@ /* canonical system (cpu-vendor-os) of where we should run */ #if defined(__amd64__) #define STR_SYSTEM "amd64-undermydesk-freebsd" +#elif defined(__powerpc64__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#define STR_SYSTEM "powerpc64le-undermydesk-freebsd" #elif defined(__powerpc64__) #define STR_SYSTEM "powerpc64-undermydesk-freebsd" #elif defined(__powerpc__) @@ -1660,8 +1662,8 @@ typedef unsigned int uintptr_t; /* Define WORDS_BIGENDIAN to 1 if your processor stores words with the most significant byte first (like Motorola and SPARC, unlike Intel). */ -#if defined(__ARMEB__) || defined(__MIPSEB__) || defined(__powerpc__) || \ -defined(__powerpc64__) +#if defined(__ARMEB__) || defined(__MIPSEB__) || \ +(defined(__powerpc__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) #define WORDS_BIGENDIAN 1 #endif ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366057 - head/sys/powerpc/powerpc
Author: bdragon Date: Wed Sep 23 02:28:19 2020 New Revision: 366057 URL: https://svnweb.freebsd.org/changeset/base/366057 Log: [PowerPC64LE] Fix sleeping on POWER8. Due to enter_idle_powerx fabricating a MSR from scratch, it is necessary for it to care about the endianness, so we don't accidentally switch endian the first time we idle a thread. Took about five seconds to spot after seeing an unmangled backtrace. The hard bit was needing to temporarily set up a mutex to sort out the logjam that happens when every thread simultaneously wakes up in the wrong endian due to the panic IPI and panics, leaving what I can best describe as "alphabet soup" on the console. Luckily, I already had a patch sitting around to do that. This brings POWER8 up to equivilence with POWER9 on PPC64LE. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/powerpc/cpu_subr64.S Modified: head/sys/powerpc/powerpc/cpu_subr64.S == --- head/sys/powerpc/powerpc/cpu_subr64.S Wed Sep 23 02:17:44 2020 (r366056) +++ head/sys/powerpc/powerpc/cpu_subr64.S Wed Sep 23 02:28:19 2020 (r366057) @@ -71,7 +71,11 @@ ENTRY(enter_idle_powerx) /* Set MSR */ li %r3,0 +#ifdef __LITTLE_ENDIAN__ + ori %r3,%r3,(PSL_ME | PSL_RI | PSL_LE) +#else ori %r3,%r3,(PSL_ME | PSL_RI) +#endif li %r8,0x9 /* PSL_SF and PSL_HV */ insrdi %r3,%r8,4,0 mtsrr1 %r3 ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366056 - head/lib/libsqlite3
Author: bdragon
Date: Wed Sep 23 02:17:44 2020
New Revision: 366056
URL: https://svnweb.freebsd.org/changeset/base/366056
Log:
[PowerPC64LE] Pass our byte order to the sqlite3 build.
Due to the sqlite3 endian detection code preferring to check platform defines
instead of checking endian defines, it is necessary to manually set
the endianness on PowerPC64LE.
Unlike other bi-endian platforms, PowerPC64LE relies entirely on the
generic endianness macros like __BYTE_ORDER__ and has no platform-specific
define to denote little endian.
Add -DSQLITE_BYTEORDER=1234 to the CFLAGS when building libsqlite3 on
powerpc64le.
Fixes runtime operation of sqlite on PowerPC64LE.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/lib/libsqlite3/Makefile
Modified: head/lib/libsqlite3/Makefile
==
--- head/lib/libsqlite3/MakefileWed Sep 23 02:11:24 2020
(r366055)
+++ head/lib/libsqlite3/MakefileWed Sep 23 02:17:44 2020
(r366056)
@@ -35,4 +35,8 @@ CFLAGS+= -I${SQLITE} \
-D_REENTRANT=1 \
-DSQLITE_THREADSAFE=1
+.if ${MACHINE_ARCH} == "powerpc64le"
+CFLAGS+= -DSQLITE_BYTEORDER=1234
+.endif
+
.include
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svn commit: r366055 - head/lib/libkvm
Author: bdragon
Date: Wed Sep 23 02:11:24 2020
New Revision: 366055
URL: https://svnweb.freebsd.org/changeset/base/366055
Log:
[PowerPC64LE] libkvm powerpc64le support.
* Add missing _kvm16toh() function.
* Teach libkvm about powerpc64le.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/lib/libkvm/kvm_powerpc64.c
head/lib/libkvm/kvm_private.h
Modified: head/lib/libkvm/kvm_powerpc64.c
==
--- head/lib/libkvm/kvm_powerpc64.c Wed Sep 23 02:05:44 2020
(r366054)
+++ head/lib/libkvm/kvm_powerpc64.c Wed Sep 23 02:11:24 2020
(r366055)
@@ -53,22 +53,23 @@ struct vmstate {
};
static int
-valid_elf_header(Elf64_Ehdr *eh)
+valid_elf_header(kvm_t *kd, Elf64_Ehdr *eh)
{
if (!IS_ELF(*eh))
return (0);
if (eh->e_ident[EI_CLASS] != ELFCLASS64)
return (0);
- if (eh->e_ident[EI_DATA] != ELFDATA2MSB)
+ if (eh->e_ident[EI_DATA] != ELFDATA2MSB &&
+ eh->e_ident[EI_DATA] != ELFDATA2LSB)
return (0);
if (eh->e_ident[EI_VERSION] != EV_CURRENT)
return (0);
if (eh->e_ident[EI_OSABI] != ELFOSABI_STANDALONE)
return (0);
- if (be16toh(eh->e_type) != ET_CORE)
+ if (_kvm16toh(kd, eh->e_type) != ET_CORE)
return (0);
- if (be16toh(eh->e_machine) != EM_PPC64)
+ if (_kvm16toh(kd, eh->e_machine) != EM_PPC64)
return (0);
/* Can't think of anything else to check... */
return (1);
@@ -80,7 +81,8 @@ dump_header_size(struct kerneldumpheader *dh)
if (strcmp(dh->magic, KERNELDUMPMAGIC) != 0)
return (0);
- if (strcmp(dh->architecture, "powerpc64") != 0)
+ if (strcmp(dh->architecture, "powerpc64") != 0 &&
+ strcmp(dh->architecture, "powerpc64le") != 0)
return (0);
/* That should do it... */
return (sizeof(*dh));
@@ -107,7 +109,7 @@ powerpc_maphdrs(kvm_t *kd)
}
vm->dmphdrsz = 0;
vm->eh = vm->map;
- if (!valid_elf_header(vm->eh)) {
+ if (!valid_elf_header(kd, vm->eh)) {
/*
* Hmmm, no ELF header. Maybe we still have a dump header.
* This is normal when the core file wasn't created by
@@ -118,11 +120,11 @@ powerpc_maphdrs(kvm_t *kd)
if (vm->dmphdrsz == 0)
goto inval;
vm->eh = (void *)((uintptr_t)vm->map + vm->dmphdrsz);
- if (!valid_elf_header(vm->eh))
+ if (!valid_elf_header(kd, vm->eh))
goto inval;
}
- mapsz = be16toh(vm->eh->e_phentsize) * be16toh(vm->eh->e_phnum) +
- be64toh(vm->eh->e_phoff);
+ mapsz = _kvm16toh(kd, vm->eh->e_phentsize) *
+ _kvm16toh(kd, vm->eh->e_phnum) + _kvm64toh(kd, vm->eh->e_phoff);
munmap(vm->map, vm->mapsz);
/* Map all headers. */
@@ -134,7 +136,7 @@ powerpc_maphdrs(kvm_t *kd)
}
vm->eh = (void *)((uintptr_t)vm->map + vm->dmphdrsz);
vm->ph = (void *)((uintptr_t)vm->eh +
- (uintptr_t)be64toh(vm->eh->e_phoff));
+ (uintptr_t)_kvm64toh(kd, vm->eh->e_phoff));
return (0);
inval:
@@ -155,19 +157,21 @@ powerpc64_va2off(kvm_t *kd, kvaddr_t va, off_t *ofs)
int nph;
ph = vm->ph;
- nph = be16toh(vm->eh->e_phnum);
- while (nph && (va < be64toh(ph->p_vaddr) ||
- va >= be64toh(ph->p_vaddr) + be64toh(ph->p_memsz))) {
+ nph = _kvm16toh(kd, vm->eh->e_phnum);
+ while (nph && (va < _kvm64toh(kd, ph->p_vaddr) ||
+ va >= _kvm64toh(kd, ph->p_vaddr) + _kvm64toh(kd, ph->p_memsz))) {
nph--;
- ph = (void *)((uintptr_t)ph + be16toh(vm->eh->e_phentsize));
+ ph = (void *)((uintptr_t)ph +
+ _kvm16toh(kd, vm->eh->e_phentsize));
}
if (nph == 0)
return (0);
/* Segment found. Return file offset and range. */
- *ofs = vm->dmphdrsz + be64toh(ph->p_offset) +
- (va - be64toh(ph->p_vaddr));
- return (be64toh(ph->p_memsz) - (va - be64toh(ph->p_vaddr)));
+ *ofs = vm->dmphdrsz + _kvm64toh(kd, ph->p_offset) +
+ (va - _kvm64toh(kd, ph->p_vaddr));
+ return (_kvm64toh(kd, ph->p_memsz) -
+ (va - _kvm64toh(kd, ph->p_vaddr)));
}
static void
@@ -190,6 +194,14 @@ _powerpc64_probe(kvm_t *kd)
}
static int
+_powerpc64le_probe(kvm_t *kd)
+{
+
+ return (_kvm_probe_elf_kernel(kd, ELFCLASS64, EM_PPC64) &&
+ kd->nlehdr.e_ident[EI_DATA] == ELFDATA2LSB);
+}
+
+static int
_powerpc64_initvtop(kvm_t *kd)
{
@@ -209,7 +221,7 @@ _powerpc64_kvatop(kvm_t *kd, kvaddr_t va, off_t *ofs)
struct vmstate *vm;
vm = kd->vmst;
- if (be64toh(vm->ph->p_paddr) == 0x)
+ if (_kvm64toh(kd, vm->ph->p_paddr) ==
svn commit: r366054 - in head/lib/libc: powerpc/softfloat powerpc64
Author: bdragon Date: Wed Sep 23 02:05:44 2020 New Revision: 366054 URL: https://svnweb.freebsd.org/changeset/base/366054 Log: [PowerPC64LE] Fix gdtoa configurations on LE. gdtoa wins the award for "most outdated endianness naming convention" with its IEEE_8087 vs IEEE_MC68k defines. I had a good chuckle. Update softfloat and arith.h to adjust to BE or LE automatically based on the low level preprocessor defines. Fixes printf/scanf on PowerPC64LE, although there is still a problem lurking regarding Signalling NaNs... Sponsored by: Tag1 Consulting, Inc. Modified: head/lib/libc/powerpc/softfloat/powerpc-gcc.h head/lib/libc/powerpc64/arith.h Modified: head/lib/libc/powerpc/softfloat/powerpc-gcc.h == --- head/lib/libc/powerpc/softfloat/powerpc-gcc.h Wed Sep 23 01:56:26 2020(r366053) +++ head/lib/libc/powerpc/softfloat/powerpc-gcc.h Wed Sep 23 02:05:44 2020(r366054) @@ -6,7 +6,11 @@ One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined. --- */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#define LITTLEENDIAN +#else #define BIGENDIAN +#endif /* --- Modified: head/lib/libc/powerpc64/arith.h == --- head/lib/libc/powerpc64/arith.h Wed Sep 23 01:56:26 2020 (r366053) +++ head/lib/libc/powerpc64/arith.h Wed Sep 23 02:05:44 2020 (r366054) @@ -11,8 +11,13 @@ * architecture. See contrib/gdtoa/gdtoaimp.h for details. */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#define IEEE_8087 +#define Arith_Kind_ASL 1 +#else #define IEEE_MC68k #define Arith_Kind_ASL 2 +#endif #define Long int #define Intcast (int)(long) #define Double_Align ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366053 - in head/sys/powerpc: aim include
Author: bdragon Date: Wed Sep 23 01:56:26 2020 New Revision: 366053 URL: https://svnweb.freebsd.org/changeset/base/366053 Log: [PowerPC64LE] Fix AP spinup on powernv. OPAL unconditionally enters secondary CPUs with only HV and SF set. I tried writing a secondary entry point instead, but OPAL rejected it and I am unsure why, so I resorted to making the system reset interrupt endian-flexible. This means we take a slight performance hit on wakeup on LE, but it is a good stopgap until we can figure out a reliable way to make OPAL enter where we want it to. It probably makes sense to have it around anyway, because I can imagine scenarios where the cpu resets itself to BE and does a software reset. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/aim/trap_subr64.S head/sys/powerpc/include/asm.h Modified: head/sys/powerpc/aim/trap_subr64.S == --- head/sys/powerpc/aim/trap_subr64.S Wed Sep 23 01:56:21 2020 (r366052) +++ head/sys/powerpc/aim/trap_subr64.S Wed Sep 23 01:56:26 2020 (r366053) @@ -319,6 +319,19 @@ dtrace_invop_calltrap_addr: .globl CNAME(cpu_wakeup_handler) .p2align 3 CNAME(rstcode): +#ifdef __LITTLE_ENDIAN__ + /* +* XXX This shouldn't be necessary. +* +* According to the ISA documentation, LE should be set from HILE +* or the LPCR ILE bit automatically. However, the entry into this +* vector from OPAL_START_CPU does not honor this correctly. +* +* We should be able to define an alternate entry for opal's +* start_kernel_secondary asm code to branch to. +*/ + RETURN_TO_NATIVE_ENDIAN +#endif /* * Check if this is software reset or * processor is waking up from power saving mode Modified: head/sys/powerpc/include/asm.h == --- head/sys/powerpc/include/asm.h Wed Sep 23 01:56:21 2020 (r366052) +++ head/sys/powerpc/include/asm.h Wed Sep 23 01:56:26 2020 (r366053) @@ -213,6 +213,9 @@ name: \ * wrong endian. * * This sequence is NMI-reentrant. + * + * Do not change the length of this sequence without looking at the users, + * this is used in size-constrained places like the reset vector! */ #defineRETURN_TO_NATIVE_ENDIAN \ tdi 0, %r0, 0x48; /* Endian swapped: b . + 8 */\ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366051 - head/sys/powerpc/powernv
Author: bdragon
Date: Wed Sep 23 01:51:01 2020
New Revision: 366051
URL: https://svnweb.freebsd.org/changeset/base/366051
Log:
[PowerPC64LE] Endian fix for opal_hmi.c
Another boring one. We need to endian swap before checking flags.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powernv/opal_hmi.c
Modified: head/sys/powerpc/powernv/opal_hmi.c
==
--- head/sys/powerpc/powernv/opal_hmi.c Wed Sep 23 01:49:50 2020
(r366050)
+++ head/sys/powerpc/powernv/opal_hmi.c Wed Sep 23 01:51:01 2020
(r366051)
@@ -94,7 +94,7 @@ opal_hmi_handler2(struct trapframe *frame)
*flags = 0;
err = opal_call(OPAL_HANDLE_HMI2, DMAP_TO_PHYS((vm_offset_t)flags));
- if (*flags & OPAL_HMI_FLAGS_TOD_TB_FAIL)
+ if (be64toh(*flags) & OPAL_HMI_FLAGS_TOD_TB_FAIL)
panic("TOD/TB recovery failure");
if (err == OPAL_SUCCESS)
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svn commit: r366049 - head/sys/powerpc/powernv
Author: bdragon
Date: Wed Sep 23 01:49:37 2020
New Revision: 366049
URL: https://svnweb.freebsd.org/changeset/base/366049
Log:
[PowerPC64LE] Get XIVE up and running.
More endian conversion.
* Install TCEs correctly (i.e. in big endian)
* Convert to big endian and back when setting up queue pages and IRQs.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powernv/opal_pci.c
head/sys/powerpc/powernv/xive.c
Modified: head/sys/powerpc/powernv/opal_pci.c
==
--- head/sys/powerpc/powernv/opal_pci.c Wed Sep 23 01:41:51 2020
(r366048)
+++ head/sys/powerpc/powernv/opal_pci.c Wed Sep 23 01:49:37 2020
(r366049)
@@ -385,7 +385,7 @@ opalpci_attach(device_t dev)
(uintmax_t)sc->phb_id);
for (i = 0; i < entries; i++)
- sc->tce[i] = (i * tce_size) | OPAL_PCI_TCE_R | OPAL_PCI_TCE_W;
+ sc->tce[i] = htobe64((i * tce_size) | OPAL_PCI_TCE_R |
OPAL_PCI_TCE_W);
/* Map TCE for every PE. It seems necessary for Power8 */
for (i = 0; i < npe; i++) {
Modified: head/sys/powerpc/powernv/xive.c
==
--- head/sys/powerpc/powernv/xive.c Wed Sep 23 01:41:51 2020
(r366048)
+++ head/sys/powerpc/powernv/xive.c Wed Sep 23 01:49:37 2020
(r366049)
@@ -377,6 +377,9 @@ xive_attach(device_t dev)
opal_call(OPAL_XIVE_GET_VP_INFO, xive_cpud->vp, NULL,
vtophys(_cpud->cam), NULL, vtophys(_cpud->chip));
+ xive_cpud->cam = be64toh(xive_cpud->cam);
+ xive_cpud->chip = be64toh(xive_cpud->chip);
+
/* Allocate the queue page and populate the queue state data. */
xive_cpud->queue.q_page = contigmalloc(PAGE_SIZE, M_XIVE,
M_ZERO | M_WAITOK, 0, BUS_SPACE_MAXADDR, PAGE_SIZE, 0);
@@ -707,6 +710,12 @@ xive_init_irq(struct xive_irq *irqd, u_int irq)
vtophys(_phys), vtophys(_shift),
vtophys(>chip));
+ irqd->flags = be64toh(irqd->flags);
+ eoi_phys = be64toh(eoi_phys);
+ trig_phys = be64toh(trig_phys);
+ esb_shift = be32toh(esb_shift);
+ irqd->chip = be32toh(irqd->chip);
+
irqd->girq = irq;
irqd->esb_size = 1 << esb_shift;
irqd->eoi_page = (vm_offset_t)pmap_mapdev(eoi_phys, irqd->esb_size);
@@ -721,6 +730,10 @@ xive_init_irq(struct xive_irq *irqd, u_int irq)
opal_call(OPAL_XIVE_GET_IRQ_CONFIG, irq, vtophys(>vp),
vtophys(>prio), vtophys(>lirq));
+
+ irqd->vp = be64toh(irqd->vp);
+ irqd->prio = be64toh(irqd->prio);
+ irqd->lirq = be32toh(irqd->lirq);
}
/* Allocate an IRQ struct before populating it. */
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svn commit: r366048 - head/sys/powerpc/powernv
Author: bdragon Date: Wed Sep 23 01:41:51 2020 New Revision: 366048 URL: https://svnweb.freebsd.org/changeset/base/366048 Log: [PowerPC64LE] Endian fix for opal_dev.c. Not much to say here, another missing be64toh() in memory that was written from OPAL. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/powernv/opal_dev.c Modified: head/sys/powerpc/powernv/opal_dev.c == --- head/sys/powerpc/powernv/opal_dev.c Wed Sep 23 01:37:01 2020 (r366047) +++ head/sys/powerpc/powernv/opal_dev.c Wed Sep 23 01:41:51 2020 (r366048) @@ -135,7 +135,7 @@ opal_heartbeat(void) events = 0; /* Turn the OPAL state crank */ opal_call(OPAL_POLL_EVENTS, vtophys()); - if (events & OPAL_EVENT_MSG_PENDING) + if (be64toh(events) & OPAL_EVENT_MSG_PENDING) opal_handle_messages(); tsleep(opal_hb_proc, 0, "opal", MSEC_2_TICKS(opal_heartbeat_ms)); ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366047 - head/sys/powerpc/powernv
Author: bdragon Date: Wed Sep 23 01:37:01 2020 New Revision: 366047 URL: https://svnweb.freebsd.org/changeset/base/366047 Log: [PowerPC64LE] Endian fixes for opal_pci.c. Since OPAL runs in big endian, any data being passed back and forth via memory instead of registers needs to be byteswapped. From my notes during development: "A good way to find candidates is to look for vtophys() in opal_call() parameters. The memory being passed will be written into in BE." Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/powernv/opal_pci.c Modified: head/sys/powerpc/powernv/opal_pci.c == --- head/sys/powerpc/powernv/opal_pci.c Wed Sep 23 01:33:54 2020 (r366046) +++ head/sys/powerpc/powernv/opal_pci.c Wed Sep 23 01:37:01 2020 (r366047) @@ -524,11 +524,12 @@ opalpci_read_config(device_t dev, u_int bus, u_int slo case 2: error = opal_call(OPAL_PCI_CONFIG_READ_HALF_WORD, sc->phb_id, config_addr, reg, vtophys()); - word = half; + word = be16toh(half); break; case 4: error = opal_call(OPAL_PCI_CONFIG_READ_WORD, sc->phb_id, config_addr, reg, vtophys()); + word = be32toh(word); break; default: error = OPAL_SUCCESS; @@ -547,6 +548,7 @@ opalpci_read_config(device_t dev, u_int bus, u_int slo opal_call(OPAL_PCI_EEH_FREEZE_STATUS, sc->phb_id, OPAL_PCI_DEFAULT_PE, vtophys(_state), vtophys(_type), NULL); + err_type = be16toh(err_type); /* XXX unused */ if (eeh_state != OPAL_EEH_STOPPED_NOT_FROZEN) opal_call(OPAL_PCI_EEH_FREEZE_CLEAR, sc->phb_id, OPAL_PCI_DEFAULT_PE, ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366046 - head/sys/powerpc/aim
Author: bdragon
Date: Wed Sep 23 01:33:54 2020
New Revision: 366046
URL: https://svnweb.freebsd.org/changeset/base/366046
Log:
[PowerPC64LE] Implement endian-independent dword atomic PTE lock.
It's much easier to implement this in an endian-independent way when we
don't also have to worry about masking half of the dword off.
Given that this code ran on a machine that ran a poudriere bulk with no
kernel oddities, I am relatively certain it is correctly implemented. ;)
This should be a minor performance boost on BE as well.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/moea64_native.c
Modified: head/sys/powerpc/aim/moea64_native.c
==
--- head/sys/powerpc/aim/moea64_native.cWed Sep 23 01:29:33 2020
(r366045)
+++ head/sys/powerpc/aim/moea64_native.cWed Sep 23 01:33:54 2020
(r366046)
@@ -633,15 +633,46 @@ static int
atomic_pte_lock(volatile struct lpte *pte, uint64_t bitmask, uint64_t *oldhi)
{
int ret;
+#ifdef __powerpc64__
+ uint64_t temp;
+#else
uint32_t oldhihalf;
+#endif
/*
* Note: in principle, if just the locked bit were set here, we
* could avoid needing the eviction lock. However, eviction occurs
* so rarely that it isn't worth bothering about in practice.
*/
-
+#ifdef __powerpc64__
+ /*
+* Note: Success of this sequence has the side effect of invalidating
+* the PTE, as we are setting it to LPTE_LOCKED and discarding the
+* other bits, including LPTE_V.
+*/
__asm __volatile (
+ "1:\tldarx %1, 0, %3\n\t" /* load old value */
+ "and. %0,%1,%4\n\t" /* check if any bits set */
+ "bne 2f\n\t"/* exit if any set */
+ "stdcx. %5, 0, %3\n\t" /* attempt to store */
+ "bne- 1b\n\t" /* spin if failed */
+ "li %0, 1\n\t" /* success - retval = 1 */
+ "b 3f\n\t" /* we've succeeded */
+ "2:\n\t"
+ "stdcx. %1, 0, %3\n\t" /* clear reservation (74xx) */
+ "li %0, 0\n\t" /* failure - retval = 0 */
+ "3:\n\t"
+ : "=" (ret), "="(temp), "=m" (pte->pte_hi)
+ : "r" ((volatile char *)>pte_hi),
+ "r" (htobe64(bitmask)), "r" (htobe64(LPTE_LOCKED)),
+ "m" (pte->pte_hi)
+ : "cr0", "cr1", "cr2", "memory");
+ *oldhi = be64toh(temp);
+#else
+ /*
+* This code is used on bridge mode only.
+*/
+ __asm __volatile (
"1:\tlwarx %1, 0, %3\n\t" /* load old value */
"and. %0,%1,%4\n\t" /* check if any bits set */
"bne 2f\n\t"/* exit if any set */
@@ -660,6 +691,7 @@ atomic_pte_lock(volatile struct lpte *pte, uint64_t bi
: "cr0", "cr1", "cr2", "memory");
*oldhi = (pte->pte_hi & 0xULL) | oldhihalf;
+#endif
return (ret);
}
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svn commit: r366045 - head/sys/powerpc/aim
Author: bdragon
Date: Wed Sep 23 01:29:33 2020
New Revision: 366045
URL: https://svnweb.freebsd.org/changeset/base/366045
Log:
[PowerPC64LE] Fix endian conversion bugs in moea64.
For a body of code that had its endian conversion bits written blind without
the ability to test, moea64 was VERY close to being correct.
There were only four instances where the existing code was getting it wrong.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/moea64_native.c
Modified: head/sys/powerpc/aim/moea64_native.c
==
--- head/sys/powerpc/aim/moea64_native.cWed Sep 23 01:13:29 2020
(r366044)
+++ head/sys/powerpc/aim/moea64_native.cWed Sep 23 01:29:33 2020
(r366045)
@@ -341,7 +341,7 @@ moea64_pte_unset_native(struct pvo_entry *pvo)
pvo_ptevpn = moea64_pte_vpn_from_pvo_vpn(pvo);
rw_rlock(_eviction_lock);
- if ((be64toh(pt->pte_hi & LPTE_AVPN_MASK)) != pvo_ptevpn) {
+ if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != pvo_ptevpn) {
/* Evicted */
STAT_MOEA64(moea64_pte_overflow--);
rw_runlock(_eviction_lock);
@@ -354,7 +354,7 @@ moea64_pte_unset_native(struct pvo_entry *pvo)
*/
isync();
critical_enter();
- pt->pte_hi = be64toh((pt->pte_hi & ~LPTE_VALID) | LPTE_LOCKED);
+ pt->pte_hi = htobe64((be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED);
PTESYNC();
TLBIE(pvo->pvo_vpn);
ptelo = be64toh(pt->pte_lo);
@@ -378,7 +378,7 @@ moea64_pte_replace_inval_native(struct pvo_entry *pvo,
moea64_pte_from_pvo(pvo, );
rw_rlock(_eviction_lock);
- if ((be64toh(pt->pte_hi & LPTE_AVPN_MASK)) !=
+ if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) !=
(properpt.pte_hi & LPTE_AVPN_MASK)) {
/* Evicted */
STAT_MOEA64(moea64_pte_overflow--);
@@ -392,7 +392,7 @@ moea64_pte_replace_inval_native(struct pvo_entry *pvo,
*/
isync();
critical_enter();
- pt->pte_hi = be64toh((pt->pte_hi & ~LPTE_VALID) | LPTE_LOCKED);
+ pt->pte_hi = htobe64((be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED);
PTESYNC();
TLBIE(pvo->pvo_vpn);
ptelo = be64toh(pt->pte_lo);
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svn commit: r366044 - head/release/powerpc
Author: bdragon Date: Wed Sep 23 01:13:29 2020 New Revision: 366044 URL: https://svnweb.freebsd.org/changeset/base/366044 Log: [PowerPC64LE] Add release building script for powerpc64le. This was originally part of the initial commit, but after discussion in D26399, I split it out into its own commit after the kernel config file. Sponsored by: Tag1 Consulting, Inc. Added: head/release/powerpc/powerpc64le.conf (contents, props changed) Added: head/release/powerpc/powerpc64le.conf == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/release/powerpc/powerpc64le.conf Wed Sep 23 01:13:29 2020 (r366044) @@ -0,0 +1,10 @@ +#!/bin/sh +# +# $FreeBSD$ +# + +# Configuration file for release/release.sh to build powerpc/powerpc64le. + +TARGET="powerpc" +TARGET_ARCH="powerpc64le" +KERNEL="GENERIC64LE" ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366043 - head/sys/powerpc/conf
Author: bdragon Date: Wed Sep 23 01:07:55 2020 New Revision: 366043 URL: https://svnweb.freebsd.org/changeset/base/366043 Log: [PowerPC64LE] Initial GENERIC64LE kernel config. This is slightly stripped down from GENERIC64, as PowerMac G5 machines are incapable of running in LE mode (so we can skip the Mac drivers.) While technically POWER6 and POWER7 have the hardware capability of running in LE mode, they have a tendency to trap excessively when a load/store is misaligned. (an extremely common occurrence in LE code, and one of the main reasons I consider BE to be superior, as it turns potential security issues into immediately obvious mangled numbers.) Additionally, there was no mechanism to control what endian interrupts are delivered in, so supporting LE operation on POWER6 and POWER7 involves some really dirty tricks in the interrupt vectors that I would rather avoid. IBM drew the line in the sand at POWER8 some time around 2013, embracing full support for LE in the platform, and making a push across the board for LE code to target POWER8 as a minimum requirement. As such, usage of LE kernels on POWER6 and POWER7 is practically nil, despite it being technically possible to do. The so-called "TRUELE" feature bit which is the baseline requirement for needed for PowerPC64LE was introduced in POWER8. Sponsored by: Tag1 Consulting, Inc. Added: head/sys/powerpc/conf/GENERIC64LE (contents, props changed) Added: head/sys/powerpc/conf/GENERIC64LE == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/powerpc/conf/GENERIC64LE Wed Sep 23 01:07:55 2020 (r366043) @@ -0,0 +1,253 @@ +# +# GENERIC -- Generic kernel configuration file for FreeBSD/powerpc +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ + +cpuAIM +ident GENERIC + +machinepowerpc powerpc64le + +makeoptionsDEBUG=-g#Build kernel with gdb(1) debug symbols +makeoptionsWITH_CTF=1 + +# Platform support +optionsMAMBO #IBM Mambo Full System Simulator +optionsQEMU#QEMU processor emulator +optionsPSERIES #PAPR-compliant systems (e.g. IBM p) +optionsPOWERNV #Non-virtualized OpenPOWER systems + +optionsFDT #Flattened Device Tree +optionsSCHED_ULE #ULE scheduler +optionsNUMA#Non-Uniform Memory Architecture support +optionsPREEMPTION #Enable kernel thread preemption +optionsVIMAGE # Subsystem virtualization, e.g. VNET +optionsINET#InterNETworking +optionsINET6 #IPv6 communications protocols +optionsIPSEC_SUPPORT # Allow kldload of ipsec and tcpmd5 +optionsTCP_OFFLOAD # TCP offload +optionsTCP_BLACKBOX# Enhanced TCP event logging +optionsTCP_HHOOK # hhook(9) framework for TCP +optionsTCP_RFC7413 # TCP Fast Open +optionsSCTP_SUPPORT# Allow kldload of SCTP +optionsFFS #Berkeley Fast Filesystem +optionsSOFTUPDATES #Enable FFS soft updates support +optionsUFS_ACL #Support for access control lists +optionsUFS_DIRHASH #Improve performance on big directories +optionsUFS_GJOURNAL#Enable gjournal-based UFS journaling +optionsQUOTA #Enable disk quotas for UFS +optionsMD_ROOT #MD is a potential root device +optionsMD_ROOT_MEM #Enable use of initrd as MD root +optionsNFSCL #Network Filesystem Client +optionsNFSD#Network Filesystem Server +optionsNFSLOCKD#Network Lock Manager +optionsNFS_ROOT#NFS usable as root device +optionsMSDOSFS #MSDOS Filesystem +optionsCD9660 #ISO 9660 Filesystem +optionsPROCFS #Process filesystem (requires PSEUDOFS) +options
svn commit: r366041 - in head/sys/powerpc: include powernv
Author: bdragon Date: Wed Sep 23 00:32:50 2020 New Revision: 366041 URL: https://svnweb.freebsd.org/changeset/base/366041 Log: [PowerPC64LE] powernv ILE setup code. When running without a hypervisor, we need to set the ILE bit in the LPCR ourselves. For the boot processor, handle it in powernv_attach() like we do for other LPCR bits. No change for the APs, as they will use the lpcr global to set up their own LPCR when they do their own cpudep_ap_early_bootstrap() and pick up this automatically. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/include/spr.h head/sys/powerpc/powernv/platform_powernv.c Modified: head/sys/powerpc/include/spr.h == --- head/sys/powerpc/include/spr.h Wed Sep 23 00:28:47 2020 (r366040) +++ head/sys/powerpc/include/spr.h Wed Sep 23 00:32:50 2020 (r366041) @@ -292,6 +292,7 @@ #defineSPR_LPCR0x13e /* .6. Logical Partitioning Control */ #define LPCR_LPES 0x008 /* Bit 60 */ #define LPCR_HVICE 0x002 /* Hypervisor Virtualization Interrupt (Arch 3.0) */ +#define LPCR_ILE(1ULL << 25) /* Interrupt Little-Endian (ISA 2.07) */ #define LPCR_UPRT (1ULL << 22) /* Use Process Table (ISA 3) */ #define LPCR_HR (1ULL << 20) /* Host Radix mode */ #define LPCR_PECE_DRBL (1ULL << 16) /* Directed Privileged Doorbell */ Modified: head/sys/powerpc/powernv/platform_powernv.c == --- head/sys/powerpc/powernv/platform_powernv.c Wed Sep 23 00:28:47 2020 (r366040) +++ head/sys/powerpc/powernv/platform_powernv.c Wed Sep 23 00:32:50 2020 (r366041) @@ -174,6 +174,10 @@ powernv_attach(platform_t plat) if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) lpcr |= LPCR_HVICE; +#if BYTE_ORDER == LITTLE_ENDIAN + lpcr |= LPCR_ILE; +#endif + mtspr(SPR_LPCR, lpcr); isync(); ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366040 - head/sys/powerpc/powernv
Author: bdragon Date: Wed Sep 23 00:28:47 2020 New Revision: 366040 URL: https://svnweb.freebsd.org/changeset/base/366040 Log: [PowerPC64LE] LE opal_call() implementation OPAL runs in big endian, so we need to rfid into it to switch endian atomically when branching to it, and we need to do the RETURN_TO_NATIVE_ENDIAN dance when it returns to us. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/powernv/opal.c head/sys/powerpc/powernv/opalcall.S Modified: head/sys/powerpc/powernv/opal.c == --- head/sys/powerpc/powernv/opal.c Wed Sep 23 00:21:51 2020 (r366039) +++ head/sys/powerpc/powernv/opal.c Wed Sep 23 00:28:47 2020 (r366040) @@ -57,7 +57,7 @@ opal_check(void) OF_getencprop(opal, "opal-entry-address", val, sizeof(val)); opal_entrypoint = ((uint64_t)val[0] << 32) | val[1]; - opal_msr = mfmsr() & ~(PSL_EE | PSL_IR | PSL_DR | PSL_SE); + opal_msr = mfmsr() & ~(PSL_EE | PSL_IR | PSL_DR | PSL_SE | PSL_LE); opal_initialized = 1; Modified: head/sys/powerpc/powernv/opalcall.S == --- head/sys/powerpc/powernv/opalcall.S Wed Sep 23 00:21:51 2020 (r366039) +++ head/sys/powerpc/powernv/opalcall.S Wed Sep 23 00:28:47 2020 (r366040) @@ -84,6 +84,10 @@ ASENTRY(opal_call) xori%r3,%r3,1 #endif +#ifdef __LITTLE_ENDIAN__ + mtsrr1 %r3 +#endif + /* Shift registers over */ mr %r3,%r4 mr %r4,%r5 @@ -93,8 +97,23 @@ ASENTRY(opal_call) mr %r8,%r9 mr %r9,%r10 +#ifdef __LITTLE_ENDIAN__ + /* We need to rfid to switch endian. */ + mfctr %r11 + mtsrr0 %r11 + LOAD_LR_NIA +1: + mflr%r11 + addi%r11, %r11, (2f-1b) + mtlr%r11 /* Call OPAL */ + rfid +2: + RETURN_TO_NATIVE_ENDIAN +#else + /* Call OPAL */ bctrl +#endif /* Restore MSR */ mtmsrd %r31 ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r366039 - in head: lib/csu lib/libc lib/libc/powerpc64/string libexec/rtld-elf libexec/rtld-elf/rtld-libc
Author: bdragon
Date: Wed Sep 23 00:21:51 2020
New Revision: 366039
URL: https://svnweb.freebsd.org/changeset/base/366039
Log:
[PowerPC64LE] Use a shared LIBC_ARCH for powerpc64le.
Given that we have converted to ELFv2 for BE already, endianness is the only
difference between the two ARCHs.
As such, there is no need to differentiate LIBC_ARCH between the two.
Combining them like this lets us avoid needing to have two copies of several
bits for no good reason.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/lib/csu/Makefile
head/lib/libc/Makefile
head/lib/libc/powerpc64/string/Makefile.inc
head/libexec/rtld-elf/Makefile
head/libexec/rtld-elf/rtld-libc/Makefile.inc
Modified: head/lib/csu/Makefile
==
--- head/lib/csu/Makefile Wed Sep 23 00:13:58 2020(r366038)
+++ head/lib/csu/Makefile Wed Sep 23 00:21:51 2020(r366039)
@@ -2,8 +2,8 @@
.include
-.if exists(${.CURDIR}/${MACHINE_ARCH})
-SUBDIR+= ${MACHINE_ARCH}
+.if exists(${.CURDIR}/${MACHINE_ARCH:S/powerpc64le/powerpc64/})
+SUBDIR+= ${MACHINE_ARCH:S/powerpc64le/powerpc64/}
.else
SUBDIR+= ${MACHINE_CPUARCH}
.endif
Modified: head/lib/libc/Makefile
==
--- head/lib/libc/Makefile Wed Sep 23 00:13:58 2020(r366038)
+++ head/lib/libc/Makefile Wed Sep 23 00:21:51 2020(r366039)
@@ -15,8 +15,8 @@ LIBC_SRCTOP?= ${.CURDIR}
# named MACHINE_CPUARCH, but some ABIs are different enough to require
# their own libc, so allow a directory named MACHINE_ARCH to override this.
-.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH})
-LIBC_ARCH=${MACHINE_ARCH}
+.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH:S/powerpc64le/powerpc64/})
+LIBC_ARCH=${MACHINE_ARCH:S/powerpc64le/powerpc64/}
.else
LIBC_ARCH=${MACHINE_CPUARCH}
.endif
Modified: head/lib/libc/powerpc64/string/Makefile.inc
==
--- head/lib/libc/powerpc64/string/Makefile.inc Wed Sep 23 00:13:58 2020
(r366038)
+++ head/lib/libc/powerpc64/string/Makefile.inc Wed Sep 23 00:21:51 2020
(r366039)
@@ -10,9 +10,14 @@ MDSRCS+= \
memmove.S \
memmove_vsx.S \
memmove_resolver.c \
- strcpy_arch_2_05.S \
- strcpy.c \
- strcpy_resolver.c \
strncpy_arch_2_05.S \
strncpy.c \
strncpy_resolver.c
+
+# XXX Port strcpy to LE.
+.if ${MACHINE_ARCH} == "powerpc64"
+MDSRCS+= \
+ strcpy_arch_2_05.S \
+ strcpy.c \
+ strcpy_resolver.c
+.endif
Modified: head/libexec/rtld-elf/Makefile
==
--- head/libexec/rtld-elf/Makefile Wed Sep 23 00:13:58 2020
(r366038)
+++ head/libexec/rtld-elf/Makefile Wed Sep 23 00:21:51 2020
(r366039)
@@ -32,8 +32,8 @@ MAN?= rtld.1
ACFLAGS+= -DLOCORE
CFLAGS+= -Wall -DFREEBSD_ELF -DIN_RTLD -ffreestanding
CFLAGS+= -I${SRCTOP}/lib/csu/common
-.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH})
-RTLD_ARCH= ${MACHINE_ARCH}
+.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH:S/powerpc64le/powerpc64/})
+RTLD_ARCH= ${MACHINE_ARCH:S/powerpc64le/powerpc64/}
.else
RTLD_ARCH= ${MACHINE_CPUARCH}
.endif
Modified: head/libexec/rtld-elf/rtld-libc/Makefile.inc
==
--- head/libexec/rtld-elf/rtld-libc/Makefile.incWed Sep 23 00:13:58
2020(r366038)
+++ head/libexec/rtld-elf/rtld-libc/Makefile.incWed Sep 23 00:21:51
2020(r366039)
@@ -5,8 +5,8 @@
.include
LIBC_SRCTOP=${SRCTOP}/lib/libc
-.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH})
-LIBC_ARCH=${MACHINE_ARCH}
+.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH:S/powerpc64le/powerpc64/})
+LIBC_ARCH=${MACHINE_ARCH:S/powerpc64le/powerpc64/}
.else
LIBC_ARCH=${MACHINE_CPUARCH}
.endif
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svn commit: r366038 - head/sys/powerpc/pseries
Author: bdragon
Date: Wed Sep 23 00:13:58 2020
New Revision: 366038
URL: https://svnweb.freebsd.org/changeset/base/366038
Log:
[PowerPC64LE] Fix endianness issues in phyp_vscsi.
Unlike virtio, which in legacy mode is guest endian, the hypervisor vscsi
interface operates in big endian, so we must convert back and forth in several
places.
These changes are enough to attach a rootdisk.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/pseries/phyp_vscsi.c
Modified: head/sys/powerpc/pseries/phyp_vscsi.c
==
--- head/sys/powerpc/pseries/phyp_vscsi.c Wed Sep 23 00:09:29 2020
(r366037)
+++ head/sys/powerpc/pseries/phyp_vscsi.c Wed Sep 23 00:13:58 2020
(r366038)
@@ -506,7 +506,8 @@ vscsi_srp_login(struct vscsi_softc *sc)
TAILQ_INSERT_TAIL(>active_xferq, xp, queue);
/* Set up command */
- xp->srp_iu_size = crq.iu_length = 64;
+ xp->srp_iu_size = 64;
+ crq.iu_length = htobe16(xp->srp_iu_size);
err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size,
M_BESTFIT | M_NOWAIT, >srp_iu_offset);
if (err)
@@ -524,11 +525,12 @@ vscsi_srp_login(struct vscsi_softc *sc)
/* Create CRQ entry */
crq.valid = 0x80;
crq.format = 0x01;
- crq.iu_data = xp->sc->srp_iu_phys + xp->srp_iu_offset;
+ crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset);
bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE);
- err = phyp_hcall(H_SEND_CRQ, xp->sc->unit, ((uint64_t *)())[0],
- ((uint64_t *)())[1]);
+ err = phyp_hcall(H_SEND_CRQ, xp->sc->unit,
+ be64toh(((uint64_t *)())[0]),
+ be64toh(((uint64_t *)())[1]));
if (err != 0)
panic("CRQ send failure (%d)", err);
}
@@ -550,7 +552,8 @@ vscsi_task_management(struct vscsi_softc *sc, union cc
TAILQ_REMOVE(>free_xferq, xp, queue);
TAILQ_INSERT_TAIL(>active_xferq, xp, queue);
- xp->srp_iu_size = crq.iu_length = sizeof(*cmd);
+ xp->srp_iu_size = sizeof(*cmd);
+ crq.iu_length = htobe16(xp->srp_iu_size);
err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size,
M_BESTFIT | M_NOWAIT, >srp_iu_offset);
if (err)
@@ -577,10 +580,11 @@ vscsi_task_management(struct vscsi_softc *sc, union cc
/* Create CRQ entry */
crq.valid = 0x80;
crq.format = 0x01;
- crq.iu_data = xp->sc->srp_iu_phys + xp->srp_iu_offset;
+ crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset);
- err = phyp_hcall(H_SEND_CRQ, xp->sc->unit, ((uint64_t *)())[0],
- ((uint64_t *)())[1]);
+ err = phyp_hcall(H_SEND_CRQ, xp->sc->unit,
+ be64toh(((uint64_t *)())[0]),
+ be64toh(((uint64_t *)())[1]));
if (err != 0)
panic("CRQ send failure (%d)", err);
}
@@ -605,9 +609,9 @@ vscsi_scsi_command(void *xxp, bus_dma_segment_t *segs,
ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes;
/* Command format from Table 20, page 37 of SRP spec */
- crq.iu_length = 48 + ((nsegs > 1) ? 20 : 16) +
+ xp->srp_iu_size = 48 + ((nsegs > 1) ? 20 : 16) +
((ccb->csio.cdb_len > 16) ? (ccb->csio.cdb_len - 16) : 0);
- xp->srp_iu_size = crq.iu_length;
+ crq.iu_length = htobe16(xp->srp_iu_size);
if (nsegs > 1)
xp->srp_iu_size += nsegs*16;
xp->srp_iu_size = roundup(xp->srp_iu_size, 16);
@@ -644,19 +648,20 @@ vscsi_scsi_command(void *xxp, bus_dma_segment_t *segs,
desc_start = ((ccb->csio.cdb_len > 16) ?
ccb->csio.cdb_len - 16 : 0);
- chunk_addr = xp->sc->srp_iu_phys + xp->srp_iu_offset + 20 +
- desc_start + sizeof(*cmd);
- chunk_size = 16*nsegs;
+ chunk_addr = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset +
20 +
+ desc_start + sizeof(*cmd));
+ chunk_size = htobe32(16*nsegs);
memcpy(>data_payload[desc_start], _addr, 8);
memcpy(>data_payload[desc_start+12], _size, 4);
chunk_size = 0;
for (i = 0; i < nsegs; i++)
chunk_size += segs[i].ds_len;
+ chunk_size = htobe32(chunk_size);
memcpy(>data_payload[desc_start+16], _size, 4);
desc_start += 20;
for (i = 0; i < nsegs; i++) {
- chunk_addr = segs[i].ds_addr;
- chunk_size = segs[i].ds_len;
+ chunk_addr = htobe64(segs[i].ds_addr);
+ chunk_size = htobe32(segs[i].ds_len);
memcpy(>data_payload[desc_start + 16*i],
_addr, 8);
@@ -685,8 +690,8 @@ vscsi_scsi_command(void *xxp, bus_dma_segment_t *segs,
* 4 byte length
svn commit: r366037 - in head/sys: conf powerpc/conf powerpc/ofw powerpc/powernv
Author: bdragon Date: Wed Sep 23 00:09:29 2020 New Revision: 366037 URL: https://svnweb.freebsd.org/changeset/base/366037 Log: [PowerPC64LE] Work around qemu TCG bug in mtmsrd emulation. The TCG implementation of mtmsrd in qemu blindly copies the entire register to the MSR, instead of the specific bit positions listed in the ISA. This means that qemu will prematurely switch endian out from under the running code instead of waiting for the rfid, causing an immediate trap as it attempts to interpret the next instruction in the wrong endianness. To work around this, ensure PSL_LE is still set before doing the mtmsrd. In the future, we may wish to just turn off translation and unconditionally use rfid to switch to the ofmsr instead of quasi-switching to the ofmsr. Add a new platform option so this can be disabled. (And so that we can conditonalize additional QEMU-specific hacks in the platform code.) Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/conf/options.powerpc head/sys/powerpc/conf/GENERIC64 head/sys/powerpc/conf/NOTES head/sys/powerpc/ofw/ofwcall64.S head/sys/powerpc/powernv/opalcall.S Modified: head/sys/conf/options.powerpc == --- head/sys/conf/options.powerpc Wed Sep 23 00:06:48 2020 (r366036) +++ head/sys/conf/options.powerpc Wed Sep 23 00:09:29 2020 (r366037) @@ -29,6 +29,7 @@ MAMBO POWERNVopt_platform.h PSERIES PSIM +QEMU opt_platform.h SC_OFWFB opt_ofwfb.h Modified: head/sys/powerpc/conf/GENERIC64 == --- head/sys/powerpc/conf/GENERIC64 Wed Sep 23 00:06:48 2020 (r366036) +++ head/sys/powerpc/conf/GENERIC64 Wed Sep 23 00:09:29 2020 (r366037) @@ -30,6 +30,7 @@ makeoptions WITH_CTF=1 optionsPOWERMAC#NewWorld Apple PowerMacs optionsPS3 #Sony Playstation 3 optionsMAMBO #IBM Mambo Full System Simulator +optionsQEMU#QEMU processor emulator optionsPSERIES #PAPR-compliant systems (e.g. IBM p) optionsPOWERNV #Non-virtualized OpenPOWER systems Modified: head/sys/powerpc/conf/NOTES == --- head/sys/powerpc/conf/NOTES Wed Sep 23 00:06:48 2020(r366036) +++ head/sys/powerpc/conf/NOTES Wed Sep 23 00:09:29 2020(r366037) @@ -44,6 +44,7 @@ options POWERMAC#NewWorld Apple PowerMacs #options PS3 #Sony Playstation 3 optionsPSIM#GDB PSIM ppc simulator optionsMAMBO #IBM Mambo Full System Simulator +optionsQEMU#QEMU processor emulator # The cpufreq(4) driver provides support for CPU frequency control device cpufreq Modified: head/sys/powerpc/ofw/ofwcall64.S == --- head/sys/powerpc/ofw/ofwcall64.SWed Sep 23 00:06:48 2020 (r366036) +++ head/sys/powerpc/ofw/ofwcall64.SWed Sep 23 00:09:29 2020 (r366037) @@ -32,6 +32,8 @@ #include #include +#include "opt_platform.h" + #defineOFWSTKSZ4096/* 4K Open Firmware stack */ /* @@ -119,6 +121,10 @@ ASENTRY_NOPROF(ofwcall) addis %r5,%r2,TOC_REF(ofmsr)@ha ld %r5,TOC_REF(ofmsr)@l(%r5) ld %r5,0(%r5) +#if defined(__LITTLE_ENDIAN__) && defined(QEMU) + /* QEMU hack: qemu does not emulate mtmsrd correctly! */ + ori %r5,%r5,1 /* Leave PSR_LE set */ +#endif mtmsrd %r5 isync @@ -270,6 +276,10 @@ ASENTRY_NOPROF(rtascall) addis %r7,%r2,TOC_REF(rtasmsr)@ha ld %r7,TOC_REF(rtasmsr)@l(%r7) ld %r7,0(%r7) +#ifdef __LITTLE_ENDIAN__ + /* QEMU hack: qemu does not emulate mtmsrd correctly! */ + ori %r7,%r7,1 /* Leave PSR_LE set */ +#endif mtmsrd %r7 isync Modified: head/sys/powerpc/powernv/opalcall.S == --- head/sys/powerpc/powernv/opalcall.S Wed Sep 23 00:06:48 2020 (r366036) +++ head/sys/powerpc/powernv/opalcall.S Wed Sep 23 00:09:29 2020 (r366037) @@ -27,6 +27,8 @@ #include +#include "opt_platform.h" + GLOBAL(opal_entrypoint) .llong 0 GLOBAL(opal_data) @@ -70,8 +72,17 @@ ASENTRY(opal_call) ld %r2,TOC_REF(opal_data)@l(%r2) ld %r2,0(%r2) + +#if defined(__LITTLE_ENDIAN__) && defined(QEMU) + /* QEMU hack: qemu does not emulate mtmsrd correctly! */ + ori %r3,%r3,1 /* Leave PSR_LE set */ +#endif mtmsrd %r3 isync
svn commit: r366036 - in head/sys/powerpc: powernv pseries
Author: bdragon
Date: Wed Sep 23 00:06:48 2020
New Revision: 366036
URL: https://svnweb.freebsd.org/changeset/base/366036
Log:
[PowerPC64LE] Fix endianness issues in phyp and opal consoles.
This applies to both pseries and powernv, which were tested at different
points during the patchset development.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powernv/opal_console.c
head/sys/powerpc/pseries/phyp_console.c
Modified: head/sys/powerpc/powernv/opal_console.c
==
--- head/sys/powerpc/powernv/opal_console.c Wed Sep 23 00:03:35 2020
(r366035)
+++ head/sys/powerpc/powernv/opal_console.c Wed Sep 23 00:06:48 2020
(r366036)
@@ -25,6 +25,7 @@
#include
__FBSDID("$FreeBSD$");
+#include
#include
#include
#include
@@ -323,7 +324,7 @@ uart_opal_get(struct uart_opal_softc *sc, void *buffer
int hdr = 0;
if (sc->protocol == OPAL_RAW) {
- uint64_t len = bufsize;
+ uint64_t len = htobe64(bufsize);
uint64_t olen = (uint64_t)
uint64_t obuf = (uint64_t)buffer;
@@ -336,7 +337,7 @@ uart_opal_get(struct uart_opal_softc *sc, void *buffer
if (err != OPAL_SUCCESS)
return (-1);
- bufsize = len;
+ bufsize = be64toh(len);
} else {
uart_lock(>sc_mtx);
if (sc->inbuflen == 0) {
@@ -347,6 +348,7 @@ uart_opal_get(struct uart_opal_softc *sc, void *buffer
return (-1);
}
hdr = 1;
+ sc->inbuflen = be64toh(sc->inbuflen);
}
if (sc->inbuflen == 0) {
@@ -391,7 +393,9 @@ uart_opal_put(struct uart_opal_softc *sc, void *buffer
len = bufsize;
uart_opal_real_map_outbuffer(, );
+ *(uint64_t*)olen = htobe64(*(uint64_t*)olen);
err = opal_call(OPAL_CONSOLE_WRITE, sc->vtermid, olen, obuf);
+ *(uint64_t*)olen = be64toh(*(uint64_t*)olen);
uart_opal_real_unmap_outbuffer();
} else {
uart_lock(>sc_mtx);
@@ -406,7 +410,9 @@ uart_opal_put(struct uart_opal_softc *sc, void *buffer
len = 4 + bufsize;
uart_opal_real_map_outbuffer(, );
+ *(uint64_t*)olen = htobe64(*(uint64_t*)olen);
err = opal_call(OPAL_CONSOLE_WRITE, sc->vtermid, olen, obuf);
+ *(uint64_t*)olen = be64toh(*(uint64_t*)olen);
uart_opal_real_unmap_outbuffer();
uart_unlock(>sc_mtx);
Modified: head/sys/powerpc/pseries/phyp_console.c
==
--- head/sys/powerpc/pseries/phyp_console.c Wed Sep 23 00:03:35 2020
(r366035)
+++ head/sys/powerpc/pseries/phyp_console.c Wed Sep 23 00:06:48 2020
(r366036)
@@ -27,6 +27,7 @@
#include
__FBSDID("$FreeBSD$");
+#include
#include
#include
#include
@@ -306,6 +307,11 @@ uart_phyp_get(struct uart_phyp_softc *sc, void *buffer
return (0);
}
+#if BYTE_ORDER == LITTLE_ENDIAN
+ sc->phyp_inbuf.u64[0] = be64toh(sc->phyp_inbuf.u64[0]);
+ sc->phyp_inbuf.u64[1] = be64toh(sc->phyp_inbuf.u64[1]);
+#endif
+
if ((sc->protocol == HVTERMPROT) && (hdr == 1)) {
sc->inbuflen = sc->inbuflen - 4;
/* The VTERM protocol has a 4 byte header, skip it here. */
@@ -380,8 +386,8 @@ uart_phyp_put(struct uart_phyp_softc *sc, void *buffer
}
do {
- err = phyp_hcall(H_PUT_TERM_CHAR, sc->vtermid, len, cbuf.u64[0],
- cbuf.u64[1]);
+ err = phyp_hcall(H_PUT_TERM_CHAR, sc->vtermid, len,
htobe64(cbuf.u64[0]),
+ htobe64(cbuf.u64[1]));
DELAY(100);
} while (err == H_BUSY);
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svn commit: r366035 - head/sys/powerpc/pseries
Author: bdragon
Date: Wed Sep 23 00:03:35 2020
New Revision: 366035
URL: https://svnweb.freebsd.org/changeset/base/366035
Log:
[PowerPC64LE] Tell the hypervisor to switch interrupts to LE at CHRP attach.
Since we will need to be able to take traps relatively early in the process,
ensure that the hypervisor changes our ILE for us as soon as we are ready.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/pseries/phyp-hvcall.h
head/sys/powerpc/pseries/platform_chrp.c
Modified: head/sys/powerpc/pseries/phyp-hvcall.h
==
--- head/sys/powerpc/pseries/phyp-hvcall.h Tue Sep 22 23:59:02 2020
(r366034)
+++ head/sys/powerpc/pseries/phyp-hvcall.h Wed Sep 23 00:03:35 2020
(r366035)
@@ -170,6 +170,13 @@
#define H_PP1 (1UL<<(63-62))
#define H_PP2 (1UL<<(63-63))
+/* H_SET_MODE resource identifiers from 14.5.4.3.5. */
+#defineH_SET_MODE_RSRC_CIABR 0x1 /* All versions */
+#defineH_SET_MODE_RSRC_DAWR0 0x2 /* All versions */
+#defineH_SET_MODE_RSRC_INTR_TRANS_MODE 0x3 /* All versions */
+#defineH_SET_MODE_RSRC_ILE 0x4 /* PAPR 2.8 / ISA 2.07
*/
+#defineH_SET_MODE_RSRC_DAWR1 0x5 /* ISA 3.1 Future
support */
+
/* pSeries hypervisor opcodes. */
#define H_REMOVE 0x04
#define H_ENTER0x08
Modified: head/sys/powerpc/pseries/platform_chrp.c
==
--- head/sys/powerpc/pseries/platform_chrp.cTue Sep 22 23:59:02 2020
(r366034)
+++ head/sys/powerpc/pseries/platform_chrp.cWed Sep 23 00:03:35 2020
(r366035)
@@ -136,6 +136,9 @@ chrp_attach(platform_t plat)
int quiesce;
#ifdef __powerpc64__
int i;
+#if BYTE_ORDER == LITTLE_ENDIAN
+ int result;
+#endif
/* XXX: check for /rtas/ibm,hypertas-functions? */
if (!(mfmsr() & PSL_HV)) {
@@ -171,6 +174,24 @@ chrp_attach(platform_t plat)
/* Set up hypervisor CPU stuff */
chrp_smp_ap_init(plat);
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+ /*
+* Ask the hypervisor to update the LPAR ILE bit.
+*
+* This involves all processors reentering the hypervisor
+* so the change appears simultaneously in all processors.
+* This can take a long time.
+*/
+ for(;;) {
+ result = phyp_hcall(H_SET_MODE, 1UL,
+ H_SET_MODE_RSRC_ILE, 0, 0);
+ if (result == H_SUCCESS)
+ break;
+ DELAY(1000);
+ }
+#endif
+
}
#endif
chrp_cpuref_init();
___
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svn commit: r366034 - head/sys/powerpc/ofw
Author: bdragon
Date: Tue Sep 22 23:59:02 2020
New Revision: 366034
URL: https://svnweb.freebsd.org/changeset/base/366034
Log:
[PowerPC64LE] Fix endian dependence of ofw_real.c.
Since OFW always runs in big endian in practice, we need to convert several
bits back and forth.
This is necessary to communicate with SLOF on LE pseries.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/ofw/ofw_real.c
Modified: head/sys/powerpc/ofw/ofw_real.c
==
--- head/sys/powerpc/ofw/ofw_real.c Tue Sep 22 23:55:34 2020
(r366033)
+++ head/sys/powerpc/ofw/ofw_real.c Tue Sep 22 23:59:02 2020
(r366034)
@@ -60,6 +60,7 @@
#include
__FBSDID("$FreeBSD$");
+#include
#include
#include
#include
@@ -168,6 +169,9 @@ static caddr_t of_bounce_virt;
static off_t of_bounce_offset;
static size_t of_bounce_size;
+#define IN(x) htobe32(x)
+#define OUT(x) be32toh(x)
+
/*
* To be able to use OFW console on PPC, that requires real mode OFW,
* the mutex that guards the mapping/unmapping of virtual to physical
@@ -406,13 +410,13 @@ ofw_real_test(ofw_t ofw, const char *name)
cell_t missing;
} args;
- args.name = (cell_t)(uintptr_t)"test";
- args.nargs = 1;
- args.nreturns = 1;
+ args.name = IN((cell_t)(uintptr_t)"test");
+ args.nargs = IN(1);
+ args.nreturns = IN(1);
ofw_real_start();
- args.service = ofw_real_map(name, strlen(name) + 1);
+ args.service = IN(ofw_real_map(name, strlen(name) + 1));
argsptr = ofw_real_map(, sizeof(args));
if (args.service == 0 || openfirmware((void *)argsptr) == -1) {
ofw_real_stop();
@@ -420,7 +424,7 @@ ofw_real_test(ofw_t ofw, const char *name)
}
ofw_real_unmap(argsptr, , sizeof(args));
ofw_real_stop();
- return (args.missing);
+ return (OUT(args.missing));
}
/*
@@ -440,11 +444,11 @@ ofw_real_peer(ofw_t ofw, phandle_t node)
cell_t next;
} args;
- args.name = (cell_t)(uintptr_t)"peer";
- args.nargs = 1;
- args.nreturns = 1;
+ args.name = IN((cell_t)(uintptr_t)"peer");
+ args.nargs = IN(1);
+ args.nreturns = IN(1);
- args.node = node;
+ args.node = IN(node);
ofw_real_start();
argsptr = ofw_real_map(, sizeof(args));
if (openfirmware((void *)argsptr) == -1) {
@@ -453,7 +457,7 @@ ofw_real_peer(ofw_t ofw, phandle_t node)
}
ofw_real_unmap(argsptr, , sizeof(args));
ofw_real_stop();
- return (args.next);
+ return (OUT(args.next));
}
/* Return the first child of this node or 0. */
@@ -469,11 +473,11 @@ ofw_real_child(ofw_t ofw, phandle_t node)
cell_t child;
} args;
- args.name = (cell_t)(uintptr_t)"child";
- args.nargs = 1;
- args.nreturns = 1;
+ args.name = IN((cell_t)(uintptr_t)"child");
+ args.nargs = IN(1);
+ args.nreturns = IN(1);
- args.node = node;
+ args.node = IN(node);
ofw_real_start();
argsptr = ofw_real_map(, sizeof(args));
if (openfirmware((void *)argsptr) == -1) {
@@ -482,7 +486,7 @@ ofw_real_child(ofw_t ofw, phandle_t node)
}
ofw_real_unmap(argsptr, , sizeof(args));
ofw_real_stop();
- return (args.child);
+ return (OUT(args.child));
}
/* Return the parent of this node or 0. */
@@ -498,11 +502,11 @@ ofw_real_parent(ofw_t ofw, phandle_t node)
cell_t parent;
} args;
- args.name = (cell_t)(uintptr_t)"parent";
- args.nargs = 1;
- args.nreturns = 1;
+ args.name = IN((cell_t)(uintptr_t)"parent");
+ args.nargs = IN(1);
+ args.nreturns = IN(1);
- args.node = node;
+ args.node = IN(node);
ofw_real_start();
argsptr = ofw_real_map(, sizeof(args));
if (openfirmware((void *)argsptr) == -1) {
@@ -511,7 +515,7 @@ ofw_real_parent(ofw_t ofw, phandle_t node)
}
ofw_real_unmap(argsptr, , sizeof(args));
ofw_real_stop();
- return (args.parent);
+ return (OUT(args.parent));
}
/* Return the package handle that corresponds to an instance handle. */
@@ -527,11 +531,11 @@ ofw_real_instance_to_package(ofw_t ofw, ihandle_t inst
cell_t package;
} args;
- args.name = (cell_t)(uintptr_t)"instance-to-package";
- args.nargs = 1;
- args.nreturns = 1;
+ args.name = IN((cell_t)(uintptr_t)"instance-to-package");
+ args.nargs = IN(1);
+ args.nreturns = IN(1);
- args.instance = instance;
+ args.instance = IN(instance);
ofw_real_start();
argsptr = ofw_real_map(, sizeof(args));
if (openfirmware((void *)argsptr) == -1) {
@@ -540,7 +544,7 @@ ofw_real_instance_to_package(ofw_t ofw, ihandle_t inst
}
svn commit: r366033 - in head/sys/powerpc: aim ofw pseries
Author: bdragon
Date: Tue Sep 22 23:55:34 2020
New Revision: 366033
URL: https://svnweb.freebsd.org/changeset/base/366033
Log:
[PowerPC64LE] LE bringup work: locore / machdep / platform
This is the initial LE changes required in the machdep code to get as far
as platform attachment on qemu pseries.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/aim_machdep.c
head/sys/powerpc/aim/locore64.S
head/sys/powerpc/ofw/ofw_machdep.c
head/sys/powerpc/ofw/ofwcall64.S
head/sys/powerpc/pseries/platform_chrp.c
Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c Tue Sep 22 23:49:30 2020
(r366032)
+++ head/sys/powerpc/aim/aim_machdep.c Tue Sep 22 23:55:34 2020
(r366033)
@@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
#include "opt_kstack_pages.h"
#include "opt_platform.h"
+#include
#include
#include
#include
@@ -257,6 +258,11 @@ aim_cpu_init(vm_offset_t toc)
psl_kernset |= PSL_SF;
if (mfmsr() & PSL_HV)
psl_kernset |= PSL_HV;
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+ psl_kernset |= PSL_LE;
+#endif
+
#endif
psl_userset = psl_kernset | PSL_PR;
#ifdef __powerpc64__
Modified: head/sys/powerpc/aim/locore64.S
==
--- head/sys/powerpc/aim/locore64.S Tue Sep 22 23:49:30 2020
(r366032)
+++ head/sys/powerpc/aim/locore64.S Tue Sep 22 23:55:34 2020
(r366033)
@@ -133,7 +133,11 @@ btext:
* r7: Magic cookie (0xfb5d104d) to indicate that r6 has loader metadata
*/
.text
-ASENTRY_NOPROF(__start)
+_NAKED_ENTRY(__start)
+
+#ifdef __LITTLE_ENDIAN__
+ RETURN_TO_NATIVE_ENDIAN
+#endif
/* Set 64-bit mode if not yet set before branching to C */
mfmsr %r20
li %r21,1
Modified: head/sys/powerpc/ofw/ofw_machdep.c
==
--- head/sys/powerpc/ofw/ofw_machdep.c Tue Sep 22 23:49:30 2020
(r366032)
+++ head/sys/powerpc/ofw/ofw_machdep.c Tue Sep 22 23:55:34 2020
(r366033)
@@ -572,6 +572,10 @@ OF_initial_setup(void *fdt_ptr, void *junk, int (*open
ofmsr[0] = mfmsr();
#ifdef __powerpc64__
ofmsr[0] &= ~PSL_SF;
+ #ifdef __LITTLE_ENDIAN__
+ /* Assume OFW is BE. */
+ ofmsr[0] &= ~PSL_LE;
+ #endif
#else
__asm __volatile("mfsprg0 %0" : "="(ofmsr[1]));
#endif
@@ -645,7 +649,7 @@ OF_bootstrap()
* of its auto-remapping function once the kernel is loaded.
* This is a dirty hack, but what we have.
*/
-#ifdef _LITTLE_ENDIAN
+#ifdef __LITTLE_ENDIAN__
fdt_bt = _le_tag;
#else
fdt_bt = _be_tag;
Modified: head/sys/powerpc/ofw/ofwcall64.S
==
--- head/sys/powerpc/ofw/ofwcall64.STue Sep 22 23:49:30 2020
(r366032)
+++ head/sys/powerpc/ofw/ofwcall64.STue Sep 22 23:55:34 2020
(r366033)
@@ -113,6 +113,7 @@ ASENTRY_NOPROF(ofwcall)
/*
* Set the MSR to the OF value. This has the side effect of disabling
* exceptions, which is important for the next few steps.
+* This does NOT, however, cause us to switch endianness.
*/
addis %r5,%r2,TOC_REF(ofmsr)@ha
@@ -138,9 +139,28 @@ ASENTRY_NOPROF(ofwcall)
stw %r5,4(%r1)
stw %r5,0(%r1)
+#ifdef __LITTLE_ENDIAN__
+ /* Atomic context switch w/ endian change */
+ mtmsrd %r5, 1 /* Clear PSL_EE|PSL_RI */
+ addis %r5,%r2,TOC_REF(ofmsr)@ha
+ ld %r5,TOC_REF(ofmsr)@l(%r5)
+ ld %r5,0(%r5)
+ mtsrr0 %r4
+ mtsrr1 %r5
+ LOAD_LR_NIA
+1:
+ mflr%r5
+ addi%r5, %r5, (2f-1b)
+ mtlr%r5
+ li %r5, 0
+ rfid
+2:
+ RETURN_TO_NATIVE_ENDIAN
+#else
/* Finally, branch to OF */
mtctr %r4
bctrl
+#endif
/* Reload stack pointer, MSR, and reference PC from the OFW stack */
ld %r7,32(%r1)
Modified: head/sys/powerpc/pseries/platform_chrp.c
==
--- head/sys/powerpc/pseries/platform_chrp.cTue Sep 22 23:49:30 2020
(r366032)
+++ head/sys/powerpc/pseries/platform_chrp.cTue Sep 22 23:55:34 2020
(r366033)
@@ -30,6 +30,7 @@
#include
__FBSDID("$FreeBSD$");
+#include
#include
#include
#include
@@ -414,7 +415,7 @@ chrp_cpuref_init(void)
/* /chosen/cpu */
if (OF_getproplen(chosen, "cpu") == sizeof(ihandle_t)) {
OF_getprop(chosen, "cpu", , sizeof(ibsp));
- pbsp = OF_instance_to_package(ibsp);
+ pbsp = OF_instance_to_package(be32toh(ibsp));
if (pbsp != -1)
svn commit: r366032 - in head: . share/mk stand sys/conf sys/modules sys/powerpc/include
Author: bdragon
Date: Tue Sep 22 23:49:30 2020
New Revision: 366032
URL: https://svnweb.freebsd.org/changeset/base/366032
Log:
[PowerPC64LE] Set up powerpc.powerpc64le architecture
This is the initial set up for PowerPC64LE.
The current plan is for this arch to remain experimental for FreeBSD 13.
This started as a weekend learning project for me and kinda snowballed from
there.
(More to follow momentarily.)
Reviewed by: imp (earlier version), emaste
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D26399
Added:
head/sys/conf/ldscript.powerpc64le (contents, props changed)
Modified:
head/Makefile
head/Makefile.inc1
head/share/mk/bsd.cpu.mk
head/share/mk/bsd.endian.mk
head/share/mk/local.meta.sys.mk
head/share/mk/src.opts.mk
head/share/mk/sys.mk
head/stand/defs.mk
head/sys/conf/files.powerpc
head/sys/conf/kern.mk
head/sys/conf/options.powerpc
head/sys/modules/Makefile
head/sys/powerpc/include/param.h
Modified: head/Makefile
==
--- head/Makefile Tue Sep 22 23:39:14 2020(r366031)
+++ head/Makefile Tue Sep 22 23:49:30 2020(r366032)
@@ -500,7 +500,7 @@ worlds: .PHONY
EXTRA_ARCHES_mips= mipsel mipshf mipselhf mips64el mips64hf mips64elhf
EXTRA_ARCHES_mips+=mipsn32
# powerpcspe excluded from main list until clang fixed
-EXTRA_ARCHES_powerpc= powerpcspe
+EXTRA_ARCHES_powerpc= powerpcspe powerpc64le
.endif
TARGETS?=amd64 arm arm64 i386 mips powerpc riscv
_UNIVERSE_TARGETS= ${TARGETS}
Modified: head/Makefile.inc1
==
--- head/Makefile.inc1 Tue Sep 22 23:39:14 2020(r366031)
+++ head/Makefile.inc1 Tue Sep 22 23:49:30 2020(r366032)
@@ -152,6 +152,7 @@ KNOWN_ARCHES?= aarch64/arm64 \
mips64hf/mips \
powerpc \
powerpc64/powerpc \
+ powerpc64le/powerpc \
powerpcspe/powerpc \
riscv64/riscv \
riscv64sf/riscv
Modified: head/share/mk/bsd.cpu.mk
==
--- head/share/mk/bsd.cpu.mkTue Sep 22 23:39:14 2020(r366031)
+++ head/share/mk/bsd.cpu.mkTue Sep 22 23:49:30 2020(r366032)
@@ -128,7 +128,7 @@ _CPUCFLAGS = -Wa,-me500 -msoft-float
. else
_CPUCFLAGS = -mcpu=${CPUTYPE} -mno-powerpc64
. endif
-. elif ${MACHINE_ARCH} == "powerpc64"
+. elif ${MACHINE_ARCH:Mpowerpc64*} != ""
_CPUCFLAGS = -mcpu=${CPUTYPE}
. elif ${MACHINE_CPUARCH} == "mips"
# mips[1234], mips32, mips64, and all later releases need to have mips
Modified: head/share/mk/bsd.endian.mk
==
--- head/share/mk/bsd.endian.mk Tue Sep 22 23:39:14 2020(r366031)
+++ head/share/mk/bsd.endian.mk Tue Sep 22 23:49:30 2020(r366032)
@@ -4,6 +4,7 @@
${MACHINE_ARCH} == "amd64" || \
${MACHINE_ARCH} == "i386" || \
(${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} == "") || \
+${MACHINE_ARCH} == "powerpc64le" || \
${MACHINE_CPUARCH} == "riscv" || \
${MACHINE_ARCH:Mmips*el*} != ""
TARGET_ENDIANNESS= 1234
Modified: head/share/mk/local.meta.sys.mk
==
--- head/share/mk/local.meta.sys.mk Tue Sep 22 23:39:14 2020
(r366031)
+++ head/share/mk/local.meta.sys.mk Tue Sep 22 23:49:30 2020
(r366032)
@@ -17,7 +17,7 @@ MK_INSTALL_AS_USER= yes
TARGET_ARCHES_arm?= arm armv6 armv7
TARGET_ARCHES_arm64?= aarch64
TARGET_ARCHES_mips?=mipsel mips mips64el mips64 mipsn32 mipsn32el
-TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpcspe
+TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpc64le powerpcspe
TARGET_ARCHES_riscv?= riscv64 riscv64sf
# some corner cases
Modified: head/share/mk/src.opts.mk
==
--- head/share/mk/src.opts.mk Tue Sep 22 23:39:14 2020(r366031)
+++ head/share/mk/src.opts.mk Tue Sep 22 23:49:30 2020(r366032)
@@ -354,14 +354,14 @@ BROKEN_OPTIONS+=MLX5TOOL
BROKEN_OPTIONS+=HYPERV
.endif
-# NVME is only aarch64, x86 and powerpc64
+# NVME is only aarch64, x86 and powerpc64*
.if ${__T} != "aarch64" && ${__T} != "amd64" && ${__T} != "i386" && \
-${__T} != "powerpc64"
+${__T:Mpowerpc64*} == ""
BROKEN_OPTIONS+=NVME
.endif
.if ${__T} == "aarch64" || ${__T} == "amd64" || ${__T} == "i386" || \
-${__T} == "powerpc64"
+${__T:Mpowerpc64*} != ""
__DEFAULT_YES_OPTIONS+=OPENMP
.else
__DEFAULT_NO_OPTIONS+=OPENMP
Modified: head/share/mk/sys.mk
==
--- head/share/mk/sys.mkTue Sep 22 23:39:14 2020(r366031)
+++ head/share/mk/sys.mk
svn commit: r366029 - head/stand/ficl
Author: bdragon Date: Tue Sep 22 23:27:09 2020 New Revision: 366029 URL: https://svnweb.freebsd.org/changeset/base/366029 Log: Tweak ficl definition from r365724 I had overthought how to do the FICL_TRUE change. We do not need to explicitly specify how big the 0 is before the cast to the correct size. The same change was suggested by both imp@ and Gunther Nikl independently. Tested on powerpc. Reported by: imp, Gunther Nikl Modified: head/stand/ficl/ficl.h Modified: head/stand/ficl/ficl.h == --- head/stand/ficl/ficl.h Tue Sep 22 23:13:29 2020(r366028) +++ head/stand/ficl/ficl.h Tue Sep 22 23:27:09 2020(r366029) @@ -249,7 +249,7 @@ typedef struct ficl_system_info FICL_SYSTEM_INFO; ** complement of false... that unifies logical and bitwise operations ** nicely. */ -#define FICL_TRUE ((FICL_UNS)~(0LL)) +#define FICL_TRUE (~(FICL_UNS)0) #define FICL_FALSE (0) #define FICL_BOOL(x) ((x) ? FICL_TRUE : FICL_FALSE) ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r365724 - in head/stand: ficl ficl/powerpc powerpc/ofw
Yeah, I will be changing it, that exact fix is in my local tree and I will commit it after the next round of tests. > This looks strange. The define should be written as (~(FICL_UNS)0). > The size suffix is superfluous if the value is casted anyway. -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r365770 - head/sys/powerpc/powerpc
Author: bdragon
Date: Tue Sep 15 20:47:33 2020
New Revision: 365770
URL: https://svnweb.freebsd.org/changeset/base/365770
Log:
[PowerPC64LE] Use correct in_masks table on LE to fix checksumming
Due to a check that should have been an endian check being an #if 0,
the wrong checksum mask table was being used on LE, which was causing
extreme strangeness in DNS resolution -- *some* hosts would be resolvable,
but most would not.
This fixes DNS resolution.
(I am committing some parts of the LE patchset ahead of time to reduce the
amount of work I have to do while committing the main patchset.)
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/in_cksum.c
Modified: head/sys/powerpc/powerpc/in_cksum.c
==
--- head/sys/powerpc/powerpc/in_cksum.c Tue Sep 15 20:26:31 2020
(r365769)
+++ head/sys/powerpc/powerpc/in_cksum.c Tue Sep 15 20:47:33 2020
(r365770)
@@ -42,6 +42,7 @@
#include /* RCS ID & Copyright macro defns */
+#include
#include
#include
#include
@@ -73,7 +74,7 @@
}
static const u_int32_t in_masks[] = {
-#if 0
+#if _BYTE_ORDER == _LITTLE_ENDIAN
/*0 bytes*/ /*1 byte*/ /*2 bytes*/ /*3 bytes*/
0x, 0x00FF, 0x, 0x00FF, /* offset 0 */
0x, 0xFF00, 0x0000, 0xFF00, /* offset 1 */
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svn commit: r365768 - head/sys/powerpc/aim
Author: bdragon
Date: Tue Sep 15 20:25:38 2020
New Revision: 365768
URL: https://svnweb.freebsd.org/changeset/base/365768
Log:
[PowerPC64LE] Set up the powernv partition table correctly.
The partition table is always big endian.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/moea64_native.c
Modified: head/sys/powerpc/aim/moea64_native.c
==
--- head/sys/powerpc/aim/moea64_native.cTue Sep 15 20:25:30 2020
(r365767)
+++ head/sys/powerpc/aim/moea64_native.cTue Sep 15 20:25:38 2020
(r365768)
@@ -556,9 +556,9 @@ moea64_bootstrap_native(vm_offset_t kernelstart, vm_of
sizeof(struct lpteg));
if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) {
bzero(__DEVOLATILE(void *, moea64_part_table), PART_SIZE);
- moea64_part_table[0].pagetab =
+ moea64_part_table[0].pagetab = htobe64(
(DMAP_TO_PHYS((vm_offset_t)moea64_pteg_table)) |
- (uintptr_t)(flsl((moea64_pteg_count - 1) >> 11));
+ (uintptr_t)(flsl((moea64_pteg_count - 1) >> 11)));
}
ENABLE_TRANS(msr);
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svn commit: r365739 - in head: share/man/man5 share/mk stand tools/build/options
Author: bdragon
Date: Tue Sep 15 04:22:28 2020
New Revision: 365739
URL: https://svnweb.freebsd.org/changeset/base/365739
Log:
[PowerPC] Remove obsolete MK_LOADER_FORCE_LE
In D12421, the ability to compile stand/ in little-endian was added, with the
intention to extend loader.kboot to run in Petitboot.
However, no further work was done, as the kernel then gained self-execution
capabilities as Petitboot was taught to load FreeBSD kernels directly.
The FreeBSD installer on powerpc64 (on POWER8 and POWER9) uses
/boot/etc/kboot.conf instead of loader.
As this option does nothing but cause stand/ to be miscompiled and actively
causes confusion, remove it.
(I have a functioning petitboot loader in my local tree, however, it turned
out to be quite inconvient to use due to the current petitboot plugin design
so I put it on hold.)
Reviewed by: emaste, imp, jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D26430
Deleted:
head/tools/build/options/WITH_LOADER_FORCE_LE
Modified:
head/share/man/man5/src.conf.5
head/share/mk/src.opts.mk
head/stand/defs.mk
Modified: head/share/man/man5/src.conf.5
==
--- head/share/man/man5/src.conf.5 Tue Sep 15 00:22:30 2020
(r365738)
+++ head/share/man/man5/src.conf.5 Tue Sep 15 04:22:28 2020
(r365739)
@@ -1,6 +1,6 @@
.\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman.
.\" $FreeBSD$
-.Dd September 11, 2020
+.Dd September 14, 2020
.Dt SRC.CONF 5
.Os
.Sh NAME
@@ -983,9 +983,6 @@ with support for verification based on certificates ob
.It Va WITH_LOADER_FIREWIRE
Enable firewire support in /boot/loader on x86. This option is a nop
on all other platforms.
-.It Va WITH_LOADER_FORCE_LE
-Set to force the powerpc boot loader to launch the kernel in little
-endian mode.
.It Va WITHOUT_LOADER_GELI
Disable inclusion of GELI crypto support in the boot chain binaries.
.Pp
Modified: head/share/mk/src.opts.mk
==
--- head/share/mk/src.opts.mk Tue Sep 15 00:22:30 2020(r365738)
+++ head/share/mk/src.opts.mk Tue Sep 15 04:22:28 2020(r365739)
@@ -211,7 +211,6 @@ __DEFAULT_NO_OPTIONS = \
HESIOD \
LIBSOFT \
LOADER_FIREWIRE \
-LOADER_FORCE_LE \
LOADER_VERBOSE \
LOADER_VERIEXEC_PASS_MANIFEST \
MALLOC_PRODUCTION \
Modified: head/stand/defs.mk
==
--- head/stand/defs.mk Tue Sep 15 00:22:30 2020(r365738)
+++ head/stand/defs.mk Tue Sep 15 04:22:28 2020(r365739)
@@ -175,12 +175,6 @@ DD=dd ${DD_NOSTATUS}
CFLAGS+= -G0 -fno-pic -mno-abicalls
.endif
-.if ${MK_LOADER_FORCE_LE} != "no"
-.if ${MACHINE_ARCH} == "powerpc64"
-CFLAGS+= -mlittle-endian
-.endif
-.endif
-
#
# Have a sensible default
#
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svn commit: r365724 - in head/stand: ficl ficl/powerpc powerpc/ofw
Author: bdragon
Date: Mon Sep 14 15:48:30 2020
New Revision: 365724
URL: https://svnweb.freebsd.org/changeset/base/365724
Log:
stand/ficl 64-bit compatibility
Currently, the only thing that prevents a functioning 64-bit FICL build is
a few integer types that were intended to be fixed-width.
Changing them to C99 integer types allows building a functioning 64-bit
FICL.
While this isn't applicable to the default settings of any in-tree loaders,
it is necessary for a future Petitboot loader, due to the requirement that
it be compiled as a 64-bit program.
Reviewed by: tsoome, imp (earlier revision)
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D26364
Modified:
head/stand/ficl/ficl.h
head/stand/ficl/powerpc/sysdep.h
head/stand/powerpc/ofw/main.c
Modified: head/stand/ficl/ficl.h
==
--- head/stand/ficl/ficl.h Mon Sep 14 15:20:37 2020(r365723)
+++ head/stand/ficl/ficl.h Mon Sep 14 15:48:30 2020(r365724)
@@ -249,7 +249,7 @@ typedef struct ficl_system_info FICL_SYSTEM_INFO;
** complement of false... that unifies logical and bitwise operations
** nicely.
*/
-#define FICL_TRUE ((unsigned long)~(0L))
+#define FICL_TRUE ((FICL_UNS)~(0LL))
#define FICL_FALSE (0)
#define FICL_BOOL(x) ((x) ? FICL_TRUE : FICL_FALSE)
Modified: head/stand/ficl/powerpc/sysdep.h
==
--- head/stand/ficl/powerpc/sysdep.hMon Sep 14 15:20:37 2020
(r365723)
+++ head/stand/ficl/powerpc/sysdep.hMon Sep 14 15:48:30 2020
(r365724)
@@ -79,15 +79,15 @@
** System dependent data type declarations...
*/
#if !defined INT32
-#define INT32 int
+#define INT32 int32_t
#endif
#if !defined UNS32
-#define UNS32 unsigned int
+#define UNS32 uint32_t
#endif
#if !defined UNS16
-#define UNS16 unsigned short
+#define UNS16 uint16_t
#endif
#if !defined UNS8
@@ -367,6 +367,9 @@ typedef struct
*/
#if !defined FICL_ALIGN
#define FICL_ALIGN 2
+#endif
+
+#if !defined FICL_ALIGN_ADD
#define FICL_ALIGN_ADD ((1 << FICL_ALIGN) - 1)
#endif
Modified: head/stand/powerpc/ofw/main.c
==
--- head/stand/powerpc/ofw/main.c Mon Sep 14 15:20:37 2020
(r365723)
+++ head/stand/powerpc/ofw/main.c Mon Sep 14 15:48:30 2020
(r365724)
@@ -63,7 +63,7 @@ init_heap(void)
{
bzero(heap, HEAP_SIZE);
- setheap(heap, (void *)((int)heap + HEAP_SIZE));
+ setheap(heap, (void *)((uintptr_t)heap + HEAP_SIZE));
}
uint64_t
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svn commit: r365723 - head/sys/powerpc/powerpc
Author: bdragon
Date: Mon Sep 14 15:20:37 2020
New Revision: 365723
URL: https://svnweb.freebsd.org/changeset/base/365723
Log:
[PowerPC] Make cpu frequency detection endian-independent
On ibm,extended-clock-frequency, ensure we be64toh() the value.
On clock-frequency, remove the right-shifting hack (which was needed due to
reading a 32 bit value into a 64 bit variable) and switch to OF_getencprop()
for reading (which will handle endian conversion internally.)
Reviewed by: jhibbits (in irc)
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/cpu.c
Modified: head/sys/powerpc/powerpc/cpu.c
==
--- head/sys/powerpc/powerpc/cpu.c Mon Sep 14 14:53:09 2020
(r365722)
+++ head/sys/powerpc/powerpc/cpu.c Mon Sep 14 15:20:37 2020
(r365723)
@@ -72,6 +72,7 @@
#include
#include
#include
+#include
#include
#include
@@ -358,6 +359,7 @@ cpu_est_clockrate(int cpu_id, uint64_t *cps)
uint16_tvers;
register_t msr;
phandle_t cpu, dev, root;
+ uint32_tfreq32;
int res = 0;
charbuf[8];
@@ -428,10 +430,11 @@ cpu_est_clockrate(int cpu_id, uint64_t *cps)
return (ENOENT);
if (OF_getprop(cpu, "ibm,extended-clock-frequency",
cps, sizeof(*cps)) >= 0) {
+ *cps = be64toh(*cps);
return (0);
- } else if (OF_getprop(cpu, "clock-frequency", cps,
- sizeof(cell_t)) >= 0) {
- *cps >>= 32;
+ } else if (OF_getencprop(cpu, "clock-frequency",
+ , sizeof(freq32)) >= 0) {
+ *cps = freq32;
return (0);
} else {
return (ENOENT);
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svn commit: r365699 - head/sys/powerpc/powerpc
Author: bdragon
Date: Sun Sep 13 21:34:32 2020
New Revision: 365699
URL: https://svnweb.freebsd.org/changeset/base/365699
Log:
[PowerPC] bus_space cleanup part 2: Convert to c99 initializers.
To make it easier to work with this in the future, convert to c99
designated initializer syntax.
Tested on powerpc, powerpc64, and powerpc64le. No functional change.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/bus_machdep.c
Modified: head/sys/powerpc/powerpc/bus_machdep.c
==
--- head/sys/powerpc/powerpc/bus_machdep.c Sun Sep 13 21:27:30 2020
(r365698)
+++ head/sys/powerpc/powerpc/bus_machdep.c Sun Sep 13 21:34:32 2020
(r365699)
@@ -796,96 +796,115 @@ struct bus_space bs_le_tag = {
struct bus_space bs_be_tag = {
#endif
/* mapping/unmapping */
- bs_gen_map,
- bs_gen_unmap,
- bs_gen_subregion,
+ .bs_map = bs_gen_map,
+ .bs_unmap = bs_gen_unmap,
+ .bs_subregion = bs_gen_subregion,
/* allocation/deallocation */
- bs_gen_alloc,
- bs_gen_free,
+ .bs_alloc = bs_gen_alloc,
+ .bs_free = bs_gen_free,
/* barrier */
- bs_gen_barrier,
+ .bs_barrier = bs_gen_barrier,
/* read (single) */
- native_bs_rs_1,
- native_bs_rs_2,
- native_bs_rs_4,
- native_bs_rs_8,
+ .bs_r_1 = native_bs_rs_1,
+ .bs_r_2 = native_bs_rs_2,
+ .bs_r_4 = native_bs_rs_4,
+ .bs_r_8 = native_bs_rs_8,
- native_bs_rs_2,
- native_bs_rs_4,
- native_bs_rs_8,
+ /* read (single) stream */
+ .bs_r_s_2 = native_bs_rs_2,
+ .bs_r_s_4 = native_bs_rs_4,
+ .bs_r_s_8 = native_bs_rs_8,
/* read multiple */
- native_bs_rm_1,
- native_bs_rm_2,
- native_bs_rm_4,
- native_bs_rm_8,
+ .bs_rm_1 = native_bs_rm_1,
+ .bs_rm_2 = native_bs_rm_2,
+ .bs_rm_4 = native_bs_rm_4,
+ .bs_rm_8 = native_bs_rm_8,
- native_bs_rm_2,
- native_bs_rm_4,
- native_bs_rm_8,
+ /* read multiple stream */
+ .bs_rm_s_2 =native_bs_rm_2,
+ .bs_rm_s_4 =native_bs_rm_4,
+ .bs_rm_s_8 =native_bs_rm_8,
/* read region */
- native_bs_rr_1,
- native_bs_rr_2,
- native_bs_rr_4,
- native_bs_rr_8,
+ .bs_rr_1 = native_bs_rr_1,
+ .bs_rr_2 = native_bs_rr_2,
+ .bs_rr_4 = native_bs_rr_4,
+ .bs_rr_8 = native_bs_rr_8,
- native_bs_rr_2,
- native_bs_rr_4,
- native_bs_rr_8,
+ /* read region stream */
+ .bs_rr_s_2 =native_bs_rr_2,
+ .bs_rr_s_4 =native_bs_rr_4,
+ .bs_rr_s_8 =native_bs_rr_8,
/* write (single) */
- native_bs_ws_1,
- native_bs_ws_2,
- native_bs_ws_4,
- native_bs_ws_8,
+ .bs_w_1 = native_bs_ws_1,
+ .bs_w_2 = native_bs_ws_2,
+ .bs_w_4 = native_bs_ws_4,
+ .bs_w_8 = native_bs_ws_8,
- native_bs_ws_2,
- native_bs_ws_4,
- native_bs_ws_8,
+ /* write (single) stream */
+ .bs_w_s_2 = native_bs_ws_2,
+ .bs_w_s_4 = native_bs_ws_4,
+ .bs_w_s_8 = native_bs_ws_8,
/* write multiple */
- native_bs_wm_1,
- native_bs_wm_2,
- native_bs_wm_4,
- native_bs_wm_8,
+ .bs_wm_1 = native_bs_wm_1,
+ .bs_wm_2 = native_bs_wm_2,
+ .bs_wm_4 = native_bs_wm_4,
+ .bs_wm_8 = native_bs_wm_8,
- native_bs_wm_2,
- native_bs_wm_4,
- native_bs_wm_8,
+ /* write multiple stream */
+ .bs_wm_s_2 =native_bs_wm_2,
+ .bs_wm_s_4 =native_bs_wm_4,
+ .bs_wm_s_8 =native_bs_wm_8,
/* write region */
- native_bs_wr_1,
- native_bs_wr_2,
- native_bs_wr_4,
- native_bs_wr_8,
+ .bs_wr_1 = native_bs_wr_1,
+ .bs_wr_2 = native_bs_wr_2,
+ .bs_wr_4 = native_bs_wr_4,
+ .bs_wr_8 = native_bs_wr_8,
- native_bs_wr_2,
- native_bs_wr_4,
- native_bs_wr_8,
+ /* write region stream */
+ .bs_wr_s_2 =native_bs_wr_2,
+ .bs_wr_s_4 =native_bs_wr_4,
+ .bs_wr_s_8 =native_bs_wr_8,
/* set multiple */
- native_bs_sm_1,
- native_bs_sm_2,
- native_bs_sm_4,
- native_bs_sm_8,
+ .bs_sm_1 = native_bs_sm_1,
+ .bs_sm_2 = native_bs_sm_2,
+ .bs_sm_4 = native_bs_sm_4,
+ .bs_sm_8 = native_bs_sm_8,
- native_bs_sm_2,
- native_bs_sm_4,
- native_bs_sm_8,
+ /* set multiple stream */
+ .bs_sm_s_2 =native_bs_sm_2,
+ .bs_sm_s_4 =native_bs_sm_4,
+ .bs_sm_s_8 =native_bs_sm_8,
/* set region */
- native_bs_sr_1,
-
svn commit: r365698 - head/sys/powerpc/powerpc
Author: bdragon
Date: Sun Sep 13 21:27:30 2020
New Revision: 365698
URL: https://svnweb.freebsd.org/changeset/base/365698
Log:
[PowerPC] bus_space cleanup part 1 - rename bs_be / bs_le functions
The intention of the bus_be naming was for those to be the no-endian-swapping
and for the bus_le to be endian-swapping in all the functions.
This naming breaks down when we're actually are running in LE and need to
use the opposite sense.
As such, rename bs_be_* to native_bs_* and rename bs_le_* to swapped_bs_*.
No functional change.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/bus_machdep.c
Modified: head/sys/powerpc/powerpc/bus_machdep.c
==
--- head/sys/powerpc/powerpc/bus_machdep.c Sun Sep 13 21:22:39 2020
(r365697)
+++ head/sys/powerpc/powerpc/bus_machdep.c Sun Sep 13 21:27:30 2020
(r365698)
@@ -178,10 +178,10 @@ bs_gen_barrier(bus_space_handle_t bsh __unused, bus_si
}
/*
- * Big-endian access functions
+ * Native-endian access functions
*/
static uint8_t
-bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
+native_bs_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
{
volatile uint8_t *addr;
uint8_t res;
@@ -194,7 +194,7 @@ bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
}
static uint16_t
-bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
+native_bs_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
{
volatile uint16_t *addr;
uint16_t res;
@@ -207,7 +207,7 @@ bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
}
static uint32_t
-bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
+native_bs_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
{
volatile uint32_t *addr;
uint32_t res;
@@ -220,7 +220,7 @@ bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
}
static uint64_t
-bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
+native_bs_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
{
volatile uint64_t *addr;
uint64_t res;
@@ -232,31 +232,31 @@ bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
}
static void
-bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
+native_bs_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t
cnt)
{
ins8(__ppc_ba(bsh, ofs), addr, cnt);
}
static void
-bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
+native_bs_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t
cnt)
{
ins16(__ppc_ba(bsh, ofs), addr, cnt);
}
static void
-bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
+native_bs_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t
cnt)
{
ins32(__ppc_ba(bsh, ofs), addr, cnt);
}
static void
-bs_be_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
+native_bs_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t
cnt)
{
ins64(__ppc_ba(bsh, ofs), addr, cnt);
}
static void
-bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
+native_bs_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t
cnt)
{
volatile uint8_t *s = __ppc_ba(bsh, ofs);
@@ -266,7 +266,7 @@ bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uin
}
static void
-bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
+native_bs_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t
cnt)
{
volatile uint16_t *s = __ppc_ba(bsh, ofs);
@@ -276,7 +276,7 @@ bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uin
}
static void
-bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
+native_bs_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t
cnt)
{
volatile uint32_t *s = __ppc_ba(bsh, ofs);
@@ -286,7 +286,7 @@ bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uin
}
static void
-bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
+native_bs_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t
cnt)
{
volatile uint64_t *s = __ppc_ba(bsh, ofs);
@@ -296,7 +296,7 @@ bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uin
}
static void
-bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
+native_bs_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
{
volatile uint8_t *addr;
@@ -307,7 +307,7 @@ bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uin
}
static void
-bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
+native_bs_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
{
volatile uint16_t *addr;
@@ -318,7 +318,7 @@ bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uin
}
static void
-bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
+native_bs_ws_4(bus_space_handle_t bsh, bus_size_t ofs,
svn commit: r365697 - head/sys/powerpc/powerpc
Author: bdragon
Date: Sun Sep 13 21:22:39 2020
New Revision: 365697
URL: https://svnweb.freebsd.org/changeset/base/365697
Log:
[PowerPC64LE] Bus space prep for LE
Swap the BE and LE bus_space tags when on LE, and adjust the nexus tag
to match.
This is prep for a a followup that makes the powerpc bus_space macros easier
to maintain in the future.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/bus_machdep.c
head/sys/powerpc/powerpc/nexus.c
Modified: head/sys/powerpc/powerpc/bus_machdep.c
==
--- head/sys/powerpc/powerpc/bus_machdep.c Sun Sep 13 19:56:53 2020
(r365696)
+++ head/sys/powerpc/powerpc/bus_machdep.c Sun Sep 13 21:22:39 2020
(r365697)
@@ -790,7 +790,11 @@ bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uin
TODO;
}
+#if BYTE_ORDER == LITTLE_ENDIAN
+struct bus_space bs_le_tag = {
+#else
struct bus_space bs_be_tag = {
+#endif
/* mapping/unmapping */
bs_gen_map,
bs_gen_unmap,
@@ -884,7 +888,11 @@ struct bus_space bs_be_tag = {
bs_be_sr_8,
};
+#if BYTE_ORDER == LITTLE_ENDIAN
+struct bus_space bs_be_tag = {
+#else
struct bus_space bs_le_tag = {
+#endif
/* mapping/unmapping */
bs_gen_map,
bs_gen_unmap,
Modified: head/sys/powerpc/powerpc/nexus.c
==
--- head/sys/powerpc/powerpc/nexus.cSun Sep 13 19:56:53 2020
(r365696)
+++ head/sys/powerpc/powerpc/nexus.cSun Sep 13 21:22:39 2020
(r365697)
@@ -35,6 +35,7 @@
#include
__FBSDID("$FreeBSD$");
+#include
#include
#include
#include
@@ -173,7 +174,11 @@ static bus_space_tag_t
nexus_get_bus_tag(device_t bus __unused, device_t child __unused)
{
+#if BYTE_ORDER == LITTLE_ENDIAN
+ return(_le_tag);
+#else
return(_be_tag);
+#endif
}
static int
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svn commit: r365694 - in head: include sys/modules
Author: bdragon
Date: Sun Sep 13 18:24:15 2020
New Revision: 365694
URL: https://svnweb.freebsd.org/changeset/base/365694
Log:
[PowerPC64LE] Ensure nvram is built on powerpc64le.
Fix some cases where conditionals that were trying to exclude powerpcspe
were also excluding powerpc64le.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/include/Makefile
head/sys/modules/Makefile
Modified: head/include/Makefile
==
--- head/include/Makefile Sun Sep 13 17:36:43 2020(r365693)
+++ head/include/Makefile Sun Sep 13 18:24:15 2020(r365694)
@@ -93,7 +93,7 @@ INCS+=iconv.h
LSUBDIRS+= dev/usb
.endif
-.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpc64"
+.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} != "powerpcspe"
_dev_powermac_nvram= dev/powermac_nvram
.endif
Modified: head/sys/modules/Makefile
==
--- head/sys/modules/Makefile Sun Sep 13 17:36:43 2020(r365693)
+++ head/sys/modules/Makefile Sun Sep 13 18:24:15 2020(r365694)
@@ -784,7 +784,7 @@ _ipmi= ipmi
_ixl= ixl
_nvram=opal_nvram
.endif
-.if ${MACHINE_ARCH} == "powerpc64" || ${MACHINE_ARCH} == "powerpc"
+.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} != "powerpcspe"
# Don't build powermac_nvram for powerpcspe, it's never supported.
_nvram+= powermac_nvram
.endif
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svn commit: r365693 - head/sys/powerpc/include
Author: bdragon Date: Sun Sep 13 17:36:43 2020 New Revision: 365693 URL: https://svnweb.freebsd.org/changeset/base/365693 Log: [PowerPC64LE] Adjust ELF definitions for LE. Set ELF_TARG_DATA correctly on PowerPC64LE. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/include/elf.h Modified: head/sys/powerpc/include/elf.h == --- head/sys/powerpc/include/elf.h Sun Sep 13 17:13:32 2020 (r365692) +++ head/sys/powerpc/include/elf.h Sun Sep 13 17:36:43 2020 (r365693) @@ -100,14 +100,17 @@ __ElfType(Auxinfo); #defineR_PPC_EMB_COUNT (R_PPC_EMB_RELSDA - R_PPC_EMB_NADDR32 + 1) /* Define "machine" characteristics */ +#if BYTE_ORDER == LITTLE_ENDIAN +#defineELF_TARG_DATA ELFDATA2LSB +#else +#defineELF_TARG_DATA ELFDATA2MSB +#endif #if __ELF_WORD_SIZE == 64 #defineELF_TARG_CLASS ELFCLASS64 -#defineELF_TARG_DATA ELFDATA2MSB #defineELF_TARG_MACH EM_PPC64 #defineELF_TARG_VER1 #else #defineELF_TARG_CLASS ELFCLASS32 -#defineELF_TARG_DATA ELFDATA2MSB #defineELF_TARG_MACH EM_PPC #defineELF_TARG_VER1 #endif ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r365691 - head/sys/powerpc/aim
Author: bdragon
Date: Sun Sep 13 16:46:03 2020
New Revision: 365691
URL: https://svnweb.freebsd.org/changeset/base/365691
Log:
[PowerPC] Implement pmap_mincore() for moea
Do the same as previous for moea.
Tested on G4.
Modified:
head/sys/powerpc/aim/mmu_oea.c
Modified: head/sys/powerpc/aim/mmu_oea.c
==
--- head/sys/powerpc/aim/mmu_oea.c Sun Sep 13 16:42:49 2020
(r365690)
+++ head/sys/powerpc/aim/mmu_oea.c Sun Sep 13 16:46:03 2020
(r365691)
@@ -114,6 +114,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -126,6 +127,7 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
#include
#include
#include
@@ -291,6 +293,7 @@ boolean_t moea_is_prefaultable(pmap_t, vm_offset_t);
boolean_t moea_is_referenced(vm_page_t);
int moea_ts_referenced(vm_page_t);
vm_offset_t moea_map(vm_offset_t *, vm_paddr_t, vm_paddr_t, int);
+static int moea_mincore(pmap_t, vm_offset_t, vm_paddr_t *);
boolean_t moea_page_exists_quick(pmap_t, vm_page_t);
void moea_page_init(vm_page_t);
int moea_page_wired_mappings(vm_page_t);
@@ -354,7 +357,8 @@ static struct pmap_funcs moea_methods = {
.qremove = moea_qremove,
.release = moea_release,
.remove = moea_remove,
- .remove_all = moea_remove_all,
+ .remove_all = moea_remove_all,
+ .mincore = moea_mincore,
.remove_write = moea_remove_write,
.sync_icache = moea_sync_icache,
.unwire = moea_unwire,
@@ -1924,6 +1928,50 @@ moea_remove_all(vm_page_t m)
}
vm_page_aflag_clear(m, PGA_WRITEABLE);
rw_wunlock(_global_lock);
+}
+
+static int
+moea_mincore(pmap_t pm, vm_offset_t va, vm_paddr_t *pap)
+{
+ struct pvo_entry *pvo;
+ vm_paddr_t pa;
+ vm_page_t m;
+ int val;
+ bool managed;
+
+ PMAP_LOCK(pm);
+
+ pvo = moea_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
+ if (pvo != NULL) {
+ pa = PVO_PADDR(pvo);
+ m = PHYS_TO_VM_PAGE(pa);
+ managed = (pvo->pvo_vaddr & PVO_MANAGED) == PVO_MANAGED;
+ val = MINCORE_INCORE;
+ } else {
+ PMAP_UNLOCK(pm);
+ return (0);
+ }
+
+ PMAP_UNLOCK(pm);
+
+ if (m == NULL)
+ return (0);
+
+ if (managed) {
+ if (moea_is_modified(m))
+ val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
+
+ if (moea_is_referenced(m))
+ val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
+ }
+
+ if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
+ (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
+ managed) {
+ *pap = pa;
+ }
+
+ return (val);
}
/*
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svn commit: r365690 - head/sys/powerpc/aim
Author: bdragon
Date: Sun Sep 13 16:42:49 2020
New Revision: 365690
URL: https://svnweb.freebsd.org/changeset/base/365690
Log:
[PowerPC64] Implement pmap_mincore() for moea64
Implement pmap_mincore() for moea64.
This will need some slight tweaks when large page support in HPT lands.
Submitted by: Fernando Eckhardt Valle
Reviewed by: bdragon
Differential Revision:https://reviews.freebsd.org/D26314
Modified:
head/sys/powerpc/aim/mmu_oea64.c
Modified: head/sys/powerpc/aim/mmu_oea64.c
==
--- head/sys/powerpc/aim/mmu_oea64.cSun Sep 13 16:28:25 2020
(r365689)
+++ head/sys/powerpc/aim/mmu_oea64.cSun Sep 13 16:42:49 2020
(r365690)
@@ -57,6 +57,7 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
#include
@@ -72,6 +73,7 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
#include
#include
#include
@@ -315,6 +317,7 @@ static void *moea64_dump_pmap_init(unsigned blkpgs);
#ifdef __powerpc64__
static void moea64_page_array_startup(long);
#endif
+static int moea64_mincore(pmap_t, vm_offset_t, vm_paddr_t *);
static struct pmap_funcs moea64_methods = {
.clear_modify = moea64_clear_modify,
@@ -331,6 +334,7 @@ static struct pmap_funcs moea64_methods = {
.is_referenced = moea64_is_referenced,
.ts_referenced = moea64_ts_referenced,
.map = moea64_map,
+ .mincore = moea64_mincore,
.page_exists_quick = moea64_page_exists_quick,
.page_init = moea64_page_init,
.page_wired_mappings = moea64_page_wired_mappings,
@@ -1219,6 +1223,51 @@ moea64_unwire(pmap_t pm, vm_offset_t sva, vm_offset_t
pm->pm_stats.wired_count--;
}
PMAP_UNLOCK(pm);
+}
+
+static int
+moea64_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap)
+{
+ struct pvo_entry *pvo;
+ vm_paddr_t pa;
+ vm_page_t m;
+ int val;
+ bool managed;
+
+ PMAP_LOCK(pmap);
+
+ /* XXX Add support for superpages */
+ pvo = moea64_pvo_find_va(pmap, addr);
+ if (pvo != NULL) {
+ pa = PVO_PADDR(pvo);
+ m = PHYS_TO_VM_PAGE(pa);
+ managed = (pvo->pvo_vaddr & PVO_MANAGED) == PVO_MANAGED;
+ val = MINCORE_INCORE;
+ } else {
+ PMAP_UNLOCK(pmap);
+ return (0);
+ }
+
+ PMAP_UNLOCK(pmap);
+
+ if (m == NULL)
+ return (0);
+
+ if (managed) {
+ if (moea64_is_modified(m))
+ val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
+
+ if (moea64_is_referenced(m))
+ val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
+ }
+
+ if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
+ (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
+ managed) {
+ *pap = pa;
+ }
+
+ return (val);
}
/*
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svn commit: r365678 - head/sys/powerpc/aim
Author: bdragon
Date: Sat Sep 12 23:54:57 2020
New Revision: 365678
URL: https://svnweb.freebsd.org/changeset/base/365678
Log:
[PowerPC] Add PVO_PADDR macro to mmu_oea.c to match mmu_oea64.c changes
Use a PVO_PADDR macro on 32 bit as well, to reduce the difference between
mmu_oea.c and mmu_oea64.c.
Equivilent to the changes in r363222.
Modified:
head/sys/powerpc/aim/mmu_oea.c
Modified: head/sys/powerpc/aim/mmu_oea.c
==
--- head/sys/powerpc/aim/mmu_oea.c Sat Sep 12 23:49:43 2020
(r365677)
+++ head/sys/powerpc/aim/mmu_oea.c Sat Sep 12 23:54:57 2020
(r365678)
@@ -157,6 +157,9 @@ __FBSDID("$FreeBSD$");
#defineVSID_TO_SR(vsid)((vsid) & 0xf)
#defineVSID_TO_HASH(vsid) (((vsid) >> 4) & 0xf)
+/* Get physical address from PVO. */
+#define PVO_PADDR(pvo) ((pvo)->pvo_pte.pte.pte_lo & PTE_RPGN)
+
struct ofw_map {
vm_offset_t om_va;
vm_size_t om_len;
@@ -1265,7 +1268,7 @@ moea_extract(pmap_t pm, vm_offset_t va)
if (pvo == NULL)
pa = 0;
else
- pa = (pvo->pvo_pte.pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF);
+ pa = PVO_PADDR(pvo) | (va & ADDR_POFF);
PMAP_UNLOCK(pm);
return (pa);
}
@@ -1287,7 +1290,7 @@ moea_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_
if (pvo != NULL && (pvo->pvo_pte.pte.pte_hi & PTE_VALID) &&
((pvo->pvo_pte.pte.pte_lo & PTE_PP) == PTE_RW ||
(prot & VM_PROT_WRITE) == 0)) {
- m = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte.pte_lo & PTE_RPGN);
+ m = PHYS_TO_VM_PAGE(PVO_PADDR(pvo));
if (!vm_page_wire_mapped(m))
m = NULL;
}
@@ -1535,7 +1538,7 @@ moea_kextract(vm_offset_t va)
PMAP_LOCK(kernel_pmap);
pvo = moea_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL);
KASSERT(pvo != NULL, ("moea_kextract: no addr found"));
- pa = (pvo->pvo_pte.pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF);
+ pa = PVO_PADDR(pvo) | (va & ADDR_POFF);
PMAP_UNLOCK(kernel_pmap);
return (pa);
}
@@ -2001,7 +2004,7 @@ moea_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_
mtx_lock(_table_mutex);
LIST_FOREACH(pvo, _pvo_table[ptegidx], pvo_olink) {
if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) {
- if ((pvo->pvo_pte.pte.pte_lo & PTE_RPGN) == pa &&
+ if (PVO_PADDR(pvo) == pa &&
(pvo->pvo_pte.pte.pte_lo & PTE_PP) ==
(pte_lo & PTE_PP)) {
/*
@@ -2129,7 +2132,7 @@ moea_pvo_remove(struct pvo_entry *pvo, int pteidx)
if ((pvo->pvo_vaddr & PVO_MANAGED) == PVO_MANAGED) {
struct vm_page *pg;
- pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte.pte_lo & PTE_RPGN);
+ pg = PHYS_TO_VM_PAGE(PVO_PADDR(pvo));
if (pg != NULL) {
moea_attr_save(pg, pvo->pvo_pte.pte.pte_lo &
(PTE_REF | PTE_CHG));
@@ -2696,8 +2699,7 @@ moea_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t
len = MIN(lim - va, sz);
pvo = moea_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
if (pvo != NULL) {
- pa = (pvo->pvo_pte.pte.pte_lo & PTE_RPGN) |
- (va & ADDR_POFF);
+ pa = PVO_PADDR(pvo) | (va & ADDR_POFF);
moea_syncicache(pa, len);
}
va += len;
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svn commit: r365666 - head/contrib/llvm-project/clang/lib/Basic
Author: bdragon
Date: Sat Sep 12 18:23:27 2020
New Revision: 365666
URL: https://svnweb.freebsd.org/changeset/base/365666
Log:
[PowerPC64LE] Fix platform definitions for powerpc64le-*-freebsd*
Teach clang that powerpc64le-*-freebsd* is a valid triple.
This is already in upstream clang, but was too late for llvm 11.0.0.
Apply it directly for now, until it can be backported to llvm 11.0.1.
See upstream https://reviews.llvm.org/D73425 for details.
Reviewed by: dim (upstream version), emaste
Approved by: emaste
Differential Revision:https://reviews.freebsd.org/D26400
Modified:
head/contrib/llvm-project/clang/lib/Basic/Targets.cpp
Modified: head/contrib/llvm-project/clang/lib/Basic/Targets.cpp
==
--- head/contrib/llvm-project/clang/lib/Basic/Targets.cpp Sat Sep 12
17:24:04 2020(r365665)
+++ head/contrib/llvm-project/clang/lib/Basic/Targets.cpp Sat Sep 12
18:23:27 2020(r365666)
@@ -358,6 +358,8 @@ TargetInfo *AllocateTarget(const llvm::Triple ,
switch (os) {
case llvm::Triple::Linux:
return new LinuxTargetInfo(Triple, Opts);
+case llvm::Triple::FreeBSD:
+ return new FreeBSDTargetInfo(Triple, Opts);
case llvm::Triple::NetBSD:
return new NetBSDTargetInfo(Triple, Opts);
case llvm::Triple::OpenBSD:
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svn commit: r365607 - head/sys/powerpc/include
Author: bdragon Date: Thu Sep 10 18:41:15 2020 New Revision: 365607 URL: https://svnweb.freebsd.org/changeset/base/365607 Log: [PowerPC64LE] Add LOAD_LR_NIA and RETURN_TO_NATIVE_ENDIAN defines. * Add LOAD_LR_NIA define. This is preferred to "bl 1f; 1:" because it doesn't pollute the branch predictor. * Add magic sequence to return the CPU to the correct endianness after jumping to cross-endian code, similar to the sequence from Linux. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/include/asm.h Modified: head/sys/powerpc/include/asm.h == --- head/sys/powerpc/include/asm.h Thu Sep 10 18:27:52 2020 (r365606) +++ head/sys/powerpc/include/asm.h Thu Sep 10 18:41:15 2020 (r365607) @@ -194,6 +194,43 @@ name: \ #defineASENTRY_NOPROF(y) _ENTRY(ASMNAME(y)) #defineENTRY_NOPROF(y) _ENTRY(CNAME(y)) +/* Load NIA without affecting branch prediction */ +#defineLOAD_LR_NIA bcl 20, 31, .+4 + +/* + * Magic sequence to return to native endian. + * Overwrites r0 and r11. + * + * The encoding of the instruction "tdi 0, %r0, 0x48" in opposite endian + * happens to be "b . + 8". This is useful because we can write a sequence + * of instructions that can execute in either endian. + * + * Use a sequence of handcoded instructions that switches contexts to the + * instruction following the sequence, but with the correct PSL_LE bit. + * + * The same sequence works for both BE and LE because the xori will flip + * the bit to the other state, and the code only runs when running in the + * wrong endian. + * + * This sequence is NMI-reentrant. + */ +#defineRETURN_TO_NATIVE_ENDIAN \ + tdi 0, %r0, 0x48; /* Endian swapped: b . + 8 */\ + b 1f; /* Will fall through to here if correct */\ + .long 0xa600607d; /* mfmsr %r11 */\ + .long 0x0038; /* li %r0, 0*/\ + .long 0x6401617d; /* mtmsrd %r0, 1 (L=1 EE,RI bits only) */\ + .long 0x01006b69; /* xori %r11, %r11, 0x1 (PSL_LE)*/\ + .long 0xa602087c; /* mflr %r0 */\ + .long 0x05009f42; /* LOAD_LR_NIA */\ + .long 0xa6037b7d; /* 0: mtsrr1 %r11 */\ + .long 0xa602687d; /* mflr %r11*/\ + .long 0x18006b39; /* addi %r11, %r11, (1f - 0b) */\ + .long 0xa6037a7d; /* mtsrr0 %r11 */\ + .long 0xa603087c; /* mtlr %r0 */\ + .long 0x244c; /* rfid */\ +1: /* RETURN_TO_NATIVE_ENDIAN */ + #defineASMSTR .asciz #defineRCSID(x).text; .asciz x ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r365578 - head/stand/efi/loader/arch/arm64
You can truly get rid of it with /DISCARD/ and shave the bytes off entirely, by
the way.
On Thu, Sep 10, 2020, at 9:13 AM, Andrew Turner wrote:
> Author: andrew
> Date: Thu Sep 10 14:13:49 2020
> New Revision: 365578
> URL: https://svnweb.freebsd.org/changeset/base/365578
>
> Log:
> Ignore the .interp section in the arm64 EFI loader
>
> When building the loader an unneeded .interp section may be added. Move
> this to the unused section region so offsets of used sections don't
> change.
>
> Obtained from: CheriBSD
> Sponsored by: Innovate UK
>
> Modified:
> head/stand/efi/loader/arch/arm64/ldscript.arm64
>
> Modified: head/stand/efi/loader/arch/arm64/ldscript.arm64
> ==
> --- head/stand/efi/loader/arch/arm64/ldscript.arm64 Thu Sep 10 14:12:25
> 2020 (r365577)
> +++ head/stand/efi/loader/arch/arm64/ldscript.arm64 Thu Sep 10 14:13:49
> 2020 (r365578)
> @@ -80,6 +80,7 @@ SECTIONS
>_edata = .;
>
>/* Unused sections */
> + .interp: { *(.interp) }
> .dynstr: { *(.dynstr) }
>.hash : { *(.hash) }
> }
>
--
Brandon Bergren
bdra...@freebsd.org
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svn commit: r365548 - head/sys/powerpc/powernv
Author: bdragon
Date: Thu Sep 10 01:49:53 2020
New Revision: 365548
URL: https://svnweb.freebsd.org/changeset/base/365548
Log:
[PowerPC] Fix setting of time in OPAL
There were multiple bugs in the OPAL RTC code which had never been
discovered, as the default configuration of OPAL machines is to
have the BMC / FSP control the RTC.
* Fix calling convention for setting the time -- the variables are passed
directly in CPU registers, not via memory.
* Fix bug in the bcd encoding routines. (from jhibbits)
Tested on POWER9 Talos II (BE) and POWER9 Blackbird (LE).
Reviewed by: jhibbits (in irc)
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powernv/opal_dev.c
Modified: head/sys/powerpc/powernv/opal_dev.c
==
--- head/sys/powerpc/powernv/opal_dev.c Thu Sep 10 00:50:18 2020
(r365547)
+++ head/sys/powerpc/powernv/opal_dev.c Thu Sep 10 01:49:53 2020
(r365548)
@@ -256,15 +256,15 @@ bin2bcd32(int bin)
int tmp;
tmp = bin % 100;
- out += bin2bcd(tmp) * 1;
+ out += bin2bcd(tmp) * 0x1;
bin = bin / 100;
tmp = bin % 100;
- out += bin2bcd(tmp) * 100;
+ out += bin2bcd(tmp) * 0x100;
bin = bin / 100;
tmp = bin % 100;
- out += bin2bcd(tmp) * 1;
+ out += bin2bcd(tmp) * 0x1;
return (out);
}
@@ -297,7 +297,7 @@ opal_gettime(device_t dev, struct timespec *ts)
ct.day = bcd2bin((ymd & 0x00ff) >> 0);
ct.mon = bcd2bin((ymd & 0xff00) >> 8);
- ct.year = bcd2bin32((ymd & 0x) >> 16);
+ ct.year = bcd2bin32((ymd & 0x) >> 16);
return (clock_ct_to_ts(, ts));
}
@@ -321,11 +321,12 @@ opal_settime(device_t dev, struct timespec *ts)
hmsm |= ((uint64_t)bin2bcd(ct.min) << 48);
hmsm |= ((uint64_t)bin2bcd(ct.hour) << 56);
- hmsm = htobe64(hmsm);
- ymd = htobe32(ymd);
-
+ /*
+* We do NOT swap endian here, because the values are being sent
+* via registers instead of indirect via memory.
+*/
do {
- rv = opal_call(OPAL_RTC_WRITE, vtophys(), vtophys());
+ rv = opal_call(OPAL_RTC_WRITE, ymd, hmsm);
if (rv == OPAL_BUSY_EVENT) {
rv = opal_call(OPAL_POLL_EVENTS, 0);
pause("opalrtc", 1);
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svn commit: r365489 - head/contrib/elftoolchain/libelf
Author: bdragon Date: Wed Sep 9 00:06:35 2020 New Revision: 365489 URL: https://svnweb.freebsd.org/changeset/base/365489 Log: [PowerPC64LE] PPC64LE support for libelf. Fix native detection when building on powerpc64le. I will be submitting this and r361104 upstream shortly. Sponsored by: Tag1 Consulting, Inc. Modified: head/contrib/elftoolchain/libelf/_libelf_config.h Modified: head/contrib/elftoolchain/libelf/_libelf_config.h == --- head/contrib/elftoolchain/libelf/_libelf_config.h Wed Sep 9 00:00:43 2020(r365488) +++ head/contrib/elftoolchain/libelf/_libelf_config.h Wed Sep 9 00:06:35 2020(r365489) @@ -94,7 +94,11 @@ #elif defined(__powerpc64__) #defineLIBELF_ARCH EM_PPC64 +#if__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#defineLIBELF_BYTEORDERELFDATA2LSB +#else #defineLIBELF_BYTEORDERELFDATA2MSB +#endif #defineLIBELF_CLASSELFCLASS64 #elif defined(__powerpc__) ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r365487 - head/sys/powerpc/powernv
Author: bdragon
Date: Tue Sep 8 23:48:49 2020
New Revision: 365487
URL: https://svnweb.freebsd.org/changeset/base/365487
Log:
[PowerPC64] Fix xive order calculation in qemu TCG
When emulating a single thread system for testing reasons, mp_maxid can
be 0. This trips up our math for calculating the order.
Account for this to fix xive attachment when emulating a single-thread
core on qemu powernv (a configuration that doesn't exist in the real world.)
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powernv/xive.c
Modified: head/sys/powerpc/powernv/xive.c
==
--- head/sys/powerpc/powernv/xive.c Tue Sep 8 23:48:19 2020
(r365486)
+++ head/sys/powerpc/powernv/xive.c Tue Sep 8 23:48:49 2020
(r365487)
@@ -341,7 +341,11 @@ xive_attach(device_t dev)
mtx_init(>sc_mtx, "XIVE", NULL, MTX_DEF);
- order = fls(mp_maxid + (mp_maxid - 1)) - 1;
+ /* Workaround for qemu single-thread powernv */
+ if (mp_maxid == 0)
+ order = 1;
+ else
+ order = fls(mp_maxid + (mp_maxid - 1)) - 1;
do {
vp_block = opal_call(OPAL_XIVE_ALLOCATE_VP_BLOCK, order);
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svn commit: r365483 - head/stand/libofw
Author: bdragon
Date: Tue Sep 8 23:22:11 2020
New Revision: 365483
URL: https://svnweb.freebsd.org/changeset/base/365483
Log:
Fix 64-bit build of libofw.
Adjust a couple of printf() lines that deal with dumping out addresses
to cast to uintmax_t.
This allows building a 64-bit libofw for use in things like a future
Petitboot loader for PowerPC64, and other FDT platforms that require
a 64-bit loader binary and want to use forth.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/stand/libofw/ofw_memory.c
Modified: head/stand/libofw/ofw_memory.c
==
--- head/stand/libofw/ofw_memory.c Tue Sep 8 23:19:59 2020
(r365482)
+++ head/stand/libofw/ofw_memory.c Tue Sep 8 23:22:11 2020
(r365483)
@@ -80,11 +80,11 @@ ofw_memmap(int acells)
"Physical Range", "#Pages", "Mode");
for (i = 0; i < nmapping; i++) {
- sprintf(lbuf, "%08x-%08x\t%08x-%08x\t%8d\t%6x\n",
- mapptr[i].va,
- mapptr[i].va + mapptr[i].len,
- mapptr[i].pa,
- mapptr[i].pa + mapptr[i].len,
+ sprintf(lbuf, "%08jx-%08jx\t%08jx-%08jx\t%8d\t%6x\n",
+ (uintmax_t)mapptr[i].va,
+ (uintmax_t)mapptr[i].va + mapptr[i].len,
+ (uintmax_t)mapptr[i].pa,
+ (uintmax_t)mapptr[i].pa + mapptr[i].len,
mapptr[i].len / 0x1000,
mapptr[i].mode);
if (pager_output(lbuf))
@@ -98,11 +98,11 @@ ofw_memmap(int acells)
"Physical Range", "#Pages", "Mode");
for (i = 0; i < nmapping; i++) {
- sprintf(lbuf, "%08x-%08x\t%08x-%08x\t%8d\t%6x\n",
- mapptr2[i].va,
- mapptr2[i].va + mapptr2[i].len,
- mapptr2[i].pa_lo,
- mapptr2[i].pa_lo + mapptr2[i].len,
+ sprintf(lbuf, "%08jx-%08jx\t%08jx-%08jx\t%8d\t%6x\n",
+ (uintmax_t)mapptr2[i].va,
+ (uintmax_t)mapptr2[i].va + mapptr2[i].len,
+ (uintmax_t)mapptr2[i].pa_lo,
+ (uintmax_t)mapptr2[i].pa_lo + mapptr2[i].len,
mapptr2[i].len / 0x1000,
mapptr2[i].mode);
if (pager_output(lbuf))
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svn commit: r365481 - in head/sys/powerpc: aim powerpc
Author: bdragon
Date: Tue Sep 8 22:59:43 2020
New Revision: 365481
URL: https://svnweb.freebsd.org/changeset/base/365481
Log:
[PowerPC64] Hide dssall instruction from llvm assembler
When doing a build for a modern CPUTYPE, llvm will throw errors if obsolete
instructions are used, even if they will never run due to runtime checks.
Hiding the dssall instruction from the assembler fixes kernel build when
overriding CPUTYPE, without having any effect on the generated binary.
This has been in my local tree for over a year and is well tested across
a variety of machines.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/aim_machdep.c
head/sys/powerpc/powerpc/cpu.c
Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c Tue Sep 8 22:50:24 2020
(r365480)
+++ head/sys/powerpc/aim/aim_machdep.c Tue Sep 8 22:59:43 2020
(r365481)
@@ -629,7 +629,8 @@ flush_disable_caches(void)
mtspr(SPR_MSSCR0, msscr0);
powerpc_sync();
isync();
- __asm__ __volatile__("dssall; sync");
+ /* 7e00066c: dssall */
+ __asm__ __volatile__(".long 0x7e00066c; sync");
powerpc_sync();
isync();
__asm__ __volatile__("dcbf 0,%0" :: "r"(0));
Modified: head/sys/powerpc/powerpc/cpu.c
==
--- head/sys/powerpc/powerpc/cpu.c Tue Sep 8 22:50:24 2020
(r365480)
+++ head/sys/powerpc/powerpc/cpu.c Tue Sep 8 22:59:43 2020
(r365481)
@@ -753,8 +753,9 @@ cpu_idle_60x(sbintime_t sbt)
case MPC7450:
case MPC7455:
case MPC7457:
+ /* 0x7e00066c: dssall */
__asm __volatile("\
- dssall; sync; mtmsr %0; isync"
+ .long 0x7e00066c; sync; mtmsr %0; isync"
:: "r"(msr | PSL_POW));
break;
default:
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svn commit: r365479 - head/sys/powerpc/powerpc
Author: bdragon
Date: Tue Sep 8 22:42:41 2020
New Revision: 365479
URL: https://svnweb.freebsd.org/changeset/base/365479
Log:
[PowerPC] Add root_pic assertion.
When enabling an interrupt, assert that we do in fact have a root PIC.
This would have saved me some debugging effort.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/intr_machdep.c
Modified: head/sys/powerpc/powerpc/intr_machdep.c
==
--- head/sys/powerpc/powerpc/intr_machdep.c Tue Sep 8 22:41:35 2020
(r365478)
+++ head/sys/powerpc/powerpc/intr_machdep.c Tue Sep 8 22:42:41 2020
(r365479)
@@ -457,6 +457,8 @@ powerpc_enable_intr(void)
if (root_pic == NULL)
root_pic = piclist[0].dev;
+ KASSERT(root_pic != NULL, ("no root PIC!"));
+
#ifdef SMP
/* Install an IPI handler. */
if (mp_ncpus > 1) {
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svn commit: r365442 - in head: lib/libc/powerpc lib/libc/powerpc/sys lib/libc/powerpc64 lib/libc/powerpc64/sys lib/libc/powerpcspe sys/powerpc/include sys/powerpc/powerpc
Author: bdragon
Date: Tue Sep 8 03:00:31 2020
New Revision: 365442
URL: https://svnweb.freebsd.org/changeset/base/365442
Log:
[PowerPC] Implement VDSO timebase access on powerpc*
Implement the remaining pieces needed to allow userland timestamp reading.
Rewritten based on an intial essay into the problem by Justin Hibbits.
(Copyright changed to my own on his request.)
Tested on ppc64 (POWER9 Talos II), powerpcspe (e500v2 RB800), and
powerpc (g4 PowerBook).
Reviewed by: jhibbits (in irc)
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D26347
Added:
head/lib/libc/powerpc/sys/__vdso_gettc.c (contents, props changed)
head/lib/libc/powerpc64/sys/__vdso_gettc.c (contents, props changed)
Modified:
head/lib/libc/powerpc/Makefile.inc
head/lib/libc/powerpc/sys/Makefile.inc
head/lib/libc/powerpc64/Makefile.inc
head/lib/libc/powerpc64/sys/Makefile.inc
head/lib/libc/powerpcspe/Makefile.inc
head/sys/powerpc/include/vdso.h
head/sys/powerpc/powerpc/clock.c
head/sys/powerpc/powerpc/elf32_machdep.c
head/sys/powerpc/powerpc/elf64_machdep.c
Modified: head/lib/libc/powerpc/Makefile.inc
==
--- head/lib/libc/powerpc/Makefile.inc Tue Sep 8 01:27:03 2020
(r365441)
+++ head/lib/libc/powerpc/Makefile.inc Tue Sep 8 03:00:31 2020
(r365442)
@@ -1,7 +1,5 @@
# $FreeBSD$
-SRCS+= trivial-vdso_tc.c
-
# Long double is 64-bits
SRCS+=machdep_ldisd.c
SYM_MAPS+=${LIBC_SRCTOP}/powerpc/Symbol.map
Modified: head/lib/libc/powerpc/sys/Makefile.inc
==
--- head/lib/libc/powerpc/sys/Makefile.inc Tue Sep 8 01:27:03 2020
(r365441)
+++ head/lib/libc/powerpc/sys/Makefile.inc Tue Sep 8 03:00:31 2020
(r365442)
@@ -1,3 +1,4 @@
# $FreeBSD$
+SRCS+= __vdso_gettc.c
MDASM+=cerror.S
Added: head/lib/libc/powerpc/sys/__vdso_gettc.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/lib/libc/powerpc/sys/__vdso_gettc.cTue Sep 8 03:00:31 2020
(r365442)
@@ -0,0 +1,68 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2020 Brandon Bergren
+ *
+ * This software was developed by Konstantin Belousov
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+#include "libc_private.h"
+
+#pragma weak __vdso_gettc
+int
+__vdso_gettc(const struct vdso_timehands *th, u_int *tc)
+{
+
+ if (__predict_false(th->th_algo != VDSO_TH_ALGO_PPC_TB))
+ return (ENOSYS);
+ /*
+* While the timebase is a 64 bit quantity, we are only interested
+* in the lower 32 bits of it.
+*/
+ *tc = mfspr(TBR_TBL);
+
+ return (0);
+}
+
+#pragma weak __vdso_gettimekeep
+int
+__vdso_gettimekeep(struct vdso_timekeep **tk)
+{
+
+ return (_elf_aux_info(AT_TIMEKEEP, tk, sizeof(*tk)));
+}
Modified: head/lib/libc/powerpc64/Makefile.inc
==
--- head/lib/libc/powerpc64/Makefile.incTue Sep 8 01:27:03 2020
(r365441)
+++ head/lib/libc/powerpc64/Makefile.incTue Sep 8 03:00:31 2020
(r365442)
@@ -1,7 +1,5 @@
# $FreeBSD$
-SRCS+= trivial-vdso_tc.c
-
# Long double is 64-bits
SRCS+=machdep_ldisd.c
SYM_MAPS+=${LIBC_SRCTOP}/powerpc64/Symbol.map
Modified: head
svn commit: r365441 - head/sys/conf
Author: bdragon
Date: Tue Sep 8 01:27:03 2020
New Revision: 365441
URL: https://svnweb.freebsd.org/changeset/base/365441
Log:
[PowerPC] Work around -O miscompile on powerpc 32 bit.
Work around llvm 11 miscompile in 32 bit powerpc that appears to cause ifuncs
to branch to the wrong address by forcing -O2. This worked in previous
versions because -O was mapped to -O2 previously (but is now -O1.)
While here, remove the old temporary workaround from r224882 that does the
opposite thing for powerpc non-DEBUG kernels, bringing it in line with other
platforms that compile at -O2.
This fixes kernel boot on powerpc and powerpcspe after the llvm11 transition.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/conf/kern.pre.mk
Modified: head/sys/conf/kern.pre.mk
==
--- head/sys/conf/kern.pre.mk Tue Sep 8 00:48:18 2020(r365440)
+++ head/sys/conf/kern.pre.mk Tue Sep 8 01:27:03 2020(r365441)
@@ -51,14 +51,15 @@ OBJCOPY?= objcopy
SIZE?= size
.if defined(DEBUG)
+.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe"
+# Work around clang 11 miscompile on 32 bit powerpc.
+_MINUS_O= -O2
+.else
_MINUS_O= -O
+.endif
CTFFLAGS+= -g
.else
-.if ${MACHINE_CPUARCH} == "powerpc"
-_MINUS_O= -O # gcc miscompiles some code at -O2
-.else
_MINUS_O= -O2
-.endif
.endif
.if ${MACHINE_CPUARCH} == "amd64"
.if ${COMPILER_TYPE} == "clang"
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svn commit: r365431 - head/sys/powerpc/powerpc
Author: bdragon
Date: Mon Sep 7 20:25:54 2020
New Revision: 365431
URL: https://svnweb.freebsd.org/changeset/base/365431
Log:
[PowerPC] Initialize ELFv1 as a secondary sysvec to ELFv2.
In order to enable VDSO timekeeping, it is necessary that there be exactly
one primary FreeBSD sysvec for each of the host and (optionally) compat32.
So, switch ELFv1 to being a secondary sysvec of ELFv2, so it does not get
double-allocated in the shared page.
Since secondary sysvecs use the same sigcode allocation as the primary,
define both to use the main sigcode64, and adjust the sv_sigcode_base on
ELFv2 after initialization to point to the correct offset.
This has the desirable side effect of avoiding having a separate copy of
the signal trampoline in the shared page. Our sigcode64 was already written
to take advantage of trampoline sharing, it was just not being allocated
that way until now.
Submitted by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/elf64_machdep.c
Modified: head/sys/powerpc/powerpc/elf64_machdep.c
==
--- head/sys/powerpc/powerpc/elf64_machdep.cMon Sep 7 20:17:13 2020
(r365430)
+++ head/sys/powerpc/powerpc/elf64_machdep.cMon Sep 7 20:25:54 2020
(r365431)
@@ -95,7 +95,6 @@ struct sysentvec elf64_freebsd_sysvec_v1 = {
.sv_hwcap = _features,
.sv_hwcap2 = _features2,
};
-INIT_SYSENTVEC(elf64_sysvec_v1, _freebsd_sysvec_v1);
struct sysentvec elf64_freebsd_sysvec_v2 = {
.sv_size= SYS_MAXSYSCALL,
@@ -105,8 +104,8 @@ struct sysentvec elf64_freebsd_sysvec_v2 = {
.sv_transtrap = NULL,
.sv_fixup = __elfN(freebsd_fixup),
.sv_sendsig = sendsig,
- .sv_sigcode = sigcode64_elfv2,
- .sv_szsigcode = _elfv2,
+ .sv_sigcode = sigcode64, /* Fixed up in ppc64_init_sysvecs(). */
+ .sv_szsigcode = ,
.sv_name= "FreeBSD ELF64 V2",
.sv_coredump= __elfN(coredump),
.sv_imgact_try = NULL,
@@ -133,7 +132,6 @@ struct sysentvec elf64_freebsd_sysvec_v2 = {
.sv_hwcap = _features,
.sv_hwcap2 = _features2,
};
-INIT_SYSENTVEC(elf64_sysvec_v2, _freebsd_sysvec_v2);
static boolean_t ppc64_elfv1_header_match(struct image_params *params,
int32_t *, uint32_t *);
@@ -192,6 +190,26 @@ SYSINIT(oelf64, SI_SUB_EXEC, SI_ORDER_ANY,
_brand_oinfo);
void elf_reloc_self(Elf_Dyn *dynp, Elf_Addr relocbase);
+
+static void
+ppc64_init_sysvecs(void *arg)
+{
+ exec_sysvec_init(_freebsd_sysvec_v2);
+ exec_sysvec_init_secondary(_freebsd_sysvec_v2,
+ _freebsd_sysvec_v1);
+ /*
+* Adjust elfv2 sigcode after elfv1 sysvec is initialized.
+* exec_sysvec_init_secondary() assumes secondary sysvecs use
+* identical signal code, and skips allocating a second copy.
+* Since the ELFv2 trampoline is a strict subset of the ELFv1 code,
+* we can work around this by adjusting the base address. This also
+* avoids two copies of the trampoline code being allocated!
+*/
+ elf64_freebsd_sysvec_v2.sv_sigcode_base +=
+ (uintptr_t)sigcode64_elfv2 - (uintptr_t)
+ elf64_freebsd_sysvec_v2.sv_szsigcode = _elfv2;
+}
+SYSINIT(elf64_sysvec, SI_SUB_EXEC, SI_ORDER_ANY, ppc64_init_sysvecs, NULL);
static boolean_t
ppc64_elfv1_header_match(struct image_params *params, int32_t *osrel __unused,
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svn commit: r365428 - head/sys/sys
Author: bdragon
Date: Mon Sep 7 20:05:18 2020
New Revision: 365428
URL: https://svnweb.freebsd.org/changeset/base/365428
Log:
Fix vdso compat32 timekeeping on !=x86.
Since x86 is the only 32-bit arch that has a 32-bit time_t, adjust the
private bintime32 struct in vdso to only use a 32 bit sec on amd64.
This matches the existing behavior in the compat code.
Noticed while implementing vdso timekeeping on powerpc.
This should also theoretically fix vdso timekeeping for arm binaries on
aarch64.
See tools attached to https://reviews.freebsd.org/D26347 for testing.
Reviewed by: kib (in irc)
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/sys/vdso.h
Modified: head/sys/sys/vdso.h
==
--- head/sys/sys/vdso.h Mon Sep 7 19:35:30 2020(r365427)
+++ head/sys/sys/vdso.h Mon Sep 7 20:05:18 2020(r365428)
@@ -102,8 +102,16 @@ struct vdso_sv_tk *alloc_sv_tk(void);
#defineVDSO_TH_NUM 4
#ifdef COMPAT_FREEBSD32
+
+/*
+ * i386 is the only arch with a 32 bit time_t.
+ */
struct bintime32 {
+#if defined(__amd64__)
uint32_tsec;
+#else
+ uint64_tsec;
+#endif
uint32_tfrac[2];
};
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Re: svn commit: r365071 - in head/sys: net net/altq net/route net80211 netgraph netgraph/atm netgraph/atm/ccatm netgraph/atm/sscfu netgraph/atm/sscop netgraph/atm/uni netgraph/bluetooth/common netgrap
On Fri, Sep 4, 2020, at 1:15 PM, Andrew Gallatin wrote: > Rather than doing more sweeps like this, is it possible to > come up with a clang-format rule that's 95% of style(9), do > just one more sweep of the tree to apply that rule, add that > rule as a pre-commit hook, and be done forever with style(9) > related changes? Only for a subset of the tree. sys/contrib for example can't be subject to this sort of auto-formatting. > -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r365021 - head/sys/powerpc/powerpc
Author: bdragon
Date: Tue Sep 1 01:57:56 2020
New Revision: 365021
URL: https://svnweb.freebsd.org/changeset/base/365021
Log:
[PowerPC] Remove unused openpic_set_priority().
When SMP support for powerpc was added in r178628, the last callers of this
function were removed. All code that needs to manipulate the task priority
just does it directly instead.
Noticed while reading through the lint logs.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/powerpc/openpic.c
Modified: head/sys/powerpc/powerpc/openpic.c
==
--- head/sys/powerpc/powerpc/openpic.c Tue Sep 1 01:12:55 2020
(r365020)
+++ head/sys/powerpc/powerpc/openpic.c Tue Sep 1 01:57:56 2020
(r365021)
@@ -73,21 +73,6 @@ openpic_write(struct openpic_softc *sc, u_int reg, uin
bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
}
-static __inline void
-openpic_set_priority(struct openpic_softc *sc, int pri)
-{
- u_int tpr;
- uint32_t x;
-
- sched_pin();
- tpr = OPENPIC_PCPU_TPR((sc->sc_dev == root_pic) ? PCPU_GET(cpuid) : 0);
- x = openpic_read(sc, tpr);
- x &= ~OPENPIC_TPR_MASK;
- x |= pri;
- openpic_write(sc, tpr, x);
- sched_unpin();
-}
-
int
openpic_common_attach(device_t dev, uint32_t node)
{
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Re: svn commit: r364946 - head/sys/kern
On Sat, Aug 29, 2020, at 6:34 AM, Warner Losh wrote: > > > On Sat, Aug 29, 2020 at 5:25 AM Michal Meloun wrote: > > Yeah, sorry. Local symbols are not available for netbooted kernel :(. > > And i csan confirm that problem is cause by using sbuf_cpy() on sbuf > > allocated by sbuf_new_for_sysctl() (thus with drain handler) in > > device_sysctl_handler(). But pure replacing sbuf_cpy() by sbuf_cat() > > gives me another panic: > > panic: Assertion (sb->s_flags & SBUF_INCLUDENUL) == 0 failed at > > /usr2/Meloun/git/pmap/sys/kern/subr_bus.c:4936 > > (still as respose for sysctl dev.cpu) > By the way, on powerpc*, we have a little hack in place to be able to load symbols even when loader isn't in use -- in petitboot, if you provide a second copy of the kernel as the initrd, it will be used at runtime to load symbols. (the powerpc code has special probing to skip attaching the initrd as a md device if it looks like an ELF file) And on powerpc32, you can actually netboot loader instead of netbooting the kernel (with a little dhcpd magic) and get symbols loaded the "normal" way. -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364817 - head/libexec/rc/rc.d
On Thu, Aug 27, 2020, at 11:19 AM, Kyle Evans wrote: > On Thu, Aug 27, 2020 at 10:59 AM Andriy Gapon wrote: > > > > On 2020-08-27 17:06, Kyle Evans wrote: > > > On Thu, Aug 27, 2020 at 9:05 AM Kyle Evans wrote: > > >> > > >> On Thu, Aug 27, 2020 at 9:03 AM Cy Schubert > > >> wrote: > > >>> > > >>> What would you suggest in this case, where /etc/zfs/zpool.cache is newer > > >>> than /boot/zfs/zpool.cache? > > >>> > > >>> slippy$ lh /boot/zfs/zpool.cache /etc/zfs/zpool.cache > > >>> -rw-r--r-- 1 root wheel 4.6K Aug 25 07:19 /boot/zfs/zpool.cache > > >>> -rw-r--r-- 1 root wheel 4.7K Aug 27 06:20 /etc/zfs/zpool.cache > > >>> slippy$ > > >>> > > >>> Something like, for I in $(ls -t /etc/zfs/zpool.cache > > >>> /boot/zfs/zpool.cache) with the break? > > >>> > > >> > > >> /etc/zfs/zpool.cache is the new location and should generally be > > >> favored if it exists, I reckon. > > > > > > I retract the above. :-) ls -t makes sense. > > > > > > > I actually was about to agree with your first suggestion. > > > > I think it's the correct long-term solution, but it kind of depends on > what we're thinking now- if we expect one might test-boot a disk on an > older FreeBSD/ZFS that's still using /boot, there's a chance it will > contain the more recent data. > FWIW, on powerpc64, using /etc/zfs/zpool.cache is great because it avoids the problem of having to unmount /boot (which is an msdos filesystem because peitiboot doesn't understand ufs or zfs) to update the copy of zpool.cache that is on the root filesystem in /boot instead of only changing the one in the runtime /boot (which was mounted on top, and is never useful because it's not mounted at the time that zpool.cache is actually needed to import pools.) In any case, the correct way on ZFS to control where the cachefile is written is to set the cachefile property on the zpool to the specific path. The correct behavior regarding boot time auto import of pools is to honor that property as found on the pool the boot filesystem was on, so that other pools sharing the same cachefile path will be imported. Multiple cache files and pools not actually listed in a cachefile are valid scenarios for pools. -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364799 - in head: share/man/man9 sys/crypto/ccp sys/dev/cxgbe/crypto sys/dev/sec sys/kern sys/opencrypto
My guess as to why universe didn't catch it on powerpc is that MPC85XX is a non GENERIC kernel that is specially built as an alternate kernel -- see https://github.com/freebsd/freebsd-ci/blob/master/jobs/FreeBSD-head-powerpc-build/src.conf On Wed, Aug 26, 2020, at 2:32 PM, Brandon Bergren wrote: > r364833 > > On Wed, Aug 26, 2020, at 2:30 PM, Ed Maste wrote: > > On Wed, 26 Aug 2020 at 15:27, Alan Somers wrote: > > > > > > It probably came copy/pasted from another file :( . I'll fix it; and > > > figure out why my universe build didn't catch this. > > > > IIRC powerpcspe is not included in universe/tinderbox. > > -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364799 - in head: share/man/man9 sys/crypto/ccp sys/dev/cxgbe/crypto sys/dev/sec sys/kern sys/opencrypto
r364833 On Wed, Aug 26, 2020, at 2:30 PM, Ed Maste wrote: > On Wed, 26 Aug 2020 at 15:27, Alan Somers wrote: > > > > It probably came copy/pasted from another file :( . I'll fix it; and > > figure out why my universe build didn't catch this. > > IIRC powerpcspe is not included in universe/tinderbox. > -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r364833 - head/sys/dev/sec
Author: bdragon Date: Wed Aug 26 19:30:42 2020 New Revision: 364833 URL: https://svnweb.freebsd.org/changeset/base/364833 Log: [PowerPC] Fix build failure in sec.c Fix a typo in r364799 that was breaking powerpc and powerpcspe build. MFC with: 364799 Modified: head/sys/dev/sec/sec.c Modified: head/sys/dev/sec/sec.c == --- head/sys/dev/sec/sec.c Wed Aug 26 19:28:30 2020(r364832) +++ head/sys/dev/sec/sec.c Wed Aug 26 19:30:42 2020(r364833) @@ -852,7 +852,7 @@ sec_desc_map_dma(struct sec_softc *sc, struct sec_dma_ size = m_length(crp->crp_buf.cb_mbuf, NULL); break; case CRYPTO_BUF_VMPAGE: - size = PAGE_SIZE - cb->cb_vm_page_offset; + size = PAGE_SIZE - crp->crp_buf.cb_vm_page_offset; break; default: return (EINVAL); ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364799 - in head: share/man/man9 sys/crypto/ccp sys/dev/cxgbe/crypto sys/dev/sec sys/kern sys/opencrypto
> No, I mean literally. What scope is cb coming from? It's not a variable > that is in scope for that function as far as I can tell. > Naturally, about two seconds after I sent this, I realized that you meant that it was a powerpc-specific driver and that's why the other platforms don't catch it. Will fix it myself. -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364799 - in head: share/man/man9 sys/crypto/ccp sys/dev/cxgbe/crypto sys/dev/sec sys/kern sys/opencrypto
On Wed, Aug 26, 2020, at 2:19 PM, Jessica Clarke wrote: > On 26 Aug 2020, at 20:16, Brandon Bergren wrote: > > On Tue, Aug 25, 2020, at 9:37 PM, Alan Somers wrote: > >> Author: asomers > >> Date: Wed Aug 26 02:37:42 2020 > >> New Revision: 364799 > >> URL: https://svnweb.freebsd.org/changeset/base/364799 > >> > >> Modified: head/sys/dev/sec/sec.c > >> == > >> --- head/sys/dev/sec/sec.c Wed Aug 26 02:13:27 2020(r364798) > >> +++ head/sys/dev/sec/sec.c Wed Aug 26 02:37:42 2020(r364799) > >> @@ -851,6 +851,9 @@ sec_desc_map_dma(struct sec_softc *sc, struct sec_dma_ > >>case CRYPTO_BUF_MBUF: > >>size = m_length(crp->crp_buf.cb_mbuf, NULL); > >>break; > >> + case CRYPTO_BUF_VMPAGE: > >> + size = PAGE_SIZE - cb->cb_vm_page_offset; > >> + break; > >>default: > >>return (EINVAL); > >>} > > > > Uh, where is cb coming from? Shouldn't this be using > > crp->crp_buf.cb_vm_page_offset? This is causing a build failure on powerpc > > and powerpcspe. I don't see why other platforms aren't also erroring out > > here. > > Because it's PowerPC-specific: > > sys/conf/files.powerpc:dev/sec/sec.c optionalsec mpc85xx > > Jess > > No, I mean literally. What scope is cb coming from? It's not a variable that is in scope for that function as far as I can tell. -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364799 - in head: share/man/man9 sys/crypto/ccp sys/dev/cxgbe/crypto sys/dev/sec sys/kern sys/opencrypto
On Tue, Aug 25, 2020, at 9:37 PM, Alan Somers wrote: > Author: asomers > Date: Wed Aug 26 02:37:42 2020 > New Revision: 364799 > URL: https://svnweb.freebsd.org/changeset/base/364799 > > Modified: head/sys/dev/sec/sec.c > == > --- head/sys/dev/sec/sec.cWed Aug 26 02:13:27 2020(r364798) > +++ head/sys/dev/sec/sec.cWed Aug 26 02:37:42 2020(r364799) > @@ -851,6 +851,9 @@ sec_desc_map_dma(struct sec_softc *sc, struct sec_dma_ > case CRYPTO_BUF_MBUF: > size = m_length(crp->crp_buf.cb_mbuf, NULL); > break; > + case CRYPTO_BUF_VMPAGE: > + size = PAGE_SIZE - cb->cb_vm_page_offset; > + break; > default: > return (EINVAL); > } Uh, where is cb coming from? Shouldn't this be using crp->crp_buf.cb_vm_page_offset? This is causing a build failure on powerpc and powerpcspe. I don't see why other platforms aren't also erroring out here. ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r364781 - in head/sys: conf modules/zfs
Author: bdragon
Date: Tue Aug 25 19:04:54 2020
New Revision: 364781
URL: https://svnweb.freebsd.org/changeset/base/364781
Log:
[PowerPC] More preemptive powerpcspe ZFS build fixes
I went through the merge and found the rest of the instances where
${MACHINE_ARCH} == "powerpc" was being used to detect 32-bit and adjusted
the rest of the instances to also check for powerpcspe.
mips32* will probably want to do the same.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/conf/kern.pre.mk
head/sys/modules/zfs/Makefile
Modified: head/sys/conf/kern.pre.mk
==
--- head/sys/conf/kern.pre.mk Tue Aug 25 18:54:10 2020(r364780)
+++ head/sys/conf/kern.pre.mk Tue Aug 25 19:04:54 2020(r364781)
@@ -257,7 +257,7 @@ ZFS_CFLAGS+= -DHAVE_AVX2 -DHAVE_AVX -D__x86_64 -DHAVE_
.endif
.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \
- ${MACHINE_ARCH} == "arm"
+ ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm"
ZFS_CFLAGS+= -DBITS_PER_LONG=32
.else
ZFS_CFLAGS+= -DBITS_PER_LONG=64
Modified: head/sys/modules/zfs/Makefile
==
--- head/sys/modules/zfs/Makefile Tue Aug 25 18:54:10 2020
(r364780)
+++ head/sys/modules/zfs/Makefile Tue Aug 25 19:04:54 2020
(r364781)
@@ -47,7 +47,7 @@ CFLAGS+= -fprofile-arcs -ftest-coverage
DEBUG_FLAGS=-g
.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \
- ${MACHINE_ARCH} == "arm"
+ ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm"
CFLAGS+= -DBITS_PER_LONG=32
.else
CFLAGS+= -DBITS_PER_LONG=64
@@ -117,7 +117,7 @@ SRCS+= acl_common.c \
.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \
- ${MACHINE_ARCH} == "arm"
+ ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm"
SRCS+= spl_atomic.c
.endif
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svn commit: r364780 - head/cddl/lib/libzpool
Author: bdragon
Date: Tue Aug 25 18:54:10 2020
New Revision: 364780
URL: https://svnweb.freebsd.org/changeset/base/364780
Log:
[PowerPC] Apply the ppc32 GOT overflow fix to powerpcspe
powerpcspe is also a 32 bit ppc platform, and also needs to be -fPIC to
avoid overflowing the GOT.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/cddl/lib/libzpool/Makefile
Modified: head/cddl/lib/libzpool/Makefile
==
--- head/cddl/lib/libzpool/Makefile Tue Aug 25 18:32:43 2020
(r364779)
+++ head/cddl/lib/libzpool/Makefile Tue Aug 25 18:54:10 2020
(r364780)
@@ -21,7 +21,7 @@ ACFLAGS+= -Wa,--noexecstack
ATOMIC_SRCS= opensolaris_atomic.c
.endif
-.if ${MACHINE_ARCH} == "powerpc"
+.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe"
# Don't waste GOT entries on small data.
PICFLAG= -fPIC
.endif
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svn commit: r364447 - head/sys/powerpc/aim
Author: bdragon
Date: Fri Aug 21 03:31:01 2020
New Revision: 364447
URL: https://svnweb.freebsd.org/changeset/base/364447
Log:
[PowerPC] Fix translation-related crashes during startup
After spending a lot of time trying to track down what was going on, I have
isolated the "black screen" failures when using boot1 to boot a G4 machine.
It turns out we were replacing the traps before installing the temporary
BAT entry for the bottom of physical memory. That meant that until the MMU
was bootstrapped, the cached translations were the only thing keeping us
from losing.
Throwing boot1 into the mix was affecting execution flow enough to cause us
to hit an uncached page and crash.
Fix this by properly setting up the initial BAT entry at the same time we
are replacing the OpenFirmware traps, so we can continue executing in
segment 0 until the rest of the DMAP has been set up.
A second thing discovered while researching this is that we were entering a
BAT region for segment 16. It turns out this range was a) considered part
of KVA, and b) has firmware mappings with varying attributes.
If we ever accessed an unmapped page in segment 16, it would cause a BAT
entry to be installed for the whole segment, which would bypass the
existing mappings until it was flushed out again.
Instead, translate the OFW memory attributes into VM memory attributes and
install the ranges into the kernel address space properly.
Reviewed by: adalava
MFC after:3 weeks
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D25547
Modified:
head/sys/powerpc/aim/aim_machdep.c
head/sys/powerpc/aim/mmu_oea.c
Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c Fri Aug 21 03:23:10 2020
(r364446)
+++ head/sys/powerpc/aim/aim_machdep.c Fri Aug 21 03:31:01 2020
(r364447)
@@ -390,6 +390,25 @@ aim_cpu_init(vm_offset_t toc)
bcopy(, (void *)EXC_MCHK, trap_offset);
bcopy(, (void *)EXC_TRC, trap_offset);
bcopy(, (void *)EXC_BPT, trap_offset);
+ } else {
+
+ /*
+* Use an IBAT and a DBAT to map the bottom 256M segment.
+*
+* It is very important to do it *now* to avoid taking a
+* fault in .text / .data before the MMU is bootstrapped,
+* because until then, the translation data has not been
+* copied over from OpenFirmware, so our DSI/ISI will fail
+* to find a match.
+*/
+
+ battable[0x0].batl = BATL(0x, BAT_M, BAT_PP_RW);
+ battable[0x0].batu = BATU(0x, BAT_BL_256M, BAT_Vs);
+
+ __asm (".balign 32; \n"
+ "mtibatu 0,%0; mtibatl 0,%1; isync; \n"
+ "mtdbatu 0,%0; mtdbatl 0,%1; isync"
+ :: "r"(battable[0].batu), "r"(battable[0].batl));
}
#else
trapsize = (size_t) - (size_t)
Modified: head/sys/powerpc/aim/mmu_oea.c
==
--- head/sys/powerpc/aim/mmu_oea.c Fri Aug 21 03:23:10 2020
(r364446)
+++ head/sys/powerpc/aim/mmu_oea.c Fri Aug 21 03:31:01 2020
(r364447)
@@ -420,6 +420,32 @@ moea_calc_wimg(vm_paddr_t pa, vm_memattr_t ma)
return pte_lo;
}
+/*
+ * Translate OFW translations into VM attributes.
+ */
+static __inline vm_memattr_t
+moea_bootstrap_convert_wimg(uint32_t mode)
+{
+
+ switch (mode) {
+ case (PTE_I | PTE_G):
+ /* PCI device memory */
+ return VM_MEMATTR_UNCACHEABLE;
+ case (PTE_M):
+ /* Explicitly coherent */
+ return VM_MEMATTR_CACHEABLE;
+ case 0: /* Default claim */
+ case 2: /* Alternate PP bits set by OF for the original payload */
+ /* "Normal" memory. */
+ return VM_MEMATTR_DEFAULT;
+
+ default:
+ /* Err on the side of caution for unknowns */
+ /* XXX should we panic instead? */
+ return VM_MEMATTR_UNCACHEABLE;
+ }
+}
+
static void
tlbie(vm_offset_t va)
{
@@ -670,14 +696,7 @@ moea_bootstrap(vm_offset_t kernelstart, vm_offset_t ke
vm_size_t size, physsz, hwphyssz;
vm_offset_t pa, va, off;
void*dpcpu;
- register_t msr;
-/*
- * Set up BAT0 to map the lowest 256 MB area
- */
-battable[0x0].batl = BATL(0x, BAT_M, BAT_PP_RW);
-battable[0x0].batu = BATU(0x, BAT_BL_256M, BAT_Vs);
-
/*
* Map PCI memory space.
*/
@@ -693,25 +712,8 @@ moea_bootstrap(vm_offset_t kernelstart, vm_offset_t ke
battable[0xb].batl = BATL(0xb000, BAT_I|BAT_G, BAT_PP_RW);
svn commit: r364446 - head/sys/powerpc/powernv
Author: bdragon Date: Fri Aug 21 03:23:10 2020 New Revision: 364446 URL: https://svnweb.freebsd.org/changeset/base/364446 Log: [PowerPC64] Fix invalid OPAL call in xive_bind(). This fixes spurious "XIVE[ IC 00 ] ISN 1 lead to invalid IVE !" messages generated by OPAL when running with the debug level cranked up. Discussed with jhibbits. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/powernv/opal.h head/sys/powerpc/powernv/xive.c Modified: head/sys/powerpc/powernv/opal.h == --- head/sys/powerpc/powernv/opal.h Fri Aug 21 00:59:15 2020 (r364445) +++ head/sys/powerpc/powernv/opal.h Fri Aug 21 03:23:10 2020 (r364446) @@ -173,6 +173,9 @@ int opal_call(uint64_t token, ...); #defineOPAL_XIVE_XICS_MODE_EMU 0 #defineOPAL_XIVE_XICS_MODE_EXP 1 +#defineOPAL_XIVE_SYNC_EAS 0x0001 +#defineOPAL_XIVE_SYNC_QUEUE0x0002 + #defineOPAL_XIVE_VP_ENABLED0x0001 #defineOPAL_XIVE_VP_SINGLE_ESCALATION 0x0002 Modified: head/sys/powerpc/powernv/xive.c == --- head/sys/powerpc/powernv/xive.c Fri Aug 21 00:59:15 2020 (r364445) +++ head/sys/powerpc/powernv/xive.c Fri Aug 21 03:23:10 2020 (r364446) @@ -466,7 +466,7 @@ xive_bind(device_t dev, u_int irq, cpuset_t cpumask, v ncpus++; } - opal_call(OPAL_XIVE_SYNC); + opal_call(OPAL_XIVE_SYNC, OPAL_XIVE_SYNC_QUEUE, irq); irqd->vp = pcpu_find(cpu)->pc_hwref; error = opal_call(OPAL_XIVE_SET_IRQ_CONFIG, irq, irqd->vp, ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364435 - head/usr.sbin/kldxref
> Note that we may still do some tweaking of our kernel linker scripts, to > lower the number of segments, although the exact benefit is not entirely > clear. > No real benefit, except for when using loading via sources other than loader(8). If any platforms other than powerpc64 need this, they can get full control over the image generation with the PHDRS directive like we do there. IIRC there are benefits to *having* more segments on i386/amd64 as it makes link_elf_protect() more effective in some cases. -- Brandon Bergren bdra...@freebsd.org ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364409 - in head/sys: kern sys
The change you made looks correct to me. libsysdecode uses pattern matching to find syscall flag definitions for use by userspace debug tools. (so stuff like truss can show flag names, etc.) As such, anything hidden behind _KERNEL in one of the headers that the tool grovels that matches one of the patterns (MSG_ for sys/socket.h in this case) needs to be listed by hand so it doesn't automatically get copied into tables.h. It used to be part of kdump but got split out into a library in 11 so other tools could share the same data. On Wed, Aug 19, 2020, at 10:54 PM, Rick Macklem wrote: > Done, I guess? > > I had never ever heard of this until now, but. by inspection, > it seems to want the kernel only MSG_xxx flags listed, so > I added MSG_TLSAPPDATA. > > If this is not correct, please let me know what needs to be done, rick ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
Re: svn commit: r364409 - in head/sys: kern sys
This broke world build.
Please update the blacklist in lib/sysdecode/mktables.
On Wed, Aug 19, 2020, at 6:42 PM, Rick Macklem wrote:
> Author: rmacklem
> Date: Wed Aug 19 23:42:33 2020
> New Revision: 364409
> URL: https://svnweb.freebsd.org/changeset/base/364409
>
> Log:
> Add the MSG_TLSAPPDATA flag to indicate "return ENXIO" for non-application
> TLS
> data records.
>
> The kernel RPC cannot process non-application data records when
> using TLS. It must to an upcall to a userspace daemon that will
> call SSL_read() to process them.
>
> This patch adds a new flag called MSG_TLSAPPDATA that the kernel
> RPC can use to tell sorecieve() to return ENXIO instead of a non-application
> data record, when that is what is at the top of the receive queue.
> I put the code in #ifdef KERN_TLS/#endif, although it will build without
> that, so that it is recognized as only useful when KERN_TLS is enabled.
> The alternative to doing this is to have the kernel RPC re-queue the
> non-application data message after receiving it, but that seems more
> complicated and might introduce message ordering issues when there
> are multiple non-application data records one after another.
>
> I do not know what, if any, changes will be required to support TLS1.3.
>
> Reviewed by:glebius
> Differential Revision: https://reviews.freebsd.org/D25923
>
> Modified:
> head/sys/kern/uipc_socket.c
> head/sys/sys/socket.h
>
> Modified: head/sys/kern/uipc_socket.c
> ==
> --- head/sys/kern/uipc_socket.c Wed Aug 19 20:41:22 2020
> (r364408)
> +++ head/sys/kern/uipc_socket.c Wed Aug 19 23:42:33 2020
> (r364409)
> @@ -2056,6 +2056,32 @@ dontblock:
> if (m != NULL && m->m_type == MT_CONTROL) {
> struct mbuf *cm = NULL, *cmn;
> struct mbuf **cme =
> +#ifdef KERN_TLS
> + struct cmsghdr *cmsg;
> + struct tls_get_record tgr;
> +
> + /*
> + * For MSG_TLSAPPDATA, check for a non-application data
> + * record. If found, return ENXIO without removing
> + * it from the receive queue. This allows a subsequent
> + * call without MSG_TLSAPPDATA to receive it.
> + * Note that, for TLS, there should only be a single
> + * control mbuf with the TLS_GET_RECORD message in it.
> + */
> + if (flags & MSG_TLSAPPDATA) {
> + cmsg = mtod(m, struct cmsghdr *);
> + if (cmsg->cmsg_type == TLS_GET_RECORD &&
> + cmsg->cmsg_len == CMSG_LEN(sizeof(tgr))) {
> + memcpy(, CMSG_DATA(cmsg), sizeof(tgr));
> + /* This will need to change for TLS 1.3. */
> + if (tgr.tls_type != TLS_RLTYPE_APP) {
> + SOCKBUF_UNLOCK(>so_rcv);
> + error = ENXIO;
> + goto release;
> + }
> + }
> + }
> +#endif
>
> do {
> if (flags & MSG_PEEK) {
>
> Modified: head/sys/sys/socket.h
> ==
> --- head/sys/sys/socket.h Wed Aug 19 20:41:22 2020(r364408)
> +++ head/sys/sys/socket.h Wed Aug 19 23:42:33 2020(r364409)
> @@ -468,6 +468,7 @@ struct msghdr {
> #endif
> #ifdef _KERNEL
> #define MSG_MORETOCOME 0x0010 /* additional data pending */
> +#define MSG_TLSAPPDATA 0x0020 /* only soreceive() app. data
> (TLS) */
> #endif
>
> /*
>
--
Brandon Bergren
bdra...@imap.cc
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svn commit: r363972 - head/lib/libc/powerpc64/gen
Author: bdragon Date: Thu Aug 6 17:49:19 2020 New Revision: 363972 URL: https://svnweb.freebsd.org/changeset/base/363972 Log: [POWERPC] Fix ppc64 makecontext() parameter overflow handling. On ELFv2, the overflow parameters in the stack frame are at a different offset from sp than ELFv1. Adjust code to use the correct offset in all cases. This had resulted in argv[8] and up being copied to the incorrect address in the new context's initial stack frame. This is not necessarily the only bug in this function, I need to do a full review still and ensure the rest of the math is sane for ELFv2 stack frames. Reported by: pherde (Probably. My notes are a bit unclear.) Reviewed by: jhibbits (in irc) Sponsored by: Tag1 Consulting, Inc. Modified: head/lib/libc/powerpc64/gen/makecontext.c Modified: head/lib/libc/powerpc64/gen/makecontext.c == --- head/lib/libc/powerpc64/gen/makecontext.c Thu Aug 6 16:44:24 2020 (r363971) +++ head/lib/libc/powerpc64/gen/makecontext.c Thu Aug 6 17:49:19 2020 (r363972) @@ -102,7 +102,11 @@ __makecontext(ucontext_t *ucp, void (*start)(void), in uint64_t *argp; /* Skip past frame pointer and saved LR */ +#if !defined(_CALL_ELF) || _CALL_ELF == 1 argp = (uint64_t *)sp + 6; +#else + argp = (uint64_t *)sp + 4; +#endif for (i = 0; i < stackargs; i++) *argp++ = va_arg(ap, uint64_t); ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r362965 - head/sys/powerpc/powernv
Author: bdragon
Date: Mon Jul 6 15:15:37 2020
New Revision: 362965
URL: https://svnweb.freebsd.org/changeset/base/362965
Log:
[PowerPC] XIVE dispatch tweaks
* Only read the DPCPU pointer once per xive_dispatch call.
* Optimize HE decoding for the common cases.
Reported by: jhibbits (in irc)
Reviewed by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D25545
Modified:
head/sys/powerpc/powernv/xive.c
Modified: head/sys/powerpc/powernv/xive.c
==
--- head/sys/powerpc/powernv/xive.c Mon Jul 6 15:00:28 2020
(r362964)
+++ head/sys/powerpc/powernv/xive.c Mon Jul 6 15:15:37 2020
(r362965)
@@ -507,6 +507,7 @@ xive_dispatch(device_t dev, struct trapframe *tf)
sc = device_get_softc(dev);
+ xive_cpud = DPCPU_PTR(xive_cpu_data);
for (;;) {
ack = xive_read_2(sc, XIVE_TM_SPC_ACK);
cppr = (ack & 0xff);
@@ -515,19 +516,17 @@ xive_dispatch(device_t dev, struct trapframe *tf)
if (he == TM_QW3_NSR_HE_NONE)
break;
- switch (he) {
- case TM_QW3_NSR_HE_NONE:
- goto end;
- case TM_QW3_NSR_HE_POOL:
- case TM_QW3_NSR_HE_LSI:
+
+ else if (__predict_false(he != TM_QW3_NSR_HE_PHYS)) {
+ /*
+* We don't support TM_QW3_NSR_HE_POOL or
+* TM_QW3_NSR_HE_LSI interrupts.
+*/
device_printf(dev,
"Unexpected interrupt he type: %d\n", he);
goto end;
- case TM_QW3_NSR_HE_PHYS:
- break;
}
- xive_cpud = DPCPU_PTR(xive_cpu_data);
xive_write_1(sc, XIVE_TM_CPPR, cppr);
for (;;) {
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svn commit: r362458 - in head/sys: amd64/amd64 arm/arm arm64/arm64 ddb dev/ksyms i386/i386 kern mips/mips powerpc/powerpc
Author: bdragon
Date: Sun Jun 21 03:39:26 2020
New Revision: 362458
URL: https://svnweb.freebsd.org/changeset/base/362458
Log:
[PowerPC] More relocation fixes
It turns out relocating the symbol table itself can cause issues, like fbt
crashing because it applies the offsets to the kernel twice.
This had been previously brought up in rS333447 when the stoffs hack was
added, but I had been unaware of this and reimplemented symtab relocation.
Instead of relocating the symbol table, keep track of the relocation base
in ddb, so the ddb symbols behave like the kernel linker-provided symbols.
This is intended to be NFC on platforms other than PowerPC, which do not
use fully relocatable kernels. (The relbase will always be 0)
* Remove the rest of the stoffs hack.
* Remove my half-baked displace_symbol_table() function.
* Extend ddb initialization to cope with having a relocation offset on the
kernel symbol table.
* Fix my kernel-as-initrd hack to work with booke64 by using a temporary
mapping to access the data.
* Fix another instance of __powerpc__ that is actually RELOCATABLE_KERNEL.
* Change the behavior or X_db_symbol_values to apply the relocation base
when updating valp, to match link_elf_symbol_values() behavior.
Reviewed by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D25223
Modified:
head/sys/amd64/amd64/machdep.c
head/sys/arm/arm/machdep_boot.c
head/sys/arm64/arm64/machdep_boot.c
head/sys/ddb/db_main.c
head/sys/ddb/ddb.h
head/sys/dev/ksyms/ksyms.c
head/sys/i386/i386/machdep.c
head/sys/kern/link_elf.c
head/sys/mips/mips/machdep.c
head/sys/powerpc/powerpc/machdep.c
Modified: head/sys/amd64/amd64/machdep.c
==
--- head/sys/amd64/amd64/machdep.c Sun Jun 21 02:49:56 2020
(r362457)
+++ head/sys/amd64/amd64/machdep.c Sun Jun 21 03:39:26 2020
(r362458)
@@ -1508,7 +1508,7 @@ native_parse_preload_data(u_int64_t modulep)
#ifdef DDB
ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
- db_fetch_ksymtab(ksym_start, ksym_end);
+ db_fetch_ksymtab(ksym_start, ksym_end, 0);
#endif
efi_systbl_phys = MD_FETCH(kmdp, MODINFOMD_FW_HANDLE, vm_paddr_t);
Modified: head/sys/arm/arm/machdep_boot.c
==
--- head/sys/arm/arm/machdep_boot.c Sun Jun 21 02:49:56 2020
(r362457)
+++ head/sys/arm/arm/machdep_boot.c Sun Jun 21 03:39:26 2020
(r362458)
@@ -302,7 +302,7 @@ freebsd_parse_boot_param(struct arm_boot_params *abp)
#ifdef DDB
ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
- db_fetch_ksymtab(ksym_start, ksym_end);
+ db_fetch_ksymtab(ksym_start, ksym_end, 0);
#endif
return lastaddr;
}
Modified: head/sys/arm64/arm64/machdep_boot.c
==
--- head/sys/arm64/arm64/machdep_boot.c Sun Jun 21 02:49:56 2020
(r362457)
+++ head/sys/arm64/arm64/machdep_boot.c Sun Jun 21 03:39:26 2020
(r362458)
@@ -208,7 +208,7 @@ freebsd_parse_boot_param(struct arm64_bootparams *abp)
#ifdef DDB
ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
- db_fetch_ksymtab(ksym_start, ksym_end);
+ db_fetch_ksymtab(ksym_start, ksym_end, 0);
#endif
return (lastaddr);
}
Modified: head/sys/ddb/db_main.c
==
--- head/sys/ddb/db_main.c Sun Jun 21 02:49:56 2020(r362457)
+++ head/sys/ddb/db_main.c Sun Jun 21 03:39:26 2020(r362458)
@@ -48,6 +48,14 @@ __FBSDID("$FreeBSD$");
#include
#include
+struct db_private {
+ char* strtab;
+ vm_offset_t relbase;
+};
+typedef struct db_private *db_private_t;
+
+#define DB_PRIVATE(x) ((db_private_t)(x->private))
+
SYSCTL_NODE(_debug, OID_AUTO, ddb, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
"DDB settings");
@@ -64,7 +72,8 @@ KDB_BACKEND(ddb, db_init, db_trace_self_wrapper, db_tr
* the symtab and strtab in memory. This is used when loaded from
* boot loaders different than the native one (like Xen).
*/
-vm_offset_t ksymtab, kstrtab, ksymtab_size;
+vm_offset_t ksymtab, kstrtab, ksymtab_size, ksymtab_relbase;
+static struct db_private ksymtab_private;
bool
X_db_line_at_pc(db_symtab_t *symtab, c_db_sym_t sym, char **file, int *line,
@@ -86,7 +95,8 @@ X_db_lookup(db_symtab_t *symtab, const char *symbol)
sym = (Elf_Sym *)symtab->start;
while ((char *)sym < symtab->end) {
if (sym->st_name != 0 &&
-
svn commit: r362409 - head/sys/powerpc/conf
Author: bdragon Date: Fri Jun 19 18:43:13 2020 New Revision: 362409 URL: https://svnweb.freebsd.org/changeset/base/362409 Log: [PowerPC] Add virtio to GENERIC Due to kldxref not being able to generate hints for nonnative platforms, any cross built VM images do not have /boot/kernel/linker.hints. This prevents the virtio modules from being loaded, as the fallback code will always fail the version check when the hints are missing. Since we want to be able to generate VM images for 32 bit powerpc, add the virtio modules to GENERIC like we do on powerpc64. Reviewed by: jhibbits Sponsored by: Tag1 Consulting, Inc. Differential Revision:https://reviews.freebsd.org/D25271 Modified: head/sys/powerpc/conf/GENERIC Modified: head/sys/powerpc/conf/GENERIC == --- head/sys/powerpc/conf/GENERIC Fri Jun 19 18:43:02 2020 (r362408) +++ head/sys/powerpc/conf/GENERIC Fri Jun 19 18:43:13 2020 (r362409) @@ -230,3 +230,12 @@ device snd_uaudio # USB Audio optionsEVDEV_SUPPORT # evdev support in legacy drivers device evdev # input event device support device uinput # install /dev/uinput cdev + +# VirtIO support +device virtio # Generic VirtIO bus (required) +device virtio_pci # VirtIO PCI device +device vtnet # VirtIO Ethernet device +device virtio_blk # VirtIO Block device +device virtio_scsi # VirtIO SCSI device +device virtio_balloon # VirtIO Memory Balloon device + ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
svn commit: r362407 - in head/sys/powerpc: booke include
Author: bdragon
Date: Fri Jun 19 18:40:39 2020
New Revision: 362407
URL: https://svnweb.freebsd.org/changeset/base/362407
Log:
[PowerPC] Fix booke64 qemu infinite loop in L2 cache enable
Since qemu does not implement the L2 cache, we get stuck forever waiting
for a bit to be set when trying to invalidate it.
To prevent that, we should bail out if the L2 cache is missing.
One easy way to check this is L2CFG0 == 0 (since L2CSIZE always has at
least one bit set in a valid implementation)
(tested on qemu, rb800, and x5000)
Reviewed by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D25225
Modified:
head/sys/powerpc/booke/machdep_e500.c
head/sys/powerpc/include/spr.h
Modified: head/sys/powerpc/booke/machdep_e500.c
==
--- head/sys/powerpc/booke/machdep_e500.c Fri Jun 19 18:36:10 2020
(r362406)
+++ head/sys/powerpc/booke/machdep_e500.c Fri Jun 19 18:40:39 2020
(r362407)
@@ -91,7 +91,17 @@ booke_enable_l2_cache(void)
if mfpvr() >> 16) & 0x) == FSL_E500mc) ||
(((mfpvr() >> 16) & 0x) == FSL_E5500)) {
csr = mfspr(SPR_L2CSR0);
- if ((csr & L2CSR0_L2E) == 0) {
+ /*
+* Don't actually attempt to manipulate the L2 cache if
+* L2CFG0 is zero.
+*
+* Any chip with a working L2 cache will have a nonzero
+* L2CFG0, as it will have a nonzero L2CSIZE field.
+*
+* This fixes waiting forever for cache enable in qemu,
+* which does not implement the L2 cache.
+*/
+ if (mfspr(SPR_L2CFG0) != 0 && (csr & L2CSR0_L2E) == 0) {
l2cache_inval();
l2cache_enable();
}
Modified: head/sys/powerpc/include/spr.h
==
--- head/sys/powerpc/include/spr.h Fri Jun 19 18:36:10 2020
(r362406)
+++ head/sys/powerpc/include/spr.h Fri Jun 19 18:40:39 2020
(r362407)
@@ -887,6 +887,7 @@
#define L1CSR1_ICFI 0x0002 /* Instruction Cache
Flash Invalidate */
#define L1CSR1_ICE0x0001 /* Instruction Cache
Enable */
+#defineSPR_L2CFG0 0x207 /* ..8 L2 Configuration
Register 0 */
#defineSPR_L2CSR0 0x3F9 /* ..8 L2 Cache Control and
Status Register 0 */
#define L2CSR0_L2E0x8000 /* L2 Cache Enable */
#define L2CSR0_L2PE 0x4000 /* L2 Cache Parity
Enable */
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svn commit: r362406 - in head: share/man/man4/man4.powerpc sys/dev/powermac_nvram usr.sbin/nvram
Author: bdragon
Date: Fri Jun 19 18:36:10 2020
New Revision: 362406
URL: https://svnweb.freebsd.org/changeset/base/362406
Log:
[PowerPC] De-giant powermac_nvram, update documentation
* Remove the giant lock requirement from powermac_nvram.
* Update manual pages to reflect current state.
Reviewed by: bcr (manpages), jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D24812
Modified:
head/share/man/man4/man4.powerpc/powermac_nvram.4
head/sys/dev/powermac_nvram/powermac_nvram.c
head/sys/dev/powermac_nvram/powermac_nvramvar.h
head/usr.sbin/nvram/nvram.8
Modified: head/share/man/man4/man4.powerpc/powermac_nvram.4
==
--- head/share/man/man4/man4.powerpc/powermac_nvram.4 Fri Jun 19 18:34:27
2020(r362405)
+++ head/share/man/man4/man4.powerpc/powermac_nvram.4 Fri Jun 19 18:36:10
2020(r362406)
@@ -25,7 +25,7 @@
.\"
.\" $FreeBSD$
.\"
-.Dd September 5, 2010
+.Dd June 19, 2020
.Dt POWERMAC_NVRAM 4 powerpc
.Os
.Sh NAME
@@ -50,8 +50,10 @@ The
.Nm
driver provides access to the Open Firmware configuration NVRAM
available on the Apple PowerPC-based machines.
+.Pp
+This driver currently supports "Core99" machines containing a Sharp, Micron,
+or AMD NVRAM.
.Sh SEE ALSO
-.Xr eeprom 8 ,
.Xr nvram 8
.Sh HISTORY
The
Modified: head/sys/dev/powermac_nvram/powermac_nvram.c
==
--- head/sys/dev/powermac_nvram/powermac_nvram.cFri Jun 19 18:34:27
2020(r362405)
+++ head/sys/dev/powermac_nvram/powermac_nvram.cFri Jun 19 18:36:10
2020(r362406)
@@ -34,6 +34,8 @@
#include
#include
#include
+#include
+#include
#include
#include
@@ -99,7 +101,6 @@ static d_write_t powermac_nvram_write;
static struct cdevsw powermac_nvram_cdevsw = {
.d_version =D_VERSION,
- .d_flags = D_NEEDGIANT,
.d_open = powermac_nvram_open,
.d_close = powermac_nvram_close,
.d_read = powermac_nvram_read,
@@ -180,6 +181,8 @@ powermac_nvram_attach(device_t dev)
"powermac_nvram");
sc->sc_cdev->si_drv1 = sc;
+ sx_init(>sc_lock, "powermac_nvram");
+
return 0;
}
@@ -195,6 +198,8 @@ powermac_nvram_detach(device_t dev)
if (sc->sc_cdev != NULL)
destroy_dev(sc->sc_cdev);
+
+ sx_destroy(>sc_lock);
return 0;
}
@@ -203,11 +208,17 @@ static int
powermac_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td)
{
struct powermac_nvram_softc *sc = dev->si_drv1;
+ int err;
+ err = 0;
+ sx_xlock(>sc_lock);
if (sc->sc_isopen)
- return EBUSY;
- sc->sc_isopen = 1;
+ err = EBUSY;
+ else
+ sc->sc_isopen = 1;
sc->sc_rpos = sc->sc_wpos = 0;
+ sx_xunlock(>sc_lock);
+
return 0;
}
@@ -218,10 +229,12 @@ powermac_nvram_close(struct cdev *dev, int fflag, int
struct core99_header *header;
vm_offset_t bank;
+ sx_xlock(>sc_lock);
if (sc->sc_wpos != sizeof(sc->sc_data)) {
/* Short write, restore in-memory copy */
bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE);
sc->sc_isopen = 0;
+ sx_xunlock(>sc_lock);
return 0;
}
@@ -242,10 +255,12 @@ powermac_nvram_close(struct cdev *dev, int fflag, int
if (erase_bank(sc->sc_dev, (uint8_t *)bank) != 0 ||
write_bank(sc->sc_dev, (uint8_t *)bank, sc->sc_data) != 0) {
sc->sc_isopen = 0;
+ sx_xunlock(>sc_lock);
return ENOSPC;
}
sc->sc_bank = bank;
sc->sc_isopen = 0;
+ sx_xunlock(>sc_lock);
return 0;
}
@@ -256,6 +271,8 @@ powermac_nvram_read(struct cdev *dev, struct uio *uio,
struct powermac_nvram_softc *sc = dev->si_drv1;
rv = 0;
+
+ sx_xlock(>sc_lock);
while (uio->uio_resid > 0) {
data_available = sizeof(sc->sc_data) - sc->sc_rpos;
if (data_available > 0) {
@@ -269,6 +286,8 @@ powermac_nvram_read(struct cdev *dev, struct uio *uio,
break;
}
}
+ sx_xunlock(>sc_lock);
+
return rv;
}
@@ -282,6 +301,8 @@ powermac_nvram_write(struct cdev *dev, struct uio *uio
return EINVAL;
rv = 0;
+
+ sx_xlock(>sc_lock);
while (uio->uio_resid > 0) {
data_available = sizeof(sc->sc_data) - sc->sc_wpos;
if (data_available > 0) {
@@ -295,6 +316,8 @@ powermac_nvram_write(struct cdev *dev, struct uio *uio
break;
}
}
+ sx_xunlock(>sc_lock);
+
return rv;
}
@@ -500,6 +523,8 @@ erase_bank(device_t dev,
svn commit: r362179 - in head/sys/dev: ic scc
Author: bdragon
Date: Sun Jun 14 16:47:16 2020
New Revision: 362179
URL: https://svnweb.freebsd.org/changeset/base/362179
Log:
[PowerPC] Fix scc z8530 driver
Parts of the z8530 driver were still using the SUN channel spacing.
This was invalid on PowerMac and QEMU, where the attachment was to escc,
not escc-legacy. This means the driver has apparently NEVER worked properly
on Macintosh hardware.
Add documentation for the channel spacing details, and change to using
driver-specific initialization instead of hardcoded spacing so either
spacing can be used.
Fixes boot hang in QEMU when using the serial console, and fixes use on
Xserve serial (and presumably PowerMacs that have a Stealth Serial port
or similar)
Reviewed by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision:https://reviews.freebsd.org/D24661
Modified:
head/sys/dev/ic/z8530.h
head/sys/dev/scc/scc_bfe.h
head/sys/dev/scc/scc_bfe_macio.c
head/sys/dev/scc/scc_dev_z8530.c
Modified: head/sys/dev/ic/z8530.h
==
--- head/sys/dev/ic/z8530.h Sun Jun 14 16:05:08 2020(r362178)
+++ head/sys/dev/ic/z8530.h Sun Jun 14 16:47:16 2020(r362179)
@@ -32,15 +32,14 @@
#define_DEV_IC_Z8530_H_
/*
- * Channel B control: 0
- * Channel B data: 1
- * Channel A control: 2
- * Channel A data: 3
+ * legacy: SUN compatible
+ * escc: Macintosh
+ * legacy escc
+ * Channel B control: 0 0
+ * Channel B data: 1 1
+ * Channel A control: 2 16
+ * Channel A data: 3 17
*/
-
-/* The following apply when using a device-scoped bus handle */
-#defineCHAN_A 2
-#defineCHAN_B 0
#defineREG_CTRL0
#defineREG_DATA1
Modified: head/sys/dev/scc/scc_bfe.h
==
--- head/sys/dev/scc/scc_bfe.h Sun Jun 14 16:05:08 2020(r362178)
+++ head/sys/dev/scc/scc_bfe.h Sun Jun 14 16:47:16 2020(r362179)
@@ -114,7 +114,8 @@ struct scc_class {
extern struct scc_class scc_quicc_class;
extern struct scc_class scc_sab82532_class;
-extern struct scc_class scc_z8530_class;
+extern struct scc_class scc_z8530_escc_class;
+extern struct scc_class scc_z8530_legacy_class;
struct scc_softc {
KOBJ_FIELDS;
Modified: head/sys/dev/scc/scc_bfe_macio.c
==
--- head/sys/dev/scc/scc_bfe_macio.cSun Jun 14 16:05:08 2020
(r362178)
+++ head/sys/dev/scc/scc_bfe_macio.cSun Jun 14 16:47:16 2020
(r362179)
@@ -55,9 +55,10 @@ scc_macio_probe(device_t dev)
sc = device_get_softc(dev);
nm = ofw_bus_get_name(dev);
+ /* Attach to modern escc (channel shift 4 bits) */
if (!strcmp(nm, "escc")) {
device_set_desc(dev, "Zilog Z8530 dual channel SCC");
- sc->sc_class = _z8530_class;
+ sc->sc_class = _z8530_escc_class;
return (scc_bfe_probe(dev, MACIO_REGSHFT, MACIO_RCLK, 0));
}
return (ENXIO);
Modified: head/sys/dev/scc/scc_dev_z8530.c
==
--- head/sys/dev/scc/scc_dev_z8530.cSun Jun 14 16:05:08 2020
(r362178)
+++ head/sys/dev/scc/scc_dev_z8530.cSun Jun 14 16:47:16 2020
(r362179)
@@ -51,6 +51,10 @@ static int z8530_bfe_iclear(struct scc_softc *, struct
static int z8530_bfe_ipend(struct scc_softc *);
static int z8530_bfe_probe(struct scc_softc *);
+/* Channel B is always at 0 offset. */
+#defineCHAN_A (-(sc->sc_class->cl_range))
+#defineCHAN_B 0
+
static kobj_method_t z8530_methods[] = {
KOBJMETHOD(scc_attach, z8530_bfe_attach),
KOBJMETHOD(scc_iclear, z8530_bfe_iclear),
@@ -59,14 +63,32 @@ static kobj_method_t z8530_methods[] = {
KOBJMETHOD_END
};
-struct scc_class scc_z8530_class = {
- "z8530 class",
+/*
+ * escc (macio) spacing.
+ */
+struct scc_class scc_z8530_escc_class = {
+ "z8530 escc class",
z8530_methods,
sizeof(struct scc_softc),
.cl_channels = 2,
.cl_class = SCC_CLASS_Z8530,
.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
- .cl_range = CHAN_B - CHAN_A,
+ /* Negative .cl_range signifies this is channel spacing. */
+ .cl_range = (CHAN_B - 16),
+};
+
+/*
+ * SUN compatible channel spacing.
+ */
+struct scc_class scc_z8530_legacy_class = {
+ "z8530 legacy class",
+ z8530_methods,
+ sizeof(struct scc_softc),
+ .cl_channels = 2,
+ .cl_class = SCC_CLASS_Z8530,
+ .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
+ /* Negative .cl_range signifies this is channel spacing. */
+ .cl_range =
svn commit: r361703 - head/sys/conf
Author: bdragon
Date: Mon Jun 1 19:40:59 2020
New Revision: 361703
URL: https://svnweb.freebsd.org/changeset/base/361703
Log:
[PowerPC] Fix build-id note on powerpc64 kernel
Due to the ordering of the powerpc64 linker script, we were discarding
all notes before emitting .note.gnu.build-id. This had the effect of
generating an empty build id section and breaking the kern.build_id
sysctl added in r348611.
powerpc and powerpcspe are uneffected.
PR: 246430
MFC after:3 days
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/conf/ldscript.powerpc64
Modified: head/sys/conf/ldscript.powerpc64
==
--- head/sys/conf/ldscript.powerpc64Mon Jun 1 19:34:21 2020
(r361702)
+++ head/sys/conf/ldscript.powerpc64Mon Jun 1 19:40:59 2020
(r361703)
@@ -37,9 +37,6 @@ SECTIONS
/* Do not emit PT_INTERP section, which confuses some loaders (kexec-lite) */
/DISCARD/ : { *(.interp) }
- /* Also delete notes */
- /DISCARD/ : { *(.note.*) }
-
.hash : { *(.hash) }
.dynsym: { *(.dynsym)}
.dynstr: { *(.dynstr)}
@@ -51,6 +48,10 @@ SECTIONS
*(.note.gnu.build-id)
PROVIDE (__build_id_end = .);
}
+
+ /* Do not emit any additional notes. */
+ /DISCARD/ : { *(.note.*) }
+
.rela.text :
{ *(.rela.text) *(.rela.gnu.linkonce.t*) }
.rela.data :
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svn commit: r361568 - head/sys/powerpc/aim
Author: bdragon
Date: Thu May 28 00:49:02 2020
New Revision: 361568
URL: https://svnweb.freebsd.org/changeset/base/361568
Log:
[PowerPC] Fix radix crash when passing -1 from userspace
Found by running libc tests with radix enabled.
Detect unsigned integer wrapping with a postcondition.
Note: Radix MMU is not enabled by default yet.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/mmu_radix.c
Modified: head/sys/powerpc/aim/mmu_radix.c
==
--- head/sys/powerpc/aim/mmu_radix.cWed May 27 23:20:35 2020
(r361567)
+++ head/sys/powerpc/aim/mmu_radix.cThu May 28 00:49:02 2020
(r361568)
@@ -6000,7 +6000,8 @@ mmu_radix_kremove(vm_offset_t va)
int mmu_radix_map_user_ptr(pmap_t pm,
volatile const void *uaddr, void **kaddr, size_t ulen, size_t *klen)
{
- if ((uintptr_t)uaddr + ulen >= VM_MAXUSER_ADDRESS)
+ if ((uintptr_t)uaddr + ulen >= VM_MAXUSER_ADDRESS ||
+ (uintptr_t)uaddr + ulen < (uintptr_t)uaddr)
return (EFAULT);
*kaddr = (void *)(uintptr_t)uaddr;
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svn commit: r361542 - head/sys/powerpc/aim
Author: bdragon Date: Wed May 27 00:17:05 2020 New Revision: 361542 URL: https://svnweb.freebsd.org/changeset/base/361542 Log: [PowerPC] Fix invalid asm in trap code In this context, 0 actually means 0 (i.e. this is a li instruction). While most assemblers will ignore this, I did have a compile failure at one point when using an external toolchain. In the future, we should use the li syntax to make this clearer. Sponsored by: Tag1 Consulting, Inc. Modified: head/sys/powerpc/aim/trap_subr32.S Modified: head/sys/powerpc/aim/trap_subr32.S == --- head/sys/powerpc/aim/trap_subr32.S Tue May 26 23:35:10 2020 (r361541) +++ head/sys/powerpc/aim/trap_subr32.S Wed May 27 00:17:05 2020 (r361542) @@ -426,7 +426,7 @@ instr_sec_hash: bne do_isi /* if so, go to ISI interrupt */ mfspr %r2, SPR_HASH2/* get the second pointer */ ori %r3, %r3, 0x0040/* change the compare value */ - addi %r1, %r0, 8/* load 8 for counter */ + addi %r1, 0, 8 /* load 8 for counter */ addi %r2, %r2, -8 /* pre dec for update on load */ b im0 /* try second hash */ ___ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
