Re: bge(4) diff needs testing.

2010-07-07 Thread Paul de Weerd 
On Sat, Apr 17, 2010 at 12:17:40PM -0400, Brad wrote:
| On Sat, Apr 10, 2010 at 04:58:36PM -0400, Brad wrote:
|  Please test the following diff with any bge(4) adapters. Just checking to
|  ensure no regressions with known working adapters. Just check that things
|  are working as usual. Just bringing in some fixes for some of the newer
|  chipsets soon to appear. Nothing changed with existing chipsets though.
| 
| oops. there was a typo in the original diff. please test this revision.

This one works just fine on my older machine (Dell OptiPlex GX620)
running amd64 :

bge0 at pci2 dev 0 function 0 Broadcom BCM5751 rev 0x01, BCM5750 A1 (0x4001): 
apic 8 int 16 (irq 11), address 00:13:72:bc:66:f7
brgphy0 at bge0 phy 1: BCM5750 10/100/1000baseT PHY, rev. 0

Found no issues with light use (v4, v6, multicast).

Paul 'WEiRD' de Weerd

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Re: bge(4) diff needs testing.

2010-04-23 Thread J.C. Roberts 
On Wed, 21 Apr 2010 20:59:46 -0400 Brad b...@comstyle.com wrote:

  Which ones should people tests?
 
 The bge(4), msk(4), ne(4) and ep(4) diffs.
 
 bge(4) and msk(4) I have and have tested those respective diffs.
 I have no ne(4) or ep(4) hardware, the changes are mechanical but
 still need testing.

I didn't see the ep(4) diff?

I know I've got ep(4) 3c595 cards are but they really suck and are
unused. They can only do half duplex 100Mbit, or full duplex at 10Mbit,
and configuring the card mode requires MSDOS/Windows (3com util). 

jcr

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Re: bge(4) diff needs testing.

2010-04-21 Thread Theo de Raadt 
Which ones should people tests?

Should I assume _all of them_ ... since you probably tested zero yourself?

Can you please report the ones you yourself tested on, before asking others
to invest time?

 On Sat, Apr 10, 2010 at 04:58:36PM -0400, Brad wrote:
  Please test the following diff with any bge(4) adapters. Just checking to
  ensure no regressions with known working adapters. Just check that things
  are working as usual. Just bringing in some fixes for some of the newer
  chipsets soon to appear. Nothing changed with existing chipsets though.
 
 oops. there was a typo in the original diff. please test this revision.
 
 
 Index: if_bge.c
 ===
 RCS file: /cvs/src/sys/dev/pci/if_bge.c,v
 retrieving revision 1.293
 diff -u -p -r1.293 if_bge.c
 --- if_bge.c  6 Apr 2010 15:27:51 -   1.293
 +++ if_bge.c  17 Apr 2010 03:32:24 -
 @@ -1352,9 +1352,12 @@ bge_blockinit(struct bge_softc *sc)
  
   /* Configure mbuf pool watermarks */
   /* new Broadcom docs strongly recommend these: */
 - if (BGE_IS_5705_PLUS(sc) 
 - BGE_ASICREV(sc-bge_chipid) != BGE_ASICREV_BCM5717 
 - BGE_ASICREV(sc-bge_chipid) != BGE_ASICREV_BCM57765) {
 + if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717 ||
 + BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57765) {
 + CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
 + CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x2a);
 + CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xa0);
 + } else if (BGE_IS_5705_PLUS(sc)) {
   CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
  
   if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5906) {
 @@ -1660,11 +1663,17 @@ bge_blockinit(struct bge_softc *sc)
   if (BGE_IS_5755_PLUS(sc))
   val |= BGE_WDMAMODE_STATUS_TAG_FIX;
  
 + if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5785)
 + val |= BGE_WDMAMODE_BURST_ALL_DATA;
 +
   /* Turn on write DMA state machine */
   CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
  
   val = BGE_RDMAMODE_ENABLE|BGE_RDMAMODE_ALL_ATTNS;
  
 + if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717)
 + val |= BGE_RDMAMODE_MULT_DMA_RD_DIS;
 +
   if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5784 ||
   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5785 ||
   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57780)
 @@ -2116,10 +2125,12 @@ bge_attach(struct device *parent, struct
   sc-bge_tx_max_coal_bds = 400;
  
   /* 5705 limits RX return ring to 512 entries. */
 - if (BGE_IS_5705_PLUS(sc))
 - sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
 - else
 + if (BGE_IS_5700_FAMILY(sc) ||
 + BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717 ||
 + BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57765)
   sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT;
 + else
 + sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
  
   /* Set up ifnet structure */
   ifp = sc-arpcom.ac_if;
 @@ -2188,7 +2199,8 @@ bge_attach(struct device *parent, struct
   /* The SysKonnect SK-9D41 is a 1000baseSX card. */
   if (PCI_PRODUCT(subid) == SK_SUBSYSID_9D41 ||
   (hwcfg  BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
 - if (BGE_IS_5714_FAMILY(sc))
 + if (BGE_IS_5714_FAMILY(sc) ||
 + BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717)
   sc-bge_flags |= BGE_PHY_FIBER_MII;
   else
   sc-bge_flags |= BGE_PHY_FIBER_TBI;
 Index: if_bgereg.h
 ===
 RCS file: /cvs/src/sys/dev/pci/if_bgereg.h,v
 retrieving revision 1.100
 diff -u -p -r1.100 if_bgereg.h
 --- if_bgereg.h   9 Jan 2010 06:19:01 -   1.100
 +++ if_bgereg.h   17 Apr 2010 03:32:24 -
 @@ -1517,6 +1517,7 @@
  #define BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN  0x2000
  #define BGE_RDMAMODE_FIFO_SIZE_128   0x0002
  #define BGE_RDMAMODE_FIFO_LONG_BURST 0x0003
 +#define BGE_RDMAMODE_MULT_DMA_RD_DIS 0x0100
  
  /* Read DMA status register */
  #define BGE_RDMASTAT_PCI_TGT_ABRT_ATTN   0x0004
 @@ -1548,6 +1549,7 @@
  #define BGE_WDMAMODE_ALL_ATTNS   0x03FC
  #define BGE_WDMAMODE_RX_ACCEL0x0400
  #define BGE_WDMAMODE_STATUS_TAG_FIX  0x2000
 +#define BGE_WDMAMODE_BURST_ALL_DATA  0xc000
  
  /* Write DMA status register */
  #define BGE_WDMASTAT_PCI_TGT_ABRT_ATTN   0x0004
 
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Re: bge(4) diff needs testing.

2010-04-21 Thread Brad 
On Wednesday 21 April 2010 20:18:02 Theo de Raadt wrote:
 Which ones should people tests?

The bge(4), msk(4), ne(4) and ep(4) diffs.

bge(4) and msk(4) I have and have tested those respective diffs.
I have no ne(4) or ep(4) hardware, the changes are mechanical but
still need testing.

 Should I assume _all of them_ ... since you probably tested zero yourself?

Well, pretty much everything I post to tech@ I want people to test in some 
manner.

 Can you please report the ones you yourself tested on, before asking others
 to invest time?

Ok. I can definitely do that.

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Re: bge(4) diff needs testing.

2010-04-21 Thread Theo de Raadt 
 On Wednesday 21 April 2010 20:18:02 Theo de Raadt wrote:
  Which ones should people tests?
 
 The bge(4), msk(4), ne(4) and ep(4) diffs.
 
 bge(4) and msk(4) I have and have tested those respective diffs.
 I have no ne(4) or ep(4) hardware, the changes are mechanical but
 still need testing.
 
  Should I assume _all of them_ ... since you probably tested zero yourself?
 
 Well, pretty much everything I post to tech@ I want people to test in some 
 manner.
 
  Can you please report the ones you yourself tested on, before asking others
  to invest time?
 
 Ok. I can definitely do that.

If you want to be taken seriously, every diff you mail out should say
what you have tested _yourself_, before you ask others to test as well.

Re: bge(4) diff needs testing.

2010-04-17 Thread Brad 
On Sat, Apr 10, 2010 at 04:58:36PM -0400, Brad wrote:
 Please test the following diff with any bge(4) adapters. Just checking to
 ensure no regressions with known working adapters. Just check that things
 are working as usual. Just bringing in some fixes for some of the newer
 chipsets soon to appear. Nothing changed with existing chipsets though.

oops. there was a typo in the original diff. please test this revision.


Index: if_bge.c
===
RCS file: /cvs/src/sys/dev/pci/if_bge.c,v
retrieving revision 1.293
diff -u -p -r1.293 if_bge.c
--- if_bge.c6 Apr 2010 15:27:51 -   1.293
+++ if_bge.c17 Apr 2010 03:32:24 -
@@ -1352,9 +1352,12 @@ bge_blockinit(struct bge_softc *sc)
 
/* Configure mbuf pool watermarks */
/* new Broadcom docs strongly recommend these: */
-   if (BGE_IS_5705_PLUS(sc) 
-   BGE_ASICREV(sc-bge_chipid) != BGE_ASICREV_BCM5717 
-   BGE_ASICREV(sc-bge_chipid) != BGE_ASICREV_BCM57765) {
+   if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717 ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57765) {
+   CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
+   CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x2a);
+   CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xa0);
+   } else if (BGE_IS_5705_PLUS(sc)) {
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
 
if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5906) {
@@ -1660,11 +1663,17 @@ bge_blockinit(struct bge_softc *sc)
if (BGE_IS_5755_PLUS(sc))
val |= BGE_WDMAMODE_STATUS_TAG_FIX;
 
+   if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5785)
+   val |= BGE_WDMAMODE_BURST_ALL_DATA;
+
/* Turn on write DMA state machine */
CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
 
val = BGE_RDMAMODE_ENABLE|BGE_RDMAMODE_ALL_ATTNS;
 
+   if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717)
+   val |= BGE_RDMAMODE_MULT_DMA_RD_DIS;
+
if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5784 ||
BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5785 ||
BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57780)
@@ -2116,10 +2125,12 @@ bge_attach(struct device *parent, struct
sc-bge_tx_max_coal_bds = 400;
 
/* 5705 limits RX return ring to 512 entries. */
-   if (BGE_IS_5705_PLUS(sc))
-   sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
-   else
+   if (BGE_IS_5700_FAMILY(sc) ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717 ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57765)
sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT;
+   else
+   sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
 
/* Set up ifnet structure */
ifp = sc-arpcom.ac_if;
@@ -2188,7 +2199,8 @@ bge_attach(struct device *parent, struct
/* The SysKonnect SK-9D41 is a 1000baseSX card. */
if (PCI_PRODUCT(subid) == SK_SUBSYSID_9D41 ||
(hwcfg  BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
-   if (BGE_IS_5714_FAMILY(sc))
+   if (BGE_IS_5714_FAMILY(sc) ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717)
sc-bge_flags |= BGE_PHY_FIBER_MII;
else
sc-bge_flags |= BGE_PHY_FIBER_TBI;
Index: if_bgereg.h
===
RCS file: /cvs/src/sys/dev/pci/if_bgereg.h,v
retrieving revision 1.100
diff -u -p -r1.100 if_bgereg.h
--- if_bgereg.h 9 Jan 2010 06:19:01 -   1.100
+++ if_bgereg.h 17 Apr 2010 03:32:24 -
@@ -1517,6 +1517,7 @@
 #define BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN0x2000
 #define BGE_RDMAMODE_FIFO_SIZE_128 0x0002
 #define BGE_RDMAMODE_FIFO_LONG_BURST   0x0003
+#define BGE_RDMAMODE_MULT_DMA_RD_DIS   0x0100
 
 /* Read DMA status register */
 #define BGE_RDMASTAT_PCI_TGT_ABRT_ATTN 0x0004
@@ -1548,6 +1549,7 @@
 #define BGE_WDMAMODE_ALL_ATTNS 0x03FC
 #define BGE_WDMAMODE_RX_ACCEL  0x0400
 #define BGE_WDMAMODE_STATUS_TAG_FIX0x2000
+#define BGE_WDMAMODE_BURST_ALL_DATA0xc000
 
 /* Write DMA status register */
 #define BGE_WDMASTAT_PCI_TGT_ABRT_ATTN 0x0004

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bge(4) diff needs testing.

2010-04-10 Thread Brad 
Please test the following diff with any bge(4) adapters. Just checking to
ensure no regressions with known working adapters. Just check that things
are working as usual. Just bringing in some fixes for some of the newer
chipsets soon to appear. Nothing changed with existing chipsets though.


Index: if_bge.c
===
RCS file: /cvs/src/sys/dev/pci/if_bge.c,v
retrieving revision 1.293
diff -u -p -r1.293 if_bge.c
--- if_bge.c6 Apr 2010 15:27:51 -   1.293
+++ if_bge.c10 Apr 2010 19:27:19 -
@@ -1352,9 +1375,12 @@ bge_blockinit(struct bge_softc *sc)
 
/* Configure mbuf pool watermarks */
/* new Broadcom docs strongly recommend these: */
-   if (BGE_IS_5705_PLUS(sc) 
-   BGE_ASICREV(sc-bge_chipid) != BGE_ASICREV_BCM5717 
-   BGE_ASICREV(sc-bge_chipid) != BGE_ASICREV_BCM57765) {
+   if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717 ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57765) {
+   CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
+   CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x2a);
+   CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xa0);
+   } else if (BGE_IS_5705_PLUS(sc)) {
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
 
if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5906) {
@@ -1660,11 +1686,17 @@ bge_blockinit(struct bge_softc *sc)
if (BGE_IS_5755_PLUS(sc))
val |= BGE_WDMAMODE_STATUS_TAG_FIX;
 
+   if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5785)
+   val |= BGE_WDMAMODE_BURST_ALL_DATA;
+
/* Turn on write DMA state machine */
CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
 
val = BGE_RDMAMODE_ENABLE|BGE_RDMAMODE_ALL_ATTNS;
 
+   if (BGE_ASICREV(sc-bge_chipi) == BGE_ASICREV_BCM5717)
+   val |= BGE_RDMAMODE_MULT_DMA_RD_DIS;
+
if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5784 ||
BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5785 ||
BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57780)
@@ -2116,10 +2148,12 @@ bge_attach(struct device *parent, struct
sc-bge_tx_max_coal_bds = 400;
 
/* 5705 limits RX return ring to 512 entries. */
-   if (BGE_IS_5705_PLUS(sc))
-   sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
-   else
+   if (BGE_IS_5700_FAMILY(sc) ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717 ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57765)
sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT;
+   else
+   sc-bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
 
/* Set up ifnet structure */
ifp = sc-arpcom.ac_if;
@@ -2188,7 +,8 @@ bge_attach(struct device *parent, struct
/* The SysKonnect SK-9D41 is a 1000baseSX card. */
if (PCI_PRODUCT(subid) == SK_SUBSYSID_9D41 ||
(hwcfg  BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
-   if (BGE_IS_5714_FAMILY(sc))
+   if (BGE_IS_5714_FAMILY(sc) ||
+   BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717)
sc-bge_flags |= BGE_PHY_FIBER_MII;
else
sc-bge_flags |= BGE_PHY_FIBER_TBI;
Index: if_bgereg.h
===
RCS file: /cvs/src/sys/dev/pci/if_bgereg.h,v
retrieving revision 1.100
diff -u -p -r1.100 if_bgereg.h
--- if_bgereg.h 9 Jan 2010 06:19:01 -   1.100
+++ if_bgereg.h 10 Apr 2010 19:27:19 -
@@ -1517,6 +1517,7 @@
 #define BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN0x2000
 #define BGE_RDMAMODE_FIFO_SIZE_128 0x0002
 #define BGE_RDMAMODE_FIFO_LONG_BURST   0x0003
+#define BGE_RDMAMODE_MULT_DMA_RD_DIS   0x0100
 
 /* Read DMA status register */
 #define BGE_RDMASTAT_PCI_TGT_ABRT_ATTN 0x0004
@@ -1548,6 +1549,7 @@
 #define BGE_WDMAMODE_ALL_ATTNS 0x03FC
 #define BGE_WDMAMODE_RX_ACCEL  0x0400
 #define BGE_WDMAMODE_STATUS_TAG_FIX0x2000
+#define BGE_WDMAMODE_BURST_ALL_DATA0xc000
 
 /* Write DMA status register */
 #define BGE_WDMASTAT_PCI_TGT_ABRT_ATTN 0x0004

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Re: bge(4) diff needs testing.

2010-03-19 Thread Dawe 
On Fri, 19 Mar 2010 19:50:58 -0400
Brad b...@comstyle.com wrote:

 Please test the following diff with any bge(4) adapters..
 
 Just check that things run as usual.
 
 Please provide me with a dmesg.
 
 
 Have bge_start check if there are less than 16 free send BDs and if not
 set IFF_OACTIVE and try again later. Previously bge(4) reserved 16 send
 BDs after loading DMA maps but the hardware only requires one reserved
 send BD.
 
 From FreeBSD
 

Well, for my bge(4) things run as usual.

OpenBSD 4.7-current (GENERIC.MP) #0: Sat Mar 20 02:06:43 CET 2010
d...@liltree.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 1062203392 (1012MB)
avail mem = 1022468096 (975MB)
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 2.3 @ 0xf0450 (77 entries)
bios0: vendor Dell Inc. version 2.6.1 date 12/06/2007
bios0: Dell Inc. OptiPlex 745
acpi0 at bios0: rev 2
acpi0: tables DSDT FACP SSDT APIC BOOT ASF! MCFG HPET SLIC SSDT SSDT SSDT
acpi0: wakeup devices VBTN(S4) PCI0(S5) PCI4(S5) PCI2(S5) PCI3(S5) PCI1(S5) 
PCI5(S5) PCI6(S5) MOU_(S3) USB0(S3) USB1(S3) USB2(S3) USB3(S3) USB4(S3)
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel(R) Core(TM)2 CPU 6300 @ 1.86GHz, 1860.88 MHz
cpu0: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,CX16,xTPR,NXE,LONG
cpu0: 2MB 64b/line 8-way L2 cache
cpu0: apic clock running at 265MHz
cpu1 at mainbus0: apid 1 (application processor)
cpu1: Intel(R) Core(TM)2 CPU 6300 @ 1.86GHz, 1860.65 MHz
cpu1: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,CX16,xTPR,NXE,LONG
cpu1: 2MB 64b/line 8-way L2 cache
ioapic0 at mainbus0: apid 8 pa 0xfec0, version 20, 24 pins
ioapic0: misconfigured as apic 0, remapped to apid 8
acpihpet0 at acpi0: 14318179 Hz
acpiprt0 at acpi0: bus 3 (PCI4)
acpiprt1 at acpi0: bus 1 (PCI2)
acpiprt2 at acpi0: bus -1 (PCI3)
acpiprt3 at acpi0: bus -1 (PCI1)
acpiprt4 at acpi0: bus 2 (PCI5)
acpiprt5 at acpi0: bus -1 (PCI6)
acpiprt6 at acpi0: bus 0 (PCI0)
acpicpu0 at acpi0: PSS
acpicpu1 at acpi0: PSS
acpibtn0 at acpi0: VBTN
cpu0: Enhanced SpeedStep 1860 MHz: speeds: 1867, 1600 MHz
memory map conflict 0x3f603c00/0x9fc400
pci0 at mainbus0 bus 0
pchb0 at pci0 dev 0 function 0 Intel 82Q965 Host rev 0x02
vga1 at pci0 dev 2 function 0 Intel 82Q965 Video rev 0x02
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
intagp0 at vga1
agp0 at intagp0: aperture at 0xd000, size 0x1000
inteldrm0 at vga1: apic 8 int 16 (irq 11)
drm0 at inteldrm0
Intel 82Q965 Video rev 0x02 at pci0 dev 2 function 1 not configured
uhci0 at pci0 dev 26 function 0 Intel 82801H USB rev 0x02: apic 8 int 16 (irq 
11)
uhci1 at pci0 dev 26 function 1 Intel 82801H USB rev 0x02: apic 8 int 17 (irq 
10)
ehci0 at pci0 dev 26 function 7 Intel 82801H USB rev 0x02: apic 8 int 22 (irq 
9)
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 Intel EHCI root hub rev 2.00/1.00 addr 1
azalia0 at pci0 dev 27 function 0 Intel 82801H HD Audio rev 0x02: apic 8 int 
16 (irq 11)
azalia0: codecs: Analog Devices AD1983
audio0 at azalia0
ppb0 at pci0 dev 28 function 0 Intel 82801H PCIE rev 0x02: apic 8 int 16 (irq 
11)
pci1 at ppb0 bus 1
ppb1 at pci0 dev 28 function 4 Intel 82801H PCIE rev 0x02: apic 8 int 16 (irq 
11)
pci2 at ppb1 bus 2
bge0 at pci2 dev 0 function 0 Broadcom BCM5754 rev 0x02, BCM5754/5787 A2 
(0xb002): apic 8 int 16 (irq 11), address 00:18:8b:69:fe:dd
brgphy0 at bge0 phy 1: BCM5787 10/100/1000baseT PHY, rev. 0
uhci2 at pci0 dev 29 function 0 Intel 82801H USB rev 0x02: apic 8 int 23 (irq 
5)
uhci3 at pci0 dev 29 function 1 Intel 82801H USB rev 0x02: apic 8 int 17 (irq 
10)
uhci4 at pci0 dev 29 function 2 Intel 82801H USB rev 0x02: apic 8 int 18 (irq 
9)
ehci1 at pci0 dev 29 function 7 Intel 82801H USB rev 0x02: apic 8 int 23 (irq 
5)
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 Intel EHCI root hub rev 2.00/1.00 addr 1
ppb2 at pci0 dev 30 function 0 Intel 82801BA Hub-to-PCI rev 0xf2
pci3 at ppb2 bus 3
pcib0 at pci0 dev 31 function 0 Intel 82801H LPC rev 0x02
pciide0 at pci0 dev 31 function 2 Intel 82801H SATA rev 0x02: DMA, channel 0 
configured to native-PCI, channel 1 configured to native-PCI
pciide0: using apic 8 int 20 (irq 10) for native-PCI interrupt
wd0 at pciide0 channel 0 drive 0: SAMSUNG HD103UJ
wd0: 16-sector PIO, LBA48, 953869MB, 1953525168 sectors
wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 6
atapiscsi0 at pciide0 channel 1 drive 0
scsibus0 at atapiscsi0: 2 targets
cd0 at scsibus0 targ 0 lun 0: SONY, DVD-ROM DDU810A, KD38 ATAPI 5/cdrom 
removable
cd0(pciide0:1:0): using PIO mode 4, Ultra-DMA mode 2
ichiic0 at pci0 dev 31 function 3 Intel 82801H SMBus rev 0x02: apic 8 int 20 
(irq 10)
iic0 at ichiic0
spdmem0 at iic0 addr 0x50: 1GB DDR2 SDRAM