Re: [time-nuts] SMD TADD-1 distribution amplifier

2015-12-22 Thread Bruce Griffiths
My point was that the PN performance of a device (eg OPA355) with largish 
flicker noise can sometimes be a bit better than one might naively expect. The 
OPA355's flicker voltage noise is 30dB worse than some wideband bipolar opamps.

Note: I don't recommend this particular fixed gain opamp for critical 
applications because its PN floor is relatively high (a bit below -160dBc/Hz 
with 10 dBm 10MHz input). I originally intended to use it to buffer the output 
of a ringing parallel LC circuit. However a good discrete enhanced CB stage 
may also suffice.

The state of the art PN noise for an isolation amp as well as most of the MMIC 
devices in Wenzel's amplifier list appears to be around -150dBc/Hz.

It would be useful to have PN plots available for various amplifiers including 
some with high flicker noise for comparison purposes.

I can provide some of these.
My instrumentation noise floor (@10MHz) is below -200dBc/Hz if I use the 
interferometer.
The corresponding instrument PN floor is around -170dBc/Hz @1Hz (limited 
primarily by the splitter PN).
Each measurement typically takes 12 hours or so to achieve this flicker PN 
performance.

If I were to find the space for a couple of 10MHz Wilkinson splitters it may be 
possible to lower the instrumentation flicker PN to below -170dBc/Hz.

Bruce

On Tuesday, December 22, 2015 01:36:50 PM Charles Steinmetz wrote:
> Bruce wrote:
> >Such blanket statements aren't a particularly useful guide unless
> >calibrated by measurements.
> >* * *
> >The input voltage noise @1Hz can't be used directly to estimate the
> >PN noise at 1Hz offset.
> 
> My message referred readers to previous list messages for a more
> detailed explanation, and recommended a particular search term.  If
> you had done that, you would have gone straight to a message in which
> I explained that one cannot directly correlate noise density
> measurements with PN because each amplifier implementation has its
> own specific mechanism of AM-PM conversion.
> 
> That said, when one limits the discussion to inductorless, monolithic
> amplifiers, I have not observed anywhere near the quantitative
> differences between amplifiers (with respect to AM-PM conversion)
> that it would take to equalize the PN contributions of two amplifiers
> whose baseband noise voltage densities differ by more than 40dB (as
> is the case when comparing the MAX477/AD8055 with available low-noise
> parts).  So, yes, when a part has an input voltage noise density
> *that* much worse than other available parts, one can conclude
> without detailed measurements that it is not a promising candidate
> for use as a low-PN amplifier.
> 
> Best regards,
> 
> Charles
> 
> 
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Re: [time-nuts] SMD TADD-1 distribution amplifier

2015-12-22 Thread Charles Steinmetz

Bruce wrote:

Such blanket statements aren't a particularly useful guide unless 
calibrated by measurements.

* * *
The input voltage noise @1Hz can't be used directly to estimate the 
PN noise at 1Hz offset.


My message referred readers to previous list messages for a more 
detailed explanation, and recommended a particular search term.  If 
you had done that, you would have gone straight to a message in which 
I explained that one cannot directly correlate noise density 
measurements with PN because each amplifier implementation has its 
own specific mechanism of AM-PM conversion.


That said, when one limits the discussion to inductorless, monolithic 
amplifiers, I have not observed anywhere near the quantitative 
differences between amplifiers (with respect to AM-PM conversion) 
that it would take to equalize the PN contributions of two amplifiers 
whose baseband noise voltage densities differ by more than 40dB (as 
is the case when comparing the MAX477/AD8055 with available low-noise 
parts).  So, yes, when a part has an input voltage noise density 
*that* much worse than other available parts, one can conclude 
without detailed measurements that it is not a promising candidate 
for use as a low-PN amplifier.


Best regards,

Charles


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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread Graham / KE9H
Are they running off the same power supply?
If so, I would run them from different power supplies as an experiment.
--- Graham

==

On Tue, Dec 22, 2015 at 6:19 AM, Attila Kinali  wrote:

> On Tue, 22 Dec 2015 11:57:55 +0100
> Mike Cook  wrote:
>
> > > A sampling difference of 1 cycle with 48Mhz clocks would give you ~21ns
> > offset if not using sawtooth correction. Can you do the sawtooth
> correction
> > and see if the offset is reduced?
>
> This is the most likely explanation. The LEA-6 modules use a 24MHz
> oscillator
> which is doubled for the processor, leading to the 48MHz clock.
>
> >   Good thinking Brian. But I would expect the difference to wander from
> 21s
> > UNLESS the the two receivers clocks are lock stepping. Injection locking
> > might do this if the two module are physically close enough.
>
> Injection locking wont work by simply playing the modules close to
> eachother.
> The oscillators are shielded well enough that quite some injection energy
> would
> be needed. Unless the TIMEPULSE2 output of one module is used to generate a
> 8MHz signal which is directly injected into the power suplly of the other,
> i
> don't see how injection locking would work. And even then, I wouldn't be
> sure
> if injection locking could be acheived.
>
> What could be done, though, is to lift the shield over the cpu side of the
> LEA-6, unsolder the oscillator and use an external 24MHz oscillator to
> supply both LEA-6 modules.
>
> If you do this, you could even go as far as to use the sawtooth correction
> message to stear the reference oscillator. That way you wouldn't need to
> measure the PPS output and could to a "fully" digital control system
> instead.
>
> Attila Kinali
>
> --
> It is upon moral qualities that a society is ultimately founded. All
> the prosperity and technological sophistication in the world is of no
> use without that foundation.
>  -- Miss Matheson, The Diamond Age, Neil Stephenson
> ___
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Re: [time-nuts] SMD TADD-1 distribution amplifier - seeking comments and suggestions?

2015-12-22 Thread Bruce Griffiths
Thanks, driving the input with a low PN OCXO is probably the difference, John 
Miles used an HP8642 - not quite as low PN.
The PN test set is supposed to reject the source PN as it drives both inputs 
of the PN test set. However this rejection isn't perfect.
I'll try driving a 74AC04 input directly (I have sufficient signal level for 
this at the output of various low PN amplifiers). I'll also see if I can just 
measure the output of a single gate using a pair of low PN amps to drive the 
Timepod Channel0 and Channel2 inputs separately..

Deuterating the chip apparently reduces flicker noise more effectively than 
simply using Hydrogen to terminate dangling Si bonds at the oxide interface.
However I guess there's no easy way to determine if the chip was soaked in 
hydrogen or deuterium?? Perhaps baking the packaged chip in deuterium might 
help if the passivation and package are sufficiently permeable.

Bruce

On Tuesday, December 22, 2015 07:49:42 AM Bob Camp wrote:
> Hi
> 
> To be very specific about the floor on the gates (as measured with a
> TimePod):
> 
> 1) Clean 5.5V supply (max the part can rationally take).
> 2) Input signal L network transformed to just below the protection diode
> threshold (roughly 6V p-p) 3) Input signal to the power splitter is from an
> OCXO so it’s pretty clean and does not have a lot of “junk” on it. 4)
> Output is Tee network matched off of a pair of gates in parallel 5) Power
> supply is clean, but nothing special (LT1764).
> 
> I believe there are plots in the archives.
> 
> Bob
> 
> > On Dec 21, 2015, at 10:20 PM, Bruce Griffiths 
> > wrote:
> > 
> > Do those modern CMOS gates use deuterated wafers?I've not found any
> > measurements of the PN of modern CMOS gates.The measurements of devices
> > like the venerable 74AC04 indicate a PN floor around 10dBc/Hz worse than
> > that. Bruce
> > 
> >On Tuesday, 22 December 2015 3:00 PM, Bob Camp  wrote:
> > Hi
> > 
> > To go through the whole deal a step at a time *assuming* that broadband
> > noise is the only issue:
> > 
> > -147 dbm noise per Hz
> > +10 dbm signal
> > 
> > => -157 dbc / Hz
> > 
> > half to AM, half to PM
> > 
> > => -160 dbc / Hz
> > 
> > ssb is already taken care of (noise on both sides if it’s broadband)
> > 
> > => -160 dbc / Hz
> > 
> > Now, assuming you have a modulation on the edge due to low frequency
> > noise:
> > 
> > -147 dbm noise per Hz
> > +10 dbm signal
> > +0 conversion gain (might be less, rarely is more)
> > 
> > => -157 dbc / Hz
> > 
> > It all may go to PM so
> > 
> > => -157 dbc / Hz
> > 
> > It’s DSB (sidebands are coherent) modulation so
> > 
> > => -151 dbc / Hz
> > 
> > You could easily say that all of the stuff after the conversion gain
> > number is just messing around. That would indeed be correct. All that has
> > been done is to calculate a conversion gain for low frequency noise to PM
> > as read by a phase noise test set. The main point is to illustrate that
> > you may be *more* sensitive to low frequency noise than you might think.
> > 
> > =
> > 
> > Biased CMOS gates are looking better and better … -175 dbc / Hz floor with
> > a 7 dbm input …. :)
> > 
> > Bob
> > 
> >> On Dec 21, 2015, at 3:05 PM, Anders Wallin  
wrote:
>  AD8055 in non-inverting circuit with 1+2k7/2k7 gain has 9.6 nV/sqrt(Hz)
>  input-referred voltage noise PSD (if I calculated correctly..)
> >>> 
> >>> With +10dBm input the corresponding SSB PN floor should be  around
> >>> -163dBc/Hz.
> >> 
> >> HI,
> >> How is that calculated? I only get this far:
> >> 9.6nV/sqrt(Hz) into a 50R load is 1.8e-18 W/Hz or -147.3 dBm/Hz
> >> 
> >> what then? split half-and-half into AM and PN, and how to relate that to
> >> the carrier power +10dBm?
> >> 
> >> thanks,
> >> Anders
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> > 
> > 
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Re: [time-nuts] SMD TADD-1 distribution amplifier - seeking comments and suggestions?

2015-12-22 Thread Bob Camp
Hi

Indeed, driving the device with a low noise (as in -175 dbc/Hz) OCXO does 
produce the expected -172 dbc/Hz
output. Checking either with a power splitter ahead of the sine to square 
conversion or splitting with logic gates
after the conversion yields a similar floor number. Close in noise is indeed 
higher than -175, but it’s still better 
than any source you can buy to drive the device.

Bob



> On Dec 22, 2015, at 2:07 PM, Bruce Griffiths  
> wrote:
> 
> Thanks, driving the input with a low PN OCXO is probably the difference, John 
> Miles used an HP8642 - not quite as low PN.
> The PN test set is supposed to reject the source PN as it drives both inputs 
> of the PN test set. However this rejection isn't perfect.
> I'll try driving a 74AC04 input directly (I have sufficient signal level for 
> this at the output of various low PN amplifiers). I'll also see if I can just 
> measure the output of a single gate using a pair of low PN amps to drive the 
> Timepod Channel0 and Channel2 inputs separately..
> 
> Deuterating the chip apparently reduces flicker noise more effectively than 
> simply using Hydrogen to terminate dangling Si bonds at the oxide interface.
> However I guess there's no easy way to determine if the chip was soaked in 
> hydrogen or deuterium?? Perhaps baking the packaged chip in deuterium might 
> help if the passivation and package are sufficiently permeable.
> 
> Bruce
> 
> On Tuesday, December 22, 2015 07:49:42 AM Bob Camp wrote:
>> Hi
>> 
>> To be very specific about the floor on the gates (as measured with a
>> TimePod):
>> 
>> 1) Clean 5.5V supply (max the part can rationally take).
>> 2) Input signal L network transformed to just below the protection diode
>> threshold (roughly 6V p-p) 3) Input signal to the power splitter is from an
>> OCXO so it’s pretty clean and does not have a lot of “junk” on it. 4)
>> Output is Tee network matched off of a pair of gates in parallel 5) Power
>> supply is clean, but nothing special (LT1764).
>> 
>> I believe there are plots in the archives.
>> 
>> Bob
>> 
>>> On Dec 21, 2015, at 10:20 PM, Bruce Griffiths 
>>> wrote:
>>> 
>>> Do those modern CMOS gates use deuterated wafers?I've not found any
>>> measurements of the PN of modern CMOS gates.The measurements of devices
>>> like the venerable 74AC04 indicate a PN floor around 10dBc/Hz worse than
>>> that. Bruce
>>> 
>>>   On Tuesday, 22 December 2015 3:00 PM, Bob Camp  wrote:
>>> Hi
>>> 
>>> To go through the whole deal a step at a time *assuming* that broadband
>>> noise is the only issue:
>>> 
>>> -147 dbm noise per Hz
>>> +10 dbm signal
>>> 
>>> => -157 dbc / Hz
>>> 
>>> half to AM, half to PM
>>> 
>>> => -160 dbc / Hz
>>> 
>>> ssb is already taken care of (noise on both sides if it’s broadband)
>>> 
>>> => -160 dbc / Hz
>>> 
>>> Now, assuming you have a modulation on the edge due to low frequency
>>> noise:
>>> 
>>> -147 dbm noise per Hz
>>> +10 dbm signal
>>> +0 conversion gain (might be less, rarely is more)
>>> 
>>> => -157 dbc / Hz
>>> 
>>> It all may go to PM so
>>> 
>>> => -157 dbc / Hz
>>> 
>>> It’s DSB (sidebands are coherent) modulation so
>>> 
>>> => -151 dbc / Hz
>>> 
>>> You could easily say that all of the stuff after the conversion gain
>>> number is just messing around. That would indeed be correct. All that has
>>> been done is to calculate a conversion gain for low frequency noise to PM
>>> as read by a phase noise test set. The main point is to illustrate that
>>> you may be *more* sensitive to low frequency noise than you might think.
>>> 
>>> =
>>> 
>>> Biased CMOS gates are looking better and better … -175 dbc / Hz floor with
>>> a 7 dbm input …. :)
>>> 
>>> Bob
>>> 
 On Dec 21, 2015, at 3:05 PM, Anders Wallin  
> wrote:
>> AD8055 in non-inverting circuit with 1+2k7/2k7 gain has 9.6 nV/sqrt(Hz)
>> input-referred voltage noise PSD (if I calculated correctly..)
> 
> With +10dBm input the corresponding SSB PN floor should be  around
> -163dBc/Hz.
 
 HI,
 How is that calculated? I only get this far:
 9.6nV/sqrt(Hz) into a 50R load is 1.8e-18 W/Hz or -147.3 dBm/Hz
 
 what then? split half-and-half into AM and PN, and how to relate that to
 the carrier power +10dBm?
 
 thanks,
 Anders
 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the
 instructions there.
>>> 
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Re: [time-nuts] 5370B stop trigger not working

2015-12-22 Thread Jim Palfreyman
Thanks Chris.

I'm beginning to think my 5370B is heading towards a boat anchor.

We (as in all time-nut owners of 5370s) seriously need to research a
replacement part/circuit for the 7061/7062 parts.


Jim


On 22 December 2015 at 07:44, Christopher E. Brown  wrote:

>
> You might want to re-scope the start and stop channel outputs where they
> cross A4 and
> verify against the front panel labels.
>
> The signal line crossing A4 that lines up with frontpanel start is start
> and the one that
> lines up with stop is stop.
>
>
> I mention this because the A3 board is a carry over from another unit and
> the start/stop
> labeling on the board itself is reversed from the 5370B front panel labels
> and the parts
> list follows the board labeling.  So, if you read front panel and lookup
> P/N in list you
> get the wrong one.
>
>
> The safe thing is to follow back from the output crossing A4 that is
> failing and
> physically pull the hybrid and read the P/N on the mounting frame.  It
> should be a metal
> can in a screw together frame, the part is socketed.
>
>
> Once the A3 is out, do not remove the screws in frame, they just clamp the
> frame to part.
>  Whole thing is held in by the collar on the pot shaft.
>
>
> For a 5370B
>
> 5088-7061 (start channel hybrid)
> 5088-7062 (stop channel hybrid)
>
> the manual lists it reversed, and they are actually different parts (not
> just diff
> mounting frames) with crossed up triggers.
>
>
> 7061 (actual start manual lists as stop) is the one that usually fails and
> is almost
> impossible to find.  Took me several years (and the help of another nut
> with a parts unit)
> to get a working one.  7062 is much easier to find.
>
>
> On 12/13/2015 11:26 AM, Jim Palfreyman wrote:
> > Oops yes! I looked up the wrong item. I meant A3U1 which is 5088-7061
> >
> > Jim
> >
> >
> > On Sunday, 13 December 2015, Cok  wrote:
> >
> >> According to the partlist A4U1 and A4U2 seems to be TL072CP opamps.
> >>
> >>>
> >>> jim77...@gmail.com said:
> >>>
>  I have gone through the troubleshooting process from the manual and it
>  seems
>  to point to A4U2 (Schmidt trigger) being faulty.
> 
> >>> I'd put a scope on it to check.
> >>>
> >>> Before I dive into this, does anyone have any advice? Most important
> being
>  the Schmidt trigger - where do I get one?
> 
> >>> You need more info - the manufacturer's part number or something like
> >>> that.
> >>>
> >>>
> >> ___
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Re: [time-nuts] SMD TADD-1 distribution amplifier - seeking comments and suggestions?

2015-12-22 Thread Bob Camp
Hi

To be very specific about the floor on the gates (as measured with a TimePod):

1) Clean 5.5V supply (max the part can rationally take).
2) Input signal L network transformed to just below the protection diode 
threshold (roughly 6V p-p)
3) Input signal to the power splitter is from an OCXO so it’s pretty clean and 
does not have a lot of “junk” on it.
4) Output is Tee network matched off of a pair of gates in parallel 
5) Power supply is clean, but nothing special (LT1764). 

I believe there are plots in the archives. 

Bob


> On Dec 21, 2015, at 10:20 PM, Bruce Griffiths  
> wrote:
> 
> Do those modern CMOS gates use deuterated wafers?I've not found any 
> measurements of the PN of modern CMOS gates.The measurements of devices like 
> the venerable 74AC04 indicate a PN floor around 10dBc/Hz worse than that.
> Bruce
> 
> 
>On Tuesday, 22 December 2015 3:00 PM, Bob Camp  wrote:
> 
> 
> Hi
> 
> To go through the whole deal a step at a time *assuming* that broadband noise 
> is the only issue:
> 
> -147 dbm noise per Hz
> +10 dbm signal
> 
> => -157 dbc / Hz
> 
> half to AM, half to PM
> 
> => -160 dbc / Hz
> 
> ssb is already taken care of (noise on both sides if it’s broadband)
> 
> => -160 dbc / Hz 
> 
> Now, assuming you have a modulation on the edge due to low frequency noise:
> 
> -147 dbm noise per Hz
> +10 dbm signal 
> +0 conversion gain (might be less, rarely is more)
> 
> => -157 dbc / Hz
> 
> It all may go to PM so
> 
> => -157 dbc / Hz
> 
> It’s DSB (sidebands are coherent) modulation so 
> 
> => -151 dbc / Hz
> 
> You could easily say that all of the stuff after the conversion gain number 
> is just messing around. 
> That would indeed be correct. All that has been done is to calculate a 
> conversion gain for low 
> frequency noise to PM as read by a phase noise test set. The main point is to 
> illustrate that you 
> may be *more* sensitive to low frequency noise than you might think. 
> 
> =
> 
> Biased CMOS gates are looking better and better … -175 dbc / Hz floor with a 
> 7 dbm input …. :)
> 
> Bob
> 
> 
> 
> 
>> On Dec 21, 2015, at 3:05 PM, Anders Wallin  
>> wrote:
>> 
 AD8055 in non-inverting circuit with 1+2k7/2k7 gain has 9.6 nV/sqrt(Hz)
 input-referred voltage noise PSD (if I calculated correctly..)
>>> 
>>> With +10dBm input the corresponding SSB PN floor should be  around
>>> -163dBc/Hz.
>>> 
>> 
>> HI,
>> How is that calculated? I only get this far:
>> 9.6nV/sqrt(Hz) into a 50R load is 1.8e-18 W/Hz or -147.3 dBm/Hz
>> 
>> what then? split half-and-half into AM and PN, and how to relate that to
>> the carrier power +10dBm?
>> 
>> thanks,
>> Anders
>> ___
>> time-nuts mailing list -- time-nuts@febo.com
>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>> and follow the instructions there.
> 
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> 
> 
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[time-nuts] GPSDO oscillator steering and phase microsteppers

2015-12-22 Thread Attila Kinali
Moin,

Thanks everyone for their input. Unfortunately the last few days were
a bit stressy and I couldn't go through all the mails in depth yet.
I will do that in the following days and come back with more questions :-)

Attila Kinali
-- 
It is upon moral qualities that a society is ultimately founded. All 
the prosperity and technological sophistication in the world is of no 
use without that foundation.
 -- Miss Matheson, The Diamond Age, Neil Stephenson
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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread Attila Kinali
On Tue, 22 Dec 2015 11:57:55 +0100
Mike Cook  wrote:

> > A sampling difference of 1 cycle with 48Mhz clocks would give you ~21ns
> offset if not using sawtooth correction. Can you do the sawtooth correction
> and see if the offset is reduced?

This is the most likely explanation. The LEA-6 modules use a 24MHz oscillator
which is doubled for the processor, leading to the 48MHz clock.

>   Good thinking Brian. But I would expect the difference to wander from 21s
> UNLESS the the two receivers clocks are lock stepping. Injection locking
> might do this if the two module are physically close enough. 

Injection locking wont work by simply playing the modules close to eachother.
The oscillators are shielded well enough that quite some injection energy would
be needed. Unless the TIMEPULSE2 output of one module is used to generate a
8MHz signal which is directly injected into the power suplly of the other, i
don't see how injection locking would work. And even then, I wouldn't be sure
if injection locking could be acheived. 

What could be done, though, is to lift the shield over the cpu side of the
LEA-6, unsolder the oscillator and use an external 24MHz oscillator to
supply both LEA-6 modules.

If you do this, you could even go as far as to use the sawtooth correction
message to stear the reference oscillator. That way you wouldn't need to
measure the PPS output and could to a "fully" digital control system instead.

Attila Kinali

-- 
It is upon moral qualities that a society is ultimately founded. All 
the prosperity and technological sophistication in the world is of no 
use without that foundation.
 -- Miss Matheson, The Diamond Age, Neil Stephenson
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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread Mike Cook

> Le 22 déc. 2015 à 06:16, Brian Inglis  a 
> écrit :
> 
> On 2015-12-21 18:24, d...@irtelemetrics.com wrote:
>> So I've been playing with some timing hardware here, and have noticed 
>> something rather curious. I have two otherwise identical Lea-6T GPS modules, 
>> configured exactly the same. These units are tied to the same antenna, with 
>> a splitter with the same length cables running to each unit. They were given 
>> the same survey coordinates. Initially there was not any appreciable 
>> difference between the PPS outputs. The outputs were on average within about 
>> one nS of each other. However after a day or two they started to display a 
>> difference of about 21nS between the PPS outputs. This is also evident in 
>> the GPSDO output, as the phase of the 10Mhz is also skewed by 21nS or so.
>> 
>> A few days ago I started a 48 hour survey. The came up virtually identical 
>> coordinates at the end of that survey. After the survey the phase is still 
>> 21nS different.
>> 
>> At this point, my only thought is the GPS splitter. It's DC coupled to one 
>> unit, and AC coupled to the other. It is possible there are some delays on 
>> one output vs. the other due to the blocking caps and bypass inductor in the 
>> splitter. I've tried swapping the GPSDO units on the splitter, so we'll see 
>> what happens there.
>> Can anyone offer any insight as to why the two units may have a different 
>> PPS output timing? It's not really a problem, more of a curiosity and mildly 
>> academic exercise.
> 
> A sampling difference of 1 cycle with 48Mhz clocks would give you ~21ns 
> offset if not using sawtooth correction. Can you do the sawtooth correction 
> and see if the offset is reduced?
> 

  Good thinking Brian. But I would expect the difference to wander from 21s 
UNLESS the the two receivers clocks are lock stepping. Injection locking might 
do this if the two module are physically close enough. 

> -- 
> Take care. Thanks, Brian Inglis, Calgary, Alberta, Canada
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Re: [time-nuts] Timestamps in audio files?

2015-12-22 Thread Götz Romahn

there is a timecode associated with Audio CDs.
https://en.wikipedia.org/wiki/Compact_Disc_Digital_Audio
maybe this helps, Götz


Am 21.12.2015 um 22:06 schrieb Hal Murray:


tsho...@gmail.com said:

I know of many proprietary digital recording applications that make WAV's or
MP3's or proprietary codec formats, where the filename includes a timestamp.
Much more interested in standard formats where the timestamp is embedded in
the file itself.


What sort of accuracy to you want?  Is nearest second good enough or do you
want time-nut level accuracy?

One thing to keep in mind is that the recording clock may not be accurate, so
if all you know is the start time, your error bars grow as you move down the
file.

Recording IRIG on another channel is the best suggestion I've seen.




--
Götz Romahn
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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread Hal Murray

paulsw...@gmail.com said:
> I think you are doing the right test to see if the splitter delay is the
> issue 21 ns is mighty small and a real possibility. 

21 ns is huge.  That's 10 inches of PCB trace.  74AC00 at 5V is 6.6 ns, so 
that's 3 gates.

But in any case, it would be obvious after the OP swapped the cables.


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These are my opinions.  I hate spam.



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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread Andrea Baldoni
On Mon, Dec 21, 2015 at 08:24:37PM -0500, d...@irtelemetrics.com wrote:

> difference of about 21nS between the PPS outputs. This is also evident in
> the GPSDO output, as the phase of the 10Mhz is also skewed by 21nS or so. 

21nS are about 1/48MHz, if internally LEA-6T has this clock and the PPS
output is not sawtooth corrected, you just have one of the two one clock tick
ahead of the other.

Best regards,
Andrea Baldoni
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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread Brian Inglis

On 2015-12-21 18:24, d...@irtelemetrics.com wrote:

So I've been playing with some timing hardware here, and have noticed something 
rather curious. I have two otherwise identical Lea-6T GPS modules, configured 
exactly the same. These units are tied to the same antenna, with a splitter 
with the same length cables running to each unit. They were given the same 
survey coordinates. Initially there was not any appreciable difference between 
the PPS outputs. The outputs were on average within about one nS of each other. 
However after a day or two they started to display a difference of about 21nS 
between the PPS outputs. This is also evident in the GPSDO output, as the phase 
of the 10Mhz is also skewed by 21nS or so.

A few days ago I started a 48 hour survey. The came up virtually identical 
coordinates at the end of that survey. After the survey the phase is still 21nS 
different.

At this point, my only thought is the GPS splitter. It's DC coupled to one 
unit, and AC coupled to the other. It is possible there are some delays on one 
output vs. the other due to the blocking caps and bypass inductor in the 
splitter. I've tried swapping the GPSDO units on the splitter, so we'll see 
what happens there.
Can anyone offer any insight as to why the two units may have a different PPS 
output timing? It's not really a problem, more of a curiosity and mildly 
academic exercise.


A sampling difference of 1 cycle with 48Mhz clocks would give you ~21ns offset 
if not using sawtooth correction. Can you do the sawtooth correction and see if 
the offset is reduced?

--
Take care. Thanks, Brian Inglis, Calgary, Alberta, Canada
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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread timeok
To verify if the where the delay is generated, antenna and splitter or GPS,  
simply invert the antenna cable on the GPSs antenna connector and verify if the 
delay change as sign.

Luciano




On Tue 22/12/15 02:24 , d...@irtelemetrics.com wrote:

> Hi All,
>  
> So I've been playing with some timing hardware here, and have noticed 
> something rather curious. I have two otherwise identical Lea-6T GPS 
> modules, configured exactly the same. These units are tied to the same 
> antenna, with a splitter with the same length cables running to each 
> unit. They were given the same survey coordinates. Initially there was 
> not any appreciable difference between the PPS outputs. The outputs 
> were on average within about one nS of each other. However after a day 
> or two they started to display a difference of about 21nS between the 
> PPS outputs. This is also evident in the GPSDO output, as the phase of 
> the 10Mhz is also skewed by 21nS or so. 
>  
> A few days ago I started a 48 hour survey. The came up virtually 
> identical coordinates at the end of that survey. After the survey the 
> phase is still 21nS different. 
>  
> At this point, my only thought is the GPS splitter. It's DC coupled to 
> one unit, and AC coupled to the other. It is possible there are some 
> delays on one output vs. the other due to the blocking caps and bypass 
> inductor in the splitter. I've tried swapping the GPSDO units on the 
> splitter, so we'll see what happens there. 
>  
> Can anyone offer any insight as to why the two units may have a 
> different PPS output timing? It's not really a problem, more of a 
> curiosity and mildly academic exercise. 
>  
> Thanks,
> Dan
>  
>  
>  
>  
>  
>  
> 
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> 
> Links:
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Re: [time-nuts] PPS phase between two GPS units.

2015-12-22 Thread Alexander Pummer


swap the two receivers and see which one is leading, if leading is 
changing the delay difference is with the antenna signal distribution

73
KJ6UHN
Alex
On 12/21/2015 8:03 PM, paul swed wrote:

I think you are doing the right test to see if the splitter delay is the
issue 21 ns is mighty small and a real possibility.
Regards
Paul
WB8TSL

On Mon, Dec 21, 2015 at 8:24 PM,  wrote:


Hi All,

So I've been playing with some timing hardware here, and have noticed
something rather curious. I have two otherwise identical Lea-6T GPS
modules, configured exactly the same. These units are tied to the same
antenna, with a splitter with the same length cables running to each unit.
They were given the same survey coordinates. Initially there was not any
appreciable difference between the PPS outputs. The outputs were on average
within about one nS of each other. However after a day or two they started
to display a difference of about 21nS between the PPS outputs. This is also
evident in the GPSDO output, as the phase of the 10Mhz is also skewed by
21nS or so.

A few days ago I started a 48 hour survey. The came up virtually identical
coordinates at the end of that survey. After the survey the phase is still
21nS different.

At this point, my only thought is the GPS splitter. It's DC coupled to one
unit, and AC coupled to the other. It is possible there are some delays on
one output vs. the other due to the blocking caps and bypass inductor in
the splitter. I've tried swapping the GPSDO units on the splitter, so we'll
see what happens there.
Can anyone offer any insight as to why the two units may have a different
PPS output timing? It's not really a problem, more of a curiosity and
mildly academic exercise.
Thanks,
Dan







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