[time-nuts] 1 PPS 50-ohm driver

2016-04-16 Thread Stewart Cobb
Here's a scope photo from a PPS driver built exactly to the description in
my earlier post.  It's a 74ACT04 in a TSSOP package, with five parallel
outputs driving five 220-ohm resistors (0402 SMT) to form a 50-ohm output.

The photo shows 2 ns rise time for the leading edge of the pulse. The scope
bandwidth is around 1 GHz, so this measurement is pushing its limits.  The
pulse looks fairly clean, but with a bit more care in layout and cabling,
it might get even better.

Cheers!
--Stu
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Re: [time-nuts] Advise on building a DIY GPSDO?

2016-04-16 Thread Andrew Rodland
On Sun, Apr 3, 2016 at 6:04 PM, Nicolas Braud-Santoni
 wrote:
> Hi,
>
> I've been slowly becoming a fellow timenut over the last few years,
>   though said nuttery had yet to go beyond adding some wiring to
>   get the PPS signal out of my GPS and into my NTPd.
>
>
> Lately, I have been looking into designing & building a home-brew
>   GPSDO (and my copy of TAoE 3rd ed. came in quite handy), but quite
>   a few questions came up:
>
> - Does it indeed make sense to build a GPSDO using an “ordinary”
>   high-quality oscillator? (as opposed to using a Ru standard)
>
>   It seems that decomissioned rubidium standards are large, rather
>   expensive (hundreds of €), consume lots of power and have
>   uncertain lifetime.

Depending on your definition of large and expensive, I'd say it's not
so bad. I've been able to get X72s and more recently SA.22cs off of
fleabay for between $100 and $150 (about 90 - 130 EUR at present
rates). They're pretty small, steady-state power draw is about 5
watts, and although the lifetime is a question, a good seller should
show you the diagnostic output including power-on hours and various
temperatures and voltages -- the one I trust does!

> - Are there recommendations people can make for not-too-expensive
>   VCOs to use in a GPSDO?
>
> - Are there GPS modules that people here can recommend?
>
>   I have been looking at the uBlox NEO-7 and the GNS TC6000GN-P1
>   GPS modules.  Both retail around 40€, and promise <100ns PPS jitter.
>   I would probably prefer the NEO-7, because uBlox makes more precise
>   PPS jitter claims for GPS, with 30ns RMS and 60ns for 99 percentile.

The uBlox ones are nice. I have one sitting around but I haven't
gotten around to writing a protocol decoder for it yet, so I'm using
an older Trimble Resolution T. If your goal is purely hobby and you
want to save some money, that might be a perfectly good option -- you
can find them for very cheap, and if your main aim is to build an NTP
server then anything better than the Trimble will be lost in the noise
anyway. Like the uBlox ones, the Trimble supports doing
survey-in/stationary mode for the best time stability.

> - While trying to design this on my own is fun and educational, are
>   there existing designs for DIY GPSDOs that I should look at?

I'm not making any great promises of educational value, but I've spent
a bunch of time building GPS-disciplined NTP servers on the Arduino
platform as a purely hobby thing and I do have a bit to share. I've
failed repeatedly to do a decent write-up of my work in blog form, but
I do have code and I'd be happy to answer questions about it.

First: https://github.com/arodland/Due-GPS-NTP-Server . This one is
newer, and it runs on the ARM-based Arduino Due (actually a clone
board called the Taijiuino that allows using the SAM3X's onboard
Ethernet MAC). It works with a Symmetricom rubidium oscillator and
either Trimble or SiRF GPS. It has a timing granularity of 32ns and
the NTP stdev as measured from my desktop is about 5 microseconds. It
also sends out statistics packets every second over UDP that I use to
make graphs, and has a serial CLI for tweaking the settings :)

Second: https://github.com/arodland/Arduino-GPS-NTP-Server . This is
the older version. I don't keep up with it anymore, it only supports
the SiRF GPS driver, it uses an FLL algorithm that I no longer think
is right, and it doesn't discipline an external oscillator, it just
does digital frequency synthesis on the Arduino's own 16MHz clock.
However there's some potentially interesting stuff in there in terms
of managing the timer interrupts, keeping time, and doing all of the
requisite math on an 8-bit chip without burning more cycles than we
have available, as well as hacking the Arduino Ethernet Shield to
support an interrupt-driven mode to allow better timestamping of
incoming packets. It has a timing granularity of 500ns and due to the
iffy performance of the WizNet ethernet adapter the NTP stdev is in
the 10-20 microsecond range (it was worse than that before I figured
out the interrupt trick).

> For reference, my use-case (beyond simply building it) is two-fold:
> - I want an accurate ref. clock for my local NTP setup.
> - I need a frequency reference for QRSS (low-power RF transmissions),
>   and getting a 8MHz reference out of the GPSDO would help a lot  :)

In that case you may want to forget the rubidiums that I mentioned and
go for a VCXO after all; my rubidiums use digital frequency synthesis,
and I understand that makes them unusable for radio work -- unless
you're just using them as a reference to lock some other, cleaner,
oscillator.
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[time-nuts] 50-ohm PPS driver

2016-04-16 Thread Stewart Cobb
The "standard cheap" way to make a 1 PPS 50-ohm output is to use a 74ACT04
hex inverter chip powered by 5V. The chip is specified for 24 mA from each
output pin. Connect 5 inputs together to your PPS signal. Run each of the 5
outputs through a 220 ohm series resistor, then tie them together as your
PPS output. This will drive about 2.4 volts into a 50-ohm load, with crisp
edges. It will easily trigger most instruments.

The chip is specified up to 6V supply voltage, so you can get an output
pulse of almost 3V if you have a 6V rail in your design.

You can use the sixth inverter as your PPS input, with two paralleled
100-ohm resistors as the load (and ESD guard) at its input pin. The
switching point for the 'ACT version of the chip is around 1.4V, so the
2.4V output signal will easily drive it.

This circuit may not be perfect, but it shows up in a lot of professional
gear.

Cheers!
--Stu
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Re: [time-nuts] PICDIV build

2016-04-16 Thread Bruce Griffiths
The CLKIN input is compatible with STTL logic levels so driving the CLKIN from 
3.3V CMOS levels from the LTC6957 output whilst operating the PIC at 5V Vcc 
will work well. 

The LTC6957 evaluation board outputs are AC coupled and drive a 100 ohm + 100 
ohm attenuator to produce a 50 ohm output impedance reduce the pulse currents 
from the LTC6957 to 8.25mA peak from either the NMOS or PMOS output devices 
when driving a high impedance load. The output deice peak currents increase to 
12mA with a 50 ohm load well within  the maximum specified. A buffer is 
advisable when driving a grounded 50 ohm load either with or without a series 
50 ohm resistor.

Bruce
 

On Sunday, 17 April 2016 10:10 AM, Bruce Griffiths 
 wrote:
 

 The PN floor of the 10MHz output from the LTC6957 is very high, much higher 
than I measured the PN contribution of the LTC6957 itself using an evaluation 
board.
Are you sure that this isn't due to the source itself?
What did you use for the reference source for the 3120A?What is its PN?Have you 
tried driving the LTC6957 input from a clean low  PN source that is also used 
as the reference for the 3120A?

Bruce 

    On Sunday, 17 April 2016 2:01 AM, Bob Camp  wrote:
 

 Hi

Just about any of the modern ‘125 or ‘126 buffer gates will do a pretty good 
job 
of generating a logic output:

https://www.fairchildsemi.com/datasheets/NC/NC7SZ125.pdf
https://www.fairchildsemi.com/datasheets/NC/NC7SZ126.pdf
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT125
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT126
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf

The typical ’04 inverters also will do the job:

http://cache.nxp.com/documents/data_sheet/74AHC_AHCT1G04_Q100.pdf?pspll=1
http://www.ti.com/product/sn74ahc1g04
http://www.ti.com/product/sn74ahc1g125

The list could go on for several pages….

3.3V into 50 ohms is 66 ma. Close to the rail most gates will only put out 
around 
10 ma. If you want to drive close to the 3.3V level, you will need to parallel 
up about 
6 to 8 gates. It’s probably best to drive them all from a single high speed 
gate output. 
If you are picky about the levels, twice that number of gates may be needed... 
Since you 
are driving out of an “un-terminated source”, you can expect a bit of ring on 
your cable. 

If you want to deliver 3.3V into a 50 ohm load out of a 50 ohm source, you will 
need 
a circuit that will handle a 6.6V supply. You *might* be able to select gates 
that won’t 
blow up at that voltage. The current will be 2X higher so you will need a few 
gates. In
this case, each one gets a series resistor in it’s output to make up the 50 ohm 
total. 

Bob  


> On Apr 16, 2016, at 2:29 AM, Anders Wallin  
> wrote:
> 
> hi all, I wrote down some notes on a recent PICDIV build and measurements:
> http://www.anderswallin.net/2016/04/picdiv-frequency-divider/
> 
> If/when I make v2 of this board:
> - any suggestions for boosting the output amplitude of both 1PPS and 10MHz
> CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
> - any obvious mistakes that cause the phase-noise observed? Mostly I think
> 50/100Hz and harmonics would be nice to suppress..
> 
> thanks!
> Anders
> ___
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Re: [time-nuts] PICDIV build

2016-04-16 Thread Bruce Griffiths
The PN floor of the 10MHz output from the LTC6957 is very high, much higher 
than I measured the PN contribution of the LTC6957 itself using an evaluation 
board.
Are you sure that this isn't due to the source itself?
What did you use for the reference source for the 3120A?What is its PN?Have you 
tried driving the LTC6957 input from a clean low  PN source that is also used 
as the reference for the 3120A?

Bruce 

On Sunday, 17 April 2016 2:01 AM, Bob Camp  wrote:
 

 Hi

Just about any of the modern ‘125 or ‘126 buffer gates will do a pretty good 
job 
of generating a logic output:

https://www.fairchildsemi.com/datasheets/NC/NC7SZ125.pdf
https://www.fairchildsemi.com/datasheets/NC/NC7SZ126.pdf
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT125
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT126
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf

The typical ’04 inverters also will do the job:

http://cache.nxp.com/documents/data_sheet/74AHC_AHCT1G04_Q100.pdf?pspll=1
http://www.ti.com/product/sn74ahc1g04
http://www.ti.com/product/sn74ahc1g125

The list could go on for several pages….

3.3V into 50 ohms is 66 ma. Close to the rail most gates will only put out 
around 
10 ma. If you want to drive close to the 3.3V level, you will need to parallel 
up about 
6 to 8 gates. It’s probably best to drive them all from a single high speed 
gate output. 
If you are picky about the levels, twice that number of gates may be needed.. 
Since you 
are driving out of an “un-terminated source”, you can expect a bit of ring on 
your cable. 

If you want to deliver 3.3V into a 50 ohm load out of a 50 ohm source, you will 
need 
a circuit that will handle a 6.6V supply. You *might* be able to select gates 
that won’t 
blow up at that voltage. The current will be 2X higher so you will need a few 
gates. In
this case, each one gets a series resistor in it’s output to make up the 50 ohm 
total. 

Bob  


> On Apr 16, 2016, at 2:29 AM, Anders Wallin  
> wrote:
> 
> hi all, I wrote down some notes on a recent PICDIV build and measurements:
> http://www.anderswallin.net/2016/04/picdiv-frequency-divider/
> 
> If/when I make v2 of this board:
> - any suggestions for boosting the output amplitude of both 1PPS and 10MHz
> CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
> - any obvious mistakes that cause the phase-noise observed? Mostly I think
> 50/100Hz and harmonics would be nice to suppress..
> 
> thanks!
> Anders
> ___
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Re: [time-nuts] PICDIV build

2016-04-16 Thread Bob Camp
Hi

Just about any of the modern ‘125 or ‘126 buffer gates will do a pretty good 
job 
of generating a logic output:

https://www.fairchildsemi.com/datasheets/NC/NC7SZ125.pdf
https://www.fairchildsemi.com/datasheets/NC/NC7SZ126.pdf
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT125
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT126
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf

The typical ’04 inverters also will do the job:

http://cache.nxp.com/documents/data_sheet/74AHC_AHCT1G04_Q100.pdf?pspll=1
http://www.ti.com/product/sn74ahc1g04
http://www.ti.com/product/sn74ahc1g125

The list could go on for several pages….

3.3V into 50 ohms is 66 ma. Close to the rail most gates will only put out 
around 
10 ma. If you want to drive close to the 3.3V level, you will need to parallel 
up about 
6 to 8 gates. It’s probably best to drive them all from a single high speed 
gate output. 
If you are picky about the levels, twice that number of gates may be needed. 
Since you 
are driving out of an “un-terminated source”, you can expect a bit of ring on 
your cable. 

If you want to deliver 3.3V into a 50 ohm load out of a 50 ohm source, you will 
need 
a circuit that will handle a 6.6V supply. You *might* be able to select gates 
that won’t 
blow up at that voltage. The current will be 2X higher so you will need a few 
gates. In
this case, each one gets a series resistor in it’s output to make up the 50 ohm 
total. 

Bob  


> On Apr 16, 2016, at 2:29 AM, Anders Wallin  
> wrote:
> 
> hi all, I wrote down some notes on a recent PICDIV build and measurements:
> http://www.anderswallin.net/2016/04/picdiv-frequency-divider/
> 
> If/when I make v2 of this board:
> - any suggestions for boosting the output amplitude of both 1PPS and 10MHz
> CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
> - any obvious mistakes that cause the phase-noise observed? Mostly I think
> 50/100Hz and harmonics would be nice to suppress..
> 
> thanks!
> Anders
> ___
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Re: [time-nuts] PICDIV build

2016-04-16 Thread Magnus Danielson

Hej igen Anders,

On 04/16/2016 08:29 AM, Anders Wallin wrote:

hi all, I wrote down some notes on a recent PICDIV build and measurements:
http://www.anderswallin.net/2016/04/picdiv-frequency-divider/

If/when I make v2 of this board:
- any suggestions for boosting the output amplitude of both 1PPS and 10MHz
CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?


No or very little output resistance from a number of CMOS drivers get 
you close. Output impedance will be far from 50 Ohm thought, which may 
or may not be an issue. Otherwise, you need higher voltage. Often "TTL 
level" meaning 2,5 Vp is being used.



- any obvious mistakes that cause the phase-noise observed? Mostly I think
50/100Hz and harmonics would be nice to suppress..


OK. Bond the shields to the front-plate properly. Preferably bond your 
10 MHz source and your measurement kit with a high conductance path, and 
also any power-supply. In general, make the PCB board shunted for ground 
potential differences, as those will easily be amplified as they go 
through the board. Tie things together away from the board and whatever 
current needs to go via the module, make sure it finds a better path 
than through the PCB ground traces. There is also layout tricks to make 
all the internal circuit only tie to the outside ground currents but 
tying to them voltage wise by using a star ground from the ground point.


Cheers,
Magnus
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Re: [time-nuts] PICDIV build

2016-04-16 Thread Magnus Danielson

Hej Anders,

On 04/16/2016 08:29 AM, Anders Wallin wrote:

hi all, I wrote down some notes on a recent PICDIV build and measurements:
http://www.anderswallin.net/2016/04/picdiv-frequency-divider/

If/when I make v2 of this board:
- any suggestions for boosting the output amplitude of both 1PPS and 10MHz
CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
- any obvious mistakes that cause the phase-noise observed? Mostly I think
50/100Hz and harmonics would be nice to suppress..


I can't seem to get a full size of the plots or schematics. It's just 
very hard to read and interpret.


MVH
Magnus
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Re: [time-nuts] KS-24361 rom

2016-04-16 Thread Magnus Danielson

Hi,

On 04/16/2016 01:19 PM, Didier Juges wrote:

I will be glad to host it of course, but you cannot directly post it to a
particular directory, you just upload it and I will move it.

Please note that the HP guy who was instrumental to establishing the
obsolete manuals on the HP site (Dave Cunningham was his name I believe)
actually asked me if it was OK for him to download manuals they had lost
from my web site, so I would say that most likely
HP/Agilent/Keysight/whatnot is perfectly OK with this, or at least they
were at one time. Caveat emptor...


Indeed. Dave Cunningham was pragmatic. If there was a good enough scan 
that somebody else had done, he kindly asked if he could use it. The 
benefit of doing that both for them and us was that other materials 
could hit the scanners much quicker.


He would even take requests.

Cheers,
Magnus
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Re: [time-nuts] KS-24361 rom

2016-04-16 Thread Adrian Godwin
Thanks, Tom - that sounds like a rather exclusive club !

I'm afraid my pForth is nothing to be proud of - I've forgotten most of it
and had to look practically everything up. But it did the job.


I've uploaded it as KS24361-Z3812A-KR92830585-X98_4-A.zip


On Sat, Apr 16, 2016 at 11:36 AM, Tom Van Baak  wrote:

> Adrian,
>
> Thanks for doing that. And you're now a member of the hp Smartclock pForth
> appreciation club ;-)
>
> You can send the ROM to me or Magnus, or better yet post it under "01 ROM
> Images and Drivers" at Didier's site:
>
> http://www.ko4bb.com/manuals/
>
> /tvb
>
>
> - Original Message -
> From: "Adrian Godwin" 
> To: "Discussion of precise time and frequency measurement" <
> time-nuts@febo.com>
> Sent: Friday, April 15, 2016 1:56 PM
> Subject: [time-nuts] KS-24361 rom
>
>
> > I've dumped out the KS24361 ROM using the built-in Forth interpreter as a
> > move towards reverse-engineering it.
> >
> > Is there somewhere I can put this for easy access ? I imagine it's
> > copyright HP and although I doubt they'll care, I don't want to cause any
> > problems.
> >
> > -adrian
> > ___
> > time-nuts mailing list -- time-nuts@febo.com
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Re: [time-nuts] KS-24361 rom

2016-04-16 Thread Didier Juges
I will be glad to host it of course, but you cannot directly post it to a
particular directory, you just upload it and I will move it.

Please note that the HP guy who was instrumental to establishing the
obsolete manuals on the HP site (Dave Cunningham was his name I believe)
actually asked me if it was OK for him to download manuals they had lost
from my web site, so I would say that most likely
HP/Agilent/Keysight/whatnot is perfectly OK with this, or at least they
were at one time. Caveat emptor...

In cases where there are instructions and/or notes going with an upload,
the best is to add the instruction/note in a .readme.txt file matching
the name of the file that it relates to, and upload both, or put a
README.txt with the file and zip both together. Do not zip large pdf files
though. It yields little gain in size and makes my job harder because I
have to ssh into the machine to unzip it instead of just moving/renaming
via ftp.

Didier KO4BB

On Sat, Apr 16, 2016 at 5:36 AM, Tom Van Baak  wrote:

> Adrian,
>
> Thanks for doing that. And you're now a member of the hp Smartclock pForth
> appreciation club ;-)
>
> You can send the ROM to me or Magnus, or better yet post it under "01 ROM
> Images and Drivers" at Didier's site:
>
> http://www.ko4bb.com/manuals/
>
> /tvb
>
>
> - Original Message -
> From: "Adrian Godwin" 
> To: "Discussion of precise time and frequency measurement" <
> time-nuts@febo.com>
> Sent: Friday, April 15, 2016 1:56 PM
> Subject: [time-nuts] KS-24361 rom
>
>
> > I've dumped out the KS24361 ROM using the built-in Forth interpreter as a
> > move towards reverse-engineering it.
> >
> > Is there somewhere I can put this for easy access ? I imagine it's
> > copyright HP and although I doubt they'll care, I don't want to cause any
> > problems.
> >
> > -adrian
> > ___
> > time-nuts mailing list -- time-nuts@febo.com
> > To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> > and follow the instructions there.
> ___
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Re: [time-nuts] PICDIV build

2016-04-16 Thread Tom Van Baak
Anders,

Nice work.

Your output level is low because the 3.3 V output of the PIC gets cut in half 
by the series 50R on your board and the 50R termination. But 700 mV into 50R 
seems way too low. Something's not right.

FYI: see how John handles input and output in the TADD-2-mini:

https://www.tapr.org/kits_t2-mini.html
http://www.tapr.org/~n8ur/T2_Mini_Manual.pdf

That board ships with PD17 [1] and most of the dividers I design to be pin 
compatible with his PCB. For example, the 10 MHz to 32 kHz divider [2] that we 
were talking about a few weeks ago can be used with the TADD-2-mini.

You can use the same trick he did to parallel multiple outputs to gain higher 
output levels. The comments [3] in PD09 chip say that you can use pin3 and pin6 
in addition to pin7 for output. So combine each pin through its own 50R to a 
common output BNC. It also helps that he runs the board at 5 V and not 3.3 V.

/tvb

[1] http://leapsecond.com/pic/src/pd17.asm
[2] http://leapsecond.com/pic/src/pd30.asm
[3] http://leapsecond.com/pic/src/pd09.asm

- Original Message - 
From: "Anders Wallin" 
To: "Discussion" 
Sent: Friday, April 15, 2016 11:29 PM
Subject: [time-nuts] PICDIV build


> hi all, I wrote down some notes on a recent PICDIV build and measurements:
> http://www.anderswallin.net/2016/04/picdiv-frequency-divider/
> 
> If/when I make v2 of this board:
> - any suggestions for boosting the output amplitude of both 1PPS and 10MHz
> CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
> - any obvious mistakes that cause the phase-noise observed? Mostly I think
> 50/100Hz and harmonics would be nice to suppress..
> 
> thanks!
> Anders

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Re: [time-nuts] KS-24361 rom

2016-04-16 Thread Tom Van Baak
Adrian,

Thanks for doing that. And you're now a member of the hp Smartclock pForth 
appreciation club ;-)

You can send the ROM to me or Magnus, or better yet post it under "01 ROM 
Images and Drivers" at Didier's site:

http://www.ko4bb.com/manuals/

/tvb


- Original Message - 
From: "Adrian Godwin" 
To: "Discussion of precise time and frequency measurement" 
Sent: Friday, April 15, 2016 1:56 PM
Subject: [time-nuts] KS-24361 rom


> I've dumped out the KS24361 ROM using the built-in Forth interpreter as a
> move towards reverse-engineering it.
> 
> Is there somewhere I can put this for easy access ? I imagine it's
> copyright HP and although I doubt they'll care, I don't want to cause any
> problems.
> 
> -adrian
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[time-nuts] PICDIV build

2016-04-16 Thread Anders Wallin
hi all, I wrote down some notes on a recent PICDIV build and measurements:
http://www.anderswallin.net/2016/04/picdiv-frequency-divider/

If/when I make v2 of this board:
- any suggestions for boosting the output amplitude of both 1PPS and 10MHz
CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
- any obvious mistakes that cause the phase-noise observed? Mostly I think
50/100Hz and harmonics would be nice to suppress..

thanks!
Anders
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Re: [time-nuts] Rpair of an 8662 HP Generator

2016-04-16 Thread Alexander Pummer
the service manual is available here: 
http://elektrotanya.com/hp_8662a_sm.pdf/download.html,

special parts are here:  http://www.sphere.bc.ca/test/hpparts.html
possible repair: http://www.naptech.com/

73
KJ6UHN
Alex

On 4/15/2016 6:25 PM, KA2WEU--- via time-nuts wrote:

Thanks, I do not have a repair manual and I hate to abandon the signal
generator after man years of positive use... Ulrich
  
  
In a message dated 4/15/2016 9:14:21 P.M. Eastern Daylight Time,

paulsw...@gmail.com writes:

  
Ulrich

To  your first question I am unaware of anyone that repairs them. Though
there are  many places that might, typical cal and repair shops. I have a sick
8662 also  (age) and need to dig in. At least I know the board and the most
likely issue.  The yahoo user group has a lot of useful details.
Regards
Paul
WB8TSL









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[time-nuts] KS-24361 rom

2016-04-16 Thread Adrian Godwin
I've dumped out the KS24361 ROM using the built-in Forth interpreter as a
move towards reverse-engineering it.

Is there somewhere I can put this for easy access ? I imagine it's
copyright HP and although I doubt they'll care, I don't want to cause any
problems.

-adrian
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