Re: [time-nuts] Raspberry PI 3 NTP server with GPS time data.

[David J Taylor]

-Original Message- 
From: jan hugo prins

Sent: Sunday, April 24, 2016 7:51 PM
To: time-nuts@febo.com
Subject: [time-nuts] Raspberry PI 3 NTP server with GPS time data.

Hi,

To get a more stable NTP source into our production network I have
started exprerimenting with a Raspberry PI 3 with a GPS head. GPS data
is coming in fine, but the time is jumping around like a wild horse. The
result is that the only thing I get out of this experiment so far is a
more stable PPS signal in my NTP config but after some time both the GPS
time and the PPS are marked a false ticker and the only thing left is
the external reference clocks from outside our own network.

Parts used:
Raspberry PI 3
Adafruit GPS head: ADA-2324
External GPS antenna with 5 meter cable.

My NTP config looks like this:

logfile /var/log/ntpd.log
logconfig = all
driftfile /var/lib/ntp/ntp.drift
statsdir /var/log/ntpstats/
statistics loopstats peerstats clockstats
filegen loopstats file loopstats type day enable
filegen peerstats file peerstats type day enable
filegen clockstats file clockstats type day enable
server 127.127.22.0 minpoll 4 maxpoll 4 prefer
fudge 127.127.22.0 refid PPS flag3 1
server 127.127.28.0 minpoll 4 maxpoll 4 iburst
fudge 127.127.28.0 refid GPS time1 +0.550 flag1 1 stratum 4
server ntp0.nl.uu.net
server chime6.surfnet.nl
server chime5.surfnet.nl
server ntp1.virtu.nl

Now I got the idea that I might be able to use a DCF77 receiver to get a
stable timesource, but on the other hand, if the cause of my problem is
internal to the Raspberry PI setup then I might have exactly the same
problem with the DCF77 receiver.

The average on the NTP clocksource is close to 0.
root@raspberrypi:/var/log/ntpstats# cat peerstats |grep 127.127.28.0
|awk '{print $5}'| tail -n 1500 | awk 'NR == 1 { max=$1; min=$1; sum=0 }
{ if ($1>max) max=$1; if ($1I wrote up some notes on using a GPS/PPS source with the Raspberry Pi, 
including the RPi-3 here:


 http://www.satsignal.eu/ntp/Raspberry-Pi-quickstart.html

You can certainly get good enough performance if your antenna provides a 
good view of the GPS satellites, as shown in the plots here (all RPi-3):


 http://www.satsignal.eu/mrtg/raspi11_ntp.html
 http://www.satsignal.eu/mrtg/raspi12_ntp.html
 http://www.satsignal.eu/mrtg/raspi13_ntp.html
 http://www.satsignal.eu/mrtg/raspi14_ntp.html

and in summary here:

 http://www.satsignal.eu/mrtg/performance_ntp.php

Note that the sudden changes around 12 UTC and RasPi-11 and -12 are due to 
them being on an open bench which became sunlit around that time.  For best 
performance, an unheated cupboard is recommended.  All these have a puck 
antenna, indoors, but placed as near to a wall or window as possible.  You 
can see the  number of available and used GPS satellites here:


 http://www.satsignal.eu/mrtg/performance_gps.php

so temperature is the prime cause of the drift, not lack of satellites in 
view.  As you can see +/- 20 microseconds is relatively easy to achieve. 
The RPi-3 can serve thousands of clients.


I use this GPS:

 
https://store.uputronics.com/index.php?route=product/product&path=60_64&product_id=81

which has the respected ublox MAX M8Q module.

Cheers,
David
--
SatSignal Software - Quality software written to your requirements
Web: http://www.satsignal.eu
Email: david-tay...@blueyonder.co.uk
Twitter: @gm8arv 


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Re: [time-nuts] Raspberry PI 3 NTP server with GPS time data.

[Mike Cook]

> Le 24 avr. 2016 à 20:51, jan hugo prins  a écrit :
> 
> Hi,
> 
> To get a more stable NTP source into our production network I have
> started exprerimenting with a Raspberry PI 3 with a GPS head. GPS data
> is coming in fine, but the time is jumping around like a wild horse. The
> result is that the only thing I get out of this experiment so far is a
> more stable PPS signal in my NTP config but after some time both the GPS
> time and the PPS are marked a false ticker and the only thing left is
> the external reference clocks from outside our own network.
> 
> Parts used:
> Raspberry PI 3
> Adafruit GPS head: ADA-2324
> External GPS antenna with 5 meter cable.
> 
> My NTP config looks like this:
> 
> logfile /var/log/ntpd.log
> logconfig = all
> driftfile /var/lib/ntp/ntp.drift
> statsdir /var/log/ntpstats/
> statistics loopstats peerstats clockstats
> filegen loopstats file loopstats type day enable
> filegen peerstats file peerstats type day enable
> filegen clockstats file clockstats type day enable
> server 127.127.22.0 minpoll 4 maxpoll 4 prefer

Your preferred server is just giving you the PPS. With this ref clock you need 
a preferred server which names the second. So you should move the prefer 
directive to either your shared memory source , or another local or remote 
server.

> fudge 127.127.22.0 refid PPS flag3 1
> server 127.127.28.0 minpoll 4 maxpoll 4 iburst
> fudge 127.127.28.0 refid GPS time1 +0.550 flag1 1 stratum 4
> server ntp0.nl.uu.net
> server chime6.surfnet.nl
> server chime5.surfnet.nl
> server ntp1.virtu.nl
> 
> Now I got the idea that I might be able to use a DCF77 receiver to get a
> stable timesource, but on the other hand, if the cause of my problem is
> internal to the Raspberry PI setup then I might have exactly the same
> problem with the DCF77 receiver.
> 
> The average on the NTP clocksource is close to 0.
> root@raspberrypi:/var/log/ntpstats# cat peerstats |grep 127.127.28.0
> |awk '{print $5}'| tail -n 1500 | awk 'NR == 1 { max=$1; min=$1; sum=0 }
> { if ($1>max) max=$1; if ($1 %d\tMax: %d\tAverage: %f\n", min, max, sum/NR}'
> Min: 0Max: 0Average: 0.001101
> 
> Could anyone give me some advice on how to get this working? Or is my
> idea to use a GPS clock to create a stable NTP setup the wrong way to go?
> 
> Thanks for any advice.
> Jan Hugo Prins
> 
> 
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"The main function of a modern police force is filling in forms."
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Re: [time-nuts] Oncore battery

[Azelio Boriani]

Panasonic ML621 or equivalent. Alternatively you can use the battery
pin (pin 6): remove the onboard battery and use en external primary
cell (CR2032 or equivalent). See pages 15 to 21 of the M12M user
manual.


On Mon, Apr 25, 2016 at 2:11 AM, Joseph Gray  wrote:
> Can anyone recommend a rechargeable lithium coin cell that is a direct
> replacement for the ones that come on some Oncore receivers? Something
> I can order from Mouser or Digikey, if possible.
>
> Joe Gray
> W5JG
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Re: [time-nuts] Oncore battery

[Pete Stephenson]

I have several 5V Oncore UT+ receivers of the type that did not
include a rechargeable on-board battery, but didn't want to bother
with lithium primary batteries or rechargeable batteries and their
associated holders so I opted to use supercapacitors. Specifically, I
use the Panasonic EEC-F5R5U105 supercap with a capacitance of 1F and a
max voltage rating of 5.5V.

Charging is easy: I simply run 5V power through a diode and a resistor
sized to prevent exceeding the diode's current limit and the capacitor
charges in about 20-30 minutes. The diode prevents the supercap from
discharging through the resistor when the power fails.

I use a 1N4148 small signal diode rather than a 1N400x-series diode
because the 1N4148 has a smaller reverse leakage current. A 240 ohm
resistor keeps the peak current to 20mA (the diode can handle up to
200mA forward current) and the capacitor is charged up in about 20
minutes after power-on. Adjust the values for your specific needs.
Once charged, it maintains the Oncore's RAM for several weeks with no
power.

On Mon, Apr 25, 2016 at 12:25 PM, Azelio Boriani
 wrote:
> Panasonic ML621 or equivalent. Alternatively you can use the battery
> pin (pin 6): remove the onboard battery and use en external primary
> cell (CR2032 or equivalent). See pages 15 to 21 of the M12M user
> manual.
> 
>
> On Mon, Apr 25, 2016 at 2:11 AM, Joseph Gray  wrote:
>> Can anyone recommend a rechargeable lithium coin cell that is a direct
>> replacement for the ones that come on some Oncore receivers? Something
>> I can order from Mouser or Digikey, if possible.
>>
>> Joe Gray
>> W5JG
>> ___
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-- 
Pete Stephenson
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Re: [time-nuts] [Bulk] Re: Oncore battery

[J. L. Trantham]

Another option for the UT+ (not sure it's applicable to the M12M) is to 
remove/disconnect a SMT resistor that connects the (+) terminal of the 
rechargeable onboard battery to pin 6 (IIRC) and use a non-rechargeable battery 
of the same form factor.  I've done that for one of my receivers and it's 
lasted for over a year now.  I don't recall the exact battery type but I can 
get it if anyone needs it.

Joe

-Original Message-
From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Pete Stephenson
Sent: Monday, April 25, 2016 6:34 AM
To: Discussion of precise time and frequency measurement
Subject: [Bulk] Re: [time-nuts] Oncore battery

I have several 5V Oncore UT+ receivers of the type that did not include a 
rechargeable on-board battery, but didn't want to bother with lithium primary 
batteries or rechargeable batteries and their associated holders so I opted to 
use supercapacitors. Specifically, I use the Panasonic EEC-F5R5U105 supercap 
with a capacitance of 1F and a max voltage rating of 5.5V.

Charging is easy: I simply run 5V power through a diode and a resistor sized to 
prevent exceeding the diode's current limit and the capacitor charges in about 
20-30 minutes. The diode prevents the supercap from discharging through the 
resistor when the power fails.

I use a 1N4148 small signal diode rather than a 1N400x-series diode because the 
1N4148 has a smaller reverse leakage current. A 240 ohm resistor keeps the peak 
current to 20mA (the diode can handle up to 200mA forward current) and the 
capacitor is charged up in about 20 minutes after power-on. Adjust the values 
for your specific needs.
Once charged, it maintains the Oncore's RAM for several weeks with no power.

On Mon, Apr 25, 2016 at 12:25 PM, Azelio Boriani  
wrote:
> Panasonic ML621 or equivalent. Alternatively you can use the battery 
> pin (pin 6): remove the onboard battery and use en external primary 
> cell (CR2032 or equivalent). See pages 15 to 21 of the M12M user 
> manual.
>  M12M%20-%20User%20Guide%20%28Ver%201.0.0%29.pdf>
>
> On Mon, Apr 25, 2016 at 2:11 AM, Joseph Gray  wrote:
>> Can anyone recommend a rechargeable lithium coin cell that is a 
>> direct replacement for the ones that come on some Oncore receivers? 
>> Something I can order from Mouser or Digikey, if possible.
>>
>> Joe Gray
>> W5JG
>> ___
>> time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to 
>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>> and follow the instructions there.
> ___
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> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.



--
Pete Stephenson
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Re: [time-nuts] Oncore battery

[Clint Jay]

Very handy,  I've picked up a few Oncore receivers recently and was
planning to test them all and then replace the batteries in the good
ones.  Has anyone worked out what the original charge circuit schematic is
though?
On 25 Apr 2016 13:01, "Pete Stephenson"  wrote:

> I have several 5V Oncore UT+ receivers of the type that did not
> include a rechargeable on-board battery, but didn't want to bother
> with lithium primary batteries or rechargeable batteries and their
> associated holders so I opted to use supercapacitors. Specifically, I
> use the Panasonic EEC-F5R5U105 supercap with a capacitance of 1F and a
> max voltage rating of 5.5V.
>
> Charging is easy: I simply run 5V power through a diode and a resistor
> sized to prevent exceeding the diode's current limit and the capacitor
> charges in about 20-30 minutes. The diode prevents the supercap from
> discharging through the resistor when the power fails.
>
> I use a 1N4148 small signal diode rather than a 1N400x-series diode
> because the 1N4148 has a smaller reverse leakage current. A 240 ohm
> resistor keeps the peak current to 20mA (the diode can handle up to
> 200mA forward current) and the capacitor is charged up in about 20
> minutes after power-on. Adjust the values for your specific needs.
> Once charged, it maintains the Oncore's RAM for several weeks with no
> power.
>
> On Mon, Apr 25, 2016 at 12:25 PM, Azelio Boriani
>  wrote:
> > Panasonic ML621 or equivalent. Alternatively you can use the battery
> > pin (pin 6): remove the onboard battery and use en external primary
> > cell (CR2032 or equivalent). See pages 15 to 21 of the M12M user
> > manual.
> > <
> http://www.ilotus.com.sg/~ilotus/sites/all/themes/zeropoint/pdf/m12m/M12M%20-%20User%20Guide%20%28Ver%201.0.0%29.pdf
> >
> >
> > On Mon, Apr 25, 2016 at 2:11 AM, Joseph Gray  wrote:
> >> Can anyone recommend a rechargeable lithium coin cell that is a direct
> >> replacement for the ones that come on some Oncore receivers? Something
> >> I can order from Mouser or Digikey, if possible.
> >>
> >> Joe Gray
> >> W5JG
> >> ___
> >> time-nuts mailing list -- time-nuts@febo.com
> >> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> >> and follow the instructions there.
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> > and follow the instructions there.
>
>
>
> --
> Pete Stephenson
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Re: [time-nuts] Oncore battery

[Chris Albertson]

I used a non-recharable coin battery and after maybe 5 years it's
still working.  The coin battery will last as long as whatever its
shelf life is.  It is only used if power fails and then only to hold
the data in the volatile memory.


On Mon, Apr 25, 2016 at 3:25 AM, Azelio Boriani
 wrote:
> Panasonic ML621 or equivalent. Alternatively you can use the battery
> pin (pin 6): remove the onboard battery and use en external primary
> cell (CR2032 or equivalent). See pages 15 to 21 of the M12M user
> manual.
> 
>
> On Mon, Apr 25, 2016 at 2:11 AM, Joseph Gray  wrote:
>> Can anyone recommend a rechargeable lithium coin cell that is a direct
>> replacement for the ones that come on some Oncore receivers? Something
>> I can order from Mouser or Digikey, if possible.
>>
>> Joe Gray
>> W5JG
>> ___
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-- 

Chris Albertson
Redondo Beach, California
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[time-nuts] Science of Time draft program, filling in the corners

[Rob Seaman]

Hello Time-Nuts,

The draft program of early submissions is now available for the Science of Time 
symposium, to be held at Harvard from 5-9 June 2016:

 http://hanksville.org/timesymposium/SoT_agenda_v1.6.pdf 


Abstracts are still being accepted and a few more talks can be accommodated by 
extending sessions, etc., but deadlines are approaching:
abstracts for oral presentations:   May 1
abstracts for posters:  May 15
regular registration:   May 15

Your participation would be welcome, and in good company:

http://sot2016.cfa.harvard.edu/Program/registrants.html 


Carpe Diem!

Rob Seaman
University of Arizona
for the Science of Time organizing committee

http://sot2016.cfa.harvard.edu 


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Re: [time-nuts] 1 PPS 50-ohm driver

[Florian Teply]

Am Mon, 18 Apr 2016 18:15:22 -0400
schrieb Bob Camp :

> Hi
> 
> If our approach was to fabricate an IC totally from scratch for this
> or that application, there are a lot of things that could be done.
> Unfortunately, for most of us, doing that to wire up an output on a
> board … not so much. 
> 
I fully agree, usually this is totally out of question. But, IF one
does need something like that, AND has the proper tools/skills
available, this would be feasible at not so high cost. Having Skills
and tools available does not necessarily mean to personally have these.
Quite a number of university groups do work on IC design of some sort.
Where I work, we regularly do MPW runs for all sorts of customers,
among which are quite a number of universities. In our basic 250nm
process, MPW goes at slightly less than 3k Euro per square millimetre
for up to 40 parts. One square millimetre does get you quite far in
250nm technologies. Sure, this does not include packaging as we don't do
that. And yes, one can easily get plain CMOS for much less than that
elsewhere. But for that sort of money you'd actually get a full SiGe
BiCMOS process. No, I definitely wouldn't recommend that sort of pricing
for production of millions of pieces a year, but that's not our main
target in any case, as we're a research institution, not a commercial
foundry. Plain 250nm CMOS through educational outfits like europractice
or MOSIS, I'd expect to run at about half to one third that price.

> Starting back in the 1970’s people stopped making packaged inverters
> with single transistor pairs. The problem was they didn’t get enough
> gain or isolation through a single pair. For the few places that
> *did* keep making the single pair parts, they carefully labeled them
> as such so you would not misuse them. 
> 
> Once you get into packaged logic designed in the 80’s or later,
> “unbuffered” gates pretty much vanish. An inverter is made of three
> transistor pairs and a “non inverter” is made from two transistor
> pairs. The net result is that the “non inverter” is slightly faster.
> Again, this does not apply if you make your own chip from scratch on
> a silicon wafer. It only applies if you want to buy pre-packaged
> parts from somebody like TI. 
> 
> The speed difference is not as great as you might think. The
> capacitance on the internal nodes is mighty low. That makes the
> “internal” inverter very fast compared to the rest of the circuit. 
> 
I'd consider something on the order of 100 ps of gate delay per stage.
But this strongly depends on load. In "standard" 250 nm CMOS with about
5 nm Gate Oxide, gate capacitance is on the order of 50fF/um^2, so a
single minimum drive strength inverter would be slightly more than 10fF.
Agreed, that's not very much. As a matter of fact, I myself would
ignore it at PCB level. But with transistor saturation currents on the
order of 100uA, it'll take some time to charge and discharge...

And If you're trying to meet JEDEC standards for CMOS drive strength,
you'll end up with transistors of a hundred microns gate width or more,
which by themselves already pose a significant capacitive load on the
order of a few picofarads. Well, insignificant in most PCB
environments, but on chip this is pretty significant. And when one
needs to go from core logic (about one micron gate width, 10-30 fF
capacitance, max current 100uA) to PCB (capacitive loads of tens of
picofarads, several milliamps of current drive at low voltage drops),
the optimization isn't that straightforward: a high number of stages
with low relative capacitive load (meaning that one stage has a low
multiple of its own input capacitance as a load on its output) might or
might not be preferred over a low number of stages, where each one sees
huge relative capacitive loads and therefore has long transition times.
In the end it's a tradeoff between Input-to-Output delay, risetime and
power consumption. But certainly a higher number of stages does not
necessarily mean higher input-to-output delay.

> Of course if you *did* fabricate a single transistor pair on your
> own, you also would need to invent a way to dice it so that pair was
> not “swimming” in an ocean of un-used silicon. The capacitance of all
> that real estate counts as well …
>
Oh yeah. A single inverter would need something on the order of maybe
2umx5um.Compared to that, even a single bond pad would be really
huge with 80um x 80um. And one would need at least four bond pads.
If one needs to add proper ESD protection, we'll get to something like
300um x 300um, which is about the smallest we could actually
reliably dice out of an 8 inch wafer. But hold your breath while
handling ;-)

But, in the case you mentioned, one would try and get away from the
silicon as soon as possible, up the layer stack. And then capacitance
to the silicon bulk is no longer that much of a problem as the distance
between conductor and silicon is increased roughly by a factor of
thousand. In case this still is too muc

Re: [time-nuts] Raspberry PI 3 NTP server with GPS time data.

[Orin Eman]

On Sun, Apr 24, 2016 at 4:15 PM, Chris Albertson 
wrote:

> Did you see the notice on the adafruit 2324 web page that reads "Does
> not work with the Pi 3 at this time".
>


I would assume that's because the Pi3 uses /dev/ttyAMA0 for Bluetooth.
Here is how to route ttyAMA0 back to the IO pins on the Pi3.  It is useful
information for any device trying to use ttyAMA0 on the Pi3.

Remove all references to ttyAMA0 from /boot/cmdline.txt (as on a Pi2)

To disable bluetooth:

systemctl disable hciuart
Add "dtoverlay=pi3-disable-bt" to /boot/config.txt

Finally, perhaps unnecessary, use raspi-config to disable login on the
serial port.  (Serial under Advanced Options.)

The above worked for me porting code that worked over ttyAMA0 on the Pi2 to
the Pi3.

It was a poor decision IMO to usurp ttyAMA0 for Bluetooth on the Pi3.  They
broke just about every device that uses serial IO out there.  By default,
they now route the IO pins to /dev/ttyS0 which is useless for most purposes
_as its baud rate depends on CPU core frequency, which is variable_!
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[time-nuts] SE880 GPSDO

[Ilia Platone]

Hi all,

I'm trying to build a GPSDO with a FVXO-HC53BR-10 (Fox Electronics) VCXO 
and a Telit Jupiter 
SE880, 
this serves for a datalogger an I want to achieve a highly reliable clock.


This GPS receiver has two clock inputs: a 16MHz, and a 32KHz XT input 
for the RTC functions.
My problem is this: The crystal must be driven by a voltage depending to 
the phase difference between the GPS 1PPS output and the uC 1s cycles, 
but must I drive (feedback) the RTC of the GPS also from a divider of 
the main clock, or the 16MHz TCXO input, or both (or none...)?


Suggestions of any other component, for driving both the VCXO, and 
possibly for a RTK implementation, are welcome.

Thank you,
Ilia.
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Re: [time-nuts] Raspberry PI 3 NTP server with GPS time data.

[albertson . chris]

NMEA spec says only that seconds in the sentence need to apply the second in 
which they appear this means there could be half or even full second error they 
need not be synchronized with the second tick.  

Most GPS receivers do better then the standard that they don't have to

The generic NMEA GPS driver knows about this standard and does the right thing 
using to reference clocks one for TPS one for GPS cereal they don't coordinate



> On Apr 24, 2016, at 8:47 PM, Nick Sayer via time-nuts  
> wrote:
> 
> In my own experience, using the PA6H (AdaFruit) with GPSD as an NTP source 
> doesn’t work. By contrast, the PPS using the kernel module PPS timestamp 
> driver works exceptionally well.
> 
> The issue with gpsd with this module is that the time reported in the NMEA 
> sentences always has 0s for the sub-second digits of the time, but the 
> sentences aren’t synchronized to the second or anything, so they’re all over 
> the place. In principle, the sentences and PPS in concert gives you accurate 
> time, but so far as I can tell, NTP isn’t plumbed to get *just* the seconds 
> from NMEA and merge that with PPS to make a single source.
> 
> What that meant for me was that it was far more reliable to “bootstrap” ntpd 
> using external servers and use only the kernel based PPS stuff to sync to GPS.
> 
> My own config is
> 
> pool us.pool.ntp.org iburst prefer
> 
> server 127.127.22.0
> fudge 127.127.22.0 refid PPS
> fudge 127.127.22.0 flag3 1 # enable kernel PLL/FLL clock discipline
> 
> At start, the PPS is ignored until NTPD gets a lock on an external server. At 
> that point, it switches over to using PPS and becomes stratum 1. The result 
> is as good an NTP server as you’re going to get with a Raspberry Pi (given 
> it’s using a USB based Ethernet controller and the rest of the limitations of 
> the platform).
> 
> 
>> On Apr 24, 2016, at 4:15 PM, Chris Albertson  
>> wrote:
>> 
>> Did you see the notice on the adafruit 2324 web page that reads "Does
>> not work with the Pi 3 at this time".
>> 
>> OK assume they have fixed the problem...
>> 
>> Try using the #20 reference clock.  It works with any generic GPS that
>> outputs NMEA sentences and PPS.  Set the Flag1 to enable PPS.
>> 
>> What you have now is TWO clocks, one is the GPS via "gpsd" and the
>> shared memory and the other is the PPS and I bet they don't exactly
>> match.  Better to have one reference clock and that is the
>> 127.127.20.0 type clack.
>> 
>> What is happening is that the NMEA standard only requires the NMEA
>> sentences to be output during the second to which they apply.  So the
>> time is only accurate to within a second. Compared to any other clock
>> the NMEA-only GPS can be very poor.
>> 
>> GPS is one of the best reference clocks for NTP.  I'd use it as a
>> first choice unless for some reason you can't (for example you have no
>> way to install an antenna.)
>> 
>> 
>>> On Sun, Apr 24, 2016 at 11:51 AM, jan hugo prins  wrote:
>>> Hi,
>>> 
>>> To get a more stable NTP source into our production network I have
>>> started exprerimenting with a Raspberry PI 3 with a GPS head. GPS data
>>> is coming in fine, but the time is jumping around like a wild horse. The
>>> result is that the only thing I get out of this experiment so far is a
>>> more stable PPS signal in my NTP config but after some time both the GPS
>>> time and the PPS are marked a false ticker and the only thing left is
>>> the external reference clocks from outside our own network.
>>> 
>>> Parts used:
>>> Raspberry PI 3
>>> Adafruit GPS head: ADA-2324
>>> External GPS antenna with 5 meter cable.
>>> 
>>> My NTP config looks like this:
>>> 
>>> logfile /var/log/ntpd.log
>>> logconfig = all
>>> driftfile /var/lib/ntp/ntp.drift
>>> statsdir /var/log/ntpstats/
>>> statistics loopstats peerstats clockstats
>>> filegen loopstats file loopstats type day enable
>>> filegen peerstats file peerstats type day enable
>>> filegen clockstats file clockstats type day enable
>>> server 127.127.22.0 minpoll 4 maxpoll 4 prefer
>>> fudge 127.127.22.0 refid PPS flag3 1
>>> server 127.127.28.0 minpoll 4 maxpoll 4 iburst
>>> fudge 127.127.28.0 refid GPS time1 +0.550 flag1 1 stratum 4
>>> server ntp0.nl.uu.net
>>> server chime6.surfnet.nl
>>> server chime5.surfnet.nl
>>> server ntp1.virtu.nl
>>> 
>>> Now I got the idea that I might be able to use a DCF77 receiver to get a
>>> stable timesource, but on the other hand, if the cause of my problem is
>>> internal to the Raspberry PI setup then I might have exactly the same
>>> problem with the DCF77 receiver.
>>> 
>>> The average on the NTP clocksource is close to 0.
>>> root@raspberrypi:/var/log/ntpstats# cat peerstats |grep 127.127.28.0
>>> |awk '{print $5}'| tail -n 1500 | awk 'NR == 1 { max=$1; min=$1; sum=0 }
>>> { if ($1>max) max=$1; if ($1>> %d\tMax: %d\tAverage: %f\n", min, max, sum/NR}'
>>> Min: 0Max: 0Average: 0.001101
>>> 
>>> Could anyone give me some advice on how to get this working? Or is my
>>> idea to use a GPS c

Re: [time-nuts] SE880 GPSDO

[Attila Kinali]

On Mon, 25 Apr 2016 21:41:57 +0200
Ilia Platone  wrote:

> I'm trying to build a GPSDO with a FVXO-HC53BR-10 (Fox Electronics) VCXO 

Please note that the HC53 family is what is commonly called "programmable
crystal oscillator". Which means it is a combination of a crystal oscillator
with a VCO and a PLL. The crystal runs at an arbitrary frequency and is
used to stabilize the VCO. The use of a standard crystal makes these devices
very cheap, but their phase noise performance is rather bad.

Quite interestingly, Fox has a quite extensive specification for
the jitter performance and  splits it into random (aka noise) jitter
and deterministic (aka spurs) jitter. Curiously, there are no spurs
visible in the phase noise plot, which I find rather odd.

You might want to spend a couple of more bucks and get something
like the DOT050 from Connor Winfield that is a true crystal oscillator.

> and a Telit Jupiter 
> SE880,
>  
> this serves for a datalogger an I want to achieve a highly reliable clock.
> 
> This GPS receiver has two clock inputs: a 16MHz, and a 32KHz XT input 
> for the RTC functions.
> My problem is this: The crystal must be driven by a voltage depending to 
> the phase difference between the GPS 1PPS output and the uC 1s cycles, 

It does not need to. The GPS module does not care about whether its
oscillator is exactly on frequency or not and what the phase of it is.
You can of course phase lock it to the PPS and to make it stable, but
you dont have to.

> but must I drive (feedback) the RTC of the GPS also from a divider of 
> the main clock, or the 16MHz TCXO input, or both (or none...)?

The RTC is only there to give the GPS module a rough estimate of the
time so it can use the stored ephimeris data to speed up the search
for satellites. Ie there is no need to phase lock or stabilize the 32kHz
in any way.


> Suggestions of any other component, for driving both the VCXO, and 
> possibly for a RTK implementation, are welcome.

For RTK you need satellite phase data. Most of the GPS modules do not
provide this information. I could not figure out whether the SE880 does
or does not provide it. There is quite a bit of lack of documentation
for that module, especially the communcation protocol (no, "NMEA standard"
does not mean anything). 

Unless you already bought a SE880 already, i would recommend to
go with one of the u-blox modules (preferably the timing modules)
or get a LTE-Lite from Jackson Labs.


Attila Kinali

-- 
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Re: [time-nuts] SE880 GPSDO

[Bruce Griffiths]

On Monday, April 25, 2016 09:41:57 PM Ilia Platone wrote:
> Hi all,
> 
> I'm trying to build a GPSDO with a FVXO-HC53BR-10 (Fox Electronics) VCXO
> and a Telit Jupiter
> SE880 ://www.digikey.com/Suppliers/it/Fox-Electronics.page?lang=en>, this serves
> for a datalogger an I want to achieve a highly reliable clock.
> 
> This GPS receiver has two clock inputs: a 16MHz, and a 32KHz XT input
> for the RTC functions.
> My problem is this: The crystal must be driven by a voltage depending to
> the phase difference between the GPS 1PPS output and the uC 1s cycles,
> but must I drive (feedback) the RTC of the GPS also from a divider of
> the main clock, or the 16MHz TCXO input, or both (or none...)?
> 
> Suggestions of any other component, for driving both the VCXO, and
> possibly for a RTK implementation, are welcome.
> Thank you,
> Ilia.
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> instructions there.
What are the timing specifications for the data logging system?
Without this data, its not possible to decide if the proposed GPSDO will meet 
these specifications.
Whist its possible to construct a GPSDO using almost any crystal controlled 
oscillator, the timing performance will vary widely.
The datasheet for the Fox VCXO you selected does not specify the phasenoise, 
jitter or ADEV for the 10MHZ option.

Bruce
 
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Re: [time-nuts] SE880 GPSDO

[Ilia Platone]

I haven't bought anything yet, so feel free to recommend me any 
components/setup.


here is the datasheet I am referring to: 
http://www.foxonline.com/pdfs/FVXO_HC53.pdf


It contains some informations about phase jitter on page 5.

The

I selected this because of the CMOS output, since I didn't find any 
Connor Winfield osc with these levels yet.


Actually  want to achieve less than around 78ps jitter at 125MHz. (this 
should be achievable using this also: 
http://www.digikey.it/product-detail/it/fox-electronics/FVXO-HC53B-125/FVXO-HC53B-125-ND/2153894)


Let me know,

Ilia.


Il 25/04/2016 22:51, Bruce Griffiths ha scritto:

On Monday, April 25, 2016 09:41:57 PM Ilia Platone wrote:

Hi all,

I'm trying to build a GPSDO with a FVXO-HC53BR-10 (Fox Electronics) VCXO
and a Telit Jupiter
SE880, this serves
for a datalogger an I want to achieve a highly reliable clock.

This GPS receiver has two clock inputs: a 16MHz, and a 32KHz XT input
for the RTC functions.
My problem is this: The crystal must be driven by a voltage depending to
the phase difference between the GPS 1PPS output and the uC 1s cycles,
but must I drive (feedback) the RTC of the GPS also from a divider of
the main clock, or the 16MHz TCXO input, or both (or none...)?

Suggestions of any other component, for driving both the VCXO, and
possibly for a RTK implementation, are welcome.
Thank you,
Ilia.
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What are the timing specifications for the data logging system?
Without this data, its not possible to decide if the proposed GPSDO will meet
these specifications.
Whist its possible to construct a GPSDO using almost any crystal controlled
oscillator, the timing performance will vary widely.
The datasheet for the Fox VCXO you selected does not specify the phasenoise,
jitter or ADEV for the 10MHZ option.

Bruce
  
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Re: [time-nuts] SE880 GPSDO

[jimlux]

On 4/25/16 1:36 PM, Attila Kinali wrote:

On Mon, 25 Apr 2016 21:41:57 +0200
Ilia Platone  wrote:


I'm trying to build a GPSDO with a FVXO-HC53BR-10 (Fox Electronics) VCXO


Please note that the HC53 family is what is commonly called "programmable
crystal oscillator". Which means it is a combination of a crystal oscillator
with a VCO and a PLL. The crystal runs at an arbitrary frequency and is
used to stabilize the VCO. The use of a standard crystal makes these devices
very cheap, but their phase noise performance is rather bad.



No kidding.. we have one of those in a breadboard receiver and the phase 
noise makes acquiring a narrow band BPSK modulated signal virtually 
impossible.  We use it to verify that the circuit design is ok (e.g. we 
grab the right number of samples from the ADC in the right amount of 
time), but trying to get carrier lock is a dicey proposition.





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Re: [time-nuts] SE880 GPSDO

[Bruce Griffiths]

There's no spec for th 10MHz option you originally specified.What's the jitter 
bandwidth of interest?

Still need a spec for the data logging system timebase error.This is for your 
intensity interferometer?

Bruce 

On Tuesday, 26 April 2016 10:00 AM, Ilia Platone  
wrote:
 

 I haven't bought anything yet, so feel free to recommend me any 
components/setup.

here is the datasheet I am referring to: 
http://www.foxonline.com/pdfs/FVXO_HC53.pdf

It contains some informations about phase jitter on page 5.

The

I selected this because of the CMOS output, since I didn't find any 
Connor Winfield osc with these levels yet.

Actually  want to achieve less than around 78ps jitter at 125MHz. (this 
should be achievable using this also: 
http://www.digikey.it/product-detail/it/fox-electronics/FVXO-HC53B-125/FVXO-HC53B-125-ND/2153894)

Let me know,

Ilia.


Il 25/04/2016 22:51, Bruce Griffiths ha scritto:
> On Monday, April 25, 2016 09:41:57 PM Ilia Platone wrote:
>> Hi all,
>>
>> I'm trying to build a GPSDO with a FVXO-HC53BR-10 (Fox Electronics) VCXO
>> and a Telit Jupiter
>> SE880> ://www.digikey.com/Suppliers/it/Fox-Electronics.page?lang=en>, this serves
>> for a datalogger an I want to achieve a highly reliable clock.
>>
>> This GPS receiver has two clock inputs: a 16MHz, and a 32KHz XT input
>> for the RTC functions.
>> My problem is this: The crystal must be driven by a voltage depending to
>> the phase difference between the GPS 1PPS output and the uC 1s cycles,
>> but must I drive (feedback) the RTC of the GPS also from a divider of
>> the main clock, or the 16MHz TCXO input, or both (or none...)?
>>
>> Suggestions of any other component, for driving both the VCXO, and
>> possibly for a RTK implementation, are welcome.
>> Thank you,
>> Ilia.
>> ___
>> time-nuts mailing list -- time-nuts@febo.com
>> To unsubscribe, go to
>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the
>> instructions there.
> What are the timing specifications for the data logging system?
> Without this data, its not possible to decide if the proposed GPSDO will meet
> these specifications.
> Whist its possible to construct a GPSDO using almost any crystal controlled
> oscillator, the timing performance will vary widely.
> The datasheet for the Fox VCXO you selected does not specify the phasenoise,
> jitter or ADEV for the 10MHZ option.
>
> Bruce
>  
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Re: [time-nuts] SE880 GPSDO

[Attila Kinali]

On Mon, 25 Apr 2016 23:34:52 +0200
Ilia Platone  wrote:

> I selected this because of the CMOS output, since I didn't find any 
> Connor Winfield osc with these levels yet.

To get to CMOS levels, you usually add a simple inverter, with an
capacitor in front and a 1M resistor across the inverter (from input
to output).


> Actually  want to achieve less than around 78ps jitter at 125MHz. (this 
> should be achievable using this also: 
> http://www.digikey.it/product-detail/it/fox-electronics/FVXO-HC53B-125/FVXO-HC53B-125-ND/2153894)

I think you are mixing up a few things here:

Your logger might have very relaxed jitter requirements, but the
GPS module needs a low noise reference signal. If you feed it with
the noisy HC53 output, you will degrade your GPS receivers performance
severely. At the minimum, you should use a normal XO for the GPS modul.
You can of corse use a HC53 as the reference for your logger if its
jitter is ok for you.

And for comparison, for a XO you usually talk about jitter in the
order of 100fs to 1ps (10kHz-20MHz)



Attila Kinali
-- 
Reading can seriously damage your ignorance.
-- unknown
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Re: [time-nuts] SE880 GPSDO

[Bruce Griffiths]

You've omitted the following pertinent data:
1) The idea is to correlate photon arrival times at pairs of stations with 
lateral separations of up to 1 km or so.
2) The Signal to noise ratio of the resultant measurement is proportional to    
A) The geometric mean of the areas of the pair of telescopes          This 
cannot be too large as it smears out the details in the Fourier plane.   
    B) Square root of the electronic system bandwidth (or equivalently the 
reciprocal                of the photon relative arrival time stamp accuracy)  

    C) Square root of the observation time.
    The differential light path delays between the telescope pair can be up to 
3.3us or so.
The effect of differential noise between the timestamps at a telescope pair is 
to in effect reduce the effective electronic bandwidth or equivalently increase 
the observation time for a given SNR. For example with a time stamp resolution 
of 1ns (~500 MHz bandwidth) the differential timestamp noise should be much 
less than this (ie 100-200ps or so). With a 10ns (~50MHz bandwidth) timestamp 
resolution 1-2ns of differential timmestmp noise is tolerable, however the 
required observation time increases by a factor of 10 for a given SNR.
The SNR is independent of the optical filter bandwidth so that with a 
sufficiently narrow optical filter bandwidth its possible to ensure that photon 
counting is feasible.

The original Hanbury-Brown Twiss interferometer used 10m light buckets running 
on a circular railway track with interconnecting coax cables. The position of 
the collector pair was adjusted to maintain the baseline at right angles to the 
light path to the observed object thus ensuring zero differential light path 
delay between the collectors. The two signals were multiplied together using an 
analog circuit with a bandwidth of around 40MHz. Observation times of several 
hours were required even for relatively bright stars.
 For further details see:Long baseline optical intensity Interferometry

|   |
|   |  |   |   |   |   |   |
| [1506.05804] Long-baseline optical intensity interferome...Submission 
historyFrom: Dainis Dravins [view email] [v1] Thu, 18 Jun 2015 20:00:34 GMT 
(4473kb,D)  |
|  |
| View on arxiv.org | Preview by Yahoo |
|  |
|   |

Bruce


 

On Tuesday, 26 April 2016 11:03 AM, Bruce Griffiths 
 wrote:
 

 There's no spec for th 10MHz option you originally specified.What's the jitter 
bandwidth of interest?

Still need a spec for the data logging system timebase error.This is for your 
intensity interferometer?

Bruce 

    On Tuesday, 26 April 2016 10:00 AM, Ilia Platone  
wrote:
 

 I haven't bought anything yet, so feel free to recommend me any 
components/setup.

here is the datasheet I am referring to: 
http://www.foxonline.com/pdfs/FVXO_HC53.pdf

It contains some informations about phase jitter on page 5.

The

I selected this because of the CMOS output, since I didn't find any 
Connor Winfield osc with these levels yet.

Actually  want to achieve less than around 78ps jitter at 125MHz. (this 
should be achievable using this also: 
http://www.digikey.it/product-detail/it/fox-electronics/FVXO-HC53B-125/FVXO-HC53B-125-ND/2153894)

Let me know,

Ilia.


Il 25/04/2016 22:51, Bruce Griffiths ha scritto:
> On Monday, April 25, 2016 09:41:57 PM Ilia Platone wrote:
>> Hi all,
>>
>> I'm trying to build a GPSDO with a FVXO-HC53BR-10 (Fox Electronics) VCXO
>> and a Telit Jupiter
>> SE880> ://www.digikey.com/Suppliers/it/Fox-Electronics.page?lang=en>, this serves
>> for a datalogger an I want to achieve a highly reliable clock.
>>
>> This GPS receiver has two clock inputs: a 16MHz, and a 32KHz XT input
>> for the RTC functions.
>> My problem is this: The crystal must be driven by a voltage depending to
>> the phase difference between the GPS 1PPS output and the uC 1s cycles,
>> but must I drive (feedback) the RTC of the GPS also from a divider of
>> the main clock, or the 16MHz TCXO input, or both (or none...)?
>>
>> Suggestions of any other component, for driving both the VCXO, and
>> possibly for a RTK implementation, are welcome.
>> Thank you,
>> Ilia.
>> ___
>> time-nuts mailing list -- time-nuts@febo.com
>> To unsubscribe, go to
>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the
>> instructions there.
> What are the timing specifications for the data logging system?
> Without this data, its not possible to decide if the proposed GPSDO will meet
> these specifications.
> Whist its possible to construct a GPSDO using almost any crystal controlled
> oscillator, the timing performance will vary widely.
> The datasheet for the Fox VCXO you selected does not specify the phasenoise,
> jitter or ADEV for the 10MHZ option.
>
> Bruce
>  
> ___
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Re: [time-nuts] SE880 GPSDO

[Bob Camp]

Hi


> On Apr 25, 2016, at 7:36 PM, Attila Kinali  wrote:
> 
> On Mon, 25 Apr 2016 23:34:52 +0200
> Ilia Platone  wrote:
> 
>> I selected this because of the CMOS output, since I didn't find any 
>> Connor Winfield osc with these levels yet.
> 
> To get to CMOS levels, you usually add a simple inverter, with an
> capacitor in front and a 1M resistor across the inverter (from input
> to output).


If you set up a modern (74AC or faster) inverter with a resistor from input to 
output, you are very likely to get it running as an oscillator all on it’s own. 
That
oscillation may or may not add to the desired output. 

Stick with a two resistor bias on the input … it’s a lot safer.


> 
> 
>> Actually  want to achieve less than around 78ps jitter at 125MHz. (this 
>> should be achievable using this also: 
>> http://www.digikey.it/product-detail/it/fox-electronics/FVXO-HC53B-125/FVXO-HC53B-125-ND/2153894)
> 
> I think you are mixing up a few things here:
> 
> Your logger might have very relaxed jitter requirements, but the
> GPS module needs a low noise reference signal. If you feed it with
> the noisy HC53 output, you will degrade your GPS receivers performance
> severely. At the minimum, you should use a normal XO for the GPS modul.
> You can of corse use a HC53 as the reference for your logger if its
> jitter is ok for you.
> 
> And for comparison, for a XO you usually talk about jitter in the
> order of 100fs to 1ps (10kHz-20MHz)
> 
> 
> 
>   Attila Kinali
> -- 
> Reading can seriously damage your ignorance.
>   -- unknown
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Bob

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Re: [time-nuts] Lady Heather coming soon to a Linux box near you...

[Dave Mallery]

hi

looking to get the l/h sources on my linux box.  the l/h download button on
the web site only brings in the setup.exe which i presume does the windows
download.

what to do?

thanks.

dave mallery

On Sat, Apr 23, 2016 at 5:59 PM, Mark Sims  wrote:

> The question came up about Lady Heather's system usage on a PI3.  Turn's
> out she's quite the little resource hog.  CPU usage hovers between a
> whooping 2 and 3 percent ;-)   Running on a PI2 showed about the same.
>
> Slinging a window violently around on the srceen and it peaks to around
> 20%.  So there should be a few CPU cycles left over for whatever...
> Amazing what you can buy for $35 these days.  Or $5 for a Pi Zero... but
> it's only a single core processor... and likely to be in very short supply
> for a long time... they only build them when their production line is idle.
>
>
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>



-- 
Dave Mallery, K5EN (ubuntu linux 15-10)
PO Box 15  Ophir,  OR  97464

  linux counter #64628 (since 1997)
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