[U-Boot] Fwd: [PATCH] nand booting support (SPL) for phyCORE-i.MX31
Hello, Magnus 29.11.08, 12:59, "Magnus Lilja" <[EMAIL PROTECTED]>: Thank for time that you spend to review this patch. > Hi > 2008/11/29 user <[EMAIL PROTECTED]>: > > nand booting support (SPL) for phyCORE-i.MX31 > >... > > Patch is applicable on v2008.10 release tag master branch. > stgit couldn't apply the patch, but the standard 'patch' command could > (it said 'applied with fuzz' on start.S). May be it's my native utf-8 charset doesn't recode to latin-8859-1? Anything, I try this again. > Your patch seems to have some trailing whitespaces here and there. It is require to correct in according codestyle? > > #define CCM_MPCTL (CCM_BASE + 0x10) > > -#define CCM_UPCTL (CCM_BASE + 0x10) > > +#define CCM_UPCTL (CCM_BASE + 0x14) > The above fix should really go into the arm-tree immediately since > it's a separate bug fix (IMHO). What can I make with it? > > +/* > > + * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command > Change "rest" to "reset" (for all #define's below as well). More correctly to change "rest" to "the rest". > > + /* Block of NAND flash to be unlocked */ > > + /*NFC_UNLOCKSTART_BLKADDR = 0x0;*/ > > + /*NFC_UNLOCKEND_BLKADDR = 0x4000;*/ > > + > > + /* Unlock NAND Flash Block Command for given address range */ > > + /*NFC_WRPROT = 0x4;*/ > If the above is not needed, remove it. You are right. > > + mx31_read_page(from, buf); > > + from ++; > Remove space before ++; > > + buf = buf + CFG_NAND_PAGE_SIZE; > > + } > > + return 0; > > +} > Insert empty line. > Shouldn't the code check if the current block is marked as bad before > copying all the pages from that block into SDRAM? The first block is > typically guaranteed to be good (if I understand correctly) but any > subsequent block may be marked bad already from the factory and should > be skipped. The entire U-boot won't fit in the first block, atleast > for small page NAND devices. Yes, it's so. I wrote it for guaranteed first block chip. But for phycore board it's not so. I'll add bb verify feature. Best wishes, Maxim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ppc4xx: u-boot sees PCIe endpoint, linux does not.
On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote: > Hello, > > AMCC PPC460EX canyonlands board with an FPGA PCIe end point: > > u-boot sees the end point, but Linux does not: > > U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51) > CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz) > <...> > Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 16 > <...> > PCIE1: successfully set as root-complex > 02 00 2071 2071 00ff 00 > > > Now, if I re-program the end-point FPGA during the u-boot boot > time-out, Linux will recognize the end-point. > > Any takers on what I should start looking for? It's possible that either the reset in between goes bonkers or something else causes your FPGA to stop responding. It looks like a programming problem with the FPGA to me. Ben. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Fwd: [PATCH] nand booting support (SPL) for phyCORE-i.MX31
Hi 2008/12/1 Maxim Artamonov <[EMAIL PROTECTED]>: > Hello, Magnus > > 29.11.08, 12:59, "Magnus Lilja" <[EMAIL PROTECTED]>: > >> Your patch seems to have some trailing whitespaces here and there. > It is require to correct in according codestyle? Yes, I think so. >> > #define CCM_MPCTL (CCM_BASE + 0x10) >> > -#define CCM_UPCTL (CCM_BASE + 0x10) >> > +#define CCM_UPCTL (CCM_BASE + 0x14) >> The above fix should really go into the arm-tree immediately since >> it's a separate bug fix (IMHO). > What can I make with it? You can move this part of the patch to a separate stand-alone patch and submit it to the mailing list. > >> > +/* >> > + * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command >> Change "rest" to "reset" (for all #define's below as well). > More correctly to change "rest" to "the rest". Ah, true. >> > + mx31_read_page(from, buf); >> > + from ++; >> Remove space before ++; >> > + buf = buf + CFG_NAND_PAGE_SIZE; >> > + } >> > + return 0; >> > +} >> Insert empty line. >> Shouldn't the code check if the current block is marked as bad before >> copying all the pages from that block into SDRAM? The first block is >> typically guaranteed to be good (if I understand correctly) but any >> subsequent block may be marked bad already from the factory and should >> be skipped. The entire U-boot won't fit in the first block, atleast >> for small page NAND devices. > Yes, it's so. I wrote it for guaranteed first block chip. But for phycore > board it's not so. > I'll add bb verify feature. Excellent! Thanks, Magnus ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Installing Linux kernel, nothing to execute in RAM...
2008/11/27 Simon Boman <[EMAIL PROTECTED]>: > 2008/11/26 Simon Boman <[EMAIL PROTECTED]>: >> Hi! >> >> I have a modifed MPC8360 platform with a U-boot git-version from October. >> Now I'm trying to install a Linux kernel and everything looks fine >> until it starts to execute the kernel in RAM, there is only some bad >> assembler instructions and then a lot of Invalid Opcode. If I look at >> the log_buf there is nothing interesting there. >> >> bootm fc01 - fc008000 >> ## Booting kernel from Legacy Image at fc01 ... >> Image Name: Linux-2.6.22 >> Image Type: PowerPC Linux Kernel Image (gzip compressed) >> Data Size:773535 Bytes = 755.4 kB >> Load Address: >> Entry Point: >> Verifying Checksum ... OK >> ## Flattened Device Tree blob at fc008000 >> Booting using the fdt blob at 0xfc008000 >> Uncompressing Kernel Image ... OK >> Loading Device Tree to 00ff6000, end 0006 ... OK >> >> ->printenv >> ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate >> $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr >> $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr >> nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath >> ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off >> console=$consoledev,$baudrate $othbootargs;tftp $loadaddr >> $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr >> baudrate=115200 >> loads_echo=1 >> loadaddr=20 >> consoledev=ttyS0 >> ramdiskaddr=100 >> ramdiskfile=ramfs.83xx >> netretry=no >> ethrotate=no >> fdtfile=mpc8360epaw.dtb >> uImage_offset=FC01 >> fdt_offset=FC008000 >> filesize=492F13 >> ramdisk_offset=FC16 >> fdtaddr=fc008000 >> stdin=serial >> stdout=serial >> stderr=serial >> kerneladdr=fc01 >> bootcmd=setenv bootargs root=/dev/ram rw console=ttyS0,115200 bootm >> fc01 - fc008000 >> bootargs=root=/dev/ram rw console=ttyS0,115200 bootm fc01 - fc008000 >> >> >> I'm not quite sure if this is a U-boot problem or Linux problem, if >> not I apologise. >> >> TIA >> Simon >> > > Hi again! > > I have also tried to boot with the kernel image that Freescale > provided from their homepage, but even with that I just get "Program > Exception" when it starts to execute the kernel in RAM. So it seems > that I have made something wrong in the U-boot.. any ideas? > /Simon > Hey! I have now figured out that the linux kernel is copied correctly to the RAM except the 0x1000 bytes. I have compared the vmlinux.bin.17136 file which I extracted from the vmlinux.bin.gz file. Is it something I have missed when everything seems correct except the beginning of RAM? Thanks Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Error compiling UBOOT 1.3.4 for AT91RM9200
On 14:14 Sat 29 Nov , Linux RegaTech wrote: > Hello UBOOT mailinglist > > I have encountered a problem when i try to compile any newer version of UBOOT > than V1.2.0 for AT91RM9200, > below is given the output from console when i try to compile the UBOOT V1.3.4 > for AT91RM9200, > could anybody please give me a hint what a solution to this problem might > could be: please use the last release or the rc I've test it yesterday Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] frescale NAND FLASH problems
Hi, everyone: I'm working with u-boot 2008 version for a freescale M5329EVB. I've configured the IDE and Compact flash modules but problems are with NANDFLASH When i try to add #define NANDFLASH_SIZE16 to my sistem and compile I get this error: nand.c: In function 'nand_hwcontrol': nand.c:50: error: 'NAND_CTL_SETNCE' undeclared (first use in this function) nand.c:50: error: (Each undeclared identifier is reported only once nand.c:50: error: for each function it appears in.) nand.c:51: error: 'NAND_CTL_CLRNCE' undeclared (first use in this function) nand.c:53: error: 'NAND_CTL_SETCLE' undeclared (first use in this function) nand.c:56: error: 'NAND_CTL_CLRCLE' undeclared (first use in this function) nand.c:59: error: 'NAND_CTL_SETALE' undeclared (first use in this function) nand.c:62: error: 'NAND_CTL_CLRALE' undeclared (first use in this function) nand.c:65: error: 'NAND_CTL_SETWP' undeclared (first use in this function) nand.c:68: error: 'NAND_CTL_CLRWP' undeclared (first use in this function) nand.c: In function 'board_nand_init': nand.c:106: error: 'struct nand_chip' has no member named 'eccmode' nand.c:107: error: incompatible types in assignment nand.c:109: error: 'struct nand_chip' has no member named 'write_byte' make[1]: *** [nand.o] Error 1 make[1]: se sale del directorio `/home/carlos/Escritorio/u-boot-ide-experimental/board/freescale/m5329evb' make: *** [board/freescale/m5329evb/libm5329evb.a] Error 2 Has any body got a solution to get my NAND FLASH detected. Thanks in advance ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Uboot AS Space in MPC85xx Start.S
Hi, I am working on the Start.S in the Bootloader code for MPC8572. I find that At some point of time we say we switch to AS=1 when setting TLB. After cpu_early_init_f we switch back to AS=0. So we do this to avoid some mismatch. But when we shift back to AS=0, I want to know what is there in that Address Space 0. Can some one help me on this. Suppose I am modifying the code of u-boot into just one function board_init_f without the previous call then what operations should be done on AS=0 and AS=1. Let me know. Actual Code Snippet: bl cpu_init_early_f ---> This is happening in AS = 1 /* switch back to AS = 0 */ lis r3,(MSR_CE|MSR_ME|MSR_DE)@h ori r3,r3,(MSR_CE|MSR_ME|MSR_DE)@l mtmsr r3 isync bl cpu_init_f ---> This is happening in AS = 0 bl board_init_f isync My Code : #AS=1 TLB Mapping .. .. .. #switch back to AS = 0 lis %r3,(MSR_CE|MSR_ME|MSR_DE)@h ori %r3,%r3,(MSR_CE|MSR_ME|MSR_DE)@l mtmsr %r3 isync bl main# Jump to main() for board & cpu init Thanks & Regards, Vignesh Kumar B DISCLAIMER: --- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any liability on the originator or HCL or its affiliates. Any views or opinions presented in this email are solely those of the author and may not necessarily reflect the opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of the author of this e-mail is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any mail and attachments please check them for viruses and defect. --- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] tools/mkimage: use lseek rather than fstat for file size for -l option
Use lseek rather than fstat for file size for list mode, so
mkimage -l /dev/mtdblockN works (stat returns st_size == 0 for devices).
Notice that you have to use /dev/mtdblockN and not /dev/mtdN, as the
latter doesn't support mmap.
Signed-off-by: Peter Korsgaard <[EMAIL PROTECTED]>
---
tools/mkimage.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 58fd20f..ca8254f 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -205,7 +205,8 @@ NXTARG: ;
/*
* list header information of existing image
*/
- if (fstat(ifd, &sbuf) < 0) {
+ sbuf.st_size = lseek(ifd, 0, SEEK_END);
+ if (sbuf.st_size == (off_t)-1) {
fprintf (stderr, "%s: Can't stat %s: %s\n",
cmdname, imagefile, strerror(errno));
exit (EXIT_FAILURE);
--
1.5.6.5
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[U-Boot] [PATCH] tools/mkimage: ignore trailing garbage
Ignore trailing data after the uimage data and only complain if the
file is too small.
(E.G. if the uImage was stored in flash and hence padded to the flash
sector size).
Signed-off-by: Peter Korsgaard <[EMAIL PROTECTED]>
---
tools/mkimage.c |9 -
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 967fe9a..58fd20f 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -523,7 +523,14 @@ image_verify_header (char *ptr, int image_size)
}
data = ptr + sizeof(image_header_t);
- len = image_size - sizeof(image_header_t) ;
+ len = ntohl(hdr->ih_size);
+ if (len > (image_size - sizeof(image_header_t))) {
+ fprintf (stderr,
+ "%s: ERROR: \"%s\" is too short (%d vs %d bytes)!\n",
+cmdname, imagefile,
+image_size - sizeof(image_header_t), len);
+ exit (EXIT_FAILURE);
+ }
if (crc32 (0, data, len) != ntohl(hdr->ih_dcrc)) {
fprintf (stderr,
--
1.5.6.5
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Re: [U-Boot] [PATCH v2] nand: Fix cache and memory inconsistent issue
On Fri, Nov 28, 2008 at 08:16:28PM +0800, Dave Liu wrote:
> +static void __flush_cache(ulong start, ulong size)
No gratuitous underscores.
> +{
> + ulong addr, end;
> + ulong cache_line = CONFIG_SYS_CACHELINE_SIZE;
> +
> + end = start + size;
> +
> + /* clean the dcache, make sure all of data to memory */
> + for (addr = start; addr < end; addr += cache_line)
> + asm ("dcbst 0,%0": :"r" (addr));
If (start % cache_line) > (end % cache_line), then you could miss
flushing the last cache line.
Make the asm volatile, with a memory clobber, and preferably with spaces
around the colons.
Please factor this out into arch code, and make it shareable with other
NAND code (such as nand_boot.c).
> + /*
> + * We need clean dcache and invalidate
> + * to sync between icache and dcache
> + * before jump to RAM. make sure all of
> + * NAND data write to memory.
"Clean d-cache and invalidate i-cache, to make sure that
no stale data is executed."
-Scott
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[U-Boot] Pull requst u-boot-mpc86xx
Wolfgang,
The following changes since commit 2077e348c2a84901022ad95311b47b70361e6daa:
Scott Wood (1):
NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc86xx.git master
Becky Bruce (1):
mpc8641: Fix error in README
Jon Loeliger (2):
86xx: Fix non-64-bit compilation problems.
Removed unused CONFIG_L1_INIT_RAM symbol.
doc/README.mpc8641hpcn| 10 +-
include/configs/MPC8349EMDS.h |1 -
include/configs/MPC8349ITX.h |1 -
include/configs/MPC8536DS.h |2 --
include/configs/MPC8540ADS.h |1 -
include/configs/MPC8540EVAL.h |1 -
include/configs/MPC8541CDS.h |1 -
include/configs/MPC8544DS.h |2 --
include/configs/MPC8548CDS.h |1 -
include/configs/MPC8555CDS.h |1 -
include/configs/MPC8560ADS.h |1 -
include/configs/MPC8568MDS.h |1 -
include/configs/MPC8572DS.h |2 --
include/configs/MPC8610HPCD.h | 15 ++-
include/configs/MPC8641HPCN.h |1 -
include/configs/MVBLM7.h |1 -
include/configs/PM854.h |1 -
include/configs/PM856.h |1 -
include/configs/SBC8540.h |1 -
include/configs/TQM834x.h |1 -
include/configs/TQM85xx.h |1 -
include/configs/sbc8349.h |1 -
include/configs/sbc8548.h |1 -
include/configs/sbc8560.h |1 -
include/configs/sbc8641d.h| 15 ++-
include/configs/socrates.h|1 -
include/configs/stxgp3.h |1 -
include/configs/stxssa.h |1 -
28 files changed, 33 insertions(+), 35 deletions(-)
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Re: [U-Boot] [PATCH v2 2/2] XPedite5200 board support
On Wed, 2008-11-26 at 11:15 -0600, Peter Tyser wrote: > Initial support for Extreme Engineering Solutions XPedite5200 - > a MPC8548-based PMC single board computer. > > Signed-off-by: Peter Tyser <[EMAIL PROTECTED]> > diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h > new file mode 100644 > index 000..701c060 > +/* > + * Use L1 as initial stack > + */ > +#define CONFIG_L1_INIT_RAM 1 The above symbol is being removed, and should not be re-introduced in your patch. > +#define CONFIG_SYS_INIT_RAM_LOCK 1 > +#define CONFIG_SYS_INIT_RAM_ADDR 0xe000 > +#define CONFIG_SYS_INIT_RAM_END 0x4000 > + Thanks, jdl ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] net: Define IP flag field values
These defines were pulled from the "Add simple
IP/UDP fragmentation support" patch from Frank
Haverkamp <[EMAIL PROTECTED]>.
---
include/net.h |6 ++
net/net.c |6 +++---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/include/net.h b/include/net.h
index a5a256b..199872e 100644
--- a/include/net.h
+++ b/include/net.h
@@ -200,6 +200,12 @@ typedef struct {
ushort udp_xsum; /* Checksum */
} IP_t;
+#define IP_OFFS0x1fff /* ip offset *= 8 */
+#define IP_FLAGS 0xe000 /* first 3 bits */
+#define IP_FLAGS_RES 0x8000 /* reserved */
+#define IP_FLAGS_DFRAG 0x4000 /* don't fragments */
+#define IP_FLAGS_MFRAG 0x2000 /* more fragments */
+
#define IP_HDR_SIZE_NO_UDP (sizeof (IP_t) - 8)
#define IP_HDR_SIZE(sizeof (IP_t))
diff --git a/net/net.c b/net/net.c
index 77e83b5..cf1f4fa 100644
--- a/net/net.c
+++ b/net/net.c
@@ -735,7 +735,7 @@ int PingSend(void)
ip->ip_tos = 0;
ip->ip_len = htons(IP_HDR_SIZE_NO_UDP + 8);
ip->ip_id= htons(NetIPID++);
- ip->ip_off = htons(0x4000); /* No fragmentation */
+ ip->ip_off = htons(IP_FLAGS_DFRAG); /* Don't fragment */
ip->ip_ttl = 255;
ip->ip_p = 0x01;/* ICMP */
ip->ip_sum = 0;
@@ -1399,7 +1399,7 @@ NetReceive(volatile uchar * inpkt, int len)
if ((ip->ip_hl_v & 0xf0) != 0x40) {
return;
}
- if (ip->ip_off & htons(0x1fff)) { /* Can't deal w/ fragments */
+ if (ip->ip_off & htons(IP_OFFS)) { /* Can't deal w/ fragments */
return;
}
/* can't deal with headers > 20 bytes */
@@ -1698,7 +1698,7 @@ NetSetIP(volatile uchar * xip, IPaddr_t dest, int dport,
int sport, int len)
ip->ip_tos = 0;
ip->ip_len = htons(IP_HDR_SIZE + len);
ip->ip_id= htons(NetIPID++);
- ip->ip_off = htons(0x4000); /* No fragmentation */
+ ip->ip_off = htons(IP_FLAGS_DFRAG); /* Don't fragment */
ip->ip_ttl = 255;
ip->ip_p = 17; /* UDP */
ip->ip_sum = 0;
--
1.6.0.2.GIT
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[U-Boot] [PATCH 0/2] net: Additional IP fragmentation check
It looks like U-Boot ignores fragmented IP packets with non-zero "fragment offset" fields, but doesn't ignore the initial fragmented IP packet which has a "fragment offset" field value of 0. An additional check was added to catch the initial fragmented packet which should have the "more fragments" bit set in its flags field. The bug initially resulted in TFTP transfers which appeared to work, but in reality failed as some fragmented packets were received, others were not. With these patches applied a TFTP download from a server with a low MTU results in a timeout as U-Boot drops all incominig fragmented TFTP data packets. I quickly tried the "Add simple IP/UDP fragmentation support" patch in the net/testing repository, but it did not work out of the box. It looks like U-Boot was assembling the fragmented packets correctly based on a memory display of &NetFragBuf, but the assembled packet was not making its way up the stack FWIW. Peter Tyser (2): net: Define IP flag field values net: Add additional IP fragmentation check include/net.h |6 ++ net/net.c |8 +--- 2 files changed, 11 insertions(+), 3 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] net: Add additional IP fragmentation check
Ignore IP packets which have the "more fragments" flag bit
set. This flag indicates the IP packet is fragmented and
must be ignored by U-Boot.
---
net/net.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/net/net.c b/net/net.c
index cf1f4fa..b8e09e8 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1399,7 +1399,8 @@ NetReceive(volatile uchar * inpkt, int len)
if ((ip->ip_hl_v & 0xf0) != 0x40) {
return;
}
- if (ip->ip_off & htons(IP_OFFS)) { /* Can't deal w/ fragments */
+ /* Can't deal with fragments */
+ if (ip->ip_off & htons(IP_OFFS | IP_FLAGS_MFRAG)) {
return;
}
/* can't deal with headers > 20 bytes */
--
1.6.0.2.GIT
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Re: [U-Boot] iPAQ 21x support (+PXA3xx NAND flash and MMC)
--On Saturday, November 29, 2008 09:03:25 AM -0500 Oliver Ford <[EMAIL PROTECTED]> wrote: > Hi, > > I've recently started trying to use U-boot on an iPAQ 214 which runs on > a PXA310 cpu. > I've got the basic boot up, NAND flash and MMC systems working so far. > > > I'm not sure it exactly fits in with the u-boot nand code (eg. it does > an internal read ID scan to find the right command set) but it works a > lot better than the board/zylonite/nand.c. Would this be useful to > anyone else? > I'm pretty interested. NAND on the pxa320 is proving to be a pain to us. What's your boot sequence look like? Are you using the mobm from the BSP? Are you using the nand_spl from u-boot? Adrian -- Linux Software Engineer | EuroTech, Inc. | www.eurotech-inc.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Fwd: Re: iPAQ 21x support (+PXA3xx NAND flash and MMC)]
Whoops, I think I missed the list on this one. Daniel Mack wrote: > Yes, absolutely - to me. I'm sitting on this at this very moment :) > > I was also thinking about implementing this as a PXA3xx generic layer > for small pages, large pages, 8bit and 16bit so the same code does not > need to be copied to all the board implementations over and over again. > > But I'm not sure whether there are any plans to do this as I didn't > follow the development of this project for a long time. > > Anyways, I'd appreciate if you could send over what you got. > Ok, I've currently got it inside my board code directory but it wouldn't be much to generalise. There's a copy here: http://www.oliford.co.uk/hpipaq214/public/u-boot/board/ipaq214/nand.c http://www.oliford.co.uk/hpipaq214/public/u-boot/board/ipaq214/pxa3xx-nand.h Mostly it's the same as the linux one except that I've written a function called pxa3xx_nand_no_irq_wait_completion_timeout() which mimics the call to wait_for_completion_timeout() that would be made with IRQs avaliable. Oliver ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ppc4xx: u-boot sees PCIe endpoint, linux does not.
Hello all, On Mon, Dec 1, 2008 at 9:12 AM, Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote: > On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote: >> >> AMCC PPC460EX canyonlands board with an FPGA PCIe end point: >> >> u-boot sees the end point, but Linux does not: >> >> U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51) >> CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz) >> <...> >> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 16 >> <...> >> PCIE1: successfully set as root-complex >> 02 00 2071 2071 00ff 00 >> >> Now, if I re-program the end-point FPGA during the u-boot boot >> time-out, Linux will recognize the end-point. >> > It's possible that either the reset in between goes bonkers or something > else causes your FPGA to stop responding. It looks like a programming > problem with the FPGA to me. > I have verified that the end point does not receive any kind of reset. Also, this problem only happens on the Canyonlands board; on x86 and powerpc MPC8315E it remains properly working after soft/hard resets, u-boot init etc. Could it be u-boot overwrites a too large payload into the config space or something similar, which makes subsequent accesses fail? Regards, -- Leon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] iPAQ 21x support (+PXA3xx NAND flash and MMC)
Adrian Filipi wrote: > > I'm pretty interested. NAND on the pxa320 is proving to be a pain > to us. It seems I'd forgotten to cc' the list on my reply to Daniel so I've fw'ed that on now - see that msg for some of the details and the source. It should work ok for the pxa320 but I think there is a #define that needs changing because the controller clock speed is different. I think the docs said that that was the only difference. > > What's your boot sequence look like? Not much at the moment, I've just been playing with it. Currently I let the OBM load u-boot from flash and then u-boot loads the kernel off of the MMC card because I'm having problems with JFFS2 on the NAND within linux itself (Is JFFS2 supposed to be that slow??). > Are you using the mobm from the BSP? Bear in mind this is an iPAQ so a complete retailed system. I can't get any help or info from Marvell or HP so I'm doing everything by poking it and seeing. If the MOBM is what I know as just the OBM then yes, but it's the winCE one (they are apparently slightly different). The OBM loaded the winCE bootloader from 0x4-0x8 in the flash to 0x83C0 in RAM. I've just put U-Boot there and let the OBM load it up. The other advantage being that the MMC and NAND MFP configs and basics have already been set. I daren't touch the OBM because I can't reflash the device if it fails to boot and the OBM lets me boot off of the MMC card (it's "diagnostic function") if I wipe the later boot stages. > Are you using the nand_spl from u-boot? Not sure what that is. I'm afraid I'm still on the learning curve as I only saw u-boot for the first time on Thursday and hadn't touched the NAND flash before the weekend before. Hope that helps, Oliver ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] net: Fix TftpStart() ip:filename bug
The TftpStart() function modifies the 'BootFile'
string when 'BootFile' contains both an IP address
and filename (eg 1.2.3.4:/path/file). This causes
subsequent calls to TftpStart to incorrectly parse
the TFTP filename and server IP address to use.
For example:
=> tftp 0x10 10.52.0.62:/home/ptyser/non_existant
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.62; our IP address is 10.52.253.79
^^ CORRECT
Filename '/home/ptyser/non_existant'.
^ CORRECT
Load address: 0x10
Loading: *
TFTP error: 'File not found' (1)
Starting again
eTSEC2: No link.
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.33; our IP address is 10.52.253.79
^^ WRONG
Filename '10.52.0.62'.
^^ WRONG
Load address: 0x10
Loading: *
TFTP error: 'File not found' (1)
Starting again
TftpStart() was modified to not modify the 'BootFile' string.
---
net/tftp.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/net/tftp.c b/net/tftp.c
index ce6ea3d..3dac3d8 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -499,9 +499,8 @@ TftpStart (void)
strncpy(tftp_filename, BootFile, MAX_LEN);
tftp_filename[MAX_LEN-1] = 0;
} else {
- *p++ = '\0';
TftpServerIP = string_to_ip (BootFile);
- strncpy(tftp_filename, p, MAX_LEN);
+ strncpy(tftp_filename, p + 1, MAX_LEN);
tftp_filename[MAX_LEN-1] = 0;
}
}
--
1.6.0.2.GIT
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Re: [U-Boot] [PATCH v2] nand: Fix cache and memory inconsistent issue
On Monday 01 December 2008, Scott Wood wrote:
> Please factor this out into arch code, and make it shareable with other
> NAND code (such as nand_boot.c).
Yes, please.
> > + /*
> > +* We need clean dcache and invalidate
> > +* to sync between icache and dcache
> > +* before jump to RAM. make sure all of
> > +* NAND data write to memory.
>
> "Clean d-cache and invalidate i-cache, to make sure that
> no stale data is executed."
And the function name is not perfectly fitting for my taste. Why not extract 2
functions, flush_dcache_range() and invalidate_icache_range(). This reminds
me that some architectures/platforms already have those functions defined
(PPC4xx at least does). But the 2nd parameter is not size but end ("stolen"
from the Linux kernel). Perhaps it makes sense to use these functions here as
well.
Best regards,
Stefan
=
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED]
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[U-Boot] [PATCH v4 0/3]Support for XPedite5370 and misc GPIO
Hello, This patch series adds support for the XPedite5370 SBC. Its an MPC8572-based VPX card with a PMC/XMC site. The XPedite5370 includes a significant number of I2C GPIO devices (5) which are used for board configuration. I added support for 2 new I2C gpio devices in a new drivers/gpio directory. I'm not sure if this is the preferred location/method, so let me know if others have have different preferences. It'd be nice to have a more generic GPIO framework (like Linux's) at some point, but figured this was a step in the right direction by providing a place for generic GPIO devices in drivers/gpio. Thanks, Peter Changes since v1: - Rebased to u-boot-mpc85xx tree - Updated NOR flash remapping method - Added CONFIG_SYS_I2C2_OFFSET define to XPEDITE5370.h - Removed CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE from XPEDITE5370.h Changes since v2: pca953x.c: - Use cmd_tbl_t for subcommand parsing - Made 'info' command dependent on CONFIG_CMD_PCA953X_INFO - Removed chip command parameters, added 'device' subcommand ds4510.c: - Use cmd_tbl_t for subcommand parsing - Made 'info' command dependent on CONFIG_CMD_DS4510_INFO - Made memory commands dependent on CONFIG_CMD_DS4510_MEM - Made 'rst' command dependent on CONFIG_CMD_DS4510_RST - Removed chip command parameters, added 'device' subcommand - Fixed multiline comment style - moved to drivers/misc xpedite5370: - Changed alignment by spaces to alignment by tabs - Fixed gur->devdisr typo for PCIe2 - Fixed some lines over 80 chars - Fixed multiline comment style - Cleaned up environment defines Changes since v3: - Removed CONFIG_L1_INIT_RAM reference Peter Tyser (3): Add support for PCA953x I2C gpio devices Add support for Maxim's DS4510 I2C device XPedite5370 board support MAINTAINERS |3 + MAKEALL |1 + Makefile|5 + README | 13 + board/xes/common/Makefile | 56 board/xes/common/fsl_8572_clk.c | 51 +++ board/xes/common/fsl_85xx_ddr.c | 93 ++ board/xes/common/fsl_85xx_pci.c | 265 board/xes/xpedite5370/Makefile | 45 +++ board/xes/xpedite5370/config.mk | 35 ++ board/xes/xpedite5370/ddr.c | 270 board/xes/xpedite5370/law.c | 54 board/xes/xpedite5370/tlb.c | 94 ++ board/xes/xpedite5370/u-boot.lds| 145 + board/xes/xpedite5370/xpedite5370.c | 128 drivers/gpio/Makefile | 47 +++ drivers/gpio/pca953x.c | 218 + drivers/misc/Makefile |1 + drivers/misc/ds4510.c | 400 include/configs/XPEDITE5370.h | 589 +++ include/gpio/ds4510.h | 75 + include/gpio/pca953x.h | 39 +++ 22 files changed, 2627 insertions(+), 0 deletions(-) create mode 100644 board/xes/common/Makefile create mode 100644 board/xes/common/fsl_8572_clk.c create mode 100644 board/xes/common/fsl_85xx_ddr.c create mode 100644 board/xes/common/fsl_85xx_pci.c create mode 100644 board/xes/xpedite5370/Makefile create mode 100644 board/xes/xpedite5370/config.mk create mode 100644 board/xes/xpedite5370/ddr.c create mode 100644 board/xes/xpedite5370/law.c create mode 100644 board/xes/xpedite5370/tlb.c create mode 100644 board/xes/xpedite5370/u-boot.lds create mode 100644 board/xes/xpedite5370/xpedite5370.c create mode 100644 drivers/gpio/Makefile create mode 100644 drivers/gpio/pca953x.c create mode 100644 drivers/misc/ds4510.c create mode 100644 include/configs/XPEDITE5370.h create mode 100644 include/gpio/ds4510.h create mode 100644 include/gpio/pca953x.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/3] Add support for PCA953x I2C gpio devices
Initial support for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc). The CONFIG_PCA953X define enables support for the devices while the CONFIG_CMD_PCA953X define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO define enables an 'info' sub-command which provides summary information for the given pca953x device. Signed-off-by: Peter Tyser <[EMAIL PROTECTED]> --- Makefile |2 + README |9 ++ drivers/gpio/Makefile | 47 ++ drivers/gpio/pca953x.c | 218 include/gpio/pca953x.h | 39 + 5 files changed, 315 insertions(+), 0 deletions(-) create mode 100644 drivers/gpio/Makefile create mode 100644 drivers/gpio/pca953x.c create mode 100644 include/gpio/pca953x.h diff --git a/Makefile b/Makefile index fd521b6..0c5dd61 100644 --- a/Makefile +++ b/Makefile @@ -221,6 +221,7 @@ LIBS += disk/libdisk.a LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/block/libblock.a LIBS += drivers/dma/libdma.a +LIBS += drivers/gpio/libgpio.a LIBS += drivers/hwmon/libhwmon.a LIBS += drivers/i2c/libi2c.a LIBS += drivers/input/libinput.a @@ -396,6 +397,7 @@ TAG_SUBDIRS += disk TAG_SUBDIRS += common TAG_SUBDIRS += drivers/bios_emulator TAG_SUBDIRS += drivers/block +TAG_SUBDIRS += drivers/gpio TAG_SUBDIRS += drivers/hwmon TAG_SUBDIRS += drivers/i2c TAG_SUBDIRS += drivers/input diff --git a/README b/README index 9455fa7..bca8061 100644 --- a/README +++ b/README @@ -603,6 +603,8 @@ The following options need to be configured: CONFIG_CMD_MII * MII utility commands CONFIG_CMD_NAND * NAND support CONFIG_CMD_NETbootp, tftpboot, rarpboot + CONFIG_CMD_PCA953X * PCA953x I2C gpio commands + CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command CONFIG_CMD_PCI * pciinfo CONFIG_CMD_PCMCIA * PCMCIA support CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network @@ -680,6 +682,13 @@ The following options need to be configured: Note that if the RTC uses I2C, then the I2C interface must also be configured. See I2C Support, below. +- GPIO Support: + CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO + CONFIG_PCA953X_INFO - enable pca953x info command + + Note that if the GPIO device uses I2C, then the I2C interface + must also be configured. See I2C Support, below. + - Timestamp Support: When CONFIG_TIMESTAMP is selected, the timestamp diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile new file mode 100644 index 000..dd618ed --- /dev/null +++ b/drivers/gpio/Makefile @@ -0,0 +1,47 @@ +# +# Copyright 2000-2008 +# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED] +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB:= $(obj)libgpio.a + +COBJS-$(CONFIG_PCA953X)+= pca953x.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB):$(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + + diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c new file mode 100644 index 000..f52e559 --- /dev/null +++ b/drivers/gpio/pca953x.c @@ -0,0 +1,218 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GN
[U-Boot] [PATCH v4 2/3] Add support for Maxim's DS4510 I2C device
Initial support for the DS4510, a CPU supervisor with
integrated EEPROM, SRAM, and 4 programmable non-volatile
GPIO pins. The CONFIG_DS4510 define enables support
for the device while the CONFIG_CMD_DS4510 define
enables the ds4510 command. The additional
CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and
CONFIG_DS4510_RST defines add additional sub-commands
to the ds4510 command when defined.
Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
---
README|4 +
drivers/misc/Makefile |1 +
drivers/misc/ds4510.c | 400 +
include/gpio/ds4510.h | 75 +
4 files changed, 480 insertions(+), 0 deletions(-)
create mode 100644 drivers/misc/ds4510.c
create mode 100644 include/gpio/ds4510.h
diff --git a/README b/README
index bca8061..cea057d 100644
--- a/README
+++ b/README
@@ -574,6 +574,10 @@ The following options need to be configured:
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
CONFIG_CMD_DOC * Disk-On-Chip Support
+ CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
+ CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
+ CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
+ CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
CONFIG_CMD_DTT * Digital Therm and Thermostat
CONFIG_CMD_ECHO echo arguments
CONFIG_CMD_EEPROM * EEPROM read/write support
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 01e0f39..ea2bf87 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB:= $(obj)libmisc.a
COBJS-$(CONFIG_ALI152X) += ali512x.o
+COBJS-$(CONFIG_DS4510) += ds4510.o
COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
COBJS-$(CONFIG_NS87308) += ns87308.o
COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c
new file mode 100644
index 000..572dcb7
--- /dev/null
+++ b/drivers/misc/ds4510.c
@@ -0,0 +1,400 @@
+/*
+ * Copyright 2008 Extreme Engineering Solutions, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
+ * and 4 programmable non-volatile GPIO pins.
+ */
+
+#include
+#include
+#include
+#include
+
+/* Default to an address that hopefully won't corrupt other i2c devices */
+#ifndef CONFIG_SYS_I2C_DS4510_ADDR
+#define CONFIG_SYS_I2C_DS4510_ADDR (~0)
+#endif
+
+enum {
+ DS4510_CMD_INFO,
+ DS4510_CMD_DEVICE,
+ DS4510_CMD_NV,
+ DS4510_CMD_RSTDELAY,
+ DS4510_CMD_OUTPUT,
+ DS4510_CMD_INPUT,
+ DS4510_CMD_PULLUP,
+ DS4510_CMD_EEPROM,
+ DS4510_CMD_SEEPROM,
+ DS4510_CMD_SRAM,
+};
+
+/*
+ * Write to DS4510, taking page boundaries into account
+ */
+int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
+{
+ int wrlen;
+ int i = 0;
+
+ do {
+ wrlen = DS4510_EEPROM_PAGE_SIZE -
+ DS4510_EEPROM_PAGE_OFFSET(offset);
+ if (count < wrlen)
+ wrlen = count;
+ i2c_write(chip, offset, 1, &buf[i], wrlen);
+
+ /*
+* This delay isn't needed for SRAM writes but shouldn't delay
+* things too much, so do it unconditionally for simplicity
+*/
+ udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+ count -= wrlen;
+ offset += wrlen;
+ i += wrlen;
+ } while (count > 0);
+
+ return 0;
+}
+
+/*
+ * General read from DS4510
+ */
+int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
+{
+ return i2c_read(chip, offset, 1, buf, count);
+}
+
+/*
+ * Write SEE bit in config register.
+ * nv = 0 - Writes to SEEPROM registers behave like EEPROM
+ * nv = 1 - Writes to SEEPROM registers behave like SRAM
+ */
+int ds4510_see_write(uint8_t chip, uint8_t nv)
+{
+ uint8_t data;
+
+ if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
+ return -1;
+
+ if (nv) /* Treat SEEPROM bits as EEPROM */
+ data &= ~DS4510_CFG_SEE;
+ else/* Treat SEEPROM bits as SRAM */
+ data |= DS4510_CFG_
Re: [U-Boot] ppc4xx: u-boot sees PCIe endpoint, linux does not.
On Monday 01 December 2008, Leon Woestenberg wrote: > >> Now, if I re-program the end-point FPGA during the u-boot boot > >> time-out, Linux will recognize the end-point. > > > > It's possible that either the reset in between goes bonkers or something > > else causes your FPGA to stop responding. It looks like a programming > > problem with the FPGA to me. > > I have verified that the end point does not receive any kind of reset. > > Also, this problem only happens on the Canyonlands board; on x86 and > powerpc MPC8315E it remains properly working after soft/hard resets, > u-boot init etc. This could be because only the 4xx Linux PCI(e) driver really resets the endpoint (PHY reset). But you seem to have analyzed this already. > Could it be u-boot overwrites a too large payload into the config > space or something similar, which makes subsequent accesses fail? Not sure. I suggest that you disable the PCI(e) support in U-Boot to see if Linux behaves differently on a non-pre-initialized endpoint. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/2] 85xx: Support for XPedite5200
These 2 patches add support for the XPedite5200 SBC - a MPC8548-based PMC card made by Extreme Engineering Solutions. The patches require the following 2 patches to be applied first: - pca953x: Add support for PCA953x I2C gpio devices - XPedite5370 board support changes since v1: - Change alignment by spaces to alignment by tabs - Fixed typos in host_agent_cfg/io_port_cfg - Fixed variable declaration in code - Fixed some lines longer than 80 chars - Cleaned up environment configuration defines - Fixed multiline comment style changes since v2: - Removed CONFIG_L1_INIT_RAM reference Best, Peter Peter Tyser (2): 85xx: Add PORDEVSR_PCI1 define XPedite5200 board support MAINTAINERS |1 + MAKEALL |1 + Makefile|3 + board/xes/common/Makefile |3 +- board/xes/common/actl_nand.c| 65 board/xes/common/fsl_85xx_pci.c | 103 +++- board/xes/xpedite5200/Makefile | 55 board/xes/xpedite5200/config.mk | 34 +++ board/xes/xpedite5200/ddr.c | 91 ++ board/xes/xpedite5200/law.c | 51 board/xes/xpedite5200/tlb.c | 85 ++ board/xes/xpedite5200/u-boot.lds| 145 + board/xes/xpedite5200/xpedite5200.c | 125 include/asm-ppc/immap_85xx.h|1 + include/configs/XPEDITE5200.h | 546 +++ 15 files changed, 1304 insertions(+), 5 deletions(-) create mode 100644 board/xes/common/actl_nand.c create mode 100644 board/xes/xpedite5200/Makefile create mode 100644 board/xes/xpedite5200/config.mk create mode 100644 board/xes/xpedite5200/ddr.c create mode 100644 board/xes/xpedite5200/law.c create mode 100644 board/xes/xpedite5200/tlb.c create mode 100644 board/xes/xpedite5200/u-boot.lds create mode 100644 board/xes/xpedite5200/xpedite5200.c create mode 100644 include/configs/XPEDITE5200.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/2] 85xx: Add PORDEVSR_PCI1 define
Add define used to determine if PCI1 interface is in PCI or PCIX mode.
Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
---
include/asm-ppc/immap_85xx.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 75b451d..cb6e3d8 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1569,6 +1569,7 @@ typedef struct ccsr_gur {
#define MPC85xx_PORDEVSR_SGMII3_DIS0x0800
#define MPC85xx_PORDEVSR_SGMII4_DIS0x0400
#define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x3800
+#define MPC85xx_PORDEVSR_PCI1 0x0080
#define MPC85xx_PORDEVSR_IO_SEL0x0078
#define MPC85xx_PORDEVSR_PCI2_ARB 0x0004
#define MPC85xx_PORDEVSR_PCI1_ARB 0x0002
--
1.6.0.2.GIT
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[U-Boot] [PATCH v3 2/2] XPedite5200 board support
Initial support for Extreme Engineering Solutions XPedite5200 -
a MPC8548-based PMC single board computer.
Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
---
MAINTAINERS |1 +
MAKEALL |1 +
Makefile|3 +
board/xes/common/Makefile |3 +-
board/xes/common/actl_nand.c| 65
board/xes/common/fsl_85xx_pci.c | 103 +++-
board/xes/xpedite5200/Makefile | 55
board/xes/xpedite5200/config.mk | 34 +++
board/xes/xpedite5200/ddr.c | 91 ++
board/xes/xpedite5200/law.c | 51
board/xes/xpedite5200/tlb.c | 85 ++
board/xes/xpedite5200/u-boot.lds| 145 +
board/xes/xpedite5200/xpedite5200.c | 125
include/configs/XPEDITE5200.h | 546 +++
14 files changed, 1303 insertions(+), 5 deletions(-)
create mode 100644 board/xes/common/actl_nand.c
create mode 100644 board/xes/xpedite5200/Makefile
create mode 100644 board/xes/xpedite5200/config.mk
create mode 100644 board/xes/xpedite5200/ddr.c
create mode 100644 board/xes/xpedite5200/law.c
create mode 100644 board/xes/xpedite5200/tlb.c
create mode 100644 board/xes/xpedite5200/u-boot.lds
create mode 100644 board/xes/xpedite5200/xpedite5200.c
create mode 100644 include/configs/XPEDITE5200.h
diff --git a/MAINTAINERS b/MAINTAINERS
index ee98824..551f370 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -413,6 +413,7 @@ Rune Torgersen <[EMAIL PROTECTED]>
Peter Tyser <[EMAIL PROTECTED]>
+ XPEDITE5200 MPC8548
XPEDITE5370 MPC8572
David Updegraff <[EMAIL PROTECTED]>
diff --git a/MAKEALL b/MAKEALL
index 1328514..216e4cd 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -376,6 +376,7 @@ LIST_85xx=" \
TQM8548 \
TQM8555 \
TQM8560 \
+ XPEDITE5200 \
XPEDITE5370 \
"
diff --git a/Makefile b/Makefile
index ae3ec22..20e6954 100644
--- a/Makefile
+++ b/Makefile
@@ -2454,6 +2454,9 @@ TQM8560_config: unconfig
echo "#define CONFIG_BOARDNAME
\"TQM$${CTYPE}\"">>$(obj)include/config.h;
@$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc
+XPEDITE5200_config:unconfig
+ @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5200 xes
+
XPEDITE5370_config:unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5370 xes
diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile
index c5cd633..e7620f4 100644
--- a/board/xes/common/Makefile
+++ b/board/xes/common/Makefile
@@ -29,9 +29,10 @@ endif
LIB= $(obj)lib$(VENDOR).a
+COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_85xx_pci.o
COBJS-$(CONFIG_MPC8572)+= fsl_8572_clk.o
COBJS-$(CONFIG_MPC85xx)+= fsl_85xx_ddr.o
-COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_85xx_pci.o
+COBJS-$(CONFIG_NAND_ACTL) += actl_nand.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/xes/common/actl_nand.c b/board/xes/common/actl_nand.c
new file mode 100644
index 000..465aeb0
--- /dev/null
+++ b/board/xes/common/actl_nand.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2008 Extreme Engineering Solutions, Inc.
+ *
+ * This driver support NAND devices which have address lines
+ * connected as ALE and CLE inputs.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+/*
+ * Hardware specific access to control-lines
+ */
+static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)
+{
+ struct nand_chip *this = mtd->priv;
+ ulong IO_ADDR_W;
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ IO_ADDR_W = (ulong)this->IO_ADDR_W;
+
+ IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE |
+ CONFIG_SYS_NAND_ACTL_ALE |
+ CONFIG_SYS_NAND_ACTL_NCE);
+ if (ctrl & NAND_CLE)
+ IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE;
+ if (ctrl & NAND_ALE)
+ IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE;
+ if (ctrl & NAND_NCE)
+ IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE;
+
+
[U-Boot] [PATCH] Remove unused CONFIG_ADDR_STREAMING defines
--- include/configs/ATUM8548.h|1 - include/configs/MPC8536DS.h |1 - include/configs/MPC8540ADS.h |1 - include/configs/MPC8540EVAL.h |1 - include/configs/MPC8541CDS.h |1 - include/configs/MPC8544DS.h |1 - include/configs/MPC8548CDS.h |1 - include/configs/MPC8555CDS.h |1 - include/configs/MPC8560ADS.h |1 - include/configs/MPC8568MDS.h |1 - include/configs/MPC8572DS.h |1 - include/configs/PM854.h |1 - include/configs/PM856.h |1 - include/configs/SBC8540.h |1 - include/configs/TQM85xx.h |1 - include/configs/sbc8548.h |1 - include/configs/sbc8560.h |1 - include/configs/socrates.h|1 - include/configs/stxgp3.h |1 - include/configs/stxssa.h |1 - 20 files changed, 0 insertions(+), 20 deletions(-) diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 1b74526..7ee05e5 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -67,7 +67,6 @@ */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index fff888a..2f391da 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -70,7 +70,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 79a52d9..d44cbaf 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -79,7 +79,6 @@ */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x0020 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x0040 diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 46a141a..444be54 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -62,7 +62,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 7ada8a2..df0b4da 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x0020 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0040 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index cdbbea6..f8267c5 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -66,7 +66,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba..ae9322c 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -69,7 +69,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f9419cc..39059c3 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING
Re: [U-Boot] [PATCH v3 2/2] XPedite5200 board support
On Mon, 2008-12-01 at 13:47 -0600, Peter Tyser wrote: > Initial support for Extreme Engineering Solutions XPedite5200 - > a MPC8548-based PMC single board computer. > > Signed-off-by: Peter Tyser <[EMAIL PROTECTED]> > --- > +/* > + * Use L1 as initial stack > + */ > +#define CONFIG_SYS_INIT_RAM_LOCK 1 *sigh* Shouldn't introduce this here either... > +#define CONFIG_SYS_INIT_RAM_ADDR 0xe000 > +#define CONFIG_SYS_INIT_RAM_END 0x4000 > + Thanks, jdl ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/2] XPedite5200 board support
On Mon, 2008-12-01 at 14:17 -0600, Jon Loeliger wrote: > On Mon, 2008-12-01 at 13:47 -0600, Peter Tyser wrote: > > Initial support for Extreme Engineering Solutions XPedite5200 - > > a MPC8548-based PMC single board computer. > > > > Signed-off-by: Peter Tyser <[EMAIL PROTECTED]> > > --- > > > +/* > > + * Use L1 as initial stack > > + */ > > +#define CONFIG_SYS_INIT_RAM_LOCK 1 > > *sigh* > > Shouldn't introduce this here either... > > +#define CONFIG_SYS_INIT_RAM_ADDR 0xe000 > > +#define CONFIG_SYS_INIT_RAM_END0x4000 > > + > > Thanks, > jdl Which define are you referring to? A quick glance looks like these 3 defines are used legitimately. Am I missing something? If a define should be removed, would it be possible to accept these patches? After they are accepted I'd be happy to submit another patch to clean up the defines for all boards. The boards I've used as references have the similar defines which should also be cleaned up. Thanks for the feedback, Peter ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/2] XPedite5200 board support
On Mon, 2008-12-01 at 14:31 -0600, Peter Tyser wrote: > Which define are you referring to? A quick glance looks like these 3 > defines are used legitimately. Am I missing something? Double *sigh*... I clearly didn't drink enough over the holidays (here). Ignore me. Sorry, jdl ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] Remove unused CONFIG_ADDR_STREAMING defines
Signed-off-by: Peter Tyser <[EMAIL PROTECTED]> --- doah, forgot SOB include/configs/ATUM8548.h|1 - include/configs/MPC8536DS.h |1 - include/configs/MPC8540ADS.h |1 - include/configs/MPC8540EVAL.h |1 - include/configs/MPC8541CDS.h |1 - include/configs/MPC8544DS.h |1 - include/configs/MPC8548CDS.h |1 - include/configs/MPC8555CDS.h |1 - include/configs/MPC8560ADS.h |1 - include/configs/MPC8568MDS.h |1 - include/configs/MPC8572DS.h |1 - include/configs/PM854.h |1 - include/configs/PM856.h |1 - include/configs/SBC8540.h |1 - include/configs/TQM85xx.h |1 - include/configs/sbc8548.h |1 - include/configs/sbc8560.h |1 - include/configs/socrates.h|1 - include/configs/stxgp3.h |1 - include/configs/stxssa.h |1 - 20 files changed, 0 insertions(+), 20 deletions(-) diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 1b74526..7ee05e5 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -67,7 +67,6 @@ */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index fff888a..2f391da 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -70,7 +70,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 79a52d9..d44cbaf 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -79,7 +79,6 @@ */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x0020 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x0040 diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 46a141a..444be54 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -62,7 +62,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 7ada8a2..df0b4da 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x0020 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0040 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index cdbbea6..f8267c5 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -66,7 +66,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba..ae9322c 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -69,7 +69,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f9419cc..39059c3 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE/* toggle L2 cache */ #define CONFIG_BTB
[U-Boot] [PATCH v2] net: Fix TftpStart() ip:filename bug
The TftpStart() function modifies the 'BootFile'
string when 'BootFile' contains both an IP address
and filename (eg 1.2.3.4:/path/file). This causes
subsequent calls to TftpStart to incorrectly parse
the TFTP filename and server IP address to use.
For example:
=> tftp 0x10 10.52.0.62:/home/ptyser/non_existant
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.62; our IP address is 10.52.253.79
^^ CORRECT
Filename '/home/ptyser/non_existant'.
^ CORRECT
Load address: 0x10
Loading: *
TFTP error: 'File not found' (1)
Starting again
eTSEC2: No link.
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.33; our IP address is 10.52.253.79
^^ WRONG
Filename '10.52.0.62'.
^^ WRONG
Load address: 0x10
Loading: *
TFTP error: 'File not found' (1)
Starting again
TftpStart() was modified to not modify the 'BootFile' string.
Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
---
doah, forgot SOB
net/tftp.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/net/tftp.c b/net/tftp.c
index ce6ea3d..3dac3d8 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -499,9 +499,8 @@ TftpStart (void)
strncpy(tftp_filename, BootFile, MAX_LEN);
tftp_filename[MAX_LEN-1] = 0;
} else {
- *p++ = '\0';
TftpServerIP = string_to_ip (BootFile);
- strncpy(tftp_filename, p, MAX_LEN);
+ strncpy(tftp_filename, p + 1, MAX_LEN);
tftp_filename[MAX_LEN-1] = 0;
}
}
--
1.6.0.2.GIT
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Re: [U-Boot] [PATCH v2] nand: Fix cache and memory inconsistent issue
> From: Stefan Roese [mailto:[EMAIL PROTECTED]
> On Monday 01 December 2008, Scott Wood wrote:
> > Please factor this out into arch code, and make it
> shareable with other
> > NAND code (such as nand_boot.c).
>
> Yes, please.
>
> > > + /*
> > > + * We need clean dcache and invalidate
> > > + * to sync between icache and dcache
> > > + * before jump to RAM. make sure all of
> > > + * NAND data write to memory.
> >
> > "Clean d-cache and invalidate i-cache, to make sure that
> > no stale data is executed."
>
> And the function name is not perfectly fitting for my taste.
> Why not extract 2
> functions, flush_dcache_range() and
> invalidate_icache_range(). This reminds
> me that some architectures/platforms already have those
> functions defined
> (PPC4xx at least does). But the 2nd parameter is not size but
> end ("stolen"
> from the Linux kernel). Perhaps it makes sense to use these
> functions here as
> well.
No architecutres/plaforms, I expect we can put all of cache-specificed
functions into lib_ppc/cache.S or lib_ppc/cache.c.
How about this?
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[U-Boot] pci booting 460ex seems to hang at tlb entries
Thanks for any pointers. So here is my current setup, 2 460ex parts bussed together via the PCI bus. The master boots u-boot via flash, reserves some memory, and boots linux. A user process then maps that memory and loads a "flash image" into it. The PIM and POM registers on the master and slave processor are then configured. The slave is setup to enable bus mastering and then its boot is started. I see all the instructions being fetched across the PCI bus correctly (I've made loops and things to confirm that everything is executed on the slave properly). As I follow the instructions across the PCI bus I see it start at the usual location, then jump to F000 and start going. It makes it all the way to F29C and then nothing comes across the PCI bus. When I check the code to see where that is, it is the configuration of the TLB entries in init.S (which is almost exactly the same as the init.S for canyonlands). It seems that I've got something setup wrong and that is inhibiting the CPU from any more fetches on the PCI bus. The only TLB entry that I've changed from the canyonlands is the very first one to the following: tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, \ CONFIG_SYS_BOOT_BASE_ADDR, 0xC, AC_R|AC_W|AC_X|SA_G) /* TLB 0 */ CONFIG_SYS_BOOT_BASE_ADDR is 0xFF00 0xC is the space that according to the datasheet is the location of the PCI space. It is the same address that I am using for the POMs so it at least behaves as expected for the initial part of the boot. I did not see anything else that I *knew* required modification but I was a little unsure about the PCI space TLB entry. Is there another place in the code I need to be modifying things? This happens early so the choices look to be a limited as to what could be wrong. I've also tried the abatron, but it seems to misbehave when using this boot mode. Thanks, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Problem building fw_printenv un u-boot 1.3.4
Hi, I'm back haxing at u-boot. Specifically I'm trying to build fw_printenv so that I can use u-boots environment to store my boards MAC address. I've been able to build a u-boot that runs off of u-boot-1.3.4 for the AT91RM9200DK. However when I try and build the utilities to read and write the env I get the following error below. Any ideas why this is happening? Matt Tehama Wireless --- # make env CROSS_COMPILE=armv4l-uclibc- MTD_VERSION=old make -C tools/env all MTD_VERSION=old || exit 1 make[1]: Entering directory `/home/tu/workspaces/uboot/u-boot-1.3.4/tools/env' armv4l-uclibc-gcc -Wall -DUSE_HOSTCC -I/home/tu/workspaces/uboot/u-boot-1.3.4/include -DMTD_OLD crc32.c fw_env.c fw_env_main.c -o fw_printenv In file included from /home/tu/workspaces/uboot/u-boot-1.3.4/include/linux/mtd/mtd.h:12, from fw_env.c:36: /home/tu/workspaces/uboot/u-boot-1.3.4/include/linux/mtd/mtd-abi.h:11: error: expected specifier-qualifier-list before ‘uint32_t’ /home/tu/workspaces/uboot/u-boot-1.3.4/include/linux/mtd/mtd-abi.h:16: error: expected specifier-qualifier-list before ‘uint32_t’ /home/tu/workspaces/uboot/u-boot-1.3.4/include/linux/mtd/mtd-abi.h:61: error: expected specifier-qualifier-list before ‘uint8_t’ /home/tu/workspaces/uboot/u-boot-1.3.4/include/linux/mtd/mtd-abi.h:72: error: expected specifier-qualifier-list before ‘uint32_t’ /home/tu/workspaces/uboot/u-boot-1.3.4/include/linux/mtd/mtd-abi.h:93: error: expected specifier-qualifier-list before ‘uint32_t’ fw_env.c: In function ‘fw_setenv’: fw_env.c:386: error: ‘uint8_t’ undeclared (first use in this function) fw_env.c:386: error: (Each undeclared identifier is reported only once fw_env.c:386: error: for each function it appears in.) fw_env.c:386: error: expected expression before ‘)’ token fw_env.c:386: error: too few arguments to function ‘crc32’ fw_env.c: In function ‘flash_io’: fw_env.c:400: error: ‘erase_info_t’ undeclared (first use in this function) fw_env.c:400: error: expected ‘;’ before ‘erase’ fw_env.c:431: error: ‘erase’ undeclared (first use in this function) fw_env.c: In function ‘env_init’: fw_env.c:621: error: ‘uint8_t’ undeclared (first use in this function) fw_env.c:621: error: expected expression before ‘)’ token fw_env.c:621: error: too few arguments to function ‘crc32’ fw_env.c:645: error: expected expression before ‘)’ token fw_env.c:645: error: too few arguments to function ‘crc32’ make[1]: *** [fw_printenv] Error 1 make[1]: Leaving directory `/home/tu/workspaces/uboot/u-boot-1.3.4/tools/env' make: *** [env] Error 1 # ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] lib_ppc: rework the flush_cache
- It is possible to miss flush/invalidate the last
cache line, we fix it at here.
- add the volatile and memory clobber.
the bugs is pointed by Scott Wood.
Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
lib_ppc/cache.c | 36 +---
1 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/lib_ppc/cache.c b/lib_ppc/cache.c
index 72c838e..dd4eb22 100644
--- a/lib_ppc/cache.c
+++ b/lib_ppc/cache.c
@@ -25,29 +25,27 @@
#include
#include
-void flush_cache (ulong start_addr, ulong size)
+void flush_cache(ulong start_addr, ulong size)
{
#ifndef CONFIG_5xx
- ulong addr, end_addr = start_addr + size;
+ ulong addr, start, end;
- if (CONFIG_SYS_CACHELINE_SIZE) {
- addr = start_addr & (CONFIG_SYS_CACHELINE_SIZE - 1);
- for (addr = start_addr;
-addr < end_addr;
-addr += CONFIG_SYS_CACHELINE_SIZE) {
- asm ("dcbst 0,%0": :"r" (addr));
- WATCHDOG_RESET();
- }
- asm ("sync"); /* Wait for all dcbst to complete on bus */
+ start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ end = (start_addr + size) & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
- for (addr = start_addr;
-addr < end_addr;
-addr += CONFIG_SYS_CACHELINE_SIZE) {
- asm ("icbi 0,%0": :"r" (addr));
- WATCHDOG_RESET();
- }
+ for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) {
+ asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
+ WATCHDOG_RESET();
}
- asm ("sync"); /* Always flush prefetch queue in any case */
- asm ("isync");
+ /* wait for all dcbst to complete on bus */
+ asm volatile("sync" : : : "memory");
+
+ for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) {
+ asm volatile("icbi 0,%0" : : "r" (addr) : "memory");
+ WATCHDOG_RESET();
+ }
+ asm volatile("sync" : : : "memory");
+ /* flush prefetch queue */
+ asm volatile("isync" : : : "memory");
#endif
}
--
1.5.4
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[U-Boot] [PATCH v3] nand: Fix cache and memory inconsistent issue
we load the secondary stage u-boot image from NAND to
system memory by nand_load, but we did not flush d-cache
to memory, not invalidate i-cache before we jump to RAM.
when the system is cache enable and the TLB/page attribute
of system memory is cacheable, it will cause issue.
- 83xx family is using the d-cache lock, so all of d-cache
access is cache-inhibited. so you can't see the issue.
- 85xx family is using d-cache, i-cache enable, partial
cache lock. you will see the issue.
The patch fix the cache issue.
Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
Stefan,
I'm not familiar with ppc4xx, could you workout one
patch for nand_boot.c?
Thanks,
Dave
nand_spl/board/freescale/mpc8313erdb/Makefile |6 +-
nand_spl/nand_boot_fsl_elbc.c |5 +
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/nand_spl/board/freescale/mpc8313erdb/Makefile
b/nand_spl/board/freescale/mpc8313erdb/Makefile
index 3da1b1f..1a8f6ff 100644
--- a/nand_spl/board/freescale/mpc8313erdb/Makefile
+++ b/nand_spl/board/freescale/mpc8313erdb/Makefile
@@ -34,7 +34,8 @@ AFLAGS+= -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
SOBJS = start.o ticks.o
-COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o time.o
+COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
+ time.o cache.o
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
@@ -79,6 +80,9 @@ $(obj)ns16550.c:
$(obj)nand_init.c:
ln -sf $(SRCTREE)/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
+$(obj)cache.c:
+ ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+
$(obj)time.c:
ln -sf $(SRCTREE)/lib_ppc/time.c $(obj)time.c
diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c
index 4a961ea..0d0c44e 100644
--- a/nand_spl/nand_boot_fsl_elbc.c
+++ b/nand_spl/nand_boot_fsl_elbc.c
@@ -143,6 +143,11 @@ void nand_boot(void)
* Jump to U-Boot image
*/
puts("transfering control\n");
+ /*
+* Clean d-cache and invalidate i-cache, to
+* make sure that no stale data is executed.
+*/
+ flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
uboot();
}
--
1.5.4
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Comes with unlimited use license and at a very resonable price: <> 164,297 D.entists <> 158,851 Postal Addresses <> 163,954 Tel #'s <> 77,215 Fax Numbers <> 45,672 business e-mails Until Dec 5 the special introductory price is $290 (reduced from $592) For details please send an email to [EMAIL PROTECTED] to adjust your subscription status email to [EMAIL PROTECTED] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] nand: Fix cache and memory inconsistent issue
On Tuesday 02 December 2008, Dave Liu wrote: > we load the secondary stage u-boot image from NAND to > system memory by nand_load, but we did not flush d-cache > to memory, not invalidate i-cache before we jump to RAM. > when the system is cache enable and the TLB/page attribute > of system memory is cacheable, it will cause issue. > > - 83xx family is using the d-cache lock, so all of d-cache > access is cache-inhibited. so you can't see the issue. > - 85xx family is using d-cache, i-cache enable, partial > cache lock. you will see the issue. > > The patch fix the cache issue. > > Signed-off-by: Dave Liu <[EMAIL PROTECTED]> > --- > Stefan, > > I'm not familiar with ppc4xx, could you workout one > patch for nand_boot.c? All 4xx platforms using nand_boot.c run with D-Cache disabled at that time. So it's currently not needed here. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] r2dplus/lowlevel_init: coding style fix
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]> --- board/renesas/r2dplus/lowlevel_init.S | 42 1 files changed, 21 insertions(+), 21 deletions(-) diff --git a/board/renesas/r2dplus/lowlevel_init.S b/board/renesas/r2dplus/lowlevel_init.S index 5755de8..87e30c5 100644 --- a/board/renesas/r2dplus/lowlevel_init.S +++ b/board/renesas/r2dplus/lowlevel_init.S @@ -11,7 +11,7 @@ .global lowlevel_init .text - .align 2 + .align 2 lowlevel_init: @@ -118,34 +118,34 @@ CCR_D_E: .long 0x890B FRQCR_A: .long FRQCR /* FRQCR Address */ FRQCR_D: .long 0x0e0a /* 03/07/15 modify */ -BCR1_A:.long BCR1/* BCR1 Address */ -BCR1_D:.long 0x00180008 -BCR2_A:.long BCR2/* BCR2 Address */ -BCR2_D:.long 0xabe8 -BCR3_A:.long BCR3/* BCR3 Address */ -BCR3_D:.long 0x -BCR4_A:.long BCR4/* BCR4 Address */ -BCR4_D:.long 0x0010 -WCR1_A:.long WCR1/* WCR1 Address */ -WCR1_D:.long 0x3334 -WCR2_A:.long WCR2/* WCR2 Address */ -WCR2_D:.long 0xcff86fbf -WCR3_A:.long WCR3/* WCR3 Address */ -WCR3_D:.long 0x0707 +BCR1_A:.long BCR1/* BCR1 Address */ +BCR1_D:.long 0x00180008 +BCR2_A:.long BCR2/* BCR2 Address */ +BCR2_D:.long 0xabe8 +BCR3_A:.long BCR3/* BCR3 Address */ +BCR3_D:.long 0x +BCR4_A:.long BCR4/* BCR4 Address */ +BCR4_D:.long 0x0010 +WCR1_A:.long WCR1/* WCR1 Address */ +WCR1_D:.long 0x3334 +WCR2_A:.long WCR2/* WCR2 Address */ +WCR2_D:.long 0xcff86fbf +WCR3_A:.long WCR3/* WCR3 Address */ +WCR3_D:.long 0x0707 LED_A: .long 0x0436 /* LED Address */ RTCNT_A: .long RTCNT /* RTCNT Address */ RTCNT_D: .long 0xA500 /* RTCNT Write Code A5h Data 00h */ RTCOR_A: .long RTCOR /* RTCOR Address */ -RTCOR_D: .long 0xA534 /* RTCOR Write Code */ +RTCOR_D: .long 0xA534 /* RTCOR Write Code */ RTCSR_A: .long RTCSR /* RTCSR Address */ RTCSR_D: .long 0xA510 /* RTCSR Write Code */ -SDMR3_A: .long 0xFF9400CC /* SDMR3 Address */ +SDMR3_A: .long 0xFF9400CC /* SDMR3 Address */ SDMR3_D: .long 0x55 MCR_A: .long MCR /* MCR Address */ -MCR_D1:.long 0x081901F4 /* MRSET:'0' */ -MCR_D2:.long 0x481901F4 /* MRSET:'1' */ -RFCR_A:.long RFCR/* RFCR Address */ -RFCR_D:.long 0xA400 /* RFCR Write Code A4h Data 00h */ +MCR_D1:.long 0x081901F4 /* MRSET:'0' */ +MCR_D2:.long 0x481901F4 /* MRSET:'1' */ +RFCR_A:.long RFCR/* RFCR Address */ +RFCR_D:.long 0xA400 /* RFCR Write Code A4h Data 00h */ PCR_A: .long PCR /* PCR Address */ PCR_D: .long 0x MMUCR_A: .long MMUCR /* MMUCCR Address */ -- 1.5.6.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools/mkimage: use lseek rather than fstat for file size for -l option
Hi Peter,
On Mon, Dec 1, 2008 at 5:23 PM, Peter Korsgaard <[EMAIL PROTECTED]> wrote:
> Use lseek rather than fstat for file size for list mode, so
> mkimage -l /dev/mtdblockN works (stat returns st_size == 0 for devices).
>
> Notice that you have to use /dev/mtdblockN and not /dev/mtdN, as the
> latter doesn't support mmap.
>
> Signed-off-by: Peter Korsgaard <[EMAIL PROTECTED]>
> ---
> tools/mkimage.c |3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/tools/mkimage.c b/tools/mkimage.c
> index 58fd20f..ca8254f 100644
> --- a/tools/mkimage.c
> +++ b/tools/mkimage.c
> @@ -205,7 +205,8 @@ NXTARG: ;
>/*
> * list header information of existing image
> */
> - if (fstat(ifd, &sbuf) < 0) {
> + sbuf.st_size = lseek(ifd, 0, SEEK_END);
> + if (sbuf.st_size == (off_t)-1) {
>fprintf (stderr, "%s: Can't stat %s: %s\n",
>cmdname, imagefile, strerror(errno));
I'd change the error message as well, to be independent of the tool
used to get the file size. For example:
fprintf (stderr, "%s: Can't get size of %s: %s\n",
Best regards,
Thomas
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