Re: [U-Boot] [PATCH] smc911x driver: cleanup smc911x_initialize()
Hi Ben,
El Thu, Jan 21, 2010 at 11:36:41PM -0800 Ben Warren ha dit:
On Thu, Jan 21, 2010 at 10:18 PM, Matthias Kaehlcke
matth...@kaehlcke.net wrote:
El Thu, Jan 21, 2010 at 06:01:47PM -0500 Mike Frysinger ha dit:
On Thursday 21 January 2010 16:29:24 Matthias Kaehlcke wrote:
smc911x_initialize(): remove unecessary call to free() and
return 0 in case of failure instead of -1
Signed-off-by: Matthias Kaehlcke matth...@kaehlcke.net
---
drivers/net/smc911x.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 5d51406..f2b5895 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -242,8 +242,7 @@ int smc911x_initialize(u8 dev_num, int
base_addr)
dev = malloc(sizeof(*dev));
if (!dev) {
- free(dev);
OK
- return -1;
+ return 0;
this is an error path, so i think -1 is correct. if you're out of
memory,
increase your malloc region.
that's what I thought in the first place, but Ben Warren told me that
in the initialize function the return value indicates the number of
devices that were initialized (see
http://lists.denx.de/pipermail/u-boot/2010-January/066859.html)
I agree that this is confusing. If the following xxx_eth_initialize()
return codes seem reasonable, I'll send a patch tomorrow that applies it
to the logic in net/eth.c:
-2: reserved (magic value, used to return from __def_eth_init())
-1: error
0: no devices added, no error
1+: number of devices added
to me it seems reasonable and less confusing than the current logic.
i can collaborate in the task of applying it to the driver code
--
Matthias Kaehlcke
Embedded Linux Developer
Barcelona
Control over the use of one's ideas really constitutes control over other
people's lives; and it is usually used to make their lives more difficult.
(Richard Stallman)
.''`.
using free software / Debian GNU/Linux | http://debian.org : :' :
`. `'`
gpg --keyserver pgp.mit.edu --recv-keys 47D8E5D4 `-
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Re: [U-Boot] [PATCH RFC v2] non-blocking flash write/erase/status check functions
Hi, any comments on this? On Wed, Dec 09, 2009 at 05:00:11PM +0100, Wolfgang Wegner wrote: More tightly integrated non-blocking variants of some CFI flash access functions. Enable with CONFIG_SYS_FLASH_CFI_NONBLOCK These can be useful to erase flash or write complete sectors of flash during a serial data transfer for software updates. The first version had a strong NACK by Wolfgang Denk because of code duplication. Does this version have a chance for inclusion, or are there other things I have to fix/change to get it to this stage? Regards, Wolfgang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ppc4xx: Kilauea: Add CPLD version detection and EBC reconfiguration
A newer CPLD version on the 405EX evaluation board requires a different
EBC controller setup for the CPLD register access. This patch now adds
a CPLD version detection for Kilauea and code to reconfigure the EBC
controller (chip select 2) for the new CPLD.
Additionally the CPLD version is printed upon bootup:
Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)
Signed-off-by: Stefan Roese s...@denx.de
Cc: Zhang Bao Quan bqzh...@udtech.com.cn
---
board/amcc/kilauea/kilauea.c | 40 +++-
include/configs/kilauea.h| 26 ++
2 files changed, 61 insertions(+), 5 deletions(-)
diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c
index 5cd822a..964b2d0 100644
--- a/board/amcc/kilauea/kilauea.c
+++ b/board/amcc/kilauea/kilauea.c
@@ -39,6 +39,37 @@ DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips*/
+static int board_cpld_version(void)
+{
+ u32 cpld;
+
+ cpld = in_be32((void *)CONFIG_SYS_FPGA_FIFO_BASE);
+ if ((cpld CONFIG_SYS_FPGA_MAGIC_MASK) != CONFIG_SYS_FPGA_MAGIC) {
+ /*
+* Magic not found - old CPLD revision which needs
+* the old EBC configuration
+*/
+ mtebc(PB2AP, EBC_BXAP_BME_ENABLED | EBC_BXAP_FWT_ENCODE(5) |
+ EBC_BXAP_BWT_ENCODE(0) | EBC_BXAP_BCE_DISABLE |
+ EBC_BXAP_BCT_2TRANS | EBC_BXAP_CSN_ENCODE(0) |
+ EBC_BXAP_OEN_ENCODE(0) | EBC_BXAP_WBN_ENCODE(3) |
+ EBC_BXAP_WBF_ENCODE(0) | EBC_BXAP_TH_ENCODE(4) |
+ EBC_BXAP_RE_DISABLED | EBC_BXAP_SOR_DELAYED |
+ EBC_BXAP_BEM_WRITEONLY | EBC_BXAP_PEN_DISABLED);
+
+ /*
+* Return 0 for old CPLD version
+*/
+ return 0;
+ }
+
+ /*
+* Magic found - new CPLD revision which needs no new
+* EBC configuration
+*/
+ return (cpld CONFIG_SYS_FPGA_VER_MASK) 8;
+}
+
/*
* Board early initialization function
*/
@@ -209,6 +240,13 @@ int board_early_init_f (void)
mtsdr(SDR0_PFC1, val);
/*
+* The CPLD version detection has to be the first access to
+* the CPLD, so we need to make this access this early and
+* save the CPLD version for later.
+*/
+ gd-board_type = board_cpld_version();
+
+ /*
* Configure FPGA register with PCIe reset
*/
out_be32((void *)CONFIG_SYS_FPGA_BASE, 0xff570cc4); /* assert PCIe
reset */
@@ -276,7 +314,7 @@ int checkboard (void)
puts(, serial# );
puts(s);
}
- putc('\n');
+ printf( (CPLD rev. %ld)\n, gd-board_type);
return (0);
}
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 965599c..9359627 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -47,6 +47,7 @@
#define CONFIG_BOARD_EARLY_INIT_F 1/* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EMAC_COUNT
/*---
@@ -522,9 +523,22 @@
#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_NAND_ADDR | 0x1e000)
#endif
-/* Memory Bank 2 (FPGA) initialization
*/
-#define CONFIG_SYS_EBC_PB2AP 0x9400C800
-#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
+/* Memory Bank 2 (FPGA) initialization */
+#define CONFIG_SYS_EBC_PB2AP (EBC_BXAP_BME_ENABLED | \
+EBC_BXAP_FWT_ENCODE(6) | \
+EBC_BXAP_BWT_ENCODE(1) | \
+EBC_BXAP_BCE_DISABLE | \
+EBC_BXAP_BCT_2TRANS | \
+EBC_BXAP_CSN_ENCODE(0) | \
+EBC_BXAP_OEN_ENCODE(0) | \
+EBC_BXAP_WBN_ENCODE(3) | \
+EBC_BXAP_WBF_ENCODE(1) | \
+EBC_BXAP_TH_ENCODE(4) |\
+EBC_BXAP_RE_DISABLED | \
+EBC_BXAP_SOR_DELAYED | \
+EBC_BXAP_BEM_WRITEONLY | \
+EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
#define CONFIG_SYS_EBC_CFG 0x7FC0 /* EBC0_CFG */
@@ -573,7 +587,7 @@
* Some Kilauea stuff..., mainly fpga registers
*/
#define CONFIG_SYS_FPGA_REG_BASE
Re: [U-Boot] [STATUS] Merge Window closed, waiting for pull requests
Dear Mike Frysinger, In message 201001211932.19024.vap...@gentoo.org you wrote: flash.h: pull in common.h for types I don't have this one on my list; I understood you dropped it. the last post was a question: were you planning on merging it. i'd prefer you did ;), but i'll let it go if you'd rather. Yes, please. Blackfin: disable NetBSD bootm support by default Depends on previous one, right? it depended on a different patch, but that has been merged since I see. Can you please send an updated list, then? Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If I have seen further it is by standing on the shoulders of giants. - Isaac Newton, Letter to Robert Hooke, 5 February 1676 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] bootm: allow people to disable this command
Dear Mike Frysinger, In message 201001211934.21010.vap...@gentoo.org you wrote: Hm... please let's not invent a new style to configure commands - please use CONFIG_CMD_BOOTM instead (enabled by default). i did it this way because u-boot doesnt have a default list for everyone of commands. the config_cmd_default.h isnt included by all boards. i can Those boards need to be adapted, then. (semi-)reuse the new config_defaults.h if you're OK with that. No, please don't. Let's not scatter this allover the place. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Never call a man a fool. Borrow from him. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC v2] non-blocking flash write/erase/status check functions
Dear Wolfgang Wegner, In message 20100122100332.gk23...@leila.ping.de you wrote: On Wed, Dec 09, 2009 at 05:00:11PM +0100, Wolfgang Wegner wrote: More tightly integrated non-blocking variants of some CFI flash access functions. Enable with CONFIG_SYS_FLASH_CFI_NONBLOCK These can be useful to erase flash or write complete sectors of flash during a serial data transfer for software updates. The first version had a strong NACK by Wolfgang Denk because of code duplication. Does this version have a chance for inclusion, or are there other things I have to fix/change to get it to this stage? The patch is still pretty intrusive - the resulting code is much harder to read, to understand and to debug (in both configurations). From my point of view the disadvantages compared to the advantages (and the potential number of users of this new feature) don't justify to apply this patch. Stefan, what do you think? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Perfection is reached, not when there is no longer anything to add, but when there is no longer anything to take away. - Antoine de Saint-Exupery ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] ppc4xx: Kilauea: Add CPLD version detection and EBC reconfiguration
A newer CPLD version on the 405EX evaluation board requires a different
EBC controller setup for the CPLD register access. This patch now adds
a CPLD version detection for Kilauea and code to reconfigure the EBC
controller (chip select 2) for the new CPLD.
Additionally the CPLD version is printed upon bootup:
Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)
Signed-off-by: Stefan Roese s...@denx.de
Cc: Zhang Bao Quan bqzh...@udtech.com.cn
---
v2: Use correct magic value for CPLD version comparision
board/amcc/kilauea/kilauea.c | 40 +++-
include/configs/kilauea.h| 26 ++
2 files changed, 61 insertions(+), 5 deletions(-)
diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c
index 5cd822a..964b2d0 100644
--- a/board/amcc/kilauea/kilauea.c
+++ b/board/amcc/kilauea/kilauea.c
@@ -39,6 +39,37 @@ DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips*/
+static int board_cpld_version(void)
+{
+ u32 cpld;
+
+ cpld = in_be32((void *)CONFIG_SYS_FPGA_FIFO_BASE);
+ if ((cpld CONFIG_SYS_FPGA_MAGIC_MASK) != CONFIG_SYS_FPGA_MAGIC) {
+ /*
+* Magic not found - old CPLD revision which needs
+* the old EBC configuration
+*/
+ mtebc(PB2AP, EBC_BXAP_BME_ENABLED | EBC_BXAP_FWT_ENCODE(5) |
+ EBC_BXAP_BWT_ENCODE(0) | EBC_BXAP_BCE_DISABLE |
+ EBC_BXAP_BCT_2TRANS | EBC_BXAP_CSN_ENCODE(0) |
+ EBC_BXAP_OEN_ENCODE(0) | EBC_BXAP_WBN_ENCODE(3) |
+ EBC_BXAP_WBF_ENCODE(0) | EBC_BXAP_TH_ENCODE(4) |
+ EBC_BXAP_RE_DISABLED | EBC_BXAP_SOR_DELAYED |
+ EBC_BXAP_BEM_WRITEONLY | EBC_BXAP_PEN_DISABLED);
+
+ /*
+* Return 0 for old CPLD version
+*/
+ return 0;
+ }
+
+ /*
+* Magic found - new CPLD revision which needs no new
+* EBC configuration
+*/
+ return (cpld CONFIG_SYS_FPGA_VER_MASK) 8;
+}
+
/*
* Board early initialization function
*/
@@ -209,6 +240,13 @@ int board_early_init_f (void)
mtsdr(SDR0_PFC1, val);
/*
+* The CPLD version detection has to be the first access to
+* the CPLD, so we need to make this access this early and
+* save the CPLD version for later.
+*/
+ gd-board_type = board_cpld_version();
+
+ /*
* Configure FPGA register with PCIe reset
*/
out_be32((void *)CONFIG_SYS_FPGA_BASE, 0xff570cc4); /* assert PCIe
reset */
@@ -276,7 +314,7 @@ int checkboard (void)
puts(, serial# );
puts(s);
}
- putc('\n');
+ printf( (CPLD rev. %ld)\n, gd-board_type);
return (0);
}
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 965599c..926e385 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -47,6 +47,7 @@
#define CONFIG_BOARD_EARLY_INIT_F 1/* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EMAC_COUNT
/*---
@@ -522,9 +523,22 @@
#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_NAND_ADDR | 0x1e000)
#endif
-/* Memory Bank 2 (FPGA) initialization
*/
-#define CONFIG_SYS_EBC_PB2AP 0x9400C800
-#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
+/* Memory Bank 2 (FPGA) initialization */
+#define CONFIG_SYS_EBC_PB2AP (EBC_BXAP_BME_ENABLED | \
+EBC_BXAP_FWT_ENCODE(6) | \
+EBC_BXAP_BWT_ENCODE(1) | \
+EBC_BXAP_BCE_DISABLE | \
+EBC_BXAP_BCT_2TRANS | \
+EBC_BXAP_CSN_ENCODE(0) | \
+EBC_BXAP_OEN_ENCODE(0) | \
+EBC_BXAP_WBN_ENCODE(3) | \
+EBC_BXAP_WBF_ENCODE(1) | \
+EBC_BXAP_TH_ENCODE(4) |\
+EBC_BXAP_RE_DISABLED | \
+EBC_BXAP_SOR_DELAYED | \
+EBC_BXAP_BEM_WRITEONLY | \
+EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
#define CONFIG_SYS_EBC_CFG 0x7FC0 /* EBC0_CFG */
@@ -573,7 +587,7 @@
* Some Kilauea stuff..., mainly
[U-Boot] [PATCH] mpc512x: Add display of reset status register
Content of the RSR is put into gd early so we can output it together with the CPU info. The clearing of gd in board_init_f is redundant for this architecture as it is done in cpu_init_f so we remove it. Signed-off-by: Detlev Zundel d...@denx.de --- cpu/mpc512x/cpu.c |3 ++- lib_ppc/board.c |5 +++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index f96a4c8..2908a0d 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -66,9 +66,10 @@ int checkcpu (void) default: puts (unknown ); } - printf (at %s MHz, CSB at %s MHz\n, + printf (at %s MHz, CSB at %s MHz , strmhz(buf1, clock), strmhz(buf2, gd-csb_clk) ); + printf((RSR=0x%04lx)\n, gd-reset_status 0x); return 0; } diff --git a/lib_ppc/board.c b/lib_ppc/board.c index dd22f99..a615f36 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2006 + * (C) Copyright 2000-2010 * Wolfgang Denk, DENX Software Engineering, w...@denx.de. * * See file CREDITS for list of people who contributed to this @@ -379,7 +379,8 @@ void board_init_f (ulong bootflag) __asm__ __volatile__(: : :memory); #if !defined(CONFIG_CPM2) !defined(CONFIG_MPC83xx) \ -!defined(CONFIG_MPC85xx) !defined(CONFIG_MPC86xx) +!defined(CONFIG_MPC85xx) !defined(CONFIG_MPC86xx) \ +!defined(CONFIG_MPC512X) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); #endif -- 1.6.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] ppc4xx: Kilauea: Add CPLD version detection and EBC reconfiguration
Dear Stefan Roese, In message 1264162912-21791-1-git-send-email...@denx.de you wrote: A newer CPLD version on the 405EX evaluation board requires a different EBC controller setup for the CPLD register access. This patch now adds a CPLD version detection for Kilauea and code to reconfigure the EBC controller (chip select 2) for the new CPLD. I think the comment shouldbe changed to match the code, i. e. something like this: ... This patch adds a CPLD version detection for Kilauea and code to reconfigure the EBC controller (chip select 2) for the old CPLD if no new version is found. Except for that: Acked-by: Wolfgang Denk w...@denx.de Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de All a hacker needs is a tight PUSHJ, a loose pair of UUOs, and a warm place to shift. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc512x: Add display of reset status register
Dear Detlev Zundel, In message 1264164180-10813-1-git-send-email-...@denx.de you wrote: Content of the RSR is put into gd early so we can output it together with the CPU info. The clearing of gd in board_init_f is redundant for this architecture as it is done in cpu_init_f so we remove it. Signed-off-by: Detlev Zundel d...@denx.de --- cpu/mpc512x/cpu.c |3 ++- lib_ppc/board.c |5 +++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index f96a4c8..2908a0d 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -66,9 +66,10 @@ int checkcpu (void) default: puts (unknown ); } - printf (at %s MHz, CSB at %s MHz\n, + printf (at %s MHz, CSB at %s MHz , strmhz(buf1, clock), strmhz(buf2, gd-csb_clk) ); + printf((RSR=0x%04lx)\n, gd-reset_status 0x); Please add to the first printf() and avoid an additional function call. @@ -379,7 +379,8 @@ void board_init_f (ulong bootflag) __asm__ __volatile__(: : :memory); #if !defined(CONFIG_CPM2) !defined(CONFIG_MPC83xx) \ -!defined(CONFIG_MPC85xx) !defined(CONFIG_MPC86xx) +!defined(CONFIG_MPC85xx) !defined(CONFIG_MPC86xx) \ +!defined(CONFIG_MPC512X) Please keep the list sorted. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de All men should freely use those seven words which have the power to make any marriage run smoothly: You know dear, you may be right. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] ppc4xx: Kilauea: Add CPLD version detection and EBC reconfiguration
A newer CPLD version on the 405EX evaluation board requires a different
EBC controller setup for the CPLD register access. This patch adds a CPLD
version detection for Kilauea and code to reconfigure the EBC controller
(chip select 2) for the old CPLD if no new version is found.
Additionally the CPLD version is printed upon bootup:
Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Wolfgang Denk w...@denx.de
Cc: Zhang Bao Quan bqzh...@udtech.com.cn
---
v3: Changed commit text as suggested by Wolfgang Denk
v2: Use correct magic value for CPLD version comparision
board/amcc/kilauea/kilauea.c | 40 +++-
include/configs/kilauea.h| 26 ++
2 files changed, 61 insertions(+), 5 deletions(-)
diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c
index 5cd822a..964b2d0 100644
--- a/board/amcc/kilauea/kilauea.c
+++ b/board/amcc/kilauea/kilauea.c
@@ -39,6 +39,37 @@ DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips*/
+static int board_cpld_version(void)
+{
+ u32 cpld;
+
+ cpld = in_be32((void *)CONFIG_SYS_FPGA_FIFO_BASE);
+ if ((cpld CONFIG_SYS_FPGA_MAGIC_MASK) != CONFIG_SYS_FPGA_MAGIC) {
+ /*
+* Magic not found - old CPLD revision which needs
+* the old EBC configuration
+*/
+ mtebc(PB2AP, EBC_BXAP_BME_ENABLED | EBC_BXAP_FWT_ENCODE(5) |
+ EBC_BXAP_BWT_ENCODE(0) | EBC_BXAP_BCE_DISABLE |
+ EBC_BXAP_BCT_2TRANS | EBC_BXAP_CSN_ENCODE(0) |
+ EBC_BXAP_OEN_ENCODE(0) | EBC_BXAP_WBN_ENCODE(3) |
+ EBC_BXAP_WBF_ENCODE(0) | EBC_BXAP_TH_ENCODE(4) |
+ EBC_BXAP_RE_DISABLED | EBC_BXAP_SOR_DELAYED |
+ EBC_BXAP_BEM_WRITEONLY | EBC_BXAP_PEN_DISABLED);
+
+ /*
+* Return 0 for old CPLD version
+*/
+ return 0;
+ }
+
+ /*
+* Magic found - new CPLD revision which needs no new
+* EBC configuration
+*/
+ return (cpld CONFIG_SYS_FPGA_VER_MASK) 8;
+}
+
/*
* Board early initialization function
*/
@@ -209,6 +240,13 @@ int board_early_init_f (void)
mtsdr(SDR0_PFC1, val);
/*
+* The CPLD version detection has to be the first access to
+* the CPLD, so we need to make this access this early and
+* save the CPLD version for later.
+*/
+ gd-board_type = board_cpld_version();
+
+ /*
* Configure FPGA register with PCIe reset
*/
out_be32((void *)CONFIG_SYS_FPGA_BASE, 0xff570cc4); /* assert PCIe
reset */
@@ -276,7 +314,7 @@ int checkboard (void)
puts(, serial# );
puts(s);
}
- putc('\n');
+ printf( (CPLD rev. %ld)\n, gd-board_type);
return (0);
}
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 965599c..926e385 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -47,6 +47,7 @@
#define CONFIG_BOARD_EARLY_INIT_F 1/* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EMAC_COUNT
/*---
@@ -522,9 +523,22 @@
#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_NAND_ADDR | 0x1e000)
#endif
-/* Memory Bank 2 (FPGA) initialization
*/
-#define CONFIG_SYS_EBC_PB2AP 0x9400C800
-#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
+/* Memory Bank 2 (FPGA) initialization */
+#define CONFIG_SYS_EBC_PB2AP (EBC_BXAP_BME_ENABLED | \
+EBC_BXAP_FWT_ENCODE(6) | \
+EBC_BXAP_BWT_ENCODE(1) | \
+EBC_BXAP_BCE_DISABLE | \
+EBC_BXAP_BCT_2TRANS | \
+EBC_BXAP_CSN_ENCODE(0) | \
+EBC_BXAP_OEN_ENCODE(0) | \
+EBC_BXAP_WBN_ENCODE(3) | \
+EBC_BXAP_WBF_ENCODE(1) | \
+EBC_BXAP_TH_ENCODE(4) |\
+EBC_BXAP_RE_DISABLED | \
+EBC_BXAP_SOR_DELAYED | \
+EBC_BXAP_BEM_WRITEONLY | \
+EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
#define
Re: [U-Boot] Performance problems with gunzip
Hi Andreas, I try to unzip a WinCE kernel with the U-Boot gunzip routine. It is working, but it takes roughly 1min to uncompress a 10MB zip file. I am working with a PXA270 platform. What could be the reason for the worst performance? Very likely the disabled instruction and data caches. Not that I know for sure, but I'm pretty confident that either both or at least the data cache is not enabled per default. There was some discussion about enabling them, but the work never got done IIRC. Cheers Detlev -- Mit einem Leben wie dem meinen, Doktor - wer braucht da noch Traeume? - Alex Portnoy -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Performance problems with gunzip
Hi Detlev, thanks for the fast response. How do I enable data caches? Regards, Andreas -Ursprüngliche Nachricht- Von: Detlev Zundel [mailto:d...@denx.de] Gesendet: Freitag, 22. Januar 2010 15:45 An: A. Geisreiter Cc: u-boot@lists.denx.de Betreff: Re: [U-Boot] Performance problems with gunzip Hi Andreas, I try to unzip a WinCE kernel with the U-Boot gunzip routine. It is working, but it takes roughly 1min to uncompress a 10MB zip file. I am working with a PXA270 platform. What could be the reason for the worst performance? Very likely the disabled instruction and data caches. Not that I know for sure, but I'm pretty confident that either both or at least the data cache is not enabled per default. There was some discussion about enabling them, but the work never got done IIRC. Cheers Detlev -- Mit einem Leben wie dem meinen, Doktor - wer braucht da noch Traeume? - Alex Portnoy -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Performance problems with gunzip
Hi Andreas, thanks for the fast response. How do I enable data caches? I fear this is not as easy as flipping a bit in a register. Depending on the platform caches tend to be tied to the MMU, so enabling the caches require setting up correct data structures for the MMU to work. That's the non-trivial work. Apart from that, there is CONFIG_CMD_CACHE which builds common/cmd_cache.c. I see that at least two PXA250 platforms enable this, so maybe simply try that? Moreover, a quick qoogle showed that the (non-mainline) Gumstix verdex (PXA270) U-Boot port has a dcache command: http://docwiki.gumstix.org/index.php/U-Boot Maybe you can reap the code from their repository. If you do, please post it here ;) Cheers Detlev -- There are three kinds of people in the world; those who can count and those who can't. -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Performance problems with gunzip
I fear this is not as easy as flipping a bit in a register. Depending on the platform caches tend to be tied to the MMU, so enabling the caches require setting up correct data structures for the MMU to work. That's the non-trivial work. Not that difficult, either. You just need to fill the top-level page table for 1MB sections (4096 sections = 16k bytes, which must be aligned on a 16k boundary). Apart from that, there is CONFIG_CMD_CACHE which builds common/cmd_cache.c. I see that at least two PXA250 platforms enable this, so maybe simply try that? I think it's always disabled on arm, for the mmu reason. Maybe you can reap the code from their repository. If you do, please post it here ;) Or I can cook an RFC patch later, after redoing the 8815 patches. I was just considering trying it these days, as I've done the same on another straight-on-iron project and it's not that difficult. /alessandro ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Performance problems with gunzip
Hi Alessandro, I fear this is not as easy as flipping a bit in a register. Depending on the platform caches tend to be tied to the MMU, so enabling the caches require setting up correct data structures for the MMU to work. That's the non-trivial work. Not that difficult, either. I never said it was difficult, only non-trivial :) You just need to fill the top-level page table for 1MB sections (4096 sections = 16k bytes, which must be aligned on a 16k boundary). Apart from that, there is CONFIG_CMD_CACHE which builds common/cmd_cache.c. I see that at least two PXA250 platforms enable this, so maybe simply try that? I think it's always disabled on arm, for the mmu reason. Maybe you can reap the code from their repository. If you do, please post it here ;) Or I can cook an RFC patch later, after redoing the 8815 patches. I was just considering trying it these days, as I've done the same on another straight-on-iron project and it's not that difficult. I am looking forward to something like this for a long time now and I'm sure other people will value it too, so thanks in advance! Detlev -- Sometimes I lie awake at night and I ask, Why me?, then a voice answers Nothing personal, your name just happened to come up. -- Charlie Brown -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5] zlib: updated to v.1.2.3
On Wed, Jul 29, 2009 at 6:05 AM, Giuseppe CONDORELLI giuseppe.condore...@st.com wrote: This patch updates zlib to the latest stable version. Only relevant zlib parts were ported to u-boot tree, as already did for the current zlib (0.95). New zlib guarantees a faster inflate performances other then others improvements as explained at www.zlib.net. It also includes Alessandro Rubini's patches to allow 0 as destination pointer and to call watchdog reset if required by architecture. Signed-off-by: Giuseppe Condorelli giuseppe.condore...@st.com Reviewed-by: Angelo Castello angelo.caste...@st.com Reviewed-by: Alessandro Rubini rubini-l...@gnudd.com --- This patch has broken MPC8610. I discovered it with git bisect. After applying this patch, I get this error when I try to boot the kernel: Uncompressing Kernel Image ... Error: inflate() returned -2 GUNZIP: uncompress, out-of-mem or overwrite error - must RESET board to recover The latest U-Boot is worse - instead of displaying an error, I get a machine check: Uncompressing Kernel Image ... Machine check in kernel mode. Caused by (from msr): regs 1f99a6a8 MSS error. MSSSR0: 1000 NIP: 1FFA1CF0 XER: LR: REGS: 1f99a6a8 TRAP: 0200 DAR: MSR: 00101030 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11 GPR00: 00D8 1F99A798 1F99AF80 00B8 002C 00D0 0001BAF6 00D3 GPR08: 1FEA0D60 002B 0014 0011 1001A25C 1FFE5E00 GPR16: 01FF 003F 011D658B 007FFEFE 0001 GPR24: 1FEA02C8 1FEA0C88 1F99A890 0100015C 1FFE5F14 1FE9FD98 Call backtrace: 001A001A 1FFA3C1C 1FFC7B74 1FFC7C9C 1FFB0C60 1FFB1050 1FFBEDD4 1FFBE3DC 1FFBE6A0 1FFBED00 1FFBE3DC 1FFBE664 1FFC011C 1FFBEDD4 1FFBE3DC 1FFBE664 1FFB061C 1FFBEDD4 1FFBE3DC 1FFBE5A8 1FFC11F8 1FFA7338 1FF9F568 machine check My guess is that the machine check and the -2 error are related. Does anyone have a clue what the problem really is? -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot for LENO3 processor board
Hallo Detlev, thanks for prompt reply and the input. Regards, Balaji KUPPUSAMY, PMP® - Original Message From: Detlev Zundel d...@denx.de To: K Balaji krb_bal...@yahoo.com Cc: u-boot@lists.denx.de; Daniel Hellstrom dan...@gaisler.com Sent: Thu, January 21, 2010 2:14:52 PM Subject: Re: [U-Boot] U-Boot for LENO3 processor board Hi Balaji, I am having the following boot requirements: Boot software will be flashed in to PROM, which should start from PROM and copy the application software which is flahsed in other flash device in different address space. The processor is LEON3FT. is current release of U-Boot supports LEON3FT architecture, please provide with details and link to get start Actually I don't know much about the Leon line of CPUs, but I see that we have three configurations using a Leon CPU: gr_cpci_ax2000, gr_ep2s60, grsim and gr_xc3s_1500. I put the maintainer of these boards on CC, so maybe he can answer that. Cheers Detlev -- Indeed, the author firmly believes that the best serious work is also good fun. We needn't apologize if we enjoy doing research. -- Donald Knuth -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot for LENO3 processor board
Thanks Daniel, it will be veryhelpful for me to start exploring. pleas do let me know once you have updated for LEON3FT. have nice weekend. Regards, Balaji KUPPUSAMY, PMP® - Original Message From: Daniel Hellstrom dan...@gaisler.com To: K Balaji krb_bal...@yahoo.com Cc: u-boot@lists.denx.de Sent: Thu, January 21, 2010 3:02:22 PM Subject: Re: [U-Boot] U-Boot for LENO3 processor board Hi, Detlev Zundel wrote: Hi Balaji, I am having the following boot requirements: Boot software will be flashed in to PROM, which should start from PROM and copy the application software which is flahsed in other flash device in different address space. The processor is LEON3FT. is current release of U-Boot supports LEON3FT architecture, please provide with details and link to get start Actually I don't know much about the Leon line of CPUs, but I see that we have three configurations using a Leon CPU: gr_cpci_ax2000, gr_ep2s60, grsim and gr_xc3s_1500. I put the maintainer of these boards on CC, so maybe he can answer that. Cheers Detlev As Detlev points out there are three BSPs available. Since the LEON3 is a SOC it is hard to support all different configurations on a board, so the boards supported are though to support the template design of GRLIB. The LEON3FT is not supported in the current u-boot available in the sparc git repository at denx.de. Some extra steps must be taken when running the fault-tolerant LEON3, one must clear memory and registered for example so that the CRCs of the registers are correct. I have a version that supports LEON3FT available at ftp://ftp.gaisler.com/u-boot/u-boot-sparc-vxworks-1.0.0.tar.gz, currently I'm working with generating patches for the LEON3 CPU/boards, I have reworked some parts of the current LEON port. I suggest you wait one day or so until I push the patches onto the SPARC-u-boot git repo, after that I will also add the LEON3FT patches. In the meanwhile you can try the FTP link. Regards, Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] Add Nomadik board usb-s8815 by Calao vendor
Wolfgang Denk: I don't like to see such heavy copying of code. This is a clear indication that we should factor out the common parts While I disagree (as explained), I'm trying hard to do it. Unfortunately what is currently a Makefile decision (COBJS-y and such) will sometimes become ifdef in the code. However, i've moved platform.S and lcd.c to the cpu directory, so they can be shared (the assembly really ought to be personalized for each board, as some cruft is still there from past history, and the lcd.c is really two small data structures, but let's ignore this by now). Now, reading better your message I see this that I don't understand. Actually differences are so small that common code can be used completely, and no separate board directories are needed. On one side we are asked to use the vendor directories, and now I should merge vendor/st/nhk8815 and vendor/calao/usb-8815. Now, I wonder where am I expected to place che board files. In cpu/arm926ejs/nomadik ? And using #ifdef in a single file to sort out differences? I got the idea a board should be a separate object (directory), which bases on the available infrastructure to pick up pieces and define own parameters. Adding a board should be as easy as adding a directory. Such parameters sometimes happen to match other parameters, but coalescing two boards just to save a few lines is not an advantage, in my opinion. Could you please explain how to proceed to have both boards upstream in the best possible way? I currently don't understand the policy. Please forgive me if the message looks aggressive. It's not meant to be, but ascii doesn't proprely convey tone. /alessandro ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5] zlib: updated to v.1.2.3
Dear Timur Tabi, In message ed82fe3e1001220908j5887b625te5efd2b432891...@mail.gmail.com you wrote: This patch has broken MPC8610. I discovered it with git bisect. After applying this patch, I get this error when I try to boot the kernel: Uncompressing Kernel Image ... Error: inflate() returned -2 GUNZIP: uncompress, out-of-mem or overwrite error - must RESET board to recover What is your exact boot command? Eventually you are just using a too low load address? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Computers are not intelligent. They only think they are. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5] zlib: updated to v.1.2.3
Wolfgang Denk wrote: What is your exact boot command? Eventually you are just using a too low load address? bootm 100 - c0 It's possible my addresses are bad, but I tried some other addresses and it didn't fix anything. I may still be using bad addresses = print bootcmd bootcmd=run tftpboot = print tftpboot tftpboot=run tftpimage; run hdbootarg; bootm $loadaddr - $dtbaddr = print loadaddr loadaddr=100 = print dtbaddr dtbaddr=c0 = print hdbootarg hdbootarg=setenv bootargs root=$rfsdev console=$consoledev,$baudrate $othbootargs $single -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] imx51 u-boot
Rick Bronson wrote: Hi Sbabic, Hi Rick, I have the u-boot from the freescale ltib tar ball but it doesn't seem to run too well. I comes up but when I press any keys nothing happens. Anyway, I was wondering if you have anything newer that I could try. Please send your questions to u-boot ML. It is the right place where we can exchange experience on u-boot. BTW, I just blasted u-boot into the 1st part of the SD card and prayed: sudo dd if=u-boot/u-boot.bin of=$(SD_CARD) bs=512 seek=0 If this is the u-boot you find in the ltib, the command could be correct. It depends how u-boot is built. The MX51 processor reads automatically the SD card starting from address 0x400. At this address, the processor must find the DCD table. In the patches I sent, I follow another approach: u-boot is build independently from the device where you will store the bootloader. You have to generate u-boot.imx (with make u-boot.imx), that adds the DCD table and then you must store it at the correct offset. On a SD card, this means with: dd if=u-boot.imx of=$(SD_CARD) bs=512 seek=2 Do you try the patches I sent to the ML ? And which is the version of your processor (TO1, TO2 or TO3) and of the board ? Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] ppc4xx: Fix sending type 1 PCI transactions
The list of 4xx SoCs that should send type 1 PCI transactions is not defined correctly. As a result PCI-PCI bridges and devices behind them are not identified. The following 4xx variants should send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT. Signed-off-by: Felix Radensky fe...@embedded-sol.com --- v2: Removed 460SX from the list, it has no PCI controller. Fixed commit message drivers/pci/pci_indirect.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c index ab51f8d..2070d01 100644 --- a/drivers/pci/pci_indirect.c +++ b/drivers/pci/pci_indirect.c @@ -59,7 +59,8 @@ indirect_##rw##_config_##size(struct pci_controller *hose, \ cfg_##rw(val, hose-cfg_data + (offset mask), type, op); \ return 0;\ } -#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) +#elif defined(CONFIG_440GX) || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \ + defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ indirect_##rw##_config_##size(struct pci_controller *hose, \ -- 1.5.4.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Performance problems with gunzip
I never said it was difficult, only non-trivial :) Not trivial, actually. I am looking forward to something like this for a long time now and I'm sure other people will value it too, so thanks in advance! It's still not working, but _I_ am working on it again after the weekend. /alessandro ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] ELDK for P2020/P2010
Hi Can someone please let me know which ELDK supports P2020/P2010 (Freescale) processors? Thanks in advance Vinay ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
