Re: [U-Boot] [PATCH] add new board pm9g45
Asen Dimov wrote:
Hello everyone,
here is the new board PM9G45 from Ronetix GmbH,
based on at91sam9g45 MCU. It has 128MB DDR2 SDRAM, 256MB NAND,
could be with or without DataFlash.
The board is made as SODIMM200 module.
For more info www.ronatix.at or i...@ronetix.at.
Regards,
Asen
There are some errors on building with MAKEALL arm
These must be fixed
regressions from pm9g45.ERR
cpu.c:26:2: warning: #warning Your board is using legacy SoC access. Please
update!
pm9g45.c: In function 'pm9g45_macb_hw_init':
pm9g45.c:112: warning: unused variable 'rstc'
pm9g45.c: In function 'lcd_show_board_info':
pm9g45.c:225: warning: unused variable 'dataflash_size'
Because this is a new board, it should follow the new at91 Soc access.
See doc/README.at91-soc
I also recommend running the linux kernel's checkpatch.pl program to
find formatting problems.
Signed-off-by: Asen Dimov di...@ronetix.at
---
MAKEALL|1 +
Makefile |4 +
board/ronetix/pm9g45/Makefile | 54 +++
.../at91sam9m10g45ek = ronetix/pm9g45}/config.mk |0
board/ronetix/pm9g45/pm9g45.c | 365
include/configs/pm9g45.h | 246 +
6 files changed, 670 insertions(+), 0 deletions(-)
create mode 100644 board/ronetix/pm9g45/Makefile
copy board/{atmel/at91sam9m10g45ek = ronetix/pm9g45}/config.mk (100%)
create mode 100644 board/ronetix/pm9g45/pm9g45.c
create mode 100644 include/configs/pm9g45.h
diff --git a/MAKEALL b/MAKEALL
index beacb5f..ad591d5 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -673,6 +673,7 @@ LIST_at91= \
otc570 \
pm9261 \
pm9263 \
+ pm9g45 \
SBC35_A9G20 \
TNY_A9260 \
TNY_A9G20 \
diff --git a/Makefile b/Makefile
index d801e25..438580a 100644
--- a/Makefile
+++ b/Makefile
@@ -2882,6 +2882,10 @@ otc570_config : unconfig
pm9263_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
+pm9g45_config: unconfig
+ @mkdir -p $(obj)include
+ @$(MKCONFIG) -a pm9g45 arm arm926ejs pm9g45 ronetix at91
+
SBC35_A9G20_NANDFLASH_config \
SBC35_A9G20_EEPROM_config \
SBC35_A9G20_config : unconfig
diff --git a/board/ronetix/pm9g45/Makefile b/board/ronetix/pm9g45/Makefile
new file mode 100644
index 000..dd5b02e
--- /dev/null
+++ b/board/ronetix/pm9g45/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop stelian@leadtechdesign.com
+# Lead Tech Design www.leadtechdesign.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y += pm9g45.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/atmel/at91sam9m10g45ek/config.mk
b/board/ronetix/pm9g45/config.mk
similarity index 100%
copy from board/atmel/at91sam9m10g45ek/config.mk
copy to board/ronetix/pm9g45/config.mk
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
new file mode 100644
index 000..d11f40f
--- /dev/null
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -0,0 +1,365 @@
+/*
+ * (C) Copyright 2005-2010
+ * Ilko Iliev il...@ronetix.at
+ * Asen Dimov di...@ronetix.at
+ * Ronetix GmbH www.ronetix.at
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop stelian@leadtechdesign.com
+ *
Re: [U-Boot] [Nios] Pull Request
Dear Scott McNutt, In message 4ba24b16.3090...@psyent.com you wrote: Wolfgang, The following changes since commit f1fdc42e5efb9e3b6d0dd3b605d0848d3ca8a039: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-video are available in the git repository at: git://git.denx.de/u-boot-nios.git master Renato Andreola (1): nios2: Added support to YANU UART Thomas Chou (1): nios2: use generic unaligned.h cpu/nios2/serial.c| 168 - include/asm-nios2/unaligned.h |6 ++ include/nios2-yanu.h | 115 3 files changed, 288 insertions(+), 1 deletions(-) create mode 100644 include/asm-nios2/unaligned.h create mode 100644 include/nios2-yanu.h Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I find this a nice feature but it is not according to the documen- tation. Or is it a BUG? Let's call it an accidental feature. :-) - Larry Wall in 6...@jpl-devvax.jpl.nasa.gov ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] i2c pull request (next)
Dear Heiko Schocher, In message 4b9e18bc.5090...@denx.de you wrote: Hello Wolfgang, please pull for next branch the following changes for i2c: The following changes since commit a143441472e1e422b0ff36ec4c99e36dd0f0358b: Detlev Zundel (1): mpc5xxx: Remove all references to MGT5100 are available in the git repository at: git://git.denx.de/u-boot-i2c.git next Frans Meulenbroeks (5): cmd_i2c.c: reduced subaddress length to 3 bytes cmd_bootm.c: made subcommand array static cmd_i2c.c: reworked subcommand handling cmd_i2c.c: sorted commands alphabetically cmd_i2c.c: added i2c read to memory function common/cmd_bootm.c |2 +- common/cmd_i2c.c | 158 +-- 2 files changed, 115 insertions(+), 45 deletions(-) Applied to next, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de We don't care. We don't have to. We're the Phone Company. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 00/17] Reorganize directory structure
Dear Peter Tyser, In message 1260745480-22442-1-git-send-email-pty...@xes-inc.com you wrote: This series reorganizes U-Boot's directory structure so that it looks like: /arch/$ARCH/ /lib/sources currently in lib_$ARCH/ /include/asm/headers currently in incluce/asm-$ARCH/ /cpu/appropriate cpu directories in cpu/ /config.mk (old lib_$ARCH/config.mk) /lib/ /source files currently in lib_generic /libfdt/ /lzma/ /lzo/ With the next' branch being available, I think this would be a good opportunity to get this stuff applied. Do you have any plans to repost this any time soon? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de ... The prejudices people feel about each other disappear when then get to know each other. -- Kirk, Elaan of Troyius, stardate 4372.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][RESEND]: Fix for U-Boot build failure with CONFIG_SYS_NO_FLASH defined for qemu-mips.
Dear Himanshu Chauhan, I apologize for the long delay (I could try and claim I was waiting for anybody else to comment first, but it seems noodu feels addessed). In message 4b2c7961.3070...@symmetricore.com you wrote: U-Boot hangs with qemu-system-mips with ##unknown flash error. Disabling flash using CONFIG_SYS_NO_FLASH breaks the build. This patch fixes the issue. Don't know if its okay. Signed-off-by: Himanshu Chauhan himan...@symmetricore.com diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index efd6aec..5bd3af0 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -76,7 +76,7 @@ extern void bz_internal_error(int); static int image_info (unsigned long addr); #endif -#if defined(CONFIG_CMD_IMLS) +#if !defined(CONFIG_SYS_NO_FLASH) defined(CONFIG_CMD_IMLS) I don't like this approach - CONFIG_CMD_IMLS and CONFIG_SYS_NO_FLASH should not be combined like that. Assume somebody wants to extend the functionality of the imls command to check for images in NAND flash (or other similar storage devices) as well. Disabling NOR flash on a system should be just a matter of system configuration. If you have no NOR flash on your board (so you select CONFIG_SYS_NO_FLASH), then why do you select CONFIG_CMD_IMLS which obviously attempts to access NOR flash? diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 24eb33f..06c7271 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -41,6 +41,7 @@ #include environment.h #include mtd/cfi_flash.h +#ifndef CONFIG_SYS_NO_FLASH Same here. Why do you enable the CFI driver at all when you don't have NOR flash on your system? --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h :q @@ -142,6 +142,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET0x40 /* We boot from this flash, selected with dip switch */ +#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_FLASH_BASE0xbfc0 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT128 @@ -149,7 +150,8 @@ #define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE1 -#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH 0 +#define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) Here you should disable NOR related features - like the CFI driver or the imls command. Sorry, but I reject this patch. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de PROGRAM - n. A magic spell cast over a computer allowing it to turn one's input into error messages. v. tr. - To engage in a pastime similar to banging one's head against a wall, but with fewer opportunities for reward. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] bug in ubifs
Dear tcre...@alphabot.fr,
In message 36396.1264773...@alphabot.fr you wrote:
Some bugs I found while using uboot.
---
BODY { font-family:Arial, Helvetica, sans-serif;font-size:12px; }in
common/cmd_ubifs.c from line 59 add 2 lines
ubifs_initialized = 1;
}
+ // tcre...@alphabot.fr : ubifs_mounted is never reset if the
previous mount failed. This bring my system to hang as it tries to
unmount a non-existing mount point
+ ubifs_mounted = 0;
ret = ubifs_mount(vol_name);
if (ret)
return -1;
---
...
Stefan had asked you to resubmit this (totallyunreadable!) message as
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Man is the best computer we can put aboard a spacecraft ... and the
only one that can be mass produced with unskilled labor.
- Wernher von Braun
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Added MC13892VK Power Management driver
Stefano Babic wrote:
Added SPI driver for the Power Management Controller
used with i.MX51 Processor.
Errors in
imx31_litekeit
imx31_phycore_eet
imx31_ads
imx31_pdk*
mxc_spi.c: In function 'spi_cfg':
mxc_spi.c:158: warning: implicit declaration of function ' mxc_get_clock'
mxc_spi.c:158: error: ' MXC_CSPI_CLK' undeclared (first use in this function)
mxc_spi.c:158: error: (Each undeclared identifier is reported only once
mxc_spi.c:158: error: for each function it appears in.)
mxc_spi.c:197: warning: implicit declaration of function '
MXC_CSPICTRL_SELCHAN'
mxc_spi.c:199: warning: implicit declaration of function '
MXC_CSPICTRL_PREDIV'
mxc_spi.c:201: warning: implicit declaration of function '
MXC_CSPICTRL_POSTDIV'
mxc_spi.c:219: error: ' MXC_CSPICON' undeclared (first use in this function)
mxc_spi.c:225: error: ' MXC_CSPICON_SSPOL' undeclared (first use in this
function)
mxc_spi.c:227: error: ' MXC_CSPICON_POL' undeclared (first use in this
function)
mxc_spi.c:229: error: ' MXC_CSPICON_PHA' undeclared (first use in this
function)
mxc_spi.c: In function 'spi_setup_slave':
mxc_spi.c:460: error: 'ctrl_reg' undeclared (first use in this function)
imx51evk
mxc_spi.c: In function 'decode_cs':
mxc_spi.c:400: warning: unused variable 'ret'
These must be fixed
Signed-off-by: Stefano Babic sba...@denx.de
---
drivers/misc/Makefile |1 +
drivers/misc/mc13892_spi_pmic.c | 134 +++
include/mc13892.h | 149
+++
3 files changed, 284 insertions(+), 0 deletions(-)
create mode 100644 drivers/misc/mc13892_spi_pmic.c
create mode 100644 include/mc13892.h
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index f6df60f..5847262 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
COBJS-$(CONFIG_NS87308) += ns87308.o
COBJS-$(CONFIG_STATUS_LED) += status_led.o
COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
+COBJS-$(CONFIG_MC13892_SPI_PMIC) += mc13892_spi_pmic.o
COBJS:= $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/misc/mc13892_spi_pmic.c b/drivers/misc/mc13892_spi_pmic.c
new file mode 100644
index 000..f095fcc
--- /dev/null
+++ b/drivers/misc/mc13892_spi_pmic.c
@@ -0,0 +1,134 @@
+/*
+ * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include config.h
+#include common.h
+#include spi.h
+#include asm/errno.h
+#include linux/types.h
+
+u32 mc13892_reg(struct spi_slave *slave, u32 reg, u32 val, u32 write)
+{
+ char tx[4];
+ char rx[4];
+ int i;
+ u32 tmp, pmic_tx, pmic_rx;
+
+ if (!slave)
+ return 0;
+
+ if (reg 63 || write 1) {
+ printf(reg num = %d is invalid. Should be less then 63\n,
+ reg);
+ return 0;
+ }
+ pmic_tx = (write 31) | (reg 25) | (val 0x00FF);
+ debug(reg=0x%x, val=0x%08x\n, reg, pmic_tx);
+
+ tmp = pmic_tx;
+ for (i = 0; i 4; i++) {
+ tx[i] = (tmp 0xFF00) 24;
+ tmp = 8;
+ }
Looks like you are converting for bigendian to little.
It may be better to use one of the cpu_to_little functions
see linux/byteorder/generic.h
+
+ if (spi_xfer(slave, 4 3, tx, rx,
+ SPI_XFER_BEGIN | SPI_XFER_END)) {
+ return -1;
+ }
+
+ if (write) {
+ tx[0] = ~(1 31);
+ if (spi_xfer(slave, 4 3, tx, rx,
+ SPI_XFER_BEGIN | SPI_XFER_END)) {
+ return -1;
+ }
+ }
+
+ pmic_rx = (rx[0] 24) | (rx[1] 16) | (rx[2] 8) | rx[3];
A conversion of little to big.
Use existing conversion functions
+ debug(reg=0x%x, val_read=0x%08x 0x%x 0x%x 0x%x 0x%x\n,
+ reg, pmic_rx, rx[0], rx[1], rx[2], rx[3]);
+ return pmic_rx;
+}
+
+void mc13892_show_pmic_info(struct spi_slave *slave)
+{
+ volatile u32 rev_id;
+
+ if (!slave)
+ return;
+
+ rev_id = mc13892_reg(slave, 7, 0, 0);
Be consistent on
Re: [U-Boot] [PATCH] SPI: added support for MX51 to mxc_spi
Stefano Babic wrote:
This patch add support for MX51 processor and
supports transfer of multiple word in a single
transation.
Signed-off-by: Stefano Babic sba...@denx.de
---
The patch adds support for the MX51 and wants to remove some
limitation on the old driver. Actually, the buffer passed
to the transfer function must be word-aligne, even if it is
required to send a single byte.
It may be better to split this patch into
1. fixing the old driver
2. adding mx51
drivers/spi/mxc_spi.c | 357
+
1 files changed, 301 insertions(+), 56 deletions(-)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 3a45200..b04fadc 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -24,6 +24,11 @@
#include asm/errno.h
#include asm/io.h
+#define MXC_CSPIRXDATA 0x00
+#define MXC_CSPITXDATA 0x04
+#define MXC_CSPICTRL 0x08
+#define MXC_CSPIPERIOD_32KHZ (1 15)
+
Pulling these out and making them common may not be the best thing to do.
Located here, it hides the
#ifdef CONFIG_MX27
#elif defined (CONFIG_MX31)
#elif defined (CONFIG_MX51)
#else
#endif
I would prefer if you just kept the copies in the mx31, mx51 locations
#ifdef CONFIG_MX27
/* i.MX27 has a completely wrong register layout and register definitions in
the
* datasheet, the correct one is in the Freescale's Linux driver */
@@ -31,13 +36,9 @@
#error i.MX27 CSPI not supported due to drastic differences in register
definisions \
See linux mxc_spi driver from Freescale for details.
-#else
-
+#elif defined(CONFIG_MX31)
#include asm/arch/mx31.h
-#define MXC_CSPIRXDATA 0x00
-#define MXC_CSPITXDATA 0x04
-#define MXC_CSPICTRL 0x08
#define MXC_CSPIINT 0x0C
#define MXC_CSPIDMA 0x10
#define MXC_CSPISTAT 0x14
@@ -56,21 +57,63 @@
#define MXC_CSPICTRL_CHIPSELECT(x) (((x) 0x3) 24)
#define MXC_CSPICTRL_BITCOUNT(x) (((x) 0x1f) 8)
#define MXC_CSPICTRL_DATARATE(x) (((x) 0x7) 16)
+#define MXC_CSPICTRL_MAXBITS 0x1f
+#define MXC_CSPICTRL_TC (1 8)
+#define MXC_CSPICTRL_RXOVF (1 6)
#define MXC_CSPIPERIOD_32KHZ (1 15)
+#define MAX_SPI_BYTES4
In 'Add SPI support to mx51evk board'
The MAX_SPI_BYTES was defined in the config file.
Here it is defined for mx31 generally.
You should be consistent.
These would be a better place for the mx51 values as you only have to do it
once.
static unsigned long spi_bases[] = {
0x43fa4000,
0x5001,
0x53f84000,
};
+#elif defined(CONFIG_MX51)
+
+#define MXC_CSPICON 0x0C
+#define MXC_CSPIINT 0x10
+#define MXC_CSPIDMA 0x14
+#define MXC_CSPISTAT 0x18
+#define MXC_CSPIPERIOD 0x1C
+#define MXC_CSPIRESET0x00
+#include asm/arch/imx-regs.h
+#include asm/arch/clock.h
Be constistent with mx31
Move the #includes to the first lines after the #elif
The other #defines to follow.
Tom
+#define MXC_CSPICTRL_EN (1 0)
+#define MXC_CSPICTRL_MODE(1 1)
+#define MXC_CSPICTRL_XCH (1 2)
+#define MXC_CSPICTRL_CHIPSELECT(x) (((x) 0x3) 12)
+#define MXC_CSPICTRL_BITCOUNT(x) (((x) 0xfff) 20)
+#define MXC_CSPICTRL_PREDIV(x) (((x) 0xF) 12)
+#define MXC_CSPICTRL_POSTDIV(x) (((x) 0xF) 8)
+#define MXC_CSPICTRL_SELCHAN(x) (((x) 0x3) 18)
+#define MXC_CSPICTRL_MAXBITS 0xfff
+#define MXC_CSPICTRL_TC (1 7)
+#define MXC_CSPICTRL_RXOVF (1 6)
+
+/* Bit position inside CTRL register to be associated with SS */
+#define MXC_CSPICTRL_CHAN18
+
+/* Bit position inside CON register to be associated with SS */
+#define MXC_CSPICON_POL 4
+#define MXC_CSPICON_PHA 0
+#define MXC_CSPICON_SSPOL12
+
+static unsigned long spi_bases[] = {
+ CSPI1_BASE_ADDR,
+ CSPI2_BASE_ADDR,
+ CSPI3_BASE_ADDR,
+};
+#else
+#error Unsupported architecture
#endif
struct mxc_spi_slave {
struct spi_slave slave;
unsigned long base;
u32 ctrl_reg;
+ u32 cfg_reg;
int gpio;
};
@@ -89,71 +132,262 @@ static inline void reg_write(unsigned long addr, u32
val)
*(volatile unsigned long*)addr = val;
}
-static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen,
-unsigned long flags)
+void spi_cs_activate(struct spi_slave *slave)
{
+#ifdef CONFIG_MX31
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
- unsigned int cfg_reg = reg_read(mxcs-base + MXC_CSPICTRL);
-
- mxcs-ctrl_reg = (mxcs-ctrl_reg ~MXC_CSPICTRL_BITCOUNT(31)) |
- MXC_CSPICTRL_BITCOUNT(bitlen - 1);
+ if (mxcs-gpio 0)
+ mx31_gpio_set(mxcs-gpio, mxcs-ctrl_reg MXC_CSPICTRL_SSPOL);
+#endif
+}
- if (cfg_reg != mxcs-ctrl_reg)
-
Re: [U-Boot] [PATCH] Add SPI support to mx51evk board
Stefano Babic wrote:
The patch adds SPI devices to the mx51evk board. Two devices
are supported: Atmel SPI flash and MC13892 power
controller.
Is Atmel SPI flash already supported?
It does not look like anything atmel is setup here
This is dependent on the
Added MC13892VK Power Management driver.
These patches must be combined in a patchset.
Signed-off-by: Stefano Babic sba...@denx.de
---
board/freescale/mx51evk/mx51evk.c | 178
+
include/configs/mx51evk.h | 17
2 files changed, 195 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx51evk/mx51evk.c
b/board/freescale/mx51evk/mx51evk.c
index 8754563..b52dedb 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -27,9 +27,11 @@
#include asm/arch/iomux.h
#include asm/errno.h
#include asm/arch/sys_proto.h
+#include asm/arch/crm_regs.h
#include i2c.h
#include mmc.h
#include fsl_esdhc.h
+#include mc13892.h
#include mx51evk.h
DECLARE_GLOBAL_DATA_PTR;
@@ -213,6 +215,167 @@ static void setup_iomux_fec(void)
mxc_iomux_set_pad(MX51_PIN_NANDF_D11, 0x2180);
}
+#ifdef CONFIG_MXC_SPI
+static void setup_iomux_spi(int cs)
+{
+ /* 000: Select mux mode: ALT0 mux port: MOSI of instance: ecspi1 */
+ mxc_request_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_MOSI, 0x105);
+
+ /* 000: Select mux mode: ALT0 mux port: MISO of instance: ecspi1. */
+ mxc_request_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_MISO, 0x105);
+
+ if (cs == 0) {
+ /* de-select SS1 of instance: ecspi1. */
+ mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT3);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SS1, 0x85);
+ /* 000: Select mux mode: ALT0 mux port: SS0 ecspi1 */
+ mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, 0x185);
+ } else if (cs == 1) {
+ /* de-select SS0 of instance: ecspi1. */
+ mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT3);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, 0x85);
+ /* 000: Select mux mode: ALT0 mux port: SS1 ecspi1. */
+ mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SS1, 0x105);
+ }
+
+ /* 000: Select mux mode: ALT0 mux port: RDY of instance: ecspi1. */
+ mxc_request_iomux(MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_RDY, 0x180);
+
+ /* 000: Select mux mode: ALT0 mux port: SCLK of instance: ecspi1. */
+ mxc_request_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_CSPI1_SCLK, 0x105);
+}
+#endif
+
+static void power_init(void)
+{
+ struct spi_slave *slave;
+ unsigned int val;
+ unsigned int reg;
+ u32 atlas_id;
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
+
+#define REV_ATLAS_LITE_1_0 0x8
+#define REV_ATLAS_LITE_1_1 0x9
+#define REV_ATLAS_LITE_2_0 0x10
+#define REV_ATLAS_LITE_2_1 0x11
Move these define out of the function.
Preferablly to an h-file
Looks like LITE_2_0 is the only one used
+
+ slave = mc13892_spi_probe();
The read / write routine bails if slave is invalid.
It would be better to check earlier here and bail.
As some of the logic of this function will still run and
this would leave the hw in a bad state
+
+ /* Write needed to Power Gate 2 register */
+ val = mc13892_reg_read(slave, MC13892_REG_POWER_MISC);
+ val = ~0x1;
+ mc13892_reg_write(slave, MC13892_REG_POWER_MISC, val);
+
+ /* Write needed to update Charger 0 */
+ mc13892_reg_write(slave, MC13892_REG_CHARGE, 0x0023807F);
Change magic number 0x0023807F to a logical if-def
If it is an or-ing of bit, show the or-ing as or-ing of if-def's
There are other similar uses of magic that should be changed
+
+ /* power up the system first */
+ mc13892_reg_write(slave, MC13892_REG_POWER_MISC, 0x0020);
+
+ if (is_soc_rev(CHIP_REV_2_0) = 0) {
+ /* Set core voltage to 1.1V */
+ val = mc13892_reg_read(slave, MC13892_REG_SW_0);
+ val = (val (~0x1F)) | 0x14;
+ mc13892_reg_write(slave, MC13892_REG_SW_0, val);
+
+ /* Setup VCC (SW2) to 1.25 */
+ val = mc13892_reg_read(slave, MC13892_REG_SW_1);
+ val = (val (~0x1F)) | 0x1A;
+ mc13892_reg_write(slave, MC13892_REG_SW_1, val);
+
+ /* Setup 1V2_DIG1 (SW3) to 1.25 */
+ val = mc13892_reg_read(slave, MC13892_REG_SW_2);
+ val = (val (~0x1F)) | 0x1A;
+ mc13892_reg_write(slave, MC13892_REG_SW_2, val);
+ udelay(50);
+ /* Raise the core frequency to 800MHz */
Re: [U-Boot] [PATCH] MX51: Moved board specific values in config file
Stefano Babic wrote: The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Why was only one value cleaned up? Just from the patch, there are at least 4 more. Signed-off-by: Stefano Babic sba...@denx.de --- cpu/arm_cortexa8/mx51/lowlevel_init.S |5 - include/configs/mx51evk.h |3 +++ 2 files changed, 7 insertions(+), 1 deletions(-) diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/cpu/arm_cortexa8/mx51/lowlevel_init.S index 31af9e2..1e393bb 100644 --- a/cpu/arm_cortexa8/mx51/lowlevel_init.S +++ b/cpu/arm_cortexa8/mx51/lowlevel_init.S @@ -158,6 +158,7 @@ /* Switch peripheral to PLL 3 */ ldr r0, =CCM_BASE_ADDR ldr r1, =0x10C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL git am complains about the leading space Please remove str r1, [r0, #CLKCTL_CBCMR] ldr r1, =0x13239145 str r1, [r0, #CLKCTL_CBCDR] @@ -171,6 +172,7 @@ ldr r1, =0x19239145 str r1, [r0, #CLKCTL_CBCDR] ldr r1, =0x20C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL This is a noop as it is defined as 0. Is the value going to change ? Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
