Re: [U-Boot] [PATCH 24/35] Blackfin: bf518f-ezbrd: handle different PHYs dynamically

2010-07-11 Thread Ben Warren 
  On 7/11/2010 11:53 PM, Ben Warren wrote:
>  Hi Mike,
>
> On 7/5/2010 2:30 AM, Mike Frysinger wrote:
>> The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
>> ones only have a National PHY (which lack a RX Error interrupt 
>> line).  So
>> in the board eth init code, dynamically detect what is hooked up to 
>> the MAC
>> and handle each accordingly.
>>
>> Signed-off-by: Mike Frysinger
>> ---
>>   board/bf518f-ezbrd/bf518f-ezbrd.c |   23 +--
>>   include/configs/bf518f-ezbrd.h|   20 
>>   2 files changed, 33 insertions(+), 10 deletions(-)
> Applied to net repo.
>
> thanks,
> Ben
On second thought, it probably makes more sense to keep this as part of 
your patchset.  I shouldn't have pulled it in the first place since it's 
really board code.

regards,
Ben
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Re: [U-Boot] [PATCH V3 2/4] drivers/block: add mv_sata_ide driver

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Friday, July 09, 2010 12:11 AM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 2/4] drivers/block: add mv_sata_ide driver
> 
> This driver only provides initialization code; actual driving
> is done by cmd_ide.c using the ATA compatibility mode of the
> Marvell SATAHC controller.
> 
> Signed-off-by: Albert Aribaud 
> ---
>  drivers/block/Makefile  |1 +
>  drivers/block/mv_sata_ide.c |   61 
> +++
>  include/mv_sata_ide.h   |   54 
> ++
>  3 files changed, 116 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/block/mv_sata_ide.c
>  create mode 100644 include/mv_sata_ide.h
> 
> diff --git a/drivers/block/Makefile b/drivers/block/Makefile
> index 3f6ad5c..b47a5e4 100644
> --- a/drivers/block/Makefile
> +++ b/drivers/block/Makefile
> @@ -36,6 +36,7 @@ COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
>  COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
>  COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
>  COBJS-$(CONFIG_SYSTEMACE) += systemace.o
> +COBJS-$(CONFIG_MV_SATA_IDE) += mv_sata_ide.o

Pls correct ordering here

>  
>  COBJS:= $(COBJS-y)
>  SRCS := $(COBJS:.o=.c)
> diff --git a/drivers/block/mv_sata_ide.c b/drivers/block/mv_sata_ide.c
> new file mode 100644
> index 000..10f8bf6
> --- /dev/null
> +++ b/drivers/block/mv_sata_ide.c
> @@ -0,0 +1,61 @@
> +/*
> + * Copyright (C) 2010 Albert ARIBAUD 
> + *
> + * Written-by: Albert ARIBAUD 
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#include 
> +#include 
> +#include "mv_sata_ide.h"
> +
> +/* Mask and values for device DETection and link initialization */
> +#define MV_SATA_SCONTROL_DET_MASK0x000F

Overall if you use MVSATA you can make your patch shorter.

> +#define MV_SATA_SCONTROL_DET_NONE0x
> +#define MV_SATA_SCONTROL_DET_INIT0x0001
> +
> +/* Mask and values for device Interface Power Management */
> +#define MV_SATA_SCONTROL_IMP_MASK0x0F00
> +#define MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED   0x0300
> +
> +#define MV_SATA_SCONTROL_MASK \
> + (MV_SATA_SCONTROL_DET_MASK|MV_SATA_SCONTROL_IMP_MASK)
> +
> +#define MV_SATA_PORT_INIT \
> + (MV_SATA_SCONTROL_DET_INIT|MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
> +
> +#define MV_SATA_PORT_USE \
> + (MV_SATA_SCONTROL_DET_NONE|MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
> +
> +void mv_sata_ide_initialize_port(
> + struct mv_sata_interface_registers *port)
> +{
> + u32 reg;
> +
> + reg = readl(&port->SControl);
> +
> + reg = (reg & ~MV_SATA_SCONTROL_MASK) | MV_SATA_PORT_INIT;
> +
> + writel(reg, &port->SControl);
> +
> + reg = (reg & ~MV_SATA_SCONTROL_MASK) | MV_SATA_PORT_USE;
> +
> + writel(reg, &port->SControl);
> +}
> diff --git a/include/mv_sata_ide.h b/include/mv_sata_ide.h
> new file mode 100644
> index 000..fdcb137
> --- /dev/null
> +++ b/include/mv_sata_ide.h
> @@ -0,0 +1,54 @@
> +/*
> + * Copyright (C) 2010 Albert ARIBAUD 
> + *
> + * Written-by: Albert ARIBAUD 
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef _MV_SATA_IDE_H
> +#define _MV_SATA_IDE_H
> +
> +#ifndef __ASSEMBLY__
> +
> +/* SATA insterface registers */
> +struct mv_sata_interface_registers
>

Re: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other than kirkwood

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: Ben Warren [mailto:biggerbadder...@gmail.com] 
> Sent: Monday, July 12, 2010 11:54 AM
> To: Prafulla Wadaskar
> Cc: Albert Aribaud; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs 
> other than kirkwood
> 
>   On 7/11/2010 10:45 PM, Prafulla Wadaskar wrote:
> >
> >
> >> -Original Message-
> >> From: u-boot-boun...@lists.denx.de
> >> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> >> Sent: Sunday, July 11, 2010 1:32 PM
> >> To: u-boot@lists.denx.de
> >> Subject: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other
> >> than kirkwood
...snip...
> >>struct eth_device *dev = eth_get_dev_by_name(devname);
> >> -  struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
> >> -  struct kwgbe_registers *regs = dkwgbe->regs;
> >> +  struct mv_egiga_device *dmvegiga = to_mv_egiga(dev);
> >> +  struct mv_egiga_registers *regs = dmvegiga->regs;
> > I suggest to keep name as mvgbe here instead of mv_egiga, 3 
> additional chars, increases overall code size
> huh?  The name is consistent with the rest of his work, and *if* the 
> code really increases in size, I can't imagine that 3 chars really 
> matters...

That's true.
But if we can do it why to avoid it? again it helps to keep same indentation 
(keeping them below 80char size)

Regards..
Prafulla . .
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Re: [U-Boot] [PATCH V3 3/4] orion5x: add support for cmd_ide.c

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Friday, July 09, 2010 12:11 AM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 3/4] orion5x: add support for cmd_ide.c
> 
> This patch allows cmd_ide.c to use the Marvell SATAHC controller
> integrated in the Orion5x SoC, thus enabling access to SATA disks
> for Orion5x-based boards such as the ED Mini V2.
> 
> Signed-off-by: Albert Aribaud 
> ---
>  arch/arm/include/asm/arch-orion5x/orion5x.h |   11 +++
>  common/cmd_ide.c|4 
>  2 files changed, 15 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h 
> b/arch/arm/include/asm/arch-orion5x/orion5x.h
> index 4008c84..585083a 100644
> --- a/arch/arm/include/asm/arch-orion5x/orion5x.h
> +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
> @@ -55,6 +55,17 @@
>  #define ORION5X_USB20_PORT0_BASE 
> (ORION5X_REGISTER(0x5))
>  #define ORION5X_USB20_PORT1_BASE 
> (ORION5X_REGISTER(0xA))
>  #define ORION5X_EGIGA_BASE   
> (ORION5X_REGISTER(0x72000))
> +#define ORION5X_SATA_BASE
> (ORION5X_REGISTER(0x8))
> +#define ORION5X_SATA_PORT0_OFFSET0x2000
> +#define ORION5X_SATA_PORT1_OFFSET0x4000
> +
> +/* SATA Interface Register port 0 and 1 */
> +#define orion5x_port0_sata_registers \
> +  ((struct mv_sata_interface_registers *) \
> +  (ORION5X_SATA_BASE+ORION5X_SATA_PORT0_OFFSET+0x300))
> +#define orion5x_port1_sata_registers \
> +  ((struct mv_sata_interface_registers *) \
> +  (ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET+0x300))

Pls remove this and use _BASE macro in c code

>  
>  #define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024)
>  
> diff --git a/common/cmd_ide.c b/common/cmd_ide.c
> index 9292a5b..7f98ebb 100644
> --- a/common/cmd_ide.c
> +++ b/common/cmd_ide.c
> @@ -45,6 +45,10 @@
>  #include 
>  #endif
>  
> +#ifdef CONFIG_ORION5X
> +#include 
> +#endif
> +

Why do you need this include? 

Regards..
Prafulla . .
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Re: [U-Boot] [PATCH 24/35] Blackfin: bf518f-ezbrd: handle different PHYs dynamically

2010-07-11 Thread Ben Warren 
  Hi Mike,

On 7/5/2010 2:30 AM, Mike Frysinger wrote:
> The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
> ones only have a National PHY (which lack a RX Error interrupt line).  So
> in the board eth init code, dynamically detect what is hooked up to the MAC
> and handle each accordingly.
>
> Signed-off-by: Mike Frysinger
> ---
>   board/bf518f-ezbrd/bf518f-ezbrd.c |   23 +--
>   include/configs/bf518f-ezbrd.h|   20 
>   2 files changed, 33 insertions(+), 10 deletions(-)
Applied to net repo.

thanks,
Ben
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Re: [U-Boot] [PATCH 14/35] Blackfin: bfin_mac: convert to portmux framework

2010-07-11 Thread Ben Warren 
  Hi Mike,

On 7/5/2010 2:30 AM, Mike Frysinger wrote:
> Rather than bang MMRs directly, use the new portmux framework to handle
> the details.  While we're doing this, let boards declare the exact list
> of pins they need in case there is one or two they don't actually have
> hooked up.
>
> Signed-off-by: Mike Frysinger
> ---
>   drivers/net/bfin_mac.c |   47 
> +++
>   1 files changed, 11 insertions(+), 36 deletions(-)
Applied to net repo.

thanks,
Ben
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[U-Boot] Allocating memory in u-boot application

2010-07-11 Thread prathika 
hi,
I am working on PPC440EP base custom board. I managed to port u-boot 
successfully.
The requirement is, there should be no OS running on-board and run an 
application in u-boot. I have successfully ported and example 
application also.
The part of my requirement is to read data as large as 10MB from NVRAM 
and load it to PC.
I am not able to allocate more than 64kB to a buffer. When i allocate 
even 1MB, my application hangs when i try to access the buffer. I have 
64MB DDR-RAM interface to PPC440EP.

The size of my application is 300kB and i don't think u-boot uses large 
memory.
How can I malloc big size to a buffer in this case. Please help me fix 
this issue, thanks in advance.

Regards,
Prathika R

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Re: [U-Boot] [PATCH] net: dm9000x: re-add casts to I/O pointers to fix gcc warnings

2010-07-11 Thread Ben Warren 
  Hi Mike,

On 7/4/2010 11:29 PM, Mike Frysinger wrote:
> The DM9000 in/out helper functions were casting the register address when
> it was accessing things directly (pre commit a45dde2293c816138e53c).  But
> when it was changed to using the in/out helpers, those casts were dropped
> because those functions don't take pointers.  Even more recently, those
> functions were then changed to use the read/write helpers, but the casts
> were not re-added.  This is necessary because the read/write helpers do
> take pointers.  Otherwise we get a lot of warnings like:
> dm9000x.c: In function 'dm9000_inblk_8bit':
> dm9000x.c:172: warning: passing argument 1 of 'readb'
>   makes pointer from integer without a cast
>
> Signed-off-by: Mike Frysinger
> ---
>   drivers/net/dm9000x.c |   12 ++--
>   1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
> index 137e41f..709f67a 100644
> --- a/drivers/net/dm9000x.c
> +++ b/drivers/net/dm9000x.c
> @@ -117,12 +117,12 @@ static void DM9000_iow(int reg, u8 value);
>
>   /* DM9000 network board routine  */
>
> -#define DM9000_outb(d,r) writeb(d, r)
> -#define DM9000_outw(d,r) writew(d, r)
> -#define DM9000_outl(d,r) writel(d, r)
> -#define DM9000_inb(r) readb(r)
> -#define DM9000_inw(r) readw(r)
> -#define DM9000_inl(r) readl(r)
> +#define DM9000_outb(d,r) writeb(d, (volatile u8 *)(r))
> +#define DM9000_outw(d,r) writew(d, (volatile u16 *)(r))
> +#define DM9000_outl(d,r) writel(d, (volatile u32 *)(r))
> +#define DM9000_inb(r) readb((volatile u8 *)(r))
> +#define DM9000_inw(r) readw((volatile u16 *)(r))
> +#define DM9000_inl(r) readl((volatile u32 *)(r))
>
>   #ifdef CONFIG_DM9000_DEBUG
>   static void
Applied to net repo.

thanks,
Ben
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Re: [U-Boot] [PATCH v2] net: Add option to disable fiber on M88E1111 PHY for PPC4xx

2010-07-11 Thread Ben Warren 
  Hi Stefen,

On 6/29/2010 12:23 AM, Stefan Roese wrote:
> By defining CONFIG_M88E_DISABLE_FIBER boards can configure the
> M88E PYH to disable fiber. This is needed for an upcoming PPC460GT
> based board, which has fiber/copper auto-selection enabled by default.
> This doesn't seem to work. So we disable fiber in the PHY register.
>
> Signed-off-by: Stefan Roese
> Cc: Ben Warren
> ---
> v2: - Fixed spelling: fibre ->  fiber
>
>   drivers/net/4xx_enet.c |5 +
>   1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c
> index 2fac641..144b851 100644
> --- a/drivers/net/4xx_enet.c
> +++ b/drivers/net/4xx_enet.c
> @@ -1095,6 +1095,11 @@ static int ppc_4xx_eth_init (struct eth_device *dev, 
> bd_t * bis)
>   miiphy_write (dev->name, reg, 0x18, 0x4101);
>   miiphy_write (dev->name, reg, 0x09, 0x0e00);
>   miiphy_write (dev->name, reg, 0x04, 0x01e1);
> +#if defined(CONFIG_M88E_DISABLE_FIBER)
> + miiphy_read(dev->name, reg, 0x1b,®_short);
> + reg_short |= 0x8000;
> + miiphy_write(dev->name, reg, 0x1b, reg_short);
> +#endif
>   #endif
>   #if defined(CONFIG_M88E1112_PHY)
>   if (bis->bi_phymode[devnum] == BI_PHYMODE_SGMII) {
Applied to net repo.

thanks,
Ben
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Re: [U-Boot] [PATCH] i2c: fix SDA contention in read_byte()

2010-07-11 Thread Reinhard Meyer 
Thomas Chou schrieb:
> Reinhard Meyer wrote:
>> Its even simpler, provided the  hardware can do open collector. Here
>> was my solution for AVR32AP7000:
>>
> 
> Then we could add a config for open drain similar to that of linux driver.
> 
> # ifndef I2C_SDA
> #  ifdef CONFIG_SOFT_I2C_GPIO_SDA_IS_OPEN_DRAIN
> #   define I2C_SDA(bit) gpio_set_value(CONFIG_SOFT_I2C_GPIO_SDA, bit)
> #  else
> #   define I2C_SDA(bit) \
> if (bit) {\
> gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA);\
> } else {\
> gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0);\
> }
> #  endif
> # endif

Why would we need that? Since the defines reside in the board/project specific
include/configs/*.h file, it is well known if the hardware has open drain or
not.

> 
> BTW, will you be interested in using common gpio framework for avr32
> family?

No, AVR32AP7000 is dead for me. Working on AT91SAM9xxx now, which already uses 
gpio framework...

Reinhard

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Re: [U-Boot] [PATCH V3 4/4] edminiv2: add cmd_ide support

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Friday, July 09, 2010 12:11 AM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 4/4] edminiv2: add cmd_ide support
> 
> This patch uses mv_sata_ide and cmd_ide to enable the use of the
> integrated SATAHC controller port 1.
> 
> Signed-off-by: Albert Aribaud 
> ---
>  board/LaCie/edminiv2/edminiv2.c |5 
>  include/configs/edminiv2.h  |   47 
> +-
>  2 files changed, 50 insertions(+), 2 deletions(-)
> 
> diff --git a/board/LaCie/edminiv2/edminiv2.c 
> b/board/LaCie/edminiv2/edminiv2.c
> index 54c0ffe..6336429 100644
> --- a/board/LaCie/edminiv2/edminiv2.c
> +++ b/board/LaCie/edminiv2/edminiv2.c
> @@ -88,5 +88,10 @@ int board_init(void)
>   /* boot parameter start at 256th byte of RAM base */
>   gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
>  
> + /* Enable SATA ports if SATA IDE was configured */
> +#if defined(CONFIG_MV_SATA_IDE)
> + mv_sata_ide_initialize_port(orion5x_port1_sata_registers);
> +#endif
> +
>   return 0;
>  }
> diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
> index c3d95a0..1a61437 100644
> --- a/include/configs/edminiv2.h
> +++ b/include/configs/edminiv2.h
> @@ -52,6 +52,12 @@
>  #define CONFIG_SYS_HZ1000
>  
>  /*
> + * __io is necessary for cmd_ide to compile
> + */
> +
> +#define __io
> +
> +/*
>   * Board-specific values for Orion5x MPP low level init:
>   * - MPPs 12 to 15 are SATA LEDs (mode 5)
>   * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
> @@ -60,7 +66,7 @@
>  
>  #define ORION5X_MPP0_7   0x0003
>  #define ORION5X_MPP8_15  0x
> -#define ORION5X_MPP16_23 0x
> +#define ORION5X_MPP16_23 0x
>  
>  /*
>   * Board-specific values for Orion5x GPIO low level init:
> @@ -74,7 +80,6 @@
>   */
>  
>  #define ORION5X_GPIO_OUT_ENABLE  0x03fc
> -#define ORION5X_GPIO_OUT_VALUE   0x03fc

Why did you removed this?

Regards..
Prafulla . .
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Re: [U-Boot] [PATCH V3 5/5] edminiv2: add ethernet support

2010-07-11 Thread Ben Warren 
  Hi Albert,

On 7/11/2010 11:14 PM, Albert ARIBAUD wrote:
> Hi Prafulla,
>
> Le 12/07/2010 08:00, Prafulla Wadaskar a écrit :
>
>>> +/*
>>> + * Ethernet
>>> +  */
>> Pls remove additional space char here
> Done.
>
>>> +#define CONFIG_MV_EGIGA/* Enable Marvell egiga
>>> [...]
>>> +#define CONFIG_RESET_PHY_R /* use reset_phy() to init
>>> mv8831116 PHY */
>> Shift above definition below (inside #ifdef CONFIG_CMD_NET), that makes more 
>> sense
> Done--actually replaced "Ethernet" with "Network" in block comment as
> the whole block is not only about Eth.
>
> Thanks for the feedback.
>
> Any remaining comments on patches 1-4?
>
> Amicalement,
That should be it.  Please post updates as needed.

regards,
Ben

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Re: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other than kirkwood

2010-07-11 Thread Ben Warren 
  On 7/11/2010 10:45 PM, Prafulla Wadaskar wrote:
>
>
>> -Original Message-
>> From: u-boot-boun...@lists.denx.de
>> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
>> Sent: Sunday, July 11, 2010 1:32 PM
>> To: u-boot@lists.denx.de
>> Subject: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other
>> than kirkwood
>>
>> Rename all references to kirkwood in mv_egiga symbols
>> throughout the whole codebase.
>>
>> Signed-off-by: Albert Aribaud
>> ---
>>   arch/arm/cpu/arm926ejs/kirkwood/cpu.c |4 +-
>>   arch/arm/include/asm/arch-kirkwood/kirkwood.h |5 +
>>   drivers/net/Makefile  |2 +-
>>   drivers/net/mv_egiga.c|  322
>> +-
>>   drivers/net/mv_egiga.h|  466
>> 
>>   include/configs/guruplug.h|4 +-
>>   include/configs/km_arm.h  |4 +-
>>   include/configs/mv88f6281gtw_ge.h |4 +-
>>   include/configs/openrd_base.h |4 +-
>>   include/configs/rd6281a.h |4 +-
>>   include/configs/sheevaplug.h  |4 +-
>>   include/netdev.h  |2 +-
>>   12 files changed, 418 insertions(+), 407 deletions(-)
>>
>> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
>> b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
>> index 6fc3902..786ffc6 100644
>> --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
>> +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
>> @@ -378,10 +378,10 @@ int arch_misc_init(void)
>>   }
>>   #endif /* CONFIG_ARCH_MISC_INIT */
>>
>> -#ifdef CONFIG_KIRKWOOD_EGIGA
>> +#ifdef CONFIG_MV_EGIGA
>>   int cpu_eth_init(bd_t *bis)
>>   {
>> -kirkwood_egiga_initialize(bis);
>> +mv_egiga_initialize(bis);
>>  return 0;
>>   }
>>   #endif
>> diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
>> b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
>> index 2470efb..9200605 100644
>> --- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
>> +++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
>> @@ -60,6 +60,11 @@
>>   #define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
>>   #define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
>>
>> +#if defined (CONFIG_MV_EGIGA)
> I think you don't need ifdef here
>
>> +#define MV_EGIGA0_BASE  KW_EGIGA0_BASE
>> +#define MV_EGIGA1_BASE  KW_EGIGA1_BASE
>> +#endif
>> +
>>   #if defined (CONFIG_KW88F6281)
>>   #include
>>   #elif defined (CONFIG_KW88F6192)
>> diff --git a/drivers/net/Makefile b/drivers/net/Makefile
>> index 1599c26..04f8de0 100644
>> --- a/drivers/net/Makefile
>> +++ b/drivers/net/Makefile
>> @@ -52,7 +52,7 @@ COBJS-$(CONFIG_MACB) += macb.o
>>   COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
>>   COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
>>   COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o
>> -COBJS-$(CONFIG_KIRKWOOD_EGIGA) += mv_egiga.o
>> +COBJS-$(CONFIG_MV_EGIGA) += mv_egiga.o
>>   COBJS-$(CONFIG_NATSEMI) += natsemi.o
>>   COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o
>>   COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o
>> diff --git a/drivers/net/mv_egiga.c b/drivers/net/mv_egiga.c
>> index b7ecc9d..4fecf1e 100644
>> --- a/drivers/net/mv_egiga.c
>> +++ b/drivers/net/mv_egiga.c
>> @@ -35,13 +35,17 @@
>>   #include
>>   #include
>>   #include
>> +
>> +#if defined (CONFIG_KIRKWOOD)
>>   #include
>> +#endif
>> +
>>   #include "mv_egiga.h"
>>
>>   DECLARE_GLOBAL_DATA_PTR;
>>
>> -#define KIRKWOOD_PHY_ADR_REQUEST 0xee
>> -#define KWGBE_SMI_REG (((struct kwgbe_registers
>> *)KW_EGIGA0_BASE)->smi)
>> +#define MV_PHY_ADR_REQUEST 0xee
>> +#define MV_EGIGA_SMI_REG (((struct mv_egiga_registers
>> *)MV_EGIGA0_BASE)->smi)
>>
>>   /*
>>* smi_reg_read - miiphy_read callback function.
>> @@ -51,16 +55,16 @@ DECLARE_GLOBAL_DATA_PTR;
>>   static int smi_reg_read(char *devname, u8 phy_adr, u8
>> reg_ofs, u16 * data)
>>   {
>>  struct eth_device *dev = eth_get_dev_by_name(devname);
>> -struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
>> -struct kwgbe_registers *regs = dkwgbe->regs;
>> +struct mv_egiga_device *dmvegiga = to_mv_egiga(dev);
>> +struct mv_egiga_registers *regs = dmvegiga->regs;
> I suggest to keep name as mvgbe here instead of mv_egiga, 3 additional chars, 
> increases overall code size
huh?  The name is consistent with the rest of his work, and *if* the 
code really increases in size, I can't imagine that 3 chars really 
matters...
>>  u32 smi_reg;
>>  u32 timeout;
>>
>>  /* Phyadr read request */
>> -if (phy_adr == KIRKWOOD_PHY_ADR_REQUEST&&
>> -reg_ofs == KIRKWOOD_PHY_ADR_REQUEST) {
>> +if (phy_adr == MV_PHY_ADR_REQUEST&&
>> +reg_ofs == MV_PHY_ADR_REQUEST) {
>>  /* */
>> -*data = (u16) (KWGBEREG_RD(regs->phyadr)&  PHYADR_MASK);
>> +*data = (u16) (MV_EGIGA_REG_RD(regs->phyadr)&
> Same her

Re: [U-Boot] [PATCH V3 5/5] edminiv2: add ethernet support

2010-07-11 Thread Albert ARIBAUD 
Hi Prafulla,

Le 12/07/2010 08:00, Prafulla Wadaskar a écrit :

>> +/*
>> + * Ethernet
>> +  */
>
> Pls remove additional space char here

Done.

>> +#define CONFIG_MV_EGIGA /* Enable Marvell egiga
>> [...]
>> +#define CONFIG_RESET_PHY_R  /* use reset_phy() to init
>> mv8831116 PHY */
>
> Shift above definition below (inside #ifdef CONFIG_CMD_NET), that makes more 
> sense

Done--actually replaced "Ethernet" with "Network" in block comment as 
the whole block is not only about Eth.

Thanks for the feedback.

Any remaining comments on patches 1-4?

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH V3 4/5] mv_egiga: add support for orion5x egiga controller

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Sunday, July 11, 2010 1:32 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 4/5] mv_egiga: add support for 
> orion5x egiga controller
> 
> Add definitions and initialization in orion5x for mv_egiga.
> Add orion5x in mv_egiga SoC includes.
> 
> Signed-off-by: Albert Aribaud 
> ---
>  arch/arm/cpu/arm926ejs/orion5x/cpu.c|8 
>  arch/arm/include/asm/arch-orion5x/orion5x.h |5 +
>  drivers/net/mv_egiga.c  |2 ++
>  3 files changed, 15 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c 
> b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
> index 03c6d06..fc9455e 100644
> --- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c
> +++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
> @@ -268,3 +268,11 @@ int arch_misc_init(void)
>   return 0;
>  }
>  #endif /* CONFIG_ARCH_MISC_INIT */
> +
> +#ifdef CONFIG_MV_EGIGA
> +int cpu_eth_init(bd_t *bis)
> +{
> + mv_egiga_initialize(bis);
> + return 0;
> +}
> +#endif
> diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h 
> b/arch/arm/include/asm/arch-orion5x/orion5x.h
> index 4008c84..6783b74 100644
> --- a/arch/arm/include/asm/arch-orion5x/orion5x.h
> +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
> @@ -56,6 +56,11 @@
>  #define ORION5X_USB20_PORT1_BASE 
> (ORION5X_REGISTER(0xA))
>  #define ORION5X_EGIGA_BASE   
> (ORION5X_REGISTER(0x72000))
>  
> +/* Oron5x has one Marvell egiga controller */
You need to move a macro MAX_KWGBE_DEVS from kirkwood_egiga.h to here, and also 
in kirkwood.h

> +#if defined (CONFIG_MV_EGIGA)
Ifdef not needed, pls remove

> +#define MV_EGIGA0_BASE   
> ORION5X_EGIGA_BASE
> +#endif
> +

Regards..
Prafulla . .
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Re: [U-Boot] [PATCH V3 5/5] edminiv2: add ethernet support

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Sunday, July 11, 2010 1:32 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 5/5] edminiv2: add ethernet support
> 
> Add edminiv2 board support for mv_egiga.
> Add edminiv2 config to enable mv_egiga.
> 
> Signed-off-by: Albert Aribaud 
> ---
>  board/LaCie/edminiv2/edminiv2.c |   36 
> ++
>  board/LaCie/edminiv2/edminiv2.h |   41 
> +++
>  include/configs/edminiv2.h  |   23 -
>  3 files changed, 94 insertions(+), 6 deletions(-)
>  create mode 100644 board/LaCie/edminiv2/edminiv2.h
> 
> diff --git a/board/LaCie/edminiv2/edminiv2.c 
> b/board/LaCie/edminiv2/edminiv2.c
> index 54c0ffe..d46ee4a 100644
> --- a/board/LaCie/edminiv2/edminiv2.c
> +++ b/board/LaCie/edminiv2/edminiv2.c
> @@ -27,6 +27,7 @@
>  #include 
>  #include 
>  #include 
> +#include "edminiv2.h"
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -90,3 +91,38 @@ int board_init(void)
>  
>   return 0;
>  }
> +
> +#if defined (CONFIG_CMD_NET) && defined (CONFIG_RESET_PHY_R)
> +/* Configure and enable MV88E1116 PHY */
> +void reset_phy(void)
> +{
> + u16 reg;
> + u16 devadr;
> + char *name = "egiga0";
> +
> + if (miiphy_set_current_dev(name))
> + return;
> +
> + /* command to read PHY dev address */
> + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
> + printf("Err..%s could not read PHY dev address\n",
> + __FUNCTION__);
> + return;
> + }
> +
> + /*
> +  * Enable RGMII delay on Tx and Rx for CPU port
> +  * Ref: sec 4.7.2 of chip datasheet
> +  */
> + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
> + miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
> + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
> + miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
> + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
> +
> + /* reset the phy */
> + miiphy_reset(name, devadr);
> +
> + printf("88E1116 Initialized on %s\n", name);
> +}
> +#endif /* CONFIG_RESET_PHY_R */
> diff --git a/board/LaCie/edminiv2/edminiv2.h 
> b/board/LaCie/edminiv2/edminiv2.h
> new file mode 100644
> index 000..88e62b2
> --- /dev/null
> +++ b/board/LaCie/edminiv2/edminiv2.h
> @@ -0,0 +1,41 @@
> +/*
> + * (C) Copyright 2009
> + * Net Insight 
> + * Written-by: Simon Kagstrom 
> + *
> + * Based on sheevaplug.h:
> + * (C) Copyright 2009
> + * Marvell Semiconductor 
> + * Written-by: Prafulla Wadaskar 
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef __EDMINIV2_BASE_H
> +#define __EDMINIV2_BASE_H
> +
> +/* PHY related */
> +#define MV88E1116_LED_FCTRL_REG  10
> +#define MV88E1116_CPRSP_CR3_REG  21
> +#define MV88E1116_MAC_CTRL_REG   21
> +#define MV88E1116_PGADR_REG  22
> +#define MV88E1116_RGMII_TXTM_CTRL(1 << 4)
> +#define MV88E1116_RGMII_RXTM_CTRL(1 << 5)
> +
> +#endif /* __EDMINIV2_BASE_H */
> diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
> index c3d95a0..458e313 100644
> --- a/include/configs/edminiv2.h
> +++ b/include/configs/edminiv2.h
> @@ -110,6 +110,15 @@
>  #define CONFIG_SYS_FLASH_SECTSZ \
>   {16384, 8192, 8192, 32768, \
>65536, 65536, 65536, 65536, 65536, 65536, 65536}
> +/*
> + * Ethernet
> +  */

Pls remove additional space char here

> +
> +#define CONFIG_MV_EGIGA  /* Enable Marvell egiga 
> Controller Driver */
> +#define CONFIG_MV_EGIGA_PORTS{1,0}   /* enable port 0 only */
> +#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION  /* don't 
> randomize MAC */
> +#define CONFIG_PHY_BASE_ADR  0x8
> +#define CONFIG_RESET_PHY_R   /* use reset_phy() to init 
> mv8831116 PHY */

Shift above definition below (inside #ifdef CONFIG_CMD_NET), that makes more 
sense

>  
>  /* auto boot */
>  #define CONFIG_BOOTDELAY 3   /* default enable autoboot */
> @@ -131,12 +140,14 @@
>   * Commands configuration - using default command set for now
>   */
>  #inclu

Re: [U-Boot] [PATCH V3 3/5] mv_egiga: CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Sunday, July 11, 2010 1:32 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 3/5] mv_egiga: 
> CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
> 
> Add a configuration option to allow SoCs without random
> generation capability to fill in local MACs with a fixed
> rather than random value
> 
> Signed-off-by: Albert Aribaud 
> ---
>  drivers/net/mv_egiga.c |   10 +-
>  1 files changed, 9 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/net/mv_egiga.c b/drivers/net/mv_egiga.c
> index 4fecf1e..e8315fa 100644
> --- a/drivers/net/mv_egiga.c
> +++ b/drivers/net/mv_egiga.c
> @@ -705,13 +705,21 @@ int mv_egiga_initialize(bd_t * bis)
>   }
>  
>   while (!eth_getenv_enetaddr(s, dev->enetaddr)) {
> - /* Generate Random Private MAC addr if 
> not set */
> + /* Generate Private MAC addr if not set */
>   dev->enetaddr[0] = 0x02;
>   dev->enetaddr[1] = 0x50;
>   dev->enetaddr[2] = 0x43;
> +#if defined (CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION)
> + /* Generate fixed lower MAC half using devnum */
> + dev->enetaddr[3] = 0;
> + dev->enetaddr[4] = 0;
> + dev->enetaddr[5] = devnum;
> +#else
> + /* Generate random lower MAC half */
>   dev->enetaddr[3] = get_random_hex();
>   dev->enetaddr[4] = get_random_hex();
>   dev->enetaddr[5] = get_random_hex();
> +#endif
>   eth_setenv_enetaddr(s, dev->enetaddr);
>   }
>  

This is standalone patch,
Pls make this patch independent on the top of current driver version.
Acked otherwise

Regards..
Prafulla . .

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Re: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other than kirkwood

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Sunday, July 11, 2010 1:32 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other 
> than kirkwood
> 
> Rename all references to kirkwood in mv_egiga symbols
> throughout the whole codebase.
> 
> Signed-off-by: Albert Aribaud 
> ---

Pls break this patch as-
>  arch/arm/cpu/arm926ejs/kirkwood/cpu.c |4 +-
>  arch/arm/include/asm/arch-kirkwood/kirkwood.h |5 +
Kirkwood SOC specific

>  drivers/net/Makefile  |2 +-
>  drivers/net/mv_egiga.c|  322 
> +-
>  drivers/net/mv_egiga.h|  466
>  include/netdev.h  |2 +-
Net: driver specific for net repo
 
> 
>  include/configs/guruplug.h|4 +-
>  include/configs/km_arm.h  |4 +-
>  include/configs/mv88f6281gtw_ge.h |4 +-
>  include/configs/openrd_base.h |4 +-
>  include/configs/rd6281a.h |4 +-
>  include/configs/sheevaplug.h  |4 +-

Board updates
In the same order, so that it is easier to pick them separately by net and 
Marvell repos.

Regards..
Prafulla . .
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Re: [U-Boot] [PATCH] i2c: fix SDA contention in read_byte()

2010-07-11 Thread Thomas Chou 
Reinhard Meyer wrote:
> Its even simpler, provided the  hardware can do open collector. Here was 
> my solution for AVR32AP7000:
> 

Then we could add a config for open drain similar to that of linux driver.

# ifndef I2C_SDA
#  ifdef CONFIG_SOFT_I2C_GPIO_SDA_IS_OPEN_DRAIN
#   define I2C_SDA(bit) gpio_set_value(CONFIG_SOFT_I2C_GPIO_SDA, bit)
#  else
#   define I2C_SDA(bit) \
 if (bit) {\
 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA);\
 } else {\
 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0);\
 }
#  endif
# endif

BTW, will you be interested in using common gpio framework for avr32 family?

Cheers,
Thomas
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Re: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other than kirkwood

2010-07-11 Thread Prafulla Wadaskar 
 

> -Original Message-
> From: u-boot-boun...@lists.denx.de 
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Sunday, July 11, 2010 1:32 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other 
> than kirkwood
> 
> Rename all references to kirkwood in mv_egiga symbols
> throughout the whole codebase.
> 
> Signed-off-by: Albert Aribaud 
> ---
>  arch/arm/cpu/arm926ejs/kirkwood/cpu.c |4 +-
>  arch/arm/include/asm/arch-kirkwood/kirkwood.h |5 +
>  drivers/net/Makefile  |2 +-
>  drivers/net/mv_egiga.c|  322 
> +-
>  drivers/net/mv_egiga.h|  466 
> 
>  include/configs/guruplug.h|4 +-
>  include/configs/km_arm.h  |4 +-
>  include/configs/mv88f6281gtw_ge.h |4 +-
>  include/configs/openrd_base.h |4 +-
>  include/configs/rd6281a.h |4 +-
>  include/configs/sheevaplug.h  |4 +-
>  include/netdev.h  |2 +-
>  12 files changed, 418 insertions(+), 407 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c 
> b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> index 6fc3902..786ffc6 100644
> --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> @@ -378,10 +378,10 @@ int arch_misc_init(void)
>  }
>  #endif /* CONFIG_ARCH_MISC_INIT */
>  
> -#ifdef CONFIG_KIRKWOOD_EGIGA
> +#ifdef CONFIG_MV_EGIGA
>  int cpu_eth_init(bd_t *bis)
>  {
> - kirkwood_egiga_initialize(bis);
> + mv_egiga_initialize(bis);
>   return 0;
>  }
>  #endif
> diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h 
> b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
> index 2470efb..9200605 100644
> --- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
> +++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
> @@ -60,6 +60,11 @@
>  #define KW_EGIGA0_BASE   (KW_REGISTER(0x72000))
>  #define KW_EGIGA1_BASE   (KW_REGISTER(0x76000))
>  
> +#if defined (CONFIG_MV_EGIGA)

I think you don't need ifdef here

> +#define MV_EGIGA0_BASE   KW_EGIGA0_BASE
> +#define MV_EGIGA1_BASE   KW_EGIGA1_BASE
> +#endif
> +
>  #if defined (CONFIG_KW88F6281)
>  #include 
>  #elif defined (CONFIG_KW88F6192)
> diff --git a/drivers/net/Makefile b/drivers/net/Makefile
> index 1599c26..04f8de0 100644
> --- a/drivers/net/Makefile
> +++ b/drivers/net/Makefile
> @@ -52,7 +52,7 @@ COBJS-$(CONFIG_MACB) += macb.o
>  COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
>  COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
>  COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o
> -COBJS-$(CONFIG_KIRKWOOD_EGIGA) += mv_egiga.o
> +COBJS-$(CONFIG_MV_EGIGA) += mv_egiga.o
>  COBJS-$(CONFIG_NATSEMI) += natsemi.o
>  COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o
>  COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o
> diff --git a/drivers/net/mv_egiga.c b/drivers/net/mv_egiga.c
> index b7ecc9d..4fecf1e 100644
> --- a/drivers/net/mv_egiga.c
> +++ b/drivers/net/mv_egiga.c
> @@ -35,13 +35,17 @@
>  #include 
>  #include 
>  #include 
> +
> +#if defined (CONFIG_KIRKWOOD)
>  #include 
> +#endif
> +
>  #include "mv_egiga.h"
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> -#define KIRKWOOD_PHY_ADR_REQUEST 0xee
> -#define KWGBE_SMI_REG (((struct kwgbe_registers 
> *)KW_EGIGA0_BASE)->smi)
> +#define MV_PHY_ADR_REQUEST 0xee
> +#define MV_EGIGA_SMI_REG (((struct mv_egiga_registers 
> *)MV_EGIGA0_BASE)->smi)
>  
>  /*
>   * smi_reg_read - miiphy_read callback function.
> @@ -51,16 +55,16 @@ DECLARE_GLOBAL_DATA_PTR;
>  static int smi_reg_read(char *devname, u8 phy_adr, u8 
> reg_ofs, u16 * data)
>  {
>   struct eth_device *dev = eth_get_dev_by_name(devname);
> - struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
> - struct kwgbe_registers *regs = dkwgbe->regs;
> + struct mv_egiga_device *dmvegiga = to_mv_egiga(dev);
> + struct mv_egiga_registers *regs = dmvegiga->regs;

I suggest to keep name as mvgbe here instead of mv_egiga, 3 additional chars, 
increases overall code size

>   u32 smi_reg;
>   u32 timeout;
>  
>   /* Phyadr read request */
> - if (phy_adr == KIRKWOOD_PHY_ADR_REQUEST &&
> - reg_ofs == KIRKWOOD_PHY_ADR_REQUEST) {
> + if (phy_adr == MV_PHY_ADR_REQUEST &&
> + reg_ofs == MV_PHY_ADR_REQUEST) {
>   /* */
> - *data = (u16) (KWGBEREG_RD(regs->phyadr) & PHYADR_MASK);
> + *data = (u16) (MV_EGIGA_REG_RD(regs->phyadr) & 

Same here, pls use MVGBEREG instead of MV_EGIGA_REG, 4 extra chars

Pls just replace kw/KW by mv/MV to avoide indentation issues

I think these are the only changes in this patch (i.e. find and replace), are 
there any other?

Regards..
Prafulla . .
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Re: [U-Boot] [PATCH] i2c: fix SDA contention in read_byte()

2010-07-11 Thread Reinhard Meyer 
Thomas Chou wrote:
> Reinhard Meyer wrote:
>   
>> Whenever possible by the hardware, I make I2C_SDA/SCL(1) do a tri-state and
>> I2C_TRISTATE and I2C_ACTIVE are empty.
>> 
>
> Dear Mike,
>
> I traced the i2c-gpio.c of linux and realized that there are potential 
> bus contention with the current soft_i2c.c if the ports are not 
> open-drained.
>
> Reinhard suggested a solution, which was similar to what linux driver 
> does. So I would withdraw my SDA patch.
>
> For our i2c gpio framework, I added these changes and tested on my 
> boards. Please check if it works on yours.
>
> # ifndef I2C_ACTIVE
> #  define I2C_ACTIVE do {} while (0)
> # endif
>
> # ifndef I2C_TRISTATE
> #  define I2C_TRISTATE do {} while (0)
> # endif
>
> # ifndef I2C_SDA
> #  define I2C_SDA(bit) \
>   if (bit) {  \
>   gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
>   } else {\
>   gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0);\
>   }
> # endif
>
> I didn't tristate SCL(1) because it cannot be tristated on some nios2 
> boards. As soft_i2c of u-boot didn't support clock stretching, it 
> shouldn't matter.
>   
Its even simpler, provided the  hardware can do open collector. Here was 
my solution for AVR32AP7000:

int board_early_init_f(void)
{
...
#ifdef CONFIG_CMD_I2C
/* set SCL and SDA to open drain gpio */
portmux_select_gpio(PORTMUX_PORT_A,(1

Re: [U-Boot] [PATCH] i2c: fix SDA contention in read_byte()

2010-07-11 Thread Thomas Chou 
Reinhard Meyer wrote:
> Whenever possible by the hardware, I make I2C_SDA/SCL(1) do a tri-state and
> I2C_TRISTATE and I2C_ACTIVE are empty.

Dear Mike,

I traced the i2c-gpio.c of linux and realized that there are potential 
bus contention with the current soft_i2c.c if the ports are not 
open-drained.

Reinhard suggested a solution, which was similar to what linux driver 
does. So I would withdraw my SDA patch.

For our i2c gpio framework, I added these changes and tested on my 
boards. Please check if it works on yours.

# ifndef I2C_ACTIVE
#  define I2C_ACTIVE do {} while (0)
# endif

# ifndef I2C_TRISTATE
#  define I2C_TRISTATE do {} while (0)
# endif

# ifndef I2C_SDA
#  define I2C_SDA(bit) \
if (bit) {  \
gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
} else {\
gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0);\
}
# endif

I didn't tristate SCL(1) because it cannot be tristated on some nios2 
boards. As soft_i2c of u-boot didn't support clock stretching, it 
shouldn't matter.

Best regards,
Thomas
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Re: [U-Boot] [PATCH] i2c: fix SDA contention in read_byte()

2010-07-11 Thread Andrew Dyer 
On Sun, Jul 11, 2010 at 5:55 PM, Mike Frysinger  wrote:
> On Wednesday, July 07, 2010 00:45:42 Andrew Dyer wrote:
>> On Tue, Jul 6, 2010 at 1:14 AM, Thomas Chou  wrote:
>> > We should not set SDA after TRISTATE, as it results in contention.
>> >
>> > Signed-off-by: Thomas Chou 
>> > ---
>> >  drivers/i2c/soft_i2c.c |    2 +-
>> >  1 files changed, 1 insertions(+), 1 deletions(-)
>> >
>> > diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
>> > index 847db76..344b7f8 100644
>> > --- a/drivers/i2c/soft_i2c.c
>> > +++ b/drivers/i2c/soft_i2c.c
>> > @@ -305,8 +305,8 @@ static uchar read_byte(int ack)
>> >        /*
>> >         * Read 8 bits, MSB first.
>> >         */
>> > -       I2C_TRISTATE;
>> >        I2C_SDA(1);
>> > +       I2C_TRISTATE;
>> >        data = 0;
>> >        for(j = 0; j < 8; j++) {
>> >                I2C_SCL(0);
>> > --
>>
>> I2C_TRISTATE is supposed to be persistent until I2C_ACTIVE is called,
>> so in the original code it should still be in effect when I2C_SDA(1)
>> is executed and there should be no contention.  This patch causes the
>> code to actively drive SDA high at the same time the addressed device
>> might be driving it low, causing contention until the I2C_TRISTATE
>> takes effect.
>>
>> In some sense the code is misleadingly written, as it is not allowed
>> in the spec to actively drive a '1' on the bus, a chip is only
>> supposed to drive 'z' or '0', and the platform is supposed to provide
>> the pullup current.  This comes more into play if the i2c bus supports
>> clock stretching or arbitration among multiple masters.
>
> how do you propose we get i2c gpio working ?  it works fine under Linux.  we
> cannot tristate a pin (set the gpio to an input) and then turn around and
> attempt to drive it (set the gpio to an output with a specific value).  that
> is what the code currently does.
>
> our end goal is simple: have i2c gpio bitbanging work under u-boot like under
> linux.  we dont really care about the exact way we get there.  this patch was
> just one idea.
> -mike

If you make sure that I2C_SDA(1)/I2C_SCL(1) makes the pins tristate
and I2C_SDA(0)/I2C_SCL(0) means driven actively low, you can define
I2C_ACTIVE and I2C_TRISTATE as nothing, and it should all work out
right.  The trick is in making sure that the order of operations on
the IO buffer data/enables doesn't cause the output to glitch,
especially on the clock line.
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Re: [U-Boot] [PATCH 1/2] i2c: soft_i2c: add simple GPIO implementation

2010-07-11 Thread Mike Frysinger 
On Monday, July 05, 2010 04:50:08 Mike Frysinger wrote:
> Since the vast majority of GPIO I2C implementations behave the same way,
> support the common GPIO framework with default settings.
> 
> This adds two new defines CONFIG_SOFT_I2C_GPIO_{SCL,SDA} so that boards
> which want GPIO I2C support need only define these.

i guess postpone this until we can get the tristate/sda issues sorted out
-mike


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Re: [U-Boot] [PATCH] i2c: fix SDA contention in read_byte()

2010-07-11 Thread Mike Frysinger 
On Wednesday, July 07, 2010 00:45:42 Andrew Dyer wrote:
> On Tue, Jul 6, 2010 at 1:14 AM, Thomas Chou  wrote:
> > We should not set SDA after TRISTATE, as it results in contention.
> > 
> > Signed-off-by: Thomas Chou 
> > ---
> >  drivers/i2c/soft_i2c.c |2 +-
> >  1 files changed, 1 insertions(+), 1 deletions(-)
> > 
> > diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
> > index 847db76..344b7f8 100644
> > --- a/drivers/i2c/soft_i2c.c
> > +++ b/drivers/i2c/soft_i2c.c
> > @@ -305,8 +305,8 @@ static uchar read_byte(int ack)
> >/*
> > * Read 8 bits, MSB first.
> > */
> > -   I2C_TRISTATE;
> >I2C_SDA(1);
> > +   I2C_TRISTATE;
> >data = 0;
> >for(j = 0; j < 8; j++) {
> >I2C_SCL(0);
> > --
> 
> I2C_TRISTATE is supposed to be persistent until I2C_ACTIVE is called,
> so in the original code it should still be in effect when I2C_SDA(1)
> is executed and there should be no contention.  This patch causes the
> code to actively drive SDA high at the same time the addressed device
> might be driving it low, causing contention until the I2C_TRISTATE
> takes effect.
> 
> In some sense the code is misleadingly written, as it is not allowed
> in the spec to actively drive a '1' on the bus, a chip is only
> supposed to drive 'z' or '0', and the platform is supposed to provide
> the pullup current.  This comes more into play if the i2c bus supports
> clock stretching or arbitration among multiple masters.

how do you propose we get i2c gpio working ?  it works fine under Linux.  we 
cannot tristate a pin (set the gpio to an input) and then turn around and 
attempt to drive it (set the gpio to an output with a specific value).  that 
is what the code currently does.

our end goal is simple: have i2c gpio bitbanging work under u-boot like under 
linux.  we dont really care about the exact way we get there.  this patch was 
just one idea.
-mike


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[U-Boot] [PATCH] powerpc/85xx: Rework P1022 SERDES is_serdes_configured support

2010-07-11 Thread Kumar Gala 
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.

Signed-off-by: Kumar Gala 
---
 arch/powerpc/cpu/mpc85xx/p1022_serdes.c |   38 ++-
 include/configs/P1022DS.h   |1 +
 2 files changed, 28 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c 
b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
index 6b0fbf2..e4c9c22 100644
--- a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
@@ -17,6 +17,8 @@
 #define SRDS1_MAX_LANES4
 #define SRDS2_MAX_LANES2
 
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
[0x00] = {NONE, NONE, NONE, NONE},
[0x01] = {NONE, NONE, NONE, NONE},
@@ -73,26 +75,40 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
+   int ret = (1 << device) & serdes1_prtcl_map;
+
+   if (ret)
+   return ret;
+
+   return (1 << device) & serdes2_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
u32 pordevsr = in_be32(&gur->pordevsr);
u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
MPC85xx_PORDEVSR_IO_SEL_SHIFT;
-   unsigned int i;
+   int lane;
 
-   debug("%s: dev = %d\n", __FUNCTION__, device);
-   debug("PORDEVSR[IO_SEL] = 0x%x\n", srds_cfg);
+   debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
 
if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
-   printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds_cfg);
-   return 0;
+   printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+   return;
+   }
+   for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+   enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
+   serdes1_prtcl_map |= (1 << lane_prtcl);
}
 
-   for (i = 0; i < SRDS1_MAX_LANES; i++) {
-   if (serdes1_cfg_tbl[srds_cfg][i] == device)
-   return 1;
-   if (serdes2_cfg_tbl[srds_cfg][i] == device)
-   return 1;
+   if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+   printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+   return;
}
 
-   return 0;
+   for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+   enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
+   serdes2_prtcl_map |= (1 << lane_prtcl);
+   }
 }
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index e444179..905f730 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -30,6 +30,7 @@
 #define CONFIG_FSL_PCI_INIT/* Use common FSL init code */
 #define CONFIG_FSL_PCIE_RESET  /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
+#define CONFIG_SYS_HAS_SERDES  /* has SERDES */
 
 #define CONFIG_PHYS_64BIT
 #define CONFIG_ENABLE_36BIT_PHYS
-- 
1.6.0.6

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[U-Boot] [PATCH] powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured support

2010-07-11 Thread Kumar Gala 
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.

Signed-off-by: Kumar Gala 
---
 arch/powerpc/cpu/mpc85xx/cpu_init.c   |   12 ++---
 arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c |   66 ++--
 arch/powerpc/include/asm/fsl_serdes.h |1 +
 include/configs/MPC8536DS.h   |1 +
 4 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index d491e2a..5d5b4c2 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -39,10 +39,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_MPC8536
-extern void fsl_serdes_init(void);
-#endif
-
 #ifdef CONFIG_QE
 extern qe_iop_conf_t qe_iop_conf_tab[];
 extern void qe_config_iopin(u8 port, u8 pin, int dir,
@@ -185,9 +181,6 @@ void cpu_init_f (void)
/* Config QE ioports */
config_qe_ioports();
 #endif
-#if defined(CONFIG_MPC8536)
-   fsl_serdes_init();
-#endif
 #if defined(CONFIG_FSL_DMA)
dma_init();
 #endif
@@ -332,6 +325,11 @@ int cpu_init_r(void)
qe_reset();
 #endif
 
+#if defined(CONFIG_SYS_HAS_SERDES)
+   /* needs to be in ram since code uses global static vars */
+   fsl_serdes_init();
+#endif
+
 #if defined(CONFIG_MP)
setup_mp();
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c 
b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
index 7e72f5f..6dadeb8 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
@@ -66,10 +66,11 @@
 #define FSL_SRDSCR3_LANEE_SGMII0x
 #define FSL_SRDSCR3_LANEE_SATA 0x00150005
 
-
 #define SRDS1_MAX_LANES8
 #define SRDS2_MAX_LANES2
 
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
[0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
[0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
@@ -86,39 +87,12 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl device)
 {
-   int i;
-   ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-   u32 pordevsr = in_be32(&gur->pordevsr);
-   u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
-   MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+   int ret = (1 << device) & serdes1_prtcl_map;
 
-   u32 srds2_cfg = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >>
-   GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT;
-
-   debug("%s: dev = %d\n", __FUNCTION__, device);
-   debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
-   debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_cfg);
-
-   if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
-   printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg);
-   return 0;
-   }
-
-   if (srds2_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
-   printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_cfg);
-   return 0;
-   }
-
-   for (i = 0; i < SRDS1_MAX_LANES; i++) {
-   if (serdes1_cfg_tbl[srds1_cfg][i] == device)
-   return 1;
-   }
-   for (i = 0; i < SRDS2_MAX_LANES; i++) {
-   if (serdes2_cfg_tbl[srds2_cfg][i] == device)
-   return 1;
-   }
+   if (ret)
+   return ret;
 
-   return 0;
+   return (1 << device) & serdes2_prtcl_map;
 }
 
 void fsl_serdes_init(void)
@@ -126,13 +100,20 @@ void fsl_serdes_init(void)
void *guts = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
void *sd = (void *)CONFIG_SYS_MPC85xx_SERDES2_ADDR;
u32 pordevsr = in_be32(guts + GUTS_PORDEVSR_OFFS);
-   u32 srds2_io_sel;
+   u32 srds1_io_sel, srds2_io_sel;
u32 tmp;
+   int lane;
+
+   srds1_io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+   MPC85xx_PORDEVSR_IO_SEL_SHIFT;
 
/* parse the SRDS2_IO_SEL of PORDEVSR */
srds2_io_sel = (pordevsr & GUTS_PORDEVSR_SERDES2_IO_SEL)
   >> GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT;
 
+   debug("PORDEVSR[SRDS1_IO_SEL] = %x\n", srds1_io_sel);
+   debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_io_sel);
+
switch (srds2_io_sel) {
case 1: /* Lane A - SATA1, Lane E - SATA2 */
/* CR 0 */
@@ -246,4 +227,23 @@ void fsl_serdes_init(void)
default:
break;
}
+
+   if (srds1_io_sel > ARRAY_SIZE(serdes1_cfg_tbl)) {
+   printf("Invalid PORDEVSR[SRDS1_IO_SEL] = %d\n", srds1_io_sel);
+   return;
+   }
+   for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+   enum srds_prtcl lane_prtcl

Re: [U-Boot] [PATCH v3] fdt: Add function to alloc phandle values

2010-07-11 Thread Kumar Gala 

On Jul 10, 2010, at 1:44 PM, Timur Tabi wrote:

> On Sat, Jul 10, 2010 at 8:25 AM, Kumar Gala  wrote:
>> If we are creating reference (handles) to nodes in a device tree we need
>> to first create a new phandle in node and this needs a new phandle
>> value.  So we search through the whole dtb to find the max phandle value
>> and return the next greater value for a new phandle allocation.
>> 
>> Signed-off-by: Kumar Gala 
> 
> I still think you should merge my fdt_get_max_phandle() function into
> this patch.  The two functions are related and can share code.

I'm replacing fdt_get_max_phandle w/fdt_alloc_phandle in our tree's.  As what 
we are doing is allocating a phandle value.

- k
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[U-Boot] [PATCH V3 5/5] edminiv2: add ethernet support

2010-07-11 Thread Albert Aribaud 
Add edminiv2 board support for mv_egiga.
Add edminiv2 config to enable mv_egiga.

Signed-off-by: Albert Aribaud 
---
 board/LaCie/edminiv2/edminiv2.c |   36 ++
 board/LaCie/edminiv2/edminiv2.h |   41 +++
 include/configs/edminiv2.h  |   23 -
 3 files changed, 94 insertions(+), 6 deletions(-)
 create mode 100644 board/LaCie/edminiv2/edminiv2.h

diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c
index 54c0ffe..d46ee4a 100644
--- a/board/LaCie/edminiv2/edminiv2.c
+++ b/board/LaCie/edminiv2/edminiv2.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include "edminiv2.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -90,3 +91,38 @@ int board_init(void)
 
return 0;
 }
+
+#if defined (CONFIG_CMD_NET) && defined (CONFIG_RESET_PHY_R)
+/* Configure and enable MV88E1116 PHY */
+void reset_phy(void)
+{
+   u16 reg;
+   u16 devadr;
+   char *name = "egiga0";
+
+   if (miiphy_set_current_dev(name))
+   return;
+
+   /* command to read PHY dev address */
+   if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
+   printf("Err..%s could not read PHY dev address\n",
+   __FUNCTION__);
+   return;
+   }
+
+   /*
+* Enable RGMII delay on Tx and Rx for CPU port
+* Ref: sec 4.7.2 of chip datasheet
+*/
+   miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
+   miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
+   reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
+   miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
+   miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
+
+   /* reset the phy */
+   miiphy_reset(name, devadr);
+
+   printf("88E1116 Initialized on %s\n", name);
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/LaCie/edminiv2/edminiv2.h b/board/LaCie/edminiv2/edminiv2.h
new file mode 100644
index 000..88e62b2
--- /dev/null
+++ b/board/LaCie/edminiv2/edminiv2.h
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2009
+ * Net Insight 
+ * Written-by: Simon Kagstrom 
+ *
+ * Based on sheevaplug.h:
+ * (C) Copyright 2009
+ * Marvell Semiconductor 
+ * Written-by: Prafulla Wadaskar 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __EDMINIV2_BASE_H
+#define __EDMINIV2_BASE_H
+
+/* PHY related */
+#define MV88E1116_LED_FCTRL_REG10
+#define MV88E1116_CPRSP_CR3_REG21
+#define MV88E1116_MAC_CTRL_REG 21
+#define MV88E1116_PGADR_REG22
+#define MV88E1116_RGMII_TXTM_CTRL  (1 << 4)
+#define MV88E1116_RGMII_RXTM_CTRL  (1 << 5)
+
+#endif /* __EDMINIV2_BASE_H */
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index c3d95a0..458e313 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -110,6 +110,15 @@
 #define CONFIG_SYS_FLASH_SECTSZ \
{16384, 8192, 8192, 32768, \
 65536, 65536, 65536, 65536, 65536, 65536, 65536}
+/*
+ * Ethernet
+  */
+
+#define CONFIG_MV_EGIGA/* Enable Marvell egiga Controller 
Driver */
+#define CONFIG_MV_EGIGA_PORTS  {1,0}   /* enable port 0 only */
+#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION/* don't randomize MAC */
+#define CONFIG_PHY_BASE_ADR0x8
+#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
 
 /* auto boot */
 #define CONFIG_BOOTDELAY   3   /* default enable autoboot */
@@ -131,12 +140,14 @@
  * Commands configuration - using default command set for now
  */
 #include 
-/*
- * Disabling some default commands for staggered bring-up
- */
-#undef CONFIG_CMD_BOOTD/* no bootd since no net */
-#undef CONFIG_CMD_NET  /* no net since no eth */
-#undef CONFIG_CMD_NFS  /* no NFS since no net */
+
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NETCONSOLE  /* include NetConsole support   */
+#define CONFIG_NET_MULTI   /* specify more that one ports available */
+#defineCONFIG_MII  /* expose smi ove miiphy interface */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN/* detect link using phy */
+#define CONFIG_ENV_OVERWRITE   /* ethaddr can be reprogrammed */
+#en

[U-Boot] [PATCH V3 4/5] mv_egiga: add support for orion5x egiga controller

2010-07-11 Thread Albert Aribaud 
Add definitions and initialization in orion5x for mv_egiga.
Add orion5x in mv_egiga SoC includes.

Signed-off-by: Albert Aribaud 
---
 arch/arm/cpu/arm926ejs/orion5x/cpu.c|8 
 arch/arm/include/asm/arch-orion5x/orion5x.h |5 +
 drivers/net/mv_egiga.c  |2 ++
 3 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c 
b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
index 03c6d06..fc9455e 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
@@ -268,3 +268,11 @@ int arch_misc_init(void)
return 0;
 }
 #endif /* CONFIG_ARCH_MISC_INIT */
+
+#ifdef CONFIG_MV_EGIGA
+int cpu_eth_init(bd_t *bis)
+{
+   mv_egiga_initialize(bis);
+   return 0;
+}
+#endif
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h 
b/arch/arm/include/asm/arch-orion5x/orion5x.h
index 4008c84..6783b74 100644
--- a/arch/arm/include/asm/arch-orion5x/orion5x.h
+++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
@@ -56,6 +56,11 @@
 #define ORION5X_USB20_PORT1_BASE   (ORION5X_REGISTER(0xA))
 #define ORION5X_EGIGA_BASE (ORION5X_REGISTER(0x72000))
 
+/* Oron5x has one Marvell egiga controller */
+#if defined (CONFIG_MV_EGIGA)
+#define MV_EGIGA0_BASE ORION5X_EGIGA_BASE
+#endif
+
 #define CONFIG_MAX_RAM_BANK_SIZE   (64*1024*1024)
 
 /* include here SoC variants. 5181, 5281, 6183 should go here when
diff --git a/drivers/net/mv_egiga.c b/drivers/net/mv_egiga.c
index e8315fa..3401f64 100644
--- a/drivers/net/mv_egiga.c
+++ b/drivers/net/mv_egiga.c
@@ -38,6 +38,8 @@
 
 #if defined (CONFIG_KIRKWOOD)
 #include 
+#elif defined (CONFIG_ORION5X)
+#include 
 #endif
 
 #include "mv_egiga.h"
-- 
1.6.4.4

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[U-Boot] [PATCH V3 3/5] mv_egiga: CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION

2010-07-11 Thread Albert Aribaud 
Add a configuration option to allow SoCs without random
generation capability to fill in local MACs with a fixed
rather than random value

Signed-off-by: Albert Aribaud 
---
 drivers/net/mv_egiga.c |   10 +-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/drivers/net/mv_egiga.c b/drivers/net/mv_egiga.c
index 4fecf1e..e8315fa 100644
--- a/drivers/net/mv_egiga.c
+++ b/drivers/net/mv_egiga.c
@@ -705,13 +705,21 @@ int mv_egiga_initialize(bd_t * bis)
}
 
while (!eth_getenv_enetaddr(s, dev->enetaddr)) {
-   /* Generate Random Private MAC addr if not set */
+   /* Generate Private MAC addr if not set */
dev->enetaddr[0] = 0x02;
dev->enetaddr[1] = 0x50;
dev->enetaddr[2] = 0x43;
+#if defined (CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION)
+   /* Generate fixed lower MAC half using devnum */
+   dev->enetaddr[3] = 0;
+   dev->enetaddr[4] = 0;
+   dev->enetaddr[5] = devnum;
+#else
+   /* Generate random lower MAC half */
dev->enetaddr[3] = get_random_hex();
dev->enetaddr[4] = get_random_hex();
dev->enetaddr[5] = get_random_hex();
+#endif
eth_setenv_enetaddr(s, dev->enetaddr);
}
 
-- 
1.6.4.4

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[U-Boot] [PATCH V3 2/5] mv_egiga: support SoCs other than kirkwood

2010-07-11 Thread Albert Aribaud 
Rename all references to kirkwood in mv_egiga symbols
throughout the whole codebase.

Signed-off-by: Albert Aribaud 
---
 arch/arm/cpu/arm926ejs/kirkwood/cpu.c |4 +-
 arch/arm/include/asm/arch-kirkwood/kirkwood.h |5 +
 drivers/net/Makefile  |2 +-
 drivers/net/mv_egiga.c|  322 +-
 drivers/net/mv_egiga.h|  466 
 include/configs/guruplug.h|4 +-
 include/configs/km_arm.h  |4 +-
 include/configs/mv88f6281gtw_ge.h |4 +-
 include/configs/openrd_base.h |4 +-
 include/configs/rd6281a.h |4 +-
 include/configs/sheevaplug.h  |4 +-
 include/netdev.h  |2 +-
 12 files changed, 418 insertions(+), 407 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c 
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index 6fc3902..786ffc6 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -378,10 +378,10 @@ int arch_misc_init(void)
 }
 #endif /* CONFIG_ARCH_MISC_INIT */
 
-#ifdef CONFIG_KIRKWOOD_EGIGA
+#ifdef CONFIG_MV_EGIGA
 int cpu_eth_init(bd_t *bis)
 {
-   kirkwood_egiga_initialize(bis);
+   mv_egiga_initialize(bis);
return 0;
 }
 #endif
diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h 
b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
index 2470efb..9200605 100644
--- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
+++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
@@ -60,6 +60,11 @@
 #define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
 #define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
 
+#if defined (CONFIG_MV_EGIGA)
+#define MV_EGIGA0_BASE KW_EGIGA0_BASE
+#define MV_EGIGA1_BASE KW_EGIGA1_BASE
+#endif
+
 #if defined (CONFIG_KW88F6281)
 #include 
 #elif defined (CONFIG_KW88F6192)
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 1599c26..04f8de0 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -52,7 +52,7 @@ COBJS-$(CONFIG_MACB) += macb.o
 COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
 COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
 COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o
-COBJS-$(CONFIG_KIRKWOOD_EGIGA) += mv_egiga.o
+COBJS-$(CONFIG_MV_EGIGA) += mv_egiga.o
 COBJS-$(CONFIG_NATSEMI) += natsemi.o
 COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o
 COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o
diff --git a/drivers/net/mv_egiga.c b/drivers/net/mv_egiga.c
index b7ecc9d..4fecf1e 100644
--- a/drivers/net/mv_egiga.c
+++ b/drivers/net/mv_egiga.c
@@ -35,13 +35,17 @@
 #include 
 #include 
 #include 
+
+#if defined (CONFIG_KIRKWOOD)
 #include 
+#endif
+
 #include "mv_egiga.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define KIRKWOOD_PHY_ADR_REQUEST 0xee
-#define KWGBE_SMI_REG (((struct kwgbe_registers *)KW_EGIGA0_BASE)->smi)
+#define MV_PHY_ADR_REQUEST 0xee
+#define MV_EGIGA_SMI_REG (((struct mv_egiga_registers *)MV_EGIGA0_BASE)->smi)
 
 /*
  * smi_reg_read - miiphy_read callback function.
@@ -51,16 +55,16 @@ DECLARE_GLOBAL_DATA_PTR;
 static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
 {
struct eth_device *dev = eth_get_dev_by_name(devname);
-   struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
-   struct kwgbe_registers *regs = dkwgbe->regs;
+   struct mv_egiga_device *dmvegiga = to_mv_egiga(dev);
+   struct mv_egiga_registers *regs = dmvegiga->regs;
u32 smi_reg;
u32 timeout;
 
/* Phyadr read request */
-   if (phy_adr == KIRKWOOD_PHY_ADR_REQUEST &&
-   reg_ofs == KIRKWOOD_PHY_ADR_REQUEST) {
+   if (phy_adr == MV_PHY_ADR_REQUEST &&
+   reg_ofs == MV_PHY_ADR_REQUEST) {
/* */
-   *data = (u16) (KWGBEREG_RD(regs->phyadr) & PHYADR_MASK);
+   *data = (u16) (MV_EGIGA_REG_RD(regs->phyadr) & PHYADR_MASK);
return 0;
}
/* check parameters */
@@ -75,42 +79,42 @@ static int smi_reg_read(char *devname, u8 phy_adr, u8 
reg_ofs, u16 * data)
return -EFAULT;
}
 
-   timeout = KWGBE_PHY_SMI_TIMEOUT;
+   timeout = MV_EGIGA_PHY_SMI_TIMEOUT;
/* wait till the SMI is not busy */
do {
/* read smi register */
-   smi_reg = KWGBEREG_RD(KWGBE_SMI_REG);
+   smi_reg = MV_EGIGA_REG_RD(MV_EGIGA_SMI_REG);
if (timeout-- == 0) {
printf("Err..(%s) SMI busy timeout\n", __FUNCTION__);
return -EFAULT;
}
-   } while (smi_reg & KWGBE_PHY_SMI_BUSY_MASK);
+   } while (smi_reg & MV_EGIGA_PHY_SMI_BUSY_MASK);
 
/* fill the phy address and regiser offset and read opcode */
-   smi_reg = (phy_adr << KWGBE_PHY_SMI_DEV_ADDR_OFFS)
-   | (reg_ofs << KWGBE_SMI_REG

[U-Boot] [PATCH V3 1/5] net: rename: kirkwood_egiga as mv_egiga

2010-07-11 Thread Albert Aribaud 
Rename kirkwood_egiga.* to mv_egiga.* and adjust makefile
and #include accordingly.

Signed-off-by: Albert Aribaud 
---
 drivers/net/Makefile |2 +-
 drivers/net/{kirkwood_egiga.c => mv_egiga.c} |2 +-
 drivers/net/{kirkwood_egiga.h => mv_egiga.h} |0
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename drivers/net/{kirkwood_egiga.c => mv_egiga.c} (99%)
 rename drivers/net/{kirkwood_egiga.h => mv_egiga.h} (100%)

diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index b75c02f..1599c26 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -46,13 +46,13 @@ COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
 COBJS-$(CONFIG_FTMAC100) += ftmac100.o
 COBJS-$(CONFIG_GRETH) += greth.o
 COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o
-COBJS-$(CONFIG_KIRKWOOD_EGIGA) += kirkwood_egiga.o
 COBJS-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o
 COBJS-$(CONFIG_LAN91C96) += lan91c96.o
 COBJS-$(CONFIG_MACB) += macb.o
 COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
 COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
 COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o
+COBJS-$(CONFIG_KIRKWOOD_EGIGA) += mv_egiga.o
 COBJS-$(CONFIG_NATSEMI) += natsemi.o
 COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o
 COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/mv_egiga.c
similarity index 99%
rename from drivers/net/kirkwood_egiga.c
rename to drivers/net/mv_egiga.c
index dca9f11..b7ecc9d 100644
--- a/drivers/net/kirkwood_egiga.c
+++ b/drivers/net/mv_egiga.c
@@ -36,7 +36,7 @@
 #include 
 #include 
 #include 
-#include "kirkwood_egiga.h"
+#include "mv_egiga.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/net/kirkwood_egiga.h b/drivers/net/mv_egiga.h
similarity index 100%
rename from drivers/net/kirkwood_egiga.h
rename to drivers/net/mv_egiga.h
-- 
1.6.4.4

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[U-Boot] [PATCH V3 0/5] Marvell egiga multiple SoC support

2010-07-11 Thread Albert Aribaud 

NOTES

1) This patchset will only apply above a previously posted and
Acked-by patch available on the mailing list archives e.g. at:

("kirkwood_egiga: updates: fix DRAM mapping and typo").

2) This patchset will build for edminiv2 but requires a bugfix
patch, also Acked-by and available on archives as well at e.g.

("kirkwood_egiga: bugfix: add DMA sequence points").

PATCHSET HISTORY

V1: First submission.
V2: Reorganization as per Prafulla Wadasakar's suggestion.
Used -C in format-patch to render renames correctly.
Removal of DRAM patch posted standalone.
Removal of unrelated changes.
V3: Removal of DMA bugfix patch posted standalone
Introduced MAC non-randomization config option
Added short description to each patch

SHORT STORY

This patchset separates egiga from kirkwood then adds orion5x support
in egiga. It has been duly, and successfully, tested on an OpenRD-Client
after each of the four commits and on an EDMini V2 after the last commit.

LONG STORY

This is a set of five atomic commits.

the first commit renames kirkwood_egiga.[ch] to mv_egiga.[ch] in
drivers/net/ (also modifies Makefile) to make sur the renaming
remains visible in git at 100% similarity.

The second commit makes removes all dependency of mv_egiga on kirkwood.
Kirkwood references in all mv_egiga symbols are replaced with mv_egiga
references throughout the source tree.

The third commit allows not to randomize local MAC addresses, which
orion5x needs because it has no documented or known random generator.

The fourth commit adds orion5x support to mv_egiga.

The fifth commit adds edminiv2 support for the orion5x egiga controller.

All commits were tested on a kirkwood-based OpenRD Client for regression
avoidance; the last commit was also tested on an orion5x-based ED Mini V2
for functionality validation.

Albert Aribaud (5):
  net: rename: kirkwood_egiga as mv_egiga
  mv_egiga: support SoCs other than kirkwood
  mv_egiga: CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
  mv_egiga: add support for orion5x egiga controller
  edminiv2: add ethernet support

 arch/arm/cpu/arm926ejs/kirkwood/cpu.c |4 +-
 arch/arm/cpu/arm926ejs/orion5x/cpu.c  |8 +
 arch/arm/include/asm/arch-kirkwood/kirkwood.h |5 +
 arch/arm/include/asm/arch-orion5x/orion5x.h   |5 +
 board/LaCie/edminiv2/edminiv2.c   |   36 ++
 board/LaCie/edminiv2/edminiv2.h   |   41 ++
 drivers/net/Makefile  |2 +-
 drivers/net/kirkwood_egiga.h  |  505 -
 drivers/net/{kirkwood_egiga.c => mv_egiga.c}  |  336 +
 drivers/net/mv_egiga.h|  505 +
 include/configs/edminiv2.h|   23 +-
 include/configs/guruplug.h|4 +-
 include/configs/km_arm.h  |4 +-
 include/configs/mv88f6281gtw_ge.h |4 +-
 include/configs/openrd_base.h |4 +-
 include/configs/rd6281a.h |4 +-
 include/configs/sheevaplug.h  |4 +-
 include/netdev.h  |2 +-
 18 files changed, 809 insertions(+), 687 deletions(-)
 create mode 100644 board/LaCie/edminiv2/edminiv2.h
 delete mode 100644 drivers/net/kirkwood_egiga.h
 rename drivers/net/{kirkwood_egiga.c => mv_egiga.c} (60%)
 create mode 100644 drivers/net/mv_egiga.h

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