Re: [U-Boot] [PATCH v2] NET: move legacy enc28j60.c to sidetrack as enc28j60_lpc2292.c

2010-08-31 Thread Ben Warren
  Hello Reinhard,

On 8/6/2010 9:42 AM, Reinhard Meyer (-VC) wrote:
 This patch is required before the upcoming new enc28j60 driver
 using SPI framework patch can be applied:
 - Move legacy enc28j60.c to enc28j60_lpc2292.c.
 - Change Makefile and the two affected boards' definition files.

 Tested with ./MAKEALL ARM7 that both boards still compile.

 Signed-off-by: Reinhard Meyeri...@emk-elektronik.de
 ---
Applied to net/next

regards,
Ben
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Re: [U-Boot] [PATCH 1/2] UEC: Don't udelay needlessly

2010-08-31 Thread Ben Warren
  Hi Jocke,

On 8/11/2010 2:44 AM, Joakim Tjernlund wrote:
 uec_init() adds an udelay(10) even though
 the PHY status read went well, don't do that.

 Signed-off-by: Joakim Tjernlundjoakim.tjernl...@transmode.se
 ---
   drivers/qe/uec.c |4 +++-
   1 files changed, 3 insertions(+), 1 deletions(-)

 diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
 index ccbf27d..758151f 100644
 --- a/drivers/qe/uec.c
 +++ b/drivers/qe/uec.c
 @@ -1223,8 +1223,10 @@ static int uec_init(struct eth_device* dev, bd_t *bd)
   i = 50;
   do {
   err = curphy-read_status(uec-mii_info);
 + if (!(((i--  0)  !uec-mii_info-link) || err))
 + break;
   udelay(10);
 - } while (((i--  0)  !uec-mii_info-link) || err);
 + } while (1);

   if (err || i= 0)
   printf(warning: %s: timeout on PHY link\n, dev-name);
Parts 1  2 applied to net/next.  Sorry for taking so long.

regards,
Ben
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Re: [U-Boot] [PATCHv2] net: Fix faulty definition of uec_initialize()

2010-08-31 Thread Ben Warren
  Hi Jocke,

On 8/19/2010 12:37 AM, Joakim Tjernlund wrote:
 The correct definition is in drivers/qe/uec.h so just
 remove this one.

 Signed-off-by: Joakim Tjernlundjoakim.tjernl...@transmode.se
 ---
   include/netdev.h |1 -
   1 files changed, 0 insertions(+), 1 deletions(-)

 diff --git a/include/netdev.h b/include/netdev.h
 index 882642a..65833e2 100644
 --- a/include/netdev.h
 +++ b/include/netdev.h
 @@ -83,7 +83,6 @@ int skge_initialize(bd_t *bis);
   int smc911x_initialize(u8 dev_num, int base_addr);
   int smc9_initialize(u8 dev_num, int base_addr);
   int tsi108_eth_initialize(bd_t *bis);
 -int uec_initialize(int index);
   int uec_standard_init(bd_t *bis);
   int uli526x_initialize(bd_t *bis);
   int sh_eth_initialize(bd_t *bis);
Applied to net/next

regards,
Ben
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Re: [U-Boot] [PATCH] display_buffer: fix misaligned buffer

2010-08-31 Thread Reinhard Meyer
Hi,

making the change to the union, I also realized that

/* Copy from memory into linebuf and print hex values */
for (i = 0; i  linelen; i++) {
uint32_t x;
if (width == 4)
x = lb.u32[i] = *(volatile uint32_t *)data;
else if (width == 2)
x = lb.u16[i] = *(volatile uint16_t *)data;
else
x = lb.u8[i] = *(volatile uint8_t *)data;
printf( %0*x, width * 2, x);
data += width;
}

is still a bit ugly. What about:

union data {
u_int32_t *u32;
u_int16_t *u16;
u_int8_t *u8;
void *v;
} dp;
dp.v = data;

then:

/* Copy from memory into linebuf and print hex values */
for (i = 0; i  linelen; i++) {
if (width == 4)
x = lb.u32[i] = *(dp.u32)++;
else if (width == 2)
x = lb.u16[i] = *(dp.u16)++;
else
x = lb.u8[i] = *(dp.u8)++;
printf( %0*x, width * 2, x);
}

optionally calling printf inside the if:

/* Copy from memory into linebuf and print hex values */
for (i = 0; i  linelen; i++) {
if (width == 4)
printf( %08x, lb.u32[i] = *(dp.u32)++);
else if (width == 2)
printf( %04x, lb.u16[i] = *(dp.u16)++);
else
printf( %02x, lb.u8[i] = *(dp.u8)++);
}

maybe it would even be more effective to swap for and if:

/* Copy from memory into linebuf and print hex values */
if (width == 4) {
for (i = 0; i  linelen; i++)
printf( %08x, lb.u32[i] = *(dp.u32)++);
} else if (width == 2) {
for (i = 0; i  linelen; i++)
printf( %04x, lb.u16[i] = *(dp.u16)++);
} else {
for (i = 0; i  linelen; i++)
printf( %02x, lb.u8[i] = *(dp.u8)++);
}

Of course, all is purely cosmetic ;)

Reinhard
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Re: [U-Boot] [RFC][PATCH] mkimage: Add compatibility option for legacy Multi-File images

2010-08-31 Thread Thibaut Girka
Le lundi 30 août 2010 à 11:29 +0200, Detlev Zundel a écrit :
 Hi Thibaut,
Hi,

 generally I'm not a fan to include workarounds for bugs which we do not
 have anymore in mainline U-Boot.

Hm, yeah, I can understand that...

 Isn't there any other alternative for this?

Well, for my use case, we have to workaround this bug.
We can do that (adding a byte at the end of some files) outside of
mkimage, but it's really a u-boot thing, so, it could really go in
there.

 If nobody objects to the genereal principle, then I have some requests
 below.
[...]
 Hm, as I read it, you add 4 bytes (not one) in case the image is already
 padded correctly to 32-bit, correct?  If so, then please correct the
 comment.

Yes, you add one byte to the end of the file itself, and it'll add 4
bytes to the resulting image file.

  It's not really clean, but it shouldn't cause any problem. At least, I 
  haven't
  encountered any using this patch.
[...]
  @@ -586,6 +592,7 @@ usage ()
 -e == set entry point to 'ep' (hex)\n
 -n == set image name to 'name'\n
 -d == use image data from 'datafile'\n
  +  -p == force padding in multi-file images\n
 
 This is no real padding, so please don't make it look like it is.  Maybe
 use q(uirk) as an option character and change the description to
 indicate that this is not a forced padding but a incorrect additional
 32-bit padding to work around an old bug (see man-page).  A fix to
 doc/mkimage.1 which now exists is also mandatory.

Yeah, indeed, it's not really a padding, I'll rephrase the command
option description and document it in mkimage.1.

Regards,
Thibaut Girka.




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[U-Boot] [PATCH v2] display_buffer: fix misaligned buffer

2010-08-31 Thread Reinhard Meyer
use a union to cause necessary alignment per architecture

Signed-off-by: Reinhard Meyer u-b...@emk-elektronik.de
---
 lib/display_options.c |   24 +---
 1 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/lib/display_options.c b/lib/display_options.c
index 20319e6..4f2ad69 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -101,10 +101,12 @@ void print_size(unsigned long long size, const char *s)
 #define DEFAULT_LINE_LENGTH_BYTES (16)
 int print_buffer (ulong addr, void* data, uint width, uint count, uint linelen)
 {
-   uint8_t linebuf[MAX_LINE_LENGTH_BYTES + 1];
-   uint32_t *uip = (void*)linebuf;
-   uint16_t *usp = (void*)linebuf;
-   uint8_t *ucp = (void*)linebuf;
+   /* linebuf as a union causes proper alignment */
+   union linebuf {
+   uint32_t ui[MAX_LINE_LENGTH_BYTES/4 + 1];
+   uint16_t us[MAX_LINE_LENGTH_BYTES/2 + 1];
+   uint8_t  uc[MAX_LINE_LENGTH_BYTES/1 + 1];
+   } lb;
int i;
 
if (linelen*width  MAX_LINE_LENGTH_BYTES)
@@ -123,21 +125,21 @@ int print_buffer (ulong addr, void* data, uint width, 
uint count, uint linelen)
for (i = 0; i  linelen; i++) {
uint32_t x;
if (width == 4)
-   x = uip[i] = *(volatile uint32_t *)data;
+   x = lb.ui[i] = *(volatile uint32_t *)data;
else if (width == 2)
-   x = usp[i] = *(volatile uint16_t *)data;
+   x = lb.us[i] = *(volatile uint16_t *)data;
else
-   x = ucp[i] = *(volatile uint8_t *)data;
+   x = lb.uc[i] = *(volatile uint8_t *)data;
printf( %0*x, width * 2, x);
data += width;
}
 
/* Print data in ASCII characters */
for (i = 0; i  linelen * width; i++)
-   if (!isprint(ucp[i]) || ucp[i] = 0x80)
-   ucp[i] = '.';
-   ucp[i] = '\0';
-   printf(%s\n, ucp);
+   if (!isprint(lb.uc[i]) || lb.uc[i] = 0x80)
+   lb.uc[i] = '.';
+   lb.uc[i] = '\0';
+   printf(%s\n, lb.uc);
 
/* update references */
addr += linelen * width;
-- 
1.5.6.5

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Re: [U-Boot] [PATCH V3] AT91 Fix: return value of get_tbclk

2010-08-31 Thread Reinhard Meyer
Hi,

this patch also fixed BOOTDELAY on AT91:

* Fix: return value of get_tbclk
* this fixes issue with prematurely restart/retry, if BOOT_RETRY_TIMEOUT is used


Signed-off-by: Jens Scharsig js_at...@scharsoft.de
---
 cpu/arm926ejs/at91/timer.c |5 +
 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/cpu/arm926ejs/at91/timer.c b/cpu/arm926ejs/at91/timer.c
index d21eebf..8efc34b 100644
--- a/cpu/arm926ejs/at91/timer.c
+++ b/cpu/arm926ejs/at91/timer.c
@@ -138,8 +138,5 @@ ulong get_timer(ulong base)
  */
 ulong get_tbclk(void)
 {
-   ulong tbclk;
-
-   tbclk = CONFIG_SYS_HZ;
-   return tbclk;
+   return timer_freq;
 }
-- 1.6.0.2 

Applied to u-boot-atmel/next
Thanks,

Reinhard

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Re: [U-Boot] [PATCH] arm, orion5x: fix comilerwarning for edminiv2 board

2010-08-31 Thread Sergei Shtylyov
Hello.

Heiko Schocher wrote:

 compiling edminiv2 board throws following warning:

 Configuring for edminiv2 board...
 In file included from /home/hs/i2c/u-boot-i2c/include/asm/arch/orion5x.h:39,
  from cpu.c:32:

And? Where's the warning text? :-)

 introduced from  commit 4cfa0ab2c945f95e978a995721f193dd056e538d
 Author: Albert Aribaud albert.arib...@free.fr
 Date:   Tue Jul 13 09:04:26 2010 +0200

 orion5x: allow overriding default mappings windows

 This patch fixes this issue.

 Signed-off-by: Heiko Schocher h...@denx.de
 CC: Albert Aribaud albert.arib...@free.fr

WBR, Sergei

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[U-Boot] [PATCH] ppc4xx: Invalidate d-cache when used as init-ram

2010-08-31 Thread Stefan Roese
We need to invalidate the data cache after it has been used as init-ram.

This problem was detected on the lwmon5 update.

Signed-off-by: Stefan Roese s...@denx.de
---
 arch/powerpc/cpu/ppc4xx/start.S |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index 5296dad..4bad32f 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -1459,6 +1459,11 @@ relocate_code:
mtspr   SPRN_DTV3,r6
msync
isync
+
+   /* Invalidate data cache, now no longer our stack */
+   dccci   0,0
+   sync
+   isync
 #endif /* CONFIG_SYS_INIT_RAM_DCACHE */
 
/*
-- 
1.7.2.2

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Re: [U-Boot] [PATCH] arm, orion5x: fix comilerwarning for edminiv2 board

2010-08-31 Thread Heiko Schocher
Hello Sergei,

Sergei Shtylyov wrote:
 Heiko Schocher wrote:
 
 compiling edminiv2 board throws following warning:
 
 Configuring for edminiv2 board...
 In file included from
 /home/hs/i2c/u-boot-i2c/include/asm/arch/orion5x.h:39,
  from cpu.c:32:
 
And? Where's the warning text? :-)

Ups ...

Anyway, it is always fixed, as Prafulla mentioned

Ref: http://lists.denx.de/pipermail/u-boot/2010-August/076253.html

bye,
Heiko
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[U-Boot] Please pull u-boot-samsung/master

2010-08-31 Thread Minkyu Kang
Please pull u-boot-samsung/master
Thanks

The following changes since commit 9efac4a1eb99d9c5539aa6992025eeacab7980c6:
  Wolfgang Denk (1):
Merge branch 'master' of git://git.denx.de/u-boot-samsung

are available in the git repository at:

  git://git.denx.de/u-boot-samsung master

Minkyu Kang (9):
  S5P: mmc: use the standard debug macro
  S5P: Use accessor functions instead of SoC specific defines to access the 
base address
  ARMV7: S5P: make s5p-common for sharing the code between s5pc1xx and 
s5pc2xx
  ARMV7: S5P: rename from s5pc1xx to s5p
  S5P: mmc: fix the mmc offset
  ARMV7: S5P: rename from CONFIG_S5PC1XX to CONFIG_S5P
  ARMV7: S5P: fix the macro at samsung_get_base function
  ARMV7: S5P: separate the peripheral clocks
  ARMV7: S5P: rename the member of gpio structure

 Makefile   |7 +
 arch/arm/cpu/armv7/s5p-common/Makefile |   46 ++
 .../cpu/armv7/{s5pc1xx = s5p-common}/cpu_info.c   |   11 +-
 arch/arm/cpu/armv7/{s5pc1xx = s5p-common}/timer.c |   23 ++--
 arch/arm/cpu/armv7/s5pc1xx/Makefile|2 -
 arch/arm/cpu/armv7/s5pc1xx/clock.c |   51 +--
 arch/arm/cpu/armv7/s5pc1xx/reset.S |2 +-
 arch/arm/cpu/armv7/s5pc1xx/sromc.c |8 +-
 arch/arm/include/asm/arch-s5pc1xx/clk.h|5 +-
 arch/arm/include/asm/arch-s5pc1xx/cpu.h|   39 -
 arch/arm/include/asm/arch-s5pc1xx/gpio.h   |  172 ++--
 arch/arm/include/asm/arch-s5pc1xx/mmc.h|2 +-
 arch/arm/include/asm/arch-s5pc1xx/pwm.h|   12 +-
 board/samsung/goni/goni.c  |8 +-
 board/samsung/goni/lowlevel_init.S |6 +-
 board/samsung/smdkc100/lowlevel_init.S |2 +-
 board/samsung/smdkc100/onenand.c   |3 +-
 board/samsung/smdkc100/smdkc100.c  |4 +-
 common/serial.c|4 +-
 drivers/gpio/Makefile  |2 +-
 drivers/mmc/s5p_mmc.c  |   36 ++---
 drivers/mtd/onenand/samsung.c  |6 +-
 drivers/serial/Makefile|2 +-
 drivers/serial/serial_s5p.c|   10 +-
 include/configs/s5p_goni.h |2 +-
 include/configs/smdkc100.h |2 +-
 include/serial.h   |2 +-
 27 files changed, 274 insertions(+), 195 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/s5p-common/Makefile
 rename arch/arm/cpu/armv7/{s5pc1xx = s5p-common}/cpu_info.c (83%)
 rename arch/arm/cpu/armv7/{s5pc1xx = s5p-common}/timer.c (86%)
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[U-Boot] Hi

2010-08-31 Thread Vaishali Dhakate
Hi ,
I am trying to cross compile some libraries for ARM board
I will port a Linux OS to the hawkboard.
Want to study u-boot specific to this board so I ll be able to do
this. The first chore is to port u-boot on this board.
PLz help me , I was going through the uboot readme which directed me
to straight away mail and share my concern.
Thanks for the help
Regards
Vaishali
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[U-Boot] [PATCH 0/4] cfi_flash: A bit of cleanup and code simplification

2010-08-31 Thread Stefan Roese
Hi,

following are a few patches with minor code clean-up and simplification for 
the cfi_flash driver. Especially the usage of 
CONFIG_SYS_MAX_FLASH_BANKS_DETECT to support dynamic flash bank number 
detection is reworked a bit. Additionally, now the flash base address list can 
be dynamically changed if needed as well.

Here the shortlog:

Stefan Roese (4):
  cfi_flash: Simplify flash_get_info()
  cfi_flash: Add weak default for cfi_flash_bank_addr()
  cfi_flash: Simplify dynamic flash bank number detection
  cfi_flash: Remove uneccessary #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT

 board/esd/apc405/apc405.c   |6 ++
 board/tqc/tqm834x/tqm834x.c |   12 +---
 common/cmd_bootm.c  |1 +
 common/cmd_flash.c  |   10 ++
 common/flash.c  |1 +
 drivers/mtd/cfi_flash.c |   32 +++-
 drivers/mtd/cfi_mtd.c   |   10 +-
 include/configs/APC405.h|6 --
 include/configs/IDS8247.h   |3 +--
 include/configs/TQM834x.h   |4 
 include/flash.h |2 ++
 include/mtd/cfi_flash.h |   18 ++
 12 files changed, 48 insertions(+), 57 deletions(-)

As you can see, these patches touch non-cfi related files too. If nobody 
objects, I'll collect these patches in my cfi-flash repository for the next 
merge window.

Cheers,
Stefan

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[U-Boot] [PATCH 1/4] cfi_flash: Simplify flash_get_info()

2010-08-31 Thread Stefan Roese
This patch removes an unecessary check in the return statement. This is
not needed, since info is initializes to NULL. And info will not be
written to again, if the flash address is not found.

Additionally info is not initialized to 0 but to NULL.

Signed-off-by: Stefan Roese s...@denx.de
---
 drivers/mtd/cfi_flash.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 44ebb9d..b4a09dc 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -153,7 +153,7 @@ u64 flash_read64(void *addr)__attribute__((weak, 
alias(__flash_read64)));
 flash_info_t *flash_get_info(ulong base)
 {
int i;
-   flash_info_t * info = 0;
+   flash_info_t *info = NULL;
 
for (i = 0; i  CONFIG_SYS_MAX_FLASH_BANKS; i++) {
info =  flash_info[i];
@@ -162,7 +162,7 @@ flash_info_t *flash_get_info(ulong base)
break;
}
 
-   return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
+   return info;
 }
 #endif
 
-- 
1.7.2.2

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[U-Boot] [PATCH 2/4] cfi_flash: Add weak default for cfi_flash_bank_addr()

2010-08-31 Thread Stefan Roese
cfi_flash_bank_addr(int bank_nr) returns the base addresses of the
requested bank. Introducing this weak default enables boards to override
this functions with a board specific version when required.

This feature will be used in the lwmon5 board update, supporting runtime
detection of 2 board revisions with different flash layouts.

Signed-off-by: Stefan Roese s...@denx.de
---
 drivers/mtd/cfi_flash.c |   13 +
 1 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index b4a09dc..f10e09e 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -85,6 +85,13 @@ flash_info_t flash_info[CFI_MAX_FLASH_BANKS];/* 
FLASH chips info */
 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
 #endif
 
+static phys_addr_t __cfi_flash_bank_addr(int i)
+{
+   return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
+}
+phys_addr_t cfi_flash_bank_addr(int i)
+   __attribute__((weak, alias(__cfi_flash_bank_addr)));
+
 static void __flash_write8(u8 value, void *addr)
 {
__raw_writeb(value, addr);
@@ -2021,14 +2028,12 @@ unsigned long flash_init (void)
getenv_f(unlock, s, sizeof(s));
 #endif
 
-#define BANK_BASE(i)   (((phys_addr_t 
[CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
-
/* Init: no FLASHes known */
for (i = 0; i  CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
 
-   if (!flash_detect_legacy (BANK_BASE(i), i))
-   flash_get_size (BANK_BASE(i), i);
+   if (!flash_detect_legacy (cfi_flash_bank_addr(i), i))
+   flash_get_size (cfi_flash_bank_addr(i), i);
size += flash_info[i].size;
if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
-- 
1.7.2.2

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[U-Boot] [PATCH 3/4] cfi_flash: Simplify dynamic flash bank number detection

2010-08-31 Thread Stefan Roese
This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board
specific code is minimized. Currently only the following board use
this feature:

APC405, IDS8247, TQM834x

And IDS8247 doesn't seem to really need this feature, since its not
updating the bank number variable at all. So this patch removes the
definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.

This new framework will be used by the upcoming lwmon5 update as well.

Signed-off-by: Stefan Roese s...@denx.de
Cc: Matthias Fuchs matthias.fu...@esd.eu
Cc: Heiko Schocher h...@denx.de
---
 board/esd/apc405/apc405.c   |6 ++
 board/tqc/tqm834x/tqm834x.c |   12 +---
 common/cmd_bootm.c  |1 +
 common/flash.c  |1 +
 drivers/mtd/cfi_flash.c |   15 ---
 include/configs/APC405.h|6 --
 include/configs/IDS8247.h   |3 +--
 include/configs/TQM834x.h   |4 
 include/flash.h |2 ++
 include/mtd/cfi_flash.h |   18 ++
 10 files changed, 34 insertions(+), 34 deletions(-)

diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c
index 564ee00..52477d7 100644
--- a/board/esd/apc405/apc405.c
+++ b/board/esd/apc405/apc405.c
@@ -30,6 +30,7 @@
 #include command.h
 #include malloc.h
 #include flash.h
+#include mtd/cfi_flash.h
 #include asm/4xx_pci.h
 #include pci.h
 
@@ -39,9 +40,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const 
argv[]);
 extern void lxt971_no_sleep(void);
-extern ulong flash_get_size (ulong base, int banknum);
-
-int flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
 
 /* fpga configuration data - gzip compressed and generated by bin2c */
 const unsigned char fpgadata[] =
@@ -185,7 +183,7 @@ int board_early_init_f (void)
 int board_early_init_r(void)
 {
if (gd-board_type = 8)
-   flash_banks = 1;
+   cfi_flash_num_flash_banks = 1;
 
return 0;
 }
diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c
index 8d046f4..2aa97f2 100644
--- a/board/tqc/tqm834x/tqm834x.c
+++ b/board/tqc/tqm834x/tqm834x.c
@@ -30,6 +30,8 @@
 #include miiphy.h
 #include asm/mmu.h
 #include pci.h
+#include flash.h
+#include mtd/cfi_flash.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,12 +54,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define INITIAL_CS_CONFIG  (CSCONFIG_EN | CSCONFIG_ROW_BIT_12 | \
CSCONFIG_COL_BIT_9)
 
-/* Global variable used to store detected number of banks */
-int tqm834x_num_flash_banks;
-
 /* External definitions */
 ulong flash_get_size (ulong base, int banknum);
-extern flash_info_t flash_info[];
 
 /* Local functions */
 static int detect_num_flash_banks(void);
@@ -190,7 +188,7 @@ static int detect_num_flash_banks(void)
ulong bank2_size;
ulong total_size;
 
-   tqm834x_num_flash_banks = 2;/* assume two banks */
+   cfi_flash_num_flash_banks = 2;  /* assume two banks */
 
/* Get bank 1 and 2 information */
bank1_size = flash_get_size(CONFIG_SYS_FLASH_BASE, 0);
@@ -244,13 +242,13 @@ static int detect_num_flash_banks(void)
 * we got the some data reading from Flash.
 * There is only one mirrored bank.
 */
-   tqm834x_num_flash_banks = 1;
+   cfi_flash_num_flash_banks = 1;
total_size = bank1_size;
}
}
}
 
-   debug(Number of flash banks detected: %d\n, tqm834x_num_flash_banks);
+   debug(Number of flash banks detected: %d\n, 
cfi_flash_num_flash_banks);
 
/* set OR0 and BR0 */
set_lbc_or(0, CONFIG_SYS_OR_TIMING_FLASH |
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 4c6ed48..46efd77 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -77,6 +77,7 @@ static int image_info (unsigned long addr);
 
 #if defined(CONFIG_CMD_IMLS)
 #include flash.h
+#include mtd/cfi_flash.h
 extern flash_info_t flash_info[]; /* info for FLASH chips */
 static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 #endif
diff --git a/common/flash.c b/common/flash.c
index 683978e..781cb9c 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -27,6 +27,7 @@
 #include flash.h
 
 #if !defined(CONFIG_SYS_NO_FLASH)
+#include mtd/cfi_flash.h
 
 extern flash_info_t  flash_info[]; /* info for FLASH chips */
 
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index f10e09e..314393f 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -62,20 +62,9 @@
  * reading and writing ... (yes there is such a Hardware).
  */
 
-#ifndef CONFIG_SYS_FLASH_BANKS_LIST
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-#endif
-
 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, 

[U-Boot] [PATCH 4/4] cfi_flash: Remove uneccessary #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT

2010-08-31 Thread Stefan Roese
Now that the defines are moved to header files we don't need this
conditional compilation any more. Remove it.

Signed-off-by: Stefan Roese s...@denx.de
---
 common/cmd_flash.c|   10 ++
 drivers/mtd/cfi_mtd.c |   10 +-
 2 files changed, 3 insertions(+), 17 deletions(-)

diff --git a/common/cmd_flash.c b/common/cmd_flash.c
index ff43965..2a02eb9 100644
--- a/common/cmd_flash.c
+++ b/common/cmd_flash.c
@@ -42,6 +42,8 @@ int find_dev_and_part(const char *id, struct mtd_device **dev,
 #endif
 
 #ifndef CONFIG_SYS_NO_FLASH
+#include flash.h
+#include mtd/cfi_flash.h
 extern flash_info_t flash_info[];  /* info for FLASH chips */
 
 /*
@@ -417,11 +419,7 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
 {
flash_info_t *info;
ulong bank;
-#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
-   int s_first[CONFIG_SYS_MAX_FLASH_BANKS_DETECT], 
s_last[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];
-#else
int s_first[CONFIG_SYS_MAX_FLASH_BANKS], 
s_last[CONFIG_SYS_MAX_FLASH_BANKS];
-#endif
int erased = 0;
int planned;
int rcode = 0;
@@ -635,11 +633,7 @@ int flash_sect_protect (int p, ulong addr_first, ulong 
addr_last)
 {
flash_info_t *info;
ulong bank;
-#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
-   int s_first[CONFIG_SYS_MAX_FLASH_BANKS_DETECT], 
s_last[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];
-#else
int s_first[CONFIG_SYS_MAX_FLASH_BANKS], 
s_last[CONFIG_SYS_MAX_FLASH_BANKS];
-#endif
int protected, i;
int planned;
int rcode;
diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c
index 6a0cab3..cbcc165 100644
--- a/drivers/mtd/cfi_mtd.c
+++ b/drivers/mtd/cfi_mtd.c
@@ -30,15 +30,7 @@
 #include asm/errno.h
 #include linux/mtd/mtd.h
 #include linux/mtd/concat.h
-
-/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
-#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
-# define CFI_MAX_FLASH_BANKS   CONFIG_SYS_MAX_FLASH_BANKS_DETECT
-#else
-# define CFI_MAX_FLASH_BANKS   CONFIG_SYS_MAX_FLASH_BANKS
-#endif
-
-extern flash_info_t flash_info[];
+#include mtd/cfi_flash.h
 
 static struct mtd_info cfi_mtd_info[CFI_MAX_FLASH_BANKS];
 static char cfi_mtd_names[CFI_MAX_FLASH_BANKS][16];
-- 
1.7.2.2

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[U-Boot] [PATCH] cp/cmp: Add WATCHDOG_RESET in copy and compare loop

2010-08-31 Thread Stefan Roese
On some boards with a very short watchdog timeout, the cp and
cmp commands may reset the board. This patch adds some
watchdog resets inside the loops. Otherwise for example the lwmon5
board will reset while doing something like this:

= cp.b fc00 100 10

Signed-off-by: Stefan Roese s...@denx.de
---
 common/cmd_mem.c |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index 44834ea..c426997 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -337,6 +337,10 @@ int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
ngood++;
addr1 += size;
addr2 += size;
+
+   /* reset watchdog from time to time */
+   if ((count % 1000) == 0)
+   WATCHDOG_RESET();
}
 
printf(Total of %ld %s%s were the same\n,
@@ -447,6 +451,10 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
*((u_char *)dest) = *((u_char *)addr);
addr += size;
dest += size;
+
+   /* reset watchdog from time to time */
+   if ((count % 1000) == 0)
+   WATCHDOG_RESET();
}
return 0;
 }
-- 
1.7.2.2

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Re: [U-Boot] [PATCH] cp/cmp: Add WATCHDOG_RESET in copy and compare loop

2010-08-31 Thread Mike Frysinger
On Tuesday, August 31, 2010 07:57:33 Stefan Roese wrote:
 + /* reset watchdog from time to time */
 + if ((count % 1000) == 0)
 + WATCHDOG_RESET();

please pick a number that doesnt involve needing to call libgcc math 
functions.  like 1024.
-mike


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Re: [U-Boot] [PATCH] cp/cmp: Add WATCHDOG_RESET in copy and compare loop

2010-08-31 Thread Stefan Roese
Hi Mike,

On Tuesday 31 August 2010 15:18:03 Mike Frysinger wrote:
 On Tuesday, August 31, 2010 07:57:33 Stefan Roese wrote:
  +   /* reset watchdog from time to time */
  +   if ((count % 1000) == 0)
  +   WATCHDOG_RESET();
 
 please pick a number that doesnt involve needing to call libgcc math
 functions.  like 1024.

Good idea, thanks. Will send an updated version soon.

Cheers,
Stefan

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Re: [U-Boot] [PATCH v5 4/5] mtdparts: add new sub-command spread

2010-08-31 Thread Ben Gardiner
On Mon, Aug 30, 2010 at 5:01 PM, Scott Wood scottw...@freescale.com wrote:
 On Mon, 30 Aug 2010 13:38:59 -0400
 Ben Gardiner bengardi...@nanometrics.ca wrote:

 +static void spread_partition(struct mtd_info *mtd, struct part_info *part,
 +                          uint64_t *next_offset)
 +{
 +     uint64_t net_size, padding_size = 0;
 +     int truncated;
 +
 +     mtd_get_len_incl_bad(mtd, part-offset, part-size, net_size,
 +                          truncated);
 +
 +     /*
 +      * Absorb bad blocks immediately following this
 +      * partition also into the partition, such that
 +      * the next partition starts with a good block.
 +      */

 Why is the first block of a partition special?

This (arbitrary) decision to re-assign the bad-blocks that would
normally be at the start of the next partition to the end of this
partition is carried forward from the design of Harald Welte
lafo...@gnumonks.org from the openmoko u-boot feature [1].

Since the behaviour of the read and write commands (as you well know)
is to skip bad blocks, the same end result of any read or write would
be obtained regardless of whether the bad-blocks were assigned to the
end of this partition or the start of the the next partition -- I
think this is what you are getting at with your question: there is
nothing special about the first block of a partition.

One particular advantage to assigning these bad blocks to the end of
the partitions is that reads and writes on any partitions occurring
later during the execution of u-boot (and of Linux if the same
mtdparts are passed as a boot variable) will not have to skip
immediately past the bad block(s) at the beginning of the partition.

I can easily reverse the behaviour here to keep the bad blocks at the
beginning of the current partition if that is what you would prefer.
But unless you say so I will keep it as-is to preserve the design from
openmoko.

 +     if (!truncated) {
 +             mtd_get_len_incl_bad(mtd, part-offset + net_size,
 +                                  mtd-erasesize, padding_size, 
 truncated);
 +             padding_size -= mtd-erasesize;

 What if this is the last partition?  You're relying on an
 implementation quick (bug?) that mtd_get_len_incl_bad() will let you
 exceed the device size by a block if you start there.  If it returned
 the more expected zero in such a case, you'll end up subtracting a
 block from net_size.

On Mon, Aug 30, 2010 at 5:05 PM, Scott Wood scottw...@freescale.com wrote:
 On Mon, 30 Aug 2010 16:01:05 -0500
 Scott Wood scottw...@freescale.com wrote:
 Grr, s/quick/quirk/

Got it.

You're absolutely right I will add an additional check of the
truncated return value.

Best Regards,
Ben Gardiner

[1] 
http://git.openmoko.org/?p=u-boot.git;a=commitdiff;h=e05835df019027391f58f9d8ce5e1257d6924798

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Re: [U-Boot] [PATCH v5 2/5] mtd: add an mtd method for get_len_incl_bad()

2010-08-31 Thread Ben Gardiner
On Mon, Aug 30, 2010 at 4:57 PM, Scott Wood scottw...@freescale.com wrote:
 On Mon, 30 Aug 2010 13:38:57 -0400
 Ben Gardiner bengardi...@nanometrics.ca wrote:
 +void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,
 +                       const uint64_t length, uint64_t *len_incl_bad,
 +                       int *truncated)
 +{
 +     *truncated = 0;
 +     *len_incl_bad = 0;
 +
 +     if (!mtd-block_isbad) {
 +             *len_incl_bad = length;
 +             return;
 +     }
 +
 +     uint64_t len_excl_bad = 0;
 +     uint64_t block_len;
 +
 +     while (len_excl_bad  length) {
 +             block_len = mtd-erasesize - (offset  (mtd-erasesize - 1));
 +
 +             if (!mtd-block_isbad(mtd, offset  ~(mtd-erasesize - 1)))
 +                     len_excl_bad += block_len;
 +
 +             *len_incl_bad += block_len;
 +             offset       += block_len;
 +
 +             if (offset = mtd-size) {
 +                     *truncated = 1;
 +                     break;
 +             }
 +     }

 If this function is called with offset == mtd-size, you should return
 length zero and truncated, without calling block_isbad().

Good point. Will do.

Best Regards,
Ben Gardiner

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Re: [U-Boot] [PATCH] fdt: call fdt_parent_offset fewer times while translating addresses

2010-08-31 Thread Kumar Gala

On Aug 19, 2010, at 2:02 AM, Kumar Gala wrote:

 From: Scott Wood scottw...@freescale.com
 
 fdt_parent_offset() is an expensive operation, so we'd like to reduce
 unnecessary calls to it.
 
 Further, the practice of iterating up to the root if address/size cells
 aren't found was apparently done for Linux for compatibility with certain
 buggy Open Firmware implementations, and U-Boot inherited the code.  The
 compliant behavior is to treat a missing #address-cells as 2, and a missing
 #size-cells as 1 -- never looking anywhere but the immediate parent of the
 node of interest.
 
 Signed-off-by: Scott Wood scottw...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 
 It also reduces the size of the u-boot image by 216 bytes.
 
 common/fdt_support.c |   58 ++---
 1 files changed, 21 insertions(+), 37 deletions(-)

applied

- k

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Re: [U-Boot] [PATCH v5 3/5] mtdparts: show net size in mtdparts list

2010-08-31 Thread Scott Wood
On Tue, 31 Aug 2010 09:51:15 -0400
Ben Gardiner bengardi...@nanometrics.ca wrote:

 But I'm not sure what I'm supposed to do with this block now since
 Wolfgang Denk w...@denx.de has asked for me to  1) not use a bunch of
 #ifdefs to define the field [1] 2) not introduce changes that increase
 the code size on boards that do not enable this feature [2] ... and
 you have asked me to do the opposite in both cases here.

Sometimes a request seems perfectly reasonable until you see what the
consequences are. :-)

Wolfgang, how do you want this to be handled?

-Scott

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Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw ethernet device

2010-08-31 Thread Cyril Chemparathy
Hi Ben,

[...]
 +COBJS-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
 Please don't use the word DRIVER here.  If possible, use something more
 verbose than CPSW too.

Will TI_CPSW_SWITCH work better considering that CPSW is the name of
the hardware block?

[...]
 +++ b/drivers/net/cpsw.c
 Please rename this ti_cpsw.c
Agreed.

[...]
 +struct cpsw_priv {
 + struct eth_device   *dev;
 + struct cpsw_platform_data   data;
 + int host_port;
 +
 + struct cpsw_regs*regs;
 + void*dma_regs;
 + struct cpsw_host_regs   *host_port_regs;
 + void*ale_regs;
 +
 + struct cpdma_desc   descs[NUM_DESCS];
 + struct cpdma_desc   *desc_free;
 + struct cpdma_chan   rx_chan, tx_chan;
 +
 + struct cpsw_slave   *slaves;
 +#define for_each_slave(priv, func, arg...)   \
 + do {\
 + int idx;\
 + for (idx = 0; idx  (priv)-data.slaves; idx++) \
 + (func)((priv)-slaves + idx, ##arg);\
 + } while (0)
 +};
 +
 
 Can this stuff go in a header file?

This stuff is intended to be private within the driver.  I can split
this out into drivers/net/ti_cpsw.h.

[...]
 diff --git a/include/netdev.h b/include/netdev.h
 index 94eedfe..009e2f1 100644
 --- a/include/netdev.h
 +++ b/include/netdev.h
 @@ -180,4 +180,33 @@ struct mv88e61xx_config {
   int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
   #endif /* CONFIG_MV88E61XX_SWITCH */

 +#ifdef CONFIG_DRIVER_TI_CPSW
 +
 +struct cpsw_slave_data {
 + u32 slave_reg_ofs;
 + u32 sliver_reg_ofs;
 + int phy_id;
 +};
 +
 +struct cpsw_platform_data {
 + u32 mdio_base;
 + u32 cpsw_base;
 + int mdio_div;
 + int channels;   /* number of cpdma channels (symmetric) */
 + u32 cpdma_reg_ofs;  /* cpdma register offset*/
 + int slaves; /* number of slave cpgmac ports */
 + u32 ale_reg_ofs;/* address lookup engine reg offset */
 + int ale_entries;/* ale table size   */
 + u32 host_port_reg_ofs;  /* cpdma host port registers*/
 + u32 hw_stats_reg_ofs;   /* cpsw hw stats counters   */
 + u32 mac_control;
 + struct cpsw_slave_data  *slave_data;
 + void(*control)(int enabled);
 + void(*phy_init)(char *name, int addr);
 +};
 +
 This stuff doesn't belong in this file.  Definitions specific to your
 driver should go in /include/net/ti_cpsw.h (note that you'll be creating
 this directory, but that's where we want driver headers to go moving
 forward.  Also, please call the initialize function
 'ti_cpsw_initialize()'.  Despite what the readme file recommends, you're
 initializing something, not registering it.  If anything, the 'init()'
 functions are misnamed, but that's another discussion.

Will do.

We will post an updated v2 series shortly, with these changes.

Thanks
Cyril.
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Re: [U-Boot] [PATCH 1/7] fix dma for 36bit addressing

2010-08-31 Thread Kumar Gala

On Aug 27, 2010, at 4:25 PM, York Sun wrote:

 Use more bits to support 36-bit addressing
 
 Signed-off-by: York Sun york...@freescale.com
 ---
 drivers/dma/fsl_dma.c |8 ++--
 1 files changed, 6 insertions(+), 2 deletions(-)

applied

- K
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Re: [U-Boot] [PATCH 7/7] Fix parameters to support RDIMM for P2020DS

2010-08-31 Thread Kumar Gala

On Aug 27, 2010, at 4:25 PM, York Sun wrote:

 Signed-off-by: York Sun york...@freescale.com
 ---
 arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c |1 +
 board/freescale/p2020ds/ddr.c|4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

applied

- K
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Re: [U-Boot] [PATCH V3] AT91 Fix: return value of get_tbclk

2010-08-31 Thread Jens Scharsig
Am 2010-08-31 09:36, schrieb Reinhard Meyer:
 Hi,
  }
 -- 1.6.0.2 
 
 Applied to u-boot-atmel/next
 Thanks,
 
 Reinhard
 
What is the reason for the new branch/Custodian Tree u-boot-atmel.

Thanks for more details

Jens
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[U-Boot] Please pull u-boot-mpc85xx.git

2010-08-31 Thread Kumar Gala
The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854:
  Wolfgang Denk (1):
Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master

are available in the git repository at:

  git://git.denx.de/u-boot-mpc85xx master

Kim Phillips (1):
  powerpc/8xxx: share PIC defines among 85xx and 86xx

Kumar Gala (2):
  powerpc/85xx: Rename Security Engine Job Queue to Job Ring to match docs
  powerpc/83xx: Fix build issue with ve8313 board due to lbus changes

Lian Minghuan (1):
  powerpc/85xx: Fix SRIO LAW setup on corenet_ds boards

Matthew McClintock (1):
  mpx85xx/fdt: Add cpu-release-addr for all cores

Scott Wood (1):
  fdt: call fdt_parent_offset fewer times while translating addresses

York Sun (2):
  Fix parameters to support RDIMM for P2020DS
  powerpc/8xxx: Fix dma for 36bit addressing

york (1):
  powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.

 arch/powerpc/cpu/mpc85xx/cpu.c   |2 +-
 arch/powerpc/cpu/mpc85xx/cpu_init.c  |2 +-
 arch/powerpc/cpu/mpc85xx/fdt.c   |   15 
 arch/powerpc/cpu/mpc85xx/interrupts.c|2 +-
 arch/powerpc/cpu/mpc85xx/mp.c|6 ++--
 arch/powerpc/cpu/mpc85xx/p4080_ids.c |8 ++--
 arch/powerpc/cpu/mpc85xx/traps.c |2 +-
 arch/powerpc/cpu/mpc8xxx/cpu.c   |8 +++--
 arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c |1 +
 arch/powerpc/include/asm/fsl_liodn.h |8 ++--
 arch/powerpc/include/asm/immap_85xx.h|   10 ++---
 arch/powerpc/include/asm/immap_86xx.h|9 +++--
 board/freescale/corenet_ds/corenet_ds.c  |   47 +---
 board/freescale/corenet_ds/ddr.c |   18 +-
 board/freescale/p2020ds/ddr.c|4 +-
 board/ve8313/ve8313.c|2 +-
 common/fdt_support.c |   58 +++---
 drivers/dma/fsl_dma.c|8 +++-
 include/configs/corenet_ds.h |2 +-
 include/configs/ve8313.h |1 +
 20 files changed, 113 insertions(+), 100 deletions(-)
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[U-Boot] [PATCH] zlib: Add further watchdog reset calls

2010-08-31 Thread Stefan Roese
Patch 253cb831 [zlib: add watchdog reset call] added already a few
watchdog reset calls to the new zlib U-Boot port. But on some boards
this is not enough. Additional calls are needed on boards with
short watchdog timeouts.

This was detected and tested on the lwmon5 board with a very short
watchdog timeout. Without this patch, the board resets during Linux
kernel decompression. With it, the decompression succeeds.

Signed-off-by: Stefan Roese s...@denx.de
---
 lib/zlib.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/lib/zlib.c b/lib/zlib.c
index 26e5af1..39d5dab 100644
--- a/lib/zlib.c
+++ b/lib/zlib.c
@@ -1599,6 +1599,8 @@ int flush;
 strm-adler = state-check = adler32(0L, Z_NULL, 0);
 state-mode = TYPE;
 case TYPE:
+   if (strm-outcb != Z_NULL)
+   (*strm-outcb)(Z_NULL, 0); /* call WATCHDOG_RESET */
 if (flush == Z_BLOCK) goto inf_leave;
 case TYPEDO:
 if (state-last) {
-- 
1.7.2.2

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Re: [U-Boot] Debugging, Why USB is not stable

2010-08-31 Thread Remy Bohmer
Hi Detlev,

2010/8/30 Detlev Zundel d...@denx.de:
 Hi Gérald,

 I have some few problems with usb start / reset commands on last uboot.

 USB hard drive are not always detected.

 Is there something I missed ?

 Only the fact that USB is a nightmare to work with.  No, honestly, we
 have a continuous stream of USB related problems with the current USB
 code.

This is not what I notice on the amount of fixes that are posted on the list...
The only fixes I have seen the last year or two were related to newly
added host-controller support. Apart from that it is quite silent in
the u-boot-usb tree...
But, anyway. I know it has some stability issues, although it is now
much better compared to a year ago...

 As I understand it this results from the ever more diverging USB
 implementation in U-Boot and e.g. in the Linux kernel.

Indeed, It has diverged that much that I did not succeed in finding
the real origin of the code...

 Sometimes I get the impression that we would save a lot of headache by
 starting afresh and porting the current Linux code into U-Boot thus
 leverage all this, but nobody yet dared to start such a feat.

Hey... I have dared to start it!
(But it is a real pain to do it properly, and I stopped half way due
to lack of time...)

Kind regards,

Remy
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[U-Boot] [PATCH] usb: fix usb start problem with SMSC USB hub and Toshiba USB stick

2010-08-31 Thread Anatolij Gustschin
Checking the status field of the qTD token in the current code
do not take into acount cases where endpoint stall (halted) bit
is set together with some other status bits. As a result clearing
stall on an endpoint won't be done if other status bits were set.

E.g. 'usb start' often fails with Toshiba USB stick 0x930/0x6545
connected to the SMSC USB 2.0 hub 0x424/0x2514. Debugging the
issue showed that while bulk IN transfers with length of 13 or
18 the status field of the qTD token sometimes indicates trans-
action error (XactErr) and sometimes additionally endpoint halted
state. In the latter case resetting the USB device in error
recovery code fails as no clear stall request on the endpoint
will be done. The patch fixes status field checking code to
properly handle endpoint halted state.

However this fix is not enough to solve 'usb start' problem
with hub/stick combination mentioned above. Running with lot of
debug code in ehci_submit_async() I've never seen the problem
with usb stick recognition. After removing this debug code the
similar problem sometimes showed up again. Therefore the patch
also adds delay in ehci_submit_async() for above-mentioned
hub/stick combination. Even without this delay the fix is an
improvement since it fixes the problem with board freezy after
subsequent failed 'usb start/stop' cycles as it was observed
on mpc5121ads board.

Signed-off-by: Anatolij Gustschin ag...@denx.de
---
 common/usb_storage.c|5 +++--
 drivers/usb/host/ehci-hcd.c |8 
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index 76949b8..5ca92c3 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -680,7 +680,8 @@ int usb_stor_BBB_transport(ccb *srb, struct us_data *us)
result = usb_bulk_msg(us-pusb_dev, pipe, srb-pdata, srb-datalen,
  data_actlen, USB_CNTL_TIMEOUT * 5);
/* special handling of STALL in DATA phase */
-   if ((result  0)  (us-pusb_dev-status  USB_ST_STALLED)) {
+   if ((result  0) 
+   (us-pusb_dev-status  (USB_ST_STALLED | USB_ST_CRC_ERR))) {
USB_STOR_PRINTF(DATA:stall\n);
/* clear the STALL on the endpoint */
result = usb_stor_BBB_clear_endpt_stall(us,
@@ -710,7 +711,7 @@ again:
 
/* special handling of STALL in STATUS phase */
if ((result  0)  (retry  1) 
-   (us-pusb_dev-status  USB_ST_STALLED)) {
+   (us-pusb_dev-status  (USB_ST_STALLED | USB_ST_CRC_ERR))) {
USB_STOR_PRINTF(STATUS:stall\n);
/* clear the STALL on the endpoint */
result = usb_stor_BBB_clear_endpt_stall(us, us-ep_in);
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 37d056e..7463a75 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -430,6 +430,12 @@ ehci_submit_async(struct usb_device *dev, unsigned long 
pipe, void *buffer,
usbsts = ehci_readl(hcor-or_usbsts);
ehci_writel(hcor-or_usbsts, (usbsts  0x3f));
 
+   if (dev-descriptor.idVendor == 0x930 
+   dev-descriptor.idProduct == 0x6545 
+   dev-parent-descriptor.idVendor == 0x424 
+   dev-parent-descriptor.idProduct == 0x2514)
+   wait_ms(10);
+
/* Enable async. schedule. */
cmd = ehci_readl(hcor-or_usbcmd);
cmd |= CMD_ASE;
@@ -490,6 +496,8 @@ ehci_submit_async(struct usb_device *dev, unsigned long 
pipe, void *buffer,
break;
default:
dev-status = USB_ST_CRC_ERR;
+   if ((token  0x40) == 0x40)
+   dev-status |= USB_ST_STALLED;
break;
}
dev-act_len = length - ((token  16)  0x7fff);
-- 
1.7.0.4

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[U-Boot] [PATCH] [v2] mpc8610: refactor DIU initialization code to use existing bitmap and logo features

2010-08-31 Thread Timur Tabi
The Freescale MPC8610 DIU code had re-implement two features that already
existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO).
So delete the 8610-specific code and use the built-in features instead.

Signed-off-by: Timur Tabi ti...@freescale.com
---

This patch depends on the patch, logos: add Freescale logo

 board/freescale/common/fsl_diu_fb.c   |  132 +
 board/freescale/common/fsl_diu_fb.h   |   12 +--
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |6 +-
 board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c |   44 +---
 include/configs/MPC8610HPCD.h |7 +-
 5 files changed, 15 insertions(+), 186 deletions(-)

diff --git a/board/freescale/common/fsl_diu_fb.c 
b/board/freescale/common/fsl_diu_fb.c
index e740ad8..394b71f 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -208,10 +208,7 @@ static int fsl_diu_disable_panel(struct fb_info *info);
 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
 void diu_set_pixel_clock(unsigned int pixclock);
 
-int fsl_diu_init(int xres,
-unsigned int pixel_format,
-int gamma_fix,
-unsigned char *splash_bmp)
+int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix)
 {
struct fb_videomode *fsl_diu_mode_db;
struct diu_ad *ad = fsl_diu_fb_ad;
@@ -288,8 +285,6 @@ int fsl_diu_init(int xres,
var-sync = fsl_diu_mode_db-sync;
var-vmode = fsl_diu_mode_db-vmode;
info-line_length = var-xres * var-bits_per_pixel / 8;
-   info-logo_size = 0;
-   info-logo_height = 0;
 
ad-pix_fmt = pixel_format;
ad-addr= cpu_to_le32((unsigned int)info-screen_base);
@@ -358,13 +353,6 @@ int fsl_diu_init(int xres,
 
fb_initialized = 1;
 
-   if (splash_bmp) {
-   info-logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0);
-   info-logo_size = info-logo_height * info-line_length;
-   debug(logo height %d, logo_size 0x%x\n,
-   info-logo_height,info-logo_size);
-   }
-
/* Enable the DIU */
fsl_diu_enable_panel(info);
enable_lcdc();
@@ -375,8 +363,7 @@ int fsl_diu_init(int xres,
 char *fsl_fb_open(struct fb_info **info)
 {
*info = fsl_fb_info;
-   return (char *) ((unsigned int)(*info)-screen_base
-+ (*info)-logo_size);
+   return fsl_fb_info.screen_base;
 }
 
 void fsl_diu_close(void)
@@ -485,118 +472,3 @@ static int allocate_buf(struct diu_addr *buf, u32 size, 
u32 bytes_align)
buf-offset = 0;
return 0;
 }
-
-int fsl_diu_display_bmp(unsigned char *bmp,
-   int xoffset,
-   int yoffset,
-   int transpar)
-{
-   struct fb_info *info = fsl_fb_info;
-   unsigned char r, g, b;
-   unsigned int *fb_t, val;
-   unsigned char *bitmap;
-   unsigned int palette[256];
-   int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp;
-
-   if (!bmp) {
-   printf(Must supply a bitmap address\n);
-   return 0;
-   }
-
-   raster = bmp[10] + (bmp[11]  8) + (bmp[12]  16) + (bmp[13]  24);
-   width  = (bmp[21]  24) | (bmp[20]  16) | (bmp[19]  8) | bmp[18];
-   height = (bmp[25]  24) | (bmp[24]  16) | (bmp[23]  8) | bmp[22];
-   bpp  = (bmp[29]   8) | (bmp[28]);
-   ncolors = bmp[46] + (bmp[47]  8) + (bmp[48]  16) + (bmp[49]  24);
-   bitmap   = bmp + raster;
-   cpp = info-var.bits_per_pixel / 8;
-
-   debug(bmp = 0x%08x\n, (unsigned int)bmp);
-   debug(bitmap = 0x%08x\n, (unsigned int)bitmap);
-   debug(width = %d\n, width);
-   debug(height = %d\n, height);
-   debug(bpp = %d\n, bpp);
-   debug(ncolors = %d\n, ncolors);
-
-   debug(xres = %d\n, info-var.xres);
-   debug(yres = %d\n, info-var.yres);
-   debug(Screen_base = 0x%x\n, (unsigned int)info-screen_base);
-
-   if (((width+xoffset)  info-var.xres) ||
-   ((height+yoffset)  info-var.yres)) {
-   printf(bitmap is out of range, image too large or too much 
offset\n);
-   return 0;
-   }
-   if (bpp  24) {
-   for (i = 0, offset = 54; i  ncolors; i++, offset += 4)
-   palette[i] = (bmp[offset+2]  16)
-   + (bmp[offset+1]  8) + bmp[offset];
-   }
-
-   switch (bpp) {
-   case 1:
-   for (y = height - 1; y = 0; y--) {
-   fb_t = (unsigned int *) ((unsigned 
int)info-screen_base + (((y+yoffset) * info-var.xres) + xoffset)*cpp);
-   for (x = 0; x  width; x += 8) {
-   b = *bitmap++;
-   for (k = 0; k  8; k++) {
-   if (b  0x80)
-   *fb_t++ = palette[1];
-

Re: [U-Boot] [PATCH 1/5] nand util: read/write: accept unaligned length

2010-08-31 Thread Ben Gardiner
On Mon, Aug 30, 2010 at 7:03 PM, Scott Wood scottw...@freescale.com wrote:
 The underlying code in nand_base.c already supports non-page-aligned reads
 and writes, but the block-skipping wrapper code did not.

 With block skipping, an unaligned start address is not useful since you
 really want to be starting at the beginning of a partition -- or at least
 that's where you want to start checking for blocks to skip, but we don't
 (yet) support that.  So we still require the start address to be aligned.

 An unaligned length, though, is useful for passing $filesize to the
 read/write command, and handling it does not complicate block skipping.

This is a great feature.

 Signed-off-by: Scott Wood scottw...@freescale.com

applies  to 962ad59e25640e586e2bceabf67a628a27f8f508 of
git://git.denx.de/u-boot.git -- some checkpatch errors.

Tested on da850evm_config with NAND enabled;

Tested-by: Ben Gardiner bengardi...@nanometrics.ca

  /**
 @@ -474,29 +487,41 @@ int nand_write_skip_bad(nand_info_t *nand, loff_t 
 offset, size_t *length,
  {
        int rval;
        size_t left_to_write = *length;
 -       size_t len_incl_bad;
        u_char *p_buffer = buffer;
 +       int need_skip;

 -       /* Reject writes, which are not page aligned */
 -       if ((offset  (nand-writesize - 1)) != 0 ||
 -           (*length  (nand-writesize - 1)) != 0) {
 +       /*
 +        * nand_write() handles unaligned, partial page writes.
 +        *
 +        * We allow length to be unaligned, for convenience in
 +        * using the $filesize variable.
 +        *
 +        * However, starting at an unaligned offset makes the
 +        * semantics of bad block skipping ambiguous (really,
 +        * you should only start a block skipping access at a
 +        * partition boundary).  So don't try to handle that.
 +        */
 +       if ((offset  (nand-writesize - 1)) != 0) {
                printf (Attempt to write non page aligned data\n);
 +               *length = 0;
                return -EINVAL;
        }

 -       len_incl_bad = get_len_incl_bad (nand, offset, *length);
 -
 -       if ((offset + len_incl_bad)  nand-size) {
 +       need_skip = check_skip_len(nand, offset, *length);
 +       if (need_skip  0) {
                printf (Attempt to write outside the flash area\n);
 +               *length = 0;
                return -EINVAL;
        }

 -       if (len_incl_bad == *length) {
 +       if (!need_skip) {
                rval = nand_write (nand, offset, length, buffer);
 -               if (rval != 0)
 -                       printf (NAND write to offset %llx failed %d\n,
 -                               offset, rval);
 +               if (rval == 0)
 +                       return 0;

 +               *length = 0;
 +               printf (NAND write to offset %llx failed %d\n,

no space between printf and the open parenthesis.

 +                       offset, rval);
                return rval;
        }

 @@ -553,20 +578,28 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t 
 offset, size_t *length,
  {
        int rval;
        size_t left_to_read = *length;
 -       size_t len_incl_bad;
        u_char *p_buffer = buffer;
 +       int need_skip;

 -       len_incl_bad = get_len_incl_bad (nand, offset, *length);
 +       if ((offset  (nand-writesize - 1)) != 0) {
 +               printf (Attempt to read non page aligned data\n);

no space between the printf and open parenthesis.

Best Regards,
Ben Gardiner

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Re: [U-Boot] [PATCH 5/5] nand: remove dead code and suspend/resume

2010-08-31 Thread Ben Gardiner
On Mon, Aug 30, 2010 at 7:03 PM, Scott Wood scottw...@freescale.com wrote:
 Get rid of the several #if 0 sections that were keeping around Linux
 code that isn't relevant to U-Boot.  Besides cluttering the code, these
 sections make tracking upstream changes harder, rather than easier.
 It's easy to discard obviously irrelevant diff hunks that patch rejects,
 but it's not as easy to notice hunks that apply cleanly to the #if 0
 section, but *are* relevant to U-Boot and require modification elsewhere.

 Also remove suspend/resume, as this is not applicable to U-Boot.  Removal
 saves 232 bytes on powerpc.

 Signed-off-by: Scott Wood scottw...@freescale.com

applies cleanly to 962ad59e25640e586e2bceabf67a628a27f8f508 of
git://git.denx.de/u-boot.git

Tested on da850evm_config with NAND enabled;

Tested-by: Ben Gardiner bengardi...@nanometrics.ca

Best Regards,
Ben Gardiner

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Re: [U-Boot] [PATCH 2/5] cmd_nand: some infrastructure fixes and refactoring

2010-08-31 Thread Ben Gardiner
On Mon, Aug 30, 2010 at 7:03 PM, Scott Wood scottw...@freescale.com wrote:
 - If the current device is overridden by a named partition,
  - update the caller's pointer/index, rather than copy over the
    nand_info struct, and
  - be sure to call board_nand_select_device even when the device
    is overridden by a named partition.
 - Support 64-bit offsets/sizes in a few more places.
 - Refactor arg_off_size for added readability and flexibility,
  and some added checks such as partition size.
 - Remove redundant check for bad subcommands -- if there's no match
  it'll print usage when it gets to the end anyway.

 Signed-off-by: Scott Wood scottw...@freescale.com

applies cleanly to 962ad59e25640e586e2bceabf67a628a27f8f508 of
git://git.denx.de/u-boot.git

Tested on da850evm_config with NAND enabled;

Tested-by: Ben Gardiner bengardi...@nanometrics.ca

Best Regards,
Ben Gardiner

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Re: [U-Boot] [PATCH 3/5] nand erase: .spread, .part, .chip subcommands

2010-08-31 Thread Ben Gardiner
On Mon, Aug 30, 2010 at 7:03 PM, Scott Wood scottw...@freescale.com wrote:
 A while back, in http://lists.denx.de/pipermail/u-boot/2009-June/054428.html,
 Michele De Candia posted a patch to not count bad blocks toward the
 requested size to be erased.  This is desireable when you're passing in
 something like $filesize, but not when you're trying to erase a partition.

 Thus, a .spread subcommand (named for consistency with
 http://lists.denx.de/pipermail/u-boot/2010-August/075163.html) is introduced
 to make explicit the user's desire to erase for a given amount of data,
 rather than to erase a specific region of the chip.

I'm flattered that you have chosen to use '.spread'

 While passing $filesize to nand erase is useful, accidentally passing
 something like $fliesize currently produces quite unpleasant results, as the
 variable evaluates to nothing and U-Boot assumes that you want to erase
 the entire rest of the chip/partition.  To improve the safety of the
 erase command, require the user to make explicit their intentions by
 using a .part or .chip subcommand.  This is an incompatible user interface
 change, but keeping compatibility would eliminate the safety gain, and IMHO
 it's worth it.

Agreed. It also makes the arguments expected by the nand erase
variants easier to understand for new users.

 While touching nand_erase_opts(), make it accept 64-bit offsets and sizes,
 fix the percentage display when erase length is rounded up, eliminate
 an inconsistent warning about rounding up the erase length which only
 happened when the length was less than one block (rounding up for $filesize
 is normal operation), and add a diagnostic if there's an attempt to erase
 beginning at a non-block boundary.

 Signed-off-by: Scott Wood scottw...@freescale.com

applies to 962ad59e25640e586e2bceabf67a628a27f8f508 of
git://git.denx.de/u-boot.git -- one checkpatch error

Tested on da850evm_config with NAND enabled;

Tested-by: Ben Gardiner bengardi...@nanometrics.ca

 @@ -84,13 +84,19 @@ int nand_erase_opts(nand_info_t *meminfo, const 
 nand_erase_options_t *opts)
        struct mtd_oob_ops oob_opts;
        struct nand_chip *chip = meminfo-priv;

 +       if ((opts-offset  (meminfo-writesize - 1)) != 0) {
 +               printf(Attempt to erase non page aligned data\n);
 +               return -1;
 +       }
 +
        memset(erase, 0, sizeof(erase));
        memset(oob_opts, 0, sizeof(oob_opts));

        erase.mtd = meminfo;
        erase.len  = meminfo-erasesize;
        erase.addr = opts-offset;
 -       erase_length = opts-length;
 +       erase_length = lldiv(opts-length + meminfo-erasesize - 1,
 +                            meminfo-erasesize);

checkpatch is complaining:
error: checkpatch: code indent should use tabs where possible
drivers/mtd/nand/nand_util.c:99:1:
+^I meminfo-erasesize);$


Best Regards,
Ben Gardiner

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[U-Boot] [PATCH v6 4/5] mtdparts: add new sub-command spread

2010-08-31 Thread Ben Gardiner
This patch introduces the 'spread' sub-command of the mtdparts command.
This command will modify the existing mtdparts variable by increasing
the size of the partitions such that 1) each partition's net size is at
least as large as the size specified in the mtdparts variable and 2)
each partition starts on a good block.

The new subcommand is implemented by iterating over the mtd device
partitions and collecting a bad blocks count in each -- including any
trailing bad blocks -- and then modifying that partitions's part_info
structure and checking if the modification affects the next partition.

This patch is based on a port of the 'dynnamic partitions' feature by
Harald Welte lafo...@gnumonks.org; ported from commit
e05835df019027391f58f9d8ce5e1257d6924798 of
git://git.openmoko.org/u-boot.git. Whereas Harald's feature used a
compile-time array to specify partitions, the feature introduced by
this patch uses the mtdparts environment variable.

Signed-off-by: Ben Gardiner bengardi...@nanometrics.ca
Signed-off-by: Harald Welte lafo...@gnumonks.org
CC: Wolfgang Denk w...@denx.de
CC: Scott Wood scottw...@freescale.com

---

V2:
 * formatting: spaces after 'if' and 'for'
 * trailing whitespace removed
 * check for null mtd-block_isbad before dereferencing

V3:
 * rebased to 54841ab50c20d6fa6c9cc3eb826989da3a22d934 of
   git://git.denx.de/u-boot.git
 * fix more checkpatch errors
 * update copyright statement of cmd_mtdparts.c to include openmoko's
   copyright of the 'dynamic partitions' functionality using commit
   e05835df019027391f58f9d8ce5e1257d6924798 of
   git://git.openmoko.org/u-boot.git as reference.

V4:
 * rebased to b417260d871d4d8d336c160d95ed40cc8c0fb0fa of
   git://git.denx.de/u-boot.git
 * fixed multi-line comment style
 * removed changelog and my (C) from file header
 * added source of port to the commit message
 * fixed multi-line comment style
 * indentation only by tabs

V5:
 * rebased to 962ad59e25640e586e2bceabf67a628a27f8f508 of
   git://git.denx.de/u-boot.git
 * renumbered from 3/4 to 4/5
 * use uint64_t for net_size
 * don't push dangling lines to the right
 * offsets to uint64_t
 * fix spelling errors in comments
 * more hanging arguments alignment
 * refactor the spread_partition function so that it delegates the
   bad-block counting to the mtd_get_len_incl_bad function -- as per
   Scott Woods' suggestion.

V6:
 * check truncated return value to handle trying to absorb bad blocks
   past the end of the device -- as per Scott Wood's review comments

---
 common/cmd_mtdparts.c |  113 -
 1 files changed, 112 insertions(+), 1 deletions(-)

diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index 266844f..347e409 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -15,6 +15,9 @@
  *   Parsing routines are based on driver/mtd/cmdline.c from the linux 2.4
  *   kernel tree.
  *
+ * (C) Copyright 2008
+ * Harald Welte, OpenMoko, Inc., Harald Welte lafo...@openmoko.org
+ *
  *   $Id: cmdlinepart.c,v 1.17 2004/11/26 11:18:47 lavinen Exp $
  *   Copyright 2002 SYSGO Real-Time Solutions GmbH
  *
@@ -1424,6 +1427,101 @@ static int delete_partition(const char *id)
return 1;
 }
 
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+/**
+ * Increase the size of the given partition so that it's net size is at least
+ * as large as the size member and such that the next partition would start on 
a
+ * good block if it were adjacent to this partition.
+ *
+ * @param mtd the mtd device
+ * @param part the partition
+ * @param next_offset pointer to the offset of the next partition after this
+ *partition's size has been modified (output)
+ */
+static void spread_partition(struct mtd_info *mtd, struct part_info *part,
+uint64_t *next_offset)
+{
+   uint64_t net_size, padding_size = 0;
+   int truncated;
+
+   mtd_get_len_incl_bad(mtd, part-offset, part-size, net_size,
+truncated);
+
+   /*
+* Absorb bad blocks immediately following this
+* partition also into the partition, such that
+* the next partition starts with a good block.
+*/
+   if (!truncated) {
+   mtd_get_len_incl_bad(mtd, part-offset + net_size,
+mtd-erasesize, padding_size, truncated);
+   if (truncated)
+   padding_size = 0;
+   else
+   padding_size -= mtd-erasesize;
+   }
+
+   if (truncated) {
+   printf(truncated partition %s to %lld bytes\n, part-name,
+  (uint64_t) net_size + padding_size);
+   }
+
+   part-size = net_size + padding_size;
+   *next_offset = part-offset + part-size;
+}
+
+/**
+ * Adjust all of the partition sizes, such that all partitions are at least
+ * as big as their mtdparts environment variable sizes and they each start
+ * on a good block.
+ *
+ * @return 0 

[U-Boot] [PATCH v6 2/5] mtd: add an mtd method for get_len_incl_bad()

2010-08-31 Thread Ben Gardiner
The logic to 'spread' mtd partitions needs to calculate the length in
the mtd device, including bad blocks.

This patch introduces a new function, mtd_get_len_incl_bad that can
return both the length including bad blocks and whether that length
was truncated on the device. This new function will be used by the
mtdparts spread command later in this series. The definition of the
function is #ifdef'd out in configurations that do not use the new
'mtdparts spread' command.

Signed-off-by: Ben Gardinerbengardi...@nanometrics.ca
CC: Scott Wood scottw...@freescale.com

---

Note: the mtd_get_len_incl_bad() function could also be used by the
get_len_incl_bad() function in nand_util.c except for the fact that
boards can enable NAND support without enabling MTD support. A note
has been added to get_len_incl_bad() to remind us to refactor when/if
MTD support is available whenever NAND support is enabled.

V5:
 * introduced in v5 of this patchset

V6:
 * return zero length and truncated if mtd_get_len_incl_bad is
   called with offset=size -- as per Scott Wood's review
   comments

---
 drivers/mtd/mtdcore.c|   49 ++
 drivers/mtd/nand/nand_util.c |6 +
 include/linux/mtd/mtd.h  |4 ++-
 3 files changed, 58 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 6eb52ed..78f2a08 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -142,3 +142,52 @@ void put_mtd_device(struct mtd_info *mtd)
c = --mtd-usecount;
BUG_ON(c  0);
 }
+
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+/**
+ * mtd_get_len_incl_bad
+ *
+ * Check if length including bad blocks fits into device.
+ *
+ * @param mtd an MTD device
+ * @param offset offset in flash
+ * @param length image length
+ * @return image length including bad blocks in *len_incl_bad and whether or 
not
+ * the length returned was truncated in *truncated
+ */
+void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,
+ const uint64_t length, uint64_t *len_incl_bad,
+ int *truncated)
+{
+   *truncated = 0;
+   *len_incl_bad = 0;
+
+   if (offset = mtd-size) {
+   *truncated = 1;
+   return;
+   }
+
+   if (!mtd-block_isbad) {
+   *len_incl_bad = length;
+   return;
+   }
+
+   uint64_t len_excl_bad = 0;
+   uint64_t block_len;
+
+   while (len_excl_bad  length) {
+   block_len = mtd-erasesize - (offset  (mtd-erasesize - 1));
+
+   if (!mtd-block_isbad(mtd, offset  ~(mtd-erasesize - 1)))
+   len_excl_bad += block_len;
+
+   *len_incl_bad += block_len;
+   offset   += block_len;
+
+   if (offset = mtd-size) {
+   *truncated = 1;
+   break;
+   }
+   }
+}
+#endif /* defined(CONFIG_CMD_MTDPARTS_SPREAD) */
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index 29c42f7..622237f 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -435,6 +435,12 @@ int nand_unlock(struct mtd_info *mtd, ulong start, ulong 
length)
 static size_t get_len_incl_bad (nand_info_t *nand, loff_t offset,
const size_t length)
 {
+   /*
+* TODO: replace this implementation with a call to
+* mtd_get_len_incl_bad((struct mtd_info *) nand, ...)
+* when CONFIG_MTD_DEVICE is required for NAND support
+*/
+
size_t len_incl_bad = 0;
size_t len_excl_bad = 0;
size_t block_len;
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 16556c4..8e8ec7c 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -259,7 +259,9 @@ extern struct mtd_info *get_mtd_device(struct mtd_info 
*mtd, int num);
 extern struct mtd_info *get_mtd_device_nm(const char *name);
 
 extern void put_mtd_device(struct mtd_info *mtd);
-
+extern void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,
+const uint64_t length, uint64_t *len_incl_bad,
+int *truncated);
 /* XXX U-BOOT XXX */
 #if 0
 struct mtd_notifier {
-- 
1.7.0.4

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Re: [U-Boot] [PATCH 4/5] nand commands: make only dump repeatable.

2010-08-31 Thread Ben Gardiner
On Mon, Aug 30, 2010 at 7:03 PM, Scott Wood scottw...@freescale.com wrote:
 The dump command is made to increment its address on repeat,
 as md does.  Other commands do not make sense to issue repeatedly,
 and can be irritating when it happens accidentally, so don't.

 Signed-off-by: Scott Wood scottw...@freescale.com

applies cleanly to 962ad59e25640e586e2bceabf67a628a27f8f508 of
git://git.denx.de/u-boot.git

Tested on da850evm_config with NAND enabled;

Tested-by: Ben Gardiner bengardi...@nanometrics.ca

Best Regards,
Ben Gardiner

---
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http://www.nanometrics.ca
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[U-Boot] [PATCH v6 5/5] mtdparts: new add.spread: add part skipping bad blocks

2010-08-31 Thread Ben Gardiner
This patch adds a new 'mtdparts add' variant: add.spread. This command variant
adds a new partition to the mtdparts variable but also increases the partitions
size by skipping bad blocks and aggregating any additional bad blocks found at
the end of the partition.

Signed-off-by: Ben Gardiner bengardi...@nanometrics.ca
CC: Wolfgang Denk w...@denx.de
CC: Scott Wood scottw...@freescale.com

---

V2:
 * formatting: spaces after 'if' and 'for'
 * trailing whitespace removed

V3:
 * rebased to 54841ab50c20d6fa6c9cc3eb826989da3a22d934 of
   git://git.denx.de/u-boot.git
 * fix more checkpatch errors
 * updating copyright to include addition of add.e command

V4:
 * rebased to b417260d871d4d8d336c160d95ed40cc8c0fb0fa of
   git://git.denx.de/u-boot.git
 * removed changelog from file header
 * check for s == NULL when looking for '.' in command
 * do not include support for the '.i' synonym
 * rename to 'add.spread' to match 'mtdparts spread' as per Scott Wood's
   suggestion.

V5:
 * rebased to 962ad59e25640e586e2bceabf67a628a27f8f508 of
   git://git.denx.de/u-boot.git
 * renumbered from 4/4 to 5/5
 * don't reproduce the same call to spread_partitions on either side
   of the check for existing device -- as per Scott Wood's comments.

V6:
 * unchanged

---
 common/cmd_mtdparts.c |   34 ++
 1 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index 347e409..17865b7 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -1949,9 +1949,13 @@ int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
}
 
/* mtdparts add mtd-dev size[@offset] name [ro] */
-   if (((argc == 5) || (argc == 6))  (strcmp(argv[1], add) == 0)) {
+   if (((argc == 5) || (argc == 6))  (strncmp(argv[1], add, 3) == 0)) {
 #define PART_ADD_DESC_MAXLEN 64
char tmpbuf[PART_ADD_DESC_MAXLEN];
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+   struct mtd_info *mtd;
+   uint64_t next_offset;
+#endif
u8 type, num, len;
struct mtd_device *dev;
struct mtd_device *dev_tmp;
@@ -1986,15 +1990,25 @@ int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
debug(+ %s\t%d\t%s\n, MTD_DEV_TYPE(dev-id-type),
dev-id-num, dev-id-mtd_id);
 
-   if ((dev_tmp = device_find(dev-id-type, dev-id-num)) == 
NULL) {
+   p = list_entry(dev-parts.next, struct part_info, link);
+
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+   if (get_mtd_info(dev-id-type, dev-id-num, mtd))
+   return 1;
+
+   if (!strcmp(argv[1][3], .spread)) {
+   spread_partition(mtd, p, next_offset);
+   debug(increased %s to %d bytes\n, p-name, p-size);
+   }
+#endif
+
+   dev_tmp = device_find(dev-id-type, dev-id-num);
+   if (dev_tmp == NULL) {
device_add(dev);
-   } else {
+   } else if (part_add(dev_tmp, p) != 0) {
/* merge new partition with existing ones*/
-   p = list_entry(dev-parts.next, struct part_info, link);
-   if (part_add(dev_tmp, p) != 0) {
-   device_del(dev);
-   return 1;
-   }
+   device_del(dev);
+   return 1;
}
 
if (generate_mtdparts_save(last_parts, MTDPARTS_MAXLEN) != 0) {
@@ -2039,6 +2053,10 @@ U_BOOT_CMD(
- delete partition (e.g. part-id = nand0,1)\n
mtdparts add mtd-dev size[@offset] [name] [ro]\n
- add partition\n
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+   mtdparts add.spread mtd-dev size[@offset] [name] [ro]\n
+   - add partition, padding size by skipping bad blocks\n
+#endif
mtdparts default\n
- reset partition table to defaults\n
 #if defined(CONFIG_CMD_MTDPARTS_SPREAD)
-- 
1.7.0.4

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Re: [U-Boot] [PATCH 3/5] nand erase: .spread, .part, .chip subcommands

2010-08-31 Thread Scott Wood
On Tue, 31 Aug 2010 17:46:09 -0400
Ben Gardiner bengardi...@nanometrics.ca wrote:

 On Mon, Aug 30, 2010 at 7:03 PM, Scott Wood scottw...@freescale.com wrote:
  -       erase_length = opts-length;
  +       erase_length = lldiv(opts-length + meminfo-erasesize - 1,
  +                            meminfo-erasesize);
 
 checkpatch is complaining:
 error: checkpatch: code indent should use tabs where possible
 drivers/mtd/nand/nand_util.c:99:1:
 +^I meminfo-erasesize);$

Will fix -- forgot to do it U-Boot-style where tab is just a
compression scheme rather than semantic information.

Thanks for pointing it out.

-Scot

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[U-Boot] warning: dereferencing pointer '({anonymous})' does break strict-aliasing rules

2010-08-31 Thread Timur Tabi
I ran Software Update on my Fedora 13 system, and now whenever I build
U-Boot, I get a bunch of warnings like this:

dlmalloc.c: In function 'malloc':
dlmalloc.c:2252: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2252: note: initialized from here
dlmalloc.c:2261: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2261: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2261: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2261: note: initialized from here
dlmalloc.c:2268: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2268: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2268: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2268: note: initialized from here
dlmalloc.c:2325: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2325: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2325: warning: dereferencing pointer '({anonymous})' does break
strict-aliasing rules
dlmalloc.c:2325: note: initialized from here

Can anyone explain why this is happening?  I don't understand how a Fedora
update would change anything, since my cross-compile toolchain is not
distributed with Fedora, so it shouldn't have changed.

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Re: [U-Boot] [PATCH 8/8] APM82xxx: Add top level common file changes

2010-08-31 Thread Tirumala Marri
Hi Stefan,
  Add bluestone board name  to the board.cfg.
  Change Makefile to include bluestone board support.

 Not needed with board.cfg now. Please remove your changes to Makefile.

[Marri] You mean we only need board.cfg change and we don't need Makefile
entry ?

Regards,
Marri
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[U-Boot] [PATCH 00/11] ARMV7: OMAP: Add support for OMAP36XX/37XX, cleanup OMAP3 common code

2010-08-31 Thread Steve Sakoman
This patch series adds support for TI's OMAP36XX/377XX processors and
modifies the Beagle and Overo board files to support upcoming versions
of these boards based upon processors from the OMAP36XX/37XX families.

A number of cleanups and bug fixes to generic OMAP3 code are also
included since they were discovered during the process of adding this
support.

This patch depends on the previous series:

ARMV7: OMAP3: Board updates for Beagle and Overo

http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/82805

Tested on Beagle C3, C4, and xM; Overo 35XX and 37XX; and Panda
Also did MAKEALL ARMV7

Mans Rullgard (3):
  ARMV7: OMAP3: Fix and clean up L2 cache enable/disable functions
  ARMV7: OMAP3: Convert setup_auxcr() to pure asm
  ARMV7: OMAP3: Apply Cortex-A8 errata workarounds only on affected
revisions

Steve Sakoman (8):
  ARMV7: OMAP3: Update CPU type detection for AM35XX/OMAP36XX/37XX
  ARMV7: OMAP3: Add clock setup for OMAP36XX/37XX
  ARMV7: OMAP3: Fix broken reset command on OMAP36XX/37XX and OMAP4
  ARMV7: OMAP3: Remove erroneous hard coded sdram setup for 128MB/bank
  mtd: nand: honor CONFIG_SYS_NAND_QUIET_TEST with unknown NAND printk
  ARMV7: OMAP3: Add CONFIG_SYS_NAND_QUIET_TEST to Beagle and Overo
configs
  ARMV7: OMAP3: Add support for Beagle xM
  ARMV7: OMAP: Overo: Autodetect presence/absence of transceiver on
mmc2

 arch/arm/cpu/armv7/omap-common/reset.S |4 +-
 arch/arm/cpu/armv7/omap3/board.c   |   35 -
 arch/arm/cpu/armv7/omap3/cache.S   |  101 +--
 arch/arm/cpu/armv7/omap3/clock.c   |  549 +
 arch/arm/cpu/armv7/omap3/lowlevel_init.S   |   69 ++
 arch/arm/cpu/armv7/omap3/sdrc.c|   43 +-
 arch/arm/cpu/armv7/omap3/sys_info.c|  147 +++-
 arch/arm/include/asm/arch-omap3/clocks.h   |   17 +
 arch/arm/include/asm/arch-omap3/clocks_omap3.h |   27 +
 arch/arm/include/asm/arch-omap3/cpu.h  |   15 +-
 arch/arm/include/asm/arch-omap3/omap3.h|   32 +-
 arch/arm/include/asm/arch-omap3/sys_proto.h|2 +
 arch/arm/include/asm/arch-omap4/omap4.h|1 +
 board/overo/overo.c|   47 +
 board/overo/overo.h|   35 +-
 board/ti/beagle/beagle.c   |   16 +-
 board/ti/beagle/beagle.h   |   33 +-
 board/ti/sdp4430/sdp.c |8 +-
 drivers/mtd/nand/nand_base.c   |2 +

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[U-Boot] [PATCH 01/11] ARMV7: OMAP3: Update CPU type detection for AM35XX/OMAP36XX/37XX

2010-08-31 Thread Steve Sakoman
TI has added new processors to the OMAP3 family.  This patch enhances
the code in sysinfo.c to detect which family member is present.

Signed-off-by: Steve Sakoman st...@sakoman.com
---
 arch/arm/cpu/armv7/omap3/sys_info.c |  147 ++-
 arch/arm/include/asm/arch-omap3/cpu.h   |   14 ++--
 arch/arm/include/asm/arch-omap3/omap3.h |   32 ++-
 arch/arm/include/asm/arch-omap3/sys_proto.h |2 +
 4 files changed, 161 insertions(+), 34 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/sys_info.c 
b/arch/arm/cpu/armv7/omap3/sys_info.c
index 1df4401..549ac19 100644
--- a/arch/arm/cpu/armv7/omap3/sys_info.c
+++ b/arch/arm/cpu/armv7/omap3/sys_info.c
@@ -38,7 +38,10 @@ static char *rev_s[CPU_3XX_MAX_REV] = {
2.0,
2.1,
3.0,
-   3.1};
+   3.1,
+   UNKNOWN,
+   UNKNOWN,
+   3.1.2};
 
 /*
  * dieid_num_r(void) - read and set die ID
@@ -75,32 +78,81 @@ u32 get_cpu_type(void)
 }
 
 /**
- * get_cpu_rev(void) - extract version info
+ * get_cpu_id(void) - extract cpu id
+ * returns 0 for ES1.0, cpuid otherwise
  **/
-u32 get_cpu_rev(void)
+u32 get_cpu_id(void)
 {
-   u32 cpuid = 0;
struct ctrl_id *id_base;
+   u32 cpuid = 0;
 
/*
 * On ES1.0 the IDCODE register is not exposed on L4
 * so using CPU ID to differentiate between ES1.0 and  ES1.0.
 */
__asm__ __volatile__(mrc p15, 0, %0, c0, c0, 0:=r(cpuid));
-   if ((cpuid  0xf) == 0x0)
-   return CPU_3XX_ES10;
-   else {
+   if ((cpuid  0xf) == 0x0) {
+   return 0;
+   } else {
/* Decode the IDs on  ES1.0 */
id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
 
-   cpuid = (readl(id_base-idcode)  CPU_3XX_ID_SHIFT)  0xf;
+   cpuid = readl(id_base-idcode);
+   }
 
-   /* Some early ES2.0 seem to report ID 0, fix this */
-   if(cpuid == 0)
-   cpuid = CPU_3XX_ES20;
+   return cpuid;
+}
 
-   return cpuid;
+/**
+ * get_cpu_family(void) - extract cpu info
+ **/
+u32 get_cpu_family(void)
+{
+   u16 hawkeye;
+   u32 cpu_family;
+   u32 cpuid = get_cpu_id();
+
+   if (cpuid == 0)
+   return CPU_OMAP34XX;
+
+   hawkeye = (cpuid  HAWKEYE_SHIFT)  0x;
+   switch (hawkeye) {
+   case HAWKEYE_OMAP34XX:
+   cpu_family = CPU_OMAP34XX;
+   break;
+   case HAWKEYE_AM35XX:
+   cpu_family = CPU_AM35XX;
+   break;
+   case HAWKEYE_OMAP36XX:
+   cpu_family = CPU_OMAP36XX;
+   break;
+   default:
+   cpu_family = CPU_OMAP34XX;
}
+
+   return cpu_family;
+}
+
+/**
+ * get_cpu_rev(void) - extract version info
+ **/
+u32 get_cpu_rev(void)
+{
+   u32 cpuid = get_cpu_id();
+
+   if (cpuid == 0)
+   return CPU_3XX_ES10;
+   else
+   return (cpuid  CPU_3XX_ID_SHIFT)  0xf;
+}
+
+/*
+ * get_sku_id(void) - read sku_id to get info on max clock rate
+ */
+u32 get_sku_id(void)
+{
+   struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
+   return readl(id_base-sku_id)  SKUID_CLK_MASK;
 }
 
 /***
@@ -213,24 +265,66 @@ u32 get_device_type(void)
  */
 int print_cpuinfo (void)
 {
-   char *cpu_s, *sec_s;
+   char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
+
+   switch (get_cpu_family()) {
+   case CPU_OMAP34XX:
+   cpu_family_s = OMAP;
+   switch (get_cpu_type()) {
+   case OMAP3503:
+   cpu_s = 3503;
+   break;
+   case OMAP3515:
+   cpu_s = 3515;
+   break;
+   case OMAP3525:
+   cpu_s = 3525;
+   break;
+   case OMAP3530:
+   cpu_s = 3530;
+   break;
+   default:
+   cpu_s = 35XX;
+   break;
+   }
+   if ((get_cpu_rev() = CPU_3XX_ES31) 
+   (get_sku_id() == SKUID_CLK_720MHZ))
+   max_clk = 720 mHz;
+   else
+   max_clk = 600 mHz;
 
-   

[U-Boot] [PATCH 02/11] ARMV7: OMAP3: Add clock setup for OMAP36XX/37XX

2010-08-31 Thread Steve Sakoman
This patch configures clocks properly when a 36XX/37XX
processor is detected.

Signed-off-by: Steve Sakoman st...@sakoman.com
---
 arch/arm/cpu/armv7/omap3/clock.c   |  549 +---
 arch/arm/cpu/armv7/omap3/lowlevel_init.S   |   69 +++
 arch/arm/include/asm/arch-omap3/clocks.h   |   17 +
 arch/arm/include/asm/arch-omap3/clocks_omap3.h |   27 ++
 4 files changed, 515 insertions(+), 147 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index 6330c9e..2238c52 100644
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -50,12 +50,7 @@ u32 get_osc_clk_speed(void)
 
if (val  SYSCLKDIV_2)
cdiv = 2;
-   else if (val  SYSCLKDIV_1)
-   cdiv = 1;
else
-   /*
-* Should never reach here! (Assume divider as 1)
-*/
cdiv = 1;
 
/* enable timer2 */
@@ -89,11 +84,7 @@ u32 get_osc_clk_speed(void)
while (readl(s32k_base-s32k_cr)  (start + 20)) ;
cend = readl(gpt1_base-tcrr); /* get end sys_clk count */
cdiff = cend - cstart;  /* get elapsed ticks */
-
-   if (cdiv == 2)
-   {
-   cdiff *= 2;
-   }
+   cdiff *= cdiv;
 
/* based on number of ticks assign speed */
if (cdiff  19000)
@@ -135,65 +126,22 @@ void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
}
 }
 
-/**
- * prcm_init() - inits clocks for PRCM as defined in clocks.h
- *   called from SRAM, or Flash (using temp SRAM stack).
- */
-void prcm_init(void)
+/*
+ * OMAP34XX/35XX specific functions
+ */
+
+static void dpll3_init_34xx(u32 sil_index, u32 clk_index)
 {
+   struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+   dpll_param *ptr = (dpll_param *) get_core_dpll_param();
void (*f_lock_pll) (u32, u32, u32, u32);
int xip_safe, p0, p1, p2, p3;
-   u32 osc_clk = 0, sys_clkin_sel;
-   u32 clk_index, sil_index = 0;
-   struct prm *prm_base = (struct prm *)PRM_BASE;
-   struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
-   dpll_param *dpll_param_p;
-
-   f_lock_pll = (void *) ((u32) _end_vect - (u32) _start +
-   SRAM_VECT_CODE);
 
xip_safe = is_running_in_sram();
 
-   /*
-* Gauge the input clock speed and find out the sys_clkin_sel
-* value corresponding to the input clock.
-*/
-   osc_clk = get_osc_clk_speed();
-   get_sys_clkin_sel(osc_clk, sys_clkin_sel);
-
-   /* set input crystal speed */
-   sr32(prm_base-clksel, 0, 3, sys_clkin_sel);
+   /* Moving to the right sysclk and ES rev base */
+   ptr = ptr + (3 * clk_index) + sil_index;
 
-   /* If the input clock is greater than 19.2M always divide/2 */
-   if (sys_clkin_sel  2) {
-   /* input clock divider */
-   sr32(prm_base-clksrc_ctrl, 6, 2, 2);
-   clk_index = sys_clkin_sel / 2;
-   } else {
-   /* input clock divider */
-   sr32(prm_base-clksrc_ctrl, 6, 2, 1);
-   clk_index = sys_clkin_sel;
-   }
-
-   /*
-* The DPLL tables are defined according to sysclk value and
-* silicon revision. The clk_index value will be used to get
-* the values for that input sysclk from the DPLL param table
-* and sil_index will get the values for that SysClk for the
-* appropriate silicon rev.
-*/
-   if (get_cpu_rev())
-   sil_index = 1;
-
-   /* Unlock MPU DPLL (slows things down, and needed later) */
-   sr32(prcm_base-clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
-   wait_on_value(ST_MPU_CLK, 0, prcm_base-idlest_pll_mpu, LDELAY);
-
-   /* Getting the base address of Core DPLL param table */
-   dpll_param_p = (dpll_param *) get_core_dpll_param();
-
-   /* Moving it to the right sysclk and ES rev base */
-   dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
if (xip_safe) {
/*
 * CORE DPLL
@@ -208,34 +156,38 @@ void prcm_init(void)
 * work. write another value and then default value.
 */
 
-   /* m3x2 */
-   sr32(prcm_base-clksel1_emu, 16, 5, CORE_M3X2 + 1);
-   /* m3x2 */
+   /* CM_CLKSEL1_EMU[DIV_DPLL3] */
+   sr32(prcm_base-clksel1_emu, 16, 5, (CORE_M3X2 + 1)) ;
sr32(prcm_base-clksel1_emu, 16, 5, CORE_M3X2);
-   /* Set M2 */
-   sr32(prcm_base-clksel1_pll, 27, 2, dpll_param_p-m2);
-   /* Set M */
-   sr32(prcm_base-clksel1_pll, 16, 11, dpll_param_p-m);
-   /* Set N */
-   sr32(prcm_base-clksel1_pll, 8, 7, 

[U-Boot] [PATCH 04/11] ARMV7: OMAP3: Convert setup_auxcr() to pure asm

2010-08-31 Thread Steve Sakoman
From: Mans Rullgard m...@mansr.com

This function consists entirely of inline asm statements, so writing
it directly in a .S file is simpler. Additionally, the inline asm is
not safe as is, since registers are not guaranteed to be preserved
between asm() statements.

Signed-off-by: Mans Rullgard m...@mansr.com
Signed-off-by: Steve Sakoman st...@sakoman.com
---
 arch/arm/cpu/armv7/omap3/board.c |   35 ---
 arch/arm/cpu/armv7/omap3/cache.S |   19 +++
 2 files changed, 19 insertions(+), 35 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 69e56f5..6c2a132 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -120,41 +120,6 @@ void secureworld_exit()
 }
 
 /**
- * Routine: setup_auxcr()
- * Description: Write to AuxCR desired value using SMI.
- *  general use.
- */
-void setup_auxcr()
-{
-   unsigned long i;
-   volatile unsigned int j;
-   /* Save r0, r12 and restore them after usage */
-   __asm__ __volatile__(mov %0, r12:=r(j));
-   __asm__ __volatile__(mov %0, r0:=r(i));
-
-   /*
-* GP Device ROM code API usage here
-* r12 = AUXCR Write function and r0 value
-*/
-   __asm__ __volatile__(mov r12, #0x3);
-   __asm__ __volatile__(mrc p15, 0, r0, c1, c0, 1);
-   /* Enabling ASA */
-   __asm__ __volatile__(orr r0, r0, #0x10);
-   /* Enable L1NEON */
-   __asm__ __volatile__(orr r0, r0, #1  5);
-   /* SMI instruction to call ROM Code API */
-   __asm__ __volatile__(.word 0xE1600070);
-   /* Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround) */
-   __asm__ __volatile__(mov r12, #0x2);
-   __asm__ __volatile__(mrc p15, 1, r0, c9, c0, 2);
-   __asm__ __volatile__(orr r0, r0, #1  27);
-   /* SMI instruction to call ROM Code API */
-   __asm__ __volatile__(.word 0xE1600070);
-   __asm__ __volatile__(mov r0, %0:=r(i));
-   __asm__ __volatile__(mov r12, %0:=r(j));
-}
-
-/**
  * Routine: try_unlock_sram()
  * Description: If chip is GP/EMU(special) type, unlock the SRAM for
  *  general use.
diff --git a/arch/arm/cpu/armv7/omap3/cache.S b/arch/arm/cpu/armv7/omap3/cache.S
index cb7ca11..5a19051 100644
--- a/arch/arm/cpu/armv7/omap3/cache.S
+++ b/arch/arm/cpu/armv7/omap3/cache.S
@@ -43,6 +43,7 @@
 .global invalidate_dcache
 .global l2_cache_enable
 .global l2_cache_disable
+.global setup_auxcr
 
 /*
  * invalidate_dcache()
@@ -156,3 +157,21 @@ l2_cache_disable:
mov r0, #0
b   l2_cache_set
 
+/**
+ * Routine: setup_auxcr()
+ * Description: Write to AuxCR desired value using SMI.
+ *  general use.
+ */
+setup_auxcr:
+   mov r12, #0x3
+   mrc p15, 0, r0, c1, c0, 1
+   orr r0, r0, #0x10   @ Enable ASA
+   orr r0, r0, #1  5 @ Enable L1NEON
+   .word 0xE1600070@ SMC
+   mov r12, #0x2
+   mrc p15, 1, r0, c9, c0, 2
+   @ Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround)
+   orr r0, r0, #1  27
+   .word 0xE1600070@ SMC
+   bx  lr
+
-- 
1.7.0.4

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[U-Boot] [PATCH 05/11] ARMV7: OMAP3: Apply Cortex-A8 errata workarounds only on affected revisions

2010-08-31 Thread Steve Sakoman
From: Mans Rullgard m...@mansr.com

The workarounds for errata 621766 and 725233 should only be applied
on affected Cortex-A8 revisions.  Recent chips use r3px cores where
these have been fixed.

Signed-off-by: Mans Rullgard m...@mansr.com
Signed-off-by: Steve Sakoman st...@sakoman.com
---
 arch/arm/cpu/armv7/omap3/cache.S |   13 ++---
 1 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/cache.S b/arch/arm/cpu/armv7/omap3/cache.S
index 5a19051..24e950f 100644
--- a/arch/arm/cpu/armv7/omap3/cache.S
+++ b/arch/arm/cpu/armv7/omap3/cache.S
@@ -163,15 +163,22 @@ l2_cache_disable:
  *  general use.
  */
 setup_auxcr:
+   mrc p15, 0, r0, c0, c0, 0   @ read main ID register
+   and r2, r0, #0x00f0 @ variant
+   and r3, r0, #0x000f @ revision
+   orr r1, r3, r2, lsr #20-4   @ combine variant and revision
mov r12, #0x3
mrc p15, 0, r0, c1, c0, 1
orr r0, r0, #0x10   @ Enable ASA
-   orr r0, r0, #1  5 @ Enable L1NEON
+   @ Enable L1NEON on pre-r2p1 (erratum 621766 workaround)
+   cmp r1, #0x21
+   orrlt   r0, r0, #1  5
.word 0xE1600070@ SMC
mov r12, #0x2
mrc p15, 1, r0, c9, c0, 2
-   @ Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround)
-   orr r0, r0, #1  27
+   @ Set PLD_FWD bit in L2AUXCR on pre-r2p1 (erratum 725233 workaround)
+   cmp r1, #0x21
+   orrlt   r0, r0, #1  27
.word 0xE1600070@ SMC
bx  lr
 
-- 
1.7.0.4

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[U-Boot] [PATCH 07/11] ARMV7: OMAP3: Remove erroneous hard coded sdram setup for 128MB/bank

2010-08-31 Thread Steve Sakoman
Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB
per bank.  This patches uses the SDRC settings from x-load or the config
header to set up timing properly.

Signed-off-by: Steve Sakoman st...@sakoman.com
---
 arch/arm/cpu/armv7/omap3/sdrc.c |   43 +++
 1 files changed, 21 insertions(+), 22 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 96fd990..8905224 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -107,18 +107,12 @@ u32 get_sdr_cs_offset(u32 cs)
 /*
  * do_sdrc_init -
  *  - Initialize the SDRAM for use.
- *  - Sets up SDRC timings for CS0
  *  - code called once in C-Stack only context for CS0 and a possible 2nd
  *time depending on memory configuration from stack+global context
  */
 void do_sdrc_init(u32 cs, u32 early)
 {
-   struct sdrc_actim *sdrc_actim_base;
-
-   if (cs)
-   sdrc_actim_base = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
-   else
-   sdrc_actim_base = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+   struct sdrc_actim *sdrc_actim_base0, *sdrc_actim_base1;
 
if (early) {
/* reset sdrc controller */
@@ -138,24 +132,29 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x2);
}
 
-   writel(RASWIDTH_13BITS | CASWIDTH_10BITS | ADDRMUXLEGACY |
-   RAMSIZE_128 | BANKALLOCATION | B32NOT16 | B32NOT16 |
-   DEEPPD | DDR_SDRAM, sdrc_base-cs[cs].mcfg);
-   writel(ARCV | ARE_ARCV_1, sdrc_base-cs[cs].rfr_ctrl);
-   writel(V_ACTIMA_165, sdrc_actim_base-ctrla);
-   writel(V_ACTIMB_165, sdrc_actim_base-ctrlb);
-
-   writel(CMD_NOP, sdrc_base-cs[cs].manual);
-   writel(CMD_PRECHARGE, sdrc_base-cs[cs].manual);
-   writel(CMD_AUTOREFRESH, sdrc_base-cs[cs].manual);
-   writel(CMD_AUTOREFRESH, sdrc_base-cs[cs].manual);
-
/*
-* CAS latency 3, Write Burst = Read Burst, Serial Mode,
-* Burst length = 4
+* SDRC timings are set up by x-load or config header
+* We don't need to redo them here.
+* Older x-loads configure only CS0
+* configure CS1 to handle this ommission
 */
-   writel(CASL3 | BURSTLENGTH4, sdrc_base-cs[cs].mr);
+   if (cs) {
+   sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+   sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
+   writel(readl(sdrc_base-cs[CS0].mcfg),
+   sdrc_base-cs[CS1].mcfg);
+   writel(readl(sdrc_base-cs[CS0].rfr_ctrl),
+   sdrc_base-cs[CS1].rfr_ctrl);
+   writel(readl(sdrc_actim_base0-ctrla),
+   sdrc_actim_base1-ctrla);
+   writel(readl(sdrc_actim_base0-ctrlb),
+   sdrc_actim_base1-ctrlb);
+   }
 
+   /*
+* Test ram in this bank
+* Disable if bad or not present
+*/
if (!mem_ok(cs))
writel(0, sdrc_base-cs[cs].mcfg);
 }
-- 
1.7.0.4

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[U-Boot] [PATCH 08/11] mtd: nand: honor CONFIG_SYS_NAND_QUIET_TEST with unknown NAND printk

2010-08-31 Thread Steve Sakoman
This printk was added recently and results in ugly output on systems
with no NAND:

NAND:  nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip 
ID: 0x00 0 MiB

instead of:

NAND:  0 MiB

Signed-off-by: Steve Sakoman st...@sakoman.com
---
 drivers/mtd/nand/nand_base.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index ed1c9c9..cbcf2b8 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2653,9 +2653,11 @@ static struct nand_flash_dev *nand_get_flash_type(struct 
mtd_info *mtd,
}
 
if (!type) {
+#ifndef CONFIG_SYS_NAND_QUIET_TEST
printk(KERN_INFO %s: unknown NAND device: Manufacturer ID:
0x%02x, Chip ID: 0x%02x\n, __func__,
   *maf_id, dev_id);
+#endif
return ERR_PTR(-ENODEV);
}
 
-- 
1.7.0.4

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[U-Boot] [PATCH 09/11] ARMV7: OMAP3: Add CONFIG_SYS_NAND_QUIET_TEST to Beagle and Overo configs

2010-08-31 Thread Steve Sakoman
Future versions of these boards have options for POP memory with no NAND.
This option prevents display of error messages when no NAND is detected.

Signed-off-by: Steve Sakoman st...@sakoman.com
---
 include/configs/omap3_beagle.h |1 +
 include/configs/omap3_overo.h  |1 +
 2 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index e7cd93b..71553f9 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -158,6 +158,7 @@
 /*
  * Board NAND Info.
  */
+#define CONFIG_SYS_NAND_QUIET_TEST 1
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR   NAND_BASE   /* physical address */
/* to access nand */
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index ca90786..a0e0f24 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -129,6 +129,7 @@
 /*
  * Board NAND Info.
  */
+#define CONFIG_SYS_NAND_QUIET_TEST 1
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR   NAND_BASE   /* physical address */
/* to access nand */
-- 
1.7.0.4

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[U-Boot] [PATCH 10/11] ARMV7: OMAP3: Add support for Beagle xM

2010-08-31 Thread Steve Sakoman
This patch adds support for the Beagle xM.  It uses the board ID
GPIO bits to recognize this revision and perform appropriate setup.

Signed-off-by: Steve Sakoman st...@sakoman.com
---
 board/ti/beagle/beagle.c |   16 ++--
 board/ti/beagle/beagle.h |   33 ++---
 2 files changed, 44 insertions(+), 5 deletions(-)

diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index ec95ad0..4647908 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -58,12 +58,13 @@ int board_init(void)
 /*
  * Routine: get_board_revision
  * Description: Detect if we are running on a Beagle revision Ax/Bx,
- * C1/2/3, or C4. This can be done by reading
+ * C1/2/3, C4 or xM. This can be done by reading
  * the level of GPIO173, GPIO172 and GPIO171. This should
  * result in
  * GPIO173, GPIO172, GPIO171: 1 1 1 = Ax/Bx
  * GPIO173, GPIO172, GPIO171: 1 1 0 = C1/2/3
  * GPIO173, GPIO172, GPIO171: 1 0 1 = C4
+ * GPIO173, GPIO172, GPIO171: 0 0 0 = xM
  */
 int get_board_revision(void)
 {
@@ -115,7 +116,7 @@ int misc_init_r(void)
break;
case REVISION_C4:
printf(Beagle Rev C4\n);
-   setenv(beaglerev, Cx);
+   setenv(beaglerev, C4);
setenv(mpurate, 720);
MUX_BEAGLE_C();
/* Set VAUX2 to 1.8V for EHCI PHY */
@@ -124,6 +125,17 @@ int misc_init_r(void)
TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
TWL4030_PM_RECEIVER_DEV_GRP_P1);
break;
+   case REVISION_XM:
+   printf(Beagle xM Rev A\n);
+   setenv(beaglerev, xMA);
+   setenv(mpurate, 1000);
+   MUX_BEAGLE_XM();
+   /* Set VAUX2 to 1.8V for EHCI PHY */
+   twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+   TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+   TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+   TWL4030_PM_RECEIVER_DEV_GRP_P1);
+   break;
default:
printf(Beagle unknown 0x%02x\n, get_board_revision());
}
diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index e5f380c..d860337 100644
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -37,6 +37,7 @@ const omap3_sysinfo sysinfo = {
 #define REVISION_AXBX  0x7
 #define REVISION_CX0x6
 #define REVISION_C40x5
+#define REVISION_XM0x0
 
 /*
  * IEN  - Input Enable
@@ -377,11 +378,37 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SDRC_CKE1),  (IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
 
 #define MUX_BEAGLE_C() \
-   MUX_VAL(CP(MCBSP3_DX),  (IEN | PTD | DIS | M4)) /*GPIO_140*/\
-   MUX_VAL(CP(MCBSP3_DR),  (IEN | PTD | DIS | M4)) /*GPIO_142*/\
-   MUX_VAL(CP(MCBSP3_CLKX),(IEN | PTD | DIS | M4)) /*GPIO_141*/\
+   MUX_VAL(CP(MCBSP3_DX),  (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+   MUX_VAL(CP(MCBSP3_DR),  (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+   MUX_VAL(CP(MCBSP3_CLKX),(IEN  | PTD | DIS | M4)) /*GPIO_141*/\
MUX_VAL(CP(UART2_CTS),  (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
MUX_VAL(CP(UART2_RTS),  (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
MUX_VAL(CP(UART2_TX),   (IDIS | PTD | DIS | M0)) /*UART2_TX*/
 
+#define MUX_BEAGLE_XM() \
+   MUX_VAL(CP(MCBSP3_DX),  (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+   MUX_VAL(CP(MCBSP3_DR),  (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+   MUX_VAL(CP(MCBSP3_CLKX),(IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+   MUX_VAL(CP(UART2_CTS),  (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
+   MUX_VAL(CP(UART2_RTS),  (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+   MUX_VAL(CP(UART2_TX),   (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+   MUX_VAL(CP(DSS_DATA0),  (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+   MUX_VAL(CP(DSS_DATA1),  (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+   MUX_VAL(CP(DSS_DATA2),  (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+   MUX_VAL(CP(DSS_DATA3),  (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+   MUX_VAL(CP(DSS_DATA4),  (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+   MUX_VAL(CP(DSS_DATA5),  (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+   MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M3)) /*DSS_DATA0*/\
+   MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M3)) /*DSS_DATA1*/\
+   MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M3)) /*DSS_DATA2*/\
+   MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M3)) /*DSS_DATA3*/\
+   MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M3)) /*DSS_DATA4*/\
+   MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | 

[U-Boot] [PATCH 11/11] ARMV7: OMAP: Overo: Autodetect presence/absence of transceiver on mmc2

2010-08-31 Thread Steve Sakoman
An upcoming version of Overo uses a Wifi/BT module with 1.8V signaling,
eliminating the need for an external transceiver to handle the level
shifting.  This patch detects whether an external transceiver is present
and adjusts the pinmux settings as appropriate.

Signed-off-by: Steve Sakoman st...@sakoman.com
---
 board/overo/overo.c |   47 +++
 board/overo/overo.h |   35 +--
 2 files changed, 80 insertions(+), 2 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c
index 4a60917..1b67f1f 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -103,6 +103,39 @@ int get_board_revision(void)
 }
 
 /*
+ * Routine: get_sdio2_config
+ * Description: Return information about the wifi module connection
+ *  Returns 0 if the module connects though a level translator
+ *  Returns 1 if the module connects directly
+ */
+int get_sdio2_config(void)
+{
+   int sdio_direct;
+
+   if (!omap_request_gpio(130)  !omap_request_gpio(139)) {
+
+   omap_set_gpio_direction(130, 0);
+   omap_set_gpio_direction(139, 1);
+
+   sdio_direct = 1;
+   omap_set_gpio_dataout(130, 0);
+   if (omap_get_gpio_datain(139) == 0) {
+   omap_set_gpio_dataout(130, 1);
+   if (omap_get_gpio_datain(139) == 1)
+   sdio_direct = 0;
+   }
+
+   omap_free_gpio(130);
+   omap_free_gpio(139);
+   } else {
+   printf(Error: unable to acquire sdio2 clk GPIOs\n);
+   sdio_direct = -1;
+   }
+
+   return sdio_direct;
+}
+
+/*
  * Routine: misc_init_r
  * Description: Configure board specific parts
  */
@@ -116,6 +149,20 @@ int misc_init_r(void)
 #endif
 
printf(Board revision: %d\n, get_board_revision());
+
+   switch (get_sdio2_config()) {
+   case 0:
+   printf(Tranceiver detected on mmc2\n);
+   MUX_OVERO_SDIO2_TRANSCEIVER();
+   break;
+   case 1:
+   printf(Direct connection on mmc2\n);
+   MUX_OVERO_SDIO2_DIRECT();
+   break;
+   default:
+   printf(Unable to detect mmc2 connection type\n);
+   }
+
dieid_num_r();
 
return 0;
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 2744ffe..33a92e4 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -211,7 +211,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC1_DAT6),  (IEN  | PTU | EN  | M0)) /*MMC1_DAT6*/\
MUX_VAL(CP(MMC1_DAT7),  (IEN  | PTU | EN  | M0)) /*MMC1_DAT7*/\
  /*Wireless LAN */\
-   MUX_VAL(CP(MMC2_CLK),   (IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
+   MUX_VAL(CP(MMC2_CLK),   (IEN  | PTU | EN  | M4)) /*GPIO_130*/\
MUX_VAL(CP(MMC2_CMD),   (IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
MUX_VAL(CP(MMC2_DAT0),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
MUX_VAL(CP(MMC2_DAT1),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
@@ -220,7 +220,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC2_DAT4),  (IEN  | PTU | EN  | M1)) 
/*MMC2_DIR_DAT0*/\
MUX_VAL(CP(MMC2_DAT5),  (IEN  | PTU | EN  | M1)) 
/*MMC2_DIR_DAT1*/\
MUX_VAL(CP(MMC2_DAT6),  (IEN  | PTU | EN  | M1)) 
/*MMC2_DIR_CMD*/\
-   MUX_VAL(CP(MMC2_DAT7),  (IEN  | PTU | EN  | M1)) /*MMC2_CLKIN*/\
+   MUX_VAL(CP(MMC2_DAT7),  (IEN  | PTU | EN  | M4)) /*GPIO_139*/\
  /*Bluetooth*/\
MUX_VAL(CP(MCBSP3_DX),  (IEN  | PTD | DIS | M1)) /*UART2_CTS*/\
MUX_VAL(CP(MCBSP3_DR),  (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
@@ -387,5 +387,36 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SDRC_CKE0),  (IDIS | PTU | EN  | M0)) /*sdrc_cke0*/\
MUX_VAL(CP(SDRC_CKE1),  (IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
 
+#define MUX_OVERO_SDIO2_DIRECT() \
+   MUX_VAL(CP(MMC2_CLK),   (IEN  | PTU | EN  | M0)) /*MMC2_CLK*/\
+   MUX_VAL(CP(MMC2_CMD),   (IEN  | PTU | EN  | M0)) /*MMC2_CMD*/\
+   MUX_VAL(CP(MMC2_DAT0),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT0*/\
+   MUX_VAL(CP(MMC2_DAT1),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT1*/\
+   MUX_VAL(CP(MMC2_DAT2),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT2*/\
+   MUX_VAL(CP(MMC2_DAT3),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT3*/\
+   MUX_VAL(CP(MMC2_DAT4),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT4*/\
+   MUX_VAL(CP(MMC2_DAT5),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT5*/\
+   MUX_VAL(CP(MMC2_DAT6),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT6*/\
+   MUX_VAL(CP(MMC2_DAT7),  (IEN  | PTU | EN  | M0)) /*MMC2_DAT7*/\
+   MUX_VAL(CP(MMC1_DAT4),  (IEN  | PTD | EN  | M4)) /*GPIO_126*/\
+   MUX_VAL(CP(MMC1_DAT5),  (IEN  | PTU | EN  | M4)) /*GPIO_127*/\
+   

[U-Boot] [PATCH 03/11] ARMV7: OMAP3: Fix and clean up L2 cache enable/disable functions

2010-08-31 Thread Steve Sakoman
From: Mans Rullgard m...@mansr.com

On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode,
so an SMC call to the ROM monitor is required.  On later versions,
and on newer devices, this bit is banked and we can set it directly.

The code checked only the ES revision of the chip, and hence incorrectly
used the ROM call on ES1.0 versions of other devices.

This patch adds a check for chip family as well as revision, and also
removes some code duplication between the enable and disable functions.

Signed-off-by: Mans Rullgard m...@mansr.com
Signed-off-by: Steve Sakoman st...@sakoman.com
---
 arch/arm/cpu/armv7/omap3/cache.S |   75 +++---
 1 files changed, 21 insertions(+), 54 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/cache.S b/arch/arm/cpu/armv7/omap3/cache.S
index 4b65ac5..cb7ca11 100644
--- a/arch/arm/cpu/armv7/omap3/cache.S
+++ b/arch/arm/cpu/armv7/omap3/cache.S
@@ -128,64 +128,31 @@ finished_inval:
 
ldmfd   r13!, {r0 - r5, r7, r9 - r12, pc}
 
-
-l2_cache_enable:
-   stmfd   r13!, {r0, r1, r2, lr}
-   @ ES2 onwards we can disable/enable L2 ourselves
+l2_cache_set:
+   stmfd   r13!, {r4 - r6, lr}
+   mov r5,  r0
bl  get_cpu_rev
-   cmp r0, #CPU_3XX_ES20
-   blt l2_cache_disable_EARLIER_THAN_ES2
-   mrc 15, 0, r3, cr1, cr0, 1
-   orr r3, r3, #2
-   mcr 15, 0, r3, cr1, cr0, 1
-   b   l2_cache_enable_END
-l2_cache_enable_EARLIER_THAN_ES2:
-   @ Save r0, r12 and restore them after usage
-   mov r3, ip
-   str r3, [sp, #4]
-   mov r3, r0
-   @
+   mov r4,  r0
+   bl  get_cpu_family
+   @ ES2 onwards we can disable/enable L2 ourselves
+   cmp r0,  #CPU_OMAP34XX
+   cmpeq   r4,  #CPU_3XX_ES10
+   mrc 15, 0, r0, cr1, cr0, 1
+   bic r0, r0, #2
+   orr r0, r0, r5, lsl #1
+   mcreq   15, 0, r0, cr1, cr0, 1
@ GP Device ROM code API usage here
@ r12 = AUXCR Write function and r0 value
-   @
mov ip, #3
-   mrc 15, 0, r0, cr1, cr0, 1
-   orr r0, r0, #2
-   @ SMI instruction to call ROM Code API
-   .word   0xe1600070
-   mov r0, r3
-   mov ip, r3
-   str r3, [sp, #4]
-l2_cache_enable_END:
-   ldmfd   r13!, {r1, r2, r3, pc}
+   @ SMCNE instruction to call ROM Code API
+   .word   0x11600070
+   ldmfd   r13!, {r4 - r6, pc}
 
+l2_cache_enable:
+   mov r0, #1
+   b   l2_cache_set
 
 l2_cache_disable:
-   stmfd   r13!, {r0, r1, r2, lr}
-   @ ES2 onwards we can disable/enable L2 ourselves
-   bl  get_cpu_rev
-   cmp r0, #CPU_3XX_ES20
-   blt l2_cache_disable_EARLIER_THAN_ES2
-   mrc 15, 0, r3, cr1, cr0, 1
-   bic r3, r3, #2
-   mcr 15, 0, r3, cr1, cr0, 1
-   b   l2_cache_disable_END
-l2_cache_disable_EARLIER_THAN_ES2:
-   @ Save r0, r12 and restore them after usage
-   mov r3, ip
-   str r3, [sp, #4]
-   mov r3, r0
-   @
-   @ GP Device ROM code API usage here
-   @ r12 = AUXCR Write function and r0 value
-   @
-   mov ip, #3
-   mrc 15, 0, r0, cr1, cr0, 1
-   bic r0, r0, #2
-   @ SMI instruction to call ROM Code API
-   .word   0xe1600070
-   mov r0, r3
-   mov ip, r3
-   str r3, [sp, #4]
-l2_cache_disable_END:
-   ldmfd   r13!, {r1, r2, r3, pc}
+   mov r0, #0
+   b   l2_cache_set
+
-- 
1.7.0.4

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Re: [U-Boot] [PATCH 00/11] ARMV7: OMAP: Add support for OMAP36XX/37XX, cleanup OMAP3 common code

2010-08-31 Thread Steve Sakoman
On Tue, 2010-08-31 at 16:21 -0700, Steve Sakoman wrote: 
 This patch series adds support for TI's OMAP36XX/377XX processors and
 modifies the Beagle and Overo board files to support upcoming versions
 of these boards based upon processors from the OMAP36XX/37XX families.
 
 A number of cleanups and bug fixes to generic OMAP3 code are also
 included since they were discovered during the process of adding this
 support.
 
 This patch depends on the previous series:
 
 ARMV7: OMAP3: Board updates for Beagle and Overo
 
 http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/82805

Both this series and the one mentioned above are also available in the
omap4-next-upstream branch of my repository:

http://www.sakoman.com/cgi-bin/gitweb.cgi?p=u-boot.git;a=shortlog;h=refs/heads/omap4-next-upstream

Steve


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Re: [U-Boot] [PATCH 08/11] mtd: nand: honor CONFIG_SYS_NAND_QUIET_TEST with unknown NAND printk

2010-08-31 Thread Paulraj, Sandeep


 
 This printk was added recently and results in ugly output on systems
 with no NAND:
 
 NAND:  nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00,
 Chip ID: 0x00 0 MiB
 
 instead of:
 
 NAND:  0 MiB

Scott,

What do you think of this patch?



 
 Signed-off-by: Steve Sakoman st...@sakoman.com
 ---
  drivers/mtd/nand/nand_base.c |2 ++
  1 files changed, 2 insertions(+), 0 deletions(-)
 
 diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
 index ed1c9c9..cbcf2b8 100644
 --- a/drivers/mtd/nand/nand_base.c
 +++ b/drivers/mtd/nand/nand_base.c
 @@ -2653,9 +2653,11 @@ static struct nand_flash_dev
 *nand_get_flash_type(struct mtd_info *mtd,
   }
 
   if (!type) {
 +#ifndef CONFIG_SYS_NAND_QUIET_TEST
   printk(KERN_INFO %s: unknown NAND device: Manufacturer ID:
   0x%02x, Chip ID: 0x%02x\n, __func__,
  *maf_id, dev_id);
 +#endif
   return ERR_PTR(-ENODEV);
   }
 
 --
 1.7.0.4
 

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Re: [U-Boot] [PATCH 00/11] ARMV7: OMAP: Add support for OMAP36XX/37XX, cleanup OMAP3 common code

2010-08-31 Thread Paulraj, Sandeep

 
 On Tue, 2010-08-31 at 16:21 -0700, Steve Sakoman wrote:
  This patch series adds support for TI's OMAP36XX/377XX processors and
  modifies the Beagle and Overo board files to support upcoming versions
  of these boards based upon processors from the OMAP36XX/37XX families.
 
  A number of cleanups and bug fixes to generic OMAP3 code are also
  included since they were discovered during the process of adding this
  support.
 
  This patch depends on the previous series:
 
  ARMV7: OMAP3: Board updates for Beagle and Overo
 
  http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/82805
 
 Both this series and the one mentioned above are also available in the
 omap4-next-upstream branch of my repository:
 
 http://www.sakoman.com/cgi-bin/gitweb.cgi?p=u-
 boot.git;a=shortlog;h=refs/heads/omap4-next-upstream
 
 Steve


Thanks,

I am taking a look at the entire series.

There are a couple of patches which I obviously cannot add by myself.

Sandeep
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Re: [U-Boot] [PATCH 0/2] fix little endian build

2010-08-31 Thread Shinya Kuribayashi
On 8/31/2010 10:36 AM, Shinya Kuribayashi wrote:
 As said in the previous mail the patch is tentative and won't
 work with ELDK, and as fas as I could see nothing has been
 changed since my version.
 
 So I'm overlooking something, will have to think about it.

Oh, I remember now.  The aim of the patch is to make it possible to
generate elf images in both Big- and Little-endian, using only either
mips_4KC- or mips_4KCle- toolchain:

#   CROSS_COMPILE   Target  Expected endianness
--
1   mips_4KC-   dbau1550_config Big-Endian
2   mips_4KCle- dbau1550_config Big-Endian
3   mips_4KC-   dbau1550_el_config  Little-Endian
4   mips_4KCle- dbau1550_el_config  Little-Endian

And option 2) and 3) may not work when using ELDK.
-- 
Shinya Kuribayashi
Renesas Electronics
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[U-Boot] [PATCH v1 1/2] Add CPU and other peripheral support

2010-08-31 Thread tmarri
From: Tirumala Marri tma...@apm.com

APM82XXX is a new line of SoCs which are derivatives of
PPC44X family of processors.

This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB AHB bus, DDR and
Some common register definitions.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 V1:
  * Squash some of the patches.
  * add space between || and \.
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning unused variable in cpu_init.c
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   35 -
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |8 ++-
 arch/powerpc/cpu/ppc4xx/speed.c |   85 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   10 +++-
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 ++
 arch/powerpc/include/asm/ppc4xx-isram.h |8 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   25 +++--
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 include/ppc440.h|   57 -
 include/ppc4xx.h|7 ++-
 11 files changed, 220 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..5fe5d8c 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI)  !defined(CONFIG_IOP480)  \
-!defined(CONFIG_405)  !defined(CONFIG_405EX)
+!defined(CONFIG_405)  !defined(CONFIG_405EX)  \
+!defined(CONFIG_APM82XXX)
 int pci_arbiter_enabled(void)
 {
 #if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM82XXX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd-cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM82XXX)
u32 reg;
 #endif
 
@@ -304,6 +320,8 @@ int checkcpu (void)
 
 #if defined(CONFIG_XILINX_440)
puts(IBM PowerPC 4);
+#elif defined(CONFIG_APM82XXX)
+   puts(APM PowerPC APM82);
 #else
puts(AMCC PowerPC 4);
 #endif
@@ -316,7 +334,7 @@ int checkcpu (void)
 #if defined(CONFIG_440)
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
puts(60);
-#else
+#elif !defined(CONFIG_APM82XXX)
puts(40);
 #endif
 #endif
@@ -598,7 +616,18 @@ int checkcpu (void)
puts(GX Rev. A);
strcpy(addstr, No Security support);
break;
+#if defined(CONFIG_APM82XXX)
+   case PVR_APM82XXX_RA:
+   mfsdr(SDR0_ECID3, reg);
+   if (reg  0x0020)
+   puts(181 Rev. A);
 
+   if (reg  0x0010)
+   strcpy(addstr, No Security support);
+   else
+   strcpy(addstr, Security support);
+   break;
+#endif
case PVR_VIRTEX5:
puts(x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index c04eede..5428909 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -222,13 +222,15 @@ void reconfigure_pll(u32 new_cpu_freq)
 void
 cpu_init_f (void)
 {
-#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX)
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || \
+   defined(CONFIG_460EX)
u32 val;
 #endif
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if (defined(CONFIG_405EP) || defined(CONFIG_405EX))  \
+   !defined(CONFIG_SYS_4xx_GPIO_TABLE)  !defined(CONFIG_APM82XXX)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -384,7 +386,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..b613275 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ 

[U-Boot] [PATCH v1 2/2] APM82xxx: Add bluestone board support

2010-08-31 Thread tmarri
From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM82XXX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 V1:
  * Remove All rights reserved phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.
  * Remove top Makefile change.
---
 MAINTAINERS  |3 +
 MAKEALL  |1 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  162 +++
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   55 
 boards.cfg   |1 +
 include/configs/bluestone.h  |  175 ++
 8 files changed, 489 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b91b0f..263c00b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -253,6 +253,9 @@ Feng Kan f...@amcc.com
 
redwood PPC4xx
 
+Tirumala Marritma...@apm.com
+   bluestone   APM82XXX
+
 Brad Kemp brad.k...@seranoa.com
 
ppmc8260MPC8260
diff --git a/MAKEALL b/MAKEALL
index b34ae33..02d5c17 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx=  \
ASH405  \
bamboo  \
bamboo_nand \
+   bluestone   \
bubinga \
CANBT   \
canyonlands \
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..fbb70e3
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,162 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include ppc440.h
+#include libfdt.h
+#include fdt_support.h
+#include i2c.h
+#include asm/processor.h
+#include asm/io.h
+#include asm/mmu.h
+#include asm/gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+

Re: [U-Boot] UnCorrectable RS-ECC Error occurs when reading NAND flash under u-boot 2009.08 for i.mx25

2010-08-31 Thread dajiang



Scott Wood-2 wrote:
 
 On Fri, 27 Aug 2010 20:35:12 -0700
 
 Could you try it on current U-Boot?  It should already have support for
 i.mx25's NAND controller in drivers/mtd/nand/mxc_nand.c.
 
 I make a simply testing process, what I do is, firstly, I only erase page
 0 of block 0,
 
 You cannot erase only page 0.  You have to erase a whole block at a time.
 
 -Scott
 
 


Thanks Scott,  I think there maybe some abscure expression in my previous
explain about my test process,  In my testing prcess firstly, I erased whole
block 0,then I program only page 0 of block 0. Now I  am trying current
U-Boot  to see if it will work. Thanks very much Scott. 
-- 
View this message in context: 
http://old.nabble.com/-U-Boot--%22UnCorrectable-RS-ECC-Error%22-occurs-when-reading-NAND-flash-under-u-boot-2009.08-for-i.mx25-tp29558415p29590136.html
Sent from the Uboot - Users mailing list archive at Nabble.com.

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Re: [U-Boot] [PATCH 2/4] net: Move Emaclite to NET_MULTI

2010-08-31 Thread Ben Warren
  Hi Michal,

Sorry for the delay in reviewing

On 8/2/2010 5:49 AM, Michal Simek wrote:
 Emaclite was using old net api that's why
 this patch move emaclite to NET_MULTI api.

 Signed-off-by: Michal Simekmon...@monstr.eu
 ---
   drivers/net/xilinx_emaclite.c |   84 
 +++--
   include/netdev.h  |1 +
   2 files changed, 48 insertions(+), 37 deletions(-)

 diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
 index 0820daa..f460525 100644
 --- a/drivers/net/xilinx_emaclite.c
 +++ b/drivers/net/xilinx_emaclite.c
 @@ -26,6 +26,7 @@
   #includecommon.h
   #includenet.h
   #includeconfig.h
 +#includemalloc.h
   #includeasm/io.h

   #undef DEBUG
 @@ -63,26 +64,19 @@
   #define XEL_RSR_RECV_IE_MASK0x0008UL

   typedef struct {
 - unsigned int baseaddress;   /* Base address for device (IPIF) */
 - unsigned int nexttxbuffertouse; /* Next TX buffer to write to */
 - unsigned int nextrxbuffertouse; /* Next RX buffer to read from */
 - unsigned char deviceid; /* Unique ID of device - for future */
 + u32 baseaddress;/* Base address for device (IPIF) */
 + u32 nexttxbuffertouse;  /* Next TX buffer to write to */
 + u32 nextrxbuffertouse;  /* Next RX buffer to read from */
 + uchar deviceid; /* Unique ID of device - for future */
   } xemaclite;

   static xemaclite emaclite;

   static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */

 -/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/
 -#ifdef CONFIG_ENV_IS_NOWHERE
 -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 
 };
 -#else
 -static u8 emacaddr[ENET_ADDR_LENGTH];
 -#endif
 -
 -void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount)
 +static void xemaclite_alignedread (u32 *srcptr, void *destptr, u32 bytecount)
   {
 - unsigned int i;
 + u32 i;
   u32 alignbuffer;
   u32 *to32ptr;
   u32 *from32ptr;
 @@ -107,9 +101,9 @@ void xemaclite_alignedread (u32 * srcptr, void *destptr, 
 unsigned bytecount)
   }
   }

 -void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount)
 +static void xemaclite_alignedwrite (void *srcptr, u32 destptr, u32 bytecount)
   {
 - unsigned i;
 + u32 i;
   u32 alignbuffer;
   u32 *to32ptr = (u32 *) destptr;
   u32 *from32ptr;
 @@ -134,23 +128,16 @@ void xemaclite_alignedwrite (void *srcptr, u32 destptr, 
 unsigned bytecount)
   *to32ptr++ = alignbuffer;
   }

 -void eth_halt (void)
 +static void emaclite_halt(struct eth_device *dev)
   {
   debug (eth_halt\n);
   }

 -int eth_init (bd_t * bis)
 +static int emaclite_init(struct eth_device *dev, bd_t *bis)
   {
 - uchar enetaddr[6];
 -
   debug (EmacLite Initialization Started\n);
   memset (emaclite, 0, sizeof (xemaclite));
 - emaclite.baseaddress = XILINX_EMACLITE_BASEADDR;
 -
 - if (!eth_getenv_enetaddr(ethaddr, enetaddr)) {
 - memcpy(enetaddr, emacaddr, ENET_ADDR_LENGTH);
 - eth_setenv_enetaddr(ethaddr, enetaddr);
 - }
 + emaclite.baseaddress = dev-iobase;

   /*
* TX - TX_PING  TX_PONG initialization
 @@ -158,7 +145,7 @@ int eth_init (bd_t * bis)
   /* Restart PING TX */
   out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0);
   /* Copy MAC address */
 - xemaclite_alignedwrite (enetaddr,
 + xemaclite_alignedwrite (dev-enetaddr,
   emaclite.baseaddress, ENET_ADDR_LENGTH);
   /* Set the length */
   out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
 @@ -171,7 +158,7 @@ int eth_init (bd_t * bis)
   #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
   /* The same operation with PONG TX */
   out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
 - xemaclite_alignedwrite (enetaddr, emaclite.baseaddress +
 + xemaclite_alignedwrite (dev-enetaddr, emaclite.baseaddress +
   XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
   out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
Please consider moving this stuff to a separate function.  If you bind 
it to dev-write_hwaddr(), programming will occur at initialization time.
   out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
 @@ -194,7 +181,7 @@ int eth_init (bd_t * bis)
   return 0;
   }

 -int xemaclite_txbufferavailable (xemaclite * instanceptr)
 +static int xemaclite_txbufferavailable (xemaclite *instanceptr)
   {
   u32 reg;
   u32 txpingbusy;
 @@ -216,12 +203,12 @@ int xemaclite_txbufferavailable (xemaclite * 
 instanceptr)
   return (!(txpingbusy  txpongbusy));
   }

 -int eth_send (volatile void *ptr, int len) {
 -
 - unsigned int reg;
 - unsigned int baseaddress;
 +static int emaclite_send (struct eth_device *dev, volatile void *ptr, int 
 len)
 +{
 + u32 reg;
 + u32 baseaddress;

 - unsigned maxtry = 1000;
 + u32 maxtry = 

[U-Boot] [PATCH] support spi gpio driver by control gpio bitbang

2010-08-31 Thread Donghwa Lee
 This patch adds basic support for spi mode 0~3 by control gpio bitbang.
It uses several gpio pin and emulates spi chipselect signal, clock signal
and sda signal as if spi controller generate spi signal.


Signed-off-by: Donghwa Lee dh09.lee at samsung.com 
http://lists.denx.de/mailman/listinfo/u-boot


---
drivers/spi/spi_gpio.c | 153 
include/spi.h | 27 +
2 files changed, 180 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/spi_gpio.c

diff --git a/drivers/spi/spi_gpio.c b/drivers/spi/spi_gpio.c
new file mode 100644
index 000..cce809e
--- /dev/null
+++ b/drivers/spi/spi_gpio.c
@@ -0,0 +1,153 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * spi_gpio.c - SPI master driver using generic bitbanged GPIO
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include common.h
+#include asm/arch/gpio.h
+#include spi.h
+
+static void spi_gpio_set_sck(struct spi_platform_data *spi, int is_on)
+{
+ gpio_set_value(spi-clk_bank, spi-clk_num, is_on);
+}
+
+static void spi_gpio_set_mosi(struct spi_platform_data *spi, int is_on)
+{
+ gpio_set_value(spi-si_bank, spi-si_num, is_on);
+}
+
+static void spi_gpio_chipselect(struct spi_platform_data *spi,
+ int cpol)
+{
+ gpio_set_value(spi-cs_bank, spi-cs_num,
+ !spi-cs_active);
+
+ /* set initial clock polarity */
+ if (cpol)
+ spi_gpio_set_sck(spi, spi-mode  SPI_CPOL);
+
+ /* SPI is normally active-low */
+ gpio_set_value(spi-cs_bank, spi-cs_num,
+ spi-cs_active);
+}
+
+static void
+spi_gpio_tx_cpha0(struct spi_platform_data *spi,
+ unsigned int nsecs, unsigned int cpol,
+ unsigned int word, unsigned int bits)
+{
+ int i;
+ unsigned int data;
+
+ data = (word  spi-word_len) + bits;
+
+ spi_gpio_chipselect(spi, cpol);
+
+ /* clock starts at inactive polarity */
+ for (i = spi-word_len; i = 0; i--) {
+
+ /* data high or low */
+ if ((data  i)  0x1)
+ spi_gpio_set_mosi(spi, 1);
+ else
+ spi_gpio_set_mosi(spi, 0);
+
+ udelay(nsecs);
+
+ spi_gpio_set_sck(spi, !cpol);
+ udelay(nsecs);
+
+ spi_gpio_set_sck(spi, cpol);
+ }
+}
+
+static void
+spi_gpio_tx_cpha1(struct spi_platform_data *spi,
+ unsigned int nsecs, unsigned int cpol,
+ unsigned int word, unsigned int bits)
+{
+ int i;
+ unsigned int data;
+
+ data = (word  spi-word_len) + bits;
+
+ spi_gpio_chipselect(spi, cpol);
+
+ /* clock starts at inactive polarity */
+ for (i = spi-word_len; i = 0; i--) {
+
+ /* setup MSB (to slave) on leading edge */
+ spi_gpio_set_sck(spi, !cpol);
+
+ /* data high or low */
+ if ((data  i)  0x1)
+ spi_gpio_set_mosi(spi, 1);
+ else
+ spi_gpio_set_mosi(spi, 0);
+
+ udelay(nsecs);
+
+ spi_gpio_set_sck(spi, cpol);
+ udelay(nsecs);
+ }
+}
+
+static void spi_gpio_tx_word_mode0(struct spi_platform_data *spi,
+ unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+ return spi_gpio_tx_cpha0(spi, nsecs, 0, word, bits);
+}
+
+static void spi_gpio_tx_word_mode1(struct spi_platform_data *spi,
+ unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+ return spi_gpio_tx_cpha1(spi, nsecs, 0, word, bits);
+}
+
+static void spi_gpio_tx_word_mode2(struct spi_platform_data *spi,
+ unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+ return spi_gpio_tx_cpha0(spi, nsecs, 1, word, bits);
+}
+
+static void spi_gpio_tx_word_mode3(struct spi_platform_data *spi,
+ unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+ return spi_gpio_tx_cpha1(spi, nsecs, 1, word, bits);
+}
+
+void spi_gpio_write(struct spi_platform_data *spi,
+ unsigned int address, unsigned int command)
+{
+ switch (spi-mode) {
+ case SPI_MODE_0:
+ spi_gpio_tx_word_mode0(spi,
+ 1, address, command);
+ case SPI_MODE_1:
+ spi_gpio_tx_word_mode1(spi,
+ 1, address, command);
+ case SPI_MODE_2:
+ spi_gpio_tx_word_mode2(spi,
+ 1, address, command);
+ case SPI_MODE_3:
+ spi_gpio_tx_word_mode3(spi,
+ 1, address, command);
+ }
+}
diff --git a/include/spi.h b/include/spi.h
index 320e50e..ef3f94d 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -62,6 +62,33 @@ struct spi_slave {
unsigned int cs;
};

+#define COMMAND_ONLY 0xFE
+#define DATA_ONLY 0xFF
+#define ACTIVE_LOW 0
+#define ACTIVE_HIGH 1
+
+
+struct spi_platform_data {
+ struct s5p_gpio_bank *cs_bank;
+ struct s5p_gpio_bank *clk_bank;
+ struct s5p_gpio_bank *si_bank;
+ struct s5p_gpio_bank *so_bank;
+
+ unsigned int cs_num;