Re: [U-Boot] Memory size detection on P1011
Hi York, On 05/05/2011 10:43 PM, Wolfgang Denk wrote: > Dear Felix Radensky, > > In message<4dc2f72f.2050...@embedded-sol.com> you wrote: >> The closest example of using get_ram_size() I've found is >> for MPC8548 TQM boards. But all these boards have 4-bank >> memory devices, so I'm sure my case was tested. Don't you >> think there can be a problem with reprogramming bank number >> in this particular DDR controller ? > I haven't done this myself yet on this hardware, but I would be very > surprised if you could not reprogram the controller. > > Can you please clarify this for me. If I understand you correctly, the number of banks cannot be changed after DDR controller was initialized. Is my understanding correct ? Thanks a lot. Felix. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/1] Fix hang when entering udelay after GPTIMER2 overflows (about 22 minutes on AM37x)
From: Rick Bronson
Signed-off-by: Rick Bronson
---
arch/arm/cpu/armv7/omap-common/timer.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/timer.c
b/arch/arm/cpu/armv7/omap-common/timer.c
index 9beebb1..3c9d488 100644
--- a/arch/arm/cpu/armv7/omap-common/timer.c
+++ b/arch/arm/cpu/armv7/omap-common/timer.c
@@ -44,7 +44,7 @@ static struct gptimer *timer_base = (struct gptimer
*)CONFIG_SYS_TIMERBASE;
*/
#define TIMER_CLOCK(V_SCLK / (2 << CONFIG_SYS_PTV))
-#define TIMER_LOAD_VAL 0x
+#define TIMER_LOAD_VAL 0 /* counter starts from 0 on reload */
int timer_init(void)
{
--
1.7.4.4
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Re: [U-Boot] RFC: auto-generate ARM mach-types.h file from ARM machine database
On Thu, May 5, 2011 at 17:48, Michael Schwingen wrote:
> --- a/Makefile
> +++ b/Makefile
> @@ -469,7 +469,7 @@ $(obj)System.map: $(obj)u-boot
> # This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
> # the dep file is only include in this top level makefile to determine when
> # to regenerate the autoconf.mk file.
> -$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
> +$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
> $(obj)include/asm/mach-types.h
> @$(XECHO) Generating $@ ; \
> set -e ; \
> : Generate the dependancies ; \
> @@ -530,13 +530,18 @@ unconfig:
> $(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
> $(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep
>
> -%_config:: unconfig
> +%_config:: unconfig $(obj)include/asm/mach-types.h
> @$(MKCONFIG) -A $(@:_config=)
>
> sinclude $(obj).boards.depend
> $(obj).boards.depend: boards.cfg
> awk '(NF && $$1 !~ /^#/) { print $$1 ": " $$1 "_config; $$(MAKE)" }'
> $< > $@
>
> +
> +$(obj)include/asm/mach-types.h: arch/arm/tools/gen-mach-types
> arch/arm/tools/mach-types
> + @mkdir -p $(obj)include/asm
> + awk -f $^ > $@ || { rm -f $@; /bin/false; }
> +
> #
> # Functions to generate common board directory names
> #
this all belongs in arch/arm/config.mk and not the toplevel makefile
also, dont hardcode full paths to things. there's no reason for it.
might want to add an "update-mach-types" target so people can type
`make update-mach-types` and it'll automatically wget the right file
to the right place ...
-mike
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[U-Boot] T4,T5,T8 tube factory from china
Dear Purchase manager, This is Peter from Top East China Industry Limited. We are pleased to get to konw that you are presently on the market for Saving energy lamp. Now we have new Saving energy lamp.Such as 2U,3U,4U , T4,T5,T8 tube and so on. If you interested,please load our website: www.luckfirst.com We avail ourselves of this opportunity to write to you and see if we can establish business relations with you. We've been exporter and manufacturer of Saving energy lamp for many years. Looking forward to hearing from you. -- Peter Tong Top East China Industry Limited www.ledbulb.co.cc www.luckfirst.com Tel:86-574-87117437 Fax:86-574-56877009 Email:light.trad...@gmail.com MSN:light_trad...@hotmail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2] powerpc/mpc8xxx: reword max tCKmin message
Reword "The DIMM max tCKmin is ..." to "The DDR clock is faster than the slowest
DIMM(s) can support". Fixed interger type in printf as well.
Signed-off-by: York Sun
---
.../cpu/mpc8xxx/ddr/lc_common_dimm_params.c|6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index 00f3d6c..8132e68 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -38,9 +38,9 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
}
/* validate if the memory clk is in the range of dimms */
if (mclk_ps < tCKmin_X_ps) {
- printf("The DIMM max tCKmin is %d ps,"
- "doesn't support the MCLK cycle %d ps\n",
- tCKmin_X_ps, mclk_ps);
+ printf("DDR clock (MCLK cycle %u ps) is faster than "
+ "the slowest DIMM(s) (tCKmin %u ps) can support.\n",
+ mclk_ps, tCKmin_X_ps);
return 1;
}
/* determine the acutal cas latency */
--
1.7.0.4
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Re: [U-Boot] [PATCH] powerpc/mpc8xxx: reword max tCKmin message
On Thu, 2011-05-05 at 10:04 -0500, Timur Tabi wrote: > Kumar Gala wrote: > >>> >> That still needs some work, IMHO. I think you might need the word > >>> >> "which" before "doesn't". However, even with that, it's not clear > >>> >> what's wrong. Where does the bad value of "mclk_ps" come from? > >>> >> > >> > > >> > It happens when the actually DDR clock is faster than the slowest DIMM > >> > can support. > >> > > >> > York > > Did you guys agree on wording? Is the patch ok or needs changing? > > I haven't seen an updated patch from York. I'd like to see the addition of > text > like, "It happens when the actually DDR clock is faster than the slowest DIMM > can support." People need to know what to fix, not just what's wrong. > > Also, %d is for signed integers, not unsigned. > I will update the patch according to Timur's suggestion. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] RFC: auto-generate ARM mach-types.h file from ARM machine database
Hi,
to conclude the discussion in the thread "Re: [U-Boot] Update and Cut down
mach types", I tried a short patch that demonstrates how to automatically
generate the mach-types.h file from a database dump (from
http://www.arm.linux.org.uk/developer/machines/?action=new).
This has multiple advantages:
- pulling in new machine types is easier (drop in a new downloaded database
dump), and produces a much smaller diff.
- adding new machines is decoupled from the time they appear in Linux.
- boards that are not in mainline Linux will not be break due to removal of
their mach types from the Linux headers.
The AWK and Makefile fragment script is taken verbatim from Linux 2.6.38.3.
I think the AWK script is simple enough that it will not require big
maintenance efforts (unless the machine database format changes).
The patch is edited down - I removed the diff for the deletion of the old
mach-types.h file, and shortened the new mach-types file to a few entries
just to show the concept - otherwise, the patch would be much too big for
the list.
Is this an acceptable solution? Should I go on and produce a full-fledged
patch?
cu
Michael
>From 2cb8bfd1b387a4a49d9e0cebd96824c879000420 Mon Sep 17 00:00:00 2001
From: Michael Schwingen
Date: Thu, 5 May 2011 23:04:00 +0200
Subject: [ARM: auto-generate mach-types.h 1/1] auto-generate mach-types.h
include file from ARM machine database dump
Signed-off-by: Michael Schwingen
based directly on Makefile/script from Linux-2.8.38.3
---
Makefile |9 +-
arch/arm/include/asm/mach-types.h |42924 -
arch/arm/tools/gen-mach-types | 72 +
arch/arm/tools/mach-types | 3448 +++
4 files changed, 3527 insertions(+), 42926 deletions(-)
delete mode 100644 arch/arm/include/asm/mach-types.h
create mode 100644 arch/arm/tools/gen-mach-types
create mode 100644 arch/arm/tools/mach-types
diff --git a/Makefile b/Makefile
index 384a59e..07ab7fb 100644
--- a/Makefile
+++ b/Makefile
@@ -469,7 +469,7 @@ $(obj)System.map: $(obj)u-boot
# This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
# the dep file is only include in this top level makefile to determine when
# to regenerate the autoconf.mk file.
-$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
+$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
$(obj)include/asm/mach-types.h
@$(XECHO) Generating $@ ; \
set -e ; \
: Generate the dependancies ; \
@@ -530,13 +530,18 @@ unconfig:
$(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep
-%_config:: unconfig
+%_config:: unconfig $(obj)include/asm/mach-types.h
@$(MKCONFIG) -A $(@:_config=)
sinclude $(obj).boards.depend
$(obj).boards.depend: boards.cfg
awk '(NF && $$1 !~ /^#/) { print $$1 ": " $$1 "_config; $$(MAKE)" }' $<
> $@
+
+$(obj)include/asm/mach-types.h: arch/arm/tools/gen-mach-types
arch/arm/tools/mach-types
+ @mkdir -p $(obj)include/asm
+ awk -f $^ > $@ || { rm -f $@; /bin/false; }
+
#
# Functions to generate common board directory names
#
diff --git a/arch/arm/include/asm/mach-types.h
b/arch/arm/include/asm/mach-types.h
deleted file mode 100644
diff --git a/arch/arm/tools/gen-mach-types b/arch/arm/tools/gen-mach-types
new file mode 100644
index 000..04fef71
--- /dev/null
+++ b/arch/arm/tools/gen-mach-types
@@ -0,0 +1,72 @@
+#!/bin/awk
+#
+# Awk script to generate include/generated/mach-types.h
+#
+BEGIN { nr = 0 }
+/^#/ { next }
+/^[]*$/ { next }
+
+NF == 4 {
+ machine_is[nr] = "machine_is_"$1;
+ config[nr] = "CONFIG_"$2;
+ mach_type[nr] = "MACH_TYPE_"$3;
+ num[nr] = $4; nr++
+ }
+
+NF == 3 {
+ machine_is[nr] = "machine_is_"$1;
+ config[nr] = "CONFIG_"$2;
+ mach_type[nr] = "MACH_TYPE_"$3;
+ num[nr] = ""; nr++
+ }
+
+
+END{
+ printf("/*\n");
+ printf(" * This was automagically generated from %s!\n", FILENAME);
+ printf(" * Do NOT edit\n");
+ printf(" */\n\n");
+ printf("#ifndef __ASM_ARM_MACH_TYPE_H\n");
+ printf("#define __ASM_ARM_MACH_TYPE_H\n\n");
+ printf("#ifndef __ASSEMBLY__\n");
+ printf("/* The type of machine we're running on */\n");
+ printf("extern unsigned int __machine_arch_type;\n");
+ printf("#endif\n\n");
+
+ printf("/* see arch/arm/kernel/arch.c for a description of these
*/\n");
+ for (i = 0; i < nr; i++)
+ if (num[i] ~ /..*/)
+ printf("#define %-30s %d\n", mach_type[i], num[i]);
+
+ printf("\n");
+
+ for (i = 0; i < nr; i++)
+ if (num[i] ~ /..*/) {
+ printf("#ifdef %s\n", config[i]);
+ printf("# ifdef machine_arch_type\n");
+ printf("# undef machine_arch_type\n");
+ pri
[U-Boot] building uncompressed image
I am a bit confused with mkimage. I am trying to build and boot an uncompressed image for a ppc8323. I can run mkimage with a "-C none" option and get a 3.6Mbyte kernel (compressed it is about 1.6MBytes), but when I boot it with bootm, I hang after loading the device tree near 0x03ff. It certainly may be possible that the larger, uncompressed kernel is stepping on the ram location of the device tree, but I dont yet know now to manipulate the address where the fdt is loaded. I try to use mkimage with a .its file, but mkimage doesnt seem to accept the "-f device.its" argument where I define the kernel and the device tree .dtb file. I would appreciate a few pointers on how one might get an uncompressed image booting in u-boot and if possible, I would like to understand and use the "-x" for xip option. -- Charles Krinke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] boot-up time optimization. Where to start?
On Thu, May 5, 2011 at 11:10 AM, Charles Manning wrote: > On Thursday 05 May 2011 17:32:20 Wolfgang Denk wrote: > > Dear Alexander Stein, > > > > In message <201105030848.17576.alexander.st...@systec-electronic.com> > you > wrote: > > > This specific version was selected due to relocation problems on ARM. > But > > > I expect the dcache doesn't have that big influence on the named code > > > part as the environment is already in RAM. > > > > Your expectation is most likely completely wrong. Reading from / > > writing to uncached RAM is painfully slow compared to a system with > > caches turned on. And if you - as I speculate - need to checksum a > > huge amount of data, this will delay things without need. > > Caching has a huge effect on **all** code and is the first thing I'd play > with > in trying to speed things up. > Yes agreed. Running U-Boot without caching is a great way to slow boot time. In fact we should turn on the L2 cache if there is one. > > I have been doing some stuff to speed omap3 booting. It was taking approx 4 > seconds from power up until the kernel started spewing boot messages. That > is > now down to less than 2 secs (including the funky omap3 romboot time, > loading > uboot from NAND and then loading the kernel from NAND). Only difference was > turning on caching in uboot using the caching commands. > I have a Seaboard (Tegra2) networking booting using a USB dongle in about 5s with console output, about 3s of which is USB and PHY delay. Turning off caching adds several seconds mainly because the tftp is so much slower. The same would apply for any boot medium. I have a patch which displays boot time in microseconds if it is of interest to anyone: Timer summary in microseconds: MarkElapsed Stage 0 0 awake 193,298193,298 usb_start 1,342,411 1,149,113 eth_start 3,767,039 2,424,628 bootp_start 3,790,121 23,082 bootp_stop 3,790,293172 tftp start 4,761,459971,166 tftp done 4,761,489 30 bootm_start 4,892,145130,656 start_kernel Regards, Simon > -- Charles > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 4/5] Put common autoload code into auto_load() function
On Thu, May 5, 2011 at 12:48 PM, Wolfgang Denk wrote: > Dear Mike Frysinger, > > > put the TftpStart into a new else, then there's no need for the inline > > "return" ... > > I disagree here. As is, we save one level of nesting, which is > always a good thing. > > On contrary, the "else" in the CONFIG_CMD_NFS should be dropped as > well, i. e. let's make this: > > ... > > Best regards, > > Wolfgang Denk > OK I will do that instead. Regards, Simon > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de > "We learn from history that we learn nothing from history." > - George Bernard Shaw > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please help debugging continuous loop
Hi folks, I was fortunate enough to resuscitate my DNS323 (Feroceon board) after flashing a dodgy image to it. Now I am trying to get it working in RAM first, before writing it to flash. I have configured CONFIG_SYS_TEXT_BASE to be 0x300, I then use OpenOCD to load the u-boot.bin file to that location, and start it using "resume 0x300". Unfortunately, it seems to get into an endless loop: > halt target state: halted target halted in ARM state due to debug-request, current mode: Supervisor cpsr: 0x60d3 pc: 0x030123a4 MMU: disabled, D-Cache: disabled, I-Cache: disabled > arm disassemble 0x030123a4 0x030123a4 0xe3130020 TST r3, #0x20 > step target state: halted target halted in ARM state due to single-step, current mode: Supervisor cpsr: 0x60d3 pc: 0x030123a8 MMU: disabled, D-Cache: disabled, I-Cache: disabled > arm disassemble 0x030123a8 0x030123a8 0x0afc BEQ 0x030123a0 > step target state: halted target halted in ARM state due to single-step, current mode: Supervisor cpsr: 0x60d3 pc: 0x030123a0 MMU: disabled, D-Cache: disabled, I-Cache: disabled > arm disassemble 0x030123a0 0x030123a0 0xe5d03014 LDRB r3, [r0, #0x14] > resume > halt target state: halted target halted in ARM state due to debug-request, current mode: Supervisor cpsr: 0x60d3 pc: 0x030123a4 MMU: disabled, D-Cache: disabled, I-Cache: disabled > It is apparently waiting for something to be equal to 0x20 before continuing. How can I determine which u-boot code this is, and what it is waiting for? I have tried connecting with gdb, but I can only step for a short distance before it gives problems setting the breakpoint: 0x0300 in ?? () (arm-gdb)stepi Program received signal SIGINT, Interrupt. 0x0354 in ?? () (arm-gdb)stepi Program received signal SIGINT, Interrupt. 0x0358 in ?? () (arm-gdb)symbol-file u-boot-standalone-0x300 Reading symbols from /home/rogan/openocd/u-boot-standalone-0x300...BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 37 >= 0 for section `' BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 1 >= 0 for section `' BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 94 >= 0 for section `' BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 20 >= 0 for section `' BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 82 >= 0 for section `' BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 67 >= 0 for section `' BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 32 >= 0 for section `' BFD: /home/rogan/openocd/u-boot-standalone-0x300: invalid string offset 53 >= 0 for section `' done. (arm-gdb)stepi Program received signal SIGINT, Interrupt. reset () at start.S:167 167 orr r0,r0,#0xd3 Current language: auto; currently asm (arm-gdb)stepi Program received signal SIGINT, Interrupt. reset () at start.S:168 168 msr cpsr,r0 (arm-gdb) Program received signal SIGINT, Interrupt. reset () at start.S:175 175 bl cpu_init_crit (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:323 323 mov r0, #0 (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:324 324 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:325 325 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:330 330 mrc p15, 0, r0, c1, c0, 0 (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:331 331 bic r0, r0, #0x2300 /* clear bits 13, 9:8 (--V- --RS) */ (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:332 332 bic r0, r0, #0x0087 /* clear bits 7, 2:0 (B--- -CAM) */ (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:333 333 orr r0, r0, #0x0002 /* set bit 2 (A) Align */ (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:334 334 orr r0, r0, #0x1000 /* set bit 12 (I) I-Cache */ (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:335 335 mcr p15, 0, r0, c1, c0, 0 (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:340 340 mov ip, lr /* perserve link reg across call */ (arm-gdb) Program received signal SIGINT, Interrupt. cpu_init_crit () at start.S:341 341 bl lowlevel_init /* go setup pll,mux,memory */ (arm-gdb) Program received signal SIGINT, Interrupt. lowlevel_init () at lowlevel_init.S:90 90 ldr r4, =ORION5X_REGS_PHY_BASE (arm-gdb) Program receiv
Re: [U-Boot] [PATCH v6 4/5] Put common autoload code into auto_load() function
Dear Mike Frysinger,
In message you wrote:
> On Thu, May 5, 2011 at 12:52, Simon Glass wrote:
> > +static void auto_load(void)
> > +{
> > + char *s = getenv("autoload");
>
> const char *s
Agreed.
> > + if (s != NULL) {
> > + if (*s == 'n') {
> > + /*
> > +* Just use BOOTP to configure system;
> > +* Do not use TFTP to load the bootfile.
> > +*/
> > + NetState = NETLOOP_SUCCES> S;
> > + return;
> > +#if defined(CONFIG_CMD_NFS)
> > + } else if (strcmp(s, "NFS") == 0) {
> > + /*
> > +* Use NFS to load the bo> otfile.
> > +*/
> > + NfsStart();
> > + return;
> > +#endif
> > + }
> > + }
> > +
> > + TftpStart();
>
> put the TftpStart into a new else, then there's no need for the inline
> "return" ...
I disagree here. As is, we save one level of nesting, which is
always a good thing.
On contrary, the "else" in the CONFIG_CMD_NFS should be dropped as
well, i. e. let's make this:
+ if (s != NULL) {
+ if (*s == 'n') {
+ /*
+* Just use BOOTP to configure system;
+* Do not use TFTP to load the bootfile.
+*/
+ NetState = NETLOOP_SUCCES> S;
+ return;
+ }
+#if defined(CONFIG_CMD_NFS)
+ if (strcmp(s, "NFS") == 0) {
+ /*
+* Use NFS to load the bootfile.
+*/
+ NfsStart();
+ return;
}
+#endif
+ }
+
+ TftpStart();
Best regards,
Wolfgang Denk
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
"We learn from history that we learn nothing from history."
- George Bernard Shaw
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Re: [U-Boot] Memory size detection on P1011
Dear Felix Radensky, In message <4dc2f72f.2050...@embedded-sol.com> you wrote: > > The closest example of using get_ram_size() I've found is > for MPC8548 TQM boards. But all these boards have 4-bank > memory devices, so I'm sure my case was tested. Don't you > think there can be a problem with reprogramming bank number > in this particular DDR controller ? I haven't done this myself yet on this hardware, but I would be very surprised if you could not reprogram the controller. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You might not be as stupid as you look. This is not hard. Let's think about this. I mean ... I'll think about this, and you can join in when you know the words. - Terry Pratchett, _Men at Arms_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 4/5] Put common autoload code into auto_load() function
On Thu, May 5, 2011 at 12:29 PM, Mike Frysinger wrote:
> On Thu, May 5, 2011 at 12:52, Simon Glass wrote:
> > +static void auto_load(void)
> > +{
> > + char *s = getenv("autoload");
>
> const char *s
>
> > + if (s != NULL) {
> > + if (*s == 'n') {
> > + /*
> > +* Just use BOOTP to configure system;
> > +* Do not use TFTP to load the bootfile.
> > +*/
> > + NetState = NETLOOP_SUCCESS;
> > + return;
> > +#if defined(CONFIG_CMD_NFS)
> > + } else if (strcmp(s, "NFS") == 0) {
> > + /*
> > +* Use NFS to load the bootfile.
> > +*/
> > + NfsStart();
> > + return;
> > +#endif
> > + }
> > + }
> > +
> > + TftpStart();
>
> put the TftpStart into a new else, then there's no need for the inline
> "return" ...
> -mike
>
Will do.
___
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[U-Boot] [PATCH v2 5/7] Tegra2: Use clock and pinmux functions to simplify code
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/tegra2/ap20.c | 47 +---
arch/arm/include/asm/arch-tegra2/clk_rst.h | 39 ++-
board/nvidia/common/board.c| 13 ---
3 files changed, 25 insertions(+), 74 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index a9bfd6a..7da00cd 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -24,6 +24,7 @@
#include "ap20.h"
#include
#include
+#include
#include
#include
#include
@@ -40,23 +41,22 @@ void init_pllx(void)
u32 reg;
/* If PLLX is already enabled, just return */
- reg = readl(&pll->pll_base);
- if (reg & PLL_ENABLE_BIT)
+ if (bf_readl(PLL_ENABLE, &pll->pll_base))
return;
/* Set PLLX_MISC */
- reg = CPCON;/* CPCON[11:8] = 0001 */
+ reg = bf_pack(PLL_CPCON, 1);
writel(reg, &pll->pll_misc);
/* Use 12MHz clock here */
- reg = (PLL_BYPASS_BIT | PLL_DIVM_VALUE);
- reg |= (1000 << 8); /* DIVN = 0x3E8 */
+ reg = bf_pack(PLL_BYPASS, 1) | bf_pack(PLL_DIVM, 12);
+ reg |= bf_pack(PLL_DIVN, 1000);
writel(reg, &pll->pll_base);
- reg |= PLL_ENABLE_BIT;
+ reg |= bf_pack(PLL_ENABLE, 1);
writel(reg, &pll->pll_base);
- reg &= ~PLL_BYPASS_BIT;
+ reg &= ~bf_mask(PLL_BYPASS);
writel(reg, &pll->pll_base);
}
@@ -90,17 +90,12 @@ static void enable_cpu_clock(int enable)
* always stop the clock to CPU 1.
*/
clk = readl(&clkrst->crc_clk_cpu_cmplx);
- clk |= CPU1_CLK_STP;
-
- if (enable) {
- /* Unstop the CPU clock */
- clk &= ~CPU0_CLK_STP;
- } else {
- /* Stop the CPU clock */
- clk |= CPU0_CLK_STP;
- }
+ clk |= bf_pack(CPU1_CLK_STP, 1);
+ /* Stop/Unstop the CPU clock */
+ bf_update(CPU0_CLK_STP, clk, enable == 0);
writel(clk, &clkrst->crc_clk_cpu_cmplx);
+
clock_enable(PERIPH_ID_CPU);
}
@@ -176,9 +171,6 @@ static void enable_cpu_power_rail(void)
static void reset_A9_cpu(int reset)
{
- struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- u32 cpu;
-
/*
* NOTE: Regardless of whether the request is to hold the CPU in reset
*or take it out of reset, every processor in the CPU complex
@@ -187,19 +179,10 @@ static void reset_A9_cpu(int reset)
*are multiple processors in the CPU complex.
*/
- /* Hold CPU 1 in reset */
- cpu = SET_DBGRESET1 | SET_DERESET1 | SET_CPURESET1;
- writel(cpu, &clkrst->crc_cpu_cmplx_set);
-
- if (reset) {
- /* Now place CPU0 into reset */
- cpu |= SET_DBGRESET0 | SET_DERESET0 | SET_CPURESET0;
- writel(cpu, &clkrst->crc_cpu_cmplx_set);
- } else {
- /* Take CPU0 out of reset */
- cpu = CLR_DBGRESET0 | CLR_DERESET0 | CLR_CPURESET0;
- writel(cpu, &clkrst->crc_cpu_cmplx_clr);
- }
+ /* Hold CPU 1 in reset, and CPU 0 if asked */
+ reset_cmplx_set_enable(1, crc_rst_cpu | crc_rst_de | crc_rst_debug, 1);
+ reset_cmplx_set_enable(0, crc_rst_cpu | crc_rst_de | crc_rst_debug,
+ reset);
/* Enable/Disable master CPU reset */
reset_set_enable(PERIPH_ID_CPU, reset);
diff --git a/arch/arm/include/asm/arch-tegra2/clk_rst.h
b/arch/arm/include/asm/arch-tegra2/clk_rst.h
index f51300e..a8c6fb3 100644
--- a/arch/arm/include/asm/arch-tegra2/clk_rst.h
+++ b/arch/arm/include/asm/arch-tegra2/clk_rst.h
@@ -141,42 +141,9 @@ struct clk_rst_ctlr {
uint crc_cpu_cmplx_clr; /* _CPU_CMPLX_CLR_0,0x344 */
};
-#define PLL_BYPASS_BIT (1 << 31)
-#define PLL_ENABLE_BIT (1 << 30)
-#define PLL_BASE_OVRRIDE_BIT (1 << 28)
-#define PLL_DIVP_VALUE (1 << 20) /* post divider, b22:20 */
-#define PLL_DIVM_VALUE 0x0C/* input divider, b4:0 */
-
-#define SWR_UARTD_RST (1 << 1)
-#define CLK_ENB_UARTD (1 << 1)
-#define SWR_UARTA_RST (1 << 6)
-#define CLK_ENB_UARTA (1 << 6)
-
-#define SWR_CPU_RST(1 << 0)
-#define CLK_ENB_CPU(1 << 0)
-#define SWR_CSITE_RST (1 << 9)
-#define CLK_ENB_CSITE (1 << 9)
-
-#define SET_CPURESET0 (1 << 0)
-#define SET_DERESET0 (1 << 4)
-#define SET_DBGRESET0 (1 << 12)
-
-#define SET_CPURESET1 (1 << 1)
-#define SET_DERESET1 (1 << 5)
-#define SET_DBGRESET1 (1 << 13)
-
-#define CLR_CPURESET0 (1 << 0)
-#define CLR_DERESET0 (1 << 4)
-#define CLR_DBGRESET0 (1 << 12)
-
-#define CLR_CPURESET1 (1 << 1)
-#define CLR_DERESET1 (1 << 5)
-#define CLR_DBGRESET1
[U-Boot] [PATCH v2 4/7] Tegra2: add additional pin multiplexing features
This adds an enum for each pin and some functions for changing the pin
muxing setup.
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/tegra2/Makefile|2 +-
arch/arm/cpu/armv7/tegra2/pinmux.c| 54 ++
arch/arm/include/asm/arch-tegra2/pinmux.h | 156 +++--
board/nvidia/common/board.c | 10 +--
4 files changed, 207 insertions(+), 15 deletions(-)
create mode 100644 arch/arm/cpu/armv7/tegra2/pinmux.c
diff --git a/arch/arm/cpu/armv7/tegra2/Makefile
b/arch/arm/cpu/armv7/tegra2/Makefile
index b35764c..f673f03 100644
--- a/arch/arm/cpu/armv7/tegra2/Makefile
+++ b/arch/arm/cpu/armv7/tegra2/Makefile
@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
-COBJS := ap20.o board.o clock.o sys_info.o timer.o
+COBJS := ap20.o board.o clock.o pinmux.o sys_info.o timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/tegra2/pinmux.c
b/arch/arm/cpu/armv7/tegra2/pinmux.c
new file mode 100644
index 000..f00fd7c
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra2/pinmux.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Tegra2 pin multiplexing functions */
+
+#include
+#include
+#include
+#include
+#include
+
+
+void pinmux_set_tristate(enum pmux_pin pin, int enable)
+{
+ struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
+ u32 *tri = &pmt->pmt_tri[TRISTATE_REG(pin)];
+ u32 reg;
+
+ reg = readl(tri);
+ if (enable)
+ reg |= TRISTATE_MASK(pin);
+ else
+ reg &= ~TRISTATE_MASK(pin);
+ writel(reg, tri);
+}
+
+void pinmux_tristate_enable(enum pmux_pin pin)
+{
+ pinmux_set_tristate(pin, 1);
+}
+
+void pinmux_tristate_disable(enum pmux_pin pin)
+{
+ pinmux_set_tristate(pin, 0);
+}
+
diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h
b/arch/arm/include/asm/arch-tegra2/pinmux.h
index 8b4bd8d..d4a0812 100644
--- a/arch/arm/include/asm/arch-tegra2/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra2/pinmux.h
@@ -24,6 +24,143 @@
#ifndef _PINMUX_H_
#define _PINMUX_H_
+
+/* Pins which we can set to tristate or normal */
+enum pmux_pin {
+ /* APB_MISC_PP_TRISTATE_REG_A_0 */
+ PIN_ATA,
+ PIN_ATB,
+ PIN_ATC,
+ PIN_ATD,
+ PIN_CDEV1,
+ PIN_CDEV2,
+ PIN_CSUS,
+ PIN_DAP1,
+
+ PIN_DAP2,
+ PIN_DAP3,
+ PIN_DAP4,
+ PIN_DTA,
+ PIN_DTB,
+ PIN_DTC,
+ PIN_DTD,
+ PIN_DTE,
+
+ PIN_GPU,
+ PIN_GPV,
+ PIN_I2CP,
+ PIN_IRTX,
+ PIN_IRRX,
+ PIN_KBCB,
+ PIN_KBCA,
+ PIN_PMC,
+
+ PIN_PTA,
+ PIN_RM,
+ PIN_KBCE,
+ PIN_KBCF,
+ PIN_GMA,
+ PIN_GMC,
+ PIN_SDMMC1,
+ PIN_OWC,
+
+ /* 32: APB_MISC_PP_TRISTATE_REG_B_0 */
+ PIN_GME,
+ PIN_SDC,
+ PIN_SDD,
+ PIN_RESERVED0,
+ PIN_SLXA,
+ PIN_SLXC,
+ PIN_SLXD,
+ PIN_SLXK,
+
+ PIN_SPDI,
+ PIN_SPDO,
+ PIN_SPIA,
+ PIN_SPIB,
+ PIN_SPIC,
+ PIN_SPID,
+ PIN_SPIE,
+ PIN_SPIF,
+
+ PIN_SPIG,
+ PIN_SPIH,
+ PIN_UAA,
+ PIN_UAB,
+ PIN_UAC,
+ PIN_UAD,
+ PIN_UCA,
+ PIN_UCB,
+
+ PIN_RESERVED1,
+ PIN_ATE,
+ PIN_KBCC,
+ PIN_RESERVED2,
+ PIN_RESERVED3,
+ PIN_GMB,
+ PIN_GMD,
+ PIN_DDC,
+
+ /* 64: APB_MISC_PP_TRISTATE_REG_C_0 */
+ PIN_LD0,
+ PIN_LD1,
+ PIN_LD2,
+ PIN_LD3,
+ PIN_LD4,
+ PIN_LD5,
+ PIN_LD6,
+ PIN_LD7,
+
+ PIN_LD8,
+ PIN_LD9,
+ PIN_LD10,
+ PIN_LD11,
+ PIN_LD12,
+ PIN_LD13,
+ PIN_LD14,
+ PIN_LD15,
+
+ PIN_LD16,
+ PIN_LD17,
+ PIN_LHP0,
+ PIN_LHP1,
+ PIN_LHP2,
+ PIN_LVP0,
+ PIN_LVP1,
+ PIN_HDINT,
+
+ PIN_LM0,
+ PIN_LM1,
+ PIN_LVS,
+ PIN_LSC0,
+ PIN_LSC1,
+ PIN_LSCK,
+ PIN_LDC,
+ PIN_LCSN,
+
+ /* 96: APB_MISC_PP_TRISTATE_REG_
[U-Boot] [PATCH v2 1/7] Tegra2: Add bitfield access macros
To use these, set things up like this:
struct uart_ctlr *uart = (struct uart_ctlr *)UART_PA_START;
#define UART_PA_START 0x6700 /* Physical address of UART */
#define UART_FBCON_RANGE 5:3 /* Bit range for the FBCON field */
enum { /* An enum with allowed values */
UART_FBCON_OFF,
UART_FBCON_ON,
UART_FBCON_MULTI,
UART_FBCON_SLAVE,
};
This defines a bit field of 3 bits starting at bit 5 and extending down
to bit 3, i.e. 5:3
Then:
bf_unpack(UART_FBCON)
- return the value of bits 5:3 (shifted down to bits 2:0)
bf_pack(UART_FBCON, 4)
- return a word with that field set to 4 (so in this case (4 << 3))
bf_update(UART_FBCON, word, val)
- update a field within word so that its value is val.
bf_writel(UART_FBCON, 6, &uart->fbcon)
- set the UART's FBCON field to 6
bf_enum_writel(UART_FBCON, MULTI, &uart->fbcon)
- set the UART's FBCON field to MULTI
Signed-off-by: Simon Glass
---
arch/arm/include/asm/arch-tegra2/bitfield.h | 151 ++
test/Makefile | 36
test/bitfield.c | 230 +++
3 files changed, 417 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-tegra2/bitfield.h
create mode 100644 test/Makefile
create mode 100644 test/bitfield.c
diff --git a/arch/arm/include/asm/arch-tegra2/bitfield.h
b/arch/arm/include/asm/arch-tegra2/bitfield.h
new file mode 100644
index 000..6a1bbfa
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra2/bitfield.h
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __TEGRA2_BITFIELD_H
+#define __TEGRA2_BITFIELD_H
+
+/*
+ * Macros for working with bit fields. To use these, set things up like this:
+ *
+ * #define UART_PA_START 0x6700Physical address of UART
+ * #define UART_FBCON_RANGE 5:3 Bit range for the FBCON field
+ * enum { An enum with allowed values
+ * UART_FBCON_OFF,
+ * UART_FBCON_ON,
+ * UART_FBCON_MULTI,
+ * UART_FBCON_SLAVE,
+ * };
+ * struct uart_ctlr *uart = (struct uart_ctlr *)UART_PA_START;
+ *
+ * This defines a bit field of 3 bits starting at bit 5 and extending down
+ * to bit 3, i.e. 5:3
+ *
+ * Then:
+ *bf_unpack(UART_FBCON)
+ * - return the value of bits 5:3 (shifted down to bits 2:0)
+ *
+ *bf_pack(UART_FBCON, 4)
+ * - return a word with that field set to 4 (so in this case (4 << 3))
+ *
+ *bf_update(UART_FBCON, word, val)
+ * - update a field within word so that its value is val.
+ *
+ *bf_enum_writel(UART_FBCON, MULTI, &uart->fbcon)
+ * - set the UART's FBCON field to MULTI
+ *
+ *
+ * Why have bitfield macros?
+ * 1. Reability
+ * 2. Maintainability
+ * 3. Less error prone
+ *
+ * For example, this:
+ *
+ * int RegVal = 0;
+ * RegVal= readl(UsbBase+USB_SUSP_CTRL);
+ * RegVal |= Bit11;
+ * writel(RegVal, UsbBase+USB_SUSP_CTRL);
+ * if(UsbBase == NV_ADDRESS_MAP_USB3_BASE)
+ * {
+ * RegVal = readl(UsbBase+USB_SUSP_CTRL);
+ * RegVal |= Bit12;
+ * writel(RegVal, UsbBase+USB_SUSP_CTRL);
+ * }
+ *
+ * becomes this:
+ *
+ * bitfield_writel(UTMIP_RESET, 1, &usbctlr->susp_ctrl);
+ * if (id == PERIPH_ID_USB3)
+ * bitfield_writel(UTMIP_PHY_ENB, 1, &usbctlr->susp_ctrl);
+ */
+
+/* Returns the low bit of the bitfield */
+#define BITFIELD_LOWBIT(range) ((0 ? range) & 0x1f)
+
+/* Returns the high bit of the bitfield */
+#define BITFIELD_HIGHBIT(range)(1 ? range)
+
+/* Returns the width of the bitfield (in bits) */
+#define BITFIELD_WIDTH(range) \
+ (BITFIELD_HIGHBIT(range) - BITFIELD_LOWBIT(range) + 1)
+
+
+/*
+ * Returns the number of bits the bitfield needs to be shifted left to pack it.
+ * This is just the same as the low bit.
+ */
+#define bf_shift(field)BITFIELD_LOWBIT(field ## _RANGE)
+
+/* Returns the unshifted mask for the field (i.e. LSB of mask is bit 0) */
+#define bf_rawmask(field) (0xul >> \
+ (32 - BITFIELD_WIDTH(field ## _RANGE)))
+
+/* Returns the
[U-Boot] [PATCH v2 2/7] Tegra2: Add microsecond timer functions
These functions provide access to the high resolution microsecond timer
and tidy up a global variable in the code.
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/tegra2/timer.c| 27 +--
arch/arm/include/asm/arch-tegra2/timer.h | 34 ++
2 files changed, 54 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/include/asm/arch-tegra2/timer.h
diff --git a/arch/arm/cpu/armv7/tegra2/timer.c
b/arch/arm/cpu/armv7/tegra2/timer.c
index fb061d0..b69c172 100644
--- a/arch/arm/cpu/armv7/tegra2/timer.c
+++ b/arch/arm/cpu/armv7/tegra2/timer.c
@@ -38,13 +38,12 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
-struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE;
-
/* counter runs at 1MHz */
-#define TIMER_CLK (100)
+#define TIMER_CLK 100
#define TIMER_LOAD_VAL 0x
/* timer without interrupts */
@@ -67,10 +66,10 @@ void set_timer(ulong t)
void __udelay(unsigned long usec)
{
long tmo = usec * (TIMER_CLK / 1000) / 1000;
- unsigned long now, last = readl(&timer_base->cntr_1us);
+ unsigned long now, last = timer_get_us();
while (tmo > 0) {
- now = readl(&timer_base->cntr_1us);
+ now = timer_get_us();
if (last > now) /* count up timer overflow */
tmo -= TIMER_LOAD_VAL - last + now;
else
@@ -82,7 +81,7 @@ void __udelay(unsigned long usec)
void reset_timer_masked(void)
{
/* reset time, capture current incrementer value time */
- gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ);
+ gd->lastinc = timer_get_us() / (TIMER_CLK/CONFIG_SYS_HZ);
gd->tbl = 0;/* start "advancing" time stamp from 0 */
}
@@ -91,7 +90,7 @@ ulong get_timer_masked(void)
ulong now;
/* current tick value */
- now = readl(&timer_base->cntr_1us) / (TIMER_CLK / CONFIG_SYS_HZ);
+ now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ);
if (now >= gd->lastinc) /* normal mode (non roll) */
/* move stamp forward with absolute diff ticks */
@@ -120,3 +119,17 @@ ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}
+
+
+unsigned long timer_get_us(void)
+{
+ struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE;
+
+ return readl(&timer_base->cntr_1us);
+}
+
+unsigned long timer_get_future_us(u32 delay)
+{
+ return timer_get_us() + delay;
+}
+
diff --git a/arch/arm/include/asm/arch-tegra2/timer.h
b/arch/arm/include/asm/arch-tegra2/timer.h
new file mode 100644
index 000..5d5445e
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra2/timer.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Tegra2 timer functions */
+
+#ifndef _TEGRA2_TIMER_H
+#define _TEGRA2_TIMER_H
+
+/* returns the current monotonic timer value in microseconds */
+unsigned long timer_get_us(void);
+
+/* returns what the time will likely be some microseconds into the future */
+unsigned long timer_get_future_us(u32 delay);
+
+#endif
+
--
1.7.3.1
___
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[U-Boot] [PATCH v2 7/7] Tegra2: config: enable network booting
This enables networking booting using a USB dongle plugged into the side
seaboard port.
Signed-off-by: Simon Glass
---
include/configs/seaboard.h |5 +++
include/configs/tegra2-common.h | 66 +--
2 files changed, 68 insertions(+), 3 deletions(-)
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 9c062e8..ffe9114 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -51,4 +51,9 @@
/* Put USB1 in host mode */
#define CONFIG_TEGRA2_USB1_HOST
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_EXTRA_ENV_SETTINGS_COMMON \
+ "board=seaboard\0" \
+
+
#endif /* __CONFIG_H */
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index ae417ea..0b6c928 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -113,6 +113,9 @@
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_EXT2
+/* support USB ethernet adapters */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
/* include default commands */
#include
@@ -123,7 +126,37 @@
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NFS /* NFS support */
-#undef CONFIG_CMD_NET /* network support */
+
+/*
+ * Ethernet support
+ */
+#define CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+/*
+ * BOOTP / TFTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_TFTP_TSIZE
+
+#define CONFIG_IPADDR 10.0.0.2
+#define CONFIG_SERVERIP10.0.0.1
+#define CONFIG_BOOTFILEuImage
+
+/*
+ * We decorate the nfsroot name so that multiple users / boards can easily
+ * share an NFS server:
+ * user - username, e.g. 'frank'
+ * board - board, e.g. 'seaboard'
+ * serial - serial number, e.g. '1234'
+ */
+#define CONFIG_ROOTPATH
"/export/nfsroot-${user}-${board}-${serial#}"
+#define CONFIG_TFTPPATH
"/tftpboot/uImage-${user}-${board}-${serial#}"
/* turn on command-line edit/hist/auto */
#define CONFIG_CMDLINE_EDITING
@@ -133,10 +166,37 @@
#define CONFIG_SYS_NO_FLASH
/* Environment information */
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
"console=ttyS0,115200n8\0" \
- "mem=" TEGRA2_SYSMEM "\0" \
"smpflag=smp\0" \
+ "user=user\0" \
+ "serial#=1\0" \
+ "tftpserverip=172.22.72.144\0" \
+ "nfsserverip=172.22.72.144\0" \
+ "extra_bootargs=\0" \
+ "platform_extras=mem= " TEGRA2_SYSMEM"\0" \
+ "regen_all="\
+ "setenv common_bootargs console=${console} " \
+ "${platform_extras} noinitrd; " \
+ "setenv bootargs ${common_bootargs} ${extra_bootargs} " \
+ "${bootdev_bootargs}\0" \
+ "regen_net_bootargs=setenv bootdev_bootargs " \
+ "dev=/dev/nfs4 rw nfsroot=${nfsserverip}:${rootpath} " \
+ "ip=dhcp; " \
+ "run regen_all\0" \
+ "dhcp_setup=setenv tftppath " CONFIG_TFTPPATH "; " \
+ "setenv rootpath " CONFIG_ROOTPATH "; " \
+ "setenv autoload n; " \
+ "run regen_net_bootargs\0" \
+ "dhcp_boot=run dhcp_setup; " \
+ "bootp; tftpboot ${loadaddr} ${tftpserverip}:${tftppath}; " \
+ "bootm ${loadaddr}\0" \
+
+#define CONFIG_BOOTCOMMAND \
+ "usb start; "\
+ "if test ${ethact} != \"\"; then "\
+ "run dhcp_boot ; " \
+ "fi ; " \
#define CONFIG_LOADADDR0x408000/* def. location for
kernel */
#define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
--
1.7.3.1
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[U-Boot] [PATCH v2 3/7] Tegra2: Add more clock support
This adds functions to enable/disable clocks and reset to on-chip peripherals.
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/tegra2/Makefile |2 +-
arch/arm/cpu/armv7/tegra2/ap20.c | 57 ++
arch/arm/cpu/armv7/tegra2/clock.c | 163 +
arch/arm/include/asm/arch-tegra2/clk_rst.h | 100 ++-
arch/arm/include/asm/arch-tegra2/clock.h | 264
board/nvidia/common/board.c| 52 ++
6 files changed, 518 insertions(+), 120 deletions(-)
create mode 100644 arch/arm/cpu/armv7/tegra2/clock.c
create mode 100644 arch/arm/include/asm/arch-tegra2/clock.h
diff --git a/arch/arm/cpu/armv7/tegra2/Makefile
b/arch/arm/cpu/armv7/tegra2/Makefile
index f1ea915..b35764c 100644
--- a/arch/arm/cpu/armv7/tegra2/Makefile
+++ b/arch/arm/cpu/armv7/tegra2/Makefile
@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
-COBJS := ap20.o board.o sys_info.o timer.o
+COBJS := ap20.o board.o clock.o sys_info.o timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index 60dd5df..a9bfd6a 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -35,33 +36,34 @@ u32 s_first_boot = 1;
void init_pllx(void)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+ struct clk_pll *pll = &clkrst->crc_pll[CLOCK_PLL_ID_XCPU];
u32 reg;
/* If PLLX is already enabled, just return */
- reg = readl(&clkrst->crc_pllx_base);
- if (reg & PLL_ENABLE)
+ reg = readl(&pll->pll_base);
+ if (reg & PLL_ENABLE_BIT)
return;
/* Set PLLX_MISC */
reg = CPCON;/* CPCON[11:8] = 0001 */
- writel(reg, &clkrst->crc_pllx_misc);
+ writel(reg, &pll->pll_misc);
/* Use 12MHz clock here */
- reg = (PLL_BYPASS | PLL_DIVM);
+ reg = (PLL_BYPASS_BIT | PLL_DIVM_VALUE);
reg |= (1000 << 8); /* DIVN = 0x3E8 */
- writel(reg, &clkrst->crc_pllx_base);
+ writel(reg, &pll->pll_base);
- reg |= PLL_ENABLE;
- writel(reg, &clkrst->crc_pllx_base);
+ reg |= PLL_ENABLE_BIT;
+ writel(reg, &pll->pll_base);
- reg &= ~PLL_BYPASS;
- writel(reg, &clkrst->crc_pllx_base);
+ reg &= ~PLL_BYPASS_BIT;
+ writel(reg, &pll->pll_base);
}
static void enable_cpu_clock(int enable)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- u32 reg, clk;
+ u32 clk;
/*
* NOTE:
@@ -83,10 +85,6 @@ static void enable_cpu_clock(int enable)
writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div);
}
- /* Fetch the register containing the main CPU complex clock enable */
- reg = readl(&clkrst->crc_clk_out_enb_l);
- reg |= CLK_ENB_CPU;
-
/*
* Read the register containing the individual CPU clock enables and
* always stop the clock to CPU 1.
@@ -103,7 +101,7 @@ static void enable_cpu_clock(int enable)
}
writel(clk, &clkrst->crc_clk_cpu_cmplx);
- writel(reg, &clkrst->crc_clk_out_enb_l);
+ clock_enable(PERIPH_ID_CPU);
}
static int is_cpu_powered(void)
@@ -179,7 +177,7 @@ static void enable_cpu_power_rail(void)
static void reset_A9_cpu(int reset)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- u32 reg, cpu;
+ u32 cpu;
/*
* NOTE: Regardless of whether the request is to hold the CPU in reset
@@ -193,44 +191,27 @@ static void reset_A9_cpu(int reset)
cpu = SET_DBGRESET1 | SET_DERESET1 | SET_CPURESET1;
writel(cpu, &clkrst->crc_cpu_cmplx_set);
- reg = readl(&clkrst->crc_rst_dev_l);
if (reset) {
/* Now place CPU0 into reset */
cpu |= SET_DBGRESET0 | SET_DERESET0 | SET_CPURESET0;
writel(cpu, &clkrst->crc_cpu_cmplx_set);
-
- /* Enable master CPU reset */
- reg |= SWR_CPU_RST;
} else {
/* Take CPU0 out of reset */
cpu = CLR_DBGRESET0 | CLR_DERESET0 | CLR_CPURESET0;
writel(cpu, &clkrst->crc_cpu_cmplx_clr);
-
- /* Disable master CPU reset */
- reg &= ~SWR_CPU_RST;
}
- writel(reg, &clkrst->crc_rst_dev_l);
+ /* Enable/Disable master CPU reset */
+ reset_set_enable(PERIPH_ID_CPU, reset);
}
static void clock_enable_coresight(int enable)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- u32 rst, clk, src;
-
- rst = readl(&clkrst->crc_rst_dev_u);
- clk = readl(&clkrst->crc_clk
[U-Boot] [PATCH v2 6/7] Tegra2: Add USB support
This adds basic USB support for port 0. The other port is not supported by this
CL.
Signed-off-by: Simon Glass
---
arch/arm/include/asm/arch-tegra2/tegra2.h |2 +
arch/arm/include/asm/arch-tegra2/usb.h| 217
board/nvidia/common/Makefile | 53 +
board/nvidia/common/board.c |5 +
board/nvidia/common/usb.c | 313 +
drivers/usb/host/Makefile |1 +
drivers/usb/host/ehci-hcd.c | 39
drivers/usb/host/ehci-tegra.c | 73 +++
drivers/usb/host/ehci.h |6 +-
include/configs/harmony.h |7 +
include/configs/seaboard.h| 10 +
include/configs/tegra2-common.h | 30 +++
12 files changed, 755 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/include/asm/arch-tegra2/usb.h
create mode 100644 board/nvidia/common/Makefile
create mode 100644 board/nvidia/common/usb.c
create mode 100644 drivers/usb/host/ehci-tegra.c
diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h
b/arch/arm/include/asm/arch-tegra2/tegra2.h
index 742a75a..3bf0051 100644
--- a/arch/arm/include/asm/arch-tegra2/tegra2.h
+++ b/arch/arm/include/asm/arch-tegra2/tegra2.h
@@ -40,6 +40,8 @@
#define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400)
#define NV_PA_PMC_BASE 0x7000E400
#define NV_PA_CSITE_BASE 0x7004
+#define NV_PA_USB1_BASE0xC500
+#define NV_PA_USB3_BASE0xC5008000
#define TEGRA2_SDRC_CS0NV_PA_SDRAM_BASE
#define LOW_LEVEL_SRAM_STACK 0x4000FFFC
diff --git a/arch/arm/include/asm/arch-tegra2/usb.h
b/arch/arm/include/asm/arch-tegra2/usb.h
new file mode 100644
index 000..c37f404
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra2/usb.h
@@ -0,0 +1,217 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _TEGRA_USB_H_
+#define _TEGRA_USB_H_
+
+
+/* USB Controller (USBx_CONTROLLER_) regs */
+struct usb_ctlr {
+ /* 0x000 */
+ uint id;
+ uint reserved0;
+ uint host;
+ uint device;
+
+ /* 0x010 */
+ uint txbuf;
+ uint rxbuf;
+ uint reserved1[2];
+
+ /* 0x020 */
+ uint reserved2[56];
+
+ /* 0x100 */
+ u16 cap_length;
+ u16 hci_version;
+ uint hcs_params;
+ uint hcc_params;
+ uint reserved3[5];
+
+ /* 0x120 */
+ uint dci_version;
+ uint dcc_params;
+ uint reserved4[6];
+
+ /* 0x140 */
+ uint usb_cmd;
+ uint usb_sts;
+ uint usb_intr;
+ uint frindex;
+
+ /* 0x150 */
+ uint reserved5;
+ uint periodic_list_base;
+ uint async_list_addr;
+ uint async_tt_sts;
+
+ /* 0x160 */
+ uint burst_size;
+ uint tx_fill_tuning;
+ uint reserved6; /* is this port_sc1 on some controllers? */
+ uint icusb_ctrl;
+
+ /* 0x170 */
+ uint ulpi_viewport;
+ uint reserved7;
+ uint endpt_nak;
+ uint endpt_nak_enable;
+
+ /* 0x180 */
+ uint reserved;
+ uint port_sc1;
+ uint reserved8[6];
+
+ /* 0x1a0 */
+ uint reserved9;
+ uint otgsc;
+ uint usb_mode;
+ uint endpt_setup_stat;
+
+ /* 0x1b0 */
+ uint reserved10[20];
+
+ /* 0x200 */
+ uint reserved11[0x80];
+
+ /* 0x400 */
+ uint susp_ctrl;
+ uint phy_vbus_sensors;
+ uint phy_vbus_wakeup_id;
+ uint phy_alt_vbus_sys;
+
+ /* 0x410 */
+ uint usb1_legacy_ctrl;
+ uint reserved12[3];
+
+ /* 0x420 */
+ uint reserved13[56];
+
+ /* 0x500 */
+ uint reserved14[64 * 3];
+
+ /* 0x800 */
+ uint utmip_pll_cfg0;
+ uint utmip_pll_cfg1;
+ uint utmip_xcvr_cfg0;
+ uint utmip_bias_cfg0;
+
+ /* 0x810 */
+ uint utmip_hsrx_cfg0;
+ uint utmip_hsrx_cfg1;
+ uint utmip_fslsrx_cfg0;
+ uint utmip_fslsrx_cfg1;
+
+ /* 0x820 */
+ uint utmip_tx_cfg0;
+ uint utmip_misc_cfg0;
+ uint utmip_misc_cfg1;
+ uint utmip_debounce_cfg0;
+
+ /* 0x830 */
+ u
[U-Boot] [PATCH v2 0/7] Tegra2: USB Host Support patch series
This patch series adds USB host support to Tegra2. It has been tested on Seaboard. Since the Tegra2 includes a vast number of registers it is critical that we make it as easy and error-free as possible to write code which accesses those registers. So a simple bitfield access mechanism is provided which mirrors the notation in many datasheets (16:12 means bits 16 downto 12). Support is provided for clock and pinmux functions which are used in USB and will be used commonly in future patches. A microsecond timer is required for PLL setup timing. Finally, as a motivation for all this effort, network booting is enabled for Seaboard. A previous patch containing full documentation want sent to the list on 13-Apr-11 (Add documentation for USB Host Networking). These patches are prepared against u-boot-arm.git/master. v2: Resend since no one seemed to notice the first set :-) Clean TEST= things out of commit messages Add Harmony support Simon Glass (7): Tegra2: Add bitfield access macros Tegra2: Add microsecond timer functions Tegra2: Add more clock support Tegra2: add additional pin multiplexing features Tegra2: Use clock and pinmux functions to simplify code Tegra2: Add USB support Tegra2: config: enable network booting arch/arm/cpu/armv7/tegra2/Makefile |2 +- arch/arm/cpu/armv7/tegra2/ap20.c| 92 +++-- arch/arm/cpu/armv7/tegra2/clock.c | 163 ++ arch/arm/cpu/armv7/tegra2/pinmux.c | 54 + arch/arm/cpu/armv7/tegra2/timer.c | 27 ++- arch/arm/include/asm/arch-tegra2/bitfield.h | 151 + arch/arm/include/asm/arch-tegra2/clk_rst.h | 129 +--- arch/arm/include/asm/arch-tegra2/clock.h| 264 ++ arch/arm/include/asm/arch-tegra2/pinmux.h | 156 +- arch/arm/include/asm/arch-tegra2/tegra2.h |2 + arch/arm/include/asm/arch-tegra2/timer.h| 34 +++ arch/arm/include/asm/arch-tegra2/usb.h | 217 +++ board/nvidia/common/Makefile| 53 + board/nvidia/common/board.c | 70 +++ board/nvidia/common/usb.c | 313 +++ drivers/usb/host/Makefile |1 + drivers/usb/host/ehci-hcd.c | 39 drivers/usb/host/ehci-tegra.c | 73 +++ drivers/usb/host/ehci.h |6 +- include/configs/harmony.h |7 + include/configs/seaboard.h | 15 ++ include/configs/tegra2-common.h | 96 - test/Makefile | 36 +++ test/bitfield.c | 230 24 files changed, 2027 insertions(+), 203 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/clock.c create mode 100644 arch/arm/cpu/armv7/tegra2/pinmux.c create mode 100644 arch/arm/include/asm/arch-tegra2/bitfield.h create mode 100644 arch/arm/include/asm/arch-tegra2/clock.h create mode 100644 arch/arm/include/asm/arch-tegra2/timer.h create mode 100644 arch/arm/include/asm/arch-tegra2/usb.h create mode 100644 board/nvidia/common/Makefile create mode 100644 board/nvidia/common/usb.c create mode 100644 drivers/usb/host/ehci-tegra.c create mode 100644 test/Makefile create mode 100644 test/bitfield.c -- 1.7.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 4/5] Put common autoload code into auto_load() function
On Thu, May 5, 2011 at 12:52, Simon Glass wrote:
> +static void auto_load(void)
> +{
> + char *s = getenv("autoload");
const char *s
> + if (s != NULL) {
> + if (*s == 'n') {
> + /*
> + * Just use BOOTP to configure system;
> + * Do not use TFTP to load the bootfile.
> + */
> + NetState = NETLOOP_SUCCESS;
> + return;
> +#if defined(CONFIG_CMD_NFS)
> + } else if (strcmp(s, "NFS") == 0) {
> + /*
> + * Use NFS to load the bootfile.
> + */
> + NfsStart();
> + return;
> +#endif
> + }
> + }
> +
> + TftpStart();
put the TftpStart into a new else, then there's no need for the inline
"return" ...
-mike
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Re: [U-Boot] Memory size detection on P1011
Hi Wolfgang, On 05/05/2011 09:24 PM, Wolfgang Denk wrote: > Dear York Sun, > > In message<1304602168.21927.16.camel@oslab-l1> you wrote: >> I don't think get_ram_size works for your case. If you want to test the > You are wrong. We have been doing this for a long time on many boards > with similar properties. > >> DDR to find the correct size, you have to initialize the DDR first. But >> you cannot do this correctly without knowing the number of banks. You >> may be able to blindly set the bank number and test the DDR to catch the > Incorrect number of banks will give different results than correct > number, so try both. The correct configuration is simply the one that > gives the maximum total memory size. I'm trying to do that, but get the same wrong memory size in both cases. On the other hand, if I program the correct number of banks from the start, get_ram_size() returns the correct size in both cases. The closest example of using get_ram_size() I've found is for MPC8548 TQM boards. But all these boards have 4-bank memory devices, so I'm sure my case was tested. Don't you think there can be a problem with reprogramming bank number in this particular DDR controller ? Felix. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Western Union Promo....
You have $35,000USD in cash credit by the International Monetary Funds(IMF) via western union. Confirm this receipt by replying or contact ( wubonaza...@w.cn ) the due process unit officer. Details required: Full Name,Address,Tel,Occupation ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/8] km/common: implement boardId HWkey checks as u-boot cmd
Dear Holger Brunck, In message <4dc2ab4a@keymile.com> you wrote: > > > This patch has checkpatch warnings. Please fix. > > Ok the one warning that we exceed 80 characters per line is fixed, sorry for > that. But there are two warnings remaining: > WARNING: consider using strict_strtoul in preference to simple_strtoul > #137: FILE: board/keymile/common/common.c:813: > + bid = simple_strtoul(rest, &endp, 16); > > WARNING: consider using strict_strtoul in preference to simple_strtoul > #141: FILE: board/keymile/common/common.c:817: > + hwkey = simple_strtoul(rest, &endp, 16); > > I know that we use strict_strtoul in the same patch some lines above, but at > this point we need *endp and we know that we got a non numeric character at > the > end. So using simple_strtoul at this point is exactly what we want here. Well, mixing both strict_strtoul() and simple_strtoul() [without any comment] in the same patch was what attracted my attention in the first place. > Is it ok to ignore this warnings and add a comment above the codeline why we > use > simple_stroul? Indeed this needs a comment. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de f u cn rd ths, itn tyg h myxbl cd. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Memory size detection on P1011
Dear York Sun, In message <1304602168.21927.16.camel@oslab-l1> you wrote: > > I don't think get_ram_size works for your case. If you want to test the You are wrong. We have been doing this for a long time on many boards with similar properties. > DDR to find the correct size, you have to initialize the DDR first. But > you cannot do this correctly without knowing the number of banks. You > may be able to blindly set the bank number and test the DDR to catch the Incorrect number of banks will give different results than correct number, so try both. The correct configuration is simply the one that gives the maximum total memory size. > error if there is any, but you have to run this code somewhere else, for > example, in the flash (before relocation). Of course the RAM init code runs before relocation. > There might be another way. Do you have any board ID to distinguish > these two kinds? The recommended way is to use get_ram_size(). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Overdrawn? But I still have checks left! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Add basic support for P1010RDB
Dear Kumar Gala, In message <2cf0740e-8067-456c-b3aa-1d8ce3a76...@kernel.crashing.org> you wrote: > > > This loop is similar to what nand_spl/nand_boot.c is using. It's ugly, but > > the goal here is small code rather than cleanliness. Is the timebase > > running at this point? How much code is required to get the timebase > > frequency? > > TB isn't running so you have to turn it on in the SoC (so a few CCSRBAR > read/writes), than you have to calculate freq on some boards its a #define > constant, on other its calculated reading I2C which would add a bunch of code > for accessing I2C. I'm pret > ty sure we aren't going to be able to do that in 4k. No matter what exactly you do, the loop we have now cannot be used as it is completley dependent on the tool chain if there is any delay at all, and it's pretty much nondeterministic how long it will be using different tool chains. This code is simply broken and needs fixing. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The human mind ordinarily operates at only ten percent of its capaci- ty - the rest is overhead for the operating system. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc, mgcoge: add DIP switch detection
Dear Holger Brunck, In message <4dc253a5.6010...@keymile.com> you wrote: > > > As the merge window is closed, this new patch series will not go into > > this upcoming release any more. > > Sorry but why this? The initial patch serie was postet on april 8th: > http://lists.denx.de/pipermail/u-boot/2011-April/090012.html > And as far as I know the merge window was closed on april 10th. > > The resulting patch series are a rework due to the input of the ML. The reworked series goes in, but there appear to be a number of completely new patches; these go into next. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Shakespeare's Law of Prototyping: (Hamlet III, iv, 156-160) O, throw away the worser part of it, And live the purer with the other half. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] boot-up time optimization. Where to start?
On Thursday 05 May 2011 17:32:20 Wolfgang Denk wrote: > Dear Alexander Stein, > > In message <201105030848.17576.alexander.st...@systec-electronic.com> you wrote: > > This specific version was selected due to relocation problems on ARM. But > > I expect the dcache doesn't have that big influence on the named code > > part as the environment is already in RAM. > > Your expectation is most likely completely wrong. Reading from / > writing to uncached RAM is painfully slow compared to a system with > caches turned on. And if you - as I speculate - need to checksum a > huge amount of data, this will delay things without need. Caching has a huge effect on **all** code and is the first thing I'd play with in trying to speed things up. I have been doing some stuff to speed omap3 booting. It was taking approx 4 seconds from power up until the kernel started spewing boot messages. That is now down to less than 2 secs (including the funky omap3 romboot time, loading uboot from NAND and then loading the kernel from NAND). Only difference was turning on caching in uboot using the caching commands. -- Charles ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 5/5] usbeth: asix: Do a fast init if link already established
The Asix driver takes the link down during init() and then brings it back up.
This commit changes this so that if a link has already been established
successfully we simply check that the link is still good.
This reduces the delay between successive network commands.
TEST=bootp; tftp ... - see that delay is now shorter than before.
Signed-off-by: Simon Glass
---
drivers/usb/eth/asix.c | 36 +++-
include/usb_ether.h|5 +++--
2 files changed, 26 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c
index 9b012e4..18e5457 100644
--- a/drivers/usb/eth/asix.c
+++ b/drivers/usb/eth/asix.c
@@ -307,20 +307,12 @@ static int mii_nway_restart(struct ueth_data *dev)
return r;
}
-/*
- * Asix callbacks
- */
-static int asix_init(struct eth_device *eth, bd_t *bd)
+static int full_init(struct eth_device *eth)
{
+ struct ueth_data *dev = (struct ueth_data *)eth->priv;
int embd_phy;
unsigned char buf[ETH_ALEN];
u16 rx_ctl;
- struct ueth_data*dev = (struct ueth_data *)eth->priv;
- int timeout = 0;
-#define TIMEOUT_RESOLUTION 50 /* ms */
- int link_detected;
-
- debug("** %s()\n", __func__);
if (asix_write_gpio(dev,
AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5) < 0)
@@ -395,6 +387,25 @@ static int asix_init(struct eth_device *eth, bd_t *bd)
if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0)
goto out_err;
+ return 0;
+out_err:
+ return -1;
+}
+
+/*
+ * Asix callbacks
+ */
+static int asix_init(struct eth_device *eth, bd_t *bd)
+{
+ struct ueth_data *dev = (struct ueth_data *)eth->priv;
+ int timeout = 0;
+#define TIMEOUT_RESOLUTION 50 /* ms */
+ int link_detected;
+
+ debug("** %s()\n", __func__);
+
+ if (!dev->has_been_running && full_init(eth))
+ return -1;
do {
link_detected = asix_mdio_read(dev, dev->phy_id, MII_BMSR) &
@@ -411,12 +422,11 @@ static int asix_init(struct eth_device *eth, bd_t *bd)
printf("done.\n");
} else {
printf("unable to connect.\n");
- goto out_err;
+ return -1;
}
+ dev->has_been_running = 1;
return 0;
-out_err:
- return -1;
}
static int asix_send(struct eth_device *eth, volatile void *packet, int length)
diff --git a/include/usb_ether.h b/include/usb_ether.h
index a7fb26b..73b085d 100644
--- a/include/usb_ether.h
+++ b/include/usb_ether.h
@@ -37,8 +37,9 @@
struct ueth_data {
/* eth info */
- struct eth_device eth_dev; /* used with eth_register */
- int phy_id; /* mii phy id */
+ struct eth_device eth_dev; /* used with eth_register */
+ int phy_id; /* mii phy id */
+ int has_been_running; /* 1 if we have had a link up */
/* usb info */
struct usb_device *pusb_dev;/* this usb_device */
--
1.7.3.1
___
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[U-Boot] [PATCH v6 1/5] Add support for SMSC95XX USB 2.0 10/100MBit Ethernet Adapter
The SMSC95XX is a USB hub with a built-in Ethernet adapter. This adds support for this, using the USB host network framework. TEST=usb start; bootp; tftp ... Changes for v2: - Coding style cleanup - Changed some comments as suggested - eth_set_hwaddr -> eth_write_hwaddr - tided up other users of eth_getenv_enetaddr_by_index() Changes for v3: - Drop tfpserverip patch - Change turbo_mode to #define - Fix tfpserverip patch bleed Changes for v4: - Dropped Tegra2 specific bit - Added patch in place of tftpserverip patch, to speed up successive network commands on asix - Fixed a few broken bits in SMSC from my testing Changes for v5: - Code style clean-ups in SMSC - Cleaned up debugging of errors in SMSC driver - Changed NULL to "eth" in eth_getenv_enetaddr_by_index() API Changes for v6: - Adjust documentation file according to Wolfgang's comments - Set NET_IP_ALIGN to 0 always Signed-off-by: Simon Glass --- drivers/usb/eth/Makefile|1 + drivers/usb/eth/smsc95xx.c | 878 +++ drivers/usb/eth/usb_ether.c |7 + include/usb_ether.h | 13 + 4 files changed, 899 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/eth/smsc95xx.c diff --git a/drivers/usb/eth/Makefile b/drivers/usb/eth/Makefile index 6a5f25a..e28793d 100644 --- a/drivers/usb/eth/Makefile +++ b/drivers/usb/eth/Makefile @@ -28,6 +28,7 @@ COBJS-$(CONFIG_USB_HOST_ETHER) += usb_ether.o ifdef CONFIG_USB_ETHER_ASIX COBJS-y += asix.o endif +COBJS-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c new file mode 100644 index 000..4d8dde0 --- /dev/null +++ b/drivers/usb/eth/smsc95xx.c @@ -0,0 +1,878 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * Copyright (C) 2009 NVIDIA, Corporation + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include "usb_ether.h" + +/* SMSC LAN95xx based USB 2.0 Ethernet Devices */ + +/* Tx command words */ +#define TX_CMD_A_FIRST_SEG_0x2000 +#define TX_CMD_A_LAST_SEG_ 0x1000 + +/* Rx status word */ +#define RX_STS_FL_ 0x3FFF /* Frame Length */ +#define RX_STS_ES_ 0x8000 /* Error Summary */ + +/* SCSRs */ +#define ID_REV 0x00 + +#define INT_STS0x08 + +#define TX_CFG 0x10 +#define TX_CFG_ON_ 0x0004 + +#define HW_CFG 0x14 +#define HW_CFG_BIR_0x1000 +#define HW_CFG_RXDOFF_ 0x0600 +#define HW_CFG_MEF_0x0020 +#define HW_CFG_BCE_0x0002 +#define HW_CFG_LRST_ 0x0008 + +#define PM_CTRL0x20 +#define PM_CTL_PHY_RST_0x0010 + +#define AFC_CFG0x2C + +/* + * Hi watermark = 15.5Kb (~10 mtu pkts) + * low watermark = 3k (~2 mtu pkts) + * backpressure duration = ~ 350us + * Apply FC on any frame. + */ +#define AFC_CFG_DEFAULT0x00F830A1 + +#define E2P_CMD0x30 +#define E2P_CMD_BUSY_ 0x8000 +#define E2P_CMD_READ_ 0x +#define E2P_CMD_TIMEOUT_ 0x0400 +#define E2P_CMD_LOADED_0x0200 +#define E2P_CMD_ADDR_ 0x01FF + +#define E2P_DATA 0x34 + +#define BURST_CAP 0x38 + +#define INT_EP_CTL 0x68 +#define INT_EP_CTL_PHY_INT_0x8000 + +#define BULK_IN_DLY0x6C + +/* MAC CSRs */ +#define MAC_CR 0x100 +#define MAC_CR_MCPAS_ 0x0008 +#define MAC_CR_PRMS_ 0x0004 +#define MAC_CR_HPFILT_ 0x2000 +#define MAC_CR_TXEN_ 0x0008 +#define MAC_CR_RXEN_ 0x0004 + +#define ADDRH 0x104 + +#define ADDRL 0x108 + +#define MII_
[U-Boot] [PATCH v6 2/5] Add Ethernet hardware MAC address framework to usbnet
Built-in Ethernet adapters support setting the mac address by means of a
ethaddr environment variable for each interface (ethaddr, eth1addr, eth2addr).
This adds similar support to the USB network side, using the names
usbethaddr, usbeth1addr, etc. They are kept separate since we don't want
a USB device taking the MAC address of a built-in device or vice versa.
TEST=build, test on harmony, with setenv usbethaddr c0:c1:c0:13:0b:b8, bootp,
tftp ...
Signed-off-by: Simon Glass
---
board/davinci/common/misc.c |2 +-
drivers/net/designware.c|2 +-
drivers/usb/eth/usb_ether.c |9 +-
include/net.h | 25 -
net/eth.c | 64 ++-
5 files changed, 72 insertions(+), 30 deletions(-)
diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c
index 2bfdf23..53d6aa1 100644
--- a/board/davinci/common/misc.c
+++ b/board/davinci/common/misc.c
@@ -101,7 +101,7 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
{
uint8_t env_enetaddr[6];
- eth_getenv_enetaddr_by_index(0, env_enetaddr);
+ eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr);
if (!memcmp(env_enetaddr, "\0\0\0\0\0\0", 6)) {
/* There is no MAC address in the environment, so we initialize
* it from the value in the EEPROM. */
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 3f5eeb7..02ba393 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -500,7 +500,7 @@ int designware_initialize(u32 id, ulong base_addr, u32
phy_addr)
dev->iobase = (int)base_addr;
dev->priv = priv;
- eth_getenv_enetaddr_by_index(id, &dev->enetaddr[0]);
+ eth_getenv_enetaddr_by_index("eth", id, &dev->enetaddr[0]);
priv->dev = dev;
priv->mac_regs_p = (struct eth_mac_regs *)base_addr;
diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c
index 7b55da3..6565ea5 100644
--- a/drivers/usb/eth/usb_ether.c
+++ b/drivers/usb/eth/usb_ether.c
@@ -80,6 +80,7 @@ int is_eth_dev_on_usb_host(void)
*/
static void probe_valid_drivers(struct usb_device *dev)
{
+ struct eth_device *eth;
int j;
for (j = 0; prob_dev[j].probe && prob_dev[j].get_info; j++) {
@@ -88,9 +89,10 @@ static void probe_valid_drivers(struct usb_device *dev)
/*
* ok, it is a supported eth device. Get info and fill it in
*/
+ eth = &usb_eth[usb_max_eth_dev].eth_dev;
if (prob_dev[j].get_info(dev,
&usb_eth[usb_max_eth_dev],
- &usb_eth[usb_max_eth_dev].eth_dev)) {
+ eth)) {
/* found proper driver */
/* register with networking stack */
usb_max_eth_dev++;
@@ -100,7 +102,10 @@ static void probe_valid_drivers(struct usb_device *dev)
* call since eth_current_changed (internally called)
* relies on it
*/
- eth_register(&usb_eth[usb_max_eth_dev - 1].eth_dev);
+ eth_register(eth);
+ if (eth_write_hwaddr(eth, "usbeth",
+ usb_max_eth_dev - 1))
+ puts("Warning: failed to set MAC address\n");
break;
}
}
diff --git a/include/net.h b/include/net.h
index 95ef8ab..842a017 100644
--- a/include/net.h
+++ b/include/net.h
@@ -123,7 +123,18 @@ extern int eth_get_dev_index (void); /* get
the device index */
extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
extern int eth_getenv_enetaddr(char *name, uchar *enetaddr);
extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
-extern int eth_getenv_enetaddr_by_index(int index, uchar *enetaddr);
+
+/*
+ * Get the hardware address for an ethernet interface .
+ * Args:
+ * base_name - base name for device (normally "eth")
+ * index - device index number (0 for first)
+ * enetaddr - returns 6 byte hardware address
+ * Returns:
+ * Return true if the address is valid.
+ */
+extern int eth_getenv_enetaddr_by_index(const char *base_name, int index,
+ uchar *enetaddr);
extern int usb_eth_initialize(bd_t *bi);
extern int eth_init(bd_t *bis);/* Initialize the
device */
@@ -136,6 +147,18 @@ extern int eth_rx(void); /* Check for
received packets */
extern void eth_halt(void);/* stop SCC */
extern char *eth_get_name(void); /* get name of current device */
+/*
+ * Set the hardware address for an ethernet interface based on 'eth%daddr'
+ * environment variable (or just 'ethaddr' if eth_number is 0).
+ * Args:
+ * base_name - base name for device (no
[U-Boot] [PATCH v6 3/5] Add documentation for USB Host Networking
This describes what it is for, devices supported, how to enable for your
board in U-Boot, setting up the server, and notes about MAC addresses.
Signed-off-by: Simon Glass
---
doc/README.usb | 157 +++-
1 files changed, 156 insertions(+), 1 deletions(-)
diff --git a/doc/README.usb b/doc/README.usb
index 9aa4f62..a8a4058 100644
--- a/doc/README.usb
+++ b/doc/README.usb
@@ -79,4 +79,159 @@ CONFIG_USB_UHCI defines the lowlevel part.A
lowlevel part must be defined
if using CONFIG_CMD_USB
CONFIG_USB_KEYBOARD enables the USB Keyboard
CONFIG_USB_STORAGE enables the USB storage devices
-CONFIG_USB_HOST_ETHER enables USB ethernet dongle support
+CONFIG_USB_HOST_ETHER enables USB ethernet adapter support
+
+
+USB Host Networking
+===
+
+If you have a supported USB Ethernet adapter you can use it in U-Boot
+to obtain an IP address and load a kernel from a network server.
+
+Note: USB Host Networking is not the same as making your board act as a USB
+client. In that case your board is pretending to be an Ethernet adapter
+and will appear as a network interface to an attached computer. In that
+case the connection is via a USB cable with the computer acting as the host.
+
+With USB Host Networking, your board is the USB host. It controls the
+Ethernet adapter to which it is directly connected and the connection to
+the outside world is your adapter's Ethernet cable. Your board becomes an
+independent network device, able to connect and perform network operations
+independently of your computer.
+
+
+Device support
+--
+
+Currently supported devices are listed in the drivers according to
+their vendor and product IDs. You can check your device by connecting it
+to a Linux machine and typing 'lsusb'. The drivers are in
+drivers/usb/eth.
+
+For example this lsusb output line shows a device with Vendor ID 0x0x95
+and product ID 0x7720:
+
+Bus 002 Device 010: ID 0b95:7720 ASIX Electronics Corp. AX88772
+
+If you look at drivers/usb/eth/asix.c you will see this line within the
+supported device list, so we know this adapter is supported.
+
+{ 0x0b95, 0x7720 }, /* Trendnet TU2-ET100 V3.0R */
+
+If your adapter is not listed there is a still a chance that it will
+work. Try looking up the manufacturer of the chip inside your adapter.
+or take the adapter apart and look for chip markings. Then add a line
+for your vendor/product ID into the table of the appropriate driver,
+build U-Boot and see if it works. If not then there might be differences
+between the chip in your adapter and the driver. You could try to get a
+datasheet for your device and add support for it to U-Boot. This is not
+particularly difficult - you only need to provide support for four basic
+functions: init, halt, send and recv.
+
+
+Enabling USB Host Networking
+
+
+The normal U-Boot commands are used with USB networking, but you must
+start USB first. For example:
+
+usb start
+setenv bootfile /tftpboot/uImage
+bootp
+
+
+To enable USB Host Ethernet in U-Boot, your platform must of course
+support USB with CONFIG_CMD_USB enabled and working. You will need to
+add some config settings to your board header file:
+
+#define CONFIG_USB_HOST_ETHER /* Enable USB Ethernet adapters */
+#define CONFIG_USB_ETHER_ASIX /* Asix, or whatever driver(s) you want */
+
+As with built-in networking, you will also want to enable some network
+commands, for example:
+
+#define CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+and some bootp options, which tell your board to obtain its subnet,
+gateway IP, host name and boot path from the bootp/dhcp server. These
+settings should start you off:
+
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+You can also set the default IP address of your board and the server
+as well as the default file to load when a 'bootp' command is issued.
+All of these can be obtained from the bootp server if not set.
+
+#define CONFIG_IPADDR 10.0.0.2 (replace with your value)
+#define CONFIG_SERVERIP 10.0.0.1 (replace with your value)
+#define CONFIG_BOOTFILE uImage
+
+
+The 'usb start' command should identify the adapter something like this:
+
+CrOS> usb start
+(Re)start USB...
+USB EHCI 1.00
+scanning bus for devices... 3 USB Device(s) found
+ scanning bus for storage devices... 0 Storage Device(s) found
+ scanning bus for ethernet devices... 1 Ethernet Device(s) found
+CrOS> print ethact
+ethact=asx0
+
+You can see that it found an ethernet device and we can print out the
+device name (asx0 in this case).
+
+Then 'bootp' or 'dhcp' should use it to obtain an IP address from DHCP,
+perhaps something like this:
+
+CrOS> bootp
+Waiting for Ethernet connection... done.
+BOOTP broadcast 1
+BOOTP broadcast 2
+DHCP client bound to addr
[U-Boot] [PATCH v6 4/5] Put common autoload code into auto_load() function
This is a small clean-up patch.
TEST=Build U-Boot, try bootp and check it auto-loads.
Signed-off-by: Simon Glass
---
net/bootp.c | 76 +-
1 files changed, 33 insertions(+), 43 deletions(-)
diff --git a/net/bootp.c b/net/bootp.c
index 87b027e..884fee5 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -137,6 +137,36 @@ static int truncate_sz (const char *name, int maxlen, int
curlen)
return (curlen);
}
+/*
+ * Check if autoload is enabled. If so, use either NFS or TFTP to download
+ * the boot file.
+ */
+static void auto_load(void)
+{
+ char *s = getenv("autoload");
+
+ if (s != NULL) {
+ if (*s == 'n') {
+ /*
+* Just use BOOTP to configure system;
+* Do not use TFTP to load the bootfile.
+*/
+ NetState = NETLOOP_SUCCESS;
+ return;
+#if defined(CONFIG_CMD_NFS)
+ } else if (strcmp(s, "NFS") == 0) {
+ /*
+* Use NFS to load the bootfile.
+*/
+ NfsStart();
+ return;
+#endif
+ }
+ }
+
+ TftpStart();
+}
+
#if !defined(CONFIG_CMD_DHCP)
static void BootpVendorFieldProcess (u8 * ext)
@@ -278,6 +308,7 @@ static void BootpVendorProcess (u8 * ext, int size)
if (NetBootFileSize)
debug("NetBootFileSize: %d\n", NetBootFileSize);
}
+
/*
* Handle a BOOTP received packet.
*/
@@ -285,7 +316,6 @@ static void
BootpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
{
Bootp_t *bp;
- char*s;
debug("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%zu)\n",
src, dest, len, sizeof (Bootp_t));
@@ -312,26 +342,7 @@ BootpHandler(uchar * pkt, unsigned dest, unsigned src,
unsigned len)
debug("Got good BOOTP\n");
- if ((s = getenv("autoload")) != NULL) {
- if (*s == 'n') {
- /*
-* Just use BOOTP to configure system;
-* Do not use TFTP to load the bootfile.
-*/
- NetState = NETLOOP_SUCCESS;
- return;
-#if defined(CONFIG_CMD_NFS)
- } else if (strcmp(s, "NFS") == 0) {
- /*
-* Use NFS to load the bootfile.
-*/
- NfsStart();
- return;
-#endif
- }
- }
-
- TftpStart();
+ auto_load();
}
#endif
@@ -904,34 +915,13 @@ DhcpHandler(uchar * pkt, unsigned dest, unsigned src,
unsigned len)
debug("DHCP State: REQUESTING\n");
if ( DhcpMessageType((u8 *)bp->bp_vend) == DHCP_ACK ) {
- char *s;
-
if (NetReadLong((ulong*)&bp->bp_vend[0]) ==
htonl(BOOTP_VENDOR_MAGIC))
DhcpOptionsProcess((u8 *)&bp->bp_vend[4], bp);
BootpCopyNetParams(bp); /* Store net params from reply
*/
dhcp_state = BOUND;
printf ("DHCP client bound to address %pI4\n",
&NetOurIP);
- /* Obey the 'autoload' setting */
- if ((s = getenv("autoload")) != NULL) {
- if (*s == 'n') {
- /*
-* Just use BOOTP to configure system;
-* Do not use TFTP to load the bootfile.
-*/
- NetState = NETLOOP_SUCCESS;
- return;
-#if defined(CONFIG_CMD_NFS)
- } else if (strcmp(s, "NFS") == 0) {
- /*
-* Use NFS to load the bootfile.
-*/
- NfsStart();
- return;
-#endif
- }
- }
- TftpStart();
+ auto_load();
return;
}
break;
--
1.7.3.1
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Re: [U-Boot] [PATCH] powerpc/mpc8xxx: reword max tCKmin message
Kumar Gala wrote: >>> >> That still needs some work, IMHO. I think you might need the word >>> >> "which" before "doesn't". However, even with that, it's not clear >>> >> what's wrong. Where does the bad value of "mclk_ps" come from? >>> >> >> > >> > It happens when the actually DDR clock is faster than the slowest DIMM >> > can support. >> > >> > York > Did you guys agree on wording? Is the patch ok or needs changing? I haven't seen an updated patch from York. I'd like to see the addition of text like, "It happens when the actually DDR clock is faster than the slowest DIMM can support." People need to know what to fix, not just what's wrong. Also, %d is for signed integers, not unsigned. -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Memory size detection on P1011
Hi, I'm working on a custom board based on P1011. There are 2 board flavours, with either 128MB or 256MB of soldered DDR2 SDRAM. Having u-boot image per board works fine, but I'd like to have a single image and use get_ram_size() to detect memory size at runtime. So far I had no luck. The only significant difference between memory devices on these boards is the number of banks: 4 banks on 128MB board and 8 banks on 256MB board. The memory size detection logic is loosely based on the code in boards/tqc/tqm85xx/sdram.c, but I use fsl_ddr_set_memctl_regs() to configure DDR controller registers and enable the controller. The sequence is: 1. Configure TLBs for 2GB DDR 2. Configure LAWs for 2GB DDR 3. Configure DDR controller registers and enable DDR controller, CS0_BNDS is set to 256MB. 4. Iterate over possible memory sizes starting from the largest. Each iteration configures CS0_CONFIG (sets number of banks, rows and columns) and runs get_ram_size() What I observe on 128MB board, is that only 32KB of RAM is detected in both first and second iteration. So it seems that setting number of banks to 8 on 4-bank devices is fatal, and cannot be changed even if CS0_CONFIG is modified. I've tried to rerun DDR controller initialization sequence with new CS0_CONFIG value, but that just hangs the board. I've also tried to disable DDR controller via RORDEVDISR register and then enable it and reconfigure DDR. That also leads to hang. I hope Freescale gurus on the list can help me to find a solution. Thanks in advance. Felix. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/mpc8xxx: reword max tCKmin message
On May 2, 2011, at 10:40 PM, York Sun wrote:
>
> On Mon, 2011-05-02 at 20:19 -0700, Tabi Timur-B04825 wrote:
>> On Mon, May 2, 2011 at 8:51 PM, York Sun wrote:
>>
>>> - printf("The DIMM max tCKmin is %d ps,"
>>> + printf("The combined minimum tCKmin is %d ps,"
>>> "doesn't support the MCLK cycle %d ps\n",
>>
>> That still needs some work, IMHO. I think you might need the word
>> "which" before "doesn't". However, even with that, it's not clear
>> what's wrong. Where does the bad value of "mclk_ps" come from?
>>
>
> It happens when the actually DDR clock is faster than the slowest DIMM
> can support.
>
> York
Did you guys agree on wording? Is the patch ok or needs changing?
- k
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[U-Boot] [PATCH v3] PPC405EX CHIP_21 erratum
APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated
4/27/11) states that rev D processors may wake up with the wrong feature
set. This patch implements the APM-proposed workaround.
To enable this patch for your board, add the appropriate define for your
CPU to your board header file. See kilauea.h for more information. The
following variants are supported:
#define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY
#define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY
#define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY
#define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY
Please note that if you select the wrong define, your board will not
boot, and JTAG will be required to recover.
Tested on custom boards using:
CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY
CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY
Signed-off-by: Steve Falco
Acked-by: Dirk Eibach
---
v3:
Remove enable of workaround for Kilauea/Haleakala. Instead, all
variants are listed with a detailed comment explaining proper usage.
This is necessary because the same u-boot binary is used on boards
with different processors. Since there is currently no known way
to distinguish those processors, there is no way to universally work
around the errata. Each Kilauea/Haleakala owner must build a unique
version of u-boot tailored to their particular board.
v2:
Correct checkpatch errors/warnings re: whitespace, comment style, etc.
Move PVR logic out of board config file.
Simplify ifdef structure.
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index bf208ad..2f3a802 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -221,6 +221,66 @@ void reconfigure_pll(u32 new_cpu_freq)
#endif
}
+#ifdef CONFIG_SYS_4xx_CHIP_21_ERRATA
+void
+chip_21_errata(void)
+{
+ /*
+* See rev 1.09 of the 405EX/405EXr errata. CHIP_21 says that
+* sometimes reading the PVR and/or SDR0_ECID results in incorrect
+* values. Since the rev-D chip uses the SDR0_ECID bits to control
+* internal features, that means the second PCIe or ethernet of an EX
+* variant could fail to work. Also, security features of both EX and
+* EXr might be incorrectly disabled.
+*
+* The suggested workaround is as follows (covering rev-C and rev-D):
+*
+* 1.Read the PVR and SDR0_ECID3.
+*
+* 2.If the PVR matches an expected Revision C PVR value AND if
+* SDR0_ECID3[12:15] is different from PVR[28:31], then – processor is
+* Revision C: continue executing the initialization code (no reset
+* required). else – go to step 3.
+*
+* 3.If the PVR matches an expected Revision D PVR value AND if
+* SDR0_ECID3[10:11] matches its expected value, then – continue
+* executing initialization code, no reset required. else – write
+* DBCR0[RST] = 0b11 to generate a SysReset.
+*/
+
+ u32 pvr;
+ u32 pvr_28_31;
+ u32 ecid3;
+ u32 ecid3_10_11;
+ u32 ecid3_12_15;
+
+ /* Step 1: */
+ pvr = get_pvr();
+ mfsdr(SDR0_ECID3, ecid3);
+
+ /* Step 2: */
+ pvr_28_31 = pvr & 0xf;
+ ecid3_10_11 = (ecid3 >> 20) & 0x3;
+ ecid3_12_15 = (ecid3 >> 16) & 0xf;
+ if ((pvr == CONFIG_405EX_CHIP21_PVR_REV_C) &&
+ (pvr_28_31 != ecid3_12_15)) {
+ /* No reset required. */
+ return;
+ }
+
+ /* Step 3: */
+ if ((pvr == CONFIG_405EX_CHIP21_PVR_REV_D) &&
+ (ecid3_10_11 == CONFIG_405EX_CHIP21_ECID3_REV_D)) {
+ /* No reset required. */
+ return;
+ }
+
+ /* Reset required. */
+ __asm__ __volatile__ ("sync; isync");
+ mtspr(SPRN_DBCR0, 0x3000);
+}
+#endif
+
/*
* Breath some life into the CPU...
*
@@ -235,6 +295,10 @@ cpu_init_f (void)
u32 val;
#endif
+#ifdef CONFIG_SYS_4xx_CHIP_21_ERRATA
+ chip_21_errata();
+#endif
+
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
#if (defined(CONFIG_405EP) || defined (CONFIG_405EX)) && \
diff --git a/arch/powerpc/include/asm/ppc405ex.h
b/arch/powerpc/include/asm/ppc405ex.h
index 36d3149..8070385 100644
--- a/arch/powerpc/include/asm/ppc405ex.h
+++ b/arch/powerpc/include/asm/ppc405ex.h
@@ -43,6 +43,11 @@
#define SDR0_PFC1 0x4101
#define SDR0_MFR 0x4300 /* SDR0_MFR reg */
+#define SDR0_ECID0 0x0080
+#define SDR0_ECID1 0x0081
+#define SDR0_ECID2 0x0082
+#define SDR0_ECID3 0x0083
+
#define SDR0_SDCS_SDD (0x8000 >> 31)
#define SDR0_SRST_DMC (0x8000 >> 10)
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index f5bf4dd..c5b03b4 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -974,6 +974,37 @@
#define PVR_5200B 0x80822014
/*
+ *
Re: [U-Boot] Memory size detection on P1011
Hi York, On 05/05/2011 04:29 PM, York Sun wrote: > Felix, > > On Thu, 2011-05-05 at 16:17 +0300, Felix Radensky wrote: >> Hi, >> >> I'm working on a custom board based on P1011. >> There are 2 board flavours, with either 128MB or 256MB of soldered >> DDR2 SDRAM. Having u-boot image per board works fine, but I'd like >> to have a single image and use get_ram_size() to detect memory size >> at runtime. So far I had no luck. >> >> The only significant difference between memory devices on these boards >> is the number of banks: 4 banks on 128MB board and 8 banks on 256MB >> board. >> >> The memory size detection logic is loosely based on the code in >> boards/tqc/tqm85xx/sdram.c, but I use fsl_ddr_set_memctl_regs() >> to configure DDR controller registers and enable the controller. >> The sequence is: >> >> 1. Configure TLBs for 2GB DDR >> 2. Configure LAWs for 2GB DDR >> 3. Configure DDR controller registers and enable DDR controller, >> CS0_BNDS is set to 256MB. >> 4. Iterate over possible memory sizes starting from the largest. >> Each iteration configures CS0_CONFIG (sets number of banks, rows >> and columns) >> and runs get_ram_size() >> >> What I observe on 128MB board, is that only 32KB of RAM is detected in >> both >> first and second iteration. So it seems that setting number of banks >> to 8 on >> 4-bank devices is fatal, and cannot be changed even if CS0_CONFIG is >> modified. >> >> I've tried to rerun DDR controller initialization sequence with new >> CS0_CONFIG >> value, but that just hangs the board. I've also tried to disable DDR >> controller via >> RORDEVDISR register and then enable it and reconfigure DDR. That also >> leads >> to hang. >> >> I hope Freescale gurus on the list can help me to find a solution. >> >> Thanks in advance. >> > I don't think get_ram_size works for your case. If you want to test the > DDR to find the correct size, you have to initialize the DDR first. But > you cannot do this correctly without knowing the number of banks. You > may be able to blindly set the bank number and test the DDR to catch the > error if there is any, but you have to run this code somewhere else, for > example, in the flash (before relocation). > > There might be another way. Do you have any board ID to distinguish > these two kinds? > > York > > Thanks a lot for a prompt reply, I appreciate it very much. I suspected this might be the case. The tqm boards I've used as a reference all have 4-bank memory devices, so that's why it get_ram_size() works for them. We'll have to keep board ID on EEPROM to distinguish between boards with different RAM sizes. Thanks a lot for your help. Felix. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/8] km/common: implement boardId HWkey checks as u-boot cmd
Hi,
On 05/05/2011 12:11 AM, Wolfgang Denk wrote:
> Dear Holger Brunck,
>
> In message
> <02d1e3f265123ff0296b1c38b227f6d30393ee77.1304508448.git.holger.bru...@keymile.com>
> you wrote:
>> From: Thomas Herzmann
>>
>> BoardId and HWKey are used to identify the HW class of a given board.
>> The correct values are stored in the inventory eeprom. During creation
>> time of a boot package the boardId and HWkey for the SW is stored in
>> the default environment and burned into the flash. During boottime
>> the values in the inventory and in the environment are compared to
>> avoid starting of a SW which is not authorized for this board.
>>
>> Some bootpackages are allowed to run on a set of different boardId
>> hwKey. In this case the environment variable boardIdListHex was added
>> to the default environment. In this case the command iterates over the
>> pair values and compares them with the values read from the inventory
>> eeprom.
>>
>> The syntax of such a boardIdListHex value is e.g.: 158_1 159_1 159_2
>>
>> Signed-off-by: Thomas Herzmann
>> Signed-off-by: Holger Brunck
>> Signed-off-by: Valentin Longchamp
>> Acked-by: Heiko Schocher
>> cc: Wolfgang Denk
>> cc: Detlev Zundel
>> ---
>> Changes for v2:
>>- split up first large patch series to three independent smaller
>> patch series
>>- give the cmd a more precise name
>>- rework the patch with inputs from W.Denk:
>> - adapt and enhance commit msg
>> - comment the code
>> - add error handling
>
> This patch has checkpatch warnings. Please fix.
>
Ok the one warning that we exceed 80 characters per line is fixed, sorry for
that. But there are two warnings remaining:
WARNING: consider using strict_strtoul in preference to simple_strtoul
#137: FILE: board/keymile/common/common.c:813:
+ bid = simple_strtoul(rest, &endp, 16);
WARNING: consider using strict_strtoul in preference to simple_strtoul
#141: FILE: board/keymile/common/common.c:817:
+ hwkey = simple_strtoul(rest, &endp, 16);
I know that we use strict_strtoul in the same patch some lines above, but at
this point we need *endp and we know that we got a non numeric character at the
end. So using simple_strtoul at this point is exactly what we want here.
Is it ok to ignore this warnings and add a comment above the codeline why we use
simple_stroul?
> ...
>> +if (!envbid || !envhwkey) {
>> +/*
>> + * BoardId/HWkey not available in the environment, so try the
>> + * environment variable for BoardId/HWkey list
>> + */
>> +char *bidhwklist = getenv("boardIdListHex");
>> +if (bidhwklist) {
>
> Please insert a blank line after declarations.
>
>
Ok fixed.
Best regards
Holger Brunck
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Re: [U-Boot] Memory size detection on P1011
Felix, On Thu, 2011-05-05 at 16:17 +0300, Felix Radensky wrote: > Hi, > > I'm working on a custom board based on P1011. > There are 2 board flavours, with either 128MB or 256MB of soldered > DDR2 SDRAM. Having u-boot image per board works fine, but I'd like > to have a single image and use get_ram_size() to detect memory size > at runtime. So far I had no luck. > > The only significant difference between memory devices on these boards > is the number of banks: 4 banks on 128MB board and 8 banks on 256MB > board. > > The memory size detection logic is loosely based on the code in > boards/tqc/tqm85xx/sdram.c, but I use fsl_ddr_set_memctl_regs() > to configure DDR controller registers and enable the controller. > The sequence is: > > 1. Configure TLBs for 2GB DDR > 2. Configure LAWs for 2GB DDR > 3. Configure DDR controller registers and enable DDR controller, > CS0_BNDS is set to 256MB. > 4. Iterate over possible memory sizes starting from the largest. > Each iteration configures CS0_CONFIG (sets number of banks, rows > and columns) > and runs get_ram_size() > > What I observe on 128MB board, is that only 32KB of RAM is detected in > both > first and second iteration. So it seems that setting number of banks > to 8 on > 4-bank devices is fatal, and cannot be changed even if CS0_CONFIG is > modified. > > I've tried to rerun DDR controller initialization sequence with new > CS0_CONFIG > value, but that just hangs the board. I've also tried to disable DDR > controller via > RORDEVDISR register and then enable it and reconfigure DDR. That also > leads > to hang. > > I hope Freescale gurus on the list can help me to find a solution. > > Thanks in advance. > I don't think get_ram_size works for your case. If you want to test the DDR to find the correct size, you have to initialize the DDR first. But you cannot do this correctly without knowing the number of banks. You may be able to blindly set the bank number and test the DDR to catch the error if there is any, but you have to run this code somewhere else, for example, in the flash (before relocation). There might be another way. Do you have any board ID to distinguish these two kinds? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] PPC405EX CHIP_21 erratum
Hi Steve, On Wednesday 04 May 2011 16:53:50 Steven A. Falco wrote: > v2: > Correct checkpatch errors/warnings re: whitespace, comment style, etc. > Move PVR logic out of board config file. > Simplify ifdef structure. Those comments above below below the "---" line of the patch. This way they will not be included in the git history. > APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated > 4/27/11) states that rev D processors may wake up with the wrong feature > set. I've personally seen that happen. This patch implements the > APM-proposed workaround. > > To enable this patch for your board, add the appropriate define for your > CPU to your board header file. See kilauea.h for an example. The > following variants are supported: > > #define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY > #define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY > #define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY > #define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY I'm wondering how boards should handle this, when they can be equipped with all 405EX(r) variants. Like Kilauea/Haleakala. For Kilauea (405EX) / Haleakala (405EXr) only one U-Boot binary is generated and used on both boards. And IIRC, they can be equipped with both chip versions, with and without security. Do you have any ideas on how this could be handled. > diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h > index 031f8fb..2be1104 100644 > --- a/include/configs/kilauea.h > +++ b/include/configs/kilauea.h > @@ -44,6 +44,12 @@ > #endif > > /* > + * CHIP_21 errata - you must set this to match your CPU, else the board > + * will not boot. > + */ > +#define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY As long as we don't have a "solution" for handling 405EX & 405EXr SoC's in a single binary, we shouldn't add this errata-fix to kilauea.h. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Add basic support for P1010RDB
On May 4, 2011, at 1:02 PM, Scott Wood wrote:
> On Wed, 4 May 2011 12:34:20 -0500
> Kumar Gala wrote:
>
>>
>> On May 4, 2011, at 12:31 PM, Haiying Wang wrote:
>>
>>> On Wed, 2011-05-04 at 22:53 +0530, Poonam Aggrwal wrote:
+sinclude $(obj).depend
+
+#
diff --git a/nand_spl/board/freescale/p1010rdb/nand_boot.c
b/nand_spl/board/freescale/p1010rdb/nand_boot.c
new file mode 100644
index 000..f0de279
--- /dev/null
+++ b/nand_spl/board/freescale/p1010rdb/nand_boot.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define udelay(x) {int i, j; for (i = 0; i < x; i++) for (j = 0; j <
1; j++); }
>>> There were many comments on this udelay before, we should not use this
>>> define, but use the udelay() which u-boot provides.
>>>
>>
>> Is there a udelay that is defined for the nand_spl build? The problem is
>> doing proper time based delay in nand_spl would require a lot more code.
>
> This loop is similar to what nand_spl/nand_boot.c is using. It's ugly, but
> the goal here is small code rather than cleanliness. Is the timebase
> running at this point? How much code is required to get the timebase
> frequency?
TB isn't running so you have to turn it on in the SoC (so a few CCSRBAR
read/writes), than you have to calculate freq on some boards its a #define
constant, on other its calculated reading I2C which would add a bunch of code
for accessing I2C. I'm pretty sure we aren't going to be able to do that in 4k.
- k
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Re: [U-Boot] [PATCH v2] PPC405EX CHIP_21 erratum
> v2: > Correct checkpatch errors/warnings re: whitespace, comment style, etc. > Move PVR logic out of board config file. > Simplify ifdef structure. > Signed-off-by: Steve Falco Works for me, thanks! Tested on custom board using #define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY. Acked-by: Dirk Eibach ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nand_spl: nand_boot.c: Remove CONFIG_SYS_NAND_READ_DELAY
hi Stefan, On Wed May 04, 2011 at 11:44:14AM +0200, Stefan Roese wrote: > There are multiple reasons why this define should be removed: > > First it saves some space and therefore fixes a problem we have on > the canyonlands_nand and glacier_nand targets right now. > > Second, the define was hackish and would most likely not work on all > board using nand_boot.c. Boards not providing a real dev_ready() > function should implement a board specific function instead. > > I checked and it seems, that all boards using nand_boot.c right now > already implement a board specific dev_ready() function. So this > patch should not break any boards and will result in smaller > NAND_SPL images. Tested on hawkboard, nand_spl and u-boot images boots fine. Tested-by: Sughosh Ganu -sughosh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] net/net.c: cosmetic: variable initializations
On Wed, May 4, 2011 at 12:42, Luca Ceresoli wrote:
> Mike Frysinger wrote:
>> On Wed, May 4, 2011 at 08:40, Luca Ceresoli wrote:
>>>
>>> - ERROR: that open brace { should be on the previous line
>>> ...
>>> -uchar NetCDPAddr[6] =
>>> - { 0x01, 0x00, 0x0c, 0xcc, 0xcc, 0xcc };
>>> +uchar NetCDPAddr[6] = {
>>> + 0x01, 0x00, 0x0c, 0xcc, 0xcc, 0xcc };
>>> ...
>>
>> your fix here is worse than the original. just leave them be.
>
> Damn, you're right!
>
> I think a one-line solution would be even better (and much simpler):
>
> uchar NetCDPAddr[6] = {0x01, 0x00, 0x0c, 0xcc, 0xcc, 0xcc};
i agree
> BTW, this is the original checkpatch message:
> ERROR: that open brace { should be on the previous line
> #172: FILE: net.c:172:
> +uchar NetCDPAddr[6] =
> + { 0x01, 0x00, 0x0c, 0xcc, 0xcc, 0xcc };
>
> So either we choose the one-line solution above, or we have the first
> checkpatch message that should be disabled in the U-Boot version, when it
> will exist.
sometimes it does warn when people do things wrongly, but this is once
again why i advocate people reviewing the output and not acting like a
robot.
i cant check checkpatch atm to see how it reacts, but these are
acceptable in my mind:
uchar foo[] = { 0, 1, 2, 3, };
uchar foo[] =
{ 0, 1, 2, 3, };
uchar foo[] = {
0, 1, 2, 3,
};
the form you used though is certainly wrong (even if checkpatch didnt say so):
uchar foo[] = {
0, 1, 2, 3, };
-mike
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Re: [U-Boot] [PATCH] ppc, mgcoge: add DIP switch detection
Hi, On 05/05/2011 09:29 AM, Wolfgang Denk wrote: > Dear Holger Brunck, > > In message <4dc24dea.7010...@keymile.com> you wrote: >> >>> This patch breaks compiling of the mgcoge2ne board: > ... >> In the already posted patch serie >> http://lists.denx.de/pipermail/u-boot/2011-May/091976.html >> the problem is fixed, should I repost the patch >> powerpc/km82xx: rework DIP switch detection >> as a standalone patch and rebase the serie or can you take the whole serie? > > As the merge window is closed, this new patch series will not go into > this upcoming release any more. > Sorry but why this? The initial patch serie was postet on april 8th: http://lists.denx.de/pipermail/u-boot/2011-April/090012.html And as far as I know the merge window was closed on april 10th. The resulting patch series are a rework due to the input of the ML. Best regards Holger Brunck ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc, mgcoge: add DIP switch detection
Dear Holger Brunck, In message <4dc24dea.7010...@keymile.com> you wrote: > > > This patch breaks compiling of the mgcoge2ne board: ... > In the already posted patch serie > http://lists.denx.de/pipermail/u-boot/2011-May/091976.html > the problem is fixed, should I repost the patch > powerpc/km82xx: rework DIP switch detection > as a standalone patch and rebase the serie or can you take the whole serie? As the merge window is closed, this new patch series will not go into this upcoming release any more. Can you please extract a patch that just fixes the build problem for now? Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There's no sense in being precise when you don't even know what you're talking about. -- John von Neumann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] boot-up time optimization. Where to start?
Dear Alexander Stein, In message <201105050906.35834.alexander.st...@systec-electronic.com> you wrote: > > > Are you also still using the old environment code in your port, or is > > the new, hash table based one? When using the old code, there are > > additional penalties for using a needlessly big environment as each > > call to setenv() will recalculate the checksum. > > I was digging into this problem for a short time. And yes, the CRC > checksumcalculation takes about 25ms each run. So setenv is called for each > stdin,stdout and stderr. which sums up to ~75ms. > So you're right this is the old environment code. Here a dcache will speed up > the execution of course. Even more so would reducing the environment size to some reasonable value. Currently you are using some 2 KiB, so say you set the environment size to 8 KiB. This would be 1/16 of your current size, which means the ~75ms would shrink to less than 5 ms. You are wasting 70 ms (only here - there are other places which will add to this figure) just because this inappropriate configuration. > But our standard startup just stars U-Boot and copies the Linux kernel into > RAM and starts it. There is not much use of dcache during copy here. You are wrong. There is a huge difference between perrforming a copy operation in single write cycles to uncached RAM versus writing to a cached area where the cache flushes willoperate in burst mode. Also, the U-Boot code will run faster, too, so copying and decompression is much faster. You repeat the same mistake again: you make assumptions about what may or may not be fast or slow on your system without actually measuring it. Donald Knuth is right again: "Early optimization is the root of much evil." > > > It is using a 32-Bit RAM-Bus. So, no. > > > > And your NOR flash? > > It is connected 16-bit like most devices only support, but it is setup to use > page read mode. Well, many systems use two 16 bit chips in parallel to give a 32 bit bus. > > DC of makes things awfully slow. See comments of commits c3330e9, > > 95c6f6d and 7e4a9e6 - for plain RAM bound operations like > > copying/uncompressing an image from RAM to RAM switchign on the DC can > > accelerate the system by a factor of up to >15. > > Yes, from RAM to RAM, dcache will help a lot. But we neither copy from RAM to > RAM nor do we uncompressing. There is still a huge diference in memory bandwith between using plain single write cycles versus burst mode accesses. Don't speculate. Measure yourself! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "Send lawyers, guns and money..." - Lyrics from a Warren Zevon song ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc, mgcoge: add DIP switch detection
Hi, On 05/04/2011 10:01 PM, Wolfgang Denk wrote: > Dear Holger Brunck, > > In message <1295951175-3635-1-git-send-email-holger.bru...@keymile.com> you > wrote: >> From: Andreas Huber >> >> This reads the DIP switch on mgcoge. The DIP switch is connected to >> the BFTICU (0x4089) FPGA. If the DIP switch is set the environment >> variable 'actual_bank' is set to 0 and starts the SW in bank0. >> >> Signed-off-by: Andreas Huber >> Signed-off-by: Holger Brunck >> --- >> board/keymile/mgcoge/mgcoge.c | 18 ++ >> include/configs/mgcoge.h |5 + >> 2 files changed, 23 insertions(+), 0 deletions(-) > > This patch breaks compiling of the mgcoge2ne board: > > Configuring for mgcoge2ne board... > mgcoge.c: In function 'last_stage_init': > mgcoge.c:305: error: 'CONFIG_SYS_BFTICU_BASE' undeclared (first use in this > function) > mgcoge.c:305: error: (Each undeclared identifier is reported only once > mgcoge.c:305: error: for each function it appears in.) > Argh sorry. > > Please fix. > In the already posted patch serie http://lists.denx.de/pipermail/u-boot/2011-May/091976.html the problem is fixed, should I repost the patch powerpc/km82xx: rework DIP switch detection as a standalone patch and rebase the serie or can you take the whole serie? Best regards Holger Brunck ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] boot-up time optimization. Where to start?
Dear Wolfgang, Am Donnerstag, 5. Mai 2011, 07:32:20 schrieb Wolfgang Denk: > In message <201105030848.17576.alexander.st...@systec-electronic.com> you wrote: > > This specific version was selected due to relocation problems on ARM. But > > I expect the dcache doesn't have that big influence on the named code > > part as the environment is already in RAM. > > Your expectation is most likely completely wrong. Reading from / > writing to uncached RAM is painfully slow compared to a system with > caches turned on. And if you - as I speculate - need to checksum a > huge amount of data, this will delay things without need. > > > Are you also still using the old environment code in your port, or is > the new, hash table based one? When using the old code, there are > additional penalties for using a needlessly big environment as each > call to setenv() will recalculate the checksum. I was digging into this problem for a short time. And yes, the CRC checksumcalculation takes about 25ms each run. So setenv is called for each stdin,stdout and stderr. which sums up to ~75ms. So you're right this is the old environment code. Here a dcache will speed up the execution of course. But our standard startup just stars U-Boot and copies the Linux kernel into RAM and starts it. There is not much use of dcache during copy here. > > > (III) you are running on a narrow > > > system bus (16 bit) with non-optimal RAM timings; > > > > It is using a 32-Bit RAM-Bus. So, no. > > And your NOR flash? It is connected 16-bit like most devices only support, but it is setup to use page read mode. > And your memory timings? Should be pretty good. > > > (IV) you do all this > > > with caches turned off; > > > > dcaches should be off, while icaches are on. So yes and no. > > DC of makes things awfully slow. See comments of commits c3330e9, > 95c6f6d and 7e4a9e6 - for plain RAM bound operations like > copying/uncompressing an image from RAM to RAM switchign on the DC can > accelerate the system by a factor of up to >15. Yes, from RAM to RAM, dcache will help a lot. But we neither copy from RAM to RAM nor do we uncompressing. > > > (V) you measure some numbers but you don;t > > > understand what they mean. > > > > These numbers show me that this part of code increases the start time of > > a considerable amount. > > You don;t even understand that you have > 100 KiB of environment size > which gets checksummed without need. Mh, this might be an option for further ports. > Fact is, the code that you claim takes 100 (or 500) ms to run has no > potential for such a long run time unless your system is seriously > misconfigured. I guess it runs at least 100 times faster on all > systems I have access to. Well, as already said this is related to CRC calculation of environment. I did a fast port to v2011.03 and the setenv is a lot faster, which is due the new env code base. But I also noticed the time until kernel_entry is called is about 30ms later after reset than on the old code base. But I didn't investigate any time further to see what caused this. But AFAICS also the new U-Boot code doesn't enable dcache on ARM1136 either. Regards, Alexander ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
