Re: [U-Boot] [PATCH 9/9] mx6qsabrelite: Add splaschscreen support

2012-06-01 Thread Dirk Behme

On 31.05.2012 19:24, Fabio Estevam wrote:

Add splaschscreen support.


Here and in the subject a typo? splaschscreen -> splashscreen?

Best regards

Dirk
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Re: [U-Boot] [PATCH 7/9] mxc_i2c: Allow MX6Q I2C3 to work

2012-06-01 Thread Dirk Behme

On 01.06.2012 00:48, Fabio Estevam wrote:

Hi Troy,

On Thu, May 31, 2012 at 7:24 PM, Troy Kisky
  wrote:



This conflicts with the patch that Stefano acked on May 6.

[PATCH 1/3] mxc_i2c: specify i2c base address in config file

The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd

Signed-off-by: Troy Kisky


Ok, I can rework this patch after your commit gets in.


It seems this patch can be dropped completely and instead rework patch 
9 like


https://github.com/dirkbehme/u-boot-imx6/commit/451422a40532a9d4f86c50c57190a91f954fb795

Best regards

Dirk



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Re: [U-Boot] [PATCH v8] kirkwood: add NAS62x0 board support

2012-06-01 Thread Michael Walle

Hi Luka,

Am Dienstag 17 April 2012, 21:22:17 schrieb Luka Perkov:
> +/*
> + * Machine type
> + */
> +#define CONFIG_MACH_TYPE MACH_TYPE_NAS6210

btw i guess this will break in about half a year. because:
 - uboot follows mach-types.h from the kernel
 - the kernel will only keep mach-types for boards which are supported by the
   kernel AND using the old-style machine init, that is no boards with no
   device tree support for booting.
 - no old style machine setups are accepted for kirkwood platforms anymore.

that means at some point of time in the future MACH_TYPE_NAS6210 wont be 
defined anymore ;)

just wanted to letting you know.

-- 
michael
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[U-Boot] [PATCH v8 2/4] net: use common rand()/srand() functions

2012-06-01 Thread Michael Walle
Replace rand() with the functions from lib/. The link-local network code
stores its own seed, derived from the MAC address. Thus making it
independent from calls to srand() in other modules.

Signed-off-by: Michael Walle 
Cc: Joe Hershberger 
---
 include/common.h |4 ++-
 lib/Makefile |4 ++-
 net/Makefile |2 -
 net/link_local.c |7 +++--
 net/net_rand.c   |   68 --
 net/net_rand.h   |   31 +++-
 6 files changed, 34 insertions(+), 82 deletions(-)
 delete mode 100644 net/net_rand.c

diff --git a/include/common.h b/include/common.h
index 6ba27bc..c42f93b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -752,7 +752,9 @@ char *  strmhz(char *buf, unsigned long hz);
 #include 
 
 /* lib/rand.c */
-#ifdef CONFIG_RANDOM_MACADDR
+#if defined(CONFIG_RANDOM_MACADDR) || \
+   defined(CONFIG_BOOTP_RANDOM_DELAY) || \
+   defined(CONFIG_CMD_LINK_LOCAL)
 #define RAND_MAX -1U
 void srand(unsigned int seed);
 unsigned int rand(void);
diff --git a/lib/Makefile b/lib/Makefile
index 0ca45fc..556601c 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -67,8 +67,10 @@ COBJS-y += time.o
 COBJS-$(CONFIG_BOOTP_PXE) += uuid.o
 COBJS-y += vsprintf.o
 COBJS-$(CONFIG_RANDOM_MACADDR) += rand.o
+COBJS-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
+COBJS-$(CONFIG_CMD_LINK_LOCAL) += rand.o
 
-COBJS  := $(COBJS-y)
+COBJS  := $(sort $(COBJS-y))
 SRCS   := $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
 
diff --git a/net/Makefile b/net/Makefile
index 5264687..e7764ce 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -34,8 +34,6 @@ COBJS-$(CONFIG_CMD_DNS)  += dns.o
 COBJS-$(CONFIG_CMD_NET)  += eth.o
 COBJS-$(CONFIG_CMD_LINK_LOCAL) += link_local.o
 COBJS-$(CONFIG_CMD_NET)  += net.o
-COBJS-$(CONFIG_BOOTP_RANDOM_DELAY) += net_rand.o
-COBJS-$(CONFIG_CMD_LINK_LOCAL) += net_rand.o
 COBJS-$(CONFIG_CMD_NFS)  += nfs.o
 COBJS-$(CONFIG_CMD_PING) += ping.o
 COBJS-$(CONFIG_CMD_RARP) += rarp.o
diff --git a/net/link_local.c b/net/link_local.c
index 3362863..582d011 100644
--- a/net/link_local.c
+++ b/net/link_local.c
@@ -56,6 +56,7 @@ static unsigned conflicts;
 static unsigned nprobes;
 static unsigned nclaims;
 static int ready;
+static unsigned int seed;
 
 static void link_local_timeout(void);
 
@@ -68,7 +69,7 @@ static IPaddr_t pick(void)
unsigned tmp;
 
do {
-   tmp = rand() & IN_CLASSB_HOST;
+   tmp = rand_r(&seed) & IN_CLASSB_HOST;
} while (tmp > (IN_CLASSB_HOST - 0x0200));
return (IPaddr_t) htonl((LINKLOCAL_ADDR + 0x0100) + tmp);
 }
@@ -78,7 +79,7 @@ static IPaddr_t pick(void)
  */
 static inline unsigned random_delay_ms(unsigned secs)
 {
-   return rand() % (secs * 1000);
+   return rand_r(&seed) % (secs * 1000);
 }
 
 static void configure_wait(void)
@@ -109,7 +110,7 @@ void link_local_start(void)
}
NetOurSubnetMask = IN_CLASSB_NET;
 
-   srand_mac();
+   seed = seed_mac();
if (ip == 0)
ip = pick();
 
diff --git a/net/net_rand.c b/net/net_rand.c
deleted file mode 100644
index 5387aba..000
--- a/net/net_rand.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Based on LiMon - BOOTP.
- *
- * Copyright 1994, 1995, 2000 Neil Russell.
- * (See License)
- * Copyright 2000 Roland Borde
- * Copyright 2000 Paolo Scaffardi
- * Copyright 2000-2004 Wolfgang Denk, w...@denx.de
- */
-
-#include 
-#include 
-#include "net_rand.h"
-
-static ulong seed1, seed2;
-
-void srand_mac(void)
-{
-   ulong tst1, tst2, m_mask;
-   ulong m_value = 0;
-   int reg;
-   unsigned char bi_enetaddr[6];
-
-   /* get our mac */
-   eth_getenv_enetaddr("ethaddr", bi_enetaddr);
-
-   debug("BootpRequest => Our Mac: ");
-   for (reg = 0; reg < 6; reg++)
-   debug("%x%c", bi_enetaddr[reg], reg == 5 ? '\n' : ':');
-
-   /* Mac-Manipulation 2 get seed1 */
-   tst1 = 0;
-   tst2 = 0;
-   for (reg = 2; reg < 6; reg++) {
-   tst1 = tst1 << 8;
-   tst1 = tst1 | bi_enetaddr[reg];
-   }
-   for (reg = 0; reg < 2; reg++) {
-   tst2 = tst2 | bi_enetaddr[reg];
-   tst2 = tst2 << 8;
-   }
-
-   seed1 = tst1^tst2;
-
-   /* Mirror seed1*/
-   m_mask = 0x1;
-   for (reg = 1; reg <= 32; reg++) {
-   m_value |= (m_mask & seed1);
-   seed1 = seed1 >> 1;
-   m_value = m_value << 1;
-   }
-   seed1 = m_value;
-   seed2 = 0xb78d0945;
-}
-
-unsigned long rand(void)
-{
-   ulong sum;
-
-   /* Random Number Generator */
-   sum = seed1 + seed2;
-   if (sum < seed1 || sum < seed2)
-   sum++;
-   seed2 = seed1;
-   seed1 = sum;
-
-   return sum;
-}
diff --git a/net/net_rand.h b/net/net_rand.h
index c98db64..ba9d064 100644
--- a/net/net_rand.h
+++ b/net/net_rand.h
@@ -9,18 +9,35 @@
 #ifndef __NET_RAND_H__
 #define __NET_RAND_H__
 
-#define RAND_MAX 0x

[U-Boot] [PATCH v8 4/4] Kirkwood: add lschlv2 and lsxhl board support

2012-06-01 Thread Michael Walle
This patch adds support for both the Linkstation Live (LS-CHLv2) and
Linkstation Pro (LS-XHL) by Buffalo.

Signed-off-by: Michael Walle 
Cc: Prafulla Wadaskar 
---
 MAINTAINERS   |5 +
 board/buffalo/lsxl/Makefile   |   44 +
 board/buffalo/lsxl/kwbimage-lschl.cfg |  229 ++
 board/buffalo/lsxl/kwbimage-lsxhl.cfg |  229 ++
 board/buffalo/lsxl/lsxl.c |  283 +
 board/buffalo/lsxl/lsxl.h |   75 +
 boards.cfg|2 +
 include/configs/lsxl.h|  182 +
 8 files changed, 1049 insertions(+), 0 deletions(-)
 create mode 100644 board/buffalo/lsxl/Makefile
 create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg
 create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg
 create mode 100644 board/buffalo/lsxl/lsxl.c
 create mode 100644 board/buffalo/lsxl/lsxl.h
 create mode 100644 include/configs/lsxl.h

diff --git a/MAINTAINERS b/MAINTAINERS
index f796872..fbb2e2e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -902,6 +902,11 @@ Prafulla Wadaskar 
rd6281a ARM926EJS (Kirkwood SoC)
sheevaplug  ARM926EJS (Kirkwood SoC)
 
+Michael Walle 
+
+   lschlv2 ARM926EJS (Kirkwood SoC)
+   lsxhl   ARM926EJS (Kirkwood SoC)
+
 Tom Warren 
 
harmony Tegra2 (ARM7 & A9 Dual Core)
diff --git a/board/buffalo/lsxl/Makefile b/board/buffalo/lsxl/Makefile
new file mode 100644
index 000..36f2560
--- /dev/null
+++ b/board/buffalo/lsxl/Makefile
@@ -0,0 +1,44 @@
+#
+# Copyright (c) 2012 Michael Walle
+# Michael Walle 
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := lsxl.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/buffalo/lsxl/kwbimage-lschl.cfg 
b/board/buffalo/lsxl/kwbimage-lschl.cfg
new file mode 100644
index 000..2b9b3cd
--- /dev/null
+++ b/board/buffalo/lsxl/kwbimage-lschl.cfg
@@ -0,0 +1,229 @@
+#
+# Copyright (c) 2012 Michael Walle
+# Michael Walle 
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100E0 0x1B1B1B9B
+
+# L2 RAM Timing 0
+DATA 0xFFD20134 0x
+# not further specified in HW manual, timing taken from original vendor port
+
+# L2 RAM Timing 1
+DATA 0xFFD20138 0x00BB
+# not further specified in HW manual, timing taken from original vendor port
+
+# DDR Configuration register
+DATA 0xFFD01400 0x43000618
+# bit13-0:  0x618, 1560 DDR2 clks refresh rate
+# bit23-14: 0 required
+# bit24:1, enable exit self refresh mode on DDR access
+# bit25:1 required
+# bit29-26: 0 required
+# bit31-30: 0b01 required
+
+# DDR Controlle

[U-Boot] [PATCH v8 1/4] lib: add rand() function

2012-06-01 Thread Michael Walle
It's a PRNG using the simple and fast xorshift method.

Signed-off-by: Michael Walle 
Cc: Wolfgang Denk 
---
 include/common.h |8 
 lib/Makefile |1 +
 lib/rand.c   |   48 
 3 files changed, 57 insertions(+), 0 deletions(-)
 create mode 100644 lib/rand.c

diff --git a/include/common.h b/include/common.h
index 8564a65..6ba27bc 100644
--- a/include/common.h
+++ b/include/common.h
@@ -751,6 +751,14 @@ char * strmhz(char *buf, unsigned long hz);
 /* lib/crc32.c */
 #include 
 
+/* lib/rand.c */
+#ifdef CONFIG_RANDOM_MACADDR
+#define RAND_MAX -1U
+void srand(unsigned int seed);
+unsigned int rand(void);
+unsigned int rand_r(unsigned int *seedp);
+#endif
+
 /* common/console.c */
 intconsole_init_f(void);   /* Before relocation; uses the serial  stuff
*/
 intconsole_init_r(void);   /* After  relocation; uses the console stuff
*/
diff --git a/lib/Makefile b/lib/Makefile
index 1e8478f..0ca45fc 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -66,6 +66,7 @@ COBJS-y += string.o
 COBJS-y += time.o
 COBJS-$(CONFIG_BOOTP_PXE) += uuid.o
 COBJS-y += vsprintf.o
+COBJS-$(CONFIG_RANDOM_MACADDR) += rand.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/lib/rand.c b/lib/rand.c
new file mode 100644
index 000..c9764f5
--- /dev/null
+++ b/lib/rand.c
@@ -0,0 +1,48 @@
+/*
+ * Simple xorshift PRNG
+ *   see http://www.jstatsoft.org/v08/i14/paper
+ *
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+
+static unsigned int y = 1U;
+
+unsigned int rand_r(unsigned int *seedp)
+{
+   *seedp ^= (*seedp << 13);
+   *seedp ^= (*seedp >> 17);
+   *seedp ^= (*seedp << 5);
+
+   return *seedp;
+}
+
+unsigned int rand(void)
+{
+   return rand_r(&y);
+}
+
+void srand(unsigned int seed)
+{
+   y = seed;
+}
-- 
1.7.2.5

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[U-Boot] [PATCH v8 0/4] Kirkwood: add lschlv2 and lsxhl board support

2012-06-01 Thread Michael Walle
Changes:
v8:
 - revert CONFIG_RAND to old CONFIG_RANDOM_MACADDR
 - the features CONFIG_BOOTP_RANDOM_DELAY and CONFIG_CMD_LINK_LOCAL pulls
   rand.o implicitly now as suggested by Joe Hershberger
 - remove reset_phy() from board code. Thanks Luka Perkov for pointing
   this out
 - dont derive the seed from the timer in seed_mac()

v7:
 - rebase to new master
 - new function rand_r()
 - lib/rand.c is now selected by CONFIG_RAND, because it is used by three
   features (CONFIG_BOOTP_RANDOM_DELAY, CONFIG_RANDOM_MACADDR and
   CONFIG_CMD_LINK_LOCAL)
 - new patch: use the common rand() functions as a replacement for
   net_rand.c. This will fix the confliction function declarations, too.

v6:
 - remove dead code in Makefile
 - use eth_{g,s}etenv_enetaddr() instead of 
   eth_{g,s}etenv_enetaddr_by_index() since index is always 0

v5:
 - combine patchset again. the "net: *" patches should be individually
   acked by net custodian
 - make features configurable at compile time (CONFIG_RANDOM_MACADDR and
   CONFIG_SETENV_ENETADDR_BY_INDEX)
 - remove unused variable in boards/buffalo/lsxl.c
 - fix potential compiler warning "too many arguments for format"
 - new patch which fixes eth_getenv_enetaddr_by_index() and eth_mac_skip()
 - change initial seed of rand() to 1
 - enable CONFIG_API and CONFIG_CMD_ELF for lsxl boards

v4:
 - typo fixes (thanks Mike)
 - seed all 46bits of the generated ethernet address (suggested by Mike)
 - split patchset (generic net helpers and lsxl support)
 - fix typo in bootcmd_hdd
 - removed board/buffalo/lsxl/config.mk patch from patchset

v3:
 - add "Kirkwood:" prefix to patch subject
 - moved board/buffalo/lsxl/config.mk to an own patch, so it can be
   separately acked/naked ;)
 - removed any hardcoding, that is the mac address is now automatically
   generated (random, locally administered) and the IP settings are
   fetched with DHCP/BOOTP.
 - add detailed comments to every configuration line in kwbimage.cfg
 - add comments in MPP configuration about GPIO usage
 - removed lschlv2 ramboot
 - use short board ident string
 - small cleanups

v2:
 - add to buffalo vendor directory instead of Marvell
 - add both boards to MAINTAINERS
 - don't define values for feature macros
 - use tab for vertical alignment
 - remove static network configuration, instead introduce a rescue mode
 - add some convenience scripts
 - small cleanups

Michael Walle (4):
  lib: add rand() function
  net: use common rand()/srand() functions
  net: add helper to generate random mac address
  Kirkwood: add lschlv2 and lsxhl board support

 MAINTAINERS   |5 +
 board/buffalo/lsxl/Makefile   |   44 +
 board/buffalo/lsxl/kwbimage-lschl.cfg |  229 ++
 board/buffalo/lsxl/kwbimage-lsxhl.cfg |  229 ++
 board/buffalo/lsxl/lsxl.c |  283 +
 board/buffalo/lsxl/lsxl.h |   75 +
 boards.cfg|2 +
 include/common.h  |   10 ++
 include/configs/lsxl.h|  182 +
 include/net.h |   17 ++
 lib/Makefile  |5 +-
 lib/rand.c|   48 ++
 net/Makefile  |2 -
 net/eth.c |   22 +++
 net/link_local.c  |7 +-
 net/net_rand.c|   68 
 net/net_rand.h|   31 +++-
 17 files changed, 1178 insertions(+), 81 deletions(-)
 create mode 100644 board/buffalo/lsxl/Makefile
 create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg
 create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg
 create mode 100644 board/buffalo/lsxl/lsxl.c
 create mode 100644 board/buffalo/lsxl/lsxl.h
 create mode 100644 include/configs/lsxl.h
 create mode 100644 lib/rand.c
 delete mode 100644 net/net_rand.c

-- 
1.7.2.5

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[U-Boot] [PATCH v8 3/4] net: add helper to generate random mac address

2012-06-01 Thread Michael Walle
Add new function eth_random_enetaddr() to generate a locally administered
ethernet address.

Signed-off-by: Michael Walle 
Acked-by: Joe Hershberger 
---
 include/net.h |   17 +
 net/eth.c |   22 ++
 2 files changed, 39 insertions(+), 0 deletions(-)

diff --git a/include/net.h b/include/net.h
index a092f29..6d2d6cd 100644
--- a/include/net.h
+++ b/include/net.h
@@ -122,6 +122,23 @@ extern int eth_setenv_enetaddr(char *name, const uchar 
*enetaddr);
 extern int eth_getenv_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
 
+#ifdef CONFIG_RANDOM_MACADDR
+/*
+ * The u-boot policy does not allow hardcoded ethernet addresses. Under the
+ * following circumstances a random generated address is allowed:
+ *  - in emergency cases, where you need a working network connection to set
+ *the ethernet address.
+ *Eg. you want a rescue boot and don't have a serial port to access the
+ *CLI to set environment variables.
+ *
+ * In these cases, we generate a random locally administered ethernet address.
+ *
+ * Args:
+ *  enetaddr - returns 6 byte hardware address
+ */
+extern void eth_random_enetaddr(uchar *enetaddr);
+#endif
+
 extern int usb_eth_initialize(bd_t *bi);
 extern int eth_init(bd_t *bis);/* Initialize the 
device */
 extern int eth_send(void *packet, int length);/* Send a packet */
diff --git a/net/eth.c b/net/eth.c
index d9a6430..d526264 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -70,6 +70,28 @@ static int eth_mac_skip(int index)
return ((skip_state = getenv(enetvar)) != NULL);
 }
 
+#ifdef CONFIG_RANDOM_MACADDR
+void eth_random_enetaddr(uchar *enetaddr)
+{
+   uint32_t rval;
+
+   srand(get_timer(0));
+
+   rval = rand();
+   enetaddr[0] = rval & 0xff;
+   enetaddr[1] = (rval >> 8) & 0xff;
+   enetaddr[2] = (rval >> 16) & 0xff;
+
+   rval = rand();
+   enetaddr[3] = rval & 0xff;
+   enetaddr[4] = (rval >> 8) & 0xff;
+   enetaddr[5] = (rval >> 16) & 0xff;
+
+   /* make sure it's local and unicast */
+   enetaddr[0] = (enetaddr[0] | 0x02) & ~0x01;
+}
+#endif
+
 /*
  * CPU and board-specific Ethernet initializations.  Aliased function
  * signals caller to move on
-- 
1.7.2.5

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Re: [U-Boot] [PATCH v2 11/11] New board support: Nokia RX-51 aka N900

2012-06-01 Thread Marek Vasut
Dear Pali Rohár,

> On Friday 01 June 2012 20:48:15 Marek Vasut wrote:
> > Dear Pali Rohár,
> > 
> > > On Monday 30 April 2012 16:37:55 Tom Rini wrote:
> > > > On Sun, Apr 29, 2012 at 11:18:48AM +0200, Marek Vasut
> 
> wrote:
> > > > > Dear Pali Roh?r,
> > > > 
> > > > [snip]
> > > > 
> > > > > > Also onenand code working fine, but when is enabled
> > > > > > u-boot
> > > > > > binary is too big and cannot be flashed into this
> > > > > > device.
> > > > > > But for testing in qemu or booting u-boot with enabled
> > > > > > onenand support stored in mmc via flashed u-boot (with
> > > > > > disabled onenand support) working too.
> > > > > > 
> > > > > > Is there way how to decrease u-boot binary size?
> > > > > 
> > > > > Try compiling it in thumb mode? I think Tom Rini added
> > > > > support for that and tested it on omap.
> > > > 
> > > > Aneesh V did the real work for thumb mode for omap4/5, I
> > > > just
> > > > picked it up and addressed some comments.  It's currently
> > > > in
> > > > u-boot-arm/master.
> > > 
> > > But N900 is omap3. Has u-boot thumb support for omap3 boards
> > > too?
> > 
> > OMAP3 has the same (CortexA8) core, it will work on it too.
> > Dunno if it's enabled for OMAP3 now, but it shouldn't be hard
> > to do so.
> > 
> > Best regards,
> > Marek Vasut
> 
> There is one HW problem with thumb on N900: thumb mode is buggy
> and thumb compiled applications crashing.

What? Is it the CPU being buggy?

> But finaly last month
> we found solution for this problem. Errata 430973 workaround,

Errata of what?

> calling uboot function omap3_emu_romcode_call for setting IBE bit
> in AUX CR.

What exactly does it do?

> So now Ubuntu (which is thumb compiled) booting and
> working.

Urh.

> So for using thumb mode on N900 we first need to call first that
> function. It is possible to build u-boot in some mixed mode (some
> parts in arm and some in thumb)?

That's what you usually do -- you always start in ARM mode, then you switch to 
thumb mode. It's possible to mix thumb and arm of course, that's what normally 
happens.

> Now omap3_emu_romcode_call is
> called from misc_init_r rx51 board code.

So this problem isn't present on all omap3s ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 11/11] New board support: Nokia RX-51 aka N900

2012-06-01 Thread Pali Rohár
On Friday 01 June 2012 20:48:15 Marek Vasut wrote:
> Dear Pali Rohár,
>
> > On Monday 30 April 2012 16:37:55 Tom Rini wrote:
> > > On Sun, Apr 29, 2012 at 11:18:48AM +0200, Marek Vasut
wrote:
> > > > Dear Pali Roh?r,
> > >
> > > [snip]
> > >
> > > > > Also onenand code working fine, but when is enabled
> > > > > u-boot
> > > > > binary is too big and cannot be flashed into this
> > > > > device.
> > > > > But for testing in qemu or booting u-boot with enabled
> > > > > onenand support stored in mmc via flashed u-boot (with
> > > > > disabled onenand support) working too.
> > > > >
> > > > > Is there way how to decrease u-boot binary size?
> > > >
> > > > Try compiling it in thumb mode? I think Tom Rini added
> > > > support for that and tested it on omap.
> > >
> > > Aneesh V did the real work for thumb mode for omap4/5, I
> > > just
> > > picked it up and addressed some comments.  It's currently
> > > in
> > > u-boot-arm/master.
> >
> > But N900 is omap3. Has u-boot thumb support for omap3 boards
> > too?
> OMAP3 has the same (CortexA8) core, it will work on it too.
> Dunno if it's enabled for OMAP3 now, but it shouldn't be hard
> to do so.
>
> Best regards,
> Marek Vasut

There is one HW problem with thumb on N900: thumb mode is buggy
and thumb compiled applications crashing. But finaly last month
we found solution for this problem. Errata 430973 workaround,
calling uboot function omap3_emu_romcode_call for setting IBE bit
in AUX CR. So now Ubuntu (which is thumb compiled) booting and
working.

So for using thumb mode on N900 we first need to call first that
function. It is possible to build u-boot in some mixed mode (some
parts in arm and some in thumb)? Now omap3_emu_romcode_call is
called from misc_init_r rx51 board code.

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Re: [U-Boot] [PATCH V2] tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches

2012-06-01 Thread Stephen Warren
On 06/01/2012 12:22 PM, Tom Warren wrote:
> Missed some boards with my in after my tegra2_mmc.* -> tegra_mmc.* change,
> and one instance fo CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
> AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.
> 
> Signed-off-by: Tom Warren 

Acked-by: Stephen Warren 
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Re: [U-Boot] [PATCH] mmc: tegra: fix boards that used old CONFIG_TEGRA2_MMC build switch

2012-06-01 Thread Stephen Warren
On 06/01/2012 12:09 PM, Tom Warren wrote:
> Stephen Warren wrote at Friday, June 01, 2012 10:49 AM:
>> On 06/01/2012 11:11 AM, Tom Warren wrote:
...
>> Grep'ing for the symbols that got renamed in the current u-boot-tegra/next
>> still shows a lot of hits. For MMC those are all include guards so it
>> probably doesn't cause bugs. For SPI, there are some #defines in the driver
>> that didn't get converted.. Should those fixes be included in this patch
>> too?
>
> Current (as of right now) u-boot-tegra/next (which is where this patch lives) 
> doesn't have any instances of CONFIG_TEGRA2_MMC nor CONFIG_TEGRA2_SPI that I 
> can find. Were you using an older /next?  All T20 boards build fine from 
> /next w/MAKEALL -s tegra2. I can't test MMC on the Tamonten/Paz00/etc. boards 
> since I don't have any, but I believe I've fixed all the TEGRA2_MMC instances 
> so they should work fine.

Yeah, I guess that's true. I was grep'ing for just TEGRA2_MMC/SPI/GPIO,
not CONFIG_*.
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Re: [U-Boot] [PATCH v2 11/11] New board support: Nokia RX-51 aka N900

2012-06-01 Thread Marek Vasut
Dear Pali Rohár,

> On Monday 30 April 2012 16:37:55 Tom Rini wrote:
> > On Sun, Apr 29, 2012 at 11:18:48AM +0200, Marek Vasut wrote:
> > > Dear Pali Roh?r,
> > 
> > [snip]
> > 
> > > > Also onenand code working fine, but when is enabled u-boot
> > > > binary is too big and cannot be flashed into this device.
> > > > But for testing in qemu or booting u-boot with enabled
> > > > onenand support stored in mmc via flashed u-boot (with
> > > > disabled onenand support) working too.
> > > > 
> > > > Is there way how to decrease u-boot binary size?
> > > 
> > > Try compiling it in thumb mode? I think Tom Rini added
> > > support for that and tested it on omap.
> > 
> > Aneesh V did the real work for thumb mode for omap4/5, I just
> > picked it up and addressed some comments.  It's currently in
> > u-boot-arm/master.
> 
> But N900 is omap3. Has u-boot thumb support for omap3 boards too?

OMAP3 has the same (CortexA8) core, it will work on it too. Dunno if it's 
enabled for OMAP3 now, but it shouldn't be hard to do so.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 03/11] cfb_console: Fix function console_back

2012-06-01 Thread Pali Rohár
On Saturday 19 May 2012 21:16:13 Anatolij Gustschin wrote:
> Hi,
>
> On Sat, 28 Apr 2012 19:26:43 +0200
>
> Pali Rohár  wrote:
> >  * Do not disable and enable cursor again
> >
> > Signed-off-by: Pali Rohár 
> > ---
> >
> >  drivers/video/cfb_console.c |2 --
> >  1 file changed, 2 deletions(-)
>
> Applied to u-boot-video/master after extending the commit log.
>
> Thanks,
> Anatolij

Ok, when this patch will be in u-boot master?

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Re: [U-Boot] [PATCH v2 11/11] New board support: Nokia RX-51 aka N900

2012-06-01 Thread Pali Rohár
On Monday 30 April 2012 16:37:55 Tom Rini wrote:
> On Sun, Apr 29, 2012 at 11:18:48AM +0200, Marek Vasut wrote:
> > Dear Pali Roh?r,
>
> [snip]
>
> > > Also onenand code working fine, but when is enabled u-boot
> > > binary is too big and cannot be flashed into this device.
> > > But for testing in qemu or booting u-boot with enabled
> > > onenand support stored in mmc via flashed u-boot (with
> > > disabled onenand support) working too.
> > >
> > > Is there way how to decrease u-boot binary size?
> >
> > Try compiling it in thumb mode? I think Tom Rini added
> > support for that and tested it on omap.
>
> Aneesh V did the real work for thumb mode for omap4/5, I just
> picked it up and addressed some comments.  It's currently in
> u-boot-arm/master.

But N900 is omap3. Has u-boot thumb support for omap3 boards too?

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Re: [U-Boot] [PATCH v2 01/11] arm: Optionally use existing atags in bootm.c

2012-06-01 Thread Pali Rohár
On Sunday 29 April 2012 15:08:00 you wrote:
> Dear Pali Rohár,
>
> > On Sunday 29 April 2012 11:10:42 Marek Vasut wrote:
> > > Dear Pali Rohár,
> > >
> > > > On Sunday 29 April 2012 00:15:23 Marek Vasut wrote:
> > > > > Won't it be easier to create a preprocessing function
> > > > > that'd
> > > > > fill gd properly, so uboot can generate the atags
> > > > > through
> > > > > standard means then?
> > > >
> > > > Do you mean to generate/copy other atags in board code?
> > > > This
> > > > will not work because u-boot (in bootm.c) always passing
> > > > ATAG_CORE in function setup_start_tag. And I do not want
> > > > to
> > > > pass ATAG_CORE two times to kernel (once which I copy
> > > > from
> > > > other bootloader and once which generate u-boot).
> > >
> > > No, I mean parse the old ATAGS from nolo and fill u-boot's
> > > internal structures with that. Then let uboot generate the
> > > ATAGS from it's internal structures as usual.
> > >
> > > Best regards,
> > > Marek Vasut
> >
> > Ok, but what to do with non-standard omap/maemo atags which
> > is
> > used only for maemo (atag for bootreason, atag for bootmode
> > ...)? U-Boot does not have internal structures for these
> > non-standrad atags and also does not support passing it.
>
> Implement support for passing ad-hoc additional non-standard
> atags then?
>
> Best regards,
> Marek Vasut

Hi, what do you think about adding function setup_board_tags
which will be implemented in board code?

diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 89df4dc..572cb2a 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -267,3 +267,10 @@ struct meminfo {
 extern struct meminfo meminfo;

 #endif
+
+/*
+ * Board specified tags
+ */
+#ifdef CONFIG_SETUP_BOARD_TAGS
+void setup_board_tags(struct tag **in_params);
+#endif
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 599547d..9c27405 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -111,6 +111,15 @@ static void announce_and_cleanup(void)
defined(CONFIG_INITRD_TAG) || \
defined(CONFIG_SERIAL_TAG) || \
defined(CONFIG_REVISION_TAG)
+#ifndef CONFIG_ATAG_CORE_FLAGS
+#define CONFIG_ATAG_CORE_FLAGS 0
+#endif
+#ifndef CONFIG_ATAG_CORE_PAGESIZE
+#define CONFIG_ATAG_CORE_PAGESIZE 0
+#endif
+#ifndef CONFIG_ATAG_CORE_ROOTDEV
+#define CONFIG_ATAG_CORE_ROOTDEV 0
+#endif
 static void setup_start_tag (bd_t *bd)
 {
params = (struct tag *)bd->bi_boot_params;
@@ -118,9 +127,9 @@ static void setup_start_tag (bd_t *bd)
params->hdr.tag = ATAG_CORE;
params->hdr.size = tag_size (tag_core);

-   params->u.core.flags = 0;
-   params->u.core.pagesize = 0;
-   params->u.core.rootdev = 0;
+   params->u.core.flags = CONFIG_ATAG_CORE_FLAGS;
+   params->u.core.pagesize = CONFIG_ATAG_CORE_PAGESIZE;
+   params->u.core.rootdev = CONFIG_ATAG_CORE_ROOTDEV;

params = tag_next (params);
 }
@@ -304,6 +313,9 @@ static void boot_prep_linux(bootm_headers_t *images)
setup_initrd_tag(gd->bd, images->rd_start,
images->rd_end);
 #endif
+#ifdef CONFIG_SETUP_BOARD_TAGS
+   setup_board_tags(¶ms);
+#endif
setup_end_tag(gd->bd);
 #else /* all tags */
printf("FDT and ATAGS support not compiled in - hanging\n");


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[U-Boot] [PATCH V2] tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches

2012-06-01 Thread Tom Warren
Missed some boards with my in after my tegra2_mmc.* -> tegra_mmc.* change,
and one instance fo CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.

Signed-off-by: Tom Warren 
---
 board/avionic-design/common/tamonten.c |4 ++--
 board/compal/paz00/paz00.c |4 ++--
 board/compulab/trimslice/trimslice.c   |2 +-
 board/nvidia/common/board.c|2 +-
 include/configs/tec.h  |2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/board/avionic-design/common/tamonten.c 
b/board/avionic-design/common/tamonten.c
index 7c92158..6802172 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -37,7 +37,7 @@
 #include 
 #include 
 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 #include 
 #endif
 
@@ -58,7 +58,7 @@ void gpio_early_init(void)
 }
 #endif
 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index 0c09ce0..ec67874 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -20,7 +20,7 @@
 #include 
 #include 
 #include 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 #include 
 #endif
 
@@ -32,7 +32,7 @@ void gpio_config_uart(void)
 {
 }
 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/compulab/trimslice/trimslice.c 
b/board/compulab/trimslice/trimslice.c
index 7167c91..f15fbd7 100644
--- a/board/compulab/trimslice/trimslice.c
+++ b/board/compulab/trimslice/trimslice.c
@@ -30,7 +30,7 @@
 #include 
 #include 
 #include 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 #include 
 #endif
 
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index a159deb..fc8b928 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -94,7 +94,7 @@ int board_init(void)
 #ifdef CONFIG_SPI_UART_SWITCH
gpio_config_uart();
 #endif
-#ifdef CONFIG_TEGRA2_SPI
+#ifdef CONFIG_TEGRA_SPI
spi_init();
 #endif
/* boot param addr */
diff --git a/include/configs/tec.h b/include/configs/tec.h
index 1181fb5..d83c513 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -51,7 +51,7 @@
 /* SD/MMC */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
-#define CONFIG_TEGRA2_MMC
+#define CONFIG_TEGRA_MMC
 #define CONFIG_CMD_MMC
 
 /* USB host support */
-- 
1.7.0.4

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Re: [U-Boot] [PATCH] mmc: tegra: fix boards that used old CONFIG_TEGRA2_MMC build switch

2012-06-01 Thread Tom Warren
Stephen,

> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Friday, June 01, 2012 10:49 AM
> To: Tom Warren
> Cc: u-boot@lists.denx.de; Tom Warren
> Subject: Re: [U-Boot] [PATCH] mmc: tegra: fix boards that used old
> CONFIG_TEGRA2_MMC build switch
> 
> On 06/01/2012 11:11 AM, Tom Warren wrote:
> > Some boards came in after my tegra2_mmc.* -> tegra_mmc.* change, and
> > didn't change CONFIG_TEGRA2_MMC to CONFIG_TEGRA_MMC.
> >
> > Signed-off-by: Tom Warren 
> 
> There is also a fixup for CONFIG_TEGRA2_SPI below as well as for MMC;
> perhaps that should be mentioned in the commit description if not subject.

Yeah, sorry. That crept in. I'll add it to the commit msg.
> 
> It's not quite accurate to say that the boards came in after the rename;
> many of the instances below were things that got applied before the rename
> in git history and should really have been part of the rename patch, even if
> the patches were possibly posted to the mailing list after the rename patch
> was posted, but before being applied.

True. I'll reword the commit msg.
> 
> Grep'ing for the symbols that got renamed in the current u-boot-tegra/next
> still shows a lot of hits. For MMC those are all include guards so it
> probably doesn't cause bugs. For SPI, there are some #defines in the driver
> that didn't get converted.. Should those fixes be included in this patch
> too?
Current (as of right now) u-boot-tegra/next (which is where this patch lives) 
doesn't have any instances of CONFIG_TEGRA2_MMC nor CONFIG_TEGRA2_SPI that I 
can find. Were you using an older /next?  All T20 boards build fine from /next 
w/MAKEALL -s tegra2. I can't test MMC on the Tamonten/Paz00/etc. boards since I 
don't have any, but I believe I've fixed all the TEGRA2_MMC instances so they 
should work fine.

Tom

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Re: [U-Boot] [PATCH] mmc: tegra: fix boards that used old CONFIG_TEGRA2_MMC build switch

2012-06-01 Thread Stephen Warren
On 06/01/2012 11:11 AM, Tom Warren wrote:
> Some boards came in after my tegra2_mmc.* -> tegra_mmc.* change,
> and didn't change CONFIG_TEGRA2_MMC to CONFIG_TEGRA_MMC.
> 
> Signed-off-by: Tom Warren 

There is also a fixup for CONFIG_TEGRA2_SPI below as well as for MMC;
perhaps that should be mentioned in the commit description if not subject.

It's not quite accurate to say that the boards came in after the rename;
many of the instances below were things that got applied before the
rename in git history and should really have been part of the rename
patch, even if the patches were possibly posted to the mailing list
after the rename patch was posted, but before being applied.

Grep'ing for the symbols that got renamed in the current
u-boot-tegra/next still shows a lot of hits. For MMC those are all
include guards so it probably doesn't cause bugs. For SPI, there are
some #defines in the driver that didn't get converted.. Should those
fixes be included in this patch too?
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Re: [U-Boot] problem while making kernel up

2012-06-01 Thread Scott Wood
On 06/01/2012 05:10 AM, Manukumar wrote:
> Hello scott.
> 
> I can able make the kernel up but it hangs after probing 
> serial driver as shown below:
> 
> It has to boot further but its not happenig..
> I have attached the file i should get the log as this i also mentioned
> where it hangs...
> 
> what may be the problem with this how could i fix this issue.

This is getting off topic for the U-Boot list.  Plus, it looks like
you're using a Freescale-provided kernel.  Please e-mail
supp...@freescale.com, or try the latest upstream kernel and get help
from linuxppc-...@lists.ozlabs.org.

But in this case, since this is your custom board, and it works on the
evaluation board, this is something you'll need to debug yourself (or
hire someone to debug).

Given the place where it hangs, the obvious suggestion is to make sure
the baud rate and serial input clock are correct.

-Scott

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[U-Boot] [PATCH] mmc: tegra: fix boards that used old CONFIG_TEGRA2_MMC build switch

2012-06-01 Thread Tom Warren
Some boards came in after my tegra2_mmc.* -> tegra_mmc.* change,
and didn't change CONFIG_TEGRA2_MMC to CONFIG_TEGRA_MMC.

Signed-off-by: Tom Warren 
---
 board/avionic-design/common/tamonten.c |4 ++--
 board/compal/paz00/paz00.c |4 ++--
 board/compulab/trimslice/trimslice.c   |2 +-
 board/nvidia/common/board.c|2 +-
 include/configs/tec.h  |2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/board/avionic-design/common/tamonten.c 
b/board/avionic-design/common/tamonten.c
index 7c92158..6802172 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -37,7 +37,7 @@
 #include 
 #include 
 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 #include 
 #endif
 
@@ -58,7 +58,7 @@ void gpio_early_init(void)
 }
 #endif
 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index 0c09ce0..ec67874 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -20,7 +20,7 @@
 #include 
 #include 
 #include 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 #include 
 #endif
 
@@ -32,7 +32,7 @@ void gpio_config_uart(void)
 {
 }
 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/compulab/trimslice/trimslice.c 
b/board/compulab/trimslice/trimslice.c
index 7167c91..f15fbd7 100644
--- a/board/compulab/trimslice/trimslice.c
+++ b/board/compulab/trimslice/trimslice.c
@@ -30,7 +30,7 @@
 #include 
 #include 
 #include 
-#ifdef CONFIG_TEGRA2_MMC
+#ifdef CONFIG_TEGRA_MMC
 #include 
 #endif
 
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index a159deb..fc8b928 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -94,7 +94,7 @@ int board_init(void)
 #ifdef CONFIG_SPI_UART_SWITCH
gpio_config_uart();
 #endif
-#ifdef CONFIG_TEGRA2_SPI
+#ifdef CONFIG_TEGRA_SPI
spi_init();
 #endif
/* boot param addr */
diff --git a/include/configs/tec.h b/include/configs/tec.h
index 1181fb5..d83c513 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -51,7 +51,7 @@
 /* SD/MMC */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
-#define CONFIG_TEGRA2_MMC
+#define CONFIG_TEGRA_MMC
 #define CONFIG_CMD_MMC
 
 /* USB host support */
-- 
1.7.0.4

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Re: [U-Boot] [PATCH v7 4/4] Kirkwood: add lschlv2 and lsxhl board support

2012-06-01 Thread Luka Perkov
Hi Michael,

On Fri, Jun 01, 2012 at 12:58:41PM +0200, Michael Walle wrote:
> >> +#ifdef CONFIG_RESET_PHY_R
> >> +/* Configure and enable MV88E1118 PHY */
> >> +void reset_phy(void)
> >> +{
> >> +  u16 devadr;
> >> +  char *name = "egiga1";
> >> +
> >> +  if (miiphy_set_current_dev(name))
> >> +  return;
> >> +
> >> +  /* command to read PHY dev address */
> >> +  if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
> >> +  printf("Err..%s could not read PHY dev address\n", __func__);
> >> +  return;
> >> +  }
> >> +
> >> +  /* reset the phy */
> >> +  miiphy_reset(name, devadr);
> >> +}
> >> +#endif /* CONFIG_RESET_PHY_R */
> >
> > Can you please test without this part if your network will work?
> 
> Could you provide some more background why this should be superfluous?

Thing is that this part of the code is result of C/P from other boards. 
On some it's really neded like dlink dns320 or dns325 i dont remember 
which one. On some like ib62x0 it's not.

So whenever somebody sends patch for kirkwood board I want them to
double check if this is needed.

> Eg. what happens if an operating system changes some phy settings and
> reboots the system?

IMHO it should not have any effect.

Regards,
Luka
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Re: [U-Boot] [PATCH 2/4] EXYNOS5: PINMUX: Add pinmux for SDMMC4

2012-06-01 Thread Simon Glass
Hi Rajeshwari,

On Fri, Jun 1, 2012 at 6:13 AM, Rajeshwari Birje  wrote:

> Hi Simon,
>
> On Fri, Jun 1, 2012 at 7:03 AM, Simon Glass  wrote:
> > Hi,
> >
> > On Fri, May 25, 2012 at 4:53 AM, Rajeshwari Shinde <
> rajeshwar...@samsung.com
> >> wrote:
> >
> >> Add pinmux support for SDMMC4 on EXYNOS5.
> >>
> >> Signed-off-by: Terry Lambert 
> >> Signed-off-by: Rajeshwari Shinde 
> >>
> >
> > Is this relevant only to EVT0? It's fine if this is just a step along the
> > way, just wanted to check.
> --Yes these patches are tested on EVT0
>

OK thanks. I suppose they will need a rebase now, so will wait for that.

Regards,
Simon


> >
> >
> >> ---
> >> This patch is based on:
> >>"EXYNOS5: PINMUX: Added default pinumx settings"
> >>  arch/arm/cpu/armv7/exynos/pinmux.c |   24 +---
> >>  1 files changed, 17 insertions(+), 7 deletions(-)
> >>
> >> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
> >> b/arch/arm/cpu/armv7/exynos/pinmux.c
> >> index 103bcbb..9319fd6 100644
> >> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> >> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> >> @@ -32,7 +32,7 @@ int exynos5_pinmux_config(int peripheral, int flags)
> >>struct exynos5_gpio_part1 *gpio1 =
> >>(struct exynos5_gpio_part1 *)
> samsung_get_base_gpio_part1();
> >>struct s5p_gpio_bank *bank, *bank_ext;
> >> -   int i, start, count;
> >> +   int i, start, count, pin, pin_ext, drv;
> >>
> >>switch (peripheral) {
> >>case PERIPH_ID_UART0:
> >> @@ -66,6 +66,10 @@ int exynos5_pinmux_config(int peripheral, int flags)
> >>case PERIPH_ID_SDMMC1:
> >>case PERIPH_ID_SDMMC2:
> >>case PERIPH_ID_SDMMC3:
> >> +   case PERIPH_ID_SDMMC4:
> >> +   pin = GPIO_FUNC(0x2);
> >> +   pin_ext = GPIO_FUNC(0x3);
> >> +   drv = GPIO_DRV_4X;
> >>switch (peripheral) {
> >>case PERIPH_ID_SDMMC0:
> >>bank = &gpio1->c0; bank_ext = &gpio1->c1;
> >> @@ -79,6 +83,12 @@ int exynos5_pinmux_config(int peripheral, int flags)
> >>case PERIPH_ID_SDMMC3:
> >>bank = &gpio1->c3; bank_ext = NULL;
> >>break;
> >> +   case PERIPH_ID_SDMMC4:
> >> +   bank = &gpio1->c0; bank_ext = &gpio1->c1;
> >> +   pin = GPIO_FUNC(0x3);
> >> +   pin_ext = GPIO_FUNC(0x4);
> >> +   drv = GPIO_DRV_2X;
> >> +   break;
> >>}
> >>if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) {
> >>debug("SDMMC device %d does not support 8bit
> mode",
> >> @@ -87,20 +97,20 @@ int exynos5_pinmux_config(int peripheral, int flags)
> >>}
> >>if (flags & PINMUX_FLAG_8BIT_MODE) {
> >>for (i = 3; i <= 6; i++) {
> >> -   s5p_gpio_cfg_pin(bank_ext, i,
> >> GPIO_FUNC(0x3));
> >> +   s5p_gpio_cfg_pin(bank_ext, i, pin_ext);
> >>s5p_gpio_set_pull(bank_ext, i,
> >> GPIO_PULL_UP);
> >> -   s5p_gpio_set_drv(bank_ext, i,
> GPIO_DRV_4X);
> >> +   s5p_gpio_set_drv(bank_ext, i, drv);
> >>}
> >>}
> >>for (i = 0; i < 2; i++) {
> >> -   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
> >> +   s5p_gpio_cfg_pin(bank, i, pin);
> >>s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
> >> -   s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
> >> +   s5p_gpio_set_drv(bank, i, drv);
> >>}
> >>for (i = 3; i <= 6; i++) {
> >> -   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
> >> +   s5p_gpio_cfg_pin(bank, i, pin);
> >>s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
> >> -   s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
> >> +   s5p_gpio_set_drv(bank, i, drv);
> >>}
> >>break;
> >>case PERIPH_ID_SROMC:
> >> --
> >> 1.7.4.4
> >>
> >> Regards,
> > Simon
> >
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> >
>
> Regards,
> Rajeshwari Shinde.
>
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Re: [U-Boot] [PATCH 1/2 V4] EXYNOS5: PINMUX: Added default pinumx settings

2012-06-01 Thread Simon Glass
Hi,

On Fri, Jun 1, 2012 at 5:18 AM, Rajeshwari Shinde
wrote:

> This patch performs the pinmux configuration in a common file.
> As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
> supported.
>
> Signed-off-by: Abhilash Kesavan 
> Signed-off-by: Che-Liang Chiou 
> Signed-off-by: Rajeshwari Shinde 
> Acked-by: Chander Kashyap 
> ---
> Changes in V2:
>- Adding pinmux.c to Makefile moved to this patch.
>- exynos5_pinmux_config made static
> Changes in V3:
>- Separate functions made for each peripheral
>- enum periph_id moved to a separate periph.h
> Changes in V4:
>- removed variable declarations from exynos5_pinmux_config
>  arch/arm/cpu/armv7/exynos/Makefile|2 +-
>  arch/arm/cpu/armv7/exynos/pinmux.c|  219
> +
>  arch/arm/include/asm/arch-exynos/periph.h |   47 ++
>  arch/arm/include/asm/arch-exynos/pinmux.h |   58 
>  4 files changed, 325 insertions(+), 1 deletions(-)
>  create mode 100644 arch/arm/cpu/armv7/exynos/pinmux.c
>  create mode 100644 arch/arm/include/asm/arch-exynos/periph.h
>  create mode 100644 arch/arm/include/asm/arch-exynos/pinmux.h
>
> diff --git a/arch/arm/cpu/armv7/exynos/Makefile
> b/arch/arm/cpu/armv7/exynos/Makefile
> index 90ec2bd..9119961 100644
> --- a/arch/arm/cpu/armv7/exynos/Makefile
> +++ b/arch/arm/cpu/armv7/exynos/Makefile
> @@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
>
>  LIB= $(obj)lib$(SOC).o
>
> -COBJS  += clock.o power.o soc.o system.o
> +COBJS  += clock.o power.o soc.o system.o pinmux.o
>
>  SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
>  OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
> b/arch/arm/cpu/armv7/exynos/pinmux.c
> new file mode 100644
> index 000..597e487
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -0,0 +1,219 @@
> +/*
> + * Copyright (c) 2012 Samsung Electronics.
> + * Abhilash Kesavan 
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static void exynos5_uart_config(int peripheral)
> +{
> +   struct exynos5_gpio_part1 *gpio1 =
> +   (struct exynos5_gpio_part1 *)
> samsung_get_base_gpio_part1();
> +   struct s5p_gpio_bank *bank;
> +   int i, start, count;
> +
> +   switch (peripheral) {
> +   case PERIPH_ID_UART0:
> +   bank = &gpio1->a0;
> +   start = 0;
> +   count = 4;
> +   break;
> +   case PERIPH_ID_UART1:
> +   bank = &gpio1->a0;
> +   start = 4;
> +   count = 4;
> +   break;
> +   case PERIPH_ID_UART2:
> +   bank = &gpio1->a1;
> +   start = 0;
> +   count = 4;
> +   break;
> +   case PERIPH_ID_UART3:
> +   bank = &gpio1->a1;
> +   start = 4;
> +   count = 2;
> +   break;
> +   }
> +   for (i = start; i < start + count; i++) {
> +   s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
> +   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
> +   }
> +}
> +
> +static void exynos5_mmc_config(int peripheral, int flags)
> +{
> +   struct exynos5_gpio_part1 *gpio1 =
> +   (struct exynos5_gpio_part1 *)
> samsung_get_base_gpio_part1();
> +   struct s5p_gpio_bank *bank, *bank_ext;
> +   int i;
> +   switch (peripheral) {
> +   case PERIPH_ID_SDMMC0:
> +   bank = &gpio1->c0;
> +   bank_ext = &gpio1->c1;
> +   break;
> +   case PERIPH_ID_SDMMC1:
> +   bank = &gpio1->c1;
> +   bank_ext = NULL;
> +   break;
> +   case PERIPH_ID_SDMMC2:
> +   bank = &gpio1->c2;
> +   bank_ext = &gpio1->c3;
> +   break;
> +   case PERIPH_ID_SDMMC3:
> +   bank = &gpio1->c3;
> +   bank_ext = NULL;
> +   break;
> +   }
> +   if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) {
> +   debug("SDMMC device %d does not support 8bit mode",
> +   peripheral);
> +  

Re: [U-Boot] [PATCH 1/2 V2] EXYNOS5: PINMUX: Added default pinumx settings

2012-06-01 Thread Simon Glass
Hi Minkyu,

On Thu, May 31, 2012 at 11:41 PM, Minkyu Kang  wrote:

> Dear Simon Glass,
>
> On 1 June 2012 10:40, Simon Glass  wrote:
> > Hi,
> >
> > On Thu, May 31, 2012 at 2:57 AM, Minkyu Kang  wrote:
> >>
> >> Dear Rajeshwari Shinde,
> >>
> >> On 23 May 2012 17:54, Rajeshwari Shinde 
> wrote:
> >> > This patch performs the pinmux configuration in a common file.
> >> > As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
> >> > supported.
> >> >
> >> > Signed-off-by: Abhilash Kesavan 
> >> > Signed-off-by: Che-Liang Chiou 
> >> > Signed-off-by: Rajeshwari Shinde 
> >> > ---
> >> > changes in V2:
> >> >- Adding pinmux.c to Makefile moved to this patch.
> >> >- exynos5_pinmux_config made static.
> >> >  arch/arm/cpu/armv7/exynos/Makefile|2 +-
> >> >  arch/arm/cpu/armv7/exynos/pinmux.c|  189
> >> > +
> >> >  arch/arm/include/asm/arch-exynos/pinmux.h |   77 
> >> >  3 files changed, 267 insertions(+), 1 deletions(-)
> >> >  create mode 100644 arch/arm/cpu/armv7/exynos/pinmux.c
> >> >  create mode 100644 arch/arm/include/asm/arch-exynos/pinmux.h
> >> >
> >> > diff --git a/arch/arm/cpu/armv7/exynos/Makefile
> >> > b/arch/arm/cpu/armv7/exynos/Makefile
> >> > index 90ec2bd..9119961 100644
> >> > --- a/arch/arm/cpu/armv7/exynos/Makefile
> >> > +++ b/arch/arm/cpu/armv7/exynos/Makefile
> >> > @@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
> >> >
> >> >  LIB= $(obj)lib$(SOC).o
> >> >
> >> > -COBJS  += clock.o power.o soc.o system.o
> >> > +COBJS  += clock.o power.o soc.o system.o pinmux.o
> >> >
> >> >  SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> >> >  OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
> >> > diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
> >> > b/arch/arm/cpu/armv7/exynos/pinmux.c
> >> > new file mode 100644
> >> > index 000..c6392b2
> >> > --- /dev/null
> >> > +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> >> > @@ -0,0 +1,189 @@
> >> > +/*
> >> > + * Copyright (c) 2012 Samsung Electronics.
> >> > + * Abhilash Kesavan 
> >> > + *
> >> > + * See file CREDITS for list of people who contributed to this
> >> > + * project.
> >> > + *
> >> > + * This program is free software; you can redistribute it and/or
> >> > + * modify it under the terms of the GNU General Public License as
> >> > + * published by the Free Software Foundation; either version 2 of
> >> > + * the License, or (at your option) any later version.
> >> > + *
> >> > + * This program is distributed in the hope that it will be useful,
> >> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> >> > + * GNU General Public License for more details.
> >> > + *
> >> > + * You should have received a copy of the GNU General Public License
> >> > + * along with this program; if not, write to the Free Software
> >> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> >> > + * MA 02111-1307 USA
> >> > + */
> >> > +
> >> > +#include 
> >> > +#include 
> >>
> >> cpu.h is already included.
> >>
> >> > +#include 
> >> > +#include 
> >> > +#include 
> >> > +
> >> > +static int exynos5_pinmux_config(int peripheral, int flags)
> >> > +{
> >> > +   struct exynos5_gpio_part1 *gpio1 =
> >> > +   (struct exynos5_gpio_part1 *)
> >> > samsung_get_base_gpio_part1();
> >> > +   struct s5p_gpio_bank *bank, *bank_ext;
> >> > +   int i, start, count;
> >> > +
> >> > +   switch (peripheral) {
> >> > +   case PERIPH_ID_UART0:
> >> > +   case PERIPH_ID_UART1:
> >> > +   case PERIPH_ID_UART2:
> >> > +   case PERIPH_ID_UART3:
> >> > +   switch (peripheral) {
> >> > +   case PERIPH_ID_UART0:
> >> > +   bank = &gpio1->a0;
> >> > +   start = 0; count = 4;
> >>
> >> Please don't put multiple statement on a single line. fix it globally.
> >>
> >> > +   break;
> >> > +   case PERIPH_ID_UART1:
> >> > +   bank = &gpio1->a0;
> >> > +   start = 4; count = 4;
> >> > +   break;
> >> > +   case PERIPH_ID_UART2:
> >> > +   bank = &gpio1->a1;
> >> > +   start = 0; count = 4;
> >> > +   break;
> >> > +   case PERIPH_ID_UART3:
> >> > +   bank = &gpio1->a1;
> >> > +   start = 4; count = 2;
> >> > +   break;
> >> > +   }
> >> > +   for (i = start; i < start + count; i++) {
> >> > +   s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
> >> > +   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
> >> > +   }
> >> > +   break;
> >>
> >> Looks confused.
> >> Why don't you make function for each peripherals?
> >> e.g: exynos5_uart_config, exynos5_mmc_config.
> >
> >
> > The idea here is that later we can conf

[U-Boot] [PATCH v2] ext2load: increase read speed

2012-06-01 Thread Jason Cooper
This patch dramatically drops the amount of time u-boot needs to read a
file from an ext2 partition.  On a typical 2 to 5 MB file (kernels and
initrds) it goes from tens of seconds to a couple seconds.

All we are doing here is grouping contiguous blocks into one read.

Boot tested on Globalscale Technologies Dreamplug (Kirkwood ARM SoC)
with three different files.  sha1sums were calculated in Linux
userspace, and then confirmed after ext2load.

The following test results were provided by Eric Nelson:

Tested on i.MX6 Sabre Lite board loading a file of ~900k:

Without patch:

  MX6QSABRELITE U-Boot > time ext2load sata 0:1 1200
/usr/lib/libperl.so.5.12.4 && crc32 1200 $filesize
  Loading file "/usr/lib/libperl.so.5.12.4" from sata device 0:1
  (hda1)
  958032 bytes read

  time: 0.414 seconds, 414 ticks
  CRC32 for 1200 ... 120e9e4f ==> 550deec9

With patch:
  MX6QSABRELITE U-Boot > time ext2load sata 0:1 1200
/usr/lib/libperl.so.5.12.4 && crc32 1200 $filesize
  Loading file "/usr/lib/libperl.so.5.12.4" from sata device 0:1
  (hda1)
  958032 bytes read

  time: 0.205 seconds, 205 ticks
  CRC32 for 1200 ... 120e9e4f ==> 550deec9

And, the following results were reported by Thierry Reding:

Before:

  Tegra2 (Medcom) # time ext2load mmc 0 0x1700 /boot/uImage
  Loading file "/boot/uImage" from mmc device 0:1 (xxa1)
  5609104 bytes read

  time: 4.638 seconds, 4638 ticks
  Tegra2 (Medcom) # crc32 0x1700 559690
  CRC32 for 1700 ... 1755968f ==> 158788be

After:

  Tegra2 (Medcom) # time ext2load mmc 0 0x1700 /boot/uImage
  Loading file "/boot/uImage" from mmc device 0:1 (xxa1)
  5609104 bytes read

  time: 0.317 seconds, 317 ticks
  Tegra2 (Medcom) # crc32 0x1700 559690
  CRC32 for 1700 ... 1755968f ==> 158788be

I can also successfully load the loaded uImage to a prompt

End results.

Signed-off-by: Jason Cooper 
Tested-by: Eric Nelson 
Tested-by: Thierry Reding 
---
Changes since v1:
  - updated commit entry to include test results from Eric Nelson and Thierry
Reding

Based against tag 2012.04.01

 fs/ext2/ext2fs.c |   26 --
 1 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/fs/ext2/ext2fs.c b/fs/ext2/ext2fs.c
index f621741..f1fce48 100644
--- a/fs/ext2/ext2fs.c
+++ b/fs/ext2/ext2fs.c
@@ -420,7 +420,6 @@ int ext2fs_read_file
if (blknr < 0) {
return (-1);
}
-   blknr = blknr << log2blocksize;
 
/* Last block.  */
if (i == blockcnt - 1) {
@@ -438,6 +437,29 @@ int ext2fs_read_file
blockend -= skipfirst;
}
 
+   /* grab middle blocks in one go */
+   if (i != pos / blocksize && i != blockcnt - 1 && blockcnt > 3) {
+   int oldblk = blknr;
+   int blocknxt;
+   while (i < blockcnt - 1) {
+   blocknxt = ext2fs_read_block(node, i + 1);
+   if (blocknxt == (oldblk + 1)) {
+   oldblk = blocknxt;
+   i++;
+   } else {
+   blocknxt = ext2fs_read_block(node, i);
+   break;
+   }
+   }
+
+   if (oldblk == blknr)
+   blockend = blocksize;
+   else
+   blockend = (1 + blocknxt - blknr) * blocksize;
+   }
+
+   blknr = blknr << log2blocksize;
+
/* If the block number is 0 this block is not stored on disk but
   is zero filled instead.  */
if (blknr) {
@@ -450,7 +472,7 @@ int ext2fs_read_file
} else {
memset (buf, 0, blocksize - skipfirst);
}
-   buf += blocksize - skipfirst;
+   buf += blockend - skipfirst;
}
return (len);
 }
-- 
1.7.3.4

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Re: [U-Boot] [PATCH] tegra: trimslice: fix a couple typos

2012-06-01 Thread Marek Vasut
Dear Stephen Warren,

> On 06/01/2012 12:38 AM, Igor Grinberg wrote:
> > On 05/31/12 19:50, Stephen Warren wrote:
> >> On 05/31/2012 04:13 AM, Marek Vasut wrote:
> >>> Dear Igor Grinberg,
> >>> 
>  On 05/30/12 19:45, Stephen Warren wrote:
> > From: Stephen Warren 
> > 
> > Fix the .dts file USB unit addresses not to duplicate each-other.
> > 
> > Fix the board name string to indicate the vendor is Compulab not
> > NVIDIA.
> > 
> > Signed-off-by: Stephen Warren 
>  
>  Acked-by: Igor Grinberg 
> >>> 
> >>> Do we have one copy of the dts files here and one in Linux kernel tree?
> >>> Are they the same?
> >> 
> >> Both U-Boot and the kernel have their own copies of the .dts files.
> >> 
> >> In general, the U-Boot copy would be identical to what's in the kernel,
> >> or a pure subset since mostly the kernel's driver support is more
> >> advanced, so we've added more nodes to the DT.
> >> 
> >> That said, there are unfortunately some bizarre quirks in the way the
> >> U-Boot parses the device tree, such as requiring the /aliases node in
> >> order to enumerate at least some devices, the use of the Tegra clock
> >> binding that hasn't been incorporated into the kernel yet and is used
> >> for both clock and module reset functionality even though it's really
> >> only intended for clock functionality, and various other small
> >> properties that are U-Boot specific (although I forget if we managed to
> >> eliminate these all or not). These all end up causing differences
> >> between the two device tree files:-(
> > 
> > Thanks for the information.
> > 
> > I don't see any problem with having differences between the .dts files
> 
> > in kernel and U-Boot, because the way I see it:
> The issue isn't so much the duplicate files, but differing content.
> 
> The whole point about DT is that it's a pure representation of the
> hardware; there should be no software-dependent design or data in it.
> Put another way, both U-Boot and the Linux kernel (and indeed anything
> else) should expect the DT to be written according to the same
> "bindings" design. This doesn't preclude the U-Boot DT file being a
> strict subset of the kernel file it it needs less information, but what
> is in both should match.

Thanks for clearing it up!

> 
> > Also, IIRC, the intension was to remove the kernel .dts files after
> > "all bootloaders" know to boot the DT kernel...
> 
> I don't believe it's anything to do with bootloaders. Bootloaders are
> already (in the main) expected to provide the DTB to the kernel as a
> separate entity, irrespective of whether the DTB is built by the kernel
> boot process or from some other repository. (Although there is
> CONFIG_APPENDED_DTB to support cases where this isn't possible, it's
> much preferred not to use this). Moving the .dts files out of the kernel
> is more purely about finding a place to put them I think.
> ___
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Best regards,
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Re: [U-Boot] [GIT PULL RESEND] ext2load speedup

2012-06-01 Thread Jason Cooper
Wolfgang,

My apologies.  I pulled up the patchwork and saw that you had responded
to this email.  However, I never received it.  Time to go review my
procmailrc.  At any rate, I'll post v2 shortly as requested.

thx,

Jason.

On Sun, May 20, 2012 at 09:35:40PM -0400, Jason Cooper wrote:
> Wolfgang,
> 
> I saw you were handling some pull requests and thought this might have
> slipped through the cracks.  This patch sat on the list for quite a
> while and has two independent testers reporting substantial success
> (included in the commit).
> 
> To my knowledge, there is no fs maintainer...
> 
> thx,
> 
> Jason.
> 
> The following changes since commit 415d386877df49eb051b85ef74fa59a16dc17c7d:
> 
>   Prepare v2012.04.01 (2012-04-25 15:22:50 +0200)
> 
> are available in the git repository at:
>   git://git.infradead.org/users/jcooper/u-boot.git ext2load_speedup
> 
> Jason Cooper (1):
>   ext2load: increase read speed
> 
>  fs/ext2/ext2fs.c |   26 --
>  1 files changed, 24 insertions(+), 2 deletions(-)
> 
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Re: [U-Boot] patchwork cleanup

2012-06-01 Thread Marek Vasut
Dear Prafulla Wadaskar,

> Dear Marek
> 
> I did few cleanups in patchwork?
> I will check if further more is needed.

I just checked, it seems it's all gone now, only a few crumbles left :)

Sorry I kept pestering you so much.

Thanks a lot for cleaning it up!

> 
> Regards..
> Prafulla . . .
> 
> > -Original Message-
> > From: Marek Vasut [mailto:marek.va...@gmail.com]
> > Sent: 29 May 2012 20:17
> > To: u-boot@lists.denx.de
> > Cc: Prafulla Wadaskar; Valentin Longchamp; holger.bru...@keymile.com
> > Subject: Re: [U-Boot] [PATCH 1/3] kirkwood: add
> > kirkwood_mpp_save/restore functions
> > 
> > Dear Prafulla Wadaskar,
> > 
> > this is offtopic in this thread, but I tried contacting you about
> > thrice by now
> > via email, maybe you didn't get those mails. To get quickly to the
> > point, can
> > you please try cleaning up the patches in patchwork?
> > 
> > Thanks!
> > 
> > Best regards,
> > Marek Vasut

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] tegra: trimslice: fix a couple typos

2012-06-01 Thread Stephen Warren
On 06/01/2012 12:38 AM, Igor Grinberg wrote:
> On 05/31/12 19:50, Stephen Warren wrote:
>> On 05/31/2012 04:13 AM, Marek Vasut wrote:
>>> Dear Igor Grinberg,
>>>
 On 05/30/12 19:45, Stephen Warren wrote:
> From: Stephen Warren 
>
> Fix the .dts file USB unit addresses not to duplicate each-other.
>
> Fix the board name string to indicate the vendor is Compulab not NVIDIA.
>
> Signed-off-by: Stephen Warren 

 Acked-by: Igor Grinberg 
>>>
>>> Do we have one copy of the dts files here and one in Linux kernel tree? Are 
>>> they 
>>> the same?
>>
>> Both U-Boot and the kernel have their own copies of the .dts files.
>>
>> In general, the U-Boot copy would be identical to what's in the kernel,
>> or a pure subset since mostly the kernel's driver support is more
>> advanced, so we've added more nodes to the DT.
>>
>> That said, there are unfortunately some bizarre quirks in the way the
>> U-Boot parses the device tree, such as requiring the /aliases node in
>> order to enumerate at least some devices, the use of the Tegra clock
>> binding that hasn't been incorporated into the kernel yet and is used
>> for both clock and module reset functionality even though it's really
>> only intended for clock functionality, and various other small
>> properties that are U-Boot specific (although I forget if we managed to
>> eliminate these all or not). These all end up causing differences
>> between the two device tree files:-(
> 
> Thanks for the information.
> 
> I don't see any problem with having differences between the .dts files
> in kernel and U-Boot, because the way I see it:

The issue isn't so much the duplicate files, but differing content.

The whole point about DT is that it's a pure representation of the
hardware; there should be no software-dependent design or data in it.
Put another way, both U-Boot and the Linux kernel (and indeed anything
else) should expect the DT to be written according to the same
"bindings" design. This doesn't preclude the U-Boot DT file being a
strict subset of the kernel file it it needs less information, but what
is in both should match.

> Also, IIRC, the intension was to remove the kernel .dts files after
> "all bootloaders" know to boot the DT kernel...

I don't believe it's anything to do with bootloaders. Bootloaders are
already (in the main) expected to provide the DTB to the kernel as a
separate entity, irrespective of whether the DTB is built by the kernel
boot process or from some other repository. (Although there is
CONFIG_APPENDED_DTB to support cases where this isn't possible, it's
much preferred not to use this). Moving the .dts files out of the kernel
is more purely about finding a place to put them I think.
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[U-Boot] Sources for Ikanos VX160 here

2012-06-01 Thread Benjamin Henrion
Hi,

The sources of the uboot for the Ikanos VX160 chip has been published here:

http://filez.zoobab.com/bbox2/mirrors/danitool/uboot-vx160.tar.gz
http://files.myopera.com/danitool/xx/uboot-vx160.tar.gz

Is it easy to extract the patches against the official uboot version?

And maybe merge them back in the main line?

Best,

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FFII Brussels - +32-484-566109 - +32-2-3500762
"In July 2005, after several failed attempts to legalise software
patents in Europe, the patent establishment changed its strategy.
Instead of explicitly seeking to sanction the patentability of
software, they are now seeking to create a central European patent
court, which would establish and enforce patentability rules in their
favor, without any possibility of correction by competing courts or
democratically elected legislators."
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Re: [U-Boot] [PATCH 2/4] EXYNOS5: PINMUX: Add pinmux for SDMMC4

2012-06-01 Thread Rajeshwari Birje
Hi Simon,

On Fri, Jun 1, 2012 at 7:03 AM, Simon Glass  wrote:
> Hi,
>
> On Fri, May 25, 2012 at 4:53 AM, Rajeshwari Shinde > wrote:
>
>> Add pinmux support for SDMMC4 on EXYNOS5.
>>
>> Signed-off-by: Terry Lambert 
>> Signed-off-by: Rajeshwari Shinde 
>>
>
> Is this relevant only to EVT0? It's fine if this is just a step along the
> way, just wanted to check.
--Yes these patches are tested on EVT0
>
>
>> ---
>> This patch is based on:
>>        "EXYNOS5: PINMUX: Added default pinumx settings"
>>  arch/arm/cpu/armv7/exynos/pinmux.c |   24 +---
>>  1 files changed, 17 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
>> b/arch/arm/cpu/armv7/exynos/pinmux.c
>> index 103bcbb..9319fd6 100644
>> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
>> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
>> @@ -32,7 +32,7 @@ int exynos5_pinmux_config(int peripheral, int flags)
>>        struct exynos5_gpio_part1 *gpio1 =
>>                (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
>>        struct s5p_gpio_bank *bank, *bank_ext;
>> -       int i, start, count;
>> +       int i, start, count, pin, pin_ext, drv;
>>
>>        switch (peripheral) {
>>        case PERIPH_ID_UART0:
>> @@ -66,6 +66,10 @@ int exynos5_pinmux_config(int peripheral, int flags)
>>        case PERIPH_ID_SDMMC1:
>>        case PERIPH_ID_SDMMC2:
>>        case PERIPH_ID_SDMMC3:
>> +       case PERIPH_ID_SDMMC4:
>> +               pin = GPIO_FUNC(0x2);
>> +               pin_ext = GPIO_FUNC(0x3);
>> +               drv = GPIO_DRV_4X;
>>                switch (peripheral) {
>>                case PERIPH_ID_SDMMC0:
>>                        bank = &gpio1->c0; bank_ext = &gpio1->c1;
>> @@ -79,6 +83,12 @@ int exynos5_pinmux_config(int peripheral, int flags)
>>                case PERIPH_ID_SDMMC3:
>>                        bank = &gpio1->c3; bank_ext = NULL;
>>                        break;
>> +               case PERIPH_ID_SDMMC4:
>> +                       bank = &gpio1->c0; bank_ext = &gpio1->c1;
>> +                       pin = GPIO_FUNC(0x3);
>> +                       pin_ext = GPIO_FUNC(0x4);
>> +                       drv = GPIO_DRV_2X;
>> +                       break;
>>                }
>>                if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) {
>>                        debug("SDMMC device %d does not support 8bit mode",
>> @@ -87,20 +97,20 @@ int exynos5_pinmux_config(int peripheral, int flags)
>>                }
>>                if (flags & PINMUX_FLAG_8BIT_MODE) {
>>                        for (i = 3; i <= 6; i++) {
>> -                               s5p_gpio_cfg_pin(bank_ext, i,
>> GPIO_FUNC(0x3));
>> +                               s5p_gpio_cfg_pin(bank_ext, i, pin_ext);
>>                                s5p_gpio_set_pull(bank_ext, i,
>> GPIO_PULL_UP);
>> -                               s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
>> +                               s5p_gpio_set_drv(bank_ext, i, drv);
>>                        }
>>                }
>>                for (i = 0; i < 2; i++) {
>> -                       s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
>> +                       s5p_gpio_cfg_pin(bank, i, pin);
>>                        s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
>> -                       s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
>> +                       s5p_gpio_set_drv(bank, i, drv);
>>                }
>>                for (i = 3; i <= 6; i++) {
>> -                       s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
>> +                       s5p_gpio_cfg_pin(bank, i, pin);
>>                        s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
>> -                       s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
>> +                       s5p_gpio_set_drv(bank, i, drv);
>>                }
>>                break;
>>        case PERIPH_ID_SROMC:
>> --
>> 1.7.4.4
>>
>> Regards,
> Simon
>
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Regards,
Rajeshwari Shinde.
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Re: [U-Boot] [PATCH] Consolidate bootcount code into drivers/bootcount

2012-06-01 Thread Stefan Roese
Hi Christian,

On Friday 01 June 2012 14:51:32 Christian Riesch wrote:
> > +void bootcount_store(ulong a)
> > +{
> > +   struct davinci_rtc *reg =
> > +   (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
> > +
> > +   /*
> > +* write RTC kick register to enable write
> > +* for RTC Scratch registers. Scratch0 and 1 are
> > +* used for bootcount values.
> > +*/
> > +   writel(RTC_KICK0R_WE, ®->kick0r);
> > +   writel(RTC_KICK1R_WE, ®->kick1r);
> > +   out_be32(®->scratch0, a);
> > +   out_be32(®->scratch1, BOOTCOUNT_MAGIC);
> 
> This code here seems to be copied from the enbw_cmc board. The
> calimain board uses writel instead of out_be32 for the scratch
> registers (because I didn't understand why we should use big endian on
> a little endian machine). So your patch changes the byte order here
> for the calimain board and thus breaks our boot counter support.

I missed this difference. Thanks for spotting.

> What's the reason for using out_be32 here?

I assume historical reasons, as all this bootcounter code is originated from 
powerpc specific code. Heiko, is this correct?

> > +}
> > +
> > +ulong bootcount_load(void)
> > +{
> > +   struct davinci_rtc *reg =
> > +   (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
> > +
> > +   if (in_be32(®->scratch1) != BOOTCOUNT_MAGIC)
> > +   return 0;
> > +   else
> > +   return in_be32(®->scratch0);
> 
> Same as above, the calimain board uses readl instead of in_be32.
> 
> I replaced out_be32 by writel and in_be32 by readl and tested it on
> the calimain board, it works fine :-)

I see. Too bad, now we have two Davince boards using nearly the same driver, 
one little endian and one big endian. If none of both boards can be changed, 
then we need to add an configuration switch to select the endianess.

Heiko? Any comments?

Thanks,
Stefan

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Re: [U-Boot] mx28 battery support

2012-06-01 Thread Marek Vasut
Dear alex,

>  Hi Marek:
>   I found your patch of battery in u-boot mainline. I want to know which
> kernel version

You mean u-boot? Mainline u-boot.

> you used for testing and whether the kernel you tested
> includes battery driver.

Ah I see ... we use mainline linux kernel, there's no power management in the 
mainline linux kernel.

> Best Regards,
> Alex

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] Kirkwood: Add support for Ka-Ro TK71

2012-06-01 Thread Marek Vasut
Dear Prafulla Wadaskar,

> > -Original Message-
> > From: Marek Vasut [mailto:ma...@denx.de]
> > Sent: 31 May 2012 16:37
> > To: u-boot@lists.denx.de
> > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk
> > Subject: [PATCH] Kirkwood: Add support for Ka-Ro TK71
> > 
> > Signed-off-by: Marek Vasut 
> > Cc: Prafulla Wadaskar 
> > Cc: Wolfgang Denk 
> > ---
> > 
> >  board/karo/tk71/Makefile |   45 ++
> >  board/karo/tk71/kwbimage-256.cfg |  174
> > 
> > ++
> > 
> >  board/karo/tk71/kwbimage-512.cfg |  174
> > 
> > ++
> 
> Dear Marek
> Just for DRAM size change do not add one more cfg file, configure by
> default 256MB of RAM in default kwbimg.cfg file and in function
> board_early_init_f() tune it to 512 for your other board version.

There's only one single bit flipped between those two kwb configs. Do you think 
it'd work if we just configured the system for 512MB RAM and ran get_ram_size() 
to see if it has only 256MB? That'd eliminate two board entries for this tk71.

> 
> Regards..
> Prafulla . . .

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] net: Multiple updates/enhancements to designware.c

2012-06-01 Thread Stefan Roese
Joe,

On Wednesday 09 May 2012 11:36:56 Stefan Roese wrote:
> > > +++ b/include/configs/spear-common.h
> > > @@ -38,6 +38,7 @@
> > > 
> > >   #define CONFIG_NET_MULTI
> > >   #define CONFIG_PHY_RESET_DELAY  1   /*
> 
> in usec */
> 
> > >   #define CONFIG_DW_AUTONEG
> > > 
> > > +#define CONFIG_PHY_GIGE  /* Include GbE speed/duplex
> 
> detection */
> 
> > Shouldn't this come in a separate patch?
> 
> Not sure. This change is needed for this change in the designware driver to
> really work with 1000mbps links:
> 
> - Use common functions miiphy_speed()&  miiphy_duplex() to read
>   link status from PHY.
> 
> Splitting it into a separate commit will result in a non working ethernet
> driver for such links. Even though it should still compile and be git
> bisectable. I would prefer to keep it in one patch.

Are you okay with this patch? If yes, perhaps it would be best if I would push 
this patch with the other SPEAr platform patches upstream. What do you think? 
Can I have your Acked-by?

Thanks,
Stefan

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Re: [U-Boot] [PATCH] Consolidate bootcount code into drivers/bootcount

2012-06-01 Thread Christian Riesch
Hi Stefan,

On Fri, Jun 1, 2012 at 11:52 AM, Stefan Roese  wrote:
> This patch moves all bootcount implementations into a common
> directory: drivers/bootcount. The generic bootcount driver
> (bootcount.c) is now usable not only by powerpc platforms, but
> others as well. Highbank is already moved to this "generic"
> code. For all other non-generic implementations, SoC specific
> drivers have been created (e.g. bootcount_at91.c).

Thank you for this patch! I have reviewed and tested the
davinci/calimain parts of it, please see below.

[...]

> diff --git a/drivers/bootcount/bootcount_davinci.c 
> b/drivers/bootcount/bootcount_davinci.c
> new file mode 100644
> index 000..8674eb7
> --- /dev/null
> +++ b/drivers/bootcount/bootcount_davinci.c
> @@ -0,0 +1,50 @@
> +/*
> + * (C) Copyright 2011
> + * Heiko Schocher, DENX Software Engineering, h...@denx.de.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +void bootcount_store(ulong a)
> +{
> +       struct davinci_rtc *reg =
> +               (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
> +
> +       /*
> +        * write RTC kick register to enable write
> +        * for RTC Scratch registers. Scratch0 and 1 are
> +        * used for bootcount values.
> +        */
> +       writel(RTC_KICK0R_WE, ®->kick0r);
> +       writel(RTC_KICK1R_WE, ®->kick1r);
> +       out_be32(®->scratch0, a);
> +       out_be32(®->scratch1, BOOTCOUNT_MAGIC);

This code here seems to be copied from the enbw_cmc board. The
calimain board uses writel instead of out_be32 for the scratch
registers (because I didn't understand why we should use big endian on
a little endian machine). So your patch changes the byte order here
for the calimain board and thus breaks our boot counter support.

What's the reason for using out_be32 here?

> +}
> +
> +ulong bootcount_load(void)
> +{
> +       struct davinci_rtc *reg =
> +               (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
> +
> +       if (in_be32(®->scratch1) != BOOTCOUNT_MAGIC)
> +               return 0;
> +       else
> +               return in_be32(®->scratch0);

Same as above, the calimain board uses readl instead of in_be32.

I replaced out_be32 by writel and in_be32 by readl and tested it on
the calimain board, it works fine :-)

Regards, Christian
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Re: [U-Boot] [PATCH 6/8] I2C: Modify the I2C driver for EXYNOS5

2012-06-01 Thread Rajeshwari Birje
Hi Simon,

Thank you for comments.

On Fri, Jun 1, 2012 at 6:47 AM, Simon Glass  wrote:
> Hi,
>
> On Fri, May 18, 2012 at 5:12 AM, Rajeshwari Shinde > wrote:
>
>> This patch modifies the S3C I2C driver to suppport EXYNOS5.
>> The cahnges made to driver are as follows:
>>        - I2C base address is passed as a parameter to many
>>        functions to avoid multiple #ifdef
>>        - I2C init for Exynos5 is made as different function.
>>        - Channel initialisation is moved to a commom funation
>>        as it is required by both the i2c_init.
>>        - Separate functions written to get I2C base address,
>>        peripheral id for pinmux support.
>>        - Hardcoding for I2CCON_ACKGEN removed.
>>        - Replaced printf with debug.
>>        - Checkpatch issues resolved.
>>
>> Signed-off-by: Alim Akhtar 
>> Signed-off-by: Doug Anderson 
>> Signed-off-by: Rajeshwari Shinde 
>>
>
> Just a nit and a question, but:
>
> Acked-by: Simon Glass 
>
>
>> ---
>>  drivers/i2c/s3c24x0_i2c.c |  250
>> -
>>  drivers/i2c/s3c24x0_i2c.h |   10 ++
>>  2 files changed, 188 insertions(+), 72 deletions(-)
>>
>> diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
>> index ba6f39b..61b54a9 100644
>> --- a/drivers/i2c/s3c24x0_i2c.c
>> +++ b/drivers/i2c/s3c24x0_i2c.c
>> @@ -27,10 +27,18 @@
>>  */
>>
>>  #include 
>> +#ifdef CONFIG_EXYNOS5
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#else
>>  #include 
>> +#endif
>>
>>  #include 
>>  #include 
>> +#include "s3c24x0_i2c.h"
>>
>>  #ifdef CONFIG_HARD_I2C
>>
>> @@ -45,6 +53,7 @@
>>
>>  #define I2CSTAT_BSY    0x20    /* Busy bit */
>>  #define I2CSTAT_NACK   0x01    /* Nack bit */
>> +#define I2CCON_ACKGEN  0x80    /* Acknowledge generation */
>>  #define I2CCON_IRPND   0x10    /* Interrupt pending bit */
>>  #define I2C_MODE_MT    0xC0    /* Master Transmit Mode */
>>  #define I2C_MODE_MR    0x80    /* Master Receive Mode */
>> @@ -53,6 +62,41 @@
>>
>>  #define I2C_TIMEOUT 1          /* 1 second */
>>
>> +#ifdef CONFIG_EXYNOS5
>> +static unsigned int g_current_bus;     /* Stores Current I2C Bus */
>> +
>> +/* We should not rely on any particular ordering of these IDs */
>> +static enum periph_id periph_for_dev[] = {
>> +       PERIPH_ID_I2C0,
>> +       PERIPH_ID_I2C1,
>> +       PERIPH_ID_I2C2,
>> +       PERIPH_ID_I2C3,
>> +       PERIPH_ID_I2C4,
>> +       PERIPH_ID_I2C5,
>> +       PERIPH_ID_I2C6,
>> +       PERIPH_ID_I2C7,
>> +};
>> +
>> +static enum periph_id i2c_get_periph_id(unsigned dev_index)
>> +{
>> +       if (dev_index < ARRAY_SIZE(periph_for_dev))
>> +               return periph_for_dev[dev_index];
>> +       debug("%s: invalid bus %d", __func__, dev_index);
>> +       return PERIPH_ID_NONE;
>> +}
>> +
>> +static struct s3c24x0_i2c *get_base_i2c(int bus_idx)
>> +{
>> +       struct s3c24x0_i2c *i2c = (struct s3c24x0_i2c
>> *)samsung_get_base_i2c();
>>
>
> blank line here
-- will correct this.
>
>
>> +       return &i2c[bus_idx];
>> +}
>> +
>> +static inline struct exynos5_gpio_part1 *exynos_get_base_gpio1(void)
>> +{
>> +       return (struct exynos5_gpio_part1 *)(EXYNOS5_GPIO_PART1_BASE);
>>
>
> OK for now - I assume you will pick up the GPIO patches later and move this
> there.
-- yes
>
>
>> +}
>> +
>> +#else
>>  static int GetI2CSDA(void)
>>  {
>>        struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
>> @@ -77,16 +121,17 @@ static void SetI2CSCL(int x)
>>        struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
>>
>>  #ifdef CONFIG_S3C2410
>> -       writel((readl(&gpio->gpedat) & ~0x4000) | (x & 1) << 14,
>> &gpio->gpedat);
>> +       writel((readl(&gpio->gpedat) & ~0x4000) |
>> +                                       (x & 1) << 14, &gpio->gpedat);
>>
>
> unrelated change?
-- it is correction of a checkpatch error
>
>
>>  #endif
>>  #ifdef CONFIG_S3C2400
>>        writel((readl(&gpio->pgdat) & ~0x0040) | (x & 1) << 6,
>> &gpio->pgdat);
>>  #endif
>>  }
>> +#endif
>>
>> -static int WaitForXfer(void)
>> +static int WaitForXfer(struct s3c24x0_i2c *i2c)
>>  {
>> -       struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
>>        int i;
>>
>>        i = I2C_TIMEOUT * 1;
>> @@ -98,25 +143,84 @@ static int WaitForXfer(void)
>>        return (readl(&i2c->iiccon) & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
>>  }
>>
>> -static int IsACK(void)
>> +static int IsACK(struct s3c24x0_i2c *i2c)
>>  {
>> -       struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
>> -
>>        return !(readl(&i2c->iicstat) & I2CSTAT_NACK);
>>  }
>>
>> -static void ReadWriteByte(void)
>> +static void ReadWriteByte(struct s3c24x0_i2c *i2c)
>>  {
>> -       struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
>> -
>>        writel(readl(&i2c->iiccon) & ~I2CCON_IRPND, &i2c->iiccon);
>>  }
>>
>> +static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd)
>> +{
>> +       ulong freq, pres = 16, div;
>> +#ifdef CONFIG_EXYNOS5
>> +       freq = get_i2c_clk();
>> +#else
>> +       freq = get_PCLK();
>> +#

[U-Boot] [PATCH 2/2 V4] EXYNOS: SMDK5250: Enable the pinmux setup

2012-06-01 Thread Rajeshwari Shinde
Use the pinmux configuration function for SMDK5250.

Signed-off-by: Abhilash Kesavan 
Signed-off-by: Rajeshwari Shinde 
Acked-by: Chander Kashyap 
Acked-by: Simon Glass 
---
Changes in V2:
- Removed exynos5_gpio_part1 *gpio1 global variable as initialised in
 pinmux.c.
Changes in V3:
- Added a error return for smc9115_pre_init and board_uart_init.
 board/samsung/smdk5250/smdk5250.c |  176 -
 1 files changed, 38 insertions(+), 138 deletions(-)

diff --git a/board/samsung/smdk5250/smdk5250.c 
b/board/samsung/smdk5250/smdk5250.c
index 32786e2..4d16950 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -26,81 +26,16 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
-struct exynos5_gpio_part1 *gpio1;
 
 #ifdef CONFIG_SMC911X
-static void smc9115_pre_init(void)
+static int smc9115_pre_init(void)
 {
u32 smc_bw_conf, smc_bc_conf;
-   int i;
-
-   /*
-* SROM:CS1 and EBI
-*
-* GPY0[0]  SROM_CSn[0]
-* GPY0[1]  SROM_CSn[1](2)
-* GPY0[2]  SROM_CSn[2]
-* GPY0[3]  SROM_CSn[3]
-* GPY0[4]  EBI_OEn(2)
-* GPY0[5]  EBI_EEn(2)
-*
-* GPY1[0]  EBI_BEn[0](2)
-* GPY1[1]  EBI_BEn[1](2)
-* GPY1[2]  SROM_WAIT(2)
-* GPY1[3]  EBI_DATA_RDn(2)
-*/
-   s5p_gpio_cfg_pin(&gpio1->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
-   s5p_gpio_cfg_pin(&gpio1->y0, 4, GPIO_FUNC(2));
-   s5p_gpio_cfg_pin(&gpio1->y0, 5, GPIO_FUNC(2));
-
-   for (i = 0; i < 4; i++)
-   s5p_gpio_cfg_pin(&gpio1->y1, i, GPIO_FUNC(2));
-
-   /*
-* EBI: 8 Addrss Lines
-*
-* GPY3[0]  EBI_ADDR[0](2)
-* GPY3[1]  EBI_ADDR[1](2)
-* GPY3[2]  EBI_ADDR[2](2)
-* GPY3[3]  EBI_ADDR[3](2)
-* GPY3[4]  EBI_ADDR[4](2)
-* GPY3[5]  EBI_ADDR[5](2)
-* GPY3[6]  EBI_ADDR[6](2)
-* GPY3[7]  EBI_ADDR[7](2)
-*
-* EBI: 16 Data Lines
-*
-* GPY5[0]  EBI_DATA[0](2)
-* GPY5[1]  EBI_DATA[1](2)
-* GPY5[2]  EBI_DATA[2](2)
-* GPY5[3]  EBI_DATA[3](2)
-* GPY5[4]  EBI_DATA[4](2)
-* GPY5[5]  EBI_DATA[5](2)
-* GPY5[6]  EBI_DATA[6](2)
-* GPY5[7]  EBI_DATA[7](2)
-*
-* GPY6[0]  EBI_DATA[8](2)
-* GPY6[1]  EBI_DATA[9](2)
-* GPY6[2]  EBI_DATA[10](2)
-* GPY6[3]  EBI_DATA[11](2)
-* GPY6[4]  EBI_DATA[12](2)
-* GPY6[5]  EBI_DATA[13](2)
-* GPY6[6]  EBI_DATA[14](2)
-* GPY6[7]  EBI_DATA[15](2)
-*/
-   for (i = 0; i < 8; i++) {
-   s5p_gpio_cfg_pin(&gpio1->y3, i, GPIO_FUNC(2));
-   s5p_gpio_set_pull(&gpio1->y3, i, GPIO_PULL_UP);
-
-   s5p_gpio_cfg_pin(&gpio1->y5, i, GPIO_FUNC(2));
-   s5p_gpio_set_pull(&gpio1->y5, i, GPIO_PULL_UP);
-
-   s5p_gpio_cfg_pin(&gpio1->y6, i, GPIO_FUNC(2));
-   s5p_gpio_set_pull(&gpio1->y6, i, GPIO_PULL_UP);
-   }
+   int err;
 
/* Ethernet needs data bus width of 16 bits */
smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
@@ -112,14 +47,20 @@ static void smc9115_pre_init(void)
| SROMC_BC_PMC(0x01);
 
/* Select and configure the SROMC bank */
+   err = exynos_pinmux_config(PERIPH_ID_SROMC,
+   CONFIG_ENV_SROM_BANK | PINMUX_FLAG_16BIT);
+   if (err < 0) {
+   debug("SROMC not configured\n");
+   return -1;
+   }
+
s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
+   return 0;
 }
 #endif
 
 int board_init(void)
 {
-   gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
-
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
 }
@@ -168,7 +109,8 @@ void dram_init_banksize(void)
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_SMC911X
-   smc9115_pre_init();
+   if (smc9115_pre_init())
+   return -1;
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
 #endif
return 0;
@@ -186,31 +128,12 @@ int checkboard(void)
 #ifdef CONFIG_GENERIC_MMC
 int board_mmc_init(bd_t *bis)
 {
-   int i, err;
-
-   /*
-* MMC2 SD card GPIO:
-*
-* GPC2[0]  SD_2_CLK(2)
-* GPC2[1]  SD_2_CMD(2)
-* GPC2[2]  SD_2_CDn
-* GPC2[3:6]SD_2_DATA[0:3](2)
-*/
-   for (i = 0; i < 7; i++) {
-   /* GPC2[0:6] special function 2 */
-   s5p_gpio_cfg_pin(&gpio1->c2, i, GPIO_FUNC(0x2));
-
-   /* GPK2[0:6] drv 4x */
-   s5p_gpio_set_drv(&gpio1->c2, i, GPIO_DRV_4X);
+   int err;
 
-   /* GPK2[0:1] pull disable */
-   if (i == 0 ||

[U-Boot] [PATCH 1/2 V4] EXYNOS5: PINMUX: Added default pinumx settings

2012-06-01 Thread Rajeshwari Shinde
This patch performs the pinmux configuration in a common file.
As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
supported.

Signed-off-by: Abhilash Kesavan 
Signed-off-by: Che-Liang Chiou 
Signed-off-by: Rajeshwari Shinde 
Acked-by: Chander Kashyap 
---
Changes in V2:
- Adding pinmux.c to Makefile moved to this patch.
- exynos5_pinmux_config made static
Changes in V3:
- Separate functions made for each peripheral
- enum periph_id moved to a separate periph.h
Changes in V4:
- removed variable declarations from exynos5_pinmux_config
 arch/arm/cpu/armv7/exynos/Makefile|2 +-
 arch/arm/cpu/armv7/exynos/pinmux.c|  219 +
 arch/arm/include/asm/arch-exynos/periph.h |   47 ++
 arch/arm/include/asm/arch-exynos/pinmux.h |   58 
 4 files changed, 325 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/exynos/pinmux.c
 create mode 100644 arch/arm/include/asm/arch-exynos/periph.h
 create mode 100644 arch/arm/include/asm/arch-exynos/pinmux.h

diff --git a/arch/arm/cpu/armv7/exynos/Makefile 
b/arch/arm/cpu/armv7/exynos/Makefile
index 90ec2bd..9119961 100644
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(SOC).o
 
-COBJS  += clock.o power.o soc.o system.o
+COBJS  += clock.o power.o soc.o system.o pinmux.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
new file mode 100644
index 000..597e487
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -0,0 +1,219 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics.
+ * Abhilash Kesavan 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static void exynos5_uart_config(int peripheral)
+{
+   struct exynos5_gpio_part1 *gpio1 =
+   (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+   struct s5p_gpio_bank *bank;
+   int i, start, count;
+
+   switch (peripheral) {
+   case PERIPH_ID_UART0:
+   bank = &gpio1->a0;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART1:
+   bank = &gpio1->a0;
+   start = 4;
+   count = 4;
+   break;
+   case PERIPH_ID_UART2:
+   bank = &gpio1->a1;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART3:
+   bank = &gpio1->a1;
+   start = 4;
+   count = 2;
+   break;
+   }
+   for (i = start; i < start + count; i++) {
+   s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+   }
+}
+
+static void exynos5_mmc_config(int peripheral, int flags)
+{
+   struct exynos5_gpio_part1 *gpio1 =
+   (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+   struct s5p_gpio_bank *bank, *bank_ext;
+   int i;
+   switch (peripheral) {
+   case PERIPH_ID_SDMMC0:
+   bank = &gpio1->c0;
+   bank_ext = &gpio1->c1;
+   break;
+   case PERIPH_ID_SDMMC1:
+   bank = &gpio1->c1;
+   bank_ext = NULL;
+   break;
+   case PERIPH_ID_SDMMC2:
+   bank = &gpio1->c2;
+   bank_ext = &gpio1->c3;
+   break;
+   case PERIPH_ID_SDMMC3:
+   bank = &gpio1->c3;
+   bank_ext = NULL;
+   break;
+   }
+   if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) {
+   debug("SDMMC device %d does not support 8bit mode",
+   peripheral);
+   return -1;
+   }
+   if (flags & PINMUX_FLAG_8BIT_MODE) {
+   for (i = 3; i <= 6; i++) {
+   s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+   s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
+   s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+  

Re: [U-Boot] facing issues with malloc in U-Boot

2012-06-01 Thread Sandeep Kumar
Hi Graeme,

Thanks a lot for prompt reply and helping me in resolving my problem. The 
problem was that my board specific code was calling malloc before " 
mem_malloc_init" being called. Moving my code after calling mem_malloc_init 
resolved the issue.

Thanks a lot. :-)

Thanks and Regards,
Sandeep


-Original Message-
From: Graeme Russ [mailto:graeme.r...@gmail.com] 
Sent: 01 June 2012 11:47
To: Sandeep Kumar
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] facing issues with malloc in U-Boot

Hi Sandeep,

On Fri, Jun 1, 2012 at 3:50 PM, Sandeep Kumar  
wrote:
> Hi ,
>
> I am using vexpress board (ca9x4_ct_vxp). During run time all the malloc are 
> failing even if it's of 1 byte. I tried to increase the malloc pool size to 
> 1MB also but it is not helping out. Any king of pointer or help will be 
> highly appreciated.

The comments in dlmalloc.c indicate that do_check_chunk() is intended to catch 
memory corruption. A few further quick questions:

1) Is this reproducible on multiple boards? Can you rule-out SDRAM component 
failures?
2) Is mem_malloc_init() being called - I assume so as a) this is a in-tree 
board without apparent modification and b) malloc() checks for init
3) Is the failure during the first call to malloc()? If not, is the failure 
always at the same location?

I think you are going to need to add some printf() debugging in dlmalloc()

Regards,

Graeme

P.S. Please stop top-posting

>
> Thanks and Regards,
> Sandeep
>
>
> -Original Message-
> From: Graeme Russ [mailto:graeme.r...@gmail.com]
> Sent: 01 June 2012 05:21
> To: Sandeep Kumar
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] facing issues with malloc in U-Boot
>
> Hi Sandeep,
>
> On Fri, Jun 1, 2012 at 1:42 AM, Sandeep Kumar 
>  wrote:
>> Hi Everyone,
>>
>> I am facing issues with malloc in U-Boot while trying to allocate some 
>> memory. Here are the prints which I am getting after enabling the debug.
>>
>> U-Boot 2011.12 (May 31 2012 - 20:49:16)
>
> What board are you using?
>
> Regargs,
>
> Graeme
> The information 
> transmitted is intended only for the person or entity to which it is 
> addressed and may contain confidential and/or privileged material.If 
> you are not the intended recipient of this message please do not read, 
> copy, use or disclose this communication and notify the sender 
> immediately.It should be noted that any review, retransmission, 
> dissemination or other use of, or taking action or reliance upon, this 
> information by persons or entities other than the intended recipient 
> is prohibited.
>
>
The information transmitted is 
intended only for the person or entity to which it is addressed and may contain 
confidential and/or privileged material.If you are not the intended recipient 
of this message please do not read, copy, use or disclose this communication 
and notify the sender immediately.It should be noted that any review, 
retransmission, dissemination or other use of, or taking action or reliance 
upon, this information by persons or entities other than the intended recipient 
is prohibited.

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[U-Boot] [PATCH 2/2 V3] EXYNOS: SMDK5250: Enable the pinmux setup

2012-06-01 Thread Rajeshwari Shinde
Use the pinmux configuration function for SMDK5250.

Signed-off-by: Abhilash Kesavan 
Signed-off-by: Rajeshwari Shinde 
Acked-by: Chander Kashyap 
Acked-by: Simon Glass 
---
Changes in V2:
- Removed exynos5_gpio_part1 *gpio1 global variable as initialised in
pinmux.c.
Changes in V3:
- Added a error return for smc9115_pre_init and board_uart_init.
 board/samsung/smdk5250/smdk5250.c |  176 -
 1 files changed, 38 insertions(+), 138 deletions(-)

diff --git a/board/samsung/smdk5250/smdk5250.c 
b/board/samsung/smdk5250/smdk5250.c
index 32786e2..4d16950 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -26,81 +26,16 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
-struct exynos5_gpio_part1 *gpio1;
 
 #ifdef CONFIG_SMC911X
-static void smc9115_pre_init(void)
+static int smc9115_pre_init(void)
 {
u32 smc_bw_conf, smc_bc_conf;
-   int i;
-
-   /*
-* SROM:CS1 and EBI
-*
-* GPY0[0]  SROM_CSn[0]
-* GPY0[1]  SROM_CSn[1](2)
-* GPY0[2]  SROM_CSn[2]
-* GPY0[3]  SROM_CSn[3]
-* GPY0[4]  EBI_OEn(2)
-* GPY0[5]  EBI_EEn(2)
-*
-* GPY1[0]  EBI_BEn[0](2)
-* GPY1[1]  EBI_BEn[1](2)
-* GPY1[2]  SROM_WAIT(2)
-* GPY1[3]  EBI_DATA_RDn(2)
-*/
-   s5p_gpio_cfg_pin(&gpio1->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
-   s5p_gpio_cfg_pin(&gpio1->y0, 4, GPIO_FUNC(2));
-   s5p_gpio_cfg_pin(&gpio1->y0, 5, GPIO_FUNC(2));
-
-   for (i = 0; i < 4; i++)
-   s5p_gpio_cfg_pin(&gpio1->y1, i, GPIO_FUNC(2));
-
-   /*
-* EBI: 8 Addrss Lines
-*
-* GPY3[0]  EBI_ADDR[0](2)
-* GPY3[1]  EBI_ADDR[1](2)
-* GPY3[2]  EBI_ADDR[2](2)
-* GPY3[3]  EBI_ADDR[3](2)
-* GPY3[4]  EBI_ADDR[4](2)
-* GPY3[5]  EBI_ADDR[5](2)
-* GPY3[6]  EBI_ADDR[6](2)
-* GPY3[7]  EBI_ADDR[7](2)
-*
-* EBI: 16 Data Lines
-*
-* GPY5[0]  EBI_DATA[0](2)
-* GPY5[1]  EBI_DATA[1](2)
-* GPY5[2]  EBI_DATA[2](2)
-* GPY5[3]  EBI_DATA[3](2)
-* GPY5[4]  EBI_DATA[4](2)
-* GPY5[5]  EBI_DATA[5](2)
-* GPY5[6]  EBI_DATA[6](2)
-* GPY5[7]  EBI_DATA[7](2)
-*
-* GPY6[0]  EBI_DATA[8](2)
-* GPY6[1]  EBI_DATA[9](2)
-* GPY6[2]  EBI_DATA[10](2)
-* GPY6[3]  EBI_DATA[11](2)
-* GPY6[4]  EBI_DATA[12](2)
-* GPY6[5]  EBI_DATA[13](2)
-* GPY6[6]  EBI_DATA[14](2)
-* GPY6[7]  EBI_DATA[15](2)
-*/
-   for (i = 0; i < 8; i++) {
-   s5p_gpio_cfg_pin(&gpio1->y3, i, GPIO_FUNC(2));
-   s5p_gpio_set_pull(&gpio1->y3, i, GPIO_PULL_UP);
-
-   s5p_gpio_cfg_pin(&gpio1->y5, i, GPIO_FUNC(2));
-   s5p_gpio_set_pull(&gpio1->y5, i, GPIO_PULL_UP);
-
-   s5p_gpio_cfg_pin(&gpio1->y6, i, GPIO_FUNC(2));
-   s5p_gpio_set_pull(&gpio1->y6, i, GPIO_PULL_UP);
-   }
+   int err;
 
/* Ethernet needs data bus width of 16 bits */
smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
@@ -112,14 +47,20 @@ static void smc9115_pre_init(void)
| SROMC_BC_PMC(0x01);
 
/* Select and configure the SROMC bank */
+   err = exynos_pinmux_config(PERIPH_ID_SROMC,
+   CONFIG_ENV_SROM_BANK | PINMUX_FLAG_16BIT);
+   if (err < 0) {
+   debug("SROMC not configured\n");
+   return -1;
+   }
+
s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
+   return 0;
 }
 #endif
 
 int board_init(void)
 {
-   gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
-
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
 }
@@ -168,7 +109,8 @@ void dram_init_banksize(void)
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_SMC911X
-   smc9115_pre_init();
+   if (smc9115_pre_init())
+   return -1;
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
 #endif
return 0;
@@ -186,31 +128,12 @@ int checkboard(void)
 #ifdef CONFIG_GENERIC_MMC
 int board_mmc_init(bd_t *bis)
 {
-   int i, err;
-
-   /*
-* MMC2 SD card GPIO:
-*
-* GPC2[0]  SD_2_CLK(2)
-* GPC2[1]  SD_2_CMD(2)
-* GPC2[2]  SD_2_CDn
-* GPC2[3:6]SD_2_DATA[0:3](2)
-*/
-   for (i = 0; i < 7; i++) {
-   /* GPC2[0:6] special function 2 */
-   s5p_gpio_cfg_pin(&gpio1->c2, i, GPIO_FUNC(0x2));
-
-   /* GPK2[0:6] drv 4x */
-   s5p_gpio_set_drv(&gpio1->c2, i, GPIO_DRV_4X);
+   int err;
 
-   /* GPK2[0:1] pull disable */
-   if (i == 0 || 

[U-Boot] [PATCH v4 4/5] kw_spi: support spi_claim/release_bus functions

2012-06-01 Thread Valentin Longchamp
These two function nows ensure that the MPP is configured correctly for
the SPI controller before any SPI access, and restore the initial
configuration when the access is over.

Since the used pins for the SPI controller can differ (2 possibilities
for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP.

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
 arch/arm/include/asm/arch-kirkwood/spi.h |   11 +
 drivers/spi/kirkwood_spi.c   |   36 ++
 2 files changed, 47 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h 
b/arch/arm/include/asm/arch-kirkwood/spi.h
index 1d5043f..c79bed7 100644
--- a/arch/arm/include/asm/arch-kirkwood/spi.h
+++ b/arch/arm/include/asm/arch-kirkwood/spi.h
@@ -37,6 +37,17 @@ struct kwspi_registers {
u32 irq_mask;   /* 0x10614 */
 };
 
+/* They are used to define CONFIG_SYS_KW_SPI_MPP
+ * each of the below #defines selects which mpp is
+ * configured for each SPI signal in spi_claim_bus
+ * bit 0: selects pin for MOSI (MPP1 if 0, MPP6 if 1)
+ * bit 1: selects pin for SCK (MPP2 if 0, MPP10 if 1)
+ * bit 2: selects pin for MISO (MPP3 if 0, MPP11 if 1)
+ */
+#define MOSI_MPP6  (1 << 0)
+#define SCK_MPP10  (1 << 1)
+#define MISO_MPP11 (1 << 2)
+
 #define KWSPI_CLKPRESCL_MASK   0x1f
 #define KWSPI_CSN_ACT  1 /* Activates serial memory interface */
 #define KWSPI_SMEMRDY  (1 << 1) /* SerMem Data xfer ready */
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 01e1d11..db4bb0a 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -83,13 +83,49 @@ void spi_free_slave(struct spi_slave *slave)
free(slave);
 }
 
+#if defined(CONFIG_SYS_KW_SPI_MPP)
+u32 spi_mpp_backup[4];
+#endif
+
 int spi_claim_bus(struct spi_slave *slave)
 {
+#if defined(CONFIG_SYS_KW_SPI_MPP)
+   u32 config;
+   u32 spi_mpp_config[4];
+
+   config = CONFIG_SYS_KW_SPI_MPP;
+
+   if (config & MOSI_MPP6)
+   spi_mpp_config[0] = MPP6_SPI_MOSI;
+   else
+   spi_mpp_config[0] = MPP1_SPI_MOSI;
+
+   if (config & SCK_MPP10)
+   spi_mpp_config[1] = MPP10_SPI_SCK;
+   else
+   spi_mpp_config[1] = MPP2_SPI_SCK;
+
+   if (config & MISO_MPP11)
+   spi_mpp_config[2] = MPP11_SPI_MISO;
+   else
+   spi_mpp_config[2] = MPP3_SPI_MISO;
+
+   spi_mpp_config[3] = 0;
+   spi_mpp_backup[3] = 0;
+
+   /* set new spi mpp and save current mpp config */
+   kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup);
+
+#endif
+
return 0;
 }
 
 void spi_release_bus(struct spi_slave *slave)
 {
+#if defined(CONFIG_SYS_KW_SPI_MPP)
+   kirkwood_mpp_conf(spi_mpp_backup, NULL);
+#endif
 }
 
 #ifndef CONFIG_SPI_CS_IS_VALID
-- 
1.7.1

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[U-Boot] [PATCH v4 5/5] kw_spi: add weak functions board_spi_claim/release_bus

2012-06-01 Thread Valentin Longchamp
This allows a final, board specific, step in the claim/relase_bus
function for the SPI controller, which may be needed for some hardware
designs.

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
 drivers/spi/kirkwood_spi.c |   13 -
 1 files changed, 12 insertions(+), 1 deletions(-)

diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index db4bb0a..f4523a3 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -87,6 +87,11 @@ void spi_free_slave(struct spi_slave *slave)
 u32 spi_mpp_backup[4];
 #endif
 
+__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave)
+{
+   return 0;
+}
+
 int spi_claim_bus(struct spi_slave *slave)
 {
 #if defined(CONFIG_SYS_KW_SPI_MPP)
@@ -118,7 +123,11 @@ int spi_claim_bus(struct spi_slave *slave)
 
 #endif
 
-   return 0;
+   return board_spi_claim_bus(slave);
+}
+
+__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave)
+{
 }
 
 void spi_release_bus(struct spi_slave *slave)
@@ -126,6 +135,8 @@ void spi_release_bus(struct spi_slave *slave)
 #if defined(CONFIG_SYS_KW_SPI_MPP)
kirkwood_mpp_conf(spi_mpp_backup, NULL);
 #endif
+
+   board_spi_release_bus(slave);
 }
 
 #ifndef CONFIG_SPI_CS_IS_VALID
-- 
1.7.1

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[U-Boot] [PATCH v4 2/5] kirkwood: fix calls to kirkwood_mpp_conf

2012-06-01 Thread Valentin Longchamp
With the new second save argument introduced by the previous patch, all
the calls to the function had to be fixed.

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
 board/LaCie/net2big_v2/net2big_v2.c |2 +-
 board/LaCie/netspace_v2/netspace_v2.c   |2 +-
 board/Marvell/dreamplug/dreamplug.c |2 +-
 board/Marvell/guruplug/guruplug.c   |2 +-
 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c |2 +-
 board/Marvell/openrd/openrd.c   |2 +-
 board/Marvell/rd6281a/rd6281a.c |2 +-
 board/Marvell/sheevaplug/sheevaplug.c   |2 +-
 board/Seagate/dockstar/dockstar.c   |2 +-
 board/cloudengines/pogo_e02/pogo_e02.c  |2 +-
 board/d-link/dns325/dns325.c|2 +-
 board/keymile/km_arm/km_arm.c   |6 +++---
 board/raidsonic/ib62x0/ib62x0.c |2 +-
 13 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/board/LaCie/net2big_v2/net2big_v2.c 
b/board/LaCie/net2big_v2/net2big_v2.c
index d0b4adf..0f5e5a5 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
@@ -75,7 +75,7 @@ int board_early_init_f(void)
0
};
 
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
 
return 0;
 }
diff --git a/board/LaCie/netspace_v2/netspace_v2.c 
b/board/LaCie/netspace_v2/netspace_v2.c
index fbf020f..704005f 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -73,7 +73,7 @@ int board_early_init_f(void)
MPP33_GPIO, /* Fan speed (bit 2) */
0
};
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
 
return 0;
 }
diff --git a/board/Marvell/dreamplug/dreamplug.c 
b/board/Marvell/dreamplug/dreamplug.c
index 31b73c9..d6497aa 100644
--- a/board/Marvell/dreamplug/dreamplug.c
+++ b/board/Marvell/dreamplug/dreamplug.c
@@ -99,7 +99,7 @@ int board_early_init_f(void)
MPP49_GPIO, /* Wifi AP LED */
0
};
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
 }
 
diff --git a/board/Marvell/guruplug/guruplug.c 
b/board/Marvell/guruplug/guruplug.c
index 057c558..f5c1c3c 100644
--- a/board/Marvell/guruplug/guruplug.c
+++ b/board/Marvell/guruplug/guruplug.c
@@ -96,7 +96,7 @@ int board_early_init_f(void)
MPP49_GPIO, /* B_GLED */
0
};
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
 }
 
diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c 
b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
index 4c41f3b..43852f6 100644
--- a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
+++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
@@ -98,7 +98,7 @@ int board_early_init_f(void)
MPP49_GPIO,
0
};
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
 }
 
diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c
index 2a10e69..d48f05a 100644
--- a/board/Marvell/openrd/openrd.c
+++ b/board/Marvell/openrd/openrd.c
@@ -102,7 +102,7 @@ int board_early_init_f(void)
0
};
 
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
 }
 
diff --git a/board/Marvell/rd6281a/rd6281a.c b/board/Marvell/rd6281a/rd6281a.c
index 9c768bf..1fd7677 100644
--- a/board/Marvell/rd6281a/rd6281a.c
+++ b/board/Marvell/rd6281a/rd6281a.c
@@ -97,7 +97,7 @@ int board_early_init_f(void)
MPP49_GPIO,
0
};
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
 }
 
diff --git a/board/Marvell/sheevaplug/sheevaplug.c 
b/board/Marvell/sheevaplug/sheevaplug.c
index 71e6793..688d308 100644
--- a/board/Marvell/sheevaplug/sheevaplug.c
+++ b/board/Marvell/sheevaplug/sheevaplug.c
@@ -96,7 +96,7 @@ int board_early_init_f(void)
MPP49_GPIO,
0
};
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
 }
 
diff --git a/board/Seagate/dockstar/dockstar.c 
b/board/Seagate/dockstar/dockstar.c
index 38473e5..fc88520 100644
--- a/board/Seagate/dockstar/dockstar.c
+++ b/board/Seagate/dockstar/dockstar.c
@@ -100,7 +100,7 @@ int board_early_init_f(void)
MPP49_GPIO,
0
};
-   kirkwood_mpp_conf(kwmpp_config);
+   kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
 }
 
diff --git a/board/cloudengines/pogo_e02/pogo_e02.c 
b/board/cloudengines/pogo_e02/pogo_e02.c
index ff3421d..bac9ce5 100644
--- a/board/cloudengines/pogo_e02/pogo_e02.c
+++ b/board/cl

[U-Boot] [PATCH v4 1/5] kirkwood: add save functionality kirkwood_mpp_conf function

2012-06-01 Thread Valentin Longchamp
If a second non NULL argument is given to the kirkwood_mpp_conf
function, it will be used to store the current configuration of the MPP
registers. mpp_save  must be a preallocated table of the same size as
mpp_list and it must be zero terminated as well.

A later call to kirkwood_mpp_conf function with this saved list as first
(mpp_conf) argment will set the configuration back.

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
 arch/arm/cpu/arm926ejs/kirkwood/mpp.c|   10 +-
 arch/arm/include/asm/arch-kirkwood/mpp.h |2 +-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c 
b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
index 3da6c98..03eb2de 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
@@ -31,7 +31,7 @@ static u32 kirkwood_variant(void)
 #define MPP_CTRL(i)(KW_MPP_BASE + (i* 4))
 #define MPP_NR_REGS(1 + MPP_MAX/8)
 
-void kirkwood_mpp_conf(u32 *mpp_list)
+void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save)
 {
u32 mpp_ctrl[MPP_NR_REGS];
unsigned int variant_mask;
@@ -52,6 +52,7 @@ void kirkwood_mpp_conf(u32 *mpp_list)
while (*mpp_list) {
unsigned int num = MPP_NUM(*mpp_list);
unsigned int sel = MPP_SEL(*mpp_list);
+   unsigned int sel_save;
int shift;
 
if (num > MPP_MAX) {
@@ -66,6 +67,13 @@ void kirkwood_mpp_conf(u32 *mpp_list)
}
 
shift = (num & 7) << 2;
+
+   if (mpp_save) {
+   sel_save = (mpp_ctrl[num / 8] >> shift) & 0xf;
+   *mpp_save = num | (sel_save << 8) | variant_mask;
+   mpp_save++;
+   }
+
mpp_ctrl[num / 8] &= ~(0xf << shift);
mpp_ctrl[num / 8] |= sel << shift;
 
diff --git a/arch/arm/include/asm/arch-kirkwood/mpp.h 
b/arch/arm/include/asm/arch-kirkwood/mpp.h
index b3c090e..8e50ee7 100644
--- a/arch/arm/include/asm/arch-kirkwood/mpp.h
+++ b/arch/arm/include/asm/arch-kirkwood/mpp.h
@@ -312,6 +312,6 @@
 
 #define MPP_MAX49
 
-void kirkwood_mpp_conf(unsigned int *mpp_list);
+void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save);
 
 #endif
-- 
1.7.1

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[U-Boot] [PATCH v4 3/5] kw_spi: backup and reset the MPP of the chosen CS pin

2012-06-01 Thread Valentin Longchamp
This was not done before, and in the case of a shared pin (for MPP0
between NF_IO[2] and CSn) this could lead to problems.

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
 drivers/spi/kirkwood_spi.c |   15 ++-
 1 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index db8ba8b..01e1d11 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -34,16 +34,14 @@
 
 static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
 
+u32 cs_spi_mpp_back[2];
+
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
 {
struct spi_slave *slave;
u32 data;
-   u32 kwspi_mpp_config[] = {
-   MPP0_GPIO,
-   MPP7_SPI_SCn,
-   0
-   };
+   u32 kwspi_mpp_config[] = { 0, 0 };
 
if (!spi_cs_is_valid(bus, cs))
return NULL;
@@ -70,19 +68,18 @@ struct spi_slave *spi_setup_slave(unsigned int bus, 
unsigned int cs,
 
/* program mpp registers to select  SPI_CSn */
if (cs) {
-   kwspi_mpp_config[0] = MPP0_GPIO;
-   kwspi_mpp_config[1] = MPP7_SPI_SCn;
+   kwspi_mpp_config[0] = MPP7_SPI_SCn;
} else {
kwspi_mpp_config[0] = MPP0_SPI_SCn;
-   kwspi_mpp_config[1] = MPP7_GPO;
}
-   kirkwood_mpp_conf(kwspi_mpp_config);
+   kirkwood_mpp_conf(kwspi_mpp_config, cs_spi_mpp_back);
 
return slave;
 }
 
 void spi_free_slave(struct spi_slave *slave)
 {
+   kirkwood_mpp_conf(cs_spi_mpp_back, NULL);
free(slave);
 }
 
-- 
1.7.1

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[U-Boot] [PATCH 1/2 V3] EXYNOS5: PINMUX: Added default pinumx settings

2012-06-01 Thread Rajeshwari Shinde
This patch performs the pinmux configuration in a common file.
As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
supported.

Signed-off-by: Abhilash Kesavan 
Signed-off-by: Che-Liang Chiou 
Signed-off-by: Rajeshwari Shinde 
Acked-by: Chander Kashyap 
---
Changes in V2:
- Adding pinmux.c to Makefile moved to this patch.
- exynos5_pinmux_config made static
Changes in V3:
- Separate functions made for each peripheral
- enum periph_id moved to a separate periph.h
 arch/arm/cpu/armv7/exynos/Makefile|2 +-
 arch/arm/cpu/armv7/exynos/pinmux.c|  224 +
 arch/arm/include/asm/arch-exynos/periph.h |   47 ++
 arch/arm/include/asm/arch-exynos/pinmux.h |   58 
 4 files changed, 330 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/exynos/pinmux.c
 create mode 100644 arch/arm/include/asm/arch-exynos/periph.h
 create mode 100644 arch/arm/include/asm/arch-exynos/pinmux.h

diff --git a/arch/arm/cpu/armv7/exynos/Makefile 
b/arch/arm/cpu/armv7/exynos/Makefile
index 90ec2bd..9119961 100644
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(SOC).o
 
-COBJS  += clock.o power.o soc.o system.o
+COBJS  += clock.o power.o soc.o system.o pinmux.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
new file mode 100644
index 000..c1321c6
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics.
+ * Abhilash Kesavan 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static void exynos5_uart_config(int peripheral)
+{
+   struct exynos5_gpio_part1 *gpio1 =
+   (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+   struct s5p_gpio_bank *bank;
+   int i, start, count;
+
+   switch (peripheral) {
+   case PERIPH_ID_UART0:
+   bank = &gpio1->a0;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART1:
+   bank = &gpio1->a0;
+   start = 4;
+   count = 4;
+   break;
+   case PERIPH_ID_UART2:
+   bank = &gpio1->a1;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART3:
+   bank = &gpio1->a1;
+   start = 4;
+   count = 2;
+   break;
+   }
+   for (i = start; i < start + count; i++) {
+   s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+   }
+}
+
+static void exynos5_mmc_config(int peripheral, int flags)
+{
+   struct exynos5_gpio_part1 *gpio1 =
+   (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+   struct s5p_gpio_bank *bank, *bank_ext;
+   int i;
+   switch (peripheral) {
+   case PERIPH_ID_SDMMC0:
+   bank = &gpio1->c0;
+   bank_ext = &gpio1->c1;
+   break;
+   case PERIPH_ID_SDMMC1:
+   bank = &gpio1->c1;
+   bank_ext = NULL;
+   break;
+   case PERIPH_ID_SDMMC2:
+   bank = &gpio1->c2;
+   bank_ext = &gpio1->c3;
+   break;
+   case PERIPH_ID_SDMMC3:
+   bank = &gpio1->c3;
+   bank_ext = NULL;
+   break;
+   }
+   if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) {
+   debug("SDMMC device %d does not support 8bit mode",
+   peripheral);
+   return -1;
+   }
+   if (flags & PINMUX_FLAG_8BIT_MODE) {
+   for (i = 3; i <= 6; i++) {
+   s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+   s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
+   s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+   }
+   }
+   for (i = 0; i < 2; i++) {
+   s5p_gpio_cf

Re: [U-Boot] [PATCH v7 4/4] Kirkwood: add lschlv2 and lsxhl board support

2012-06-01 Thread Michael Walle

Hi Luka,

On Fri, June 1, 2012 01:07, Luka Perkov wrote:
>> +#ifdef CONFIG_RESET_PHY_R
>> +/* Configure and enable MV88E1118 PHY */
>> +void reset_phy(void)
>> +{
>> +u16 devadr;
>> +char *name = "egiga1";
>> +
>> +if (miiphy_set_current_dev(name))
>> +return;
>> +
>> +/* command to read PHY dev address */
>> +if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
>> +printf("Err..%s could not read PHY dev address\n", __func__);
>> +return;
>> +}
>> +
>> +/* reset the phy */
>> +miiphy_reset(name, devadr);
>> +}
>> +#endif /* CONFIG_RESET_PHY_R */
>
> Can you please test without this part if your network will work?

Could you provide some more background why this should be superfluous? Eg.
what happens if an operating system changes some phy settings and reboots
the system?

-- 
michael

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Re: [U-Boot] problem while making kernel up

2012-06-01 Thread Manukumar
Hello scott.

I can able make the kernel up but it hangs after probing 
serial driver as shown below:

It has to boot further but its not happenig..
I have attached the file i should get the log as this i also mentioned
where it hangs...

what may be the problem with this how could i fix this issue.

manukumar
signal-networks


On Thu, 2012-05-31 at 11:21 -0500, Scott Wood wrote:
> On 05/30/2012 11:15 PM, Manukumar wrote:
> > thanks scott.
> > 
> > i loaded my u-boot image to nand flash its fine.
> > and also 
> > I need my  kernel image and rootfs also in nand flash
> > so that my system should make kernel UP using nand flash.
> > how can i do this using nand flash as we are using only nand flash as
> > boot device.
> 
> Again, you need to use "nand read" to move the images from NAND to RAM
> before booting.
> 
> -Scott
> 


U-Boot 2010.12 (May 11 2012 - 10:14:18)

CPU0:  P1021, Version: 1.1, (0x80e40111)
Core:  E500, Version: 5.1, (0x80212051)
Clock Configuration:
   CPU0:533.333 MHz, CPU1:1200 MHz, 
   CCB:266.667 MHz,
   DDR:100  MHz (200 MT/s data rate) (Asynchronous), LBC:16.667 MHz
   QE:266.667 MHz
L1:D-cache 32 kB enabled
   I-cache 32 kB enabled
Board: P1021RDB CPLD: V15.15 PCBA: V15.0
Error reading i2c boot information!
I2C:   ready
SPI:   ready
DRAM:  DDR: failed to read SPD from address 82
SPD error! Trying fallback to raw timing calculation
Detected UDIMM(s)
The choosen cas latency 5 is too large
1 GiB (DDR3, 32-bit, CL=6, ECC off)
**board_init_r**
L2:256 KB enabled
CPU up timeout. CPU up mask is 1 should be 3
NAND:  fsl_elbc_nand: address did not match any chip selects
0 MiB
MMC:  FSL_ESDHC: 0
*** Warning - bad CRC, using default environment

PCIe1: disabled
PCIe2: disabled
In:serial
Out:   serial
Err:   serial
Net:   PHY_ADDR=4
PHY_ADDR3=5
eTSEC1: PHY is AR8021 (4dd041)

MII read Phy 4 debug reg address 0x0b val:bc60
PHY_ADDR=0
PHY_ADDR3=5
eTSEC2: PHY is AR8021 (4dd041)
PHY_ADDR=5
PHY_ADDR3=5
eTSEC3: No support for PHY id ; assuming generic
eTSEC1, eTSEC2, eTSEC3
Hit any key to stop autoboot:  0 
=> setenv bootargs root=/dev/nfs rw 
nfsroot=192.168.1.68:/home/project/ICMv1.1/filesystem 
ip=192.168.1.250:192.168.1.68:192.1680
=> setenv ipaddr 192.168.1.250; setenv serverip 192.168.1.68; setenv ethaddr 
00:1a:b0:00:02:50; tftp 100 uImage_icm_v1.1;tf0

SIG_PRIN: phy addr 4

SIG_PRIN: mii_parse_link 

SIG_PRIN: adjust_link
Speed: 100, full duplex
Using eTSEC1 device
TFTP from server 192.168.1.68; our IP address is 192.168.1.250
Filename 'uImage_icm_v1.1'.
Load address: 0x100
Loading: Got error 14
T ##Got error 14
T ##Got error 14
T #Got error 4

Abort

SIG_PRIN: phy addr 4

SIG_PRIN: mii_parse_link 

SIG_PRIN: adjust_link
Speed: 100, full duplex
Using eTSEC1 device
TFTP from server 192.168.1.68; our IP address is 192.168.1.250
Filename 'p1021rdb_32b.dtb'.
Load address: 0xc0
Loading: ##
done
Bytes transferred = 15066 (3ada hex)
WARNING: adjusting available memory to 3000
## Booting kernel from Legacy Image at 0100 ...
   Image Name:   Signal ICMv1.1
   Created:  2012-05-31  21:36:15 UTC
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:3559856 Bytes = 3.4 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!
=> setenv ipaddr 192.168.1.250; setenv serverip 192.168.1.68; setenv ethaddr 
00:1a:b0:00:02:50; tftp 100 uImage_icm_v1.1;tf0

SIG_PRIN: phy addr 4

SIG_PRIN: mii_parse_link 

SIG_PRIN: adjust_link
Speed: 100, full duplex
Using eTSEC1 device
TFTP from server 192.168.1.68; our IP address is 192.168.1.250
Filename 'uImage_icm_v1.1'.
Load address: 0x100
Loading: Got error 4
T #Got error 14
T 
 Got error 14
T #
 #
 ###Got error 4
T #
done
Bytes transferred = 3559920 (3651f0 hex)

SIG_PRIN: phy addr 4

SIG_PRIN: mii_parse_link 

SIG_PRIN: adjust_link
Speed: 100, full duplex
Using eTSEC1 device
TFTP from server 192.168.1.68; our IP address is 192.168.1.250
Filename 'p1021rdb_32b.dtb'.
Load address: 0xc0
Loading: ##
done
Bytes transferred = 15066 (3ada hex)
WARNING: adjusting available memory to 3000
## Booting kernel from Legacy Image at 0100 ...
   Image Name:   Signal ICMv1.1
   Created:  2012-05-31  21:36:15 UTC
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:3559856 Bytes = 3.4 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
## Flattened Device Tree blob at 00c0
   Booting using the fdt blob at 0xc0
   Uncompressing Kernel Image ... OK
   Loading Device Tree to 00ff9000, end 00fffad9 ... OK
WARNING: could not find compatibl

[U-Boot] [PATCH] Consolidate bootcount code into drivers/bootcount

2012-06-01 Thread Stefan Roese
This patch moves all bootcount implementations into a common
directory: drivers/bootcount. The generic bootcount driver
(bootcount.c) is now usable not only by powerpc platforms, but
others as well. Highbank is already moved to this "generic"
code. For all other non-generic implementations, SoC specific
drivers have been created (e.g. bootcount_at91.c).

Signed-off-by: Stefan Roese 
Cc: Heiko Schocher 
Cc: Valentin Longchamp 
Cc: Christian Riesch 
Cc: Manfred Rudigier 
Cc: Mike Frysinger 
Cc: Rob Herring 
Cc: Reinhard Meyer 
---
Mike, the blackfin implementation is not compile-tested yet. Could
you please give it a try?

Thanks,
Stefan

 Makefile   |3 +
 arch/arm/cpu/arm926ejs/at91/cpu.c  |   26 ---
 arch/arm/cpu/armv7/highbank/Makefile   |2 +-
 arch/arm/cpu/armv7/highbank/bootcount.c|   36 --
 arch/arm/cpu/ixp/cpu.c |   22 --
 arch/powerpc/lib/Makefile  |1 -
 board/enbw/enbw_cmc/enbw_cmc.c |   29 
 board/keymile/km_arm/km_arm.c  |   51 --
 board/omicron/calimain/calimain.c  |   29 
 drivers/bootcount/Makefile |   47 +
 .../powerpc/lib => drivers/bootcount}/bootcount.c  |   10 ++-
 drivers/bootcount/bootcount_at91.c |   43 
 .../bootcount/bootcount_blackfin.c |0
 drivers/bootcount/bootcount_davinci.c  |   50 ++
 drivers/bootcount/bootcount_ram.c  |   72 
 include/configs/km/km_arm.h|2 +
 16 files changed, 225 insertions(+), 198 deletions(-)
 delete mode 100644 arch/arm/cpu/armv7/highbank/bootcount.c
 create mode 100644 drivers/bootcount/Makefile
 rename {arch/powerpc/lib => drivers/bootcount}/bootcount.c (92%)
 create mode 100644 drivers/bootcount/bootcount_at91.c
 rename arch/blackfin/cpu/bootcount.c => drivers/bootcount/bootcount_blackfin.c 
(100%)
 create mode 100644 drivers/bootcount/bootcount_davinci.c
 create mode 100644 drivers/bootcount/bootcount_ram.c

diff --git a/Makefile b/Makefile
index 659e8f2..8fd51b8 100644
--- a/Makefile
+++ b/Makefile
@@ -249,6 +249,9 @@ LIBS += net/libnet.o
 LIBS += disk/libdisk.o
 LIBS += drivers/bios_emulator/libatibiosemu.o
 LIBS += drivers/block/libblock.o
+ifeq ($(CONFIG_BOOTCOUNT_LIMIT),y)
+LIBS += drivers/bootcount/libbootcount.o
+endif
 LIBS += drivers/dma/libdma.o
 LIBS += drivers/fpga/libfpga.o
 LIBS += drivers/gpio/libgpio.o
diff --git a/arch/arm/cpu/arm926ejs/at91/cpu.c 
b/arch/arm/cpu/arm926ejs/at91/cpu.c
index c47fb31..5cf4fad 100644
--- a/arch/arm/cpu/arm926ejs/at91/cpu.c
+++ b/arch/arm/cpu/arm926ejs/at91/cpu.c
@@ -71,29 +71,3 @@ int print_cpuinfo(void)
return 0;
 }
 #endif
-
-#ifdef CONFIG_BOOTCOUNT_LIMIT
-/*
- * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register.
- * This is done so we need to use only one of the four GPBR registers.
- */
-void bootcount_store (ulong a)
-{
-   at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
-
-   writel((BOOTCOUNT_MAGIC & 0x) | (a & 0x),
-   &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
-}
-
-ulong bootcount_load (void)
-{
-   at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
-
-   ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
-   if ((val & 0x) != (BOOTCOUNT_MAGIC & 0x))
-   return 0;
-   else
-   return val & 0x;
-}
-
-#endif /* CONFIG_BOOTCOUNT_LIMIT */
diff --git a/arch/arm/cpu/armv7/highbank/Makefile 
b/arch/arm/cpu/armv7/highbank/Makefile
index 917c3a3..76faeb0 100644
--- a/arch/arm/cpu/armv7/highbank/Makefile
+++ b/arch/arm/cpu/armv7/highbank/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(SOC).o
 
-COBJS  := timer.o bootcount.o
+COBJS  := timer.o
 SOBJS  :=
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/highbank/bootcount.c 
b/arch/arm/cpu/armv7/highbank/bootcount.c
deleted file mode 100644
index 9ca0656..000
--- a/arch/arm/cpu/armv7/highbank/bootcount.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright 2011 Calxeda, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see .
- */
-
-#include 
-#include 
-
-#ifdef CONF

[U-Boot] [PATCH v4 0/5] kirkwood spi_claim/release_bus support

2012-06-01 Thread Valentin Longchamp
This series adds generic support for the spi_claim/release_bus functions for
the kirkwood processors.

The implementation was already discussed in another thread following my first
board specific submission of the patch.

The series adds two functions to the kirkwood mpp code to be able to temporarily
save and then restore the mpp configuration.

Changes for v2:
- save MPP configuration with mpp_read function as dicussed on ML
- moved CS pin MPP config to spi_setup_slave only
- add backup fo CS pin in spi_setup_slave and reset in spi_free_slave

Changes for v3:
- moved mpp_read function functionality into mpp_conf function
- fixed all calls to mpp_conf so that they are compliant with the
newly necessary mpp_conf prototype  

Changes for v4:
- minor fix in the mpp_conf function

Valentin Longchamp (5):
  kirkwood: add save functionality kirkwood_mpp_conf function
  kirkwood: fix calls to kirkwood_mpp_conf
  kw_spi: backup and reset the MPP of the chosen CS pin
  kw_spi: support spi_claim/release_bus functions
  kw_spi: add weak functions board_spi_claim/release_bus

 arch/arm/cpu/arm926ejs/kirkwood/mpp.c   |   10 +++-
 arch/arm/include/asm/arch-kirkwood/mpp.h|2 +-
 arch/arm/include/asm/arch-kirkwood/spi.h|   11 
 board/LaCie/net2big_v2/net2big_v2.c |2 +-
 board/LaCie/netspace_v2/netspace_v2.c   |2 +-
 board/Marvell/dreamplug/dreamplug.c |2 +-
 board/Marvell/guruplug/guruplug.c   |2 +-
 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c |2 +-
 board/Marvell/openrd/openrd.c   |2 +-
 board/Marvell/rd6281a/rd6281a.c |2 +-
 board/Marvell/sheevaplug/sheevaplug.c   |2 +-
 board/Seagate/dockstar/dockstar.c   |2 +-
 board/cloudengines/pogo_e02/pogo_e02.c  |2 +-
 board/d-link/dns325/dns325.c|2 +-
 board/keymile/km_arm/km_arm.c   |6 +-
 board/raidsonic/ib62x0/ib62x0.c |2 +-
 drivers/spi/kirkwood_spi.c  |   64 +++
 17 files changed, 90 insertions(+), 27 deletions(-)

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[U-Boot] mx28 battery support

2012-06-01 Thread alex
 Hi Marek:
  I found your patch of battery in u-boot mainline. I want to know which kernel 
version you used for testing and whether the kernel you tested includes battery 
driver.
Best Regards,
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Re: [U-Boot] [PATCH v3] ATMEL/PIO: Enable new feature of PIO on Atmel device

2012-06-01 Thread Bo Shen

Hi All,

On 5/29/2012 16:06, Andreas Bießmann wrote:

Dear Bo Shen,

On 28.05.2012 09:43, Bo Shen wrote:

Hi All,

On 5/21/2012 9:50, Bo Shen wrote:

Enable new PIO feature supported by Atmel SoC.
Using CPU_HAS_PIO3 micro to enable PIO new feature.

Signed-off-by: Bo Shen
---
Changes since v1:
   - remove the legacy interface.
Changes since v2:
   - keep the legacy interface, don't touch it.

   arch/arm/include/asm/arch-at91/at91_pio.h |   45 ++-
   drivers/gpio/at91_gpio.c  |  125
-
   2 files changed, 167 insertions(+), 3 deletions(-)



Ping


Acked-by: Andreas Bießmann


Ping


thats all I can do since this is ARM related.

best regards

Andreas Bießmann



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Re: [U-Boot] [PATCH] arm: AT91: add at91sam9x5ek board support

2012-06-01 Thread Bo Shen

Hi All,

On 5/22/2012 18:06, Bo Shen wrote:

Add at91sam9x5ek board support.
   support AT91SAM9G15, G25, G35, X25, X35 SoC

Signed-off-by: Bo Shen
---
  MAINTAINERS|3 +
  arch/arm/cpu/arm926ejs/at91/Makefile   |1 +
  arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c   |  223 ++
  arch/arm/cpu/arm926ejs/at91/clock.c|7 +-
  arch/arm/include/asm/arch-at91/at91sam9_matrix.h   |2 +
  arch/arm/include/asm/arch-at91/at91sam9x5.h|  172 +++
  arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h |   91 ++
  arch/arm/include/asm/arch-at91/hardware.h  |2 +
  board/atmel/at91sam9x5ek/Makefile  |   48 +++
  board/atmel/at91sam9x5ek/at91sam9x5ek.c|  323 
  board/atmel/at91sam9x5ek/config.mk |1 +
  boards.cfg |1 +
  drivers/net/macb.c |4 +-
  include/configs/at91sam9x5ek.h |  216 +
  14 files changed, 1090 insertions(+), 4 deletions(-)
  create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
  create mode 100644 arch/arm/include/asm/arch-at91/at91sam9x5.h
  create mode 100644 arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h
  create mode 100644 board/atmel/at91sam9x5ek/Makefile
  create mode 100644 board/atmel/at91sam9x5ek/at91sam9x5ek.c
  create mode 100644 board/atmel/at91sam9x5ek/config.mk
  create mode 100644 include/configs/at91sam9x5ek.h


ping



diff --git a/MAINTAINERS b/MAINTAINERS
index e2441d8..cd8b8b5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -658,6 +658,9 @@ Sedji Gaouaou
at91sam9g10ek   ARM926EJS (AT91SAM9G10 SoC)
at91sam9m10g45ekARM926EJS (AT91SAM9G45 SoC)

+Bo Shen
+   at91sam9x5ekARM926EJS (AT91SAM9X5 SoC)
+
  Simon Guinot

inetspace_v2ARM926EJS (Kirkwood SoC)
diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile 
b/arch/arm/cpu/arm926ejs/at91/Makefile
index f333753..346e58f 100644
--- a/arch/arm/cpu/arm926ejs/at91/Makefile
+++ b/arch/arm/cpu/arm926ejs/at91/Makefile
@@ -35,6 +35,7 @@ COBJS-$(CONFIG_AT91SAM9263)   += at91sam9263_devices.o
  COBJS-$(CONFIG_AT91SAM9RL)+= at91sam9rl_devices.o
  COBJS-$(CONFIG_AT91SAM9M10G45)+= at91sam9m10g45_devices.o
  COBJS-$(CONFIG_AT91SAM9G45)   += at91sam9m10g45_devices.o
+COBJS-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o
  COBJS-$(CONFIG_AT91_EFLASH)   += eflash.o
  COBJS-$(CONFIG_AT91_LED)  += led.o
  COBJS-y += clock.o
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c 
b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
new file mode 100644
index 000..e4262a5
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
@@ -0,0 +1,223 @@
+/*
+ * Copyright (C) 2012 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define AT91_CIDR_VERSION  (0x1f<<  0)   /* Version of the Device */
+
+unsigned int get_chip_id(void)
+{
+   return readl(ATMEL_BASE_DBGU + 0x40)&  ~AT91_CIDR_VERSION;
+
+}
+unsigned int get_extension_chip_id(void)
+{
+   return readl(ATMEL_BASE_DBGU + 0x44);
+}
+
+unsigned int has_emac1()
+{
+   return cpu_is_at91sam9x25();
+}
+unsigned int has_emac0()
+{
+   return !(cpu_is_at91sam9g15());
+}
+unsigned int has_lcdc()
+{
+   return cpu_is_at91sam9g15() || cpu_is_at91sam9g35()
+   || cpu_is_at91sam9x35();
+}
+
+char *get_cpu_name()
+{
+   unsigned int extension_id = get_extension_chip_id();
+
+   if (cpu_is_at91sam9x5()) {
+   switch (extension_id) {
+   case ARCH_EXID_AT91SAM9G15:
+   return CONFIG_SYS_AT91_G15_CPU_NAME;
+   case ARCH_EXID_AT91SAM9G25:
+   return CONFIG_SYS_AT91_G25_CPU_NAME;
+   case ARCH_EXID_AT91SAM9G35:
+   return CONFIG_SYS_AT91_G35_CPU_NAME;
+   case ARCH_EXID_AT91SAM9X25:
+   return CONFIG_SYS_AT91_X25_CPU_NAME;
+   case ARCH_EXID_AT91SAM9X35:
+   return CONFIG_SYS_AT91_X35_CP

Re: [U-Boot] [PATCH v4 1/5] kirkwood: add save functionality kirkwood_mpp_conf function

2012-06-01 Thread Prafulla Wadaskar


> -Original Message-
> From: Valentin Longchamp [mailto:valentin.longch...@keymile.com]
> Sent: 01 June 2012 14:33
> Cc: u-boot@lists.denx.de; Valentin Longchamp; Holger Brunck; Prafulla
> Wadaskar
> Subject: [PATCH v4 1/5] kirkwood: add save functionality
> kirkwood_mpp_conf function
> 
> If a second non NULL argument is given to the kirkwood_mpp_conf
> function, it will be used to store the current configuration of the
> MPP
> registers. mpp_save  must be a preallocated table of the same size as
> mpp_list and it must be zero terminated as well.
> 
> A later call to kirkwood_mpp_conf function with this saved list as
> first
> (mpp_conf) argment will set the configuration back.
> 
> Signed-off-by: Valentin Longchamp 
> cc: Holger Brunck 
> cc: Prafulla Wadaskar 
> ---

Have you send just one file? I have received only one!!
No Change log, pls send all files with V4 in the patch series.

Regards..
Prafulla . . .
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[U-Boot] [PATCH v4 1/5] kirkwood: add save functionality kirkwood_mpp_conf function

2012-06-01 Thread Valentin Longchamp
If a second non NULL argument is given to the kirkwood_mpp_conf
function, it will be used to store the current configuration of the MPP
registers. mpp_save  must be a preallocated table of the same size as
mpp_list and it must be zero terminated as well.

A later call to kirkwood_mpp_conf function with this saved list as first
(mpp_conf) argment will set the configuration back.

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Prafulla Wadaskar 
---
 arch/arm/cpu/arm926ejs/kirkwood/mpp.c|   10 +-
 arch/arm/include/asm/arch-kirkwood/mpp.h |2 +-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c 
b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
index 3da6c98..03eb2de 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
@@ -31,7 +31,7 @@ static u32 kirkwood_variant(void)
 #define MPP_CTRL(i)(KW_MPP_BASE + (i* 4))
 #define MPP_NR_REGS(1 + MPP_MAX/8)
 
-void kirkwood_mpp_conf(u32 *mpp_list)
+void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save)
 {
u32 mpp_ctrl[MPP_NR_REGS];
unsigned int variant_mask;
@@ -52,6 +52,7 @@ void kirkwood_mpp_conf(u32 *mpp_list)
while (*mpp_list) {
unsigned int num = MPP_NUM(*mpp_list);
unsigned int sel = MPP_SEL(*mpp_list);
+   unsigned int sel_save;
int shift;
 
if (num > MPP_MAX) {
@@ -66,6 +67,13 @@ void kirkwood_mpp_conf(u32 *mpp_list)
}
 
shift = (num & 7) << 2;
+
+   if (mpp_save) {
+   sel_save = (mpp_ctrl[num / 8] >> shift) & 0xf;
+   *mpp_save = num | (sel_save << 8) | variant_mask;
+   mpp_save++;
+   }
+
mpp_ctrl[num / 8] &= ~(0xf << shift);
mpp_ctrl[num / 8] |= sel << shift;
 
diff --git a/arch/arm/include/asm/arch-kirkwood/mpp.h 
b/arch/arm/include/asm/arch-kirkwood/mpp.h
index b3c090e..8e50ee7 100644
--- a/arch/arm/include/asm/arch-kirkwood/mpp.h
+++ b/arch/arm/include/asm/arch-kirkwood/mpp.h
@@ -312,6 +312,6 @@
 
 #define MPP_MAX49
 
-void kirkwood_mpp_conf(unsigned int *mpp_list);
+void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save);
 
 #endif
-- 
1.7.1

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Re: [U-Boot] [PATCH v3 1/5] kirkwood: add save functionality kirkwood_mpp_conf function

2012-06-01 Thread Prafulla Wadaskar


> -Original Message-
> From: Valentin Longchamp [mailto:valentin.longch...@keymile.com]
> Sent: 01 June 2012 12:33
> To: ub...@lukaperkov.net
> Cc: Prafulla Wadaskar; Brunck, Holger; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH v3 1/5] kirkwood: add save functionality
> kirkwood_mpp_conf function
> 
> Hi Luka,
> 
> On 06/01/2012 01:02 AM, Luka Perkov wrote:
> > Hi Valentin,
> >
> > On Thu, May 31, 2012 at 04:17:52PM +0200, Valentin Longchamp wrote:
> >> If a second non NULL argument is given to the kirkwood_mpp_conf
> >> function, it will be used to store the current configuration of the
> MPP
> >> registers. mpp_save  must be a preallocated table of the same size
> as
> >> mpp_list and it must be zero terminated as well.
> >>
> >> A later call to kirkwood_mpp_conf function with this saved list as
> first
> >> (mpp_conf) argment will set the configuration back.
> >>
> >> Signed-off-by: Valentin Longchamp 
> >> cc: Holger Brunck 
> >> cc: Prafulla Wadaskar 
> >> ---
> >>  arch/arm/cpu/arm926ejs/kirkwood/mpp.c|   14 --
> >>  arch/arm/include/asm/arch-kirkwood/mpp.h |2 +-
> >>  2 files changed, 13 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
> b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
> >> index 3da6c98..158ea84 100644
> >> --- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
> >> +++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
> >> @@ -31,11 +31,11 @@ static u32 kirkwood_variant(void)
> >>  #define MPP_CTRL(i)   (KW_MPP_BASE + (i* 4))
> >>  #define MPP_NR_REGS   (1 + MPP_MAX/8)
> >>
> >> -void kirkwood_mpp_conf(u32 *mpp_list)
> >> +void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save)
> >>  {
> >>u32 mpp_ctrl[MPP_NR_REGS];
> >>unsigned int variant_mask;
> >> -  int i;
> >> +  int i, save = 0;
> >>
> >>variant_mask = kirkwood_variant();
> >>if (!variant_mask)
> >> @@ -48,10 +48,13 @@ void kirkwood_mpp_conf(u32 *mpp_list)
> >>}
> >>debug("\n");
> >>
> >> +  if (mpp_save)
> >> +  save = 1;
> >>
> >>while (*mpp_list) {
> >>unsigned int num = MPP_NUM(*mpp_list);
> >>unsigned int sel = MPP_SEL(*mpp_list);
> >> +  unsigned int sel_save;
> >>int shift;
> >>
> >>if (num > MPP_MAX) {
> >> @@ -66,6 +69,13 @@ void kirkwood_mpp_conf(u32 *mpp_list)
> >>}
> >>
> >>shift = (num & 7) << 2;
> >> +
> >> +  if (save) {
> >
> > Why using new variable if it's only used in one place? Why not use
> this
> > here:
> >
> > if (mpp_save) {
> >
> > Then we don't need save variable at all.
> >
> 
> Yeah you are right, I can directly test on mpp_save, since it should
> remain NULL
> during the whole while loop if NULL at the beginning.

Pls port v4 with this fix, rest of the patch series looks okay to me.

Regards..
Prafulla . . .
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Re: [U-Boot] [PATCH v7 4/4] Kirkwood: add lschlv2 and lsxhl board support

2012-06-01 Thread Prafulla Wadaskar


> -Original Message-
> From: Prafulla Wadaskar
> Sent: 01 June 2012 13:00
> To: 'Michael Walle'; u-boot@lists.denx.de
> Subject: RE: [PATCH v7 4/4] Kirkwood: add lschlv2 and lsxhl board
> support
> 
> 
> 
> > -Original Message-
> > From: Michael Walle [mailto:mich...@walle.cc]
> > Sent: 31 May 2012 23:43
> > To: u-boot@lists.denx.de
> > Cc: Michael Walle; Prafulla Wadaskar
> > Subject: [PATCH v7 4/4] Kirkwood: add lschlv2 and lsxhl board
> support
> >
> > This patch adds support for both the Linkstation Live (LS-CHLv2) and
> > Linkstation Pro (LS-XHL) by Buffalo.
> >
> > Signed-off-by: Michael Walle 
> > Cc: Prafulla Wadaskar 
> > ---
> 
> This is V7 and change log is missing, pls repost the patch with
> complete change log

Oh, I am sorry, I had a complete patch series, pls discard my previous comments 
here.

Regards..
Prafulla . . .
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Re: [U-Boot] [PATCH] Kirkwood: Add support for Ka-Ro TK71

2012-06-01 Thread Prafulla Wadaskar


> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 31 May 2012 16:37
> To: u-boot@lists.denx.de
> Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk
> Subject: [PATCH] Kirkwood: Add support for Ka-Ro TK71
> 
> Signed-off-by: Marek Vasut 
> Cc: Prafulla Wadaskar 
> Cc: Wolfgang Denk 
> ---
>  board/karo/tk71/Makefile |   45 ++
>  board/karo/tk71/kwbimage-256.cfg |  174
> ++
>  board/karo/tk71/kwbimage-512.cfg |  174
> ++

Dear Marek
Just for DRAM size change do not add one more cfg file, configure by default 
256MB of RAM in default kwbimg.cfg file and in function board_early_init_f() 
tune it to 512 for your other board version.

Regards..
Prafulla . . .
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Re: [U-Boot] [PATCH v7 4/4] Kirkwood: add lschlv2 and lsxhl board support

2012-06-01 Thread Prafulla Wadaskar


> -Original Message-
> From: Michael Walle [mailto:mich...@walle.cc]
> Sent: 31 May 2012 23:43
> To: u-boot@lists.denx.de
> Cc: Michael Walle; Prafulla Wadaskar
> Subject: [PATCH v7 4/4] Kirkwood: add lschlv2 and lsxhl board support
> 
> This patch adds support for both the Linkstation Live (LS-CHLv2) and
> Linkstation Pro (LS-XHL) by Buffalo.
> 
> Signed-off-by: Michael Walle 
> Cc: Prafulla Wadaskar 
> ---

This is V7 and change log is missing, pls repost the patch with complete change 
log

Regards..
Prafulla . . .
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Re: [U-Boot] [PATCH v3 1/5] kirkwood: add save functionality kirkwood_mpp_conf function

2012-06-01 Thread Valentin Longchamp
Hi Luka,

On 06/01/2012 01:02 AM, Luka Perkov wrote:
> Hi Valentin,
> 
> On Thu, May 31, 2012 at 04:17:52PM +0200, Valentin Longchamp wrote:
>> If a second non NULL argument is given to the kirkwood_mpp_conf
>> function, it will be used to store the current configuration of the MPP
>> registers. mpp_save  must be a preallocated table of the same size as
>> mpp_list and it must be zero terminated as well.
>>
>> A later call to kirkwood_mpp_conf function with this saved list as first
>> (mpp_conf) argment will set the configuration back.
>>
>> Signed-off-by: Valentin Longchamp 
>> cc: Holger Brunck 
>> cc: Prafulla Wadaskar 
>> ---
>>  arch/arm/cpu/arm926ejs/kirkwood/mpp.c|   14 --
>>  arch/arm/include/asm/arch-kirkwood/mpp.h |2 +-
>>  2 files changed, 13 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c 
>> b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
>> index 3da6c98..158ea84 100644
>> --- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
>> +++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
>> @@ -31,11 +31,11 @@ static u32 kirkwood_variant(void)
>>  #define MPP_CTRL(i) (KW_MPP_BASE + (i* 4))
>>  #define MPP_NR_REGS (1 + MPP_MAX/8)
>>  
>> -void kirkwood_mpp_conf(u32 *mpp_list)
>> +void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save)
>>  {
>>  u32 mpp_ctrl[MPP_NR_REGS];
>>  unsigned int variant_mask;
>> -int i;
>> +int i, save = 0;
>>  
>>  variant_mask = kirkwood_variant();
>>  if (!variant_mask)
>> @@ -48,10 +48,13 @@ void kirkwood_mpp_conf(u32 *mpp_list)
>>  }
>>  debug("\n");
>>  
>> +if (mpp_save)
>> +save = 1;
>>  
>>  while (*mpp_list) {
>>  unsigned int num = MPP_NUM(*mpp_list);
>>  unsigned int sel = MPP_SEL(*mpp_list);
>> +unsigned int sel_save;
>>  int shift;
>>  
>>  if (num > MPP_MAX) {
>> @@ -66,6 +69,13 @@ void kirkwood_mpp_conf(u32 *mpp_list)
>>  }
>>  
>>  shift = (num & 7) << 2;
>> +
>> +if (save) {
> 
> Why using new variable if it's only used in one place? Why not use this
> here:
> 
>   if (mpp_save) {
> 
> Then we don't need save variable at all.
> 

Yeah you are right, I can directly test on mpp_save, since it should remain NULL
during the whole while loop if NULL at the beginning.
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