[U-Boot] [PATCH] cm-t35: enable zero bootdelay check
Enable zero bootdelay check to make it possible to abort autoboot even if bootdelay == 0 Signed-off-by: Nikita Kiryanov nik...@compulab.co.il --- include/configs/cm_t35.h |1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 568ae8e..cd9d905 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -188,6 +188,7 @@ /* Environment information */ #define CONFIG_BOOTDELAY 10 +#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_EXTRA_ENV_SETTINGS \ loadaddr=0x8200\0 \ -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/4 V2] EXYNOS5: Add FDT support to SPI
This patch set adds FDT support to SPI driver. This patch set is based on top of EXYNOS5: FDT support for Sound Changes in V2: - Added Device nodes for SPI3 and SPI4. Rajeshwari Shinde (4): EXYNOS5: FDT: Add compatible strings for SPI EXYNOS5 : FDT: Add Aliases for SPI device EXYNOS5: FDT: Add SPI device node data SPI: EXYNOS: Add FDT support to driver. arch/arm/dts/exynos5250.dtsi| 41 +++ board/samsung/dts/exynos5250-smdk5250.dts |5 ++ doc/device-tree-bindings/exynos/isp-spi.txt | 22 ++ drivers/spi/exynos_spi.c| 96 +-- include/fdtdec.h|1 + lib/fdtdec.c|1 + 6 files changed, 160 insertions(+), 6 deletions(-) create mode 100644 doc/device-tree-bindings/exynos/isp-spi.txt -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4 V2] EXYNOS5: FDT: Add compatible strings for SPI
Add required compatible information for SPI driver.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V2:
- None.
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 0c195f3..d1279f4 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -72,6 +72,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
+ COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 29766dc..1dbb892 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -49,6 +49,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_S3C2440_I2C, samsung,s3c2440-i2c),
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
+ COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.7.4.4
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[U-Boot] [PATCH 2/4 V2] EXYNOS5 : FDT: Add Aliases for SPI device
This patch adds aliases for SPI.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Added aliases for SPI3 and SPI4.
board/samsung/dts/exynos5250-smdk5250.dts |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index 1562721..be57fde 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -25,6 +25,11 @@
i2c5 = /i2c@12cb;
i2c6 = /i2c@12cc;
i2c7 = /i2c@12cd;
+ spi0 = /spi@12d2;
+ spi1 = /spi@12d3;
+ spi2 = /spi@12d4;
+ spi3 = /spi@131a;
+ spi4 = /spi@131b;
};
sromc@1225 {
--
1.7.4.4
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[U-Boot] [PATCH 3/4 V2] EXYNOS5: FDT: Add SPI device node data
Add SPI device node data for exynos.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Added device node for ISP-SPI channels and documentation for same.
arch/arm/dts/exynos5250.dtsi| 41 +++
doc/device-tree-bindings/exynos/isp-spi.txt | 22 ++
2 files changed, 63 insertions(+), 0 deletions(-)
create mode 100644 doc/device-tree-bindings/exynos/isp-spi.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 3f750f0..2073ef2 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -102,4 +102,45 @@
compatible = samsung,exynos-sound;
reg = 0x12d6 0x20;
};
+
+ spi@12d2 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos-spi;
+ reg = 0x12d2 0x30;
+ interrupts = 0 68 0;
+ };
+
+ spi@12d3 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos-spi;
+ reg = 0x12d3 0x30;
+ interrupts = 0 69 0;
+ };
+
+ spi@12d4 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos-spi;
+ reg = 0x12d4 0x30;
+ clock-frequency = 5000;
+ interrupts = 0 70 0;
+};
+
+ spi@131a {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos-spi;
+ reg = 0x131a 0x30;
+ interrupts = 0 129 0;
+ };
+
+ spi@131b {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos-spi;
+ reg = 0x131b 0x30;
+ interrupts = 0 130 0;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/isp-spi.txt
b/doc/device-tree-bindings/exynos/isp-spi.txt
new file mode 100644
index 000..b8086e8
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/isp-spi.txt
@@ -0,0 +1,22 @@
+Exynos ISP SPI Subsystem
+
+The device node for ISP SPI subsytem.
+Since Peripheral id in EXYNOS is decoded based on Interrupts, currently
+ISP SPI have no individual interrupts hence we add ad dummy interrupt node
+which will have a value beyond the maximum number of interrupts exynos5 can
+support.
+
+Required properties :
+ - compatible : Should be samsung,exynos-spi for spi.
+ - reg : Base adrress of the the subsystem.
+ - interrupts : A value which is beyond the maximum number of interrupts
+exynos5 can support.
+
+Example:
+spi@131a {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos-spi;
+ reg = 0x131a 0x30;
+ interrupts = 0 129 0;
+};
--
1.7.4.4
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[U-Boot] [PATCH 4/4 V2] SPI: EXYNOS: Add FDT support to driver.
This patch adds FDT support to the SPI driver.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None.
drivers/spi/exynos_spi.c | 96 +++---
1 files changed, 90 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
index 3e6c18f..7ecc566 100644
--- a/drivers/spi/exynos_spi.c
+++ b/drivers/spi/exynos_spi.c
@@ -20,6 +20,7 @@
#include common.h
#include malloc.h
#include spi.h
+#include fdtdec.h
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/cpu.h
@@ -28,16 +29,20 @@
#include asm/arch-exynos/spi.h
#include asm/io.h
+DECLARE_GLOBAL_DATA_PTR;
+
/* Information about each SPI controller */
struct spi_bus {
enum periph_id periph_id;
s32 frequency; /* Default clock frequency, -1 for none */
struct exynos_spi *regs;
int inited; /* 1 if this bus is ready for use */
+ int node;
};
/* A list of spi buses that we know about */
static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS];
+static unsigned int bus_count;
struct exynos_spi_slave {
struct spi_slave slave;
@@ -50,7 +55,7 @@ struct exynos_spi_slave {
static struct spi_bus *spi_get_bus(unsigned dev_index)
{
- if (dev_index EXYNOS5_SPI_NUM_CONTROLLERS)
+ if (dev_index bus_count)
return spi_bus[dev_index];
debug(%s: invalid bus %d, __func__, dev_index);
@@ -347,21 +352,100 @@ static inline struct exynos_spi *get_spi_base(int
dev_index)
(dev_index - 3);
}
+/*
+ * Read the SPI config from the device tree node.
+ *
+ * @param blob FDT blob to read from
+ * @param node Node offset to read from
+ * @param bus SPI bus structure to fill with information
+ * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing
+ */
+static int spi_get_config(const void *blob, int node, struct spi_bus *bus)
+{
+ bus-node = node;
+ bus-regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, reg);
+ bus-periph_id = pinmux_decode_periph_id(blob, node);
+ if (bus-periph_id == PERIPH_ID_NONE) {
+ debug(%s: Invalid peripheral ID %d\n, __func__,
+ bus-periph_id);
+ return -FDT_ERR_NOTFOUND;
+ }
+
+ /* Use 500KHz as a suitable default */
+ bus-frequency = fdtdec_get_int(blob, node, spi-max-frequency,
+ 50);
+
+ return 0;
+}
+
+
+/*
+ * Process a list of nodes, adding them to our list of SPI ports.
+ *
+ * @param blob fdt blob
+ * @param node_list list of nodes to process (any =0 are ignored)
+ * @param count number of nodes to process
+ * @param is_dvc1 if these are DVC ports, 0 if standard I2C
+ * @return 0 if ok, -1 on error
+ */
+static int process_nodes(const void *blob, int node_list[], int count)
+{
+ int i;
+
+ /* build the i2c_controllers[] for each controller */
+ for (i = 0; i count; i++) {
+ int node = node_list[i];
+ struct spi_bus *bus;
+
+ if (node = 0)
+ continue;
+
+ bus = spi_bus[i];
+ if (spi_get_config(blob, node, bus)) {
+ printf(exynos spi_init: failed to decode bus %d\n,
+ i);
+ return -1;
+ }
+
+ debug(spi: controller bus %d at %p, periph_id %d\n,
+ i, bus-regs, bus-periph_id);
+ bus-inited = 1;
+ bus_count++;
+ }
+
+ return 0;
+}
+
/* Sadly there is no error return from this function */
void spi_init(void)
{
- int i;
+ int count;
+
+#ifdef CONFIG_OF_CONTROL
+ int node_list[EXYNOS5_SPI_NUM_CONTROLLERS];
+ const void *blob = gd-fdt_blob;
+
+ count = fdtdec_find_aliases_for_id(blob, spi,
+ COMPAT_SAMSUNG_EXYNOS_SPI, node_list,
+ EXYNOS5_SPI_NUM_CONTROLLERS);
+ if (process_nodes(blob, node_list, count))
+ return;
+
+#else
struct spi_bus *bus;
- for (i = 0; i EXYNOS5_SPI_NUM_CONTROLLERS; i++) {
- bus = spi_bus[i];
- bus-regs = get_spi_base(i);
- bus-periph_id = PERIPH_ID_SPI0 + i;
+ for (count = 0; i EXYNOS5_SPI_NUM_CONTROLLERS; i++) {
+ bus = spi_bus[count];
+ bus-regs = get_spi_base(count);
+ bus-periph_id = PERIPH_ID_SPI0 + count;
/* Although Exynos5 supports upto 50Mhz speed,
* we are setting it to 10Mhz for safe side
*/
bus-frequency = 1000;
bus-inited = 1;
+ bus-node = 0;
+ bus_count = EXYNOS5_SPI_NUM_CONTROLLERS;
}
+#endif
}
--
1.7.4.4
Re: [U-Boot] [PATCH 4/4] EXYNOS: Update pinmux to use gpio numbering
On 05/12/12 20:10, Minkyu Kang wrote:
Update pinmux by calling generic gpio_* functions instead s5p_gpio_*
functions
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c | 150
+++-
1 files changed, 63 insertions(+), 87 deletions(-)
NAK.
This file is not a SMDK5250 specific.
If this patch is applied then other boards will be get errors.
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 13f75e0..ed2201e 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -28,97 +28,83 @@
static void exynos5_uart_config(int peripheral)
{
- struct exynos5_gpio_part1 *gpio1 =
- (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
- struct s5p_gpio_bank *bank;
int i, start, count;
switch (peripheral) {
case PERIPH_ID_UART0:
- bank = gpio1-a0;
- start = 0;
+ start = GPIO_A00;
count = 4;
break;
case PERIPH_ID_UART1:
- bank = gpio1-d0;
- start = 0;
+ start = GPIO_D00;
count = 4;
break;
case PERIPH_ID_UART2:
- bank = gpio1-a1;
- start = 0;
+ start = GPIO_A10;
count = 4;
break;
case PERIPH_ID_UART3:
- bank = gpio1-a1;
- start = 4;
+ start = GPIO_A14;
count = 2;
break;
}
for (i = start; i start + count; i++) {
- s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ gpio_set_pull(i, GPIO_PULL_NONE);
+ gpio_cfg_pin(i, GPIO_FUNC(0x2));
}
}
static int exynos5_mmc_config(int peripheral, int flags)
{
- struct exynos5_gpio_part1 *gpio1 =
- (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
- struct s5p_gpio_bank *bank, *bank_ext;
- int i, start = 0, gpio_func = 0;
+ int i, start, start_ext, gpio_func = 0;
switch (peripheral) {
case PERIPH_ID_SDMMC0:
- bank = gpio1-c0;
- bank_ext = gpio1-c1;
- start = 0;
+ start = GPIO_C00;
+ start_ext = GPIO_C10;
gpio_func = GPIO_FUNC(0x2);
break;
case PERIPH_ID_SDMMC1:
- bank = gpio1-c2;
- bank_ext = NULL;
+ start = GPIO_C20;
+ start_ext = 0;
break;
case PERIPH_ID_SDMMC2:
- bank = gpio1-c3;
- bank_ext = gpio1-c4;
- start = 3;
+ start = GPIO_C30;
+ start_ext = GPIO_C43;
gpio_func = GPIO_FUNC(0x3);
break;
case PERIPH_ID_SDMMC3:
- bank = gpio1-c4;
- bank_ext = NULL;
+ start = GPIO_C40;
+ start_ext = 0;
break;
}
- if ((flags PINMUX_FLAG_8BIT_MODE) !bank_ext) {
+ if ((flags PINMUX_FLAG_8BIT_MODE) !start_ext) {
debug(SDMMC device %d does not support 8bit mode,
peripheral);
return -1;
}
if (flags PINMUX_FLAG_8BIT_MODE) {
- for (i = start; i = (start + 3); i++) {
- s5p_gpio_cfg_pin(bank_ext, i, gpio_func);
- s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
- s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ for (i = start_ext; i = (start_ext + 3); i++) {
+ gpio_cfg_pin(i, gpio_func);
+ gpio_set_pull(i, GPIO_PULL_UP);
+ gpio_set_drv(i, GPIO_DRV_4X);
}
}
for (i = 0; i 2; i++) {
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
- s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
- s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ gpio_cfg_pin(start + i, GPIO_FUNC(0x2));
+ gpio_set_pull(start + i, GPIO_PULL_NONE);
+ gpio_set_drv(start + i, GPIO_DRV_4X);
}
for (i = 3; i = 6; i++) {
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
- s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
- s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ gpio_cfg_pin(start + i, GPIO_FUNC(0x2));
+ gpio_set_pull(start + i, GPIO_PULL_UP);
+ gpio_set_drv(start + i, GPIO_DRV_4X);
}
return 0;
}
static void exynos5_sromc_config(int flags)
{
- struct exynos5_gpio_part1 *gpio1 =
- (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
int i;
/*
@@ -136,13 +122,13 @@ static void
Re: [U-Boot] [PATCH 2/4] S5P: GPIO: Add GPIO pin numbering to driver
Dear Rajeshwari,
On 05/12/12 19:46, Minkyu Kang wrote:
API's for GPIO pin numbering support are added to the generic S5P
gpio driver
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshawari Shinde rajeshwar...@samsung.com
---
drivers/gpio/s5p_gpio.c | 158
+--
1 files changed, 152 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 47f3213..5c051d4 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -142,20 +142,165 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank,
int gpio, int mode)
writel(value, bank-drv);
}
-struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)
+
+int s5p_gpio_get_pin(unsigned gpio)
{
- int bank = gpio / GPIO_PER_BANK;
- bank *= sizeof(struct s5p_gpio_bank);
+ return gpio % GPIO_PER_BANK;
+}
- return (struct s5p_gpio_bank *) (s5p_gpio_base(gpio) + bank);
+#ifdef HAVE_GENERIC_GPIO
Is it generic naming?
Also.. why we support two types of GPIO functions?
If you want to support generic GPIO, you should be replaced new gpio functions
completely.
+static struct s5p_gpio_bank *gpio_get_bank(unsigned int gpio)
+{
+ int bank_offset;
+
+ if (gpio GPIO_MAX_PORT_PART_1) {
+ bank_offset = gpio / GPIO_PER_BANK;
+ return (struct s5p_gpio_bank *) (EXYNOS5_GPIO_PART1_BASE +
Is it exynos5 specific?
(bank_offset *
+ sizeof(struct
s5p_gpio_bank)));
+ } else if (gpio GPIO_MAX_PORT_PART_2) {
+ bank_offset = (gpio - GPIO_MAX_PORT_PART_1) / GPIO_PER_BANK;
+ return (struct s5p_gpio_bank *) (EXYNOS5_GPIO_PART2_BASE +
(bank_offset *
+ sizeof(struct
s5p_gpio_bank)));
+ } else if (gpio GPIO_MAX_PORT_PART_3) {
+ bank_offset = (gpio - GPIO_MAX_PORT_PART_2) / GPIO_PER_BANK;
+ return (struct s5p_gpio_bank *) (EXYNOS5_GPIO_PART3_BASE +
(bank_offset *
+ sizeof(struct
s5p_gpio_bank)));
+ }
+ else
should be moved to upper line.
And need the brace at this else state.
+ return (struct s5p_gpio_bank *) EXYNOS5_GPIO_PART4_BASE;
+
+ return NULL;
}
-int s5p_gpio_get_pin(unsigned gpio)
+void gpio_cfg_pin(int gpio, int cfg)
{
- return gpio % GPIO_PER_BANK;
+ unsigned int value;
+ struct s5p_gpio_bank *bank = gpio_get_bank(gpio);
+
+ value = readl(bank-con);
+ value = ~CON_MASK(GPIO_BIT(gpio));
+ value |= CON_SFR(GPIO_BIT(gpio), cfg);
+ writel(value, bank-con);
+}
+
+void gpio_set_pull(int gpio, int mode)
+{
+ unsigned int value;
+ struct s5p_gpio_bank *bank = gpio_get_bank(gpio);
+
+ value = readl(bank-pull);
+ value = ~PULL_MASK(GPIO_BIT(gpio));
+
+ switch (mode) {
+ case GPIO_PULL_DOWN:
+ case GPIO_PULL_UP:
+ value |= PULL_MODE(GPIO_BIT(gpio), mode);
+ break;
+ default:
+ break;
+ }
+
+ writel(value, bank-pull);
+}
+
+void gpio_set_drv(int gpio, int mode)
+{
+ unsigned int value;
+ struct s5p_gpio_bank *bank = gpio_get_bank(gpio);
+
+ value = readl(bank-drv);
+ value = ~DRV_MASK(GPIO_BIT(gpio));
+
+ switch (mode) {
+ case GPIO_DRV_1X:
+ case GPIO_DRV_2X:
+ case GPIO_DRV_3X:
+ case GPIO_DRV_4X:
+ value |= DRV_SET(GPIO_BIT(gpio), mode);
+ break;
+ default:
+ return;
+ }
+
+ writel(value, bank-drv);
}
+void gpio_set_rate(int gpio, int mode)
+{
+ unsigned int value;
+ struct s5p_gpio_bank *bank = gpio_get_bank(gpio);
+
+ value = readl(bank-drv);
+ value = ~RATE_MASK(GPIO_BIT(gpio));
+
+ switch (mode) {
+ case GPIO_DRV_FAST:
+ case GPIO_DRV_SLOW:
+ value |= RATE_SET(GPIO_BIT(gpio));
+ break;
+ default:
+ return;
+ }
+
+ writel(value, bank-drv);
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ gpio_cfg_pin(gpio, GPIO_INPUT);
+
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ unsigned int val;
+ struct s5p_gpio_bank *bank = gpio_get_bank(gpio);
+
+ gpio_cfg_pin(gpio, GPIO_OUTPUT);
+
+ val = readl(bank-dat);
+ val = ~DAT_MASK(GPIO_BIT(gpio));
+ if (value)
+ val |= DAT_SET(GPIO_BIT(gpio));
+ writel(val, bank-dat);
+
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ unsigned int value;
+ struct s5p_gpio_bank *bank = gpio_get_bank(gpio);
+
+ value = readl(bank-dat);
+ return !!(value DAT_MASK(GPIO_BIT(gpio)));
+}
+
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ unsigned int val;
+ struct s5p_gpio_bank *bank =
[U-Boot] [PATCH 0/3 V2] EXYNOS5: MAX77686 add FDT support
Add FDT support to PMIC MAX77686 chip. This patch set is based on top of: EXYNOS5: Add FDT support to SPI Changes in V2: - Changed chip address from 06 to 6. - Corrected indentation errors. Rajeshwari Shinde (3): EXYNOS5: FDT: Add compatible strings for PMIC EXYNOS5: Add device node for PMIC PMIC: MAX77686: Add FDT Support board/samsung/dts/exynos5250-smdk5250.dts |7 + drivers/misc/pmic_max77686.c | 35 include/fdtdec.h |1 + lib/fdtdec.c |1 + 4 files changed, 39 insertions(+), 5 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3 V2] EXYNOS5: FDT: Add compatible strings for PMIC
Add required compatible information for PMIC
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index d1279f4..5934af1 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -73,6 +73,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
+ COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 1dbb892..6bc57c5 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -50,6 +50,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
+ COMPAT(MAXIM_MAX77686_PMIC, maxim,MAX77686_PMIC),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.7.4.4
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[U-Boot] [PATCH 2/3 V2] EXYNOS5: Add device node for PMIC
Add device node for MAX77686
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Changed reg value from 06 to 6.
board/samsung/dts/exynos5250-smdk5250.dts |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index be57fde..923a189 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -72,4 +72,11 @@
compatible = wolfson,wm8994-codec;
};
};
+
+ i2c@12c6 {
+ pmic@6 {
+ reg = 0x6;
+ compatible = maxim,MAX77686_PMIC;
+ };
+ };
};
--
1.7.4.4
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[U-Boot] [PATCH 3/3 V2] PMIC: MAX77686: Add FDT Support
This patch adds fdt support to MAX77686.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Corrected indentation errors.
drivers/misc/pmic_max77686.c | 35 ++-
1 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/pmic_max77686.c b/drivers/misc/pmic_max77686.c
index 36f7f4d..a370d35 100644
--- a/drivers/misc/pmic_max77686.c
+++ b/drivers/misc/pmic_max77686.c
@@ -22,21 +22,46 @@
*/
#include common.h
+#include fdtdec.h
+#include i2c.h
#include pmic.h
#include max77686_pmic.h
+DECLARE_GLOBAL_DATA_PTR;
+
int pmic_init(void)
{
struct pmic *p = get_pmic();
static const char name[] = MAX77686_PMIC;
- puts(Board PMIC init\n);
+#ifdef CONFIG_OF_CONTROL
+ const void *blob = gd-fdt_blob;
+ int node, parent;
+
+ node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC);
+ if (node 0) {
+ debug(PMIC: No node for PMIC Chip in device tree\n);
+ debug(node = %d\n, node);
+ return -1;
+ }
+
+ parent = fdt_parent_offset(blob, node);
+ if (parent 0) {
+ debug(%s: Cannot find node parent\n, __func__);
+ return -1;
+ }
+
+ p-bus = i2c_get_bus_num_fdt(parent);
+ p-hw.i2c.addr = fdtdec_get_int(blob, node, reg, 0);
+#else
+ p-bus = I2C_PMIC;
+ p-hw.i2c.addr = MAX77686_I2C_ADDR;
+#endif
+
p-name = name;
+ p-hw.i2c.tx_num = 1;
p-interface = PMIC_I2C;
p-number_of_regs = PMIC_NUM_OF_REGS;
- p-hw.i2c.addr = MAX77686_I2C_ADDR;
- p-hw.i2c.tx_num = 1;
- p-bus = I2C_PMIC;
-
+ puts(Board PMIC init MAX77686\n);
return 0;
}
--
1.7.4.4
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[U-Boot] [PATCH 0/4] EXYNOS5: Enable dwmmc
This patch set enables the dwmmc for Exynos5250 on SMDK5250. Also does the required driver changes. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC Exynos: clock: support get_mmc_clk for exynos Amar (4): MMC: DWMMC: Modified fifo size computation MMC: EXYNOS: Added call back function for clock get EXYNOS: CLOCK: Initialised the local variable SMDK5250: Initialise and enable dwmmc channels arch/arm/cpu/armv7/exynos/clock.c |4 ++-- board/samsung/smdk5250/smdk5250.c | 32 ++-- drivers/mmc/dw_mmc.c |2 ++ drivers/mmc/exynos_dw_mmc.c | 13 - include/configs/smdk5250.h|4 ++-- 5 files changed, 44 insertions(+), 11 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/4] MMC: EXYNOS: Added call back function for clock get
This patch defines the call back required by dw mmc driver to get the
clock value. It also adds function to set the dw mmc clock divider ratio.
Signed-off-by: Amarendra Reddy amarendra...@samsung.com
---
drivers/mmc/exynos_dw_mmc.c | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..7cc8aba 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -30,25 +30,37 @@ static void exynos_dwmci_clksel(struct dwmci_host *host)
{
u32 val;
val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) |
+ DWMCI_SET_DIV_RATIO(DWMCI_SHIFT_0);
dwmci_writel(host, DWMCI_CLKSEL, val);
}
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
+}
+
int exynos_dwmci_init(u32 regbase, int bus_width, int index)
{
struct dwmci_host *host = NULL;
+ int div = 0;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ div = 1;
+ /* Set the mmc clock divider ratio pre-ratio */
+ set_mmc_clk(index, div);
+
host-name = EXYNOS_NAME;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
host-clksel = exynos_dwmci_clksel;
host-dev_index = index;
+ host-mmc_clk = exynos_dwmci_get_clk;
add_dwmci(host, 5200, 40);
--
1.7.0.4
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[U-Boot] [PATCH 3/4] EXYNOS: CLOCK: Initialised the local variable
This patch initialises the local variable 'shift' to zero to avoid improper extraction of ratio and pre-ratio divider values. Extraction of improper values was happening due to garbage value present in local variable. Signed-off-by: Amarendra Reddy amarendra...@samsung.com --- arch/arm/cpu/armv7/exynos/clock.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 731bbff..0bcf05f 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -379,7 +379,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -428,7 +428,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] MMC: DWMMC: Modified fifo size computation
The current implementation of fifo size computation was giving improper values for eMMC channel. Modified the computation as per user manual. Signed-off-by: Amarendra Reddy amarendra...@samsung.com --- drivers/mmc/dw_mmc.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 4070d4e..62dc152 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -332,6 +332,8 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_BMOD, 1); fifo_size = dwmci_readl(host, DWMCI_FIFOTH); + fifo_size = ((fifo_size RX_WMARK(0xFFF)) 16) + 1; + if (host-fifoth_val) fifoth_val = host-fifoth_val; else -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4] SMDK5250: Initialise and enable dwmmc channels
This patch initialises and enables dwmmc channels 0 and 2 for SMDK5250.
It also initialises the pinmux for the same.
Signed-off-by: Amarendra Reddy amarendra...@samsung.com
---
board/samsung/smdk5250/smdk5250.c | 22 +-
include/configs/smdk5250.h|4 ++--
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 4c50342..9503510 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -26,6 +26,7 @@
#include netdev.h
#include spi.h
#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
#include asm/arch/pinmux.h
@@ -139,13 +140,32 @@ int board_mmc_init(bd_t *bis)
{
int err;
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(SDMMC2 not configured\n);
+ return err;
+ }
+
+ /*SD: dwmmc Channel-2 with 4 bit bus width */
+ err = exynos_dwmmc_init(2, 4);
+ if (err) {
+ debug(dwmmc Channel-2 init failed\n);
+ return err;
+ }
+
err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
if (err) {
debug(SDMMC0 not configured\n);
return err;
}
- err = s5p_mmc_init(0, 8);
+ /*eMMC: dwmmc Channel-0 with 8 bit bus width */
+ err = exynos_dwmmc_init(0, 8);
+ if (err) {
+ debug(dwmmc Channel-0 init failed\n);
+ return err;
+ }
+
return err;
}
#endif
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index e412da8..7dc2d96 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -77,8 +77,8 @@
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
-#define CONFIG_SDHCI
-#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOARD_EARLY_INIT_F
--
1.7.0.4
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[U-Boot] [PATCH 2/3] designware_i2c: Added s/w generation of stop bit
In the newer versions of designware i2c IP there is the possibility
of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically
requires the s/w to generate the stop bit condition directly, as
the h/w will not automatically generate it when TX_FIFO is empty.
To avoid generation of an extra 0x0 byte sent as data, the
IC_STOP command must be sent along with the last IC_CMD.
This patch always writes bit[9] of ic_data_cmd even in the
older versions, assuming that it is a noop there.
Signed-off-by: Armando Visconti armando.visco...@st.com
---
drivers/i2c/designware_i2c.c | 11 ---
drivers/i2c/designware_i2c.h |1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 4e4bfd4..eab3131 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -283,7 +283,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar
*buffer, int len)
start_time_rx = get_timer(0);
while (len) {
- writel(IC_CMD, i2c_regs_p-ic_cmd_data);
+ if (len == 1)
+ writel(IC_CMD | IC_STOP, i2c_regs_p-ic_cmd_data);
+ else
+ writel(IC_CMD, i2c_regs_p-ic_cmd_data);
if (readl(i2c_regs_p-ic_status) IC_STATUS_RFNE) {
*buffer++ = (uchar)readl(i2c_regs_p-ic_cmd_data);
@@ -322,9 +325,11 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
start_time_tx = get_timer(0);
while (len) {
if (readl(i2c_regs_p-ic_status) IC_STATUS_TFNF) {
- writel(*buffer, i2c_regs_p-ic_cmd_data);
+ if (--len == 0)
+ writel(*buffer | IC_STOP,
i2c_regs_p-ic_cmd_data);
+ else
+ writel(*buffer, i2c_regs_p-ic_cmd_data);
buffer++;
- len--;
start_time_tx = get_timer(0);
} else if (get_timer(start_time_tx) (nb * I2C_BYTE_TO)) {
diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
index 03b520e..e004152 100644
--- a/drivers/i2c/designware_i2c.h
+++ b/drivers/i2c/designware_i2c.h
@@ -95,6 +95,7 @@ struct i2c_regs {
/* i2c data buffer and command register definitions */
#define IC_CMD 0x0100
+#define IC_STOP0x0200
/* i2c interrupt status register definitions */
#define IC_GEN_CALL0x0800
--
1.7.4.4
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[U-Boot] [PATCH 3/3] designware_i2c: Fixed the setting of the i2c bus speed
There are three couple (hcnt/lcnt) of registers for each
speed (SS/FS/HS). The driver needs to set the proper couple
of regs according to what speed we are setting.
Signed-off-by: Armando Visconti armando.visco...@st.com
---
drivers/i2c/designware_i2c.c | 28 +---
1 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index eab3131..6653870 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -44,7 +44,6 @@ static void set_speed(int i2c_spd)
{
unsigned int cntl;
unsigned int hcnt, lcnt;
- unsigned int high, low;
unsigned int enbl;
/* to set speed cltr must be disabled */
@@ -52,39 +51,38 @@ static void set_speed(int i2c_spd)
enbl = ~IC_ENABLE_0B;
writel(enbl, i2c_regs_p-ic_enable);
-
cntl = (readl(i2c_regs_p-ic_con) (~IC_CON_SPD_MSK));
switch (i2c_spd) {
case IC_SPEED_MODE_MAX:
cntl |= IC_CON_SPD_HS;
- high = MIN_HS_SCL_HIGHTIME;
- low = MIN_HS_SCL_LOWTIME;
+ hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
+ writel(hcnt, i2c_regs_p-ic_hs_scl_hcnt);
+ lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
+ writel(lcnt, i2c_regs_p-ic_hs_scl_lcnt);
break;
case IC_SPEED_MODE_STANDARD:
cntl |= IC_CON_SPD_SS;
- high = MIN_SS_SCL_HIGHTIME;
- low = MIN_SS_SCL_LOWTIME;
+ hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
+ writel(hcnt, i2c_regs_p-ic_ss_scl_hcnt);
+ lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
+ writel(lcnt, i2c_regs_p-ic_ss_scl_lcnt);
break;
case IC_SPEED_MODE_FAST:
default:
cntl |= IC_CON_SPD_FS;
- high = MIN_FS_SCL_HIGHTIME;
- low = MIN_FS_SCL_LOWTIME;
+ hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
+ writel(hcnt, i2c_regs_p-ic_fs_scl_hcnt);
+ lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
+ writel(lcnt, i2c_regs_p-ic_fs_scl_lcnt);
break;
}
writel(cntl, i2c_regs_p-ic_con);
- hcnt = (IC_CLK * high) / NANO_TO_MICRO;
- writel(hcnt, i2c_regs_p-ic_fs_scl_hcnt);
-
- lcnt = (IC_CLK * low) / NANO_TO_MICRO;
- writel(lcnt, i2c_regs_p-ic_fs_scl_lcnt);
-
- /* re-enable i2c ctrl back now that speed is set */
+ /* Enable back i2c now speed set */
enbl |= IC_ENABLE_0B;
writel(enbl, i2c_regs_p-ic_enable);
}
--
1.7.4.4
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[U-Boot] [PATCH 1/3] designware_i2c.c: Added the support for MULTI_BUS
This patch adds the capability to switch between 10
different I2C busses (from 0 to 9).
Signed-off-by: Armando Visconti armando.visco...@st.com
---
drivers/i2c/designware_i2c.c | 82 +-
1 files changed, 81 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index bf64a2a..4e4bfd4 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -26,7 +26,12 @@
#include asm/arch/hardware.h
#include designware_i2c.h
-static struct i2c_regs *const i2c_regs_p =
+#ifdef CONFIG_I2C_MULTI_BUS
+static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX];
+static unsigned int current_bus = 0;
+#endif
+
+static struct i2c_regs *i2c_regs_p =
(struct i2c_regs *)CONFIG_SYS_I2C_BASE;
/*
@@ -150,6 +155,10 @@ void i2c_init(int speed, int slaveadd)
enbl = readl(i2c_regs_p-ic_enable);
enbl |= IC_ENABLE_0B;
writel(enbl, i2c_regs_p-ic_enable);
+
+#ifdef CONFIG_I2C_MULTI_BUS
+ bus_initialized[current_bus] = 1;
+#endif
}
/*
@@ -344,3 +353,74 @@ int i2c_probe(uchar chip)
return ret;
}
+
+#ifdef CONFIG_I2C_MULTI_BUS
+int i2c_set_bus_num(unsigned int bus)
+{
+ switch (bus) {
+ case 0:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE;
+ break;
+#ifdef CONFIG_SYS_I2C_BASE1
+ case 1:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE2
+ case 2:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE3
+ case 3:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE4
+ case 4:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE5
+ case 5:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE6
+ case 6:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE7
+ case 7:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE8
+ case 8:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8;
+ break;
+#endif
+#ifdef CONFIG_SYS_I2C_BASE9
+ case 9:
+ i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9;
+ break;
+#endif
+ default:
+ printf(Bad bus: %d\n, bus);
+ return -1;
+ }
+
+ current_bus = bus;
+
+ if (!bus_initialized[current_bus])
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+ return 0;
+}
+
+int i2c_get_bus_num(void)
+{
+ return current_bus;
+}
+#endif
--
1.7.4.4
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[U-Boot] [PATCH 0/3] I2C designware patches
Hello Vipin, I have prepared this patch after the work I have done for the new asic which embeds the I2C designware IP configured with the stop bit controlled by s/w. I quickly tested it on both this asic AND the SPEAr1340, but if you can quickly check yourself would be good. I think that this patch may be included in the work you are preparing on your own repo, but I rebased this work on the Heiko's u-boot-i2c.git repo. Thx, Arm Armando Visconti (3): designware_i2c.c: Added the support for MULTI_BUS designware_i2c: Added s/w generation of stop bit designware_i2c: Fixed the setting of the i2c bus speed drivers/i2c/designware_i2c.c | 121 +++--- drivers/i2c/designware_i2c.h |1 + 2 files changed, 103 insertions(+), 19 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Atheros ART data crc calculation
Hello all: I am attempting to recover the ART Atheros Radio Test EEPROM data for a router and am attempting to copy the data from one router to the other, which may not be the best of ideas, but the two boards are identical and purchased at the same time... The command progmac seems to be broken. This is the command supplied by the vendor, it does not alter the data, or I don't know how to use it properly. I am issuing the command progmac 1234 where 1234 is the last 4 digits of the MAC to program. I have located the two ethernet addresses in the data and wish to alter the data. I can alter the data, but then the CRC check fails, and the data is rejected. I would like to recalculate the CRC, and I think it is using an XOR method, and the result of the calculation should be 0x, but I am not sure on this point. I located a .c program that reads and writes this data, but I don't think it is for embedded cards (such as this router board). The specific board details are Buffalo WZR-HP-AG300H, running a platform similar to an AP96 reference design. The following web page has the specifications... http://wiki.openwrt.org/toh/buffalo/wzr-hp-ag300h The information is stored at address 0xbf05 in the FLASH and this sector is 64kb in size (one flash sector). I can alter the data by copying to RAM, modifying the bytes, then erase and rewrite the flash sector. However, when I start up, I get a Bad CRC of EEPROM!! from the U-Boot, and I can continue the boot process with a boot command, however, the Atheros driver refuses to use the information since it fails the CRC check, and the driver does not load. I have searched for some time on the internet to see if anyone else has run across this problem, but I can't turn up many results. I thought I would put this out on the mailing list to see if anyone can provide assistance with this. Thanks, Allan Drassal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Marvell PXA168/PXA166
Hello, A customer needs to use PXA166 in one project and I am looking for Linux support for it. Someone here uses it? Regards, -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-staging/s...@denx.de
Hi Tom, I have collected my powerpc/mpc5200 SPL patch series in my staging branch for you to pull. After rebasing it on top of latest master. This series has been sitting on the list for quite some time now. And I have some patches pending relying on this patchset. Thanks, Stefan The following changes since commit ce12a8c1a94a2b3d585feff387497f724b98e3ce: Merge branch 'master' of git://git.denx.de/u-boot-x86 (2012-12-03 06:47:05 -0700) are available in the git repository at: git://www.denx.de/git/u-boot-staging.git s...@denx.de for you to fetch changes up to fb3d2b8a3fc26ffb0127fd0fed90ff5f074e67d7: Makefile: Add target for combined spl/u-boot.bin u-boot.img (2012-12-05 17:31:30 +0100) Stefan Roese (7): powerpc: Extract EPAPR_MAGIC constants into processor.h SPL: Port SPL framework to powerpc env: Enable getenv_f() for SPL_BUILD mpc5200: Add SPL support mpc5200: Add a3m071 board support Makefile: Add possibility to set entry-point for u-boot.img Makefile: Add target for combined spl/u-boot.bin u-boot.img MAINTAINERS | 2 + Makefile| 14 +- arch/powerpc/cpu/mpc5xxx/Makefile | 4 + arch/powerpc/cpu/mpc5xxx/spl_boot.c | 79 +++ arch/powerpc/cpu/mpc5xxx/start.S| 22 ++ arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds | 57 + arch/powerpc/cpu/mpc85xx/release.S | 1 - arch/powerpc/include/asm/processor.h| 6 + arch/powerpc/include/asm/spl.h | 31 +++ arch/powerpc/lib/Makefile | 12 + arch/powerpc/lib/bootm.c| 6 - arch/powerpc/lib/spl.c | 42 board/a3m071/Makefile | 36 +++ board/a3m071/README | 80 +++ board/a3m071/a3m071.c | 335 board/a3m071/mt46v16m16-75.h| 32 +++ boards.cfg | 1 + common/Makefile | 3 + common/spl/spl.c| 16 ++ include/configs/a3m071.h| 380 20 files changed, 1151 insertions(+), 8 deletions(-) create mode 100644 arch/powerpc/cpu/mpc5xxx/spl_boot.c create mode 100644 arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds create mode 100644 arch/powerpc/include/asm/spl.h create mode 100644 arch/powerpc/lib/spl.c create mode 100644 board/a3m071/Makefile create mode 100644 board/a3m071/README create mode 100644 board/a3m071/a3m071.c create mode 100644 board/a3m071/mt46v16m16-75.h create mode 100644 include/configs/a3m071.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND 0/4] fs:ext4:fix: Fixes for ext4write command
Several fixes for ext4write command including: - compiler warnings suppress - lldiv() and do_div() instead of plain / and % operands for 64-32 bits - Proper initialization of dev_desc - Proper definition of cache aligned filename buffer Lukasz Majewski (4): fs:ext4:write: Add lldiv and do_div to perform 64-32 bits division fs:ext4:write: Store block device descriptor in file system structure fs:ext4:fix: Code refactoring to suppress compiler warnings fs:ext4:write: Initialize cache aligned filename buffer fs/ext4/dev.c |1 + fs/ext4/ext4_common.c | 14 ++ fs/ext4/ext4_journal.c |3 +-- fs/ext4/ext4fs.c | 13 ++--- 4 files changed, 18 insertions(+), 13 deletions(-) -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND 1/4] fs:ext4:write: Add lldiv and do_div to perform 64-32 bits division
The ext4write code has been using direct calls to 64-32 division
(/ and %).
Officially supported u-boot toolchains (eldk-5.[12].x) generate calls
to __aeabi_uldivmod(), which is niether defined in the toolchain libs
nor u-boot source tree.
Due to that, when the ext4write command has been executed, undefined
instruction execption was generated (since the __aeabi_uldivmod()
is not provided).
To fix this error, lldiv() for division and do_div() for modulo have
been used.
Those two functions are recommended for performing 64-32 bit number
division in u-boot.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
fs/ext4/ext4fs.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 06536ba..80b3b90 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -40,6 +40,7 @@
#include linux/stat.h
#include linux/time.h
#include asm/byteorder.h
+#include div64.h
#include ext4_common.h
int ext4fs_symlinknest;
@@ -1051,8 +1052,8 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
}
/* calucalate how many blocks required */
bytes_reqd_for_file = sizebytes;
- blks_reqd_for_file = bytes_reqd_for_file / fs-blksz;
- if (bytes_reqd_for_file % fs-blksz != 0) {
+ blks_reqd_for_file = lldiv(bytes_reqd_for_file, fs-blksz);
+ if (do_div(bytes_reqd_for_file, fs-blksz) != 0) {
blks_reqd_for_file++;
debug(total bytes for a file %u\n, blks_reqd_for_file);
}
--
1.7.2.3
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[U-Boot] [RESEND 2/4] fs:ext4:write: Store block device descriptor in file system structure
The device block descriptor (block_dev_desc_t) )shall be stored at ext4 early code (at ext4fs_set_blk_dev in this case) to be available for latter use (like put_ext4()). Signed-off-by: Lukasz Majewski l.majew...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- fs/ext4/dev.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c index 1596a92..464a67d 100644 --- a/fs/ext4/dev.c +++ b/fs/ext4/dev.c @@ -52,6 +52,7 @@ void ext4fs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info) part_info = info; part_offset = info-start; get_fs()-total_sect = (info-size * info-blksz) / SECTOR_SIZE; + get_fs()-dev_desc = rbdd; } int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf) -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND 4/4] fs:ext4:write: Initialize cache aligned filename buffer
The filename buffer is allocated dynamically. It must be cache aligned. Moreover, it is necessary to erase its content before we use it for file name operations. This prevents from corruption of written file names. Signed-off-by: Lukasz Majewski l.majew...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- fs/ext4/ext4fs.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 64d8a6d..f02c215 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -1011,8 +1011,6 @@ int ext4fs_write(const char *fname, unsigned char *buffer, unsigned int blks_reqd_for_file; unsigned int blocks_remaining; int existing_file_inodeno; - char filename[256]; - char *temp_ptr = NULL; long int itable_blkno; long int parent_itable_blkno; @@ -1021,6 +1019,9 @@ int ext4fs_write(const char *fname, unsigned char *buffer, unsigned int inodes_per_block; unsigned int ibmap_idx; struct ext_filesystem *fs = get_fs(); + ALLOC_CACHE_ALIGN_BUFFER(char, filename, 256); + memset(filename, 0x00, sizeof(filename)); + g_parent_inode = zalloc(sizeof(struct ext2_inode)); if (!g_parent_inode) goto fail; -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND 3/4] fs:ext4:fix: Code refactoring to suppress compiler warnings
Several fixes to suppress compiler's (eldk-5.[12].x gcc 4.6)
warning [-Wunused-but-set-variable]
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
fs/ext4/ext4_common.c | 14 ++
fs/ext4/ext4_journal.c |3 +--
fs/ext4/ext4fs.c |3 ---
3 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 323875f..f12b805 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -378,7 +378,6 @@ void ext4fs_update_parent_dentry(char *filename, int
*p_ino, int file_type)
struct ext_filesystem *fs = get_fs();
/* directory entry */
struct ext2_dirent *dir;
- char *ptr = NULL;
char *temp_dir = NULL;
zero_buffer = zalloc(fs-blksz);
@@ -415,7 +414,6 @@ restart:
if (ext4fs_log_journal(root_first_block_buffer, first_block_no_of_root))
goto fail;
dir = (struct ext2_dirent *)root_first_block_buffer;
- ptr = (char *)dir;
totalbytes = 0;
while (dir-direntlen 0) {
/*
@@ -483,14 +481,12 @@ restart:
break;
dir = (struct ext2_dirent *)((char *)dir + templength);
- ptr = (char *)dir;
}
/* make a pointer ready for creating next directory entry */
templength = dir-direntlen;
totalbytes = totalbytes + templength;
dir = (struct ext2_dirent *)((char *)dir + templength);
- ptr = (char *)dir;
/* get the next available inode number */
inodeno = ext4fs_get_new_inode_no();
@@ -1200,6 +1196,11 @@ static void alloc_double_indirect_block(struct
ext2_inode *file_inode,
status = ext4fs_devread(di_blockno_parent *
fs-sect_perblk, 0,
fs-blksz, (char *)di_parent_buffer);
+
+ if (!status) {
+ printf(%s: Device read error!\n, __func__);
+ goto fail;
+ }
memset(di_parent_buffer, '\0', fs-blksz);
/*
@@ -1227,6 +1228,11 @@ static void alloc_double_indirect_block(struct
ext2_inode *file_inode,
fs-sect_perblk, 0,
fs-blksz,
(char *)di_child_buff);
+
+ if (!status) {
+ printf(%s: Device read error!\n, __func__);
+ goto fail;
+ }
memset(di_child_buff, '\0', fs-blksz);
/* filling of actual datablocks for each child */
for (j = 0; j (fs-blksz / sizeof(int)); j++) {
diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c
index 8a252d6..9f01708 100644
--- a/fs/ext4/ext4_journal.c
+++ b/fs/ext4/ext4_journal.c
@@ -410,7 +410,7 @@ int ext4fs_check_journal_state(int recovery_flag)
int transaction_state = TRANSACTION_COMPLETE;
int prev_desc_logical_no = 0;
int curr_desc_logical_no = 0;
- int ofs, flags, block;
+ int ofs, flags;
struct ext2_inode inode_journal;
struct journal_superblock_t *jsb = NULL;
struct journal_header_t *jdb = NULL;
@@ -453,7 +453,6 @@ int ext4fs_check_journal_state(int recovery_flag)
i = be32_to_cpu(jsb-s_first);
while (1) {
- block = be32_to_cpu(jsb-s_first);
blknr = read_allocated_block(inode_journal, i);
memset(temp_buff1, '\0', fs-blksz);
ext4fs_devread(blknr * fs-sect_perblk,
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 80b3b90..64d8a6d 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -931,7 +931,6 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
int previous_block_number = -1;
int delayed_start = 0;
int delayed_extent = 0;
- int delayed_skipfirst = 0;
int delayed_next = 0;
char *delayed_buf = NULL;
@@ -964,7 +963,6 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
previous_block_number = blknr;
delayed_start = blknr;
delayed_extent = blockend;
- delayed_skipfirst = skipfirst;
delayed_buf = buf;
delayed_next = blknr +
(blockend SECTOR_BITS);
@@ -973,7 +971,6 @@ static int ext4fs_write_file(struct ext2_inode *file_inode,
previous_block_number = blknr;
delayed_start = blknr;
delayed_extent = blockend;
-
Re: [U-Boot] [RESEND 0/4] fs:ext4:fix: Fixes for ext4write command
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 12/05/12 13:06, Lukasz Majewski wrote: Several fixes for ext4write command including: - compiler warnings suppress - lldiv() and do_div() instead of plain / and % operands for 64-32 bits - Proper initialization of dev_desc - Proper definition of cache aligned filename buffer Lukasz Majewski (4): fs:ext4:write: Add lldiv and do_div to perform 64-32 bits division fs:ext4:write: Store block device descriptor in file system structure fs:ext4:fix: Code refactoring to suppress compiler warnings fs:ext4:write: Initialize cache aligned filename buffer fs/ext4/dev.c |1 + fs/ext4/ext4_common.c | 14 ++ fs/ext4/ext4_journal.c |3 +-- fs/ext4/ext4fs.c | 13 ++--- 4 files changed, 18 insertions(+), 13 deletions(-) OK, I know the wiki talks about resends, but has anything changed from the last go-round? Thanks! - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://www.enigmail.net/ iQIcBAEBAgAGBQJQv5wZAAoJENk4IS6UOR1WQFwP/juJGARGm/7f/Fyoy2UueWRq K3NPEYuMLP+jyBjIno4jaZ1vkHceUv//1OLH3yUrgIF+CyUQAzLVtogxSXE+x444 i7vMs19jCJgw3i1P0wnnxqijaHnHLYQIiY2nCJzJ65wWO+gZv6lJ0okg319uxaTS fe5HQzz+puLFIDLQUEavyotAWrVoG1xoxsJXc1LQ7iyRvzqgCWHvURzCmZ4m6pJI WdZwLRRhS8/FSA7ILHlNmOTxWbMAPShb5HZ36QpsFa7LXAbXF0xh4N33AqDapLtA dyJyjbiYxBYH9Jv/qK+Szt/DCwFqteBwcRXBL5wG2LF+CuTKhvLAmC7qi41SUa5E O6T5etbbwjIB23g6ImRNAEJfW0OItZ5l12VXAHRYzIN0t2zTGqp0a4bfvKEOqa4U nVL4f0xYes/WtoZiNVD+Jeck1VAIGOyvir/7QvIJun+9OmCfdBHkbZWb4LUsa/Hh lWfpiASQ/fTYaFY9UfiV9zntcOgUacrQumroznz6JHhaTsNTwgkO4v6Xu11SkdId a3DkN/TKk9T6Km6mpIfggIGFrvw8rBL2CPAh7GCMrOx2EZyoXfqYSy6SQs5XRysJ jHu/7pjm0Fxjt9o6roaDivkJDRley6EWGVm0oFOqCDNt4goQNWslZnYMOcQb3b06 vUd3b7N9YO/JeyQbz+c+ =tm/c -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-staging/s...@denx.de
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 12/05/12 12:28, Stefan Roese wrote: Hi Tom, I have collected my powerpc/mpc5200 SPL patch series in my staging branch for you to pull. After rebasing it on top of latest master. This series has been sitting on the list for quite some time now. And I have some patches pending relying on this patchset. Thanks, Stefan The following changes since commit ce12a8c1a94a2b3d585feff387497f724b98e3ce: Merge branch 'master' of git://git.denx.de/u-boot-x86 (2012-12-03 06:47:05 -0700) are available in the git repository at: git://www.denx.de/git/u-boot-staging.git s...@denx.de for you to fetch changes up to fb3d2b8a3fc26ffb0127fd0fed90ff5f074e67d7: Makefile: Add target for combined spl/u-boot.bin u-boot.img (2012-12-05 17:31:30 +0100) Stefan Roese (7): powerpc: Extract EPAPR_MAGIC constants into processor.h SPL: Port SPL framework to powerpc env: Enable getenv_f() for SPL_BUILD mpc5200: Add SPL support mpc5200: Add a3m071 board support Makefile: Add possibility to set entry-point for u-boot.img Makefile: Add target for combined spl/u-boot.bin u-boot.img MAINTAINERS | 2 + Makefile | 14 +- arch/powerpc/cpu/mpc5xxx/Makefile | 4 + arch/powerpc/cpu/mpc5xxx/spl_boot.c | 79 +++ arch/powerpc/cpu/mpc5xxx/start.S| 22 ++ arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds | 57 + arch/powerpc/cpu/mpc85xx/release.S | 1 - arch/powerpc/include/asm/processor.h| 6 + arch/powerpc/include/asm/spl.h | 31 +++ arch/powerpc/lib/Makefile | 12 + arch/powerpc/lib/bootm.c| 6 - arch/powerpc/lib/spl.c | 42 board/a3m071/Makefile | 36 +++ board/a3m071/README | 80 +++ board/a3m071/a3m071.c | 335 board/a3m071/mt46v16m16-75.h | 32 +++ boards.cfg | 1 + common/Makefile | 3 + common/spl/spl.c | 16 ++ include/configs/a3m071.h| 380 20 files changed, 1151 insertions(+), 8 deletions(-) create mode 100644 arch/powerpc/cpu/mpc5xxx/spl_boot.c create mode 100644 arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds create mode 100644 arch/powerpc/include/asm/spl.h create mode 100644 arch/powerpc/lib/spl.c create mode 100644 board/a3m071/Makefile create mode 100644 board/a3m071/README create mode 100644 board/a3m071/a3m071.c create mode 100644 board/a3m071/mt46v16m16-75.h create mode 100644 include/configs/a3m071.h Applied to u-boot/master, thanks for your patience and re-working things on top of Scott's changes. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://www.enigmail.net/ iQIcBAEBAgAGBQJQv5yuAAoJENk4IS6UOR1WovUQAJF8c+sZo4ExF2esDZYv7jXQ EDE7i0S8RjP6nT4DG/F2xZySTc0kS/CbcG3KhbrIHXQNkczS48X+3z4Dixjn4u63 XXU8JIo6SAbRKOO1OVmRQCNWdAI0ltMDZYvCh8ebT1/TgsH48NWx/Mzmuk5qV7SJ UfJ1BiYfvsEArQzH0LPsj9HLchjMZqRHeEyygJKyh8OGnSZNZ9jwg1f3O3GjgPpI NNTQuNuvjJhVPJEeOYQn7ECjrjpfQCkZn5WEMgQ0cqQZoxQ4srXm1oITyjwPfPcc 9BaDWJ2GedLSVvrRjwP7zDyya78SjOVuUmC283H5nVFlXpMTiznEg9UHJFNTTVZL ZTE1hL01LdiEtPW723m/udwi+VIYt5304J51TqsW9cUD7I7mfHpy5cnQa6PNLpJn y/k8sDkcf7On/PHahBg42eJcMZAEdvu8UPiYzdkutTAJFjIA0l6VafyxE0z3lLKn 9uqV5TtAMsB2KYuH7/zBN4w7fF+Lt85s9l4BzS4D4BOcDvcCLoB2YselC7VXtPc/ Q5SSJxf9svX1c3Od13hp3CYfebUS/0QWRKEoyjDhQG8qhNk8FdOyEpYJ83tAXEvS /JFq2IBwMlvNeNLSPasq7eNaOMe24e8AarkgQDrS9ZXdbqaY0fQDjbz2U4qKoT3U 18ku+FG0uFtGBnO1Rx1u =ZbKx -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] NFS issue when loading two files
Hi all, I run into an NFS issue when trying to load two files from nfs for booting (uImage and device tree binary): When I try to unmount after loading the first file, I get some timeouts from the host which will lead to a re-send of the message. Eventually I get a response from the host, but with a smaller rpc_id, as rpc_id is incremented on every re-send as well. This leads in an abort of the boot procedure, although a valid answer was given from the host. Incrementing the NFS_TIMEOUT or adding the board IP to /etc/hosts resolves the issue, but is nothing more as a workaround. I digged into the NFS protocol implementation, but I'm not quite sure if: 1) we shouldn't increment the rpc_id when re-sending a command. 2) change NFS_TIMEOUT value dynamically 3) add a state wait when we get an answer with an rpc_id smaller the one we sent. Especially 1) I think isn't a good idea, as we break the RPC mechanism (I suppose), and we run in other issues. When we unmount after successfully load the first file, the mount of the second file will most probably get as answer a reply from a fromaly re-sent unmount command, and the boot process stops as well. [1] Any ideas, which would be the best solution for this problem? Best regards, Matthias Brugger [1] the process looks like: mount read file unmount (timed out) #1 unmount (timed out) #2 unmount get response of #1 mount get response of #2 error! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)
On Tue, Dec 4, 2012 at 3:43 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 12/04/2012 01:22 PM, Tom Warren wrote: Stephen, On Mon, Dec 3, 2012 at 5:53 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 12/03/2012 04:45 PM, Tom Warren wrote: This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. include/configs/tegra-common.h now holds common config options for Tegra SoCs. ... In this patch, you also should move MEM_LAYOUT_ENV_SETTINGS from tegra-common-post.h into tegraNN-common.h, or something like that. I can do that, or we can wait until those settings are going to be used, i.e. once I've added peripheral support so a kernel can be found and loaded and executed. Isn't it just cut/pasting those 5 lines (well, and the comment before them I guess) and s/0x0/0x8/ in all the lines. It seems pretty easy to get the right values in from the start. Without this, it's a PITA to test bootm with this U-Boot (you can download a kernel over serial with loady for example; something I tested with earlier revisions of this series). I'll move the MEM_LAYOUT_ENV_SETTINGS (and update the addresses) since I'm doing a V3. Also, WRT the 408MHz tweak, I got it working w/relatively little pain. That'll also be the de facto PLLP speed for T30 in V3 of the patchset. Thanks, Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 4/7] Tegra30: Add common CPU (shared) files
On 12/03/2012 04:45 PM, Tom Warren wrote:
These files are used by both SPL and main U-Boot.
Also made minor changes to shared Tegra code to support
T30 differences.
diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c
+ case CHIPID_TEGRA30:
+ switch (tegra_sku_id) {
+ case SKU_ID_T30:
+ /*
+ * T30 has two options. We will return TEGRA_SOC_T30
+ * until we have the fdt set up when it may change to
+ * TEGRA_SOC_T30_408MHZ depending on the PLLP freq.
+ */
+ if (clock_get_rate(CLOCK_ID_PERIPH) == 40800)
+ return TEGRA_SOC_T30_408MHZ;
+ else
+ return TEGRA_SOC_T30;
Just for completeness, I'm going to mention again that I think this
should just return TEGRA_SOC_T30 all the time. Sorry if that's
belaboring the point!
I just noticed your recent email saying you got 408MHz working, so I
guess my comment is moot anyway:-)
diff --git a/arch/arm/cpu/tegra-common/sys_info.c
b/arch/arm/cpu/tegra-common/sys_info.c
/* Print CPU information */
int print_cpuinfo(void)
{
+#if defined(CONFIG_TEGRA20)
puts(TEGRA20\n);
-
+#else/* Tegra30 */
+ puts(TEGRA30\n);
+#endif
This is fine, but the following wouldn't require editing again for
future chips:
puts(CONFIG_SYS_SOC);
puts(\n);
(although it ends up being all lower-case; perhaps there's some other
variable that is upper-case?)
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Re: [U-Boot] [PATCH V2 4/7] Tegra30: Add common CPU (shared) files
Stephen,
On Wed, Dec 5, 2012 at 1:37 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 12/03/2012 04:45 PM, Tom Warren wrote:
These files are used by both SPL and main U-Boot.
Also made minor changes to shared Tegra code to support
T30 differences.
diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c
+ case CHIPID_TEGRA30:
+ switch (tegra_sku_id) {
+ case SKU_ID_T30:
+ /*
+ * T30 has two options. We will return TEGRA_SOC_T30
+ * until we have the fdt set up when it may change to
+ * TEGRA_SOC_T30_408MHZ depending on the PLLP freq.
+ */
+ if (clock_get_rate(CLOCK_ID_PERIPH) == 40800)
+ return TEGRA_SOC_T30_408MHZ;
+ else
+ return TEGRA_SOC_T30;
Just for completeness, I'm going to mention again that I think this
should just return TEGRA_SOC_T30 all the time. Sorry if that's
belaboring the point!
I just noticed your recent email saying you got 408MHz working, so I
guess my comment is moot anyway:-)
Yep. TEGRA_SOC_T30_408MHZ is gone; TEGRA_SOC_T30 is returned for Tegra30.
diff --git a/arch/arm/cpu/tegra-common/sys_info.c
b/arch/arm/cpu/tegra-common/sys_info.c
/* Print CPU information */
int print_cpuinfo(void)
{
+#if defined(CONFIG_TEGRA20)
puts(TEGRA20\n);
-
+#else/* Tegra30 */
+ puts(TEGRA30\n);
+#endif
This is fine, but the following wouldn't require editing again for
future chips:
puts(CONFIG_SYS_SOC);
puts(\n);
(although it ends up being all lower-case; perhaps there's some other
variable that is upper-case?)
How about this:
#include common.h
#include linux/ctype.h
#ifdef CONFIG_DISPLAY_CPUINFO
void upstring(char *s)
{
while(*s) {
*s = toupper(*s);
s++;
}
}
/* Print CPU information */
int print_cpuinfo(void)
{
upstring(CONFIG_SYS_SOC);
puts(CONFIG_SYS_SOC);
puts(\n);
return 0;
)
#endif
What do you think?
Tom
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Re: [U-Boot] [PATCH V2 4/7] Tegra30: Add common CPU (shared) files
On 12/05/2012 02:32 PM, Tom Warren wrote:
On Wed, Dec 5, 2012 at 1:37 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 12/03/2012 04:45 PM, Tom Warren wrote:
These files are used by both SPL and main U-Boot.
Also made minor changes to shared Tegra code to support
T30 differences.
...
diff --git a/arch/arm/cpu/tegra-common/sys_info.c
b/arch/arm/cpu/tegra-common/sys_info.c
...
/* Print CPU information */
int print_cpuinfo(void)
{
+#if defined(CONFIG_TEGRA20)
puts(TEGRA20\n);
-
+#else/* Tegra30 */
+ puts(TEGRA30\n);
+#endif
This is fine, but the following wouldn't require editing again for
future chips:
puts(CONFIG_SYS_SOC);
puts(\n);
(although it ends up being all lower-case; perhaps there's some other
variable that is upper-case?)
How about this:
#include common.h
#include linux/ctype.h
#ifdef CONFIG_DISPLAY_CPUINFO
void upstring(char *s)
{
while(*s) {
*s = toupper(*s);
s++;
}
}
/* Print CPU information */
int print_cpuinfo(void)
{
upstring(CONFIG_SYS_SOC);
puts(CONFIG_SYS_SOC);
puts(\n);
return 0;
)
#endif
What do you think?
CONFIG_SYS_SOC is presumably stored in a read-only segment, so that
might not even work, although I dare say memory protection isn't enabled
to prevent this. That would also end up modifying the string itself,
which is probably used elsewhere, where such modification might not be
desirable.
If you called upstring() on a copy of the string e.g. on the stack, that
seems reasonable.
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Re: [U-Boot] [PATCH V2 4/7] Tegra30: Add common CPU (shared) files
On Wed, Dec 5, 2012 at 2:38 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 12/05/2012 02:32 PM, Tom Warren wrote:
On Wed, Dec 5, 2012 at 1:37 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 12/03/2012 04:45 PM, Tom Warren wrote:
These files are used by both SPL and main U-Boot.
Also made minor changes to shared Tegra code to support
T30 differences.
...
diff --git a/arch/arm/cpu/tegra-common/sys_info.c
b/arch/arm/cpu/tegra-common/sys_info.c
...
/* Print CPU information */
int print_cpuinfo(void)
{
+#if defined(CONFIG_TEGRA20)
puts(TEGRA20\n);
-
+#else/* Tegra30 */
+ puts(TEGRA30\n);
+#endif
This is fine, but the following wouldn't require editing again for
future chips:
puts(CONFIG_SYS_SOC);
puts(\n);
(although it ends up being all lower-case; perhaps there's some other
variable that is upper-case?)
How about this:
#include common.h
#include linux/ctype.h
#ifdef CONFIG_DISPLAY_CPUINFO
void upstring(char *s)
{
while(*s) {
*s = toupper(*s);
s++;
}
}
/* Print CPU information */
int print_cpuinfo(void)
{
upstring(CONFIG_SYS_SOC);
puts(CONFIG_SYS_SOC);
puts(\n);
return 0;
)
#endif
What do you think?
CONFIG_SYS_SOC is presumably stored in a read-only segment, so that
might not even work, although I dare say memory protection isn't enabled
to prevent this. That would also end up modifying the string itself,
which is probably used elsewhere, where such modification might not be
desirable.
It does work - I wouldn't present code w/o testing it :)
But the side-effect of modifying CONFIG_SYS_SOC is probably a bad thing.
If you called upstring() on a copy of the string e.g. on the stack, that
seems reasonable.
I'll copy the string first. I was trying to minimize the amount of
extra code added.
Thanks
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Re: [U-Boot] [PATCH 10/10] tools: Add support for Dove to kwboot
On Sun, 2012-12-02 at 20:15 +0100, Luka Perkov wrote:
Hi Sebastian,
On Sun, Dec 02, 2012 at 03:36:22PM +0100, Sebastian Hesselbarth wrote:
On Dove kwboot can also be used to boot an u-boot image into RAM.
In contrast to Kirkwood, Dove does not support the UART boot mode
sequence but requires the UART boot mode to be selected through
strap pins. The SolidRun CuBox has a push button to allow uart
boot mode but fails on the boot sequence sent by kwboot.
This patch adds another cmdline option to allow to send a boot
image without the boot sequence and adds support for Dove.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Rabeeh Khoury rab...@solid-run.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Prafulla Wadaskar prafu...@marvell.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Daniel Stodden daniel.stod...@gmail.com
Cc: Dieter Kiermaier dk-arm-li...@gmx.de
---
tools/Makefile |2 ++
tools/kwboot.c | 44
2 files changed, 42 insertions(+), 4 deletions(-)
Please update the documentation too (doc/kwboot.1).
Second that.
Hey Sebastian,
since the protocol remains the same, and just doesn't take a boot
message while polling, better to keep the bootmsg_call() intact and just
make the option parsing flip the message type?
The original BootROM had a couple more message, the tool just no
immediate use for that. Eventual options to change message type wasn't
unanticipated. Ok, no message at all was.
Sketchy patch attached for your consideration. Beware, I can't test it
right now.
Also, while I've got nothing against adding a flag for that, I'm partly
wondering whether this took a patch at all -- what's the target behavior
if you keep shooting it with the original boot message?
I would assume it would keep responding with NAKs. But doesn't?
Cheers,
Daniel
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..f598dc1 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -37,6 +37,10 @@ static unsigned char kwboot_msg_boot[] = {
0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
};
+static unsigned char kwboot_msg_none[] = {
+ 0x00
+};
+
#define KWBOOT_MSG_REQ_DELAY 10 /* ms */
#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */
@@ -268,17 +272,21 @@ kwboot_bootmsg(int tty, void *msg)
int rc;
char c;
- kwboot_printv(Sending boot message. Please reboot the target...);
+ kwboot_printv(msg != kwboot_msg_none
+ ? Sending boot message. Please reboot the target...
+ : Sensing target. Please reboot target into UART mode... );
do {
rc = tcflush(tty, TCIOFLUSH);
if (rc)
break;
- rc = kwboot_tty_send(tty, msg, 8);
- if (rc) {
- usleep(KWBOOT_MSG_REQ_DELAY * 1000);
- continue;
+ if (msg != kwboot_msg_none) {
+ rc = kwboot_tty_send(tty, msg, 8);
+ if (rc) {
+usleep(KWBOOT_MSG_REQ_DELAY * 1000);
+continue;
+ }
}
rc = kwboot_tty_recv(tty, c, 1, KWBOOT_MSG_RSP_TIMEO);
@@ -646,6 +654,10 @@ main(int argc, char **argv)
imgpath = optarg;
break;
+ case 'n':
+ bootmsg = kwboot_msg_none;
+ break;
+
case 'p':
patch = 1;
break;
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Re: [U-Boot] [RFC] NFS issue when loading two files
Dear Matthias Brugger, In message 50bf9cc3.9020...@gmail.com you wrote: I run into an NFS issue when trying to load two files from nfs for booting (uImage and device tree binary): When I try to unmount after loading the first file, I get some timeouts from the host which will lead to a re-send of the message. Eventually I get a response from the host, but with a smaller rpc_id, as rpc_id is incremented on every re-send as well. This leads in an abort of the boot procedure, although a valid answer was given from the host. How do you do the umount in U-Boot? [1] the process looks like: mount read file unmount (timed out) #1 unmount (timed out) #2 unmount get response of #1 mount get response of #2 error! What is the exact sequence of U-Boot coomands that would trigger such an error? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Always try to do things in chronological order; it's less confusing that way. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
It could happen (1 out of 100 times) that NAND did not start up correctly after
warm rebooting, so we end up with various failures or DMA timed out due to a
stalled BCH. When resetting BCH together with GPMI, the issue could not be
observed anymore (after 1+ reboots). We probably need the consistent state
already before sending commands to NAND. This behaviour was observed in barebox
and kernel, so I assume it affects U-Boot as well. I chose to keep the extra
reset for BCH when changing the flash layout to be on the safe side.
Signed-off-by: Wolfram Sang w.s...@pengutronix.de
---
Only compile tested. Test case was to repeatedly reboot into a simple userspace
on a UBI volume. Either the bootloader failed to find its data or the kernel
could not mount the UBI volume once in a while. (Yes, the kernel could not
mount the UBI although it was itself loaded correctly from NAND. So, it is some
set-up issue.) This was nasty to debug, so I thought I let you know...
drivers/mtd/nand/mxs_nand.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 4701be8..e38e151 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_nand_info *info)
{
struct mxs_gpmi_regs *gpmi_regs =
(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+ struct mxs_bch_regs *bch_regs =
+ (struct mxs_bch_regs *)MXS_BCH_BASE;
int i = 0, j;
info-desc = malloc(sizeof(struct mxs_dma_desc *) *
@@ -1081,6 +1083,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
/* Reset the GPMI block. */
mxs_reset_block(gpmi_regs-hw_gpmi_ctrl0_reg);
+ mxs_reset_block(bch_regs-hw_bch_ctrl_reg);
/*
* Choose NAND mode, set IRQ polarity, disable write protection and
--
1.7.10.4
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Re: [U-Boot] [PATCH] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
On Wed, Dec 5, 2012 at 6:48 PM, Wolfram Sang w.s...@pengutronix.de wrote:
It could happen (1 out of 100 times) that NAND did not start up correctly
after
warm rebooting, so we end up with various failures or DMA timed out due to
a
stalled BCH. When resetting BCH together with GPMI, the issue could not be
observed anymore (after 1+ reboots). We probably need the consistent
state
already before sending commands to NAND. This behaviour was observed in
barebox
and kernel, so I assume it affects U-Boot as well. I chose to keep the
extra
reset for BCH when changing the flash layout to be on the safe side.
Signed-off-by: Wolfram Sang w.s...@pengutronix.de
---
Only compile tested. Test case was to repeatedly reboot into a simple
userspace
on a UBI volume. Either the bootloader failed to find its data or the
kernel
could not mount the UBI volume once in a while. (Yes, the kernel could not
mount the UBI although it was itself loaded correctly from NAND. So, it is
some
set-up issue.) This was nasty to debug, so I thought I let you know...
drivers/mtd/nand/mxs_nand.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 4701be8..e38e151 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_nand_info *info)
{
struct mxs_gpmi_regs *gpmi_regs =
(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+ struct mxs_bch_regs *bch_regs =
+ (struct mxs_bch_regs *)MXS_BCH_BASE;
int i = 0, j;
info-desc = malloc(sizeof(struct mxs_dma_desc *) *
@@ -1081,6 +1083,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
/* Reset the GPMI block. */
mxs_reset_block(gpmi_regs-hw_gpmi_ctrl0_reg);
+ mxs_reset_block(bch_regs-hw_bch_ctrl_reg);
A comment here why this is need would be nice.
/*
* Choose NAND mode, set IRQ polarity, disable write protection and
--
1.7.10.4
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--
Otavio Salvador O.S. Systems
E-mail: ota...@ossystems.com.br http://www.ossystems.com.br
Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br
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Re: [U-Boot] [PATCH] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
Hi Wolfram,
On Wed, Dec 5, 2012 at 6:48 PM, Wolfram Sang w.s...@pengutronix.de wrote:
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 4701be8..e38e151 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_nand_info *info)
{
struct mxs_gpmi_regs *gpmi_regs =
(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+ struct mxs_bch_regs *bch_regs =
+ (struct mxs_bch_regs *)MXS_BCH_BASE;
int i = 0, j;
info-desc = malloc(sizeof(struct mxs_dma_desc *) *
@@ -1081,6 +1083,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
/* Reset the GPMI block. */
mxs_reset_block(gpmi_regs-hw_gpmi_ctrl0_reg);
+ mxs_reset_block(bch_regs-hw_bch_ctrl_reg);
In your kernel patch you only do the reset for mx23, but here you do
it for mx28.
Which one is correct?
Regards,
Fabio Estevam
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Re: [U-Boot] [PATCH 0/57] RFC: Move arch-specific global data into its own structure
Hi, On Tue, Dec 4, 2012 at 5:14 PM, Graeme Russ graeme.r...@gmail.com wrote: Hi Wolfgang, On Wed, Dec 5, 2012 at 6:25 AM, Wolfgang Denk w...@denx.de wrote: Dear Simon Glass, In message capnjgz2kvhv6jcvojiqbrxfcfhmewfefj9blhfw_qyf5_7d...@mail.gmail.com you wrote: To be honest, I think gd should only be a temporary structure used to carry specific data through the initialisation process up to the point BSS becomes available. With the 'early malloc' patches in the pipeline, it might even be possible to malloc the gd structure early and then when BSS is available, copy the data into the final global data structure in BSS. I think that would be complicated by functions that need to use gd both before and after BSS becomes available. I mostly agree, but that sounds like an exercise in removing fields from the gd one by one in the source code. The bit I am not sure of is whether it is useful for gd to hang around post relocation to provide access to the data that was decided on early in boot (after all, the position in memory of gd changes post relocation, so why maintain two structures for the same info?). Sure. If you look back how this developed, then initially there was only struct bd_info. Then it turned out that it costs too much of code size (and performance, actually) to pass around the same struct as parameter to about each and every functiuon, so I invented GD - wit the intention to drop it as soon as writable global data becomes available, i. e. after relocation. I even think the first versions worked that way. Only later that code code optimized because it seemed easier to keep this struct and be able to use the same code before and after relocation. And open Pandora's box was... Yes, the old 'cost versus complexity' problem. Seriously, take a look at arch/x86/lib/board.c, it's nice and clean and give a good view of how we can move forward. For starters, the functions listed in init_sequence_f and init_sequence_f_r never need to be copied into RAM (there are functions they call that may need to be though). Like the Linux kernel, these can be moved into a dedicated linker section and not copied (and their relocation entries can be skipped as well). For x86, there are not a lot of functions in these two lists. Maybe these can have 'gd' passed to them init_sequence_r is the big list so passing 'gd' to each of these will result in massive code bloat. But by this stage, we have BSS, so global data is writable and there is no need to pass gd. BSS is actually available during the processing of init_sequence_f_r, so in theory it would be possible to copy data from gd (used during init_sequence_f) into BSS during the processing of init_sequence_f_r All that would be left is dealing with the (handful?) of functions that are called from both init_sequence_f and init_sequence_r (I doubt any common functions will be called during init_sequence_f_r). One option may be to pass a point to gd to these functions. If it is NULL, use the variable in BSS, otherwise use gd. Sounds reasonable to me. I modified buildman to summarise image sizes for each architecture. Here are the code size results: x86: (3 boards) text -26.7 sandbox: (1 boards) text +64.0 bss +96.0 m68k: (50 boards) text +1.5 powerpc: (621 boards) text +2.4 data +0.0 sh: (20 boards) text +14.4 microblaze: (1 boards) text -24.0 bss -8.0 arm: (283 boards) spl/u-boot-spl:text -0.2 text -21.5 spl/u-boot-spl:data +4.8 bss +0.5 nds32: (3 boards) text -8.0 The numbers indicate the average number of bytes increase(+) or decrease(-) with this series applied, for each element of the image size. So for example, powerpc text increases by an average of 2.4 bytes, ARM text reduces by an average of 21.5 bytes. ARM spl data increases by an average of 4.8 bytes. To me this doesn't seem very significant and the differences are minor. Regards, Simon Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/20] Various patches in common/
This collection of patches to common/ adds the following: - EDID support for LCD displays - TPM stress test - gettime command to find out the time since boot - Adds coreboot information to the 'version' command - Fixes LMB on x86 - SHA256 hashing using a new hashing framework created in response to list feedback - Reading raw data from a partition of a block device Some patches have been dropped from v2 in response to list feedback. Also fixes a few minor bugs and tidy-ups. Changes in v3: - Rename stricmp() to strcasecmp() to match Linux / POSIX - Bracket strcasecmp() declarations with __HAVE_ARCH_... - Rename stricmp() to strcasecmp() to match Linux / POSIX - Correct hash error message to show the algorithm name, not always SHA1 - Fix ordering of hash.o in Makefile - Correct hash command help to say 'hash' instead of 'sha1sum' - Drop meminfo from this series - Drop patch 'Update time command to avoid using get_timer_masked()' Changes in v2: - Remove arm: tag from bootstage step patch - Convert space to tab in README - Update gettime commit message to include boards without CONFIG_SYS_HZ - Add more comments to the stdio strncpy commit message - Add new patch to adjust sha1 functions to use const/unsigned - Add new patch to adjust sha256 functions to const and watchdog - Add stricmp() patch again since it is used in this series - Add generic hash API to allow SHA256 command to be added without duplication - Add new patch to change sha1sum to use generic hash API - Add new hash command to support generic hash API - Add patch to enable hashing and EDID on smdk5250 - Add x86 patch to enable io command for coreboot - Add x86 tag to version command patch Anton Staaf (1): Add gettime command Kenneth Waters (1): Add a command to read raw blocks from a partition Luigi Semenzato (1): tpm: Add TPM stress test Simon Glass (11): Add new bootstage step for the main loop Fix use of conditional LMB sha1: Use const where possible, and unsigned for input len sha256: Use const where possible and add watchdog function Add strcasecmp() and strncasecmp() Add generic hash API sha1sum: Use generic hash layer Add hash command to perform hashing using various algorithms console: Enable function to display console info exynos: Enable hashing functions and EDID for smdk5250 x86: coreboot: Enable io command Stefan Reinauer (1): x86: Add coreboot version to u-boot's version command Tom Wai-Hong Tam (3): edid: Library of EDID decode and print edid: Add I2C command for printing the EDID fdt: edid: Enable fdt_add_edid() function when CONFIG_LCD defined Vadim Bendebury (1): Add console command to access io space registers Vincent Palatin (1): stdio: remove useless strncpy README| 25 +++ arch/m68k/include/asm/string.h|2 +- arch/powerpc/include/asm/string.h |2 +- arch/sparc/include/asm/string.h |2 +- common/Makefile |6 + common/cmd_bootm.c|2 +- common/cmd_gettime.c | 56 +++ common/cmd_hash.c | 63 common/cmd_i2c.c | 39 + common/cmd_io.c | 93 +++ common/cmd_read.c | 81 ++ common/cmd_sha1sum.c | 129 +--- common/cmd_tpm.c | 93 +++- common/cmd_version.c |7 +- common/console.c |6 +- common/edid.c | 307 + common/fdt_support.c |2 +- common/hash.c | 221 ++ common/main.c |2 + common/stdio.c|1 - include/command.h |8 +- include/config_cmd_all.h |4 + include/configs/coreboot.h|1 + include/configs/smdk5250.h|7 + include/edid.h| 275 + include/hash.h| 69 + include/linux/string.h|7 +- include/sha1.h| 26 +-- include/sha256.h |8 +- lib/sha1.c| 19 ++- lib/sha256.c | 37 +- lib/string.c | 16 ++- 32 files changed, 1438 insertions(+), 178 deletions(-) create mode 100644 common/cmd_gettime.c create mode 100644 common/cmd_hash.c create mode 100644 common/cmd_io.c create mode 100644 common/cmd_read.c create mode 100644 common/edid.c create mode 100644 common/hash.c create mode 100644 include/edid.h create mode 100644 include/hash.h -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 06/23] Update time command to avoid using get_timer_masked()
Hi,
On Thu, Nov 22, 2012 at 11:12 AM, Simon Glass s...@chromium.org wrote:
It is better to use get_timer() by itself now, according to the new
timer API.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
I am going to drop this patch as Richard Genoud has refactored the
code in a pending patch, so I don't think this is needed.
Regards,
Simon
common/cmd_time.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/common/cmd_time.c b/common/cmd_time.c
index 6dbdbbf..f1891f9 100644
--- a/common/cmd_time.c
+++ b/common/cmd_time.c
@@ -32,6 +32,7 @@ static int run_command_and_time_it(int flag, int argc, char
* const argv[],
{
cmd_tbl_t *cmdtp = find_cmd(argv[0]);
int retval = 0;
+ ulong start;
if (!cmdtp) {
printf(%s: command not found\n, argv[0]);
@@ -45,9 +46,9 @@ static int run_command_and_time_it(int flag, int argc, char
* const argv[],
* boards. We could use the new timer API that Graeme is proposing
* so that this piece of code would be arch-independent.
*/
- *cycles = get_timer_masked();
+ start = get_timer(0);
retval = cmdtp-cmd(cmdtp, flag, argc, argv);
- *cycles = get_timer_masked() - *cycles;
+ *cycles = get_timer(start);
return retval;
}
--
1.7.7.3
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[U-Boot] [PATCH v3 01/20] Add new bootstage step for the main loop
Mark when we get to the main loop. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v3: None Changes in v2: - Remove arm: tag from bootstage step patch common/main.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/common/main.c b/common/main.c index 5362781..b145f85 100644 --- a/common/main.c +++ b/common/main.c @@ -376,6 +376,8 @@ void main_loop (void) char bcs_set[16]; #endif /* CONFIG_BOOTCOUNT_LIMIT */ + bootstage_mark_name(BOOTSTAGE_ID_MAIN_LOOP, main_loop); + #ifdef CONFIG_BOOTCOUNT_LIMIT bootcount = bootcount_load(); bootcount++; -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 02/20] Add gettime command
From: Anton Staaf robot...@chromium.org
Gettime returns the current timer value. If CONFIG_SYS_HZ is defined
then the timer value is also converted to seconds.
Tegra20 (SeaBoard) # gettime
Timer val: 7754
Seconds : 7
Remainder : 754
sys_hz = 1000
There has been some discussion about whether this is useful enough to
be included in U-Boot. The following boards do not have CONFIG_SYS_HZ
defined:
M52277EVB
M52277EVB_stmicro
M53017EVB
M54418TWR
M54418TWR_nand_mii
M54418TWR_nand_rmii
M54418TWR_nand_rmii_lowfreq
M54418TWR_serial_mii
M54418TWR_serial_rmii
Signed-off-by: Anton Staaf robot...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Convert space to tab in README
- Update gettime commit message to include boards without CONFIG_SYS_HZ
README |1 +
common/Makefile |1 +
common/cmd_gettime.c | 56 ++
include/config_cmd_all.h |1 +
4 files changed, 59 insertions(+), 0 deletions(-)
create mode 100644 common/cmd_gettime.c
diff --git a/README b/README
index ed7d270..089d7a4 100644
--- a/README
+++ b/README
@@ -819,6 +819,7 @@ The following options need to be configured:
CONFIG_CMD_FDOS * Dos diskette Support
CONFIG_CMD_FLASH flinfo, erase, protect
CONFIG_CMD_FPGA FPGA device initialization support
+ CONFIG_CMD_GETTIME * Get time since boot
CONFIG_CMD_GO * the 'go' command (exec code)
CONFIG_CMD_GREPENV * search environment
CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
diff --git a/common/Makefile b/common/Makefile
index 9e43322..0fb79ed 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -100,6 +100,7 @@ ifdef CONFIG_FPGA
COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o
endif
COBJS-$(CONFIG_CMD_FS_GENERIC) += cmd_fs.o
+COBJS-$(CONFIG_CMD_GETTIME) += cmd_gettime.o
COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o
COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o
COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o
diff --git a/common/cmd_gettime.c b/common/cmd_gettime.c
new file mode 100644
index 000..d7d36a9
--- /dev/null
+++ b/common/cmd_gettime.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ *
+ * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
+ *
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Get Timer overflows after 2^32 / CONFIG_SYS_HZ (32Khz) = 131072 sec
+ */
+#include common.h
+#include command.h
+
+static int do_gettime(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ unsigned long int val = get_timer(0);
+
+#ifdef CONFIG_SYS_HZ
+ printf(Timer val: %lu\n, val);
+ printf(Seconds : %lu\n, val / CONFIG_SYS_HZ);
+ printf(Remainder : %lu\n, val % CONFIG_SYS_HZ);
+ printf(sys_hz = %lu\n, (unsigned long int)CONFIG_SYS_HZ);
+#else
+ printf(CONFIG_SYS_HZ not defined);
+ printf(Timer Val %lu, val);
+#endif
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ gettime,1, 1, do_gettime,
+ get timer val elapsed,\n,
+ get time elapsed from uboot start\n
+);
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index f434cd0..b87967e 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -40,6 +40,7 @@
#define CONFIG_CMD_FDOS/* Floppy DOS support */
#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
#define CONFIG_CMD_FPGA/* FPGA configuration Support */
+#define CONFIG_CMD_GETTIME /* Get time since boot */
#define CONFIG_CMD_HWFLOW /* RTS/CTS hw flow control */
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_IDE /* IDE harddisk support */
--
1.7.7.3
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[U-Boot] [PATCH v3 04/20] Fix use of conditional LMB
This code was not guarded with CONFIG_LMB so failed to build on x86.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
common/cmd_bootm.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 4dbe952..f7595c0 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -537,7 +537,7 @@ static int do_bootm_subcommand(cmd_tbl_t *cmdtp, int flag,
int argc,
}
break;
#endif
-#if defined(CONFIG_OF_LIBFDT)
+#if defined(CONFIG_OF_LIBFDT) defined(CONFIG_LMB)
case BOOTM_STATE_FDT:
{
boot_fdt_add_mem_rsv_regions(images.lmb,
--
1.7.7.3
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[U-Boot] [PATCH v3 07/20] sha256: Use const where possible and add watchdog function
In preparation for making the hash function common, we may as well use
const where we can.
Also add a watchdog version of the hashing function.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Add new patch to adjust sha256 functions to const and watchdog
include/sha256.h |8 +++-
lib/sha256.c | 37 +++--
2 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/include/sha256.h b/include/sha256.h
index e38ea89..beadab3 100644
--- a/include/sha256.h
+++ b/include/sha256.h
@@ -3,6 +3,9 @@
#define SHA256_SUM_LEN 32
+/* Reset watchdog each time we process this many bytes */
+#define CHUNKSZ_SHA256 (64 * 1024)
+
typedef struct {
uint32_t total[2];
uint32_t state[8];
@@ -10,7 +13,10 @@ typedef struct {
} sha256_context;
void sha256_starts(sha256_context * ctx);
-void sha256_update(sha256_context * ctx, uint8_t * input, uint32_t length);
+void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length);
void sha256_finish(sha256_context * ctx, uint8_t digest[SHA256_SUM_LEN]);
+void sha256_csum_wd(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz);
+
#endif /* _SHA256_H */
diff --git a/lib/sha256.c b/lib/sha256.c
index deb63a4..ab2db48 100644
--- a/lib/sha256.c
+++ b/lib/sha256.c
@@ -60,7 +60,7 @@ void sha256_starts(sha256_context * ctx)
ctx-state[7] = 0x5BE0CD19;
}
-void sha256_process(sha256_context * ctx, uint8_t data[64])
+static void sha256_process(sha256_context *ctx, const uint8_t data[64])
{
uint32_t temp1, temp2;
uint32_t W[64];
@@ -191,7 +191,7 @@ void sha256_process(sha256_context * ctx, uint8_t data[64])
ctx-state[7] += H;
}
-void sha256_update(sha256_context * ctx, uint8_t * input, uint32_t length)
+void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length)
{
uint32_t left, fill;
@@ -260,3 +260,36 @@ void sha256_finish(sha256_context * ctx, uint8_t
digest[32])
PUT_UINT32_BE(ctx-state[6], digest, 24);
PUT_UINT32_BE(ctx-state[7], digest, 28);
}
+
+/*
+ * Output = SHA-256( input buffer ). Trigger the watchdog every 'chunk_sz'
+ * bytes of input processed.
+ */
+void sha256_csum_wd(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz)
+{
+ sha256_context ctx;
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+ unsigned char *end, *curr;
+ int chunk;
+#endif
+
+ sha256_starts(ctx);
+
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+ curr = input;
+ end = input + ilen;
+ while (curr end) {
+ chunk = end - curr;
+ if (chunk chunk_sz)
+ chunk = chunk_sz;
+ sha256_update(ctx, curr, chunk);
+ curr += chunk;
+ WATCHDOG_RESET();
+ }
+#else
+ sha256_update(ctx, input, ilen);
+#endif
+
+ sha256_finish(ctx, output);
+}
--
1.7.7.3
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[U-Boot] [PATCH v3 08/20] Add strcasecmp() and strncasecmp()
strncasecmp() is present as strnicmp() but disabled. Make it available
and define strcasecmp() also. There is a only a small performance penalty
to having strcasecmp() call strncasecmp(), so do this instead of a
standalone function, to save code space.
Update the prototype in arch-specific headers as needed to avoid warnings.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Rename stricmp() to strcasecmp() to match Linux / POSIX
- Bracket strcasecmp() declarations with __HAVE_ARCH_...
Changes in v2:
- Add stricmp() patch again since it is used in this series
arch/m68k/include/asm/string.h|2 +-
arch/powerpc/include/asm/string.h |2 +-
arch/sparc/include/asm/string.h |2 +-
include/linux/string.h|7 +--
lib/string.c | 16
5 files changed, 20 insertions(+), 9 deletions(-)
diff --git a/arch/m68k/include/asm/string.h b/arch/m68k/include/asm/string.h
index e0773a8..ecf5e56 100644
--- a/arch/m68k/include/asm/string.h
+++ b/arch/m68k/include/asm/string.h
@@ -16,7 +16,7 @@
#endif
extern int strcasecmp(const char *, const char *);
-extern int strncasecmp(const char *, const char *, int);
+extern int strncasecmp(const char *, const char *, __kernel_size_t);
extern char * strcpy(char *,const char *);
extern char * strncpy(char *,const char *, __kernel_size_t);
extern __kernel_size_t strlen(const char *);
diff --git a/arch/powerpc/include/asm/string.h
b/arch/powerpc/include/asm/string.h
index d912a6b..036805e 100644
--- a/arch/powerpc/include/asm/string.h
+++ b/arch/powerpc/include/asm/string.h
@@ -14,7 +14,7 @@
#define __HAVE_ARCH_MEMCHR
extern int strcasecmp(const char *, const char *);
-extern int strncasecmp(const char *, const char *, int);
+extern int strncasecmp(const char *, const char *, __kernel_size_t);
extern char * strcpy(char *,const char *);
extern char * strncpy(char *,const char *, __kernel_size_t);
extern __kernel_size_t strlen(const char *);
diff --git a/arch/sparc/include/asm/string.h b/arch/sparc/include/asm/string.h
index c6bbc20..af6faea 100644
--- a/arch/sparc/include/asm/string.h
+++ b/arch/sparc/include/asm/string.h
@@ -40,7 +40,7 @@
*/
extern int strcasecmp(const char *, const char *);
-extern int strncasecmp(const char *, const char *, int);
+extern int strncasecmp(const char *, const char *, __kernel_size_t);
extern char *strcpy(char *, const char *);
extern char *strncpy(char *, const char *, __kernel_size_t);
extern __kernel_size_t strlen(const char *);
diff --git a/include/linux/string.h b/include/linux/string.h
index 9a8cbc2..de83355 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -38,8 +38,11 @@ extern int strcmp(const char *,const char *);
#ifndef __HAVE_ARCH_STRNCMP
extern int strncmp(const char *,const char *,__kernel_size_t);
#endif
-#if 0 /* not used - was: #ifndef __HAVE_ARCH_STRNICMP */
-extern int strnicmp(const char *, const char *, __kernel_size_t);
+#ifndef __HAVE_ARCH_STRCASECMP
+int strcasecmp(const char *s1, const char *s2);
+#endif
+#ifndef __HAVE_ARCH_STRNCASECMP
+extern int strncasecmp(const char *s1, const char *s2, __kernel_size_t len);
#endif
#ifndef __HAVE_ARCH_STRCHR
extern char * strchr(const char *,int);
diff --git a/lib/string.c b/lib/string.c
index c3ad055..68f60be 100644
--- a/lib/string.c
+++ b/lib/string.c
@@ -21,14 +21,13 @@
#include malloc.h
-#if 0 /* not used - was: #ifndef __HAVE_ARCH_STRNICMP */
/**
- * strnicmp - Case insensitive, length-limited string comparison
+ * strncasecmp - Case insensitive, length-limited string comparison
* @s1: One string
* @s2: The other string
* @len: the maximum number of characters to compare
*/
-int strnicmp(const char *s1, const char *s2, size_t len)
+int strncasecmp(const char *s1, const char *s2, size_t len)
{
/* Yes, Virginia, it had better be unsigned */
unsigned char c1, c2;
@@ -52,7 +51,16 @@ int strnicmp(const char *s1, const char *s2, size_t len)
}
return (int)c1 - (int)c2;
}
-#endif
+
+/**
+ * strcasecmp - Case insensitive string comparison
+ * @s1: One string
+ * @s2: The other string
+ */
+int strcasecmp(const char *s1, const char *s2)
+{
+ return strncasecmp(s1, s2, -1U);
+}
char * ___strtok;
--
1.7.7.3
___
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[U-Boot] [PATCH v3 17/20] tpm: Add TPM stress test
From: Luigi Semenzato semenz...@chromium.org
Add a simple command to stress-test a TPM (Trusted Platform Module).
Signed-off-by: Luigi Semenzato semenz...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Drop meminfo from this series
- Drop patch 'Update time command to avoid using get_timer_masked()'
Changes in v2: None
common/cmd_tpm.c | 93 ++---
1 files changed, 87 insertions(+), 6 deletions(-)
diff --git a/common/cmd_tpm.c b/common/cmd_tpm.c
index 6f5cd48..0970a6f 100644
--- a/common/cmd_tpm.c
+++ b/common/cmd_tpm.c
@@ -63,19 +63,68 @@ static int tpm_process(int argc, char * const argv[],
cmd_tbl_t *cmdtp)
return rv;
}
-static int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+#define CHECK(exp) do {
\
+ int _rv = exp; \
+ if (_rv) { \
+ printf(CHECK: %s %d %x\n, #exp, __LINE__, _rv);\
+ } \
+ } while (0)
+
+static int tpm_process_stress(int repeat_count)
{
+ int i;
int rv = 0;
+ u8 request[] = {0x0, 0xc1,
+ 0x0, 0x0, 0x0, 0x16,
+ 0x0, 0x0, 0x0, 0x65,
+ 0x0, 0x0, 0x0, 0x4,
+ 0x0, 0x0, 0x0, 0x4,
+ 0x0, 0x0, 0x1, 0x9};
+ u8 response[MAX_TRANSACTION_SIZE];
+ u32 rlength = MAX_TRANSACTION_SIZE;
+
+ CHECK(tis_init());
+
+ for (i = 0; i repeat_count; i++) {
+ CHECK(tis_open());
+ rv = tis_sendrecv(request, sizeof(request), response, rlength);
+ if (rv) {
+ printf(tpm test failed at step %d with 0x%x\n, i, rv);
+ CHECK(tis_close());
+ break;
+ }
+ CHECK(tis_close());
+ if ((response[6] || response[7] || response[8] || response[9])
+response[9] != 0x26) {
+ /* Ignore postinit errors */
+ printf(tpm command failed at step %d\n
+ tpm error code: %02x%02x%02x%02x\n, i,
+ response[6], response[7],
+ response[8], response[9]);
+ rv = -1;
+ break;
+ }
+ }
+ return rv;
+}
- /*
-* Verify that in case it is present, the first argument, it is
-* exactly one character in size.
-*/
- if (argc 7) {
+
+static int do_tpm_many(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[], int repeat_count)
+
+{
+ int rv = 0;
+
+ if (argc 7 repeat_count == 0) {
puts(command should be at least six bytes in size\n);
return -1;
}
+ if (repeat_count 0) {
+ rv = tpm_process_stress(repeat_count);
+ return rv;
+ }
+
if (tis_init()) {
puts(tis_init() failed!\n);
return -1;
@@ -96,8 +145,40 @@ static int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
return rv;
}
+
+static int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ return do_tpm_many(cmdtp, flag, argc, argv, 0);
+}
+
+
U_BOOT_CMD(tpm, MAX_TRANSACTION_SIZE, 1, do_tpm,
byte [byte ...] - write data and read response,
send arbitrary data (at least 6 bytes) to the TPM
device and read the response
);
+
+static int do_tpm_stress(cmd_tbl_t *cmdtp, int flag,
+int argc, char * const argv[])
+{
+ long unsigned int n;
+ int rv;
+
+ if (argc != 2) {
+ puts(usage: tpm_stress count\n);
+ return -1;
+ }
+
+ rv = strict_strtoul(argv[1], 10, n);
+ if (rv) {
+ puts(tpm_stress: bad count);
+ return -1;
+ }
+
+ return do_tpm_many(cmdtp, flag, argc, argv, n);
+}
+
+U_BOOT_CMD(tpm_stress, 2, 1, do_tpm_stress,
+ n - stress-test communication with TPM,
+ Repeat a TPM transaction (request-response) N times
+);
--
1.7.7.3
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[U-Boot] [PATCH v3 06/20] sha1: Use const where possible, and unsigned for input len
In preparation for making the hash function common, we may as well use
const where we can. Also the input length cannot be negative, but may
be very large, so use unsigned.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Add new patch to adjust sha1 functions to use const/unsigned
include/sha1.h | 26 +-
lib/sha1.c | 19 +++
2 files changed, 20 insertions(+), 25 deletions(-)
diff --git a/include/sha1.h b/include/sha1.h
index 734d1fb..da09dab 100644
--- a/include/sha1.h
+++ b/include/sha1.h
@@ -59,7 +59,8 @@ void sha1_starts( sha1_context *ctx );
* \param inputbuffer holding the data
* \param ilenlength of the input data
*/
-void sha1_update( sha1_context *ctx, unsigned char *input, int ilen );
+void sha1_update(sha1_context *ctx, const unsigned char *input,
+unsigned int ilen);
/**
* \brief SHA-1 final digest
@@ -76,8 +77,8 @@ void sha1_finish( sha1_context *ctx, unsigned char output[20]
);
* \param ilenlength of the input data
* \param output SHA-1 checksum result
*/
-void sha1_csum( unsigned char *input, int ilen,
- unsigned char output[20] );
+void sha1_csum(const unsigned char *input, unsigned int ilen,
+ unsigned char *output);
/**
* \brief Output = SHA-1( input buffer ), with watchdog triggering
@@ -87,17 +88,8 @@ void sha1_csum( unsigned char *input, int ilen,
* \param output SHA-1 checksum result
* \param chunk_sz watchdog triggering period (in bytes of input processed)
*/
-void sha1_csum_wd (unsigned char *input, int ilen,
- unsigned char output[20], unsigned int chunk_sz);
-
-/**
- * \brief Output = SHA-1( file contents )
- *
- * \param pathinput file name
- * \param output SHA-1 checksum result
- * \return0 if successful, or 1 if fopen failed
- */
-int sha1_file( char *path, unsigned char output[20] );
+void sha1_csum_wd(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz);
/**
* \brief Output = HMAC-SHA-1( input buffer, hmac key )
@@ -108,9 +100,9 @@ int sha1_file( char *path, unsigned char output[20] );
* \param ilenlength of the input data
* \param output HMAC-SHA-1 result
*/
-void sha1_hmac( unsigned char *key, int keylen,
- unsigned char *input, int ilen,
- unsigned char output[20] );
+void sha1_hmac(const unsigned char *key, int keylen,
+ const unsigned char *input, unsigned int ilen,
+ unsigned char *output);
/**
* \brief Checkup routine
diff --git a/lib/sha1.c b/lib/sha1.c
index da5bc16..a121224 100644
--- a/lib/sha1.c
+++ b/lib/sha1.c
@@ -73,7 +73,7 @@ void sha1_starts (sha1_context * ctx)
ctx-state[4] = 0xC3D2E1F0;
}
-static void sha1_process (sha1_context * ctx, unsigned char data[64])
+static void sha1_process(sha1_context *ctx, const unsigned char data[64])
{
unsigned long temp, W[16], A, B, C, D, E;
@@ -230,7 +230,8 @@ static void sha1_process (sha1_context * ctx, unsigned char
data[64])
/*
* SHA-1 process buffer
*/
-void sha1_update (sha1_context * ctx, unsigned char *input, int ilen)
+void sha1_update(sha1_context *ctx, const unsigned char *input,
+unsigned int ilen)
{
int fill;
unsigned long left;
@@ -305,7 +306,8 @@ void sha1_finish (sha1_context * ctx, unsigned char
output[20])
/*
* Output = SHA-1( input buffer )
*/
-void sha1_csum (unsigned char *input, int ilen, unsigned char output[20])
+void sha1_csum(const unsigned char *input, unsigned int ilen,
+ unsigned char *output)
{
sha1_context ctx;
@@ -318,12 +320,12 @@ void sha1_csum (unsigned char *input, int ilen, unsigned
char output[20])
* Output = SHA-1( input buffer ). Trigger the watchdog every 'chunk_sz'
* bytes of input processed.
*/
-void sha1_csum_wd (unsigned char *input, int ilen, unsigned char output[20],
- unsigned int chunk_sz)
+void sha1_csum_wd(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz)
{
sha1_context ctx;
#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
- unsigned char *end, *curr;
+ const unsigned char *end, *curr;
int chunk;
#endif
@@ -350,8 +352,9 @@ void sha1_csum_wd (unsigned char *input, int ilen, unsigned
char output[20],
/*
* Output = HMAC-SHA-1( input buffer, hmac key )
*/
-void sha1_hmac (unsigned char *key, int keylen,
- unsigned char *input, int ilen, unsigned char output[20])
+void sha1_hmac(const unsigned char *key, int keylen,
+ const unsigned char *input, unsigned int ilen,
+ unsigned char *output)
{
int i;
sha1_context ctx;
--
1.7.7.3
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[U-Boot] [PATCH v3 09/20] Add generic hash API
We have a SHA1 command and want to add a SHA256 command also. Instead of
duplicating the code, create a generic hash API which can process
commands for different algorithms.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Rename stricmp() to strcasecmp() to match Linux / POSIX
- Correct hash error message to show the algorithm name, not always SHA1
- Fix ordering of hash.o in Makefile
Changes in v2:
- Add generic hash API to allow SHA256 command to be added without duplication
common/Makefile |1 +
common/hash.c | 221 +++
include/hash.h | 69 +
3 files changed, 291 insertions(+), 0 deletions(-)
create mode 100644 common/hash.c
create mode 100644 include/hash.h
diff --git a/common/Makefile b/common/Makefile
index 84968f8..c451c3d 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -30,6 +30,7 @@ ifndef CONFIG_SPL_BUILD
COBJS-y += main.o
COBJS-y += command.o
COBJS-y += exports.o
+COBJS-y += hash.o
COBJS-$(CONFIG_SYS_HUSH_PARSER) += hush.o
COBJS-y += s_record.o
COBJS-y += xyzModem.o
diff --git a/common/hash.c b/common/hash.c
new file mode 100644
index 000..e3a6e43
--- /dev/null
+++ b/common/hash.c
@@ -0,0 +1,221 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * (C) Copyright 2011
+ * Joe Hershberger, National Instruments, joe.hershber...@ni.com
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include command.h
+#include hash.h
+#include sha1.h
+#include sha256.h
+
+/*
+ * These are the hash algorithms we support. Chips which support accelerated
+ * crypto could perhaps add named version of these algorithms here.
+ */
+static struct hash_algo hash_algo[] = {
+#ifdef CONFIG_SHA1
+ {
+ SHA1,
+ SHA1_SUM_LEN,
+ sha1_csum_wd,
+ CHUNKSZ_SHA1,
+ },
+#endif
+#ifdef CONFIG_SHA256
+ {
+ SHA256,
+ SHA256_SUM_LEN,
+ sha256_csum_wd,
+ CHUNKSZ_SHA256,
+ },
+#endif
+};
+
+/**
+ * store_result: Store the resulting sum to an address or variable
+ *
+ * @algo: Hash algorithm being used
+ * @sum: Hash digest (algo-digest_size bytes)
+ * @dest: Destination, interpreted as a hex address if it starts
+ * with * or otherwise as an environment variable.
+ */
+static void store_result(struct hash_algo *algo, const u8 *sum,
+const char *dest)
+{
+ unsigned int i;
+
+ if (*dest == '*') {
+ u8 *ptr;
+
+ ptr = (u8 *)simple_strtoul(dest + 1, NULL, 16);
+ memcpy(ptr, sum, algo-digest_size);
+ } else {
+ char str_output[HASH_MAX_DIGEST_SIZE * 2 + 1];
+ char *str_ptr = str_output;
+
+ for (i = 0; i algo-digest_size; i++) {
+ sprintf(str_ptr, %02x, sum[i]);
+ str_ptr += 2;
+ }
+ str_ptr = '\0';
+ setenv(dest, str_output);
+ }
+}
+
+/**
+ * parse_verify_sum: Parse a hash verification parameter
+ *
+ * @algo: Hash algorithm being used
+ * @verify_str:Argument to parse. If it starts with * then it
is
+ * interpreted as a hex address containing the hash.
+ * If the length is exactly the right number of hex digits
+ * for the digest size, then we assume it is a hex digest.
+ * Otherwise we assume it is an environment variable, and
+ * look up its value (it must contain a hex digest).
+ * @vsum: Returns binary digest value (algo-digest_size bytes)
+ * @return 0 if ok, non-zero on error
+ */
+static int parse_verify_sum(struct hash_algo *algo, char *verify_str, u8 *vsum)
+{
+ if (*verify_str == '*') {
+ u8 *ptr;
+
+ ptr = (u8 *)simple_strtoul(verify_str + 1, NULL, 16);
+ memcpy(vsum, ptr, algo-digest_size);
+ } else {
+ unsigned int i;
+ char *vsum_str;
+ int digits = algo-digest_size * 2;
+
+
[U-Boot] [PATCH v3 18/20] exynos: Enable hashing functions and EDID for smdk5250
Enable SHA1/SHA256 hashing and the hash command. Also enable EDID support for reading from an LCD. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v3: None Changes in v2: - Add patch to enable hashing and EDID on smdk5250 include/configs/smdk5250.h |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index c0f8622..39a347a 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -203,6 +203,7 @@ #define CONFIG_I2C_MULTI_BUS #define CONFIG_MAX_I2C_NUM 8 #define CONFIG_SYS_I2C_SLAVE0x0 +#define CONFIG_I2C_EDID /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET @@ -215,4 +216,10 @@ /* Enable devicetree support */ #define CONFIG_OF_LIBFDT +/* SHA hashing */ +#define CONFIG_CMD_HASH +#define CONFIG_HASH_VERIFY +#define CONFIG_SHA1 +#define CONFIG_SHA256 + #endif /* __CONFIG_H */ -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 05/20] stdio: remove useless strncpy
From: Vincent Palatin vpala...@chromium.org The name is already copied when we memcpy() the whole structure. This is because struct stdio_dev has this field: charname[16]; /* Device name */ So the data is inline, rather than being a pointer. Signed-off-by: Vincent Palatin vpala...@chromium.org Signed-off-by: Simon Glass s...@chromium.org --- Changes in v3: None Changes in v2: - Add more comments to the stdio strncpy commit message common/stdio.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/common/stdio.c b/common/stdio.c index 9f48e5f..97ff9cf 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -135,7 +135,6 @@ struct stdio_dev* stdio_clone(struct stdio_dev *dev) return NULL; memcpy(_dev, dev, sizeof(struct stdio_dev)); - strncpy(_dev-name, dev-name, 16); return _dev; } -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 11/20] Add hash command to perform hashing using various algorithms
This new command supports hashing SHA1 and SHA256. It could be extended
to others such as MD5 and the CRC algorithms. The syntax is modeled on
those:
hash algorithm address length [*dest_addr | dest_envvar]
to calculate a hash, and:
hash -v algorithm address length [*verify_addr | verify_envvar]
to verify a hash.
Use CONFIG_CMD_HASH to enable the command, CONFIG_SHA1 to enable SHA1 and
CONFIG_SHA256 to enable SHA256.
The existing sha1sum command remains.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Correct hash command help to say 'hash' instead of 'sha1sum'
Changes in v2:
- Add new hash command to support generic hash API
README | 18 +
common/Makefile |1 +
common/cmd_hash.c| 63 ++
include/config_cmd_all.h |1 +
4 files changed, 83 insertions(+), 0 deletions(-)
create mode 100644 common/cmd_hash.c
diff --git a/README b/README
index 027fa46..40158bb 100644
--- a/README
+++ b/README
@@ -822,6 +822,7 @@ The following options need to be configured:
CONFIG_CMD_GETTIME * Get time since boot
CONFIG_CMD_GO * the 'go' command (exec code)
CONFIG_CMD_GREPENV * search environment
+ CONFIG_CMD_HASH * calculate hash / digest
CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
CONFIG_CMD_I2C * I2C serial bus support
CONFIG_CMD_IDE * IDE harddisk support
@@ -2391,6 +2392,23 @@ CBFS (Coreboot Filesystem) support
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
+- Hashing support:
+ CONFIG_CMD_HASH
+
+ This enables a generic 'hash' command which can produce
+ hashes / digests from a few algorithms (e.g. SHA1, SHA256).
+
+ CONFIG_HASH_VERIFY
+
+ Enable the hash verify command (hash -v). This adds to code
+ size a little.
+
+ CONFIG_SHA1 - support SHA1 hashing
+ CONFIG_SHA256 - support SHA256 hashing
+
+ Note: There is also a sha1sum command, which should perhaps
+ be deprecated in favour of 'hash sha1'.
+
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
diff --git a/common/Makefile b/common/Makefile
index c451c3d..2c28e93 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -104,6 +104,7 @@ COBJS-$(CONFIG_CMD_FS_GENERIC) += cmd_fs.o
COBJS-$(CONFIG_CMD_GETTIME) += cmd_gettime.o
COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o
COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o
+COBJS-$(CONFIG_CMD_HASH) += cmd_hash.o
COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o
COBJS-$(CONFIG_CMD_IMMAP) += cmd_immap.o
COBJS-$(CONFIG_CMD_INI) += cmd_ini.o
diff --git a/common/cmd_hash.c b/common/cmd_hash.c
new file mode 100644
index 000..689c608
--- /dev/null
+++ b/common/cmd_hash.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * (C) Copyright 2011
+ * Joe Hershberger, National Instruments, joe.hershber...@ni.com
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include command.h
+#include hash.h
+
+static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+#ifdef CONFIG_HASH_VERIFY
+ int verify = 0;
+
+ if (!strcmp(argv[1], -v)) {
+ verify = 1;
+ argc--;
+ argv++;
+ }
+#endif
+ /* Move forward to 'algorithm' parameter */
+ argc--;
+ argv++;
+ return hash_command(*argv, verify, cmdtp, flag, argc - 1, argv + 1);
+}
+
+#ifdef CONFIG_HASH_VERIFY
+U_BOOT_CMD(
+ hash, 6, 1, do_hash,
+ compute hash message digest,
+ algorithm address count [[*]sum_dest]\n
+ - compute message digest [save to env var / *address]\n
+ hash -v algorithm address count [*]sum\n
+ - verify hash of memory area with env var / *address
+);
+#else
+U_BOOT_CMD(
+ hash, 5, 1, do_hash,
+ compute message digest,
+ algorithm address count [[*]sum_dest]\n
+
[U-Boot] [PATCH v3 13/20] edid: Add I2C command for printing the EDID
From: Tom Wai-Hong Tam waih...@chromium.org
Add a single command to read the EDID information over I2C.
For example:
SMDK5250 # i2c dev 7
Setting bus to 7
SMDK5250 # i2c edid 50
EDID version: 1.4
Product ID code: 305c
Manufacturer: AUO
Serial number:
Manufactured in week: 0 year: 2011
Video input definition: digital signal, voltage level 0, blank to black
Monitor is non-RGB
Maximum visible display size: 26 cm x 14 cm
Power management features: no active off, no suspend, no standby
Estabilished timings:
Standard timings:
1366x76860 Hz (detailed)
1366x76860 Hz (detailed)
Monitor ID: 2VD2K.B116XW
Signed-off-by: Tom Wai-Hong Tam waih...@chromium.org
Signed-off-by: Sean Paul seanp...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
README |5 +
common/cmd_i2c.c | 39 +++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/README b/README
index 40158bb..c36b808 100644
--- a/README
+++ b/README
@@ -1476,6 +1476,11 @@ CBFS (Coreboot Filesystem) support
Support drawing of RLE8-compressed bitmaps on the LCD.
+ CONFIG_I2C_EDID
+
+ Enables an 'i2c edid' command which can read EDID
+ information over I2C from an attached LCD display.
+
- Splash Screen Support: CONFIG_SPLASH_SCREEN
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 4438db5..11cbded 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -78,6 +78,7 @@
#include common.h
#include command.h
+#include edid.h
#include environment.h
#include i2c.h
#include malloc.h
@@ -1246,6 +1247,38 @@ static int do_sdram (cmd_tbl_t * cmdtp, int flag, int
argc, char * const argv[])
}
#endif
+/*
+ * Syntax:
+ * i2c edid {i2c_chip}
+ */
+#if defined(CONFIG_I2C_EDID)
+int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ u_char chip;
+ struct edid1_info edid;
+
+ if (argc 2) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ chip = simple_strtoul(argv[1], NULL, 16);
+ if (i2c_read(chip, 0, 1, (uchar *)edid, sizeof(edid)) != 0) {
+ puts(Error reading EDID content.\n);
+ return 1;
+ }
+
+ if (edid_check_info(edid)) {
+ puts(Content isn't valid EDID.\n);
+ return 1;
+ }
+
+ edid_print_info(edid);
+ return 0;
+
+}
+#endif /* CONFIG_I2C_EDID */
+
#if defined(CONFIG_I2C_MUX)
static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const
argv[])
{
@@ -1335,6 +1368,9 @@ static cmd_tbl_t cmd_i2c_sub[] = {
#if defined(CONFIG_I2C_MULTI_BUS)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, , ),
#endif /* CONFIG_I2C_MULTI_BUS */
+#if defined(CONFIG_I2C_EDID)
+ U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, , ),
+#endif /* CONFIG_I2C_EDID */
U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, , ),
U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, , ),
U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, , ),
@@ -1385,6 +1421,9 @@ static char i2c_help_text[] =
#if defined(CONFIG_I2C_MULTI_BUS)
i2c dev [dev] - show or set current I2C bus\n
#endif /* CONFIG_I2C_MULTI_BUS */
+#if defined(CONFIG_I2C_EDID)
+ i2c edid chip - print EDID configuration information\n
+#endif /* CONFIG_I2C_EDID */
i2c loop chip address[.0, .1, .2] [# of objects] - looping read of
device\n
i2c md chip address[.0, .1, .2] [# of objects] - read from I2C
device\n
i2c mm chip address[.0, .1, .2] - write to I2C device
(auto-incrementing)\n
--
1.7.7.3
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[U-Boot] [PATCH v3 14/20] fdt: edid: Enable fdt_add_edid() function when CONFIG_LCD defined
From: Tom Wai-Hong Tam waih...@chromium.org
This function can be used for LCDs as well as monitors.
Signed-off-by: Tom Wai-Hong Tam waih...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
common/fdt_support.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 963ea90..6b9fa05 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1315,7 +1315,7 @@ int fdt_set_status_by_alias(void *fdt, const char* alias,
return fdt_set_node_status(fdt, offset, status, error_code);
}
-#if defined(CONFIG_VIDEO)
+#if defined(CONFIG_VIDEO) || defined(CONFIG_LCD)
int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf)
{
int noff;
--
1.7.7.3
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[U-Boot] [PATCH v3 16/20] console: Enable function to display console info
The CONFIG_SYS_CONSOLE_INFO_QUIET option should suppress the console
information, but allow boards to display it later if required. Adjust
the code to support this.
This is used to avoid printing the information while the LCD display
is not ready, since it only becomes ready when stdio init is complete.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
common/console.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/common/console.c b/common/console.c
index 1177f7d..25b141a 100644
--- a/common/console.c
+++ b/common/console.c
@@ -591,7 +591,6 @@ int console_init_f(void)
void stdio_print_current_devices(void)
{
-#ifndef CONFIG_SYS_CONSOLE_INFO_QUIET
/* Print information */
puts(In:);
if (stdio_devices[stdin] == NULL) {
@@ -613,7 +612,6 @@ void stdio_print_current_devices(void)
} else {
printf (%s\n, stdio_devices[stderr]-name);
}
-#endif /* CONFIG_SYS_CONSOLE_INFO_QUIET */
}
#ifdef CONFIG_SYS_CONSOLE_IS_IN_ENV
@@ -685,7 +683,9 @@ done:
gd-flags |= GD_FLG_DEVINIT;/* device initialization completed */
+#ifndef CONFIG_SYS_CONSOLE_INFO_QUIET
stdio_print_current_devices();
+#endif /* CONFIG_SYS_CONSOLE_INFO_QUIET */
#ifdef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
/* set the environment variables (will overwrite previous env settings)
*/
@@ -760,7 +760,9 @@ int console_init_r(void)
gd-flags |= GD_FLG_DEVINIT;/* device initialization completed */
+#ifndef CONFIG_SYS_CONSOLE_INFO_QUIET
stdio_print_current_devices();
+#endif /* CONFIG_SYS_CONSOLE_INFO_QUIET */
/* Setting environment variables */
for (i = 0; i 3; i++) {
--
1.7.7.3
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[U-Boot] [PATCH v3 15/20] Add console command to access io space registers
From: Vadim Bendebury vben...@chromium.org
Provide u-boot console functions to access IO space registers. A no
thrills implementation, accessing one register at a time.
For example:
boot iod 80
0080: 0094
boot iod.w 80
0080: 0094
boot iod.b 80
0080: 94
boot iow.b 0x80 12
boot iod 0x80
0080: 0012
Signed-off-by: Vadim Bendebury vben...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
common/Makefile |1 +
common/cmd_io.c | 93 ++
include/command.h|8 ++--
include/config_cmd_all.h |1 +
4 files changed, 99 insertions(+), 4 deletions(-)
create mode 100644 common/cmd_io.c
diff --git a/common/Makefile b/common/Makefile
index dcab027..1c5d623 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -120,6 +120,7 @@ COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
COBJS-$(CONFIG_ID_EEPROM) += cmd_mac.o
COBJS-$(CONFIG_CMD_MD5SUM) += cmd_md5sum.o
COBJS-$(CONFIG_CMD_MEMORY) += cmd_mem.o
+COBJS-$(CONFIG_CMD_IO) += cmd_io.o
COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
COBJS-$(CONFIG_MII) += miiphyutil.o
COBJS-$(CONFIG_CMD_MII) += miiphyutil.o
diff --git a/common/cmd_io.c b/common/cmd_io.c
new file mode 100644
index 000..6450cb5
--- /dev/null
+++ b/common/cmd_io.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * IO space access commands.
+ */
+
+#include common.h
+#include command.h
+#include asm/io.h
+
+/*
+ * IO Display
+ *
+ * Syntax:
+ * iod{.b, .w, .l} {addr}
+ */
+int do_io_iod(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ ulong addr;
+ int size;
+
+ if (argc != 2)
+ return CMD_RET_USAGE;
+
+ size = cmd_get_data_size(argv[0], 4);
+ if (size 0)
+ return 1;
+
+ addr = simple_strtoul(argv[1], NULL, 16);
+
+ printf(%04x: , (u16) addr);
+
+ if (size == 4)
+ printf(%08x\n, inl(addr));
+ else if (size == 2)
+ printf(%04x\n, inw(addr));
+ else
+ printf(%02x\n, inb(addr));
+
+ return 0;
+}
+
+int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ ulong addr, size, val;
+
+ if (argc != 3)
+ return CMD_RET_USAGE;
+
+ size = cmd_get_data_size(argv[0], 4);
+ if (size 0)
+ return 1;
+
+ addr = simple_strtoul(argv[1], NULL, 16);
+ val = simple_strtoul(argv[2], NULL, 16);
+
+ if (size == 4)
+ outl((u32) val, addr);
+ else if (size == 2)
+ outw((u16) val, addr);
+ else
+ outb((u8) val, addr);
+
+ return 0;
+}
+
+/**/
+U_BOOT_CMD(iod, 2, 0, do_io_iod,
+ IO space display, [.b, .w, .l] address [# of objects]);
+
+U_BOOT_CMD(iow, 3, 0, do_io_iow,
+ IO space modify (auto-incrementing address),
+ [.b, .w, .l] address);
diff --git a/include/command.h b/include/command.h
index 10bc260..476e7cf 100644
--- a/include/command.h
+++ b/include/command.h
@@ -89,10 +89,10 @@ extern int cmd_auto_complete(const char *const prompt, char
*buf, int *np, int *
*/
#if defined(CONFIG_CMD_MEMORY) \
-|| defined(CONFIG_CMD_I2C) \
-|| defined(CONFIG_CMD_ITEST) \
-|| defined(CONFIG_CMD_PCI) \
-|| defined(CONFIG_CMD_PORTIO)
+ || defined(CONFIG_CMD_I2C) \
+ || defined(CONFIG_CMD_ITEST)\
+ || defined(CONFIG_CMD_PCI) \
+ || defined(CONFIG_CMD_PORTIO)
#define CMD_DATA_SIZE
extern int cmd_get_data_size(char* arg, int default_size);
#endif
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 124d51f..e82f642 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -48,6 +48,7 @@
#define CONFIG_CMD_IMI /* iminfo */
#define CONFIG_CMD_IMLS/* List all found images*/
#define CONFIG_CMD_IMMAP /* IMMR dump support*/
+#define CONFIG_CMD_IO /* Access to X86 IO space */
[U-Boot] [PATCH v3 19/20] x86: coreboot: Enable io command
Enable the io command for x86 on coreboot. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v3: None Changes in v2: - Add x86 patch to enable io command for coreboot include/configs/coreboot.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index a010adc..50f6964 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -152,6 +152,7 @@ #define CONFIG_CMD_FPGA #define CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#define CONFIG_CMD_IO #define CONFIG_CMD_IRQ #define CONFIG_CMD_ITEST #define CONFIG_CMD_LOADB -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 03/20] Add a command to read raw blocks from a partition
From: Kenneth Waters kwat...@chromium.org
Sometimes data is on a block device and within a partition, but not in a
particular filesystem.
This commands permits reading raw data from a partition.
Signed-off-by: Kenneth Waters kwat...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
README |1 +
common/Makefile |1 +
common/cmd_read.c| 81 ++
include/config_cmd_all.h |1 +
4 files changed, 84 insertions(+), 0 deletions(-)
create mode 100644 common/cmd_read.c
diff --git a/README b/README
index 089d7a4..027fa46 100644
--- a/README
+++ b/README
@@ -856,6 +856,7 @@ The following options need to be configured:
CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
host
CONFIG_CMD_PORTIO * Port I/O
+ CONFIG_CMD_READ * Read raw data from partition
CONFIG_CMD_REGINFO * Register dump
CONFIG_CMD_RUNrun command in env variable
CONFIG_CMD_SAVES* save S record dump
diff --git a/common/Makefile b/common/Makefile
index 0fb79ed..84968f8 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -142,6 +142,7 @@ endif
COBJS-y += cmd_pcmcia.o
COBJS-$(CONFIG_CMD_PORTIO) += cmd_portio.o
COBJS-$(CONFIG_CMD_PXE) += cmd_pxe.o
+COBJS-$(CONFIG_CMD_READ) += cmd_read.o
COBJS-$(CONFIG_CMD_REGINFO) += cmd_reginfo.o
COBJS-$(CONFIG_CMD_REISER) += cmd_reiser.o
COBJS-$(CONFIG_CMD_SATA) += cmd_sata.o
diff --git a/common/cmd_read.c b/common/cmd_read.c
new file mode 100644
index 000..f0fc9bf
--- /dev/null
+++ b/common/cmd_read.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) version 2 as published by the Free
+ * Software Foundation.
+ */
+
+#include common.h
+#include command.h
+#include part.h
+
+int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ char *ep;
+ block_dev_desc_t *dev_desc = NULL;
+ int dev;
+ int part = 0;
+ disk_partition_t part_info;
+ ulong offset = 0u;
+ ulong limit = 0u;
+ void *addr;
+ uint blk;
+ uint cnt;
+
+ if (argc != 6) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ dev = (int)simple_strtoul(argv[2], ep, 16);
+ if (*ep) {
+ if (*ep != ':') {
+ printf(Invalid block device %s\n, argv[2]);
+ return 1;
+ }
+ part = (int)simple_strtoul(++ep, NULL, 16);
+ }
+
+ dev_desc = get_dev(argv[1], dev);
+ if (dev_desc == NULL) {
+ printf(Block device %s %d not supported\n, argv[1], dev);
+ return 1;
+ }
+
+ addr = (void *)simple_strtoul(argv[3], NULL, 16);
+ blk = simple_strtoul(argv[4], NULL, 16);
+ cnt = simple_strtoul(argv[5], NULL, 16);
+
+ if (part != 0) {
+ if (get_partition_info(dev_desc, part, part_info)) {
+ printf(Cannot find partition %d\n, part);
+ return 1;
+ }
+ offset = part_info.start;
+ limit = part_info.size;
+ } else {
+ /* Largest address not available in block_dev_desc_t. */
+ limit = ~0;
+ }
+
+ if (cnt + blk limit) {
+ printf(Read out of range\n);
+ return 1;
+ }
+
+ if (dev_desc-block_read(dev, offset + blk, cnt, addr) 0) {
+ printf(Error reading blocks\n);
+ return 1;
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ read, 6, 0, do_read,
+ Load binary data from a partition,
+ interface dev[:part] addr blk# cnt
+);
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index b87967e..148d676 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -71,6 +71,7 @@
#define CONFIG_CMD_REGINFO /* Register dump*/
#define CONFIG_CMD_REISER /* Reiserfs support */
#define CONFIG_CMD_RARP/* rarpboot support */
+#define CONFIG_CMD_READ/* Read data from partition */
#define CONFIG_CMD_RUN /* run command in env variable */
#define CONFIG_CMD_SAVEENV /* saveenv */
#define CONFIG_CMD_SAVES /* save S record dump */
--
1.7.7.3
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[U-Boot] [PATCH v3 20/20] x86: Add coreboot version to u-boot's version command
From: Stefan Reinauer reina...@chromium.org Since U-Boot runs from coreboot on x86, the Coreboot version is an important part of the boot state. This version information is available in the coreboot tables, so print it when the 'version' command is used. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v3: None Changes in v2: - Add x86 tag to version command patch common/cmd_version.c |7 ++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/common/cmd_version.c b/common/cmd_version.c index ab4c560..e8f40d3 100644 --- a/common/cmd_version.c +++ b/common/cmd_version.c @@ -25,6 +25,9 @@ #include command.h #include version.h #include linux/compiler.h +#ifdef CONFIG_SYS_COREBOOT +#include asm/arch/sysinfo.h +#endif const char __weak version_string[] = U_BOOT_VERSION_STRING; @@ -37,7 +40,9 @@ static int do_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef LD_VERSION_STRING puts(LD_VERSION_STRING \n); #endif - +#ifdef CONFIG_SYS_COREBOOT + printf(coreboot-%s (%s)\n, lib_sysinfo.version, lib_sysinfo.build); +#endif return 0; } -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 12/20] edid: Library of EDID decode and print
From: Tom Wai-Hong Tam waih...@chromium.org
This implements a library for accessing EDID data from an LCD panel.
This is used to obtain information about the panel such as its
resolution and type.
This is a tidied-up version of the original code pulled from
https://github.com/ynezz/u-boot-edid.
The changes we made are:
- removed bit fields in the struct;
- removed endianness cases in the struct;
- fixed some wrong definitions;
- fixed to fit 80 columns;
- fixed some code styles.
Signed-off-by: Tom Wai-Hong Tam waih...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
common/Makefile |1 +
common/edid.c | 307 +++
include/edid.h | 275 +
3 files changed, 583 insertions(+), 0 deletions(-)
create mode 100644 common/edid.c
create mode 100644 include/edid.h
diff --git a/common/Makefile b/common/Makefile
index 2c28e93..dcab027 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -188,6 +188,7 @@ COBJS-$(CONFIG_BOOTSTAGE) += bootstage.o
COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
COBJS-y += flash.o
COBJS-$(CONFIG_CMD_KGDB) += kgdb.o kgdb_stubs.o
+COBJS-$(CONFIG_I2C_EDID) += edid.o
COBJS-$(CONFIG_KALLSYMS) += kallsyms.o
COBJS-$(CONFIG_LCD) += lcd.o
COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o
diff --git a/common/edid.c b/common/edid.c
new file mode 100644
index 000..c82c298
--- /dev/null
+++ b/common/edid.c
@@ -0,0 +1,307 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * (C) Copyright 2010
+ * Petr Stetiar yn...@true.cz
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Contains stolen code from ddcprobe project which is:
+ * Copyright (C) Nalin Dahyabhai big...@pobox.com
+ *
+ */
+
+#include common.h
+#include edid.h
+#include linux/ctype.h
+#include linux/string.h
+
+int edid_check_info(struct edid1_info *edid_info)
+{
+ if ((edid_info == NULL) || (edid_info-version == 0))
+ return -1;
+
+ if (memcmp(edid_info-header, \x0\xff\xff\xff\xff\xff\xff\x0, 8))
+ return -1;
+
+ if (edid_info-version == 0xff edid_info-revision == 0xff)
+ return -1;
+
+ return 0;
+}
+
+int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
+ unsigned int *hmax, unsigned int *vmin,
+ unsigned int *vmax)
+{
+ int i;
+ struct edid_monitor_descriptor *monitor;
+
+ *hmin = *hmax = *vmin = *vmax = 0;
+ if (edid_check_info(edid))
+ return -1;
+
+ for (i = 0; i ARRAY_SIZE(edid-monitor_details.descriptor); i++) {
+ monitor = edid-monitor_details.descriptor[i];
+ if (monitor-type == EDID_MONITOR_DESCRIPTOR_RANGE) {
+ *hmin = monitor-data.range_data.horizontal_min;
+ *hmax = monitor-data.range_data.horizontal_max;
+ *vmin = monitor-data.range_data.vertical_min;
+ *vmax = monitor-data.range_data.vertical_max;
+ return 0;
+ }
+ }
+ return -1;
+}
+
+/**
+ * Snip the tailing whitespace/return of a string.
+ *
+ * @param string The string to be snipped
+ * @return the snipped string
+ */
+static char *snip(char *string)
+{
+ char *s;
+
+ /*
+* This is always a 13 character buffer
+* and it's not always terminated.
+*/
+ string[12] = '\0';
+ s = string[strlen(string) - 1];
+
+ while (s = string (isspace(*s) || *s == '\n' || *s == '\r' ||
+ *s == '\0'))
+ *(s--) = '\0';
+
+ return string;
+}
+
+/**
+ * Print an EDID monitor descriptor block
+ *
+ * @param monitor The EDID monitor descriptor block
+ * @have_timingModifies to 1 if the desciptor contains timing
info
+ */
+static void edid_print_dtd(struct edid_monitor_descriptor *monitor,
+ unsigned int *have_timing)
+{
+ unsigned char *bytes = (unsigned char *)monitor;
+ struct edid_detailed_timing *timing =
+ (struct edid_detailed_timing *)monitor;
+
+ if (bytes[0]
[U-Boot] [PATCH v3 10/20] sha1sum: Use generic hash layer
Update the code to use the hash layer instead of local code.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Add new patch to change sha1sum to use generic hash API
common/cmd_sha1sum.c | 129 ++
1 files changed, 4 insertions(+), 125 deletions(-)
diff --git a/common/cmd_sha1sum.c b/common/cmd_sha1sum.c
index 8db5456..fe927ab 100644
--- a/common/cmd_sha1sum.c
+++ b/common/cmd_sha1sum.c
@@ -26,73 +26,11 @@
#include common.h
#include command.h
+#include hash.h
#include sha1.h
-/*
- * Store the resulting sum to an address or variable
- */
-static void store_result(const u8 *sum, const char *dest)
-{
- unsigned int i;
-
- if (*dest == '*') {
- u8 *ptr;
-
- ptr = (u8 *)simple_strtoul(dest + 1, NULL, 16);
- for (i = 0; i 20; i++)
- *ptr++ = sum[i];
- } else {
- char str_output[41];
- char *str_ptr = str_output;
-
- for (i = 0; i 20; i++) {
- sprintf(str_ptr, %02x, sum[i]);
- str_ptr += 2;
- }
- str_ptr = '\0';
- setenv(dest, str_output);
- }
-}
-
-#ifdef CONFIG_SHA1SUM_VERIFY
-static int parse_verify_sum(char *verify_str, u8 *vsum)
-{
- if (*verify_str == '*') {
- u8 *ptr;
-
- ptr = (u8 *)simple_strtoul(verify_str + 1, NULL, 16);
- memcpy(vsum, ptr, 20);
- } else {
- unsigned int i;
- char *vsum_str;
-
- if (strlen(verify_str) == 40)
- vsum_str = verify_str;
- else {
- vsum_str = getenv(verify_str);
- if (vsum_str == NULL || strlen(vsum_str) != 40)
- return 1;
- }
-
- for (i = 0; i 20; i++) {
- char *nullp = vsum_str + (i + 1) * 2;
- char end = *nullp;
-
- *nullp = '\0';
- *(u8 *)(vsum + i) =
- simple_strtoul(vsum_str + (i * 2), NULL, 16);
- *nullp = end;
- }
- }
- return 0;
-}
-
int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- ulong addr, len;
- unsigned int i;
- u8 output[20];
- u8 vsum[20];
int verify = 0;
int ac;
char * const *av;
@@ -102,75 +40,16 @@ int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
av = argv + 1;
ac = argc - 1;
+#ifdef CONFIG_SHA1SUM_VERIFY
if (strcmp(*av, -v) == 0) {
verify = 1;
av++;
ac--;
- if (ac 3)
- return CMD_RET_USAGE;
}
+#endif
- addr = simple_strtoul(*av++, NULL, 16);
- len = simple_strtoul(*av++, NULL, 16);
-
- sha1_csum_wd((unsigned char *) addr, len, output, CHUNKSZ_SHA1);
-
- if (!verify) {
- printf(SHA1 for %08lx ... %08lx == , addr, addr + len - 1);
- for (i = 0; i 20; i++)
- printf(%02x, output[i]);
- printf(\n);
-
- if (ac 2)
- store_result(output, *av);
- } else {
- char *verify_str = *av++;
-
- if (parse_verify_sum(verify_str, vsum)) {
- printf(ERROR: %s does not contain a valid SHA1 sum\n,
- verify_str);
- return 1;
- }
- if (memcmp(output, vsum, 20) != 0) {
- printf(SHA1 for %08lx ... %08lx == , addr,
- addr + len - 1);
- for (i = 0; i 20; i++)
- printf(%02x, output[i]);
- printf( != );
- for (i = 0; i 20; i++)
- printf(%02x, vsum[i]);
- printf( ** ERROR **\n);
- return 1;
- }
- }
-
- return 0;
-}
-#else
-static int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
-{
- unsigned long addr, len;
- unsigned int i;
- u8 output[20];
-
- if (argc 3)
- return CMD_RET_USAGE;
-
- addr = simple_strtoul(argv[1], NULL, 16);
- len = simple_strtoul(argv[2], NULL, 16);
-
- sha1_csum_wd((unsigned char *) addr, len, output, CHUNKSZ_SHA1);
- printf(SHA1 for %08lx ... %08lx == , addr, addr + len - 1);
- for (i = 0; i 20; i++)
- printf(%02x, output[i]);
- printf(\n);
-
- if (argc 3)
- store_result(output, argv[3]);
-
- return 0;
+ return hash_command(sha1, verify, cmdtp, flag, ac, av);
}
-#endif
#ifdef
[U-Boot] [PATCH v2] x86: Turn on support for EFI's GPT in the coreboot config
From: Gabe Black gabebl...@chromium.org This allows u-boot to figure out the partitions of a chrome-os install. Signed-off-by: Gabe Black gabebl...@chromium.org Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Add CONFIG_CMD_PART and CONFIG_PARTITION_UUIDS which are required include/configs/coreboot.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 46b8d78..06d2b2f 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -126,13 +126,16 @@ / * DISK Partition support / +#define CONFIG_EFI_PARTITION #define CONFIG_DOS_PARTITION #define CONFIG_MAC_PARTITION #define CONFIG_ISO_PARTITION /* Experimental */ +#define CONFIG_CMD_PART #define CONFIG_CMD_CBFS #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE +#define CONFIG_PARTITION_UUIDS /*--- * Video Configuration -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] x86: Fix coreboot config to boot on Chromebook
The config is current broken. It compiles but does not boot because IDE is enabled. Remove all IDE options, and enable SCSI instead. Also add a working boot command and Linux bootargs, and enable command line editing to make it easier to work with. Signed-off-by: Simon Glass s...@chromium.org --- include/configs/coreboot.h | 26 -- 1 files changed, 12 insertions(+), 14 deletions(-) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 06d2b2f..adeace0 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -39,7 +39,9 @@ #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF +#define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */ #define CONFIG_ZBOOT_32 +#define CONFIG_PHYSMEM /*--- * Watchdog Configuration @@ -104,18 +106,9 @@ #define CONFIG_SYS_STDIO_DEREGISTER #define CONFIG_CBMEM_CONSOLE -/* max. 1 IDE bus */ -#define CONFIG_SYS_IDE_MAXBUS 1 -/* max. 1 drive per IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1) - -#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 0 -#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 - +#define CONFIG_CMDLINE_EDITING +#define CONFIG_COMMAND_HISTORY +#define CONFIG_AUTOCOMPLETE #define CONFIG_SUPPORT_VFAT / @@ -181,14 +174,19 @@ #define CONFIG_CMD_SETGETDCR #define CONFIG_CMD_SOURCE #define CONFIG_CMD_XIMG -#define CONFIG_CMD_IDE +#define CONFIG_CMD_SCSI + #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_ZBOOT #define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGSroot=/dev/mtdblock0 console=ttyS0,9600 +#define CONFIG_BOOTARGS\ + root=/dev/sdb3 init=/sbin/init rootwait ro +#define CONFIG_BOOTCOMMAND \ + ext2load scsi 0:3 0100 /boot/vmlinuz; zboot 0100 + #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 15/20] Add console command to access io space registers
On Wed, Dec 5, 2012 at 10:46 PM, Simon Glass s...@chromium.org wrote: From: Vadim Bendebury vben...@chromium.org Provide u-boot console functions to access IO space registers. A no thrills implementation, accessing one register at a time. For example: boot iod 80 0080: 0094 boot iod.w 80 0080: 0094 boot iod.b 80 0080: 94 boot iow.b 0x80 12 boot iod 0x80 0080: 0012 Doesn't md/mw accomplish the same? Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 15/20] Add console command to access io space registers
On Wed, Dec 5, 2012 at 5:23 PM, Fabio Estevam feste...@gmail.com wrote: On Wed, Dec 5, 2012 at 10:46 PM, Simon Glass s...@chromium.org wrote: From: Vadim Bendebury vben...@chromium.org Provide u-boot console functions to access IO space registers. A no thrills implementation, accessing one register at a time. For example: boot iod 80 0080: 0094 boot iod.w 80 0080: 0094 boot iod.b 80 0080: 94 boot iow.b 0x80 12 boot iod 0x80 0080: 0012 Doesn't md/mw accomplish the same? No - md/mw access memory, the new commands access the IO space (which is an x86 architecture property). cheers, /vb Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 15/20] Add console command to access io space registers
On Wed, Dec 5, 2012 at 11:25 PM, Vadim Bendebury vben...@chromium.org wrote: No - md/mw access memory, the new commands access the IO space (which is an x86 architecture property). Ok, understood. On ARM we are able to access registers via md/mw. Maybe it would be better to put a note in the commit message that this is x86 specific. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] MMC: DWMMC: Modified fifo size computation
It looks good to me. Added minor comment. Acked-by: Jaehoon Chung jh80.ch...@samsung.com On 12/05/2012 10:31 PM, Amar wrote: The current implementation of fifo size computation was giving improper values for eMMC channel. Modified the computation as per user manual. Signed-off-by: Amarendra Reddy amarendra...@samsung.com --- drivers/mmc/dw_mmc.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 4070d4e..62dc152 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -332,6 +332,8 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_BMOD, 1); fifo_size = dwmci_readl(host, DWMCI_FIFOTH); + fifo_size = ((fifo_size RX_WMARK(0xFFF)) 16) + 1; How about using like FIFO_SIZE_MASK? + if (host-fifoth_val) fifoth_val = host-fifoth_val; else ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] MMC: EXYNOS: Added call back function for clock get
On 12/05/2012 10:31 PM, Amar wrote:
This patch defines the call back required by dw mmc driver to get the
clock value. It also adds function to set the dw mmc clock divider ratio.
Signed-off-by: Amarendra Reddy amarendra...@samsung.com
---
drivers/mmc/exynos_dw_mmc.c | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..7cc8aba 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -30,25 +30,37 @@ static void exynos_dwmci_clksel(struct dwmci_host *host)
{
u32 val;
val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) |
+ DWMCI_SET_DIV_RATIO(DWMCI_SHIFT_0);
dwmci_writel(host, DWMCI_CLKSEL, val);
}
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
+}
+
int exynos_dwmci_init(u32 regbase, int bus_width, int index)
{
struct dwmci_host *host = NULL;
+ int div = 0;
Why didn't initialize to 1? div is assigned to 1 at the below.
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ div = 1;
+ /* Set the mmc clock divider ratio pre-ratio */
+ set_mmc_clk(index, div);
Then if div set to 1, what value is set?
Can this code adjust to every board?
+
host-name = EXYNOS_NAME;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
host-clksel = exynos_dwmci_clksel;
host-dev_index = index;
+ host-mmc_clk = exynos_dwmci_get_clk;
add_dwmci(host, 5200, 40);
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Re: [U-Boot] [PATCH 3/4] EXYNOS: CLOCK: Initialised the local variable
Acked-by: Jaehoon Chung jh80.ch...@samsung.com On 12/05/2012 10:31 PM, Amar wrote: This patch initialises the local variable 'shift' to zero to avoid improper extraction of ratio and pre-ratio divider values. Extraction of improper values was happening due to garbage value present in local variable. Signed-off-by: Amarendra Reddy amarendra...@samsung.com --- arch/arm/cpu/armv7/exynos/clock.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 731bbff..0bcf05f 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -379,7 +379,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -428,7 +428,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] part: check each variable for capability calculation
Since last month, no any feedback.
Who can give some comment about this patch?
Best Regards
Jerry Huang
-Original Message-
From: Huang Changming-R66093
Sent: Wednesday, November 07, 2012 9:33 AM
To: u-boot@lists.denx.de
Cc: Huang Changming-R66093
Subject: [PATCH] part: check each variable for capability calculation
From: Jerry Huang chang-ming.hu...@freescale.com
In order to calculate the capability, we use the below expression to
check:
((dev_desc-lba * dev_desc-blksz)0L)
If the capability is greater than 4GB (e.g. 8GB = 8 * 1024 * 104 * 1024),
the result will overflow, the low 32bit may be zero.
Therefore, change to check each variable to fix this potential issue.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
---
disk/part.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disk/part.c b/disk/part.c
index 4646f68..7bdc90e 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -199,7 +199,7 @@ void dev_print (block_dev_desc_t *dev_desc)
break;
}
puts (\n);
- if ((dev_desc-lba * dev_desc-blksz)0L) {
+ if (dev_desc-lba 0L dev_desc-blksz 0L) {
ulong mb, mb_quot, mb_rem, gb, gb_quot, gb_rem;
lbaint_t lba;
--
1.7.9.5
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Re: [U-Boot] [PATCH 4/4] SMDK5250: Initialise and enable dwmmc channels
On 12/05/2012 10:31 PM, Amar wrote:
This patch initialises and enables dwmmc channels 0 and 2 for SMDK5250.
It also initialises the pinmux for the same.
Signed-off-by: Amarendra Reddy amarendra...@samsung.com
---
board/samsung/smdk5250/smdk5250.c | 22 +-
include/configs/smdk5250.h|4 ++--
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 4c50342..9503510 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -26,6 +26,7 @@
#include netdev.h
#include spi.h
#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
#include asm/arch/pinmux.h
@@ -139,13 +140,32 @@ int board_mmc_init(bd_t *bis)
{
int err;
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(SDMMC2 not configured\n);
+ return err;
+ }
If return error, we didn't need to initialize the MMC0?
And why do you initialize the MMC2 before initialized MMC0?
I didn't test the this patch, but i think if you inserted SD-card, it didn't
work well.
+
+ /*SD: dwmmc Channel-2 with 4 bit bus width */
+ err = exynos_dwmmc_init(2, 4);
+ if (err) {
+ debug(dwmmc Channel-2 init failed\n);
+ return err;
+ }
+
err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
if (err) {
debug(SDMMC0 not configured\n);
return err;
}
- err = s5p_mmc_init(0, 8);
+ /*eMMC: dwmmc Channel-0 with 8 bit bus width */
+ err = exynos_dwmmc_init(0, 8);
+ if (err) {
+ debug(dwmmc Channel-0 init failed\n);
+ return err;
+ }
+
return err;
}
#endif
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index e412da8..7dc2d96 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -77,8 +77,8 @@
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
-#define CONFIG_SDHCI
-#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOARD_EARLY_INIT_F
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Re: [U-Boot] [PATCH] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
On Wed, Dec 05, 2012 at 09:35:26PM -0200, Fabio Estevam wrote:
Hi Wolfram,
On Wed, Dec 5, 2012 at 6:48 PM, Wolfram Sang w.s...@pengutronix.de wrote:
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 4701be8..e38e151 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_nand_info *info)
{
struct mxs_gpmi_regs *gpmi_regs =
(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+ struct mxs_bch_regs *bch_regs =
+ (struct mxs_bch_regs *)MXS_BCH_BASE;
int i = 0, j;
info-desc = malloc(sizeof(struct mxs_dma_desc *) *
@@ -1081,6 +1083,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
/* Reset the GPMI block. */
mxs_reset_block(gpmi_regs-hw_gpmi_ctrl0_reg);
+ mxs_reset_block(bch_regs-hw_bch_ctrl_reg);
In your kernel patch you only do the reset for mx23, but here you do
it for mx28.
Which one is correct?
Both patches are correct. Check the kernel code again, please,
especially the function arguments.
--
Pengutronix e.K. | Wolfram Sang|
Industrial Linux Solutions | http://www.pengutronix.de/ |
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[U-Boot] [PATCH resend 1/7] mtd/st_smi: Clear error flags while initiating a fresh write
SMI controller reports an error when the code tries to write on the flash area with Write Enable command not issued or the bank has come out of the write mode. This error is reported even with a fresh write once the ERF1 or ERF2 is set. Clear these flags while initiating a fresh write Signed-off-by: Vipin Kumar vipin.ku...@st.com --- drivers/mtd/st_smi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c index 7507e5d..fad4420 100644 --- a/drivers/mtd/st_smi.c +++ b/drivers/mtd/st_smi.c @@ -392,6 +392,8 @@ static int smi_write(unsigned int *src_addr, unsigned int *dst_addr, return -1; } + writel(readl(smicntl-smi_sr) ~(ERF1 | ERF2), smicntl-smi_sr); + if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) return -EBUSY; -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH resend 0/7] mtd/st_smi: Add fixes for smi driver
Hello, This patch-set adds simple fixes for smi driver used in spear devices. Modifications include - Add MTD support for smi driver - Write to flash in a tight loop - Alphabetically sort the list of devices - Avoid issuing multiple write enable commands PS: Wolfgang, Stefan, I am directing these to you as there is no direct maintainer of mtd in u-boot. I can add these in my pull-request once you review these patches Thanks in advance Vipin Armando Visconti (1): mtd/st_smi: Add support for Micron N25Q128 Flash Vipin Kumar (6): mtd/st_smi: Clear error flags while initiating a fresh write mtd/st_smi: Rearrange the supported devices in alphabetical order mtd/st_smi: Avoid issuing multiple WE commands mtd/st_smi: Write to flash in a tight loop mtd/st_smi: Use page sizes respective to flash mtd/st_smi: Add mtd support for smi drivers/mtd/st_smi.c | 260 ++--- include/linux/mtd/st_smi.h | 1 - 2 files changed, 222 insertions(+), 39 deletions(-) -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH resend 2/7] mtd/st_smi: Rearrange the supported devices in alphabetical order
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/mtd/st_smi.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index fad4420..c3e35c0 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -62,24 +62,24 @@ struct flash_device {
* Currently the erase_cmd field is not used in this driver.
*/
static struct flash_device flash_devices[] = {
- FLASH_ID(st m25p16 , 0xd8, 0x00152020, 0x100, 0x1, 0x20),
- FLASH_ID(st m25p32 , 0xd8, 0x00162020, 0x100, 0x1, 0x40),
- FLASH_ID(st m25p64 , 0xd8, 0x00172020, 0x100, 0x1, 0x80),
- FLASH_ID(st m25p128, 0xd8, 0x00182020, 0x100, 0x4, 0x100),
+ FLASH_ID(sp s25fl004 , 0xd8, 0x00120201, 0x100, 0x1, 0x8),
+ FLASH_ID(sp s25fl008 , 0xd8, 0x00130201, 0x100, 0x1, 0x10),
+ FLASH_ID(sp s25fl016 , 0xd8, 0x00140201, 0x100, 0x1, 0x20),
+ FLASH_ID(sp s25fl032 , 0xd8, 0x00150201, 0x100, 0x1, 0x40),
+ FLASH_ID(sp s25fl064 , 0xd8, 0x00160201, 0x100, 0x1, 0x80),
FLASH_ID(st m25p05 , 0xd8, 0x00102020, 0x80 , 0x8000 , 0x1),
FLASH_ID(st m25p10 , 0xd8, 0x00112020, 0x80 , 0x8000 , 0x2),
+ FLASH_ID(st m25p16 , 0xd8, 0x00152020, 0x100, 0x1, 0x20),
FLASH_ID(st m25p20 , 0xd8, 0x00122020, 0x100, 0x1, 0x4),
+ FLASH_ID(st m25p32 , 0xd8, 0x00162020, 0x100, 0x1, 0x40),
FLASH_ID(st m25p40 , 0xd8, 0x00132020, 0x100, 0x1, 0x8),
+ FLASH_ID(st m25p64 , 0xd8, 0x00172020, 0x100, 0x1, 0x80),
FLASH_ID(st m25p80 , 0xd8, 0x00142020, 0x100, 0x1, 0x10),
+ FLASH_ID(st m25p128, 0xd8, 0x00182020, 0x100, 0x4, 0x100),
FLASH_ID(st m45pe10, 0xd8, 0x00114020, 0x100, 0x1, 0x2),
FLASH_ID(st m45pe20, 0xd8, 0x00124020, 0x100, 0x1, 0x4),
FLASH_ID(st m45pe40, 0xd8, 0x00134020, 0x100, 0x1, 0x8),
FLASH_ID(st m45pe80, 0xd8, 0x00144020, 0x100, 0x1, 0x10),
- FLASH_ID(sp s25fl004 , 0xd8, 0x00120201, 0x100, 0x1, 0x8),
- FLASH_ID(sp s25fl008 , 0xd8, 0x00130201, 0x100, 0x1, 0x10),
- FLASH_ID(sp s25fl016 , 0xd8, 0x00140201, 0x100, 0x1, 0x20),
- FLASH_ID(sp s25fl032 , 0xd8, 0x00150201, 0x100, 0x1, 0x40),
- FLASH_ID(sp s25fl064 , 0xd8, 0x00160201, 0x100, 0x1, 0x80),
FLASH_ID(mac 25l512, 0xd8, 0x001020C2, 0x010, 0x1, 0x1),
FLASH_ID(mac 25l1005 , 0xd8, 0x001120C2, 0x010, 0x1, 0x2),
FLASH_ID(mac 25l2005 , 0xd8, 0x001220C2, 0x010, 0x1, 0x4),
@@ -91,7 +91,7 @@ static struct flash_device flash_devices[] = {
FLASH_ID(mac 25l3205 , 0xd8, 0x001620C2, 0x100, 0x1, 0x40),
FLASH_ID(mac 25l3205a , 0xd8, 0x001620C2, 0x100, 0x1, 0x40),
FLASH_ID(mac 25l6405 , 0xd8, 0x001720C2, 0x100, 0x1, 0x80),
- FLASH_ID(wbd w25q128 , 0xd8, 0x001840EF, 0x100, 0x1, 0x100),
+ FLASH_ID(wbd w25q128 , 0xd8, 0x001840EF, 0x100, 0x1, 0x100),
};
/*
--
1.8.0
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[U-Boot] [PATCH resend 3/7] mtd/st_smi: Add support for Micron N25Q128 Flash
From: Armando Visconti armando.visco...@st.com
Signed-off-by: Armando Visconti armando.visco...@st.com
---
drivers/mtd/st_smi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index c3e35c0..a46b273 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -91,6 +91,7 @@ static struct flash_device flash_devices[] = {
FLASH_ID(mac 25l3205 , 0xd8, 0x001620C2, 0x100, 0x1, 0x40),
FLASH_ID(mac 25l3205a , 0xd8, 0x001620C2, 0x100, 0x1, 0x40),
FLASH_ID(mac 25l6405 , 0xd8, 0x001720C2, 0x100, 0x1, 0x80),
+ FLASH_ID(mcr n25q128 , 0xd8, 0x0018BA20, 0x100, 0x1, 0x100),
FLASH_ID(wbd w25q128 , 0xd8, 0x001840EF, 0x100, 0x1, 0x100),
};
--
1.8.0
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[U-Boot] [PATCH resend 4/7] mtd/st_smi: Avoid issuing multiple WE commands
At the start of an smi_write, if the destination address is page aligned, the
Write Enable command is getting issued twice. This patch fixes it by keeping a
flag.
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/mtd/st_smi.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index a46b273..a84802a 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -374,7 +374,7 @@ static int smi_write(unsigned int *src_addr, unsigned int
*dst_addr,
u8 *src_addr8 = (u8 *)src_addr;
u8 *dst_addr8 = (u8 *)dst_addr;
int banknum;
- int i;
+ int i, issue_we;
switch (bank_addr) {
case SMIBANK0_BASE:
@@ -394,19 +394,16 @@ static int smi_write(unsigned int *src_addr, unsigned int
*dst_addr,
}
writel(readl(smicntl-smi_sr) ~(ERF1 | ERF2), smicntl-smi_sr);
-
- if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
- return -EBUSY;
+ issue_we = 1;
/* Set SMI in Hardware Mode */
writel(readl(smicntl-smi_cr1) ~SW_MODE, smicntl-smi_cr1);
- if (smi_write_enable(banknum))
- return -EIO;
-
/* Perform the write command */
for (i = 0; i length; i += 4) {
- if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) {
+ if (issue_we || (((ulong)(dst_addr) % SFLASH_PAGE_SIZE) == 0)) {
+ issue_we = 0;
+
if (smi_wait_till_ready(banknum,
CONFIG_SYS_FLASH_WRITE_TOUT))
return -EBUSY;
--
1.8.0
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[U-Boot] [PATCH resend 5/7] mtd/st_smi: Write to flash in a tight loop
The write loop is checking for dest_addr alignment with page size. This
sometimes leads to smi controller coming out of write mode and eventually the
next write failing with ERF1 being set.
To avoid this, write to flash in a tight loop and write bytewise to also support
not word aligned data bytes to be written. Additionally, enable burst mode
before this loop so that the controller does not deselect the chip if the
transfer is finished.
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/mtd/st_smi.c | 30 +-
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index a84802a..998bacb 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -368,13 +368,11 @@ static int smi_sector_erase(flash_info_t *info, unsigned
int sector)
*
* Write to SMI flash
*/
-static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,
+static int smi_write(unsigned char *src_addr, unsigned char *dst_addr,
unsigned int length, ulong bank_addr)
{
- u8 *src_addr8 = (u8 *)src_addr;
- u8 *dst_addr8 = (u8 *)dst_addr;
int banknum;
- int i, issue_we;
+ int issue_we;
switch (bank_addr) {
case SMIBANK0_BASE:
@@ -400,7 +398,10 @@ static int smi_write(unsigned int *src_addr, unsigned int
*dst_addr,
writel(readl(smicntl-smi_cr1) ~SW_MODE, smicntl-smi_cr1);
/* Perform the write command */
- for (i = 0; i length; i += 4) {
+ while (length) {
+ int k;
+ unsigned int wlen = min(SFLASH_PAGE_SIZE, length);
+
if (issue_we || (((ulong)(dst_addr) % SFLASH_PAGE_SIZE) == 0)) {
issue_we = 0;
@@ -412,19 +413,14 @@ static int smi_write(unsigned int *src_addr, unsigned int
*dst_addr,
return -EIO;
}
- if (length 4) {
- int k;
+ writel(readl(smicntl-smi_cr1) | WB_MODE, smicntl-smi_cr1);
- /*
-* Handle special case, where length 4 (redundant env)
-*/
- for (k = 0; k length; k++)
- *dst_addr8++ = *src_addr8++;
- } else {
- /* Normal 32bit write */
+ for (k = 0; k wlen; k++)
*dst_addr++ = *src_addr++;
- }
+ writel(readl(smicntl-smi_cr1) ~WB_MODE, smicntl-smi_cr1);
+
+ length -= wlen;
if ((readl(smicntl-smi_sr) (ERF1 | ERF2)))
return -EIO;
}
@@ -448,8 +444,8 @@ static int smi_write(unsigned int *src_addr, unsigned int
*dst_addr,
*/
int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
{
- return smi_write((unsigned int *)src, (unsigned int *)dest_addr,
-length, info-start[0]);
+ return smi_write(src, (unsigned char *)dest_addr, length,
+ info-start[0]);
}
/*
--
1.8.0
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[U-Boot] [PATCH resend 6/7] mtd/st_smi: Use page sizes respective to flash
The page size is a flash dependent property and the driver was using a macro in
place of page size. This patch uses the proper page size wrt the flash device
connected on board
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/mtd/st_smi.c | 41 +
include/linux/mtd/st_smi.h | 1 -
2 files changed, 33 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index 998bacb..0e529a4 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -96,6 +96,25 @@ static struct flash_device flash_devices[] = {
};
/*
+ * get_flash_device - Return flash_device pointer for a particular device id
+ * @id: Device id
+ *
+ * Return flash_device pointer for a particular device id
+ */
+static struct flash_device *get_flash_device(u32 id)
+{
+ struct flash_device *flash_dev_p = flash_devices[0];
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(flash_devices); i++, flash_dev_p++) {
+ if (flash_dev_p-device_id == id)
+ return flash_dev_p;
+ }
+
+ return NULL;
+}
+
+/*
* smi_wait_xfer_finish - Wait until TFF is set in status register
* @timeout:timeout in milliseconds
*
@@ -361,20 +380,27 @@ static int smi_sector_erase(flash_info_t *info, unsigned
int sector)
/*
* smi_write - Write to SMI flash
+ * @info: flash info structure
* @src_addr: source buffer
* @dst_addr: destination buffer
* @length: length to write in bytes
- * @bank: bank base address
*
* Write to SMI flash
*/
-static int smi_write(unsigned char *src_addr, unsigned char *dst_addr,
-unsigned int length, ulong bank_addr)
+static int smi_write(flash_info_t *info, unsigned char *src_addr,
+ unsigned char *dst_addr, unsigned int length)
{
+ struct flash_device *flash_device_p = get_flash_device(info-flash_id);
+ u32 page_size;
int banknum;
int issue_we;
- switch (bank_addr) {
+ if (!flash_device_p)
+ return -EIO;
+
+ page_size = flash_device_p-pagesize;
+
+ switch (info-start[0]) {
case SMIBANK0_BASE:
banknum = BANK0;
break;
@@ -400,9 +426,9 @@ static int smi_write(unsigned char *src_addr, unsigned char
*dst_addr,
/* Perform the write command */
while (length) {
int k;
- unsigned int wlen = min(SFLASH_PAGE_SIZE, length);
+ unsigned int wlen = min(page_size, length);
- if (issue_we || (((ulong)(dst_addr) % SFLASH_PAGE_SIZE) == 0)) {
+ if (issue_we || (((ulong)(dst_addr) % page_size) == 0)) {
issue_we = 0;
if (smi_wait_till_ready(banknum,
@@ -444,8 +470,7 @@ static int smi_write(unsigned char *src_addr, unsigned char
*dst_addr,
*/
int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
{
- return smi_write(src, (unsigned char *)dest_addr, length,
- info-start[0]);
+ return smi_write(info, src, (unsigned char *)dest_addr, length);
}
/*
diff --git a/include/linux/mtd/st_smi.h b/include/linux/mtd/st_smi.h
index 04f81ea..5837493 100644
--- a/include/linux/mtd/st_smi.h
+++ b/include/linux/mtd/st_smi.h
@@ -108,7 +108,6 @@ struct flash_dev {
ushort sector_count;
};
-#define SFLASH_PAGE_SIZE 0x100 /* flash page size */
#define XFER_FINISH_TOUT 15 /* xfer finish timeout(in ms) */
#define WMODE_TOUT 15 /* write enable timeout(in ms) */
--
1.8.0
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[U-Boot] [PATCH resend 7/7] mtd/st_smi: Add mtd support for smi
This patch adds mtd device support for smi devices
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/mtd/st_smi.c | 167 ++-
1 file changed, 165 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index 0e529a4..4d1a6bd 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -24,6 +24,7 @@
#include common.h
#include flash.h
#include linux/err.h
+#include linux/mtd/mtd.h
#include linux/mtd/st_smi.h
#include asm/io.h
@@ -37,6 +38,14 @@ static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =
CONFIG_SYS_FLASH_ADDR_BASE;
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+#if defined(CONFIG_MTD_DEVICE)
+/* MTD interface for SMI devices */
+static struct mtd_info smi_mtd_info[CONFIG_SYS_MAX_FLASH_BANKS];
+static char smi_mtd_names[CONFIG_SYS_MAX_FLASH_BANKS][16];
+
+static int smi_mtd_init(void);
+#endif
+
/* data structure to maintain flash ids from different vendors */
struct flash_device {
char *name;
@@ -482,7 +491,9 @@ unsigned long flash_init(void)
{
unsigned long size = 0;
int i, j;
-
+#if defined(CONFIG_MTD_DEVICE)
+ int error;
+#endif
smi_init();
for (i = 0; i CONFIG_SYS_MAX_FLASH_BANKS; i++) {
@@ -498,6 +509,12 @@ unsigned long flash_init(void)
}
+#if defined(CONFIG_MTD_DEVICE)
+ error = smi_mtd_init();
+ if (error 0)
+ return 0;
+#endif
+
return size;
}
@@ -599,4 +616,150 @@ int flash_erase(flash_info_t *info, int s_first, int
s_last)
puts( done\n);
return rcode;
}
-#endif
+
+#if defined(CONFIG_MTD_DEVICE)
+static int smi_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+ flash_info_t *fi = mtd-priv;
+ size_t a_start = fi-start[0] + instr-addr;
+ size_t a_end = a_start + instr-len;
+ int s_first = -1;
+ int s_last = -1;
+ int error, sect;
+
+ for (sect = 0; sect fi-sector_count; sect++) {
+ if (a_start == fi-start[sect])
+ s_first = sect;
+
+ if (sect fi-sector_count - 1) {
+ if (a_end == fi-start[sect + 1]) {
+ s_last = sect;
+ break;
+ }
+ } else {
+ s_last = sect;
+ break;
+ }
+ }
+
+ if (s_first = 0 s_first = s_last) {
+ instr-state = MTD_ERASING;
+
+ error = flash_erase(fi, s_first, s_last);
+ if (error) {
+ instr-state = MTD_ERASE_FAILED;
+ return -EIO;
+ }
+
+ instr-state = MTD_ERASE_DONE;
+ mtd_erase_callback(instr);
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int smi_mtd_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ flash_info_t *fi = mtd-priv;
+ u_char *f = (u_char *)(fi-start[0]) + from;
+
+ memcpy(buf, f, len);
+ *retlen = len;
+
+ return 0;
+}
+
+static int smi_mtd_write(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf)
+{
+ flash_info_t *fi = mtd-priv;
+ u_long t = fi-start[0] + to;
+ int error;
+
+ error = write_buff(fi, (u_char *)buf, t, len);
+ if (!error) {
+ *retlen = len;
+ return 0;
+ }
+
+ return -EIO;
+}
+
+static void smi_mtd_sync(struct mtd_info *mtd)
+{
+ /*
+* This function should wait until all pending operations
+* finish. However this driver is fully synchronous, so
+* this function returns immediately
+*/
+}
+
+static int smi_mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+ flash_info_t *fi = mtd-priv;
+
+ flash_protect(FLAG_PROTECT_SET, fi-start[0] + ofs,
+ fi-start[0] + ofs + len - 1, fi);
+ return 0;
+}
+
+static int smi_mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+ flash_info_t *fi = mtd-priv;
+
+ flash_protect(FLAG_PROTECT_CLEAR, fi-start[0] + ofs,
+ fi-start[0] + ofs + len - 1, fi);
+ return 0;
+}
+
+static int smi_mtd_init(void)
+{
+ struct flash_device *flash_device_p;
+ struct mtd_info *mtd;
+ flash_info_t *fi;
+ int i;
+
+ for (i = 0; i CONFIG_SYS_MAX_FLASH_BANKS; i++) {
+ fi = flash_info[i];
+
+ if (!fi-size)
+ continue;
+
+ flash_device_p = get_flash_device(fi-flash_id);
+ if (!flash_device_p)
+ return -EIO;
+
+ mtd = smi_mtd_info[i];
+
+ memset(mtd, 0, sizeof(struct mtd_info));
+
+ /* Uniform erase sizes for all sectors */
+
[U-Boot] [PATCH 0/3 V2] EXYNOS5: Add FDT support for USB
This patch set adds FDT support for USB device. This patch set is based on EXYNOS5: MAX77686 add FDT support Changes in V2: - Removed checkpatch errors. Rajeshwari Shinde (3): EHCI: Exynos: Add fdt support EXYNOS5: Add devine node for USB. EXYNOS5: FDT: Add compatible strings for USB arch/arm/dts/exynos5250.dtsi |7 + drivers/usb/host/ehci-exynos.c | 59 --- include/fdtdec.h |1 + lib/fdtdec.c |1 + 4 files changed, 63 insertions(+), 5 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3 V2] EHCI: Exynos: Add fdt support
Adding fdt support to ehci-exynos in order to parse
register base addresses from the device node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Chnages in V2:
- Removed checkpatch errors.
drivers/usb/host/ehci-exynos.c | 59 ---
1 files changed, 54 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 9f0ed06..f9189a5 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -21,6 +21,8 @@
*/
#include common.h
+#include fdtdec.h
+#include libfdt.h
#include usb.h
#include asm/arch/cpu.h
#include asm/arch/ehci.h
@@ -28,6 +30,9 @@
#include asm/arch/power.h
#include ehci.h
+/* Declare global data pointer */
+DECLARE_GLOBAL_DATA_PTR;
+
/* Setup the EHCI host controller. */
static void setup_usb_phy(struct exynos_usb_phy *usb)
{
@@ -86,12 +91,39 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
*/
int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- struct exynos_usb_phy *usb;
+ struct exynos_usb_phy *usb = NULL;
+ unsigned int *hcd = NULL;
+ unsigned int node;
+
+ node = fdtdec_next_compatible(gd-fdt_blob, 0,
+ COMPAT_SAMSUNG_EXYNOS_EHCI);
+ if (node = 0) {
+ debug(EHCI: Can't get device tree node for ehci\n);
+ return -1;
+ }
+
+ /*
+* Get the base address for usbphy from the device node
+*/
+ usb = (struct exynos_usb_phy *)fdtdec_get_addr(gd-fdt_blob, node,
+ phyreg);
+ if (usb == NULL) {
+ debug(Can't get the usbphy register address\n);
+ return -1;
+ }
- usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
setup_usb_phy(usb);
- *hccr = (struct ehci_hccr *)samsung_get_base_usb_ehci();
+ /*
+* Get the base address for XHCI controller from the device node
+*/
+ hcd = (unsigned int *)fdtdec_get_addr(gd-fdt_blob, node, reg);
+ if (hcd == NULL) {
+ debug(Can't get the XHCI registere address\n);
+ return -1;
+ }
+
+ *hccr = (struct ehci_hccr *)hcd;
*hcor = (struct ehci_hcor *)((uint32_t) *hccr
+ HC_LENGTH(ehci_readl((*hccr)-cr_capbase)));
@@ -108,9 +140,26 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
struct ehci_hcor **hcor)
*/
int ehci_hcd_stop(int index)
{
- struct exynos_usb_phy *usb;
+ struct exynos_usb_phy *usb = NULL;
+ unsigned int node;
+
+ node = fdtdec_next_compatible(gd-fdt_blob, 0,
+ COMPAT_SAMSUNG_EXYNOS_EHCI);
+ if (node = 0) {
+ debug(EHCI: Can't get device tree node for ehci\n);
+ return -1;
+ }
+
+ /*
+* Get the base address for usbphy from the device node
+*/
+ usb = (struct exynos_usb_phy *)fdtdec_get_addr(gd-fdt_blob, node,
+ phyreg);
+ if (usb == NULL) {
+ debug(Can't get the usbphy register address\n);
+ return -1;
+ }
- usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
reset_usb_phy(usb);
return 0;
--
1.7.4.4
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[U-Boot] [PATCH 2/3 V2] EXYNOS5: Add devine node for USB.
This patch adds the device node required for USB
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Chnages in V2:
- None
arch/arm/dts/exynos5250.dtsi |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 2073ef2..dc727fc 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -143,4 +143,11 @@
reg = 0x131b 0x30;
interrupts = 0 130 0;
};
+
+ ehci@1211 {
+ compatible = samsung,exynos-ehci;
+ reg = 0x1211 0x100;
+ phyreg = 0x1213;
+ };
+
};
--
1.7.4.4
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[U-Boot] [PATCH 3/3 V2] EXYNOS5: FDT: Add compatible strings for USB
Add required compatible information for USB
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None.
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 5934af1..c464d58 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -74,6 +74,7 @@ enum fdt_compat_id {
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
+ COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6bc57c5..eb2ff6c 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -51,6 +51,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
COMPAT(MAXIM_MAX77686_PMIC, maxim,MAX77686_PMIC),
+ COMPAT(SAMSUNG_EXYNOS_EHCI, samsung,exynos-ehci),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.7.4.4
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[U-Boot] [PATCH resend] usbh/ehci: Increase timeout for enumeration
Few pen drives take longer than usual for enumeration. The u-boot unlike linux
does not depend on interrupts and works in polling and timeout mode.
This patch increases this timeout to increase the set of usb sticks that can be
enumerated by u-boot
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
common/usb_hub.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/common/usb_hub.c b/common/usb_hub.c
index e4a1201..24de9b7 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -393,17 +393,34 @@ static int usb_hub_configure(struct usb_device *dev)
: no );
usb_hub_power_on(hub);
+ mdelay(1500);
+
for (i = 0; i dev-maxchild; i++) {
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
unsigned short portstatus, portchange;
+ int ret;
+ ulong start = get_timer(0);
+
+ do {
+ ret = usb_get_port_status(dev, i + 1, portsts);
+ if (ret 0) {
+ USB_HUB_PRINTF(get_port_status failed\n);
+ break;
+ }
+
+ portstatus = le16_to_cpu(portsts-wPortStatus);
+ portchange = le16_to_cpu(portsts-wPortChange);
+
+ if ((portchange USB_PORT_STAT_C_CONNECTION)
+ (portstatus USB_PORT_STAT_CONNECTION))
+ break;
- if (usb_get_port_status(dev, i + 1, portsts) 0) {
- USB_HUB_PRINTF(get_port_status failed\n);
+ mdelay(100);
+ } while (get_timer(start) CONFIG_SYS_HZ * 10);
+
+ if (ret 0)
continue;
- }
- portstatus = le16_to_cpu(portsts-wPortStatus);
- portchange = le16_to_cpu(portsts-wPortChange);
USB_HUB_PRINTF(Port %d Status %X Change %X\n,
i + 1, portstatus, portchange);
--
1.8.0
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[U-Boot] [PATCH resend] sdhci: Add sdhci support for spear devices
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/mmc/Makefile | 1 +
drivers/mmc/spear_sdhci.c | 44
2 files changed, 45 insertions(+)
create mode 100644 drivers/mmc/spear_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index a1dd730..01dd61d 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -45,6 +45,7 @@ COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
COBJS-$(CONFIG_SDHCI) += sdhci.o
COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o
+COBJS-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
COBJS-$(CONFIG_DWMMC) += dw_mmc.o
diff --git a/drivers/mmc/spear_sdhci.c b/drivers/mmc/spear_sdhci.c
new file mode 100644
index 000..23f1f4b
--- /dev/null
+++ b/drivers/mmc/spear_sdhci.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2012
+ * Vipin Kumar, ST Micoelectronics, vipin.ku...@st.com.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include common.h
+#include malloc.h
+#include sdhci.h
+
+int spear_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
+{
+ struct sdhci_host *host = NULL;
+ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!host) {
+ printf(sdhci host malloc fail!\n);
+ return 1;
+ }
+
+ host-name = sdhci;
+ host-ioaddr = (void *)regbase;
+ host-quirks = quirks;
+
+ if (quirks SDHCI_QUIRK_REG32_RW)
+ host-version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) 16;
+ else
+ host-version = sdhci_readw(host, SDHCI_HOST_VERSION);
+
+ add_sdhci(host, max_clk, min_clk);
+ return 0;
+}
--
1.8.0
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[U-Boot] [PATCH resend] spi/arm-pl022: Add support for ARM PL022 spi controller
From: Armando Visconti armando.visco...@st.com
This patch adds the support for the ARM PL022 SPI controller for the standard
variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX FIFO.
Signed-off-by: Armando Visconti armando.visco...@st.com
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
Dear Wolfgang, Stefan,
There seems to be no direct owner of spi framework. So, I am directing this
patch to you
Regards
Vipin
drivers/spi/Makefile| 1 +
drivers/spi/pl022_spi.c | 308
2 files changed, 309 insertions(+)
create mode 100644 drivers/spi/pl022_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 824d357..3a4e4b0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
+COBJS-$(CONFIG_PL022_SPI) += pl022_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
COBJS-$(CONFIG_SH_SPI) += sh_spi.o
COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c
new file mode 100644
index 000..3ea769a
--- /dev/null
+++ b/drivers/spi/pl022_spi.c
@@ -0,0 +1,308 @@
+/*
+ * (C) Copyright 2012
+ * Armando Visconti, ST Microelectronics, armando.visco...@st.com.
+ *
+ * Driver for ARM PL022 SPI Controller. Based on atmel_spi.c
+ * by Atmel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include malloc.h
+#include spi.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+/* SSP registers mapping */
+#define SSP_CR00x000
+#define SSP_CR10x004
+#define SSP_DR 0x008
+#define SSP_SR 0x00C
+#define SSP_CPSR 0x010
+#define SSP_IMSC 0x014
+#define SSP_RIS0x018
+#define SSP_MIS0x01C
+#define SSP_ICR0x020
+#define SSP_DMACR 0x024
+#define SSP_ITCR 0x080
+#define SSP_ITIP 0x084
+#define SSP_ITOP 0x088
+#define SSP_TDR0x08C
+
+#define SSP_PID0 0xFE0
+#define SSP_PID1 0xFE4
+#define SSP_PID2 0xFE8
+#define SSP_PID3 0xFEC
+
+#define SSP_CID0 0xFF0
+#define SSP_CID1 0xFF4
+#define SSP_CID2 0xFF8
+#define SSP_CID3 0xFFC
+
+/* SSP Control Register 0 - SSP_CR0 */
+#define SSP_CR0_SPO(0x1 6)
+#define SSP_CR0_SPH(0x1 7)
+#define SSP_CR0_8BIT_MODE (0x07)
+#define SSP_SCR_MAX(0xFF)
+#define SSP_SCR_SHFT 8
+
+/* SSP Control Register 0 - SSP_CR1 */
+#define SSP_CR1_MASK_SSE (0x1 1)
+
+#define SSP_CPSR_MAX (0xFE)
+
+/* SSP Status Register - SSP_SR */
+#define SSP_SR_MASK_TFE(0x1 0) /* Transmit FIFO empty */
+#define SSP_SR_MASK_TNF(0x1 1) /* Transmit FIFO not full */
+#define SSP_SR_MASK_RNE(0x1 2) /* Receive FIFO not empty */
+#define SSP_SR_MASK_RFF(0x1 3) /* Receive FIFO full */
+#define SSP_SR_MASK_BSY(0x1 4) /* Busy Flag */
+
+struct pl022_spi_slave {
+ struct spi_slave slave;
+ void *regs;
+ unsigned int freq;
+};
+
+static inline struct pl022_spi_slave *to_pl022_spi(struct spi_slave *slave)
+{
+ return container_of(slave, struct pl022_spi_slave, slave);
+}
+
+/*
+ * Following three functions should be provided by the
+ * board support package.
+ */
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+ __attribute__((weak, alias(__spi_cs_is_valid)));
+void spi_cs_activate(struct spi_slave *slave)
+ __attribute__((weak, alias(__spi_cs_activate)));
+void spi_cs_deactivate(struct spi_slave *slave)
+ __attribute__((weak, alias(__spi_cs_deactivate)));
+
+int __spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return 1;
+}
+
+void __spi_cs_activate(struct spi_slave *slave)
+{
+ /* do nothing */
+}
+
+void __spi_cs_deactivate(struct spi_slave *slave)
+{
+ /* do nothing */
+}
+
+void spi_init()
+{
+ /* do nothing */
+}
+
+/*
+ * ARM PL022 exists in different 'flavors'.
+ * This drivers currently support the standard variant (0x00041022), that has a
+ * 16bit wide and 8 locations deep TX/RX FIFO.
+ */
Re: [U-Boot] [PATCH resend] usbh/ehci: Increase timeout for enumeration
On 12/6/2012 12:17 PM, Igor Grinberg wrote:
On 12/06/12 08:30, Vipin Kumar wrote:
Few pen drives take longer than usual for enumeration. The u-boot unlike linux
does not depend on interrupts and works in polling and timeout mode.
This patch increases this timeout to increase the set of usb sticks that can be
enumerated by u-boot
Signed-off-by: Vipin Kumarvipin.ku...@st.com
---
common/usb_hub.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/common/usb_hub.c b/common/usb_hub.c
index e4a1201..24de9b7 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -393,17 +393,34 @@ static int usb_hub_configure(struct usb_device *dev)
: no );
usb_hub_power_on(hub);
+ mdelay(1500);
a 1.5 seconds? This looks like a huge overkill...
Even for broken usb sticks...
Yes, but we are not talking about performance in u-boot. And since we
are working in a polling mode, we only have 1 chance to detect the pen-drive
+
for (i = 0; i dev-maxchild; i++) {
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
unsigned short portstatus, portchange;
+ int ret;
+ ulong start = get_timer(0);
+
+ do {
+ ret = usb_get_port_status(dev, i + 1, portsts);
+ if (ret 0) {
+ USB_HUB_PRINTF(get_port_status failed\n);
+ break;
+ }
+
+ portstatus = le16_to_cpu(portsts-wPortStatus);
+ portchange = le16_to_cpu(portsts-wPortChange);
+
+ if ((portchange USB_PORT_STAT_C_CONNECTION)
+ (portstatus USB_PORT_STAT_CONNECTION))
+ break;
- if (usb_get_port_status(dev, i + 1, portsts) 0) {
- USB_HUB_PRINTF(get_port_status failed\n);
+ mdelay(100);
+ } while (get_timer(start) CONFIG_SYS_HZ * 10);
+
+ if (ret 0)
continue;
- }
- portstatus = le16_to_cpu(portsts-wPortStatus);
- portchange = le16_to_cpu(portsts-wPortChange);
USB_HUB_PRINTF(Port %d Status %X Change %X\n,
i + 1, portstatus, portchange);
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[U-Boot] [PATCH resend 1/2] net/designware: Do not select MIIPORT for RGMII interface
Do not select MIIPORT for RGMII interface
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/net/designware.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index bf21a08..46f6601 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -113,7 +113,9 @@ static int mac_reset(struct eth_device *dev)
int timeout = CONFIG_MACRESET_TIMEOUT;
writel(DMAMAC_SRST, dma_p-busmode);
- writel(MII_PORTSELECT, mac_p-conf);
+
+ if (priv-interface != PHY_INTERFACE_MODE_RGMII)
+ writel(MII_PORTSELECT, mac_p-conf);
start = get_timer(0);
while (get_timer(start) timeout) {
--
1.8.0
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[U-Boot] [PATCH resend 2/2] net/macb: Add arch specific routine to get mdio control
From: Shiraz Hashim shiraz.has...@st.com
SPEAr310 and SPEAr320 Ethernet interfaces share same MDIO lines to control their
respective phys. Currently their is a fixed configuration in which only a
particular MAC can use the MDIO lines.
Call an arch specific function to take control of specific mdio lines at
runtime.
Signed-off-by: Shiraz Hashim shiraz.has...@st.com
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
drivers/net/macb.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 8bacbda..45fbbd7 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -163,6 +163,13 @@ static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
return MACB_BFEXT(DATA, frame);
}
+static void __def_arch_get_mdio_control(const char *name)
+{
+ return;
+}
+int arch_get_mdio_control(const char *name)
+ __attribute__((weak, alias(__def_arch_get_mdio_control)));
+
#if defined(CONFIG_CMD_MII)
int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
@@ -173,6 +180,7 @@ int macb_miiphy_read(const char *devname, u8 phy_adr, u8
reg, u16 *value)
if ( macb-phy_addr != phy_adr )
return -1;
+ arch_get_mdio_control(devname);
*value = macb_mdio_read(macb, reg);
return 0;
@@ -186,6 +194,7 @@ int macb_miiphy_write(const char *devname, u8 phy_adr, u8
reg, u16 value)
if ( macb-phy_addr != phy_adr )
return -1;
+ arch_get_mdio_control(devname);
macb_mdio_write(macb, reg, value);
return 0;
@@ -377,6 +386,7 @@ static int macb_phy_init(struct macb_device *macb)
int media, speed, duplex;
int i;
+ arch_get_mdio_control(netdev-name);
#ifdef CONFIG_MACB_SEARCH_PHY
/* Auto-detect phy_addr */
if (!macb_phy_find(macb)) {
--
1.8.0
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[U-Boot] [PATCH] fsmc: Skip BBT scan for bad block management
This patch forces to read the bad block marker from location 0 in large page nand devices and location 5 in small page devices. Signed-off-by: Vipin Kumar vipin.ku...@st.com Reviewed-by: Shiraz Hashim shiraz.has...@st.com --- drivers/mtd/nand/fsmc_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index 7a61d88..bce4298 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -433,7 +433,7 @@ int fsmc_nand_init(struct nand_chip *nand) writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, fsmc_regs_p-attrib); - nand-options = 0; + nand-options = NAND_SKIP_BBTSCAN; #if defined(CONFIG_SYS_FSMC_NAND_16BIT) nand-options |= NAND_BUSWIDTH_16; #endif -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RESEND 0/4] fs:ext4:fix: Fixes for ext4write command
Hi Tom, -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 12/05/12 13:06, Lukasz Majewski wrote: Several fixes for ext4write command including: - compiler warnings suppress - lldiv() and do_div() instead of plain / and % operands for 64-32 bits - Proper initialization of dev_desc - Proper definition of cache aligned filename buffer Lukasz Majewski (4): fs:ext4:write: Add lldiv and do_div to perform 64-32 bits division fs:ext4:write: Store block device descriptor in file system structure fs:ext4:fix: Code refactoring to suppress compiler warnings fs:ext4:write: Initialize cache aligned filename buffer fs/ext4/dev.c |1 + fs/ext4/ext4_common.c | 14 ++ fs/ext4/ext4_journal.c |3 +-- fs/ext4/ext4fs.c | 13 ++--- 4 files changed, 18 insertions(+), 13 deletions(-) OK, I know the wiki talks about resends, but has anything changed from the last go-round? Thanks! From the initial post, Simon Glass has acked one commit (3/4). Moreover I've removed from the series TRATS dependent code and replaced it with another fix (in the patch 4/4). Due to that the patch set consists of only ext4 write related fixes. I see it as an improvement when compared to the first round of patches. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://www.enigmail.net/ iQIcBAEBAgAGBQJQv5wZAAoJENk4IS6UOR1WQFwP/juJGARGm/7f/Fyoy2UueWRq K3NPEYuMLP+jyBjIno4jaZ1vkHceUv//1OLH3yUrgIF+CyUQAzLVtogxSXE+x444 i7vMs19jCJgw3i1P0wnnxqijaHnHLYQIiY2nCJzJ65wWO+gZv6lJ0okg319uxaTS fe5HQzz+puLFIDLQUEavyotAWrVoG1xoxsJXc1LQ7iyRvzqgCWHvURzCmZ4m6pJI WdZwLRRhS8/FSA7ILHlNmOTxWbMAPShb5HZ36QpsFa7LXAbXF0xh4N33AqDapLtA dyJyjbiYxBYH9Jv/qK+Szt/DCwFqteBwcRXBL5wG2LF+CuTKhvLAmC7qi41SUa5E O6T5etbbwjIB23g6ImRNAEJfW0OItZ5l12VXAHRYzIN0t2zTGqp0a4bfvKEOqa4U nVL4f0xYes/WtoZiNVD+Jeck1VAIGOyvir/7QvIJun+9OmCfdBHkbZWb4LUsa/Hh lWfpiASQ/fTYaFY9UfiV9zntcOgUacrQumroznz6JHhaTsNTwgkO4v6Xu11SkdId a3DkN/TKk9T6Km6mpIfggIGFrvw8rBL2CPAh7GCMrOx2EZyoXfqYSy6SQs5XRysJ jHu/7pjm0Fxjt9o6roaDivkJDRley6EWGVm0oFOqCDNt4goQNWslZnYMOcQb3b06 vUd3b7N9YO/JeyQbz+c+ =tm/c -END PGP SIGNATURE- -- Best regards, Lukasz Majewski Samsung Poland RD Center | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend 0/7] mtd/st_smi: Add fixes for smi driver
Hi Vipin, On 12/06/2012 07:21 AM, Vipin Kumar wrote: Hello, This patch-set adds simple fixes for smi driver used in spear devices. Modifications include - Add MTD support for smi driver - Write to flash in a tight loop - Alphabetically sort the list of devices - Avoid issuing multiple write enable commands PS: Wolfgang, Stefan, I am directing these to you as there is no direct maintainer of mtd in u-boot. I can add these in my pull-request once you review these patches Since I'm the CFI (NOR parallel) flash custodian, I can take these patches through my repository as well. If there is a dependency with some of your platforms patches, then the patches can go through your ST repo as well, after successful review. Reviewing in a minute... Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend] usbh/ehci: Increase timeout for enumeration
On 12/06/12 08:58, Vipin Kumar wrote:
On 12/6/2012 12:17 PM, Igor Grinberg wrote:
On 12/06/12 08:30, Vipin Kumar wrote:
Few pen drives take longer than usual for enumeration. The u-boot unlike
linux
does not depend on interrupts and works in polling and timeout mode.
This patch increases this timeout to increase the set of usb sticks that
can be
enumerated by u-boot
Signed-off-by: Vipin Kumarvipin.ku...@st.com
---
common/usb_hub.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/common/usb_hub.c b/common/usb_hub.c
index e4a1201..24de9b7 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -393,17 +393,34 @@ static int usb_hub_configure(struct usb_device *dev)
: no );
usb_hub_power_on(hub);
+mdelay(1500);
a 1.5 seconds? This looks like a huge overkill...
Even for broken usb sticks...
Yes, but we are not talking about performance in u-boot. And since we are
working in a polling mode, we only have 1 chance to detect the pen-drive
Of course we _do care_ about performance and 1.5 seconds is huge and not
justified impact.
Where is this value come from? Any real justification? Or just: lets make it
huge...
Also, as I understand from your commit message, this is needed only for broken
pens...
Why should all others suffer?
If this is really needed, I think you can do better then this.
For example instead of waiting 1.5 seconds no meter what each time,
make it a busy/wait loop (like you do below) and expire after a timeout.
+
for (i = 0; i dev-maxchild; i++) {
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
unsigned short portstatus, portchange;
+int ret;
+ulong start = get_timer(0);
+
+do {
+ret = usb_get_port_status(dev, i + 1, portsts);
+if (ret 0) {
+USB_HUB_PRINTF(get_port_status failed\n);
+break;
+}
+
+portstatus = le16_to_cpu(portsts-wPortStatus);
+portchange = le16_to_cpu(portsts-wPortChange);
+
+if ((portchange USB_PORT_STAT_C_CONNECTION)
+(portstatus USB_PORT_STAT_CONNECTION))
+break;
-if (usb_get_port_status(dev, i + 1, portsts) 0) {
-USB_HUB_PRINTF(get_port_status failed\n);
+mdelay(100);
+} while (get_timer(start) CONFIG_SYS_HZ * 10);
+
+if (ret 0)
continue;
-}
-portstatus = le16_to_cpu(portsts-wPortStatus);
-portchange = le16_to_cpu(portsts-wPortChange);
USB_HUB_PRINTF(Port %d Status %X Change %X\n,
i + 1, portstatus, portchange);
--
Regards,
Igor.
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Re: [U-Boot] [PATCH resend 1/7] mtd/st_smi: Clear error flags while initiating a fresh write
On 12/06/2012 07:21 AM, Vipin Kumar wrote: SMI controller reports an error when the code tries to write on the flash area with Write Enable command not issued or the bank has come out of the write mode. This error is reported even with a fresh write once the ERF1 or ERF2 is set. Clear these flags while initiating a fresh write Signed-off-by: Vipin Kumar vipin.ku...@st.com --- drivers/mtd/st_smi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c index 7507e5d..fad4420 100644 --- a/drivers/mtd/st_smi.c +++ b/drivers/mtd/st_smi.c @@ -392,6 +392,8 @@ static int smi_write(unsigned int *src_addr, unsigned int *dst_addr, return -1; } + writel(readl(smicntl-smi_sr) ~(ERF1 | ERF2), smicntl-smi_sr); Better use: clrbits_le32(smicntl-smi_sr, ERF1 | ERF2) Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH resend 3/7] mtd/st_smi: Add support for Micron N25Q128 Flash
On 12/06/2012 07:21 AM, Vipin Kumar wrote: From: Armando Visconti armando.visco...@st.com Signed-off-by: Armando Visconti armando.visco...@st.com Acked-by: Stefan Roese s...@denx.de Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
