Re: [U-Boot] [PATCH 4/4 V3] EXYNOS: Move files from board/samsung to arch/arm

2013-07-04 Thread Rajeshwari Birje
Hi Minkyu Kang,

On Thu, Jul 4, 2013 at 11:27 AM, Minkyu Kang mk7.k...@samsung.com wrote:
 On 04/07/13 14:27, Rajeshwari Birje wrote:
 Hi Minkyu Kang,

 On Thu, Jul 4, 2013 at 7:31 AM, Minkyu Kang mk7.k...@samsung.com wrote:
 diff --git a/arch/arm/include/asm/arch-exynos/cpu.h 
 b/arch/arm/include/asm/arch-exynos/cpu.h
 index 36b98c8..75dbe26 100644
 --- a/arch/arm/include/asm/arch-exynos/cpu.h
 +++ b/arch/arm/include/asm/arch-exynos/cpu.h
 @@ -115,7 +115,7 @@
  #define EXYNOS5_DMC_PHY0_BASE0x10C0
  #define EXYNOS5_DMC_PHY1_BASE0x10C1

 maybe it can be dmc0 and dmc1
 If you want to keep the interface with exynos4.
 EXYNOS4 donot have seperate Phy controller it is a part of  DMC controller.
 then I need to add following for EXYNOS4
 EXYNOS4_DMC_PHY1_BASEDEVICE_NOT_AVAILABLE
 EXYNOS4_DMC_PHY_BASE   DEVICE_NOT_AVAILABLE


  #define EXYNOS5_GPIO_PART3_BASE  0x10D1
 -#define EXYNOS5_DMC_CTRL_BASE0x10DD
 +#define EXYNOS5_DMC0_BASE0x10DD

 why?
 if we want to make funstion to get the DMC base address it is needed
 to be added for EXYNOS5 as well
 hence made this change.

  #define EXYNOS5_GPIO_PART1_BASE  0x1140
  #define EXYNOS5_MIPI_DSIM_BASE   0x11D0
  #define EXYNOS5_USB_HOST_EHCI_BASE   0x1211
 @@ -135,6 +135,7 @@

  #define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE
  #define EXYNOS5_MODEM_BASE   DEVICE_NOT_AVAILABLE
 +#define EXYNOS5_DMC1_BASEDEVICE_NOT_AVAILABLE

 It looks weird.
 Since EXYNOS4 has 2 DMC controllers and EXYNOS5 has only 1 DMC
 controller I had to add this to avoid compilation error.
 Please do let me know if  you are fine with these changes.


 I suggest following.
 Needed a clarification:

 EXYNOS4_DMC_BASE0x-
 EXYNOS4_DMC_PHY_BASEDEVICE_NOT_AVAILABLE
 But we have 2 DMC controller DMC0 and DMC1
 so it will be  EXYNOS4_DMC0_BASE and  EXYNOS4_DMC1_BASE
 EXYNOS4_DMC1_BASE not available in EXYNOS5

 no.
 It means.. DO NOT define dmc0 and dmc1 separately.
 We need dmc base and we can access  dmc1.
 For example, uart have 4 devices but we defined uart0 address as UART's base.
 and access by offset.

 u32 offset = dev_index * sizeof(struct s5p_uart);
 return (struct s5p_uart *)(samsung_get_base_uart() + offset);
Thank you for clarification. Will make this change and send a new patch set.



 EXYNOS4X12_DMC_BASE 0x-
 EXYNOS4X12_DMC_PHY_BASE DEVICE_NOT_AVAILABLE

 EXYNOS5_DMC_PHY_BASE0x-
 It has 2 phy controllers so it would be EXYNOS5_DMC_PHY0_BASE and
 EXYNOS5_DMC_PHY1_BASE and it would be DEVICE_NOT_AVAILABLE in other 2
 SOC

 no.


 EXYNOS5_DMC_BASE0x-

 then we need to add 2 SAMSUNG_BASE.

 SAMSUNG_BASE(dmc, DMC_BASE)
 SAMSUNG_BASE(dmc_phy, DMC_PHY_BASE)

 and we can access dmc1 and dmc phy1 by offset.

 What do you think about it?

 Thanks,
 Minkyu Kang.

-- 
Regards,
Rajeshwari Shinde
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Re: [U-Boot] [PATCH 2/2] PPC MPC83xx: Fix MPC8323ERDB build warning

2013-07-04 Thread Wolfgang Denk
Dear Timur Tabi,

In message caozdjxwikugm5woxq5nwkpnbugoeuslozpsbt1jjln2c+m+...@mail.gmail.com 
you wrote:
 On Fri, Jun 28, 2013 at 4:47 PM, Andy Fleming aflem...@gmail.com wrote:
 
  Well, he hasn't been at Freescale for years, now, so that's not surprising.
  It's not entirely clear to me whether that board is one we actively
  support, but I suspect we can get away with maintenance moving over to Kim.
  That said, I guess I shouldn't volunteer him. :)
 
 There's been a lot of churn at Freescale over the past couple years.
 I think a lot of the email addresses are no longer valid.  It's
 probably time for an update.
 
 For the record, I actually have an mpc8323erdb.  I'm not sure if I
 want to be the maintainer for it, though.

Well, while you're discussing a potential new maintainer for this
board, can please anybody ACK/NAK or - even better - pull that patch
so we can fix the build warnings for the release?

Thanks.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
This is now.  Later is later.
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[U-Boot] [PATCH 2/4 V4] EXYNOS: LDS file move to common

2013-07-04 Thread Rajeshwari Shinde
smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused.
It is renamed to exynos-uboot-spl.lds

Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- None
 .../exynos-uboot-spl.lds}  |0
 include/configs/exynos5250-dt.h|2 +-
 2 files changed, 1 insertions(+), 1 deletions(-)
 rename board/samsung/{smdk5250/smdk5250-uboot-spl.lds = 
common/exynos-uboot-spl.lds} (100%)

diff --git a/board/samsung/smdk5250/smdk5250-uboot-spl.lds 
b/board/samsung/common/exynos-uboot-spl.lds
similarity index 100%
rename from board/samsung/smdk5250/smdk5250-uboot-spl.lds
rename to board/samsung/common/exynos-uboot-spl.lds
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 1c9eca2..6c7a052 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -153,7 +153,7 @@
 #define COPY_BL2_FNPTR_ADDR0x02020030
 
 /* specific .lds file */
-#define CONFIG_SPL_LDSCRIPTboard/samsung/smdk5250/smdk5250-uboot-spl.lds
+#define CONFIG_SPL_LDSCRIPTboard/samsung/common/exynos-uboot-spl.lds
 #define CONFIG_SPL_TEXT_BASE   0x02023400
 #define CONFIG_SPL_MAX_FOOTPRINT   (14 * 1024)
 
-- 
1.7.4.4

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[U-Boot] [PATCH 1/4 V4] EXYNOS: Add API for power reset and exit wakeup

2013-07-04 Thread Rajeshwari Shinde
This patch adds APIs to get power reset status and exit the wakeup condition for
both exynos5 and exynos4

Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Expanded the comments for get_reset_status function declaration.
Changes in V3:
- None
Changes in V4:
- None
 arch/arm/cpu/armv7/exynos/power.c|   50 ++
 arch/arm/include/asm/arch-exynos/power.h |   12 +++
 2 files changed, 62 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/power.c 
b/arch/arm/cpu/armv7/exynos/power.c
index 6375a81..5d3bda2 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -140,3 +140,53 @@ void set_hw_thermal_trip(void)
setbits_le32(power-ps_hold_control, POWER_ENABLE_HW_TRIP);
}
 }
+
+static uint32_t exynos5_get_reset_status(void)
+{
+   struct exynos5_power *power =
+   (struct exynos5_power *)samsung_get_base_power();
+
+   return power-inform1;
+}
+
+static uint32_t exynos4_get_reset_status(void)
+{
+   struct exynos4_power *power =
+   (struct exynos4_power *)samsung_get_base_power();
+
+   return power-inform1;
+}
+
+uint32_t get_reset_status(void)
+{
+   if (cpu_is_exynos5())
+   return exynos5_get_reset_status();
+   else
+   return  exynos4_get_reset_status();
+}
+
+static void exynos5_power_exit_wakeup(void)
+{
+   struct exynos5_power *power =
+   (struct exynos5_power *)samsung_get_base_power();
+   typedef void (*resume_func)(void);
+
+   ((resume_func)power-inform0)();
+}
+
+static void exynos4_power_exit_wakeup(void)
+{
+   struct exynos4_power *power =
+   (struct exynos4_power *)samsung_get_base_power();
+   typedef void (*resume_func)(void);
+
+   ((resume_func)power-inform0)();
+}
+
+void power_exit_wakeup(void)
+{
+   if (cpu_is_exynos5())
+   exynos5_power_exit_wakeup();
+   else
+   exynos4_power_exit_wakeup();
+}
diff --git a/arch/arm/include/asm/arch-exynos/power.h 
b/arch/arm/include/asm/arch-exynos/power.h
index 3549667..44ad8d3 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -888,4 +888,16 @@ void set_ps_hold_ctrl(void);
  * source as XXTI
  */
 void set_xclkout(void);
+
+/*
+ *  Read inform1 to get the reset status.
+ *  @return: the value can be either S5P_CHECK_SLEEP or
+ *  S5P_CHECK_DIDLE or S5P_CHECK_LPA as stored in inform1
+ *  if none of these then its normal booting.
+ */
+uint32_t get_reset_status(void);
+
+
+/* Read the resume function and call it */
+void power_exit_wakeup(void);
 #endif
-- 
1.7.4.4

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[U-Boot] [PATCH 3/4 V4] EXYNOS4210: Configure GPIO for uart

2013-07-04 Thread Rajeshwari Shinde
This patch configures the gpio values for UART
on Origen and SMDKV310 using pinmux

Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- None
 arch/arm/cpu/armv7/exynos/pinmux.c |   40 +++
 board/samsung/origen/origen.c  |   46 
 board/samsung/smdkv310/smdkv310.c  |   46 
 include/configs/origen.h   |1 +
 include/configs/smdkv310.h |1 +
 5 files changed, 134 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
index bd499b4..2042062 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -408,9 +408,49 @@ static int exynos4_mmc_config(int peripheral, int flags)
return 0;
 }
 
+static void exynos4_uart_config(int peripheral)
+{
+   struct exynos4_gpio_part1 *gpio1 =
+   (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
+   struct s5p_gpio_bank *bank;
+   int i, start, count;
+
+   switch (peripheral) {
+   case PERIPH_ID_UART0:
+   bank = gpio1-a0;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART1:
+   bank = gpio1-a0;
+   start = 4;
+   count = 4;
+   break;
+   case PERIPH_ID_UART2:
+   bank = gpio1-a1;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART3:
+   bank = gpio1-a1;
+   start = 4;
+   count = 2;
+   break;
+   }
+   for (i = start; i  start + count; i++) {
+   s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+   }
+}
 static int exynos4_pinmux_config(int peripheral, int flags)
 {
switch (peripheral) {
+   case PERIPH_ID_UART0:
+   case PERIPH_ID_UART1:
+   case PERIPH_ID_UART2:
+   case PERIPH_ID_UART3:
+   exynos4_uart_config(peripheral);
+   break;
case PERIPH_ID_I2C0:
case PERIPH_ID_I2C1:
case PERIPH_ID_I2C2:
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index 638e7b1..b7dbb91 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -25,6 +25,8 @@
 #include asm/arch/cpu.h
 #include asm/arch/gpio.h
 #include asm/arch/mmc.h
+#include asm/arch/periph.h
+#include asm/arch/pinmux.h
 
 DECLARE_GLOBAL_DATA_PTR;
 struct exynos4_gpio_part1 *gpio1;
@@ -39,6 +41,50 @@ int board_init(void)
return 0;
 }
 
+static int board_uart_init(void)
+{
+   int err;
+
+   err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART0 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART1 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART2 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART3 not configured\n);
+   return err;
+   }
+
+   return 0;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+   int err;
+   err = board_uart_init();
+   if (err) {
+   debug(UART init failed\n);
+   return err;
+   }
+   return err;
+}
+#endif
+
 int dram_init(void)
 {
gd-ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
diff --git a/board/samsung/smdkv310/smdkv310.c 
b/board/samsung/smdkv310/smdkv310.c
index 81ac8f6..015b920 100644
--- a/board/samsung/smdkv310/smdkv310.c
+++ b/board/samsung/smdkv310/smdkv310.c
@@ -26,6 +26,8 @@
 #include asm/arch/cpu.h
 #include asm/arch/gpio.h
 #include asm/arch/mmc.h
+#include asm/arch/periph.h
+#include asm/arch/pinmux.h
 #include asm/arch/sromc.h
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -137,3 +139,47 @@ int board_mmc_init(bd_t *bis)
return err;
 }
 #endif
+
+static int board_uart_init(void)
+{
+   int err;
+
+   err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART0 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART1 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART2 not configured\n);
+   return err;
+  

[U-Boot] [PATCH 0/4 V4]EXYNOS: Convert Assembly code to c and make it common

2013-07-04 Thread Rajeshwari Shinde
Convert the assembly code in board/samsung to c and move the same to arch/arm.
lds file made common across SMDKV310, Origen and SMDK5250.
Add the power reset and exit wakeup api for exynos.
Initialise GPIO for uart in Origen and SMDKV310 using pinmux.

Changes in V2:
- Rebased on latest u-boot-samsung tree.
- Incorporated review comments from Simon glass and
Minkyu Kang.
Changes in V3:
- Optimised the mem_ctrl_init function for exynos4.
- Removed magic numbers.
Changes in V4:
- Used samsung_get_base api instead of hardcoding base address.

Rajeshwari Shinde (4):
  EXYNOS: Add API for power reset and exit wakeup
  EXYNOS: LDS file move to common
  EXYNOS4210: Configure GPIO for uart
  EXYNOS: Move files from board/samsung to arch/arm

 arch/arm/cpu/armv7/exynos/Makefile |   17 +-
 .../arm/cpu/armv7/exynos}/clock_init.h |0
 arch/arm/cpu/armv7/exynos/clock_init_exynos4.c |   95 +
 .../arm/cpu/armv7/exynos/clock_init_exynos5.c  |   56 ++--
 arch/arm/cpu/armv7/exynos/common_setup.h   |   45 ++
 .../arm/cpu/armv7/exynos}/dmc_common.c |7 +-
 .../arm/cpu/armv7/exynos}/dmc_init_ddr3.c  |   27 +-
 arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c   |  213 ++
 .../arm/cpu/armv7/exynos/exynos4_setup.h   |  397 +--
 .../arm/cpu/armv7/exynos/exynos5_setup.h   |   28 +-
 arch/arm/cpu/armv7/exynos/lowlevel_init.c  |   73 
 arch/arm/cpu/armv7/exynos/pinmux.c |   40 ++
 arch/arm/cpu/armv7/exynos/power.c  |   50 +++
 .../arm/cpu/armv7/exynos}/spl_boot.c   |   74 +++-
 arch/arm/include/asm/arch-exynos/cpu.h |   13 +-
 arch/arm/include/asm/arch-exynos/power.h   |   12 +
 .../exynos-uboot-spl.lds}  |0
 board/samsung/origen/Makefile  |   11 +-
 board/samsung/origen/lowlevel_init.S   |  357 -
 board/samsung/origen/mem_setup.S   |  421 
 board/samsung/origen/mmc_boot.c|   58 ---
 board/samsung/origen/origen.c  |   46 +++
 board/samsung/smdk5250/Makefile|   14 +-
 board/samsung/smdkv310/Makefile|   10 +-
 board/samsung/smdkv310/lowlevel_init.S |  414 ---
 board/samsung/smdkv310/mem_setup.S |  365 -
 board/samsung/smdkv310/mmc_boot.c  |   60 ---
 board/samsung/smdkv310/smdkv310.c  |   46 +++
 include/configs/exynos5250-dt.h|   10 +-
 include/configs/origen.h   |9 +-
 include/configs/smdkv310.h |8 +-
 31 files changed, 985 insertions(+), 1991 deletions(-)
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/clock_init.h 
(100%)
 create mode 100644 arch/arm/cpu/armv7/exynos/clock_init_exynos4.c
 rename board/samsung/smdk5250/clock_init.c = 
arch/arm/cpu/armv7/exynos/clock_init_exynos5.c (94%)
 create mode 100644 arch/arm/cpu/armv7/exynos/common_setup.h
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/dmc_common.c (97%)
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/dmc_init_ddr3.c 
(92%)
 create mode 100644 arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c
 rename board/samsung/origen/origen_setup.h = 
arch/arm/cpu/armv7/exynos/exynos4_setup.h (65%)
 rename board/samsung/smdk5250/setup.h = 
arch/arm/cpu/armv7/exynos/exynos5_setup.h (96%)
 create mode 100644 arch/arm/cpu/armv7/exynos/lowlevel_init.c
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/spl_boot.c (74%)
 rename board/samsung/{smdk5250/smdk5250-uboot-spl.lds = 
common/exynos-uboot-spl.lds} (100%)
 delete mode 100644 board/samsung/origen/lowlevel_init.S
 delete mode 100644 board/samsung/origen/mem_setup.S
 delete mode 100644 board/samsung/origen/mmc_boot.c
 delete mode 100644 board/samsung/smdkv310/lowlevel_init.S
 delete mode 100644 board/samsung/smdkv310/mem_setup.S
 delete mode 100644 board/samsung/smdkv310/mmc_boot.c

-- 
1.7.4.4

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Re: [U-Boot] [PATCH v3 5/5] ARM: at91: atmel_nand: add code to check the ONFI parameter ECC requirement

2013-07-04 Thread Josh Wu

On 7/4/2013 6:12 AM, Scott Wood wrote:

On 07/02/2013 10:11:49 PM, Josh Wu wrote:

+if (!get_onfi_ecc_param(chip, cap, sector_size))
+MTDDEBUG(MTD_DEBUG_LEVEL1, ONFI params, minimum 
required ECC: %d bits in %d bytes\n,

+*cap, *sector_size);


Use braces around multi-line if/loop bodies, even if it's a single 
statement.


Otherwise, ACK this patchset.


thanks, I'll resend this patch with braces around.



-Scott


Best Regards,
Josh Wu
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[U-Boot] [resend][PATCH v3 5/5] ARM: at91: atmel_nand: add code to check the ONFI parameter ECC requirement

2013-07-04 Thread Josh Wu
1. if CONFIG_SYS_NAND_ONFI_DETECTION is defined, driver will check NAND flash's
   ecc minimum requirement in ONFI parameter.

  a) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are defined. then use it.
 Driver will display a WARNING if the values are different from ONFI
 parameters.

  b) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are not defined, then use
  the value from ONFI parameters.
  * If ONFI ECC parameters are in ONFI extended parameter page, since we
are not support it, so assume the minimum ecc requirement is 2 bits
in 512 bytes.
  * For non-ONFI support nand flash, also assume the minimum ecc
requirement is 2 bits in 512 bytes.

2. if CONFIG_SYS_NAND_ONFI_DETECTION is not defined, just use CONFIG_PMECC_CAP
   and CONFIG_PMECC_SECTOR_SIZE.

Signed-off-by: Josh Wu josh...@atmel.com
---
resend:
  use braces around muti-line if/loop body.

v2 -- v3:
  use dev_err/info(host-dev) instead of dev_err/info(NULL).
  use MTDDEBUG() instead of pr_debug().

v1 -- v2:
  use dev_err/info to replace printk.
  fix typo mistake, that should use = instead of use .

 drivers/mtd/nand/atmel_nand.c |  130 -
 1 file changed, 128 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index a4107fd..3906be0 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -681,6 +681,99 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd)
pmecc_writel(host-pmecc, ctrl, PMECC_CTRL_ENABLE);
 }
 
+#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
+/*
+ * get_onfi_ecc_param - Get ECC requirement from ONFI parameters
+ * @ecc_bits: store the ONFI ECC correct bits capbility
+ * @sector_size: in how many bytes that ONFI require to correct @ecc_bits
+ *
+ * Returns -1 if ONFI parameters is not supported. In this case @ecc_bits,
+ * @sector_size are initialize to 0.
+ * Return 0 if success to get the ECC requirement.
+ */
+static int get_onfi_ecc_param(struct nand_chip *chip,
+   int *ecc_bits, int *sector_size)
+{
+   *ecc_bits = *sector_size = 0;
+
+   if (chip-onfi_params.ecc_bits == 0xff)
+   /* TODO: the sector_size and ecc_bits need to be find in
+* extended ecc parameter, currently we don't support it.
+*/
+   return -1;
+
+   *ecc_bits = chip-onfi_params.ecc_bits;
+
+   /* The default sector size (ecc codeword size) is 512 */
+   *sector_size = 512;
+
+   return 0;
+}
+
+/*
+ * pmecc_choose_ecc - Get ecc requirement from ONFI parameters. If
+ *pmecc_corr_cap or pmecc_sector_size is 0, then set it as
+ *ONFI ECC parameters.
+ * @host: point to an atmel_nand_host structure.
+ *if host-pmecc_corr_cap is 0 then set it as the ONFI ecc_bits.
+ *if host-pmecc_sector_size is 0 then set it as the ONFI sector_size.
+ * @chip: point to an nand_chip structure.
+ * @cap: store the ONFI ECC correct bits capbility
+ * @sector_size: in how many bytes that ONFI require to correct @ecc_bits
+ *
+ * Return 0 if success. otherwise return the error code.
+ */
+static int pmecc_choose_ecc(struct atmel_nand_host *host,
+   struct nand_chip *chip,
+   int *cap, int *sector_size)
+{
+   /* Get ECC requirement from ONFI parameters */
+   *cap = *sector_size = 0;
+   if (chip-onfi_version) {
+   if (!get_onfi_ecc_param(chip, cap, sector_size)) {
+   MTDDEBUG(MTD_DEBUG_LEVEL1, ONFI params, minimum 
required ECC: %d bits in %d bytes\n,
+   *cap, *sector_size);
+   } else {
+   dev_info(host-dev, NAND chip ECC reqirement is in 
Extended ONFI parameter, we don't support yet.\n);
+   }
+   } else {
+   dev_info(host-dev, NAND chip is not ONFI compliant, assume 
ecc_bits is 2 in 512 bytes);
+   }
+   if (*cap == 0  *sector_size == 0) {
+   /* Non-ONFI compliant or use extended ONFI parameters */
+   *cap = 2;
+   *sector_size = 512;
+   }
+
+   /* If head file doesn't specify then use the one in ONFI parameters */
+   if (host-pmecc_corr_cap == 0) {
+   /* use the most fitable ecc bits (the near bigger one ) */
+   if (*cap = 2)
+   host-pmecc_corr_cap = 2;
+   else if (*cap = 4)
+   host-pmecc_corr_cap = 4;
+   else if (*cap = 8)
+   host-pmecc_corr_cap = 8;
+   else if (*cap = 12)
+   host-pmecc_corr_cap = 12;
+   else if (*cap = 24)
+   host-pmecc_corr_cap = 24;
+   else
+   return -EINVAL;
+   }
+   if (host-pmecc_sector_size == 0) {
+   /* use the most fitable sector size (the near smaller one ) */
+   if 

Re: [U-Boot] [PATCH v2 1/7] ARM: prepare armv7.h to be included from assembly source

2013-07-04 Thread Andre Przywara
On 06/28/2013 03:00 AM, Masahiro Yamada wrote:
 Hello Andre,

Hi,

thanks a lot for the review! I included most of the fixes you proposed
in the next version I will send out soon.
Very useful comments, thanks again!

 diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
 index a73630b..20caa7c 100644
 --- a/arch/arm/include/asm/armv7.h
 +++ b/arch/arm/include/asm/armv7.h
 @@ -23,7 +23,6 @@
*/
   #ifndef ARMV7_H
   #define ARMV7_H
 -#include linux/types.h
   
   /* Cortex-A9 revisions */
   #define MIDR_CORTEX_A9_R0P10x410FC091
 @@ -57,6 +56,9 @@
   #define ARMV7_CLIDR_CTYPE_INSTRUCTION_DATA 3
   #define ARMV7_CLIDR_CTYPE_UNIFIED  4
   
 +#ifndef __ASSEMBLY__
 +#include linux/types.h
 +
   /*
* CP15 Barrier instructions
* Please note that we have separate barrier instructions in ARMv7
 @@ -74,4 +76,6 @@ void v7_outer_cache_inval_all(void);
   void v7_outer_cache_flush_range(u32 start, u32 end);
   void v7_outer_cache_inval_range(u32 start, u32 end);
   
 +#endif /* ! __ASSEMBLY__ */
 +
   #endif
 
 
 Instread of moving #include linux/types.h line,
 I'd like to suggest to add #ifndef __ASSEMBLY__ guard
 to include/linux/types.h.
 I think this is a more correct way of fixing.
 
 
 If I see Linux Kernel include/linux/types.h,
 typedefs are placed inside #ifndef  __ASSEMBLEY__ .. #endif.
 
 On the other hand, include/linux/types.h of U-Boot
 does not have #ifndef __ASSEMBLY__ guard.

I tried, but finally decided against it. It is not clear what parts of
types.h are actually usable from assembly files, so I stuck with my
solution. Feel free to send a follow-up patch if you think it's useful.

Regards,
Andre.

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Re: [U-Boot] [PATCH 2/2] am335x_evm: Update, document Falcon Mode support

2013-07-04 Thread Romain Izard
Tom +A further word of warning about using eMMC and partition tables.  When
Tom +working with SD cards we can get away with erasing small areas at a time,
Tom +however on eMMC we must keep erases aligned to eraseblocks and thus the
Tom +first erase we issue will erase the partition table.

Peter Really? I thought eMMC behaved just like SD cards?

Tom Yes, really.  We know what the erase block size is, and round our
Tom commands, probably because we really have to.  SD cards take care of
Tom things for us, for better or worse.

But why do we bother with erasing the eMMC in the first place? The erase
commands are wholly optional, and only make sense as a TRIM mechanism,
which is not our case as we will fill the memory as soon as it has been
erased.

There is no problem in writing directly in the memory, even if it has
not been erased previously. Or is it a measure to detect interrupted
writes ?

Best regards,
-- 
Romain Izard

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[U-Boot] Regression: bootz command fails in v2013.07-rc2

2013-07-04 Thread Tetsuyuki Kobayashi
Hello,

I found bootz command causes 'undefined instruction' exception
on KZM-A9-GT board (armv7) in v2013.07-rc2.

KZM-A9-GT# tftp zImage.kzm9g.v310; bootz
smc911x: detected LAN9221 controller
smc911x: phy initialized
smc911x: MAC 00:01:9b:04:04:05
Using smc911x-0 device
TFTP from server 192.168.1.110; our IP address is 192.168.1.162
Filename 'zImage.kzm9g.v310'.
Load address: 0x4300
Loading: #
 #
 #
 #
 #
 #
 #
 #
 1.8 MiB/s
done
Bytes transferred = 2453603 (257063 hex)
undefined instruction
pc : [0500661a]  lr : [5ff8c078]
sp : 5fee99d0  ip : 0001 fp : 5fee9bc5
r10: 0001  r9 : 5fee9ea8 r8 : 5fee9f48
r7 : 00010209  r6 : 00d9 r5 : 014015c5  r4 : 0500571c
r3 : 05005717  r2 : 05005717 r1 : 0014  r0 : 05005717
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...



At v2013.07-rc1, it was good.
I tried 'git bisect' and got this result.

$ git bisect good
35fc84fa1ff51e15ecd3e464dac87eb105ffed30 is the first bad commit
commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30
Author: Simon Glass s...@chromium.org
Date:   Tue Jun 11 11:14:47 2013 -0700

Refactor the bootm command to reduce code duplication

Please take a look.

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Re: [U-Boot] [PATCH v2 4/7] ARM: switch to non-secure state during bootm execution

2013-07-04 Thread Andre Przywara

On 06/28/2013 05:18 AM, Masahiro Yamada wrote:

Hi Andre.



--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -60,6 +60,8 @@ COBJS-y   += reset.o
  COBJS-y   += cache.o
  COBJS-y   += cache-cp15.o

+COBJS-$(CONFIG_ARMV7_VIRT) += virt-v7.o
+


Judging from the file name virt-v7.c,
you are thinkig this file is specific to ARMv7, aren't you?

If so, why don't you move this file
to arch/arm/cpu/armv7/ ?



+static void set_generic_timer_frequency(void)
+{
+#ifdef CONFIG_SYS_CLK_FREQ
+   unsigned int reg;
+
+   reg = read_id_pfr1();
+   if ((reg  CPUID_ARM_TIMER_MASK) == 1U  CPUID_ARM_TIMER_SHIFT)
+   asm(mcr p15, 0, %0, c14, c0, 0\n
+   : : r(CONFIG_SYS_CLK_FREQ));
+#endif


CPUID_ARM_TIMER_MASK
CPUID_ARM_TIMER_SHIFT

I think these macro names are vague.
There are Generic Timer, Global Timer, Private Timer etc.


Good point.


Unlike other parts, the care for Cortex-A9 is missing here.
To be more generic, I'd like to suggest to allow Non-secure access
to Global/Private timers before switching to non-secure state.


How about like this for armv7_switch_nonsec function?


 /* check whether the CPU supports the security extensions */
 reg = read_id_pfr1();
 if ((reg  0xF0) == 0)
 return HYP_ERR_NO_SEC_EXT;

 if ((reg  CPUID_ARM_TIMER_MASK) == 1U  CPUID_ARM_TIMER_SHIFT)
 set_generic_timer_frequency();
 else
 /* Allow Non-secure access to Global/Private timers */
 writel(0xfff, periph_base + SCU_SNSAC);


Interesting, however I don't have access to an A9 board currently to 
properly test this. So I will do the renaming and let the access to the 
other timers up to a follow-up patch.


Thanks,
Andre.



For more info about SCU Non-secure Access Control (SNSAC) Register,
please refer Cortex A9 mpcore TRM.  page 2-11
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407g/DDI0407G_cortex_a9_mpcore_r3p0_trm.pdf




+   /* enable the GIC distributor */
+   writel(readl(gicdptr[GICD_CTLR]) | 0x03, gicdptr[GICD_CTLR]);


I am not sure this code is really necessary.

Because your are setting all available interrupts to Group1 just below,
I think we don't need to do this in secure state.


Best Regards
Masahiro Yamada



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Re: [U-Boot] [PATCH v3] drivers:power:max77686: add function to set voltage and mode

2013-07-04 Thread Piotr Wilczek
Dear Minkyu Kang,

Please let me know if you have any more comments on this patch.

Also, there is another patchset to review:
http://patchwork.ozlabs.org/patch/245307/

Best regards,
Piotr Wilczek

 -Original Message-
 From: Piotr Wilczek [mailto:p.wilc...@samsung.com]
 Sent: Tuesday, June 25, 2013 10:00 AM
 To: u-boot@lists.denx.de
 Cc: Minkyu Kang; Kyungmin Park; Lukasz Majewski; Piotr Wilczek;
 Rajeshwari Shinde
 Subject: [PATCH v3] drivers:power:max77686: add function to set voltage
 and mode
 
 This patch add new functions to pmic max77686 to set voltage and mode.
 
 Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 CC: Minkyu Kang mk7.k...@samsung.com
 CC: Rajeshwari Shinde rajeshwar...@samsung.com
 
 Acked-by: Rajeshwari Shinde rajeshwar...@samsung.com
 ---
 Changes in v3:
 - removed magic values
 - used ARRAY_SIZE() for array size calculation
 - used switch case instead if else if
 - added return when pmic read error occurs
 
 Changes in v2:
 - changed printf to debug
 
  drivers/power/pmic/pmic_max77686.c |  192
 
  include/power/max77686_pmic.h  |   26 +
  2 files changed, 218 insertions(+)
 
 diff --git a/drivers/power/pmic/pmic_max77686.c
 b/drivers/power/pmic/pmic_max77686.c
 index 7fcb4c0..3960ca9 100644
 --- a/drivers/power/pmic/pmic_max77686.c
 +++ b/drivers/power/pmic/pmic_max77686.c
 @@ -30,6 +30,198 @@
 
  DECLARE_GLOBAL_DATA_PTR;
 
 +static const char max77686_buck_addr[] = {
 + 0xff, 0x10, 0x12, 0x1c, 0x26, 0x30, 0x32, 0x34, 0x36, 0x38 };
 +
 +static unsigned int max77686_ldo_volt2hex(int ldo, ulong uV) {
 + unsigned int hex = 0;
 +
 + switch (ldo) {
 + case 1:
 + case 2:
 + case 6:
 + case 7:
 + case 8:
 + case 15:
 + hex = (uV - 80) / 25000;
 + break;
 + default:
 + hex = (uV - 80) / 5;
 + }
 +
 + if (hex = 0  hex = MAX77686_LDO_VOLT_MAX_HEX)
 + return hex;
 +
 + debug(%s: %ld is wrong voltage value for LDO%d\n, __func__, uV,
 ldo);
 + return 0;
 +}
 +
 +int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV) {
 + unsigned int val, ret, hex, adr;
 +
 + if (ldo  1  ldo  26) {
 + printf(%s: %d is wrong ldo number\n, __func__, ldo);
 + return -1;
 + }
 +
 + adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
 + hex = max77686_ldo_volt2hex(ldo, uV);
 +
 + if (!hex)
 + return -1;
 +
 + ret = pmic_reg_read(p, adr, val);
 + if (ret)
 + return ret;
 +
 + val = ~MAX77686_LDO_VOLT_MASK;
 + val |= hex;
 + ret |= pmic_reg_write(p, adr, val);
 +
 + return ret;
 +}
 +
 +int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode) {
 + unsigned int val, ret, adr, mode;
 +
 + if (ldo  1  26  ldo) {
 + printf(%s: %d is wrong ldo number\n, __func__, ldo);
 + return -1;
 + }
 +
 + adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
 +
 + /* mode */
 + switch (opmode) {
 + case OPMODE_OFF:
 + mode = MAX77686_LDO_MODE_OFF;
 + break;
 + case OPMODE_STANDBY:
 + switch (ldo) {
 + case 2:
 + case 6:
 + case 7:
 + case 8:
 + case 10:
 + case 11:
 + case 12:
 + case 14:
 + case 15:
 + case 16:
 + mode = MAX77686_LDO_MODE_STANDBY;
 + break;
 + default:
 + mode = 0xff;
 + }
 + break;
 + case OPMODE_LPM:
 + mode = MAX77686_LDO_MODE_LPM;
 + break;
 + case OPMODE_ON:
 + mode = MAX77686_LDO_MODE_ON;
 + break;
 + default:
 + mode = 0xff;
 + }
 +
 + if (mode == 0xff) {
 + printf(%s: %d is not supported on LDO%d\n,
 +__func__, opmode, ldo);
 + return -1;
 + }
 +
 + ret = pmic_reg_read(p, adr, val);
 + if (ret)
 + return ret;
 +
 + val = ~MAX77686_LDO_MODE_MASK;
 + val |= mode;
 + ret |= pmic_reg_write(p, adr, val);
 +
 + return ret;
 +}
 +
 +int max77686_set_buck_mode(struct pmic *p, int buck, char opmode) {
 + unsigned int val, ret, mask, adr, size, mode, mode_shift;
 +
 + size = ARRAY_SIZE(max77686_buck_addr);
 + if (buck = size) {
 + printf(%s: %d is wrong buck number\n, __func__, buck);
 + return -1;
 + }
 +
 + adr = max77686_buck_addr[buck];
 +
 + /* mask */
 + switch (buck) {
 + case 2:
 + case 3:
 + case 4:
 + mode_shift = MAX77686_BUCK_MODE_SHIFT_2;
 + break;
 + default:
 + mode_shift = MAX77686_BUCK_MODE_SHIFT_1;
 + }
 +
 + mask = MAX77686_BUCK_MODE_MASK  mode_shift;
 +
 + /* mode */
 + switch (opmode) {
 + 

[U-Boot] [PATCH] cramfs: fix bug for wrong filename comparison

2013-07-04 Thread Holger Brunck
If we have the following entry in cramfs:
= cramfsls
 -rw-r--r--  1922689 uImage

cramfsload would also succeed if we try to do:
= cramfsload uImage_1
CRAMFS load complete: 1922689 bytes loaded to 0x10

The old code succeeds if the begin of the filename we search matches
with a filename stored in cramfs. But the searched file may have
additional characters and is therfore not the file we are looking for.
So compare also the length of the filename we search and the
filename we found in cramfs. This leads to:
= cramfsload uImage_1
can't find corresponding entry
CRAMFS LOAD ERROR0 for uImage_1!

which is the behaviour we want.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Wolfgang Denk w...@denx.de
---
 fs/cramfs/cramfs.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c
index 910955d..e578a1e 100644
--- a/fs/cramfs/cramfs.c
+++ b/fs/cramfs/cramfs.c
@@ -126,7 +126,8 @@ static unsigned long cramfs_resolve (unsigned long begin, 
unsigned long offset,
namelen--;
}
 
-   if (!strncmp (filename, name, namelen)) {
+   if (!strncmp(filename, name, namelen) 
+   (namelen == strlen(filename))) {
char *p = strtok (NULL, /);
 
if (raw  (p == NULL || *p == '\0'))
-- 
1.8.0.1

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[U-Boot] [U-boot] DFU tools copyright

2013-07-04 Thread TigerLiu
Hi, experts:
I found DFU tool code had been put in drivers/dfu directory.
Previously, it was owned by Samsung Electronics.

Because it has been merged into uboot library.
So, it could be used or released by every ARM SOC vendor?

Best wishes,
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Re: [U-Boot] [U-boot] DFU tools copyright

2013-07-04 Thread Lukasz Majewski
On Thu, 04 Jul 2013 17:20:34 +0800, tiger...@viatech.com.cn wrote:

 Hi, experts:
 I found DFU tool code had been put in drivers/dfu directory.
 Previously, it was owned by Samsung Electronics.
 

Could you be more specific here? 

All DFU related files have following headers:
/*
 * g_dnl.c -- USB Downloader Gadget
 *
 * Copyright (C) 2012 Samsung Electronics
 * Lukasz Majewski  l.majew...@samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
02111-1307  USA */

Which clearly states that the code is GPL v2+. The code is open, you
can modify it and use with your product if you provide your's product
source code when requested.


 Because it has been merged into uboot library.
 So, it could be used or released by every ARM SOC vendor?

Yes, it can as long as this vendor sticks to GPL v2 license.
This mean (with some simplification :-) ) that this vendor needs to
publish source code for his product.

 
 Best wishes,
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-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [RESEND PATCH 1/4] arm:goni: Update configuration for goni target

2013-07-04 Thread Lukasz Majewski
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com

Configuration file for GONI has been updated to support FAT file system,
new mmc partitioning scheme and read linux kernel from eMMC instead of
OneNAND.

Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
 include/configs/s5p_goni.h |   17 +
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 56e8347..ec43652 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -107,7 +107,7 @@
 
 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
 
-#define CONFIG_BOOTCOMMAND run ubifsboot
+#define CONFIG_BOOTCOMMAND run mmcboot
 
 #define CONFIG_DEFAULT_CONSOLE console=ttySAC2,115200n8\0
 
@@ -137,7 +137,7 @@
onenand erase 0x0156 0x1eaa; \
onenand write 0x3200 0x126 0x8C\0 \
bootk= \
-   onenand read 0x30007FC0 0xc0 0x60; \
+   run loaduimage; \
bootm 0x30007FC0\0 \
flashboot= \
set bootargs root=/dev/mtdblock${bootblock}  \
@@ -156,16 +156,21 @@
set bootargs  CONFIG_RAMDISK_BOOT \
 initrd=0x3300,8M ramdisk=8192\0 \
mmcboot= \
-   set bootargs root=${mmcblk} rootfstype=${rootfstype} \
+   set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart}  \
+   rootfstype=${rootfstype} \
CONFIG_UBI_MTD  ${opts} ${lcdinfo}  \
CONFIG_COMMON_BOOT ; run bootk\0 \
boottrace=setenv opts initcall_debug; run bootcmd\0 \
bootchart=set opts init=/sbin/bootchartd; run bootcmd\0 \
verify=n\0 \
-   rootfstype=cramfs\0 \
+   rootfstype=ext4\0 \
console= CONFIG_DEFAULT_CONSOLE \
mtdparts= MTDPARTS_DEFAULT \
meminfo=mem=80M mem=256M@0x4000 mem=128M@0x5000\0 \
+   loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
+   mmcdev=0\0 \
+   mmcbootpart=2\0 \
+   mmcrootpart=5\0 \
mmcblk=/dev/mmcblk1p1\0 \
bootblock=9\0 \
ubiblock=8\0 \
@@ -211,6 +216,10 @@
 
 #define CONFIG_DOS_PARTITION   1
 
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - 0x100)
 
 #define CONFIG_SYS_CACHELINE_SIZE   64
-- 
1.7.10.4

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[U-Boot] [RESEND PATCH 3/4] arm:goni: Update of GONI partitioning scheme at eMMC

2013-07-04 Thread Lukasz Majewski
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com

New partitioning scheme has been defined at GONI target. It complies with
new GPT partitioning introduced previously.

Default partition layout has been defined at s5p_goni.h

Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
 include/configs/s5p_goni.h |   44 ++--
 1 file changed, 26 insertions(+), 18 deletions(-)

diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 8a824c7..e8f2639 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -84,9 +84,9 @@
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_REGINFO
 #define CONFIG_CMD_ONENAND
-#define CONFIG_CMD_MTDPARTS
 #define CONFIG_CMD_MMC
 #define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
 
 /* USB Composite download gadget - g_dnl */
 #define CONFIG_USBDOWNLOAD_GADGET
@@ -101,26 +101,30 @@
 #define CONFIG_BOOTDELAY   1
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-
-/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
-#define MTDIDS_DEFAULT onenand0=samsung-onenand
-#define MTDPARTS_DEFAULT   mtdparts=samsung-onenand:1m(bootloader)\
-   ,256k(params)\
-   ,2816k(config)\
-   ,8m(csa)\
-   ,7m(kernel)\
-   ,1m(log)\
-   ,12m(modem)\
-   ,60m(qboot)\
-   ,-(UBI)\0
-
 #define CONFIG_DFU_ALT \
u-boot mmc 80 400; \
uImage fat 0 2\0 \
 
-#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
+/* partitions definitions */
+#define PARTS_CSA  csa-mmc
+#define PARTS_BOOTLOADER   u-boot
+#define PARTS_BOOT boot
+#define PARTS_ROOT platform
+#define PARTS_DATA data
+#define PARTS_CSC  csc
+#define PARTS_UMS  ums
+
+#define PARTS_DEFAULT \
+   uuid_disk=${uuid_gpt_disk}; \
+   name=PARTS_CSA,size=8MiB,uuid=${uuid_gpt_PARTS_CSA}; \
+   name=PARTS_BOOTLOADER,size=60MiB, \
+   uuid=${uuid_gpt_PARTS_BOOTLOADER}; \
+   name=PARTS_BOOT,size=100MiB,uuid=${uuid_gpt_PARTS_BOOT}; \
+   name=PARTS_ROOT,size=1GiB,uuid=${uuid_gpt_PARTS_ROOT}; \
+   name=PARTS_DATA,size=3GiB,uuid=${uuid_gpt_PARTS_DATA}; \
+   name=PARTS_CSC,size=150MiB,uuid=${uuid_gpt_PARTS_CSC}; \
+   name=PARTS_UMS,size=-,uuid=${uuid_gpt_PARTS_UMS}\0 \
+
 
 #define CONFIG_BOOTCOMMAND run mmcboot
 
@@ -180,12 +184,12 @@
verify=n\0 \
rootfstype=ext4\0 \
console= CONFIG_DEFAULT_CONSOLE \
-   mtdparts= MTDPARTS_DEFAULT \
meminfo=mem=80M mem=256M@0x4000 mem=128M@0x5000\0 \
loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
mmcdev=0\0 \
mmcbootpart=2\0 \
mmcrootpart=5\0 \
+   partitions= PARTS_DEFAULT \
mmcblk=/dev/mmcblk1p1\0 \
bootblock=9\0 \
ubiblock=8\0 \
@@ -237,6 +241,10 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_FAT_WRITE
 
+/* GPT */
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - 0x100)
 
 #define CONFIG_SYS_CACHELINE_SIZE   64
-- 
1.7.10.4

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[U-Boot] [RESEND PATCH 4/4] arm:goni: Add support for USB mass storage

2013-07-04 Thread Lukasz Majewski
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com

This commit enables support for USB mass storage composite function.
It defines platform code and enables it at config file.

Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
 board/samsung/goni/goni.c  |   68 
 include/configs/s5p_goni.h |5 
 2 files changed, 73 insertions(+)

diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 3c53106..a09daca 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -29,6 +29,7 @@
 #include usb/s3c_udc.h
 #include asm/arch/cpu.h
 #include power/max8998_pmic.h
+#include usb_mass_storage.h
 DECLARE_GLOBAL_DATA_PTR;
 
 static struct s5pc110_gpio *s5pc110_gpio;
@@ -163,3 +164,70 @@ void board_usb_init(void)
 }
 
 #endif
+
+#ifdef CONFIG_USB_GADGET_MASS_STORAGE
+static int ums_read_sector(struct ums_device *ums_dev,
+   ulong start, lbaint_t blkcnt, void *buf)
+{
+   if (ums_dev-mmc-block_dev.block_read(ums_dev-dev_num,
+   start + ums_dev-offset, blkcnt, buf) != blkcnt)
+   return -1;
+
+   return 0;
+}
+
+static int ums_write_sector(struct ums_device *ums_dev,
+   ulong start, lbaint_t blkcnt, const void *buf)
+{
+   if (ums_dev-mmc-block_dev.block_write(ums_dev-dev_num,
+   start + ums_dev-offset, blkcnt, buf) != blkcnt)
+   return -1;
+
+   return 0;
+}
+
+static void ums_get_capacity(struct ums_device *ums_dev,
+   long long int *capacity)
+{
+   long long int tmp_capacity;
+
+   tmp_capacity = (long long int) ((ums_dev-offset + ums_dev-part_size)
+   * SECTOR_SIZE);
+   *capacity = ums_dev-mmc-capacity - tmp_capacity;
+}
+
+static struct ums_board_info ums_board = {
+   .read_sector = ums_read_sector,
+   .write_sector = ums_write_sector,
+   .get_capacity = ums_get_capacity,
+   .name = GONI UMS disk,
+   .ums_dev = {
+   .mmc = NULL,
+   .dev_num = 0,
+   .offset = 0,
+   .part_size = 0.
+   },
+};
+
+struct ums_board_info *board_ums_init(unsigned int dev_num, unsigned int 
offset,
+   unsigned int part_size)
+{
+   struct mmc *mmc;
+
+   mmc = find_mmc_device(dev_num);
+   /* mmc initialization is necessary prior to the ums command usage
+* due to fact that on goni target environment is read from oneNand
+* memory, so the mmc remains uninitialized whenu-boot prompt appears
+* */
+   if (!mmc || mmc_init(mmc))
+   return NULL;
+
+   ums_board.ums_dev.mmc = mmc;
+   ums_board.ums_dev.dev_num = dev_num;
+   ums_board.ums_dev.offset = offset;
+   ums_board.ums_dev.part_size = part_size;
+
+   return ums_board;
+}
+
+#endif
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index e8f2639..1cfbb88 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -269,4 +269,9 @@
 #define CONFIG_USB_GADGET_DUALSPEED
 #define CONFIG_USB_GADGET_VBUS_DRAW 2
 
+#define CONFIG_CMD_USB_MASS_STORAGE
+#if defined(CONFIG_CMD_USB_MASS_STORAGE)
+#define CONFIG_USB_GADGET_MASS_STORAGE
+#endif
+
 #endif /* __CONFIG_H */
-- 
1.7.10.4

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[U-Boot] [RESEND PATCH 2/4] arm:goni:dfu Add support for DFU at GONI target

2013-07-04 Thread Lukasz Majewski
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com

Proper adjustment for supporting DFU at GONI target has been made.
The s5p_goni.h file has been updated. Moreover the code for low level
USB initialization has been added to GONI board code.

Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
 board/samsung/goni/goni.c  |7 +++
 include/configs/s5p_goni.h |   20 +++-
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index ff76963..3c53106 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -155,4 +155,11 @@ struct s3c_plat_otg_data s5pc110_otg_data = {
.regs_otg = S5PC110_OTG_BASE,
.usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
 };
+
+void board_usb_init(void)
+{
+   debug(USB_udc_probe\n);
+   s3c_udc_probe(s5pc110_otg_data);
+}
+
 #endif
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index ec43652..8a824c7 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -86,6 +86,17 @@
 #define CONFIG_CMD_ONENAND
 #define CONFIG_CMD_MTDPARTS
 #define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_MANUFACTURER Samsung
 
 #define CONFIG_BOOTDELAY   1
 #define CONFIG_ZERO_BOOTDELAY_CHECK
@@ -105,6 +116,10 @@
,60m(qboot)\
,-(UBI)\0
 
+#define CONFIG_DFU_ALT \
+   u-boot mmc 80 400; \
+   uImage fat 0 2\0 \
+
 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
 
 #define CONFIG_BOOTCOMMAND run mmcboot
@@ -175,7 +190,9 @@
bootblock=9\0 \
ubiblock=8\0 \
ubi=enabled\0 \
-   opts=always_resume=1
+   opts=always_resume=1\0 \
+   dfu_alt_info= CONFIG_DFU_ALT
+
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP/* undef to save memory */
@@ -242,5 +259,6 @@
 #define CONFIG_USB_GADGET
 #define CONFIG_USB_GADGET_S3C_UDC_OTG
 #define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
 
 #endif /* __CONFIG_H */
-- 
1.7.10.4

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[U-Boot] [RESEND PATCH 0/4] arm:goni: Update GONI configuration

2013-07-04 Thread Lukasz Majewski
Samsung's GONI target has been updated to support:
- New GPT partition layout
- USB Mass Storage Gadget
- DFU support
- Loading uImage from eMMC not OneNAND

Arkadiusz Wlodarczyk (4):
  arm:goni: Update configuration for goni target
  arm:goni:dfu Add support for DFU at GONI target
  arm:goni: Update of GONI partitioning scheme at eMMC
  arm:goni: Add support for USB mass storage

 board/samsung/goni/goni.c  |   75 +
 include/configs/s5p_goni.h |   88 
 2 files changed, 139 insertions(+), 24 deletions(-)

-- 
1.7.10.4

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[U-Boot] [PATCH v5 1/2] powerpc/85xx: Add C29x SoC support

2013-07-04 Thread Po Liu
From: Mingkai Hu mingkai...@freescale.com

The Freescale C29x family is a high performance crypto co-processor.
It combines a single e500v2 core with necessary SEC engine. There're
three SoC types(C291, C292, C293) with the following features:

 - 512K L2 Cache/SRAM and 512 KB platform SRAM
 - DDR3/DDR3L 32bit DDR controller
 - One PCI express (x1, x2, x4) Gen 2.0 Controller
 - Trust Architecture 2.0
 - SEC6.0 engine

Signed-off-by: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Po Liu po@freescale.com
---
Changes for v2:
- Remove define CONFIG_C291/CONFIG_C292/CONFIG_C293, 
  replace with CONFIG_C29X
Changes for v3:
- Replace CONFIG_C29X with CONFIG_PPC_C29X
Changes for v4:
- None
Changes for v5:
- None

 arch/powerpc/cpu/mpc85xx/Makefile |  2 +
 arch/powerpc/cpu/mpc85xx/c29x_serdes.c| 65 +++
 arch/powerpc/cpu/mpc8xxx/cpu.c|  3 ++
 arch/powerpc/include/asm/config_mpc85xx.h | 12 ++
 arch/powerpc/include/asm/fsl_law.h|  1 +
 arch/powerpc/include/asm/immap_85xx.h | 23 +++
 arch/powerpc/include/asm/processor.h  |  3 ++
 7 files changed, 109 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc85xx/c29x_serdes.c

diff --git a/arch/powerpc/cpu/mpc85xx/Makefile 
b/arch/powerpc/cpu/mpc85xx/Makefile
index 4669883..3cb2a78 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -62,6 +62,7 @@ COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
 COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
 
 # supports ddr1/2/3
+COBJS-$(CONFIG_PPC_C29X)   += ddr-gen3.o
 COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8569)+= ddr-gen3.o
@@ -116,6 +117,7 @@ COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += 
fsl_corenet_serdes.o
 COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
 
 # SoC specific SERDES support
+COBJS-$(CONFIG_PPC_C29X)   += c29x_serdes.o
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
 COBJS-$(CONFIG_MPC8544) += mpc8544_serdes.o
 COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c 
b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
new file mode 100644
index 000..4b3214d
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include config.h
+#include common.h
+#include asm/io.h
+#include asm/immap_85xx.h
+#include asm/fsl_serdes.h
+
+#define SRDS1_MAX_LANES4
+
+static u32 serdes1_prtcl_map;
+
+struct serdes_config {
+   u32 protocol;
+   u8 lanes[SRDS1_MAX_LANES];
+};
+
+static const struct serdes_config serdes1_cfg_tbl[] = {
+   /* SerDes 1 */
+   {1, {PCIE1, PCIE1, PCIE1, PCIE1} },
+   {2, {PCIE1, PCIE1, PCIE1, PCIE1} },
+   {3, {PCIE1, PCIE1, NONE, NONE} },
+   {4, {PCIE1, PCIE1, NONE, NONE} },
+   {5, {PCIE1, NONE, NONE, NONE} },
+   {6, {PCIE1, NONE, NONE, NONE} },
+   {}
+};
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+   return (1  device)  serdes1_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+   ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+   u32 pordevsr = in_be32(gur-pordevsr);
+   u32 srds_cfg = (pordevsr  MPC85xx_PORDEVSR_IO_SEL) 
+   MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+   const struct serdes_config *ptr;
+   int lane;
+
+   debug(PORDEVSR[IO_SEL_SRDS] = %x\n, srds_cfg);
+
+   if (srds_cfg  ARRAY_SIZE(serdes1_cfg_tbl)) {
+   printf(Invalid PORDEVSR[IO_SEL_SRDS] = %d\n, srds_cfg);
+   return;
+   }
+
+   ptr = serdes1_cfg_tbl[srds_cfg];
+   if (!ptr-protocol)
+   return;
+
+   for (lane = 0; lane  SRDS1_MAX_LANES; lane++) {
+   enum srds_prtcl lane_prtcl = ptr-lanes[lane];
+   serdes1_prtcl_map |= (1  lane_prtcl);
+   }
+}
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index bc26855..2eed872 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -95,6 +95,9 @@ static struct cpu_type cpu_type_list[] = {
CPU_TYPE_ENTRY(BSC9131, 9131, 1),
CPU_TYPE_ENTRY(BSC9132, 9132, 2),
CPU_TYPE_ENTRY(BSC9232, 9232, 2),
+   CPU_TYPE_ENTRY(C291, C291, 1),
+   CPU_TYPE_ENTRY(C292, C292, 1),
+   CPU_TYPE_ENTRY(C293, C293, 1),
 #elif defined(CONFIG_MPC86xx)
CPU_TYPE_ENTRY(8610, 8610, 1),
CPU_TYPE_ENTRY(8641, 8641, 2),
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index 1d46b14..3f48802 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ 

[U-Boot] [PATCH v5 2/2] powerpc/c29xpcie: add support for C29XPCIE board

2013-07-04 Thread Po Liu
From: Mingkai Hu mingkai...@freescale.com

C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.

 - 512KB platform SRAM in addition to 512K L2 Cache/SRAM
 - 512MB soldered DDR3 32bit memory
 - CPLD System Logic
 - 64MB x16 NOR flash and 4GB x8 NAND flash
 - 16MB SPI flash

Signed-off-by: Mingkai Hu mingkai...@freescale.com
Singed-off-by: Po Liu po@freescale.com
---
Changes for v2:
- Remove define CONFIG_C291/CONFIG_C292/CONFIG_C293,
  replace with CONFIG_C29X
- Adjust the TLB config mode
- Add SEC node removal method by check the CPU SVR
- Clean up the C29XPCIE.h file
Changes for v3:
- Replace CONFIG_C29X with CONFIG_PPC_C29X
Changes for v4:
- Clean up comments in tlb.c
- Change NAND flash TLB and LAW size to 16KB
- Modify flash tlb mode in c29xpcie.c
- Change cpld.h and cpld.c code for read/write cpld register
- Continue clean up the C29XPCIE.h file
Changes for v5:
- Add C29XPCIE board to MAINTAINERS
- Clean up the C29XPCIE.h file
a. Remove #undef CONFIG_SYS_RAMBOOT
b. Remove #define CONFIG_SYS_PROMPT_HUSH_PS2  
c. Modify CONFIG_BOOTDELAY to -1
- Remove 0xf000 LAW in tlb.c

 MAINTAINERS |   4 +
 board/freescale/c29xpcie/Makefile   |  34 +++
 board/freescale/c29xpcie/c29xpcie.c | 151 
 board/freescale/c29xpcie/cpld.c | 134 ++
 board/freescale/c29xpcie/cpld.h |  43 
 board/freescale/c29xpcie/ddr.c  |  89 +++
 board/freescale/c29xpcie/law.c  |  22 ++
 board/freescale/c29xpcie/tlb.c  |  79 ++
 boards.cfg  |   2 +
 include/configs/C29XPCIE.h  | 472 
 10 files changed, 1030 insertions(+)
 create mode 100644 board/freescale/c29xpcie/Makefile
 create mode 100644 board/freescale/c29xpcie/c29xpcie.c
 create mode 100644 board/freescale/c29xpcie/cpld.c
 create mode 100644 board/freescale/c29xpcie/cpld.h
 create mode 100644 board/freescale/c29xpcie/ddr.c
 create mode 100644 board/freescale/c29xpcie/law.c
 create mode 100644 board/freescale/c29xpcie/tlb.c
 create mode 100644 include/configs/C29XPCIE.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 7820375..26fc123 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -538,6 +538,10 @@ Detlev Zundel d...@denx.de
 
inka4x0 MPC5200
 
+Po Liu po@freescale.com
+
+   C29XPCIEC29X
+
 -
 
 Unknown / orphaned boards:
diff --git a/board/freescale/c29xpcie/Makefile 
b/board/freescale/c29xpcie/Makefile
new file mode 100644
index 000..15bef9a
--- /dev/null
+++ b/board/freescale/c29xpcie/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y+= $(BOARD).o
+COBJS-y+= cpld.o
+COBJS-y+= ddr.o
+COBJS-y+= law.o
+COBJS-y+= tlb.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/freescale/c29xpcie/c29xpcie.c 
b/board/freescale/c29xpcie/c29xpcie.c
new file mode 100644
index 000..acc59d2
--- /dev/null
+++ b/board/freescale/c29xpcie/c29xpcie.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include common.h
+#include asm/processor.h
+#include asm/mmu.h
+#include asm/cache.h
+#include asm/immap_85xx.h
+#include asm/io.h
+#include miiphy.h
+#include libfdt.h
+#include fdt_support.h
+#include fsl_mdio.h
+#include tsec.h
+#include mmc.h
+#include netdev.h
+#include pci.h
+#include asm/fsl_ifc.h
+#include asm/fsl_pci.h
+
+#include cpld.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+   struct cpu_type *cpu = gd-arch.cpu;
+   struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+   printf(Board: %sPCIe, , cpu-name);
+ 

[U-Boot] Reminder of floating Samsung patches

2013-07-04 Thread Lukasz Majewski
Hi Minkyu,

Can you evaluate following patches:

CONFIG (TRATS):
http://patchwork.ozlabs.org/patch/255474/

PMIC (trats):
http://patchwork.ozlabs.org/patch/254152/

and following resend patches (for GONI):

http://patchwork.ozlabs.org/patch/256872/
http://patchwork.ozlabs.org/patch/256873/
http://patchwork.ozlabs.org/patch/256874/
http://patchwork.ozlabs.org/patch/256875/


-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH] mx6: Fix calculation of emi_slow clock rate

2013-07-04 Thread Andrew Gabbasov
This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0,
that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET
was used instead of ACLK_EMI_SLOW_PODF_OFFSET).

Using the occasion, change the variable name 'emi_slow_pof' to more consistent
'emi_slow_podf'.

Signed-off-by: Jason Liu r64...@freescale.com
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
 arch/arm/cpu/armv7/mx6/clock.c |8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 3c0d908..064f8c8 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -244,13 +244,13 @@ static u32 get_axi_clk(void)
 
 static u32 get_emi_slow_clk(void)
 {
-   u32 emi_clk_sel, emi_slow_pof, cscmr1, root_freq = 0;
+   u32 emi_clk_sel, emi_slow_podf, cscmr1, root_freq = 0;
 
cscmr1 =  __raw_readl(imx_ccm-cscmr1);
emi_clk_sel = cscmr1  MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK;
emi_clk_sel = MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET;
-   emi_slow_pof = cscmr1  MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
-   emi_slow_pof = MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET;
+   emi_slow_podf = cscmr1  MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
+   emi_slow_podf = MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET;
 
switch (emi_clk_sel) {
case 0:
@@ -267,7 +267,7 @@ static u32 get_emi_slow_clk(void)
break;
}
 
-   return root_freq / (emi_slow_pof + 1);
+   return root_freq / (emi_slow_podf + 1);
 }
 
 #ifdef CONFIG_MX6SL
-- 
1.7.10.4

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Re: [U-Boot] [PATCH v2 6/7] ARM: extend non-secure switch to also go into HYP mode

2013-07-04 Thread Andre Przywara

On 06/28/2013 05:51 AM, Masahiro Yamada wrote:

Hi Andre


[RFC]

I'd like to suggest to separate HYP-switching code
from Non-secure switching.


Thanks for stepping up and providing a use-case!
The first version of the patches had those two separate cases, but I
later merged them in favor of readability.
So I actually split those two cases in the code now and am about to fold 
this in the existing patches.



And define different macros, for example:

CONFIG_ARMV7_NONSECURE : switch to nonsecure
CONFIG_ARMV7_VIRT  : switch to hypervisor


done.



Of cource, CONFIG_ARMV7_NONSECURE must be defined
when using CONFIG_ARMV7_VIRT.

(If we introduced Kconfig to U-boot,
we could handle nicely dependency between CONFIGs.)


I managed to get along without it. By clever use of ifdefs this 
dependency is now implicitly in the code.


I still have to test this, so the new version will be delayed a bit.

Thanks!
Andre.



I know your incentive to switch to non-secure state
is virtualization.
But I think this separation would make this code
useful for other boards and easy to understand.

For example (this situtation might be specific
to my board), non-secure switching is done
for the reason to use a hardware debugger,
because our debugger without security extension
can work only in non-secure state.



Best Regards
Masahiro Yamada




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Re: [U-Boot] [PATCH] mx6: Fix calculation of emi_slow clock rate

2013-07-04 Thread Dirk Behme

On 04.07.2013 13:27, Andrew Gabbasov wrote:

This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0,
that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET
was used instead of ACLK_EMI_SLOW_PODF_OFFSET).

Using the occasion, change the variable name 'emi_slow_pof' to more consistent
'emi_slow_podf'.

Signed-off-by: Jason Liu r64...@freescale.com
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com


Acked-by: Dirk Behme dirk.be...@de.bosch.com

Thanks

Dirk


---
  arch/arm/cpu/armv7/mx6/clock.c |8 
  1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 3c0d908..064f8c8 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -244,13 +244,13 @@ static u32 get_axi_clk(void)

  static u32 get_emi_slow_clk(void)
  {
-   u32 emi_clk_sel, emi_slow_pof, cscmr1, root_freq = 0;
+   u32 emi_clk_sel, emi_slow_podf, cscmr1, root_freq = 0;

cscmr1 =  __raw_readl(imx_ccm-cscmr1);
emi_clk_sel = cscmr1  MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK;
emi_clk_sel = MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET;
-   emi_slow_pof = cscmr1  MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
-   emi_slow_pof = MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET;
+   emi_slow_podf = cscmr1  MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
+   emi_slow_podf = MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET;

switch (emi_clk_sel) {
case 0:
@@ -267,7 +267,7 @@ static u32 get_emi_slow_clk(void)
break;
}

-   return root_freq / (emi_slow_pof + 1);
+   return root_freq / (emi_slow_podf + 1);
  }

  #ifdef CONFIG_MX6SL



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Re: [U-Boot] [PATCH 0/6] Upstream environment changes being used in Yocto/OE

2013-07-04 Thread Albert ARIBAUD
Hi Fabio,

On Fri, 28 Jun 2013 18:56:46 -0300, Fabio Estevam feste...@gmail.com
wrote:

 On Fri, Jun 28, 2013 at 6:52 PM, Otavio Salvador
 ota...@ossystems.com.br wrote:
  This changes were being done in every version of U-Boot and it
  makes sense to try to merge them upstream.
 
  Please review them and ack/nack them.
 
 I think the series look good:
 
 Reviewed-by: Fabio Estevam fabio.este...@freescale.com
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Cc:ing maintainers Jason Liu (mx53loco and mx6qsabrelite) and
Sefano Babic (mx51evk).

(/me thinks the MAINTAINERS file is going to endure a radical format
change after 2013.07 is out, in order to make it script-friendly.)

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH] usb: fix unaligned access in device_qual()

2013-07-04 Thread Albert ARIBAUD
Hi Marek,

On Wed, 3 Jul 2013 15:30:20 +0200, Marek Vasut ma...@denx.de wrote:

 Dear Albert ARIBAUD,
 
  Hi Marek,
  
  On Thu, 27 Jun 2013 15:23:33 +0200, Marek Vasut ma...@denx.de wrote:
   Hello Albert,
   
Hi Marek,

On Thu, 27 Jun 2013 13:26:39 +0200, Marek Vasut ma...@denx.de wrote:
 Dear Heiko Schocher,
 
  while playing with dfu, I tapped in an unaligned access
  when doing on the host side a lsusb -d [vendornr]: -v
 
  I get on the board:
 Applied, thanks

Now we have console log output in commit messages. :(
   
   Don't be sad, I will buy you a tartelette ;)
  
  Actually the sad part is that the patch in itself is bad: the actual
  alignment boundary should have been 16 bit, not one cacheline. Also,
  the issue could / should have been solved by reordering the fields
  rather than using an attribute.
 
 Why 16 bit? I think cacheline alignment here makes sense if the descriptor is 
 to 
 be flush()'d from dcache.

If it is then it should be moved out of the struct it currently lives
in, in order to avoid a big alignment gap, and replaced with a pointer.
Also, the commit message would then be wrong...

  And I'm not going to eat a tartelette when I'm about 30 minutes from
  going to a restaurant (admittedly small, but undoubtedly near).
 
 You should have one to survive the journey ;-)

I'm more addicted to the raw stuff. No one should need anything beyond
90+%-cocoa chocolate.

 Best regards,
 Marek Vasut

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH v5 1/3] arm: spl: Fix SPL booting for OMAP3

2013-07-04 Thread Albert ARIBAUD
Hi Tom,

On Wed, 3 Jul 2013 15:47:27 -0400, Tom Rini tr...@ti.com wrote:

 On Thu, Jun 27, 2013 at 10:27:26AM +0200, Albert ARIBAUD wrote:
  Hi Stefan,
  
  On Tue, 25 Jun 2013 09:14:12 +0200, Stefan Roese s...@denx.de wrote:
  
   Fix a problem with a re-assignment of r8 in the SPL version.
   
   This patch now moves the call to s_init() to a later stage, right before
   calling board_init_f(). And makes sure that r8 is correctly initialized
   before s_init() is called. r8 now is only written in crt0.S.
   
   This error was detected on the SPL port for the Compulab CM-T35 board
   (OMAP3530).
   
   Signed-off-by: Stefan Roese s...@denx.de
   Cc: Tom Rini tr...@ti.com
   Cc: Albert ARIBAUD albert.u.b...@aribaud.net
   ---
   Albert, I'm not really happy with this patch as it evolves now. As you
   will see, I had to make some further additions to crt0.S to fix a
   problem for non-SPL builds and to fix compilation errors for non-OMAP
   platforms. This gets quite ugly now. Looking back at my patch v1, this
   looks much less intrusive.
   
   What do you think?
  
  I said the first patch was NAK, and the reasons I NAKed it remain.
  
  However, there might be another solution: instead of squeezing the
  call to s_init() in crt0.S right between the initial environment
  setting and the call to board_init_f(), we could simply move the
  s_init() call inside board_init_f().
  
  From a running conditions perspective, the only change would be that
  s_init() is going to run from a non-empty stack, but we know that there
  is free stack enough during board_init_f() to call functions.
  
  Moving the call to s_init() into board_init_f() removes any changes to
  crt0.S, which were my essential NAK reason and saves you some ugliness.
  
  I would even hazard that you could place s_init in init_sequence[], for
  instance as a first entry to be called (before arch_cpu_init). After
  all, the only difference in execution is that gdata is going to be
  initialized properly before s_init() kicks in.
  
  Also, a name change would be in order, because s_init() as a private
  OMAP function is ok, but as an init function invoked from board_init_f()
  it needs a more meaningful name.
 
 So, this is one of the things that needs resolving for v2013.07.  What
 do you want to call the renamed s_init function?  I think we need to go
 the init_sequence route, and keep common/board_f.c in sync (I did a
 trivial test the other week about moving am335x into the generic board
 framework and it went fine, so I'll want to move all the TI boards I can
 over soon).  Thanks!

I have no strong opinion on the name... As is does mux and clock inits
needed by the 'system' (which for all I know may well be where the s
of s_init comes from), we could simply name it system_init().

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH 3/3] Makefile: fix readelf usage

2013-07-04 Thread Albert ARIBAUD
Hi Andreas,

On Sun, 30 Jun 2013 13:15:06 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:

 Some OS (like OS X) do not provide a generic readelf. We should enforce to use
 the toochain provided readelf instead, to do so use $(CROSS_COMPILE)readelf.
 
 Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
 ---
  Makefile | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/Makefile b/Makefile
 index ba1c10b..446c2f8 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -747,7 +747,7 @@ endif # config.mk
  # ARM relocations should all be R_ARM_RELATIVE.
  checkarmreloc: $(obj)u-boot
   @if test R_ARM_RELATIVE != \
 - `readelf -r $ | cut -d ' ' -f 4 | grep R_ARM | sort -u`; \
 + `$(CROSS_COMPILE)readelf -r $ | cut -d ' ' -f 4 | grep R_ARM 
 | sort -u`; \
   then echo $ contains relocations other than \
   R_ARM_RELATIVE; false; fi

Acked-by: Albert ARIBAUD albert.u.b...@aribaud.net

Tom, do I take this in u-boot-arm and then deliver this later in my PR,
or do you want to pick it directly in mainline?

Amicalement,
-- 
Albert.
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Re: [U-Boot] Please pull u-boot-ti/master

2013-07-04 Thread Albert ARIBAUD
Hi Tom,

On Tue, 2 Jul 2013 16:05:52 -0400, Tom Rini tr...@ti.com wrote:

 Hello,
 
 The following changes since commit e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c:
 
   Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-06-28 
 17:51:13 +0200)
 
 are available in the git repository at:
 
 
   git://git.denx.de/u-boot-ti.git master
 
 for you to fetch changes up to 87bd05d78f0f5765f3d3e1517c76794c82dab7cc:
 
   ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5 
 (2013-07-02 09:21:16 -0400)
 
 
 Axel Lin (1):
   ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5
 
 Ilya Ledvich (1):
   am33xx: fix the ddr_cmdtctrl structure
 
 Lokesh Vutla (1):
   ARM: OMAP4+: Fix MA detection during SDRAM_AUTO_DETECTION
 
 Michael Trimarchi (1):
   usb: omap: ulpi: fix ulpi transceiver access
 
  arch/arm/cpu/armv7/omap-common/emif-common.c |3 ++
  arch/arm/cpu/armv7/omap5/hw_data.c   |2 ++
  arch/arm/cpu/armv7/omap5/hwinit.c|4 ++-
  arch/arm/include/asm/arch-am33xx/ddr_defs.h  |1 -
  arch/arm/include/asm/arch-am33xx/gpio.h  |2 ++
  arch/arm/include/asm/arch-omap3/gpio.h   |2 ++
  arch/arm/include/asm/arch-omap4/gpio.h   |2 ++
  arch/arm/include/asm/arch-omap5/gpio.h   |4 +++
  drivers/gpio/omap_gpio.c |2 +-
  drivers/usb/ulpi/omap-ulpi-viewport.c|   42 
 ++
  10 files changed, 28 insertions(+), 36 deletions(-)
 

Applied to u-boot-arm/master, thanks!

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH 2/2] PPC MPC83xx: Fix MPC8323ERDB build warning

2013-07-04 Thread Timur Tabi
On Fri, Jun 14, 2013 at 3:21 AM, Wolfgang Denk w...@denx.de wrote:

 diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c 
 b/board/freescale/mpc8323erdb/mpc8323erdb.c
 index f29b2f4..533cb08 100644
 --- a/board/freescale/mpc8323erdb/mpc8323erdb.c
 +++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
 @@ -195,7 +195,11 @@ int mac_read_from_eeprom(void)
 printf(\nEEPROM @ 0x%02x read FAILED!!!\n,
CONFIG_SYS_I2C_EEPROM_ADDR);
 } else {
 -   if (crc32(crc, buf, 24) == *(unsigned int *)buf[24]) {
 +   unsigned int crc_buf;

This should be a uint32_t, because you specifically want only four bytes.

If you fix that,

Acked-by: Timur Tabi ti...@tabi.org
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Re: [U-Boot] [PATCH] cmd_bootm.c: Correct check/return for unsupported sub-command

2013-07-04 Thread Andreas Bießmann
On 07/03/2013 02:37 PM, Tom Rini wrote:
 On Tue, Jul 02, 2013 at 03:05:22PM +0200, Andreas Bie?mann wrote:
 On 07/01/2013 03:09 PM, Tom Rini wrote:
 With the do_bootm_states re-organization, we have the call to any
 potential sub-commands in a single spot.  If one fails, we can then stop
 right there and return to the caller.  Prior to these calls we have
 already ensured that ret is zero so we will not be returning this error
 for some other case.

 Signed-off-by: Tom Rini tr...@ti.com

 Tested-by: Andreas Bie?mann andreas.de...@googlemail.com
 
 Applied to u-boot/master.
 

couldn't find it, missing push?

Regards,

Andreas Bießmann
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[U-Boot] [PATCH 3/3] arm/km: make local function startup_allowed static

2013-07-04 Thread Holger Brunck
Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
 board/keymile/km_arm/km_arm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 24fcf70..29f85ff 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -118,7 +118,7 @@ static const u32 kwmpp_config[] = {
 /*
  * Wait for startup OK from mgcoge3ne
  */
-int startup_allowed(void)
+static int startup_allowed(void)
 {
unsigned char buf;
 
-- 
1.8.0.1

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[U-Boot] [PATCH 2/3] arm/km: drop unneeded define

2013-07-04 Thread Holger Brunck
CONFIG_BOOTCOUNT_LIMIT is used on all boards from this board series. So
remove this unneeded define.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
 board/keymile/km_arm/km_arm.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index b944887..24fcf70 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -180,7 +180,6 @@ static int initialize_unit_leds(void)
return 0;
 }
 
-#if defined(CONFIG_BOOTCOUNT_LIMIT)
 static void set_bootcount_addr(void)
 {
uchar buf[32];
@@ -189,7 +188,6 @@ static void set_bootcount_addr(void)
sprintf((char *)buf, 0x%x, bootcountaddr);
setenv(bootcountaddr, (char *)buf);
 }
-#endif
 
 int misc_init_r(void)
 {
@@ -226,9 +224,7 @@ int misc_init_r(void)
 
initialize_unit_leds();
set_km_env();
-#if defined(CONFIG_BOOTCOUNT_LIMIT)
set_bootcount_addr();
-#endif
return 0;
 }
 
-- 
1.8.0.1

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[U-Boot] [PATCH 1/3] arm/km: add support for km_kirkwood_128m16 board

2013-07-04 Thread Holger Brunck
From: Karlheinz Jerg karlheinz.j...@keymile.com

The board is similar to the standard km_kirkwood board. From a
u-boot point of view, the only difference is an increased
256 MiB DRAM (128M16). A board based on this design is for
example the SUP12.

Signed-off-by: Karlheinz Jerg karlheinz.j...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
 boards.cfg|  1 +
 include/configs/km_kirkwood.h | 10 ++
 2 files changed, 11 insertions(+)

diff --git a/boards.cfg b/boards.cfg
index c0c4282..2bb493f 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -165,6 +165,7 @@ lschlv2  arm arm926ejs   lsxl   
 buffalo
 lsxhlarm arm926ejs   lsxl
buffalokirkwoodlsxl:LSXHL
 km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD
 km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI
+km_kirkwood_128m16   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_128M16
 kmnusa   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_NUSA
 kmsuv31  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_SUV31
 mgcoge3unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_MGCOGE3UN
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index 83bb7aa..2b5f389 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -51,6 +51,16 @@
 #define KM_IVM_BUS pca9544a:70:9 /* I2C2 (Mux-Port 1)*/
 #define CONFIG_KM_FPGA_CONFIG
 
+/* KM_KIRKWOOD_128M16 */
+#elif defined(CONFIG_KM_KIRKWOOD_128M16)
+#define CONFIG_IDENT_STRING\nKeymile Kirkwood 128M16
+#define CONFIG_HOSTNAMEkm_kirkwood_128m16
+#undef CONFIG_SYS_KWD_CONFIG
+#define CONFIG_SYS_KWD_CONFIG \
+   $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
+#define CONFIG_KM_DISABLE_PCIE
+#define KM_IVM_BUS pca9544a:70:9 /* I2C2 (Mux-Port 1)*/
+
 /* KM_NUSA */
 #elif defined(CONFIG_KM_NUSA)
 #define KM_IVM_BUS pca9547:70:9  /* I2C2 (Mux-Port 1)*/
-- 
1.8.0.1

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Re: [U-Boot] [PATCH 3/3] Makefile: fix readelf usage

2013-07-04 Thread Andreas Bießmann
Hi Albert,

On 07/04/2013 02:09 PM, Albert ARIBAUD wrote:
 Hi Andreas,
 
 On Sun, 30 Jun 2013 13:15:06 +0200, Andreas Bießmann
 andreas.de...@googlemail.com wrote:
 
 Some OS (like OS X) do not provide a generic readelf. We should enforce to 
 use
 the toochain provided readelf instead, to do so use $(CROSS_COMPILE)readelf.

 Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
 ---
  Makefile | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

snip

 
 Acked-by: Albert ARIBAUD albert.u.b...@aribaud.net
 
 Tom, do I take this in u-boot-arm and then deliver this later in my PR,
 or do you want to pick it directly in mainline?

It is in fact in master [1].

Regards,

Andreas Bießmann

[1]
http://git.denx.de/?p=u-boot.git;a=commit;h=c1273d7162bd4bf795f8637cac3532a490dd9024

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[U-Boot] [PATCH 2/4] km/common: switch on CMD_GREPENV

2013-07-04 Thread Holger Brunck
Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
 include/configs/km/keymile-common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/km/keymile-common.h 
b/include/configs/km/keymile-common.h
index 3b15c4e..cef4860 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -34,6 +34,7 @@
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_DEFAULTENV_VARS
+#define CONFIG_CMD_GREPENV
 #define CONFIG_CMD_ECHO
 #define CONFIG_CMD_IMMAP
 #define CONFIG_CMD_MII
-- 
1.8.0.1

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[U-Boot] [PATCH 3/4] powerpc/km: drop unused CONFIG_SYS_DTT_LOW_TEMP

2013-07-04 Thread Holger Brunck
This define is not used in u-boot code, we can drop this define safely.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
 include/configs/km/km83xx-common.h | 1 -
 include/configs/km82xx.h   | 1 -
 2 files changed, 2 deletions(-)

diff --git a/include/configs/km/km83xx-common.h 
b/include/configs/km/km83xx-common.h
index eb0e5b6..c6b4c73 100644
--- a/include/configs/km/km83xx-common.h
+++ b/include/configs/km/km83xx-common.h
@@ -214,7 +214,6 @@
 #define CONFIG_DTT_LM75/* ON Semi's LM75 */
 #define CONFIG_DTT_SENSORS {0, 1, 2, 3}/* Sensor addresses */
 #define CONFIG_SYS_DTT_MAX_TEMP70
-#define CONFIG_SYS_DTT_LOW_TEMP-30
 #define CONFIG_SYS_DTT_HYSTERESIS  3
 #define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS)
 
diff --git a/include/configs/km82xx.h b/include/configs/km82xx.h
index 3c2117f..fa4cc7b 100644
--- a/include/configs/km82xx.h
+++ b/include/configs/km82xx.h
@@ -280,7 +280,6 @@ int get_scl(void);
 #define CONFIG_DTT_LM75/* ON Semi's LM75   
*/
 #define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
 #define CONFIG_SYS_DTT_MAX_TEMP70
-#define CONFIG_SYS_DTT_LOW_TEMP-30
 #define CONFIG_SYS_DTT_HYSTERESIS  3
 #define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS)
 
-- 
1.8.0.1

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[U-Boot] [PATCH 4/4] km/scripts: fix ramfs

2013-07-04 Thread Holger Brunck
From: Andreas Huber andreas.hu...@keymile.com

'actual_bank' is not used anymore, instead boot_bank is used.

Signed-off-by: Andreas Huber andreas.hu...@keymile.com
---
 board/keymile/scripts/ramfs-common.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/keymile/scripts/ramfs-common.txt 
b/board/keymile/scripts/ramfs-common.txt
index 8a8d287..502c863 100644
--- a/board/keymile/scripts/ramfs-common.txt
+++ b/board/keymile/scripts/ramfs-common.txt
@@ -1,5 +1,5 @@
 addramfs=setenv bootargs ${bootargs} 
phram.phram=rootfs${boot_bank},${rootfsaddr},${rootfssize}
-actual_bank=-1
+boot_bank=-1
 altbootcmd=run ${subbootcmds}
 bootcmd=run ${subbootcmds}
 subbootcmds=tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default 
addpanic addramfs boot
-- 
1.8.0.1

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[U-Boot] [PATCH 1/4] powerpc/83xx: remove staticness for qe_iop_conf_tab

2013-07-04 Thread Holger Brunck
commit a5510058 powerpc/83xx/km: make local functions and structs static

removed the staticness also from this struct. But this struct is needed
in arch/powerpc/cpu/mpc83xx/cpu_init.c and declared as extern.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
 board/keymile/km83xx/km83xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 812a436..47c40f5 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -31,7 +31,7 @@
 
 #include ../common/common.h
 
-static const qe_iop_conf_t qe_iop_conf_tab[] = {
+const qe_iop_conf_t qe_iop_conf_tab[] = {
/* port pin dir open_drain assign */
 #if defined(CONFIG_MPC8360)
/* MDIO */
-- 
1.8.0.1

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Re: [U-Boot] [PATCH 3/3] Makefile: fix readelf usage

2013-07-04 Thread Albert ARIBAUD
Hi Andreas,

On Thu, 04 Jul 2013 15:25:53 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:

 Hi Albert,
 
 On 07/04/2013 02:09 PM, Albert ARIBAUD wrote:
  Hi Andreas,
  
  On Sun, 30 Jun 2013 13:15:06 +0200, Andreas Bießmann
  andreas.de...@googlemail.com wrote:
  
  Some OS (like OS X) do not provide a generic readelf. We should enforce to 
  use
  the toochain provided readelf instead, to do so use 
  $(CROSS_COMPILE)readelf.
 
  Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
  ---
   Makefile | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
 
 snip
 
  
  Acked-by: Albert ARIBAUD albert.u.b...@aribaud.net
  
  Tom, do I take this in u-boot-arm and then deliver this later in my PR,
  or do you want to pick it directly in mainline?
 
 It is in fact in master [1].

Good! :) I'd missed the 'applied' reply to it.

 Regards,
 
 Andreas Bießmann
 
 [1]
 http://git.denx.de/?p=u-boot.git;a=commit;h=c1273d7162bd4bf795f8637cac3532a490dd9024

Amicalement,
-- 
Albert.
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[U-Boot] dm3730: dpll5 init broken with 19.2MHz?

2013-07-04 Thread Andreas Naumann

Hi,

I have a custom OMAP37xx board running with a fairly uncommon 19.2MHz 
oscillator. The general clock setup seems fine so far, but the 
dpll5_init_34xx() used in prcm_init() for 36xx cpu-types gives me 
trouble in the form of numerous stack dumps in the kernel boot. Reason is:


[3.396636] clock: dpll5_ck failed transition to 'locked'

In an older U-Boot (2010.09) that I used before there was no such 
problem (and no such dpll5 setup i guess).

So after commenting the line

dpll5_init_34xx(0, clk_index);

in arch/arm/cpu/armv7/omap3/clock.c, the kernel does not complain 
anymore, but one 1 of 3 boots has the ECHI USB not working, which makes 
me think, I probably have to do it right.


So my question is, where do the per2_dpll_param values in 
lowlevel_init.S come from? How can I calculate them?



thanks for any help,
Andreas



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Re: [U-Boot] [PATCH] cmd_bootm.c: Correct check/return for unsupported sub-command

2013-07-04 Thread Tom Rini
On Thu, Jul 04, 2013 at 03:24:10PM +0200, Andreas Bie?mann wrote:
 On 07/03/2013 02:37 PM, Tom Rini wrote:
  On Tue, Jul 02, 2013 at 03:05:22PM +0200, Andreas Bie?mann wrote:
  On 07/01/2013 03:09 PM, Tom Rini wrote:
  With the do_bootm_states re-organization, we have the call to any
  potential sub-commands in a single spot.  If one fails, we can then stop
  right there and return to the caller.  Prior to these calls we have
  already ensured that ret is zero so we will not be returning this error
  for some other case.
 
  Signed-off-by: Tom Rini tr...@ti.com
 
  Tested-by: Andreas Bie?mann andreas.de...@googlemail.com
  
  Applied to u-boot/master.
  
 
 couldn't find it, missing push?

Fixed, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v3 2/2] cmd_sf: let sf update preserve the final part of the last sector

2013-07-04 Thread Jagan Teki
On Thu, Jul 4, 2013 at 12:03 AM, Gerlando Falauto
gerlando.fala...@keymile.com wrote:
 Since sf update erases the last block as a whole, but only rewrites
 the meaningful initial part of it, the rest would be left erased,
 potentially erasing meaningful information.
 So, as a safety measure, have it rewrite the original content.

 Signed-off-by: Gerlando Falauto gerlando.fala...@keymile.com
 Cc: Valentin Longchamp valentin.longch...@keymile.com
 Cc: Holger Brunck holger.bru...@keymile.com
 Acked-by: Simon Glass s...@chromium.org
 ---
  common/cmd_sf.c | 12 +++-
  1 file changed, 11 insertions(+), 1 deletion(-)

 diff --git a/common/cmd_sf.c b/common/cmd_sf.c
 index ab35a94..1141dc1 100644
 --- a/common/cmd_sf.c
 +++ b/common/cmd_sf.c
 @@ -152,8 +152,10 @@ static const char *spi_flash_update_block(struct 
 spi_flash *flash, u32 offset,
  {
 debug(offset=%#x, sector_size=%#x, len=%#zx\n,
 offset, flash-sector_size, len);
 -   if (spi_flash_read(flash, offset, len, cmp_buf))
 +   /* Read the entire sector so to allow for rewriting */
 +   if (spi_flash_read(flash, offset, flash-sector_size, cmp_buf))
 return read;
 +   /* Compare only what is meaningful (len) */
 if (memcmp(cmp_buf, buf, len) == 0) {
 debug(Skip region %x size %zx: no change\n,
 offset, len);
 @@ -163,8 +165,16 @@ static const char *spi_flash_update_block(struct 
 spi_flash *flash, u32 offset,
 /* Erase the entire sector */
 if (spi_flash_erase(flash, offset, flash-sector_size))
 return erase;
 +   /* Write the initial part of the block from the source */
 if (spi_flash_write(flash, offset, len, buf))
 return write;

I din't understand why the below write is required again-
As erase ops requires only sector operation and read + write will do
the operations on partial sizes

Can you send the failure case w/o this.

--
Thanks,
Jagan.
 +   /* If it's a partial sector, rewrite the existing part */
 +   if (len != flash-sector_size) {
 +   /* Rewrite the original data to the end of the sector */
 +   if (spi_flash_write(flash, offset + len,
 +   flash-sector_size - len, cmp_buf[len]))
 +   return write;
 +   }
 return NULL;
  }

 --
 1.8.0.1

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[U-Boot] TLB mapping for pcie mem space for fsl corenet processors

2013-07-04 Thread Sughosh Ganu
hi,
The tlb entries for the pcie mem space for the corenet SoC's is done
for 1.5GiB but certain boards use all the 4 pcie controller
instantiations, and each controller is assigned 512MiB size in the
config files. Should the tlb entries not map 2GiB space as against
1.5GiB. Am i missing something. Thanks.

-sughosh

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[U-Boot] : MACB TX timeout

2013-07-04 Thread Jagan Teki
Hi,

Did anyone find this TX timeout issue on macb(gmac)?
I observed this issue when i enable d-cache.

Log:

zynq-uboot ping 10.10.70.101
gmac0: PHY present at 7
gmac0: link up, 1000Mbps full-duplex (lpa: 0x3800)
Using gmac0 device
gmac0: TX timeout
gmac0: TX timeout
ping failed; host 10.10.70.101 is not alive

Any help.!

--
Thanks,
Jagan.
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Re: [U-Boot] Regression: bootz command fails in v2013.07-rc2

2013-07-04 Thread Simon Glass
Hi,

On Thu, Jul 4, 2013 at 4:32 PM, Tetsuyuki Kobayashi k...@kmckk.co.jpwrote:

 Hello,

 I found bootz command causes 'undefined instruction' exception
 on KZM-A9-GT board (armv7) in v2013.07-rc2.

 KZM-A9-GT# tftp zImage.kzm9g.v310; bootz
 smc911x: detected LAN9221 controller
 smc911x: phy initialized
 smc911x: MAC 00:01:9b:04:04:05
 Using smc911x-0 device
 TFTP from server 192.168.1.110; our IP address is 192.168.1.162
 Filename 'zImage.kzm9g.v310'.
 Load address: 0x4300
 Loading: #
  #
  #
  #
  #
  #
  #
  #
  1.8 MiB/s
 done
 Bytes transferred = 2453603 (257063 hex)
 undefined instruction
 pc : [0500661a]  lr : [5ff8c078]
 sp : 5fee99d0  ip : 0001 fp : 5fee9bc5
 r10: 0001  r9 : 5fee9ea8 r8 : 5fee9f48
 r7 : 00010209  r6 : 00d9 r5 : 014015c5  r4 : 0500571c
 r3 : 05005717  r2 : 05005717 r1 : 0014  r0 : 05005717
 Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
 Resetting CPU ...

 resetting ...



 At v2013.07-rc1, it was good.
 I tried 'git bisect' and got this result.

 $ git bisect good
 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 is the first bad commit
 commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30
 Author: Simon Glass s...@chromium.org
 Date:   Tue Jun 11 11:14:47 2013 -0700

 Refactor the bootm command to reduce code duplication

 Please take a look.


Thanks for letting me know - also there is another thread about this.

I will post some v2 patches soon, perhaps you can try to test and report
back.

Regards,
Simon
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Re: [U-Boot] [PATCH 3/3] bootm: Add the missing PREP stage to bootz

2013-07-04 Thread Simon Glass
Hi Robert,

On Thu, Jul 4, 2013 at 12:06 AM, Robert Nelson robertcnel...@gmail.comwrote:

  diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
  index 7b3e459..5749057 100644
  --- a/common/cmd_bootm.c
  +++ b/common/cmd_bootm.c
  @@ -1758,6 +1758,10 @@ static int bootz_start(cmd_tbl_t *cmdtp, int
  flag, int argc,
  int ret;
  void *zi_start, *zi_end;
 
  +   memset(images, 0, sizeof(bootm_headers_t));
  +   boot_start_lmb(images);
  +   images-os.os = IH_OS_LINUX;
  +
  ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
images, 1);
 
 
 
  So I'm going to quickly re-test the wand, which is a device tree:
  'bootz zImage - ftd boot...

 Nope close half way there.. Still broken on Wand (device tree)

 Board file boot fine..

 bootz zImage
 bootz zImage initrd.img


 The device tree cases, lock up..
 bootz zImage - device.dtb
 bootz zImage initrd.img device.dtb

 Environment size: 2316/8188 bytes
 = load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
 4109672 bytes read in 310 ms (12.6 MiB/s)
 = load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}
 22150 bytes read in 259 ms (83 KiB/s)
 = run mmcargs
 = bootz ${loadaddr} - ${fdt_addr}

 Starting kernel ...


I hope to be able to test this on an ARM platform tomorrow (unfortunately I
am travelling and don't have the right setup).

In the meantime I have done some testing with sandbox and will send out
some v2 patches which correct two more errors. I finally realised that when
I tested this I was probably using zboot instead of bootz. Despite the
obvious difference it somehow escaped me.

Regards,
Simon
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[U-Boot] [PATCH v2 1/5] bootm: Handle errors consistently

2013-07-04 Thread Simon Glass
A recent bootm fix left the error path incomplete. Reinstate this so that
failures in bootm stages are handled properly.

Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Correct checking in the no-error case

 common/cmd_bootm.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 02a5013..652513a 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -684,12 +684,8 @@ static int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int 
argc,
if (!ret  (states  BOOTM_STATE_OS_GO)) {
ret = boot_selected_os(argc, argv, BOOTM_STATE_OS_GO,
images, boot_fn);
-   if (ret)
-   goto err;
}
 
-   return ret;
-
/* Deal with any fallout */
 err:
if (iflag)
@@ -699,7 +695,7 @@ err:
bootstage_error(BOOTSTAGE_ID_DECOMP_UNIMPL);
else if (ret == BOOTM_ERR_RESET)
do_reset(cmdtp, flag, argc, argv);
-   else
+   else if (ret)
puts(subcommand not supported\n);
 
return ret;
-- 
1.8.3

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[U-Boot] [PATCH v2 5/5] bootm: Add the missing PREP stage to bootz and correct image handling

2013-07-04 Thread Simon Glass
In the recent bootm refactor, the PREP stage was missing in the bootz
command. This causes unpredictable behaviour.

The use of a local variable means that the reset of cmd_bootm.c does not
in fact use the same image structure, so remove this.

Also manually set the OS type to Linux, since this is the only possibility
at present, and we need to select the right boot function.

Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Remove local images variable
- Set OS type to Linux in all cases

 common/cmd_bootm.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index b89d6ad..6a635b0 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -1782,7 +1782,6 @@ static int bootz_start(cmd_tbl_t *cmdtp, int flag, int 
argc,
 
 int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   bootm_headers_t images;
int ret;
 
if (bootz_start(cmdtp, flag, argc, argv, images))
@@ -1794,8 +1793,10 @@ int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 */
bootm_disable_interrupts();
 
+   images.os.os = IH_OS_LINUX;
ret = do_bootm_states(cmdtp, flag, argc, argv,
- BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO,
+ BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
+ BOOTM_STATE_OS_GO,
  images, 1);
 
return ret;
-- 
1.8.3

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[U-Boot] [PATCH v2 3/5] bootm: Require boot function only if it is about to be used

2013-07-04 Thread Simon Glass
The original bootm code (before commit 35fc84f) did not check for a valid
boot function in the subcommand case, which was incorrect.

This check was introduced in all cases, but in fact we should only check
for the function when we need it. Otherwise in some cases the check fires
before the OS type is known.

Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to limit checking of rboot function validity

 common/cmd_bootm.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 0c88be1..63cbfae 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -605,7 +605,7 @@ static int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int 
argc,
 {
boot_os_fn *boot_fn;
ulong iflag = 0;
-   int ret = 0;
+   int ret = 0, need_boot_fn;
 
images-state |= states;
 
@@ -665,7 +665,10 @@ static int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int 
argc,
if (ret)
return ret;
boot_fn = boot_os[images-os.os];
-   if (boot_fn == NULL) {
+   need_boot_fn = states  (BOOTM_STATE_OS_CMDLINE |
+   BOOTM_STATE_OS_BD_T | BOOTM_STATE_OS_PREP |
+   BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO);
+   if (boot_fn == NULL  need_boot_fn) {
if (iflag)
enable_interrupts();
printf(ERROR: booting os '%s' (%d) is not supported\n,
-- 
1.8.3

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[U-Boot] [PATCH v2 4/5] bootm: Clean up bootz_setup() function

2013-07-04 Thread Simon Glass
This function has no prototype in the headers and passes void * around, thus
requiring several casts. Tidy this up.

- Add new patch to clean up bootz_setup() function

Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None

 arch/arm/lib/bootm.c | 14 --
 common/cmd_bootm.c   |  8 +++-
 include/image.h  | 11 +++
 3 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index b22fbc9..0325d08 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -300,21 +300,23 @@ struct zimage_header {
 
 #defineLINUX_ARM_ZIMAGE_MAGIC  0x016f2818
 
-int bootz_setup(void *image, void **start, void **end)
+int bootz_setup(ulong image, ulong *start, ulong *end)
 {
-   struct zimage_header *zi = (struct zimage_header *)image;
+   struct zimage_header *zi;
 
+   zi = (struct zimage_header *)map_sysmem(image, 0);
if (zi-zi_magic != LINUX_ARM_ZIMAGE_MAGIC) {
puts(Bad Linux ARM zImage magic!\n);
return 1;
}
 
-   *start = (void *)zi-zi_start;
-   *end = (void *)zi-zi_end;
+   *start = zi-zi_start;
+   *end = zi-zi_end;
 
-   debug(Kernel image @ 0x%08x [ 0x%08x - 0x%08x ]\n,
-   (uint32_t)image, (uint32_t)*start, (uint32_t)*end);
+   printf(Kernel image @ %#08lx [ %#08lx - %#08lx ]\n, image, *start,
+ *end);
 
return 0;
 }
+
 #endif /* CONFIG_CMD_BOOTZ */
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 63cbfae..b89d6ad 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -1737,15 +1737,13 @@ static int do_bootm_integrity(int flag, int argc, char 
* const argv[],
 
 #ifdef CONFIG_CMD_BOOTZ
 
-static int __bootz_setup(void *image, void **start, void **end)
+int __weak bootz_setup(ulong image, ulong *start, ulong *end)
 {
/* Please define bootz_setup() for your platform */
 
puts(Your platform's zImage format isn't supported yet!\n);
return -1;
 }
-int bootz_setup(void *image, void **start, void **end)
-   __attribute__((weak, alias(__bootz_setup)));
 
 /*
  * zImage booting support
@@ -1754,7 +1752,7 @@ static int bootz_start(cmd_tbl_t *cmdtp, int flag, int 
argc,
char * const argv[], bootm_headers_t *images)
 {
int ret;
-   void *zi_start, *zi_end;
+   ulong zi_start, zi_end;
 
ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
  images, 1);
@@ -1770,7 +1768,7 @@ static int bootz_start(cmd_tbl_t *cmdtp, int flag, int 
argc,
images-ep);
}
 
-   ret = bootz_setup((void *)images-ep, zi_start, zi_end);
+   ret = bootz_setup(images-ep, zi_start, zi_end);
if (ret != 0)
return 1;
 
diff --git a/include/image.h b/include/image.h
index a7b93db..9c3e46f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -662,6 +662,17 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
  */
 int image_setup_linux(bootm_headers_t *images);
 
+/**
+ * bootz_setup() - Extract stat and size of a Linux xImage
+ *
+ * @image: Address of image
+ * @start: Returns start address of image
+ * @end : Returns end address of image
+ * @return 0 if OK, 1 if the image was not recognised
+ */
+int bootz_setup(ulong image, ulong *start, ulong *end);
+
+
 /***/
 /* New uImage format specific code (prefixed with fit_) */
 /***/
-- 
1.8.3

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[U-Boot] [PATCH v2 2/5] bootm: Disable interrupts only when loading

2013-07-04 Thread Simon Glass
With the move of the interrupt code to earlier in the sequence, we
exposed a problem where the interrupts are disabled at each bootm
stage. This is not correct - it should be done only once. Let's disable
interrupts in the LOAD stage. Put the code in a function for clarity.

Also, bootz lost its interrupt code altogether, so reinstate it.

Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None

 common/cmd_bootm.c | 67 +++---
 1 file changed, 43 insertions(+), 24 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 652513a..0c88be1 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -539,6 +539,42 @@ static int boot_selected_os(int argc, char * const argv[], 
int state,
 }
 
 /**
+ * bootm_disable_interrupts() - Disable interrupts in preparation for load/boot
+ *
+ * @return interrupt flag (0 if interrupts were disabled, non-zero if they were
+ * enabled)
+ */
+static ulong bootm_disable_interrupts(void)
+{
+   ulong iflag;
+
+   /*
+* We have reached the point of no return: we are going to
+* overwrite all exception vector code, so we cannot easily
+* recover from any failures any more...
+*/
+   iflag = disable_interrupts();
+#ifdef CONFIG_NETCONSOLE
+   /* Stop the ethernet stack if NetConsole could have left it up */
+   eth_halt();
+#endif
+
+#if defined(CONFIG_CMD_USB)
+   /*
+* turn off USB to prevent the host controller from writing to the
+* SDRAM while Linux is booting. This could happen (at least for OHCI
+* controller), because the HCCA (Host Controller Communication Area)
+* lies within the SDRAM and the host controller writes continously to
+* this area (as busmaster!). The HccaFrameNumber is for example
+* updated every 1 ms within the HCCA structure in SDRAM! For more
+* details see the OpenHCI specification.
+*/
+   usb_stop();
+#endif
+   return iflag;
+}
+
+/**
  * Execute selected states of the bootm command.
  *
  * Note the arguments to this state must be the first argument, Any 'bootm'
@@ -588,34 +624,11 @@ static int do_bootm_states(cmd_tbl_t *cmdtp, int flag, 
int argc,
argc = 0;   /* consume the args */
}
 
-   /*
-* We have reached the point of no return: we are going to
-* overwrite all exception vector code, so we cannot easily
-* recover from any failures any more...
-*/
-   iflag = disable_interrupts();
-#ifdef CONFIG_NETCONSOLE
-   /* Stop the ethernet stack if NetConsole could have left it up */
-   eth_halt();
-#endif
-
-#if defined(CONFIG_CMD_USB)
-   /*
-* turn off USB to prevent the host controller from writing to the
-* SDRAM while Linux is booting. This could happen (at least for OHCI
-* controller), because the HCCA (Host Controller Communication Area)
-* lies within the SDRAM and the host controller writes continously to
-* this area (as busmaster!). The HccaFrameNumber is for example
-* updated every 1 ms within the HCCA structure in SDRAM! For more
-* details see the OpenHCI specification.
-*/
-   usb_stop();
-#endif
-
/* Load the OS */
if (!ret  (states  BOOTM_STATE_LOADOS)) {
ulong load_end;
 
+   iflag = bootm_disable_interrupts();
ret = bootm_load_os(images, load_end, 0);
if (ret  ret != BOOTM_ERR_OVERLAP)
goto err;
@@ -1774,6 +1787,12 @@ int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
if (bootz_start(cmdtp, flag, argc, argv, images))
return 1;
 
+   /*
+* We are doing the BOOTM_STATE_LOADOS state ourselves, so must
+* disable interrupts ourselves
+*/
+   bootm_disable_interrupts();
+
ret = do_bootm_states(cmdtp, flag, argc, argv,
  BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO,
  images, 1);
-- 
1.8.3

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[U-Boot] [PATCH] zmx25: Select CONFIG_OF_LIBFDT

2013-07-04 Thread Fabio Estevam
From: Fabio Estevam fabio.este...@freescale.com

Allow the boot of a device tree kernel.

Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
 include/configs/zmx25.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index e9216d9..871009d 100644
--- a/include/configs/zmx25.h
+++ b/include/configs/zmx25.h
@@ -90,6 +90,7 @@
 #include config_cmd_default.h
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_CACHE
+#define CONFIG_OF_LIBFDT
 
 /*
  * Additional command
-- 
1.8.1.2

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Re: [U-Boot] [U-boot] DFU tools copyright

2013-07-04 Thread Stefan Schmidt
Hello.

On Thu, 2013-07-04 at 11:37, Lukasz Majewski wrote:
 On Thu, 04 Jul 2013 17:20:34 +0800, tiger...@viatech.com.cn wrote:
 
  Hi, experts:
  I found DFU tool code had been put in drivers/dfu directory.
  Previously, it was owned by Samsung Electronics.
  
 
 Could you be more specific here? 
 
 All DFU related files have following headers:
 /*
  * g_dnl.c -- USB Downloader Gadget
  *
  * Copyright (C) 2012 Samsung Electronics
  * Lukasz Majewski  l.majew...@samsung.com

Which reminds about an issue I brought up before. Your DFU
implementation is heavily based on the original DFU code Harald Welte
wrote. The state machine even still have the same fixmes and comments
but you removed his, and maybe others, copyright here.

As you definitely not wrote the code from scratch you should keep the
original copyright intact and not only placing the Samsung copyright
here.

regards
Stefan Schmidt
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Re: [U-Boot] : MACB TX timeout

2013-07-04 Thread Bo Shen

Hi Jagan Teki,

On 7/5/2013 03:36, Jagan Teki wrote:

Hi,

Did anyone find this TX timeout issue on macb(gmac)?
I observed this issue when i enable d-cache.

Log:

zynq-uboot ping 10.10.70.101
gmac0: PHY present at 7
gmac0: link up, 1000Mbps full-duplex (lpa: 0x3800)
Using gmac0 device
gmac0: TX timeout
gmac0: TX timeout
ping failed; host 10.10.70.101 is not alive


Sure, this will happen, as the macb driver is not worked with d-cache 
enabled.
If you want to let the macb work with d-cache enable, you should modify 
the driver.


BTW, if you want to enable d-cache, the MMU must be enabled.


Any help.!

--
Thanks,
Jagan.


Best Regards,
Bo Shen

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Re: [U-Boot] : MACB TX timeout

2013-07-04 Thread Jagan Teki
Hi Bo Shen,

Thanks for your info.

On Fri, Jul 5, 2013 at 7:04 AM, Bo Shen voice.s...@atmel.com wrote:
 Hi Jagan Teki,


 On 7/5/2013 03:36, Jagan Teki wrote:

 Hi,

 Did anyone find this TX timeout issue on macb(gmac)?
 I observed this issue when i enable d-cache.

 Log:
 
 zynq-uboot ping 10.10.70.101
 gmac0: PHY present at 7
 gmac0: link up, 1000Mbps full-duplex (lpa: 0x3800)
 Using gmac0 device
 gmac0: TX timeout
 gmac0: TX timeout
 ping failed; host 10.10.70.101 is not alive


 Sure, this will happen, as the macb driver is not worked with d-cache
 enabled.
Can you point any existing driver that have a d-cache working.

 If you want to let the macb work with d-cache enable, you should modify the
 driver.

 BTW, if you want to enable d-cache, the MMU must be enabled.
Specific setup to enable to MMU, please point.
I see that we need to write dram_bank_mmu_setup() and
arm_init_domains() on d-cache enable code in
soc folders is that true? please let me know your views.

--
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Jagan.
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Re: [U-Boot] [RESEND PATCH 1/4] arm:goni: Update configuration for goni target

2013-07-04 Thread Jaehoon Chung
On 07/04/2013 07:52 PM, Lukasz Majewski wrote:
 From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
 
 Configuration file for GONI has been updated to support FAT file system,
 new mmc partitioning scheme and read linux kernel from eMMC instead of
 OneNAND.
 
 Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
 Cc: Minkyu Kang mk7.k...@samsung.com
 ---
  include/configs/s5p_goni.h |   17 +
  1 file changed, 13 insertions(+), 4 deletions(-)
 
 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
 index 56e8347..ec43652 100644
 --- a/include/configs/s5p_goni.h
 +++ b/include/configs/s5p_goni.h
 @@ -107,7 +107,7 @@
  
  #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
  
 -#define CONFIG_BOOTCOMMAND   run ubifsboot
 +#define CONFIG_BOOTCOMMAND   run mmcboot
  
  #define CONFIG_DEFAULT_CONSOLE   console=ttySAC2,115200n8\0
  
 @@ -137,7 +137,7 @@
   onenand erase 0x0156 0x1eaa; \
   onenand write 0x3200 0x126 0x8C\0 \
   bootk= \
 - onenand read 0x30007FC0 0xc0 0x60; \
 + run loaduimage; \
   bootm 0x30007FC0\0 \
   flashboot= \
   set bootargs root=/dev/mtdblock${bootblock}  \
 @@ -156,16 +156,21 @@
   set bootargs  CONFIG_RAMDISK_BOOT \
initrd=0x3300,8M ramdisk=8192\0 \
   mmcboot= \
 - set bootargs root=${mmcblk} rootfstype=${rootfstype} \
 + set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart}  \
 + rootfstype=${rootfstype} \
Could you add the rootwait?
   CONFIG_UBI_MTD  ${opts} ${lcdinfo}  \
   CONFIG_COMMON_BOOT ; run bootk\0 \
   boottrace=setenv opts initcall_debug; run bootcmd\0 \
   bootchart=set opts init=/sbin/bootchartd; run bootcmd\0 \
   verify=n\0 \
 - rootfstype=cramfs\0 \
 + rootfstype=ext4\0 \
   console= CONFIG_DEFAULT_CONSOLE \
   mtdparts= MTDPARTS_DEFAULT \
   meminfo=mem=80M mem=256M@0x4000 mem=128M@0x5000\0 \
 + loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
 + mmcdev=0\0 \
 + mmcbootpart=2\0 \
 + mmcrootpart=5\0 \
   mmcblk=/dev/mmcblk1p1\0 \
mmcblk can be removed?

Best Regards,
Jaehoon Chung
   bootblock=9\0 \
   ubiblock=8\0 \
 @@ -211,6 +216,10 @@
  
  #define CONFIG_DOS_PARTITION 1
  
 +/* FAT */
 +#define CONFIG_CMD_FAT
 +#define CONFIG_FAT_WRITE
 +
  #define CONFIG_SYS_INIT_SP_ADDR  (CONFIG_SYS_LOAD_ADDR - 0x100)
  
  #define CONFIG_SYS_CACHELINE_SIZE   64
 

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[U-Boot] Ethernet support on mx6slevk board

2013-07-04 Thread Shawn Guo
Hi,

I'm running U-Boot 2013.07-rc2 and seeing Ethernet is failed to
initialize.  Is it a known issue or something not supported yet?  It's
unlikely my setup problem, since I have a vendor U-Boot running the
board just fine.

Shawn
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