Re: [U-Boot] [ANN] U-Boot v2013.07 released
Dear Albert, In message 20130723072832.1a9b179a@lilith you wrote: I'm pleased to announce that v2013.07 has been tagged and pushed out, and will be available shortly in the usual places. ... I'm not seeing the version tag in the master branch or elsewhere in the u-boot repo. Should it not have appeared now? It should, but I can't see it either. I guess Tom must have missed the push out step... Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I have often regretted my speech, never my silence. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCHv2 1/8] omap5: add qspi support
From: Matt Porter matt.por...@linaro.org
Add QSPI definitions and clock configuration support.
Signed-off-by: Matt Porter matt.por...@linaro.org
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |7 +++
arch/arm/cpu/armv7/omap5/prcm-regs.c |1 +
arch/arm/include/asm/arch-omap5/omap.h |3 +++
arch/arm/include/asm/arch-omap5/spl.h |1 +
arch/arm/include/asm/omap_common.h |1 +
5 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
b/arch/arm/cpu/armv7/omap5/hw_data.c
index 07b1108..4d0eb45 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -425,6 +425,9 @@ void enable_basic_clocks(void)
(*prcm)-cm_wkup_wdtimer2_clkctrl,
(*prcm)-cm_l4per_uart3_clkctrl,
(*prcm)-cm_l4per_i2c1_clkctrl,
+ #ifdef CONFIG_TI_QSPI
+ (*prcm)-cm_l4per_qspi_clkctrl,
+ #endif
0
};
@@ -453,6 +456,10 @@ void enable_basic_clocks(void)
clk_modules_explicit_en_essential,
1);
+#ifdef CONFIG_TI_QSPI
+ setbits_le32((*prcm)-cm_l4per_qspi_clkctrl, (124));
+#endif
+
/* Enable SCRM OPT clocks for PER and CORE dpll */
setbits_le32((*prcm)-cm_wkupaon_scrm_clkctrl,
OPTFCLKEN_SCRM_PER_MASK);
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index e839ff5..7d41744 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -942,6 +942,7 @@ struct prcm_regs const dra7xx_prcm = {
.cm_l4per_gpio8_clkctrl = 0x4a009818,
.cm_l4per_mmcsd3_clkctrl= 0x4a009820,
.cm_l4per_mmcsd4_clkctrl= 0x4a009828,
+ .cm_l4per_qspi_clkctrl = 0x4a009838,
.cm_l4per_uart1_clkctrl = 0x4a009840,
.cm_l4per_uart2_clkctrl = 0x4a009848,
.cm_l4per_uart3_clkctrl = 0x4a009850,
diff --git a/arch/arm/include/asm/arch-omap5/omap.h
b/arch/arm/include/asm/arch-omap5/omap.h
index 5e6d82e..30c913e 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -77,6 +77,9 @@
/* GPMC */
#define OMAP54XX_GPMC_BASE 0x5000
+/* QSPI */
+#define QSPI_BASE 0x4B30
+
/*
* Hardware Register Details
*/
diff --git a/arch/arm/include/asm/arch-omap5/spl.h
b/arch/arm/include/asm/arch-omap5/spl.h
index d4d353c..8905cb8 100644
--- a/arch/arm/include/asm/arch-omap5/spl.h
+++ b/arch/arm/include/asm/arch-omap5/spl.h
@@ -31,6 +31,7 @@
#define BOOT_DEVICE_MMC15
#define BOOT_DEVICE_MMC26
#define BOOT_DEVICE_MMC2_2 7
+#define BOOT_DEVICE_SPI10
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index 0dbe81b..e37de8c 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -281,6 +281,7 @@ struct prcm_regs {
u32 cm_l4per_mmcsd4_clkctrl;
u32 cm_l4per_msprohg_clkctrl;
u32 cm_l4per_slimbus2_clkctrl;
+ u32 cm_l4per_qspi_clkctrl;
u32 cm_l4per_uart1_clkctrl;
u32 cm_l4per_uart2_clkctrl;
u32 cm_l4per_uart3_clkctrl;
--
1.7.1
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[U-Boot] [PATCHv2 4/8] dra7xx_evm: add SPL API, QSPI, and serial flash support
From: Matt Porter matt.por...@linaro.org
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Matt Porter matt.por...@linaro.org
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
board/ti/dra7xx/mux_data.h | 10 ++
include/configs/dra7xx_evm.h | 17 +
2 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 338a241..2441c55 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -53,5 +53,15 @@ const struct pad_conf_entry core_padconf_array_essential[] =
{
{UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */
{I2C1_SDA, (IEN | PTU | PDIS | M0)},/* I2C1_SDA */
{I2C1_SCL, (IEN | PTU | PDIS | M0)},/* I2C1_SCL */
+ {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */
+ {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */
+ {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */
+ {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */
+ {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */
+ {GPMC_A18, (IEN | PDIS | M1)}, /* QSPI1_SCLK */
+ {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */
+ {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */
+ {GPMC_CS2, (IEN | PTU | PDIS | M1)},/* QSPI1_CS0 */
+ {GPMC_CS3, (IEN | PTU | PDIS | M1)},/* QSPI1_CS1*/
};
#endif /* _MUX_DATA_DRA7XX_H_ */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index c11f005..f30a795 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -44,4 +44,21 @@
#define CONSOLEDEV ttyO0
+/* SPI */
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SF_DEFAULT_SPEED1200
+#define CONFIG_DEFAULT_SPI_MODESPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS 0
+#define CONFIG_SPL_SPI_CS 0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
+
#endif /* __CONFIG_DRA7XX_EVM_H */
--
1.7.1
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[U-Boot] [PATCHv2 6/8] drivers: mtd: qspi: Add quad read support
From: Ravikumar Kattekola r...@ti.com
Add Quad read mode (6 pin interface) support to spi flash
and ti qspi driver.
Quad mode (0x6bh on spansion) uses two extra pins (D2 and D3) for
data transfer apart from the usual D0 and D1 pins thus transfering
4 bits per cycle.
Signed-off-by: Ravikumar Kattekola r...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/mtd/spi/spi_flash.c | 110 +-
drivers/mtd/spi/spi_flash_internal.h |2 +
drivers/spi/ti_qspi.c| 18 --
include/configs/dra7xx_evm.h |1 +
include/spi.h|2 +
5 files changed, 127 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 5f8db7b..c81f402 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -42,7 +42,12 @@ static int spi_flash_read_write(struct spi_slave *spi,
debug(SF: Failed to send command (%zu bytes): %d\n,
cmd_len, ret);
} else if (data_len != 0) {
- ret = spi_xfer(spi, data_len * 8, data_out, data_in,
SPI_XFER_END);
+ if (spi-quad_enable)
+ flags = SPI_6WIRE;
+ else
+ flags = 0;
+
+ ret = spi_xfer(spi, data_len * 8, data_out, data_in, flags |
SPI_XFER_END);
if (ret)
debug(SF: Failed to transfer %zu bytes of data: %d\n,
data_len, ret);
@@ -271,6 +276,51 @@ int spi_flash_read_common(struct spi_flash *flash, const
u8 *cmd,
return ret;
}
+int spi_flash_cmd_read_quad(struct spi_flash *flash, u32 offset,
+ size_t len, void *data)
+{
+ struct spi_slave *spi = flash-spi;
+
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[5];
+
+ spi-quad_enable = 1;
+ /* Handle memory-mapped SPI */
+ if (flash-memory_map)
+ memcpy(data, flash-memory_map + offset, len);
+
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_QUAD;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+ cmd[4] = 0x0;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+ data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
+
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
+
+ return ret;
+}
+
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
@@ -424,6 +474,56 @@ int spi_flash_bank_config(struct spi_flash *flash, u8
idcode0)
}
#endif
+int spi_flash_en_quad_mode(struct spi_flash *flash)
+{
+ u8 stat, con, cd;
+ u16 cr;
+ int ret;
+ cd = CMD_WRITE_STATUS;
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret 0) {
+ debug(SF: enabling write failed\n);
+ goto out;
+ }
+ ret = spi_flash_cmd(flash-spi, CMD_READ_STATUS, stat, 1);
+ ret = spi_flash_cmd(flash-spi, CMD_READ_CONFIG, con, 1);
+ if (ret 0) {
+ debug(%s: SF: read CR failed\n, __func__);
+ goto out;
+ }
+ /* Byte 1 - status reg, Byte 2 - config reg */
+ cr = ((con | (0x1 1)) 8) | (stat 0);
+
+ ret = spi_flash_cmd_write(flash-spi, cd, 1, cr, 2);
+ if (ret) {
+ debug(SF: fail to write conf register\n);
+ goto out;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret 0) {
+ debug(SF: write conf register timed out\n);
+ goto out;
+ }
+
+ ret = spi_flash_cmd(flash-spi, CMD_READ_STATUS, stat, 1);
+ ret = spi_flash_cmd(flash-spi, CMD_READ_CONFIG, con, 1);
+ if (ret 0) {
+ debug(%s: SF: read CR failed\n, __func__);
+ goto out;
+ }
+ debug(%s: *** CR = %x\n, __func__, con);
+
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ debug(SF: disabling write failed\n);
+ goto out;
+ }
+out:
+ return ret;
+}
+
#ifdef CONFIG_OF_CONTROL
int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
{
@@ -578,6 +678,10 @@ struct spi_flash *spi_flash_probe(unsigned int bus,
unsigned int cs,
goto err_manufacturer_probe;
#endif
Re: [U-Boot] [PATCHv2 3/8] spi: add TI QSPI driver
Dear Sourav Poddar, In message 1374569979-28660-4-git-send-email-sourav.pod...@ti.com you wrote: From: Matt Porter matt.por...@linaro.org Adds a SPI master driver for the TI QSPI peripheral. Signed-off-by: Matt Porter matt.por...@linaro.org Signed-off-by: Sourav Poddar sourav.pod...@ti.com --- drivers/spi/Makefile |1 + drivers/spi/ti_qspi.c | 262 + 2 files changed, 263 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/ti_qspi.c when submitting a new version of a patch or patch series, it is mandatory to supply a chancgelog that desribes what you changed compareds to previous versions of the patch. This is necessary so that reviewers can see which of their hints were taken into account, etc. This is missing in all you patches of this series. Also, please run all your patches through checkpatch _before_ submitting. For this patch, I get some line over 80 characters wanings that need to be fixed. This should not happen. Please be more careful next time. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de We see things not as they are, but as we are. - H. M. Tomlinson ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv2 6/8] drivers: mtd: qspi: Add quad read support
Dear Sourav Poddar, In message 1374569979-28660-7-git-send-email-sourav.pod...@ti.com you wrote: From: Ravikumar Kattekola r...@ti.com Add Quad read mode (6 pin interface) support to spi flash and ti qspi driver. Quad mode (0x6bh on spansion) uses two extra pins (D2 and D3) for data transfer apart from the usual D0 and D1 pins thus transfering 4 bits per cycle. Signed-off-by: Ravikumar Kattekola r...@ti.com Signed-off-by: Sourav Poddar sourav.pod...@ti.com --- drivers/mtd/spi/spi_flash.c | 110 +- drivers/mtd/spi/spi_flash_internal.h |2 + drivers/spi/ti_qspi.c| 18 -- include/configs/dra7xx_evm.h |1 + include/spi.h|2 + 5 files changed, 127 insertions(+), 6 deletions(-) Again: change log missing, checkpatch issues (line over 80 characters). Please fix. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Veni, Vidi, VISA: I came, I saw, I did a little shopping. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv2 7/8] driver: spi: Add memory mapped read support
Dear Sourav Poddar,
In message 1374569979-28660-8-git-send-email-sourav.pod...@ti.com you wrote:
Qspi controller has a memory mapped port which can be used for
data transfers. First controller need to be configured through
configuration port, then for data read switch the controller
to memory mapped and read from the predefined location.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/mtd/spi/spansion.c |1 +
drivers/mtd/spi/spi_flash.c |8 +++-
drivers/spi/ti_qspi.c| 85
+++---
include/configs/dra7xx_evm.h |3 +-
include/spi.h|3 +
5 files changed, 84 insertions(+), 16 deletions(-)
changelog missing, and an awful lot of checkpatch issues which need to
be fixed:
ERROR: code indent should use tabs where possible
#112: FILE: drivers/mtd/spi/spansion.c:154:
+flash-memory_map = spi-memory_map;$
WARNING: please, no spaces at the start of a line
#112: FILE: drivers/mtd/spi/spansion.c:154:
+flash-memory_map = spi-memory_map;$
ERROR: code indent should use tabs where possible
#154: FILE: drivers/spi/ti_qspi.c:26:
+u32 cmd;$
WARNING: please, no spaces at the start of a line
#154: FILE: drivers/spi/ti_qspi.c:26:
+u32 cmd;$
ERROR: code indent should use tabs where possible
#155: FILE: drivers/spi/ti_qspi.c:27:
+u32 dc;$
WARNING: please, no spaces at the start of a line
#155: FILE: drivers/spi/ti_qspi.c:27:
+u32 dc;$
ERROR: code indent should use tabs where possible
#233: FILE: drivers/spi/ti_qspi.c:237:
+qslave-dc = 0;$
WARNING: please, no spaces at the start of a line
#233: FILE: drivers/spi/ti_qspi.c:237:
+qslave-dc = 0;$
ERROR: code indent should use tabs where possible
#234: FILE: drivers/spi/ti_qspi.c:238:
+if (qslave-mode SPI_CPHA)$
WARNING: please, no spaces at the start of a line
#234: FILE: drivers/spi/ti_qspi.c:238:
+if (qslave-mode SPI_CPHA)$
ERROR: code indent should use tabs where possible
#235: FILE: drivers/spi/ti_qspi.c:239:
+qslave-dc |= QSPI_CKPHA(slave-cs);$
WARNING: please, no spaces at the start of a line
#235: FILE: drivers/spi/ti_qspi.c:239:
+qslave-dc |= QSPI_CKPHA(slave-cs);$
ERROR: code indent should use tabs where possible
#236: FILE: drivers/spi/ti_qspi.c:240:
+if (qslave-mode SPI_CPOL)$
WARNING: please, no spaces at the start of a line
#236: FILE: drivers/spi/ti_qspi.c:240:
+if (qslave-mode SPI_CPOL)$
ERROR: code indent should use tabs where possible
#237: FILE: drivers/spi/ti_qspi.c:241:
+qslave-dc |= QSPI_CKPOL(slave-cs);$
WARNING: please, no spaces at the start of a line
#237: FILE: drivers/spi/ti_qspi.c:241:
+qslave-dc |= QSPI_CKPOL(slave-cs);$
ERROR: code indent should use tabs where possible
#238: FILE: drivers/spi/ti_qspi.c:242:
+if (qslave-mode SPI_CS_HIGH)$
WARNING: please, no spaces at the start of a line
#238: FILE: drivers/spi/ti_qspi.c:242:
+if (qslave-mode SPI_CS_HIGH)$
ERROR: code indent should use tabs where possible
#239: FILE: drivers/spi/ti_qspi.c:243:
+qslave-dc |= QSPI_CSPOL(slave-cs);$
WARNING: please, no spaces at the start of a line
#239: FILE: drivers/spi/ti_qspi.c:243:
+qslave-dc |= QSPI_CSPOL(slave-cs);$
ERROR: code indent should use tabs where possible
#241: FILE: drivers/spi/ti_qspi.c:245:
+writel(qslave-dc, qspi-spi_dc);$
WARNING: please, no spaces at the start of a line
#241: FILE: drivers/spi/ti_qspi.c:245:
+writel(qslave-dc, qspi-spi_dc);$
ERROR: code indent should use tabs where possible
#243: FILE: drivers/spi/ti_qspi.c:247:
+if (flags == SPI_XFER_MEM_MAP) {$
WARNING: please, no spaces at the start of a line
#243: FILE: drivers/spi/ti_qspi.c:247:
+if (flags == SPI_XFER_MEM_MAP) {$
ERROR: code indent should use tabs where possible
#244: FILE: drivers/spi/ti_qspi.c:248:
+writel(MM_SWITCH, qspi-spi_switch);$
WARNING: please, no spaces at the start of a line
#244: FILE: drivers/spi/ti_qspi.c:248:
+writel(MM_SWITCH, qspi-spi_switch);$
ERROR: code indent should use tabs where possible
#245: FILE: drivers/spi/ti_qspi.c:249:
+val = readl(CORE_CTRL_IO);$
WARNING: please, no spaces at the start of a line
#245: FILE: drivers/spi/ti_qspi.c:249:
+val = readl(CORE_CTRL_IO);$
ERROR: code indent should use tabs where possible
#246: FILE: drivers/spi/ti_qspi.c:250:
+val |= MEM_CS;$
WARNING: please, no spaces at the start of a line
#246: FILE: drivers/spi/ti_qspi.c:250:
+val |= MEM_CS;$
ERROR: code indent should use tabs where possible
#247: FILE: drivers/spi/ti_qspi.c:251:
+writel(val, CORE_CTRL_IO);$
WARNING: please, no spaces at the start of a line
#247: FILE: drivers/spi/ti_qspi.c:251:
+writel(val, CORE_CTRL_IO);$
ERROR: code indent should use tabs where
Re: [U-Boot] [PATCHv2 3/8] spi: add TI QSPI driver
On Tuesday 23 July 2013 02:53 PM, Wolfgang Denk wrote: Dear Sourav Poddar, In message1374569979-28660-4-git-send-email-sourav.pod...@ti.com you wrote: From: Matt Portermatt.por...@linaro.org Adds a SPI master driver for the TI QSPI peripheral. Signed-off-by: Matt Portermatt.por...@linaro.org Signed-off-by: Sourav Poddarsourav.pod...@ti.com --- drivers/spi/Makefile |1 + drivers/spi/ti_qspi.c | 262 + 2 files changed, 263 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/ti_qspi.c when submitting a new version of a patch or patch series, it is mandatory to supply a chancgelog that desribes what you changed compareds to previous versions of the patch. This is necessary so that reviewers can see which of their hints were taken into account, etc. This is missing in all you patches of this series. Ok. will add in the next version. Also, please run all your patches through checkpatch _before_ submitting. For this patch, I get some line over 80 characters wanings that need to be fixed. This should not happen. Please be more careful next time. Hmm...will check and remove. Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/7 v9] powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No change.
Change from v5:
- No change.
Change from v4:
- Use !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL)
- to replace to new symbols.
Change from v3:
- Give up new symbol and delete the line
- ifndef CONFIG_SPL_BUILD in common/env_common.c Change from v2:
- Split from Add the symbol for the minimal SPL used to eliminate unused
- code
Change from v1:
- Split from boot from SD card/SPI flash with SPL.
arch/powerpc/cpu/mpc85xx/tlb.c |3 ++-
arch/powerpc/cpu/mpc8xxx/law.c |6 --
include/configs/MPC8313ERDB.h |1 -
include/configs/P1022DS.h |1 -
include/configs/p1_p2_rdb_pc.h |1 -
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 0dff37f..b903d02 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -55,7 +55,8 @@ void init_tlbs(void)
return ;
}
-#if !defined(CONFIG_NAND_SPL) !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) \
+ (!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
phys_addr_t *rpn)
{
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 6f9d568..6c0a307 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -92,7 +92,8 @@ void disable_law(u8 idx)
return;
}
-#if !defined(CONFIG_NAND_SPL) !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) \
+ (!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
static int get_law_entry(u8 i, struct law_entry *e)
{
u32 lawar;
@@ -122,7 +123,8 @@ int set_next_law(phys_addr_t addr, enum law_size sz, enum
law_trgt_if id)
return idx;
}
-#if !defined(CONFIG_NAND_SPL) !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_NAND_SPL) \
+ (!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL))
int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
u32 idx;
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 1d753e7..0c15195 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -40,7 +40,6 @@
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET u-boot-with-spl.bin
#define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 9c27182..bcbda30 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -41,7 +41,6 @@
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET u-boot-with-spl.bin
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 2fa5372..b35b966 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -159,7 +159,6 @@
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET u-boot-with-spl.bin
--
1.7.0.4
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[U-Boot] [PATCH 5/7 v9] powerpc : p1022ds : enable p1022ds to start from eSPI with SPL
From: Ying Zhang b40...@freescale.com Enable p1022ds to start from eSPI with SPL. Signed-off-by: Ying Zhang b40...@freescale.com --- Change from v8: - No change. Change from v7: - No change. Change from v6: - No longer changes the header file included by the file - board/freescale/p1022ds/spl.c Change from v5: - Split from powerpc/p1022ds: boot from spi flash with SPL - this patch enable P1022DS to start from eSPI with SPL. Change from v4: - No change. Change from v3: - No change. Change from v2: - No change. Change from v1: - Split from boot from SD card/SPI flash with SPL. board/freescale/p1022ds/spl.c | 10 ++ include/configs/P1022DS.h | 36 +--- 2 files changed, 39 insertions(+), 7 deletions(-) diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c index 9927671..b6669f3 100644 --- a/board/freescale/p1022ds/spl.c +++ b/board/freescale/p1022ds/spl.c @@ -27,6 +27,7 @@ #include i2c.h #include ../common/ngpixis.h #include fsl_esdhc.h +#include spi_flash.h DECLARE_GLOBAL_DATA_PTR; @@ -53,6 +54,11 @@ void board_init_f(ulong bootflag) setbits_be32(gur-pmuxcr, in_be32(gur-pmuxcr) | MPC85xx_PMUXCR_SD_DATA); +#ifdef CONFIG_SPL_SPI_BOOT + /* Enable the SPI */ + clrsetbits_8(pixis-brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); +#endif + /* Read back the register to synchronize the write. */ in_be32(gur-pmuxcr); @@ -66,6 +72,8 @@ void board_init_f(ulong bootflag) bus_clk / 16 / CONFIG_BAUDRATE); #ifdef CONFIG_SPL_MMC_BOOT puts(\nSD boot...\n); +#elif defined(CONFIG_SPL_SPI_BOOT) + puts(\nSPI Flash boot...\n); #endif /* copy code to RAM and jump to it - this should not return */ @@ -107,5 +115,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); +#elif defined(CONFIG_SPL_SPI_BOOT) + spi_boot(); #endif } diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 5a532f4..11c464e 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -48,11 +48,33 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RAMBOOT_SPIFLASH -#define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0x1100 -#define CONFIG_RESET_VECTOR_ADDRESS0x1107fffc +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_FLASH_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET u-boot-with-spl.bin +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_PAD_TO 0x18000 +#define CONFIG_SPL_MAX_SIZE(96 * 1024) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST(0x1100) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x1100) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPTarch/powerpc/cpu/mpc85xx/u-boot.lds +#define CONFIG_SPL_SPI_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif #endif #define CONFIG_NAND_FSL_ELBC @@ -318,7 +340,7 @@ * Config the L2 Cache as L2 SRAM */ #if defined(CONFIG_SPL_BUILD) -#if defined(CONFIG_SDCARD) +#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) #define CONFIG_SYS_INIT_L2_ADDR0xf8f8 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_L2_SIZE (256 10) @@ -562,7 +584,7 @@ /* * Environment */ -#ifdef CONFIG_RAMBOOT_SPIFLASH +#ifdef CONFIG_SPIFLASH #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/7 v9] powerpc: p1022ds: add TPL for p1022ds nand boot
Dear ying.zh...@freescale.com,
In message 1374571024-15729-7-git-send-email-ying.zh...@freescale.com you
wrote:
From: Ying Zhang b40...@freescale.com
TPL is introduced in the patch NAND: TPL : introduce the TPL
based on the SPL, here enable TPL for p1022ds nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
ERROR: code indent should use tabs where possible
#155: FILE: board/freescale/p1022ds/spl.c:113:
+(uchar *)CONFIG_ENV_ADDR);$
CHECK: Alignment should match open parenthesis
#155: FILE: board/freescale/p1022ds/spl.c:113:
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+(uchar *)CONFIG_ENV_ADDR);
WARNING: please, no spaces at the start of a line
#155: FILE: board/freescale/p1022ds/spl.c:113:
+(uchar *)CONFIG_ENV_ADDR);$
CHECK: Blank lines aren't necessary before a close brace '}'
#330: FILE: include/configs/P1022DS.h:294:
+#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, }
total: 1 errors, 1 warnings, 2 checks, 223 lines checked
Please fix at least the errors and warnings.
Best regards,
Wolfgang Denk
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
There are very few personal problems that cannot be solved through a
suitable application of high explosives.
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Re: [U-Boot] [PATCH v4] dfu, nand, ubi: add partubi alt settings for updating ubi partition
Hello Scott,
Am 22.07.2013 23:24, schrieb Scott Wood:
On 07/18/2013 11:32:14 PM, Heiko Schocher wrote:
updating an ubi partition needs a completely erased mtd partition,
see:
http://lists.infradead.org/pipermail/linux-mtd/2011-May/035416.html
So, add partubi alt setting for the dfu_alt_info environment
variable to mark this partition as an ubi partition. In case we
update an ubi partition, we erase after flashing the image into the
partition, the remaining sektors.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
Cc: Tom Rini tr...@ti.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
- This patch is also a good starting point to fix up updating ubi, as
we currently use nand erase for erasing the sektors. This is
not the prefered way for writing an ubi image, see:
http://www.linux-mtd.infradead.org/faq/ubi.html#L_flash_img
This must be fixed ... we have no ubiformat in u-boot, or?
In the meantime, should you be using WITH_DROP_FFS when ubi is set? Though we
really should be skipping FFs at the end of each block, rather than just at the end of
the image.
Yes, but this would be another patch, as this patch did not
touch the nand write part ...!
- changes for v2:
- do not use spread = 1 for nand_erase_opts, to prevent
errormessage if there are bad blocks in the erase range.
- changes for v3:
- add comment from Marek Vasut:
- prevent losing memory
- added comment from Lukasz Majewski:
- move code to dfu_nand.c dfu_flush_medium_nand()
- changes for v4:
- add comment from Lukasz Majewski:
- move ubi var to internal struct struct nand_internal_data
---
drivers/dfu/dfu_nand.c | 58 ++
include/dfu.h | 2 ++
2 Dateien geändert, 60 Zeilen hinzugefügt(+)
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 07dee89..c0f8adf 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -148,11 +148,43 @@ static int dfu_read_medium_nand(struct dfu_entity *dfu,
u64 offset, void *buf,
return ret;
}
+static int dfu_flush_medium_nand(struct dfu_entity *dfu)
+{
+ int ret = 0;
+
+ /* in case of ubi partition, erase rest of the partition */
Did you have a chance to investigate the errors you saw when erasing the whole partition up front?
If there's other DFU data in the partition that needs to be preserved, then replace
partition with area reserved for this image.
Currently no :-(
But I hope to get the chance to fix this in the correct way, by
introducing an ubi format ... command ...
bye,
Heiko
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Re: [U-Boot] [ANN] U-Boot v2013.07 released
Hi Tom, On Mon, 22 Jul 2013 16:20:58 -0400, Tom Rini tr...@ti.com wrote: Hey all, I'm pleased to announce that v2013.07 has been tagged and pushed out, and will be available shortly in the usual places. There's once again been a lot of great work done, and aside from the usual rounds of cleanups, bug fixes and new SoC/board support or improvements (your favorite vendor has likely added, improved, or both, their current families support), one thing I want to call out here is the ability to do verified boot. For more details, take a look at doc/uImage.FIT/signature.txt but in short, you can now cryptographically sign your boot image (kernel, device tree, ramdisk) and verify them at run time. There's still work to be done to make it easier to tie things to a TPM (it's just scriptable today), but hey, there it is. One might even say this is one of those technical features that makes companies chose something other than U-Boot.. ARM-related repo custodians, FYI/ u-boot-arm/master merged (fast-forwarded actually) to u-boot/master. Tom Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/5] Introducing SPDX-License-Identifiers
Dear Roger, In message 20130712195225.horde.nbpzy2dgxlsdxq54jlmw...@mail.meier-kuhn.ch you wrote: - NOTE! This license does *not* cover the so-called standalone -applications that use U-Boot services by means of the jump table -provided by U-Boot exactly for this purpose - this is merely -considered normal use of U-Boot, and does *not* fall under the -heading of derived work. Do you plan to add this info to the new Licenses/README file again or do you consider to create kind of a U-Boot-exception? I've not really decided yet if I will (re-) add this to the Licenses/README, or if it should rather go into a separate Licenses/Exceptions file. But I will (re-) add it one way or another in one of the following patches. Thanks for the review. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de C++ was an interesting and valuable experiment, but we've learned its lessons and it's time to move on. - Peter Curran in dcqm4z@isgtec.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/6] am335x_evm: am33xx_spl_board_init function and scale core frequency
On 07/19/2013 02:00 PM, Tom Rini wrote:
Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed. In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later than rev A1, and then we can ramp up to the PG1.0 maximum
of 720Mhz. In the case of Beaglebone Black, we are either on PG2.0 that
supports 1GHz or PG2.1. As PG2.0 may or may not have efuse_sma set, we
cannot rely on this probe. In the case of the GP EVM, EVM SK and IDK we
need to rely on the efuse_sma if we are on PG2.1, and the defaults for
PG1.0/2.0.
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/include/asm/arch-am33xx/clocks_am33xx.h |8 ++
board/ti/am335x/board.c | 155
++
include/configs/am335x_evm.h |4 +
3 files changed, 167 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
index 89b63d9..834f24f 100644
--- a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
+++ b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
@@ -24,6 +24,14 @@
#define CONFIG_SYS_MPUCLK550
#endif
+/* MAIN PLL Fdll supported frequencies */
+#define MPUPLL_M_10001000
+#define MPUPLL_M_800 800
+#define MPUPLL_M_720 720
+#define MPUPLL_M_600 600
+#define MPUPLL_M_550 550
+#define MPUPLL_M_300 300
+
extern void pll_init(void);
extern void enable_emif_clocks(void);
extern void enable_dmm_clocks(void);
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index fdbe26c..6544931 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -33,6 +33,8 @@
#include i2c.h
#include miiphy.h
#include cpsw.h
+#include power/tps65217.h
+#include power/tps65910.h
#include board.h
DECLARE_GLOBAL_DATA_PTR;
@@ -282,6 +284,159 @@ int spl_start_uboot(void)
}
#endif
+void am33xx_spl_board_init(void)
+{
+ int mpu_vdd, mpu_pll, sil_rev;
+
+ /* Assume PG 1.0 */
+ mpu_pll = MPUPLL_M_720;
+
+ sil_rev = readl(cdev-deviceid) 28;
+ if (sil_rev == 1)
+ /* PG 2.0, efuse may not be set. */
+ mpu_pll = MPUPLL_M_800;
+ else if (sil_rev = 2) {
+ /* Check what the efuse says our max speed is. */
+ int efuse_arm_mpu_max_freq;
+ efuse_arm_mpu_max_freq = readl(cdev-efuse_sma);
+ switch ((efuse_arm_mpu_max_freq DEVICE_ID_MASK)) {
+ case AM335X_ZCZ_1000:
+ mpu_pll = MPUPLL_M_1000;
+ break;
+ case AM335X_ZCZ_800:
+ mpu_pll = MPUPLL_M_800;
+ break;
+ case AM335X_ZCZ_720:
+ mpu_pll = MPUPLL_M_720;
+ break;
+ case AM335X_ZCZ_600:
+ case AM335X_ZCE_600:
+ mpu_pll = MPUPLL_M_600;
+ break;
+ case AM335X_ZCZ_300:
+ case AM335X_ZCE_300:
+ mpu_pll = MPUPLL_M_300;
+ break;
+ }
+ }
+
+ if (board_is_bone() || board_is_bone_lt()) {
+ /* BeagleBone PMIC Code */
+ int usb_cur_lim;
+
+ /*
+ * Only perform PMIC configurations if board rev A1
+ * on Beaglebone White
+ */
+ if (board_is_bone() !strncmp(header.version, 00A1, 4))
+ return;
+
+ if (i2c_probe(TPS65217_CHIP_PM))
+ return;
+
+ /*
+ * On Beaglebone White we need to ensure we have AC power
+ * before increasing the frequency.
+ */
+ if (board_is_bone()) {
+ uchar pmic_status_reg;
+ if (tps65217_reg_read(STATUS, pmic_status_reg))
+ return;
+ if (!(pmic_status_reg PWR_SRC_AC_BITMASK)) {
+ puts(No AC power, disabling frequency
switch\n);
+ return;
+ }
+ }
+
+ /*
+ * Increase USB current limit to 1300mA or 1800mA and set
+ * the MPU voltage controller as needed.
+ */
+ if (mpu_pll == MPUPLL_M_1000) {
+ usb_cur_lim = USB_INPUT_CUR_LIMIT_1800MA;
+ mpu_vdd = DCDC_VOLT_SEL_1325MV;
+ } else {
+ usb_cur_lim = USB_INPUT_CUR_LIMIT_1300MA;
+ mpu_vdd = DCDC_VOLT_SEL_1275MV;
+ }
+
+ if (tps65217_reg_write(PROT_LEVEL_NONE, POWER_PATH,
+usb_cur_lim, USB_INPUT_CUR_LIMIT_MASK))
+
Re: [U-Boot] [PATCH] am335x:Handle worst case scenario for Errata 1.0.24
On 07/22/2013 09:42 AM, Tom Rini wrote:
From: Steve Kipisz s-kipi...@ti.com
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.
Cc: Enric Balletbo i Serra eballe...@iseebcn.com
Cc: Lars Poeschel poesc...@lemonage.de
Signed-off-by: Steve Kipisz s-kipi...@ti.com
[trini: Adapt to current framework]
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c|2 +
arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 72
++
arch/arm/include/asm/arch-am33xx/clocks_am33xx.h |3 +
arch/arm/include/asm/arch-am33xx/sys_proto.h |1 +
board/ti/am335x/board.c | 11
include/configs/pcm051.h |1 +
include/power/tps65217.h |1 +
7 files changed, 67 insertions(+), 24 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 9356501..03427da 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -158,6 +158,8 @@ int arch_misc_init(void)
*/
__weak void am33xx_spl_board_init(void)
{
+ mpu_pll_config_val(CONFIG_SYS_MPUCLK);
+ core_pll_config(OPP_100);
}
void rtc32k_enable(void)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
index 9c4d0b4..ef06814 100644
--- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
@@ -50,12 +50,17 @@
/* Core PLL Fdll = 1 GHZ, */
#define COREPLL_M1000
+#define COREPLL_M_OPP50 50
#define COREPLL_N(OSC-1)
#define COREPLL_M4 10 /* CORE_CLKOUTM4 = 200 MHZ */
#define COREPLL_M5 8 /* CORE_CLKOUTM5 = 250 MHZ */
#define COREPLL_M6 4 /* CORE_CLKOUTM6 = 500 MHZ */
+#define COREPLL_M4_OPP50 1
+#define COREPLL_M5_OPP50 1
+#define COREPLL_M6_OPP50 1
+
/*
* USB PHY clock is 960 MHZ. Since, this comes directly from Fdll, Fdll
* frequency needs to be set to 960 MHZ. Hence,
@@ -274,12 +279,7 @@ void mpu_pll_config_val(int mpull_m)
;
}
-static void mpu_pll_config(void)
-{
- mpu_pll_config_val(CONFIG_SYS_MPUCLK);
-}
-
-static void core_pll_config(void)
+void core_pll_config(int opp)
{
u32 clkmode, clksel, div_m4, div_m5, div_m6;
@@ -293,29 +293,53 @@ static void core_pll_config(void)
writel(PLL_BYPASS_MODE, cmwkup-clkmoddpllcore);
while (readl(cmwkup-idlestdpllcore) != ST_MN_BYPASS)
- ;
+ ;
+ if (opp == OPP_50) {
+ clksel = clksel (~CLK_SEL_MASK);
+ clksel = clksel | ((COREPLL_M_OPP50 CLK_SEL_SHIFT)
+ | COREPLL_N);
+ writel(clksel, cmwkup-clkseldpllcore);
- clksel = clksel (~CLK_SEL_MASK);
- clksel = clksel | ((COREPLL_M CLK_SEL_SHIFT) | COREPLL_N);
- writel(clksel, cmwkup-clkseldpllcore);
+ div_m4 = div_m4 ~CLK_DIV_MASK;
+ div_m4 = div_m4 | COREPLL_M4_OPP50;
+ writel(div_m4, cmwkup-divm4dpllcore);
- div_m4 = div_m4 ~CLK_DIV_MASK;
- div_m4 = div_m4 | COREPLL_M4;
- writel(div_m4, cmwkup-divm4dpllcore);
+ div_m5 = div_m5 ~CLK_DIV_MASK;
+ div_m5 = div_m5 | COREPLL_M5_OPP50;
+ writel(div_m5, cmwkup-divm5dpllcore);
- div_m5 = div_m5 ~CLK_DIV_MASK;
- div_m5 = div_m5 | COREPLL_M5;
- writel(div_m5, cmwkup-divm5dpllcore);
+ div_m6 = div_m6 ~CLK_DIV_MASK;
+ div_m6 = div_m6 | COREPLL_M6_OPP50;
+ writel(div_m6, cmwkup-divm6dpllcore);
- div_m6 = div_m6 ~CLK_DIV_MASK;
- div_m6 = div_m6 | COREPLL_M6;
- writel(div_m6, cmwkup-divm6dpllcore);
+ clkmode = clkmode | CLK_MODE_SEL;
+ writel(clkmode, cmwkup-clkmoddpllcore);
- clkmode = clkmode | CLK_MODE_SEL;
- writel(clkmode, cmwkup-clkmoddpllcore);
+ while (readl(cmwkup-idlestdpllcore) != ST_DPLL_CLK)
+ ;
+ } else {
+ clksel = clksel (~CLK_SEL_MASK);
+ clksel = clksel | ((COREPLL_M CLK_SEL_SHIFT) | COREPLL_N);
+ writel(clksel, cmwkup-clkseldpllcore);
+
+ div_m4 = div_m4 ~CLK_DIV_MASK;
+ div_m4 = div_m4 | COREPLL_M4;
+ writel(div_m4, cmwkup-divm4dpllcore);
+
+ div_m5 = div_m5 ~CLK_DIV_MASK;
+ div_m5 = div_m5 | COREPLL_M5;
+ writel(div_m5, cmwkup-divm5dpllcore);
+
+ div_m6 = div_m6 ~CLK_DIV_MASK;
+ div_m6 = div_m6 | COREPLL_M6;
+ writel(div_m6, cmwkup-divm6dpllcore);
+
+ clkmode = clkmode | CLK_MODE_SEL;
+
Re: [U-Boot] [PATCH] usb: ehci-omap: Don't softreset USB High-speed Host (UHH) Module
On 07/22/2013 03:52 AM, Marek Vasut wrote: Dear Roger Quadros, Fixes NFS root problems with Beagle (3530 ES1.0) when used with external USB-ethernet adapter and USB start command used within u-boot. Soft resetting the UHH module causes instability issues on all OMAPs so we just avoid it. See OMAP36xx Errata i571: USB host EHCI may stall when entering smart-standby mode i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock On OMAP4/5, soft-resetting the UHH module can put it into Smart-Idle mode and lead to a deadlock. On OMAP3 this doesn't seem to be the case but still instabilities are observed on beagle (3530 ES1.0) if soft-reset is used. e.g. NFS root failures with Linux kernel. Signed-off-by: Roger Quadros rog...@ti.com Acked-by: Marek Vasut ma...@denx.de Now it all depends on Tom, but this would be a last-second save ;-) Best regards, Marek Vasut Tested-by: Dan Murphy dmur...@ti.com -- -- Dan Murphy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] PATCH, RESEND] ext4fs: le32_to_cpu() used on a 16-bit field
From 08b32b6511035c4a558773a992eb1ffa63521349 Mon Sep 17 00:00:00 2001
In-Reply-To: 20130719090305.16c47d8e@amdc308.digital.local
References: 20130719090305.16c47d8e@amdc308.digital.local
From: Rommel G Custodio sessyargc...@gmail.com
Date: Sat, 20 Jul 2013 17:03:23 +0900
Subject: [PATCH, RESEND] ext4fs: le32_to_cpu() used on a 16-bit field
To: u-boot@lists.denx.de
Cc: Lukasz Majewski l.majew...@samsung.com
Dear Lukasz Majewski
On 2013.07/19, Lukasz Majewski wrote:
fatal: corrupt patch at line 111
I cannot apply this patch with either git am -3 or git apply.
I'm resending the patch.
(Sorry, I can't CC anyone directly as I'm using the gmane post
interface)
All the best,
Rommel
Signed-off-by: Rommel G Custodio sessyargc...@gmail.com
---
fs/ext4/ext4_common.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 2776293..ff9c4ec 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -1432,7 +1432,7 @@ static struct ext4_extent_header *ext4fs_get_extent_block
while (1) {
index = (struct ext4_extent_idx *)(ext_block + 1);
- if (le32_to_cpu(ext_block-eh_magic) != EXT4_EXT_MAGIC)
+ if (le16_to_cpu(ext_block-eh_magic) != EXT4_EXT_MAGIC)
return 0;
if (ext_block-eh_depth == 0)
@@ -1440,14 +1440,14 @@ static struct ext4_extent_header
*ext4fs_get_extent_block
i = -1;
do {
i++;
- if (i = le32_to_cpu(ext_block-eh_entries))
+ if (i = le16_to_cpu(ext_block-eh_entries))
break;
} while (fileblock le32_to_cpu(index[i].ei_block));
if (--i 0)
return 0;
- block = le32_to_cpu(index[i].ei_leaf_hi);
+ block = le16_to_cpu(index[i].ei_leaf_hi);
block = (block 32) + le32_to_cpu(index[i].ei_leaf_lo);
if (ext4fs_devread((lbaint_t)block log2_blksz, 0, fs-blksz,
@@ -1548,17 +1548,17 @@ long int read_allocated_block(struct ext2_inode *inode,
int fileblock)
do {
i++;
- if (i = le32_to_cpu(ext_block-eh_entries))
+ if (i = le16_to_cpu(ext_block-eh_entries))
break;
} while (fileblock = le32_to_cpu(extent[i].ee_block));
if (--i = 0) {
fileblock -= le32_to_cpu(extent[i].ee_block);
- if (fileblock = le32_to_cpu(extent[i].ee_len)) {
+ if (fileblock = le16_to_cpu(extent[i].ee_len)) {
free(buf);
return 0;
}
- start = le32_to_cpu(extent[i].ee_start_hi);
+ start = le16_to_cpu(extent[i].ee_start_hi);
start = (start 32) +
le32_to_cpu(extent[i].ee_start_lo);
free(buf);
--
1.8.3.3
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Re: [U-Boot] [Ac100] [PATCH 3/3] ARM: tegra: paz00: enable nveckeyboard support
On Friday 19 July 2013 13:14:13 Stephen Warren wrote:
On 07/19/2013 02:47 AM, Andrey Danin wrote:
Signed-off-by: Andrey Danin danind...@mail.ru
(Some patch descriptions would be useful)
diff --git a/board/compal/dts/tegra20-paz00.dts
b/board/compal/dts/tegra20-paz00.dts
+ nvec {
+ compatible = nvidia,tegra20-nvec;
+ reg = 0x7000c500 0x100;
+ clock-frequency = 8;
+ request-gpios = gpio 170 0; /* gpio PV2 */
+ slave-addr = 138;
+ };
I would rather not propagate this DT binding. We need to fix the binding
to clearly separate the concepts of:
so here we go again. I think I have to take this on my shoulders since I
didn't got it right yet in the kernel.
a) The I2C slave controller (which should be a standalone driver for the
Tegra I2C slave HW).
b) The protocol sent over the I2C slave channel (which would be specific
to NVEC, implement the GPIO hand-shaking, etc.).
c) The devices that communicate over the protocol (keyboard in this case).
I suspect we need separate DT nodes/sub-nodes for all of those, and a
method of hooking them all together.
Let's skip how this may actually look like in software. Given the discussions
we had in the past, I propose the following binding:
i2c-slave@7000c500 {
compatible = nvidia,tegra20-i2c-slave;
reg = 0x7000c500 0x100;
interrupts = 0 92 0x04;
#address-cells = 1;
#size-cells = 0;
clock-frequency = 8;
slave-addr = 138;
clocks = tegra_car 67, tegra_car 124;
clock-names = div-clk, fast-clk;
nvec {
compatible = nvidia,nvec, simple-bus;
protocol = smbus-request-gpio;
request-gpios = gpio 170 0; /* gpio PV2 */
keyboard {
compatible = nvidia,nvec-keyboard;
};
};
};
Does this looks better?
Marc
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Re: [U-Boot] [PATCH 1/1] ddr cfg: DRAM_RESET needs 0x00020030
Hi Tom, Am 19/07/2013 23:50, schrieb Tom Rini: On Fri, Jul 19, 2013 at 02:34:55PM -0700, Troy Kisky wrote: On 7/19/2013 2:00 PM, Fabio Estevam wrote: Hi Troy, On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky troy.ki...@boundarydevices.com wrote: The old value of 0x000e0030 will cause ethernet timeout issues on the sabrelite and possibly other boards using the KSZ9021. I have no explanation as to why. But this is a correct change, the TRM will be updated to show that 00b is the only valid setting for bits 19-18 of DRAM_RESET. My thanks go to Liu Hui(Jason) for this information. Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com Should this go into 2013.07? If not too late. It only affect Nitrogen6x, at least until Sabrelite is combined with it. And Sabrelite is already using this value. Whose acks should I wait for on this? Acked-by: Stefano Babic sba...@denx.de From the i.MX point of view, the patch is a fix for the RAM configuration and does not affects other boards but only the nitrogen. I had merged this in u-boot-imx, but it is too late for PR. If it is not too late, please merge it for release. Many thanks, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] wandboard: Use splash image at screen center by default
Signed-off-by: Otavio Salvador ota...@ossystems.com.br --- include/configs/wandboard.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index ee6bf21..dd06bd7 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -113,6 +113,7 @@ script=boot.scr\0 \ uimage=uImage\0 \ console=ttymxc0\0 \ + splashpos=m,m\0 \ fdt_high=0x\0 \ initrd_high=0x\0 \ fdt_file= CONFIG_DEFAULT_FDT_FILE \0 \ -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: fix FIT image with ramdisk
+Stephen Hi Tom, On Sat, Jul 20, 2013 at 4:38 PM, Tom Rini tr...@ti.com wrote: On Sat, Jul 20, 2013 at 04:06:27PM -0600, Simon Glass wrote: Hi, On Sat, Jul 13, 2013 at 8:55 PM, Tom Rini tr...@ti.com wrote: [snip] No, because what we have today is insufficient for the kernel, you still have to specify the load/entry point, in FIT at least, even on NOLOAD. I'd have sworn at least, I couldn't find a way to get around this problem before... NOLOAD does work provided that the kernel in the FIT is a zImage. Personally I think that is an odd thing to do, since U-Boot is perfectly capable of decompressing a kernel, and the decompression shim requires ugly hacks for caches and low-level serial access. I haven't seen a .its with a NOLOAD kernel that doesn't specify a load/entry property for it. If you've got one, and it works on a Beaglebone (which doesn't have DDR starting at 0x0 ...), I'd love to see the .its :) We use one with load/exec addresses of 0 (on a platform with no RAM there). With NOLOAD the address seems to be ignored anyway. And another thing, perhaps instead of the NOLOAD image type, we should generalise a bit and have a property in the FDT node to mean that loading should be skipped, like 'no-load'. Then we could apply it to ramdisks and FDT also, rather than relying on address 0 having a special meaning. Perhaps I should have suggested this at the time. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: fix FIT image with ramdisk
On Sat, Jul 20, 2013 at 04:06:27PM -0600, Simon Glass wrote: Hi, On Sat, Jul 13, 2013 at 8:55 PM, Tom Rini tr...@ti.com wrote: [snip] No, because what we have today is insufficient for the kernel, you still have to specify the load/entry point, in FIT at least, even on NOLOAD. I'd have sworn at least, I couldn't find a way to get around this problem before... NOLOAD does work provided that the kernel in the FIT is a zImage. Personally I think that is an odd thing to do, since U-Boot is perfectly capable of decompressing a kernel, and the decompression shim requires ugly hacks for caches and low-level serial access. I haven't seen a .its with a NOLOAD kernel that doesn't specify a load/entry property for it. If you've got one, and it works on a Beaglebone (which doesn't have DDR starting at 0x0 ...), I'd love to see the .its :) -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Ac100] [PATCH 3/3] ARM: tegra: paz00: enable nveckeyboard support
On 07/20/2013 03:12 AM, Marc Dietrich wrote:
On Friday 19 July 2013 13:14:13 Stephen Warren wrote:
...
Let's skip how this may actually look like in software. Given the discussions
we had in the past, I propose the following binding:
i2c-slave@7000c500 {
compatible = nvidia,tegra20-i2c-slave;
reg = 0x7000c500 0x100;
interrupts = 0 92 0x04;
#address-cells = 1;
#size-cells = 0;
clock-frequency = 8;
slave-addr = 138;
Hex would be more common, but that's a minor issue.
clocks = tegra_car 67, tegra_car 124;
clock-names = div-clk, fast-clk;
nvec {
Above, it says #address-cells=1, which means this node needs a reg
property. Perhaps slave-addr should be part of the child nodes (and the
Tegra I2C controller binding would limit itself to supporting only a
single node), so that the same binding style could be applicable to I2C
slave devices that support multiple slave addresses.
compatible = nvidia,nvec, simple-bus;
protocol = smbus-request-gpio;
What is that property for; doesn't compatible=nvidia,nvec already
imply this, or does the NVEC spec define multiple different protocols?
request-gpios = gpio 170 0; /* gpio PV2 */
We should use the C pre-processor to provide named constants there,
although I guess U-Boot isn't set up for that yet. The kernel is once
this is ported there, and once the 2013.07 release is out, U-Boot should
be able to support this very soon too.
keyboard {
Simple-bus might require a reg property; I forget. Does the NVEC
protocol include any form of virtual device address that it would make
sense to put into a reg property?
compatible = nvidia,nvec-keyboard;
};
};
};
Does this looks better?
Yes, overall much better.
New DT bindings should be sent to devicet...@vger.kernel.org for review.
Note that's a branch new list (it moved from a different server), so it
might be best to wait a few days for people to subscribe before sending
mail to it.
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Re: [U-Boot] [U-Boot, RFC] ext4fs: le32_to_cpu() used on a 16-bit field
+Tom On Fri, Jul 19, 2013 at 1:03 AM, Lukasz Majewski l.majew...@samsung.comwrote: On Tue, 16 Jul 2013 08:14:35 + (UTC) Rommel Custodio sessyargc+ub...@gmail.com wrote, Hi Rommel, Hi All, U-Boot 2013.07-rc3 [ELDK 5.2.1 / ELDK 5.3] Now I've started to use the new ext4 code. I need the ext4write command. Though there seems to be several problems with the ext2/ext4 code. I am testing on an ml507 (PPC440, Big Endian). There are some cases where the a field is 16-bit but le32_to_cpu() is used. Some checks (ie eh_magic) fails to match even if I use a correctly ext4 formatted MMC/SD card. Does these seem right? Or am I mistaken? What kind of mailer program have you used to sent this e-mail? I receive following errors: fatal: corrupt patch at line 111 I cannot apply this patch with either git am -3 or git apply. Were you using git send-email? It seems like we should try to fix this before the release? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] tdphette
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Re: [U-Boot] [PATCH v2] usb: Use well-known descriptor sizes when parsing configuration
Hi Julius, How would that make the code more consistent ? It seems if the device can not even provide valid config ep descriptor, the device is broken beyond salvation. Okay, sure, it's not important enough to argue about. Will resubmit it this way. The sizeof() thing is true for the configuration descriptor, but not for some others (e.g. endpoint) because U-Boot reserves fields for it's own stuff behind that. Urgh, then the structure defining the descriptor shall be separated out. Yes, maybe. But let's please not blow this patch up any more than it already is. Would be nice to clean this up into understandable format by defining a variable for the buffer[index] and than just simply comparing this var- bInterfaceNumber and curr_if_num . Agreed, but let's clean this up one patch at a time. Would you do a series on this maybe? On second thought, we already have the variable head (respectively head-bLength) to point there... I can just use that instead. So, let's just ignore broken descriptors. Done. Document this properly then. I'm already adding a comment to usb_parse_config() to point that out... I'll clarify that this includes sanitization in addition to byte swapping. THanks a lot! I'm glad you're cleaning this horror up. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/1] ext4 fixes for BE machine
I just copied the patch provided by Rommel and tested reading an ext4 on avr32 machine. List content and read data from it worked, but I can't say anything about ext4write which Rommel says to fix with that patch. @sjg: We should add Series-notes switch to avoid cover letter for single patch submission ... Rommel Custodio (1): ext4fs: le32_to_cpu() used on a 16-bit field fs/ext4/ext4_common.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] ddr cfg: DRAM_RESET needs 0x00020030
On Sat, Jul 20, 2013 at 06:01:56PM +0200, Stefano Babic wrote: Hi Tom, Am 19/07/2013 23:50, schrieb Tom Rini: On Fri, Jul 19, 2013 at 02:34:55PM -0700, Troy Kisky wrote: On 7/19/2013 2:00 PM, Fabio Estevam wrote: Hi Troy, On Wed, Jul 17, 2013 at 4:46 PM, Troy Kisky troy.ki...@boundarydevices.com wrote: The old value of 0x000e0030 will cause ethernet timeout issues on the sabrelite and possibly other boards using the KSZ9021. I have no explanation as to why. But this is a correct change, the TRM will be updated to show that 00b is the only valid setting for bits 19-18 of DRAM_RESET. My thanks go to Liu Hui(Jason) for this information. Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com Should this go into 2013.07? If not too late. It only affect Nitrogen6x, at least until Sabrelite is combined with it. And Sabrelite is already using this value. Whose acks should I wait for on this? Acked-by: Stefano Babic sba...@denx.de From the i.MX point of view, the patch is a fix for the RAM configuration and does not affects other boards but only the nitrogen. I had merged this in u-boot-imx, but it is too late for PR. If it is not too late, please merge it for release. Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] can u-boot NFS mount my beaglebone rootfs over USB tether?
Hi Robert, On Sun, 21 Jul 2013 08:10:15 -0700 (PDT), Robert P. J. Day rpj...@crashcourse.ca wrote: On Sun, 21 Jul 2013, Albert ARIBAUD wrote: Hi Robert, On Sun, 21 Jul 2013 04:07:17 -0700 (PDT), Robert P. J. Day rpj...@crashcourse.ca wrote: i have a current production version of the beaglebone black, and i'd dearly love to NFS mount the root filesystem over the USB tether (which typically assigns net addresses of 192.68.7.[12] to the host/board). does u-boot support that? i just found this elinux article: http://elinux.org/Mount_BeagleBoard_Root_Filesystem_over_NFS_via_USB and am about to start poring over it, but if someone already knows if it can be done (or not), that would be great. thanks. If the kernel (and possibly initrd, for modules) is available locally, then the whole NFS and USB tether rootfs mounting is a Linux thing, not a U-boot one, isn't it? hmm ... now that i'm more awake, you may be right. i guess all i need is for RNDIS to kick in and assign the IP addresses to each end of the connection before any attempt is made to mount the root filesystem. for some reason, i thought it had to be done earlier. i'll give it a shot, thanks. rday p.s. just to be clear, when the BBB is up and running, the only active network interface is: usb0 Link encap:Ethernet HWaddr EA:60:E8:F4:F4:BD inet addr:192.168.7.2 Bcast:192.168.7.3 Mask:255.255.255.252 UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:40 errors:0 dropped:0 overruns:0 frame:0 TX packets:23 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:9579 (9.3 KiB) TX bytes:7401 (7.2 KiB) so you're suggesting that this requires no further tweaking of u-boot other than setting nfsroot=? Yes, I am. More precisely, I am suggesting that the only change in u-boot is to pass the rootfs option to the kernel; but you may want to make sure your kernel has support (either as a monolithic kernel or as a module through a local initrd) for the hardware and network features needed. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ext4fs: le32_to_cpu() used on a 16-bit field
Hi Andreas, On Sun, Jul 21, 2013 at 2:53 AM, Andreas Bießmann andreas.de...@googlemail.com wrote: From: Rommel Custodio sessyargc+ub...@gmail.com Fix reading ext4_extent_header struture on BE machines. Some 16 bit fields where converted to 32 bit fields, due to the byte swap on BE machines the containing value was corrupted. Therefore reading ext4 filesystems on BE machines where broken before. Signed-off-by: Rommel Custodio sessyargc+ub...@gmail.com [sent via git-send-email; rework commit message] Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com Reviewed-by: Simon Glass s...@chromium.org I tested it on sandbox with the sandbox block patch (not yet merged). It worked fine with my simple test (loading a kernel and a 70MB executable) with and without this patch unfortunately, but anyway: Tested-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] can u-boot NFS mount my beaglebone rootfs over USB tether?
On Sun, Jul 21, 2013 at 03:34:58PM -0700, Robert P. J. Day wrote:
On Sun, 21 Jul 2013, Tom Rini wrote:
On Sun, Jul 21, 2013 at 01:43:29PM -0700, Robert P. J. Day wrote:
in the end, i would *like* the host to have the IP address
192.168.7.1, and the BBB to have the IP address 192.168.7.2, and
there's one other slight complication.
i can't assume the net connection will be represented by eth0 on the
host side -- it's entirely possible the host will already be on the
net, and eth0 will be in use, so i need to be prepared for the host to
use whatever ethX interface it prefers for 192.168.7.1.
so is there a way to, from within u-boot, kickstart that net
interface? if i can get that, i think everything else falls into
place. i'm trying to do this *strictly* through uEnv.txt since, in the
environment i'm designing for, there will be *no* access to the u-boot
prompt.
I'm a little unclear on what you're trying to do right now. But,
the gadget ethernet works in U-Boot, just setenv ethact usb_ether.
On the linux host side, it will be usb0 (or usb1 and so on).
in a nutshell, i just want to do *all* my networking over the USB
tether ... TFTP kernel images, NFS mount rootfs, etc.
i could have sworn i tried setenv ethact usb_ether earlier and
that didn't work, but i'll try it again. i posted a more detailed
explanation on the beagleboard list -- given my situation, the *only*
customization i can make to the BBB is to let it boot normally the
first time, then replace the uEnv.txt file in the FAT partition with
something new. i have no freedom to do anything else.
so, along with that setenv ethact usb_ether, how would the normal
ways to TFTP kernel images and NFS mount root filesystems change in
any way? how much more would i need to add to something like this?
setenv ethact usb_ether
autoload=no
serverip=192.168.7.1
ipaddr=192.168.7.2
rootpath=/home/rpjday/rootfs
uenvcmd=run netargs; bootm ${loadaddr} - ${fdtaddr}
i know how to do *normal* TFTP and NFS, but i have no idea how any of
that changes in the context of using usb_ether.
U-Boot is great (terrible) in this regard. When you have multiple
ethernet interfaces we try round-robin to use each, starting with the
last sucessful interface, and if there's not one, ethact, and if that's
not set, the order 'Net: ' prints them out, which I believe is link
order, but didn't go and check just now.
--
Tom
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Re: [U-Boot] can u-boot NFS mount my beaglebone rootfs over USB tether?
On Sun, Jul 21, 2013 at 01:43:29PM -0700, Robert P. J. Day wrote: in the end, i would *like* the host to have the IP address 192.168.7.1, and the BBB to have the IP address 192.168.7.2, and there's one other slight complication. i can't assume the net connection will be represented by eth0 on the host side -- it's entirely possible the host will already be on the net, and eth0 will be in use, so i need to be prepared for the host to use whatever ethX interface it prefers for 192.168.7.1. so is there a way to, from within u-boot, kickstart that net interface? if i can get that, i think everything else falls into place. i'm trying to do this *strictly* through uEnv.txt since, in the environment i'm designing for, there will be *no* access to the u-boot prompt. I'm a little unclear on what you're trying to do right now. But, the gadget ethernet works in U-Boot, just setenv ethact usb_ether. On the linux host side, it will be usb0 (or usb1 and so on). -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ext4fs: le32_to_cpu() used on a 16-bit field
Hi Lukasz, On 22.07.13 08:43, Lukasz Majewski wrote: On Sun, 21 Jul 2013 10:53:25 +0200 Andreas Bießmann andreas.de...@googlemail.com wrote, snip I've tested this patch at LE Samsung Trats board. The code worked as before (ext4ls, ext4load, ext4write) - also taking into account limitation of our platform. I'm glad to hear that your proposed unaligned access problems not apply. However, we will not run out from refactoring this code. I'm fine with that for later releases, this fix should go into 2013.07. Best regards, Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-boot] shell script syntax
Hi, experts: It seems u-boot script does not support for / goto etc syntax? So, I could not use script to let one cmd run many times? Best wishes, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] [PATCH 0/5] Refactor MAINTAINERS file
This patch series aims at refactoring MAINTAINERS into an easily
processable file.
There are not actually five changes as such; the first four patches
are step-by-step cleaning so that the last patch can be created
essentially by running an AWK script on MAINTAINERS.
The non-RFC submission will only contain the final MAINTAINERS file
(unless of course reviewers prefer this five-patch form).
The AWK script is not included as a file. It is provided here for
convenience and functional review. Yes, it is ugly.
8 --
BEGIN {
printf %s %s %s %s\n, System, Board, Status,
Maintainer;
BOARD_MET=0;
}
# Ignore decorative lines
# System lines.
/^# .* Systems:.*$/ { SYSTEM=$2; STATUS=Active; SL++; }
# System lines.
/^.*Unknown.*$/ { STATUS=Orphan; MAINTS=1; MAINT[0]=; OL++; next; }
/^.*Orphan.*$/ { STATUS=Orphan; MAINTS=1; MAINT[0]=; OL++; next; }
# Maintainer lines
/^[^ \t#-].*$/ {
if (BOARD_MET != 0) MAINTS=0;
BOARD_MET=0;
MAINT[MAINTS++]=$0;
ML++;
}
# Board lines
/^[ \t]+.*$/{
BOARD_MET=1;
BL++;
BOARD=$1;
for (m =0; mMAINTS; m++) {
printf %s %s %s %s\n, SYSTEM, BOARD, STATUS,
MAINT[m];
}
}
8 --
Albert ARIBAUD (5):
MAINTAINERS: move ARM entries into ARM section
MAINTAINERS: move improperly placed e-mail addresses
MAINTAINERS: remove misplaced comments.
MAINTAINERS: remove useless 'header' lines
MAINTAINERS: refactor file for easier processing
MAINTAINERS | 2010 +++
1 file changed, 633 insertions(+), 1377 deletions(-)
--
1.8.1.2
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Re: [U-Boot] [U-boot] shell script syntax
Hi, Albert: See the Denx U-Boot documentation, more precisely: http://www.denx.de/wiki/view/DULG/CommandLineParsing#Section_14.2.17. From this web page, it seems hush-shell support for iteration. So, i wrote a simple script as below: for(i=1;i10;i++) do echo lion-0722 done Then, i used mkimage tool to produce a script. Then, i load it to dram, and run it with autoscr cmd. But failed, the log message is: LION # fatload mmc 0:1 0 scriptcmd0722 reading scriptcmd0722 120 bytes read LION # autoscr 0 ## Executing script at Unknown command 'for(i=1' - try 'help' Unknown command 'i10' - try 'help' Unknown command 'i++)' - try 'help' syntax error syntax error ... ... Best wishes, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] [PATCH 1/5] MAINTAINERS: move ARM entries into ARM section
A few ARM entries were present in the PowerPC section. Move them into the ARM section. Do not respect order any more than it was respected before, as the whole file structure will be refactored. Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net --- MAINTAINERS | 60 +--- 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 081cf96..ca13b38 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -51,10 +51,6 @@ Reinhard Arlt reinhard.a...@esd-electronics.com CPCI750 PPC750FX/GX -Peter Barada peter.bar...@logicpd.com - - omap3_logic ARM ARMV7 (Logic OMAP35xx/DM37xx) - Yuli Barcohen y...@arabellasw.com Adder MPC87x/MPC852T @@ -90,10 +86,6 @@ Conn Clark cl...@esteem.com ESTEEM192E MPC8xx -Jason Cooper u-b...@lakedaemon.net - - dreamplug ARM926EJS (Kirkwood SoC) - Joe D'Abbraccio ljd...@freescale.com MPC837xERDB MPC837x @@ -154,10 +146,6 @@ Phil Edworthy phil.edwor...@renesas.com rsk7264 SH7264 -egnite GmbH i...@egnite.de - - ethernut5 ARM926EJS (AT91SAM9XE SoC) - Dirk Eibach eib...@gdsys.de controlcenterd P1022 @@ -209,10 +197,6 @@ Matthias Fuchs matthias.fu...@esd-electronics.com WUH405 PPC405EP CMS700 PPC405EP -Siddarth Gore go...@marvell.com - - guruplugARM926EJS (Kirkwood SoC) - Paul Gortmaker paul.gortma...@windriver.com sbc8349 MPC8349 @@ -319,11 +303,6 @@ Dan Malek d...@embeddedalley.com stxssa MPC85xx stxxtc MPC8xx -Ryan Mallon r...@bluewatersys.com - - snapper9260 ARM926EJS (AT91SAM9260 SoC) - snapper9g20 ARM926EJS (AT91SAM9G20 SoC) - Andrea llandre Marson andrea.mar...@dave-tech.it PPChameleonEVB PPC405EP @@ -336,7 +315,6 @@ Reinhard Meyer reinhard.me...@emk-elektronik.de TOP860 MPC860T TOP5200 MPC5200 - TOP9000 ARM926EJS (AT91SAM9xxx SoC) Kyle Moffett kyle.d.moff...@boeing.com @@ -382,10 +360,6 @@ Sergei Poselenov sposele...@emcraft.com a4m072 MPC5200 -Sudhakar Rajashekhara sudhakar@ti.com - - da850evmARM926EJS (DA850/OMAP-L138) - Ricardo Ribalda ricardo.riba...@uam.es ml507 PPC440x5 @@ -445,7 +419,6 @@ Georg Schardt scha...@team-ctech.de Heiko Schocher h...@denx.de - cam_enc_4xx davinci/ARM926EJS charon MPC5200 ids8247 MPC8247 jupiter MPC5200 @@ -571,6 +544,39 @@ Unknown / orphaned boards: # Board CPU # # +Peter Barada peter.bar...@logicpd.com + + omap3_logic ARM ARMV7 (Logic OMAP35xx/DM37xx) + +Jason Cooper u-b...@lakedaemon.net + + dreamplug ARM926EJS (Kirkwood SoC) + +egnite GmbH i...@egnite.de + + ethernut5 ARM926EJS (AT91SAM9XE SoC) + +Siddarth Gore go...@marvell.com + + guruplugARM926EJS (Kirkwood SoC) + +Ryan Mallon r...@bluewatersys.com + + snapper9260 ARM926EJS (AT91SAM9260 SoC) + snapper9g20 ARM926EJS (AT91SAM9G20 SoC) + +Reinhard Meyer reinhard.me...@emk-elektronik.de + + TOP9000 ARM926EJS (AT91SAM9xxx SoC) + +Sudhakar Rajashekhara sudhakar@ti.com + + da850evmARM926EJS (DA850/OMAP-L138) + +Heiko Schocher h...@denx.de + + cam_enc_4xx davinci/ARM926EJS + Albert ARIBAUD albert.u.b...@aribaud.net edminiv2ARM926EJS (Orion5x SoC) -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] [PATCH 2/5] MAINTAINERS: move improperly placed e-mail addresses
This is to homogeneize all e-mail addresses in the file so that a simple script can find them all and associate them with the corresponding boards. Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net --- MAINTAINERS | 25 ++--- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index ca13b38..2b6ca9a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -533,10 +533,13 @@ Unknown / orphaned boards: rsdprotoMPC8260 EVB64260MPC7xx_74xx - EVB64260_750CX MPC750CX[Eran Man e...@nbase.co.il] versatile ARM926EJ-S +Eran Man e...@nbase.co.il + + EVB64260_750CX MPC750CX + # # ARM Systems: # # # @@ -1094,12 +1097,18 @@ Unknown / orphaned boards: Board CPU Last known maintainer / Comment . - omap1510inn ARM925T Kshitij Gupta kshi...@ti.com +Kshitij Gupta kshi...@ti.com + + omap1510inn ARM925T - lubbock xscale/pxa Kyle Harris khar...@nexus-tech.net / dead address +(dead address) Kyle Harris khar...@nexus-tech.net - imx31_phycore_eet i.MX31 Guennadi Liakhovetski g.liakhovet...@gmx.de / resigned - mx31ads i.MX31 Guennadi Liakhovetski g.liakhovet...@gmx.de / resigned + lubbock xscale/pxa + +(resigned) Guennadi Liakhovetski g.liakhovet...@gmx.de + + imx31_phycore_eet i.MX31 + mx31ads i.MX31 # # x86 Systems: # @@ -1146,7 +1155,9 @@ Unknown / orphaned boards: Board CPU Last known maintainer / Comment . - dbau1x00MIPS32 Au1000 Thomas Lange tho...@corelatus.se +Thomas Lange tho...@corelatus.se + + dbau1x00MIPS32 Au1000 # # Nios-II Systems: # @@ -1252,7 +1263,7 @@ Yusuke Goda goda.yus...@renesas.com MIGO-R SH7722 Nobuhiro Iwamatsu iwama...@nigauri.org - iwamatsu.nobuh...@renesas.com +Nobuhiro Iwamatsu iwamatsu.nobuh...@renesas.com MS7750SESH7750 MS7722SESH7722 -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] [PATCH 4/5] MAINTAINERS: remove useless 'header' lines
These lines look like board lines, causing the conversion script to create bogus board entries. Remove them. Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net --- MAINTAINERS | 4 1 file changed, 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index e03fa61..ec97d48 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1094,8 +1094,6 @@ Sergey Yanovich ynv...@gmail.com - Unknown / orphaned boards: - Board CPU Last known maintainer / Comment -. Kshitij Gupta kshi...@ti.com @@ -1142,8 +1140,6 @@ Stefan Roese s...@denx.de - Unknown / orphaned boards: - Board CPU Last known maintainer / Comment -. Thomas Lange tho...@corelatus.se -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] [PATCH 3/5] MAINTAINERS: remove misplaced comments.
chromebook-x86 has comments in MAINTAINERS which should actually be in some doc/README.* file. Remove them. Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net --- MAINTAINERS | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 2b6ca9a..e03fa61 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1119,17 +1119,7 @@ Kshitij Gupta kshi...@ti.com Simon Glass s...@chromium.org - chromebook-x86 Coreboot runs first, then U-Boot - Supports Intel Sandy Bridge / Ivy Bridge so far - - Chromebooks for x86, including: - Samsung Series 5 Chromebook - Acer AC700 Chromebook - Acer C7 Chromebook - Samsung Chromebook 550 - HP Pavillion Chromebook - Acer C710 Chromebook - Chromebook Pixel + chromebook-x86 # # MIPS Systems: # -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-boot] shell script syntax
Hi tiger...@viatech.com.cn, On Mon, 22 Jul 2013 19:44:18 +0800, tiger...@viatech.com.cn wrote: Hi, Albert: Did you try the commands live in your U-Boot console? Did you make sure hush shell is enabled in your U-boot? I am sure I have enabled hush shell. I think for iteration syntax is error: for(i=1;i10;i++) But I don't know how to write it correctly! This is why I suggested that you experiment in your U-Boot console, where you can quickly try things. One thing I'd test first is whether your C-like use of 'for' is valid at all for Hush, or for Bourne shell (from which Hush derives IIUC) -- I suspect it might not be. Best wishes, Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, V2] fs/ext4: fix log2blksz un-initialized error, by cacaulating its value from blksz
On Sat, Jul 20, 2013 at 08:17:59AM +0800, Dennis Lan (dlan) wrote: From: Lan Yixun (dlan) dennis.y...@gmail.com The problem here is that uboot can't mount ext4 filesystem with commit 50ce4c07df1 applied. We use hard-coded SECTOR_SIZE(512) before this commit, now we introduce (block_dev_desc_t *)-log2blksz to replace this macro. And after we calling do_ls()-fs_set_blk_dev(), the variable log2blksz is not initialized, which it's not correct. And this patch try to solve the problem by caculating the value of log2blksz from variable blksz. --- the console output after commit 50ce4c07df1 applied: lt703a # ext4ls nand 3:0 Failed to mount ext2 filesystem... ** Unrecognized filesystem type ** Signed-off-by: Lan Yixun (dlan) dennis.y...@gmail.com Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ext4fs: le32_to_cpu() used on a 16-bit field
On Sun, Jul 21, 2013 at 10:53:25AM +0200, Andreas Bie??mann wrote: From: Rommel Custodio sessyargc+ub...@gmail.com Fix reading ext4_extent_header struture on BE machines. Some 16 bit fields where converted to 32 bit fields, due to the byte swap on BE machines the containing value was corrupted. Therefore reading ext4 filesystems on BE machines where broken before. Signed-off-by: Rommel Custodio sessyargc+ub...@gmail.com [sent via git-send-email; rework commit message] Signed-off-by: Andreas Bie??mann andreas.de...@googlemail.com Reviewed-by: Simon Glass s...@chromium.org Tested-by: Simon Glass s...@chromium.org Tested-by: Lukasz Majewski l.majew...@samsung.com So I gave the changes a review myself based on how the kernel accesses these fields and agree the changes are correct. I also did a quick test on beaglebone black and was able to read (and confirmed crc32) a few files correctly still. Applied to u-boot/master with a re-wrapping of the commit message, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: at91sam9n12: change EBI IO to high drive mode
On Wed, Jul 17, 2013 at 05:14:17PM +0800, Bo Shen wrote: As both the DDR SDRAM and NAND flash connect to EBI on at91sam9n12 and share the lower 8 bits data line. If use low drive of the data line, it will cause DDR data access corrupt in lower address, so change the data line to high drive mode This will fix the Linux kernel boot issue when use Lower address Signed-off-by: Bo Shen voice.s...@atmel.com Acked-by: Andreas Bie??mann andreas.de...@googlemail.com Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 4/6] am33xx: Add am33xx_spl_board_init function, call
We need to allow for a further call-out in spl_board_init. Call this
am33xx_spl_board_init and add a __weak version. This function may be
used to scale the MPU frequency up, depending on board needs.
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v2:
- Move am33xx_spl_board_init to am33xx/board.c from
omap-common/boot-common.c
---
arch/arm/cpu/armv7/am33xx/board.c|9 +
arch/arm/cpu/armv7/omap-common/boot-common.c |3 +++
arch/arm/include/asm/arch-am33xx/sys_proto.h |1 +
3 files changed, 13 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index b935a29..9356501 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -35,6 +35,7 @@
#include miiphy.h
#include cpsw.h
#include asm/errno.h
+#include linux/compiler.h
#include linux/usb/ch9.h
#include linux/usb/gadget.h
#include linux/usb/musb.h
@@ -151,6 +152,14 @@ int arch_misc_init(void)
}
#ifdef CONFIG_SPL_BUILD
+/*
+ * This function is the place to do per-board things such as ramp up the
+ * MPU clock frequency.
+ */
+__weak void am33xx_spl_board_init(void)
+{
+}
+
void rtc32k_enable(void)
{
struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c
b/arch/arm/cpu/armv7/omap-common/boot-common.c
index 76ae1b6..6671a29 100644
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -83,6 +83,9 @@ void spl_board_init(void)
#if defined(CONFIG_AM33XX) defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
arch_misc_init();
#endif
+#ifdef CONFIG_AM33XX
+ am33xx_spl_board_init();
+#endif
}
int board_mmc_init(bd_t *bis)
diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h
b/arch/arm/include/asm/arch-am33xx/sys_proto.h
index 307ac28..98dc830 100644
--- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h
@@ -45,4 +45,5 @@ void omap_nand_switch_ecc(uint32_t, uint32_t);
void rtc32k_enable(void);
void uart_soft_reset(void);
+void am33xx_spl_board_init(void);
#endif
--
1.7.9.5
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Re: [U-Boot] [UBOOT] [PATCH V2 1/2] gpio: tca642x: Add the tca642x gpio expander driver
On Tue, Jul 09, 2013 at 12:26:14PM -0500, Dan Murphy wrote: Add the tca642x gpio expander driver Datasheet: http://www.ti.com/product/tca6424a Signed-off-by: Dan Murphy dmur...@ti.com Reviewed-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] [PATCH 5/5] MAINTAINERS: refactor file for easier processing
Hello Albert, First I'd like to say I do like this change and it can improve a lot how tools can make The Right Thing automatically (here patman comes to my head). On Tue, Jul 23, 2013 at 5:29 PM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: +# Note: list sorted by architecture, name, status and maintainer e-mail # +# To keep the list sorted and formatted, you can use the following vi # +# commands, each time placing the cursor on the headers line: # +# # +# :.,$s/\([^ ]*\) \+\([^ ]*\) \+\([^ ]*\) \+\(.*\)/\1:\2:\3:\4/ # +# :.,$!column -s ':' -t # +# :.+1,$!sort # +# # So I miss a way of doing same sorting and format using shell script. I am not a 'vi' user (but an Emacs one) but I think the most generic way would be to provide a shell line, or script, for it. Regards, -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://projetos.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 4/7] ARM: OMAP5-uevm: Add USB ehci support for the uEVM
On Wed, Jul 17, 2013 at 03:16:04PM -0500, Dan Murphy wrote:
Add the USB ehci support for the OMAP5 uEVM.
Configure the uEVM mux data
Add the flags to build the appropriate modules
Add the usb call backs to initialize the EHCI controller
Signed-off-by: Dan Murphy dmur...@ti.com
[sinp]
+ if (ret 0) {
+ printf(Failed to initialize ehci\n);
puts(...) when we don't have format characters, thanks.
--
Tom
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Re: [U-Boot] [U-Boot, RFC] ext4fs: le32_to_cpu() used on a 16-bit field
Hi all, On 21.07.2013 06:32, Simon Glass wrote: +Tom On Fri, Jul 19, 2013 at 1:03 AM, Lukasz Majewski l.majew...@samsung.comwrote: On Tue, 16 Jul 2013 08:14:35 + (UTC) Rommel Custodio sessyargc+ub...@gmail.com wrote, Hi Rommel, Hi All, U-Boot 2013.07-rc3 [ELDK 5.2.1 / ELDK 5.3] Now I've started to use the new ext4 code. I need the ext4write command. Though there seems to be several problems with the ext2/ext4 code. I am testing on an ml507 (PPC440, Big Endian). There are some cases where the a field is 16-bit but le32_to_cpu() is used. Some checks (ie eh_magic) fails to match even if I use a correctly ext4 formatted MMC/SD card. Does these seem right? Or am I mistaken? What kind of mailer program have you used to sent this e-mail? I receive following errors: fatal: corrupt patch at line 111 I cannot apply this patch with either git am -3 or git apply. Were you using git send-email? It seems like we should try to fix this before the release? +1 I can confirm that reading ext4 extended header on BE machine (avr32) is broken. I'm currently on it to get it working by using Rommel's patch. Regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ext4fs: le32_to_cpu() used on a 16-bit field
From: Rommel Custodio sessyargc+ub...@gmail.com
Fix reading ext4_extent_header struture on BE machines.
Some 16 bit fields where converted to 32 bit fields, due to the byte swap on BE
machines the containing value was corrupted. Therefore reading ext4 filesystems
on BE machines where broken before.
Signed-off-by: Rommel Custodio sessyargc+ub...@gmail.com
[sent via git-send-email; rework commit message]
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
fs/ext4/ext4_common.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 2776293..ff9c4ec 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -1432,7 +1432,7 @@ static struct ext4_extent_header *ext4fs_get_extent_block
while (1) {
index = (struct ext4_extent_idx *)(ext_block + 1);
- if (le32_to_cpu(ext_block-eh_magic) != EXT4_EXT_MAGIC)
+ if (le16_to_cpu(ext_block-eh_magic) != EXT4_EXT_MAGIC)
return 0;
if (ext_block-eh_depth == 0)
@@ -1440,14 +1440,14 @@ static struct ext4_extent_header
*ext4fs_get_extent_block
i = -1;
do {
i++;
- if (i = le32_to_cpu(ext_block-eh_entries))
+ if (i = le16_to_cpu(ext_block-eh_entries))
break;
} while (fileblock le32_to_cpu(index[i].ei_block));
if (--i 0)
return 0;
- block = le32_to_cpu(index[i].ei_leaf_hi);
+ block = le16_to_cpu(index[i].ei_leaf_hi);
block = (block 32) + le32_to_cpu(index[i].ei_leaf_lo);
if (ext4fs_devread((lbaint_t)block log2_blksz, 0, fs-blksz,
@@ -1548,17 +1548,17 @@ long int read_allocated_block(struct ext2_inode *inode,
int fileblock)
do {
i++;
- if (i = le32_to_cpu(ext_block-eh_entries))
+ if (i = le16_to_cpu(ext_block-eh_entries))
break;
} while (fileblock = le32_to_cpu(extent[i].ee_block));
if (--i = 0) {
fileblock -= le32_to_cpu(extent[i].ee_block);
- if (fileblock = le32_to_cpu(extent[i].ee_len)) {
+ if (fileblock = le16_to_cpu(extent[i].ee_len)) {
free(buf);
return 0;
}
- start = le32_to_cpu(extent[i].ee_start_hi);
+ start = le16_to_cpu(extent[i].ee_start_hi);
start = (start 32) +
le32_to_cpu(extent[i].ee_start_lo);
free(buf);
--
1.7.10.4
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Re: [U-Boot] [PATCH] am335x:Handle worst case scenario for Errata 1.0.24
On Monday 22 July 2013 08:12 PM, Tom Rini wrote:
From: Steve Kipisz s-kipi...@ti.com
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.
Cc: Enric Balletbo i Serra eballe...@iseebcn.com
Cc: Lars Poeschel poesc...@lemonage.de
Signed-off-by: Steve Kipisz s-kipi...@ti.com
[trini: Adapt to current framework]
Signed-off-by: Tom Rini tr...@ti.com
Doesn't this patch gives a conflict with recent cleanup series
for Am33xx ?
http://patchwork.ozlabs.org/patch/253831/
Thanks,
Lokesh
---
arch/arm/cpu/armv7/am33xx/board.c|2 +
arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 72
++
arch/arm/include/asm/arch-am33xx/clocks_am33xx.h |3 +
arch/arm/include/asm/arch-am33xx/sys_proto.h |1 +
board/ti/am335x/board.c | 11
include/configs/pcm051.h |1 +
include/power/tps65217.h |1 +
7 files changed, 67 insertions(+), 24 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 9356501..03427da 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -158,6 +158,8 @@ int arch_misc_init(void)
*/
__weak void am33xx_spl_board_init(void)
{
+ mpu_pll_config_val(CONFIG_SYS_MPUCLK);
+ core_pll_config(OPP_100);
}
void rtc32k_enable(void)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
index 9c4d0b4..ef06814 100644
--- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
@@ -50,12 +50,17 @@
/* Core PLL Fdll = 1 GHZ, */
#define COREPLL_M1000
+#define COREPLL_M_OPP50 50
#define COREPLL_N(OSC-1)
#define COREPLL_M4 10 /* CORE_CLKOUTM4 = 200 MHZ */
#define COREPLL_M5 8 /* CORE_CLKOUTM5 = 250 MHZ */
#define COREPLL_M6 4 /* CORE_CLKOUTM6 = 500 MHZ */
+#define COREPLL_M4_OPP50 1
+#define COREPLL_M5_OPP50 1
+#define COREPLL_M6_OPP50 1
+
/*
* USB PHY clock is 960 MHZ. Since, this comes directly from Fdll, Fdll
* frequency needs to be set to 960 MHZ. Hence,
@@ -274,12 +279,7 @@ void mpu_pll_config_val(int mpull_m)
;
}
-static void mpu_pll_config(void)
-{
- mpu_pll_config_val(CONFIG_SYS_MPUCLK);
-}
-
-static void core_pll_config(void)
+void core_pll_config(int opp)
{
u32 clkmode, clksel, div_m4, div_m5, div_m6;
@@ -293,29 +293,53 @@ static void core_pll_config(void)
writel(PLL_BYPASS_MODE, cmwkup-clkmoddpllcore);
while (readl(cmwkup-idlestdpllcore) != ST_MN_BYPASS)
- ;
+ ;
+ if (opp == OPP_50) {
+ clksel = clksel (~CLK_SEL_MASK);
+ clksel = clksel | ((COREPLL_M_OPP50 CLK_SEL_SHIFT)
+ | COREPLL_N);
+ writel(clksel, cmwkup-clkseldpllcore);
- clksel = clksel (~CLK_SEL_MASK);
- clksel = clksel | ((COREPLL_M CLK_SEL_SHIFT) | COREPLL_N);
- writel(clksel, cmwkup-clkseldpllcore);
+ div_m4 = div_m4 ~CLK_DIV_MASK;
+ div_m4 = div_m4 | COREPLL_M4_OPP50;
+ writel(div_m4, cmwkup-divm4dpllcore);
- div_m4 = div_m4 ~CLK_DIV_MASK;
- div_m4 = div_m4 | COREPLL_M4;
- writel(div_m4, cmwkup-divm4dpllcore);
+ div_m5 = div_m5 ~CLK_DIV_MASK;
+ div_m5 = div_m5 | COREPLL_M5_OPP50;
+ writel(div_m5, cmwkup-divm5dpllcore);
- div_m5 = div_m5 ~CLK_DIV_MASK;
- div_m5 = div_m5 | COREPLL_M5;
- writel(div_m5, cmwkup-divm5dpllcore);
+ div_m6 = div_m6 ~CLK_DIV_MASK;
+ div_m6 = div_m6 | COREPLL_M6_OPP50;
+ writel(div_m6, cmwkup-divm6dpllcore);
- div_m6 = div_m6 ~CLK_DIV_MASK;
- div_m6 = div_m6 | COREPLL_M6;
- writel(div_m6, cmwkup-divm6dpllcore);
+ clkmode = clkmode | CLK_MODE_SEL;
+ writel(clkmode, cmwkup-clkmoddpllcore);
- clkmode = clkmode | CLK_MODE_SEL;
- writel(clkmode, cmwkup-clkmoddpllcore);
+ while (readl(cmwkup-idlestdpllcore) != ST_DPLL_CLK)
+ ;
+ } else {
+ clksel = clksel (~CLK_SEL_MASK);
+ clksel = clksel | ((COREPLL_M CLK_SEL_SHIFT) | COREPLL_N);
+ writel(clksel, cmwkup-clkseldpllcore);
+
+ div_m4 = div_m4 ~CLK_DIV_MASK;
+ div_m4 = div_m4 | COREPLL_M4;
+ writel(div_m4, cmwkup-divm4dpllcore);
+
+ div_m5 = div_m5 ~CLK_DIV_MASK;
+ div_m5 = div_m5 | COREPLL_M5;
+ writel(div_m5, cmwkup-divm5dpllcore);
+
+ div_m6 = div_m6 ~CLK_DIV_MASK;
+ div_m6 =
Re: [U-Boot] [PATCH v3 2/7] ARM: OMAP5: USB: Add OMAP5 common USB EHCI information
On Fri, Jul 19, 2013 at 12:30:54PM +0300, Roger Quadros wrote: On 07/18/2013 08:48 PM, Dan Murphy wrote: Dear Roger On 07/18/2013 02:10 AM, Roger Quadros wrote: Dan, On 07/17/2013 11:16 PM, Dan Murphy wrote: * Enable the OMAP5 EHCI host clocks * Add OMAP5 EHCI register definitions * Add OMAP5 ES2 host revision Signed-off-by: Dan Murphy dmur...@ti.com --- v3 - Updated per comments - http://patchwork.ozlabs.org/patch/258230/ arch/arm/cpu/armv7/omap5/hw_data.c | 17 arch/arm/include/asm/arch-omap5/clock.h |6 + arch/arm/include/asm/arch-omap5/ehci.h | 43 +++ arch/arm/include/asm/ehci-omap.h|1 + drivers/usb/host/ehci-omap.c|2 +- 5 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 07b1108..b1be748 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -414,6 +414,10 @@ void enable_basic_clocks(void) (*prcm)-cm_l4per_gpio6_clkctrl, (*prcm)-cm_l4per_gpio7_clkctrl, (*prcm)-cm_l4per_gpio8_clkctrl, +#ifdef CONFIG_USB_EHCI_OMAP + (*prcm)-cm_clksel_usb_60mhz, + (*prcm)-cm_l3init_hsusbtll_clkctrl, +#endif 0 }; @@ -425,6 +429,9 @@ void enable_basic_clocks(void) (*prcm)-cm_wkup_wdtimer2_clkctrl, (*prcm)-cm_l4per_uart3_clkctrl, (*prcm)-cm_l4per_i2c1_clkctrl, +#ifdef CONFIG_USB_EHCI_OMAP + (*prcm)-cm_l3init_hsusbhost_clkctrl, +#endif 0 }; @@ -448,6 +455,16 @@ void enable_basic_clocks(void) setbits_le32((*prcm)-cm_wkup_gptimer1_clkctrl, GPTIMER1_CLKCTRL_CLKSEL_MASK); +#ifdef CONFIG_USB_EHCI + /* Enable port 2 and 3 clocks*/ + setbits_le32((*prcm)-cm_l3init_hsusbhost_clkctrl, + USB_HOST_HS_CLKCTRL_MASK); For consistency, maybe you should enable all 3 port clocks since you are enabling all 3 TLL clocks below? So I thought about this we should enable all 3 clocks since it is a common file and disable the unused clocks in the board file. Or we should enable the specific port clocks during ehci_hcd_init in the board file only since it is a board implementation detail. Thoughts? IMHO enabling the clocks based on board is best. Agree. We only enable what we need, not enable and then disable as someone will forget to disable (or not know they need to). Even if this means adding a define or 3 for which ports we do have. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] am335x:Handle worst case scenario for Errata 1.0.24
On Mon, Jul 22, 2013 at 08:33:44PM +0530, Lokesh Vutla wrote: On Monday 22 July 2013 08:12 PM, Tom Rini wrote: From: Steve Kipisz s-kipi...@ti.com In Errata 1.0.24, if the board is running at OPP50 and has a warm reset, the boot ROM sets the frequencies for OPP100. This patch attempts to drop the frequencies back to OPP50 as soon as possible in the SPL. Then later the voltages and frequencies up set higher. Cc: Enric Balletbo i Serra eballe...@iseebcn.com Cc: Lars Poeschel poesc...@lemonage.de Signed-off-by: Steve Kipisz s-kipi...@ti.com [trini: Adapt to current framework] Signed-off-by: Tom Rini tr...@ti.com Doesn't this patch gives a conflict with recent cleanup series for Am33xx ? http://patchwork.ozlabs.org/patch/253831/ Yes, and in a non-trivial fashion since we need to be able to give an initial configuration to the clock, and then change it again, and I don't see how to do that with your cleanup. In fact, the other series I posted, for scaling up the MPU clock also won't work with your cleanup. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] can u-boot NFS mount my beaglebone rootfs over USB tether?
Hi Robert, On Sun, 21 Jul 2013 04:07:17 -0700 (PDT), Robert P. J. Day rpj...@crashcourse.ca wrote: i have a current production version of the beaglebone black, and i'd dearly love to NFS mount the root filesystem over the USB tether (which typically assigns net addresses of 192.68.7.[12] to the host/board). does u-boot support that? i just found this elinux article: http://elinux.org/Mount_BeagleBoard_Root_Filesystem_over_NFS_via_USB and am about to start poring over it, but if someone already knows if it can be done (or not), that would be great. thanks. If the kernel (and possibly initrd, for modules) is available locally, then the whole NFS and USB tether rootfs mounting is a Linux thing, not a U-boot one, isn't it? rday Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] dfu, nand, ubi: add partubi alt settings for updating ubi partition
On 07/18/2013 01:57:23 AM, Lukasz Majewski wrote: As a side note, I'm curious how bool ubi would be implemented by the compiler and if it is equivalent to explicite bit fields. I believe the compiler implements bool as an 8-bit data type. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
DVI monitors show up as the RX_SENSE bits in the
HDMI_PHY_STAT0 register, ie F0 so we really want to check
against F2 to support both HDMI and DVI.
Signed-off-by: Robert Winkler robert.wink...@boundarydevices.com
---
arch/arm/imx-common/cmd_hdmidet.c | 3 +--
arch/arm/include/asm/arch-mx6/mxc_hdmi.h | 3 +++
board/boundary/nitrogen6x/nitrogen6x.c| 2 +-
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 2 +-
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/imx-common/cmd_hdmidet.c
b/arch/arm/imx-common/cmd_hdmidet.c
index 794bf50..ce0b26e 100644
--- a/arch/arm/imx-common/cmd_hdmidet.c
+++ b/arch/arm/imx-common/cmd_hdmidet.c
@@ -27,8 +27,7 @@
static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- u8 reg = readb(hdmi-phy_stat0) HDMI_PHY_HPD;
- return (regHDMI_PHY_HPD) ? 0 : 1;
+ return (readb(hdmi-phy_stat0) HDMI_DVI_STAT) ? 0 : 1;
}
U_BOOT_CMD(hdmidet, 1, 1, do_hdmidet,
diff --git a/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
b/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
index 9dccb3f..1b55b05 100644
--- a/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
+++ b/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
@@ -896,6 +896,9 @@ enum {
HDMI_PHY_HPD = 0x02,
HDMI_PHY_TX_PHY_LOCK = 0x01,
+/* Convenience macro RX_SENSE | HPD */
+ HDMI_DVI_STAT = 0xF2,
+
/* PHY_I2CM_SLAVE_ADDR field values */
HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
b/board/boundary/nitrogen6x/nitrogen6x.c
index 8f0f9b8..bb09a6a 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -477,7 +477,7 @@ struct display_info_t {
static int detect_hdmi(struct display_info_t const *dev)
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- return readb(hdmi-phy_stat0) HDMI_PHY_HPD;
+ return readb(hdmi-phy_stat0) HDMI_DVI_STAT;
}
static void enable_hdmi(struct display_info_t const *dev)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 862bc30..559b082 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -449,7 +449,7 @@ struct display_info_t {
static int detect_hdmi(struct display_info_t const *dev)
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- return readb(hdmi-phy_stat0) HDMI_PHY_HPD;
+ return readb(hdmi-phy_stat0) HDMI_DVI_STAT;
}
static void enable_hdmi(struct display_info_t const *dev)
--
1.8.3.2
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Re: [U-Boot] [PATCH 0/1] ext4 fixes for BE machine
Hi Andreas, On Sun, Jul 21, 2013 at 2:53 AM, Andreas Bießmann andreas.de...@googlemail.com wrote: I just copied the patch provided by Rommel and tested reading an ext4 on avr32 machine. List content and read data from it worked, but I can't say anything about ext4write which Rommel says to fix with that patch. @sjg: We should add Series-notes switch to avoid cover letter for single patch submission ... Yes agreed, There is Series-notes, but it's not quite what you want, I think. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] fixing wrong termination of string
On Fri, Jul 19, 2013 at 12:31 PM, Rossier Daniel
daniel.ross...@heig-vd.chwrote:
Hi,
I discovered a small bug in lib/vsprintf.c which leads to an Access
violation(2) when I tried to tftp a file, in QEMU.
If CONFIG_SYS_VSNPRINTF is set, the str pointer is incremented even if str
reached the end of string (str == end) because of ADDCH.
This leads to a wrong length of string and causes the problem.
Here is the patch:
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 82e5c13..2ba8126 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -747,8 +747,9 @@ repeat:
#ifdef CONFIG_SYS_VSNPRINTF
if (size 0) {
- ADDCH(str, '\0');
- if (str end)
+ if (str end)
+ *str = '\0';
+ else
end[-1] = '\0';
This is good - but can I suggest going a little further, maybe:
+ if (str end)
+ *str = '\0';
+ else if (end buf)
end[-1] = '\0';
since I think it is actually valid to call this function with a size of 0,
perhaps to find out the length that would be produced.
Regards,
Simon
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Re: [U-Boot] [PATCH 0/1] ext4 fixes for BE machine
Dear Andreas Bießmann On 2013.07/21, Andreas Bießmann wrote: I just copied the patch provided by Rommel and tested reading an ext4 on avr32 machine. List content and read data from it worked, but I can't say anything about ext4write which Rommel says to fix with that patch. Thanks for update. This patch doesn't fix ext4write in BE. It just correctly accesses the ext3/ext4 formatted partition so that ext4ls/ext4load can work correctly. I'm still checking. I'll submit a patch when I got it working. Thank you. @sjg: We should add Series-notes switch to avoid cover letter for single patch submission ... Rommel Custodio (1): ext4fs: le32_to_cpu() used on a 16-bit field fs/ext4/ext4_common.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Steps to make u-boot binary which can be booted as RAMBOOT
Hi ranju, On Tue, 23 Jul 2013 09:49:00 +0530, ranju ranjini...@gmail.com wrote: Hi All, I am here trying to make u-boot as Ramboot binary . But when I copy u-boot binary to Ram and execute go command , its hanging there itself. Can you help me to sort out the issue ? There is little chance that you get any useful help without more detail. U-Boot supports about a thousand boards... At least you need to describe the hardware you're trying to do this on; also, is this a supported target, or does it derive from an existing target, or is it a brand new target with much new code? Waiting for your valuable reply , Ranjini Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Improve bootargs for IGEP boards.
Hi Tom, Thanks for the answer. 2013/7/18 Tom Rini tr...@ti.com: On Tue, Jul 16, 2013 at 10:00:16AM +0200, Enric Balletbo Serra wrote: [snip] o 2nd proposal: 4 partitions: SPL U-Boot U-Boot Environment Filesystem (ubifs): zImage + kernel modules + dtbs files + filesystem A slight change here would be 3 partitions 1) SPL (that covers the redundant locations as well) 2) U-Boot 3) UBI container of: env, redundant env and either filesystem with kernel+dtbs, or kernel and dtbs in their own volumes, I'm not sure which is better there honestly. But I did want to highlight that we support U-Boot env in the UBI container. This looks interesting, can you provide more information about that ? Should I remove CONFIG_ENV_ADDR variable ? Could you provide an example ? Thanks in advance. Enric -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Improve bootargs for IGEP boards.
2013/7/23 Enric Balletbo Serra eballe...@gmail.com: Hi Tom, Thanks for the answer. 2013/7/18 Tom Rini tr...@ti.com: On Tue, Jul 16, 2013 at 10:00:16AM +0200, Enric Balletbo Serra wrote: [snip] o 2nd proposal: 4 partitions: SPL U-Boot U-Boot Environment Filesystem (ubifs): zImage + kernel modules + dtbs files + filesystem A slight change here would be 3 partitions 1) SPL (that covers the redundant locations as well) 2) U-Boot 3) UBI container of: env, redundant env and either filesystem with kernel+dtbs, or kernel and dtbs in their own volumes, I'm not sure which is better there honestly. But I did want to highlight that we support U-Boot env in the UBI container. This looks interesting, can you provide more information about that ? Should I remove CONFIG_ENV_ADDR variable ? Could you provide an example ? Ooops forget it ! I found the documentation about that in README. Thanks Thanks in advance. Enric -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCHv2 0/8] qspi controller: Normal, quad and memory mapped read support
This patch series add uboot ti qspi controller driver. QSPI is a kind of spi module that allows single, dual and quad read access to external spi devices. The module has a memory mapped interface which provide direct interface for accessing data form external spi devices. SPI mode --- SPI mode uses mtd spi framework for transfer and reception of data. Can be used in: 1. Normal mode: use single pin for transfers 2. Dual Mode: use two pins for transfers. 3. Quad mode: use four pin for transfer Memory mapped read mode --- In this, SPI controller is configured using configuration port and then controler is switched to memory mapped port for data read. Series proposed suport for quad read as well as memory mapped read in spi mtd frameowrk as well as ti qpsi driver. Test info is attached as the last patch in the series. Matt Porter (3): omap5: add qspi support spi: add TI QSPI driver dra7xx_evm: add SPL API, QSPI, and serial flash support Ravikumar Kattekola (1): drivers: mtd: qspi: Add quad read support Sourav Poddar (4): armv7: hw_data: change clock divider setting. drivers: mtd: spi: Modify read/write command for sfl256s flash. driver: spi: Add memory mapped read support README: qspi usecase and testing documentation. arch/arm/cpu/armv7/omap5/hw_data.c |9 +- arch/arm/cpu/armv7/omap5/prcm-regs.c |1 + arch/arm/include/asm/arch-omap5/omap.h |3 + arch/arm/include/asm/arch-omap5/spl.h |1 + arch/arm/include/asm/omap_common.h |1 + board/ti/dra7xx/mux_data.h | 10 + doc/README.ti_qspi_dra_test| 38 doc/README.ti_qspi_flash | 47 + drivers/mtd/spi/spansion.c |1 + drivers/mtd/spi/spi_flash.c| 148 ++- drivers/mtd/spi/spi_flash_internal.h |2 + drivers/spi/Makefile |1 + drivers/spi/ti_qspi.c | 327 include/configs/dra7xx_evm.h | 19 ++ include/spi.h |5 + 15 files changed, 610 insertions(+), 3 deletions(-) create mode 100644 doc/README.ti_qspi_dra_test create mode 100644 doc/README.ti_qspi_flash create mode 100644 drivers/spi/ti_qspi.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCHv2 3/8] spi: add TI QSPI driver
From: Matt Porter matt.por...@linaro.org
Adds a SPI master driver for the TI QSPI peripheral.
Signed-off-by: Matt Porter matt.por...@linaro.org
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/spi/Makefile |1 +
drivers/spi/ti_qspi.c | 262 +
2 files changed, 263 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/ti_qspi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d08609e..f51033d 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -54,6 +54,7 @@ COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
+COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
COBJS := $(COBJS-y)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
new file mode 100644
index 000..1973b85
--- /dev/null
+++ b/drivers/spi/ti_qspi.c
@@ -0,0 +1,262 @@
+/*
+ * TI QSPI driver
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/omap.h
+#include malloc.h
+#include spi.h
+
+struct qspi_slave {
+ struct spi_slave slave;
+ unsigned int mode;
+ u32 cmd;
+ u32 dc;
+};
+
+#define to_qspi_slave(s) container_of(s, struct qspi_slave, slave)
+
+struct qspi_regs {
+ u32 pid;
+ u32 pad0[3];
+ u32 sysconfig;
+ u32 pad1[3];
+ u32 intr_status_raw_set;
+ u32 intr_status_enabled_clear;
+ u32 intr_enable_set;
+ u32 intr_enable_clear;
+ u32 intc_eoi;
+ u32 pad2[3];
+ u32 spi_clock_cntrl;
+ u32 spi_dc;
+ u32 spi_cmd;
+ u32 spi_status;
+ u32 spi_data;
+ u32 spi_setup0;
+ u32 spi_setup1;
+ u32 spi_setup2;
+ u32 spi_setup3;
+ u32 spi_switch;
+ u32 spi_data1;
+ u32 spi_data2;
+ u32 spi_data3;
+};
+
+static struct qspi_regs *qspi = (struct qspi_regs *)QSPI_BASE;
+
+#define QSPI_TIMEOUT 200
+
+#define QSPI_FCLK 19200
+
+/* Clock Control */
+#define QSPI_CLK_EN(1 31)
+#define QSPI_CLK_DIV_MAX 0x
+
+/* Command */
+#define QSPI_EN_CS(n) (n 28)
+#define QSPI_WLEN(n) ((n-1) 19)
+#define QSPI_3_PIN (1 18)
+#define QSPI_RD_SNGL (1 16)
+#define QSPI_WR_SNGL (2 16)
+#define QSPI_INVAL (4 16)
+
+/* Device Control */
+#define QSPI_DD(m, n) (m (3 + n*8))
+#define QSPI_CKPHA(n) (1 (2 + n*8))
+#define QSPI_CSPOL(n) (1 (1 + n*8))
+#define QSPI_CKPOL(n) (1 (n*8))
+
+/* Status */
+#define QSPI_WC(1 1)
+#define QSPI_BUSY (1 0)
+#define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)
+#define QSPI_XFER_DONE QSPI_WC
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return 1;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ /* CS handled in xfer */
+ return;
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ /* CS handled in xfer */
+ return;
+}
+
+void spi_init(void)
+{
+ /* nothing to do */
+}
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+ uint clk_div;
+
+ if (!hz)
+ clk_div = 0;
+ else
+ clk_div = (QSPI_FCLK / hz) - 1;
+
+ debug(%s: hz: %d, clock divider %d\n, __func__, hz, clk_div);
+
+ /* disable SCLK */
+ writel(readl(qspi-spi_clock_cntrl) ~QSPI_CLK_EN,
qspi-spi_clock_cntrl);
+
+ if (clk_div 0) {
+ debug(%s: clock divider 0, using /1 divider\n, __func__);
+ clk_div = 0;
+ }
+
+ if (clk_div QSPI_CLK_DIV_MAX) {
+ debug(%s: clock divider %d , using /%d divider\n,
+ __func__, QSPI_CLK_DIV_MAX, QSPI_CLK_DIV_MAX + 1);
+ clk_div = QSPI_CLK_DIV_MAX;
+ }
+
+ /* enable SCLK */
+ writel(QSPI_CLK_EN | clk_div, qspi-spi_clock_cntrl);
+ debug(%s: spi_clock_cntrl %08x\n, __func__,
readl(qspi-spi_clock_cntrl));
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+
[U-Boot] [PATCHv2 2/8] armv7: hw_data: change clock divider setting.
Clock requirement for qspi clk is 192 Mhz.
According to the below formulae,
f dpll = f ref * 2 * m /(n + 1)
clockoutx2_Hmn = f dpll / (hmn+ 1)
fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz
For clockoutx2_Hmn to be 768, hmn + 1 should be 4.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
b/arch/arm/cpu/armv7/omap5/hw_data.c
index 4d0eb45..ef52d43 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -186,7 +186,7 @@ static const struct dpll_params
per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {
static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {
{32, 0, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 12 MHz */
- {96, 4, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 20 MHz */
+ {96, 4, 4, 1, 3, 4, 4, 2, -1, -1, -1, -1}, /* 20 MHz */
{160, 6, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1},/* 16.8 MHz */
{20, 0, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 19.2 MHz */
{192, 12, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1}, /* 26 MHz */
--
1.7.1
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[U-Boot] [PATCHv2 5/8] drivers: mtd: spi: Modify read/write command for sfl256s flash.
Reading using the already supported read command is causing regression
after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/mtd/spi/spi_flash.c | 32 +++-
1 files changed, 31 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 6a6fe37..5f8db7b 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
else
read_len = remain_len;
+#ifdef CONFIG_TI_QSPI
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ for (actual = 0; actual read_len; actual += chunk_len) {
+ chunk_len = min(read_len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+ data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
+
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
+#else
spi_flash_addr(offset, cmd);
ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
debug(SF: read failed\n);
break;
}
-
+#endif
offset += read_len;
len -= read_len;
data += read_len;
--
1.7.1
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[U-Boot] [PATCHv2 7/8] driver: spi: Add memory mapped read support
Qspi controller has a memory mapped port which can be used for
data transfers. First controller need to be configured through
configuration port, then for data read switch the controller
to memory mapped and read from the predefined location.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/mtd/spi/spansion.c |1 +
drivers/mtd/spi/spi_flash.c |8 +++-
drivers/spi/ti_qspi.c| 85 +++---
include/configs/dra7xx_evm.h |3 +-
include/spi.h|3 +
5 files changed, 84 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c
index 3ec2151..1f60456 100644
--- a/drivers/mtd/spi/spansion.c
+++ b/drivers/mtd/spi/spansion.c
@@ -151,6 +151,7 @@ struct spi_flash *spi_flash_probe_spansion(struct spi_slave
*spi, u8 *idcode)
flash-page_size = 256;
flash-sector_size = 256 * params-pages_per_sector;
flash-size = flash-sector_size * params-nr_sectors;
+flash-memory_map = spi-memory_map;
return flash;
}
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index c81f402..c1173d8 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -288,8 +288,12 @@ int spi_flash_cmd_read_quad(struct spi_flash *flash, u32
offset,
spi-quad_enable = 1;
/* Handle memory-mapped SPI */
- if (flash-memory_map)
+ if (flash-memory_map) {
+ spi_xfer(flash-spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
memcpy(data, flash-memory_map + offset, len);
+ spi_xfer(flash-spi, 0, NULL, NULL, SPI_XFER_MEM_MAP_END);
+ return 0;
+ }
page_size = flash-page_size;
page_addr = offset / page_size;
@@ -330,7 +334,9 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
/* Handle memory-mapped SPI */
if (flash-memory_map) {
+ spi_xfer(flash-spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
memcpy(data, flash-memory_map + offset, len);
+ spi_xfer(flash-spi, 0, NULL, NULL, SPI_XFER_MEM_MAP_END);
return 0;
}
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 12bba11..d314b6e 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -23,8 +23,8 @@
struct qspi_slave {
struct spi_slave slave;
unsigned int mode;
- u32 cmd;
- u32 dc;
+u32 cmd;
+u32 dc;
};
#define to_qspi_slave(s) container_of(s, struct qspi_slave, slave)
@@ -86,6 +86,24 @@ static struct qspi_regs *qspi = (struct qspi_regs
*)QSPI_BASE;
#define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)
#define QSPI_XFER_DONE QSPI_WC
+#define MM_SWITCH 0x01
+#define MEM_CS 0x100
+#define MEM_CS_UNSELECT0xf0ff
+#define MMAP_START_ADDR 0x5c00
+#define CORE_CTRL_IO0x4a002558
+
+#defineQSPI_CMD_READ (0x3 0)
+#defineQSPI_CMD_READ_QUAD (0x6b 0)
+#defineQSPI_CMD_READ_FAST (0x0b 0)
+
+#defineQSPI_SETUP0_NUM_A_BYTES (0x2 8)
+#defineQSPI_SETUP0_NUM_D_BYTES_NO_BITS (0x0 10)
+#defineQSPI_SETUP0_NUM_D_BYTES_8_BITS (0x1 10)
+#defineQSPI_SETUP0_READ_NORMAL (0x0 12)
+#defineQSPI_SETUP0_READ_QUAD (0x3 12)
+#defineQSPI_CMD_WRITE (0x2 16)
+#define QSPI_NUM_DUMMY_BITS(0x0 24)
+
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
return 1;
@@ -108,6 +126,24 @@ void spi_init(void)
/* nothing to do */
}
+void spi_set_up_spi_register(struct spi_slave *slave)
+{
+ u32 memval = 0;
+
+ slave-memory_map = (void *)MMAP_START_ADDR;
+
+#ifdef CONFIG_SF_QUAD_RD
+ memval |= (QSPI_CMD_READ_QUAD | QSPI_SETUP0_NUM_A_BYTES |
+ QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD |
+ QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS);
+#else
+ memval |= (QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
+ QSPI_SETUP0_NUM_D_BYTES_NO_BITS | QSPI_SETUP0_READ_NORMAL |
+ QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS);
+#endif
+ writel(memval, qspi-spi_setup0);
+}
+
void spi_set_speed(struct spi_slave *slave, uint hz)
{
uint clk_div;
@@ -149,6 +185,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
unsigned int cs,
spi_set_speed(qslave-slave, max_hz);
qslave-mode = mode;
+
+#ifdef CONFIG_MMAP
+ spi_set_up_spi_register(qslave-slave);
+#endif
+
debug(%s: bus:%i cs:%i mode:%i\n, __func__, bus, cs, mode);
return qslave-slave;
@@ -188,12 +229,37 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *dout,
const uchar *txp = dout;
uchar *rxp = din;
[U-Boot] [PATCHv2 8/8] README: qspi usecase and testing documentation.
Contains documentation and testing details for qspi flash interface. Signed-off-by: Sourav Poddar sourav.pod...@ti.com --- doc/README.ti_qspi_dra_test | 38 ++ doc/README.ti_qspi_flash| 47 +++ 2 files changed, 85 insertions(+), 0 deletions(-) create mode 100644 doc/README.ti_qspi_dra_test create mode 100644 doc/README.ti_qspi_flash diff --git a/doc/README.ti_qspi_dra_test b/doc/README.ti_qspi_dra_test new file mode 100644 index 000..8910ff1 --- /dev/null +++ b/doc/README.ti_qspi_dra_test @@ -0,0 +1,38 @@ +- + Simple steps used to test the QSPI at U-Boot +- + +For #1, build the patched U-Boot and load MLO/u-boot.img + +-- +Boot from another medium like MMC +-- + +DRA752 EVM # mmc dev 0 +DRA752 EVM # fatload mmc 0 0x8200 MLO +DRA752 EVM # fatload mmc 0 0x8200 u-boot.img + +-- +Commands to erase/write u-boot/mlo to flash device +-- + +DRA752 EVM # sf probe 0 +[should detect the S25FL256S serial flash device] + +DRA752 EVM # sf erase 0 1 +DRA752 EVM # sf erase 1 1 +DRA752 EVM # sf erase 2 1 +DRA752 EVM # sf erase 3 1 +DRA752 EVM # sf erase 4 1 +DRA752 EVM # sf erase 5 1 +DRA752 EVM # sf erase 6 1 + +DRA752 EVM # sf write 8200 0 1 +DRA752 EVM # sf write 8300 2 8 + +For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power +on. ROM should find the GP header at offset 0 and load/execute SPL. SPL +then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to +find a U-Boot image header at offset 0x2 (set in the config file) +and proceeds to load that image using the U-Boot image payload offset/size +from the header. It will then start U-Boot. diff --git a/doc/README.ti_qspi_flash b/doc/README.ti_qspi_flash new file mode 100644 index 000..1b86d01 --- /dev/null +++ b/doc/README.ti_qspi_flash @@ -0,0 +1,47 @@ +QSPI U-boot support +-- + +Host processor is connected to serial flash device via qpsi +interface. QSPI is a kind of spi module that allows single, +dual and quad read access to external spi devices. The module +has a memory mapped interface which provide direct interface +for accessing data form external spi devices. + +The one QSPI in the device is primarily intended for fast booting +from Quad SPI flash devices. + +Usecase +--- + +MLO/u-boot.img will be flashed from SD/MMC to the flash device +using serial flash erase and write commands. Then, switch settings +will be changed to qspi boot. Then, the ROM code will read MLO +from the predefined location in the flash, where it was flashed and +execute it after storing it in SDRAM. Then, the MLO will read +u-boot.img from flash and execute it from SDRAM. + +SPI mode +--- +SPI mode uses mtd spi framework for transfer and reception of data. +Can be used in: +1. Normal mode: use single pin for transfers +2. Dual Mode: use two pins for transfers. +3. Quad mode: use four pin for transfer + +Memory mapped read mode +--- +In this, SPI controller is configured using configuration port and then +controler is switched to memory mapped port for data read. + +Driver +-- +drivers/qspi/ti_qspi.c +- Newly created file which is responsible for configuring the + qspi controller and also for providing the low level api which + is responsible for transferring the datas from host controller + to flash device and vice versa. + +Testing +--- +A seperated file named README.dra_qspi_test has been created which gives all the +details about the commands required to test qspi at u-boot level. -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv2 7/8] driver: spi: Add memory mapped read support
On Tuesday 23 July 2013 02:59 PM, Wolfgang Denk wrote:
Dear Sourav Poddar,
In message1374569979-28660-8-git-send-email-sourav.pod...@ti.com you wrote:
Qspi controller has a memory mapped port which can be used for
data transfers. First controller need to be configured through
configuration port, then for data read switch the controller
to memory mapped and read from the predefined location.
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
---
drivers/mtd/spi/spansion.c |1 +
drivers/mtd/spi/spi_flash.c |8 +++-
drivers/spi/ti_qspi.c| 85 +++---
include/configs/dra7xx_evm.h |3 +-
include/spi.h|3 +
5 files changed, 84 insertions(+), 16 deletions(-)
changelog missing, and an awful lot of checkpatch issues which need to
be fixed:
My bad. I think I missed this, will correct it in the next version.
ERROR: code indent should use tabs where possible
#112: FILE: drivers/mtd/spi/spansion.c:154:
+flash-memory_map = spi-memory_map;$
WARNING: please, no spaces at the start of a line
#112: FILE: drivers/mtd/spi/spansion.c:154:
+flash-memory_map = spi-memory_map;$
ERROR: code indent should use tabs where possible
#154: FILE: drivers/spi/ti_qspi.c:26:
+u32 cmd;$
WARNING: please, no spaces at the start of a line
#154: FILE: drivers/spi/ti_qspi.c:26:
+u32 cmd;$
ERROR: code indent should use tabs where possible
#155: FILE: drivers/spi/ti_qspi.c:27:
+u32 dc;$
WARNING: please, no spaces at the start of a line
#155: FILE: drivers/spi/ti_qspi.c:27:
+u32 dc;$
ERROR: code indent should use tabs where possible
#233: FILE: drivers/spi/ti_qspi.c:237:
+qslave-dc = 0;$
WARNING: please, no spaces at the start of a line
#233: FILE: drivers/spi/ti_qspi.c:237:
+qslave-dc = 0;$
ERROR: code indent should use tabs where possible
#234: FILE: drivers/spi/ti_qspi.c:238:
+if (qslave-mode SPI_CPHA)$
WARNING: please, no spaces at the start of a line
#234: FILE: drivers/spi/ti_qspi.c:238:
+if (qslave-mode SPI_CPHA)$
ERROR: code indent should use tabs where possible
#235: FILE: drivers/spi/ti_qspi.c:239:
+qslave-dc |= QSPI_CKPHA(slave-cs);$
WARNING: please, no spaces at the start of a line
#235: FILE: drivers/spi/ti_qspi.c:239:
+qslave-dc |= QSPI_CKPHA(slave-cs);$
ERROR: code indent should use tabs where possible
#236: FILE: drivers/spi/ti_qspi.c:240:
+if (qslave-mode SPI_CPOL)$
WARNING: please, no spaces at the start of a line
#236: FILE: drivers/spi/ti_qspi.c:240:
+if (qslave-mode SPI_CPOL)$
ERROR: code indent should use tabs where possible
#237: FILE: drivers/spi/ti_qspi.c:241:
+qslave-dc |= QSPI_CKPOL(slave-cs);$
WARNING: please, no spaces at the start of a line
#237: FILE: drivers/spi/ti_qspi.c:241:
+qslave-dc |= QSPI_CKPOL(slave-cs);$
ERROR: code indent should use tabs where possible
#238: FILE: drivers/spi/ti_qspi.c:242:
+if (qslave-mode SPI_CS_HIGH)$
WARNING: please, no spaces at the start of a line
#238: FILE: drivers/spi/ti_qspi.c:242:
+if (qslave-mode SPI_CS_HIGH)$
ERROR: code indent should use tabs where possible
#239: FILE: drivers/spi/ti_qspi.c:243:
+qslave-dc |= QSPI_CSPOL(slave-cs);$
WARNING: please, no spaces at the start of a line
#239: FILE: drivers/spi/ti_qspi.c:243:
+qslave-dc |= QSPI_CSPOL(slave-cs);$
ERROR: code indent should use tabs where possible
#241: FILE: drivers/spi/ti_qspi.c:245:
+writel(qslave-dc,qspi-spi_dc);$
WARNING: please, no spaces at the start of a line
#241: FILE: drivers/spi/ti_qspi.c:245:
+writel(qslave-dc,qspi-spi_dc);$
ERROR: code indent should use tabs where possible
#243: FILE: drivers/spi/ti_qspi.c:247:
+if (flags == SPI_XFER_MEM_MAP) {$
WARNING: please, no spaces at the start of a line
#243: FILE: drivers/spi/ti_qspi.c:247:
+if (flags == SPI_XFER_MEM_MAP) {$
ERROR: code indent should use tabs where possible
#244: FILE: drivers/spi/ti_qspi.c:248:
+writel(MM_SWITCH,qspi-spi_switch);$
WARNING: please, no spaces at the start of a line
#244: FILE: drivers/spi/ti_qspi.c:248:
+writel(MM_SWITCH,qspi-spi_switch);$
ERROR: code indent should use tabs where possible
#245: FILE: drivers/spi/ti_qspi.c:249:
+val = readl(CORE_CTRL_IO);$
WARNING: please, no spaces at the start of a line
#245: FILE: drivers/spi/ti_qspi.c:249:
+val = readl(CORE_CTRL_IO);$
ERROR: code indent should use tabs where possible
#246: FILE: drivers/spi/ti_qspi.c:250:
+val |= MEM_CS;$
WARNING: please, no spaces at the start of a line
#246: FILE: drivers/spi/ti_qspi.c:250:
+val |= MEM_CS;$
ERROR: code indent should use tabs where possible
#247: FILE: drivers/spi/ti_qspi.c:251:
+writel(val, CORE_CTRL_IO);$
WARNING: please, no spaces at the start of a line
#247: FILE:
Re: [U-Boot] [PATCH 1/1] net: phy/realtek: Add support for RTL8211DN and RTL8211E phy modules
Hi Andy, Joe,
This patch adds support for Realtek PHY modules RTL8211DN and RTL8211E
(variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG), which can be
found on Freescale's T1040RDB boards.
To make the driver more generic across 8211 family, a generic name 8211x
is added for macros and function names.
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
Can you please review this patch and let me know if these changes seem suitable
to you.
Thanks for your help.
Regards,
Bhupesh
---
drivers/net/phy/realtek.c | 77 +++--
--
1 file changed, 51 insertions(+), 26 deletions(-)
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index
b7e2753..b971456 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -26,18 +26,18 @@
#define PHY_AUTONEGOTIATE_TIMEOUT 5000
-/* RTL8211B PHY Status Register */
-#define MIIM_RTL8211B_PHY_STATUS 0x11
-#define MIIM_RTL8211B_PHYSTAT_SPEED0xc000
-#define MIIM_RTL8211B_PHYSTAT_GBIT 0x8000
-#define MIIM_RTL8211B_PHYSTAT_100 0x4000
-#define MIIM_RTL8211B_PHYSTAT_DUPLEX 0x2000
-#define MIIM_RTL8211B_PHYSTAT_SPDDONE 0x0800
-#define MIIM_RTL8211B_PHYSTAT_LINK 0x0400
-
-
-/* RealTek RTL8211B */
-static int rtl8211b_config(struct phy_device *phydev)
+/* RTL8211x PHY Status Register */
+#define MIIM_RTL8211x_PHY_STATUS 0x11
+#define MIIM_RTL8211x_PHYSTAT_SPEED0xc000
+#define MIIM_RTL8211x_PHYSTAT_GBIT 0x8000
+#define MIIM_RTL8211x_PHYSTAT_100 0x4000
+#define MIIM_RTL8211x_PHYSTAT_DUPLEX 0x2000
+#define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800
+#define MIIM_RTL8211x_PHYSTAT_LINK 0x0400
+
+
+/* RealTek RTL8211x */
+static int rtl8211x_config(struct phy_device *phydev)
{
phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
@@ -46,20 +46,20 @@ static int rtl8211b_config(struct phy_device *phydev)
return 0;
}
-static int rtl8211b_parse_status(struct phy_device *phydev)
+static int rtl8211x_parse_status(struct phy_device *phydev)
{
unsigned int speed;
unsigned int mii_reg;
- mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
MIIM_RTL8211B_PHY_STATUS);
+ mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
MIIM_RTL8211x_PHY_STATUS);
- if (!(mii_reg MIIM_RTL8211B_PHYSTAT_SPDDONE)) {
+ if (!(mii_reg MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
int i = 0;
/* in case of timeout -link is cleared */
phydev-link = 1;
puts(Waiting for PHY realtime link);
- while (!(mii_reg MIIM_RTL8211B_PHYSTAT_SPDDONE)) {
+ while (!(mii_reg MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
/* Timeout reached ? */
if (i PHY_AUTONEGOTIATE_TIMEOUT) {
puts( TIMEOUT !\n);
@@ -71,29 +71,29 @@ static int rtl8211b_parse_status(struct phy_device
*phydev)
putc('.');
udelay(1000); /* 1 ms */
mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
- MIIM_RTL8211B_PHY_STATUS);
+ MIIM_RTL8211x_PHY_STATUS);
}
puts( done\n);
udelay(50); /* another 500 ms (results in faster
booting) */
} else {
- if (mii_reg MIIM_RTL8211B_PHYSTAT_LINK)
+ if (mii_reg MIIM_RTL8211x_PHYSTAT_LINK)
phydev-link = 1;
else
phydev-link = 0;
}
- if (mii_reg MIIM_RTL8211B_PHYSTAT_DUPLEX)
+ if (mii_reg MIIM_RTL8211x_PHYSTAT_DUPLEX)
phydev-duplex = DUPLEX_FULL;
else
phydev-duplex = DUPLEX_HALF;
- speed = (mii_reg MIIM_RTL8211B_PHYSTAT_SPEED);
+ speed = (mii_reg MIIM_RTL8211x_PHYSTAT_SPEED);
switch (speed) {
- case MIIM_RTL8211B_PHYSTAT_GBIT:
+ case MIIM_RTL8211x_PHYSTAT_GBIT:
phydev-speed = SPEED_1000;
break;
- case MIIM_RTL8211B_PHYSTAT_100:
+ case MIIM_RTL8211x_PHYSTAT_100:
phydev-speed = SPEED_100;
break;
default:
@@ -103,28 +103,53 @@ static int rtl8211b_parse_status(struct phy_device
*phydev)
return 0;
}
-static int rtl8211b_startup(struct phy_device *phydev)
+static int rtl8211x_startup(struct phy_device *phydev)
{
/* Read the Status (2x to make sure link is right) */
genphy_update_link(phydev);
- rtl8211b_parse_status(phydev);
+ rtl8211x_parse_status(phydev);
return 0;
}
+/* Support for RTL8211B PHY */
static struct phy_driver RTL8211B_driver = {
.name = RealTek RTL8211B,
.uid = 0x1cc910,
.mask = 0xf0,
.features = PHY_GBIT_FEATURES,
- .config = rtl8211b_config,
- .startup = rtl8211b_startup,
+ .config = rtl8211x_config,
+
Re: [U-Boot] [PATCH] imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
Hi all,
On 07/22/2013 01:33 PM, Robert Winkler wrote:
DVI monitors show up as the RX_SENSE bits in the
HDMI_PHY_STAT0 register, ie F0 so we really want to check
against F2 to support both HDMI and DVI.
A little background is probably appropriate for this patch.
Since the beginning of usage of the SABRE Lite and Nitrogen6x
boards, DVI detection has been somewhat broken.
Some (most) DVI monitors don't produce the HPD bit in
the PHY_STAT0 register, but do show proper toggling of the
RX_SENSE0..3 bits.
Creating a new the bit-mask to include all five bits and
modifying the 'hdmidet' command and internal detection
routines allows these monitors to function properly in U-Boot.
A related patch to our kernels allows things to work under
Linux:
https://github.com/boundarydevices/linux-imx6/commit/7d8752905c118af9063738a533227de0b2f6ecd4
Signed-off-by: Robert Winkler robert.wink...@boundarydevices.com
---
arch/arm/imx-common/cmd_hdmidet.c | 3 +--
arch/arm/include/asm/arch-mx6/mxc_hdmi.h | 3 +++
board/boundary/nitrogen6x/nitrogen6x.c| 2 +-
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 2 +-
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/imx-common/cmd_hdmidet.c
b/arch/arm/imx-common/cmd_hdmidet.c
index 794bf50..ce0b26e 100644
--- a/arch/arm/imx-common/cmd_hdmidet.c
+++ b/arch/arm/imx-common/cmd_hdmidet.c
@@ -27,8 +27,7 @@
static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- u8 reg = readb(hdmi-phy_stat0) HDMI_PHY_HPD;
- return (regHDMI_PHY_HPD) ? 0 : 1;
+ return (readb(hdmi-phy_stat0) HDMI_DVI_STAT) ? 0 : 1;
}
U_BOOT_CMD(hdmidet, 1, 1, do_hdmidet,
diff --git a/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
b/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
index 9dccb3f..1b55b05 100644
--- a/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
+++ b/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
@@ -896,6 +896,9 @@ enum {
HDMI_PHY_HPD = 0x02,
HDMI_PHY_TX_PHY_LOCK = 0x01,
+/* Convenience macro RX_SENSE | HPD */
+ HDMI_DVI_STAT = 0xF2,
+
/* PHY_I2CM_SLAVE_ADDR field values */
HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
FWIW, we've figured out that the root cause of this is
current-limiting by DVI monitors interacts with a
resistor (R251) that acts as a voltage divider on
the HPD signal on our boards.
We've tested this patch against SABRE SDB boards as
well as SABRE Lite and Nitrogen6X.
Regards,
Eric
___
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[U-Boot] sandbox build on OS X
Hi All, Latest sandbox builds fine on a Linux box (VM actually). Though, is it possible to build sandbox on OS X?? Has anyone tried lately? I tried building on Mac a couple or so of days back and it just spewed out an error message. I've got the standard OS X compiler installed and homebrew (gcc47, gcc48). All of them gave me an error. All the best, Rommel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
Hi Eric, On Tue, Jul 23, 2013 at 6:43 PM, Eric Nelson eric.nel...@boundarydevices.com wrote: A little background is probably appropriate for this patch. Since the beginning of usage of the SABRE Lite and Nitrogen6x boards, DVI detection has been somewhat broken. Some (most) DVI monitors don't produce the HPD bit in the PHY_STAT0 register, but do show proper toggling of the RX_SENSE0..3 bits. Creating a new the bit-mask to include all five bits and modifying the 'hdmidet' command and internal detection routines allows these monitors to function properly in U-Boot. A related patch to our kernels allows things to work under Linux: https://github.com/boundarydevices/linux-imx6/commit/7d8752905c118af9063738a533227de0b2f6ecd4 Thanks for the excellent explanation and for finding the root cause! It would be really nice if Robert could send a v2 adding your text into the commit log. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/7 v9] powerpc: p1022ds: add TPL for p1022ds nand boot
From: Ying Zhang b40...@freescale.com
TPL is introduced in the patch NAND: TPL : introduce the TPL
based on the SPL, here enable TPL for p1022ds nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- Add new symbol CONFIG_SPL_ENV_IN_NAND.
Change from v7:
- No change.
Change from v6:
- Delete the file board/freescale/p1022ds/tpl.c.
- Reuse the file board/freescale/p1022ds/spl.c in the TPL.
Change from v5:
- Change functionality nand_load_image to nand_load, it is called in TPL.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from powerpc/p1022ds: nand: introduce the TPL based on the SPL.
board/freescale/p1022ds/spl.c | 16 +++
board/freescale/p1022ds/spl_minimal.c | 53 ++
include/configs/P1022DS.h | 77 ++---
3 files changed, 82 insertions(+), 64 deletions(-)
diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c
index b6669f3..52e4645 100644
--- a/board/freescale/p1022ds/spl.c
+++ b/board/freescale/p1022ds/spl.c
@@ -101,21 +101,37 @@ void board_init_r(gd_t *gd, ulong dest_addr)
get_clocks();
mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, \
CONFIG_SPL_RELOC_MALLOC_SIZE);
+#ifndef CONFIG_SPL_NAND_BOOT
env_init();
+#endif
#ifdef CONFIG_SPL_MMC_BOOT
mmc_initialize(bd);
#endif
/* relocate environment function pointers etc. */
+#ifdef CONFIG_SPL_NAND_BOOT
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+(uchar *)CONFIG_ENV_ADDR);
+
+ gd-env_addr = (ulong)(CONFIG_ENV_ADDR);
+ gd-env_valid = 1;
+#else
env_relocate();
+#endif
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
gd-ram_size = initdram(0);
+#ifdef CONFIG_SPL_NAND_BOOT
+ puts(Tertiary program loader running in sram...);
+#else
puts(Second program loader running in sram...\n);
+#endif
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
spi_boot();
+#elif defined(CONFIG_SPL_NAND_BOOT)
+ nand_boot();
#endif
}
diff --git a/board/freescale/p1022ds/spl_minimal.c
b/board/freescale/p1022ds/spl_minimal.c
index 8d12fa6..efb2af3 100644
--- a/board/freescale/p1022ds/spl_minimal.c
+++ b/board/freescale/p1022ds/spl_minimal.c
@@ -27,51 +27,6 @@
#include asm/fsl_ddr_sdram.h
-/*
- * Fixed sdram init -- doesn't use serial presence detect.
- */
-void sdram_init(void)
-{
- volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
-
- __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, ddr-cs0_bnds);
- __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, ddr-cs0_config);
-#if CONFIG_CHIP_SELECTS_PER_CTRL 1
- __raw_writel(CONFIG_SYS_DDR_CS1_BNDS, ddr-cs1_bnds);
- __raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, ddr-cs1_config);
-#endif
- __raw_writel(CONFIG_SYS_DDR_TIMING_3, ddr-timing_cfg_3);
- __raw_writel(CONFIG_SYS_DDR_TIMING_0, ddr-timing_cfg_0);
- __raw_writel(CONFIG_SYS_DDR_TIMING_1, ddr-timing_cfg_1);
- __raw_writel(CONFIG_SYS_DDR_TIMING_2, ddr-timing_cfg_2);
-
- __raw_writel(CONFIG_SYS_DDR_CONTROL_2, ddr-sdram_cfg_2);
- __raw_writel(CONFIG_SYS_DDR_MODE_1, ddr-sdram_mode);
- __raw_writel(CONFIG_SYS_DDR_MODE_2, ddr-sdram_mode_2);
-
- __raw_writel(CONFIG_SYS_DDR_INTERVAL, ddr-sdram_interval);
- __raw_writel(CONFIG_SYS_DDR_DATA_INIT, ddr-sdram_data_init);
- __raw_writel(CONFIG_SYS_DDR_CLK_CTRL, ddr-sdram_clk_cntl);
-
- __raw_writel(CONFIG_SYS_DDR_TIMING_4, ddr-timing_cfg_4);
- __raw_writel(CONFIG_SYS_DDR_TIMING_5, ddr-timing_cfg_5);
- __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, ddr-ddr_zq_cntl);
- __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL, ddr-ddr_wrlvl_cntl);
-
- /* Set, but do not enable the memory */
- __raw_writel(CONFIG_SYS_DDR_CONTROL ~SDRAM_CFG_MEM_EN,
- ddr-sdram_cfg);
-
- in_be32(ddr-sdram_cfg);
- udelay(500);
-
- /* Let the controller go */
- out_be32(ddr-sdram_cfg, in_be32(ddr-sdram_cfg) | SDRAM_CFG_MEM_EN);
- in_be32(ddr-sdram_cfg);
-
- set_next_law(0, CONFIG_SYS_SDRAM_SIZE_LAW, LAW_TRGT_IF_DDR_1);
-}
-
const static u32 sysclk_tbl[] = {
6000, 7499900, 83332500, 800,
9000, 1000, 12499800, 1200
@@ -83,6 +38,10 @@ void board_init_f(ulong bootflag)
u32 plat_ratio, sys_clk, bus_clk;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+#if defined(CONFIG_SYS_NAND_BR_PRELIM) defined(CONFIG_SYS_NAND_OR_PRELIM)
+ set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
+ set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM);
+#endif
/* for FPGA */
set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
@@ -98,9 +57,6 @@ void board_init_f(ulong bootflag)
puts(\nNAND boot... );
- /* Initialize the
[U-Boot] [PATCH 2/7 v9] powerpc: mpc85xx: Support booting from SD Card with SPL
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so
that ddr spd code can get the interleaving mode setting in env. It
loads final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions
enabled.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- Split to the patch Support booting from SD Card with SPL and the patch
- Enable P1022DS to boot from SD Card with SPL. this patch only support
- booting from SD Card with SPL
Change from v5:
- Add new symbol CONFIG_SPL_ENV_IMPORT for contain the functionality
- env_import.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from boot from SD card/SPI flash with SPL.
README |4 +
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds|5 +
.../cpu/mpc8xxx/ddr/lc_common_dimm_params.c|4 +
doc/README.mpc85xx-sd-spi-boot | 81
drivers/mmc/Makefile |3 +
drivers/mmc/fsl_esdhc_spl.c| 131
drivers/mmc/mmc.c |2 +
include/fsl_esdhc.h|1 +
spl/Makefile |3 +
9 files changed, 234 insertions(+), 0 deletions(-)
create mode 100644 doc/README.mpc85xx-sd-spi-boot
create mode 100644 drivers/mmc/fsl_esdhc_spl.c
diff --git a/README b/README
index bcfffc3..f070e1b 100644
--- a/README
+++ b/README
@@ -3032,6 +3032,10 @@ FIT uImage format:
Support for NAND boot using simple NAND drivers that
expose the cmd_ctrl() interface.
+ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+ Set for the SPL on PPC mpc8xxx targets, support for
+ arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
+
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 20284ed..8aeb1a0 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -60,6 +60,11 @@ SECTIONS
}
_edata = .;
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
. = ALIGN(8);
__init_begin = .;
__init_end = .;
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index e958e13..56128a7 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -218,12 +218,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t
*dimm_params,
if (dimm_params[i].n_ranks) {
if (dimm_params[i].registered_dimm) {
temp1 = 1;
+#ifndef CONFIG_SPL_BUILD
printf(Detected RDIMM %s\n,
dimm_params[i].mpart);
+#endif
} else {
temp2 = 1;
+#ifndef CONFIG_SPL_BUILD
printf(Detected UDIMM %s\n,
dimm_params[i].mpart);
+#endif
}
}
}
diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot
new file mode 100644
index 000..d5043cc
--- /dev/null
+++ b/doc/README.mpc85xx-sd-spi-boot
@@ -0,0 +1,81 @@
+
+Booting from On-Chip ROM (eSDHC or eSPI)
+
+
+boot_format is a tool to write SD bootable images to a filesystem and build
+SD/SPI images to a binary file for writing later.
+
+When booting from an SD card/MMC, boot_format puts the configuration file and
+the RAM-based U-Boot image on the card.
+When booting from an EEPROM, boot_format generates a binary image that is used
+to boot from this EEPROM.
+
+Where to get boot_format:
+
+
+you can browse it online at:
+http://git.freescale.com/git/cgit.cgi/ppc/sdk/boot-format.git/
+
+Building
+
+
+Run the following to build this project
+
+ $ make
+
Re: [U-Boot] [PATCH] fs: fat: fix bug when write size is less than a sector size
Hi, Dear Wolfgang Denk
On 7/19/2013 7:20 PM, Wolfgang Denk wrote:
Dear Josh Wu,
In message 51e90a3d.6000...@atmel.com you wrote:
Why would this be needed? The case of a partial write is covered
further down below in the code, in the if (size % mydata-sect_size)
part...
The call of disk_write() will pass the sector size as 0. That will cause
the mmc driver stalled.
I think instead of sector size you mean the number of sectors. The
sector size is fixed.
yes, I mean the number of sectors.
Big question: why should we call disk_write() at all when the count is
zero? Maybe a simple
if ((size / mydata-sect_size) 0) {
if (disk_write(startsect, size / mydata-sect_size, buffer)
0) {
...
}
}
would fix this issue?
I agree with above changes. It make the logical clearer:
Step 1. write buffer in sectors. If buffer size is less than one
sector we don't need to call disk_write() with zero sector.
Step 2. write remain buffer in one sector.
So I think I will send a v2 patch according to your suggestion. Thanks.
Best regards,
Wolfgang Denk
Best Regards,
Josh Wu
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[U-Boot] [PATCH 4/7 v9] powerpc : spi flash : Support to start from eSPI with SPL
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so
that ddr spd code can get the interleaving mode setting in env. It
loads final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions
enabled.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No change.
Change from v5:
- Split from powerpc/p1022ds: boot from spi flash with SPL
- this patch add the capability starting from eSPI with SPL.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from boot from SD card/SPI flash with SPL.
drivers/mtd/spi/Makefile |1 +
drivers/mtd/spi/fsl_espi_spl.c | 78
drivers/mtd/spi/spi_flash.c|2 +
3 files changed, 81 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/spi/fsl_espi_spl.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index ecbb210..39e4e1d 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libspi_flash.o
ifdef CONFIG_SPL_BUILD
COBJS-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
+COBJS-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
endif
COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o
diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c
new file mode 100644
index 000..443c2e1
--- /dev/null
+++ b/drivers/mtd/spi/fsl_espi_spl.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include spi_flash.h
+#include malloc.h
+
+#define ESPI_BOOT_IMAGE_SIZE 0x48
+#define ESPI_BOOT_IMAGE_ADDR 0x50
+#define CONFIG_CFG_DATA_SECTOR 0
+
+/*
+ * The main entry for SPI booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from SPI into SDRAM and starts it from there.
+ */
+void spi_boot(void)
+{
+ void (*uboot)(void) __noreturn;
+ u32 offset, code_len;
+ unsigned char *buf = NULL;
+ struct spi_flash *flash;
+
+ flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+ CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
+ if (flash == NULL) {
+ puts(\nspi_flash_probe failed);
+ hang();
+ }
+
+ /*
+ * Load U-Boot image from SPI flash into RAM
+ */
+ buf = malloc(flash-page_size);
+ if (buf == NULL) {
+ puts(\nmalloc failed);
+ hang();
+ }
+ memset(buf, 0, flash-page_size);
+
+ spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR, \
+ flash-page_size, (void *)buf);
+ offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR);
+ /* Skip spl code */
+ offset += CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS;
+ /* Get the code size from offset 0x48 */
+ code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE);
+ /* Skip spl code */
+ code_len = code_len - CONFIG_SPL_MAX_SIZE;
+ /* copy code to DDR */
+ spi_flash_read(flash, offset, code_len, \
+ (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST);
+ /*
+ * Jump to U-Boot image
+ */
+ flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, \
+ code_len);
+ uboot = (void *) CONFIG_SYS_SPI_FLASH_U_BOOT_START;
+ (*uboot)();
+}
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 6a6fe37..e474f5c 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -554,12 +554,14 @@ struct spi_flash *spi_flash_probe(unsigned int bus,
unsigned int cs,
goto err_manufacturer_probe;
}
#endif
+#ifndef CONFIG_SPL_BUILD
[U-Boot] [PATCH 3/7 v9] powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSDHC with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- Split from the patch powerpc/p1022ds: boot from SD Card with SPL,
- this patch only enables p1022ds to boot from SD Card with SPL.
Change from v5:
- No change.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- No change.
README |4 ++
board/freescale/common/Makefile |2 -
board/freescale/p1022ds/Makefile |3 +
board/freescale/p1022ds/spl.c| 111 ++
board/freescale/p1022ds/tlb.c|9 +++-
include/configs/P1022DS.h| 54 ---
6 files changed, 173 insertions(+), 10 deletions(-)
create mode 100644 board/freescale/p1022ds/spl.c
diff --git a/README b/README
index f070e1b..f53613f 100644
--- a/README
+++ b/README
@@ -3036,6 +3036,10 @@ FIT uImage format:
Set for the SPL on PPC mpc8xxx targets, support for
arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
+ CONFIG_SPL_COMMON_INIT_DDR
+ Set for common ddr init with serial presence detect in
+ SPL binary.
+
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 37236d0..e991def 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -61,9 +61,7 @@ COBJS-$(CONFIG_MPC8555CDS)+= cds_pci_ft.o
COBJS-$(CONFIG_MPC8536DS) += ics307_clk.o
COBJS-$(CONFIG_MPC8572DS) += ics307_clk.o
-ifndef CONFIG_SPL_BUILD
COBJS-$(CONFIG_P1022DS)+= ics307_clk.o
-endif
COBJS-$(CONFIG_P2020DS)+= ics307_clk.o
COBJS-$(CONFIG_P3041DS)+= ics307_clk.o
COBJS-$(CONFIG_P4080DS)+= ics307_clk.o
diff --git a/board/freescale/p1022ds/Makefile b/board/freescale/p1022ds/Makefile
index 0eeef05..9746063 100644
--- a/board/freescale/p1022ds/Makefile
+++ b/board/freescale/p1022ds/Makefile
@@ -24,6 +24,9 @@ ifdef MINIMAL
COBJS-y+= spl_minimal.o tlb.o law.o
else
+ifdef CONFIG_SPL_BUILD
+COBJS-y += spl.o
+endif
COBJS-y+= $(BOARD).o
COBJS-y+= ddr.o
COBJS-y+= law.o
diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c
new file mode 100644
index 000..9927671
--- /dev/null
+++ b/board/freescale/p1022ds/spl.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include ns16550.h
+#include malloc.h
+#include mmc.h
+#include nand.h
+#include i2c.h
+#include ../common/ngpixis.h
+#include fsl_esdhc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const u32 sysclk_tbl[] = {
+ 6000, 7499900, 83332500, 800,
+ 9000, 1000, 12499800, 1200
+};
+
+ulong get_effective_memsize(void)
+{
+ return CONFIG_SYS_L2_SIZE;
+}
+
+void board_init_f(ulong bootflag)
+{
+ int px_spd;
+ u32 plat_ratio, sys_clk, bus_clk;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ console_init_f();
+
+ /* Set pmuxcr to allow both i2c1 and i2c2 */
+ setbits_be32(gur-pmuxcr, in_be32(gur-pmuxcr) | 0x1000);
+ setbits_be32(gur-pmuxcr,
+ in_be32(gur-pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
+
+ /* Read back the register to synchronize the write. */
+ in_be32(gur-pmuxcr);
+
+ /* initialize selected port with appropriate baud rate */
+ px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
+ sys_clk = sysclk_tbl[px_spd PIXIS_SPD_SYSCLK_MASK];
+ plat_ratio = in_be32(gur-porpllsr) MPC85xx_PORPLLSR_PLAT_RATIO;
+ bus_clk = sys_clk * plat_ratio / 2;
+
+ NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+ bus_clk / 16 / CONFIG_BAUDRATE);
+#ifdef CONFIG_SPL_MMC_BOOT
+ puts(\nSD boot...\n);
+#endif
+
+ /* copy code to RAM and jump to it - this should not return */
[U-Boot] [PATCH 6/7 v9] NAND: TPL : introduce the TPL based on the SPL
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the DDR with the SPD or other
operations.
The TPL's size is sizeable, the maximum size is decided by the memory's
size that TPL runs. It initializes the DDR through SPD code, and copys
final uboot image to DDR. So there are three stage uboot images:
* spl_boot, * tpl_boot, * final uboot image
This patch is on top of the patch:
SPL: Makefile: Build a separate autoconf.mk for SPL
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- Modify the doc/README.TPL.
- Modify the Makefile.
- Modify the drivers/mtd/nand/fsl_elbc_spl.c.
- Modify the spl/Makefile.
Change from v7:
- Modify the doc/README.TPL
- Modify the spl/Makefile.
Change from v6:
- Modify the description of the patch.
- Add the separate the autoconf.mk for TPL.
- Delete the file tpl/Makefile and the directory tpl.
- Reuse the spl/Makefie in TPL.
Change from v5:
- Use ifdef to define nand_load_image to non-static for non-SPL.
Change from v4:
- No change.
Change from v3:
- No change.
Change from v2:
- No change.
Change from v1:
- Split from powerpc/p1022ds: nand: introduce the TPL based on the SPL.
Makefile| 53 +--
README | 16 +++
config.mk | 30 -
doc/README.TPL | 45 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/fsl_elbc_spl.c | 20 ++
spl/Makefile| 29 +++--
7 files changed, 176 insertions(+), 18 deletions(-)
create mode 100644 doc/README.TPL
diff --git a/Makefile b/Makefile
index 64e0ea1..b95ec5b 100644
--- a/Makefile
+++ b/Makefile
@@ -118,10 +118,11 @@ endif # ifneq ($(BUILD_DIR),)
OBJTREE:= $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
SPLTREE:= $(OBJTREE)/spl
+TPLTREE:= $(OBJTREE)/tpl
SRCTREE:= $(CURDIR)
TOPDIR := $(SRCTREE)
LNDIR := $(OBJTREE)
-export TOPDIR SRCTREE OBJTREE SPLTREE
+export TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE
MKCONFIG := $(SRCTREE)/mkconfig
export MKCONFIG
@@ -413,6 +414,7 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
+ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin
ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
ifneq ($(CONFIG_SPL_TARGET),)
ALL-$(CONFIG_SPL) += $(obj)$(subst ,,$(CONFIG_SPL_TARGET))
@@ -491,13 +493,27 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
$(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $ $@
+# $@ is output, $(1) and $(2) are inputs, $(3) is padded intermediate,
+# $(4) is pad-to
+SPL_PAD_APPEND = \
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(4) -I binary -O binary \
+ $(1) $(obj)$(3); \
+ cat $(obj)$(3) $(obj)$(2) $@; \
+ rm $(obj)$(3)
+ifdef CONFIG_TPL
+PAD_BIN := $(obj)tpl/u-boot-with-tpl.bin
+else
+PAD_BIN := $(obj)u-boot.bin
+endif
-$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
- -I binary -O binary $ $(obj)spl/u-boot-spl-pad.bin
- cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $@
- rm $(obj)spl/u-boot-spl-pad.bin
+$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(PAD_BIN)
+ $(call SPL_PAD_APPEND, \
+ $,$(PAD_BIN),spl/u-boot-spl-pad.bin,$(CONFIG_SPL_PAD_TO))
+
+$(obj)tpl/u-boot-with-tpl.bin: $(obj)tpl/u-boot-tpl.bin $(obj)u-boot.bin
+ $(call SPL_PAD_APPEND, \
+ $,u-boot.bin, tpl/u-boot-tpl-pad.bin,$(CONFIG_TPL_PAD_TO))
$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
@@ -623,6 +639,10 @@ $(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
$(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
$(MAKE) -C spl all
+$(obj)tpl/u-boot-tpl.bin: $(SUBDIR_TOOLS) depend
+ $(shell [ -d ${TPLTREE} ] || mkdir -p ${TPLTREE})
+ $(MAKE) -C spl all CONFIG_TPL_BUILD=y
+
updater:
$(MAKE) -C tools/updater all
@@ -630,6 +650,7 @@ updater:
# parallel sub-makes creating .depend files simultaneously.
depend dep:$(TIMESTAMP_FILE) $(VERSION_FILE) \
$(obj)include/spl-autoconf.mk \
+ $(obj)include/tpl-autoconf.mk \
$(obj)include/autoconf.mk \
[U-Boot] [PATCH] arm:samsung:timer: Move common timer related code to ./samsung-common/ directory
Common Samsung's timer/pwm code has been moved one level up - to
./samsung-common directory.
This would allow other - non S5P based targets to reuse it.
As a side effect, duplicated header files have been removed.
Signed-off-by: Lukasz Majewski l.majew...@majess.pl
Cc: Minkyu Kang mk7.k...@samsung.com
---
Makefile |7 +-
arch/arm/cpu/armv7/s5p-common/Makefile|2 -
arch/arm/cpu/armv7/s5p-common/pwm.c | 187
arch/arm/cpu/armv7/s5p-common/timer.c | 148 ---
arch/arm/cpu/samsung-common/Makefile | 48
arch/arm/cpu/samsung-common/pwm.c | 188 +
arch/arm/cpu/samsung-common/timer.c | 149 +++
arch/arm/include/asm/arch-exynos/pwm.h| 68 ---
arch/arm/include/asm/arch-s5pc1xx/pwm.h | 68 ---
arch/arm/include/asm/samsung-common/pwm.h | 68 +++
10 files changed, 457 insertions(+), 476 deletions(-)
delete mode 100644 arch/arm/cpu/armv7/s5p-common/pwm.c
delete mode 100644 arch/arm/cpu/armv7/s5p-common/timer.c
create mode 100644 arch/arm/cpu/samsung-common/Makefile
create mode 100644 arch/arm/cpu/samsung-common/pwm.c
create mode 100644 arch/arm/cpu/samsung-common/timer.c
delete mode 100644 arch/arm/include/asm/arch-exynos/pwm.h
delete mode 100644 arch/arm/include/asm/arch-s5pc1xx/pwm.h
create mode 100644 arch/arm/include/asm/samsung-common/pwm.h
diff --git a/Makefile b/Makefile
index f100b83..d53ccd2 100644
--- a/Makefile
+++ b/Makefile
@@ -346,12 +346,13 @@ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs
vf610))
LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
endif
-ifeq ($(SOC),s5pc1xx)
+ifeq ($(CPU),armv7)
+LIBS-y += arch/$(ARCH)/cpu/samsung-common/libsamsung-common.o
+ifneq (,$(filter $(SOC), exynos s5pc1xx))
LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
endif
-ifeq ($(SOC),exynos)
-LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
endif
+
ifneq ($(CONFIG_TEGRA),)
LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o
LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index 0c38bd0..e48ecd7 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -27,9 +27,7 @@ LIB = $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
ifndef CONFIG_SPL_BUILD
-COBJS-y+= timer.o
COBJS-y+= sromc.o
-COBJS-$(CONFIG_PWM)+= pwm.o
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c
b/arch/arm/cpu/armv7/s5p-common/pwm.c
deleted file mode 100644
index 6f401b8..000
--- a/arch/arm/cpu/armv7/s5p-common/pwm.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * Copyright (C) 2011 Samsung Electronics
- *
- * Donghwa Lee dh09@samsung.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include common.h
-#include errno.h
-#include pwm.h
-#include asm/io.h
-#include asm/arch/pwm.h
-#include asm/arch/clk.h
-
-int pwm_enable(int pwm_id)
-{
- const struct s5p_timer *pwm =
- (struct s5p_timer *)samsung_get_base_timer();
- unsigned long tcon;
-
- tcon = readl(pwm-tcon);
- tcon |= TCON_START(pwm_id);
-
- writel(tcon, pwm-tcon);
-
- return 0;
-}
-
-void pwm_disable(int pwm_id)
-{
- const struct s5p_timer *pwm =
- (struct s5p_timer *)samsung_get_base_timer();
- unsigned long tcon;
-
- tcon = readl(pwm-tcon);
- tcon = ~TCON_START(pwm_id);
-
- writel(tcon, pwm-tcon);
-}
-
-static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
-{
- unsigned long tin_parent_rate;
- unsigned int div;
-
- tin_parent_rate = get_pwm_clk();
-
- for (div = 2; div = 16; div *= 2) {
- if ((tin_parent_rate / (div 16)) freq)
- return tin_parent_rate / div;
- }
-
- return tin_parent_rate / 16;
-}
-
-#define NS_IN_SEC 10UL
-
-int pwm_config(int pwm_id, int duty_ns, int period_ns)
-{
- const struct s5p_timer *pwm =
-
Re: [U-Boot] [PATCH 2/7 v9] powerpc: mpc85xx: Support booting from SD Card with SPL
Dear ying.zh...@freescale.com, In message 1374571024-15729-2-git-send-email-ying.zh...@freescale.com you wrote: From: Ying Zhang b40...@freescale.com This patch introduces SPL to enable a loader stub that being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang b40...@freescale.com So we have reached patch version 9 already, and you still submit code that is not checkpatch clean? Please explain how this is possible. This patch gives: WARNING: Avoid unnecessary line continuations #387: FILE: drivers/mmc/fsl_esdhc_spl.c:71: + err = mmc-block_dev.block_read(0, CONFIG_CFG_DATA_SECTOR, \ Please fix. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It follows that any commander in chief who undertakes to carry out a plan which he considers defective is at fault; he must put forth his reasons, insist of the plan being changed, and finally tender his resignation rather than be the instrument of his army's downfall. - Napoleon, Military Maxims and Thought ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7 v9] powerpc : spi flash : Support to start from eSPI with SPL
Dear ying.zh...@freescale.com, In message 1374571024-15729-4-git-send-email-ying.zh...@freescale.com you wrote: From: Ying Zhang b40...@freescale.com This patch introduces SPL to enable a loader stub that being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang b40...@freescale.com Please fix: WARNING: Avoid unnecessary line continuations #225: FILE: drivers/mtd/spi/fsl_espi_spl.c:59: + spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR, \ WARNING: Avoid unnecessary line continuations #235: FILE: drivers/mtd/spi/fsl_espi_spl.c:69: + spi_flash_read(flash, offset, code_len, \ WARNING: Avoid unnecessary line continuations #240: FILE: drivers/mtd/spi/fsl_espi_spl.c:74: + flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, \ CHECK: No space is necessary after a cast #242: FILE: drivers/mtd/spi/fsl_espi_spl.c:76: + code_len); + uboot = (void *) CONFIG_SYS_SPI_FLASH_U_BOOT_START; Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Every revolutionary idea - in science, politics, art, or whatever - evokes three stages of reaction in a hearer: 1. It is completely impossible - don't waste my time. 2. It is possible, but it is not worth doing. 3. I said it was a good idea all along. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/7 v9] NAND: TPL : introduce the TPL based on the SPL
Dear ying.zh...@freescale.com, In message 1374571024-15729-6-git-send-email-ying.zh...@freescale.com you wrote: From: Ying Zhang b40...@freescale.com Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can not be more than 4K. So, the SPL cannot initialize the DDR with the SPD code. This patch introduces TPL to enable a loader stub that is loaded by the code from the SPL. It initializes the DDR with the SPD or other operations. The TPL's size is sizeable, the maximum size is decided by the memory's size that TPL runs. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are three stage uboot images: * spl_boot, * tpl_boot, * final uboot image This patch is on top of the patch: SPL: Makefile: Build a separate autoconf.mk for SPL Signed-off-by: Ying Zhang b40...@freescale.com ERROR: trailing whitespace #470: FILE: doc/README.TPL:35: +board config file. $ CHECK: Alignment should match open parenthesis #515: FILE: drivers/mtd/nand/fsl_elbc_spl.c:146: + nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS, + CONFIG_SYS_NAND_U_BOOT_SIZE, ERROR: code indent should use tabs where possible #525: FILE: drivers/mtd/nand/fsl_elbc_spl.c:156: +nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,$ WARNING: please, no spaces at the start of a line #525: FILE: drivers/mtd/nand/fsl_elbc_spl.c:156: +nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,$ ERROR: code indent should use tabs where possible #534: FILE: drivers/mtd/nand/fsl_elbc_spl.c:165: +nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,$ WARNING: please, no spaces at the start of a line #534: FILE: drivers/mtd/nand/fsl_elbc_spl.c:165: +nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,$ total: 3 errors, 2 warnings, 1 checks, 409 lines checked Please fix at least the errors and warnings. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de But the only way of discovering the limits of the possible is to venture a little way past them into the impossible. - _Profiles of the Future_ (1962; rev. 1973) ``Hazards of Prophecy: The Failure of Imagination'' ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7 v9] powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL
Dear ying.zh...@freescale.com, In message 1374571024-15729-3-git-send-email-ying.zh...@freescale.com you wrote: From: Ying Zhang b40...@freescale.com Enable p1022ds to start from eSDHC with SPL. Signed-off-by: Ying Zhang b40...@freescale.com Please fix at least the warning: #243: FILE: board/freescale/p1022ds/spl.c:54: + setbits_be32(gur-pmuxcr, + in_be32(gur-pmuxcr) | MPC85xx_PMUXCR_SD_DATA); CHECK: Alignment should match open parenthesis #255: FILE: board/freescale/p1022ds/spl.c:66: + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); CHECK: Alignment should match open parenthesis #265: FILE: board/freescale/p1022ds/spl.c:76: + relocate_code(CONFIG_SPL_RELOC_STACK, 0, + CONFIG_SPL_RELOC_TEXT_BASE); WARNING: Avoid unnecessary line continuations #283: FILE: board/freescale/p1022ds/spl.c:94: + mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, \ CHECK: Alignment should match open parenthesis #322: FILE: board/freescale/p1022ds/tlb.c:100: + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Brain off-line, please wait. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ANN] U-Boot v2013.07 released
Dear Tom, In message 20130722202058.GA19104@bill-the-cat you wrote: I'm pleased to announce that v2013.07 has been tagged and pushed out, and will be available shortly in the usual places. Thanks again for the great job you are doing here. The u-boot-v2013.07 tarball is now also available on the FTP server, and the release statistics have been updated on the U-Boot web site (see [1]). [1] http://www.denx.de/wiki/U-Boot/UbootStat_2013_07 Here a shortened summary: Processed 948 csets from 161 developers 27 employers found A total of 68587 lines added, 37600 removed (delta 30987) Compare v2013.04: * Processed 980 csets from 135 developers * 25 employers found * A total of 78060 lines added, 44127 removed (delta 33933) Developers with the most changesets Simon Glass136 (14.3%) Fabio Estevam 42 (4.4%) Benoît Thébaudeau 41 (4.3%) Jagannadha Sutradharudu Teki 31 (3.3%) Michal Simek29 (3.1%) Tom Rini28 (3.0%) York Sun27 (2.8%) Marek Vasut 23 (2.4%) Otavio Salvador 19 (2.0%) Stephen Warren 19 (2.0%) ... Developers with the most changed lines Simon Glass 10863 (11.8%) Wolfgang Denk 9734 (10.6%) Benoît Thébaudeau 5767 (6.3%) Hung-ying Tyan4447 (4.9%) Tom Rini 3641 (4.0%) Dirk Eibach 2839 (3.1%) Mike Dunn 2776 (3.0%) Kuo-Jung Su 2696 (2.9%) Sergey Lapin 2210 (2.4%) Alison Wang 2052 (2.2%) ... Developers with the most lines removed Wolfgang Denk 8294 (22.1%) Tom Rini 3382 (9.0%) Albert ARIBAUD 851 (2.3%) Rajeshwari Shinde 763 (2.0%) Daniel Schwierzeck 144 (0.4%) Inderpal Singh 104 (0.3%) Scott Jiang 96 (0.3%) Andreas Bießmann 46 (0.1%) Michael Trimarchi 24 (0.1%) Ruchika Gupta 17 (0.0%) ... Developers with the most signoffs (total 340) Andy Fleming 135 (39.7%) Minkyu Kang 38 (11.2%) Simon Glass 19 (5.6%) Andreas Bießmann 14 (4.1%) Tom Warren 11 (3.2%) Tom Rini 9 (2.6%) Kyungmin Park8 (2.4%) Sonic Zhang 8 (2.4%) Lokesh Vutla 6 (1.8%) Randall Spangler 5 (1.5%) ... Developers with the most reviews (total 142) Tom Rini40 (28.2%) Marek Vasut 19 (13.4%) Simon Glass 17 (12.0%) Benoît Thébaudeau 16 (11.3%) Jagannadha Sutradharudu Teki 10 (7.0%) Joe Hershberger 8 (5.6%) Vadim Bendebury 5 (3.5%) Otavio Salvador 3 (2.1%) Stephen Warren 3 (2.1%) Peter Korsgaard 3 (2.1%) ... Developers with the most test credits (total 64) Simon Glass 11 (17.2%) Lubomir Popov 11 (17.2%) Jeroen Hofstee 6 (9.4%) Stephen Warren 5 (7.8%) Fabio Estevam4 (6.2%) Vincent Palatin 3 (4.7%) Tom Rini 2 (3.1%) Marek Vasut 2 (3.1%) Tom Wai-Hong Tam 2 (3.1%) Lukasz Majewski 2 (3.1%) ... Developers who gave the most tested-by credits (total 64) Albert ARIBAUD 16 (25.0%) Vincent Palatin 4 (6.2%) Otavio Salvador 4 (6.2%) Simon Glass 3 (4.7%) Marek Vasut 3 (4.7%) Axel Lin 3 (4.7%) Hung-ying Tyan 3 (4.7%) Fabio Estevam2 (3.1%) Andreas Bießmann2 (3.1%) Rajeshwari Shinde2 (3.1%) ... Developers with the most report credits (total 11) Albert ARIBAUD 1 (9.1%) Lubomir Popov1 (9.1%) Tom Rini 1 (9.1%) Dirk Behme 1 (9.1%) Heinz Wrobel 1 (9.1%) Jason Liu1 (9.1%) Ruchika Kharwar 1 (9.1%) John Traill 1 (9.1%) John Williams1 (9.1%) Tapani Utriainen 1 (9.1%) Dan Murphy 1 (9.1%) Developers who gave the most report credits (total 11) Fabio Estevam3 (27.3%) Dan Murphy 1 (9.1%) Marek Vasut 1 (9.1%) Andrew Gabbasov 1 (9.1%) Michal Simek 1 (9.1%) Lokesh Vutla 1 (9.1%) Roy Zang 1 (9.1%) Mark Jackson 1 (9.1%) Nishanth Menon 1 (9.1%) Top changeset contributors by employer (Unknown) 173 (18.2%) Freescale 172 (18.1%) Google, Inc. 148 (15.6%) Texas Instruments 80 (8.4%) DENX Software Engineering 78 (8.2%) Samsung 57 (6.0%) Xilinx 54 (5.7%) ADVANSEE41 (4.3%) NVidia
[U-Boot] [PATCH v2] imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
A little background is probably appropriate for this patch.
Since the beginning of usage of the SABRE Lite and Nitrogen6x
boards, DVI detection has been somewhat broken.
Some (most) DVI monitors don't produce the HPD bit in
the PHY_STAT0 register, but do show proper toggling of the
RX_SENSE0..3 bits.
Creating a new the bit-mask to include all five bits and
modifying the 'hdmidet' command and internal detection
routines allows these monitors to function properly in U-Boot.
A related patch to our kernels allows things to work under
Linux:
https://github.com/boundarydevices/linux-imx6/commit/7d8752905c118af9063738a533227de0b2f6ecd4
Signed-off-by: Robert Winkler robert.wink...@boundarydevices.com
---
Change from v1:
- Use Eric Nelson's description as commit message
arch/arm/imx-common/cmd_hdmidet.c | 3 +--
arch/arm/include/asm/arch-mx6/mxc_hdmi.h | 3 +++
board/boundary/nitrogen6x/nitrogen6x.c| 2 +-
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 2 +-
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/imx-common/cmd_hdmidet.c
b/arch/arm/imx-common/cmd_hdmidet.c
index 794bf50..ce0b26e 100644
--- a/arch/arm/imx-common/cmd_hdmidet.c
+++ b/arch/arm/imx-common/cmd_hdmidet.c
@@ -27,8 +27,7 @@
static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- u8 reg = readb(hdmi-phy_stat0) HDMI_PHY_HPD;
- return (regHDMI_PHY_HPD) ? 0 : 1;
+ return (readb(hdmi-phy_stat0) HDMI_DVI_STAT) ? 0 : 1;
}
U_BOOT_CMD(hdmidet, 1, 1, do_hdmidet,
diff --git a/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
b/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
index 9dccb3f..1b55b05 100644
--- a/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
+++ b/arch/arm/include/asm/arch-mx6/mxc_hdmi.h
@@ -896,6 +896,9 @@ enum {
HDMI_PHY_HPD = 0x02,
HDMI_PHY_TX_PHY_LOCK = 0x01,
+/* Convenience macro RX_SENSE | HPD */
+ HDMI_DVI_STAT = 0xF2,
+
/* PHY_I2CM_SLAVE_ADDR field values */
HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
b/board/boundary/nitrogen6x/nitrogen6x.c
index 8f0f9b8..bb09a6a 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -477,7 +477,7 @@ struct display_info_t {
static int detect_hdmi(struct display_info_t const *dev)
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- return readb(hdmi-phy_stat0) HDMI_PHY_HPD;
+ return readb(hdmi-phy_stat0) HDMI_DVI_STAT;
}
static void enable_hdmi(struct display_info_t const *dev)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 862bc30..559b082 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -449,7 +449,7 @@ struct display_info_t {
static int detect_hdmi(struct display_info_t const *dev)
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- return readb(hdmi-phy_stat0) HDMI_PHY_HPD;
+ return readb(hdmi-phy_stat0) HDMI_DVI_STAT;
}
static void enable_hdmi(struct display_info_t const *dev)
--
1.8.3.2
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[U-Boot] [PATCH] net, phy, cpsw: fix gigabit register access
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Joe Hershberger joe.hershber...@gmail.com
---
drivers/net/cpsw.c| 2 +-
drivers/net/phy/phy.c | 6 +-
2 Dateien geändert, 6 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 379b679..52c08ed 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -489,7 +489,7 @@ static inline void wait_for_idle(void)
static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,
int dev_addr, int phy_reg)
{
- unsigned short data;
+ int data;
u32 reg;
if (phy_reg ~PHY_REG_MASK || phy_id ~PHY_ID_MASK)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index effe3e3..2fdccb8 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -291,7 +291,7 @@ int genphy_parse_link(struct phy_device *phydev)
/* We're using autonegotiation */
if (mii_reg BMSR_ANEGCAPABLE) {
u32 lpa = 0;
- u32 gblpa = 0;
+ int gblpa = 0;
u32 estatus = 0;
/* Check for gigabit capability */
@@ -300,6 +300,10 @@ int genphy_parse_link(struct phy_device *phydev)
* both PHYs in the link
*/
gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
+ if (gblpa 0) {
+ debug(Could not read MII_STAT1000. Ignoring
gigabit capability\n);
+ gblpa = 0;
+ }
gblpa = phy_read(phydev,
MDIO_DEVAD_NONE, MII_CTRL1000) 2;
}
--
1.7.11.7
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[U-Boot] Fwd: [i2c] Pull request
Hello, forgot to add the U-Boot mailinglist to Cc: ... Original-Nachricht Betreff: [U-Boot] [i2c] Pull request Datum: Tue, 23 Jul 2013 14:54:39 +0200 Von: Heiko Schocher h...@denx.de Antwort an: h...@denx.de Organisation: DENX Software Engineering An: Tom Rini tr...@ti.com Kopie (CC): Brunck, Holger holger.bru...@keymile.com, Kuo-Jung Su dant...@faraday-tech.com, Simon Glass s...@chromium.org, Naveen Krishna Chatradhi ch.nav...@samsung.com, Dirk Eibach dirk.eib...@gdsys.cc, Axel Lin axel@ingics.com, Alison Wang b18...@freescale.com Hello Tom, please pull from u-boot-i2c, thanks! This tree compiles clean for arm and powerpc with eldk-5.3. The following changes since commit 50ffc3b64aa3c8113f0a9fc31ea96e596d60054a: fs/ext4: fix log2blksz un-initialized error, by cacaulating its value from blksz (2013-07-22 10:09:56 -0400) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to ecbd7e1ec7280d90d151a99691f74b892588cadd: fdtdec: Add compatible string for High speed i2c (2013-07-23 08:34:58 +0200) Alison Wang (2): vf610: Add I2C support for Vybrid VF610 platform I2C: mxc_i2c: Add support for Vybrid VF610 platform Axel Lin (1): cmd_i2c: Use ARRAY_SIZE instead of reinventing it Dirk Eibach (1): i2c, ppc4xx_i2c: switch to new multibus/multiadapter support Heiko Schocher (6): i2c: add i2c_core and prepare for new multibus support i2c: common changes for multibus/multiadapter support i2c, soft-i2c: switch to new multibus/multiadapter support i2c, fsl_i2c: switch to new multibus/multiadapter support i2c, multibus: get rid of CONFIG_I2C_MUX i2c, multibus, keymile: get rid of EEprom_ivm envvariable Holger Brunck (1): arm/km: fix u-boot update functionality Kuo-Jung Su (1): i2c: add Faraday FTI2C010 I2C controller support Simon Glass (2): tegra: i2c: Add function to know about current bus tegra: i2c: Enable new CONFIG_SYS_I2C framework naveen krishna chatradhi (1): fdtdec: Add compatible string for High speed i2c README| 175 +--- arch/arm/cpu/armv7/vf610/generic.c| 7 +++ arch/arm/include/asm/arch-kirkwood/config.h | 2 +- arch/arm/include/asm/arch-vf610/clock.h | 1 + arch/arm/include/asm/arch-vf610/crm_regs.h| 1 + arch/arm/include/asm/arch-vf610/imx-regs.h| 1 + arch/arm/include/asm/arch-vf610/iomux-vf610.h | 4 ++ arch/arm/lib/board.c | 10 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/cpu/mcf5227x/cpu_init.c | 2 +- arch/m68k/cpu/mcf5227x/speed.c| 2 +- arch/m68k/cpu/mcf523x/cpu_init.c | 2 +- arch/m68k/cpu/mcf523x/speed.c | 2 +- arch/m68k/cpu/mcf52x2/cpu_init.c | 4 +- arch/m68k/cpu/mcf52x2/speed.c | 4 +- arch/m68k/cpu/mcf532x/cpu_init.c | 4 +- arch/m68k/cpu/mcf532x/speed.c | 2 +- arch/m68k/cpu/mcf5445x/cpu_init.c | 2 +- arch/m68k/cpu/mcf5445x/speed.c| 4 +- arch/m68k/cpu/mcf547x_8x/cpu_init.c | 2 +- arch/m68k/cpu/mcf547x_8x/speed.c | 2 +- arch/m68k/include/asm/global_data.h | 2 +- arch/m68k/lib/board.c | 15 - arch/nds32/lib/board.c| 10 ++- arch/powerpc/cpu/mpc8260/i2c.c| 14 - arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c | 6 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c | 6 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c| 3 +- arch/powerpc/cpu/ppc4xx/cmd_chip_config.c | 2 +- arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c | 3 +- arch/powerpc/include/asm/ppc4xx-i2c.h | 18 -- arch/powerpc/lib/board.c | 11 ++-- board/BuS/eb_cpux9k2/cpux9k2.c| 2 +- board/BuS/vl_ma2sc/vl_ma2sc.c | 2 +- board/atc/atc.c | 2 +- board/bluewater/snapper9260/snapper9260.c | 2 +- board/cm5200/cm5200.c | 4 +- board/cpu86/cpu86.c | 2 +- board/cpu87/cpu87.c | 2 +- board/csb272/csb272.c | 2 +- board/emk/top9000/top9000.c | 8 +-- board/esd/du440/du440.c | 2 - board/esd/vme8349/vme8349.c | 6 +- board/eukrea/cpuat91/cpuat91.c| 2 +- board/freescale/m52277evb/README | 4 +- board/freescale/m53017evb/README | 4 +- board/freescale/m5373evb/README | 4 +- board/freescale/m54455evb/README |
Re: [U-Boot] [PATCH] imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
Hi Fabio, On 07/23/2013 02:46 PM, Fabio Estevam wrote: Hi Eric, On Tue, Jul 23, 2013 at 6:43 PM, Eric Nelson eric.nel...@boundarydevices.com wrote: A little background is probably appropriate for this patch. Since the beginning of usage of the SABRE Lite and Nitrogen6x boards, DVI detection has been somewhat broken. Some (most) DVI monitors don't produce the HPD bit in the PHY_STAT0 register, but do show proper toggling of the RX_SENSE0..3 bits. Creating a new the bit-mask to include all five bits and modifying the 'hdmidet' command and internal detection routines allows these monitors to function properly in U-Boot. A related patch to our kernels allows things to work under Linux: https://github.com/boundarydevices/linux-imx6/commit/7d8752905c118af9063738a533227de0b2f6ecd4 Thanks for the excellent explanation and for finding the root cause! It would be really nice if Robert could send a v2 adding your text into the commit log. Seems to be already done. Also note that this patch will be smaller with a V3 of your patch collapsing SABRE Lite into the nitrogen6x/ tree (nudge nudge)... Regards, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv2 5/8] drivers: mtd: spi: Modify read/write command for sfl256s flash.
+ jagan,
On Tuesday 23 July 2013 02:29 PM, Sourav Poddar wrote:
Reading using the already supported read command is causing regression
after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
---
drivers/mtd/spi/spi_flash.c | 32 +++-
1 files changed, 31 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 6a6fe37..5f8db7b 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
else
read_len = remain_len;
+#ifdef CONFIG_TI_QSPI
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ for (actual = 0; actual read_len; actual += chunk_len) {
+ chunk_len = min(read_len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+ data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
+
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
+#else
spi_flash_addr(offset, cmd);
ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
debug(SF: read failed\n);
break;
}
-
+#endif
offset += read_len;
len -= read_len;
data += read_len;
Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..
As soon as the words transfered is 4096 bytes, the CS gets deasserted
automatically.
As a result of this bottleneck, I am not able to use the current use
read api in mtd framework.
This requires me to send the read command every time in range upto 4096
bytes only.
To overcome this, I have updated the mtd read based on TI_QSPI config as
done above.
[Jagan]:
Do you have any suggestion of dealing this in a better way?
I don't see a way to get around this apart from updating mtd read
depending on TI_QSPI config.
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Re: [U-Boot] [PATCHv2 5/8] drivers: mtd: spi: Modify read/write command for sfl256s flash.
On Tuesday 23 July 2013 08:00 PM, Felipe Balbi wrote: Hi, On Tue, Jul 23, 2013 at 07:53:06PM +0530, Sourav Poddar wrote: @@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, debug(SF: read failed\n); break; } - +#endif offset += read_len; len -= read_len; data += read_len; Elaborating a bit more on this, There is a constrain on our hardware, which goes like this.. As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically. constraint is 4096 *words*. If you're using anything other than 8-bits per word, your statement doesn't make sense. Yes, sorry. Its 4096 words. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net, phy, cpsw: fix gigabit register access
On Tue, Jul 23, 2013 at 8:32 AM, Heiko Schocher h...@denx.de wrote:
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Joe Hershberger joe.hershber...@gmail.com
---
drivers/net/cpsw.c| 2 +-
drivers/net/phy/phy.c | 6 +-
2 Dateien geändert, 6 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 379b679..52c08ed 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -489,7 +489,7 @@ static inline void wait_for_idle(void)
static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,
int dev_addr, int phy_reg)
{
- unsigned short data;
+ int data;
How is this change related to the substance of the patch?
u32 reg;
if (phy_reg ~PHY_REG_MASK || phy_id ~PHY_ID_MASK)
Seems OK otherwise.
-Joe
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Re: [U-Boot] [PATCHv2 5/8] drivers: mtd: spi: Modify read/write command for sfl256s flash.
Hi, On Tue, Jul 23, 2013 at 07:53:06PM +0530, Sourav Poddar wrote: @@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, debug(SF: read failed\n); break; } - +#endif offset += read_len; len -= read_len; data += read_len; Elaborating a bit more on this, There is a constrain on our hardware, which goes like this.. As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically. constraint is 4096 *words*. If you're using anything other than 8-bits per word, your statement doesn't make sense. -- balbi signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] ddr cfg: DRAM_RESET needs 0x00020030
On 17.07.2013 21:46, Troy Kisky wrote: The old value of 0x000e0030 will cause ethernet timeout issues on the sabrelite and possibly other boards using the KSZ9021. I have no explanation as to why. But this is a correct change, the TRM will be updated to show that 00b is the only valid setting for bits 19-18 of DRAM_RESET. My thanks go to Liu Hui(Jason) for this information. Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com Acked-by: Dirk Behme dirk.be...@de.bosch.com Thanks Dirk --- board/boundary/nitrogen6x/ddr-setup.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/boundary/nitrogen6x/ddr-setup.cfg b/board/boundary/nitrogen6x/ddr-setup.cfg index c315812..e5f8add 100644 --- a/board/boundary/nitrogen6x/ddr-setup.cfg +++ b/board/boundary/nitrogen6x/ddr-setup.cfg @@ -74,7 +74,7 @@ DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 -DATA 4, MX6_IOM_DRAM_RESET, 0x000e0030 +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 DATA 4, MX6_IOM_DRAM_SDCKE0, 0x3000 DATA 4, MX6_IOM_DRAM_SDCKE1, 0x3000 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ext4fs: le32_to_cpu() used on a 16-bit field
On Sun, 21 Jul 2013 10:53:25 +0200 Andreas Bießmann
andreas.de...@googlemail.com wrote,
Hi Andreas,
From: Rommel Custodio sessyargc+ub...@gmail.com
Fix reading ext4_extent_header struture on BE machines.
Some 16 bit fields where converted to 32 bit fields, due to the byte
swap on BE machines the containing value was corrupted. Therefore
reading ext4 filesystems on BE machines where broken before.
Signed-off-by: Rommel Custodio sessyargc+ub...@gmail.com
[sent via git-send-email; rework commit message]
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
fs/ext4/ext4_common.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 2776293..ff9c4ec 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -1432,7 +1432,7 @@ static struct ext4_extent_header
*ext4fs_get_extent_block while (1) {
index = (struct ext4_extent_idx *)(ext_block + 1);
- if (le32_to_cpu(ext_block-eh_magic) !=
EXT4_EXT_MAGIC)
+ if (le16_to_cpu(ext_block-eh_magic) !=
EXT4_EXT_MAGIC) return 0;
if (ext_block-eh_depth == 0)
@@ -1440,14 +1440,14 @@ static struct ext4_extent_header
*ext4fs_get_extent_block i = -1;
do {
i++;
- if (i = le32_to_cpu(ext_block-eh_entries))
+ if (i = le16_to_cpu(ext_block-eh_entries))
break;
} while (fileblock le32_to_cpu(index[i].ei_block));
if (--i 0)
return 0;
- block = le32_to_cpu(index[i].ei_leaf_hi);
+ block = le16_to_cpu(index[i].ei_leaf_hi);
block = (block 32) +
le32_to_cpu(index[i].ei_leaf_lo);
if (ext4fs_devread((lbaint_t)block log2_blksz, 0,
fs-blksz, @@ -1548,17 +1548,17 @@ long int
read_allocated_block(struct ext2_inode *inode, int fileblock)
do {
i++;
- if (i = le32_to_cpu(ext_block-eh_entries))
+ if (i = le16_to_cpu(ext_block-eh_entries))
break;
} while (fileblock =
le32_to_cpu(extent[i].ee_block)); if (--i = 0) {
fileblock -= le32_to_cpu(extent[i].ee_block);
- if (fileblock =
le32_to_cpu(extent[i].ee_len)) {
+ if (fileblock =
le16_to_cpu(extent[i].ee_len)) { free(buf);
return 0;
}
- start = le32_to_cpu(extent[i].ee_start_hi);
+ start = le16_to_cpu(extent[i].ee_start_hi);
start = (start 32) +
le32_to_cpu(extent[i].ee_start_lo);
free(buf);
I've tested this patch at LE Samsung Trats board. The code worked as
before (ext4ls, ext4load, ext4write) - also taking into account
limitation of our platform.
Tested-by: Lukasz Majewski l.majew...@samsung.com
However, we will not run out from refactoring this code.
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [Ac100] [PATCH 3/3] ARM: tegra: paz00: enable nveckeyboardsupport
On 07/22/2013 01:09 AM, Marc Dietrich wrote:
Am Samstag, 20. Juli 2013, 21:20:52 schrieb Stephen Warren:
On 07/20/2013 03:12 AM, Marc Dietrich wrote:
On Friday 19 July 2013 13:14:13 Stephen Warren wrote:
...
Let's skip how this may actually look like in software. Given the
discussions we had in the past, I propose the following binding:
i2c-slave@7000c500 {
#address-cells = 1;
#size-cells = 0;
nvec {
Above, it says #address-cells=1, which means this node needs a reg
property. Perhaps slave-addr should be part of the child nodes (and the
Tegra I2C controller binding would limit itself to supporting only a
single node), so that the same binding style could be applicable to I2C
slave devices that support multiple slave addresses.
you mean
nvec@87 {
reg = 0x87;
...
} ?
Yes.
I think that's ok. Didn't know that Tegra can support multiple slave
addresses. To make the binding as general as possible, we could support multi-
slave for the binding, but only support single slave in the code for now.
Tegra can't, but that doesn't mean some future Tegra or some other SoC
can't/won't. Putting the slave address inside the child node makes sure
the same DT schema will work in other situations, and hence be consistent.
I guess that also warrants a simple-bus compatibility in the i2c-slave node.
compatible = nvidia,nvec, simple-bus;
protocol = smbus-request-gpio;
What is that property for; doesn't compatible=nvidia,nvec already
imply this, or does the NVEC spec define multiple different protocols?
The GPIO is optional, but SMBUS is required. Maybe to support master
initiated
communications only. To get rid of the ugly protocol property, we could just
check if a valid gpio is given. I think that's what the downstream kernel
also
does.
Yes, I believe nvidia,nvec implies everything about the protocol then,
except for the optional GPIO which can be checked directly.
The nvec still needs to tell the slave driver which protocol to use, but
that can be hard coded.
I'm not sure what that means. At the controller/HW level, aren't I2C and
SMBUS the same; it's just the data within the transactions that may be
more defined by one or the other?
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Re: [U-Boot] [PATCH 1/1] net: phy/realtek: Add support for RTL8211DN and RTL8211E phy modules
On Tue, Jul 23, 2013 at 3:30 AM, Sharma Bhupesh-B45370 b45...@freescale.com wrote: Hi Andy, Joe, This patch adds support for Realtek PHY modules RTL8211DN and RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG), which can be found on Freescale's T1040RDB boards. To make the driver more generic across 8211 family, a generic name 8211x is added for macros and function names. Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com Can you please review this patch and let me know if these changes seem suitable to you. Thanks for your help. Regards, Bhupesh Looks fine to me. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
On Tue, Jul 23, 2013 at 7:07 PM, Robert Winkler
robert.wink...@boundarydevices.com wrote:
--- a/arch/arm/imx-common/cmd_hdmidet.c
+++ b/arch/arm/imx-common/cmd_hdmidet.c
@@ -27,8 +27,7 @@
static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
{
struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
- u8 reg = readb(hdmi-phy_stat0) HDMI_PHY_HPD;
- return (regHDMI_PHY_HPD) ? 0 : 1;
+ return (readb(hdmi-phy_stat0) HDMI_DVI_STAT) ? 0 : 1;
}
Does this depends on other boards to do similar commit in their kernel trees?
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://projetos.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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[U-Boot] [GIT PULL] u-boot-mips/master
Hi Tom, The following changes since commit 62c175fbb8a0f9a926c88294ea9f7e88eb898f6c: Prepare v2013.07 (2013-07-23 07:58:13 -0400) are available in the git repository at: git://git.denx.de/u-boot-mips.git master for you to fetch changes up to ef422fdc0e1684f4809e28ecbedaa922b7b50af5: MIPS: mips32/cache.S: use v1 register for indirect function calls (2013-07-24 00:20:07 +0200) Gabor Juhos (24): MIPS: mips64: fix typos in copyright text of start.S net: pcnet: use pci_virt_to_mem to obtain buffer addresses MIPS: import gt64120.h header from Linux MIPS: start.S: emulate REVISION register for qemu-malta MIPS: qemu-malta: add support for emulated MIPS Malta board MIPS: qemu-malta: add reset support MIPS: qemu-malta: enable flash support MIPS: qemu-malta: setup GT64120 registers as done by YAMON MIPS: qemu-malta: add PCI support MIPS: qemu-malta: bring up ethernet MIPS: mips32/time.c: fix checkpatch errors/warnings MIPS: mips64/interrupt.c: remove superfluous include MIPS: remove obsolete TODO items MIPS: mips32/cache.S: remove superfluous register assignment MIPS: mips32/start.S: use t8 register for dynamic relocation MIPS: mips32/start.S: rework relocation info check MIPS: xburst/start.S: save relocation address in s2 register MIPS: xburst/start.S: save relocation offset in s1 register MIPS: xburst/start.S: save gd in s0 register MIPS: xburst/start.S: use t8 register for dynamic relocation MIPS: xburst/start.S: rework relocation info check MIPS: mips32/cache.S: save return address in t9 register MIPS: mips32/cache.S: store cache line size in t8 register MIPS: mips32/cache.S: use v1 register for indirect function calls arch/mips/cpu/mips32/cache.S | 17 ++-- arch/mips/cpu/mips32/start.S | 32 +--- arch/mips/cpu/mips32/time.c | 5 +- arch/mips/cpu/mips64/interrupts.c | 1 - arch/mips/cpu/mips64/start.S | 6 +- arch/mips/cpu/xburst/start.S | 41 +- arch/mips/include/asm/malta.h | 23 ++ board/qemu-malta/Makefile | 45 +++ board/qemu-malta/lowlevel_init.S | 71 + board/qemu-malta/qemu-malta.c | 49 boards.cfg| 2 + doc/README.mips | 4 - drivers/net/pcnet.c | 2 +- drivers/pci/Makefile | 1 + drivers/pci/pci_gt64120.c | 178 + include/configs/qemu-malta.h | 116 +++ include/gt64120.h | 550 +++ include/pci_gt64120.h | 19 + 18 files changed, 1110 insertions(+), 52 deletions(-) create mode 100644 arch/mips/include/asm/malta.h create mode 100644 board/qemu-malta/Makefile create mode 100644 board/qemu-malta/lowlevel_init.S create mode 100644 board/qemu-malta/qemu-malta.c create mode 100644 drivers/pci/pci_gt64120.c create mode 100644 include/configs/qemu-malta.h create mode 100644 include/gt64120.h create mode 100644 include/pci_gt64120.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
