Re: [U-Boot] Can a standalone application send data via Ethernet in U-Boot?
Dear Wolfgang, Can I use tsec_miiphy_write () function which is defined in drivers/net/tsec.c for sending the data from standalone application via Ethernet. I am trying to export this function and use it. The files I edited for exporting are: "include/exports.h", "include/_exports.h", "common/exports.c". At jumptable_init () function in common/exports.c, I am giving the following line: gd->jt[XF_tsec_miiphy_write] = tsec_miiphy_write. But the *error* I am getting is: common/libcommon.a(exports.o):(.got2+0x0): undefined reference to 'tsec_miiphy_write'. Note: Is this error coming because the function is static? If so, how to export and use them in standalone application of U-Boot? -- View this message in context: http://u-boot.10912.n7.nabble.com/Can-a-standalone-application-send-data-via-Ethernet-in-U-Boot-tp165775p166076.html Sent from the U-Boot mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 4/4] arm: rmobile: armadillo-800eva: Change clock definition of SCIF and TMU
On Mon, Sep 30, 2013 at 10:30:41AM +0900, Nobuhiro Iwamatsu wrote: > This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to > CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ > to > CONFIG_SH_TMU_CLK_FREQ, > > Signed-off-by: Nobuhiro Iwamatsu > CC: Nobuhiro Iwamatsu > CC: Albert Aribaud Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [i2c] Pull request
On Thu, Oct 17, 2013 at 08:48:50AM +0200, Heiko Schocher wrote: > Hello Tom, > > please pull from u-boot-i2c.git: > > The following changes since commit 183acb700378a8cfc5d50a01a65de93fb2c24586: > > Prepare v2013.10 (2013-10-16 13:08:12 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-i2c.git master > > for you to fetch changes up to 9a2a73d29fa395f42f3fb477ac99dda4d7f2f21f: > > i2c: eliminate warnings in i2c_reloc_fixup function (2013-10-17 07:24:41 > +0200) > > > Heiko Schocher (1): > i2c, core: optimze i2c_set_bus_num() > > Jens Scharsig (BuS Elektronik) (1): > Fix: nommu I2C adapter relocation error > > Masahiro Yamada (1): > i2c: eliminate warnings in i2c_reloc_fixup function > > Michael Burr (1): > i2c: Zynq: Support for TI PCA9548 bus multiplexer > > Naveen Krishna Ch (2): > exynos: i2c: Fix i2c driver to handle NACKs properly > i2c: s3c24xx: add hsi2c controller support > > Nobuhiro Iwamatsu (3): > i2c: Add support for Renesas rcar > i2c: sh_i2c: Avoid using I2C prior to relocation > README: I2C: Fix indent > > Simon Glass (1): > exynos: i2c: Change FDT bus setup code to enumerate ports correctly > > trem (3): > i2c: fix init on generic board > i2c: mxc: move to new subsystem > i2c: update config using mxc driver to new subsystem > > README| 31 +- > arch/arm/cpu/armv7/mx5/clock.c| 2 +- > arch/arm/cpu/armv7/mx6/clock.c| 2 +- > arch/arm/imx-common/Makefile | 2 +- > common/board_f.c | 4 + > drivers/i2c/Makefile | 3 +- > drivers/i2c/i2c_core.c| 39 +++ > drivers/i2c/mxc_i2c.c | 137 +--- > drivers/i2c/rcar_i2c.c| 288 > +++ > drivers/i2c/s3c24x0_i2c.c | 835 > +- > drivers/i2c/s3c24x0_i2c.h | 38 +++ > drivers/i2c/sh_i2c.c | 10 +- > include/configs/apf27.h | 11 +- > include/configs/flea3.h | 9 +- > include/configs/imx31_phycore.h | 7 +- > include/configs/m53evk.h | 7 +- > include/configs/mx25pdk.h | 7 +- > include/configs/mx35pdk.h | 7 +- > include/configs/mx53ard.h | 7 +- > include/configs/mx53evk.h | 7 +- > include/configs/mx53loco.h| 7 +- > include/configs/mx53smd.h | 7 +- > include/configs/mx6qsabreauto.h | 4 +- > include/configs/nitrogen6x.h | 4 +- > include/configs/titanium.h| 4 +- > include/configs/vf610twr.h| 7 +- > include/configs/woodburn_common.h | 7 +- > include/i2c.h | 2 + > 28 files changed, 1187 insertions(+), 308 deletions(-) > create mode 100644 drivers/i2c/rcar_i2c.c Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-sh/master
On Thu, Oct 17, 2013 at 09:51:05AM +0900, Nobuhiro Iwamatsu wrote: > Hi Tom, > > Please pull u-boot-sh master branch. > > Best regards, > Nobuhiro > The following changes since commit 183acb700378a8cfc5d50a01a65de93fb2c24586: > > Prepare v2013.10 (2013-10-16 13:08:12 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-sh.git master > > for you to fetch changes up to 7f2013d47c8c62c2373cafe68d6ba4649099e49a: > > serial: sh: Add support R8A7791 (2013-10-17 09:43:36 +0900) > > > Nobuhiro Iwamatsu (8): > sh: timer: Mask bit of timer prescaler > sh: timer: Remove static global variable > sh: cache: Change cache API to defines as U-Boot > sh: timer: Change definition of clock of TMU > serial: sh: Change definition of clock of SCIF > sh: boards: Change clock definition of SCIF and TMU > serial: sh: Add support R8A7790 > serial: sh: Add support R8A7791 > > arch/sh/cpu/sh4/cache.c | 4 ++-- > arch/sh/cpu/sh4/cpu.c| 2 +- > arch/sh/include/asm/cache.h | 3 --- > arch/sh/lib/time.c | 10 ++ > drivers/serial/serial_sh.c | 5 - > drivers/serial/serial_sh.h | 13 + > include/configs/MigoR.h | 2 ++ > include/configs/ap325rxa.h | 2 ++ > include/configs/ap_sh4a_4a.h | 2 ++ > include/configs/ecovec.h | 2 ++ > include/configs/espt.h | 2 ++ > include/configs/mpr2.h | 2 ++ > include/configs/ms7720se.h | 2 ++ > include/configs/ms7722se.h | 2 ++ > include/configs/ms7750se.h | 2 ++ > include/configs/r0p7734.h| 2 ++ > include/configs/r2dplus.h| 2 ++ > include/configs/r7780mp.h| 2 ++ > include/configs/rsk7203.h| 2 ++ > include/configs/rsk7264.h| 2 ++ > include/configs/rsk7269.h| 2 ++ > include/configs/sh7752evb.h | 2 ++ > include/configs/sh7757lcr.h | 2 ++ > include/configs/sh7763rdp.h | 2 ++ > include/configs/sh7785lcr.h | 2 ++ > include/configs/shmin.h | 2 ++ > include/sh_tmu.h | 2 +- > 27 files changed, 67 insertions(+), 12 deletions(-) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 3/4] arm: rmobile: kzm9g: Change clock definition of SCIF from CONFIG_SYS_CLK_FREQ to CONFIG_SH_SCIF_CLK_FREQ
On Mon, Sep 30, 2013 at 10:30:40AM +0900, Nobuhiro Iwamatsu wrote: > Signed-off-by: Nobuhiro Iwamatsu > CC: Nobuhiro Iwamatsu > CC: Albert Aribaud > > --- > v2: no changes. > re-send as further series. Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-mpc85xx/master
On Wed, Oct 16, 2013 at 05:30:34PM -0700, York Sun wrote: > Tom, > > The following changes since commit 183acb700378a8cfc5d50a01a65de93fb2c24586: > > Prepare v2013.10 (2013-10-16 13:08:12 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-mpc85xx.git master > > for you to fetch changes up to 287df01e6aef0464c5e5bcbd7e87aa4ff1f24f5a: > > PCIe:change the method to get the address of a requested capability in > configuration space. (2013-10-16 16:15:17 -0700) > > > Po Liu (3): > powerpc: add CONFIG_SECURE_BOOT condition into fsl_secure_boot.h > powerpc:c29xpcie: make ifc timing parameter flexible > powerpc/c29xpcie: modify DDR parameter to make DDR more stable > > Prabhakar Kushwaha (6): > powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2 > powerpc/mpc85xx:Update processor defines for T1040 > powerpc/mpc85xx:Avoid fix clk groups for Cluster & HW accelerator > board/bsc9131rdb: Update IFC timings for NAND flash > powerpc/t1040qds: Add T1040QDS board > boards/c29xpcie: Update TLB and LAW size for IFC NAND, CPLD > > Priyanka Jain (1): > powerpc: Fix CamelCase warnings in DDR related code > > Shaohui Xie (3): > powerpc/t4240: updated rcw_cfg to align with default hardware > configuration > powerpc/B4860: enable PBL tool for B4860 > powerpc/tool/pbl: fix pbl image compiling process > > Shengzhou Liu (4): > powerpc/p1010rdb: remove unused cpld_show > powerpc/eeprom: update MAX_NUM_PORTS to adapt non-256-bytes EEPROM > board/p1010rdb: add pin mux and sdhc support in any boot > powerpc/p1010rdb: add p1010rdb-pb support with updating p1010rdb-pa > > Ying Zhang (3): > powerpc: p1_p2_rdb_pc: Enable p1_p2_rdb_pc to boot from SD Card > with SPL > powerpc : p1_p2_rdb_pc : Enable p1_p2_rdb_pc to start from eSPI > with SPL > powerpc: p1_p2_rdb_pc: add TPL for p1_p2_rdb_pc nand boot > > York Sun (1): > powerpc/mpc85xx: Add workaround for erratum A006379 > > Zhao Qiang (3): > Corenet/p5040/SGMII:fix the problem for SGMII5/6 > SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode > PCIe:change the method to get the address of a requested > capability in configuration space. > > ramneek mehresh (1): > powerpc/usb: Mention usb1 before usb2 inside default hwconfig string > > Makefile |1 + > arch/powerpc/cpu/mpc85xx/cmd_errata.c |5 + > arch/powerpc/cpu/mpc85xx/cpu_init.c| 13 +- > arch/powerpc/cpu/mpc85xx/fdt.c |2 +- > arch/powerpc/cpu/mpc85xx/speed.c | 114 +-- > arch/powerpc/cpu/mpc85xx/start.S |2 +- > .../powerpc/cpu/mpc8xxx/ddr/common_timing_params.h | 46 +- > arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 76 +- > arch/powerpc/cpu/mpc8xxx/ddr/ddr.h |2 +- > arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c| 52 +- > arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c| 52 +- > arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c| 54 +- > arch/powerpc/cpu/mpc8xxx/ddr/interactive.c | 312 > .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c| 214 +++--- > arch/powerpc/cpu/mpc8xxx/ddr/main.c|6 +- > arch/powerpc/cpu/mpc8xxx/ddr/options.c | 34 +- > arch/powerpc/include/asm/config_mpc85xx.h | 35 +- > arch/powerpc/include/asm/fsl_ddr_dimm_params.h | 48 +- > arch/powerpc/include/asm/fsl_ddr_sdram.h | 28 +- > arch/powerpc/include/asm/fsl_errata.h | 25 + > arch/powerpc/include/asm/fsl_pci.h | 18 - > arch/powerpc/include/asm/fsl_secure_boot.h |2 + > arch/powerpc/include/asm/immap_512x.h |4 +- > arch/powerpc/include/asm/immap_85xx.h | 22 +- > board/exmeritus/hww1u1a/ddr.c |2 +- > board/freescale/b4860qds/b4860qds_qixis.h |5 + > board/freescale/b4860qds/b4_pbi.cfg| 27 + > board/freescale/b4860qds/b4_rcw.cfg|7 + > board/freescale/b4860qds/ddr.c | 32 +- > board/freescale/b4860qds/eth_b4860qds.c| 18 + > board/freescale/bsc9131rdb/ddr.c | 26 +- > board/freescale/bsc9132qds/ddr.c | 26 +- > board/freescale/c29xpcie/ddr.c | 28 +- > board/freescale/c29xpcie/law.c |4 +- > board/freescale/c29xpcie/tlb.c |4 +- > board/freescale/common/qixis.h |4 +- > board/freescale/common/sys_eeprom.c|4 + > board/freescale/corenet_ds/ddr.c |6 +- > board/freescale/corenet_ds/eth_hydra.c |6 + > board/freescale/corenet
Re: [U-Boot] [PULL] u-boot-usb/master
On Sun, Oct 20, 2013 at 11:54:20PM +0200, Marek Vasut wrote:
> Dear Marek Vasut,
>
> please CC UBoot ML. Done, thanks
>
> > The following changes since commit
> > 183acb700378a8cfc5d50a01a65de93fb2c24586:
> >
> > Prepare v2013.10 (2013-10-16 13:08:12 -0400)
> >
> > are available in the git repository at:
> >
> > git://git.denx.de/u-boot-usb.git master
> >
> > for you to fetch changes up to 449697f14ebc9f7cb5bf15bbad0d46c6ca2c4979:
> >
> > usb: udc: add udc.h include file (2013-10-20 23:46:38 +0200)
> >
> >
> > Dan Murphy (10):
> > ARM: OMAP5: Power: Add new function to turn on SMPS10
> > ARM: OMAP5: Add registers and defines for USBOTG SS
> > OMAP5: USB: Add OMAP xHCI file and header
> > OMAP5-uevm: USB: Add xHCI host contoller support
> > usb: omap: Move the xhci-omap header file to common location
> > usb: omap5: Update the board_usb_init api
> > usb: omap: Move the usb phy code to the usb/phy directory
> > usb: dra7xx: Add support for dra7xx xhci USB host
> > usb: am437x: Add support for am437x xhci USB host
> > ARM: omap5-evm: Move MAC creation to misc_init
> >
> > Julius Werner (2):
> > exynos: usb: Switch USB VBUS GPIOs to be device tree configured
> > exynos: dts: Add USB VBUS GPIOs to the device tree
> >
> > Lukasz Majewski (10):
> > usb:udc:s3c: Reduce dcache invalidate range for UDC receive buffer
> > dfu:core: Find DFU alt setting number by passing its name
> > dfu:core: Export dfu_{get|free}_buf functions
> > usb:g_dnl: Replace static usb_configuration structure with
> > dynamically allocated one
> > usb:g_dnl: Add name parameter to g_dnl_bind_fixup function
> > usb:g_dnl:f_thor: USB download function to support TIZEN's THOR
> > protocol usb:g_dnl: Support for TIZEN's THOR function in generic download
> > code cmd:thor: Support for TIZEN's download command (thordown)
> > samsung:common:thor: Define common Samsung code to handle THOR usb
> > descriptor setup
> > trats: Update TRATS config to support TIZEN download
> >
> > Mateusz Zalega (1):
> > usb: new board-specific USB init interface
> >
> > Suriyan Ramasami (1):
> > usb:smsx95xx LED activity for USB net driver
> >
> > Troy Kisky (20):
> > usb: gadget: ether set wMaxPacketSize
> > usb: gadget: ether: return error from rx_submit if no request
> > usb: gadget: mv_udc: fix typo in error message
> > usb: gadget: mv_udc: set is_dualspeed = 1
> > usb: gadget: mv_udc: flush item before head
> > usb: gadget: mv_udc: zero transfer descriptor memory on probe
> > usb: gadget: mv_udc: clear desc upon ep_disable
> > mx6: iomux: add GPR1 defines for use with nitrogen6x
> > nitrogen6x: add otg usb host/device mode support
> > nitrogen6x: add CONFIG_MV_UDC
> > usb: rename board_usb_init_type to usb_init_type
> > usb: add enum usb_init_type parameter to usb_lowlevel_init
> > usb: ehci-hcd: add enum usb_init_type parameter to ehci_hcd_init.
> > usb: gadget: mv_udc: don't check CONFIG_USB_MAX_CONTROLLER_COUNT
> > usb: ehci-mx6: add support for otg port
> > usb: gadget: mv_udc: fix full speed connections
> > usb: gadget: mv_udc: optimize bounce
> > usb: gadget: mv_udc: optimize ep_enable
> > usb: gadget: mv_udc: split mv_udc.h file
> > usb: udc: add udc.h include file
> >
> > Vivek Gautam (8):
> > usb: Move 'bmRequestType' USB device request macros from EHCI header
> > USB: xHCI: Add stack support for xHCI
> > USB: XHCI: Add xHCI host controller support for Exynos5
> > arm: exynos: Add methods to control power to USB 3.0 PHY
> > exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI
> > exynos5: dts: Add device node for XHCI
> > config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE
> > temp: config: exynos5250: Enable xHCI support for Exynos5
> >
> > arch/arm/cpu/armv7/exynos/power.c | 22 ++
> > arch/arm/cpu/armv7/omap-common/clocks-common.c |4 +-
> > arch/arm/cpu/armv7/omap5/prcm-regs.c |5 +
> > arch/arm/dts/exynos5250.dtsi | 12 ++
> > arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 10 +
> > arch/arm/include/asm/arch-exynos/cpu.h |8 +
> > arch/arm/include/asm/arch-exynos/power.h |5 +
> > arch/arm/include/asm/arch-exynos/xhci-exynos.h | 88
> > arch/arm/include/asm/arch-mx6/iomux.h |6 +
> > arch/arm/include/asm/arch-omap5/clock.h| 14 ++
> > arch/arm/include/asm/arch-tegra/usb.h |3 +-
> > arch/arm/include/asm/ehci-omap.h |4 +-
> > arch/arm/include/asm/omap_common.h |5 +
> > arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c |2 +-
> > arch/powerpc/
Re: [U-Boot] [PATCH 1/1] usb: rename board_usb_init_type to usb_init_type
On Tue, Oct 22, 2013 at 02:39:25PM -0700, Troy Kisky wrote: > commit bba679144d25b91bcd7befff5a96728a30875f54 > "usb: rename board_usb_init_type to usb_init_type" missed xhci-omap.c > So, fix that patch here, and fix a checkpatch warning. > WARNING: Avoid unnecessary line continuations > > Signed-off-by: Troy Kisky Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 14/15] malta: add script & instructions to flash U-boot
2013/10/23 Paul Burton :
> This patch adds a script which may be used with MIPS Navigator Console
> and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta
> development board.
>
> Please see the newly added board/malta/README for usage instructions.
>
> Signed-off-by: Paul Burton
> ---
> board/malta/README | 16
> board/malta/flash-malta-boot.tcl | 40
>
> 2 files changed, 56 insertions(+)
> create mode 100644 board/malta/README
> create mode 100644 board/malta/flash-malta-boot.tcl
>
> diff --git a/board/malta/README b/board/malta/README
> new file mode 100644
> index 000..a495d02
> --- /dev/null
> +++ b/board/malta/README
I think that should be moved to doc/README.malta
> @@ -0,0 +1,16 @@
> +MIPS Malta board
> +
> +How to flash using a MIPS Navigator Probe:
> +
> + - Ensure that your Malta has jumper JP1 fitted. Without this jumper you
> will
> +be unable to flash your Malta using a Navigator Probe.
> +
> + - Connect Navigator Console to your probe and Malta as usual.
> +
> + - Within Navigator Console run the following commands:
> +
> + source /path/to/u-boot/board/malta/flash-malta-boot.tcl
> + reset
> + flash-boot /path/to/u-boot/u-boot.bin
> +
> + - You should now be able to reboot your Malta to a U-boot shell.
> diff --git a/board/malta/flash-malta-boot.tcl
> b/board/malta/flash-malta-boot.tcl
> new file mode 100644
> index 000..0eedf07
> --- /dev/null
> +++ b/board/malta/flash-malta-boot.tcl
> @@ -0,0 +1,40 @@
> +#
> +# Copyright (C) 2013 Imagination Technologies
> +#
> +# Programs a MIPS Malta boot flash with a flat binary image.
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +proc flash-boot { binfile } {
> + puts "flash monitor binary $binfile"
> + config Coherent on
> + config CoherencyDuringLoad on
> +
> + if {[endian]=="big"} {
> +puts "CPU in BE mode"
> +flash device sharp_16x32_be;
> + } else {
> +puts "CPU in LE mode"
> +flash device sharp_16x32;
> + }
> +
> + flash clear all;
> + flash set 0xBE00..0xBE0F
> + flash erase sector 0xbe00;
> + flash erase sector 0xbe02;
> + flash erase sector 0xbe04;
> + flash erase sector 0xbe06;
> + flash erase sector 0xbe08;
> + flash erase sector 0xbe0a;
> + flash erase sector 0xbe0c;
> + flash erase sector 0xbe0e;
> + puts "finished erasing boot flash";
> +
> + puts "programming flash, please be patient"
> + load bin 0xbe00 $binfile size4
> +
> + flash clear all
> + config CoherencyDuringLoad off
> + puts "finished programming boot flash";
> +}
> --
> 1.8.4
>
>
--
Best regards,
Daniel
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Re: [U-Boot] [PATCH 07/15] qemu-malta: rename to just "malta"
2013/10/23 Paul Burton :
> This is in preparation for adapting this board to function correctly on
> a physical MIPS Malta board.
do you plan to add support for other MIPS boards? In that case it
would be better to move malta to a vendor directory like "mips" or
"imagination".
>
> Signed-off-by: Paul Burton
> ---
> arch/mips/lib/bootm.c| 12 ++---
> board/malta/Makefile | 29 ++
> board/malta/lowlevel_init.S | 69
> board/malta/malta.c | 47
> board/qemu-malta/Makefile| 29 --
> board/qemu-malta/lowlevel_init.S | 69
> board/qemu-malta/qemu-malta.c| 47
> boards.cfg | 4 +-
> include/configs/malta.h | 114
> +++
> include/configs/qemu-malta.h | 114
> ---
> 10 files changed, 267 insertions(+), 267 deletions(-)
> create mode 100644 board/malta/Makefile
> create mode 100644 board/malta/lowlevel_init.S
> create mode 100644 board/malta/malta.c
> delete mode 100644 board/qemu-malta/Makefile
> delete mode 100644 board/qemu-malta/lowlevel_init.S
> delete mode 100644 board/qemu-malta/qemu-malta.c
> create mode 100644 include/configs/malta.h
> delete mode 100644 include/configs/qemu-malta.h
you should turn on rename detection in git-format-patch to reduce the
diff and to ease review
>
> diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
> index 66340ea..1febf29 100644
> --- a/arch/mips/lib/bootm.c
> +++ b/arch/mips/lib/bootm.c
> @@ -17,10 +17,10 @@ DECLARE_GLOBAL_DATA_PTR;
> #defineLINUX_MAX_ENVS 256
> #defineLINUX_MAX_ARGS 256
>
> -#if defined(CONFIG_QEMU_MALTA)
> -#define mips_boot_qemu_malta 1
> +#if defined(CONFIG_MALTA)
> +#define mips_boot_malta1
> #else
> -#define mips_boot_qemu_malta 0
> +#define mips_boot_malta0
> #endif
>
> static int linux_argc;
> @@ -139,7 +139,7 @@ static void linux_env_set(const char *env_name, const
> char *env_val)
> strcpy(linux_env_p, env_name);
> linux_env_p += strlen(env_name);
>
> - if (mips_boot_qemu_malta) {
> + if (mips_boot_malta) {
> linux_env_p++;
> linux_env[++linux_env_idx] = linux_env_p;
> } else {
> @@ -196,7 +196,7 @@ static void boot_prep_linux(bootm_headers_t *images)
> if (cp)
> linux_env_set("eth1addr", cp);
>
> - if (mips_boot_qemu_malta)
> + if (mips_boot_malta)
> linux_env_set("modetty0", "38400n8r");
> }
>
> @@ -210,7 +210,7 @@ static void boot_jump_linux(bootm_headers_t *images)
>
> bootstage_mark(BOOTSTAGE_ID_RUN_OS);
>
> - if (mips_boot_qemu_malta)
> + if (mips_boot_malta)
> linux_extra = gd->ram_size;
>
> /* we assume that the kernel is in place */
> diff --git a/board/malta/Makefile b/board/malta/Makefile
> new file mode 100644
> index 000..7060341
> --- /dev/null
> +++ b/board/malta/Makefile
> @@ -0,0 +1,29 @@
> +#
> +# (C) Copyright 2003-2006
> +# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB= $(obj)lib$(BOARD).o
> +
> +COBJS = $(BOARD).o
> +SOBJS = lowlevel_init.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB): $(OBJS) $(SOBJS)
> + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +#
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#
> diff --git a/board/malta/lowlevel_init.S b/board/malta/lowlevel_init.S
> new file mode 100644
> index 000..fa0b6a7
> --- /dev/null
> +++ b/board/malta/lowlevel_init.S
> @@ -0,0 +1,69 @@
> +/*
> + * Copyright (C) 2013 Gabor Juhos
> + *
> + * SPDX-License-Identifier:GPL-2.0
> + */
> +
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +
> +#ifdef CONFIG_SYS_BIG_ENDIAN
> +#define CPU_TO_GT32(_x)((_x))
> +#else
> +#define CPU_TO_GT32(_x) ( \
> + (((_x) & 0xff) << 24) | (((_x) & 0xff00) << 8) |\
> + (((_x) & 0xff) >> 8) | (((_x) & 0xff00) >> 24))
> +#endif
> +
> + .text
> + .set noreorder
> + .set mips32
> +
> + .globl lowlevel_init
> +lowlevel_init:
> +
> + /*
> +* Load BAR registers of GT64120 as done by YAMON
> +*
> +* based on a patch sent by Antony Pavlov
> +* to the barebox mailing list.
> +* The subject of the original patch:
> +
Re: [U-Boot] [PATCH 09/15] malta: support for coreFPGA6 boards
2013/10/23 Paul Burton : > This patch adds support for running on Malta boards using coreFPGA6 > core cards, including support for the msc01 system controller used > with them. The system controller is detected at runtime allowing one > U-boot binary to run on a Malta with either. > > Due to the PCI I/O base differing between Maltas using gt64120 & msc01 > system controllers, the UART setup is modified slightly. A second UART > is added so that there is one pointing at the correct address for each > system controller. The Malta board then defines its own > default_serial_console function to select the correct one at runtime. > The incorrect UART will simply not function. > > Tested on: > - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both > with and without an L2 cache. > - QEMU, which seems to be broken but boots as far as it did before > this patch (including correctly printing CoreLV on serial). > > Signed-off-by: Paul Burton > --- > arch/mips/include/asm/malta.h | 35 +++-- > board/malta/lowlevel_init.S | 164 > +- > board/malta/malta.c | 124 ++-- > drivers/pci/Makefile | 1 + > drivers/pci/pci_msc01.c | 126 > include/configs/malta.h | 4 +- > include/msc01.h | 135 ++ > include/pci_ids.h | 3 + > include/pci_msc01.h | 17 + > 9 files changed, 594 insertions(+), 15 deletions(-) > create mode 100644 drivers/pci/pci_msc01.c > create mode 100644 include/msc01.h > create mode 100644 include/pci_msc01.h > > diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h > index d4d44a2..0b50a66 100644 > --- a/arch/mips/include/asm/malta.h > +++ b/arch/mips/include/asm/malta.h > @@ -9,15 +9,38 @@ > #ifndef _MIPS_ASM_MALTA_H > #define _MIPS_ASM_MALTA_H > > -#define MALTA_IO_PORT_BASE 0x1800 > +#define MALTA_GT_BASE 0x1be0 > +#define MALTA_GT_PCIIO_BASE0x1800 > +#define MALTA_GT_UART0_BASE(MALTA_GT_PCIIO_BASE + 0x3f8) > > -#define MALTA_UART_BASE(MALTA_IO_PORT_BASE + 0x3f8) > +#define MALTA_MSC01_BIU_BASE 0x1bc8 > +#define MALTA_MSC01_PCI_BASE 0x1bd0 > +#define MALTA_MSC01_PBC_BASE 0x1bd4 > +#define MALTA_MSC01_IP1_BASE 0x1bc0 > +#define MALTA_MSC01_IP1_SIZE 0x0040 > +#define MALTA_MSC01_IP2_BASE1 0x1000 > +#define MALTA_MSC01_IP2_SIZE1 0x0800 > +#define MALTA_MSC01_IP2_BASE2 0x1800 > +#define MALTA_MSC01_IP2_SIZE2 0x0400 > +#define MALTA_MSC01_IP3_BASE 0x1c00 > +#define MALTA_MSC01_IP3_SIZE 0x0400 > +#define MALTA_MSC01_PCIMEM_BASE0x1000 > +#define MALTA_MSC01_PCIMEM_SIZE0x1000 > +#define MALTA_MSC01_PCIMEM_MAP 0x1000 > +#define MALTA_MSC01_PCIIO_BASE 0x1b00 > +#define MALTA_MSC01_PCIIO_SIZE 0x0080 > +#define MALTA_MSC01_PCIIO_MAP 0x > +#define MALTA_MSC01_UART0_BASE (MALTA_MSC01_PCIIO_BASE + 0x3f8) > > -#define MALTA_GT_BASE 0x1be0 > +#define MALTA_RESET_BASE 0x1f000500 > +#define GORESET0x42 > > -#define MALTA_RESET_BASE 0x1f000500 > -#define GORESET0x42 > +#define MALTA_FLASH_BASE 0x1fc0 > > -#define MALTA_FLASH_BASE 0x1fc0 > +#define MALTA_REVISION 0x1fc00010 > +#define MALTA_REVISION_CORID_SHF 10 > +#define MALTA_REVISION_CORID_MSK (0x3f << MALTA_REVISION_CORID_SHF) > +#define MALTA_REVISION_CORID_CORE_LV 1 > +#define MALTA_REVISION_CORID_CORE_FPGA614 > > #endif /* _MIPS_ASM_MALTA_H */ > diff --git a/board/malta/lowlevel_init.S b/board/malta/lowlevel_init.S > index fa0b6a7..1af34f1 100644 > --- a/board/malta/lowlevel_init.S > +++ b/board/malta/lowlevel_init.S > @@ -6,6 +6,8 @@ > > #include > #include > +#include > +#include > > #include > #include > @@ -25,6 +27,25 @@ > > .globl lowlevel_init > lowlevel_init: > + /* detect the core card */ > + li t0, KSEG1ADDR(MALTA_REVISION) > + lw t0, 0(t0) > + srl t0, t0, MALTA_REVISION_CORID_SHF > + andit0, t0, (MALTA_REVISION_CORID_MSK >> \ > +MALTA_REVISION_CORID_SHF) > + > + /* core cards using the gt64120 system controller */ > + li t1, MALTA_REVISION_CORID_CORE_LV > + beq t0, t1, _gt64120 > + > + /* core cards using the MSC01 system controller */ > +li t1, MALTA_REVISION_CORID_CORE_FPGA6 > + beq t0, t1, _msc01 > +nop > + > + /* unknown system controller */ > + b . > +nop > > /* > * Load BAR registers of GT64120 as done
Re: [U-Boot] [PATCH 2/2] video: bcm2835: fix various output modes
On Wed, Oct 23, 2013 at 05:57:53PM +0100, Stephen Warren wrote: > On 10/22/2013 09:27 PM, Andre Heider wrote: > > Depending on the firmware's video options [1] the active SDTV or > > HDTV mode can yield a framebuffer with noncontiguous horizontal lines, > > giving a messed up display, for both, u-boot and the loaded kernel. > > > > To always archive the required contiguousness for the used 16bpp, round > > the framebuffer width down so its aligned to a width of 16. > > This doesn't sound like the correct approach. By doing this, either the > SET_PHYSICAL_W_H request will fail since the requested mode doesn't > match the connected display device, or perhaps it'll work, but end up > with a frame-buffer that's a different resolution than the video signal, > so the HW will scale the image slightly, which will reduce quality. SET_PHYSICAL_W_H works in any case, but yeah, it does get "funky" resolutions in some cases. The thing is, the firmware is stupid to begin with (duh). In my case, I do have both outputs connected. For the analog one, I have to set sdtv_* and overscan_* config settings. When the HDMI connection is active, the analog output is inactive, but yet the firmware applies the sdtv_* and overscan_* settings to the HDMI output too, so the clean 1:1 resolution is already gone... > Instead, can't you obtain the buffer width and stride separately, and > then configure the LCD core based on both those values, rather than > assuming they're the same? What I did try is to get the overscan values and add those to the requested resolution (that's where patch 1 comes from). That gives saner resolutions, but some are still broken for me. I agree that getting the pitch value would be the right thing to do, I do some digging to find a spot where to shove that into. Thanks, Andre ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] ARM: bcm2835: add missing mbox overscan response field
On Wed, Oct 23, 2013 at 05:54:13PM +0100, Stephen Warren wrote: > On 10/22/2013 09:27 PM, Andre Heider wrote: > > Add the missing "right" field to struct bcm2835_mbox_tag_overscan. > > This one patch, > Acked-by: Stephen Warren > > You need to send/cc this patch to Albert Aribauld, since he applies ARM > patches. Or, perhaps just make sure the patch gets assigned to him in > patchwork? Okay, I did the patchwork dance :) Thanks, Andre ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPDX License IDs - moving forward
Hi Wolfgang! > -Original Message- > From: Wolfgang Denk [mailto:w...@denx.de] > Sent: Donnerstag, 10. Oktober 2013 12:49 > To: u-boot@lists.denx.de > Cc: Meier, Roger > Subject: SPDX License IDs - moving forward > > Hallo, > > while working on converting more files to SPDX license IDs and > discussing the whole approach with the SPDX team, a few ideas crossed > my mind. It would be very helpful if I gould get some feedback on > these: > > > I wonder if we should not take the idea even a step further. So far > we only focus on the license terms of the source code. However, > U-Boot is very flexible to configure, and as is it is not trvial to > tell if a specific piece of code actually gets linked into the final > product. I wonder if we should turn the comment as we have it now > into actual code, i. e. into a preprocessor macro that compiles the > license ID into the generated object file (probably into a separate > section so you can decide whether or not you want to include this > ieven into the final binary image). We could easily make the linker > combine identical tags into a single entry, to the total memory > overhead would be minimal. > > This would allow to easily find out which components have actually > been built into the final product, so which licenses apply tho that. > You don't have to bother about license terms for code that you don't > actually use in your product, right? Getting a report with files + licenses as build output would by awesome! Part of binary and a license command would a very nice supplement. > > > And there is another topic that's on my mind. License terms for the > source code are one thing, but there are is additional information > that may be relevant when releasing a product, for example (known) > patents or other intellectual property rights that may apply. For > example, despite the fact that all code to implement FAT/VFAT file > system support is licensed under GPL-2.0+ in U-Boot, we know that > Microsoft holds patents on parts of that technology, which may become > an issue if you include FAT/VFAT support in your product. > > Should we also add similar tags to list known patents etc.? for > example, the FAT code could be augmented like that: > > SPDX-Patent-Notice: US5,579,517 US5,758,352 US5,745,902 US6,286,013 EP0618550 > > [Of course I'm not sure if SPDX would cover such an entry; I'm just > interested in feedback for the general idea.] I really like this idea, had it also within my ideabox. A perfect way to simplify this topic as well and I think it fits to the idea of Software Package Data Exchange. If SPDX people agree on patent info as part of further SPDX the tag name fits perfectly otherwise just use License-Notice as a tag? > > Again, I tent to make this a preprocessor macro, so you can easily > determine which (known) patents may apply to your final product. > > > What do you think? Does this make sense to you? Yes! The other thing within my ideabox is a SPDX-Copyright-Text tag. What about that? -roger ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] usb: ohci-hcd: submit_common_msg: report actual_length properly
submit_common_msg should report amount of data passed from/to device. Instead, it always returned size requested by Host. Signed-off-by: Mateusz Kulikowski --- drivers/usb/host/ohci-hcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index c33c487..8a9e5f4 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -1548,7 +1548,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, } dev->status = stat; - dev->act_len = transfer_len; + dev->act_len = urb->actual_length; #ifdef DEBUG pkt_print(urb, dev, pipe, buffer, transfer_len, -- 1.8.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] video: bcm2835: fix various output modes
On 10/22/2013 09:27 PM, Andre Heider wrote: > Depending on the firmware's video options [1] the active SDTV or > HDTV mode can yield a framebuffer with noncontiguous horizontal lines, > giving a messed up display, for both, u-boot and the loaded kernel. > > To always archive the required contiguousness for the used 16bpp, round > the framebuffer width down so its aligned to a width of 16. This doesn't sound like the correct approach. By doing this, either the SET_PHYSICAL_W_H request will fail since the requested mode doesn't match the connected display device, or perhaps it'll work, but end up with a frame-buffer that's a different resolution than the video signal, so the HW will scale the image slightly, which will reduce quality. Instead, can't you obtain the buffer width and stride separately, and then configure the LCD core based on both those values, rather than assuming they're the same? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] ARM: bcm2835: add missing mbox overscan response field
On 10/22/2013 09:27 PM, Andre Heider wrote: > Add the missing "right" field to struct bcm2835_mbox_tag_overscan. This one patch, Acked-by: Stephen Warren You need to send/cc this patch to Albert Aribauld, since he applies ARM patches. Or, perhaps just make sure the patch gets assigned to him in patchwork? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Fat write problem
Hi Everyone, After about half a year without problems for fatwrite, I have some new problem. The fatwrites for the u-boot are used to write the uimage and dtb file to a 32 MB FAT16 partition on an SD-card. Since this morning, the writing of a new file keeps failing. I still can write files that are already present. But if try and write some file with a name that doe not exist yet, it fails. I guess this just hasn't been tested for a while, since these filenames don't change. Meanwhile some extra files have been copied to the partition from the Linux platform. I did check the SD-card partition with fsck and could not find any problems. I did enable the debug for MMC and FAT to get the following output: fatwrite mmc 0:1 4200 test-file 200 writing test-file MMC0: CMD16 MMC0: CMD17 MMC0: CMD16 MMC0: CMD18 MMC0: CMD12 get_dentfromdir: test-file gc - clustnum: -6, startsect: 132 MMC0: CMD16 MMC0: CMD18 MMC0: CMD12 vfatname: |uimage| Mismatch: |uimage|uimage| vfatname: |imx28-evk.dtb| Mismatch: |imx28-~1.dtb|imx28-evk.dtb| vfatname: |linux-file1.txt| Mismatch: |linux-~1.txt|linux-file1.txt| Mismatch: |address.ini|| vfatname: |imx28-clb.dtb| Mismatch: |imx28-~2.dtb|imx28-clb.dtb| vfatname: |img-copy| Mismatch: |img-copy|img-copy| vfatname: |tessie| Mismatch: |tessie|tessie| vfatname: |img-copy2| Mismatch: |img-co~1|img-copy2| vfatname: |imx-28-clb-37.dtb| Mismatch: |imx-28~1.dtb|imx-28-clb-37.dtb| vfatname: |hello8000.wav| Mismatch: |hello8~1.wav|hello8000.wav| vfatname: |versions.ini| Mismatch: |versions.ini|versions.ini| vfatname: |mx28-310.dtb| Mismatch: |mx28-310.dtb|mx28-310.dtb| FAT16: entry: 0xfffa = -6, offset: 0x03fa = 1018 MMC: block number 0x1000806 exceeds max(0x762c00) FAT16: ret: , entry: fffa, offset: 03fa curclust: 0x0 Invalid FAT entry name.ext : . FAT16: entry: 0x0003 = 3, offset: 0x0003 = 3 error: overflow occurs error: writing FAT blocks FAT16: entry: 0x0004 = 4, offset: 0x0004 = 4 error: overflow occurs error: writing FAT blocks FAT16: entry: 0x0005 = 5, offset: 0x0005 = 5 error: overflow occurs error: writing FAT blocks FAT16: entry: 0x0006 = 6, offset: 0x0006 = 6 ... and this goes on for a long long time... It points to get_fatent_value( ) where things go wrong. Or perhaps the call of this function with the value 0xfffa (-6). I don't know if that is supposed to be possible? At the moment I am a bit stuck here, so if anyone would have an idea what goes wrong here, please let me know. Thanks, Ruud N.B. It might be that this can be solved by clearing the FAT partition and starting with a clean sheet. But I prefer not to lose this error situaion before I know what goes wrong here. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/85xx: fix broken cpu "clock-frequency" property
When indexing freqProcessor[] we use the first
value in the cpu's "reg" property, which on
new e6500 cores IDs the threads.
But freqProcessor[] should be indexed with a
core index so, when fixing "the clock-frequency"
cpu node property, access the freqProcessor[]
with the core index derived from the "reg' property.
If we don't do this, last half of the "cpu" nodes
will have broken "clock-frequency" values.
Signed-off-by: Laurentiu Tudor
Cc: York Sun
---
Based on: git://git.denx.de/u-boot-mpc85xx.git master
arch/powerpc/cpu/mpc85xx/fdt.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 2ccd9c7..33bc900 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -586,6 +586,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
{
int off;
int val;
+ int len;
sys_info_t sysinfo;
/* delete crypto node if not on an E-processor */
@@ -615,8 +616,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
get_sys_info(&sysinfo);
off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
while (off != -FDT_ERR_NOTFOUND) {
- u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
- val = cpu_to_fdt32(sysinfo.freq_processor[*reg]);
+ u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", &len);
+ val = cpu_to_fdt32(sysinfo.freq_processor[(*reg) / (len / 4)]);
fdt_setprop(blob, off, "clock-frequency", &val, 4);
off = fdt_node_offset_by_prop_value(blob, off, "device_type",
"cpu", 4);
--
1.7.6.5
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Re: [U-Boot] [PATCH] cmd_nvedit.c: Add env exists command
On Wed, Oct 23, 2013 at 06:55:02AM -0700, James Chargin wrote:
> I have, more recently, been using scripting of the form
>
> if test "X" != "X${var}"; then
> echo defined
> else
> echo undefined
> fi
Thanks for the feedback.
I was attempting to do something like that originally but was hitting
problems related to the expansion which I'm still tracking down:
WRONG:
$ set var
$ test "x${var}" = "x" && echo undefined
undefined
$ set var 1
$ test "x${var}" = "x" && echo undefined
$ set var "1; 2; 3"
$ test "x${var}" = "x" && echo undefined
>> undefined
It DOES seem to work a lot better with != as you mentioned above
though...
RIGHT:
$ set var
$ test "x${var}" != "x" && echo defined
$ set var 1
$ test "x${var}" != "x" && echo defined
defined
$ set var "1; 2; 3"
$ test "x${var}" != "x" && echo defined
defined
- Andy
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[U-Boot] [PATCH] powerpc/t4240: fix per pci endpoint liodn offsets
Update the code that builds the pci endpoint liodn
offset list so that it doesn't overlap with other
liodns and doesn't generate negative offsets like:
fsl,liodn-offset-list = <0 0xffcd 0xffcf
0xffd1 0xffd3
0xffd5 0xffd7
0xffd9 0xffdb>;
The update consists in adding a parameter to the
function that builds the list to specify the base
liodn.
On PCI v2.4 use the old base = 256 and, on PCI 3.0
where some of the PCIE liodns are larger than 256,
use a base = 1024. The version check is based on
the PCI controller's version register.
Signed-off-by: Laurentiu Tudor
Cc: Scott Wood
Cc: York Sun
---
Based on: git://git.denx.de/u-boot-mpc85xx.git master
arch/powerpc/cpu/mpc85xx/liodn.c | 25 +
arch/powerpc/include/asm/immap_85xx.h |4 +++-
2 files changed, 24 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index 4b00da9..19e130e 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -239,9 +239,9 @@ static void fdt_fixup_srio_liodn(void *blob, struct
srio_liodn_id_table *tbl)
#endif
#define CONFIG_SYS_MAX_PCI_EPS 8
-#define CONFIG_SYS_PCI_EP_LIODN_START 256
-static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat)
+static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,
+ int ep_liodn_start)
{
int off, pci_idx = 0, pci_cnt = 0, i, rc;
const uint32_t *base_liodn;
@@ -271,7 +271,7 @@ static void fdt_fixup_pci_liodn_offsets(void *fdt, const
char *compat)
continue;
}
for (i = 0; i < CONFIG_SYS_MAX_PCI_EPS; i++)
- liodn_offs[i + 1] = CONFIG_SYS_PCI_EP_LIODN_START +
+ liodn_offs[i + 1] = ep_liodn_start +
i * pci_cnt + pci_idx - *base_liodn;
rc = fdt_setprop(fdt, off, "fsl,liodn-offset-list",
liodn_offs, sizeof(liodn_offs));
@@ -338,5 +338,22 @@ void fdt_fixup_liodn(void *blob)
fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz);
#endif
- fdt_fixup_pci_liodn_offsets(blob, "fsl,qoriq-pcie-v2.4");
+ ccsr_pcix_t *pcix = (ccsr_pcix_t *)CONFIG_SYS_PCIE1_ADDR;
+ int pci_ver = pcix->ipver1 & 0x, liodn_base = 0;
+
+ if (pci_ver >= 0x0204) {
+ if (pci_ver >= 0x0300)
+ liodn_base = 1024;
+ else
+ liodn_base = 256;
+ }
+
+ if (liodn_base) {
+ char compat[32];
+
+ sprintf(compat, "fsl,qoriq-pcie-v%d.%d",
+ (pci_ver & 0xff00) >> 8, pci_ver & 0xff);
+ fdt_fixup_pci_liodn_offsets(blob, compat, liodn_base);
+ fdt_fixup_pci_liodn_offsets(blob, "fsl,qoriq-pcie", liodn_base);
+ }
}
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index e516e07..a087b8c 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -282,7 +282,9 @@ typedef struct ccsr_pcix {
u32 int_ack;/* PCIX IRQ Acknowledge */
u8 res000c[52];
u32 liodn_base; /* PCIX LIODN base register */
- u8 res0044[3004];
+ u8 res0044[2996];
+ u32 ipver1; /* PCIX IP block revision register 1 */
+ u32 ipver2; /* PCIX IP block revision register 2 */
u32 potar0; /* PCIX Outbound Transaction Addr 0 */
u32 potear0;/* PCIX Outbound Translation Extended Addr 0 */
u32 powbar0;/* PCIX Outbound Window Base Addr 0 */
--
1.7.6.5
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[U-Boot] [PATCH] powerpc/t4240: set pcie liodn in the correct register
The liodn for the T4240's PCIE controller is no longer set
through a register in the guts register block but with one
in the PCIE register block itself.
Use the already existing SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.
Signed-off-by: Laurentiu Tudor
Cc: Scott Wood
Cc: York Sun
---
Based on: git://git.denx.de/u-boot-mpc85xx.git master
arch/powerpc/cpu/mpc85xx/t4240_ids.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/t4240_ids.c
b/arch/powerpc/cpu/mpc85xx/t4240_ids.c
index 54c1cfd..f181315 100644
--- a/arch/powerpc/cpu/mpc85xx/t4240_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t4240_ids.c
@@ -86,10 +86,10 @@ struct liodn_id_table liodn_tbl[] = {
SET_SATA_LIODN(1, 555),
SET_SATA_LIODN(2, 556),
- SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
- SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 228),
- SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 308),
- SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 388),
+ SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
+ SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 228),
+ SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 308),
+ SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 388),
SET_DMA_LIODN(1, 147),
SET_DMA_LIODN(2, 227),
--
1.7.6.5
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Re: [U-Boot] [PATCH] cmd_nvedit.c: Add env exists command
Dear Andrew Ruder,
On 10/22/2013 05:07 PM, Andrew Ruder wrote:
env exists is a way to test (in hush) if an environment variable
exists. A workaround existed using printenv but this new command
doesn't require all the stdout/stderr redirection to prevent
printing information to the screen.
I was aware of the printenv workaround, and have used it. I share your
misgivings about the stdout/stderr redirection, it seems clumsy, at best.
I have, more recently, been using scripting of the form
if test "X" != "X${var}"; then
echo defined
else
echo undefined
fi
Example:
$ set testexists 1
$ env exists testexists && echo "yes"
yes
$ env exists testexists || echo "no"
$ set testexists
$ env exists testexists && echo "yes"
$ env exists testexists || echo "no"
no
$
I've often thought that a "env exists" command might be a nice,
consistent, addition.
Thanks for adding it.
Jim
Signed-off-by: Andrew Ruder
---
README | 1 +
common/cmd_nvedit.c | 23 +++
2 files changed, 24 insertions(+)
diff --git a/README b/README
index 09662a4..0718459 100644
--- a/README
+++ b/README
@@ -843,6 +843,7 @@ The following options need to be configured:
CONFIG_CMD_ELF * bootelf, bootvx
CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
CONFIG_CMD_ENV_FLAGS* display details about env flags
+ CONFIG_CMD_ENV_EXISTS * check existence of env variable
CONFIG_CMD_EXPORTENV* export the environment
CONFIG_CMD_EXT2 * ext2 command support
CONFIG_CMD_EXT4 * ext4 command support
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index ba9ba16..0d4d02c 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -1059,6 +1059,23 @@ sep_err:
}
#endif
+#if defined(CONFIG_CMD_ENV_EXISTS)
+static int do_env_exists(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ ENTRY e, *ep;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ e.key = argv[1];
+ e.data = NULL;
+ hsearch_r(e, FIND, &ep, &env_htab, 0);
+
+ return (ep == NULL) ? 1 : 0;
+}
+#endif
+
/*
* New command line interface: "env" command with subcommands
*/
@@ -1094,6 +,9 @@ static cmd_tbl_t cmd_env_sub[] = {
U_BOOT_CMD_MKENT(save, 1, 0, do_env_save, "", ""),
#endif
U_BOOT_CMD_MKENT(set, CONFIG_SYS_MAXARGS, 0, do_env_set, "", ""),
+#if defined(CONFIG_CMD_ENV_EXISTS)
+ U_BOOT_CMD_MKENT(exists, 2, 0, do_env_exists, "", ""),
+#endif
};
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
@@ -1136,6 +1156,9 @@ static char env_help_text[] =
#if defined(CONFIG_CMD_EDITENV)
"env edit name - edit environment variable\n"
#endif
+#if defined(CONFIG_CMD_ENV_EXISTS)
+ "env exists name - tests for existence of variable\n"
+#endif
#if defined(CONFIG_CMD_EXPORTENV)
"env export [-t | -b | -c] [-s size] addr [var ...] - export
environment\n"
#endif
--
Jim Chargin
AJA Video Systems j...@aja.com
(530) 271-3334 http://www.aja.com
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Re: [U-Boot] Fwd: [PATCH 1/6] exynos_fb: Remove usage of static defines
On Oct 23, 2013 9:28 AM, "Ajay kumar" wrote: > > Hi Simon, > > > On Wed, Oct 16, 2013 at 10:04 PM, Simon Glass wrote: >> >> Hi Ajay, >> >> [once more from the right address] >> >> On Mon, Sep 30, 2013 at 5:20 AM, Ajay Kumar wrote: >> >> > Previously, we used to statically assign values for vl_col, vl_row and >> > vl_bpix using #defines like LCD_XRES, LCD_YRES and LCD_COLOR16. >> > >> > Introducing the function exynos_lcd_early_init() would take care of this >> > assignment on the fly by parsing FIMD DT properties, thereby allowing us >> > to remove LCD_XRES and LCD_YRES from the main config file. >> > >> > Signed-off-by: Ajay Kumar >> > >> >> Acked-by: Simon Glass >> >> I can't test this on Pit at present - any chance of a series at some point >> to enable that? > > Should wait till Rajeshwari sends a patch for peach-pit dts. > >> I pushed my branch to u-boot-x86.git branch try-5420b. >> >> As a general comment, it would be nice to follow up with a series to fully >> enable device tree for the GPIOs also. At the moment these are hard-coded. > > Ok. I will do this for exynos video driver. Sounds good on both counts, thank you. > >> Regards, >> Simon >> >> ___ >> U-Boot mailing list >> U-Boot@lists.denx.de >> http://lists.denx.de/mailman/listinfo/u-boot >> > > > Thanks and regards, > Ajay Kumar > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Bad Linux ARM zImage magic
On Tue, Oct 22, 2013 at 11:11 PM, claus anders wrote: > Due to this patch: > 0001-omap3_beagle-uEnv.txt-bootz-n-fixes.patch, u-boot for my beagleboard > seems > to need always a zImage. Up to now, I used uImage just fine. Correct, that's exactly one of the features that my out of tree patch does.. If you'd like to use uImage, don't apply my patch. ;) (adding u-boot cc this time..) Regards, -- Robert Nelson http://www.rcn-ee.com/ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 4/5] usb: ums: move ums code from trats to Samsung common directory
UMS init was implemented in trats board file but mostly it comprises
common code. Due to that it has been moved to common/ums.c to avoid
code duplication in the future.
Changes:
- move ums initialization code from trats to common/ums.c
- remove unused CONFIG_USB_GADGET_MASS_STORAGE from trats.h
Changes v2:
- move this patch at the top of code cleanups patches
Signed-off-by: Przemyslaw Marczak
Cc: Marek Vasut
Cc: Minkyu Kang
---
board/samsung/common/Makefile |1 +
board/samsung/common/ums.c| 76 +
board/samsung/trats/trats.c | 68
include/configs/trats.h |2 --
4 files changed, 77 insertions(+), 70 deletions(-)
create mode 100644 board/samsung/common/ums.c
diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
index ad7564c..d122169 100644
--- a/board/samsung/common/Makefile
+++ b/board/samsung/common/Makefile
@@ -11,6 +11,7 @@ LIB = $(obj)libsamsung.o
COBJS-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
COBJS-$(CONFIG_THOR_FUNCTION) += thor.o
+COBJS-$(CONFIG_CMD_USB_MASS_STORAGE) += ums.o
SRCS:= $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
new file mode 100644
index 000..dc155ad
--- /dev/null
+++ b/board/samsung/common/ums.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ * Lukasz Majewski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+static int ums_read_sector(struct ums *ums_dev,
+ ulong start, lbaint_t blkcnt, void *buf)
+{
+ block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
+ lbaint_t blkstart = start + ums_dev->start_sector;
+ int dev_num = block_dev->dev;
+
+ return block_dev->block_read(dev_num, blkstart, blkcnt, buf);
+}
+
+static int ums_write_sector(struct ums *ums_dev,
+ ulong start, lbaint_t blkcnt, const void *buf)
+{
+ block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
+ lbaint_t blkstart = start + ums_dev->start_sector;
+ int dev_num = block_dev->dev;
+
+ return block_dev->block_write(dev_num, blkstart, blkcnt, buf);
+}
+
+static struct ums ums_dev = {
+ .read_sector = ums_read_sector,
+ .write_sector = ums_write_sector,
+ .name = "UMS disk",
+};
+
+static struct ums *ums_disk_init(struct mmc *mmc)
+{
+ uint64_t mmc_end_sector = mmc->capacity / SECTOR_SIZE;
+ uint64_t ums_end_sector = UMS_NUM_SECTORS + UMS_START_SECTOR;
+
+ if (!mmc_end_sector) {
+ error("MMC capacity is not valid");
+ return NULL;
+ }
+
+ ums_dev.mmc = mmc;
+
+ if (ums_end_sector <= mmc_end_sector) {
+ ums_dev.start_sector = UMS_START_SECTOR;
+ if (UMS_NUM_SECTORS)
+ ums_dev.num_sectors = UMS_NUM_SECTORS;
+ else
+ ums_dev.num_sectors = mmc_end_sector - UMS_START_SECTOR;
+ } else {
+ ums_dev.num_sectors = mmc_end_sector;
+ puts("UMS: defined bad disk parameters. Using default.\n");
+ }
+
+ printf("UMS: disk start sector: %#x, count: %#x\n",
+ ums_dev.start_sector, ums_dev.num_sectors);
+
+ return &ums_dev;
+}
+
+struct ums *ums_init(unsigned int dev_num)
+{
+ struct mmc *mmc = NULL;
+
+ mmc = find_mmc_device(dev_num);
+ if (!mmc)
+ return NULL;
+
+ return ums_disk_init(mmc);
+}
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 7e0e31e..db5828d 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -772,71 +772,3 @@ void init_panel_info(vidinfo_t *vid)
setenv("lcdinfo", "lcd=s6e8ax0");
}
-
-#ifdef CONFIG_USB_GADGET_MASS_STORAGE
-static int ums_read_sector(struct ums *ums_dev,
- ulong start, lbaint_t blkcnt, void *buf)
-{
- block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
- lbaint_t blkstart = start + ums_dev->start_sector;
- int dev_num = block_dev->dev;
-
- return block_dev->block_read(dev_num, blkstart, blkcnt, buf);
-}
-
-static int ums_write_sector(struct ums *ums_dev,
- ulong start, lbaint_t blkcnt, const void *buf)
-{
- block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
- lbaint_t blkstart = start + ums_dev->start_sector;
- int dev_num = block_dev->dev;
-
- return block_dev->block_write(dev_num, blkstart, blkcnt, buf);
-}
-
-static struct ums ums_dev = {
- .read_sector = ums_read_sector,
- .write_sector = ums_write_sector,
- .name = "UMS disk",
-};
-
-static struct ums *ums_disk_init(struct mmc *mmc)
-{
- uint64_t mmc_end_sector = mmc->capacity / SECTOR_SIZE;
- uint64_t ums_end_sector = UMS_NUM_SECTORS + UMS_START_SECTOR;
-
- if (!mmc_end_sector) {
-
[U-Boot] [PATCH v2 5/5] usb: ums: add ums exit feature by ctrl+c or by detach usb cable
This patch allows exiting from UMS mode to u-boot prompt
by detaching usb cable or by pressing ctrl+c.
Add new config: CONFIG_USB_CABLE_CHECK. If defined then board
file should provide function: usb_cable_connected() (include/usb.h)
that return 1 if cable is connected and 0 otherwise.
Changes v2:
- add a note to the README
Signed-off-by: Przemyslaw Marczak
Cc: Marek Vasut
---
README |7 +++
common/cmd_usb_mass_storage.c | 21 +
drivers/usb/gadget/f_mass_storage.c | 24 +---
include/usb.h | 10 ++
4 files changed, 51 insertions(+), 11 deletions(-)
diff --git a/README b/README
index cee8e2f..75329b1 100644
--- a/README
+++ b/README
@@ -1362,6 +1362,13 @@ The following options need to be configured:
for your device
- CONFIG_USBD_PRODUCTID 0x
+ Some USB device drivers may need to check USB cable attachment.
+ In this case you can enable following config in BoardName.h:
+ CONFIG_USB_CABLE_CHECK
+ This enables function definition:
+ - usb_cable_connected() in include/usb.h
+ Implementation of this function is board-specific.
+
- ULPI Layer Support:
The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
the generic ULPI layer. The generic layer accesses the ULPI PHY
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index 4d3bbd8..99487f4 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -5,6 +5,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
+#include
#include
#include
#include
@@ -42,16 +43,20 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
g_dnl_register("ums");
while (1) {
- /* Handle control-c and timeouts */
- if (ctrlc()) {
- error("The remote end did not respond in time.");
- goto exit;
- }
-
usb_gadget_handle_interrupts();
- /* Check if USB cable has been detached */
- if (fsg_main_thread(NULL) == EIO)
+
+ rc = fsg_main_thread(NULL);
+ if (rc) {
+ /* Check I/O error */
+ if (rc == -EIO)
+ printf("\rCheck USB cable connection\n");
+
+ /* Check CTRL+C */
+ if (rc == -EPIPE)
+ printf("\rCTRL+C - Operation aborted\n");
+
goto exit;
+ }
}
exit:
g_dnl_unregister();
diff --git a/drivers/usb/gadget/f_mass_storage.c
b/drivers/usb/gadget/f_mass_storage.c
index 3b77047..d290a56 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -245,6 +245,7 @@
#include
#include
#include
+#include
#include
#include
@@ -678,6 +679,18 @@ static int sleep_thread(struct fsg_common *common)
k++;
}
+ if (k == 10) {
+ /* Handle CTRL+C */
+ if (ctrlc())
+ return -EPIPE;
+#ifdef CONFIG_USB_CABLE_CHECK
+ /* Check cable connection */
+ if (!usb_cable_connected())
+ return -EIO;
+#endif
+ k = 0;
+ }
+
usb_gadget_handle_interrupts();
}
common->thread_wakeup_needed = 0;
@@ -2390,6 +2403,7 @@ static void handle_exception(struct fsg_common *common)
int fsg_main_thread(void *common_)
{
+ int ret;
struct fsg_common *common = the_fsg_common;
/* The main loop */
do {
@@ -2399,12 +2413,16 @@ int fsg_main_thread(void *common_)
}
if (!common->running) {
- sleep_thread(common);
+ ret = sleep_thread(common);
+ if (ret)
+ return ret;
+
continue;
}
- if (get_next_command(common))
- continue;
+ ret = get_next_command(common);
+ if (ret)
+ return ret;
if (!exception_in_progress(common))
common->state = FSG_STATE_DATA_PHASE;
diff --git a/include/usb.h b/include/usb.h
index 17fb68c..8c1789f 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -197,6 +197,16 @@ int board_usb_init(int index, enum board_usb_init_type
init);
*/
int board_usb_cleanup(int index, enum board_usb_init_type init);
+/*
+ * If CONFIG_USB_CABLE_CHECK is set then this function
+ * should be defined in board file.
+ *
+ * @return 1 if cable is connected and
[U-Boot] [PATCH v2 3/5] usb: ums: fix disk capacity miscalculation and code cleanup
This patch prevents:
- ums disk capacity miscalculation because of integer overflow
Changes v2:
- Prevents passing zero size disk capacity to ums gadget driver
- Change function ums_get_capacity() to ums_disk_init() and do ums disk
initialization before gadget init
- Remove unnecessary code from mass storage driver
Signed-off-by: Przemyslaw Marczak
Cc: Marek Vasut
---
board/samsung/trats/trats.c | 49 +++
drivers/usb/gadget/storage_common.c | 26 +++
include/usb_mass_storage.h |6 ++---
3 files changed, 37 insertions(+), 44 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 0b58b00..7e0e31e 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -778,7 +778,7 @@ static int ums_read_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, void *buf)
{
block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
- lbaint_t blkstart = start + ums_dev->offset;
+ lbaint_t blkstart = start + ums_dev->start_sector;
int dev_num = block_dev->dev;
return block_dev->block_read(dev_num, blkstart, blkcnt, buf);
@@ -788,30 +788,47 @@ static int ums_write_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, const void *buf)
{
block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
- lbaint_t blkstart = start + ums_dev->offset;
+ lbaint_t blkstart = start + ums_dev->start_sector;
int dev_num = block_dev->dev;
return block_dev->block_write(dev_num, blkstart, blkcnt, buf);
}
-static void ums_get_capacity(struct ums *ums_dev, long long int *capacity)
-{
- long long int tmp_capacity;
-
- tmp_capacity = (long long int)((ums_dev->offset + ums_dev->part_size)
- * SECTOR_SIZE);
- *capacity = ums_dev->mmc->capacity - tmp_capacity;
-}
-
static struct ums ums_dev = {
.read_sector = ums_read_sector,
.write_sector = ums_write_sector,
- .get_capacity = ums_get_capacity,
.name = "UMS disk",
- .offset = UMS_START_SECTOR,
- .part_size = UMS_NUM_SECTORS,
};
+static struct ums *ums_disk_init(struct mmc *mmc)
+{
+ uint64_t mmc_end_sector = mmc->capacity / SECTOR_SIZE;
+ uint64_t ums_end_sector = UMS_NUM_SECTORS + UMS_START_SECTOR;
+
+ if (!mmc_end_sector) {
+ error("MMC capacity is not valid");
+ return NULL;
+ }
+
+ ums_dev.mmc = mmc;
+
+ if (ums_end_sector <= mmc_end_sector) {
+ ums_dev.start_sector = UMS_START_SECTOR;
+ if (UMS_NUM_SECTORS)
+ ums_dev.num_sectors = UMS_NUM_SECTORS;
+ else
+ ums_dev.num_sectors = mmc_end_sector - UMS_START_SECTOR;
+ } else {
+ ums_dev.num_sectors = mmc_end_sector;
+ puts("UMS: defined bad disk parameters. Using default.\n");
+ }
+
+ printf("UMS: disk start sector: %#x, count: %#x\n",
+ ums_dev.start_sector, ums_dev.num_sectors);
+
+ return &ums_dev;
+}
+
struct ums *ums_init(unsigned int dev_num)
{
struct mmc *mmc = NULL;
@@ -820,8 +837,6 @@ struct ums *ums_init(unsigned int dev_num)
if (!mmc)
return NULL;
- ums_dev.mmc = mmc;
-
- return &ums_dev;
+ return ums_disk_init(mmc);
}
#endif
diff --git a/drivers/usb/gadget/storage_common.c
b/drivers/usb/gadget/storage_common.c
index c2c5424..02803df 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -572,36 +572,16 @@ static struct usb_gadget_strings fsg_stringtab = {
static int fsg_lun_open(struct fsg_lun *curlun, const char *filename)
{
int ro;
- int rc = -EINVAL;
- loff_t size;
- loff_t num_sectors;
- loff_t min_sectors;
/* R/W if we can, R/O if we must */
ro = curlun->initially_ro;
- ums->get_capacity(ums, &size);
- if (size < 0) {
- printf("unable to find file size: %s\n", filename);
- rc = (int) size;
- goto out;
- }
- num_sectors = size >> 9;/* File size in 512-byte blocks */
- min_sectors = 1;
- if (num_sectors < min_sectors) {
- printf("file too small: %s\n", filename);
- rc = -ETOOSMALL;
- goto out;
- }
-
curlun->ro = ro;
- curlun->file_length = size;
- curlun->num_sectors = num_sectors;
+ curlun->file_length = ums->num_sectors << 9;
+ curlun->num_sectors = ums->num_sectors;
debug("open backing file: %s\n", filename);
- rc = 0;
-out:
- return rc;
+ return 0;
}
static void fsg_lun_close(struct fsg
[U-Boot] [PATCH v2 2/5] usb: ums: allows using every mmc device with ums.
Before this change ums command only allowed use of mmc 0.
Now this argument can be set.
Changes:
- remove mmc device number checking because it is always positive number
- remove printing "no such device" - it is done by find_mmc_device()
Change-Id: I767e45151ad515c7bef19e6c13087374f5e23c11
Signed-off-by: Przemyslaw Marczak
Cc: Marek Vasut
---
common/cmd_usb_mass_storage.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index f6ceba7..4d3bbd8 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -20,10 +20,11 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
const char *usb_controller = argv[1];
const char *mmc_devstring = argv[2];
- unsigned int dev_num = (unsigned int)(simple_strtoul(mmc_devstring,
- NULL, 0));
- if (dev_num)
- return CMD_RET_USAGE;
+ unsigned int dev_num = simple_strtoul(mmc_devstring, NULL, 0);
+
+ struct ums *ums = ums_init(dev_num);
+ if (!ums)
+ return CMD_RET_FAILURE;
unsigned int controller_index = (unsigned int)(simple_strtoul(
usb_controller, NULL, 0));
@@ -32,12 +33,6 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_FAILURE;
}
- struct ums *ums = ums_init(dev_num);
- if (!ums) {
- printf("MMC: %u no such device\n", dev_num);
- return CMD_RET_FAILURE;
- }
-
int rc = fsg_init(ums);
if (rc) {
error("fsg_init failed");
--
1.7.9.5
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[U-Boot] [PATCH v2 1/5] usb: ums: code refactoring to improve reusability on other boards.
This patch introduces some cleanups to ums code. Changes:
ums common:
- introduce UMS_START_SECTOR and UMS_NUM_SECTORS as defined in
usb_mass_storage.h both default values as 0 if board config
doesn't define them
common cleanup changes:
- change name of struct "ums_board_info" to "ums"
- "ums_device" fields are moved to struct ums and "dev_num" is removed
- change function name: board_ums_init to ums_init
- remove "extern" prefixes from usb_mass_storage.h
cmd_usb_mass_storage:
- change error() to printf() if need to print info message
- change return values to command_ret_t type at ums command code
- add command usage string
Changes v2:
ums common:
- always returns number of read/write sectors
- coding style clean-up
ums gadget:
- calculate amount of read/write from device returned value.
Signed-off-by: Przemyslaw Marczak
Cc: Marek Vasut
---
board/samsung/trats/trats.c | 51 +++
common/cmd_usb_mass_storage.c | 27 ---
drivers/usb/gadget/f_mass_storage.c | 43 ++---
drivers/usb/gadget/storage_common.c |3 +--
include/usb_mass_storage.h | 33 ---
5 files changed, 73 insertions(+), 84 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 58d925f..0b58b00 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -774,63 +774,54 @@ void init_panel_info(vidinfo_t *vid)
}
#ifdef CONFIG_USB_GADGET_MASS_STORAGE
-static int ums_read_sector(struct ums_device *ums_dev,
+static int ums_read_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, void *buf)
{
- if (ums_dev->mmc->block_dev.block_read(ums_dev->dev_num,
- start + ums_dev->offset, blkcnt, buf) != blkcnt)
- return -1;
+ block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
+ lbaint_t blkstart = start + ums_dev->offset;
+ int dev_num = block_dev->dev;
- return 0;
+ return block_dev->block_read(dev_num, blkstart, blkcnt, buf);
}
-static int ums_write_sector(struct ums_device *ums_dev,
+static int ums_write_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, const void *buf)
{
- if (ums_dev->mmc->block_dev.block_write(ums_dev->dev_num,
- start + ums_dev->offset, blkcnt, buf) != blkcnt)
- return -1;
+ block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
+ lbaint_t blkstart = start + ums_dev->offset;
+ int dev_num = block_dev->dev;
- return 0;
+ return block_dev->block_write(dev_num, blkstart, blkcnt, buf);
}
-static void ums_get_capacity(struct ums_device *ums_dev,
-long long int *capacity)
+static void ums_get_capacity(struct ums *ums_dev, long long int *capacity)
{
long long int tmp_capacity;
- tmp_capacity = (long long int) ((ums_dev->offset + ums_dev->part_size)
- * SECTOR_SIZE);
+ tmp_capacity = (long long int)((ums_dev->offset + ums_dev->part_size)
+ * SECTOR_SIZE);
*capacity = ums_dev->mmc->capacity - tmp_capacity;
}
-static struct ums_board_info ums_board = {
+static struct ums ums_dev = {
.read_sector = ums_read_sector,
.write_sector = ums_write_sector,
.get_capacity = ums_get_capacity,
- .name = "TRATS UMS disk",
- .ums_dev = {
- .mmc = NULL,
- .dev_num = 0,
- .offset = 0,
- .part_size = 0.
- },
+ .name = "UMS disk",
+ .offset = UMS_START_SECTOR,
+ .part_size = UMS_NUM_SECTORS,
};
-struct ums_board_info *board_ums_init(unsigned int dev_num, unsigned int
offset,
- unsigned int part_size)
+struct ums *ums_init(unsigned int dev_num)
{
- struct mmc *mmc;
+ struct mmc *mmc = NULL;
mmc = find_mmc_device(dev_num);
if (!mmc)
return NULL;
- ums_board.ums_dev.mmc = mmc;
- ums_board.ums_dev.dev_num = dev_num;
- ums_board.ums_dev.offset = offset;
- ums_board.ums_dev.part_size = part_size;
+ ums_dev.mmc = mmc;
- return &ums_board;
+ return &ums_dev;
}
#endif
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index f583caf..f6ceba7 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -22,28 +22,26 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
unsigned int dev_num = (unsigned int)(simple_strtoul(mmc_devstring,
NULL, 0));
- if (dev_num) {
- error("Set eMMC device to 0! - e.g. ums 0");
- goto fail;
- }
+ if (dev_num)
+ return CMD_RET_USAGE;
unsigned int controller_index = (unsigned int)(simple_strtoul(
[U-Boot] [PATCH v2 0/5] USB: UMS: code refactoring and usage improvement
Quick summary: - introduce board definable parameters: UMS_START_BLOCK and UMS_PART_SIZE - remove ums unnecessary code - move ums structures to just one generic ums structure - add mmc device num as one of ums parameter - fix ums capacity miscalculation - move ums initialization code to Samsung common - add function usb_cable_connected() which depends on CONFIG_USB_CABLE_CHECK - add ums exit feature by ctrl+c or cable detachment Thank you, Przemyslaw Marczak Przemyslaw Marczak (5): usb: ums: code refactoring to improve reusability on other boards. usb: ums: allows using every mmc device with ums. usb: ums: fix disk capacity miscalculation and code cleanup usb: ums: move ums code from trats to Samsung common directory usb: ums: add ums exit feature by ctrl+c or by detach usb cable README |7 board/samsung/common/Makefile |1 + board/samsung/common/ums.c | 76 +++ board/samsung/trats/trats.c | 62 common/cmd_usb_mass_storage.c | 51 +++ drivers/usb/gadget/f_mass_storage.c | 67 +++--- drivers/usb/gadget/storage_common.c | 27 ++--- include/configs/trats.h |2 - include/usb.h | 10 + include/usb_mass_storage.h | 33 +++ 10 files changed, 180 insertions(+), 156 deletions(-) create mode 100644 board/samsung/common/ums.c -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] boards.cfg: remove trailing whitespace
Commit 93e14596 "Coding Style cleanup: replace leading SPACEs by TABs" added trailing whitespace to a single line of boards.cfg. I presume this was unintentional, and it causes the file to change after running it through the reformat.py script. Remove the offending character. Signed-off-by: Paul Burton --- boards.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.cfg b/boards.cfg index 2305087..5a774d4 100644 --- a/boards.cfg +++ b/boards.cfg @@ -196,7 +196,7 @@ Active arm arm926ejs mb86r0x syteco jadecpu Active arm arm926ejs mx25freescale mx25pdk mx25pdk mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg Fabio Estevam Active arm arm926ejs mx25karotx25 tx25 - John Rigby Active arm arm926ejs mx25syteco zmx25 zmx25- Matthias Weisser -Active arm arm926ejs mx27armadeusapf27 apf27- Philippe Reynes :Eric Jarrige +Active arm arm926ejs mx27armadeusapf27 apf27- Philippe Reynes :Eric Jarrige Active arm arm926ejs mx27logicpd imx27lite imx27lite- Wolfgang Denk Active arm arm926ejs mx27logicpd imx27lite magnesium- Heiko Schocher Active arm arm926ejs mxs bluegigaapx4devkit apx4devkit apx4devkit Lauri Hintsala -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 15/15] malta: add myself to maintainers
This patch adds me as a maintainer of the malta(el) board(s). I have access to physical Malta boards and the desire for U-boot to run well on them. Signed-off-by: Paul Burton --- boards.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/boards.cfg b/boards.cfg index 60b3f8b..2305087 100644 --- a/boards.cfg +++ b/boards.cfg @@ -480,8 +480,8 @@ Active m68kmcf547x_8x - freescale m548xevb Active m68kmcf547x_8x - freescale m548xevb M5485GFE M5485EVB:SYS_BUSCLK=1,SYS_BOOTSZ=4,SYS_DRAMSZ=64 TsiChung Liew Active m68kmcf547x_8x - freescale m548xevb M5485HFE M5485EVB:SYS_BUSCLK=1,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO TsiChung Liew Active microblaze microblaze - xilinx microblaze-generic microblaze-generic - Michal Simek -Active mipsmips32 - - malta maltamalta:MIPS32,SYS_BIG_ENDIAN - -Active mipsmips32 - - malta maltael malta:MIPS32,SYS_LITTLE_ENDIAN - +Active mipsmips32 - - malta maltamalta:MIPS32,SYS_BIG_ENDIAN Paul Burton +Active mipsmips32 - - malta maltael malta:MIPS32,SYS_LITTLE_ENDIAN Paul Burton Active mipsmips32 - - qemu-mips qemu_mipsqemu-mips:SYS_BIG_ENDIAN Vlad Lungu Active mipsmips32 - - qemu-mips qemu_mipsel qemu-mips:SYS_LITTLE_ENDIAN - Active mipsmips32 - micronasvct vct_platinum vct:VCT_PLATINUM - -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 13/15] malta: disable L2 caches
Malta boards may be used with cores which support L2 caches, however U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll disable L2 caches by setting the L2B bit in Config2. This is specific to MTI/Imagination MIPS cores which is why this is done for the Malta board rather than generically. Signed-off-by: Paul Burton --- board/malta/lowlevel_init.S | 7 +++ 1 file changed, 7 insertions(+) diff --git a/board/malta/lowlevel_init.S b/board/malta/lowlevel_init.S index 1af34f1..ae09c27 100644 --- a/board/malta/lowlevel_init.S +++ b/board/malta/lowlevel_init.S @@ -12,6 +12,7 @@ #include #include #include +#include #ifdef CONFIG_SYS_BIG_ENDIAN #define CPU_TO_GT32(_x)((_x)) @@ -27,6 +28,12 @@ .globl lowlevel_init lowlevel_init: + /* disable any L2 cache for now */ + sync + mfc0t0, CP0_CONFIG, 2 + ori t0, t0, 0x1 << 12 + mtc0t0, CP0_CONFIG, 2 + /* detect the core card */ li t0, KSEG1ADDR(MALTA_REVISION) lw t0, 0(t0) -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 14/15] malta: add script & instructions to flash U-boot
This patch adds a script which may be used with MIPS Navigator Console
and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta
development board.
Please see the newly added board/malta/README for usage instructions.
Signed-off-by: Paul Burton
---
board/malta/README | 16
board/malta/flash-malta-boot.tcl | 40
2 files changed, 56 insertions(+)
create mode 100644 board/malta/README
create mode 100644 board/malta/flash-malta-boot.tcl
diff --git a/board/malta/README b/board/malta/README
new file mode 100644
index 000..a495d02
--- /dev/null
+++ b/board/malta/README
@@ -0,0 +1,16 @@
+MIPS Malta board
+
+How to flash using a MIPS Navigator Probe:
+
+ - Ensure that your Malta has jumper JP1 fitted. Without this jumper you will
+be unable to flash your Malta using a Navigator Probe.
+
+ - Connect Navigator Console to your probe and Malta as usual.
+
+ - Within Navigator Console run the following commands:
+
+ source /path/to/u-boot/board/malta/flash-malta-boot.tcl
+ reset
+ flash-boot /path/to/u-boot/u-boot.bin
+
+ - You should now be able to reboot your Malta to a U-boot shell.
diff --git a/board/malta/flash-malta-boot.tcl b/board/malta/flash-malta-boot.tcl
new file mode 100644
index 000..0eedf07
--- /dev/null
+++ b/board/malta/flash-malta-boot.tcl
@@ -0,0 +1,40 @@
+#
+# Copyright (C) 2013 Imagination Technologies
+#
+# Programs a MIPS Malta boot flash with a flat binary image.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+proc flash-boot { binfile } {
+ puts "flash monitor binary $binfile"
+ config Coherent on
+ config CoherencyDuringLoad on
+
+ if {[endian]=="big"} {
+puts "CPU in BE mode"
+flash device sharp_16x32_be;
+ } else {
+puts "CPU in LE mode"
+flash device sharp_16x32;
+ }
+
+ flash clear all;
+ flash set 0xBE00..0xBE0F
+ flash erase sector 0xbe00;
+ flash erase sector 0xbe02;
+ flash erase sector 0xbe04;
+ flash erase sector 0xbe06;
+ flash erase sector 0xbe08;
+ flash erase sector 0xbe0a;
+ flash erase sector 0xbe0c;
+ flash erase sector 0xbe0e;
+ puts "finished erasing boot flash";
+
+ puts "programming flash, please be patient"
+ load bin 0xbe00 $binfile size4
+
+ flash clear all
+ config CoherencyDuringLoad off
+ puts "finished programming boot flash";
+}
--
1.8.4
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[U-Boot] [PATCH 12/15] malta: remove cache size definitions
These will now be detected at runtime, allowing a single U-boot configuration to function correctly with different bitstreams. Without this you may need to re-configure, re-build and re-flash U-boot to your Malta if you flash a new bitstream with a different cache configuration to your old bitstream. Signed-off-by: Paul Burton --- include/configs/malta.h | 4 1 file changed, 4 deletions(-) diff --git a/include/configs/malta.h b/include/configs/malta.h index 23a781e..19acf3a 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -30,10 +30,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 100) #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_DCACHE_SIZE 16384 /* arbitrary value */ -#define CONFIG_SYS_ICACHE_SIZE 16384 /* arbitrary value */ -#define CONFIG_SYS_CACHELINE_SIZE 32 /* arbitrary value */ - #define CONFIG_SWAP_IO_SPACE /* -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 10/15] malta: display "U-boot" on the LCD screen
Displaying a message on the LCD screen is a simple yet effective way to
show the user that the board has booted successfully.
Signed-off-by: Paul Burton
---
arch/mips/include/asm/malta.h | 10 ++
board/malta/malta.c | 19 +++
2 files changed, 29 insertions(+)
diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h
index 0b50a66..d8ec57c 100644
--- a/arch/mips/include/asm/malta.h
+++ b/arch/mips/include/asm/malta.h
@@ -32,6 +32,16 @@
#define MALTA_MSC01_PCIIO_MAP 0x
#define MALTA_MSC01_UART0_BASE (MALTA_MSC01_PCIIO_BASE + 0x3f8)
+#define MALTA_ASCIIWORD0x1f000410
+#define MALTA_ASCIIPOS00x1f000418
+#define MALTA_ASCIIPOS10x1f000420
+#define MALTA_ASCIIPOS20x1f000428
+#define MALTA_ASCIIPOS30x1f000430
+#define MALTA_ASCIIPOS40x1f000438
+#define MALTA_ASCIIPOS50x1f000440
+#define MALTA_ASCIIPOS60x1f000448
+#define MALTA_ASCIIPOS70x1f000450
+
#define MALTA_RESET_BASE 0x1f000500
#define GORESET0x42
diff --git a/board/malta/malta.c b/board/malta/malta.c
index 96c6f23..d876507 100644
--- a/board/malta/malta.c
+++ b/board/malta/malta.c
@@ -29,6 +29,24 @@ enum sys_con {
SYSCON_MSC01,
};
+static void malta_lcd_puts(const char *str)
+{
+ int i;
+ void *reg = (void *)CKSEG1ADDR(MALTA_ASCIIPOS0);
+
+ /* print up to 8 characters of the string */
+ for (i = 0; i < min(strlen(str), 8); i++) {
+ __raw_writel(str[i], reg);
+ reg += MALTA_ASCIIPOS1 - MALTA_ASCIIPOS0;
+ }
+
+ /* fill the rest of the display with spaces */
+ for (; i < 8; i++) {
+ __raw_writel(' ', reg);
+ reg += MALTA_ASCIIPOS1 - MALTA_ASCIIPOS0;
+ }
+}
+
static enum core_card malta_core_card(void)
{
u32 corid, rev;
@@ -71,6 +89,7 @@ int checkboard(void)
{
enum core_card core;
+ malta_lcd_puts("U-boot");
puts("Board: MIPS Malta");
core = malta_core_card();
--
1.8.4
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[U-Boot] [PATCH 11/15] malta: enable CONFIG_PCNET_79C973, PCNET_HAS_PROM, CONFIG_CMD_DHCP
This model of the pcnet is used in current Malta boards, at least in the Malta-R rev 3. Enable support for it. The Malta also has the ethernet controller PROM containing its MAC address, so enable support for that in order to read that MAC address. DHCP is a very useful feature to have available for many networks, enable support for it also. Signed-off-by: Paul Burton --- include/configs/malta.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/malta.h b/include/configs/malta.h index e347b38..23a781e 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -20,6 +20,8 @@ #define CONFIG_PCI_MSC01 #define CONFIG_PCI_PNP #define CONFIG_PCNET +#define CONFIG_PCNET_79C973 +#define PCNET_HAS_PROM /* * CPU Configuration @@ -108,6 +110,7 @@ #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_NFS +#define CONFIG_CMD_DHCP #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/15] malta: support for coreFPGA6 boards
This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU, which seems to be broken but boots as far as it did before this patch (including correctly printing CoreLV on serial). Signed-off-by: Paul Burton --- arch/mips/include/asm/malta.h | 35 +++-- board/malta/lowlevel_init.S | 164 +- board/malta/malta.c | 124 ++-- drivers/pci/Makefile | 1 + drivers/pci/pci_msc01.c | 126 include/configs/malta.h | 4 +- include/msc01.h | 135 ++ include/pci_ids.h | 3 + include/pci_msc01.h | 17 + 9 files changed, 594 insertions(+), 15 deletions(-) create mode 100644 drivers/pci/pci_msc01.c create mode 100644 include/msc01.h create mode 100644 include/pci_msc01.h diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h index d4d44a2..0b50a66 100644 --- a/arch/mips/include/asm/malta.h +++ b/arch/mips/include/asm/malta.h @@ -9,15 +9,38 @@ #ifndef _MIPS_ASM_MALTA_H #define _MIPS_ASM_MALTA_H -#define MALTA_IO_PORT_BASE 0x1800 +#define MALTA_GT_BASE 0x1be0 +#define MALTA_GT_PCIIO_BASE0x1800 +#define MALTA_GT_UART0_BASE(MALTA_GT_PCIIO_BASE + 0x3f8) -#define MALTA_UART_BASE(MALTA_IO_PORT_BASE + 0x3f8) +#define MALTA_MSC01_BIU_BASE 0x1bc8 +#define MALTA_MSC01_PCI_BASE 0x1bd0 +#define MALTA_MSC01_PBC_BASE 0x1bd4 +#define MALTA_MSC01_IP1_BASE 0x1bc0 +#define MALTA_MSC01_IP1_SIZE 0x0040 +#define MALTA_MSC01_IP2_BASE1 0x1000 +#define MALTA_MSC01_IP2_SIZE1 0x0800 +#define MALTA_MSC01_IP2_BASE2 0x1800 +#define MALTA_MSC01_IP2_SIZE2 0x0400 +#define MALTA_MSC01_IP3_BASE 0x1c00 +#define MALTA_MSC01_IP3_SIZE 0x0400 +#define MALTA_MSC01_PCIMEM_BASE0x1000 +#define MALTA_MSC01_PCIMEM_SIZE0x1000 +#define MALTA_MSC01_PCIMEM_MAP 0x1000 +#define MALTA_MSC01_PCIIO_BASE 0x1b00 +#define MALTA_MSC01_PCIIO_SIZE 0x0080 +#define MALTA_MSC01_PCIIO_MAP 0x +#define MALTA_MSC01_UART0_BASE (MALTA_MSC01_PCIIO_BASE + 0x3f8) -#define MALTA_GT_BASE 0x1be0 +#define MALTA_RESET_BASE 0x1f000500 +#define GORESET0x42 -#define MALTA_RESET_BASE 0x1f000500 -#define GORESET0x42 +#define MALTA_FLASH_BASE 0x1fc0 -#define MALTA_FLASH_BASE 0x1fc0 +#define MALTA_REVISION 0x1fc00010 +#define MALTA_REVISION_CORID_SHF 10 +#define MALTA_REVISION_CORID_MSK (0x3f << MALTA_REVISION_CORID_SHF) +#define MALTA_REVISION_CORID_CORE_LV 1 +#define MALTA_REVISION_CORID_CORE_FPGA614 #endif /* _MIPS_ASM_MALTA_H */ diff --git a/board/malta/lowlevel_init.S b/board/malta/lowlevel_init.S index fa0b6a7..1af34f1 100644 --- a/board/malta/lowlevel_init.S +++ b/board/malta/lowlevel_init.S @@ -6,6 +6,8 @@ #include #include +#include +#include #include #include @@ -25,6 +27,25 @@ .globl lowlevel_init lowlevel_init: + /* detect the core card */ + li t0, KSEG1ADDR(MALTA_REVISION) + lw t0, 0(t0) + srl t0, t0, MALTA_REVISION_CORID_SHF + andit0, t0, (MALTA_REVISION_CORID_MSK >> \ +MALTA_REVISION_CORID_SHF) + + /* core cards using the gt64120 system controller */ + li t1, MALTA_REVISION_CORID_CORE_LV + beq t0, t1, _gt64120 + + /* core cards using the MSC01 system controller */ +li t1, MALTA_REVISION_CORID_CORE_FPGA6 + beq t0, t1, _msc01 +nop + + /* unknown system controller */ + b . +nop /* * Load BAR registers of GT64120 as done by YAMON @@ -39,7 +60,7 @@ lowlevel_init: * based on write_bootloader() in qemu.git/hw/mips_malta.c * see GT64120 manual and qemu.git/hw/gt64xxx.c for details */ - +_gt64120: /* move GT64120 registers from 0x1400
[U-Boot] [PATCH 07/15] qemu-malta: rename to just "malta"
This is in preparation for adapting this board to function correctly on
a physical MIPS Malta board.
Signed-off-by: Paul Burton
---
arch/mips/lib/bootm.c| 12 ++---
board/malta/Makefile | 29 ++
board/malta/lowlevel_init.S | 69
board/malta/malta.c | 47
board/qemu-malta/Makefile| 29 --
board/qemu-malta/lowlevel_init.S | 69
board/qemu-malta/qemu-malta.c| 47
boards.cfg | 4 +-
include/configs/malta.h | 114 +++
include/configs/qemu-malta.h | 114 ---
10 files changed, 267 insertions(+), 267 deletions(-)
create mode 100644 board/malta/Makefile
create mode 100644 board/malta/lowlevel_init.S
create mode 100644 board/malta/malta.c
delete mode 100644 board/qemu-malta/Makefile
delete mode 100644 board/qemu-malta/lowlevel_init.S
delete mode 100644 board/qemu-malta/qemu-malta.c
create mode 100644 include/configs/malta.h
delete mode 100644 include/configs/qemu-malta.h
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 66340ea..1febf29 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -17,10 +17,10 @@ DECLARE_GLOBAL_DATA_PTR;
#defineLINUX_MAX_ENVS 256
#defineLINUX_MAX_ARGS 256
-#if defined(CONFIG_QEMU_MALTA)
-#define mips_boot_qemu_malta 1
+#if defined(CONFIG_MALTA)
+#define mips_boot_malta1
#else
-#define mips_boot_qemu_malta 0
+#define mips_boot_malta0
#endif
static int linux_argc;
@@ -139,7 +139,7 @@ static void linux_env_set(const char *env_name, const char
*env_val)
strcpy(linux_env_p, env_name);
linux_env_p += strlen(env_name);
- if (mips_boot_qemu_malta) {
+ if (mips_boot_malta) {
linux_env_p++;
linux_env[++linux_env_idx] = linux_env_p;
} else {
@@ -196,7 +196,7 @@ static void boot_prep_linux(bootm_headers_t *images)
if (cp)
linux_env_set("eth1addr", cp);
- if (mips_boot_qemu_malta)
+ if (mips_boot_malta)
linux_env_set("modetty0", "38400n8r");
}
@@ -210,7 +210,7 @@ static void boot_jump_linux(bootm_headers_t *images)
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
- if (mips_boot_qemu_malta)
+ if (mips_boot_malta)
linux_extra = gd->ram_size;
/* we assume that the kernel is in place */
diff --git a/board/malta/Makefile b/board/malta/Makefile
new file mode 100644
index 000..7060341
--- /dev/null
+++ b/board/malta/Makefile
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS = $(BOARD).o
+SOBJS = lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/malta/lowlevel_init.S b/board/malta/lowlevel_init.S
new file mode 100644
index 000..fa0b6a7
--- /dev/null
+++ b/board/malta/lowlevel_init.S
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2013 Gabor Juhos
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+
+#ifdef CONFIG_SYS_BIG_ENDIAN
+#define CPU_TO_GT32(_x)((_x))
+#else
+#define CPU_TO_GT32(_x) ( \
+ (((_x) & 0xff) << 24) | (((_x) & 0xff00) << 8) |\
+ (((_x) & 0xff) >> 8) | (((_x) & 0xff00) >> 24))
+#endif
+
+ .text
+ .set noreorder
+ .set mips32
+
+ .globl lowlevel_init
+lowlevel_init:
+
+ /*
+* Load BAR registers of GT64120 as done by YAMON
+*
+* based on a patch sent by Antony Pavlov
+* to the barebox mailing list.
+* The subject of the original patch:
+* 'MIPS: qemu-malta: add YAMON-style GT64120 memory map'
+* URL:
+* http://www.mail-archive.com/barebox@lists.infradead.org/msg06128.html
+*
+* based on write_bootloader() in qemu.git/hw/mips_malta.c
+* see GT64120 manual and qemu.git/hw/gt64xxx.c for details
+*/
+
+ /* move GT64120 registers from 0x1400 to 0x1be0 */
+ li t1, KSEG1ADDR(GT_DEF_BASE)
+ li t0, CPU_TO_GT32(0xdf00)
+ sw t0, GT_ISD_OFS(t1)
+
+ /* setup MEM-to-PCI0 mapping */
+
[U-Boot] [PATCH 05/15] pcnet: enable the NOUFLO feature
On relatively slow boards (such as the MIPS Malta with an FPGA core card) it can be extremely common for transmits to underflow - to the point where it appears they simply do not work at all. Setting the NOUFLO bit causes the ethernet controller to not begin transmission on the wire until a transmit start point is reached. Setting that transmit start point to the full packet will cause the controller to only transmit the packet once it has buffered it entirely thus preventing any transmit underflows from occuring and allowing the controller to function on slower boards. Signed-off-by: Paul Burton --- drivers/net/pcnet.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c index 7b87660..5b248be 100644 --- a/drivers/net/pcnet.c +++ b/drivers/net/pcnet.c @@ -312,6 +312,21 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis) pcnet_write_bcr(dev, 32, val); /* +* Enable NOUFLO on supported controllers, with the transmit +* start point set to the full packet. This will cause entire +* packets to be buffered by the ethernet controller before +* transmission, eliminating underflows which are common on +* slower devices. Controllers which do not support NOUFLO will +* simply be left with a larger transmit FIFO threshold. +*/ + val = pcnet_read_bcr(dev, 18); + val |= 1 << 11; + pcnet_write_bcr(dev, 18, val); + val = pcnet_read_csr(dev, 80); + val |= 0x3 << 10; + pcnet_write_csr(dev, 80, val); + + /* * We only maintain one structure because the drivers will never * be used concurrently. In 32bit mode the RX and TX ring entries * must be aligned on 16-byte boundaries. -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/15] pci.h: allow inclusion in assembly source
This patch simply #ifdef's out the C-specific parts of pci.h when it is included by an assembly file. This will allow the macros it contains to be used from assembly source as will be done in a followup commit adding support for more modern MIPS Malta boards. Signed-off-by: Paul Burton --- include/pci.h | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/pci.h b/include/pci.h index 911ba89..cf1046d 100644 --- a/include/pci.h +++ b/include/pci.h @@ -414,6 +414,8 @@ #include +#ifndef __ASSEMBLY__ + #ifdef CONFIG_SYS_PCI_64BIT typedef u64 pci_addr_t; typedef u64 pci_size_t; @@ -657,4 +659,6 @@ extern void pci_mpc824x_init (struct pci_controller *hose); #ifdef CONFIG_MPC85xx extern void pci_mpc85xx_init (struct pci_controller *hose); #endif -#endif /* _PCI_H */ + +#endif /* __ASSEMBLY__ */ +#endif /* _PCI_H */ -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/15] malta: setup super I/O UARTs
On a real Malta the Super I/O needs to be configured before we are able
to access the UARTs. This patch performs that configuration, setting up
the UARTs in the same way that YAMON would.
Signed-off-by: Paul Burton
---
board/malta/Makefile | 2 +-
board/malta/malta.c | 10
board/malta/superio.c | 63 +++
board/malta/superio.h | 15
4 files changed, 89 insertions(+), 1 deletion(-)
create mode 100644 board/malta/superio.c
create mode 100644 board/malta/superio.h
diff --git a/board/malta/Makefile b/board/malta/Makefile
index 7060341..e3ee08a 100644
--- a/board/malta/Makefile
+++ b/board/malta/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS = $(BOARD).o
+COBJS = $(BOARD).o superio.o
SOBJS = lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/malta/malta.c b/board/malta/malta.c
index 7eddf1c..09da9ea 100644
--- a/board/malta/malta.c
+++ b/board/malta/malta.c
@@ -12,6 +12,8 @@
#include
#include
+#include "superio.h"
+
phys_size_t initdram(int board_type)
{
return CONFIG_SYS_MEM_SIZE;
@@ -36,6 +38,14 @@ void _machine_restart(void)
__raw_writel(GORESET, reset_base);
}
+int board_early_init_f(void)
+{
+ /* setup FDC37M817 super I/O controller */
+ malta_superio_init((void *)CKSEG1ADDR(MALTA_IO_PORT_BASE));
+
+ return 0;
+}
+
void pci_init_board(void)
{
set_io_port_base(CKSEG1ADDR(MALTA_IO_PORT_BASE));
diff --git a/board/malta/superio.c b/board/malta/superio.c
new file mode 100644
index 000..eaa14df
--- /dev/null
+++ b/board/malta/superio.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2013 Imagination Technologies
+ * Author: Paul Burton
+ *
+ * Setup code for the FDC37M817 super I/O controller
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+
+#define SIO_CONF_PORT 0x3f0
+#define SIO_DATA_PORT 0x3f1
+
+enum sio_conf_key {
+ SIOCONF_DEVNUM = 0x07,
+ SIOCONF_ACTIVATE= 0x30,
+ SIOCONF_ENTER_SETUP = 0x55,
+ SIOCONF_BASE_HIGH = 0x60,
+ SIOCONF_BASE_LOW= 0x61,
+ SIOCONF_PRIMARY_INT = 0x70,
+ SIOCONF_EXIT_SETUP = 0xaa,
+ SIOCONF_MODE= 0xf0,
+};
+
+static struct {
+ u8 key;
+ u8 data;
+} sio_config[] = {
+ /* tty0 */
+ { SIOCONF_DEVNUM, 0x04 },
+ { SIOCONF_BASE_HIGH,0x03 },
+ { SIOCONF_BASE_LOW, 0xf8 },
+ { SIOCONF_MODE, 0x02 },
+ { SIOCONF_PRIMARY_INT, 0x04 },
+ { SIOCONF_ACTIVATE, 0x01 },
+
+ /* tty1 */
+ { SIOCONF_DEVNUM, 0x05 },
+ { SIOCONF_BASE_HIGH,0x02 },
+ { SIOCONF_BASE_LOW, 0xf8 },
+ { SIOCONF_MODE, 0x02 },
+ { SIOCONF_PRIMARY_INT, 0x03 },
+ { SIOCONF_ACTIVATE, 0x01 },
+};
+
+void malta_superio_init(void *io_base)
+{
+ unsigned i;
+
+ /* enter config state */
+ writeb(SIOCONF_ENTER_SETUP, io_base + SIO_CONF_PORT);
+
+ /* configure peripherals */
+ for (i = 0; i < ARRAY_SIZE(sio_config); i++) {
+ writeb(sio_config[i].key, io_base + SIO_CONF_PORT);
+ writeb(sio_config[i].data, io_base + SIO_DATA_PORT);
+ }
+
+ /* exit config state */
+ writeb(SIOCONF_EXIT_SETUP, io_base + SIO_CONF_PORT);
+}
diff --git a/board/malta/superio.h b/board/malta/superio.h
new file mode 100644
index 000..1450da5
--- /dev/null
+++ b/board/malta/superio.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2013 Imagination Technologies
+ * Author: Paul Burton
+ *
+ * Setup code for the FDC37M817 super I/O controller
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __BOARD_MALTA_SUPERIO_H__
+#define __BOARD_MALTA_SUPERIO_H__
+
+extern void malta_superio_init(void *io_base);
+
+#endif /* __BOARD_MALTA_SUPERIO_H__ */
--
1.8.4
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 00/15] MIPS Malta board support
This series adds support for booting on a physical MIPS Malta board using a coreFPGA6 core card. The first 6 patches lay some groundwork, then the next 8 genericise the existing qemu-malta board to also function on a physical Malta. In the final patch I stake my claim upon, errm I mean step up to support :), the malta(el) board(s). Paul Burton (15): mips32: detect L1 cache sizes if they're not defined pcnet: code style cleanup pcnet: s/le16_to_cpu/cpu_to_le16/ in pcnet_send pcnet: add cache flushing & invalidation pcnet: enable the NOUFLO feature pci.h: allow inclusion in assembly source qemu-malta: rename to just "malta" malta: setup super I/O UARTs malta: support for coreFPGA6 boards malta: display "U-boot" on the LCD screen malta: enable CONFIG_PCNET_79C973, PCNET_HAS_PROM, CONFIG_CMD_DHCP malta: remove cache size definitions malta: disable L2 caches malta: add script & instructions to flash U-boot malta: add myself to maintainers arch/mips/cpu/mips32/cache.S | 90 +++-- arch/mips/cpu/mips32/cpu.c | 73 +- arch/mips/include/asm/malta.h| 45 ++- arch/mips/include/asm/mipsregs.h | 6 + arch/mips/lib/bootm.c| 12 +- board/malta/Makefile | 29 board/malta/README | 16 +++ board/malta/flash-malta-boot.tcl | 40 ++ board/malta/lowlevel_init.S | 238 + board/malta/malta.c | 186 ++ board/malta/superio.c| 63 + board/malta/superio.h| 15 +++ board/qemu-malta/Makefile| 29 board/qemu-malta/lowlevel_init.S | 69 -- board/qemu-malta/qemu-malta.c| 47 --- boards.cfg | 4 +- drivers/net/pcnet.c | 279 +-- drivers/pci/Makefile | 1 + drivers/pci/pci_msc01.c | 126 ++ include/configs/malta.h | 115 include/configs/qemu-malta.h | 114 include/msc01.h | 135 +++ include/pci.h| 6 +- include/pci_ids.h| 3 + include/pci_msc01.h | 17 +++ 25 files changed, 1340 insertions(+), 418 deletions(-) create mode 100644 board/malta/Makefile create mode 100644 board/malta/README create mode 100644 board/malta/flash-malta-boot.tcl create mode 100644 board/malta/lowlevel_init.S create mode 100644 board/malta/malta.c create mode 100644 board/malta/superio.c create mode 100644 board/malta/superio.h delete mode 100644 board/qemu-malta/Makefile delete mode 100644 board/qemu-malta/lowlevel_init.S delete mode 100644 board/qemu-malta/qemu-malta.c create mode 100644 drivers/pci/pci_msc01.c create mode 100644 include/configs/malta.h delete mode 100644 include/configs/qemu-malta.h create mode 100644 include/msc01.h create mode 100644 include/pci_msc01.h -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 04/15] pcnet: add cache flushing & invalidation
Ensure that the view of memory from the CPU & the ethernet controller is
coherent at the various points where they exchange data. This prevents
stale data from being transmitted or received, and prevents the driver
from getting stuck waiting for the ethernet controller to update
descriptors when in reality it has but the old values are being read
from cache.
Signed-off-by: Paul Burton
---
drivers/net/pcnet.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 843a6fc..7b87660 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -364,6 +364,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
RX_RING_LEN_BITS);
lp->init_block.rx_ring = PCI_TO_MEM_LE(dev, lp->rx_ring);
lp->init_block.tx_ring = PCI_TO_MEM_LE(dev, lp->tx_ring);
+ flush_dcache_range((unsigned long)lp, (unsigned long)&lp->rx_buf);
PCNET_DEBUG1("\ntlen_rlen=0x%x rx_ring=0x%x tx_ring=0x%x\n",
lp->init_block.tlen_rlen,
@@ -407,8 +408,13 @@ static int pcnet_send(struct eth_device *dev, void
*packet, int pkt_len)
PCNET_DEBUG2("Tx%d: %d bytes from 0x%p ", lp->cur_tx, pkt_len,
packet);
+ flush_dcache_range((unsigned long)packet,
+ (unsigned long)packet + pkt_len);
+
/* Wait for completion by testing the OWN bit */
for (i = 1000; i > 0; i--) {
+ invalidate_dcache_range((unsigned long)entry,
+ (unsigned long)entry + sizeof(*entry));
status = le16_to_cpu(entry->status);
if ((status & 0x8000) == 0)
break;
@@ -431,6 +437,8 @@ static int pcnet_send(struct eth_device *dev, void *packet,
int pkt_len)
entry->misc = 0x;
entry->base = PCI_TO_MEM_LE(dev, packet);
entry->status = cpu_to_le16(status);
+ flush_dcache_range((unsigned long)entry,
+ (unsigned long)entry + sizeof(*entry));
/* Trigger an immediate send poll. */
pcnet_write_csr(dev, 0, 0x0008);
@@ -451,6 +459,8 @@ static int pcnet_recv (struct eth_device *dev)
while (1) {
entry = &lp->rx_ring[lp->cur_rx];
+ invalidate_dcache_range((unsigned long)entry,
+ (unsigned long)entry + sizeof(*entry));
/*
* If we own the next entry, it's a new packet. Send it up.
*/
@@ -479,6 +489,10 @@ static int pcnet_recv (struct eth_device *dev)
printf("%s: Rx%d: invalid packet length %d\n",
dev->name, lp->cur_rx, pkt_len);
} else {
+ invalidate_dcache_range(
+ (unsigned long)lp->rx_buf[lp->cur_rx],
+ (unsigned long)lp->rx_buf[lp->cur_rx] +
+ pkt_len);
NetReceive(lp->rx_buf[lp->cur_rx], pkt_len);
PCNET_DEBUG2("Rx%d: %d bytes from 0x%p\n",
lp->cur_rx, pkt_len,
@@ -486,6 +500,8 @@ static int pcnet_recv (struct eth_device *dev)
}
}
entry->status |= cpu_to_le16(0x8000);
+ flush_dcache_range((unsigned long)entry,
+ (unsigned long)entry + sizeof(*entry));
if (++lp->cur_rx >= RX_RING_SIZE)
lp->cur_rx = 0;
--
1.8.4
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[U-Boot] [PATCH 01/15] mips32: detect L1 cache sizes if they're not defined
For boards such as the MIPS Malta with an FPGA core card it is desirable
to be able to detect the L1 cache sizes at runtime, since they are not
dependant upon the board but on the FPGA bitstream in use. This patch
performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
not defined by the board configuration. In cases where the sizes are
detected this patch also removes the restriction that the I-cache &
D-cache line sizes must be the same, as this is not necessarily true.
If the cache sizes are defined by a configuration then they will be
hardcoded as before, so this patch will not add overhead to such
boards.
Signed-off-by: Paul Burton
---
arch/mips/cpu/mips32/cache.S | 90 ++--
arch/mips/cpu/mips32/cpu.c | 73 +---
arch/mips/include/asm/mipsregs.h | 6 +++
3 files changed, 150 insertions(+), 19 deletions(-)
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index 12f656c..22bd844 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -20,15 +20,6 @@
#define RA t9
-/*
- * 16kB is the maximum size of instruction and data caches on MIPS 4K,
- * 64kB is on 4KE, 24K, 5K, etc. Set bigger size for convenience.
- *
- * Note that the above size is the maximum size of primary cache. U-Boot
- * doesn't have L2 cache support for now.
- */
-#define MIPS_MAX_CACHE_SIZE0x1
-
#define INDEX_BASE CKSEG0
.macro cache_op op addr
@@ -126,12 +117,85 @@ LEAF(mips_init_dcache)
*/
NESTED(mips_cache_reset, 0, ra)
moveRA, ra
- li t2, CONFIG_SYS_ICACHE_SIZE
- li t3, CONFIG_SYS_DCACHE_SIZE
+
+#if !defined(CONFIG_SYS_ICACHE_SIZE) || !defined(CONFIG_SYS_DCACHE_SIZE) || \
+!defined(CONFIG_SYS_CACHELINE_SIZE)
+ /* read Config1 for use below */
+ mfc0t5, CP0_CONFIG, 1
+#endif
+
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+ li t7, CONFIG_SYS_CACHELINE_SIZE
li t8, CONFIG_SYS_CACHELINE_SIZE
+#else
+ /* Detect I-cache line size. */
+ srl t8, t5, MIPS_CONF1_IL_SHIFT
+ andit8, t8, (MIPS_CONF1_IL >> MIPS_CONF1_IL_SHIFT)
+ beqzt8, 1f
+ li t6, 2
+ sllvt8, t6, t8
- li v0, MIPS_MAX_CACHE_SIZE
+1: /* Detect D-cache line size. */
+ srl t7, t5, MIPS_CONF1_DL_SHIFT
+ andit7, t7, (MIPS_CONF1_DL >> MIPS_CONF1_DL_SHIFT)
+ beqzt7, 1f
+ li t6, 2
+ sllvt7, t6, t7
+1:
+#endif
+#ifdef CONFIG_SYS_ICACHE_SIZE
+ li t2, CONFIG_SYS_ICACHE_SIZE
+#else
+ /* Detect I-cache size. */
+ srl t6, t5, MIPS_CONF1_IS_SHIFT
+ andit6, t6, (MIPS_CONF1_IS >> MIPS_CONF1_IS_SHIFT)
+ li t4, 32
+ xorit2, t6, 0x7
+ beqzt2, 1f
+ addit6, t6, 1
+ sllvt4, t4, t6
+1: /* At this point t4 == I-cache sets. */
+ mul t2, t4, t8
+ srl t6, t5, MIPS_CONF1_IA_SHIFT
+ andit6, t6, (MIPS_CONF1_IA >> MIPS_CONF1_IA_SHIFT)
+ addit6, t6, 1
+ /* At this point t6 == I-cache ways. */
+ mul t2, t2, t6
+#endif
+
+#ifdef CONFIG_SYS_DCACHE_SIZE
+ li t3, CONFIG_SYS_DCACHE_SIZE
+#else
+ /* Detect D-cache size. */
+ srl t6, t5, MIPS_CONF1_DS_SHIFT
+ andit6, t6, (MIPS_CONF1_DS >> MIPS_CONF1_DS_SHIFT)
+ li t4, 32
+ xorit3, t6, 0x7
+ beqzt3, 1f
+ addit6, t6, 1
+ sllvt4, t4, t6
+1: /* At this point t4 == I-cache sets. */
+ mul t3, t4, t7
+ srl t6, t5, MIPS_CONF1_DA_SHIFT
+ andit6, t6, (MIPS_CONF1_DA >> MIPS_CONF1_DA_SHIFT)
+ addit6, t6, 1
+ /* At this point t6 == I-cache ways. */
+ mul t3, t3, t6
+#endif
+
+ /* Determine the largest L1 cache size */
+#if defined(CONFIG_SYS_ICACHE_SIZE) && defined(CONFIG_SYS_DCACHE_SIZE)
+#if CONFIG_SYS_ICACHE_SIZE > CONFIG_SYS_DCACHE_SIZE
+ li v0, CONFIG_SYS_ICACHE_SIZE
+#else
+ li v0, CONFIG_SYS_DCACHE_SIZE
+#endif
+#else
+ movev0, t2
+ sltut1, t2, t3
+ movnv0, t3, t1
+#endif
/*
* Now clear that much memory starting from zero.
*/
@@ -163,7 +227,7 @@ NESTED(mips_cache_reset, 0, ra)
* then initialize D-cache.
*/
movea1, t3
- movea2, t8
+ movea2, t7
PTR_LA v1, mips_init_dcache
jalrv1
diff --git a/arch/mips/cpu/mips32/cpu.c b/arch/mips/cpu/mips32/cpu.c
index 28d5c45..278865b 100644
--- a/arch/mips/cpu/mips32/cpu.c
+++ b/arch/mips/cpu/mips32/cpu.c
@@ -34,28 +34,89 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
return 0;
}
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+
+static inline unsigned long icache_line_size(void)
+{
+ return CONFIG_SYS_CACHELINE_SIZE;
+}
+
+static inline unsigned long dcache_line_size(void)
+{
+ return CONFIG_
[U-Boot] [PATCH 02/15] pcnet: code style cleanup
Fix up the code to match Documentation/CodingStyle. This is mostly
removing extraneous spaces.
No functional change is intended.
Signed-off-by: Paul Burton
---
drivers/net/pcnet.c | 248 ++--
1 file changed, 123 insertions(+), 125 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 283cb48..a30a0bc 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -89,39 +89,39 @@ static pcnet_priv_t *lp;
#define PCNET_RESET0x14
#define PCNET_BDP 0x16
-static u16 pcnet_read_csr (struct eth_device *dev, int index)
+static u16 pcnet_read_csr(struct eth_device *dev, int index)
{
- outw (index, dev->iobase + PCNET_RAP);
- return inw (dev->iobase + PCNET_RDP);
+ outw(index, dev->iobase + PCNET_RAP);
+ return inw(dev->iobase + PCNET_RDP);
}
-static void pcnet_write_csr (struct eth_device *dev, int index, u16 val)
+static void pcnet_write_csr(struct eth_device *dev, int index, u16 val)
{
- outw (index, dev->iobase + PCNET_RAP);
- outw (val, dev->iobase + PCNET_RDP);
+ outw(index, dev->iobase + PCNET_RAP);
+ outw(val, dev->iobase + PCNET_RDP);
}
-static u16 pcnet_read_bcr (struct eth_device *dev, int index)
+static u16 pcnet_read_bcr(struct eth_device *dev, int index)
{
- outw (index, dev->iobase + PCNET_RAP);
- return inw (dev->iobase + PCNET_BDP);
+ outw(index, dev->iobase + PCNET_RAP);
+ return inw(dev->iobase + PCNET_BDP);
}
-static void pcnet_write_bcr (struct eth_device *dev, int index, u16 val)
+static void pcnet_write_bcr(struct eth_device *dev, int index, u16 val)
{
- outw (index, dev->iobase + PCNET_RAP);
- outw (val, dev->iobase + PCNET_BDP);
+ outw(index, dev->iobase + PCNET_RAP);
+ outw(val, dev->iobase + PCNET_BDP);
}
-static void pcnet_reset (struct eth_device *dev)
+static void pcnet_reset(struct eth_device *dev)
{
- inw (dev->iobase + PCNET_RESET);
+ inw(dev->iobase + PCNET_RESET);
}
-static int pcnet_check (struct eth_device *dev)
+static int pcnet_check(struct eth_device *dev)
{
- outw (88, dev->iobase + PCNET_RAP);
- return (inw (dev->iobase + PCNET_RAP) == 88);
+ outw(88, dev->iobase + PCNET_RAP);
+ return inw(dev->iobase + PCNET_RAP) == 88;
}
static int pcnet_init (struct eth_device *dev, bd_t * bis);
@@ -139,63 +139,64 @@ static struct pci_device_id supported[] = {
};
-int pcnet_initialize (bd_t * bis)
+int pcnet_initialize(bd_t *bis)
{
pci_dev_t devbusfn;
struct eth_device *dev;
u16 command, status;
int dev_nr = 0;
- PCNET_DEBUG1 ("\npcnet_initialize...\n");
+ PCNET_DEBUG1("\npcnet_initialize...\n");
for (dev_nr = 0;; dev_nr++) {
/*
* Find the PCnet PCI device(s).
*/
- if ((devbusfn = pci_find_devices (supported, dev_nr)) < 0) {
+ devbusfn = pci_find_devices(supported, dev_nr);
+ if (devbusfn < 0)
break;
- }
/*
* Allocate and pre-fill the device structure.
*/
- dev = (struct eth_device *) malloc (sizeof *dev);
+ dev = (struct eth_device *)malloc(sizeof(*dev));
if (!dev) {
printf("pcnet: Can not allocate memory\n");
break;
}
memset(dev, 0, sizeof(*dev));
- dev->priv = (void *) devbusfn;
- sprintf (dev->name, "pcnet#%d", dev_nr);
+ dev->priv = (void *)devbusfn;
+ sprintf(dev->name, "pcnet#%d", dev_nr);
/*
* Setup the PCI device.
*/
- pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
- (unsigned int *) &dev->iobase);
- dev->iobase=pci_io_to_phys (devbusfn, dev->iobase);
+ pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0,
+ (unsigned int *)&dev->iobase);
+ dev->iobase = pci_io_to_phys(devbusfn, dev->iobase);
dev->iobase &= ~0xf;
- PCNET_DEBUG1 ("%s: devbusfn=0x%x iobase=0x%x: ",
- dev->name, devbusfn, dev->iobase);
+ PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%x: ",
+dev->name, devbusfn, dev->iobase);
command = PCI_COMMAND_IO | PCI_COMMAND_MASTER;
- pci_write_config_word (devbusfn, PCI_COMMAND, command);
- pci_read_config_word (devbusfn, PCI_COMMAND, &status);
+ pci_write_config_word(devbusfn, PCI_COMMAND, command);
+ pci_read_config_word(devbusfn, PCI_COMMAND, &status);
if ((status & command) != command) {
- printf ("%s: Couldn't enab
[U-Boot] [PATCH 03/15] pcnet: s/le16_to_cpu/cpu_to_le16/ in pcnet_send
This should cause no change to the generated code, but is semantically correct. Signed-off-by: Paul Burton --- drivers/net/pcnet.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c index a30a0bc..843a6fc 100644 --- a/drivers/net/pcnet.c +++ b/drivers/net/pcnet.c @@ -427,10 +427,10 @@ static int pcnet_send(struct eth_device *dev, void *packet, int pkt_len) * set the status with the "ownership" bits last. */ status = 0x8300; - entry->length = le16_to_cpu(-pkt_len); + entry->length = cpu_to_le16(-pkt_len); entry->misc = 0x; entry->base = PCI_TO_MEM_LE(dev, packet); - entry->status = le16_to_cpu(status); + entry->status = cpu_to_le16(status); /* Trigger an immediate send poll. */ pcnet_write_csr(dev, 0, 0x0008); -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Fwd: [PATCH 1/6] exynos_fb: Remove usage of static defines
Hi Simon, On Wed, Oct 16, 2013 at 10:04 PM, Simon Glass wrote: > Hi Ajay, > > [once more from the right address] > > On Mon, Sep 30, 2013 at 5:20 AM, Ajay Kumar >wrote: > > > Previously, we used to statically assign values for vl_col, vl_row and > > vl_bpix using #defines like LCD_XRES, LCD_YRES and LCD_COLOR16. > > > > Introducing the function exynos_lcd_early_init() would take care of this > > assignment on the fly by parsing FIMD DT properties, thereby allowing us > > to remove LCD_XRES and LCD_YRES from the main config file. > > > > Signed-off-by: Ajay Kumar > > > > Acked-by: Simon Glass > > I can't test this on Pit at present - any chance of a series at some point > to enable that? > Should wait till Rajeshwari sends a patch for peach-pit dts. I pushed my branch to u-boot-x86.git branch try-5420b. > > As a general comment, it would be nice to follow up with a series to fully > enable device tree for the GPIOs also. At the moment these are hard-coded. > Ok. I will do this for exynos video driver. Regards, > Simon > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > > Thanks and regards, Ajay Kumar ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] blackfin: Move machine specific gpio_port_t structure back to blackfin arch folder.
From: Steven Miao
The gpio register mappings are different among blackfin processors.
Signed-off-by: Steven Miao
Signed-off-by: Sonic Zhang
---
arch/blackfin/cpu/Makefile | 2 +-
arch/blackfin/cpu/gpio.c | 17 +
arch/blackfin/include/asm/gpio.h | 3 +++
drivers/gpio/adi_gpio2.c | 17 -
4 files changed, 21 insertions(+), 18 deletions(-)
diff --git a/arch/blackfin/cpu/Makefile b/arch/blackfin/cpu/Makefile
index 1421cb2..929fc8b 100644
--- a/arch/blackfin/cpu/Makefile
+++ b/arch/blackfin/cpu/Makefile
@@ -18,7 +18,7 @@ CEXTRA := initcode.o
SEXTRA := start.o
SOBJS:= interrupt.o cache.o
COBJS-y += cpu.o
-COBJS-$(CONFIG_ADI_GPIO1) += gpio.o
+COBJS-y += gpio.o
COBJS-y += interrupts.o
COBJS-$(CONFIG_JTAG_CONSOLE) += jtag-console.o
COBJS-y += os_log.o
diff --git a/arch/blackfin/cpu/gpio.c b/arch/blackfin/cpu/gpio.c
index f9aff4d..5e9c68a 100644
--- a/arch/blackfin/cpu/gpio.c
+++ b/arch/blackfin/cpu/gpio.c
@@ -12,6 +12,7 @@
#include
#include
+#ifdef CONFIG_ADI_GPIO1
#if ANOMALY_05000311 || ANOMALY_05000323
enum {
AWA_data = SYSCR,
@@ -774,3 +775,19 @@ void gpio_labels(void)
continue;
}
}
+#else
+struct gpio_port_t * const gpio_array[] = {
+ (struct gpio_port_t *)PORTA_FER,
+ (struct gpio_port_t *)PORTB_FER,
+ (struct gpio_port_t *)PORTC_FER,
+ (struct gpio_port_t *)PORTD_FER,
+ (struct gpio_port_t *)PORTE_FER,
+ (struct gpio_port_t *)PORTF_FER,
+ (struct gpio_port_t *)PORTG_FER,
+#if defined(CONFIG_BF54x)
+ (struct gpio_port_t *)PORTH_FER,
+ (struct gpio_port_t *)PORTI_FER,
+ (struct gpio_port_t *)PORTJ_FER,
+#endif
+};
+#endif
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 58a6191..376ec02 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -8,6 +8,7 @@
#define __ARCH_BLACKFIN_GPIO_H__
#include
+#include
#define gpio_bank(x) ((x) >> 4)
#define gpio_bit(x)(1<<((x) & 0xF))
@@ -141,6 +142,8 @@ struct gpio_port_t {
unsigned short dummy16;
unsigned short inen;
};
+#else
+extern struct gpio_port_t * const gpio_array[];
#endif
#ifdef ADI_SPECIAL_GPIO_BANKS
diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c
index 051073c..88cd65b 100644
--- a/drivers/gpio/adi_gpio2.c
+++ b/drivers/gpio/adi_gpio2.c
@@ -10,22 +10,6 @@
#include
#include
#include
-#include
-
-static struct gpio_port_t * const gpio_array[] = {
- (struct gpio_port_t *)PORTA_FER,
- (struct gpio_port_t *)PORTB_FER,
- (struct gpio_port_t *)PORTC_FER,
- (struct gpio_port_t *)PORTD_FER,
- (struct gpio_port_t *)PORTE_FER,
- (struct gpio_port_t *)PORTF_FER,
- (struct gpio_port_t *)PORTG_FER,
-#if defined(CONFIG_BF54x)
- (struct gpio_port_t *)PORTH_FER,
- (struct gpio_port_t *)PORTI_FER,
- (struct gpio_port_t *)PORTJ_FER,
-#endif
-};
#define RESOURCE_LABEL_SIZE16
@@ -98,7 +82,6 @@ static void port_setup(unsigned gpio, unsigned short usage)
else
gpio_array[gpio_bank(gpio)]->port_fer_set = gpio_bit(gpio);
#endif
- SSYNC();
}
inline void portmux_setup(unsigned short per)
--
1.8.2.3
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