[U-Boot] [PATCH] powerpc/t4240: enable NAND boot support
From: Shaohui Xie shaohui@freescale.com Signed-off-by: Shaohui Xie shaohui@freescale.com --- boards.cfg | 1 + 1 file changed, 1 insertion(+) diff --git a/boards.cfg b/boards.cfg index 2128996..302ac56 100644 --- a/boards.cfg +++ b/boards.cfg @@ -966,6 +966,7 @@ Active powerpc mpc85xx- freescale t4qds Active powerpc mpc85xx- freescale t4qds T4160QDS_SPIFLASH T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF8 - Active powerpc mpc85xx- freescale t4qds T4240EMU T4240EMU:PPC_T4240 York Sun york...@freescale.com Active powerpc mpc85xx- freescale t4qds T4240QDS T4240QDS:PPC_T4240 - +Active powerpc mpc85xx- freescale t4qds T4240QDS_NAND T4240QDS:PPC_T4240,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF8 - Active powerpc mpc85xx- freescale t4qds T4240QDS_SDCARD T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF8 - Active powerpc mpc85xx- freescale t4qds T4240QDS_SPIFLASH T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF8 - Active powerpc mpc85xx- freescale t4qds T4240QDS_SRIO_PCIE_BOOT T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF8 - -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Makefile: fix broken pipe error for lcd4_lwmon5 board
Before this commit, a broken pipe error sometimes happened when building lcd4_lwmon5 board with Buildman. This commit re-writes build rules of u-boot.spr and u-boot-img-spl-at-end.bin more simply without using a pipe. Besides fixing a broken pipe error, this commit gives us other advantages: - Do not generate intermidiate files, spl/u-boot-spl.img and spl/u-boot-spl-pad.img for creating u-boot.spr - Do not generate an intermidiate file, u-boot-pad.img for creating u-boot-img-spl-at-end.bin Such intermidiate files were not deleted by make clean or make mrpropr. Nor u-boot-pad.img was ignored by git. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Hello Simon. I noticed a broken pipe error when I was using Buildman. The error happens here: $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ of=$(obj)u-boot-pad.img 2/dev/null I cannot understand why this error happens on Buildman. (I have never seen it on MAKEALL script.) Does the same error happen on your machine too? Do you have any idea why this error happen? What I did is as follows: $ git checkout master $ git describe v2014.01-rc2 $ git checkout -b cosmetic Add many cosmetic commits. Do not change any source files. (For example, changing README files) I think about 20 commits are enough. $ git branch --set-upstream-to=master $ tool/buildman/buildman -b cosmetic lcd4_lwmon5 No section: 'make-flags' Building 21 commits for 1 boards (1 thread, 8 jobs per thread) Cloning repo for thread 0 1470 /21 lcd4_lwmon5 $ tools/buildman/buildman -se -b cosmetic No section: 'make-flags' Summary of 21 commits for 1194 boards (8 threads, 1 job per thread) 01: Prepare v2014.01-rc2 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 02: cosmetic1 powerpc:lcd4_lwmon5 -tr: write error: Broken pipe -tr: write error 03: cosmetic2 04: cosmetic3 05: cosmetic4 06: cosmetic5 07: cosmetic6 08: cosmetic7 09: cosmetic8 10: cosmetic9 11: cosmetic10 12: cosmetic11 13: cosmetic12 14: cosmetic13 15: cosmetic14 16: cosmetic15 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 17: cosmetic16 18: cosmetic17 19: cosmetic18 20: cosmetic19 21: cosmetic20 Here, a broken pipe error occurred at 01 and fixed at 02. It happend again at 16. But the result changes every time. The error happens randomly. Makefile | 19 --- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index f03d116..de5969c 100644 --- a/Makefile +++ b/Makefile @@ -471,12 +471,10 @@ $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin $(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \ -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER \ - -d $(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl.img - tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_SPL_PAD_TO) \ - of=$(obj)spl/u-boot-spl-pad.img 2/dev/null - dd if=$(obj)spl/u-boot-spl.img of=$(obj)spl/u-boot-spl-pad.img \ - conv=notrunc 2/dev/null - cat $(obj)spl/u-boot-spl-pad.img $(obj)u-boot.img $@ + -d $(obj)spl/u-boot-spl.bin $@ + $(OBJCOPY) -I binary -O binary \ + --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@ + cat $(obj)u-boot.img $@ ifneq ($(CONFIG_TEGRA),) $(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin @@ -499,11 +497,10 @@ $(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img # at the start padded up to the start of the SPL image. And then concat # the SPL image to the end. $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img - tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ - of=$(obj)u-boot-pad.img 2/dev/null - dd if=$(obj)u-boot.img of=$(obj)u-boot-pad.img \ - conv=notrunc 2/dev/null - cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin $@ + cp $(obj)u-boot.img $@ + $(OBJCOPY) -I binary -O binary --pad-to=$(CONFIG_UBOOT_PAD_TO) \ +--gap-fill=0xff $(obj)u-boot.img $@ + cat $(obj)spl/u-boot-spl.bin $@ ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Makefile: fix broken pipe error for lcd4_lwmon5 board
Hi Masahiro, On 18.12.2013 09:32, Masahiro Yamada wrote: Before this commit, a broken pipe error sometimes happened when building lcd4_lwmon5 board with Buildman. This commit re-writes build rules of u-boot.spr and u-boot-img-spl-at-end.bin more simply without using a pipe. Besides fixing a broken pipe error, this commit gives us other advantages: - Do not generate intermidiate files, spl/u-boot-spl.img and spl/u-boot-spl-pad.img for creating u-boot.spr - Do not generate an intermidiate file, u-boot-pad.img for creating u-boot-img-spl-at-end.bin Such intermidiate files were not deleted by make clean or make mrpropr. Nor u-boot-pad.img was ignored by git. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com This looks like a nice improvement. Thanks! Acked-by: Stefan Roese s...@denx.de Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] Makefile: fix broken pipe error for lcd4_lwmon5 board
Before this commit, a broken pipe error sometimes happened when building lcd4_lwmon5 board with Buildman. This commit re-writes build rules of u-boot.spr and u-boot-img-spl-at-end.bin more simply without using a pipe. Besides fixing a broken pipe error, this commit gives us other advantages: - Do not generate intermidiate files, spl/u-boot-spl.img and spl/u-boot-spl-pad.img for creating u-boot.spr - Do not generate an intermidiate file, u-boot-pad.img for creating u-boot-img-spl-at-end.bin Such intermidiate files were not deleted by make clean or make mrpropr. Nor u-boot-pad.img was ignored by git. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Acked-by: Stefan Roese s...@denx.de --- Hello Simon. I noticed a broken pipe error when I was using Buildman. The error happens here: $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ of=$(obj)u-boot-pad.img 2/dev/null I cannot understand why this error happens on Buildman. (I have never seen it on MAKEALL script.) Does the same error happen on your machine too? Do you have any idea why this error happen? What I did is as follows: $ git checkout master $ git describe v2014.01-rc2 $ git checkout -b cosmetic Add many cosmetic commits. Do not change any source files. (For example, changing README files) I think about 20 commits are enough. $ git branch --set-upstream-to=master $ tool/buildman/buildman -b cosmetic lcd4_lwmon5 No section: 'make-flags' Building 21 commits for 1 boards (1 thread, 8 jobs per thread) Cloning repo for thread 0 1470 /21 lcd4_lwmon5 $ tools/buildman/buildman -se -b cosmetic No section: 'make-flags' Summary of 21 commits for 1194 boards (8 threads, 1 job per thread) 01: Prepare v2014.01-rc2 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 02: cosmetic1 powerpc:lcd4_lwmon5 -tr: write error: Broken pipe -tr: write error 03: cosmetic2 04: cosmetic3 05: cosmetic4 06: cosmetic5 07: cosmetic6 08: cosmetic7 09: cosmetic8 10: cosmetic9 11: cosmetic10 12: cosmetic11 13: cosmetic12 14: cosmetic13 15: cosmetic14 16: cosmetic15 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 17: cosmetic16 18: cosmetic17 19: cosmetic18 20: cosmetic19 21: cosmetic20 Here, a broken pipe error occurred at 01 and fixed at 02. It happend again at 16. But the result changes every time. The error happens randomly. Changes in v2: - Delete an unnecessary line cp $(obj)u-boot.img $@ Makefile | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index f03d116..c9d372b 100644 --- a/Makefile +++ b/Makefile @@ -471,12 +471,10 @@ $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin $(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \ -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER \ - -d $(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl.img - tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_SPL_PAD_TO) \ - of=$(obj)spl/u-boot-spl-pad.img 2/dev/null - dd if=$(obj)spl/u-boot-spl.img of=$(obj)spl/u-boot-spl-pad.img \ - conv=notrunc 2/dev/null - cat $(obj)spl/u-boot-spl-pad.img $(obj)u-boot.img $@ + -d $(obj)spl/u-boot-spl.bin $@ + $(OBJCOPY) -I binary -O binary \ + --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@ + cat $(obj)u-boot.img $@ ifneq ($(CONFIG_TEGRA),) $(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin @@ -499,11 +497,9 @@ $(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img # at the start padded up to the start of the SPL image. And then concat # the SPL image to the end. $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img - tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ - of=$(obj)u-boot-pad.img 2/dev/null - dd if=$(obj)u-boot.img of=$(obj)u-boot-pad.img \ - conv=notrunc 2/dev/null - cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin $@ + $(OBJCOPY) -I binary -O binary --pad-to=$(CONFIG_UBOOT_PAD_TO) \ +--gap-fill=0xff $(obj)u-boot.img $@ + cat $(obj)spl/u-boot-spl.bin $@ ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Makefile: fix broken pipe error for lcd4_lwmon5 board
Hello Stefan Besides fixing a broken pipe error, this commit gives us other advantages: - Do not generate intermidiate files, spl/u-boot-spl.img and spl/u-boot-spl-pad.img for creating u-boot.spr - Do not generate an intermidiate file, u-boot-pad.img for creating u-boot-img-spl-at-end.bin Such intermidiate files were not deleted by make clean or make mrpropr. Nor u-boot-pad.img was ignored by git. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com This looks like a nice improvement. Thanks! Acked-by: Stefan Roese s...@denx.de Thanks for you review. But I found a mistake. I posted v2. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/8] SATA support for omap5_uevm and dra7_evm
Hi Roger, 2013/12/4 Tom Rini tr...@ti.com: On Mon, Nov 11, 2013 at 04:56:36PM +0200, Roger Quadros wrote: Hi, This series adds SATA support for OMAP5 uevm and DRA7 evm. Patches are also availabe at g...@github.com:rogerq/u-boot.git sata v3: - get rid of custom perror() macro, use printf - Fixed coding sytle issues v2: - Address review comments in the RFC series - Fix cache align error in the ahci driver - Added dra7 support cheers, -roger Roger Quadros (8): ahci: Error out with message on malloc() failure ahci: Fix cache align error messages ARM: OMAP5: Add Pipe3 PHY driver ARM: OMAP5: Add PRCM and Control information for SATA ARM: OMAP5: Add SATA platform glue ARM: omap5_uevm: Add SATA support ARM: DRA7xx: Add PRCM and Control information for SATA ARM: dra7_evm: Add SATA support Applied to u-boot-ti/master, thanks! Now that this will go to mainline, I wonder to know if there is any plan to add SPL support to boot from SATA ? Thanks, Enric -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7] spi: Add support SH Quad SPI driver
On Wednesday 18 December 2013 12:01 PM, Nobuhiro Iwamatsu wrote:
This patch adds a driver for Renesas SoC's Quad SPI bus.
This supports with 8 bits per transfer to use with SPI flash.
Signed-off-by: Kouei Abe kouei.abe...@renesas.com
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v7:
- Add comments on each initialization steps and others.
- Change to using clrbits_* and setbits_*.
- Add documet file for test.
Changes for v6:
- Update Makefile to new style.
Changes for v5:
- Add print abort when call ctrlc().
- Move source code in spi_xfer() which should be processed by
spi_cs_activate().
- Move source code in spi_xfer() which should be processed by
spi_cs_deactivate().
- Remove sh_qspi_xfer, move to spi_xfer().
Changes for v4:
- Added tabs
- Added comments
- Added sh_qspi_init()
Changes for v3:
- Change Queued to Quad.
- Remove path of file from file header.
- Use read* and write* directly instead of sh_qspi_write* sh_qspi_read*.
- Change driver format.
Changes for v2:
- SH QSPI to SH QSPI (Queued SPI).
- Remove magic number.
doc/SPI/README.sh_qspi_test | 38 ++
drivers/spi/Makefile| 1 +
drivers/spi/sh_qspi.c | 277
3 files changed, 316 insertions(+)
create mode 100644 doc/SPI/README.sh_qspi_test
create mode 100644 drivers/spi/sh_qspi.c
diff --git a/doc/SPI/README.sh_qspi_test b/doc/SPI/README.sh_qspi_test
new file mode 100644
index 000..8a33fec
--- /dev/null
+++ b/doc/SPI/README.sh_qspi_test
@@ -0,0 +1,38 @@
+-
+ Simple steps used to test the SH-QSPI at U-Boot
+-
+
+#0, Currently, SH-QSPI is used by lager board (Renesas ARM SoC R8A7790)
+and koelsch board (Renesas ARM SoC R8A7791). These boot from SPI ROM
+basically. Thus, U-Boot start, SH-QSPI will is operating normally.
+
+#1, build U-Boot and load u-boot.bin
+
+ = tftpboot 4000 u-boot.bin
+ sh_eth Waiting for PHY auto negotiation to complete.. done
+ sh_eth: 100Base/Half
+ Using sh_eth device
+ TFTP from server 192.168.169.1; our IP address is 192.168.169.79
+ Filename 'u-boot.bin'.
+ Load address: 0x4000
+ Loading:
+2.5 MiB/s
+ done
+ Bytes transferred = 175364 (2ad04 hex)
+
+#2, Commands to erase/write u-boot to flash device
+
+ Note: This method is description of the lager board. If you want to use the
+ other boards, please change the value according to each environment.
+
+ = sf probe 0
+ SF: Detected S25FL512S_256K with page size 512 Bytes, erase size 64 KiB,
total 64 MiB
+ = sf erase 8 4
+ SF: 262144 bytes @ 0x8 Erased: OK
+ = sf write 4000 8 175364
+ SF: 1528676 bytes @ 0x8 Written: OK
+ =
+
+#3, Push reset button.
+
+ If you're written correctly and driver works properly, U-Boot starts.
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 27902fe..914e71f 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
obj-$(CONFIG_SOFT_SPI) += soft_spi.o
obj-$(CONFIG_SH_SPI) += sh_spi.o
+obj-$(CONFIG_SH_QSPI) += sh_qspi.o
obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
obj-$(CONFIG_FDT_SPI) += fdt_spi.o
obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
new file mode 100644
index 000..edeb42d
--- /dev/null
+++ b/drivers/spi/sh_qspi.c
@@ -0,0 +1,277 @@
+/*
+ * SH QSPI (Quad SPI) driver
+ *
+ * Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2013 Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include common.h
+#include malloc.h
+#include spi.h
+#include asm/io.h
+
+/* SH QSPI register bit masks REG_BIT */
+#define SPCR_MSTR0x08
+#define SPCR_SPE 0x40
+#define SPSR_SPRFF 0x80
+#define SPSR_SPTEF 0x20
+#define SPPCR_IO3FV 0x04
+#define SPPCR_IO2FV 0x02
+#define SPPCR_IO1FV 0x01
+#define SPBDCR_RXBC0 (1 0)
+#define SPCMD_SCKDEN (1 15)
+#define SPCMD_SLNDEN (1 14)
+#define SPCMD_SPNDEN (1 13)
+#define SPCMD_SSLKP (1 7)
+#define SPCMD_BRDV0 (1 2)
+#define SPCMD_INIT1 SPCMD_SCKDEN | SPCMD_SLNDEN | \
+ SPCMD_SPNDEN | SPCMD_SSLKP | \
+ SPCMD_BRDV0
+#define SPCMD_INIT2 SPCMD_SPNDEN | SPCMD_SSLKP | \
+ SPCMD_BRDV0
+#define SPBFCR_TXRST (1 7)
+#define SPBFCR_RXRST (1 6)
+
+/* SH QSPI register set */
+struct sh_qspi_regs {
+ unsigned char spcr;
+ unsigned char sslp;
+ unsigned char sppcr;
+ unsigned char spsr;
+ unsigned long spdr;
+ unsigned char spscr;
+ unsigned char spssr;
+ unsigned char spbr;
+ unsigned char spdcr;
+ unsigned char spckd;
+ unsigned char sslnd;
+
Re: [U-Boot] [PATCH v3 0/8] SATA support for omap5_uevm and dra7_evm
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 12/18/2013 06:31 AM, Enric Balletbo Serra wrote: Hi Roger, 2013/12/4 Tom Rini tr...@ti.com: On Mon, Nov 11, 2013 at 04:56:36PM +0200, Roger Quadros wrote: Hi, This series adds SATA support for OMAP5 uevm and DRA7 evm. Patches are also availabe at g...@github.com:rogerq/u-boot.git sata v3: - get rid of custom perror() macro, use printf - Fixed coding sytle issues v2: - Address review comments in the RFC series - Fix cache align error in the ahci driver - Added dra7 support cheers, -roger Roger Quadros (8): ahci: Error out with message on malloc() failure ahci: Fix cache align error messages ARM: OMAP5: Add Pipe3 PHY driver ARM: OMAP5: Add PRCM and Control information for SATA ARM: OMAP5: Add SATA platform glue ARM: omap5_uevm: Add SATA support ARM: DRA7xx: Add PRCM and Control information for SATA ARM: dra7_evm: Add SATA support Applied to u-boot-ti/master, thanks! Now that this will go to mainline, I wonder to know if there is any plan to add SPL support to boot from SATA ? I've talked ever so briefly with Dan Murphy about this because his series that adds USB host support gets us ever further towards SATA SPL support as both talk in block_dev_desc_t. I don't think anyone is working on this today, but my gut says it shouldn't be too hard to add on top. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJSsZMBAAoJENk4IS6UOR1W1eMQAJ0L1I+QgHGGxbb5wXWZHxL8 4xm2do/WTar5IV1he5bzegVXu0viowd/+p4BAyw5JzijnJqw7g0A+71TsY9Z55u0 SCmTJ0TynUzJNL1PL/MUk25Q2THgJKDziG0WAj2Nv37deAOHuO+AnT3nLqlOESug CBKJU9IpAtLvQQ3rNejffLqM7mYzLjNrLtqC1UoWYgU2IMHIWuLPSfgTnaJnXS70 QOHgm427fo4LnXfjJ6SobDTBqOs55Nw3Gl/S/v/c8/n9rGEF0S3q1G2dfEfnKj1S bPzuWJagyj7zNblApyuoL0ZsE2D5aKfysBpR4YULpgOg1xYL/TPwjWtdoe3Cv9Y8 8vx8XJlSm+7FMp4VcrfiIpwSNFiioNlMpyB9vonwe8bz4d8P+l34Ln16aHYROFP0 utQMEhgmsZ+Xw8Pch5dnazpWs1jKMADVR+vJFBf+Svr3ZaUFujns5Lk//bZGwcyR Ilhk6bis/ylCbFN6OI7Xg7LkQTUnvyO4/5Bhv30XklSAE9iclo1EG1wB3LE0qtL1 duCFg9hTF9mHIARHn96oCgpFkSilIWLTLsGSoai3W4WxNkTPeqBZsNNBQNo1acXg trvESrQNLMHPGaq+gKV5SDzsJ1Nhe3Ib6TPHXO+6PyyA03Sqxl0bkQHwdOgR3343 rqZjCaPIHOWHZk4F40Tm =K9+D -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: keep all sections in ELF file breaks Arndale
On 12/17/2013 04:57 PM, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 12/17/2013 10:47 AM, Andre Przywara wrote: (CCing Inderpal, Chander and Minkyu) On 12/17/2013 04:30 PM, Tom Rini wrote: On 12/17/2013 10:24 AM, Andre Przywara wrote: Hi, the Arndale board does not work anymore with current master HEAD. If I turn on the board, I see exactly nothing. I bisected it down to: 47ed5dd031d7d2c587e6afd386e79ccec1a1b7f7 is the first bad commit commit 47ed5dd031d7d2c587e6afd386e79ccec1a1b7f7 Author: Albert ARIBAUD albert.u.b...@aribaud.net Date: Thu Nov 7 14:21:46 2013 +0100 arm: keep all sections in ELF file That patch looks like Chinese to me, does one of you have an idea what's wrong here? Are we missing a section, maybe for the SPL build? So on Arndale, what file do you boot exactly? It sounds like not u-boot.img but some tool stripping / modifying u-boot (or spl/u-boot-spl) and having relied on certain sections being stripped out before being run. Good point. Indeed I boot u-boot-dtb.bin (the SPL is spl/arndale-spl.bin). So the Makefile does: cat u-boot.bin u-boot.dtb u-boot-dtb.bin I guess the address under which U-boot expects to find the attached dtb changes due to the non-discarding. Does any of the Arndale people have an idea how to fix this? That's a little confusing as we use objcopy -O binary to make u-boot.bin/u-boot-spl.bin and that would, I would think, drop these sections anyhow. But some checking of binary size with the patch in question locally reverted would help shed some light here. So I did objdump -h on ./u-boot, the diff (sorted by the section name, as the order of the section differed, and the size) is: .ARM.attributes 002d -.bss00048b10 +.bss00048b08 .bss_end .bss_start .comment001c @@ -14,8 +14,12 @@ .debug_loc 00045a4e .debug_ranges 6f70 .debug_str 000123b4 +.dynamic0080 +.dynstr 001d +.dynsym 0060 .got.plt000c .hash 002c +.interp 0011 .rel.dyn6fd8 .rodata ae47 .text 0002cdf0 - works, + is broken. + is HEAD as of yesterday, - is the same with the patch in question reverted. So the patch _adds_ some sections to the file. u-boot-spl is exactly the same, for u-boot-spl.bin the broken version ends earlier (but until then is identical). arndale-spl.bin (which I flash) is different, though. Arndale uses CONFIG_OF_SEPARATE, and .text stays the same AFAICS. I can do some more debugging tomorrow, am grateful for any hints. Regards, Andre. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] board:trats1:trats2: fix adapter number
This fix is necessary after increased by one the number of adapters in s3c24x0 driver. Tested on Trats and Trats2. Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com Cc: Lukasz Majewski l.majew...@samsung.com --- board/samsung/trats/trats.c |2 +- board/samsung/trats2/trats2.c |6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 8aba51c..640a193 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -295,7 +295,7 @@ int power_init_board(void) */ ret = pmic_init(I2C_5); ret |= pmic_init_max8997(); - ret |= power_fg_init(I2C_8); + ret |= power_fg_init(I2C_9); ret |= power_muic_init(I2C_5); ret |= power_bat_init(0); if (ret) diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index 147de17..be15357 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -195,9 +195,9 @@ int power_init_board(void) #endif pmic_init(I2C_7); /* I2C adapter 7 - bus name s3c24x0_7 */ pmic_init_max77686(); - pmic_init_max77693(I2C_9); /* I2C adapter 9 - bus name soft1 */ - power_muic_init(I2C_9); /* I2C adapter 9 - bus name soft1 */ - power_fg_init(I2C_8); /* I2C adapter 8 - bus name soft0 */ + pmic_init_max77693(I2C_10); /* I2C adapter 10 - bus name soft1 */ + power_muic_init(I2C_10);/* I2C adapter 10 - bus name soft1 */ + power_fg_init(I2C_9); /* I2C adapter 9 - bus name soft0 */ power_bat_init(0); p_chrg = pmic_get(MAX77693_PMIC); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-sh/master
On Wed, Dec 18, 2013 at 04:56:42PM +0900, Nobuhiro Iwamatsu wrote: Dear Tom Rini. Please pull u-boot-sh master branch. Best regards, Nobuhiro The following changes since commit fd44194945714a478fab6407c04453caaef0bac9: Prepare v2014.01-rc2 (2013-12-16 13:07:05 -0500) are available in the git repository at: git://git.denx.de/u-boot-sh master for you to fetch changes up to f3bf212abc4139f12b472e97c1992ab32671b609: serial_sh: add support for SH7753 (2013-12-18 16:50:00 +0900) Yoshihiro Shimoda (3): sh: add support for sh7753evb board net: sh-eth: add support for SH7753 serial_sh: add support for SH7753 arch/sh/include/asm/cpu_sh4.h | 2 + arch/sh/include/asm/cpu_sh7753.h| 197 +++ board/renesas/sh7753evb/Makefile| 7 +++ board/renesas/sh7753evb/lowlevel_init.S | 416 ++ board/renesas/sh7753evb/sh7753evb.c | 326 +++ board/renesas/sh7753evb/spi-boot.c | 134 ++ board/renesas/sh7753evb/u-boot.lds | 81 boards.cfg | 1 + doc/README.sh7753evb| 67 +++ drivers/net/sh_eth.h| 8 ++- drivers/serial/serial_sh.h | 4 +- include/configs/sh7753evb.h | 137 +++ 12 files changed, 1377 insertions(+), 3 deletions(-) create mode 100644 arch/sh/include/asm/cpu_sh7753.h create mode 100644 board/renesas/sh7753evb/Makefile create mode 100644 board/renesas/sh7753evb/lowlevel_init.S create mode 100644 board/renesas/sh7753evb/sh7753evb.c create mode 100644 board/renesas/sh7753evb/spi-boot.c create mode 100644 board/renesas/sh7753evb/u-boot.lds create mode 100644 doc/README.sh7753evb create mode 100644 include/configs/sh7753evb.h Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc/dwmmc: Using calloc instead malloc
On Wed, 2013-12-18 at 09:08 -0600, Chin Liang See wrote: To enhance the SDMMC DesignWare driver to use calloc instead of malloc. This will avoid the incident that uninitialized members of mmc structure are later used for NULL comparison. IMHO pretty sane change. Actually I had local memset right after this malloc to make sure all members are zeroed. But with this change we have a clean structure right away. I'm wondering why calloc is not used in every driver for device specific structure allocation. -Alexey ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc/dwmmc: Using calloc instead malloc
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
Cc: Mischa Jonker mjon...@synopsys.com
Cc: Alexey Brodkin abrod...@synopsys.com
Cc: Andy Fleming aflem...@freescale.com
---
drivers/mmc/dw_mmc.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
mode change 100644 = 100755 drivers/mmc/dw_mmc.c
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
old mode 100644
new mode 100755
index 19d9b0b..82abe19
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -336,9 +336,9 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32
min_clk)
struct mmc *mmc;
int err = 0;
- mmc = malloc(sizeof(struct mmc));
+ mmc = calloc(sizeof(struct mmc), 1);
if (!mmc) {
- printf(mmc malloc fail!\n);
+ printf(mmc calloc fail!\n);
return -1;
}
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 04/35] zynq: Cleanup on memory configs
Cleanup on memory configuration options:
- Add comment
- Re-order configs
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index e34024d..8be52df 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -13,14 +13,6 @@
/* CPU clock */
#define CONFIG_CPU_FREQ_HZ 8
-/* Ram */
-#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_TEXT_BASE 0
-#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_SYS_SDRAM_SIZE 0x4000
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
-
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
@@ -105,11 +97,6 @@
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_MALLOC_LEN 0x40
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT zynq-uboot
@@ -125,7 +112,21 @@
#define CONFIG_SYS_LOAD_ADDR 0
+/* Physical Memory map */
+#define CONFIG_SYS_TEXT_BASE 0
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0
+#define CONFIG_SYS_SDRAM_SIZE 0x4000
+
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+
+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
/* OF */
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 01/35] zynq: Enable CONFIG_FIT_VERBOSE
Enabled fit_format_{error,warning}()
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 82ec826..6019c4a 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -127,6 +127,7 @@
/* OF */
#define CONFIG_FIT
+#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
#define CONFIG_OF_LIBFDT
/* Commands */
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 00/35] zynq: More boards support
These changes are from u-boot-xlnx.git repo from git.xilinx.com This repo is well tested on xilinx zynq platform, hence pushing the same on upstream. -- Thanks, Jagan. Jagannadha Sutradharudu Teki (35): zynq: Enable CONFIG_FIT_VERBOSE zynq: Enable Boot FreeBSD/vxWorks zynq: Cleanup on miscellaneous configs zynq: Cleanup on memory configs zynq: Minor config cleanup zynq: Enable cache options zynq: Add UART0, UART1 configs support zynq: Add GEM0, GEM1 configs support zynq-common: Rename zynq with zynq-common zynq: Add support to find bootmode spi: Add zynq qspi controller driver zynq-common: Enable CONFIG_ZYNQ_QSPI zynq: Add zynq zc70x board support zynq: Add zynq zed board support zynq-common: Define CONFIG_SPI_FLASH_BAR zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs zynq-common: Define exact TEXT_BASE zynq: zc70x: Add Catalyst 24WC08 EEPROM config support zynq: Add zynq microzed board support zynq: Add zynq_zc770 xm010 board support zynq: Add zynq_zc770 xm013 board support zynq: Add zynq_zc770 xm012 board support nand: Add zynq nand controller driver support zynq-common: Define CONFIG_NAND_ZYNQ zynq: Add zynq_zc770 xm011 board support zynq: Add support to find bootmode zynq-common: Define default environment zynq-common: Change Env. Sector size to 128Kb zynq-common: Define flash env. partition zynq-common: Define CONFIG_ENV_OVERWRITE dts: zynq: Add basic fdt support gpio: zynq: Add dummy gpio routines zynq-common: Enable verified boot(RSA) dts: zynq: Add more zynq dts files doc: Update the zynq u-boot status README |4 + arch/arm/cpu/armv7/zynq/slcr.c |6 + arch/arm/dts/zynq-7000.dtsi| 13 + arch/arm/include/asm/arch-zynq/gpio.h | 25 + arch/arm/include/asm/arch-zynq/hardware.h |3 + arch/arm/include/asm/arch-zynq/sys_proto.h |1 + board/xilinx/dts/zynq-microzed.dts | 14 + board/xilinx/dts/zynq-zc702.dts| 14 + board/xilinx/dts/zynq-zc706.dts| 14 + board/xilinx/dts/zynq-zc770-xm010.dts | 14 + board/xilinx/dts/zynq-zc770-xm011.dts | 14 + board/xilinx/dts/zynq-zc770-xm012.dts | 14 + board/xilinx/dts/zynq-zc770-xm013.dts | 14 + board/xilinx/dts/zynq-zed.dts | 14 + board/xilinx/zynq/board.c | 33 + boards.cfg |9 +- doc/README.zynq| 92 +++ drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/zynq_nand.c | 1198 drivers/spi/Makefile |1 + drivers/spi/zynq_qspi.c| 449 +++ include/configs/zynq-common.h | 270 +++ include/configs/zynq.h | 139 include/configs/zynq_microzed.h| 26 + include/configs/zynq_zc70x.h | 29 + include/configs/zynq_zc770.h | 44 + include/configs/zynq_zed.h | 27 + 27 files changed, 2341 insertions(+), 141 deletions(-) create mode 100644 arch/arm/dts/zynq-7000.dtsi create mode 100644 arch/arm/include/asm/arch-zynq/gpio.h create mode 100644 board/xilinx/dts/zynq-microzed.dts create mode 100644 board/xilinx/dts/zynq-zc702.dts create mode 100644 board/xilinx/dts/zynq-zc706.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm010.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm011.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm012.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm013.dts create mode 100644 board/xilinx/dts/zynq-zed.dts create mode 100644 doc/README.zynq create mode 100644 drivers/mtd/nand/zynq_nand.c create mode 100644 drivers/spi/zynq_qspi.c create mode 100644 include/configs/zynq-common.h delete mode 100644 include/configs/zynq.h create mode 100644 include/configs/zynq_microzed.h create mode 100644 include/configs/zynq_zc70x.h create mode 100644 include/configs/zynq_zc770.h create mode 100644 include/configs/zynq_zed.h -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 03/35] zynq: Cleanup on miscellaneous configs
Cleanup on miscellaneous configurable options: - Rename SYS_PROMPT as zynq-uboot - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Removed CONFIG_SYS_PROMPT_HUSH_PS2 include/configs/zynq.h | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 0492818..e34024d 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -111,19 +111,20 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_PROMPT U-Boot -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT zynq-uboot +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_LOAD_ADDR 0 -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 /* OF */ #define CONFIG_FIT -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 10/35] zynq: Add support to find bootmode
Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none doc/README.zynq | 60 + 1 file changed, 60 insertions(+) create mode 100644 doc/README.zynq diff --git a/doc/README.zynq b/doc/README.zynq new file mode 100644 index 000..56a74b4 --- /dev/null +++ b/doc/README.zynq @@ -0,0 +1,60 @@ +# +# Xilinx ZYNQ U-Boot +# +# (C) Copyright 2013 Xilinx, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +1. About this + +This document describes the information about Xilinx Zynq U-Boot - +like supported boards, ML status and TODO list. + +2. Zynq boards + +Xilinx Zynq-7000 All Programmable SoCs enable extensive system level +differentiation, integration, and flexibility through hardware, software, +and I/O programmability. + +* zc70x + - zc702 (single qspi, gem0, mmc) [1] + - zc706 (dual parallel qspi, gem0, mmc) [2] +* zed (single qspi, gem0, mmc) [3] +* microzed (single qspi, gem0, mmc) [4] +* zc770 + - zc770-xm010 (single qspi, gem0, mmc) + - zc770-xm011 (8 or 16 bit nand) + - zc770-xm012 (nor) + - zc770-xm013 (dual parallel qspi, gem1) + +3. Mainline status + +- Added basic board configurations support. +- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq +- Added zynq boards named - zynq, zynq_dcc +- Added zynq drivers: + serial - drivers/serial/serial_zynq.c + net - drivers/net/zynq_gem.c + mmc - drivers/mmc/zynq_sdhci.c + mmc - drivers/mmc/zynq_sdhci.c + spi- drivers/spi/zynq_spi.c + i2c - drivers/i2c/zynq_i2c.c + +4. TODO + +- Add zynq boards support - zc70x, zed, microzed, zc770 +- Add zynq qspi controller driver +- Add zynq nand controller driver +- d-cache support for zynq_gem.c +- FDT support for zynq boards +- Need proper cleanups on board configurations + +[1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm +[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm +[3] http://zedboard.org/product/zedboard +[4] http://zedboard.org/product/microzed + +-- +Jagannadha Sutradharudu Teki jaga...@xilinx.com +Sun Dec 15 14:52:41 IST 2013 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 17/35] zynq-common: Define exact TEXT_BASE
Defined TEXT_BASE for u-boot starts from 0x400 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e0a4f8c..6681f27 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -132,7 +132,7 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* Physical Memory map */ -#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_SYS_TEXT_BASE 0x400 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/35] zynq: Enable Boot FreeBSD/vxWorks
This enabled Boot FreeBSD/vxWorks from an ELF image support
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 6019c4a..0492818 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -130,6 +130,13 @@
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
#define CONFIG_OF_LIBFDT
+/* Boot FreeBSD/vxWorks from an ELF image */
+#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
+# define CONFIG_API
+# define CONFIG_CMD_ELF
+# define CONFIG_SYS_MMC_MAX_DEVICE 1
+#endif
+
/* Commands */
#include config_cmd_default.h
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 16/35] zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs
CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Moved CONFIG_SYS_SDRAM_SIZE pre-board configs include/configs/zynq-common.h | 1 - include/configs/zynq_zc70x.h | 2 ++ include/configs/zynq_zed.h| 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 1f7672f..e0a4f8c 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -136,7 +136,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x4000 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 559cd19..efe61b3 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZC70X_H #define __CONFIG_ZYNQ_ZC70X_H +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 1d3dcf7..57bcc26 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZED_H #define __CONFIG_ZYNQ_ZED_H +#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 19/35] zynq: Add zynq microzed board support
MicroZed is a low-cost development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z010-1CLG400C Memory: - 1 GB of DDR3 SDRAM - 128Mb of QSPI flash(S25FL128SAGBHI200) - Micro SD card interface Communication: - 10/100/1000 Ethernet - USB 2.0 - USB-UART User I/O: - 100 User I/O (50 per connector) - Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc: - Xilinx PC4 JTAG configuration port - PS JTAG pins accessible via Pmod - 33.33 MHz oscillator - User LED and push switch For more info - http://zedboard.org/product/microzed Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Updated domain name in mail ids' boards.cfg | 1 + include/configs/zynq_microzed.h | 26 ++ 2 files changed, 27 insertions(+) create mode 100644 include/configs/zynq_microzed.h diff --git a/boards.cfg b/boards.cfg index b24a245..9ed1661 100644 --- a/boards.cfg +++ b/boards.cfg @@ -356,6 +356,7 @@ Active arm armv7 u8500 st-ericsson u8500 Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang b18...@freescale.com Active armarmv7 zynqxilinx zynq zynq_zc70x - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h new file mode 100644 index 000..0d6bb81 --- /dev/null +++ b/include/configs/zynq_microzed.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Micro Zynq Evaluation and Development Board - MicroZedBoard + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_MICROZED_H +#define __CONFIG_ZYNQ_MICROZED_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_QSPI +#define CONFIG_ZYNQ_SDHCI0 + +#include configs/zynq-common.h + +#endif /* __CONFIG_ZYNQ_MICROZED_H */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 28/35] zynq-common: Change Env. Sector size to 128Kb
Changed Env. Sector size from 0x1 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index ea2fb04..7f2ad96 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -150,8 +150,10 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE(128 10) + /* Environment */ -#define CONFIG_ENV_SIZE0x1 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE /* Default environment */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 32/35] gpio: zynq: Add dummy gpio routines
GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
arch/arm/include/asm/arch-zynq/gpio.h | 25 +
1 file changed, 25 insertions(+)
create mode 100644 arch/arm/include/asm/arch-zynq/gpio.h
diff --git a/arch/arm/include/asm/arch-zynq/gpio.h
b/arch/arm/include/asm/arch-zynq/gpio.h
new file mode 100644
index 000..2dbba75
--- /dev/null
+++ b/arch/arm/include/asm/arch-zynq/gpio.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ZYNQ_GPIO_H
+#define _ZYNQ_GPIO_H
+
+inline int gpio_get_value(unsigned gpio)
+{
+ return 0;
+}
+
+inline int gpio_set_value(unsigned gpio, int val)
+{
+ return 0;
+}
+
+inline int gpio_request(unsigned gpio, const char *label)
+{
+ return 0;
+}
+
+#endif /* _ZYNQ_GPIO_H */
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 07/35] zynq: Add UART0, UART1 configs support
Zynq uart controller support two serial ports like
CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1
enabled both so-that the respective board will define
these macros based on their usage.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 6e545e5..f104558 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -33,10 +33,22 @@
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
/* Zynq Serial driver */
-#define CONFIG_ZYNQ_SERIAL
-#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000
-#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
-#define CONFIG_ZYNQ_SERIAL_CLOCK0 5000
+#define CONFIG_ZYNQ_SERIAL_UART1
+#ifdef CONFIG_ZYNQ_SERIAL_UART0
+# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE000
+# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
+# define CONFIG_ZYNQ_SERIAL_CLOCK0 5000
+#endif
+
+#ifdef CONFIG_ZYNQ_SERIAL_UART1
+# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000
+# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE
+# define CONFIG_ZYNQ_SERIAL_CLOCK1 5000
+#endif
+
+#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1)
+# define CONFIG_ZYNQ_SERIAL
+#endif
/* DCC driver */
#if defined(CONFIG_ZYNQ_DCC)
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 25/35] zynq: Add zynq_zc770 xm011 board support
ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM011: - 1GB DDR3 - 8 and 16-bit Micron NAND devices - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Updated domain name in mail ids' boards.cfg | 1 + include/configs/zynq_zc770.h | 4 2 files changed, 5 insertions(+) diff --git a/boards.cfg b/boards.cfg index 2dcfce5..66d8724 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,6 +358,7 @@ Active arm armv7 zynqxilinx zynqzynq_zc70x - Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zc770_xm011 zynq_zc770:ZC770_XM011 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 5776573..1aac1cf 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,10 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_QSPI +#elif defined(CONFIG_ZC770_XM011) +# define CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_NAND_ZYNQ + #elif defined(CONFIG_ZC770_XM012) # define CONFIG_ZYNQ_SERIAL_UART1 # undef CONFIG_SYS_NO_FLASH -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 20/35] zynq: Add zynq_zc770 xm010 board support
ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1GB DDR3 - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Updated domain name in mail ids' boards.cfg | 1 + include/configs/zynq_zc770.h | 30 ++ 2 files changed, 31 insertions(+) create mode 100644 include/configs/zynq_zc770.h diff --git a/boards.cfg b/boards.cfg index 9ed1661..11c7f9d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -357,6 +357,7 @@ Active arm armv7 vf610 freescale vf610twr Active armarmv7 zynqxilinx zynq zynq_zc70x - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h new file mode 100644 index 000..f12f816 --- /dev/null +++ b/include/configs/zynq_zc770.h @@ -0,0 +1,30 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC770 board. + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC770_H +#define __CONFIG_ZYNQ_ZC770_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_SYS_NO_FLASH + +#if defined(CONFIG_ZC770_XM010) +# define CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_GEM0 +# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +# define CONFIG_ZYNQ_SDHCI0 +# define CONFIG_ZYNQ_QSPI + +#else +# define CONFIG_ZYNQ_SERIAL_UART0 +#endif + +#include configs/zynq-common.h + +#endif /* __CONFIG_ZYNQ_ZC770_H */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 05/35] zynq: Minor config cleanup
Cleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCI
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 76 ++
1 file changed, 39 insertions(+), 37 deletions(-)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 8be52df..c8ab06f 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -7,33 +7,51 @@
#ifndef __CONFIG_ZYNQ_H
#define __CONFIG_ZYNQ_H
-#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
+/* High Level configuration Options */
+#define CONFIG_ARMV7
#define CONFIG_ZYNQ
/* CPU clock */
-#define CONFIG_CPU_FREQ_HZ 8
+#ifndef CONFIG_CPU_FREQ_HZ
+# define CONFIG_CPU_FREQ_HZ8
+#endif
+/* Serial drivers */
+#define CONFIG_BAUDRATE115200
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-#define CONFIG_BAUDRATE115200
-
-/* XPSS Serial driver */
+/* Zynq Serial driver */
#define CONFIG_ZYNQ_SERIAL
#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000
#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
#define CONFIG_ZYNQ_SERIAL_CLOCK0 5000
+/* DCC driver */
+#if defined(CONFIG_ZYNQ_DCC)
+# define CONFIG_ARM_DCC
+# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
+#endif
+
/* Ethernet driver */
#define CONFIG_NET_MULTI
#define CONFIG_ZYNQ_GEM
#define CONFIG_ZYNQ_GEM0
#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
-#define CONFIG_ZYNQ_SDHCI
-#define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_SPI
+/* SPI */
+#ifdef CONFIG_ZYNQ_SPI
+# define CONFIG_SPI_FLASH
+# define CONFIG_SPI_FLASH_SST
+# define CONFIG_CMD_SF
+#endif
+
+/* NOR */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ZYNQ_SDHCI0
/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
@@ -48,7 +66,6 @@
#endif
#define CONFIG_ZYNQ_I2C0
-
/* I2C */
#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
# define CONFIG_CMD_I2C
@@ -58,26 +75,6 @@
# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1
#endif
-#if defined(CONFIG_ZYNQ_DCC)
-# define CONFIG_ARM_DCC
-# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
-#endif
-
-#define CONFIG_ZYNQ_SPI
-
-/* SPI */
-#ifdef CONFIG_ZYNQ_SPI
-# define CONFIG_SPI_FLASH
-# define CONFIG_SPI_FLASH_SST
-# define CONFIG_CMD_SF
-#endif
-
-/* Enable the PL to be downloaded */
-#define CONFIG_FPGA
-#define CONFIG_FPGA_XILINX
-#define CONFIG_FPGA_ZYNQPL
-#define CONFIG_CMD_FPGA
-
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
@@ -91,12 +88,9 @@
#define CONFIG_PHY_MARVELL
/* Environment */
+#define CONFIG_ENV_SIZE0x1 /* Env. sector size */
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_SIZE 0x1
-
-#define CONFIG_SYS_NO_FLASH
-
-#define CONFIG_SYS_MALLOC_LEN 0x40
+#define CONFIG_SYS_LOAD_ADDR 0
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT zynq-uboot
@@ -110,8 +104,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LOAD_ADDR 0
-
/* Physical Memory map */
#define CONFIG_SYS_TEXT_BASE 0
@@ -122,15 +114,25 @@
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+#define CONFIG_SYS_MALLOC_LEN 0x40
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-/* OF */
+
+/* Enable the PL to be downloaded */
+#define CONFIG_FPGA
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_ZYNQPL
+#define CONFIG_CMD_FPGA
+
+/* Open Firmware flat tree */
+#define CONFIG_OF_LIBFDT
+
+/* FIT support */
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
-#define CONFIG_OF_LIBFDT
/* Boot FreeBSD/vxWorks from an ELF image */
#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 23/35] nand: Add zynq nand controller driver support
Added support for Zynq Nand controller driver. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com CC: Marek Vasut ma...@denx.de Cc: Scott Wood scottw...@freescale.com --- V2: Fixed issues pointed by Scott arch/arm/include/asm/arch-zynq/hardware.h |2 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/zynq_nand.c | 1198 + 3 files changed, 1201 insertions(+) create mode 100644 drivers/mtd/nand/zynq_nand.c diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h index 05870ae..f2c76a6 100644 --- a/arch/arm/include/asm/arch-zynq/hardware.h +++ b/arch/arm/include/asm/arch-zynq/hardware.h @@ -20,6 +20,8 @@ #define ZYNQ_SPI_BASEADDR0 0xE0006000 #define ZYNQ_SPI_BASEADDR1 0xE0007000 #define ZYNQ_QSPI_BASEADDR 0xE000D000 +#define ZYNQ_SMC_BASEADDR 0xE000E000 +#define ZYNQ_NAND_BASEADDR 0xE100 #define ZYNQ_DDRC_BASEADDR 0xF8006000 /* Reflect slcr offsets */ diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index e145cd1..2e397f4 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -61,6 +61,7 @@ obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o obj-$(CONFIG_NAND_PLAT) += nand_plat.o obj-$(CONFIG_NAND_DOCG4) += docg4.o +obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o else # minimal SPL drivers diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c new file mode 100644 index 000..8a90ad4 --- /dev/null +++ b/drivers/mtd/nand/zynq_nand.c @@ -0,0 +1,1198 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Xilinx Zynq NAND Flash Controller Driver + * This driver is based on plat_nand.c and mxc_nand.c drivers + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include common.h +#include malloc.h +#include asm/io.h +#include asm/errno.h +#include nand.h +#include linux/mtd/mtd.h +#include linux/mtd/nand.h +#include linux/mtd/partitions.h +#include linux/mtd/nand_ecc.h +#include asm/arch/hardware.h + +/* The NAND flash driver defines */ +#define ZYNQ_NAND_CMD_PHASE1 +#define ZYNQ_NAND_DATA_PHASE 2 +#define ZYNQ_NAND_ECC_SIZE 512 +#define ZYNQ_NAND_SET_OPMODE (1 0) +#define ZYNQ_NAND_ECC_STATUS (1 6) +#define ZYNQ_MEMC_CLRCR_INT_CLR1 (1 4) +#define ZYNQ_MEMC_SR_RAW_INT_ST1 (1 6) +#define ZYNQ_MEMC_SR_INT_ST1 (1 4) + +/* Flash memory controller operating parameters */ +#define ZYNQ_NAND_CLR_CONFIG ((0x1 1) | /* Disable interrupt */ \ + (0x1 4) | /* Clear interrupt */ \ + (0x1 6)) /* Disable ECC interrupt */ + +/* Assuming 50MHz clock (20ns cycle time) and 3V operation */ +#define ZYNQ_NAND_SET_CYCLES ((0x2 20) | /* t_rr from nand_cycles */ \ + (0x2 17) | /* t_ar from nand_cycles */ \ + (0x1 14) | /* t_clr from nand_cycles */ \ + (0x3 11) | /* t_wp from nand_cycles */ \ + (0x2 8) | /* t_rea from nand_cycles */ \ + (0x5 4) | /* t_wc from nand_cycles */ \ + (0x5 0)) /* t_rc from nand_cycles */ + + +#define ZYNQ_NAND_DIRECT_CMD ((0x4 23) | /* Chip 0 from interface 1 */ \ + (0x2 21))/* UpdateRegs operation */ + +#define ZYNQ_NAND_ECC_CONFIG ((0x1 2) | /* ECC available on APB */ \ + (0x1 4) | /* ECC read at end of page */ \ + (0x0 5)) /* No Jumping */ + +#define ZYNQ_NAND_ECC_CMD1 ((0x80) | /* Write command */ \ + (0x00 8) | /* Read command */ \ + (0x30 16) | /* Read End command */ \ + (0x1 24))/* Read End command calid */ + +#define ZYNQ_NAND_ECC_CMD2 ((0x85) | /* Write col change cmd */ \ + (0x05 8) | /* Read col change cmd */ \ + (0xE0 16) | /* Read col change end cmd */ \ + (0x1 24))/* Read col change + end cmd valid */ +/* AXI Address definitions */ +#define START_CMD_SHIFT3 +#define END_CMD_SHIFT 11 +#define END_CMD_VALID_SHIFT20 +#define ADDR_CYCLES_SHIFT 21 +#define CLEAR_CS_SHIFT 21 +#define ECC_LAST_SHIFT 10 +#define COMMAND_PHASE (0 19) +#define DATA_PHASE (1 19) +#define ONDIE_ECC_FEATURE_ADDR 0x90 + +#define ZYNQ_NAND_ECC_LAST (1 ECC_LAST_SHIFT) /* Set ECC_Last */ +#define ZYNQ_NAND_CLEAR_CS (1 CLEAR_CS_SHIFT) /* Clear chip select */ + +/* ECC block registers bit position and bit mask */ +#define
[U-Boot] [PATCH v2 14/35] zynq: Add zynq zed board support
Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Updated domain name in mail ids' boards.cfg | 1 + include/configs/zynq_zed.h | 25 + 2 files changed, 26 insertions(+) create mode 100644 include/configs/zynq_zed.h diff --git a/boards.cfg b/boards.cfg index 9f0374f..b24a245 100644 --- a/boards.cfg +++ b/boards.cfg @@ -355,6 +355,7 @@ Active arm armv7 u8500 st-ericsson snowball Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang b18...@freescale.com Active armarmv7 zynqxilinx zynq zynq_zc70x - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h new file mode 100644 index 000..1d3dcf7 --- /dev/null +++ b/include/configs/zynq_zed.h @@ -0,0 +1,25 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Zynq Evaluation and Development Board - ZedBoard + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZED_H +#define __CONFIG_ZYNQ_ZED_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_QSPI +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include configs/zynq-common.h + +#endif /* __CONFIG_ZYNQ_ZED_H */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 24/35] zynq-common: Define CONFIG_NAND_ZYNQ
Defined CONFIG_NAND_ZYNQ for enabling zynq nand controller with onfi detection support. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com CC: Marek Vasut ma...@denx.de Cc: Scott Wood scottw...@freescale.com --- README| 4 include/configs/zynq-common.h | 10 ++ 2 files changed, 14 insertions(+) diff --git a/README b/README index 8f0b38c..937160c 100644 --- a/README +++ b/README @@ -3920,6 +3920,10 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. environment. If redundant environment is used, it will be copied to CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE. +- CONFIG_NAND_ZYNQ + + Define this for enabling zynq nand controller with onfi detection support. + - CONFIG_ENV_IS_IN_UBI: Define this if you have an UBI volume that you want to use for the diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e2ef61d..bb615d0 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -102,6 +102,16 @@ # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #endif +/* NAND */ +#ifdef CONFIG_NAND_ZYNQ +# define CONFIG_CMD_NAND +# define CONFIG_CMD_NAND_LOCK_UNLOCK +# define CONFIG_SYS_MAX_NAND_DEVICE1 +# define CONFIG_SYS_NAND_SELF_INIT +# define CONFIG_SYS_NAND_ONFI_DETECTION +# define CONFIG_MTD_DEVICE +#endif + /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/35] zynq: Add GEM0, GEM1 configs support
Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index f104558..ea25159 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -57,10 +57,16 @@ #endif /* Ethernet driver */ -#define CONFIG_NET_MULTI -#define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif #define CONFIG_ZYNQ_SPI /* SPI */ @@ -103,12 +109,6 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL -/* MII and Phylib */ -#define CONFIG_MII -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_PHYLIB -#define CONFIG_PHY_MARVELL - /* Environment */ #define CONFIG_ENV_SIZE0x1 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 15/35] zynq-common: Define CONFIG_SPI_FLASH_BAR
Enabled bank/extn' addr register support for accessing 16Mbyte flash devices. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 4896232..1f7672f 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -80,6 +80,7 @@ # define CONFIG_CMD_SF # define CONFIG_SF_DEFAULT_SPEED 3000 # define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_BAR # define CONFIG_SPI_FLASH_STMICRO # define CONFIG_SPI_FLASH_SPANSION # define CONFIG_SPI_FLASH_WINBOND -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 35/35] doc: Update the zynq u-boot status
Updated doc/README.zynq to current status. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none doc/README.zynq | 29 +++-- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/doc/README.zynq b/doc/README.zynq index 7cb87e3..732ef3f 100644 --- a/doc/README.zynq +++ b/doc/README.zynq @@ -28,7 +28,16 @@ and I/O programmability. - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) -3. Bootmode +3. Building + +# Configure for microzed board + $ make zynq_microzed_config +Configuring for zynq_microzed board... + +# Building + $ make DEVICE_TREE=zynq-microzed + +4. Bootmode Zynq has a facility to read the bootmode from the slcr bootmode register once user is setting through jumpers on the board - see page no:1546 on [5] @@ -50,11 +59,11 @@ SLCR bootmode register Bit[3:0] values modeboot variable can assign any of qspiboot, norboot, nandboot, sdboot or jtagboot bootmode strings at runtime. -4. Mainline status +5. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq -- Added zynq boards named - zynq, zynq_dcc +- Add zynq boards support - zc70x, zed, microzed, zc770 - Added zynq drivers: serial - drivers/serial/serial_zynq.c net - drivers/net/zynq_gem.c @@ -62,15 +71,15 @@ SLCR bootmode register Bit[3:0] values mmc - drivers/mmc/zynq_sdhci.c spi- drivers/spi/zynq_spi.c i2c - drivers/i2c/zynq_i2c.c + qspi - drivers/spi/zynq_qspi.c + nand - drivers/mtd/nand/zynq_nand.c +- Done proper cleanups on board configurations +- Added basic FDT support for zynq boards +- d-cache support for zynq_gem.c -5. TODO +6. TODO -- Add zynq boards support - zc70x, zed, microzed, zc770 -- Add zynq qspi controller driver -- Add zynq nand controller driver -- d-cache support for zynq_gem.c -- FDT support for zynq boards -- Need proper cleanups on board configurations +- Add FDT support on individual drivers. [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 31/35] dts: zynq: Add basic fdt support
This patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi- initial arch dts file
zynq-zed.dts - initial zed board dts file
more devices should be added in subsequent patches.
u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot make DEVICE_TREE=zynq-zed
Enabled CONFIG_OF_SEPARATE for building dtb separately.
There is a new binary called u-boot-dtb.bin which is a u-boot
with devicetree supported.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
arch/arm/dts/zynq-7000.dtsi | 13 +
board/xilinx/dts/zynq-zed.dts | 14 ++
include/configs/zynq-common.h | 5 +
3 files changed, 32 insertions(+)
create mode 100644 arch/arm/dts/zynq-7000.dtsi
create mode 100644 board/xilinx/dts/zynq-zed.dts
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
new file mode 100644
index 000..f20b8bd
--- /dev/null
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Xilinx Zynq 7000 DTSI
+ * Describes the hardware common to all Zynq 7000-based boards.
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/include/ skeleton.dtsi
+
+/ {
+ compatible = xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zed.dts b/board/xilinx/dts/zynq-zed.dts
new file mode 100644
index 000..91a5deb
--- /dev/null
+++ b/board/xilinx/dts/zynq-zed.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZED board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZED Board;
+ compatible = xlnx,zynq-zed, xlnx,zynq-7000;
+};
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 6e2b062..c7e9b76 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -244,6 +244,11 @@
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
+/* FDT support */
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+
/* Boot FreeBSD/vxWorks from an ELF image */
#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
# define CONFIG_API
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 06/35] zynq: Enable cache options
- Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index c8ab06f..6e545e5 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -16,6 +16,16 @@ # define CONFIG_CPU_FREQ_HZ8 #endif +/* Cache options */ +#define CONFIG_CMD_CACHE +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +# define CONFIG_SYS_L2_PL310 +# define CONFIG_SYS_PL310_BASE 0xf8f02000 +#endif + /* Serial drivers */ #define CONFIG_BAUDRATE115200 /* The following table includes the supported baudrates */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 33/35] zynq-common: Enable verified boot(RSA)
CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index c7e9b76..fc2ca3c 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -249,6 +249,10 @@ #define CONFIG_OF_SEPARATE #define CONFIG_DISPLAY_BOARDINFO_LATE +/* RSA support */ +#define CONFIG_FIT_SIGNATURE +#define CONFIG_RSA + /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) # define CONFIG_API -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 26/35] zynq: Add support to find bootmode
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
arch/arm/cpu/armv7/zynq/slcr.c | 6 ++
arch/arm/include/asm/arch-zynq/sys_proto.h | 1 +
board/xilinx/zynq/board.c | 33 ++
doc/README.zynq| 27 ++--
include/configs/zynq-common.h | 1 +
5 files changed, 66 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c
index 717ec65..b4c11c3 100644
--- a/arch/arm/cpu/armv7/zynq/slcr.c
+++ b/arch/arm/cpu/armv7/zynq/slcr.c
@@ -101,6 +101,12 @@ void zynq_slcr_devcfg_enable(void)
zynq_slcr_lock();
}
+u32 zynq_slcr_get_boot_mode(void)
+{
+ /* Get the bootmode register value */
+ return readl(slcr_base-boot_mode);
+}
+
u32 zynq_slcr_get_idcode(void)
{
return (readl(slcr_base-pss_idcode) SLCR_IDCODE_MASK)
diff --git a/arch/arm/include/asm/arch-zynq/sys_proto.h
b/arch/arm/include/asm/arch-zynq/sys_proto.h
index 110de90..8f925af 100644
--- a/arch/arm/include/asm/arch-zynq/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynq/sys_proto.h
@@ -13,6 +13,7 @@ extern void zynq_slcr_cpu_reset(void);
extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk);
extern void zynq_slcr_devcfg_disable(void);
extern void zynq_slcr_devcfg_enable(void);
+extern u32 zynq_slcr_get_boot_mode(void);
extern u32 zynq_slcr_get_idcode(void);
extern void zynq_ddrc_init(void);
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 5119c09..118db3a 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -12,6 +12,14 @@
DECLARE_GLOBAL_DATA_PTR;
+/* Bootmode setting values */
+#define ZYNQ_BM_MASK 0x0F
+#define ZYNQ_BM_QSPI 0x01
+#define ZYNQ_BM_NOR0x02
+#define ZYNQ_BM_NAND 0x04
+#define ZYNQ_BM_SD 0x05
+#define ZYNQ_BM_JTAG 0x0
+
#ifdef CONFIG_FPGA
Xilinx_desc fpga;
@@ -59,6 +67,31 @@ int board_init(void)
return 0;
}
+int board_late_init(void)
+{
+ switch ((zynq_slcr_get_boot_mode()) ZYNQ_BM_MASK) {
+ case ZYNQ_BM_QSPI:
+ setenv(modeboot, qspiboot);
+ break;
+ case ZYNQ_BM_NOR:
+ setenv(modeboot, norboot);
+ break;
+ case ZYNQ_BM_NAND:
+ setenv(modeboot, nandboot);
+ break;
+ case ZYNQ_BM_SD:
+ setenv(modeboot, sdboot);
+ break;
+ case ZYNQ_BM_JTAG:
+ setenv(modeboot, jtagboot);
+ break;
+ default:
+ setenv(modeboot, );
+ break;
+ }
+
+ return 0;
+}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
diff --git a/doc/README.zynq b/doc/README.zynq
index 56a74b4..7cb87e3 100644
--- a/doc/README.zynq
+++ b/doc/README.zynq
@@ -28,7 +28,29 @@ and I/O programmability.
- zc770-xm012 (nor)
- zc770-xm013 (dual parallel qspi, gem1)
-3. Mainline status
+3. Bootmode
+
+Zynq has a facility to read the bootmode from the slcr bootmode register
+once user is setting through jumpers on the board - see page no:1546 on [5]
+
+All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins
+on [5].
+
+board_late_init() will read the bootmode values using slcr bootmode register
+at runtime and assign the modeboot variable to specific bootmode string which
+is intern used in autoboot.
+
+SLCR bootmode register Bit[3:0] values
+#define ZYNQ_BM_QSPI 0x01
+#define ZYNQ_BM_NOR0x02
+#define ZYNQ_BM_NAND 0x04
+#define ZYNQ_BM_SD 0x05
+#define ZYNQ_BM_JTAG 0x0
+
+modeboot variable can assign any of qspiboot, norboot, nandboot,
+sdboot or jtagboot bootmode strings at runtime.
+
+4. Mainline status
- Added basic board configurations support.
- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq
@@ -41,7 +63,7 @@ and I/O programmability.
spi- drivers/spi/zynq_spi.c
i2c - drivers/i2c/zynq_i2c.c
-4. TODO
+5. TODO
- Add zynq boards support - zc70x, zed, microzed, zc770
- Add zynq qspi controller driver
@@ -54,6 +76,7 @@ and I/O programmability.
[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
[3] http://zedboard.org/product/zedboard
[4] http://zedboard.org/product/microzed
+[5]
http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
--
Jagannadha Sutradharudu Teki jaga...@xilinx.com
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index bb615d0..676ff12 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -161,6 +161,7 @@
#define CONFIG_CMDLINE_EDITING
#define
[U-Boot] [PATCH v2 22/35] zynq: Add zynq_zc770 xm012 board support
ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Updated domain name in mail ids' boards.cfg| 1 + include/configs/zynq-common.h | 16 include/configs/zynq_zc770.h | 4 3 files changed, 21 insertions(+) diff --git a/boards.cfg b/boards.cfg index 1687169..2dcfce5 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,6 +358,7 @@ Active arm armv7 zynqxilinx zynqzynq_zc70x - Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 72262ae..e2ef61d 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -86,6 +86,22 @@ # define CONFIG_SPI_FLASH_WINBOND #endif +/* NOR */ +#ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_SYS_FLASH_BASE 0xE200 +# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_SYS_MAX_FLASH_BANKS1 +# define CONFIG_SYS_MAX_FLASH_SECT 512 +# define CONFIG_SYS_FLASH_ERASE_TOUT 1000 +# define CONFIG_SYS_FLASH_WRITE_TOUT 5000 +# define CONFIG_FLASH_SHOW_PROGRESS10 +# define CONFIG_SYS_FLASH_CFI +# undef CONFIG_SYS_FLASH_EMPTY_INFO +# define CONFIG_FLASH_CFI_DRIVER +# undef CONFIG_SYS_FLASH_PROTECTION +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#endif + /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 0dea101..5776573 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,10 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_QSPI +#elif defined(CONFIG_ZC770_XM012) +# define CONFIG_ZYNQ_SERIAL_UART1 +# undef CONFIG_SYS_NO_FLASH + #elif defined(CONFIG_ZC770_XM013) # define CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_GEM1 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 34/35] dts: zynq: Add more zynq dts files
This patch adds initial dts support for supported
zynq boards.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
board/xilinx/dts/zynq-microzed.dts| 14 ++
board/xilinx/dts/zynq-zc702.dts | 14 ++
board/xilinx/dts/zynq-zc706.dts | 14 ++
board/xilinx/dts/zynq-zc770-xm010.dts | 14 ++
board/xilinx/dts/zynq-zc770-xm011.dts | 14 ++
board/xilinx/dts/zynq-zc770-xm012.dts | 14 ++
board/xilinx/dts/zynq-zc770-xm013.dts | 14 ++
7 files changed, 98 insertions(+)
create mode 100644 board/xilinx/dts/zynq-microzed.dts
create mode 100644 board/xilinx/dts/zynq-zc702.dts
create mode 100644 board/xilinx/dts/zynq-zc706.dts
create mode 100644 board/xilinx/dts/zynq-zc770-xm010.dts
create mode 100644 board/xilinx/dts/zynq-zc770-xm011.dts
create mode 100644 board/xilinx/dts/zynq-zc770-xm012.dts
create mode 100644 board/xilinx/dts/zynq-zc770-xm013.dts
diff --git a/board/xilinx/dts/zynq-microzed.dts
b/board/xilinx/dts/zynq-microzed.dts
new file mode 100644
index 000..6da71c1
--- /dev/null
+++ b/board/xilinx/dts/zynq-microzed.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx MicroZED board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq MicroZED Board;
+ compatible = xlnx,zynq-microzed, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc702.dts b/board/xilinx/dts/zynq-zc702.dts
new file mode 100644
index 000..667dc28
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc702.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC702 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC702 Board;
+ compatible = xlnx,zynq-zc702, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc706.dts b/board/xilinx/dts/zynq-zc706.dts
new file mode 100644
index 000..526fc88
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc706.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC706 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC706 Board;
+ compatible = xlnx,zynq-zc706, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm010.dts
b/board/xilinx/dts/zynq-zc770-xm010.dts
new file mode 100644
index 000..8b542a1
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm010.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM010 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC770 XM010 Board;
+ compatible = xlnx,zynq-zc770-xm010, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm011.dts
b/board/xilinx/dts/zynq-zc770-xm011.dts
new file mode 100644
index 000..12a6d52
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm011.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM011 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC770 XM011 Board;
+ compatible = xlnx,zynq-zc770-xm011, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm012.dts
b/board/xilinx/dts/zynq-zc770-xm012.dts
new file mode 100644
index 000..0379a07
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm012.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM012 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC770 XM012 Board;
+ compatible = xlnx,zynq-zc770-xm012, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm013.dts
b/board/xilinx/dts/zynq-zc770-xm013.dts
new file mode 100644
index 000..a4f9e05
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm013.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM013 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC770 XM013 Board;
+ compatible = xlnx,zynq-zc770-xm013, xlnx,zynq-7000;
+};
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 18/35] zynq: zc70x: Add Catalyst 24WC08 EEPROM config support
Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 10 ++ include/configs/zynq_zc70x.h | 1 + 2 files changed, 11 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 6681f27..72262ae 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -108,6 +108,16 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 #endif +/* EEPROM */ +#ifdef CONFIG_ZYNQ_EEPROM +# define CONFIG_CMD_EEPROM +# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN1 +# define CONFIG_SYS_I2C_EEPROM_ADDR0x54 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +# define CONFIG_SYS_EEPROM_SIZE1024 /* Bytes */ +#endif + #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index efe61b3..6b1e5e2 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -21,6 +21,7 @@ #define CONFIG_ZYNQ_QSPI #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_BOOT_FREEBSD #include configs/zynq-common.h -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 09/35] zynq-common: Rename zynq with zynq-common
zynq.h - zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.
zynq.h is no longer exists hense removed from boards.cfg
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
boards.cfg| 2 --
include/configs/{zynq.h = zynq-common.h} | 9 ++---
2 files changed, 6 insertions(+), 5 deletions(-)
rename include/configs/{zynq.h = zynq-common.h} (95%)
diff --git a/boards.cfg b/boards.cfg
index 2128996..570d141 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -354,8 +354,6 @@ Active arm armv7 socfpga altera
socfpga
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
-Active arm armv7 zynqxilinx zynq
zynq -
Michal Simek mon...@monstr.eu
-Active arm armv7 zynqxilinx zynq
zynq_dcc zynq:ZYNQ_DCC
Michal Simek mon...@monstr.eu
Active arm armv7:arm720t tegra114nvidia dalmore
dalmore -
Tom Warren twar...@nvidia.com
Active arm armv7:arm720t tegra20 avionic-design medcom-wide
medcom-wide -
Thierry Reding thierry.red...@avionic-design.de
Active arm armv7:arm720t tegra20 avionic-design plutux
plutux -
Thierry Reding thierry.red...@avionic-design.de
diff --git a/include/configs/zynq.h b/include/configs/zynq-common.h
similarity index 95%
rename from include/configs/zynq.h
rename to include/configs/zynq-common.h
index ea25159..9fe06e8 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq-common.h
@@ -1,11 +1,14 @@
/*
* (C) Copyright 2012 Michal Simek mon...@monstr.eu
+ * (C) Copyright 2013 Xilinx, Inc.
+ *
+ * Common configuration options for all Zynq boards.
*
* SPDX-License-Identifier:GPL-2.0+
*/
-#ifndef __CONFIG_ZYNQ_H
-#define __CONFIG_ZYNQ_H
+#ifndef __CONFIG_ZYNQ_COMMON_H
+#define __CONFIG_ZYNQ_COMMON_H
/* High Level configuration Options */
#define CONFIG_ARMV7
@@ -170,4 +173,4 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#endif /* __CONFIG_ZYNQ_H */
+#endif /* __CONFIG_ZYNQ_COMMON_H */
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 27/35] zynq-common: Define default environment
Defined default env. for autoboot FIT image from
respective boot devices.
Default settings:
fit_image=fit.itb
load_addr=0x200
fit_size=0x80
flash_off=0x10
nor_flash_off=0xE210
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 30 +-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 676ff12..ea2fb04 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -153,7 +153,35 @@
/* Environment */
#define CONFIG_ENV_SIZE0x1 /* Env. sector size */
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SYS_LOAD_ADDR 0
+
+/* Default environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ fit_image=fit.itb\0 \
+ load_addr=0x200\0 \
+ fit_size=0x80\0 \
+ flash_off=0x10\0 \
+ nor_flash_off=0xE210\0\
+ fdt_high=0x2000\0 \
+ initrd_high=0x2000\0 \
+ qspiboot=echo Copying FIT from QSPI flash to RAM... \
+ sf probe 0 0 0 \
+ sf read ${load_addr} ${flash_off} ${fit_size} \
+ bootm ${load_addr}\0 \
+ norboot=echo Copying FIT from NOR flash to RAM... \
+ cp.b ${nor_flash_off} ${load_addr} ${fit_size} \
+ bootm ${load_addr}\0 \
+ nandboot=echo Copying FIT from NAND flash to RAM... \
+ nand read ${load_addr} ${flash_off} ${fit_size} \
+ bootm ${load_addr}\0 \
+ sdboot=echo Copying FIT from SD to RAM... \
+ fatload mmc 0 ${load_addr} ${fit_image} \
+ bootm ${load_addr}\0 \
+ jtagboot=echo TFTPing FIT to RAM... \
+ tftp ${load_addr} ${fit_image} \
+ bootm ${load_addr}\0
+#define CONFIG_BOOTCOMMAND run $modeboot
+#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
+#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT zynq-uboot
--
1.8.3
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 13/35] zynq: Add zynq zc70x board support
The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded
processing includes ASIC and FPGA design.
ZC702-:
APSOC:
- XC7Z020-CLG484-1
Memory:
- DDR3 Component Memory 1GB
- 16MB Quad SPI Flash
- IIC - 1 KB EEPROM
Connectivity:
- Gigabit Ethernet GMII, RGMII and SGMII.
- USB OTG - Host USB
- IIC Bus Headers/HUB
- 1 CAN with Wake on CAN
- USB-UART
Video/Display:
- HDMI Video OUT
- 8X LEDs
Control I/O:
- 3 User Push Buttons
- 2 User Switches
- 8 User LEDs
For more info on zc702 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
ZC706-:
APSOC:
- XC7Z045 FFG900 -2 AP SoC
Memory:
- DDR3 Component Memory 1GB (PS)
- DDR3 SODIM Memory 1GB (PL)
- 2X16MB Quad SPI Flash (dual parallel)
- IIC - 1 KB EEPROM
Connectivity:
- PCIe Gen2x4
- SFP+ and SMA Pairs
- GigE RGMII Ethernet (PS)
- USB OTG 1 (PS) - Host USB
- IIC Bus Headers/HUB (PS)
- 1 CAN with Wake on CAN (PS)
- USB-UART
Video/Display:
- HDMI 8 color RGB 4.4.4 1080P-60 OUT
- HDMI IN 8 color RGB 4.4.4
Control I/O:
- 2 User Push Buttons/Dip Switch, 2 User LEDs
- IIC access to GPIO
- SDIO (SD Card slot)
- 3 User Push Buttons, 2 User Switches, 8 User LEDs
For more info on zc706 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: Updated domain name in mail ids'
boards.cfg| 1 +
include/configs/zynq-common.h | 9 -
include/configs/zynq_zc70x.h | 26 ++
3 files changed, 27 insertions(+), 9 deletions(-)
create mode 100644 include/configs/zynq_zc70x.h
diff --git a/boards.cfg b/boards.cfg
index 570d141..9f0374f 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -354,6 +354,7 @@ Active arm armv7 socfpga altera
socfpga
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
+Active armarmv7 zynqxilinx zynq
zynq_zc70x -
Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki
jaga...@xilinx.com
Active arm armv7:arm720t tegra114nvidia dalmore
dalmore -
Tom Warren twar...@nvidia.com
Active arm armv7:arm720t tegra20 avionic-design medcom-wide
medcom-wide -
Thierry Reding thierry.red...@avionic-design.de
Active arm armv7:arm720t tegra20 avionic-design plutux
plutux -
Thierry Reding thierry.red...@avionic-design.de
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index e6990ea..4896232 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -36,7 +36,6 @@
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
/* Zynq Serial driver */
-#define CONFIG_ZYNQ_SERIAL_UART1
#ifdef CONFIG_ZYNQ_SERIAL_UART0
# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE000
# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
@@ -60,8 +59,6 @@
#endif
/* Ethernet driver */
-#define CONFIG_ZYNQ_GEM0
-#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
# define CONFIG_NET_MULTI
# define CONFIG_ZYNQ_GEM
@@ -71,7 +68,6 @@
# define CONFIG_PHY_MARVELL
#endif
-#define CONFIG_ZYNQ_SPI
/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_SPI_FLASH
@@ -89,10 +85,6 @@
# define CONFIG_SPI_FLASH_WINBOND
#endif
-/* NOR */
-#define CONFIG_SYS_NO_FLASH
-
-#define CONFIG_ZYNQ_SDHCI0
/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
@@ -106,7 +98,6 @@
# define CONFIG_DOS_PARTITION
#endif
[U-Boot] [PATCH v2 30/35] zynq-common: Define CONFIG_ENV_OVERWRITE
Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 35c3952..6e2b062 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -153,6 +153,9 @@ /* Total Size of Environment Sector */ #define CONFIG_ENV_SIZE(128 10) +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + /* Environment */ #ifndef CONFIG_ENV_IS_NOWHERE # ifndef CONFIG_SYS_NO_FLASH -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 21/35] zynq: Add zynq_zc770 xm013 board support
ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: Updated domain name in mail ids' boards.cfg | 1 + include/configs/zynq_zc770.h | 6 ++ 2 files changed, 7 insertions(+) diff --git a/boards.cfg b/boards.cfg index 11c7f9d..1687169 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,6 +358,7 @@ Active arm armv7 zynqxilinx zynqzynq_zc70x - Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index f12f816..0dea101 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,12 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_QSPI +#elif defined(CONFIG_ZC770_XM013) +# define CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_GEM1 +# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 +# define CONFIG_ZYNQ_QSPI + #else # define CONFIG_ZYNQ_SERIAL_UART0 #endif -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 11/35] spi: Add zynq qspi controller driver
Zynq qspi controller driver supports single bus
with singe chipselect.
Zynq qspi can be operated in below connection modes
- single qspi
- dual qspi, with dual stacked
- dual qspi, with dual parallel
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: Fixed few issues
arch/arm/include/asm/arch-zynq/hardware.h | 1 +
drivers/spi/Makefile | 1 +
drivers/spi/zynq_qspi.c | 449 ++
3 files changed, 451 insertions(+)
create mode 100644 drivers/spi/zynq_qspi.c
diff --git a/arch/arm/include/asm/arch-zynq/hardware.h
b/arch/arm/include/asm/arch-zynq/hardware.h
index cd69677..05870ae 100644
--- a/arch/arm/include/asm/arch-zynq/hardware.h
+++ b/arch/arm/include/asm/arch-zynq/hardware.h
@@ -19,6 +19,7 @@
#define ZYNQ_I2C_BASEADDR1 0xE0005000
#define ZYNQ_SPI_BASEADDR0 0xE0006000
#define ZYNQ_SPI_BASEADDR1 0xE0007000
+#define ZYNQ_QSPI_BASEADDR 0xE000D000
#define ZYNQ_DDRC_BASEADDR 0xF8006000
/* Reflect slcr offsets */
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index ed4ecd7..8b10730 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
obj-$(CONFIG_TI_QSPI) += ti_qspi.o
obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o
obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
+obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
new file mode 100644
index 000..48f73c7
--- /dev/null
+++ b/drivers/spi/zynq_qspi.c
@@ -0,0 +1,449 @@
+/*
+ * (C) Copyright 2013 Xilinx, Inc.
+ *
+ * Zynq PS Quad-SPI(QSPI) controller driver (master mode only)
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include config.h
+#include common.h
+#include malloc.h
+#include spi.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+/* Zynq qspi register bit masks ZYNQ_QSPI_REG_BIT_MASK */
+#define ZYNQ_QSPI_CR_IFMODE_MASK (1 31) /* Flash intrface mode*/
+#define ZYNQ_QSPI_CR_MSA_MASK (1 15) /* Manual start enb */
+#define ZYNQ_QSPI_CR_MCS_MASK (1 14) /* Manual chip select */
+#define ZYNQ_QSPI_CR_PCS_MASK (1 10) /* Peri chip select */
+#define ZYNQ_QSPI_CR_FW_MASK (0x3 6) /* FIFO width */
+#define ZYNQ_QSPI_CR_BRD_MASK (0x7 3) /* Baud rate div */
+#define ZYNQ_QSPI_CR_CPHA_MASK (1 2)/* Clock phase */
+#define ZYNQ_QSPI_CR_CPOL_MASK (1 1)/* Clock polarity */
+#define ZYNQ_QSPI_CR_MSTREN_MASK (1 0)/* Mode select */
+#define ZYNQ_QSPI_IXR_RXNEMPTY_MASK(1 4)/* RX_FIFO_not_empty */
+#define ZYNQ_QSPI_IXR_TXOW_MASK(1 2)/*
TX_FIFO_not_full */
+#define ZYNQ_QSPI_IXR_ALL_MASK 0x7F/* All IXR bits */
+#define ZYNQ_QSPI_ENR_SPI_EN_MASK (1 0)/* SPI Enable */
+
+/* QSPI Transmit Data Register */
+#define ZYNQ_QSPI_TXD_00_00_OFFSET 0x1C /* Transmit 4-byte inst */
+#define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst */
+#define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst */
+#define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst */
+
+/* Definitions of the flash commands - Flash insts in ascending order */
+#define ZYNQ_QSPI_FLASH_INST_WRSR 0x01/* Write status register */
+#define ZYNQ_QSPI_FLASH_INST_PP0x02/* Page program */
+#define ZYNQ_QSPI_FLASH_INST_WRDS 0x04/* Write disable */
+#define ZYNQ_QSPI_FLASH_INST_RDSR1 0x05/* Read status register 1 */
+#define ZYNQ_QSPI_FLASH_INST_WREN 0x06/* Write enable */
+#define ZYNQ_QSPI_FLASH_INST_AFR 0x0B/* Fast read data bytes */
+#define ZYNQ_QSPI_FLASH_INST_BE_4K 0x20/* Erase 4KiB block */
+#define ZYNQ_QSPI_FLASH_INST_RDSR2 0x35/* Read status register 2 */
+#define ZYNQ_QSPI_FLASH_INST_BE_32K0x52/* Erase 32KiB block */
+#define ZYNQ_QSPI_FLASH_INST_RDID 0x9F/* Read JEDEC ID */
+#define ZYNQ_QSPI_FLASH_INST_SE0xD8/* Sector erase
(usually 64KB)*/
+
+#define ZYNQ_QSPI_FIFO_DEPTH 63
+#define ZYNQ_QSPI_MAX_INPUT_HZ 2
+#ifndef CONFIG_SYS_ZYNQ_QSPI_WAIT
+#define CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
+#endif
+
+/* zynq qspi register set */
+struct zynq_qspi_regs {
+ u32 cr; /* 0x00 */
+ u32 isr;/* 0x04 */
+ u32 ier;/* 0x08 */
+ u32 idr;/* 0x0C */
+ u32 imr;/* 0x10 */
+ u32 enr;/* 0x14 */
+ u32 dr; /* 0x18 */
+ u32 txd0r; /* 0x1C */
+ u32 rxdr; /* 0x20 */
+ u32 sicr; /* 0x24 */
+ u32 txftr; /* 0x28 */
+ u32 rxftr; /* 0x2C */
+ u32 gpior; /* 0x30 */
+ u32 reserved0[19];
+ u32 txd1r; /* 0x80 */
+ u32 txd2r; /* 0x84 */
+ u32
Re: [U-Boot] [PATCH v2 2/5] arm: pxa: fix LP-8x4x USB support
On Tuesday, December 17, 2013 at 02:03:41 AM, Sergei Ianovich wrote: USB was broken initially. Power polarity should be direct. Signed-off-by: Sergei Ianovich ynv...@gmail.com CC: Marek Vasut ma...@denx.de I pushed new u-boot-pxa/master, can you please rebase this one patch and repost? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/5] fix and update LP-8x4x to boot DT kernel
On Tuesday, December 17, 2013 at 02:03:39 AM, Sergei Ianovich wrote: Linux kernel maintainers require new machnines to support device tree boot. The config for LP-8x4x needs updating. In addition, there are a few fixes to board's configuration. v2 fixes review comments made by Marek Vasut. Sergei Ianovich (5): ARM: pxa: prevent PXA270 occasional reboot freezes arm: pxa: fix LP-8x4x USB support arm: pxa: fix 2nd flash chip address on LP-8x4x arm: pxa: update LP-8x4x to boot DT kernel arm: pxa: init ethaddr for LP-8x4x using DT arch/arm/cpu/pxa/pxa2xx.c| 1 + board/icpdas/lp8x4x/lp8x4x.c | 39 +-- include/configs/lp8x4x.h | 15 +++ 3 files changed, 21 insertions(+), 34 deletions(-) Applied 1,3,4,5 , thanks! 2 doesn't apply so see my comment please. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] usb: gadget: fotg210: add w1c interrupt status support
On Wednesday, December 18, 2013 at 08:24:48 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Since hardware revision 1.11.0, the following interrupt status registers
are now write-1-clear (w1c):
What did they look like before ?
1. Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5)
2. Interrupt Source Group 2 Register (0x14C) (All bits)
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
drivers/usb/gadget/fotg210.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c
index 6e19db1..e3a61cc 100644
--- a/drivers/usb/gadget/fotg210.c
+++ b/drivers/usb/gadget/fotg210.c
@@ -847,8 +847,11 @@ int usb_gadget_handle_interrupts(void)
/* CX interrupts */
if (gisr GISR_GRP0) {
st = readl(regs-gisr0);
+#ifdef CONFIG_USB_GADGET_FOTG210_ISRW1C
Can we not get rid of this ifdef somehow please ? Like detect the revision on-
the-fly and handle the bit accordingly or such ?
Best regards,
Marek Vasut
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] usb: gadget: fotg210: EP0 fifo empty indication is non-reliable
On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Because the EP0 fifo empty indication is non-reliable,
an extra delay is necessary to avoid data corruption while
handling packets with size greater than 64 bytes.
This workaround should be applied to all hardware revisions.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
drivers/usb/gadget/fotg210.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c
index e3a61cc..14bfec6 100644
--- a/drivers/usb/gadget/fotg210.c
+++ b/drivers/usb/gadget/fotg210.c
@@ -245,6 +245,7 @@ static int fotg210_dma(struct fotg210_ep *ep, struct
fotg210_request *req) if (ep-id == 0) {
/* Wait until cx/ep0 fifo empty */
fotg210_cxwait(chip, CXFIFO_CXFIFOE);
+ udelay_masked(1);
Why don't you use regular udelay() here please ? Also, how exactly does the
delay help solving the unreliability problem please?
writel(DMAFIFO_CX, regs-dma_fifo);
} else {
/* Wait until epx fifo empty */
Best regards,
Marek Vasut
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 23/35] nand: Add zynq nand controller driver support
On Wednesday, December 18, 2013 at 04:30:08 PM, Jagannadha Sutradharudu Teki wrote: Added support for Zynq Nand controller driver. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com CC: Marek Vasut ma...@denx.de Cc: Scott Wood scottw...@freescale.com --- V2: Fixed issues pointed by Scott arch/arm/include/asm/arch-zynq/hardware.h |2 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/zynq_nand.c | 1198 + 3 files changed, 1201 insertions(+) create mode 100644 drivers/mtd/nand/zynq_nand.c [...] +#define zynq_nand_smc_base ((struct zynq_nand_smc_regs __iomem *)\ + ZYNQ_SMC_BASEADDR) Why don't you make this a static const * variable ? [...] Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 29/35] zynq-common: Define flash env. partition
Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 7f2ad96..35c3952 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -154,7 +154,21 @@ #define CONFIG_ENV_SIZE(128 10) /* Environment */ -#define CONFIG_ENV_IS_NOWHERE +#ifndef CONFIG_ENV_IS_NOWHERE +# ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_ENV_IS_IN_FLASH +# elif defined(CONFIG_ZYNQ_QSPI) +# define CONFIG_ENV_IS_IN_SPI_FLASH +# elif defined(CONFIG_NAND_ZYNQ) +# define CONFIG_ENV_IS_IN_NAND +# elif defined(CONFIG_SYS_NO_FLASH) +# define CONFIG_ENV_IS_NOWHERE +# endif + +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# define CONFIG_ENV_OFFSET 0xE +# define CONFIG_CMD_SAVEENV +#endif /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 12/35] zynq-common: Enable CONFIG_ZYNQ_QSPI
Tested qspi on zynq board with stmicro, spansion and winbond flashes by enabling CONFIG_ZYNQ_QSPI. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- V2: none include/configs/zynq-common.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 9fe06e8..e6990ea 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -79,6 +79,16 @@ # define CONFIG_CMD_SF #endif +/* QSPI */ +#ifdef CONFIG_ZYNQ_QSPI +# define CONFIG_CMD_SF +# define CONFIG_SF_DEFAULT_SPEED 3000 +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_STMICRO +# define CONFIG_SPI_FLASH_SPANSION +# define CONFIG_SPI_FLASH_WINBOND +#endif + /* NOR */ #define CONFIG_SYS_NO_FLASH -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
Cc: Andy Fleming aflem...@freescale.com
---
arch/arm/include/asm/arch-socfpga/dwmmc.h | 12 +
drivers/mmc/Makefile |1 +
drivers/mmc/socfpga_dw_mmc.c | 72 +
3 files changed, 85 insertions(+)
create mode 100755 arch/arm/include/asm/arch-socfpga/dwmmc.h
create mode 100755 drivers/mmc/socfpga_dw_mmc.c
diff --git a/arch/arm/include/asm/arch-socfpga/dwmmc.h
b/arch/arm/include/asm/arch-socfpga/dwmmc.h
new file mode 100755
index 000..945eb64
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/dwmmc.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef_SOCFPGA_DWMMC_H_
+#define_SOCFPGA_DWMMC_H_
+
+extern int socfpga_dwmmc_init(u32 regbase, int bus_width, int index);
+
+#endif /* _SOCFPGA_SDMMC_H_ */
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 1ed26ca..e793ed9 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
obj-$(CONFIG_DWMMC) += dw_mmc.o
obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
+obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
else
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
new file mode 100755
index 000..554f51b
--- /dev/null
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include dwmmc.h
+#include asm/arch/dwmmc.h
+
+#define CLKMGR_PERPLLGRP_EN_REG(SOCFPGA_CLKMGR_ADDRESS + 0xA0)
+#define CLKMGR_SDMMC_CLK_ENABLE(1 8)
+#define SYSMGR_SDMMCGRP_CTRL_REG (SOCFPGA_SYSMGR_ADDRESS + 0x108)
+#define SYSMGR_SDMMC_CTRL_GET_DRVSEL(x)(((x) 0) 0x7)
+#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \
+ drvsel) 0) 0x7) | (((smplsel) 3) 0x38))
+
+static char *SOCFPGA_NAME = SOCFPGA DWMMC;
+
+static void socfpga_dwmci_clksel(struct dwmci_host *host)
+{
+ unsigned int en;
+ unsigned int drvsel;
+ unsigned int smplsel;
+
+ /* Disable SDMMC clock. */
+ en = readl(CLKMGR_PERPLLGRP_EN_REG);
+ en = ~CLKMGR_SDMMC_CLK_ENABLE;
+ writel(en, CLKMGR_PERPLLGRP_EN_REG);
+
+ /* Configures drv_sel and smpl_sel */
+ drvsel = 3;
+ smplsel = 0;
+
+ debug(%s: drvsel %d smplsel %d\n, __FUNCTION__, drvsel, smplsel);
+ writel(SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel),
+ SYSMGR_SDMMCGRP_CTRL_REG);
+
+ debug(%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n, __FUNCTION__,
+ readl(SYSMGR_SDMMCGRP_CTRL_REG));
+ /* Enable SDMMC clock */
+ en = readl(CLKMGR_PERPLLGRP_EN_REG);
+ en |= CLKMGR_SDMMC_CLK_ENABLE;
+ writel(en, CLKMGR_PERPLLGRP_EN_REG);
+}
+
+int socfpga_dwmmc_init(u32 regbase, int bus_width, int index)
+{
+ struct dwmci_host *host = NULL;
+ host = calloc(sizeof(struct dwmci_host), 1);
+ if (!host) {
+ printf(dwmci_host calloc fail!\n);
+ return 1;
+ }
+
+ host-name = SOCFPGA_NAME;
+ host-ioaddr = (void *)regbase;
+ host-buswidth = bus_width;
+ host-clksel = socfpga_dwmci_clksel;
+ host-dev_index = index;
+ /* fixed clock divide by 4 which due to the SDMMC wrapper */
+ host-bus_hz = CONFIG_DWMMC_BUS_HZ;
+ host-fifoth_val = MSIZE(0x2) |
+ RX_WMARK(CONFIG_DWMMC_FIFO_DEPTH / 2 - 1) |
+ TX_WMARK(CONFIG_DWMMC_FIFO_DEPTH / 2);
+
+ add_dwmci(host, host-bus_hz, 40);
+
+ return 0;
+}
+
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Makefile: fix broken pipe error for lcd4_lwmon5 board
Hi Masahiro, On 18 December 2013 03:00, Masahiro Yamada yamad...@jp.panasonic.com wrote: Before this commit, a broken pipe error sometimes happened when building lcd4_lwmon5 board with Buildman. This commit re-writes build rules of u-boot.spr and u-boot-img-spl-at-end.bin more simply without using a pipe. Besides fixing a broken pipe error, this commit gives us other advantages: - Do not generate intermidiate files, spl/u-boot-spl.img and spl/u-boot-spl-pad.img for creating u-boot.spr - Do not generate an intermidiate file, u-boot-pad.img for creating u-boot-img-spl-at-end.bin Such intermidiate files were not deleted by make clean or make mrpropr. Nor u-boot-pad.img was ignored by git. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Acked-by: Stefan Roese s...@denx.de --- Hello Simon. I noticed a broken pipe error when I was using Buildman. The error happens here: $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ of=$(obj)u-boot-pad.img 2/dev/null I cannot understand why this error happens on Buildman. (I have never seen it on MAKEALL script.) Does the same error happen on your machine too? Do you have any idea why this error happen? What I did is as follows: $ git checkout master $ git describe v2014.01-rc2 $ git checkout -b cosmetic Add many cosmetic commits. Do not change any source files. (For example, changing README files) I think about 20 commits are enough. $ git branch --set-upstream-to=master $ tool/buildman/buildman -b cosmetic lcd4_lwmon5 No section: 'make-flags' Building 21 commits for 1 boards (1 thread, 8 jobs per thread) Cloning repo for thread 0 1470 /21 lcd4_lwmon5 $ tools/buildman/buildman -se -b cosmetic No section: 'make-flags' Summary of 21 commits for 1194 boards (8 threads, 1 job per thread) 01: Prepare v2014.01-rc2 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 02: cosmetic1 powerpc:lcd4_lwmon5 -tr: write error: Broken pipe -tr: write error 03: cosmetic2 04: cosmetic3 05: cosmetic4 06: cosmetic5 07: cosmetic6 08: cosmetic7 09: cosmetic8 10: cosmetic9 11: cosmetic10 12: cosmetic11 13: cosmetic12 14: cosmetic13 15: cosmetic14 16: cosmetic15 powerpc: + lcd4_lwmon5 +tr: write error: Broken pipe +tr: write error 17: cosmetic16 18: cosmetic17 19: cosmetic18 20: cosmetic19 21: cosmetic20 Here, a broken pipe error occurred at 01 and fixed at 02. It happend again at 16. Since buildman does incremental builds by default, if nothing changes in the the build, that Makefile rule may not be invoked. It is possible that commits 03 to 15 don't update anything which causes the file to be rebuilt. As to the real problem, I'm not sure, but it could be that the stderr redirect causes problems. Perhaps there is something wrong in buildman's handling here, but I can't see a problem. Anyway your fixed version of the Makefile looks much nicer to me. But the result changes every time. The error happens randomly. That conflicts with my comment above. I suppose another possibility is a race condition in the Makefile brought on by -j. Regards, Simon Changes in v2: - Delete an unnecessary line cp $(obj)u-boot.img $@ Makefile | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index f03d116..c9d372b 100644 --- a/Makefile +++ b/Makefile @@ -471,12 +471,10 @@ $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin $(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \ -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER \ - -d $(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl.img - tr \000 \377 /dev/zero | dd ibs=1 count=$(CONFIG_SPL_PAD_TO) \ - of=$(obj)spl/u-boot-spl-pad.img 2/dev/null - dd if=$(obj)spl/u-boot-spl.img of=$(obj)spl/u-boot-spl-pad.img \ - conv=notrunc 2/dev/null - cat $(obj)spl/u-boot-spl-pad.img $(obj)u-boot.img $@ + -d $(obj)spl/u-boot-spl.bin $@ + $(OBJCOPY) -I binary -O binary \ + --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@ + cat $(obj)u-boot.img $@ ifneq ($(CONFIG_TEGRA),) $(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin @@ -499,11 +497,9 @@ $(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img # at the start padded up to the start of the SPL image. And then concat # the SPL image to the end. $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin
[U-Boot] [PATCH v3] arm: pxa: fix LP-8x4x USB support
Signed-off-by: Sergei Ianovich ynv...@gmail.com
CC: Marek Vasut ma...@denx.de
---
Changes v2..v3
* fixed merge conflict
* added checks for index and init type
Changes v1..v2
* new patch
board/icpdas/lp8x4x/lp8x4x.c | 38 --
include/configs/lp8x4x.h | 3 +--
2 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/board/icpdas/lp8x4x/lp8x4x.c b/board/icpdas/lp8x4x/lp8x4x.c
index aea18aa..a136dc4 100644
--- a/board/icpdas/lp8x4x/lp8x4x.c
+++ b/board/icpdas/lp8x4x/lp8x4x.c
@@ -61,15 +61,24 @@ int board_mmc_init(bd_t *bis)
#ifdef CONFIG_CMD_USB
int board_usb_init(int index, enum usb_init_type init)
{
- writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL)
- ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
- UHCHR);
+ if (index !=0 || init != USB_INIT_HOST)
+ return -1;
+
+ writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
+
+ writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
+ udelay(11);
+ writel(readl(UHCHR) ~UHCHR_FHR, UHCHR);
writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
while (readl(UHCHR) UHCHR_FSBIR)
continue; /* required by checkpath.pl */
+ writel(readl(UHCHR) ~UHCHR_SSEP0, UHCHR);
+ writel(readl(UHCRHDA) ~(0x1000), UHCRHDA);
+ writel(readl(UHCRHDA) | 0x800, UHCRHDA);
+
writel(readl(UHCHR) ~UHCHR_SSE, UHCHR);
writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
@@ -83,19 +92,10 @@ int board_usb_init(int index, enum usb_init_type init)
/* Set port power control mask bits, only 3 ports. */
writel(readl(UHCRHDB) | (0x717), UHCRHDB);
- /* enable port 2 */
- writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
- UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
return 0;
}
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- return 0;
-}
-
-void usb_board_stop(void)
+int usb_board_stop(void)
{
writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
udelay(11);
@@ -104,9 +104,19 @@ void usb_board_stop(void)
writel(readl(UHCCOMS) | 1, UHCCOMS);
udelay(10);
+ writel(readl(UHCHR) | UHCHR_SSEP0 | UHCHR_SSE, UHCHR);
+
writel(readl(CKEN) ~CKEN10_USBHOST, CKEN);
- return;
+ return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ if (index !=0 || init != USB_INIT_HOST)
+ return -1;
+
+ return usb_board_stop();
}
#endif
diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h
index 4b70cc4..8e58fea 100644
--- a/include/configs/lp8x4x.h
+++ b/include/configs/lp8x4x.h
@@ -184,7 +184,7 @@
#defineCONFIG_SYS_GAFR1_L_VAL 0x999a955a
#defineCONFIG_SYS_GAFR1_U_VAL 0xaaa5a00a
#defineCONFIG_SYS_GAFR2_L_VAL 0x
-#defineCONFIG_SYS_GAFR2_U_VAL 0x55f0a402
+#defineCONFIG_SYS_GAFR2_U_VAL 0x55f9a402
#defineCONFIG_SYS_GAFR3_L_VAL 0x540a950c
#defineCONFIG_SYS_GAFR3_U_VAL 0x1599
@@ -232,7 +232,6 @@
*/
#ifdef CONFIG_CMD_USB
#defineCONFIG_USB_OHCI_NEW
-#defineCONFIG_SYS_USB_OHCI_CPU_INIT
#defineCONFIG_SYS_USB_OHCI_BOARD_INIT
#defineCONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#defineCONFIG_SYS_USB_OHCI_REGS_BASE 0x4C00
--
1.8.5.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/34] Switch over to real Kbuild
Hi Masahiro, On 16 December 2013 02:42, Masahiro Yamada yamad...@jp.panasonic.com wrote: Hello Simon Further to this one - here is my full buildman output. There are a few PPC problems also: Your close check is highly appreciated. Thanks! 29: Makefile: move more flags to the top Makefile powerpc: + rainier_nand glacier_nand canyonlands_nand sequoia_nand haleakala_nand kilauea_nand acadia_nand bamboo_nand 30: Makefile: refactor include path settings 31: Makefile: move more stuff to top Makefile powerpc:rainier_nand glacier_nand canyonlands_nand sequoia_nand haleakala_nand kilauea_nand acadia_nand bamboo_nand It looks like nand_spl boards are broken at 29 and fixed at 31. I will fix this problem at v2. 34: Kbuild: change out-of-tree building sandbox: + sandbox blackfin:bf561-acvilon cm-bf537u 35: Kbuild: add dummy obj-y to create built-in.o 36: Makefile: rename scripts/Makefile.build to scripts/Makefile.build.tmp 37: Kbuild: import more build scripts from Linux v3.12 tag 38: Kbuild: use Linux Kernel build scripts sandbox:sandbox blackfin: + bf561-acvilon cm-bf537u Sandbox is broken at 34 and fixed at 38. I will fix this problem too at v2. buildman is also reporting something about bf561-acvilon and cm-bf537u. But as long as I tested, I believe it is unrelated to Kbuild. Sonic Zhang posted some patches to fix errors/warnings of Blackfin boards. Please check this again after u-boot-blackfin/mater is merged. What will happen with the 'FIX ME's that are generated? e.g.: I mentioned about My Next Plan in this covor letter. I want to refactor more makefiles lator including such as FIX ME or TODO items. +# FIX ME +ifneq ($(filter lib lib/lzma lib/zlib, $(obj)),) +ccflags-y := -O2 +endif I was thinking to do something about this after Kconfig. Some Blackfin, M68K boards want to compile lib, lib/lzma, lib/zlib with -O2 option and other sources with -Os option. I think this feature is WANT, not MUST. If this feature deserves maintainance, how about adding new CONFIG macro like this? config CC_OPTIMIZE_LIBS_FOR_SPEED bool Optimize libraries for speed help Enabling this option will pass -O2 when compiling C sources under lib/ directory even if -Os is given to the whole sources. If unsure, say N. Sounds reasonable to me. And add the following line to lib/Makefile. subdir-ccflags-$(CONFIG_OPTIMIZE_LIBS_FOR_SPEED) += -O2 Have you done any comparison on build times? Do you mean Kbuild is slower than U-Boot conventional build system? No, faster. It could just be that it works better in parallel. upstream/master: real 0m4.012s user 0m18.760s sys 0m2.270s kbuild/kbuild2: real 0m3.192s user 0m18.220s sys 0m2.030s Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/5] fix and update LP-8x4x to boot DT kernel
On Wed, 2013-12-18 at 16:01 +0100, Marek Vasut wrote: Applied 1,3,4,5 , thanks! Thanks for lighting speed. 2 doesn't apply so see my comment please. Reposted v3. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-atmel/master - u-boot-arm/master
Hi Andreas, On Tue, 17 Dec 2013 17:25:55 +0100, Andreas BieĂźmann andreas.de...@googlemail.com wrote: Dear Albert Aribaud, please pull the following fix ups from u-boot-atmel/master into u-boot-arm/master. The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-atmel.git master for you to fetch changes up to d51a2a2d63d83207b56a7aef7a191d081058d6ae: arm: atmel: at91sam9x5: move CONFIG_SYS_NO_FLASH to proper position (2013-12-17 17:21:18 +0100) Bo Shen (3): arm: atmel: at91sam9x5: cleanup cs configure for spi arm: atmel: at91sam9x5: cleanup unneeded undef arm: atmel: at91sam9x5: move CONFIG_SYS_NO_FLASH to proper position board/atmel/at91sam9x5ek/at91sam9x5ek.c |1 - include/configs/at91sam9x5ek.h | 13 +++-- 2 files changed, 3 insertions(+), 11 deletions(-) Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
Cc: Andy Fleming aflem...@freescale.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
Changes for v2
- Adding u-boot-mmc maintainer
---
arch/arm/include/asm/arch-socfpga/dwmmc.h | 12 +
drivers/mmc/Makefile |1 +
drivers/mmc/socfpga_dw_mmc.c | 72 +
3 files changed, 85 insertions(+)
create mode 100755 arch/arm/include/asm/arch-socfpga/dwmmc.h
create mode 100755 drivers/mmc/socfpga_dw_mmc.c
diff --git a/arch/arm/include/asm/arch-socfpga/dwmmc.h
b/arch/arm/include/asm/arch-socfpga/dwmmc.h
new file mode 100755
index 000..945eb64
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/dwmmc.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef_SOCFPGA_DWMMC_H_
+#define_SOCFPGA_DWMMC_H_
+
+extern int socfpga_dwmmc_init(u32 regbase, int bus_width, int index);
+
+#endif /* _SOCFPGA_SDMMC_H_ */
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 1ed26ca..e793ed9 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
obj-$(CONFIG_DWMMC) += dw_mmc.o
obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
+obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
else
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
new file mode 100755
index 000..554f51b
--- /dev/null
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include dwmmc.h
+#include asm/arch/dwmmc.h
+
+#define CLKMGR_PERPLLGRP_EN_REG(SOCFPGA_CLKMGR_ADDRESS + 0xA0)
+#define CLKMGR_SDMMC_CLK_ENABLE(1 8)
+#define SYSMGR_SDMMCGRP_CTRL_REG (SOCFPGA_SYSMGR_ADDRESS + 0x108)
+#define SYSMGR_SDMMC_CTRL_GET_DRVSEL(x)(((x) 0) 0x7)
+#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \
+ drvsel) 0) 0x7) | (((smplsel) 3) 0x38))
+
+static char *SOCFPGA_NAME = SOCFPGA DWMMC;
+
+static void socfpga_dwmci_clksel(struct dwmci_host *host)
+{
+ unsigned int en;
+ unsigned int drvsel;
+ unsigned int smplsel;
+
+ /* Disable SDMMC clock. */
+ en = readl(CLKMGR_PERPLLGRP_EN_REG);
+ en = ~CLKMGR_SDMMC_CLK_ENABLE;
+ writel(en, CLKMGR_PERPLLGRP_EN_REG);
+
+ /* Configures drv_sel and smpl_sel */
+ drvsel = 3;
+ smplsel = 0;
+
+ debug(%s: drvsel %d smplsel %d\n, __FUNCTION__, drvsel, smplsel);
+ writel(SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel),
+ SYSMGR_SDMMCGRP_CTRL_REG);
+
+ debug(%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n, __FUNCTION__,
+ readl(SYSMGR_SDMMCGRP_CTRL_REG));
+ /* Enable SDMMC clock */
+ en = readl(CLKMGR_PERPLLGRP_EN_REG);
+ en |= CLKMGR_SDMMC_CLK_ENABLE;
+ writel(en, CLKMGR_PERPLLGRP_EN_REG);
+}
+
+int socfpga_dwmmc_init(u32 regbase, int bus_width, int index)
+{
+ struct dwmci_host *host = NULL;
+ host = calloc(sizeof(struct dwmci_host), 1);
+ if (!host) {
+ printf(dwmci_host calloc fail!\n);
+ return 1;
+ }
+
+ host-name = SOCFPGA_NAME;
+ host-ioaddr = (void *)regbase;
+ host-buswidth = bus_width;
+ host-clksel = socfpga_dwmci_clksel;
+ host-dev_index = index;
+ /* fixed clock divide by 4 which due to the SDMMC wrapper */
+ host-bus_hz = CONFIG_DWMMC_BUS_HZ;
+ host-fifoth_val = MSIZE(0x2) |
+ RX_WMARK(CONFIG_DWMMC_FIFO_DEPTH / 2 - 1) |
+ TX_WMARK(CONFIG_DWMMC_FIFO_DEPTH / 2);
+
+ add_dwmci(host, host-bus_hz, 40);
+
+ return 0;
+}
+
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] mmc/dwmmc: Using calloc instead malloc
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
Cc: Mischa Jonker mjon...@synopsys.com
Cc: Alexey Brodkin abrod...@synopsys.com
Cc: Andy Fleming aflem...@freescale.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
Changes for v2
- Adding u-boot-mmc maintainer
---
drivers/mmc/dw_mmc.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
mode change 100644 = 100755 drivers/mmc/dw_mmc.c
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
old mode 100644
new mode 100755
index 19d9b0b..82abe19
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -336,9 +336,9 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32
min_clk)
struct mmc *mmc;
int err = 0;
- mmc = malloc(sizeof(struct mmc));
+ mmc = calloc(sizeof(struct mmc), 1);
if (!mmc) {
- printf(mmc malloc fail!\n);
+ printf(mmc calloc fail!\n);
return -1;
}
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] arm: pxa: fix LP-8x4x USB support
On Wednesday, December 18, 2013 at 05:19:20 PM, Sergei Ianovich wrote: Signed-off-by: Sergei Ianovich ynv...@gmail.com CC: Marek Vasut ma...@denx.de Applied, thanks Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PULL] u-boot-pxa/master
Hi Albert, please pull for 2014.01 . Thanks! The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-pxa.git master for you to fetch changes up to 914f2bd1f07fba93639ad1273d4cd458b0ee99cc: arm: pxa: init ethaddr for LP-8x4x using DT (2013-12-18 18:15:26 +0100) Sergei Ianovich (5): ARM: pxa: prevent PXA270 occasional reboot freezes arm: pxa: fix LP-8x4x USB support arm: pxa: fix 2nd flash chip address on LP-8x4x arm: pxa: update LP-8x4x to boot DT kernel arm: pxa: init ethaddr for LP-8x4x using DT arch/arm/cpu/pxa/pxa2xx.c| 1 + board/icpdas/lp8x4x/lp8x4x.c | 53 +++-- include/configs/lp8x4x.h | 15 +++ 3 files changed, 31 insertions(+), 38 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH REPOST2] spi: tegra: clear RDY bit prior to every transfer
On Tue, Dec 17, 2013 at 4:17 AM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Yen Lin ye...@nvidia.com
The RDY bit indicates that a transfer is complete. This needs to be
cleared by SW before every single HW transaction, rather than only
at the start of each SW transaction (those being made up of n HW
transactions).
It seems that earlier HW may have cleared this bit autonomously when
starting a new transfer, and hence this code was not needed in practice.
However, this is generally a good idea in all cases. In Tegra124, the
HW behaviour appears to have changed, and SW must explicitly clear this
bit. Otherwise, SW will believe that transfers have completed when they
have not, and may e.g. read stale data from the RX FIFO.
Signed-off-by: Yen Lin ye...@nvidia.com
[swarren, rewrote commit description, unified duplicate RDY clearing code
and moved it right before the start of the HW transaction, unconditionally
exit loop after reading RX data, rather than checking if TX FIFO is empty,
since it is guaranteed to be]
Signed-off-by: Stephen Warren swar...@nvidia.com
---
drivers/spi/tegra1x4_spi.c | 21 -
File not there in master -- please check.
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/tegra1x4_spi.c b/drivers/spi/tegra1x4_spi.c
index 2742443e184c..a0c6537e8f5c 100644
--- a/drivers/spi/tegra1x4_spi.c
+++ b/drivers/spi/tegra1x4_spi.c
@@ -275,9 +275,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
reg = readl(regs-fifo_status);
writel(reg, regs-fifo_status);
- /* clear ready bit */
- setbits_le32(regs-xfer_status, SPI_XFER_STS_RDY);
-
clrsetbits_le32(regs-command1, SPI_CMD1_CS_SW_VAL,
SPI_CMD1_RX_EN | SPI_CMD1_TX_EN | SPI_CMD1_LSBY_FE |
(slave-cs SPI_CMD1_CS_SEL_SHIFT));
@@ -291,7 +288,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
/* handle data in 32-bit chunks */
while (num_bytes 0) {
int bytes;
- int is_read = 0;
int tm, i;
tmpdout = 0;
@@ -305,6 +301,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
num_bytes -= bytes;
+ /* clear ready bit */
+ setbits_le32(regs-xfer_status, SPI_XFER_STS_RDY);
+
clrsetbits_le32(regs-command1,
SPI_CMD1_BIT_LEN_MASK
SPI_CMD1_BIT_LEN_SHIFT,
(bytes * 8 - 1) SPI_CMD1_BIT_LEN_SHIFT);
@@ -315,20 +314,14 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
* Wait for SPI transmit FIFO to empty, or to time out.
* The RX FIFO status will be read and cleared last
*/
- for (tm = 0, is_read = 0; tm SPI_TIMEOUT; ++tm) {
+ for (tm = 0; tm SPI_TIMEOUT; ++tm) {
u32 fifo_status, xfer_status;
- fifo_status = readl(regs-fifo_status);
-
- /* We can exit when we've had both RX and TX activity
*/
- if (is_read
- (fifo_status SPI_FIFO_STS_TX_FIFO_EMPTY))
- break;
-
xfer_status = readl(regs-xfer_status);
if (!(xfer_status SPI_XFER_STS_RDY))
continue;
+ fifo_status = readl(regs-fifo_status);
if (fifo_status SPI_FIFO_STS_ERR) {
debug(%s: got a fifo error: , __func__);
if (fifo_status SPI_FIFO_STS_TX_FIFO_OVF)
@@ -353,7 +346,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
if (!(fifo_status SPI_FIFO_STS_RX_FIFO_EMPTY)) {
tmpdin = readl(regs-rx_fifo);
- is_read = 1;
/* swap bytes read in */
if (din != NULL) {
@@ -363,6 +355,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
}
din += bytes;
}
+
+ /* We can exit when we've had both RX and TX
*/
+ break;
}
}
--
1.8.1.5
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki,
E: jagannadh.t...@gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: omap3: Fix beagleboard SPL boot hangup (GPIO clocks not enabled)
Hi Stefan On Tue, Dec 17, 2013 at 2:14 PM, Stefan Roese s...@denx.de wrote: Patch f33b9bd3 [arm: omap3: Enable clocks for peripherals only if they are used] breaks SPL booting on Beagleboard. Since some gpio input's are read to detect the board revision. But with this patch above, the clocks to the GPIO subsystems are not enabled per default any more. The GPIO banks need to be configured specifically now. Signed-off-by: Stefan Roese s...@denx.de Cc: Tom Rini tr...@ti.com Cc: Michael Trimarchi mich...@amarulasolutions.com --- include/configs/omap3_beagle.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 3acb854..1b566c0 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -123,6 +123,9 @@ #define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_USB_ETHER_ASIX +/* GPIO banks */ +#define CONFIG_OMAP3_GPIO_5/* GPIO128..159 is in GPIO bank 5 */ +#define CONFIG_OMAP3_GPIO_6/* GPIO160..191 is in GPIO bank 6 */ /* commands to include */ #include config_cmd_default.h -- 1.8.4.5 Ok, this is one of the problem that we can have with the new patch. Thank you Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] spi: tegra: clear RDY bit prior to every transfer
From: Yen Lin ye...@nvidia.com
The RDY bit indicates that a transfer is complete. This needs to be
cleared by SW before every single HW transaction, rather than only
at the start of each SW transaction (those being made up of n HW
transactions).
It seems that earlier HW may have cleared this bit autonomously when
starting a new transfer, and hence this code was not needed in practice.
However, this is generally a good idea in all cases. In Tegra124, the
HW behaviour appears to have changed, and SW must explicitly clear this
bit. Otherwise, SW will believe that transfers have completed when they
have not, and may e.g. read stale data from the RX FIFO.
Signed-off-by: Yen Lin ye...@nvidia.com
[swarren, rewrote commit description, unified duplicate RDY clearing code
and moved it right before the start of the HW transaction, unconditionally
exit loop after reading RX data, rather than checking if TX FIFO is empty,
since it is guaranteed to be]
Signed-off-by: Stephen Warren swar...@nvidia.com
---
V2: Rebased on u-boot/master rather than a local branch with some Tegra124
changes applied first.
drivers/spi/tegra114_spi.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index 4d2af483d77f..810fa4718ce1 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -289,9 +289,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
reg = readl(regs-fifo_status);
writel(reg, regs-fifo_status);
- /* clear ready bit */
- setbits_le32(regs-xfer_status, SPI_XFER_STS_RDY);
-
clrsetbits_le32(regs-command1, SPI_CMD1_CS_SW_VAL,
SPI_CMD1_RX_EN | SPI_CMD1_TX_EN | SPI_CMD1_LSBY_FE |
(slave-cs SPI_CMD1_CS_SEL_SHIFT));
@@ -305,7 +302,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
/* handle data in 32-bit chunks */
while (num_bytes 0) {
int bytes;
- int is_read = 0;
int tm, i;
tmpdout = 0;
@@ -319,6 +315,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
num_bytes -= bytes;
+ /* clear ready bit */
+ setbits_le32(regs-xfer_status, SPI_XFER_STS_RDY);
+
clrsetbits_le32(regs-command1,
SPI_CMD1_BIT_LEN_MASK SPI_CMD1_BIT_LEN_SHIFT,
(bytes * 8 - 1) SPI_CMD1_BIT_LEN_SHIFT);
@@ -329,20 +328,14 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
* Wait for SPI transmit FIFO to empty, or to time out.
* The RX FIFO status will be read and cleared last
*/
- for (tm = 0, is_read = 0; tm SPI_TIMEOUT; ++tm) {
+ for (tm = 0; tm SPI_TIMEOUT; ++tm) {
u32 fifo_status, xfer_status;
- fifo_status = readl(regs-fifo_status);
-
- /* We can exit when we've had both RX and TX activity */
- if (is_read
- (fifo_status SPI_FIFO_STS_TX_FIFO_EMPTY))
- break;
-
xfer_status = readl(regs-xfer_status);
if (!(xfer_status SPI_XFER_STS_RDY))
continue;
+ fifo_status = readl(regs-fifo_status);
if (fifo_status SPI_FIFO_STS_ERR) {
debug(%s: got a fifo error: , __func__);
if (fifo_status SPI_FIFO_STS_TX_FIFO_OVF)
@@ -367,7 +360,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
if (!(fifo_status SPI_FIFO_STS_RX_FIFO_EMPTY)) {
tmpdin = readl(regs-rx_fifo);
- is_read = 1;
/* swap bytes read in */
if (din != NULL) {
@@ -377,6 +369,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
}
din += bytes;
}
+
+ /* We can exit when we've had both RX and TX */
+ break;
}
}
--
1.8.1.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-sh/rmobile into u-boot-arm/master
Hi Nobuhiro, On Wed, 18 Dec 2013 16:44:34 +0900, Nobuhiro Iwamatsu iwama...@nigauri.org wrote: Dear Albert Aribaud, Please pull u-boot-sh/rmobile into u-boot-arm/master. The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-sh rmobile for you to fetch changes up to b8f383b86bc748382cc7cb5b3602c0c2ff9cb60c: arm: koelsch: Add support reset function (2013-12-18 16:35:46 +0900) Nobuhiro Iwamatsu (7): arm: rmobile: Update README.rmobile arm: lager: Add support Ethernet arm: lager: Add support I2C arm: lager: Add support reset function arm: koelsch: Add support Ethernet arm: koelsch: Add support I2C arm: koelsch: Add support reset function board/renesas/koelsch/koelsch.c | 83 +++ board/renesas/lager/lager.c | 78 ++ doc/README.rmobile | 49 ++--- include/configs/koelsch.h | 41 +++-- include/configs/lager.h | 35 +++ 5 files changed, 269 insertions(+), 17 deletions(-) Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 12/13] trats2: add LCD download menu support
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com --- changes v2: - add definitions for check keys - cleanup config definitions --- include/configs/trats2.h | 27 +++ 1 file changed, 27 insertions(+) diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 80d3ed0..b0dcfa4 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -19,6 +19,8 @@ #define CONFIG_S5P /* which is in a S5P Family */ #define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */ #define CONFIG_TIZEN /* TIZEN lib */ +#define CONFIG_TRATS2 +#define CONFIG_BOARD_NAME TRATS2 #include asm/arch/cpu.h /* get chip and board defs */ @@ -319,6 +321,31 @@ /* Common misc for Samsung */ #define CONFIG_MISC_INIT_R +/* Download menu - Samsung common */ +#define CONFIG_LCD_MENU +#define CONFIG_LCD_MENU_BOARD + +/* Download menu - definitions for check keys */ +#ifndef __ASSEMBLY__ +#ifdef __COMMON_H_ +#include power/pmic.h +#include power/max77686_pmic.h + +#define KEY_PWR_PMIC_NAME MAX77686_PMIC +#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1 +#define KEY_PWR_STATUS_MASK(1 0) +#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1 +#define KEY_PWR_INTERRUPT_MASK (1 1) + +#define KEY_VOL_UP_GPIOexynos4x12_gpio_get(2, x2, 2) +#define KEY_VOL_DOWN_GPIO exynos4x12_gpio_get(2, x3, 3) +#endif /* __COMMON_H_ */ +#endif /* __ASSEMBLY__ */ + +/* LCD console */ +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK + /* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 00/13] Introduce Samsung misc file and LCD menu.
This patch set includes changes required to: - properly use of all gpios - introduce common file for Samsung misc code - keys support (PWR, VOL:UP,DOWN) - console support on LCD - 16bpp logo support - introduce LCD menu on Samsung devices Changes v2 are described in each patch commit msg. Przemyslaw Marczak (13): s5p: gpio: change gpio coding method for s5p gpio. trats: add optional cflags to board object file. trats2: Code cleanup. samsung: common: Add misc file and common function misc_init_r(). samsung: misc: move display logo function to misc.c file. common: makefile: Add optional cflags to object: common/lcd.o lib: tizen: change Tizen logo with the new one. video: exynos: fimd: add support for various display color modes samsung: boards: update display configs with 16bpp mode. samsung: misc: Add LCD download menu. Trats: add LCD download menu support trats2: add LCD download menu support universal: add LCD download menu support arch/arm/include/asm/arch-exynos/gpio.h | 169 +- arch/arm/include/asm/arch-s5pc1xx/gpio.h | 47 +- board/samsung/common/Makefile|1 + board/samsung/common/misc.c | 396 ++ board/samsung/common/misc.h | 18 + board/samsung/trats/Makefile |2 + board/samsung/trats/trats.c |5 +- board/samsung/trats2/trats2.c| 25 +- board/samsung/universal_c210/universal.c |6 +- common/Makefile |1 + drivers/gpio/s5p_gpio.c | 15 +- drivers/power/battery/bat_trats2.c |2 +- drivers/video/exynos_fb.c| 28 - drivers/video/exynos_fimd.c | 15 +- include/configs/s5p_goni.h |4 +- include/configs/s5pc210_universal.h | 42 +- include/configs/trats.h | 38 +- include/configs/trats2.h | 47 +- lib/tizen/tizen.c| 20 +- lib/tizen/tizen_hd_logo.h| 5057 --- lib/tizen/tizen_hd_logo_data.h | 15 - lib/tizen/tizen_logo_16bpp.h |10021 ++ lib/tizen/tizen_logo_16bpp_gzip.h| 571 ++ 23 files changed, 11250 insertions(+), 5295 deletions(-) create mode 100644 board/samsung/common/misc.c create mode 100644 board/samsung/common/misc.h delete mode 100644 lib/tizen/tizen_hd_logo.h delete mode 100644 lib/tizen/tizen_hd_logo_data.h create mode 100644 lib/tizen/tizen_logo_16bpp.h create mode 100644 lib/tizen/tizen_logo_16bpp_gzip.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/13] trats: add optional cflags to board object file.
This change avoids unexpected unaligned access. more info: README.arm-unaligned-accesses Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com cc: Lukasz Majewski l.majew...@samsung.com --- Changes v2: - new patch --- board/samsung/trats/Makefile |2 ++ 1 file changed, 2 insertions(+) diff --git a/board/samsung/trats/Makefile b/board/samsung/trats/Makefile index 5dc8a1f..c1bcd63 100644 --- a/board/samsung/trats/Makefile +++ b/board/samsung/trats/Makefile @@ -6,3 +6,5 @@ # obj-y += trats.o + +$(obj)trats.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) \ No newline at end of file -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 06/13] common: makefile: Add optional cflags to object: common/lcd.o
This change adds CFLAGS: -mno-unaligned-access which depends on option: PLATFORM_NO_UNALIGNED This option avoids unaligned data access exception on armv7, caused by access to logo data which is mostly unaligned initialized array. more info: README.arm-unaligned-accesses Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com --- Changes v2: - new patch --- common/Makefile |1 + 1 file changed, 1 insertion(+) diff --git a/common/Makefile b/common/Makefile index 74404be..619d72c 100644 --- a/common/Makefile +++ b/common/Makefile @@ -240,3 +240,4 @@ $(obj)env_embedded.o: $(src)env_embedded.c # SEE README.arm-unaligned-accesses $(obj)hush.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) $(obj)fdt_support.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) +$(obj)lcd.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 04/13] samsung: common: Add misc file and common function misc_init_r().
Config: CONFIG_MISC_INIT_R enables implementation of misc_init_r()
in common file::
- board/samsung/common/misc.c
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
- change CONFIG_SAMSUNG to CONFIG_MISC_INIT_R
---
board/samsung/common/Makefile |1 +
board/samsung/common/misc.c | 14 ++
2 files changed, 15 insertions(+)
create mode 100644 board/samsung/common/misc.c
diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
index 501d974..c30bb3d 100644
--- a/board/samsung/common/Makefile
+++ b/board/samsung/common/Makefile
@@ -8,3 +8,4 @@
obj-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
obj-$(CONFIG_THOR_FUNCTION) += thor.o
obj-$(CONFIG_CMD_USB_MASS_STORAGE) += ums.o
+obj-$(CONFIG_MISC_INIT_R) += misc.o
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
new file mode 100644
index 000..3764d12
--- /dev/null
+++ b/board/samsung/common/misc.c
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+
+/* Common for Samsung boards */
+int misc_init_r(void)
+{
+ return 0;
+}
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 09/13] samsung: boards: update display configs with 16bpp mode.
16 bpp mode is required by LCD console mode.
This change updates exynos board files.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
-- new patch
---
board/samsung/trats/trats.c |2 +-
board/samsung/trats2/trats2.c|2 +-
board/samsung/universal_c210/universal.c |2 +-
include/configs/s5pc210_universal.h |2 +-
include/configs/trats.h |2 +-
include/configs/trats2.h |2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index ce4b41f..db527c7 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -739,7 +739,7 @@ vidinfo_t panel_info = {
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_LOW,
- .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
+ .vl_bpix= 4,/* Bits per pixel, 2^4 = 16 */
/* s6e8ax0 Panel infomation */
.vl_hspw= 5,
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 73b8cc1..6fa02c9 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -542,7 +542,7 @@ vidinfo_t panel_info = {
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_LOW,
- .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
+ .vl_bpix= 4,/* Bits per pixel, 2^4 = 16 */
/* s6e8ax0 Panel infomation */
.vl_hspw= 5,
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
index 166d5ee..1ebea0f 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -446,7 +446,7 @@ vidinfo_t panel_info = {
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
- .vl_bpix= 5,/* Bits per pixel */
+ .vl_bpix= 4,/* Bits per pixel */
/* LD9040 LCD Panel */
.vl_hspw= 2,
diff --git a/include/configs/s5pc210_universal.h
b/include/configs/s5pc210_universal.h
index 3c0a974..4079b7c 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -278,7 +278,7 @@ int universal_spi_read(void);
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
-#define CONFIG_BMP_32BPP
+#define CONFIG_BMP_16BPP
#define CONFIG_LD9040
#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 6bc14f7..a887d74 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -317,7 +317,7 @@
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
-#define CONFIG_BMP_32BPP
+#define CONFIG_BMP_16BPP
#define CONFIG_FB_ADDR 0x52504000
#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index b65afc4..80d3ed0 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -323,7 +323,7 @@
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
-#define CONFIG_BMP_32BPP
+#define CONFIG_BMP_16BPP
#define CONFIG_FB_ADDR 0x52504000
#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 03/13] trats2: Code cleanup.
Remove wrong and unused env variables
Trats2 is not as GT-I8800.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
---
board/samsung/trats2/trats2.c | 19 ++-
drivers/power/battery/bat_trats2.c |2 +-
include/configs/trats2.h |1 -
3 files changed, 3 insertions(+), 19 deletions(-)
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 9552522..2442d96 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -72,15 +72,12 @@ static void check_hw_revision(void)
int checkboard(void)
{
puts(Board:\tTRATS2\n);
+ printf(HW Revision:\t0x%04x\n, board_rev);
+
return 0;
}
#endif
-static void show_hw_revision(void)
-{
- printf(HW Revision:\t0x%04x\n, board_rev);
-}
-
u32 get_board_rev(void)
{
return board_rev;
@@ -591,15 +588,3 @@ void init_panel_info(vidinfo_t *vid)
exynos_set_dsim_platform_data(dsim_platform_data);
}
#endif /* LCD */
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
- setenv(model, GT-I8800);
- setenv(board, TRATS2);
-
- show_hw_revision();
-
- return 0;
-}
-#endif
diff --git a/drivers/power/battery/bat_trats2.c
b/drivers/power/battery/bat_trats2.c
index f264832..94015aa 100644
--- a/drivers/power/battery/bat_trats2.c
+++ b/drivers/power/battery/bat_trats2.c
@@ -8,7 +8,7 @@
#include common.h
#include power/pmic.h
#include power/battery.h
-#include power/max8997_pmic.h
+#include power/max77693_pmic.h
#include errno.h
static struct battery battery_trats;
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index f7d76f8..18270c1 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -271,7 +271,6 @@
#define CONFIG_EFI_PARTITION
#define CONFIG_PARTITION_UUIDS
-#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_EARLY_INIT_F
/* I2C */
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/13] video: exynos: fimd: add support for various display color modes
Now fimd BPP color mode depends on vl_bpp value in struct panel_info.
There is only 16BPP mode check, default mode is 24BPP.
Other fimd modes are usually unneeded and also needs some fimd driver
modifications and tests.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
- check panel_info vl_bpix when setting fimd color mode
- move boards configs update to another commit.
---
drivers/video/exynos_fimd.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index f962c4f..cebbba7 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -73,18 +73,19 @@ static void exynos_fimd_set_par(unsigned int win_id)
/* DATAPATH is DMA */
cfg |= EXYNOS_WINCON_DATAPATH_DMA;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_WSWP_ENABLE;
- else /* To get output console on LCD */
- cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+ cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
/* dma burst is 16 */
cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
- else /* To get output console on LCD */
+ switch (pvid-vl_bpix) {
+ case 4:
cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+ break;
+ default:
+ cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+ break;
+ }
writel(cfg, (unsigned int)fimd_ctrl-wincon0 +
EXYNOS_WINCON(win_id));
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 07/13] lib: tizen: change Tizen logo with the new one.
This is big size patch. PLease follow the link: http://www.denx.de/wiki/pub/U-Boot/TooBigPatches/0007-lib-tizen-change-Tizen-logo-with-the-new-one.patch ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 01/13] s5p: gpio: change gpio coding method for s5p gpio.
Old s5p gpio coding method was not clean and was not working properly for all parts and banks. New method is clean and easy to extend. Gpio coding mask: 0x00ff - pin number 0x0000 - bank offset 0xff00 - part number Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com --- arch/arm/include/asm/arch-exynos/gpio.h | 169 +++--- arch/arm/include/asm/arch-s5pc1xx/gpio.h | 47 +++-- drivers/gpio/s5p_gpio.c | 15 +-- include/configs/s5p_goni.h |4 +- include/configs/s5pc210_universal.h | 12 +-- include/configs/trats.h |8 +- include/configs/trats2.h | 12 +-- 7 files changed, 125 insertions(+), 142 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index a1a7439..b7dc8f5 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -196,117 +196,72 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* GPIO pins per bank */ #define GPIO_PER_BANK 8 -#define exynos4_gpio_part1_get_nr(bank, pin) \ - ((unsigned int) (((struct exynos4_gpio_part1 *) \ - EXYNOS4_GPIO_PART1_BASE)-bank)) \ - - EXYNOS4_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) - -#define EXYNOS4_GPIO_PART1_MAX ((sizeof(struct exynos4_gpio_part1) \ - / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) - -#define exynos4_gpio_part2_get_nr(bank, pin) \ - (((unsigned int) (((struct exynos4_gpio_part2 *) \ - EXYNOS4_GPIO_PART2_BASE)-bank)) \ - - EXYNOS4_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) + EXYNOS4_GPIO_PART1_MAX) - -#define exynos4x12_gpio_part1_get_nr(bank, pin) \ - ((unsigned int) (((struct exynos4x12_gpio_part1 *) \ - EXYNOS4X12_GPIO_PART1_BASE)-bank)) \ - - EXYNOS4X12_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) - -#define EXYNOS4X12_GPIO_PART1_MAX ((sizeof(struct exynos4x12_gpio_part1) \ - / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) - -#define exynos4x12_gpio_part2_get_nr(bank, pin) \ - (((unsigned int) (((struct exynos4x12_gpio_part2 *) \ - EXYNOS4X12_GPIO_PART2_BASE)-bank)) \ - - EXYNOS4X12_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART1_MAX) - -#define EXYNOS4X12_GPIO_PART2_MAX ((sizeof(struct exynos4x12_gpio_part2) \ - / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) - -#define exynos4x12_gpio_part3_get_nr(bank, pin) \ - (((unsigned int) (((struct exynos4x12_gpio_part3 *) \ - EXYNOS4X12_GPIO_PART3_BASE)-bank)) \ - - EXYNOS4X12_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART2_MAX) - -#define exynos5_gpio_part1_get_nr(bank, pin) \ - ((unsigned int) (((struct exynos5_gpio_part1 *) \ - EXYNOS5_GPIO_PART1_BASE)-bank)) \ - - EXYNOS5_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) - -#define EXYNOS5_GPIO_PART1_MAX ((sizeof(struct exynos5_gpio_part1) \ - / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) - -#define exynos5_gpio_part2_get_nr(bank, pin) \ - (((unsigned int) (((struct exynos5_gpio_part2 *) \ - EXYNOS5_GPIO_PART2_BASE)-bank)) \ - - EXYNOS5_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) + EXYNOS5_GPIO_PART1_MAX) - -#define EXYNOS5_GPIO_PART2_MAX ((sizeof(struct exynos5_gpio_part2) \ - / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) - -#define exynos5_gpio_part3_get_nr(bank, pin) \ - (((unsigned int) (((struct exynos5_gpio_part3 *) \ - EXYNOS5_GPIO_PART3_BASE)-bank)) \ - - EXYNOS5_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \ - * GPIO_PER_BANK) + pin) + EXYNOS5_GPIO_PART2_MAX) - -static inline unsigned int s5p_gpio_base(int nr) +#define S5P_GPIO_PART_SHIFT(24) +#define S5P_GPIO_PART_MASK (0xff) +#define S5P_GPIO_BANK_SHIFT(8) +#define S5P_GPIO_BANK_MASK (0x) +#define S5P_GPIO_PIN_MASK (0xff) + +#define S5P_GPIO_SET_PART(x) \ + ((x S5P_GPIO_PART_MASK) S5P_GPIO_PART_SHIFT) + +#define S5P_GPIO_GET_PART(x) \ + ((x S5P_GPIO_PART_SHIFT) S5P_GPIO_PART_MASK) + +#define S5P_GPIO_SET_PIN(x) \ + (x S5P_GPIO_PIN_MASK) + +#define EXYNOS4_GPIO_SET_BANK(part, bank) \ + unsigned)(((struct exynos4_gpio_part##part *) \ +
[U-Boot] [PATCH v2 10/13] samsung: misc: Add LCD download menu.
This simple LCD menu allows run one of download mode on device
without writing on console or for fast and easy upgrade.
This feature check user keys combination at boot:
- power key + volume up - download menu
- power key + volume down - thor mode (without menu)
New configs:
- CONFIG_LCD_MENU
- CONFIG_LCD_MENU_BOARD
which depends on: CONFIG_MISC_INIT_R
For proper effect this feature needs following definitions:
Power key:
- KEY_PWR_PMIC_NAME - (string) pmic which supports power key check
Register address:
- KEY_PWR_STATUS_REG
- KEY_PWR_INTERRUPT_REG
Register power key mask:
- KEY_PWR_STATUS_MASK
- KEY_PWR_INTERRUPT_MASK
Gpio numbers:
- KEY_PWR_INTERRUPT_MASK
- KEY_VOL_DOWN_GPIO
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
- remove keys.h - definitions should be in boards headers
- add misc.h
- code cleanup
- extend commit msg by more informations
---
board/samsung/common/misc.c | 340 +++
board/samsung/common/misc.h | 18 +++
2 files changed, 358 insertions(+)
create mode 100644 board/samsung/common/misc.h
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 6188e29..caa8b7d 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -8,6 +8,341 @@
#include common.h
#include lcd.h
#include libtizen.h
+#include errno.h
+#include version.h
+#include asm/sizes.h
+#include asm/arch/cpu.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include linux/input.h
+#include lcd.h
+#include libtizen.h
+#include power/pmic.h
+#include mmc.h
+#include misc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_LCD_MENU
+static int power_key_pressed(int reg)
+{
+ struct pmic *pmic = pmic_get(KEY_PWR_PMIC_NAME);
+ u32 status = 0;
+ u32 mask;
+
+ if (pmic_probe(pmic))
+ return 0;
+
+ if (!pmic) {
+ printf(%s: Not found\n, KEY_PWR_PMIC_NAME);
+ return 0;
+ }
+
+ if (reg == KEY_PWR_STATUS_REG)
+ mask = KEY_PWR_STATUS_MASK;
+ else
+ mask = KEY_PWR_INTERRUPT_MASK;
+
+ if (pmic_reg_read(pmic, reg, status))
+ return 0;
+
+ return !!(status mask);
+}
+
+static int key_pressed(int key)
+{
+ int value = 0;
+
+ switch (key) {
+ case KEY_POWER:
+ value = power_key_pressed(KEY_PWR_INTERRUPT_REG);
+ break;
+ case KEY_VOLUMEUP:
+ value = !gpio_get_value(KEY_VOL_UP_GPIO);
+ break;
+ case KEY_VOLUMEDOWN:
+ value = !gpio_get_value(KEY_VOL_DOWN_GPIO);
+ break;
+ default:
+ break;
+ }
+
+ return value;
+}
+
+static int check_keys(void)
+{
+ int keys = 0;
+
+ if (key_pressed(KEY_POWER))
+ keys += KEY_POWER;
+ if (key_pressed(KEY_VOLUMEUP))
+ keys += KEY_VOLUMEUP;
+ if (key_pressed(KEY_VOLUMEDOWN))
+ keys += KEY_VOLUMEDOWN;
+
+ return keys;
+}
+
+/*
+ * 0 BOOT_MODE_INFO
+ * 1 BOOT_MODE_THOR
+ * 2 BOOT_MODE_UMS
+ * 3 BOOT_MODE_DFU
+ * 4 BOOT_MODE_EXIT
+*/
+static char *
+mode_name[BOOT_MODE_EXIT + 1] = {DEVICE,
+ THOR,
+ UMS,
+ DFU,
+ EXIT};
+
+static char *
+mode_info[BOOT_MODE_EXIT + 1] = {info,
+downloader,
+mass storage,
+firmware update,
+and run normal boot};
+
+static char *
+mode_cmd[BOOT_MODE_EXIT + 1] = {,
+ thor 0 mmc 0,
+ ums 0 mmc 0,
+ dfu 0 mmc 0,
+ };
+
+static void display_board_info(void)
+{
+ struct mmc *mmc = find_mmc_device(0);
+ vidinfo_t *vid = panel_info;
+
+ lcd_position_cursor(4, 4);
+
+ lcd_printf(%s\n\t, U_BOOT_VERSION);
+ lcd_puts(\n\t\tBoard Info:\n);
+#ifdef CONFIG_BOARD_NAME
+ lcd_printf(\tBoard name: %s\n, CONFIG_BOARD_NAME);
+#endif
+#ifdef CONFIG_REVISION_TAG
+ lcd_printf(\tBoard rev: %u\n, get_board_rev());
+#endif
+ lcd_printf(\tDRAM banks: %u\n, CONFIG_NR_DRAM_BANKS);
+ lcd_printf(\tDRAM size: %u MB\n, gd-ram_size / SZ_1M);
+
+ if (mmc)
+ lcd_printf(\teMMC size: %llu MB\n, mmc-capacity / SZ_1M);
+
+ if (vid)
+ lcd_printf(\tDisplay resolution: %u x % u\n,
+ vid-vl_col, vid-vl_row);
+
+ lcd_printf(\tDisplay BPP: %u\n, 1 vid-vl_bpix);
+}
+
+static int mode_leave_menu(int mode)
+{
+ int mode_supported = 1;
+ int leave = 0;
+ char *exit_option;
+ char *exit_boot = boot;
+ char *exit_back = back;
+
+ switch (mode) {
+ case BOOT_MODE_INFO:
+#if !defined(CONFIG_LCD_MENU_BOARD)
+ mode_supported = 0;
[U-Boot] [PATCH v2 11/13] Trats: add LCD download menu support
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Acked-by: Lukasz Majewski l.majew...@samsung.com --- changes v2: - add definitions to check keys - cleanup config definitions - add acked-by --- include/configs/trats.h | 23 +++ 1 file changed, 23 insertions(+) diff --git a/include/configs/trats.h b/include/configs/trats.h index a887d74..a88346e 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -19,6 +19,7 @@ #define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */ #define CONFIG_TRATS /* working with TRATS */ #define CONFIG_TIZEN /* TIZEN lib */ +#define CONFIG_BOARD_NAME TRATS #include asm/arch/cpu.h /* get chip and board defs */ @@ -313,6 +314,28 @@ /* Common misc for Samsung */ #define CONFIG_MISC_INIT_R +/* Download menu - Samsung common */ +#define CONFIG_LCD_MENU +#define CONFIG_LCD_MENU_BOARD + +/* Download menu - definitions for check keys */ +#ifndef __ASSEMBLY__ +#include power/max8997_pmic.h + +#define KEY_PWR_PMIC_NAME MAX8997_PMIC +#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1 +#define KEY_PWR_STATUS_MASK(1 0) +#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 +#define KEY_PWR_INTERRUPT_MASK (1 0) + +#define KEY_VOL_UP_GPIOexynos4_gpio_get(2, x2, 0) +#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#endif /* __ASSEMBLY__ */ + +/* LCD console */ +#define LCD_BPPLCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK + /* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 05/13] samsung: misc: move display logo function to misc.c file.
board/samsung/common/misc.c:
- move draw_logo() function from exynos_fb.c
- add get_tizen_logo_info() function call removed from board files
boards:
- update board files
- add CONFIG_MISC_INIT_R to Universal, Trats and Trats2
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Tested-by: Hyungwon Hwang human.hw...@samsung.com
---
changes v2:
- configs cleanup
- add check logo address before display
---
board/samsung/common/misc.c | 42 ++
board/samsung/trats/trats.c |3 ---
board/samsung/trats2/trats2.c|4 ---
board/samsung/universal_c210/universal.c |4 ---
drivers/video/exynos_fb.c| 28
include/configs/s5pc210_universal.h |3 +++
include/configs/trats.h |3 +++
include/configs/trats2.h |3 +++
8 files changed, 51 insertions(+), 39 deletions(-)
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 3764d12..6188e29 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -6,9 +6,51 @@
*/
#include common.h
+#include lcd.h
+#include libtizen.h
+
+#ifdef CONFIG_CMD_BMP
+static void draw_logo(void)
+{
+ int x, y;
+ ulong addr;
+
+#ifdef CONFIG_TIZEN
+ get_tizen_logo_info(panel_info);
+#else
+ return;
+#endif
+
+ addr = panel_info.logo_addr;
+ if (!addr) {
+ error(There is no logo data.);
+ return;
+ }
+
+ if (panel_info.vl_width = panel_info.logo_width) {
+ x = ((panel_info.vl_width - panel_info.logo_width) 1);
+ } else {
+ x = 0;
+ printf(Warning: image width is bigger than display width\n);
+ }
+
+ if (panel_info.vl_height = panel_info.logo_height) {
+ y = ((panel_info.vl_height - panel_info.logo_height) 1);
+ } else {
+ y = 0;
+ printf(Warning: image height is bigger than display height\n);
+ }
+
+ bmp_display(addr, x, y);
+}
+#endif /* CONFIG_CMD_BMP */
/* Common for Samsung boards */
int misc_init_r(void)
{
+#ifdef CONFIG_CMD_BMP
+ if (panel_info.logo_on)
+ draw_logo();
+#endif
return 0;
}
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 6bd106e..ce4b41f 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -767,9 +767,6 @@ void init_panel_info(vidinfo_t *vid)
vid-resolution = HD_RESOLUTION,
vid-rgb_mode = MODE_RGB_P,
-#ifdef CONFIG_TIZEN
- get_tizen_logo_info(vid);
-#endif
mipi_lcd_device.reverse_panel = 1;
strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 2442d96..73b8cc1 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -573,10 +573,6 @@ void init_panel_info(vidinfo_t *vid)
mipi_lcd_device.reverse_panel = 1;
-#ifdef CONFIG_TIZEN
- get_tizen_logo_info(vid);
-#endif
-
strcpy(dsim_platform_data.lcd_panel_name, mipi_lcd_device.name);
dsim_platform_data.mipi_power = mipi_power;
dsim_platform_data.phy_enable = set_mipi_phy_ctrl;
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
index 54d0e1e..166d5ee 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -484,10 +484,6 @@ void init_panel_info(vidinfo_t *vid)
vid-resolution = HD_RESOLUTION;
vid-rgb_mode = MODE_RGB_P;
-#ifdef CONFIG_TIZEN
- get_tizen_logo_info(vid);
-#endif
-
/* for LD9040. */
vid-pclk_name = 1; /* MPLL */
vid-sclk_div = 1;
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 7d4c6e0..00a0a11 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -62,31 +62,6 @@ static void exynos_lcd_init(vidinfo_t *vid)
lcd_set_flush_dcache(1);
}
-#ifdef CONFIG_CMD_BMP
-static void draw_logo(void)
-{
- int x, y;
- ulong addr;
-
- if (panel_width = panel_info.logo_width) {
- x = ((panel_width - panel_info.logo_width) 1);
- } else {
- x = 0;
- printf(Warning: image width is bigger than display width\n);
- }
-
- if (panel_height = panel_info.logo_height) {
- y = ((panel_height - panel_info.logo_height) 1) - 4;
- } else {
- y = 0;
- printf(Warning: image height is bigger than display height\n);
- }
-
- addr = panel_info.logo_addr;
- bmp_display(addr, x, y);
-}
-#endif
-
void __exynos_cfg_lcd_gpio(void)
{
}
@@ -323,9 +298,6 @@ void lcd_enable(void)
if (panel_info.logo_on) {
memset((void *) gd-fb_base, 0, panel_width * panel_height *
Re: [U-Boot] [PATCH V2] spi: tegra: clear RDY bit prior to every transfer
On Wed, Dec 18, 2013 at 11:48 PM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Yen Lin ye...@nvidia.com
The RDY bit indicates that a transfer is complete. This needs to be
cleared by SW before every single HW transaction, rather than only
at the start of each SW transaction (those being made up of n HW
transactions).
It seems that earlier HW may have cleared this bit autonomously when
starting a new transfer, and hence this code was not needed in practice.
However, this is generally a good idea in all cases. In Tegra124, the
HW behaviour appears to have changed, and SW must explicitly clear this
bit. Otherwise, SW will believe that transfers have completed when they
have not, and may e.g. read stale data from the RX FIFO.
Signed-off-by: Yen Lin ye...@nvidia.com
[swarren, rewrote commit description, unified duplicate RDY clearing code
and moved it right before the start of the HW transaction, unconditionally
exit loop after reading RX data, rather than checking if TX FIFO is empty,
since it is guaranteed to be]
Signed-off-by: Stephen Warren swar...@nvidia.com
---
V2: Rebased on u-boot/master rather than a local branch with some Tegra124
changes applied first.
drivers/spi/tegra114_spi.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index 4d2af483d77f..810fa4718ce1 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -289,9 +289,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
reg = readl(regs-fifo_status);
writel(reg, regs-fifo_status);
- /* clear ready bit */
- setbits_le32(regs-xfer_status, SPI_XFER_STS_RDY);
-
clrsetbits_le32(regs-command1, SPI_CMD1_CS_SW_VAL,
SPI_CMD1_RX_EN | SPI_CMD1_TX_EN | SPI_CMD1_LSBY_FE |
(slave-cs SPI_CMD1_CS_SEL_SHIFT));
@@ -305,7 +302,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
/* handle data in 32-bit chunks */
while (num_bytes 0) {
int bytes;
- int is_read = 0;
int tm, i;
tmpdout = 0;
@@ -319,6 +315,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
num_bytes -= bytes;
+ /* clear ready bit */
+ setbits_le32(regs-xfer_status, SPI_XFER_STS_RDY);
+
clrsetbits_le32(regs-command1,
SPI_CMD1_BIT_LEN_MASK
SPI_CMD1_BIT_LEN_SHIFT,
(bytes * 8 - 1) SPI_CMD1_BIT_LEN_SHIFT);
@@ -329,20 +328,14 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
* Wait for SPI transmit FIFO to empty, or to time out.
* The RX FIFO status will be read and cleared last
*/
- for (tm = 0, is_read = 0; tm SPI_TIMEOUT; ++tm) {
+ for (tm = 0; tm SPI_TIMEOUT; ++tm) {
u32 fifo_status, xfer_status;
- fifo_status = readl(regs-fifo_status);
-
- /* We can exit when we've had both RX and TX activity
*/
- if (is_read
- (fifo_status SPI_FIFO_STS_TX_FIFO_EMPTY))
- break;
-
xfer_status = readl(regs-xfer_status);
if (!(xfer_status SPI_XFER_STS_RDY))
continue;
+ fifo_status = readl(regs-fifo_status);
if (fifo_status SPI_FIFO_STS_ERR) {
debug(%s: got a fifo error: , __func__);
if (fifo_status SPI_FIFO_STS_TX_FIFO_OVF)
@@ -367,7 +360,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
if (!(fifo_status SPI_FIFO_STS_RX_FIFO_EMPTY)) {
tmpdin = readl(regs-rx_fifo);
- is_read = 1;
/* swap bytes read in */
if (din != NULL) {
@@ -377,6 +369,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned
int bitlen,
}
din += bytes;
}
+
+ /* We can exit when we've had both RX and TX
*/
+ break;
}
}
--
1.8.1.5
Applied to u-boot-spi/master
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki,
E: jagannadh.t...@gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
___
U-Boot mailing list
[U-Boot] [PATCH v2 13/13] universal: add LCD download menu support
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com --- changes v2: - add definitions for check keys - cleanup config definitions --- include/configs/s5pc210_universal.h | 23 +++ 1 file changed, 23 insertions(+) diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 4079b7c..bfed7f1 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -19,6 +19,7 @@ #define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */ #define CONFIG_UNIVERSAL 1 /* working with Universal */ #define CONFIG_TIZEN 1 /* TIZEN lib */ +#define CONFIG_BOARD_NAME UNIVERSAL C210 #include asm/arch/cpu.h /* get chip and board defs */ @@ -272,6 +273,28 @@ int universal_spi_read(void); /* Common misc for Samsung */ #define CONFIG_MISC_INIT_R +/* Download menu - Samsung common */ +#define CONFIG_LCD_MENU +#define CONFIG_LCD_MENU_BOARD + +/* Download menu - definitions for check keys */ +#ifndef __ASSEMBLY__ +#include power/max8998_pmic.h + +#define KEY_PWR_PMIC_NAME MAX8998_PMIC +#define KEY_PWR_STATUS_REG MAX8998_REG_STATUS1 +#define KEY_PWR_STATUS_MASK(1 7) +#define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 +#define KEY_PWR_INTERRUPT_MASK (1 7) + +#define KEY_VOL_UP_GPIOexynos4_gpio_get(2, x2, 0) +#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#endif /* __ASSEMBLY__ */ + +/* LCD console */ +#define LCD_BPPLCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK + /* * LCD Settings */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-pxa/master
Hi Marek, On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote: Hi Albert, please pull for 2014.01 . Thanks! The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-pxa.git master for you to fetch changes up to 914f2bd1f07fba93639ad1273d4cd458b0ee99cc: arm: pxa: init ethaddr for LP-8x4x using DT (2013-12-18 18:15:26 +0100) Sergei Ianovich (5): ARM: pxa: prevent PXA270 occasional reboot freezes arm: pxa: fix LP-8x4x USB support arm: pxa: fix 2nd flash chip address on LP-8x4x arm: pxa: update LP-8x4x to boot DT kernel arm: pxa: init ethaddr for LP-8x4x using DT arch/arm/cpu/pxa/pxa2xx.c| 1 + board/icpdas/lp8x4x/lp8x4x.c | 53 +++-- include/configs/lp8x4x.h | 15 +++ 3 files changed, 31 insertions(+), 38 deletions(-) On it. Note that: remote: error: refs/remotes/origin/GPL-Cleanup does not point to a valid object! remote: error: refs/remotes/origin/i.MX31 does not point to a valid object! remote: error: refs/remotes/origin/lwmon5 does not point to a valid object! remote: error: refs/remotes/origin/tx25 does not point to a valid object! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT][PATCH 3/5] sf: macronix: Add support for MX66L51235F
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar sourav.pod...@ti.com wrote:
From: Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/mtd/spi/sf_probe.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 5eb8ffe..874ef8c 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -68,6 +68,7 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{MX25L25635F,0xc22019, 0x0, 64 * 1024, 512,
0},
{MX25L51235F,0xc2201A, 0x0, 64 * 1024, 1024,
0},
{MX25L12855E,0xc22618, 0x0, 64 * 1024, 256,
0},
+ {MX66L51235F,0xc2201a, 0x0, 64 * 1024, 1024,
0},
What is this - this part is already available is int it?
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
{S25FL008A, 0x010213, 0x0, 64 * 1024,16,
0},
@@ -207,6 +208,7 @@ static struct spi_flash *spi_flash_validate_params(struct
spi_slave *spi,
flash-page_size = (ext_jedec == 0x4d00) ? 512 : 256;
flash-sector_size = params-sector_size;
flash-size = flash-sector_size * params-nr_sectors;
+ flash-memory_map = spi-memory_map;
This change is also there - please check.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki,
E: jagannadh.t...@gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PULL] u-boot-usb/master
The following changes since commit f3bf212abc4139f12b472e97c1992ab32671b609: serial_sh: add support for SH7753 (2013-12-18 16:50:00 +0900) are available in the git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to eb63218b9b95a59baa8b241f3a88e4415dabf833: usb: ehci: Fix register access (2013-12-18 19:53:19 +0100) Lukasz Majewski (4): dfu: Export allocated dfu buffer size usb: dfu: f_dfu: Provide infrastructure to adjust DFU's Poll Timeout value usb: f_dfu: cosmetic: Code cleanup ARM: trats: dfu: Enable default Poll Timeout for Trats board Marek Vasut (3): usb: ehci-pci: Clarify and cleanup the EHCI controller detection usb: ehci: Do not de-init uninited controllers usb: ehci: Fix register access drivers/dfu/dfu.c | 5 + drivers/usb/gadget/f_dfu.c | 43 ++- drivers/usb/gadget/f_dfu.h | 2 ++ drivers/usb/host/ehci-hcd.c | 5 - drivers/usb/host/ehci-pci.c | 28 +--- include/configs/trats.h | 1 + include/dfu.h | 4 7 files changed, 79 insertions(+), 9 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-pxa/master
On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote: Hi Marek, On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote: Hi Albert, please pull for 2014.01 . Thanks! The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-pxa.git master for you to fetch changes up to 914f2bd1f07fba93639ad1273d4cd458b0ee99cc: arm: pxa: init ethaddr for LP-8x4x using DT (2013-12-18 18:15:26 +0100) Sergei Ianovich (5): ARM: pxa: prevent PXA270 occasional reboot freezes arm: pxa: fix LP-8x4x USB support arm: pxa: fix 2nd flash chip address on LP-8x4x arm: pxa: update LP-8x4x to boot DT kernel arm: pxa: init ethaddr for LP-8x4x using DT arch/arm/cpu/pxa/pxa2xx.c| 1 + board/icpdas/lp8x4x/lp8x4x.c | 53 +++-- include/configs/lp8x4x.h | 15 +++ 3 files changed, 31 insertions(+), 38 deletions(-) On it. Note that: remote: error: refs/remotes/origin/GPL-Cleanup does not point to a valid object! remote: error: refs/remotes/origin/i.MX31 does not point to a valid object! remote: error: refs/remotes/origin/lwmon5 does not point to a valid object! remote: error: refs/remotes/origin/tx25 does not point to a valid object! Thanks for spotting this. Where the heck does this come from (and how do I fix this) ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 23/35] nand: Add zynq nand controller driver support
On Wed, Dec 18, 2013 at 9:07 PM, Marek Vasut ma...@denx.de wrote: On Wednesday, December 18, 2013 at 04:30:08 PM, Jagannadha Sutradharudu Teki wrote: Added support for Zynq Nand controller driver. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com CC: Marek Vasut ma...@denx.de Cc: Scott Wood scottw...@freescale.com --- V2: Fixed issues pointed by Scott arch/arm/include/asm/arch-zynq/hardware.h |2 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/zynq_nand.c | 1198 + 3 files changed, 1201 insertions(+) create mode 100644 drivers/mtd/nand/zynq_nand.c [...] +#define zynq_nand_smc_base ((struct zynq_nand_smc_regs __iomem *)\ + ZYNQ_SMC_BASEADDR) Why don't you make this a static const * variable ? For accessing base from all func - may be I will through structure pointer and access. -- Thanks, Jagan. Jagannadha Sutradharudu Teki, E: jagannadh.t...@gmail.com, P: +91-9676773388 Engineer - System Software Hacker U-boot - SPI Custodian and Zynq APSOC Ln: http://www.linkedin.com/in/jaganteki ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT][PATCH 5/5] am43xx: add delay before xfer
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar sourav.pod...@ti.com wrote:
Without this delay, write/read is failing.
Looks like, the WIP always remain set and hence a timeout
occurs leading to the error.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
Hi Jagan,
This patch seems to be necessary for read/write.
I tested by changing few timing variables, but it did not help.
The same driver works on J6 with a differnet flash(S25FL256S).
Is any one tested macronix flash at uboot?
Delay must be for macronix?
or common for all flashes.
I haven't tested macronix
drivers/spi/ti_qspi.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 5666250..aa7b6ae 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -285,6 +285,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *dout,
qslave-cmd |= QSPI_3_PIN;
qslave-cmd |= 0xfff;
+#ifdef CONFIG_AM43XX
+ udelay(100);
+#endif
while (words--) {
if (txp) {
debug(tx cmd %08x dc %08x data %02x\n,
--
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki,
E: jagannadh.t...@gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-pxa/master
On Wed, Dec 18, 2013 at 07:55:48PM +0100, Marek Vasut wrote: On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote: Hi Marek, On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote: Hi Albert, please pull for 2014.01 . Thanks! The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-pxa.git master for you to fetch changes up to 914f2bd1f07fba93639ad1273d4cd458b0ee99cc: arm: pxa: init ethaddr for LP-8x4x using DT (2013-12-18 18:15:26 +0100) Sergei Ianovich (5): ARM: pxa: prevent PXA270 occasional reboot freezes arm: pxa: fix LP-8x4x USB support arm: pxa: fix 2nd flash chip address on LP-8x4x arm: pxa: update LP-8x4x to boot DT kernel arm: pxa: init ethaddr for LP-8x4x using DT arch/arm/cpu/pxa/pxa2xx.c| 1 + board/icpdas/lp8x4x/lp8x4x.c | 53 +++-- include/configs/lp8x4x.h | 15 +++ 3 files changed, 31 insertions(+), 38 deletions(-) On it. Note that: remote: error: refs/remotes/origin/GPL-Cleanup does not point to a valid object! remote: error: refs/remotes/origin/i.MX31 does not point to a valid object! remote: error: refs/remotes/origin/lwmon5 does not point to a valid object! remote: error: refs/remotes/origin/tx25 does not point to a valid object! Thanks for spotting this. Where the heck does this come from (and how do I fix this) ? Time for (As Wolfgang pointed out to me) some git remote prune origin's to be run. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-pxa/master
On Wednesday, December 18, 2013 at 08:35:28 PM, Tom Rini wrote: On Wed, Dec 18, 2013 at 07:55:48PM +0100, Marek Vasut wrote: On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote: Hi Marek, On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote: Hi Albert, please pull for 2014.01 . Thanks! The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-pxa.git master for you to fetch changes up to 914f2bd1f07fba93639ad1273d4cd458b0ee99cc: arm: pxa: init ethaddr for LP-8x4x using DT (2013-12-18 18:15:26 +0100) Sergei Ianovich (5): ARM: pxa: prevent PXA270 occasional reboot freezes arm: pxa: fix LP-8x4x USB support arm: pxa: fix 2nd flash chip address on LP-8x4x arm: pxa: update LP-8x4x to boot DT kernel arm: pxa: init ethaddr for LP-8x4x using DT arch/arm/cpu/pxa/pxa2xx.c| 1 + board/icpdas/lp8x4x/lp8x4x.c | 53 +++-- include/configs/lp8x4x.h | 15 +++ 3 files changed, 31 insertions(+), 38 deletions(-) On it. Note that: remote: error: refs/remotes/origin/GPL-Cleanup does not point to a valid object! remote: error: refs/remotes/origin/i.MX31 does not point to a valid object! remote: error: refs/remotes/origin/lwmon5 does not point to a valid object! remote: error: refs/remotes/origin/tx25 does not point to a valid object! Thanks for spotting this. Where the heck does this come from (and how do I fix this) ? Time for (As Wolfgang pointed out to me) some git remote prune origin's to be run. Thanks. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] cam_enc_4xx: Set CONFIG_SYS_NAND_MAX_OOBFREE / CONFIG_SYS_NAND_MAX_ECCPOS
With the changes to make OOBFREE/ECCPOS configurable but default to larger, we need to set these config options for the space savings they provide. Cc: Scott Wood scottw...@freescale.com Cc: Heiko Schocher h...@denx.de Signed-off-by: Tom Rini tr...@ti.com --- include/configs/cam_enc_4xx.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index c1042ae..8182a75 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -236,6 +236,8 @@ #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCSIZE0x200 #define CONFIG_SYS_NAND_ECCBYTES 10 +#define CONFIG_SYS_NAND_MAX_OOBFREE2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_OOBSIZE64 #define CONFIG_SYS_NAND_5_ADDR_CYCLE -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-ti/master
Hey, The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to b65391f99393ce43a8fe2bbcd9e9663dea41682f: ARM: am437x: Adapt to common CONFIG_BOOTCMD (2013-12-18 10:49:32 -0500) Dan Murphy (1): ARM: am437x: Adapt to common CONFIG_BOOTCMD Lokesh Vutla (12): ARM: AM43xx: Update the base addresses of modules ARM: AM43xx: Adapt to ti_armv7_common.h config file ARM: AM43xx: Add L2 Support ARM: AM43xx: Add extra ENV settings ARM: AM43xx: Select clk source for Timer2 ARM: AM43xx: Update Current Booting devices list ARM: AM43xx: mux: Update mux data ARM: AM43xx: clocks: Update DPLL details ARM: AM33xx+: Update ioregs to pass different values ARM: AM43xx: EPOS_EVM: Add support for LPDDR2 ARM: AM43xx: GP_EVM: Add support for DDR3 ARM: AM43xx: Add Maintainer Sekhar Nori (2): ARM: AM43XX: board: add support for reading onboard EEPROM ARM: AM43XX: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support Stefan Roese (1): arm: omap3: Fix beagleboard SPL boot hangup (GPIO clocks not enabled) arch/arm/cpu/armv7/am33xx/clock.c | 12 +- arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 15 + arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 +- arch/arm/cpu/armv7/am33xx/ddr.c| 146 +++- arch/arm/cpu/armv7/am33xx/emif4.c | 25 +- arch/arm/cpu/armv7/omap-common/emif-common.c | 14 - arch/arm/include/asm/arch-am33xx/clock.h |7 +- arch/arm/include/asm/arch-am33xx/clocks_am33xx.h |3 + arch/arm/include/asm/arch-am33xx/cpu.h | 24 +- arch/arm/include/asm/arch-am33xx/ddr_defs.h| 41 ++- arch/arm/include/asm/arch-am33xx/gpio.h| 12 + arch/arm/include/asm/arch-am33xx/hardware.h|7 - arch/arm/include/asm/arch-am33xx/hardware_am33xx.h |2 + arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 16 + arch/arm/include/asm/arch-am33xx/mux_am43xx.h | 45 +++ arch/arm/include/asm/arch-am33xx/omap.h|4 +- arch/arm/include/asm/arch-am33xx/spl.h | 13 +- arch/arm/include/asm/emif.h| 26 ++ board/isee/igep0033/board.c| 10 +- board/phytec/pcm051/board.c| 20 +- board/siemens/dxr2/board.c | 12 +- board/siemens/pxm2/board.c | 10 +- board/siemens/rut/board.c | 10 +- board/ti/am335x/board.c| 40 ++- board/ti/am43xx/board.c| 355 +++- board/ti/am43xx/board.h| 36 ++ board/ti/am43xx/mux.c | 35 +- board/ti/ti814x/evm.c |4 +- board/ti/ti816x/evm.c | 12 +- boards.cfg |2 +- include/configs/am43xx_evm.h | 218 ++-- include/configs/omap3_beagle.h |3 + 32 files changed, 1010 insertions(+), 181 deletions(-) -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] spi/cadence: Adding Cadence SPI driver support for SOCFPGA
To add the Cadence SPI driver support for Altera SOCFPGA. It
required information such as clocks and timing from platform's
configuration header file within include/configs folder
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/spi/Makefile |1 +
drivers/spi/cadence_qspi.c | 337
drivers/spi/cadence_qspi.h | 56 +++
drivers/spi/cadence_qspi_apb.c | 873
4 files changed, 1267 insertions(+)
create mode 100644 drivers/spi/cadence_qspi.c
create mode 100644 drivers/spi/cadence_qspi.h
create mode 100644 drivers/spi/cadence_qspi_apb.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index ed4ecd7..838e6ca 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
obj-$(CONFIG_BFIN_SPI) += bfin_spi.o
obj-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o
+obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
obj-$(CONFIG_CF_SPI) += cf_spi.o
obj-$(CONFIG_CF_QSPI) += cf_qspi.o
obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
new file mode 100644
index 000..e2bf39f
--- /dev/null
+++ b/drivers/spi/cadence_qspi.c
@@ -0,0 +1,337 @@
+/*
+ * Copyright (C) Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include spi.h
+#include cadence_qspi.h
+
+#define CQSPI_STIG_READ0
+#define CQSPI_STIG_WRITE 1
+#define CQSPI_INDIRECT_READ2
+#define CQSPI_INDIRECT_WRITE 3
+
+static int qspi_is_init;
+static unsigned int qspi_calibrated_hz;
+static unsigned int qspi_calibrated_cs;
+
+struct cadence_qspi_slave {
+ struct spi_slave slave;
+ unsigned intmode;
+ unsigned intmax_hz;
+ void*regbase;
+ void*ahbbase;
+ size_t cmd_len;
+ u8 cmd_buf[32];
+ size_t data_len;
+};
+
+#define to_cadence_qspi_slave(s) \
+ container_of(s, struct cadence_qspi_slave, slave)
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+ struct cadence_qspi_slave *cadence_qspi = to_cadence_qspi_slave(slave);
+ void *base = cadence_qspi-regbase;
+
+ cadence_qspi_apb_config_baudrate_div(base, CONFIG_CQSPI_REF_CLK, hz);
+
+ /* Reconfigure delay timing if speed is changed. */
+ cadence_qspi_apb_delay(base, CONFIG_CQSPI_REF_CLK, hz,
+ CONFIG_CQSPI_TSHSL_NS, CONFIG_CQSPI_TSD2D_NS,
+ CONFIG_CQSPI_TCHSH_NS, CONFIG_CQSPI_TSLCH_NS);
+ return;
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct cadence_qspi_slave *cadence_qspi;
+
+ debug(%s: bus %d cs %d max_hz %dMHz mode %d\n, __func__,
+ bus, cs, max_hz/100, mode);
+
+ if (!spi_cs_is_valid(bus, cs))
+ return NULL;
+
+ cadence_qspi = malloc(sizeof(struct cadence_qspi_slave));
+ if (!cadence_qspi) {
+ printf(QSPI: Can't allocate struct cadence_qspi_slave.
+ Bus %d cs %d\n, bus, cs);
+ return NULL;
+ }
+
+ cadence_qspi-slave.bus = bus;
+ cadence_qspi-slave.cs = cs;
+ cadence_qspi-mode = mode;
+ cadence_qspi-max_hz = max_hz;
+ cadence_qspi-regbase = (void *)QSPI_BASE;
+ cadence_qspi-ahbbase = (void *)QSPI_AHB_BASE;
+
+ if (!qspi_is_init)
+ spi_init();
+
+ return cadence_qspi-slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ struct cadence_qspi_slave *cadence_qspi = to_cadence_qspi_slave(slave);
+ free(cadence_qspi);
+ return;
+}
+
+void spi_init(void)
+{
+ cadence_qspi_apb_controller_init((void *)QSPI_BASE);
+ qspi_is_init = 1;
+ return;
+}
+
+/* calibration sequence to determine the read data capture delay register */
+int spi_calibration(struct spi_slave *slave)
+{
+ struct cadence_qspi_slave *cadence_qspi = to_cadence_qspi_slave(slave);
+ void *base = cadence_qspi-regbase;
+ u8 opcode_rdid = 0x9F;
+ unsigned int idcode = 0, temp = 0;
+ int err = 0, i, range_lo = -1, range_hi = -1;
+
+ /* start with slowest clock (1 MHz) */
+ spi_set_speed(slave, 100);
+
+ /* configure the read data capture delay register to 0 */
+ cadence_qspi_apb_readdata_capture(base, 1, 0);
+
+ /* Enable QSPI */
+ cadence_qspi_apb_controller_enable(base);
+
+ /* read the ID which will be our golden value */
+ err = cadence_qspi_apb_command_read(base, 1, opcode_rdid,
+ 3, (u8 *)idcode);
+ if (err) {
+ puts(SF: Calibration failed (read)\n);
+
Re: [U-Boot] [PATCH V3 00/14] ARM: AM43xx: Update support for AM4372 SoC
On Tue, Dec 10, 2013 at 03:02:10PM +0530, Lokesh Vutla wrote: This Patch series updates support for AM4372 EPOS and GP EVM boards. AM4372 is a low cost Cortex-A9 based application processor targeted at existing ARM9/ARM11 base of customers that need more processing capabilities. Currently there are two boards with AM4372 SoC: EPOS and GP EVM. Except for few differences like oscillator clock and SDRAM both EPOS and GP EVM boards are similar. EPOS EVM: OSC clk : 25MHz DDR : LPDDR2 @ 266MHz (MT42L256M32D2LG-25 WT:A) GP EVM: OSC clk : 24MHz DDR : DDR3 @ 400MHz(MT41K512M8RH) This patch series is applied on top of Mainline U-Boot Tree and two patches mentioned below: git://git.denx.de/u-boot.git master http://patchwork.ozlabs.org/patch/288175/ Testing: - Boot tested on AM4372 EPOS and GP EVMs, Beaglebone Black. - verified MAKEALL -s am33xx. - Ran checkpatch on all patches. Changes Since V2: - Updating the base offsets only for AM43xx - Populated DPLLs data for all OPPs and SYS CLK inputs and the correct values to be read from eFuse. - Seperated out ioregs changes into a new patch. Changes Since V1: As per Vaibhav's and Tom's Comments: - Updated the mux data not to use DSPULLUDEN. - Reused the emif4d file for configuring emif4d5 registers. - Updated the code with comments. - Rebased on top of Current U-Boot mainline. Lokesh Vutla (12): ARM: AM43xx: Update the base addresses of modules ARM: AM43xx: Adapt to ti_armv7_common.h config file ARM: AM43xx: Add L2 Support ARM: AM43xx: Add extra ENV settings ARM: AM43xx: Select clk source for Timer2 ARM: AM43xx: Update Current Booting devices list ARM: AM43xx: mux: Update mux data ARM: AM43xx: clocks: Update DPLL details ARM: AM33xx+: Update ioregs to pass different values ARM: AM43xx: EPOS_EVM: Add support for LPDDR2 ARM: AM43xx: GP_EVM: Add support for DDR3 ARM: AM43xx: Add Maintainer Sekhar Nori (2): ARM: AM43XX: board: add support for reading onboard EEPROM ARM: AM43XX: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support arch/arm/cpu/armv7/am33xx/clock.c | 12 +- arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 15 + arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 +- arch/arm/cpu/armv7/am33xx/ddr.c| 146 +++- arch/arm/cpu/armv7/am33xx/emif4.c | 25 +- arch/arm/cpu/armv7/omap-common/emif-common.c | 14 - arch/arm/include/asm/arch-am33xx/clock.h |7 +- arch/arm/include/asm/arch-am33xx/clocks_am33xx.h |3 + arch/arm/include/asm/arch-am33xx/cpu.h | 24 +- arch/arm/include/asm/arch-am33xx/ddr_defs.h| 41 ++- arch/arm/include/asm/arch-am33xx/gpio.h| 12 + arch/arm/include/asm/arch-am33xx/hardware.h|7 - arch/arm/include/asm/arch-am33xx/hardware_am33xx.h |2 + arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 16 + arch/arm/include/asm/arch-am33xx/mux_am43xx.h | 45 +++ arch/arm/include/asm/arch-am33xx/omap.h|4 +- arch/arm/include/asm/arch-am33xx/spl.h | 13 +- arch/arm/include/asm/emif.h| 26 ++ board/isee/igep0033/board.c| 10 +- board/phytec/pcm051/board.c| 12 +- board/siemens/dxr2/board.c | 10 +- board/siemens/pxm2/board.c | 10 +- board/siemens/rut/board.c | 10 +- board/ti/am335x/board.c| 40 ++- board/ti/am43xx/board.c| 355 +++- board/ti/am43xx/board.h| 36 ++ board/ti/am43xx/mux.c | 35 +- board/ti/ti814x/evm.c |4 +- board/ti/ti816x/evm.c | 12 +- boards.cfg |2 +- include/configs/am43xx_evm.h | 204 +-- 31 files changed, 983 insertions(+), 181 deletions(-) Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: omap3: Fix beagleboard SPL boot hangup (GPIO clocks not enabled)
On Tue, Dec 17, 2013 at 02:14:06PM +0100, Stefan Roese wrote: Patch f33b9bd3 [arm: omap3: Enable clocks for peripherals only if they are used] breaks SPL booting on Beagleboard. Since some gpio input's are read to detect the board revision. But with this patch above, the clocks to the GPIO subsystems are not enabled per default any more. The GPIO banks need to be configured specifically now. Signed-off-by: Stefan Roese s...@denx.de Cc: Tom Rini tr...@ti.com Cc: Michael Trimarchi mich...@amarulasolutions.com Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ARM: am437x: Adapt to common CONFIG_BOOTCMD
On Fri, Nov 22, 2013 at 08:44:33AM -0600, Dan Murphy wrote: Update the CONFIG_BOOTCMD to adopt the common boot command which parses through USB, MMC and NAND. This patch is dependent on the series starting with http://patchwork.ozlabs.org/patch/292986/ Signed-off-by: Dan Murphy dmur...@ti.com Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] pull request for u-boot-tegra/master into ARM/master
Albert, Please pull u-boot-tegra/master into ARM/master. Thanks! ./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEALL -a arm only shows failures that were already present in ARM/master. The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-tegra master for you to fetch changes up to 766afc3dff35f8f257deb0373735a328c8206880: arm: tegra: Fix the CPU complex reset masks (2013-12-18 10:19:49 -0700) Alban Bedel (4): ARM: tegra: support SKU b1 of Tegra30 i2c: tegra: Add the fifth bus on SoC with more than 4 buses ARM: tegra: Add the Tamonten™ NG Evaluation Carrier board arm: tegra: Fix the CPU complex reset masks Jim Lin (1): ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on bootp Jimmy Zhang (1): Tegra114: Fix PLLX M, N, P init settings Thierry Reding (2): Tegra114: Do not program CPCON field for PLLX Change maintainer for Avionic Design boards Vidya Sagar (1): tegra: allow build to succeed with SPL disabled Makefile | 2 + arch/arm/cpu/arm720t/tegra-common/cpu.c| 89 +++-- arch/arm/cpu/tegra-common/ap.c | 1 + arch/arm/include/asm/arch-tegra/clock.h| 6 +- arch/arm/include/asm/arch-tegra/tegra.h| 1 + .../common/pinmux-config-tamonten-ng.h | 385 + board/avionic-design/common/tamonten-ng.c | 85 + board/avionic-design/dts/tegra30-tamonten.dtsi | 69 board/avionic-design/dts/tegra30-tec-ng.dts| 18 + board/avionic-design/tec-ng/Makefile | 12 + boards.cfg | 7 +- drivers/i2c/tegra_i2c.c| 5 + include/configs/tec-ng.h | 84 + include/configs/tegra114-common.h | 1 + include/configs/tegra30-common.h | 1 + 15 files changed, 735 insertions(+), 31 deletions(-) create mode 100644 board/avionic-design/common/pinmux-config-tamonten-ng.h create mode 100644 board/avionic-design/common/tamonten-ng.c create mode 100644 board/avionic-design/dts/tegra30-tamonten.dtsi create mode 100644 board/avionic-design/dts/tegra30-tec-ng.dts create mode 100644 board/avionic-design/tec-ng/Makefile create mode 100644 include/configs/tec-ng.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-pxa/master
Picked the HZ patch The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-pxa.git master for you to fetch changes up to f90aea2a65e71a37ff029849d908538ae9e98283: ARM: pxa: Fix CONFIG_SYS_HZ on PXA (2013-12-18 20:40:05 +0100) Marek Vasut (1): ARM: pxa: Fix CONFIG_SYS_HZ on PXA Sergei Ianovich (5): ARM: pxa: prevent PXA270 occasional reboot freezes arm: pxa: fix LP-8x4x USB support arm: pxa: fix 2nd flash chip address on LP-8x4x arm: pxa: update LP-8x4x to boot DT kernel arm: pxa: init ethaddr for LP-8x4x using DT arch/arm/cpu/pxa/pxa2xx.c| 1 + board/icpdas/lp8x4x/lp8x4x.c | 53 +++-- include/configs/balloon3.h | 10 +- include/configs/lp8x4x.h | 15 +++ include/configs/palmld.h | 10 +- include/configs/palmtc.h | 10 +- include/configs/scb9328.h| 6 +++--- include/configs/zipitz2.h| 10 +- 8 files changed, 54 insertions(+), 61 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] pull request for u-boot-tegra/master into ARM/master
Hi Tom, On Wed, 18 Dec 2013 13:06:37 -0700, Tom Warren twarren.nvi...@gmail.com wrote: Albert, Please pull u-boot-tegra/master into ARM/master. Thanks! ./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEALL -a arm only shows failures that were already present in ARM/master. The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac: ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39 -0500) are available in the git repository at: git://git.denx.de/u-boot-tegra master for you to fetch changes up to 766afc3dff35f8f257deb0373735a328c8206880: arm: tegra: Fix the CPU complex reset masks (2013-12-18 10:19:49 -0700) Alban Bedel (4): ARM: tegra: support SKU b1 of Tegra30 i2c: tegra: Add the fifth bus on SoC with more than 4 buses ARM: tegra: Add the Tamonten™ NG Evaluation Carrier board arm: tegra: Fix the CPU complex reset masks Jim Lin (1): ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on bootp Jimmy Zhang (1): Tegra114: Fix PLLX M, N, P init settings Thierry Reding (2): Tegra114: Do not program CPCON field for PLLX Change maintainer for Avionic Design boards Vidya Sagar (1): tegra: allow build to succeed with SPL disabled Makefile | 2 + arch/arm/cpu/arm720t/tegra-common/cpu.c| 89 +++-- arch/arm/cpu/tegra-common/ap.c | 1 + arch/arm/include/asm/arch-tegra/clock.h| 6 +- arch/arm/include/asm/arch-tegra/tegra.h| 1 + .../common/pinmux-config-tamonten-ng.h | 385 + board/avionic-design/common/tamonten-ng.c | 85 + board/avionic-design/dts/tegra30-tamonten.dtsi | 69 board/avionic-design/dts/tegra30-tec-ng.dts| 18 + board/avionic-design/tec-ng/Makefile | 12 + boards.cfg | 7 +- drivers/i2c/tegra_i2c.c| 5 + include/configs/tec-ng.h | 84 + include/configs/tegra114-common.h | 1 + include/configs/tegra30-common.h | 1 + 15 files changed, 735 insertions(+), 31 deletions(-) create mode 100644 board/avionic-design/common/pinmux-config-tamonten-ng.h create mode 100644 board/avionic-design/common/tamonten-ng.c create mode 100644 board/avionic-design/dts/tegra30-tamonten.dtsi create mode 100644 board/avionic-design/dts/tegra30-tec-ng.dts create mode 100644 board/avionic-design/tec-ng/Makefile create mode 100644 include/configs/tec-ng.h Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
