Re: [U-Boot] [U-Boot, v2] boards.cfg: move many unmaintained boards to Orphan

[Sinan Akman]

  Hi Masahiro

Masahiro Yamada wrote:

Hi Sinan,



[...]
 +Orphan  powerpc mpc83xx-   freescale 

mpc837xerdb MPC837XERDB

   I have this board and I would very much like that it'll continue to
be maintained. I just tested the ToT and it seems other than some minor
warnings and request to use generic-board it is not in a bad shape.

   I can continue testing at each release and after there are related
patches. Would that help to have this board to be unorphaned ?


Thanks for offering to test this board.
Are you willing to be a maintainer of this board?


  Sure I'd be bappy if I could. I don't know what it takes
exactly and not sure if I would qualify.

  If I don't, I can also help perhaps to another e300 maintainer
to extend his/her maintainership to this board.

  Either way, I'd be happy to help.

  Regards

  Sinan Akman

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Re: [U-Boot] [RFC] Two sets of experimental Kconfig patches

[Masahiro Yamada]

Hi Simon,

> 
> I have been thinking about this a lot, but it isn't 100% clear to me.
> 
> While I agree that duplicating the CONFIGs is bad, in fact the
> opposite of what I was getting at, I do feel that things like
> CONFIG_TEGRA20 need to be set in one place. We don't want the SPL/TPL
> config to be changing things that make no sense given the board that
> is selected. It doesn't make sense to have an SPL for Tegra and a TPL
> for MX6.

I agree.
But I think, in some cases,  it makes sense to build SPL only.
I want to drop Falcon boot as a special case.

In my rough view:
 -  _defconfig:  Normal boot sequence
 -  _defconfig + _spl_defconfig  :   SPL boot sequence
 -  _spl_defconfig : Falcon boot


> Similar to what Tom was saying I feel that there will come a time when
> the difference between U-Boot and SPL is just the options that are
> enabled - the code paths will be the same. For example, I did a
> CONFIG_CMD series which removed all commands from U-Boot and cut the
> size to <50KB. OK that is not SPL size, but I can see a point where
> they will merge. In that case we certainly don't want the option that
> you list above - instead we want CONFIG_OF_CONTROL to mean the same
> thing for U-Boot and SPL.
> 
> Perhaps it will help if we can have options like:
> 
> make menuconfig_main
> make menuconfig_spl
> make menuconfig_tpl

I have posted v3.

It is possible in v3.

make menuconfig -->  edit  .config
make spl:menuconfig-->  edit  spl/.config
make tpl:menuconfig-->  edit  tpl/.config
make qpl:menuconfig   -->   edit  qpl/.config
etc.

Syntax is 
make  :




Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH v4 0/3] mtd, ubi, ubifs: resync with Linux-3.14

[Heiko Schocher]

Hello Tom,

Am 23.06.2014 17:05, schrieb Tom Rini:

On Sun, Jun 22, 2014 at 09:36:43AM +0200, Wolfgang Denk wrote:

Dear Heiko,

In message<53a67ed9.2090...@denx.de>  you wrote:


And I have no chance to detect this difference, when using
"git am -3 ..." ... it just remains in the code ...

I vote for copying the linux files, marking U-Boot specific code
with __UBOOT__ ...


Given the complexity of the code  - and of the changes added in U-Boot
to the original (old) Linux code (which were done over a period of
time) - I think indeed that your original approach is the better one;
better both in the sense of requiring less efforts (for creating and
verifying that all chanes were covered), and less risk to miss
individual modifications either from the Linux or from the U-Boot
side.

Scott, I agree that your suggestion is what usually should work fine,
but here it apparently fails in a number of places that would be time
consuming to sort out - and I would expect that the same would happen
again whenever we update to another new version of the Linux code
base.  So I think we should stick with Heiko's approach here; it
documents clearly what he did, it looks complete, and it is working.
I think it would be a waste of time to redo all the work, just
differently.


OK, lets try this.  One worry at the back of my mind is the fallout we
had when we re-synced to v3.7.1 and tested things as best we were able
to prior to merge.  I think it's too late in the cycle to pull this in


Yes I fear such fallout too ... I could also test on some boards only,
the rest is compile clean only ... thats the reason why I had the sync
serie as RFC ... maybe we create a mtd-test branch? But on the other
hand, things maybe get tested only, if they are in mainline ...


for v2014.07, but lets get something in for v2014.10.  And since v3.15


Yep, that was my plan too.


is already out, lets do (as part of testing our theories out), a follow
up patch to sync up with v3.15.  And finally, I think we need, in order
to keep this pain point down, sync per kernel release.


Ok, I had prepared a v5, posting it soon.

I try to do also to prepare a seperate sync with v3.15 patch, but give
me some time ... also I found a bug in current v3.16-rc1 kernel, using
ubi fastmap, see:

"UBI: fix rb_tree node comparison in add_map commit buggy?"
http://lists.infradead.org/pipermail/linux-mtd/2014-June/054348.html

So current v3.16-rc1 kernel could not attach a ubi volume using
ubi fastmap and created with a kernel not having commit
604b592e6fd3c98f21435e1181ba7723ffc24715 applied ... which is
the case for v3.14 ... with my fixup, a v3.16-rc1 kernel could
again attach a v3.14 kernel or U-Boot (with my v3.14 sync patches
applied) created ubi volume ...

Maybe we wait with the sync, until this is sorted out?

To sync us with each kernel release would be a good idea, but the
problem would be, to find time for it ...

bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [Patch v8 4/5] armv8/fsl-lsch3: Add support to load and start MC Firmware

[Jose Rivera]

The "uname == NULL" check can be removed.

Thanks,

German

From: Sun York-R58495
Sent: Friday, June 20, 2014 3:38 PM
To: Jeroen Hofstee; Rivera Jose-B46482
Cc: albert.u.b...@aribaud.net; Kanetkar Shruti-B44454; u-boot@lists.denx.de
Subject: Re: [U-Boot] [Patch v8 4/5] armv8/fsl-lsch3: Add support to load and 
start MC Firmware

On 06/20/2014 01:33 PM, Jeroen Hofstee wrote:
> Hi York,
>
> On 20-06-14 20:46, York Sun wrote:
>> From: "J. German Rivera" 
>>
>> Adding support to load and start the Layerscape Management Complex (MC)
>> firmware. First, the MC GCR register is set to 0 to reset all cores. MC
>> firmware and DPL images are copied from their location in NOR flash to
>> DDR. MC registers are updated with the location of these images.
>> Deasserting the reset bit of MC GCR register releases core 0 to run.
>> Core 1 will be released by MC firmware. Stop bits are not touched for
>> this step. U-boot waits for MC until it boots up. In case of a failure,
>> device tree is updated accordingly. The MC firmware image uses FIT format.
>>
>>
>> +int parse_mc_firmware_fit_image(const void **raw_image_addr,
>> +size_t *raw_image_size)
>> +{
>> +int format;
>> +void *fit_hdr;
>> +int node_offset;
>> +const void *data;
>> +size_t size;
>> +const char *uname = "firmware";
>> +
>> +/* Check if the image is in NOR flash*/
>> +#ifdef CONFIG_SYS_LS_MC_FW_IN_NOR
>> +fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR;
>> +#else
>> +#error "No CONFIG_SYS_LS_MC_FW_IN_xxx defined"
>> +#endif
>> +
>> +/* Check if Image is in FIT format */
>> +format = genimg_get_format(fit_hdr);
>> +
>> +if (format != IMAGE_FORMAT_FIT) {
>> +debug("Not a FIT image\n");
>> +return 1;
>> +}
>> +
>> +if (!fit_check_format(fit_hdr)) {
>> +debug("Bad FIT image format\n");
>> +return 1;
>> +}
>> +
>> +/* Find node offset of MC Firmware image */
>> +if (uname == NULL) {
>> +debug("FIT subimage unit name not provided");
>> +return 1;
>> +}
>> +
>
> I don't see how uname can ever be NULL here, since it is
> assigned above.
>

Good question. I think German has a plan to use different name. I will let him
comment.

York

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Re: [U-Boot] Running ARMv8 on fast model

[Youngmin Nam]

Thanks Steve.

But when I run command like below,
the parameters that I configured didn't work. It seems that there need to
use some different parameter for "FVP_VE" model.

Do you have any idea?

youngmin@ubuntu:~/ARM/FastModelsPortfolio_8.3/examples/FVP_VE/Build_Cortex-A57x4/Linux64-Release-GCC-4.6
$model_shell64 cadi_system_Linux64-Release-GCC-4.6.so -C
pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C  cache_state_modelled=1 -C
bp.pl011_uart0.untimed_fifos=1 -C
bp.secureflashloader.fname=/home/youngmin/ARM/bl1.bin -a
/home/youngmin/u-boot.elf
--parameter: parameter 'bp.pl011_uart0.untimed_fifos' not found
--parameter: parameter 'bp.secure_memory' not found
--parameter: parameter
'bp.secureflashloader.fname' not found
--parameter: parameter 'cache_state_modelled' not found
--parameter: parameter' pctl.startup 'not found

Regards.
2014. 6. 24. 오전 2:30에 "Steve Rae" 님이 작성:

>
>
> On 14-06-23 12:01 AM, Youngmin Nam wrote:
>
>> Hello expert.
>> I'm trying to run ARMv8 u-boot on fast model. Exactly on Coretex-A57×4 In
>> FVP_VE
>>
>> When I run command "model_shell64 cadi_system_Linux64-Release-GCC-4.6.so
>> u-boot.elf"
>>
>> There isn't any pop up xterm terminal.
>>
>> My fast model version is 8.3 and I used vexpress_aemv8a configuration on
>> denx u-boot mainline.
>>
>> Does any body test armv8 u-boot on fast model?
>>
>>
>>  Yes - but...
> (1) I am testing vexpress_aemv8a_semi; which is not in master yet -- see:
> http://patchwork.ozlabs.org/patch/357577/
> (2) I have inherited a script which "does everything"... However, the
> fundamental piece is:
> ./Linux-Release-GCC-4.6/isim_system -C pctl.startup=0.0.0.0 -C
> bp.secure_memory=0 -C cache_state_modelled=0 -C
> bp.pl011_uart0.untimed_fifos=1 -C bp.secureflashloader.fname=bl1.bin
>
> Note: this process actually launches a bootloader (bl1.bin); which is then
> used to launch U-Boot...
>
> I hope this helps,
> Thanks, Steve
>
>
>
>> ___
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>>
>>
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Re: [U-Boot] [PATCH v2] ARM: tegra: Disable VPR

[Alexandre Courbot]

On 06/24/2014 03:44 AM, Stephen Warren wrote:

On 06/23/2014 01:20 AM, Alexandre Courbot wrote:

From: Bryan Wu 

On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed.  For bootloader, we
probably don't care about VPR, so we disable it (which counts as programming
it, and allows those display-related registers to be accessed.

This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c
in Chromium OS U-Boot project.



diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/cpu/tegra-common/vpr.c



+void config_vpr(void)
+{
+   struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+
+   /* VPR is only in T114 and T124 */
+   switch (tegra_get_chip()) {
+   case CHIPID_TEGRA114:
+   case CHIPID_TEGRA124:


You can drop the switch() and call to tegra_get_chip() since this is all
done at compile-time now.


Of course. What was I thinking...



Other than that,
Reviewed-by: Stephen Warren 


Thanks!

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[U-Boot] [PATCH v3] ARM: tegra: Disable VPR

[Alexandre Courbot]

From: Bryan Wu 

On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed.  For bootloader, we
probably don't care about VPR, so we disable it (which counts as programming
it, and allows those display-related registers to be accessed.

This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c
in Chromium OS U-Boot project.

Signed-off-by: Andrew Chew 
Signed-off-by: Jimmy Zhang 
Signed-off-by: Bryan Wu 
[acourbot: ensure write went through, vpr.c style changes]
Signed-off-by: Alexandre Courbot 
Reviewed-by: Stephen Warren 
Cc: Tom Warren 
Cc: Stephen Warren 
Cc: Terje Bergstrom 
---
Changes since v2:
- Remove useless switch case

Changes since v1:
- Use proper defines for fields values
- Move MC layout to T124 arch as it is exclusive to it
- Only compile VPR support if T124 is enabled

 arch/arm/cpu/tegra-common/Makefile  |  1 +
 arch/arm/cpu/tegra-common/ap.c  |  3 ++
 arch/arm/cpu/tegra-common/vpr.c | 35 +++
 arch/arm/include/asm/arch-tegra/ap.h|  9 ++
 arch/arm/include/asm/arch-tegra124/mc.h | 49 +
 5 files changed, 97 insertions(+)
 create mode 100644 arch/arm/cpu/tegra-common/vpr.c
 create mode 100644 arch/arm/include/asm/arch-tegra124/mc.h

diff --git a/arch/arm/cpu/tegra-common/Makefile 
b/arch/arm/cpu/tegra-common/Makefile
index 892556e64451..a18c318739fa 100644
--- a/arch/arm/cpu/tegra-common/Makefile
+++ b/arch/arm/cpu/tegra-common/Makefile
@@ -14,3 +14,4 @@ obj-y += clock.o
 obj-y += lowlevel_init.o
 obj-y += pinmux-common.o
 obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
+obj-$(CONFIG_TEGRA124) += vpr.o
diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c
index 91d70da65661..a17dfd1e225e 100644
--- a/arch/arm/cpu/tegra-common/ap.c
+++ b/arch/arm/cpu/tegra-common/ap.c
@@ -163,4 +163,7 @@ void s_init(void)
 
/* init the cache */
config_cache();
+
+   /* init vpr */
+   config_vpr();
 }
diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/cpu/tegra-common/vpr.c
new file mode 100644
index ..f695811c9b6d
--- /dev/null
+++ b/arch/arm/cpu/tegra-common/vpr.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+/* Tegra vpr routines */
+
+#include 
+#include 
+#include 
+#include 
+
+/* Configures VPR.  Right now, all we do is turn it off. */
+void config_vpr(void)
+{
+   struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+
+   /* Turn VPR off */
+   writel(0, &mc->mc_video_protect_size_mb);
+   writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
+  &mc->mc_video_protect_reg_ctrl);
+   /* read back to ensure the write went through */
+   readl(&mc->mc_video_protect_reg_ctrl);
+}
diff --git a/arch/arm/include/asm/arch-tegra/ap.h 
b/arch/arm/include/asm/arch-tegra/ap.h
index bc5851c1d045..5c8be94d9772 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -65,3 +65,12 @@ int tegra_get_sku_info(void);
 
 /* Do any chip-specific cache config */
 void config_cache(void);
+
+#if defined(CONFIG_TEGRA124)
+/* Do chip-specific vpr config */
+void config_vpr(void);
+#else
+static inline void config_vpr(void)
+{
+}
+#endif
diff --git a/arch/arm/include/asm/arch-tegra124/mc.h 
b/arch/arm/include/asm/arch-tegra124/mc.h
new file mode 100644
index ..d526dfe15c30
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra124/mc.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#ifndef _TEGRA124_MC_H_
+#define _TEGRA124_MC_H_
+
+/**
+ * Defines the memory controller registers we need/care about
+ */
+struct mc_ctlr {
+   u32

[U-Boot] [PATCH v3 10/11] kbuild: remove CONFIG_SPL/CONFIG_TPL definition in config headers

[Masahiro Yamada]

Now CONFIG_SPL and CONFIG_TPL are defined in Kconfig.

Remove the redundant definition in config headers.

Signed-off-by: Masahiro Yamada 
Reviewed-by: Simon Glass 
---

Changes in v3:
  - Rebase on the current u-boot/master
Changes in v2:
  - Rebase on the current u-boot/master

 include/configs/B4860QDS.h | 1 -
 include/configs/BSC9131RDB.h   | 1 -
 include/configs/BSC9132QDS.h   | 1 -
 include/configs/C29XPCIE.h | 2 --
 include/configs/MPC8313ERDB.h  | 1 -
 include/configs/P1010RDB.h | 4 
 include/configs/P1022DS.h  | 4 
 include/configs/P1_P2_RDB.h| 4 
 include/configs/T104xRDB.h | 1 -
 include/configs/T208xQDS.h | 1 -
 include/configs/T208xRDB.h | 1 -
 include/configs/T4240QDS.h | 1 -
 include/configs/a3m071.h   | 1 -
 include/configs/am335x_igep0033.h  | 1 -
 include/configs/am3517_crane.h | 1 -
 include/configs/am3517_evm.h   | 1 -
 include/configs/apf27.h| 1 -
 include/configs/arndale.h  | 1 -
 include/configs/bur_am335x_common.h| 1 -
 include/configs/cam_enc_4xx.h  | 1 -
 include/configs/cm_t35.h   | 1 -
 include/configs/da850evm.h | 1 -
 include/configs/devkit8000.h   | 1 -
 include/configs/exynos5-dt.h   | 1 -
 include/configs/hawkboard.h| 1 -
 include/configs/ipam390.h  | 1 -
 include/configs/lwmon5.h   | 1 -
 include/configs/m53evk.h   | 1 -
 include/configs/mcx.h  | 1 -
 include/configs/microblaze-generic.h   | 1 -
 include/configs/mx31pdk.h  | 1 -
 include/configs/mxs.h  | 1 -
 include/configs/omap3_evm_common.h | 1 -
 include/configs/origen.h   | 1 -
 include/configs/p1_p2_rdb_pc.h | 4 
 include/configs/palmtreo680.h  | 1 -
 include/configs/pcm051.h   | 1 -
 include/configs/sama5d3_xplained.h | 1 -
 include/configs/sama5d3xek.h   | 1 -
 include/configs/siemens-am33x-common.h | 1 -
 include/configs/smdkv310.h | 1 -
 include/configs/socfpga_cyclone5.h | 1 -
 include/configs/sunxi-common.h | 1 -
 include/configs/tam3517-common.h   | 1 -
 include/configs/tao3530.h  | 1 -
 include/configs/tegra-common.h | 1 -
 include/configs/ti814x_evm.h   | 1 -
 include/configs/ti816x_evm.h   | 1 -
 include/configs/ti_armv7_common.h  | 1 -
 include/configs/tricorder.h| 1 -
 include/configs/tx25.h | 1 -
 include/configs/vpac270.h  | 1 -
 include/configs/woodburn_sd.h  | 1 -
 include/configs/x600.h | 1 -
 include/configs/zynq-common.h  | 1 -
 55 files changed, 68 deletions(-)

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index cb35116..c4eb50d 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -23,7 +23,6 @@
 #define CONFIG_RAMBOOT_TEXT_BASE   CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS0xfffc
 #else
-#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index e6b46e4..56a3e94 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -25,7 +25,6 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index fc45e45..4089b33 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -41,7 +41,6 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index f382b48..8ae33a5 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -24,8 +24,6 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL 1
-#define CONFIG_TPL 1
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 7f5aa59..dd81229 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -19,7 +19,6 @@
 #define CONFIG_MPC8313ERDB 1
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 86d62e1..c491b50 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -21,7 +21,6 @@
 #define CONFIG_NAND_FSL_IFC
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SU

[U-Boot] [PATCH v3 02/11] Do not apply: tools: add genkconfig

[Masahiro Yamada]

 
 Do not apply this patch to the main line
 

 What is this tool?
 --

This tool converts boards.cfg to defconfig and Kconfig files.

It automatically generates
 - arch/${ARCH}/Kconfig
 - board/${VENDOR}/${BOARD}/Kconfig
 - board/${BOARD}/Kconfig
 - configs/${TARGET_BOARD}_defconfig

 How to use?
 ---

Open tools/print_allconfigs with an editor.

Adjust cross compilers part for your environment.

  # Specify your favoriate cross tools
  CROSS_COMPILE_ARC=arc-linux-
  CROSS_COMPILE_AARCH64=aarch64-linux-gnu-
  CROSS_COMPILE_ARM=arm-unknown-linux-gnueabi-
   [snip]
  CROSS_COMPILE_X86=i386-linux-

And then, run "tools/genkconfig".

 Why is this patch here?
 ---

The file boards.cfg is touched very frequently.
All the time, new/old boards are being added/removed.

The next commit was generated based on the u-boot/master at the time
I posted it.
It will become out-dated soon.

You can update it with this tool.

Signed-off-by: Masahiro Yamada 
---

Changes in v3:
 - Create SPL defconfig into configs/_spl_defconfig
   instead of conigs/spl/_defconfig. Like the same for TPL.
   Because I want to handle Falcon boot more genericlly.
   If you build only configs/_spl_defconfig, it is Falcon boot.
 - Create board select menu based on the 8th field of boards.cfg.
   It is common that many entries (= 7th field) share the same
   config header. So this change help to reduce the code redandancy.

Changes in v2:
 - Do not output CONFIG_BOARD_MAINTAINERS and CONFIG_BOARD_STATUS
 - Delete board/Kconfig and move "source board/*/*/Kconfig"
   statements to arch/*/Kconfig.

 tools/genkconfig   | 299 +
 tools/print_allconfigs |  77 +
 2 files changed, 376 insertions(+)
 create mode 100755 tools/genkconfig
 create mode 100755 tools/print_allconfigs

diff --git a/tools/genkconfig b/tools/genkconfig
new file mode 100755
index 000..3aaec2a
--- /dev/null
+++ b/tools/genkconfig
@@ -0,0 +1,299 @@
+#!/bin/bash
+
+set -e
+
+rm -rf configs
+mkdir configs
+find board -name Kconfig | xargs rm -f
+
+get_arch()
+{
+   case "$arch" in
+   powerpc) echo PPC;;
+   *)   echo ${1^^};;
+   esac
+}
+
+arch_list="arc arm avr32 blackfin m68k microblaze mips nds32 nios2 openrisc 
powerpc sandbox sh sparc x86"
+
+for arch in $arch_list
+do
+   ARCH=$(get_arch $arch)
+
+   case "$arch" in
+   blackfin) menu="Blackfin";;
+   m68k) menu="M68000";;
+   microblaze) menu="MicroBlaze";;
+   nios2) menu="Nios II";;
+   openrisc) menu="OpenRISC";;
+   powerpc) menu="PowerPC";;
+   sandbox) menu="Sandbox";;
+   sh) menu="SuperH";;
+   x86) menu="x86";;
+   *) menu=${arch^^};;
+   esac
+
+cat < arch/$arch/Kconfig
+menu "$menu architecture"
+   depends on $ARCH
+
+config SYS_ARCH
+   string
+   default "$arch"
+
+EOF
+
+if [ "$arch" = "sandbox" ]; then
+cat <> arch/$arch/Kconfig
+config SYS_CPU
+   string
+   default "$arch"
+
+config SYS_BOARD
+   string
+   default "$arch"
+
+config SYS_CONFIG_NAME
+   string
+   default "$arch"
+EOF
+else
+cat <> arch/$arch/Kconfig
+choice
+   prompt "Target select"
+
+EOF
+fi
+
+done
+
+write_defconfig ()
+{
+   echo >> $defconfig "CONFIG_$ARCH=y"
+   if [ "$arch" != sandbox ]; then
+   echo >> $defconfig "CONFIG_$TARGET=y"
+   fi
+}
+
+write_main_defconfig()
+{
+   if [ "$tpl_enable" = "y" ]; then
+   echo >> $defconfig 
"CONFIG_SUBIMAGES=\"spl:${target}_spl_defconfig,tpl:${target}_tpl_defconfig\""
+   elif [ "$spl_enable" = "y" ]; then
+   echo >> $defconfig 
"CONFIG_SUBIMAGES=\"spl:${target}_spl_defconfig\""
+   fi
+
+   if [ "$spl_enable" = "y" ]; then
+   echo >> $defconfig "CONFIG_SPL=y"
+   fi
+
+   if [ "$tpl_enable" = "y" ]; then
+   echo >> $defconfig "CONFIG_TPL=y"
+   fi
+
+   write_defconfig
+
+   if [ "$extra_options" ]; then
+   # O2MNT_O2M110, O2MNT_O2M112, O2MNT_O2M113 boards include
+   # double-quotations in the extra option field.
+   # We must escape them.
+   echo >> $defconfig "CONFIG_SYS_EXTRA_OPTIONS=\"$(echo 
"$extra_options" | sed -e 's/"/\\"/g')\""
+   fi
+}
+
+write_spl_defconfig ()
+{
+   echo >> $defconfig "CONFIG_SPL=y"
+
+   if [ "$tpl_enable" = "y" ]; then
+   echo >> $defconfig "CONFIG_TPL=y"
+   fi
+
+   echo >> $defconfig "CONFIG_SPL_BUILD=y"
+
+   write_defconfig
+}
+
+write_tpl_defconfig ()
+{
+   echo >> $defconfig "CONFIG_SPL=y"
+   echo >> $defconfig "CONFIG_TPL=y"
+   echo >> $defconfig "CONFIG_SPL_BUILD=y"
+   echo >> $defconfig "CONFIG_TPL_BUILD=y"
+
+   write_defconfig
+}
+
+write

[U-Boot] [PATCH v3 09/11] kconfig: delete redundant CONFIG_${ARCH} definition

[Masahiro Yamada]

CONFIG_${ARCH} is defined by Kconfig.

Signed-off-by: Masahiro Yamada 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 arch/arc/config.mk   | 2 +-
 arch/arm/config.mk   | 2 +-
 arch/avr32/config.mk | 1 -
 arch/blackfin/config.mk  | 1 -
 arch/m68k/config.mk  | 2 +-
 arch/mips/config.mk  | 2 +-
 arch/nds32/config.mk | 2 +-
 arch/nios2/config.mk | 2 +-
 arch/openrisc/config.mk  | 2 +-
 arch/powerpc/config.mk   | 2 +-
 arch/sandbox/config.mk   | 2 +-
 arch/sparc/config.mk | 2 +-
 arch/x86/cpu/config.mk   | 2 +-
 include/configs/microblaze-generic.h | 1 -
 14 files changed, 11 insertions(+), 14 deletions(-)

diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index a3b8df7..e408800 100644
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -21,7 +21,7 @@ ifeq ($(CROSS_COMPILE),)
 CROSS_COMPILE := $(ARC_CROSS_COMPILE)
 endif
 
-PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -DCONFIG_ARC -gdwarf-2
+PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
 
 # Needed for relocation
 LDFLAGS_FINAL += -pie
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 66ecc2e..31e042a 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -22,7 +22,7 @@ PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
 # Support generic board on ARM
 __HAVE_ARCH_GENERIC_BOARD := y
 
-PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
+PLATFORM_CPPFLAGS += -D__ARM__
 
 # Choose between ARM/Thumb instruction sets
 ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
diff --git a/arch/avr32/config.mk b/arch/avr32/config.mk
index 28a371c..469185e 100644
--- a/arch/avr32/config.mk
+++ b/arch/avr32/config.mk
@@ -9,7 +9,6 @@ ifeq ($(CROSS_COMPILE),)
 CROSS_COMPILE := avr32-linux-
 endif
 
-PLATFORM_CPPFLAGS += -DCONFIG_AVR32
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x
 
 PLATFORM_RELFLAGS  += -ffixed-r5 -fPIC -mno-init-got -mrelax
diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk
index fcaa44f..7b17b75 100644
--- a/arch/blackfin/config.mk
+++ b/arch/blackfin/config.mk
@@ -21,7 +21,6 @@ endif
 CONFIG_BFIN_BOOT_MODE := $(strip $(CONFIG_BFIN_BOOT_MODE:"%"=%))
 
 PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic
-PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN
 
 LDFLAGS_FINAL += --gc-sections
 LDFLAGS += -m elf32bfin
diff --git a/arch/m68k/config.mk b/arch/m68k/config.mk
index 33b3d51..3b3a7e8 100644
--- a/arch/m68k/config.mk
+++ b/arch/m68k/config.mk
@@ -11,7 +11,7 @@ endif
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x2
 
-PLATFORM_CPPFLAGS += -DCONFIG_M68K -D__M68K__
+PLATFORM_CPPFLAGS += -D__M68K__
 PLATFORM_LDFLAGS  += -n
 PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index f4a234a..a2d07af 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -25,7 +25,7 @@ endif
 # Default to EB if no endianess is configured
 ENDIANNESS ?= -EB
 
-PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
+PLATFORM_CPPFLAGS += -D__MIPS__
 
 __HAVE_ARCH_GENERIC_BOARD := y
 
diff --git a/arch/nds32/config.mk b/arch/nds32/config.mk
index 1024852..5ac9f90 100644
--- a/arch/nds32/config.mk
+++ b/arch/nds32/config.mk
@@ -17,6 +17,6 @@ CONFIG_STANDALONE_LOAD_ADDR = 0x30 \
 
 PLATFORM_RELFLAGS  += -fno-strict-aliasing -fno-common -mrelax
 PLATFORM_RELFLAGS  += -gdwarf-2
-PLATFORM_CPPFLAGS  += -DCONFIG_NDS32 -D__nds32__ -G0 -ffixed-10 -fpie
+PLATFORM_CPPFLAGS  += -D__nds32__ -G0 -ffixed-10 -fpie
 
 LDFLAGS_u-boot = --gc-sections --relax
diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk
index 65a5a40..82bd887 100644
--- a/arch/nios2/config.mk
+++ b/arch/nios2/config.mk
@@ -12,7 +12,7 @@ endif
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x0200
 
-PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
+PLATFORM_CPPFLAGS += -D__NIOS2__
 PLATFORM_CPPFLAGS += -G0
 
 LDFLAGS_FINAL += --gc-sections
diff --git a/arch/openrisc/config.mk b/arch/openrisc/config.mk
index 9902b9a..cd95f24 100644
--- a/arch/openrisc/config.mk
+++ b/arch/openrisc/config.mk
@@ -11,6 +11,6 @@ endif
 
 # r10 used for global object pointer, already set in OR32 GCC but just to be
 # clear
-PLATFORM_CPPFLAGS += -DCONFIG_OPENRISC -D__OR1K__ -ffixed-r10
+PLATFORM_CPPFLAGS += -D__OR1K__ -ffixed-r10
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x4
diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk
index fb7096e..6329b6c 100644
--- a/arch/powerpc/config.mk
+++ b/arch/powerpc/config.mk
@@ -13,7 +13,7 @@ CONFIG_STANDALONE_LOAD_ADDR ?= 0x4
 LDFLAGS_FINAL += --gc-sections
 PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections -fdata-sections \
-meabi
-PLATFORM_CPPFLAGS += -DCONFIG_PPC -D__powerpc__ -ffixed-r2
+PLATFORM_CPPFLAGS += -D__powerpc__ -ffixed-r2
 PLATFORM_LDFLAGS  += -n
 
 # Support generic board o

[U-Boot] [PATCH v3 08/11] buildman: adjust for Kconfig

[Masahiro Yamada]

Use "make _defconfig" instead of "make _config".

FIXME!
This fixup is bad because it still depends on boards.cfg
to support options such as -a , -c  etc.
We want to delete it when switching to Kconfig.

We have to invent another method without using boards.cfg.

Signed-off-by: Masahiro Yamada 
---

Changes in v3: None
Changes in v2: None

 tools/buildman/board.py   | 2 +-
 tools/buildman/builder.py | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/buildman/board.py b/tools/buildman/board.py
index 5172a47..7bcc932 100644
--- a/tools/buildman/board.py
+++ b/tools/buildman/board.py
@@ -17,7 +17,7 @@ class Board:
 soc: Name of SOC, or '' if none (e.g. mx31)
 vendor: Name of vendor (e.g. armltd)
 board_name: Name of board (e.g. integrator)
-target: Target name (use make _config to configure)
+target: Target name (use make _defconfig to configure)
 options: board-specific options (e.g. integratorcp:CM1136)
 """
 self.target = target
diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py
index 4a2d753..6ccb5f6 100644
--- a/tools/buildman/builder.py
+++ b/tools/buildman/builder.py
@@ -198,7 +198,7 @@ class BuilderThread(threading.Thread):
 commit_upto: Commit number to build (0...n-1)
 brd: Board object to build
 work_dir: Directory to which the source will be checked out
-do_config: True to run a make _config on the source
+do_config: True to run a make _defconfig on the source
 force_build: Force a build even if one was previously done
 
 Returns:
@@ -251,7 +251,7 @@ class BuilderThread(threading.Thread):
 args = ['O=build', '-s']
 if self.builder.num_jobs is not None:
 args.extend(['-j', str(self.builder.num_jobs)])
-config_args = ['%s_config' % brd.target]
+config_args = ['%s_defconfig' % brd.target]
 config_out = ''
 args.extend(self.builder.toolchains.GetMakeArguments(brd))
 
@@ -404,7 +404,7 @@ class BuilderThread(threading.Thread):
 work_dir = self.builder.GetThreadDir(self.thread_num)
 self.toolchain = None
 if job.commits:
-# Run 'make board_config' on the first commit
+# Run 'make board_defconfig' on the first commit
 do_config = True
 commit_upto  = 0
 force_build = False
-- 
1.9.1

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[U-Boot] [PATCH v3 06/11] kconfig: switch to Kconfig

[Masahiro Yamada]

This commit enables Kconfig.
Going forward, we use Kconfig for board configuration.
mkconfig will never be used. Nor will include/config.mk be generated.

Kconfig must be adjusted for U-Boot because our situation is
a little more complicated than Linux Kernel.
We have to generate multiple binary images (Normal, SPL, TPL)
from one source tree.
Each image needs its own configuration input.

In order to keep this scheme in Kconfig, some files must be modified.
But the modification should be minimum.

The location of Kconfig related files is as follows:

 [1] Normal U-Boot image
   - configs/_defconfig(default configuration)
   - .config  (saved config list)
   - include/config/auto.conf (for use in makefiles)
   - include/generated/autoconf.h (for use in C sources)
   - include/config/* (for if_changed_dep)

 [2] SPL
   - configs/_spl_defconfig(default configuration)
   - spl/.config  (saved config list)
   - spl/include/config/auto.conf (for use in makefiles)
   - spl/include/generated/autoconf.h (for use in C sources)
   - spl/include/config/* (for if_changed_dep)

 [3] TPL
   - configs/_tpl_defconfig(default configuration)
   - tpl/.config  (saved config list)
   - tpl/include/config/auto.conf (for use in makefiles)
   - tpl/include/generated/autoconf.h (for use in C sources)
   - tpl/include/config/* (for if_changed_dep)

Usage:

Execute "make _defconfig" to configure board and then run "make".
Or "make _defconfig all" to configure and build in one time.

You can use "make config", "make menuconfig" etc. to create
a new .config or modify the existing one.

In Kconfig for U-boot, the configuration is done on three levels at most.

By the way, there is another item worth remarking here:
coexistence of Kconfig and board herder files.

Prior to Kconfig, we used C headers to define a set of configs.

We expect a very long term to migrate from C headers to Kconfig.
Two different infractructure must coexist in the interim.

In our former configuration scheme, include/autoconf.mk was generated
for use in makefiles.
It is still generated under include/, spl/include/, tpl/include/ directory
for the Normal, SPL, TPL image, respectively.

Signed-off-by: Masahiro Yamada 
---

Changes in v3:
  - Invoke SPL/TPL configuration only for defconfig and silentoldconfig

Changes in v2:
  - Put dirty build rule into scripts/multiple_config.sh and
scripts/Makefile.autoconf
  - Fix dependency tracking.
In v1, any change to Kconfig triggered re-complile of all objects.
In this version, re-compile is kept at a minimum.
  - Fix a clean-source check
In v1, clean source tree check did not work correctly for
out-of-tree build.

 .gitignore|   2 -
 Makefile  | 113 ++
 arch/m68k/cpu/mcf52x2/config.mk   |  16 +++---
 arch/m68k/cpu/mcf532x/config.mk   |   6 +-
 arch/m68k/cpu/mcf5445x/config.mk  |   4 +-
 arch/powerpc/cpu/ppc4xx/config.mk |   4 +-
 config.mk |  10 
 include/.gitignore|   1 -
 scripts/Makefile  |   2 +-
 scripts/Makefile.autoconf |  96 
 scripts/Makefile.build|  31 ---
 scripts/Makefile.spl  |  31 +--
 scripts/basic/fixdep.c|   6 +-
 scripts/kconfig/Makefile  |   8 ++-
 scripts/kconfig/confdata.c|   8 +++
 scripts/multiconfig.sh| 102 ++
 tools/Makefile|   2 +-
 tools/env/Makefile|   2 +-
 18 files changed, 311 insertions(+), 133 deletions(-)
 create mode 100644 scripts/Makefile.autoconf
 create mode 100644 scripts/multiconfig.sh

diff --git a/.gitignore b/.gitignore
index 2ddf57f..3b32485 100644
--- a/.gitignore
+++ b/.gitignore
@@ -57,8 +57,6 @@
 #
 /include/config/
 /include/generated/
-/include/spl-autoconf.mk
-/include/tpl-autoconf.mk
 
 # stgit generated dirs
 patches-*
diff --git a/Makefile b/Makefile
index e429212..7a953aa 100644
--- a/Makefile
+++ b/Makefile
@@ -166,9 +166,6 @@ VPATH   := $(srctree)$(if 
$(KBUILD_EXTMOD),:$(KBUILD_EXTMOD))
 
 export srctree objtree VPATH
 
-MKCONFIG   := $(srctree)/mkconfig
-export MKCONFIG
-
 # Make sure CDPATH settings don't interfere
 unexport CDPATH
 
@@ -189,9 +186,6 @@ HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
 
 export HOSTARCH HOSTOS
 
-# Deal with colliding definitions from tcsh etc.
-VENDOR=
-
 #
 
 # set default to nothing for native builds
@@ -199,6 +193,9 @@ ifeq ($(HOSTARCH),$(ARCH))
 CROSS_COMPILE ?=
 endif
 
+KCONFIG_CONFIG ?= .config
+export KCONFIG_CONFIG
+
 # SHELL used by kbuild
 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
  else if [ -x /bin/bash ];

[U-Boot] [PATCH v3 11/11] kconfig: remove old script

[Masahiro Yamada]

mkconfig is no longer used in Kconfig.

Signed-off-by: Masahiro Yamada 
---

Changes in v3: None
Changes in v2: None

 mkconfig | 187 ---
 1 file changed, 187 deletions(-)
 delete mode 100755 mkconfig

diff --git a/mkconfig b/mkconfig
deleted file mode 100755
index 2bf5897..000
--- a/mkconfig
+++ /dev/null
@@ -1,187 +0,0 @@
-#!/bin/sh -e
-
-# Script to create header files and links to configure
-# U-Boot for a specific board.
-#
-# Parameters:  Target  Architecture  CPU  Board [VENDOR] [SOC]
-#
-# (C) 2002-2013 DENX Software Engineering, Wolfgang Denk 
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-APPEND=no  # Default: Create new config file
-BOARD_NAME=""  # Name to print in make output
-TARGETS=""
-
-arch=""
-cpu=""
-board=""
-vendor=""
-soc=""
-options=""
-
-if [ \( $# -eq 2 \) -a \( "$1" = "-A" \) ] ; then
-   # Automatic mode
-   line=`awk '($0 !~ /^#/ && $7 ~ /^'"$2"'$/) { print $1, $2, $3, $4, $5, 
$6, $7, $8 }' $srctree/boards.cfg`
-   if [ -z "$line" ] ; then
-   echo "make: *** No rule to make target \`$2_config'.  Stop." >&2
-   exit 1
-   fi
-
-   set ${line}
-   # add default board name if needed
-   [ $# = 3 ] && set ${line} ${1}
-fi
-
-while [ $# -gt 0 ] ; do
-   case "$1" in
-   --) shift ; break ;;
-   -a) shift ; APPEND=yes ;;
-   -n) shift ; BOARD_NAME="${7%_config}" ; shift ;;
-   -t) shift ; TARGETS="`echo $1 | sed 's:_: :g'` ${TARGETS}" ; shift ;;
-   *)  break ;;
-   esac
-done
-
-[ $# -lt 7 ] && exit 1
-[ $# -gt 8 ] && exit 1
-
-# Strip all options and/or _config suffixes
-CONFIG_NAME="${7%_config}"
-
-[ "${BOARD_NAME}" ] || BOARD_NAME="${7%_config}"
-
-arch="$2"
-cpu=`echo $3 | awk 'BEGIN {FS = ":"} ; {print $1}'`
-spl_cpu=`echo $3 | awk 'BEGIN {FS = ":"} ; {print $2}'`
-if [ "$6" = "" ] ; then
-   board=
-elif [ "$6" = "-" ] ; then
-   board=${BOARD_NAME}
-else
-   board="$6"
-fi
-[ "$5" != "-" ] && vendor="$5"
-[ "$4" != "-" ] && soc="$4"
-[ $# -gt 7 ] && [ "$8" != "-" ] && {
-   # check if we have a board config name in the options field
-   # the options field mave have a board config name and a list
-   # of options, both separated by a colon (':'); the options are
-   # separated by commas (',').
-   #
-   # Check for board name
-   tmp="${8%:*}"
-   if [ "$tmp" ] ; then
-   CONFIG_NAME="$tmp"
-   fi
-   # Check if we only have a colon...
-   if [ "${tmp}" != "$8" ] ; then
-   options=${8#*:}
-   TARGETS="`echo ${options} | sed 's:,: :g'` ${TARGETS}"
-   fi
-}
-
-if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then
-   echo "Failed: \$ARCH=${ARCH}, should be '${arch}' for ${BOARD_NAME}" 
1>&2
-   exit 1
-fi
-
-#
-# Test above needed aarch64, now we need arm
-#
-if [ "${arch}" = "aarch64" ]; then
-   arch="arm"
-fi
-
-if [ "$options" ] ; then
-   echo "Configuring for ${BOARD_NAME} - Board: ${CONFIG_NAME}, Options: 
${options}"
-else
-   echo "Configuring for ${BOARD_NAME} board..."
-fi
-
-#
-# Create link to architecture specific headers
-#
-if [ -n "$KBUILD_SRC" ] ; then
-   mkdir -p ${objtree}/include
-   LNPREFIX=${srctree}/arch/${arch}/include/asm/
-   cd ${objtree}/include
-   mkdir -p asm
-else
-   cd arch/${arch}/include
-fi
-
-rm -f asm/arch
-
-if [ -z "${soc}" ] ; then
-   ln -s ${LNPREFIX}arch-${cpu} asm/arch
-else
-   ln -s ${LNPREFIX}arch-${soc} asm/arch
-fi
-
-if [ -z "$KBUILD_SRC" ] ; then
-   cd ${srctree}/include
-fi
-
-#
-# Create include file for Make
-#
-( echo "ARCH   = ${arch}"
-if [ ! -z "$spl_cpu" ] ; then
-   echo 'ifeq ($(CONFIG_SPL_BUILD),y)'
-   echo "CPU= ${spl_cpu}"
-   echo "else"
-   echo "CPU= ${cpu}"
-   echo "endif"
-else
-   echo "CPU= ${cpu}"
-fi
-echo "BOARD  = ${board}"
-
-[ "${vendor}" ] && echo "VENDOR = ${vendor}"
-[ "${soc}"] && echo "SOC= ${soc}"
-exit 0 ) > config.mk
-
-# Assign board directory to BOARDIR variable
-if [ -z "${vendor}" ] ; then
-BOARDDIR=${board}
-else
-BOARDDIR=${vendor}/${board}
-fi
-
-#
-# Create board specific header file
-#
-if [ "$APPEND" = "yes" ]   # Append to existing config file
-then
-   echo >> config.h
-else
-   > config.h  # Create new config file
-fi
-echo "/* Automatically generated - do not edit */" >>config.h
-
-for i in ${TARGETS} ; do
-   i="`echo ${i} | sed '/=/ {s/=/  /;q; } ; { s/$/ 1/; }'`"
-   echo "#define CONFIG_${i}" >>config.h ;
-done
-
-echo "#define CONFIG_SYS_ARCH  \"${arch}\""  >> config.h
-echo "#define CONFIG_SYS_CPU   \"${cpu}\""   >> config.h
-echo "#define CONFIG_SYS_BOARD \"${board}\"" >> config.h
-
-[ "${vendor}" ] && echo "#define CONFIG_SYS_VENDOR \"${vendor}\"" >> config.h
-
-[ "${soc}"] && echo "#define CONFIG_SYS_SOC\"${soc}\"">> config.h
-
-[ "${board}"  ] && 

[U-Boot] [PATCH v3 05/11] include: define CONFIG_SPL and CONFIG_TPL as 1

[Masahiro Yamada]

We are about to switch to Kconfig in the next commit.
But there are something to get done beforehand.

In Kconfig, include/generated/autoconf.h defines boolean
CONFIG macros as 1.

CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1.
Otherwise, when switching to Kconfig, the build log
would be sprinkled with warning messages like this:
  warning: "CONFIG_SPL" redefined [enabled by default]

Signed-off-by: Masahiro Yamada 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2:
  - Rebase on the current u-boot/master

 doc/README.SPL | 2 +-
 include/configs/B4860QDS.h | 2 +-
 include/configs/BSC9131RDB.h   | 2 +-
 include/configs/BSC9132QDS.h   | 2 +-
 include/configs/C29XPCIE.h | 4 ++--
 include/configs/MPC8313ERDB.h  | 2 +-
 include/configs/P1010RDB.h | 8 
 include/configs/P1022DS.h  | 8 
 include/configs/P1_P2_RDB.h| 8 
 include/configs/T104xRDB.h | 2 +-
 include/configs/T208xQDS.h | 2 +-
 include/configs/T208xRDB.h | 2 +-
 include/configs/T4240QDS.h | 2 +-
 include/configs/a3m071.h   | 2 +-
 include/configs/am335x_igep0033.h  | 2 +-
 include/configs/am3517_crane.h | 2 +-
 include/configs/am3517_evm.h   | 2 +-
 include/configs/apf27.h| 2 +-
 include/configs/arndale.h  | 2 +-
 include/configs/bur_am335x_common.h| 2 +-
 include/configs/cam_enc_4xx.h  | 2 +-
 include/configs/cm_t35.h   | 2 +-
 include/configs/da850evm.h | 2 +-
 include/configs/devkit8000.h   | 2 +-
 include/configs/exynos5-dt.h   | 2 +-
 include/configs/hawkboard.h| 2 +-
 include/configs/ipam390.h  | 2 +-
 include/configs/lwmon5.h   | 2 +-
 include/configs/m53evk.h   | 2 +-
 include/configs/mcx.h  | 2 +-
 include/configs/microblaze-generic.h   | 2 +-
 include/configs/mx31pdk.h  | 2 +-
 include/configs/mxs.h  | 2 +-
 include/configs/omap3_evm_common.h | 2 +-
 include/configs/origen.h   | 2 +-
 include/configs/p1_p2_rdb_pc.h | 8 
 include/configs/palmtreo680.h  | 2 +-
 include/configs/pcm051.h   | 2 +-
 include/configs/sama5d3_xplained.h | 2 +-
 include/configs/sama5d3xek.h   | 2 +-
 include/configs/siemens-am33x-common.h | 2 +-
 include/configs/smdkv310.h | 2 +-
 include/configs/socfpga_cyclone5.h | 2 +-
 include/configs/sunxi-common.h | 2 +-
 include/configs/tam3517-common.h   | 2 +-
 include/configs/tao3530.h  | 2 +-
 include/configs/tegra-common.h | 2 +-
 include/configs/ti814x_evm.h   | 2 +-
 include/configs/ti816x_evm.h   | 2 +-
 include/configs/ti_armv7_common.h  | 2 +-
 include/configs/tricorder.h| 2 +-
 include/configs/tx25.h | 2 +-
 include/configs/vpac270.h  | 2 +-
 include/configs/woodburn_sd.h  | 2 +-
 include/configs/x600.h | 2 +-
 include/configs/zynq-common.h  | 2 +-
 56 files changed, 69 insertions(+), 69 deletions(-)

diff --git a/doc/README.SPL b/doc/README.SPL
index 57a39a4..2b4b0b8 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -40,7 +40,7 @@ COBJS-$(CONFIG_SPL_BUILD) += foo.o
 
 The building of SPL images can be with:
 
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 
 Because SPL images normally have a different text base, one has to be
 configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 1af9ba6..cb35116 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -23,7 +23,7 @@
 #define CONFIG_RAMBOOT_TEXT_BASE   CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS0xfffc
 #else
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 5a316c8..e6b46e4 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -25,7 +25,7 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 7bb5d33..fc45e45 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -41,7 +41,7 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 9e12fac..f382b48 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE

[U-Boot] [PATCH v3 04/11] kconfig: add basic Kconfig files

[Masahiro Yamada]

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada 
---

Changes in v3:
  - Add CONFIG_SUBIMAGES for generic sub-image framework.
  - Move CONFIG_SYS_EXTRA_OPTIONS to the top Kconfig.
  - Add more help messages to each config.

Changes in v2:
  - Do not include "board/Kconfig"
  - Drop CONFIG_BUILD_MODE

 Kconfig  | 74 
 arch/Kconfig | 66 +
 2 files changed, 140 insertions(+)
 create mode 100644 Kconfig
 create mode 100644 arch/Kconfig

diff --git a/Kconfig b/Kconfig
new file mode 100644
index 000..e6751d8
--- /dev/null
+++ b/Kconfig
@@ -0,0 +1,74 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+mainmenu "U-Boot $UBOOTVERSION Configuration"
+
+config UBOOTVERSION
+   string
+   option env="UBOOTVERSION"
+
+menu "General setup"
+
+config SUBIMAGES
+   string "Subimages"
+   help
+ This option allows you to specify the additional images.
+ The main purpose is to enable what we called SPL/TPL.
+ But we can specify them more genericlly in the form of
+ "img1_output_dir:img1_defconfig,img2_output_dir:img2_defconfig".
+
+config SPL
+   bool "Enable SPL"
+   help
+ If you want to build SPL as well as the normal image, say Y.
+ This option is available for a while for the backward compatibility.
+ We should use CONFIG_SUBIMAGES to specify the additional images.
+ After switching to the generic sub-images framework, this option
+ should be removed.
+
+config TPL
+   bool "Enable TPL"
+   depends on SPL
+   help
+ If you want to build TPL as well as the normal image and SPL, say Y.
+ This option is available for a while for the backward compatibility.
+ We should use CONFIG_SUBIMAGES to specify the additional images.
+ After switching to the generic sub-images framework, this option
+ should be removed.
+
+config SPL_BUILD
+   bool "SPL Build"
+   select SPL
+   help
+ This option selects the build mode.
+ If you want to build this image as SPL, say Y.
+ This option should be removed in future because
+ we do not want to treat SPL/TPL as special cases.
+
+config TPL_BUILD
+   bool "TPL Build"
+   depends on SPL_BUILD
+   select TPL
+   help
+ This option selects the build mode.
+ If you want to build this image as TPL, say Y.
+ This option should be removed in future because
+ we do not want to treat SPL/TPL as special cases.
+
+config SYS_EXTRA_OPTIONS
+   string "Extra Options"
+   help
+ The old configuration infrastructure (= mkconfig + boards.cfg)
+ provided the extra options field. It you have something like
+ "HAS_BAR,BAZ=64", the optional options
+   #define CONFIG_HAS
+   #define CONFIG_BAZ  64
+ will be defined in include/config.h.
+ This option was prepared for the smooth migration from the old
+ configuration to Kconfig. Since this option will be removed sometime,
+ new boards should not use this option.
+
+endmenu# General setup
+
+source "arch/Kconfig"
diff --git a/arch/Kconfig b/arch/Kconfig
new file mode 100644
index 000..8620a4f
--- /dev/null
+++ b/arch/Kconfig
@@ -0,0 +1,66 @@
+choice
+   prompt "Architecture select"
+   default SANDBOX
+
+config ARC
+   bool "ARC architecture"
+
+config ARM
+   bool "ARM architecture"
+
+config AVR32
+   bool "AVR32 architecture"
+
+config BLACKFIN
+   bool "Blackfin architecture"
+
+config M68K
+   bool "M68000 architecture"
+
+config MICROBLAZE
+   bool "MicroBlaze architecture"
+
+config MIPS
+   bool "MIPS architecture"
+
+config NDS32
+   bool "NDS32 architecture"
+
+config NIOS2
+   bool "Nios II architecture"
+
+config OPENRISC
+   bool "OpenRISC architecture"
+
+config PPC
+   bool "PowerPC architecture"
+
+config SANDBOX
+   bool "Sandbox"
+
+config SH
+   bool "SuperH architecture"
+
+config SPARC
+   bool "SPARC architecture"
+
+config X86
+   bool "x86 architecture"
+
+endchoice
+
+source "arch/arc/Kconfig"
+source "arch/arm/Kconfig"
+source "arch/avr32/Kconfig"
+source "arch/blackfin/Kconfig"
+source "arch/m68k/Kconfig"
+source "arch/microblaze/Kconfig"
+source "arch/mips/Kconfig"
+source "arch/nds32/Kconfig"
+source "arch/nios2/Kconfig"
+source "arch/openrisc/Kconfig"
+source "arch/powerpc/Kconfig"
+source "arch/sandbox/Kconfig"
+source "arch/sh/Kconfig"
+source "arch/sparc/Kconfig"
+source "arch/x86/Kconfig"
-- 
1.9.1

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[U-Boot] [PATCH v3 07/11] MAKEALL: adjust for Kconfig

[Masahiro Yamada]

Use "make _defconfig" instead of "make _config".

FIXME!
This fixup is bad because it still depends on boards.cfg
to support options such as -a , -c  etc.
We want to delete it when switching to Kconfig.

We have to invent another method without using boards.cfg.

Signed-off-by: Masahiro Yamada 
---

Changes in v3: None
Changes in v2: None

 MAKEALL | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/MAKEALL b/MAKEALL
index 020e65f..45b28f4 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -506,9 +506,9 @@ get_target_location() {
 
set ${line}
 
-   CONFIG_NAME="${7%_config}"
+   CONFIG_NAME="${7%_defconfig}"
 
-   [ "${BOARD_NAME}" ] || BOARD_NAME="${7%_config}"
+   [ "${BOARD_NAME}" ] || BOARD_NAME="${7%_defconfig}"
 
if [ $# -gt 5 ]; then
if [ "$6" = "-" ] ; then
@@ -645,7 +645,7 @@ build_target() {
fi
 
${MAKE} distclean >/dev/null
-   ${MAKE} -s ${target}_config
+   ${MAKE} -s ${target}_defconfig
 
${MAKE} ${JOBS} ${CHECK} all \
>${LOG_DIR}/$target.MAKELOG 2> ${LOG_DIR}/$target.ERR
-- 
1.9.1

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Re: [U-Boot] [U-Boot, v2] boards.cfg: move many unmaintained boards to Orphan

[Masahiro Yamada]

Hi Sinan,


> >> [...]
> >>  +Orphan  powerpc mpc83xx-   freescale 
> mpc837xerdb MPC837XERDB
> 
>I have this board and I would very much like that it'll continue to
> be maintained. I just tested the ToT and it seems other than some minor
> warnings and request to use generic-board it is not in a bad shape.
> 
>I can continue testing at each release and after there are related
> patches. Would that help to have this board to be unorphaned ?

Thanks for offering to test this board.
Are you willing to be a maintainer of this board?

Tom,
what shall we do in this case?
We can no longer contact the maintainer,
Joe D'Abbraccio 
But the board is still used by some users.


Best Regards
Masahiro Yamada
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Re: [U-Boot] [PATCH] sh: unify sh2/sh3/sh4 linker scripts

[Nobuhiro Iwamatsu]

Hi,

Thanks for your patch.
I applied to next branch of u-boot-sh.

Best regards,
  Nobuhiro

2014-06-20 16:40 GMT+09:00 Masahiro Yamada :
> The linker scripts of sh2/sh3/sh4 are almost the same.
> The difference among them is essentially only one line.
>
> They can be consolidated into a single file, arch/sh/cpu/u-boot.lds
> by re-writing the diffrent line as follows:
>
> KEEP(*/start.o  (.text))
>
> Signed-off-by: Masahiro Yamada 
> Cc: Nobuhiro Iwamatsu 
> ---
>
> I built all SuperH boards and comprared MD5SUM.
> I confirmed the same output binaries are produced with/without
> this patch.
>
>
>  arch/sh/cpu/sh2/u-boot.lds   | 76 --
>  arch/sh/cpu/sh4/u-boot.lds   | 80 
> 
>  arch/sh/cpu/{sh3 => }/u-boot.lds |  8 ++--
>  3 files changed, 4 insertions(+), 160 deletions(-)
>  delete mode 100644 arch/sh/cpu/sh2/u-boot.lds
>  delete mode 100644 arch/sh/cpu/sh4/u-boot.lds
>  rename arch/sh/cpu/{sh3 => }/u-boot.lds (95%)
>
> diff --git a/arch/sh/cpu/sh2/u-boot.lds b/arch/sh/cpu/sh2/u-boot.lds
> deleted file mode 100644
> index 254d9f2..000
> --- a/arch/sh/cpu/sh2/u-boot.lds
> +++ /dev/null
> @@ -1,76 +0,0 @@
> -/*
> - * Copyright (C) 2008 Nobuhiro Iwamatsu
> - * Copyright (C) 2008 Renesas Solutions Corp.
> - *
> - * SPDX-License-Identifier:GPL-2.0+
> - */
> -
> -OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
> -OUTPUT_ARCH(sh)
> -ENTRY(_start)
> -
> -SECTIONS
> -{
> -   /*
> -* entry and reloct_dst will be provided via ldflags
> -*/
> -   . = .;
> -
> -   PROVIDE (_ftext = .);
> -   PROVIDE (_fcode = .);
> -   PROVIDE (_start = .);
> -
> -   .text :
> -   {
> -   KEEP(arch/sh/cpu/sh2/start.o(.text))
> -   . = ALIGN(8192);
> -   common/env_embedded.o   (.ppcenv)
> -   . = ALIGN(8192);
> -   common/env_embedded.o   (.ppcenvr)
> -   . = ALIGN(8192);
> -   *(.text)
> -   . = ALIGN(4);
> -   } =0xFF
> -   PROVIDE (_ecode = .);
> -   .rodata :
> -   {
> -   *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
> -   . = ALIGN(4);
> -   }
> -   PROVIDE (_etext = .);
> -
> -
> -   PROVIDE (_fdata = .);
> -   .data :
> -   {
> -   *(.data)
> -   . = ALIGN(4);
> -   }
> -   PROVIDE (_edata = .);
> -
> -   PROVIDE (_fgot = .);
> -   .got :
> -   {
> -   *(.got)
> -   . = ALIGN(4);
> -   }
> -   PROVIDE (_egot = .);
> -
> -
> -   .u_boot_list : {
> -   KEEP(*(SORT(.u_boot_list*)));
> -   }
> -
> -   PROVIDE (reloc_dst_end = .);
> -
> -   PROVIDE (bss_start = .);
> -   PROVIDE (__bss_start = .);
> -   .bss :
> -   {
> -   *(.bss)
> -   . = ALIGN(4);
> -   }
> -   PROVIDE (bss_end = .);
> -
> -   PROVIDE (__bss_end = .);
> -}
> diff --git a/arch/sh/cpu/sh4/u-boot.lds b/arch/sh/cpu/sh4/u-boot.lds
> deleted file mode 100644
> index 57544ce..000
> --- a/arch/sh/cpu/sh4/u-boot.lds
> +++ /dev/null
> @@ -1,80 +0,0 @@
> -/*
> - * Copyright (C) 2007
> - * Nobuhiro Iwamatsu 
> - *
> - * Copyright (C) 2008-2009
> - * Yoshihiro Shimoda 
> - *
> - * SPDX-License-Identifier:GPL-2.0+
> - */
> -
> -OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
> -OUTPUT_ARCH(sh)
> -ENTRY(_start)
> -
> -SECTIONS
> -{
> -   /*
> -* entry and reloct_dst will be provided via ldflags
> -*/
> -   . = .;
> -
> -   PROVIDE (_ftext = .);
> -   PROVIDE (_fcode = .);
> -   PROVIDE (_start = .);
> -
> -   .text :
> -   {
> -   KEEP(arch/sh/cpu/sh4/start.o(.text))
> -   . = ALIGN(8192);
> -   common/env_embedded.o   (.ppcenv)
> -   . = ALIGN(8192);
> -   common/env_embedded.o   (.ppcenvr)
> -   . = ALIGN(8192);
> -   *(.text)
> -   . = ALIGN(4);
> -   } =0xFF
> -   PROVIDE (_ecode = .);
> -   .rodata :
> -   {
> -   *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
> -   . = ALIGN(4);
> -   }
> -   PROVIDE (_etext = .);
> -
> -
> -   PROVIDE (_fdata = .);
> -   .data :
> -   {
> -   *(.data)
> -   . = ALIGN(4);
> -   }
> -   PROVIDE (_edata = .);
> -
> -   PROVIDE (_fgot = .);
> -   .got :
> -   {
> -   *(.got)
> -   . = ALIGN(4);
> -   }
> -   PROVIDE (_egot = .);
> -
> -
> -   .u_boot_list : {
> -   KEEP(*(SORT(.u_boot_list*)));
> -   }
> -
> -   PROVIDE (reloc_dst_end = .);
> -   /* _reloc_dst_end = .; */
> -
> -   PROVIDE (bss_start = .);
> -   PROVIDE (__bss_start = .);
> -   .bss (NOLOAD) :
> -   {
> -   *(.bss)
> -   . = ALIGN(4

[U-Boot] [Patch v2 1/1] driver/ddr: Fix DDR4 driver for ARM

[York Sun]

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun 
---
Change log
 v2: use mb() and isb() instead of #ifdef

 arch/arm/include/asm/arch-fsl-lsch3/config.h |4 
 arch/arm/include/asm/io.h|1 +
 arch/powerpc/include/asm/io.h|3 +++
 drivers/ddr/fsl/fsl_ddr_gen4.c   |7 +--
 4 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h 
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index c1c718e..b17410a 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -43,7 +43,11 @@
 /* DDR */
 #define CONFIG_SYS_FSL_DDR_LE
 #define CONFIG_VERY_BIG_RAM
+#ifdef CONFIG_SYS_FSL_DDR4
+#define CONFIG_SYS_FSL_DDRC_GEN4
+#else
 #define CONFIG_SYS_FSL_DDRC_ARM_GEN3   /* Enable Freescale ARM DDR3 driver */
+#endif
 #define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */
 #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED  CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 95528dd..e5adaf7 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -136,6 +136,7 @@ extern inline void __raw_readsl(unsigned long addr, void 
*data, int longlen)
  * TODO: The kernel offers some more advanced versions of barriers, it might
  * have some advantages to use them instead of the simple one here.
  */
+#define mb()   asm volatile("dsb sy" : : : "memory")
 #define dmb()  __asm__ __volatile__ ("" : : : "memory")
 #define __iormb()  dmb()
 #define __iowmb()  dmb()
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index d8b7b97..a5257e9 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -123,6 +123,9 @@ static inline void isync(void)
 #define iobarrier_r()  eieio()
 #define iobarrier_w()  eieio()
 
+#define mb()   sync()
+#define isb()  isync()
+
 /*
  * Non ordered and non-swapping "raw" accessors
  */
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 7cd878a..bfc76b3 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
@@ -183,12 +184,14 @@ step2:
 * we choose the max, that is 500 us for all of case.
 */
udelay(500);
-   asm volatile("sync;isync");
+   mb();
+   isb();
 
/* Let the controller go */
temp_sdram_cfg = ddr_in32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI;
ddr_out32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
-   asm volatile("sync;isync");
+   mb();
+   isb();
 
total_gb_size_per_controller = 0;
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
-- 
1.7.9.5

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[U-Boot] [PATCH v2 2/2] usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

[Felipe Balbi]

Newer AM437x silicon requires us to explicitly power up
the USB2 PHY. By implementing usb_phy_power() we can
achieve that.

Signed-off-by: Felipe Balbi 
---

Changes since v1:
- add macros for USB1_CTRL register and bits

 arch/arm/include/asm/arch-am33xx/hardware_am43xx.h |  5 +
 drivers/usb/phy/omap_usb_phy.c | 17 -
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h 
b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
index 15399dc..b5875e3 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
@@ -40,6 +40,11 @@
 #define VTP0_CTRL_ADDR 0x44E10E0C
 #define VTP1_CTRL_ADDR 0x48140E10
 
+/* USB CTRL Base Address */
+#define USB1_CTRL  0x44e10628
+#define USB1_CTRL_CM_PWRDN BIT(0)
+#define USB1_CTRL_OTG_PWRDNBIT(1)
+
 /* DDR Base address */
 #define DDR_PHY_CMD_ADDR   0x44E12000
 #define DDR_PHY_DATA_ADDR  0x44E120C8
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index af46db2..f78d532 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
 
 void usb_phy_power(int on)
 {
-   return;
+   u32 val;
+
+   /* USB1_CTRL */
+   val = readl(USB1_CTRL);
+   if (on) {
+   /*
+* these bits are re-used on AM437x to power up/down the USB
+* CM and OTG PHYs, if we don't toggle them, USB will not be
+* functional on newer silicon revisions
+*/
+   val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);
+   } else {
+   val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;
+   }
+
+   writel(val, USB1_CTRL);
 }
 #endif /* CONFIG_AM437X_USB2PHY2_HOST */
 
-- 
2.0.0.390.gcb682f8

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[U-Boot] [Patch v9 1/5] Added 64-bit MMIO accessors for ARMv8

[York Sun]

From: "J. German Rivera" 

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera 
---
Change log
 v9: no change
 v8: no change
 v7: no change
 v6: no change
 v5: no change
 v4: no change
 v3: no change

 arch/arm/include/asm/io.h |8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 6a1f05a..95528dd 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -70,10 +70,12 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
 #define __arch_getb(a) (*(volatile unsigned char *)(a))
 #define __arch_getw(a) (*(volatile unsigned short *)(a))
 #define __arch_getl(a) (*(volatile unsigned int *)(a))
+#define __arch_getq(a) (*(volatile unsigned long long *)(a))
 
 #define __arch_putb(v,a)   (*(volatile unsigned char *)(a) = (v))
 #define __arch_putw(v,a)   (*(volatile unsigned short *)(a) = (v))
 #define __arch_putl(v,a)   (*(volatile unsigned int *)(a) = (v))
+#define __arch_putq(v,a)   (*(volatile unsigned long long *)(a) = 
(v))
 
 extern inline void __raw_writesb(unsigned long addr, const void *data,
 int bytelen)
@@ -123,10 +125,12 @@ extern inline void __raw_readsl(unsigned long addr, void 
*data, int longlen)
 #define __raw_writeb(v,a)  __arch_putb(v,a)
 #define __raw_writew(v,a)  __arch_putw(v,a)
 #define __raw_writel(v,a)  __arch_putl(v,a)
+#define __raw_writeq(v,a)  __arch_putq(v,a)
 
 #define __raw_readb(a) __arch_getb(a)
 #define __raw_readw(a) __arch_getw(a)
 #define __raw_readl(a) __arch_getl(a)
+#define __raw_readq(a) __arch_getq(a)
 
 /*
  * TODO: The kernel offers some more advanced versions of barriers, it might
@@ -139,10 +143,12 @@ extern inline void __raw_readsl(unsigned long addr, void 
*data, int longlen)
 #define writeb(v,c)({ u8  __v = v; __iowmb(); __arch_putb(__v,c); __v; })
 #define writew(v,c)({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
 #define writel(v,c)({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
+#define writeq(v,c)({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
 
 #define readb(c)   ({ u8  __v = __arch_getb(c); __iormb(); __v; })
 #define readw(c)   ({ u16 __v = __arch_getw(c); __iormb(); __v; })
 #define readl(c)   ({ u32 __v = __arch_getl(c); __iormb(); __v; })
+#define readq(c)   ({ u64 __v = __arch_getq(c); __iormb(); __v; })
 
 /*
  * The compiler seems to be incapable of optimising constants
@@ -168,9 +174,11 @@ extern inline void __raw_readsl(unsigned long addr, void 
*data, int longlen)
 #define out_arch(type,endian,a,v)  __raw_write##type(cpu_to_##endian(v),a)
 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a))
 
+#define out_le64(a,v)  out_arch(q,le64,a,v)
 #define out_le32(a,v)  out_arch(l,le32,a,v)
 #define out_le16(a,v)  out_arch(w,le16,a,v)
 
+#define in_le64(a) in_arch(q,le64,a)
 #define in_le32(a) in_arch(l,le32,a)
 #define in_le16(a) in_arch(w,le16,a)
 
-- 
1.7.9.5

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[U-Boot] [Patch v9 4/5] armv8/fsl-lsch3: Add support to load and start MC Firmware

[York Sun]

From: "J. German Rivera" 

Adding support to load and start the Layerscape Management Complex (MC)
firmware. First, the MC GCR register is set to 0 to reset all cores. MC
firmware and DPL images are copied from their location in NOR flash to
DDR. MC registers are updated with the location of these images.
Deasserting the reset bit of MC GCR register releases core 0 to run.
Core 1 will be released by MC firmware. Stop bits are not touched for
this step. U-boot waits for MC until it boots up. In case of a failure,
device tree is updated accordingly. The MC firmware image uses FIT format.

Signed-off-by: J. German Rivera 
Signed-off-by: York Sun 
Signed-off-by: Lijun Pan 
Signed-off-by: Shruti Kanetkar 
---
 v9: drop checking for "uname == NULL" in mc.c
 v8: no change
 v7: no change
 v6: no change
 v5: Fix a typo in commit message "supoort"
 Fix variable declaration cause by squashing patches
 v4: no change
 v3: Add error detection and update device tree if failure
 Revise loading address to avoid overlap
 Use FIT image for the firmware
 Remove blank lines at the end of files

 README |   27 
 arch/arm/cpu/armv8/fsl-lsch3/cpu.c |   11 ++
 drivers/net/Makefile   |1 +
 drivers/net/fsl_mc/Makefile|8 ++
 drivers/net/fsl_mc/mc.c|  266 
 include/fdt_support.h  |   14 +-
 include/fsl_mc.h   |   59 
 7 files changed, 383 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/fsl_mc/Makefile
 create mode 100644 drivers/net/fsl_mc/mc.c
 create mode 100644 include/fsl_mc.h

diff --git a/README b/README
index 7129df8..9470c30 100644
--- a/README
+++ b/README
@@ -4653,6 +4653,33 @@ within that device.
window->master inbound window->master LAW->the ucode address in
master's memory space.
 
+Freescale Layerscape Management Complex Firmware Support:
+-
+The Freescale Layerscape Management Complex (MC) supports the loading of
+"firmware".
+This firmware often needs to be loaded during U-Boot booting, so macros
+are used to identify the storage device (NOR flash, SPI, etc) and the address
+within that device.
+
+- CONFIG_FSL_MC_ENET
+   Enable the MC driver for Layerscape SoCs.
+
+- CONFIG_SYS_LS_MC_FW_ADDR
+   The address in the storage device where the firmware is located.  The
+   meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx 
macro
+   is also specified.
+
+- CONFIG_SYS_LS_MC_FW_LENGTH
+   The maximum possible size of the firmware.  The firmware binary format
+   has a field that specifies the actual size of the firmware, but it
+   might not be possible to read any part of the firmware unless some
+   local storage is allocated to hold the entire firmware first.
+
+- CONFIG_SYS_LS_MC_FW_IN_NOR
+   Specifies that MC firmware is located in NOR flash, mapped as
+   normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the
+   virtual address in NOR flash.
+
 Building the Software:
 ==
 
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c 
b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
index 46965f0..c129d03 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
@@ -12,6 +12,7 @@
 #include 
 #include "cpu.h"
 #include "speed.h"
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -423,3 +424,13 @@ int print_cpuinfo(void)
return 0;
 }
 #endif
+
+int cpu_eth_init(bd_t *bis)
+{
+   int error = 0;
+
+#ifdef CONFIG_FSL_MC_ENET
+   error = mc_init(bis);
+#endif
+   return error;
+}
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 6005f7e..6226cb2 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -64,3 +64,4 @@ obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
 obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o xilinx_ll_temac_mdio.o \
xilinx_ll_temac_fifo.o xilinx_ll_temac_sdma.o
 obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
+obj-$(CONFIG_FSL_MC_ENET) += fsl_mc/
diff --git a/drivers/net/fsl_mc/Makefile b/drivers/net/fsl_mc/Makefile
new file mode 100644
index 000..4834086
--- /dev/null
+++ b/drivers/net/fsl_mc/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright 2014 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+# Layerscape MC driver
+obj-y += mc.o
diff --git a/drivers/net/fsl_mc/mc.c b/drivers/net/fsl_mc/mc.c
new file mode 100644
index 000..df84568
--- /dev/null
+++ b/drivers/net/fsl_mc/mc.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+static int mc_boot_status;
+
+/**
+ * Copying MC firmware or DPL image to DDR
+ */
+static int mc_copy_image(const char *title,
+   u64 image_addr, u32 image_size, u64 mc_ram_addr)
+{
+   debug("%s copied to address %p

[U-Boot] [Patch v9 5/5] ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board support

[York Sun]

LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
  Two DDR controllers
  UART2 is used as the console
  IFC timing is tightened for speedy booting
  Support DDR3 and DDR4 as separated targets
  Management Complex (MC) is enabled
  Support for GIC 500 (based on GICv3 arch)

Signed-off-by: York Sun 
Signed-off-by: Arnab Basu 
Signed-off-by: J. German Rivera 
Signed-off-by: Bhupesh Sharma 
---
Change log
 v9: no change
 v8: Rename ls2100a to ls2085a according to latest SoC name.
 Add "support for GIC 500" in commit message.
 v7: no change
 v6: no change
 v5: no change
 v4: no change
 v3: Add support for DDR4 target and simulator target
 Squash Manage complex patch (previous 5/5) into this
 Reserve last 512MB memory for MC use
 Change MC firmware location in NOR flash
 Fix UART clock source speed
 Update IFC address mux
 Use generic board
 Disable DDR memory beyound 39 physical address space due to Linux 
limitation

 arch/arm/cpu/armv8/fsl-lsch3/README  |2 +-
 arch/arm/include/asm/arch-fsl-lsch3/config.h |2 +-
 board/freescale/ls2085a/Makefile |8 +
 board/freescale/ls2085a/README   |   16 ++
 board/freescale/{t4rdb => ls2085a}/ddr.c |   89 --
 board/freescale/ls2085a/ddr.h|   57 +++
 board/freescale/ls2085a/ls2085a.c|  100 
 boards.cfg   |3 +
 include/configs/ls2085a_common.h |  226 ++
 include/configs/ls2085a_emu.h|   19 +++
 include/configs/ls2085a_simu.h   |   16 ++
 11 files changed, 520 insertions(+), 18 deletions(-)
 create mode 100644 board/freescale/ls2085a/Makefile
 create mode 100644 board/freescale/ls2085a/README
 copy board/freescale/{t4rdb => ls2085a}/ddr.c (53%)
 create mode 100644 board/freescale/ls2085a/ddr.h
 create mode 100644 board/freescale/ls2085a/ls2085a.c
 create mode 100644 include/configs/ls2085a_common.h
 create mode 100644 include/configs/ls2085a_emu.h
 create mode 100644 include/configs/ls2085a_simu.h

diff --git a/arch/arm/cpu/armv8/fsl-lsch3/README 
b/arch/arm/cpu/armv8/fsl-lsch3/README
index de34a91..cc47466 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/README
+++ b/arch/arm/cpu/armv8/fsl-lsch3/README
@@ -7,4 +7,4 @@
 Freescale LayerScape with Chassis Generation 3
 
 This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
-for example LS2100A.
+for example LS2085A.
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h 
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index c987a19..c1c718e 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -53,7 +53,7 @@
 /* IFC */
 #define CONFIG_SYS_FSL_IFC_LE
 
-#ifdef CONFIG_LS2100A
+#ifdef CONFIG_LS2085A
 #define CONFIG_MAX_CPUS16
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8
 #define CONFIG_NUM_DDR_CONTROLLERS 2
diff --git a/board/freescale/ls2085a/Makefile b/board/freescale/ls2085a/Makefile
new file mode 100644
index 000..701b35c
--- /dev/null
+++ b/board/freescale/ls2085a/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright 2014 Freescale Semiconductor
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += ls2085a.o
+obj-y += ddr.o
diff --git a/board/freescale/ls2085a/README b/board/freescale/ls2085a/README
new file mode 100644
index 000..b7023e1
--- /dev/null
+++ b/board/freescale/ls2085a/README
@@ -0,0 +1,16 @@
+Freescale ls2085a_emu
+
+This is a emulator target with limited peripherals.
+
+Memory map from core's view
+
+0x00__ .. 0x00_000F_   Boot Rom
+0x00_0100_ .. 0x00_0FFF_   CCSR
+0x00_1800_ .. 0x00_181F_   OCRAM
+0x00_3000_ .. 0x00_3FFF_   IFC region #1
+0x00_8000_ .. 0x00__   DDR region #1
+0x05_1000_ .. 0x05__   IFC region #2
+0x80_8000_ .. 0xFF__   DDR region #2
+
+Other addresses are either reserved, or not used directly by u-boot.
+This list should be updated when more addresses are used.
diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/ls2085a/ddr.c
similarity index 53%
copy from board/freescale/t4rdb/ddr.c
copy to board/freescale/ls2085a/ddr.c
index 5a43c1b..257bc16 100644
--- a/board/freescale/t4rdb/ddr.c
+++ b/board/freescale/ls2085a/ddr.c
@@ -5,12 +5,8 @@
  */
 
 #include 
-#include 
-#include 
-#include 
 #include 
 #include 
-#include 
 #include "ddr.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -22,7 +18,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
ulong ddr_freq;
 
-   if (ctrl_num > 2) {
+   if (ctrl_num > 3) {
printf("Not supported controller number %d\n", ctrl_num);
return;
}
@@ -39,7 +35,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
pbsp = udimms[0];
 
 
-   

[U-Boot] [Patch v9 3/5] ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC

[York Sun]

Freescale LayerScape with Chassis Generation 3 is a set of SoCs with
ARMv8 cores and 3rd generation of Chassis. We use different MMU setup
to support memory map and cache attribute for these SoCs. MMU and cache
are enabled very early to bootst performance, especially for early
development on emulators. After u-boot relocates to DDR, a new MMU
table with QBMan cache access is created in DDR. SMMU pagesize is set
in SMMU_sACR register. Both DDR3 and DDR4 are supported.

Signed-off-by: York Sun 
Signed-off-by: Varun Sethi 
Signed-off-by: Arnab Basu 
---
 v9: no change
 v8: Fix a comment in lowlevel.S
 v7: Move "dsb sy" and "isb" out of each EL level.
 Move flusing final MMU table before setting TTBR.
 v6: Add "dsb sy" before setting TTBR and add "isb" after.
 v5: Revise the 2nd MMU table code to use the same macros
 Only change TTBR to point to new MMU table without rewriting MAIR, TCR

 v4: Slit ARMv8 MMU change to another patch, v4 2/5
 Add more comment for final MMU table setup
 Remove mmu.h added in v3 and v2
 Remove GICv2 macro testing in lowlevel.S
 Rename function init_type() to initiator_type()
 Use ARMv8 generic timer code

 v3: Remove blank lines at the of files
 Fix cluster PLL GSR register for accessing beyond array size
 Update final MMU table to support QBMan memory with cache
 Set SMMU pagesize in SMMU_sACR register in lowlevel init.
 Add DDR4 support
 Remove forcing L3 cache flusing
 Update GICv3 redistributor base address
 Some of these changes are caused by model change.

 arch/arm/cpu/armv8/cache_v8.c |7 +-
 arch/arm/cpu/armv8/fsl-lsch3/Makefile |9 +
 arch/arm/cpu/armv8/fsl-lsch3/README   |   10 +
 arch/arm/cpu/armv8/fsl-lsch3/cpu.c|  425 +
 arch/arm/cpu/armv8/fsl-lsch3/cpu.h|7 +
 arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S   |   65 
 arch/arm/cpu/armv8/fsl-lsch3/speed.c  |  176 +
 arch/arm/cpu/armv8/fsl-lsch3/speed.h  |7 +
 arch/arm/include/asm/arch-fsl-lsch3/clock.h   |   23 ++
 arch/arm/include/asm/arch-fsl-lsch3/config.h  |   65 
 arch/arm/include/asm/arch-fsl-lsch3/gpio.h|9 +
 arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h |  116 ++
 arch/arm/include/asm/arch-fsl-lsch3/imx-regs.h|   13 +
 arch/arm/include/asm/config.h |4 +
 arch/arm/include/asm/system.h |2 +
 drivers/i2c/mxc_i2c.c |5 +
 include/common.h  |5 +-
 17 files changed, 944 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/Makefile
 create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/README
 create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/cpu.c
 create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/cpu.h
 create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
 create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/speed.c
 create mode 100644 arch/arm/cpu/armv8/fsl-lsch3/speed.h
 create mode 100644 arch/arm/include/asm/arch-fsl-lsch3/clock.h
 create mode 100644 arch/arm/include/asm/arch-fsl-lsch3/config.h
 create mode 100644 arch/arm/include/asm/arch-fsl-lsch3/gpio.h
 create mode 100644 arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h
 create mode 100644 arch/arm/include/asm/arch-fsl-lsch3/imx-regs.h

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index af3c494..9dbcdf2 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -73,12 +73,17 @@ void invalidate_dcache_all(void)
__asm_invalidate_dcache_all();
 }
 
+void __weak flush_l3_cache(void)
+{
+}
+
 /*
  * Performs a clean & invalidation of the entire data cache at all levels
  */
 void flush_dcache_all(void)
 {
__asm_flush_dcache_all();
+   flush_l3_cache();
 }
 
 /*
@@ -211,7 +216,7 @@ void invalidate_icache_all(void)
  * Enable dCache & iCache, whether cache is actually enabled
  * depend on CONFIG_SYS_DCACHE_OFF and CONFIG_SYS_ICACHE_OFF
  */
-void enable_caches(void)
+void __weak enable_caches(void)
 {
icache_enable();
dcache_enable();
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/Makefile 
b/arch/arm/cpu/armv8/fsl-lsch3/Makefile
new file mode 100644
index 000..9249537
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-lsch3/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2014, Freescale Semiconductor
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += cpu.o
+obj-y += lowlevel.o
+obj-y += speed.o
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/README 
b/arch/arm/cpu/armv8/fsl-lsch3/README
new file mode 100644
index 000..de34a91
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-lsch3/README
@@ -0,0 +1,10 @@
+#
+# Copyright 2014 Freescale Semiconductor
+#
+# SPDX-License-Identifier:  GPL-2.0+
+#
+
+Freescale LayerScape with Chassis Generation 3
+
+This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
+for ex

[U-Boot] [Patch v9 2/5] ARMv8: Adjust MMU setup

[York Sun]

Make MMU function reusable. Platform code can setup its own MMU tables.

Signed-off-by: York Sun 
CC: David Feng 
---
Change log
 v9: no change
 v8: no change
 v7: no change
 v6: Modified from v4. Add "dsb sy" before setting MMU registers and add "isb" 
after.
 v5: Drop the addition of inline function set_pgtable_section() from v4
 It is only used twice and causes confusion.
 v4: new patch, splitted from v3 2/4
 Revise set_pgtable_section() to be reused by platform MMU code
 Add inline function set_ttbr_tcr_mair() to be used by this and platform 
mmu code

 arch/arm/cpu/armv8/cache_v8.c|   50 +++---
 arch/arm/include/asm/armv8/mmu.h |   24 ++
 2 files changed, 44 insertions(+), 30 deletions(-)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index a96ecda..af3c494 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -12,15 +12,14 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_SYS_DCACHE_OFF
-
-static void set_pgtable_section(u64 section, u64 memory_type)
+void set_pgtable_section(u64 *page_table, u64 index, u64 section,
+u64 memory_type)
 {
-   u64 *page_table = (u64 *)gd->arch.tlb_addr;
u64 value;
 
-   value = (section << SECTION_SHIFT) | PMD_TYPE_SECT | PMD_SECT_AF;
+   value = section | PMD_TYPE_SECT | PMD_SECT_AF;
value |= PMD_ATTRINDX(memory_type);
-   page_table[section] = value;
+   page_table[index] = value;
 }
 
 /* to activate the MMU we need to set up virtual memory */
@@ -28,10 +27,13 @@ static void mmu_setup(void)
 {
int i, j, el;
bd_t *bd = gd->bd;
+   u64 *page_table = (u64 *)gd->arch.tlb_addr;
 
/* Setup an identity-mapping for all spaces */
-   for (i = 0; i < (PGTABLE_SIZE >> 3); i++)
-   set_pgtable_section(i, MT_DEVICE_NGNRNE);
+   for (i = 0; i < (PGTABLE_SIZE >> 3); i++) {
+   set_pgtable_section(page_table, i, i << SECTION_SHIFT,
+   MT_DEVICE_NGNRNE);
+   }
 
/* Setup an identity-mapping for all RAM space */
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
@@ -39,38 +41,26 @@ static void mmu_setup(void)
ulong end = bd->bi_dram[i].start + bd->bi_dram[i].size;
for (j = start >> SECTION_SHIFT;
 j < end >> SECTION_SHIFT; j++) {
-   set_pgtable_section(j, MT_NORMAL);
+   set_pgtable_section(page_table, j, j << SECTION_SHIFT,
+   MT_NORMAL);
}
}
 
/* load TTBR0 */
el = current_el();
if (el == 1) {
-   asm volatile("msr ttbr0_el1, %0"
-: : "r" (gd->arch.tlb_addr) : "memory");
-   asm volatile("msr tcr_el1, %0"
-: : "r" (TCR_FLAGS | TCR_EL1_IPS_BITS)
-: "memory");
-   asm volatile("msr mair_el1, %0"
-: : "r" (MEMORY_ATTRIBUTES) : "memory");
+   set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
+ TCR_FLAGS | TCR_EL1_IPS_BITS,
+ MEMORY_ATTRIBUTES);
} else if (el == 2) {
-   asm volatile("msr ttbr0_el2, %0"
-: : "r" (gd->arch.tlb_addr) : "memory");
-   asm volatile("msr tcr_el2, %0"
-: : "r" (TCR_FLAGS | TCR_EL2_IPS_BITS)
-: "memory");
-   asm volatile("msr mair_el2, %0"
-: : "r" (MEMORY_ATTRIBUTES) : "memory");
+   set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
+ TCR_FLAGS | TCR_EL2_IPS_BITS,
+ MEMORY_ATTRIBUTES);
} else {
-   asm volatile("msr ttbr0_el3, %0"
-: : "r" (gd->arch.tlb_addr) : "memory");
-   asm volatile("msr tcr_el3, %0"
-: : "r" (TCR_FLAGS | TCR_EL2_IPS_BITS)
-: "memory");
-   asm volatile("msr mair_el3, %0"
-: : "r" (MEMORY_ATTRIBUTES) : "memory");
+   set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
+ TCR_FLAGS | TCR_EL3_IPS_BITS,
+ MEMORY_ATTRIBUTES);
}
-
/* enable the mmu */
set_sctlr(get_sctlr() | CR_M);
 }
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 1193e76..4b7b67b 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -108,4 +108,28 @@
TCR_IRGN_WBWA | \
TCR_T0SZ(VA_BITS))
 
+#ifndef __ASSEMBLY__
+void set_pgtable_section(u64 *page_table, u64 index,
+u64 section, u64

Re: [U-Boot] [PATCH 2/2] usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

[Michael Trimarchi]

Hi

Il 23/giu/2014 23:58 "Felipe Balbi"  ha scritto:
>
> Hi,
>
> On Mon, Jun 23, 2014 at 11:28:30PM +0200, Michael Trimarchi wrote:
> > > @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct
omap_xhci
> > *omap)
> > >
> > >  void usb_phy_power(int on)
> > >  {
> > > -   return;
> > > +   u32 val;
> > > +
> > > +   /* USB1_CTRL */
> > > +   val = readl(0x44e10628);
> >
> > Can you please describe 0x44e...
>
> describe in what way ? The comment right above it, tells you what it is,
> so does the comment in the if block. Now, if what you're asking is for
> #defines for those constants, sure, I can do that.

Yes, this was the suggestione

>
> --
> balbi
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Re: [U-Boot] [PATCH 2/2] usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

[Felipe Balbi]

Hi,

On Mon, Jun 23, 2014 at 11:28:30PM +0200, Michael Trimarchi wrote:
> > @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci
> *omap)
> >
> >  void usb_phy_power(int on)
> >  {
> > -   return;
> > +   u32 val;
> > +
> > +   /* USB1_CTRL */
> > +   val = readl(0x44e10628);
> 
> Can you please describe 0x44e...

describe in what way ? The comment right above it, tells you what it is,
so does the comment in the if block. Now, if what you're asking is for
#defines for those constants, sure, I can do that.

-- 
balbi


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Re: [U-Boot] [PATCH] integrator: switch to generic board

[Simon Glass]

On 23 June 2014 03:15, Linus Walleij  wrote:
> Turn on generic board for the integrators, as per the request in
> the startup message. Everything just works, tested on the
> Integrator/AP and Integrator/CP.
>
> Signed-off-by: Linus Walleij 

Thanks.

Acked-by: Simon Glass 
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[U-Boot] Please pull u-boot-dm.git branch master

[Simon Glass]

[this didn't appear in patchwork I think, so trying again]

Hi Tom,

Here are two that were left behind.


The following changes since commit 39b6d07fd7e692736cdb05a000b1c84ab43de4fb:

  Merge branch 'master' of git://git.denx.de/u-boot-dm (2014-06-20
20:03:51 -0400)

are available in the git repository at:

  master

for you to fetch changes up to 4af5b1445c2c17b72f515134d510d37e05a344f1:

  dm: Use '*' to indicate a device is activated (2014-06-21 10:12:43 -0600)


Jeroen Hofstee (1):
  include/dm.h: fix inclusion guard

Simon Glass (1):
  dm: Use '*' to indicate a device is activated

 include/dm.h |  2 +-
 test/dm/cmd_dm.c | 11 ++-
 2 files changed, 7 insertions(+), 6 deletions(-)

Regards,
Simon
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Re: [U-Boot] [PATCH 2/2] usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

[Michael Trimarchi]

Hi

Il 23/giu/2014 23:26 "Felipe Balbi"  ha scritto:
>
> Newer AM437x silicon requires us to explicitly power up
> the USB2 PHY. By implementing usb_phy_power() we can
> achieve that.
>
> Signed-off-by: Felipe Balbi 
> ---
>  drivers/usb/phy/omap_usb_phy.c | 17 -
>  1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/phy/omap_usb_phy.c
b/drivers/usb/phy/omap_usb_phy.c
> index af46db2..0ed3e70 100644
> --- a/drivers/usb/phy/omap_usb_phy.c
> +++ b/drivers/usb/phy/omap_usb_phy.c
> @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci
*omap)
>
>  void usb_phy_power(int on)
>  {
> -   return;
> +   u32 val;
> +
> +   /* USB1_CTRL */
> +   val = readl(0x44e10628);

Can you please describe 0x44e...

> +   if (on) {
> +   /*
> +* these bits are re-used on AM437x to power up/down the
USB
> +* CM and OTG PHYs, if we don't toggle them, USB will not
be
> +* functional on newer silicon revisions
> +*/
> +   val &= ~0x3;
> +   } else {
> +   val |= 0x3;

ditto

> +   }
> +
> +   writel(val, 0x44e10628);

ditto

>  }
>  #endif /* CONFIG_AM437X_USB2PHY2_HOST */
>

Michael

> --
> 2.0.0.390.gcb682f8
>
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[U-Boot] [PATCH 1/2] usb: host: xhci: make sure to power up PHY

[Felipe Balbi]

some boards won't work if the PHY isn't explicitly
powered up.

Signed-off-by: Felipe Balbi 
---
 drivers/usb/host/xhci-omap.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index e667810..912b2bd 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap)
 {
int ret = 0;
 
+   usb_phy_power(1);
omap_enable_phy(omap);
 
ret = dwc3_core_init(omap->dwc3_reg);
-- 
2.0.0.390.gcb682f8

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[U-Boot] [PATCH 2/2] usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

[Felipe Balbi]

Newer AM437x silicon requires us to explicitly power up
the USB2 PHY. By implementing usb_phy_power() we can
achieve that.

Signed-off-by: Felipe Balbi 
---
 drivers/usb/phy/omap_usb_phy.c | 17 -
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index af46db2..0ed3e70 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
 
 void usb_phy_power(int on)
 {
-   return;
+   u32 val;
+
+   /* USB1_CTRL */
+   val = readl(0x44e10628);
+   if (on) {
+   /*
+* these bits are re-used on AM437x to power up/down the USB
+* CM and OTG PHYs, if we don't toggle them, USB will not be
+* functional on newer silicon revisions
+*/
+   val &= ~0x3;
+   } else {
+   val |= 0x3;
+   }
+
+   writel(val, 0x44e10628);
 }
 #endif /* CONFIG_AM437X_USB2PHY2_HOST */
 
-- 
2.0.0.390.gcb682f8

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[U-Boot] [PATCH] common: board_f: cosmetic use __weak for leds

[Jeroen Hofstee]

First of all this looks a lot better, but it also
prevents a gcc warning (W=1), that the weak function
has no previous prototype.

cc: Simon Glass 
Signed-off-by: Jeroen Hofstee 

---
This likely causes some merge issues, but is so uggly it
deserves it.
---
 common/board_f.c | 29 ++---
 include/status_led.h | 22 +++---
 2 files changed, 21 insertions(+), 30 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 4ea4cb2..bdab38e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -37,6 +37,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -78,25 +79,15 @@ DECLARE_GLOBAL_DATA_PTR;
  
  * May be supplied by boards if desired
  */
-inline void __coloured_LED_init(void) {}
-void coloured_LED_init(void)
-   __attribute__((weak, alias("__coloured_LED_init")));
-inline void __red_led_on(void) {}
-void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
-inline void __red_led_off(void) {}
-void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
-inline void __green_led_on(void) {}
-void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
-inline void __green_led_off(void) {}
-void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
-inline void __yellow_led_on(void) {}
-void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
-inline void __yellow_led_off(void) {}
-void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
-inline void __blue_led_on(void) {}
-void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
-inline void __blue_led_off(void) {}
-void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
+__weak void coloured_LED_init(void) {}
+__weak void red_led_on(void) {}
+__weak void red_led_off(void) {}
+__weak void green_led_on(void) {}
+__weak void green_led_off(void) {}
+__weak void yellow_led_on(void) {}
+__weak void yellow_led_off(void) {}
+__weak void blue_led_on(void) {}
+__weak void blue_led_off(void) {}
 
 /*
  * Why is gd allocated a register? Prior to reloc it might be better to
diff --git a/include/status_led.h b/include/status_led.h
index ecff60d..848708a 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -294,19 +294,21 @@ extern void __led_set (led_id_t mask, int state);
 # include 
 #endif
 
+#endif /* CONFIG_STATUS_LED*/
+
 /*
  * Coloured LEDs API
  */
 #ifndef__ASSEMBLY__
-extern voidcoloured_LED_init (void);
-extern voidred_led_on(void);
-extern voidred_led_off(void);
-extern voidgreen_led_on(void);
-extern voidgreen_led_off(void);
-extern voidyellow_led_on(void);
-extern voidyellow_led_off(void);
-extern voidblue_led_on(void);
-extern voidblue_led_off(void);
+void coloured_LED_init(void);
+void red_led_on(void);
+void red_led_off(void);
+void green_led_on(void);
+void green_led_off(void);
+void yellow_led_on(void);
+void yellow_led_off(void);
+void blue_led_on(void);
+void blue_led_off(void);
 #else
.extern LED_init
.extern red_led_on
@@ -319,6 +321,4 @@ extern void blue_led_off(void);
.extern blue_led_off
 #endif
 
-#endif /* CONFIG_STATUS_LED*/
-
 #endif /* _STATUS_LED_H_   */
-- 
1.8.3.2

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Re: [U-Boot] [Patch v8 4/5] armv8/fsl-lsch3: Add support to load and start MC Firmware

[York Sun]

In this case, I will have to send a new version to get rid of this check.

York


On 06/23/2014 01:50 PM, Rivera Jose-B46482 wrote:
> The "uname == NULL" check can be removed.
> 
> Thanks,
> 
> German
> 
> From: Sun York-R58495
> Sent: Friday, June 20, 2014 3:38 PM
> To: Jeroen Hofstee; Rivera Jose-B46482
> Cc: albert.u.b...@aribaud.net; Kanetkar Shruti-B44454; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [Patch v8 4/5] armv8/fsl-lsch3: Add support to load and 
> start MC Firmware
> 
> On 06/20/2014 01:33 PM, Jeroen Hofstee wrote:
>> Hi York,
>>
>> On 20-06-14 20:46, York Sun wrote:
>>> From: "J. German Rivera" 
>>>
>>> Adding support to load and start the Layerscape Management Complex (MC)
>>> firmware. First, the MC GCR register is set to 0 to reset all cores. MC
>>> firmware and DPL images are copied from their location in NOR flash to
>>> DDR. MC registers are updated with the location of these images.
>>> Deasserting the reset bit of MC GCR register releases core 0 to run.
>>> Core 1 will be released by MC firmware. Stop bits are not touched for
>>> this step. U-boot waits for MC until it boots up. In case of a failure,
>>> device tree is updated accordingly. The MC firmware image uses FIT format.
>>>
>>>
>>> +int parse_mc_firmware_fit_image(const void **raw_image_addr,
>>> +size_t *raw_image_size)
>>> +{
>>> +int format;
>>> +void *fit_hdr;
>>> +int node_offset;
>>> +const void *data;
>>> +size_t size;
>>> +const char *uname = "firmware";
>>> +
>>> +/* Check if the image is in NOR flash*/
>>> +#ifdef CONFIG_SYS_LS_MC_FW_IN_NOR
>>> +fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR;
>>> +#else
>>> +#error "No CONFIG_SYS_LS_MC_FW_IN_xxx defined"
>>> +#endif
>>> +
>>> +/* Check if Image is in FIT format */
>>> +format = genimg_get_format(fit_hdr);
>>> +
>>> +if (format != IMAGE_FORMAT_FIT) {
>>> +debug("Not a FIT image\n");
>>> +return 1;
>>> +}
>>> +
>>> +if (!fit_check_format(fit_hdr)) {
>>> +debug("Bad FIT image format\n");
>>> +return 1;
>>> +}
>>> +
>>> +/* Find node offset of MC Firmware image */
>>> +if (uname == NULL) {
>>> +debug("FIT subimage unit name not provided");
>>> +return 1;
>>> +}
>>> +
>>
>> I don't see how uname can ever be NULL here, since it is
>> assigned above.
>>
> 
> Good question. I think German has a plan to use different name. I will let him
> comment.
> 
> York
> 

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Re: [U-Boot] [PATCH] ARM: cache_v7: use __weak

[Tom Rini]

On Mon, Jun 23, 2014 at 10:07:04PM +0200, Jeroen Hofstee wrote:

> This is not only more readable but also prevents a warning
> about a missing prototype. The prototypes which are actually
> missing are added.
> 
> cc: Albert Aribaud 
> Signed-off-by: Jeroen Hofstee 

Been on my TODO list for a long time, thanks!

Reviewed-by: Tom Rini 

> +/*  Stub implementations for outer cache operations */

Extra space.  Albert assuming you're OK can you just fix it up when you
take it?

-- 
Tom


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[U-Boot] [PATCH] ARM: cache_v7: use __weak

[Jeroen Hofstee]

This is not only more readable but also prevents a warning
about a missing prototype. The prototypes which are actually
missing are added.

cc: Albert Aribaud 
Signed-off-by: Jeroen Hofstee 
---
 arch/arm/cpu/armv7/cache_v7.c | 45 +++
 arch/arm/include/asm/cache.h  |  3 +++
 arch/arm/lib/cache-cp15.c |  9 ++---
 arch/arm/lib/cache.c  | 13 +++--
 4 files changed, 15 insertions(+), 55 deletions(-)

diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index bc5fc42..a2c4032 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -354,41 +354,10 @@ void invalidate_icache_all(void)
 }
 #endif
 
-/*
- * Stub implementations for outer cache operations
- */
-void __v7_outer_cache_enable(void)
-{
-}
-void v7_outer_cache_enable(void)
-   __attribute__((weak, alias("__v7_outer_cache_enable")));
-
-void __v7_outer_cache_disable(void)
-{
-}
-void v7_outer_cache_disable(void)
-   __attribute__((weak, alias("__v7_outer_cache_disable")));
-
-void __v7_outer_cache_flush_all(void)
-{
-}
-void v7_outer_cache_flush_all(void)
-   __attribute__((weak, alias("__v7_outer_cache_flush_all")));
-
-void __v7_outer_cache_inval_all(void)
-{
-}
-void v7_outer_cache_inval_all(void)
-   __attribute__((weak, alias("__v7_outer_cache_inval_all")));
-
-void __v7_outer_cache_flush_range(u32 start, u32 end)
-{
-}
-void v7_outer_cache_flush_range(u32 start, u32 end)
-   __attribute__((weak, alias("__v7_outer_cache_flush_range")));
-
-void __v7_outer_cache_inval_range(u32 start, u32 end)
-{
-}
-void v7_outer_cache_inval_range(u32 start, u32 end)
-   __attribute__((weak, alias("__v7_outer_cache_inval_range")));
+/*  Stub implementations for outer cache operations */
+__weak void v7_outer_cache_enable(void) {}
+__weak void v7_outer_cache_disable(void) {}
+__weak void v7_outer_cache_flush_all(void) {}
+__weak void v7_outer_cache_inval_all(void) {}
+__weak void v7_outer_cache_flush_range(u32 start, u32 end) {}
+__weak void v7_outer_cache_inval_range(u32 start, u32 end) {}
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index ddebbc8..a836e9f 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -29,6 +29,9 @@ void l2_cache_enable(void);
 void l2_cache_disable(void);
 void set_section_dcache(int section, enum dcache_option option);
 
+void arm_init_before_mmu(void);
+void arm_init_domains(void);
+void cpu_cache_initialization(void);
 void dram_bank_mmu_setup(int bank);
 
 #endif
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 8642010..5fdfdbf 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -14,11 +14,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-void __arm_init_before_mmu(void)
+__weak void arm_init_before_mmu(void)
 {
 }
-void arm_init_before_mmu(void)
-   __attribute__((weak, alias("__arm_init_before_mmu")));
 
 __weak void arm_init_domains(void)
 {
@@ -44,14 +42,11 @@ void set_section_dcache(int section, enum dcache_option 
option)
page_table[section] = value;
 }
 
-void __mmu_page_table_flush(unsigned long start, unsigned long stop)
+__weak void mmu_page_table_flush(unsigned long start, unsigned long stop)
 {
debug("%s: Warning: not implemented\n", __func__);
 }
 
-void mmu_page_table_flush(unsigned long start, unsigned long stop)
-   __attribute__((weak, alias("__mmu_page_table_flush")));
-
 void mmu_set_region_dcache_behaviour(u32 start, int size,
 enum dcache_option option)
 {
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 4f6b9f0..4e597a4 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -9,7 +9,7 @@
 
 #include 
 
-void  __flush_cache(unsigned long start, unsigned long size)
+__weak void flush_cache(unsigned long start, unsigned long size)
 {
 #if defined(CONFIG_ARM1136)
 
@@ -31,28 +31,21 @@ void  __flush_cache(unsigned long start, unsigned long size)
 #endif /* CONFIG_ARM926EJS */
return;
 }
-void  flush_cache(unsigned long start, unsigned long size)
-   __attribute__((weak, alias("__flush_cache")));
 
 /*
  * Default implementation:
  * do a range flush for the entire range
  */
-void   __flush_dcache_all(void)
+__weak void flush_dcache_all(void)
 {
flush_cache(0, ~0);
 }
-void   flush_dcache_all(void)
-   __attribute__((weak, alias("__flush_dcache_all")));
-
 
 /*
  * Default implementation of enable_caches()
  * Real implementation should be in platform code
  */
-void __enable_caches(void)
+__weak void enable_caches(void)
 {
puts("WARNING: Caches not enabled\n");
 }
-void enable_caches(void)
-   __attribute__((weak, alias("__enable_caches")));
-- 
1.8.3.2

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[U-Boot] [PATCH 1/2] power/pmic.h: Add prototype for power_init_board.

[Tom Rini]

As this is a weak function that we may override, provide a prototype for
it.

Cc: Łukasz Majewski 
Signed-off-by: Tom Rini 
---
 include/power/pmic.h |1 +
 1 file changed, 1 insertion(+)

diff --git a/include/power/pmic.h b/include/power/pmic.h
index a62e6c9..afbc5aa 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -79,6 +79,7 @@ struct pmic {
 };
 
 int pmic_init(unsigned char bus);
+int power_init_board(void);
 int pmic_dialog_init(unsigned char bus);
 int check_reg(struct pmic *p, u32 reg);
 struct pmic *pmic_alloc(void);
-- 
1.7.9.5

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[U-Boot] [PATCH 2/2] tps65218/am43xx_evm: Add power framework support to TPS65218

[Tom Rini]

Add in an init function for the drivers/power framework so we can dump
and read the registers via i2c.

Cc: Łukasz Majewski 
Signed-off-by: Tom Rini 

---
This is as far as we can take the framework on this family as in order
to make use of the pmic struct we need malloc.  We need to talk with the
PMIC before we have DDR setup so we don't have a malloc pool.  We can
address this later possibly once an "early malloc" patch is in as part
of device model support.
---
 board/ti/am43xx/board.c|   14 ++
 drivers/power/pmic/pmic_tps65218.c |   22 ++
 include/configs/am43xx_evm.h   |2 ++
 include/power/tps65218.h   |1 +
 4 files changed, 39 insertions(+)

diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 71af1ae..eb4e52f 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include "board.h"
+#include 
 #include 
 #include 
 #include 
@@ -414,6 +415,19 @@ void sdram_init(void)
 }
 #endif
 
+/* setup board specific PMIC */
+int power_init_board(void)
+{
+   struct pmic *p;
+
+   power_tps65218_init(I2C_PMIC);
+   p = pmic_get("TPS65218_PMIC");
+   if (p && !pmic_probe(p))
+   puts("PMIC:  TPS65218\n");
+
+   return 0;
+}
+
 int board_init(void)
 {
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
diff --git a/drivers/power/pmic/pmic_tps65218.c 
b/drivers/power/pmic/pmic_tps65218.c
index 0952456..dbc7a73 100644
--- a/drivers/power/pmic/pmic_tps65218.c
+++ b/drivers/power/pmic/pmic_tps65218.c
@@ -7,6 +7,8 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 
 /**
@@ -95,3 +97,23 @@ int tps65218_voltage_update(uchar dc_cntrl_reg, uchar 
volt_sel)
 
return 0;
 }
+
+int power_tps65218_init(unsigned char bus)
+{
+   static const char name[] = "TPS65218_PMIC";
+   struct pmic *p = pmic_alloc();
+
+   if (!p) {
+   printf("%s: POWER allocation error!\n", __func__);
+   return -ENOMEM;
+   }
+
+   p->name = name;
+   p->interface = PMIC_I2C;
+   p->number_of_regs = TPS65218_PMIC_NUM_OF_REGS;
+   p->hw.i2c.addr = TPS65218_CHIP_PM;
+   p->hw.i2c.tx_num = 1;
+   p->bus = bus;
+
+   return 0;
+}
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 823cba6..71f13e6 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -33,6 +33,8 @@
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 
 /* Power */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
 #define CONFIG_POWER_TPS65218
 
 /* SPL defines. */
diff --git a/include/power/tps65218.h b/include/power/tps65218.h
index 67aa2f8..f8f33b8 100644
--- a/include/power/tps65218.h
+++ b/include/power/tps65218.h
@@ -60,4 +60,5 @@ enum {
 int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
   uchar mask);
 int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel);
+int power_tps65218_init(unsigned char bus);
 #endif /* __POWER_TPS65218_H__ */
-- 
1.7.9.5

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Re: [U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC

[Eric Nelson]

Thanks Stephen,

On 06/23/2014 11:02 AM, Stephen Warren wrote:
> From: Stephen Warren 
> 
> ci_udc.c's usb_gadget_unregister_driver() doesn't call driver->unbind()
> unlike other USB gadget drivers. Fix it to do this.
> 
> Without this, when ether.c's CDC Ethernet device is torn down,
> eth_unbind() is never called, so dev->gadget is never set to NULL.
> For some reason, usb_eth_halt() is called both at the end of the first
> use of the Ethernet device, and prior to any subsequent use. Since
> dev->gadget is never cleared, all calls to usb_eth_halt() attempt to
> stop, disconnect, and clean up the device, resulting in double cleanup,
> which hangs U-Boot on my Tegra device at least.
> 
> ci_udc allocates its own singleton EP0 request object, and cleans it up
> during usb_gadget_unregister_driver(). This appears necessary when using
> the USB gadget framework in U-Boot, since that does not allocate/free
> the EP0 request. However, the CDC Ethernet driver *does* allocate and
> free its own EP0 requests. Consequently, we must protect
> ci_ep_free_request() against double-freeing the request.
> 

Tested-by: Eric Nelson 

Tested on Nitrogen6x (i.MX6). On this platform, without the patch, I
could execute ping exactly once.

With the patch, repeated pings work great!

Regards,


Eric
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Re: [U-Boot] [PATCH v2 2/2] README: document the CONFIG_ENV_IS_IN_FAT option

[Jon Loeliger]

On Mon, Jun 23, 2014 at 1:41 PM, Stephen Warren  wrote:
> On 06/22/2014 08:41 PM, Josh Wu wrote:
>> Signed-off-by: Josh Wu 
>
> A quick description might be nice. Otherwise,

Josh,

Any chance you want to patch the lack of CONFIG_ENV_IS_IN_SPI_FLASH
documentation while you are in the area? :-)

jdl
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Re: [U-Boot] [PATCH v2] thor: defer parsing of device string to IO backend

[Stephen Warren]

On 06/23/2014 01:39 AM, Lukasz Majewski wrote:
> Commit d4f5ef59cc7 "dfu: defer parsing of device string to IO backend" changed
> the function signature of dfu_init_env_entities(). Adjust cmd_thordown.c
> to match that change.
> 
> Also, apply the same change as commit d6d37d737b58e "dfu: free entities
> when parsing fails" to cmd_thordown.c.
> 
> Fixes: d4f5ef59cc7 ("dfu: defer parsing of device string to IO backend")
> 
> Signed-off-by: Lukasz Majewski 

Both the fixes and s-o-b tag should be in the same final paragraph with
no blank lines between. I assume that can be easily fixed up when applying.

Reviewed-by: Stephen Warren 
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Re: [U-Boot] [PATCH v2] ARM: tegra: Disable VPR

[Stephen Warren]

On 06/23/2014 01:20 AM, Alexandre Courbot wrote:
> From: Bryan Wu 
> 
> On Tegra114 and Tegra124 platforms, certain display-related registers cannot
> be accessed unless the VPR registers are programmed.  For bootloader, we
> probably don't care about VPR, so we disable it (which counts as programming
> it, and allows those display-related registers to be accessed.
> 
> This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c
> in Chromium OS U-Boot project.

> diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/cpu/tegra-common/vpr.c

> +void config_vpr(void)
> +{
> + struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
> +
> + /* VPR is only in T114 and T124 */
> + switch (tegra_get_chip()) {
> + case CHIPID_TEGRA114:
> + case CHIPID_TEGRA124:

You can drop the switch() and call to tegra_get_chip() since this is all
done at compile-time now.

Other than that,
Reviewed-by: Stephen Warren 
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Re: [U-Boot] [PATCH v2 2/2] README: document the CONFIG_ENV_IS_IN_FAT option

[Stephen Warren]

On 06/22/2014 08:41 PM, Josh Wu wrote:
> Signed-off-by: Josh Wu 

A quick description might be nice. Otherwise,

Reviewed-by: Stephen Warren 
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Re: [U-Boot] [RFC PATCH 0/3] Implement "fastboot flash" for eMMC

[Steve Rae]

Rob & Sebastian

I would appreciate your comments on this issue; I suspect that you had 
some ideas regarding the implementation of the fastboot "flash" and 
"erase" commands


Thanks in advance, Steve

On 14-06-23 05:58 AM, Lukasz Majewski wrote:

Hi Steve,




On 14-06-19 11:32 PM, Marek Vasut wrote:

On Friday, June 20, 2014 at 08:18:42 AM, Lukasz Majewski wrote:

Hi Steve,


This series implements the "fastboot flash" command for eMMC
devices. It supports both raw and sparse images.

NOTES:
- the support for the "fastboot flash" command is enabled with
CONFIG_FASTBOOT_FLASH
- the support for eMMC is enabled with
CONFIG_FASTBOOT_FLASH_MMC_DEV
- (future) the support for NAND would be enabled with
CONFIG_FASTBOOT_FLASH_NAND(???)
- thus the proposal is to place the code in common/fb_mmc.c and
(future) common/fb_nand.c(???), however, this may not be the
appropriate location


Would you consider another approach for providing flashing backend
for fastboot?

I'd like to propose reusing of the dfu flashing code for this
purpose. Such approach has been used successfully with USB "thor"
downloading function.

Since the "fastboot" is using gadget infrastructure (thanks to the
effort of Rob Herring) I think that it would be feasible to reuse
the same approach as "thor" does. In this way the low level code
would be kept in one place and we could refine and test it more
thoroughly.


I'm all for this approach as well if possible.

Best regards,
Marek Vasut
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I have briefly investigated this suggestion
And have 'hacked' some code as follows:

--- common/fb_mmc.c_000 2014-06-20 14:13:43.271158073 -0700
+++ common/fb_mmc.c_001 2014-06-20 14:17:48.688072764 -0700
while (remaining_chunks) {
switch (le16_to_cpu(c_header->chunk_type)) {
case CHUNK_TYPE_RAW:
+#if 0
blkcnt =
(le32_to_cpu(c_header->chunk_sz)
* blk_sz) / info.blksz;
buffer =
(void *)c_header +
le16_to_cpu(s_header->chunk_hdr_sz);

blks =
mmc_dev->block_write(mmc_dev->dev, blk, blkcnt, buffer);
if (blks != blkcnt) {
printf("Write failed
%lu\n", blks); strcpy(response,
   "FAILmmc write
failure"); return;
}

bytes_written += blkcnt *
info.blksz; +#else
+   buffer =
+   (void *)c_header +
+
le16_to_cpu(s_header->chunk_hdr_sz); +
+   len =
le32_to_cpu(c_header->chunk_sz) * blk_sz;
+   ret_dfu = dfu_write_medium_mmc(dfu,
offset,
+
buffer, &len);
+   if (ret_dfu) {
+   printf("Write failed %lu\n",
len);
+   strcpy(response,
+  "FAILmmc write
failure");
+   return;
+   }
+
+
+   bytes_written += len;
+#endif
break;

case CHUNK_TYPE_FILL:
case CHUNK_TYPE_DONT_CARE:
case CHUNK_TYPE_CRC32:
/* do nothing */
break;

default:
/* error */
printf("Unknown chunk type\n");
strcpy(response,
   "FAILunknown chunk type in
sparse image"); return;
}

+#if 0
blk += (le32_to_cpu(c_header->chunk_sz) *
blk_sz) / info.blksz;
+#else
+   offset += le32_to_cpu(c_header->chunk_sz) *
blk_sz; +#endif
c_header = (chunk_header_t *)((void
*)c_header + le32_to_cpu(c_header->total_sz));
remaining_chunks--;
}


--- common/fb_mmc.c_000 2014-06-20 14:13:43.271158073 -0700
+++ common/fb_mmc.c_001 2014-06-20 14:17:48.688072764 -0700
/* raw image */

+#if 0
/* determine number of blocks to write */
blkcnt =
((download_bytes + (info.blksz - 1)) &
~(info.blksz - 1)); blkcnt = blkcnt / info.blksz;

if (blkcnt > info.size) {
printf("%s: too large for partition:
'%s'\n", __func__, cmd);
strcpy(response, "FAILtoo large for
partition"); return;
}

printf("Flashing Raw Imag

[U-Boot] [PATCH] TI:omap3: enable CONFIG_CMD_DHCP for omap3_beagle

[Tyler Baker]

The following patch re-enables the dhcp functionality on omap3_beagle.
It was removed with df4dbb5df6ab1c1d27b3fd4acbaad69b47095daf when
omap3_beagle was converted to use ti_omap3_common.h. I have tested
beagleboard and beagleboard-xm with this patch and confirmed dhcp is
working.

Signed-off-by: Tyler Baker 
---
 include/configs/omap3_beagle.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index c023483..35a6c9d 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -111,6 +111,7 @@
 #define CONFIG_CMD_LED/* LED support*/
 #define CONFIG_CMD_SETEXPR/* Evaluate expressions*/
 #define CONFIG_CMD_GPIO /* Enable gpio command */
+#define CONFIG_CMD_DHCP

 #define CONFIG_VIDEO_OMAP3/* DSS Support*/

-- 
1.8.3.2
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[U-Boot] [PATCH] usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC

[Stephen Warren]

From: Stephen Warren 

ci_udc.c's usb_gadget_unregister_driver() doesn't call driver->unbind()
unlike other USB gadget drivers. Fix it to do this.

Without this, when ether.c's CDC Ethernet device is torn down,
eth_unbind() is never called, so dev->gadget is never set to NULL.
For some reason, usb_eth_halt() is called both at the end of the first
use of the Ethernet device, and prior to any subsequent use. Since
dev->gadget is never cleared, all calls to usb_eth_halt() attempt to
stop, disconnect, and clean up the device, resulting in double cleanup,
which hangs U-Boot on my Tegra device at least.

ci_udc allocates its own singleton EP0 request object, and cleans it up
during usb_gadget_unregister_driver(). This appears necessary when using
the USB gadget framework in U-Boot, since that does not allocate/free
the EP0 request. However, the CDC Ethernet driver *does* allocate and
free its own EP0 requests. Consequently, we must protect
ci_ep_free_request() against double-freeing the request.

Signed-off-by: Stephen Warren 
---
 drivers/usb/gadget/ci_udc.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index b18bee43ad89..c3f6467b7db4 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -226,8 +226,11 @@ static void ci_ep_free_request(struct usb_ep *ep, struct 
usb_request *req)
int num;
 
num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
-   if (num == 0)
+   if (num == 0) {
+   if (!controller.ep0_req)
+   return;
controller.ep0_req = 0;
+   }
 
if (ci_req->b_buf)
free(ci_req->b_buf);
@@ -909,6 +912,9 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver 
*driver)
 {
udc_disconnect();
 
+   driver->unbind(&controller.gadget);
+   controller.driver = NULL;
+
ci_ep_free_request(&controller.ep[0].ep, &controller.ep0_req->req);
free(controller.items_mem);
free(controller.epts);
-- 
1.8.1.5

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[U-Boot] [PATCH v4 4/4] mx6sx: Add initial support for mx6sxsabresd board

[Fabio Estevam]

From: Fabio Estevam 

Signed-off-by: Fabio Estevam 
---
Changes since v3:
- None
Changes since v2:
- Adjust CONFIG_LOADADDR
Changes since v1:
- Previous commit log belonged to 1/4 patch, so moved it to the correct patch

 board/freescale/mx6sxsabresd/Makefile   |   6 +
 board/freescale/mx6sxsabresd/imximage.cfg   | 105 
 board/freescale/mx6sxsabresd/mx6sxsabresd.c |  95 ++
 boards.cfg  |   1 +
 include/configs/mx6sxsabresd.h  | 186 
 5 files changed, 393 insertions(+)
 create mode 100644 board/freescale/mx6sxsabresd/Makefile
 create mode 100644 board/freescale/mx6sxsabresd/imximage.cfg
 create mode 100644 board/freescale/mx6sxsabresd/mx6sxsabresd.c
 create mode 100644 include/configs/mx6sxsabresd.h

diff --git a/board/freescale/mx6sxsabresd/Makefile 
b/board/freescale/mx6sxsabresd/Makefile
new file mode 100644
index 000..97dbfda
--- /dev/null
+++ b/board/freescale/mx6sxsabresd/Makefile
@@ -0,0 +1,6 @@
+# (C) Copyright 2014 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := mx6sxsabresd.o
diff --git a/board/freescale/mx6sxsabresd/imximage.cfg 
b/board/freescale/mx6sxsabresd/imximage.cfg
new file mode 100644
index 000..406dece
--- /dev/null
+++ b/board/freescale/mx6sxsabresd/imximage.cfg
@@ -0,0 +1,105 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#define __ASSEMBLY__
+#include 
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi/sd/nand/onenand, qspi/nor
+ */
+
+BOOT_FROM  sd
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type   AddressValue
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address   absolute address of the register
+ * value value to be stored in the register
+ */
+
+DATA 4 0x020c4068 0x
+DATA 4 0x020c406c 0x
+DATA 4 0x020c4070 0x
+DATA 4 0x020c4074 0x
+DATA 4 0x020c4078 0x
+DATA 4 0x020c407c 0x
+DATA 4 0x020c4080 0x
+DATA 4 0x020c4084 0x
+
+DATA 4 0x020e0618 0x000c
+DATA 4 0x020e05fc 0x
+DATA 4 0x020e032c 0x0030
+
+DATA 4 0x020e0300 0x0030
+DATA 4 0x020e02fc 0x0030
+DATA 4 0x020e05f4 0x0030
+DATA 4 0x020e0340 0x0030
+
+DATA 4 0x020e0320 0x
+DATA 4 0x020e0310 0x0030
+DATA 4 0x020e0314 0x0030
+DATA 4 0x020e0614 0x0030
+
+DATA 4 0x020e05f8 0x0002
+DATA 4 0x020e0330 0x0030
+DATA 4 0x020e0334 0x0030
+DATA 4 0x020e0338 0x0030
+DATA 4 0x020e033c 0x0030
+DATA 4 0x020e0608 0x0002
+DATA 4 0x020e060c 0x0030
+DATA 4 0x020e0610 0x0030
+DATA 4 0x020e061c 0x0030
+DATA 4 0x020e0620 0x0030
+DATA 4 0x020e02ec 0x0030
+DATA 4 0x020e02f0 0x0030
+DATA 4 0x020e02f4 0x0030
+DATA 4 0x020e02f8 0x0030
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b080c 0x00270025
+DATA 4 0x021b0810 0x001B001E
+DATA 4 0x021b083c 0x4144013C
+DATA 4 0x021b0840 0x01300128
+DATA 4 0x021b0848 0x4044464A
+DATA 4 0x021b0850 0x3A383C34
+DATA 4 0x021b081c 0x
+DATA 4 0x021b0820 0x
+DATA 4 0x021b0824 0x
+DATA 4 0x021b0828 0x
+DATA 4 0x021b08b8 0x0800
+DATA 4 0x021b0004 0x0002002d
+DATA 4 0x021b0008 0x00333030
+DATA 4 0x021b000c 0x676b52f3
+DATA 4 0x021b0010 0xb66d8b63
+DATA 4 0x021b0014 0x01ff00db
+DATA 4 0x021b0018 0x00011740
+DATA 4 0x021b001c 0x8000
+DATA 4 0x021b002c 0x26d2
+DATA 4 0x021b0030 0x006b1023
+DATA 4 0x021b0040 0x005f
+DATA 4 0x021b 0x8419
+DATA 4 0x021b001c 0x04008032
+DATA 4 0x021b001c 0x8033
+DATA 4 0x021b001c 0x00068031
+DATA 4 0x021b001c 0x05208030
+DATA 4 0x021b001c 0x04008040
+DATA 4 0x021b0020 0x0800
+DATA 4 0x021b0818 0x0007
+DATA 4 0x021b001c 0x
+
+DATA 4 0x021b083c 0x41400138
+DATA 4 0x021b0840 0x012C011C
+DATA 4 0x021b0848 0x3C3C4044
+DATA 4 0x021b0850 0x34343638
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c 
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
new file mode 100644
index 000..ff4c88f
--- /dev/null
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * Author: Fabio Estevam 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |   \
+   PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
+   PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_SIZE;
+
+   

[U-Boot] [PATCH v4 3/4] mx6: clock: Do not enable sata and ipu clocks

[Fabio Estevam]

From: Fabio Estevam 

mx6sx does not have sata nor ipu blocks, so do not handle such clocks.

Signed-off-by: Fabio Estevam 
---
Changes since v3:
- None
Changes since v2:
- None
Changes since v1:
- None

 arch/arm/cpu/armv7/mx6/clock.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index d31fbbd..51c964c 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -437,6 +437,7 @@ static int enable_enet_pll(uint32_t en)
return 0;
 }
 
+#ifndef CONFIG_MX6SX
 static void ungate_sata_clock(void)
 {
struct mxc_ccm_reg *const imx_ccm =
@@ -445,6 +446,7 @@ static void ungate_sata_clock(void)
/* Enable SATA clock. */
setbits_le32(&imx_ccm->CCGR5, MXC_CCM_CCGR5_SATA_MASK);
 }
+#endif
 
 static void ungate_pcie_clock(void)
 {
@@ -455,11 +457,13 @@ static void ungate_pcie_clock(void)
setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_PCIE_MASK);
 }
 
+#ifndef CONFIG_MX6SX
 int enable_sata_clock(void)
 {
ungate_sata_clock();
return enable_enet_pll(BM_ANADIG_PLL_ENET_ENABLE_SATA);
 }
+#endif
 
 int enable_pcie_clock(void)
 {
@@ -491,7 +495,9 @@ int enable_pcie_clock(void)
clrbits_le32(&ccm_regs->cbcmr, MXC_CCM_CBCMR_PCIE_AXI_CLK_SEL);
 
/* Party time! Ungate the clock to the PCIe. */
+#ifndef CONFIG_MX6SX
ungate_sata_clock();
+#endif
ungate_pcie_clock();
 
return enable_enet_pll(BM_ANADIG_PLL_ENET_ENABLE_SATA |
@@ -573,6 +579,7 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return 0;
 }
 
+#ifndef CONFIG_MX6SX
 void enable_ipu_clock(void)
 {
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -581,6 +588,7 @@ void enable_ipu_clock(void)
reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK;
writel(reg, &mxc_ccm->CCGR3);
 }
+#endif
 /***/
 
 U_BOOT_CMD(
-- 
1.8.3.2

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[U-Boot] [PATCH v4 1/4] mx6: Add support for the mx6solox variant

[Fabio Estevam]

From: Fabio Estevam 

mx6solox is the newest member of the mx6 family.

Some of the new features on this variants are:
- Cortex M4 microcontroller (besides the CortexA9)
- Dual Gigabit Ethernet

Add the initial support for it.

Signed-off-by: Fabio Estevam 
---
Changes since v3:
- Add missing is_cpu_type(MXC_CPU_MX6SL)
Changes since v2:
- Improve commit log
- Use is_cpu_type() when possible

 arch/arm/cpu/armv7/mx6/clock.c|  11 +-
 arch/arm/cpu/armv7/mx6/soc.c  |  26 +
 arch/arm/imx-common/cpu.c |   2 +
 arch/arm/include/asm/arch-imx/cpu.h   |   3 +-
 arch/arm/include/asm/arch-mx6/crm_regs.h  | 170 ++
 arch/arm/include/asm/arch-mx6/imx-regs.h  | 122 -
 arch/arm/include/asm/arch-mx6/mx6-ddr.h   |   4 +
 arch/arm/include/asm/arch-mx6/mx6sx-ddr.h |  45 
 8 files changed, 373 insertions(+), 10 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx6/mx6sx-ddr.h

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index bd65a08..25bee6c 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -214,10 +214,11 @@ static u32 get_uart_clk(void)
u32 reg, uart_podf;
u32 freq = decode_pll(PLL_USBOTG, MXC_HCLK) / 6; /* static divider */
reg = __raw_readl(&imx_ccm->cscdr1);
-#ifdef CONFIG_MX6SL
-   if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
-   freq = MXC_HCLK;
-#endif
+
+   if (is_cpu_type(MXC_CPU_MX6SL) || is_cpu_type(MXC_CPU_MX6SX))
+   if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
+   freq = MXC_HCLK;
+
reg &= MXC_CCM_CSCDR1_UART_CLK_PODF_MASK;
uart_podf = reg >> MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET;
 
@@ -282,7 +283,7 @@ static u32 get_emi_slow_clk(void)
return root_freq / (emi_slow_podf + 1);
 }
 
-#ifdef CONFIG_MX6SL
+#if (defined(CONFIG_MX6SL) || defined(CONFIG_MX6SX))
 static u32 get_mmdc_ch0_clk(void)
 {
u32 cbcmr = __raw_readl(&imx_ccm->cbcmr);
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 1725279..e394e3f 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -79,9 +79,15 @@ u32 __weak get_board_rev(void)
 void init_aips(void)
 {
struct aipstz_regs *aips1, *aips2;
+#ifdef CONFIG_MX6SX
+   struct aipstz_regs *aips3;
+#endif
 
aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR;
aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR;
+#ifdef CONFIG_MX6SX
+   aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR;
+#endif
 
/*
 * Set all MPROTx to be non-bufferable, trusted for R/W,
@@ -107,6 +113,26 @@ void init_aips(void)
writel(0x, &aips2->opacr2);
writel(0x, &aips2->opacr3);
writel(0x, &aips2->opacr4);
+
+#ifdef CONFIG_MX6SX
+   /*
+* Set all MPROTx to be non-bufferable, trusted for R/W,
+* not forced to user-mode.
+*/
+   writel(0x, &aips3->mprot0);
+   writel(0x, &aips3->mprot1);
+
+   /*
+* Set all OPACRx to be non-bufferable, not require
+* supervisor privilege level for access,allow for
+* write access and untrusted master access.
+*/
+   writel(0x, &aips3->opacr0);
+   writel(0x, &aips3->opacr1);
+   writel(0x, &aips3->opacr2);
+   writel(0x, &aips3->opacr3);
+   writel(0x, &aips3->opacr4);
+#endif
 }
 
 static void clear_ldo_ramp(void)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 5a09107..7bb0e83 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -112,6 +112,8 @@ const char *get_imx_type(u32 imxtype)
return "6SOLO"; /* Solo version of the mx6 */
case MXC_CPU_MX6SL:
return "6SL";   /* Solo-Lite version of the mx6 */
+   case MXC_CPU_MX6SX:
+   return "6SX";   /* SoloX version of the mx6 */
case MXC_CPU_MX51:
return "51";
case MXC_CPU_MX53:
diff --git a/arch/arm/include/asm/arch-imx/cpu.h 
b/arch/arm/include/asm/arch-imx/cpu.h
index a35940e..a3cc96f 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -8,6 +8,7 @@
 #define MXC_CPU_MX53   0x53
 #define MXC_CPU_MX6SL  0x60
 #define MXC_CPU_MX6DL  0x61
-#define MXC_CPU_MX6SOLO0x62
+#define MXC_CPU_MX6SX  0x62
 #define MXC_CPU_MX6Q   0x63
 #define MXC_CPU_MX6D   0x64
+#define MXC_CPU_MX6SOLO0x65 /* dummy ID */
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h 
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 7202073..0fcef69 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -113,7 +113,11 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCR_WB_COUNT_MASK  0x7
 #define MXC_CCM_CCR_WB_COUNT_OFFSET

Re: [U-Boot] [PATCH v3 1/4] mx6: Add support for the mx6solox variant

[Otavio Salvador]

On Mon, Jun 23, 2014 at 9:53 AM, Fabio Estevam  wrote:
> From: Fabio Estevam 
>
> mx6solox is the newest member of the mx6 family.
>
> Some of the new features on this variants are:
> - Cortex M4 microcontroller (besides the CortexA9)
> - Dual Gigabit Ethernet
>
> Add the initial support for it.
>
> Signed-off-by: Fabio Estevam 
> ---
> Changes since v2:
> - Improve commit log
> - Use is_cpu_type() when possible
>
>  arch/arm/cpu/armv7/mx6/clock.c|  11 +-
>  arch/arm/cpu/armv7/mx6/soc.c  |  26 +
>  arch/arm/imx-common/cpu.c |   2 +
>  arch/arm/include/asm/arch-imx/cpu.h   |   3 +-
>  arch/arm/include/asm/arch-mx6/crm_regs.h  | 170 
> ++
>  arch/arm/include/asm/arch-mx6/imx-regs.h  | 122 -
>  arch/arm/include/asm/arch-mx6/mx6-ddr.h   |   4 +
>  arch/arm/include/asm/arch-mx6/mx6sx-ddr.h |  45 
>  8 files changed, 373 insertions(+), 10 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-mx6/mx6sx-ddr.h
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index bd65a08..25bee6c 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -214,10 +214,11 @@ static u32 get_uart_clk(void)
> u32 reg, uart_podf;
> u32 freq = decode_pll(PLL_USBOTG, MXC_HCLK) / 6; /* static divider */
> reg = __raw_readl(&imx_ccm->cscdr1);
> -#ifdef CONFIG_MX6SL
> -   if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
> -   freq = MXC_HCLK;
> -#endif
> +
> +   if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6SX))
> +   if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
> +   freq = MXC_HCLK;
> +

typo, lacks SL support now.

> reg &= MXC_CCM_CSCDR1_UART_CLK_PODF_MASK;
> uart_podf = reg >> MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET;
>
> @@ -282,7 +283,7 @@ static u32 get_emi_slow_clk(void)
> return root_freq / (emi_slow_podf + 1);
>  }
>
> -#ifdef CONFIG_MX6SL
> +#if (defined(CONFIG_MX6SL) || defined(CONFIG_MX6SX))
>  static u32 get_mmdc_ch0_clk(void)
>  {
> u32 cbcmr = __raw_readl(&imx_ccm->cbcmr);
> diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
> index 1725279..e394e3f 100644
> --- a/arch/arm/cpu/armv7/mx6/soc.c
> +++ b/arch/arm/cpu/armv7/mx6/soc.c
> @@ -79,9 +79,15 @@ u32 __weak get_board_rev(void)
>  void init_aips(void)
>  {
> struct aipstz_regs *aips1, *aips2;
> +#ifdef CONFIG_MX6SX
> +   struct aipstz_regs *aips3;
> +#endif
>
> aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR;
> aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR;
> +#ifdef CONFIG_MX6SX
> +   aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR;
> +#endif
>
> /*
>  * Set all MPROTx to be non-bufferable, trusted for R/W,
> @@ -107,6 +113,26 @@ void init_aips(void)
> writel(0x, &aips2->opacr2);
> writel(0x, &aips2->opacr3);
> writel(0x, &aips2->opacr4);
> +
> +#ifdef CONFIG_MX6SX
> +   /*
> +* Set all MPROTx to be non-bufferable, trusted for R/W,
> +* not forced to user-mode.
> +*/
> +   writel(0x, &aips3->mprot0);
> +   writel(0x, &aips3->mprot1);
> +
> +   /*
> +* Set all OPACRx to be non-bufferable, not require
> +* supervisor privilege level for access,allow for
> +* write access and untrusted master access.
> +*/
> +   writel(0x, &aips3->opacr0);
> +   writel(0x, &aips3->opacr1);
> +   writel(0x, &aips3->opacr2);
> +   writel(0x, &aips3->opacr3);
> +   writel(0x, &aips3->opacr4);
> +#endif
>  }
>
>  static void clear_ldo_ramp(void)
> diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
> index 5a09107..7bb0e83 100644
> --- a/arch/arm/imx-common/cpu.c
> +++ b/arch/arm/imx-common/cpu.c
> @@ -112,6 +112,8 @@ const char *get_imx_type(u32 imxtype)
> return "6SOLO"; /* Solo version of the mx6 */
> case MXC_CPU_MX6SL:
> return "6SL";   /* Solo-Lite version of the mx6 */
> +   case MXC_CPU_MX6SX:
> +   return "6SX";   /* SoloX version of the mx6 */
> case MXC_CPU_MX51:
> return "51";
> case MXC_CPU_MX53:
> diff --git a/arch/arm/include/asm/arch-imx/cpu.h 
> b/arch/arm/include/asm/arch-imx/cpu.h
> index a35940e..a3cc96f 100644
> --- a/arch/arm/include/asm/arch-imx/cpu.h
> +++ b/arch/arm/include/asm/arch-imx/cpu.h
> @@ -8,6 +8,7 @@
>  #define MXC_CPU_MX53   0x53
>  #define MXC_CPU_MX6SL  0x60
>  #define MXC_CPU_MX6DL  0x61
> -#define MXC_CPU_MX6SOLO0x62
> +#define MXC_CPU_MX6SX  0x62
>  #define MXC_CPU_MX6Q   0x63
>  #define MXC_CPU_MX6D   0x64
> +#define MXC_CPU_MX6SOLO0x65 /* dummy ID */
> diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h 
> b/arch/arm/include/asm/arch-mx6/crm_regs

Re: [U-Boot] Running ARMv8 on fast model

[Steve Rae]

On 14-06-23 12:01 AM, Youngmin Nam wrote:

Hello expert.
I'm trying to run ARMv8 u-boot on fast model. Exactly on Coretex-A57×4 In
FVP_VE

When I run command "model_shell64 cadi_system_Linux64-Release-GCC-4.6.so
u-boot.elf"

There isn't any pop up xterm terminal.

My fast model version is 8.3 and I used vexpress_aemv8a configuration on
denx u-boot mainline.

Does any body test armv8 u-boot on fast model?



Yes - but...
(1) I am testing vexpress_aemv8a_semi; which is not in master yet -- see:
http://patchwork.ozlabs.org/patch/357577/
(2) I have inherited a script which "does everything"... However, the 
fundamental piece is:
	./Linux-Release-GCC-4.6/isim_system -C pctl.startup=0.0.0.0 -C 
bp.secure_memory=0 -C cache_state_modelled=0 -C 
bp.pl011_uart0.untimed_fifos=1 -C bp.secureflashloader.fname=bl1.bin


Note: this process actually launches a bootloader (bl1.bin); which is 
then used to launch U-Boot...


I hope this helps,
Thanks, Steve




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[U-Boot] [Patch v3] Add TQ Systems TQMa6 board support

[Markus Niebel]

From: Markus Niebel 

This patch adds the changes to boards.cfg and the board directory
under board/tqc.

TQMa6 is a family of modules based on Freescale i.MX6. It consists of
TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3
TQMa6S (i.MX6 Solo)  featuring eMMC and 512 MiB DDR3

The modules need a baseboard. Initially the MBa6x starterkit mainboard is
supported. To easy support for other mainboards the functionality is splitted
in one file for the module (tqma6.c) and one file for the baseboard (tqma6_
mba6).

The modules can be boot from eMMC (on USDHC3) and SPI flash.

The following features are supported:
- MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard)
- Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6 
module.
  The phy needs special configurations for the pad skew registers to adjust for
  the signal routing.
  Also support for standard ethernet commands and uppdate via tftp.
- SPI: ECSPI1 with bootable serial flash on module and two additional
  chip selects on MBa6x
- I2C: This patch adds support for the I2C busses on the TQMa6 modules (I2C3)
  and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6 and 
MBa6x
  are also configured.
- USB: high speed host 1 on MBa6x and support for USB storage
- PMIC: support for pfuze 100 on TQMa6

Signed-off-by: Markus Niebel 
---
History:

- changes for v3:
  - squash the patches as suggested by S. Babic
  - fix copy and paste error for MBa6x SD-Card slot
  - fix WP handling for MBa6x SD-Card slot
  - move PMIC init to board_late_init (power_init_board() does not work)

- changes for v2:
  - fix long line warning as suggested by W. Denk
  - remove baudrate from CONFIG_EXTRA_ENV_SETTINGS
  - remove unused define CONFIG_TQMA6X_BASEBOARD_NAME
  - add missing mmcblkdev definition to mmcboot logic in 
CONFIG_EXTRA_ENV_SETTINGS
  - add missing stuff for tftp and nfs in CONFIG_EXTRA_ENV_SETTINGS
  - fix fdt_file in env (was partially fdt)
  - add missing int power_init_board(void) to tqma6.c

 board/tqc/tqma6/Makefile |9 +
 board/tqc/tqma6/README   |   35 
 board/tqc/tqma6/clocks.cfg   |   24 +++
 board/tqc/tqma6/tqma6.c  |  258 +++
 board/tqc/tqma6/tqma6_bb.h   |   30 +++
 board/tqc/tqma6/tqma6_mba6.c |  352 +++
 board/tqc/tqma6/tqma6q.cfg   |  125 +++
 board/tqc/tqma6/tqma6s.cfg   |  125 +++
 boards.cfg   |4 +
 include/configs/tqma6.h  |  477 ++
 10 files changed, 1439 insertions(+)
 create mode 100644 board/tqc/tqma6/Makefile
 create mode 100644 board/tqc/tqma6/README
 create mode 100644 board/tqc/tqma6/clocks.cfg
 create mode 100644 board/tqc/tqma6/tqma6.c
 create mode 100644 board/tqc/tqma6/tqma6_bb.h
 create mode 100644 board/tqc/tqma6/tqma6_mba6.c
 create mode 100644 board/tqc/tqma6/tqma6q.cfg
 create mode 100644 board/tqc/tqma6/tqma6s.cfg
 create mode 100644 include/configs/tqma6.h

diff --git a/board/tqc/tqma6/Makefile b/board/tqc/tqma6/Makefile
new file mode 100644
index 000..9ee6920
--- /dev/null
+++ b/board/tqc/tqma6/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2014, Markus Niebel 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := tqma6.o
+
+obj-$(CONFIG_MBA6) += tqma6_mba6.o
diff --git a/board/tqc/tqma6/README b/board/tqc/tqma6/README
new file mode 100644
index 000..2c012e7
--- /dev/null
+++ b/board/tqc/tqma6/README
@@ -0,0 +1,35 @@
+U-Boot for the TQ Systems TQMa6 modules
+
+This file contains information for the port of
+U-Boot to the TQ Systems TQMa6 modules.
+
+1. Boot source
+--
+
+The following boot source is supported:
+
+- SD/eMMC
+- SPI NOR
+
+2. Building
+
+
+To build U-Boot for the TQ Systems TQMa6 modules:
+
+   make tqma6___config
+   make
+
+x is a placeholder for the CPU variant
+q - means i.MX6Q/D: TQMa6Q (i.MX6Q) and TQMa6D  (i.MX6D)
+s - means i.MX6S: TQMa6S  (i.MX6S)
+
+baseboard is a placeholder for the boot device
+mmc - means eMMC
+spi - mean SPI NOR
+
+This gives the following configurations:
+
+tqma6q_mba6_mmc_config
+tqma6q_mba6_spi_config
+tqma6s_mba6_mmc_config
+tqma6s_mba6_spi_config
diff --git a/board/tqc/tqma6/clocks.cfg b/board/tqc/tqma6/clocks.cfg
new file mode 100644
index 000..d9dd273
--- /dev/null
+++ b/board/tqc/tqma6/clocks.cfg
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2013 Boundary Devices
+ * Copyright (C) 2013, 2014 Markus Niebel 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Refer doc/README.imximage for more details about how-to configure
+ * and create imximage boot image
+ */
+
+/* set the default clock gate to save power */
+DATA 4, CCM_CCGR0, 0x00C03F3F
+DATA 4, CCM_CCGR1, 0x0030FC03
+DATA 4, CCM_CCGR2, 0x0FFFC000
+DATA 4, CCM_CCGR3, 0x3FF0
+DATA 4, CCM_CCGR4, 0x00FFF300
+DATA 4, CCM_CCGR5, 0x0FC3
+DATA 4, CCM_CCGR6, 0x03FF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+DATA 4, MX6_IOMUXC_GPR4, 0xF0CF
+/* set IPU AXI-id0 Qos=

Re: [U-Boot] [U-boot] [Patch v2 3/3] k2hk: change default nand ecc layout

[Ivan Khoronzhuk]

On 06/21/2014 02:40 AM, Scott Wood wrote:

On Sat, 2014-06-21 at 02:28 +0300, Ivan Khoronzhuk wrote:

For keystyone k2hk board the default nand layout is different
from davinci. So swich ecc layout at init in board file.

Signed-off-by: Ivan Khoronzhuk 
---
  board/ti/k2hk_evm/board.c | 11 +++
  1 file changed, 11 insertions(+)

diff --git a/board/ti/k2hk_evm/board.c b/board/ti/k2hk_evm/board.c
index ef90f9d..baa6ab7 100644
--- a/board/ti/k2hk_evm/board.c
+++ b/board/ti/k2hk_evm/board.c
@@ -11,6 +11,7 @@
  #include 
  #include 
  #include 
+#include 
  
  #include 

  #include 
@@ -19,6 +20,7 @@
  #include 
  #include 
  #include 
+#include 
  
  DECLARE_GLOBAL_DATA_PTR;
  
@@ -147,6 +149,15 @@ int cpu_to_bus(u32 *ptr, u32 length)

return 0;
  }
  
+int board_nand_init(struct nand_chip *chip)

+{
+   davinci_nand_init(chip);
+   chip->ecc.layout =
+   board_nand_get_ecclayout(NAND_KEYSTONE_RBL_4BIT_LAYOUT);
+
+   return 0;
+}

Shouldn't you be calling board_nand_set_ecclayout()?  How will oobavail
get set?


There is no reason to set oobavail here, I suppose that's done while int 
nand_scan_tail().




Is it really OK to start with the wrong ECC layout and switch later?


It can be used to boot from nand.


Are you depending on lazy scanning of the BBT?


No, define CONFIG_SYS_NAND_USE_FLASH_BBT



For that matter, you also seem to be assuming that markbad will never be
called when the ECC is set to something other than what the BBT uses.

-Scott



I suppose that only ECC layout is different.

--
Regards,
Ivan Khoronzhuk

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Re: [U-Boot] [PATCH v4 0/3] mtd, ubi, ubifs: resync with Linux-3.14

[Tom Rini]

On Sun, Jun 22, 2014 at 09:36:43AM +0200, Wolfgang Denk wrote:
> Dear Heiko,
> 
> In message <53a67ed9.2090...@denx.de> you wrote:
> > 
> > And I have no chance to detect this difference, when using
> > "git am -3 ..." ... it just remains in the code ...
> > 
> > I vote for copying the linux files, marking U-Boot specific code
> > with __UBOOT__ ...
> 
> Given the complexity of the code  - and of the changes added in U-Boot
> to the original (old) Linux code (which were done over a period of
> time) - I think indeed that your original approach is the better one;
> better both in the sense of requiring less efforts (for creating and
> verifying that all chanes were covered), and less risk to miss
> individual modifications either from the Linux or from the U-Boot
> side.
> 
> Scott, I agree that your suggestion is what usually should work fine,
> but here it apparently fails in a number of places that would be time
> consuming to sort out - and I would expect that the same would happen
> again whenever we update to another new version of the Linux code
> base.  So I think we should stick with Heiko's approach here; it
> documents clearly what he did, it looks complete, and it is working.
> I think it would be a waste of time to redo all the work, just
> differently.

OK, lets try this.  One worry at the back of my mind is the fallout we
had when we re-synced to v3.7.1 and tested things as best we were able
to prior to merge.  I think it's too late in the cycle to pull this in
for v2014.07, but lets get something in for v2014.10.  And since v3.15
is already out, lets do (as part of testing our theories out), a follow
up patch to sync up with v3.15.  And finally, I think we need, in order
to keep this pain point down, sync per kernel release.

-- 
Tom


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Re: [U-Boot] [PATCH v7 1/2] lib, fdt: move fdtdec_get_int() out of lib/fdtdec.c

[Tom Rini]

On Sun, Jun 22, 2014 at 06:33:29AM +0200, Heiko Schocher wrote:

> move fdtdec_get_int() out of lib/fdtdec.c into lib/fdtdec_common.c
> as this function is also used, if CONFIG_OF_CONTROL is not
> used. Poped up on the ids8313 board using signed FIT images,
> and activating CONFIG_SYS_GENERIC_BOARD. Without this patch
> it shows on boot:
> 
> No valid FDT found - please append one to U-Boot binary, use u-boot-dtb.bin 
> or define CONFIG_OF_EMBED. For sandbox, use -d 
> 
> With this patch, it boots again with CONFIG_SYS_GENERIC_BOARD
> enabled.
> 
> Signed-off-by: Heiko Schocher 
> Acked-by: Simon Glass 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v7 2/2] mpc8313: add CONFIG_SYS_GENERIC_BOARD to ids8313 board

[Tom Rini]

On Sun, Jun 22, 2014 at 06:33:30AM +0200, Heiko Schocher wrote:

> - add CONFIG_SYS_GENERIC_BOARD
> - remove CONFIG_OF_CONTROL to boot again
> 
> Signed-off-by: Heiko Schocher 
> Acked-by: Kim Phillips 
> Acked-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] m68k: Build problems on some boards

[Tom Rini]

On Sun, Jun 22, 2014 at 12:19:21PM +0300, Vasili Galka wrote:
> I'll really appreciate any help on this.
> 
> On Sun, Jun 15, 2014 at 3:57 PM, Vasili Galka  wrote:
> > Hi,
> >
> > I've installed a m68k-elf toolchain (based on gcc 4.8.1) and tried
> > building all m68k boards on latest u-boot/master (MAKEALL -a m68k).
> > While the build succeeds for most of the boards, the following four
> > fail with similar errors:
> > TASREG M5249EVB M5253DEMO M5253EVBE
> >
> > m68k-elf-ld.bfd: m68k:isa-a:mac architecture of input file
> > `/usr/m68k-elf/lib/gcc/m68k-elf/4.8.1/m5206e/libgcc.a(_float.o)' is
> > incompatible with m68k:isa-a:emac output
> > m68k-elf-ld.bfd: m68k:isa-a:mac architecture of input file
> > `/usr/m68k-elf/lib/gcc/m68k-elf/4.8.1/m5206e/libgcc.a(_floatex.o)' is
> > incompatible with m68k:isa-a:emac output
> > m68k-elf-ld.bfd: m68k:isa-a:mac architecture of input file
> > `/usr/m68k-elf/lib/gcc/m68k-elf/4.8.1/m5206e/libgcc.a(_muldi3.o)' is
> > incompatible with m68k:isa-a:emac output
> > ...
> >
> > AFAIU, the architecture of chosen libgcc differs from the
> > architecture of generated object files (one has mac while the other
> > emac).
> >
> > I'm not really familiar with m68k arch... What is wrong here and how
> > should be fixed?
> >
> > Best regards,
> > Vasili

Jason, is there a toolchain that can work for all m68k boards?  Should
we start removing some boards perhaps?

-- 
Tom


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Re: [U-Boot] [RFC PATCH 0/3] Implement "fastboot flash" for eMMC

[Lukasz Majewski]

Hi Steve,

> 
> 
> On 14-06-19 11:32 PM, Marek Vasut wrote:
> > On Friday, June 20, 2014 at 08:18:42 AM, Lukasz Majewski wrote:
> >> Hi Steve,
> >>
> >>> This series implements the "fastboot flash" command for eMMC
> >>> devices. It supports both raw and sparse images.
> >>>
> >>> NOTES:
> >>> - the support for the "fastboot flash" command is enabled with
> >>> CONFIG_FASTBOOT_FLASH
> >>> - the support for eMMC is enabled with
> >>> CONFIG_FASTBOOT_FLASH_MMC_DEV
> >>> - (future) the support for NAND would be enabled with
> >>> CONFIG_FASTBOOT_FLASH_NAND(???)
> >>> - thus the proposal is to place the code in common/fb_mmc.c and
> >>> (future) common/fb_nand.c(???), however, this may not be the
> >>> appropriate location
> >>
> >> Would you consider another approach for providing flashing backend
> >> for fastboot?
> >>
> >> I'd like to propose reusing of the dfu flashing code for this
> >> purpose. Such approach has been used successfully with USB "thor"
> >> downloading function.
> >>
> >> Since the "fastboot" is using gadget infrastructure (thanks to the
> >> effort of Rob Herring) I think that it would be feasible to reuse
> >> the same approach as "thor" does. In this way the low level code
> >> would be kept in one place and we could refine and test it more
> >> thoroughly.
> >
> > I'm all for this approach as well if possible.
> >
> > Best regards,
> > Marek Vasut
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> >
> 
> I have briefly investigated this suggestion
> And have 'hacked' some code as follows:
> 
> --- common/fb_mmc.c_000   2014-06-20 14:13:43.271158073 -0700
> +++ common/fb_mmc.c_001   2014-06-20 14:17:48.688072764 -0700
>   while (remaining_chunks) {
>   switch (le16_to_cpu(c_header->chunk_type)) {
>   case CHUNK_TYPE_RAW:
> +#if 0
>   blkcnt =
>   (le32_to_cpu(c_header->chunk_sz)
> * blk_sz) / info.blksz;
>   buffer =
>   (void *)c_header +
>   le16_to_cpu(s_header->chunk_hdr_sz);
> 
>   blks =
> mmc_dev->block_write(mmc_dev->dev, blk, blkcnt, buffer);
>   if (blks != blkcnt) {
>   printf("Write failed
> %lu\n", blks); strcpy(response,
>  "FAILmmc write
> failure"); return;
>   }
> 
>   bytes_written += blkcnt *
> info.blksz; +#else
> + buffer =
> + (void *)c_header +
> +
> le16_to_cpu(s_header->chunk_hdr_sz); +
> + len =
> le32_to_cpu(c_header->chunk_sz) * blk_sz;
> + ret_dfu = dfu_write_medium_mmc(dfu,
> offset,
> +
> buffer, &len);
> + if (ret_dfu) {
> + printf("Write failed %lu\n",
> len);
> + strcpy(response,
> +"FAILmmc write
> failure");
> + return;
> + }
> +
> +
> + bytes_written += len;
> +#endif
>   break;
> 
>   case CHUNK_TYPE_FILL:
>   case CHUNK_TYPE_DONT_CARE:
>   case CHUNK_TYPE_CRC32:
>   /* do nothing */
>   break;
> 
>   default:
>   /* error */
>   printf("Unknown chunk type\n");
>   strcpy(response,
>  "FAILunknown chunk type in
> sparse image"); return;
>   }
> 
> +#if 0
>   blk += (le32_to_cpu(c_header->chunk_sz) *
> blk_sz) / info.blksz;
> +#else
> + offset += le32_to_cpu(c_header->chunk_sz) *
> blk_sz; +#endif
>   c_header = (chunk_header_t *)((void
> *)c_header + le32_to_cpu(c_header->total_sz));
>   remaining_chunks--;
>   }
> 
> 
> --- common/fb_mmc.c_000   2014-06-20 14:13:43.271158073 -0700
> +++ common/fb_mmc.c_001   2014-06-20 14:17:48.688072764 -0700
>   /* raw image */
> 
> +#if 0
>   /* determine number of blocks to write */
>   blkcnt =
>   ((download_bytes + (info.blksz - 1)) &
> ~(info.blksz - 1)); blkcnt = blkcnt / info.blksz;
> 
>   if (blkcnt > info.size) {
>   printf("%s: too large for partition:
> '%s'\n", __func__, cmd);
>   strcpy(response, "FAILtoo large for
> partition"); return;
> 

[U-Boot] [PATCH v3 1/4] mx6: Add support for the mx6solox variant

[Fabio Estevam]

From: Fabio Estevam 

mx6solox is the newest member of the mx6 family.

Some of the new features on this variants are:
- Cortex M4 microcontroller (besides the CortexA9)
- Dual Gigabit Ethernet

Add the initial support for it.

Signed-off-by: Fabio Estevam 
---
Changes since v2:
- Improve commit log
- Use is_cpu_type() when possible

 arch/arm/cpu/armv7/mx6/clock.c|  11 +-
 arch/arm/cpu/armv7/mx6/soc.c  |  26 +
 arch/arm/imx-common/cpu.c |   2 +
 arch/arm/include/asm/arch-imx/cpu.h   |   3 +-
 arch/arm/include/asm/arch-mx6/crm_regs.h  | 170 ++
 arch/arm/include/asm/arch-mx6/imx-regs.h  | 122 -
 arch/arm/include/asm/arch-mx6/mx6-ddr.h   |   4 +
 arch/arm/include/asm/arch-mx6/mx6sx-ddr.h |  45 
 8 files changed, 373 insertions(+), 10 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx6/mx6sx-ddr.h

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index bd65a08..25bee6c 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -214,10 +214,11 @@ static u32 get_uart_clk(void)
u32 reg, uart_podf;
u32 freq = decode_pll(PLL_USBOTG, MXC_HCLK) / 6; /* static divider */
reg = __raw_readl(&imx_ccm->cscdr1);
-#ifdef CONFIG_MX6SL
-   if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
-   freq = MXC_HCLK;
-#endif
+
+   if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6SX))
+   if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
+   freq = MXC_HCLK;
+
reg &= MXC_CCM_CSCDR1_UART_CLK_PODF_MASK;
uart_podf = reg >> MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET;
 
@@ -282,7 +283,7 @@ static u32 get_emi_slow_clk(void)
return root_freq / (emi_slow_podf + 1);
 }
 
-#ifdef CONFIG_MX6SL
+#if (defined(CONFIG_MX6SL) || defined(CONFIG_MX6SX))
 static u32 get_mmdc_ch0_clk(void)
 {
u32 cbcmr = __raw_readl(&imx_ccm->cbcmr);
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 1725279..e394e3f 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -79,9 +79,15 @@ u32 __weak get_board_rev(void)
 void init_aips(void)
 {
struct aipstz_regs *aips1, *aips2;
+#ifdef CONFIG_MX6SX
+   struct aipstz_regs *aips3;
+#endif
 
aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR;
aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR;
+#ifdef CONFIG_MX6SX
+   aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR;
+#endif
 
/*
 * Set all MPROTx to be non-bufferable, trusted for R/W,
@@ -107,6 +113,26 @@ void init_aips(void)
writel(0x, &aips2->opacr2);
writel(0x, &aips2->opacr3);
writel(0x, &aips2->opacr4);
+
+#ifdef CONFIG_MX6SX
+   /*
+* Set all MPROTx to be non-bufferable, trusted for R/W,
+* not forced to user-mode.
+*/
+   writel(0x, &aips3->mprot0);
+   writel(0x, &aips3->mprot1);
+
+   /*
+* Set all OPACRx to be non-bufferable, not require
+* supervisor privilege level for access,allow for
+* write access and untrusted master access.
+*/
+   writel(0x, &aips3->opacr0);
+   writel(0x, &aips3->opacr1);
+   writel(0x, &aips3->opacr2);
+   writel(0x, &aips3->opacr3);
+   writel(0x, &aips3->opacr4);
+#endif
 }
 
 static void clear_ldo_ramp(void)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 5a09107..7bb0e83 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -112,6 +112,8 @@ const char *get_imx_type(u32 imxtype)
return "6SOLO"; /* Solo version of the mx6 */
case MXC_CPU_MX6SL:
return "6SL";   /* Solo-Lite version of the mx6 */
+   case MXC_CPU_MX6SX:
+   return "6SX";   /* SoloX version of the mx6 */
case MXC_CPU_MX51:
return "51";
case MXC_CPU_MX53:
diff --git a/arch/arm/include/asm/arch-imx/cpu.h 
b/arch/arm/include/asm/arch-imx/cpu.h
index a35940e..a3cc96f 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -8,6 +8,7 @@
 #define MXC_CPU_MX53   0x53
 #define MXC_CPU_MX6SL  0x60
 #define MXC_CPU_MX6DL  0x61
-#define MXC_CPU_MX6SOLO0x62
+#define MXC_CPU_MX6SX  0x62
 #define MXC_CPU_MX6Q   0x63
 #define MXC_CPU_MX6D   0x64
+#define MXC_CPU_MX6SOLO0x65 /* dummy ID */
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h 
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 7202073..0fcef69 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -113,7 +113,11 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CCR_WB_COUNT_MASK  0x7
 #define MXC_CCM_CCR_WB_COUNT_OFFSET(1 << 16)
 #define MXC_CCM_CCR_COSC_EN 

[U-Boot] [PATCH v3 3/4] mx6: clock: Do not enable sata and ipu clocks

[Fabio Estevam]

From: Fabio Estevam 

mx6sx does not have sata nor ipu blocks, so do not handle such clocks.

Signed-off-by: Fabio Estevam 
---
Changes since v2:
- None
Changes since v1:
- None

 arch/arm/cpu/armv7/mx6/clock.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index d31fbbd..51c964c 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -437,6 +437,7 @@ static int enable_enet_pll(uint32_t en)
return 0;
 }
 
+#ifndef CONFIG_MX6SX
 static void ungate_sata_clock(void)
 {
struct mxc_ccm_reg *const imx_ccm =
@@ -445,6 +446,7 @@ static void ungate_sata_clock(void)
/* Enable SATA clock. */
setbits_le32(&imx_ccm->CCGR5, MXC_CCM_CCGR5_SATA_MASK);
 }
+#endif
 
 static void ungate_pcie_clock(void)
 {
@@ -455,11 +457,13 @@ static void ungate_pcie_clock(void)
setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_PCIE_MASK);
 }
 
+#ifndef CONFIG_MX6SX
 int enable_sata_clock(void)
 {
ungate_sata_clock();
return enable_enet_pll(BM_ANADIG_PLL_ENET_ENABLE_SATA);
 }
+#endif
 
 int enable_pcie_clock(void)
 {
@@ -491,7 +495,9 @@ int enable_pcie_clock(void)
clrbits_le32(&ccm_regs->cbcmr, MXC_CCM_CBCMR_PCIE_AXI_CLK_SEL);
 
/* Party time! Ungate the clock to the PCIe. */
+#ifndef CONFIG_MX6SX
ungate_sata_clock();
+#endif
ungate_pcie_clock();
 
return enable_enet_pll(BM_ANADIG_PLL_ENET_ENABLE_SATA |
@@ -573,6 +579,7 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return 0;
 }
 
+#ifndef CONFIG_MX6SX
 void enable_ipu_clock(void)
 {
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -581,6 +588,7 @@ void enable_ipu_clock(void)
reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK;
writel(reg, &mxc_ccm->CCGR3);
 }
+#endif
 /***/
 
 U_BOOT_CMD(
-- 
1.8.3.2

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[U-Boot] [PATCH v3 4/4] mx6sx: Add initial support for mx6sxsabresd board

[Fabio Estevam]

From: Fabio Estevam 

Signed-off-by: Fabio Estevam 
---
Changes since v2:
- Adjust CONFIG_LOADADDR
Changes since v1:
- Previous commit log belonged to 1/4 patch, so moved it to the correct patch

 board/freescale/mx6sxsabresd/Makefile   |   6 +
 board/freescale/mx6sxsabresd/imximage.cfg   | 105 
 board/freescale/mx6sxsabresd/mx6sxsabresd.c |  95 ++
 boards.cfg  |   1 +
 include/configs/mx6sxsabresd.h  | 186 
 5 files changed, 393 insertions(+)
 create mode 100644 board/freescale/mx6sxsabresd/Makefile
 create mode 100644 board/freescale/mx6sxsabresd/imximage.cfg
 create mode 100644 board/freescale/mx6sxsabresd/mx6sxsabresd.c
 create mode 100644 include/configs/mx6sxsabresd.h

diff --git a/board/freescale/mx6sxsabresd/Makefile 
b/board/freescale/mx6sxsabresd/Makefile
new file mode 100644
index 000..97dbfda
--- /dev/null
+++ b/board/freescale/mx6sxsabresd/Makefile
@@ -0,0 +1,6 @@
+# (C) Copyright 2014 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := mx6sxsabresd.o
diff --git a/board/freescale/mx6sxsabresd/imximage.cfg 
b/board/freescale/mx6sxsabresd/imximage.cfg
new file mode 100644
index 000..406dece
--- /dev/null
+++ b/board/freescale/mx6sxsabresd/imximage.cfg
@@ -0,0 +1,105 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#define __ASSEMBLY__
+#include 
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi/sd/nand/onenand, qspi/nor
+ */
+
+BOOT_FROM  sd
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type   AddressValue
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address   absolute address of the register
+ * value value to be stored in the register
+ */
+
+DATA 4 0x020c4068 0x
+DATA 4 0x020c406c 0x
+DATA 4 0x020c4070 0x
+DATA 4 0x020c4074 0x
+DATA 4 0x020c4078 0x
+DATA 4 0x020c407c 0x
+DATA 4 0x020c4080 0x
+DATA 4 0x020c4084 0x
+
+DATA 4 0x020e0618 0x000c
+DATA 4 0x020e05fc 0x
+DATA 4 0x020e032c 0x0030
+
+DATA 4 0x020e0300 0x0030
+DATA 4 0x020e02fc 0x0030
+DATA 4 0x020e05f4 0x0030
+DATA 4 0x020e0340 0x0030
+
+DATA 4 0x020e0320 0x
+DATA 4 0x020e0310 0x0030
+DATA 4 0x020e0314 0x0030
+DATA 4 0x020e0614 0x0030
+
+DATA 4 0x020e05f8 0x0002
+DATA 4 0x020e0330 0x0030
+DATA 4 0x020e0334 0x0030
+DATA 4 0x020e0338 0x0030
+DATA 4 0x020e033c 0x0030
+DATA 4 0x020e0608 0x0002
+DATA 4 0x020e060c 0x0030
+DATA 4 0x020e0610 0x0030
+DATA 4 0x020e061c 0x0030
+DATA 4 0x020e0620 0x0030
+DATA 4 0x020e02ec 0x0030
+DATA 4 0x020e02f0 0x0030
+DATA 4 0x020e02f4 0x0030
+DATA 4 0x020e02f8 0x0030
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b080c 0x00270025
+DATA 4 0x021b0810 0x001B001E
+DATA 4 0x021b083c 0x4144013C
+DATA 4 0x021b0840 0x01300128
+DATA 4 0x021b0848 0x4044464A
+DATA 4 0x021b0850 0x3A383C34
+DATA 4 0x021b081c 0x
+DATA 4 0x021b0820 0x
+DATA 4 0x021b0824 0x
+DATA 4 0x021b0828 0x
+DATA 4 0x021b08b8 0x0800
+DATA 4 0x021b0004 0x0002002d
+DATA 4 0x021b0008 0x00333030
+DATA 4 0x021b000c 0x676b52f3
+DATA 4 0x021b0010 0xb66d8b63
+DATA 4 0x021b0014 0x01ff00db
+DATA 4 0x021b0018 0x00011740
+DATA 4 0x021b001c 0x8000
+DATA 4 0x021b002c 0x26d2
+DATA 4 0x021b0030 0x006b1023
+DATA 4 0x021b0040 0x005f
+DATA 4 0x021b 0x8419
+DATA 4 0x021b001c 0x04008032
+DATA 4 0x021b001c 0x8033
+DATA 4 0x021b001c 0x00068031
+DATA 4 0x021b001c 0x05208030
+DATA 4 0x021b001c 0x04008040
+DATA 4 0x021b0020 0x0800
+DATA 4 0x021b0818 0x0007
+DATA 4 0x021b001c 0x
+
+DATA 4 0x021b083c 0x41400138
+DATA 4 0x021b0840 0x012C011C
+DATA 4 0x021b0848 0x3C3C4044
+DATA 4 0x021b0850 0x34343638
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c 
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
new file mode 100644
index 000..ff4c88f
--- /dev/null
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * Author: Fabio Estevam 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |   \
+   PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |   \
+   PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_SIZE;
+
+   return 0;
+}
+
+stati

Re: [U-Boot] [PATCH 09/10] CONFIGS: peach-pit: Enable display for peach_pit board

[Simon Glass]

Hi Ajay,

On 20 June 2014 00:12, Ajay kumar  wrote:
> Simon,
>
> On Fri, Jun 20, 2014 at 9:08 AM, Simon Glass  wrote:
>> Hi Ajay,
>>
>> On 17 June 2014 03:06, Ajay Kumar  wrote:
>>> Enable drivers for FIMD, DP and parade bridge chip.
>>>
>>> Signed-off-by: Ajay Kumar 
>>> ---
>>>  include/configs/peach-pit.h | 10 ++
>>>  1 file changed, 10 insertions(+)
>>>
>>> diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h
>>> index 76b8d7a..88c093f 100644
>>> --- a/include/configs/peach-pit.h
>>> +++ b/include/configs/peach-pit.h
>>> @@ -22,4 +22,14 @@
>>>  #define CONFIG_SYS_PROMPT  "Peach # "
>>>  #define CONFIG_IDENT_STRING" for Peach"
>>>
>>> +#define CONFIG_VIDEO_PARADE
>>> +
>>> +/* Display */
>>> +#define CONFIG_LCD
>>> +#ifdef CONFIG_LCD
>>> +#define CONFIG_EXYNOS_FB
>>> +#define CONFIG_EXYNOS_DP
>>> +#define LCD_BPPLCD_COLOR16
>>> +#endif
>>> +
>>>  #endif /* __CONFIG_PEACH_PIT_H */
>>
>> Can this go in exynos5420.h? It seems to be common except for the PARADE bit.
> No. This patchset enables display only for peach_pit.
> So, we cannot move this to exynos5420.h.

OK. At some point I would like to come up with a generic board for
exynos5 and move pit/snow/spring/pi to that. But it can come later.

Regards,
Simon
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Re: [U-Boot] [PATCH 04/10] video: exynos_fimd: Add framework to disable FIMD sysmmu

[Simon Glass]

Hi Ajay,

On 20 June 2014 00:42, Ajay kumar  wrote:
> Hi Simon,
>
>
> On Fri, Jun 20, 2014 at 8:59 AM, Simon Glass  wrote:
>> On 17 June 2014 03:06, Ajay Kumar  wrote:
>>> On Exynos5420 and newer versions, the FIMD sysmmus are in
>>> "on state" by default.
>>> We have to disable them in order to make FIMD DMA work.
>>> This patch adds the required framework to exynos_fimd driver,
>>> and disables FIMD sysmmu on Exynos5420.
>>>
>>> Signed-off-by: Ajay Kumar 
>>
>> Acked-by: Simon Glass 
>> Tested-by: Simon Glass 
>>
>> (I assume this is the same device tree binding as Linux?)
> Actually, No!
> Kernel has a generic binding named "samsung,sysmmu-v3.3", and it is common
> for all sysmmu nodes. There is a seperate IOMMU driver to handle the same.
> We can port the device probing part from kernel to u-boot, but we would need
> to add seperate driver(since the name is generic) to handle the same.
> That driver, even though being generic, will be used only by FIMD
> sysmmus(that too, just to turn them off).

OK. I suppose you could add a very short new C file with a function
which finds the device tree node by its compatible string or whatever,
and then updates the hardware.

Regards,
Simon
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Re: [U-Boot] [PATCH v7 2/2] mpc8313: add CONFIG_SYS_GENERIC_BOARD to ids8313 board

[Simon Glass]

On 21 June 2014 22:33, Heiko Schocher  wrote:
>
> - add CONFIG_SYS_GENERIC_BOARD
> - remove CONFIG_OF_CONTROL to boot again
>
> Signed-off-by: Heiko Schocher 
> Acked-by: Kim Phillips 
> Cc: Simon Glass 

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH] patman: Only apply patches when we know the original HEAD

[Simon Glass]

+Doug who may have some thoughts here.

HI Masahiro,

On 23 June 2014 00:28, Masahiro Yamada  wrote:

> Hi Simon,
>
> On Sun, 22 Jun 2014 22:54:43 -0600
> Simon Glass  wrote:
>
> > Hi,
> >
> > On Jun 22, 2014 10:23 PM, "Fabio Estevam"  wrote:
> > >
> > > On Mon, Jun 23, 2014 at 12:39 AM, Simon Glass 
> wrote:
> > >
> > > > The whitespace problems are not common but they do happen sometimes -
> > > > or at least I have seen it at times. Unless perhaps checkpatch has
> got
> > > > smarter?
> > >
> > > Couldn't ./scripts/cleanpatch be used to fix the whitespace issues?
> >
> > Maybe. If you know how to test this please give it a try.
>
> Note, I do understand all the questions, but the problem is I am not
completely sure how this happens.


> Does Patman fix the whitespace issues?
>
> No, it just runs 'git am' which will then report them.


>
> I'm getting confused.
>
> To make things clearer, please let me ask you some questions.
>
> [1] What does "whitespace errors" mean here?
>
>- Trailing whitespaces ?
>- Spaces before TAB indent ?
>- Or what else ?
>

Both of those, plus a blank line at EOF as I understand it.


>
> [2] What do you expect Patman to do when it finds those errors?
>   - Just display an error message ?
>

Yes (it displays an error from 'git am')


>  or
>   - Fix the issues automatically ?
>

No - apart from removing tags and adding notes patman avoids changing
patches as a matter of policy.

>
> [3] Which features were missing from scripts/checkpatch.pl
> when you wrote Patman first ?
>

It's really a belts-and-braces check that nothing will go wrong when the
patches are applied. I have had it report errors to me on my own patches,
although not recently. I'm not sure if it is still needed though.

Regards,
Simon
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Re: [U-Boot] [PATCH v2] thor: defer parsing of device string to IO backend

[Lukasz Majewski]

Hi Marek,

> On Monday, June 23, 2014 at 09:39:16 AM, Lukasz Majewski wrote:
> > Commit d4f5ef59cc7 "dfu: defer parsing of device string to IO
> > backend" changed the function signature of dfu_init_env_entities().
> > Adjust cmd_thordown.c to match that change.
> > 
> > Also, apply the same change as commit d6d37d737b58e "dfu: free
> > entities when parsing fails" to cmd_thordown.c.
> > 
> > Fixes: d4f5ef59cc7 ("dfu: defer parsing of device string to IO
> > backend")
> > 
> > Signed-off-by: Lukasz Majewski 
> 
> Did this go out twice ? 

I hope it didn't :-)

> What's the V2 changelog please ?

My bad - I wanted to send it ASAP :-)

The v2 was just a complete rewrite of the v1's commit message as it was
suggested by Stephen.

No code change was done.

> 
> Best regards,
> Marek Vasut


-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH v2 04/11] drivers:dfu: new feature: separated bootloader alt setting

[Przemyslaw Marczak]

On 06/18/2014 05:46 PM, Stephen Warren wrote:

On 06/18/2014 04:56 AM, Przemyslaw Marczak wrote:

On 06/17/2014 06:36 PM, Stephen Warren wrote:

...

I'd prefer that the dfu command didn't use any environment variables,
but rather required the user to always pass the list on the
command-line. Then, the user could invoke either:

dfu "foo mmc x..." # Manually specified
dfu $dfu_alt_info # Use 'user-defined' variable
dfu $dfu_alt_bootloaer # Use 'system-defined' variable


Yes, definitely such feature was missing there.

...

So summarizing, I don't want to break your DFU rework, I want just to
add the Odroid U3 support, so in the next patch set I will use the
$dfu_alt_info, instead of combining with a short time solution.


Which rework are you referring to? I'm not actively working on changing
the command-line parameters to the dfu command in any way. I've
certainly discussed how I'd prefer the dfu command to work, but I don't
have time to actually implement that. So, the existing command-line
format is likely to stay as it is for now.



Ah ok, my mistake. Anyway I will not touch this code at this time.

Regards,
--
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [Patch v2 0/7] Add support for TQMa6 modules

[Stefano Babic]

Hi Markus,

On 23/06/2014 11:52, Markus Niebel wrote:
> Hello Stefano,
> 
> Am 17.06.2014 19:58, schrieb Stefano Babic:
>> Hi Markus,
>>
>> On 17/06/2014 19:40, Markus Niebel wrote:
>>
 Is it not an attractive alternative for you ? Instead of having several
 entries in boards.cfg for each variation of your board, you could have
 maybe only one or a couple.
>>
>>> Sure it is - main difference will be boot devices.
>>
>> Right - I am expecting then an entry in boards.cfg for each media, that
>> is able to run on all SOCs.
>>
> 
> Do you mean, accepting the board needs the switch to SPL / single image
> support?

No, there is no block about it. My suggestion is to evaluate the
advantages of such solution.

> Or will the current solution - one entry for TQMa6 with MX6Q/D
> and one for TQMa6 with i.MX6S - be accepted?

As I said, no blocking point. It can still be accepted.


Best regards,
Stefano Babic


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Re: [U-Boot] [Patch v2 0/7] Add support for TQMa6 modules

[Markus Niebel]

Hello Stefano,

Am 17.06.2014 19:58, schrieb Stefano Babic:

Hi Markus,

On 17/06/2014 19:40, Markus Niebel wrote:


Is it not an attractive alternative for you ? Instead of having several
entries in boards.cfg for each variation of your board, you could have
maybe only one or a couple.



Sure it is - main difference will be boot devices.


Right - I am expecting then an entry in boards.cfg for each media, that
is able to run on all SOCs.



Do you mean, accepting the board needs the switch to SPL / single image 
support? Or will the current solution - one entry for TQMa6 with MX6Q/D 
and one for TQMa6 with i.MX6S - be accepted?



The env on different boot media
in one image is AFAIK not possible - so at the moment four configs are needed:
SP vs MMC and i.MX6Q/D vs i.MX6S (But this is slightly OT)


Well, SP vs MMC is right. But having an entry for all SOCs without
having to select one of it at compile time, it is really a plus ;-)

Best regards,
Stefano Babic



Best Regards

Markus
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Re: [U-Boot] [PATCH v2] thor: cosmetic: Update the cmd_thordown help message to present example usage

[Lukasz Majewski]

Dear all,

> Signed-off-by: Lukasz Majewski 
> ---
>  common/cmd_thordown.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/common/cmd_thordown.c b/common/cmd_thordown.c
> index 2dd7509..96f7d32 100644
> --- a/common/cmd_thordown.c
> +++ b/common/cmd_thordown.c
> @@ -64,7 +64,7 @@ exit:
>  
>  U_BOOT_CMD(thordown, CONFIG_SYS_MAXARGS, 1, do_thor_down,
>  "TIZEN \"THOR\" downloader",
> -"  \n"
> +"thor   \n"
>  "  - device software upgrade via LTHOR TIZEN dowload\n"
>  "program via  on device ,\n"
>  "attached to interface \n"

Please discard this patch. I need to devise more neat solution.

-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH] mx6: gpio: read data register if direction is out

[Klaus Goger]

On i.MX6 GPIOx_PSR does not reflect the current output value if the
direction is set to output. Instead we should read GPIOx_DR.

Signed-off-by: Klaus Goger 
---
 drivers/gpio/mxc_gpio.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 6a572d5..5838fc2 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -101,8 +101,16 @@ int gpio_get_value(unsigned gpio)
gpio &= 0x1f;
 
regs = (struct gpio_regs *)gpio_ports[port];
-
+#if defined(CONFIG_MX6)
+   /* if the direction is set to output we will always read 0 as pad 
status.
+* so we have to read the data register to get the current output state 
*/
+   if (readl(®s->gpio_dir) >> gpio & 0x01)
+   val = (readl(®s->gpio_dr) >> gpio & 0x01);
+   else
+   val = (readl(®s->gpio_psr) >> gpio) & 0x01;
+#else
val = (readl(®s->gpio_psr) >> gpio) & 0x01;
+#endif
 
return val;
 }
-- 
1.9.0

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[U-Boot] Running ARMv8 on fast model

[Youngmin Nam]

Hello expert.
I'm trying to run ARMv8 u-boot on fast model. Exactly on Coretex-A57×4 In
FVP_VE

When I run command "model_shell64 cadi_system_Linux64-Release-GCC-4.6.so
u-boot.elf"

There isn't any pop up xterm terminal.

My fast model version is 8.3 and I used vexpress_aemv8a configuration on
denx u-boot mainline.

Does any body test armv8 u-boot on fast model?
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[U-Boot] [PATCH v2] ARM: tegra: Disable VPR

[Alexandre Courbot]

From: Bryan Wu 

On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed.  For bootloader, we
probably don't care about VPR, so we disable it (which counts as programming
it, and allows those display-related registers to be accessed.

This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c
in Chromium OS U-Boot project.

Signed-off-by: Andrew Chew 
Signed-off-by: Jimmy Zhang 
Signed-off-by: Bryan Wu 
[acourbot: ensure write went through, vpr.c style changes]
Signed-off-by: Alexandre Courbot 
Cc: Tom Warren 
Cc: Stephen Warren 
Cc: Terje Bergstrom 
---
Changes since v1:
- Use proper defines for fields values
- Move MC layout to T124 arch as it is exclusive to it
- Only compile VPR support if T124 is enabled

 arch/arm/cpu/tegra-common/Makefile  |  1 +
 arch/arm/cpu/tegra-common/ap.c  |  3 ++
 arch/arm/cpu/tegra-common/vpr.c | 45 ++
 arch/arm/include/asm/arch-tegra/ap.h|  9 ++
 arch/arm/include/asm/arch-tegra124/mc.h | 49 +
 5 files changed, 107 insertions(+)
 create mode 100644 arch/arm/cpu/tegra-common/vpr.c
 create mode 100644 arch/arm/include/asm/arch-tegra124/mc.h

diff --git a/arch/arm/cpu/tegra-common/Makefile 
b/arch/arm/cpu/tegra-common/Makefile
index 892556e64451..a18c318739fa 100644
--- a/arch/arm/cpu/tegra-common/Makefile
+++ b/arch/arm/cpu/tegra-common/Makefile
@@ -14,3 +14,4 @@ obj-y += clock.o
 obj-y += lowlevel_init.o
 obj-y += pinmux-common.o
 obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
+obj-$(CONFIG_TEGRA124) += vpr.o
diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c
index 91d70da65661..a17dfd1e225e 100644
--- a/arch/arm/cpu/tegra-common/ap.c
+++ b/arch/arm/cpu/tegra-common/ap.c
@@ -163,4 +163,7 @@ void s_init(void)
 
/* init the cache */
config_cache();
+
+   /* init vpr */
+   config_vpr();
 }
diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/cpu/tegra-common/vpr.c
new file mode 100644
index ..1a442d9a40ef
--- /dev/null
+++ b/arch/arm/cpu/tegra-common/vpr.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+/* Tegra vpr routines */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Configures VPR.  Right now, all we do is turn it off. */
+void config_vpr(void)
+{
+   struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+
+   /* VPR is only in T114 and T124 */
+   switch (tegra_get_chip()) {
+   case CHIPID_TEGRA114:
+   case CHIPID_TEGRA124:
+   /* Turn off VPR */
+   writel(0, &mc->mc_video_protect_size_mb);
+   writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
+  &mc->mc_video_protect_reg_ctrl);
+   /* read back to ensure the write went through */
+   readl(&mc->mc_video_protect_reg_ctrl);
+   break;
+   default:
+   break;
+   }
+}
diff --git a/arch/arm/include/asm/arch-tegra/ap.h 
b/arch/arm/include/asm/arch-tegra/ap.h
index bc5851c1d045..5c8be94d9772 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -65,3 +65,12 @@ int tegra_get_sku_info(void);
 
 /* Do any chip-specific cache config */
 void config_cache(void);
+
+#if defined(CONFIG_TEGRA124)
+/* Do chip-specific vpr config */
+void config_vpr(void);
+#else
+static inline void config_vpr(void)
+{
+}
+#endif
diff --git a/arch/arm/include/asm/arch-tegra124/mc.h 
b/arch/arm/include/asm/arch-tegra124/mc.h
new file mode 100644
index ..d526dfe15c30
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra124/mc.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this pr

[U-Boot] [PATCH] integrator: switch to generic board

[Linus Walleij]

Turn on generic board for the integrators, as per the request in
the startup message. Everything just works, tested on the
Integrator/AP and Integrator/CP.

Signed-off-by: Linus Walleij 
---
 include/configs/integrator-common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/integrator-common.h 
b/include/configs/integrator-common.h
index 267a92b2d028..eac517aeeb1c 100644
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -26,6 +26,7 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_OF_LIBFDT   /* enable passing a Device Tree */
 #define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
+#define CONFIG_SYS_GENERIC_BOARD
 
 /*
  * There are various dependencies on the core module (CM) fitted
-- 
1.9.3

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Re: [U-Boot] [PATCH v4] Exynos: SPI: Fix reading data from SPI flash

[Minkyu Kang]

On 18/06/14 21:22, Akshay Saraswat wrote:
> SPI recieve and transfer code in exynos_spi driver has a logical bug.
> We read data in a variable which can hold an integer. Then we assign
> this integer 32 bit value to another variable which has data type uchar.
> Latter represents a unit of our recieve buffer. Everytime when we write
> a value to our recieve buffer we step ahead by 4 units when actually we
> wrote to one unit. This results in the loss of 3 bytes out of every 4
> bytes recieved. This patch intends to fix this bug.
> 
> Signed-off-by: Akshay Saraswat 
> Acked-by: Simon Glass 
> Tested-by: Simon Glass 
> ---
> Changes since v3:
>   - Rebased to top of Tree.
> Changes since v2:
>   - Added "Acked-by" & "Tested-by".
>   - Changed assignment for *rxp.
> Changes since v1:
>   - Added check for step.
> 
>  drivers/spi/exynos_spi.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.

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Re: [U-Boot] [PATCH v4 0/6] Introduction of new board Peach-Pit

[Minkyu Kang]

On 18/06/14 21:23, Akshay Saraswat wrote:
> This board is based on Exynos5420 and is similar to SMDK5420 board. 
> Adding new and refactoring existing  DT and config files to support 
> both SMDK5420 and Peach-Pit. 
> This patch set also intends to place env at the end of flash, increase
> SPL footprint, enable USB boot mode and split memory bank config.
> 
> Changes since v1: 
>   - Added "Acked-by". 
> Changes since v2: 
>   - Changed order of the patches because 2/2 alone results in compiler 
> errors and has dependency over patch 1/2. 
>   - Removed CONFIG_CHROMEOS_PEACH.
> Changes since v3:
>   - Took four patches in this set from a different patch set.
>   - Rebased all the patches to Top of Tree.
> 
> Akshay Saraswat (5):
>   Exynos5420: Let macros be used for exynos5420
>   Exynos5420: Introduce support for the Peach-Pit board
>   Exynos5: Config: Place environment at the end of SPI flash
>   Exynos5: Config: Increase SPL footprint for Exynos5420
>   Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs
> 
> Michael Pratt (1):
>   Exynos: Split 5250 and 5420 memory bank configuration
> 
>  arch/arm/cpu/armv7/exynos/exynos5_setup.h |   6 +-
>  arch/arm/dts/Makefile |   3 +-
>  arch/arm/dts/exynos5420-peach-pit.dts | 127 +
>  arch/arm/dts/exynos5420-smdk5420.dts  |  23 +
>  arch/arm/dts/exynos5420.dtsi  |  70 --
>  arch/arm/dts/exynos54xx.dtsi  | 151 
> ++
>  boards.cfg|   1 +
>  include/configs/exynos5-dt.h  |  15 ++-
>  include/configs/exynos5250-dt.h   |  13 +--
>  include/configs/exynos5420.h  |  52 ++
>  include/configs/peach-pit.h   |  25 +
>  include/configs/smdk5420.h|  49 ++
>  12 files changed, 388 insertions(+), 147 deletions(-)
>  create mode 100644 arch/arm/dts/exynos5420-peach-pit.dts
>  delete mode 100644 arch/arm/dts/exynos5420.dtsi
>  create mode 100644 arch/arm/dts/exynos54xx.dtsi
>  create mode 100644 include/configs/exynos5420.h
>  create mode 100644 include/configs/peach-pit.h
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH] PMIC: MAX77686: fix invalid bus check

[Minkyu Kang]

On 19/06/14 05:13, Jeroen Hofstee wrote:
> Since p->bus is unsigned checking for negative values
> is optimized away. Since bus is already used as an argument
> use tmp. While at it, don't declare variables in the middle
> of a function.
> 
> cc: Rajeshwari Shinde 
> Signed-off-by: Jeroen Hofstee 
> ---
>  drivers/power/pmic/pmic_max77686.c | 13 -
>  1 file changed, 8 insertions(+), 5 deletions(-)
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH v2] thor: cosmetic: Update the cmd_thordown help message to present example usage

[Marek Vasut]

On Monday, June 23, 2014 at 09:35:04 AM, Lukasz Majewski wrote:
> Signed-off-by: Lukasz Majewski 
> ---
>  common/cmd_thordown.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/common/cmd_thordown.c b/common/cmd_thordown.c
> index 2dd7509..96f7d32 100644
> --- a/common/cmd_thordown.c
> +++ b/common/cmd_thordown.c
> @@ -64,7 +64,7 @@ exit:
> 
>  U_BOOT_CMD(thordown, CONFIG_SYS_MAXARGS, 1, do_thor_down,
>  "TIZEN \"THOR\" downloader",
> -"  \n"
> +"thor   \n"
>  "  - device software upgrade via LTHOR TIZEN dowload\n"
>  "program via  on device ,\n"
>  "attached to interface \n"

Looks like v2014.07 matter to me. A description in the patch would be 
appreciated though, so can you do a V3 with it ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2] thor: defer parsing of device string to IO backend

[Marek Vasut]

On Monday, June 23, 2014 at 09:39:16 AM, Lukasz Majewski wrote:
> Commit d4f5ef59cc7 "dfu: defer parsing of device string to IO backend"
> changed the function signature of dfu_init_env_entities(). Adjust
> cmd_thordown.c to match that change.
> 
> Also, apply the same change as commit d6d37d737b58e "dfu: free entities
> when parsing fails" to cmd_thordown.c.
> 
> Fixes: d4f5ef59cc7 ("dfu: defer parsing of device string to IO backend")
> 
> Signed-off-by: Lukasz Majewski 

Did this go out twice ? What's the V2 changelog please ?

Best regards,
Marek Vasut
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[U-Boot] [PATCH v2] thor: defer parsing of device string to IO backend

[Lukasz Majewski]

Commit d4f5ef59cc7 "dfu: defer parsing of device string to IO backend" changed
the function signature of dfu_init_env_entities(). Adjust cmd_thordown.c
to match that change.

Also, apply the same change as commit d6d37d737b58e "dfu: free entities
when parsing fails" to cmd_thordown.c.

Fixes: d4f5ef59cc7 ("dfu: defer parsing of device string to IO backend")

Signed-off-by: Lukasz Majewski 
---
 common/cmd_thordown.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/cmd_thordown.c b/common/cmd_thordown.c
index 96f7d32..27927ba 100644
--- a/common/cmd_thordown.c
+++ b/common/cmd_thordown.c
@@ -26,10 +26,9 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
puts("TIZEN \"THOR\" Downloader\n");
 
-   ret = dfu_init_env_entities(interface, simple_strtoul(devstring,
- NULL, 10));
+   ret = dfu_init_env_entities(interface, devstring);
if (ret)
-   return ret;
+   goto done;
 
int controller_index = simple_strtoul(usb_controller, NULL, 0);
ret = board_usb_init(controller_index, USB_INIT_DEVICE);
@@ -57,6 +56,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 exit:
g_dnl_unregister();
+done:
dfu_free_entities();
 
return ret;
-- 
2.0.0.rc2

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[U-Boot] [PATCH v2] thor: defer parsing of device string to IO backend

[Lukasz Majewski]

Commit d4f5ef59cc7 "dfu: defer parsing of device string to IO backend" changed
the function signature of dfu_init_env_entities(). Adjust cmd_thordown.c
to match that change.

Also, apply the same change as commit d6d37d737b58e "dfu: free entities
when parsing fails" to cmd_thordown.c.

Fixes: d4f5ef59cc7 ("dfu: defer parsing of device string to IO backend")

Signed-off-by: Lukasz Majewski 
---
 common/cmd_thordown.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/cmd_thordown.c b/common/cmd_thordown.c
index 96f7d32..27927ba 100644
--- a/common/cmd_thordown.c
+++ b/common/cmd_thordown.c
@@ -26,10 +26,9 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
puts("TIZEN \"THOR\" Downloader\n");
 
-   ret = dfu_init_env_entities(interface, simple_strtoul(devstring,
- NULL, 10));
+   ret = dfu_init_env_entities(interface, devstring);
if (ret)
-   return ret;
+   goto done;
 
int controller_index = simple_strtoul(usb_controller, NULL, 0);
ret = board_usb_init(controller_index, USB_INIT_DEVICE);
@@ -57,6 +56,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 exit:
g_dnl_unregister();
+done:
dfu_free_entities();
 
return ret;
-- 
2.0.0.rc2

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[U-Boot] [PATCH v2] thor: cosmetic: Update the cmd_thordown help message to present example usage

[Lukasz Majewski]

Signed-off-by: Lukasz Majewski 
---
 common/cmd_thordown.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/cmd_thordown.c b/common/cmd_thordown.c
index 2dd7509..96f7d32 100644
--- a/common/cmd_thordown.c
+++ b/common/cmd_thordown.c
@@ -64,7 +64,7 @@ exit:
 
 U_BOOT_CMD(thordown, CONFIG_SYS_MAXARGS, 1, do_thor_down,
   "TIZEN \"THOR\" downloader",
-  "  \n"
+  "thor   \n"
   "  - device software upgrade via LTHOR TIZEN dowload\n"
   "program via  on device ,\n"
   "attached to interface \n"
-- 
2.0.0.rc2

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Re: [U-Boot] [PATCH] thor: cosmetic: Update the cmd_thordown help message to present example usage

[Lukasz Majewski]

Hi Stephen,

> On 06/20/2014 01:35 AM, Lukasz Majewski wrote:
> 
> > diff --git a/common/cmd_thordown.c b/common/cmd_thordown.c
> 
> >  U_BOOT_CMD(thordown, CONFIG_SYS_MAXARGS, 1, do_thor_down,
> >"TIZEN \"THOR\" downloader",
> > -  "  \n"
> > +  "   e.g. thor 0 mmc 0\n"
> >"  - device software upgrade via LTHOR TIZEN dowload\n"
> >"program via  on device ,\n"
> >"attached to interface \n"
> 
> I couldn't find any examples of other commands which do this. Rathe
> than add the "e.g." text, perhaps just add the word "thor" at the
> start of the command parameter list. That's much more common in
> existing commands:
> 
> -"  \n"
> +"thor   \n"
> 

Ok. Thanks.

-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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