Re: [U-Boot] [PATCH v2 2/4] fastboot: call board_usb_init() to enable usb
Hi Lukasz,
On 13 March 2015 at 13:23, Lukasz Majewski l.majew...@samsung.com wrote:
Hi Dileep,
g_dnl_gadget_register() fails for dra7xx dwc3 gadget when running
cmd_fastboot. Calling board_usb_init() to fix this.
fastboot command is now added with an optional controller index
argument with default value as 0, to facilitate configurable
controller index.
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
Changes in v2:
- Changed fastboot command to facilitate passing controller
index
- Added board_usb_cleanup()
This patch considers the following change by Inha Song, without which
the build will be broken on BeagleBone Black platform
https://patchwork.ozlabs.org/patch/430303/
common/cmd_fastboot.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c
index 346ab80..9ca4a2f 100644
--- a/common/cmd_fastboot.c
+++ b/common/cmd_fastboot.c
@@ -10,11 +10,19 @@
#include common.h
#include command.h
#include g_dnl.h
+#include usb.h
static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char
*const argv[]) {
int ret;
+ int controller_index = 0;
+ if (argc == 2) {
+ char *usb_controller = argv[1];
+ controller_index = simple_strtoul(usb_controller,
NULL, 0);
+ }
+
+ board_usb_init(controller_index, USB_INIT_DEVICE);
g_dnl_clear_detach();
ret = g_dnl_register(usb_dnl_fastboot);
if (ret)
@@ -36,12 +44,13 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int
flag, int argc, char *const argv[])
g_dnl_unregister();
g_dnl_clear_detach();
+ board_usb_cleanup(controller_index, USB_INIT_DEVICE);
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
- fastboot, 1, 0, do_fastboot,
+ fastboot, 2, 0, do_fastboot,
use USB Fastboot protocol,
- \nLukasz Majewski l.majew...@samsung.com
- - run as a fastboot usb device
+ [USB_controller]\n
+ - run as a fastboot usb device via USB_controller
);
Acked-by: Lukasz Majewski l.majew...@samsung.com
Since I'm not CC'ed to all patches, I assume that this work would go
via other tree?
Other patches are TI board specific and I am working on next version of the
patches as per the review comments.
I felt that this is generic functionality and hence sent it separately. Do
you want me send all patches?
Regards, Dileep
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys-virt address translations
On Friday, March 13, 2015 at 07:39:08 PM, Stephen Warren wrote: On 03/13/2015 12:13 PM, Marek Vasut wrote: On Friday, March 13, 2015 at 05:35:53 PM, Stephen Warren wrote: On 03/13/2015 08:30 AM, Marek Vasut wrote: On Friday, March 13, 2015 at 07:13:09 AM, Stephen Warren wrote: BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. Caches aren't working on BCM2xxx or what's the reason for this hack ? Or are these different (not on-CPU) caches we're talking about (yes, I did notice the GPU Lx cache stuff)? Yes, the GPU has its own caches, entirely separate from the ARM core and at a different location in the system bus structure, and it seems as if at least some other peripherals other than GPU/graphics/VideoCore access DRAM via those caches too. There are some brief details in BCM2835-ARM-Peripherals.pdf, although it isn't terribly clear. Thanks for clearing this up. I suspect there's no way to turn those caches off altogether, right ? But uh ... ew :( There may be, Search for disable_l2cache at http://elinux.org/RPiconfig. That option is read by the SoC's binary bootloader (which I believe 99%-100% runs on the VideoCore not ARM) and programmed before the ARM bootloader (U-Boot) is started. The disadvantages of the option are: * According to all descriptions of the option I've seen, it requires that SW that wishes to run with that option enabled must pass a different upper 2 bits of physical address to DMA engines. See for example the elinux.org link above and: https://github.com/raspberrypi/linux/blob/rpi-3.18.y/arch/arm/mach-bcm2708/ include/mach/memory.h#L38 https://github.com/raspberrypi/linux/blob/rpi-3.18.y/arch/arm/mach-bcm2708/ Kconfig#L43 * It's a system-wide option without any runtime control that I'm aware of, and so would affect anything U-Boot boots such as Linux, so Linux would need to be modified too. I assume it would reduce graphics performance at least. As such, I don't think we want to require that option. Agreed. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] DRAM initialization hangs on MX28EVK rev. D
Dear all, I am quite new to uboot and I am experimenting it on a iMX28 EVK board (rev. D). I am building the uboot (2014.07 version) by means of buildroot (version 2014.08) and I am using the standard mxs-bootlet package provided by buildroot. When trying to boot the EVK, it hangs after DRAM initialization as shown below. The EVK itself seems ok since barebox (also built with buildroot) can successfully starts up. I have read that such problem has been seem on iMX28 EVK rev A but I am not aware of any DDR related issue on the iMX28 EVK rev D board. Would anyone have already seen such issue and know if some patches are required in uboot? Thanks in advance for any help or suggestion Best regards Adrien Uboot log: PowerPrep start initialize power... Battery Voltage = 2.21V No battery or bad battery detected!!!.Disabling battery voltage measurements./r/nMar 13 201515:40:12 FRAC 0x92925552 memory type is DDR2 Wait for ddr ready 1power 0x00820616 Frac 0x92925552 start change cpu freq hbus 0x0003 cpu 0x00010001 start test memory accress ddr2 0x4000 finish simple test U-Boot 2014.07 (Mar 13 2015 - 15:40:15) CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: NAND 8GiB 3,3V 8-bit SPI: ready DRAM: ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about board-specific Makefile actions
Dear Masahiro, Your help has enabled me to make my board Makefile do what I want (except for the clean target, see below). On 03/12/2015 09:20 PM, Masahiro Yamada wrote: Hi James, 2015-03-13 3:35 GMT+09:00 James Chargin jimccr...@gmail.com: I could still use some help with this from someone who really knows how the make system works. Tom and Simon provided hints that were helpful, as I note below. On 03/09/2015 08:34 AM, James Chargin wrote: So, is no one willing to offer a hint? Thanks, Jim On 03/03/2015 01:39 PM, James Chargin wrote: I have a custom board in a git workspace for U-Boot 2014.07. I've copied most of this from the .../board/ti/beagle. My board directory Makefile looks like 8--- obj-y := board.o 8--- I'd like to add a few files to this directory that are processed during make all and have any newly derived files deleted during make clean. ... Is there any documentation you could point me at that might explain the way these Makefiles interact? As Simon suggested, Documentation/kbuild/makefiles.txt of Linux Kernel is the best one. This document has been very helpful. Thank you both for pointing it out. I know most of this was derived from somewhere else (Linux kernel?) as part of the move to KConfig. But I have no ... To be precise, you should say Kbuild, not Kconfig. Kbuild and Kconfig should be considered separately. Kbuild - build system Kconfig - configuration system They both originate in Linux Kernel. U-Boot switched to Kbuild at 2014.04-rc1, and to Kconfig at 2014.10-rc1. You mentioned you are using u-boot v2014.07. So, you are building U-Boot with Kbuild, but using the old, conventional configuration system (mkconfig + boards.cfg). Your questions in this thread are all about Kbuild. I appreciate your clear explanation here. I have watched the Kbuild and KConfig conversion threads in the mailing list for some time. But having been previously working with U-Boot 2010.12, this is my first experience with either. It will be useful to know they are separate in this way. Remaining problems: 1) I can't figure out how to clean my newly created derived .img file. I've tried each of the following four lines (one at a time), but none worked CLEAN_FILES += test.img CLEAN_FILES := test.img CLEAN_FILES is only available at the top-level Makefile. Add CLEAN_FILES += board/my_board/test.img to the top-level Makefile, and it should work. clean-files += test.img clean-files := test.img These are correct in sub-directory Makefiles in general, but unfortunately, make clean does not descend into board/ directory for some reason. So, they do not work in board/*/Makefile Should this be considered a bug in the build system? Should make descend into the board directory? Or, at least, should there not be a way for a board directory to indicate which of any locally generated derived objects should be cleaned up? I hesitate to add to the top level Makefile for my specific board. 2) More generally, I'd like to be able to add some arbitrary make steps that are peculiar to my boards Makefile, but I can't figure this out either, so far. I've tried adding my_all to extra-y and then adding steps for my_all, similar to the following. 8--- extra-y := test.img my_all .PHONY my_all my_all : test1.txt # some arbitrary commands to be executed if test1.txt isn't present cp -f test.txt test1.txt 8--- In this case, make reports an error make[1]: *** No rule to make target `board/my_board/my_all', needed by `__build'. Stop. make: *** [board/my_board] Error 2 Any help would be appreciated. If you want to generate board/my_board/test1.txt from board/my_board/test.txt, the board/my_board/Makefile should look like this: 8 extra-y := test1.txt $(obj)/test1.txt: $(src)/test.txt cp -f $ $@ 8 This is actually the fix for many of my problems. Prepending $(obj) and $(src) apparently allows make to see the file dependencies as I intend. ... Add the following to the top-level Makefile 8 CLEAN_FILES += board/my_board/test1.txt 8 Again, I hesitate to add to the top level Makefile. I do not think you need to use PHONY target, but if you really want use it, you can do like this. 8 __build: my_all PHONY += my_all my_all: echo Hello, World 8 As you suggest, I did not use .PHONY. This explanation might be a nice addition to the Kbuild makefile.txt. Again, thank you very much for your attention. Jim -- Jim Chargin AJA Video Systems j...@aja.com (530) 271-3334 http://www.aja.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys-virt address translations
On Friday, March 13, 2015 at 05:35:53 PM, Stephen Warren wrote: On 03/13/2015 08:30 AM, Marek Vasut wrote: On Friday, March 13, 2015 at 07:13:09 AM, Stephen Warren wrote: BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. Caches aren't working on BCM2xxx or what's the reason for this hack ? Or are these different (not on-CPU) caches we're talking about (yes, I did notice the GPU Lx cache stuff)? Yes, the GPU has its own caches, entirely separate from the ARM core and at a different location in the system bus structure, and it seems as if at least some other peripherals other than GPU/graphics/VideoCore access DRAM via those caches too. There are some brief details in BCM2835-ARM-Peripherals.pdf, although it isn't terribly clear. Thanks for clearing this up. I suspect there's no way to turn those caches off altogether, right ? But uh ... ew :( Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Question about getting the jump table for non-gpl standalone application
Hello, I'm looking to build a standalone application, and I can't figure out how to access the jump table without including GPL code. I see that 'exports.h' and '_exports.h', and stubs.c all do NOT have the GPL license note. I assume that's so we can build applications that use the jump table. However, the original stubs.c includes common.h, which does have the GPL notice. How do I get the jump table offset into my non-GPL code without including common.h? The current version uses: offsetof(gd_t, jt) but gd_t is defined in common.h Or is it acceptable to #include common.h in a non-GPL application? Thanks, -Caleb ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys-virt address translations
Stephen Warren swar...@wwwdotorg.org writes: BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. That document also states that Software accessing RAM using the DMA engines must use bus addresses (base at 0xc000). However, this appears to be incorrect since it does not work in practice on the bcm2835 (although it does on bcm2836). usb start causes some EABI function to call raise(8), presumably due to corrupted USB IN data (the converse is true on bcm2836; a value of 4 causes signals). However, I haven't investigated the cause. A value of 4 matches what the RPI Foundation's kernel; see the definition of _REAL_BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h. With the code updated to implement a phys-bus translation by setting the top two bits of DWC2 DMA addresses to 4, USB keyboard support appears stable. A similar change is made for bcm2836 (RPi 2). I can't justify this value since it doesn't match the RPi Foundation kernel. However, it does appear to work for the built-in USB Ethernet at least. Ideally, the bcm2835 SoC support would provide some common function for any DMA-capable driver to call to perform the phys-bus translation, rather than placing ifdefs in each driver file. However, I can't find such a standard function in U-Boot. Huh. Agreed that it seems like it should be 0xc top bits on both, but I guess whatever works. It does seem like we ought to have some vtophys / vtobus functions. signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys-virt address translations
On 03/13/2015 12:13 PM, Marek Vasut wrote: On Friday, March 13, 2015 at 05:35:53 PM, Stephen Warren wrote: On 03/13/2015 08:30 AM, Marek Vasut wrote: On Friday, March 13, 2015 at 07:13:09 AM, Stephen Warren wrote: BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. Caches aren't working on BCM2xxx or what's the reason for this hack ? Or are these different (not on-CPU) caches we're talking about (yes, I did notice the GPU Lx cache stuff)? Yes, the GPU has its own caches, entirely separate from the ARM core and at a different location in the system bus structure, and it seems as if at least some other peripherals other than GPU/graphics/VideoCore access DRAM via those caches too. There are some brief details in BCM2835-ARM-Peripherals.pdf, although it isn't terribly clear. Thanks for clearing this up. I suspect there's no way to turn those caches off altogether, right ? But uh ... ew :( There may be, Search for disable_l2cache at http://elinux.org/RPiconfig. That option is read by the SoC's binary bootloader (which I believe 99%-100% runs on the VideoCore not ARM) and programmed before the ARM bootloader (U-Boot) is started. The disadvantages of the option are: * According to all descriptions of the option I've seen, it requires that SW that wishes to run with that option enabled must pass a different upper 2 bits of physical address to DMA engines. See for example the elinux.org link above and: https://github.com/raspberrypi/linux/blob/rpi-3.18.y/arch/arm/mach-bcm2708/include/mach/memory.h#L38 https://github.com/raspberrypi/linux/blob/rpi-3.18.y/arch/arm/mach-bcm2708/Kconfig#L43 * It's a system-wide option without any runtime control that I'm aware of, and so would affect anything U-Boot boots such as Linux, so Linux would need to be modified too. I assume it would reduce graphics performance at least. As such, I don't think we want to require that option. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/4] fastboot: call board_usb_init() to enable usb
On Sat, 14 Mar 2015 00:58:51 +0530
Dileep Katta dileep.ka...@linaro.org wrote:
Hi Lukasz,
On 13 March 2015 at 13:23, Lukasz Majewski l.majew...@samsung.com
wrote:
Hi Dileep,
g_dnl_gadget_register() fails for dra7xx dwc3 gadget when running
cmd_fastboot. Calling board_usb_init() to fix this.
fastboot command is now added with an optional controller index
argument with default value as 0, to facilitate configurable
controller index.
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
Changes in v2:
- Changed fastboot command to facilitate passing controller
index
- Added board_usb_cleanup()
This patch considers the following change by Inha Song, without
which the build will be broken on BeagleBone Black platform
https://patchwork.ozlabs.org/patch/430303/
common/cmd_fastboot.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c
index 346ab80..9ca4a2f 100644
--- a/common/cmd_fastboot.c
+++ b/common/cmd_fastboot.c
@@ -10,11 +10,19 @@
#include common.h
#include command.h
#include g_dnl.h
+#include usb.h
static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char
*const argv[]) {
int ret;
+ int controller_index = 0;
+ if (argc == 2) {
+ char *usb_controller = argv[1];
+ controller_index = simple_strtoul(usb_controller,
NULL, 0);
+ }
+
+ board_usb_init(controller_index, USB_INIT_DEVICE);
g_dnl_clear_detach();
ret = g_dnl_register(usb_dnl_fastboot);
if (ret)
@@ -36,12 +44,13 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int
flag, int argc, char *const argv[])
g_dnl_unregister();
g_dnl_clear_detach();
+ board_usb_cleanup(controller_index, USB_INIT_DEVICE);
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
- fastboot, 1, 0, do_fastboot,
+ fastboot, 2, 0, do_fastboot,
use USB Fastboot protocol,
- \nLukasz Majewski l.majew...@samsung.com
- - run as a fastboot usb device
+ [USB_controller]\n
+ - run as a fastboot usb device via USB_controller
);
Acked-by: Lukasz Majewski l.majew...@samsung.com
Since I'm not CC'ed to all patches, I assume that this work would go
via other tree?
Other patches are TI board specific and I am working on next version
of the patches as per the review comments.
I felt that this is generic functionality and hence sent it
separately. Do you want me send all patches?
No, it is not necessary. Regarding above, I assume that Tom will
probably fetch those patches.
I was just concern about tree to which this patch should belong.
Regards,
Lukasz
Regards, Dileep
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] DRAM initialization hangs on MX28EVK rev. D
Hi Adrien, On Fri, Mar 13, 2015 at 12:44 PM, Adrien Decostre ad.decos...@gmail.com wrote: Dear all, I am quite new to uboot and I am experimenting it on a iMX28 EVK board (rev. D). I am building the uboot (2014.07 version) by means of buildroot (version 2014.08) and I am using the standard mxs-bootlet package provided by buildroot. No, please don't use the bootlets. U-boot has included the bootlets functionality. So use U-boot only and things will be good. You see the hang because bootlets initialize DDR, then U-boot would try again to initialize it causing the hang. Take a look at the READMEs: doc/README.mxs board/freescale/mx28evk/README Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC 3/4] lcd: use ansi console
Signed-off-by: Andrey Danin danind...@mail.ru
---
common/Makefile | 2 +-
common/lcd.c | 24 --
common/lcd_console.c | 122 +-
include/lcd_console.h | 33 ++
4 files changed, 105 insertions(+), 76 deletions(-)
diff --git a/common/Makefile b/common/Makefile
index 7216a13..790d76d 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -199,7 +199,7 @@ obj-$(CONFIG_I2C_EDID) += edid.o
obj-$(CONFIG_KALLSYMS) += kallsyms.o
obj-y += splash.o
obj-$(CONFIG_SPLASH_SOURCE) += splash_source.o
-obj-$(CONFIG_LCD) += lcd.o lcd_console.o
+obj-$(CONFIG_LCD) += lcd.o lcd_console.o ansi_console.o
obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o
obj-$(CONFIG_LYNXKDI) += lynxkdi.o
obj-$(CONFIG_MENU) += menu.o
diff --git a/common/lcd.c b/common/lcd.c
index f33942c..d408e08 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -47,11 +47,7 @@ DECLARE_GLOBAL_DATA_PTR;
static int lcd_init(void *lcdbase);
static void lcd_logo(void);
-static void lcd_setfgcolor(int color);
-static void lcd_setbgcolor(int color);
-static int lcd_color_fg;
-static int lcd_color_bg;
int lcd_line_length;
char lcd_is_enabled = 0;
static void *lcd_base; /* Start of framebuffer memory */
@@ -311,26 +307,6 @@ ulong lcd_setmem(ulong addr)
return addr;
}
-static void lcd_setfgcolor(int color)
-{
- lcd_color_fg = color;
-}
-
-int lcd_getfgcolor(void)
-{
- return lcd_color_fg;
-}
-
-static void lcd_setbgcolor(int color)
-{
- lcd_color_bg = color;
-}
-
-int lcd_getbgcolor(void)
-{
- return lcd_color_bg;
-}
-
#ifdef CONFIG_LCD_LOGO
__weak void lcd_logo_set_cmap(void)
{
diff --git a/common/lcd_console.c b/common/lcd_console.c
index 8bf83b9..b30fa3a 100644
--- a/common/lcd_console.c
+++ b/common/lcd_console.c
@@ -7,6 +7,7 @@
*/
#include common.h
+#include ansi_console.h
#include lcd.h
#include video_font.h/* Get font data, width and height */
@@ -14,11 +15,19 @@
#define CONSOLE_ROW_FIRST lcd_console_address
#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * console_rows)
-static short console_curr_col;
-static short console_curr_row;
-static short console_cols;
-static short console_rows;
+static int console_curr_col;
+static int console_curr_row;
+static int console_cols;
+static int console_rows;
static void *lcd_console_address;
+static int lcd_color_fg;
+static int lcd_color_bg;
+
+static struct ansi_console_t ansi_console;
+
+static inline void lcd_putc_cr(int col, int row, const char c);
+static void console_scrollup(int rows);
+static inline void console_clear_line(int line, int begin, int end);
void lcd_init_console(void *address, int rows, int cols)
{
@@ -27,6 +36,23 @@ void lcd_init_console(void *address, int rows, int cols)
console_cols = cols;
console_rows = rows;
lcd_console_address = address;
+
+ memset(ansi_console, 0, sizeof(ansi_console));
+ ansi_console.putc_cr = lcd_putc_cr;
+ ansi_console.cols = console_cols;
+ ansi_console.rows = console_rows;
+#if defined(CONFIG_CONSOLE_CURSOR) || defined(CONFIG_VIDEO_SW_CURSOR)
+#warning Cursor is not implemented for LCD ANSI console
+ ansi_console.cursor_set = NULL;
+ ansi_console.cursor_enable = NULL;
+#endif
+ ansi_console.sync = lcd_sync;
+ ansi_console.scroll = console_scrollup;
+ ansi_console.clear_line = console_clear_line;
+ ansi_console.clear = lcd_clear;
+ ansi_console.swap_colors = lcd_swap_colors;
+ ansi_console.console_col = console_curr_col;
+ ansi_console.console_row = console_curr_row;
}
void lcd_set_col(short col)
@@ -39,6 +65,33 @@ void lcd_set_row(short row)
console_curr_row = row;
}
+int lcd_getbgcolor(void)
+{
+ return lcd_color_bg;
+}
+
+void lcd_setbgcolor(int color)
+{
+ lcd_color_bg = color;
+}
+
+int lcd_getfgcolor(void)
+{
+ return lcd_color_fg;
+}
+
+void lcd_setfgcolor(int color)
+{
+ lcd_color_fg = color;
+}
+
+void lcd_swap_colors(void)
+{
+ int tmp = lcd_getbgcolor();
+ lcd_setbgcolor(lcd_getfgcolor());
+ lcd_setfgcolor(tmp);
+}
+
void lcd_position_cursor(unsigned col, unsigned row)
{
console_curr_col = min_t(short, col, console_cols - 1);
@@ -96,9 +149,13 @@ static inline void lcd_putc_xy(ushort x, ushort y, uchar c)
lcd_drawchars(x, y, c, 1);
}
-static void console_scrollup(void)
+static inline void lcd_putc_cr(int col, int row, const char c)
+{
+ lcd_putc_xy(col * VIDEO_FONT_WIDTH, row * VIDEO_FONT_HEIGHT, (uchar)c);
+}
+
+static void console_scrollup(int rows)
{
- const int rows = CONFIG_CONSOLE_SCROLL_LINES;
int bg_color = lcd_getbgcolor();
/* Copy up rows ignoring those that will be overwritten */
@@ -124,27 +181,16 @@ static void console_scrollup(void)
console_curr_row -= rows;
}
-static inline void console_back(void)
+static inline void console_clear_line(int
[U-Boot] [RFC 1/4] common: add ansi console base implementation
This code is based on ansi implementation in cfb_console.
It is adopted to be used in lcd and cfb_console drivers.
Signed-off-by: Andrey Danin danind...@mail.ru
---
common/ansi_console.c | 355 +
include/ansi_console.h | 39 ++
2 files changed, 394 insertions(+)
create mode 100644 common/ansi_console.c
create mode 100644 include/ansi_console.h
diff --git a/common/ansi_console.c b/common/ansi_console.c
new file mode 100644
index 000..08adc1b
--- /dev/null
+++ b/common/ansi_console.c
@@ -0,0 +1,355 @@
+#include ansi_console.h
+
+#define COL (*(console-console_col))
+#define ROW (*(console-console_row))
+
+#ifdef CONFIG_CONSOLE_ANSI_EXTENSION_ENABLED
+static void cursor_fix(struct ansi_console_t *console)
+{
+ if (ROW 0)
+ ROW = 0;
+ if (ROW = console-rows)
+ ROW = console-rows - 1;
+ if (COL 0)
+ COL = 0;
+ if (COL = console-cols)
+ COL = console-cols - 1;
+}
+
+static void cursor_set_position(struct ansi_console_t *console,
+ int row, int col)
+{
+ if (ROW != -1)
+ ROW = row;
+ if (COL != -1)
+ COL = col;
+ cursor_fix(console);
+}
+#endif /* CONFIG_CONSOLE_ANSI_EXTENSION_ENABLED */
+
+static inline void cursor_up(struct ansi_console_t *console, int n)
+{
+ ROW -= n;
+ if (ROW 0)
+ ROW = 0;
+}
+
+static inline void cursor_down(struct ansi_console_t *console, int n)
+{
+ ROW += n;
+ if (ROW = console-rows)
+ ROW = console-rows - 1;
+}
+
+static inline void cursor_left(struct ansi_console_t *console, int n)
+{
+ COL -= n;
+ if (COL 0)
+ COL = 0;
+}
+
+static inline void cursor_right(struct ansi_console_t *console, int n)
+{
+ COL += n;
+ if (COL = console-cols)
+ COL = console-cols - 1;
+}
+
+static inline void console_previous_line(struct ansi_console_t *console, int n)
+{
+ COL = 0;
+ ROW -= n;
+
+ /* Check if we need to scroll the terminal */
+ if (ROW 0) {
+ if (console-scroll)
+ console-scroll(1 - ROW);
+ } else if (console-sync) {
+ console-sync();
+ }
+}
+
+static void console_new_line(struct ansi_console_t *console, int n)
+{
+ COL = 0;
+ ROW += n;
+
+ /* Check if we need to scroll the terminal */
+ if (ROW = console-rows) {
+ if (console-scroll)
+ console-scroll(console-rows - ROW + 1);
+ ROW = console-rows - 1;
+ } else if (console-sync) {
+ console-sync();
+ }
+}
+
+static void console_caret_return(struct ansi_console_t *console)
+{
+ COL = 0;
+}
+
+static inline void console_back(struct ansi_console_t *console)
+{
+ if (--COL 0) {
+ COL = console-cols - 1;
+ if (--ROW 0)
+ ROW = 0;
+ }
+
+ console-putc_cr(COL, ROW, ' ');
+}
+
+
+static void console_putc(struct ansi_console_t *console, const char c)
+{
+ switch (c) {
+ case '\r': /* back to first column */
+ console_caret_return(console);
+ break;
+
+ case '\n': /* next line */
+ console_new_line(console, 1);
+ break;
+
+ case '\t': /* tab 8 */
+ COL |= 0x0008;
+ COL = ~0x0007;
+
+ if (COL = console-cols)
+ console_new_line(console, 1);
+ break;
+
+ case '\b': /* backspace */
+ console_back(console);
+ break;
+
+ case 7: /* bell */
+ break; /* ignored */
+
+ default:/* draw the char */
+ console-putc_cr(COL, ROW, c);
+ COL++;
+
+ /* check for new line */
+ if (COL = console-cols)
+ console_new_line(console, 1);
+ }
+}
+
+
+void ansi_putc(struct ansi_console_t *console, const char c)
+{
+#ifdef CONFIG_CONSOLE_ANSI_EXTENSION_ENABLED
+ int i;
+
+ if (c == 27) {
+ for (i = 0; i console-ansi_buf_size; ++i)
+ console_putc(console, console-ansi_buf[i]);
+ console-ansi_buf[0] = 27;
+ console-ansi_buf_size = 1;
+ return;
+ }
+
+ if (console-ansi_buf_size 0) {
+ /*
+* 0 - ESC
+* 1 - [
+* 2 - num1
+* 3 - ..
+* 4 - ;
+* 5 - num2
+* 6 - ..
+* - cchar
+*/
+ int next = 0;
+
+ int flush = 0;
+ int fail = 0;
+
+ int num1 = 0;
+ int num2 = 0;
+ int cchar = 0;
+
+
[U-Boot] [RFC 2/4] video: cfb_console: use common ansi implementation
Signed-off-by: Andrey Danin danind...@mail.ru
---
drivers/video/Makefile | 2 +-
drivers/video/cfb_console.c | 381
2 files changed, 33 insertions(+), 350 deletions(-)
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 22a316b..0819ee9 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -8,7 +8,7 @@
obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
-obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
+obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o ansi_console.o
obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index a81affa..f3e3f28 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -91,6 +91,12 @@
#include malloc.h
#include linux/compiler.h
+#ifdef CONFIG_CFB_CONSOLE_ANSI
+#define CONFIG_ANSI_CONSOLE_EXTENSION_ENABLED
+#endif
+#include ansi_console.h
+
+
/*
* Console device defines with SMI graphic
* Any other graphic must change this section
@@ -300,11 +306,6 @@ void console_cursor(int state);
#define CONSOLE_ROW_LAST (video_console_address + CONSOLE_SIZE -
CONSOLE_ROW_SIZE)
#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS)
-/* By default we scroll by a single line */
-#ifndef CONFIG_CONSOLE_SCROLL_LINES
-#define CONFIG_CONSOLE_SCROLL_LINES 1
-#endif
-
/* Macros */
#ifdef VIDEO_FB_LITTLE_ENDIAN
#define SWAP16(x) x) 0x00ff) 8) | \
@@ -361,12 +362,7 @@ static u32 eorx, fgx, bgx; /* color pats */
static int cfb_do_flush_cache;
-#ifdef CONFIG_CFB_CONSOLE_ANSI
-static char ansi_buf[10];
-static int ansi_buf_size;
-static int ansi_colors_need_revert;
-static int ansi_cursor_hidden;
-#endif
+static struct ansi_console_t ansi_console;
static const int video_font_draw_table8[] = {
0x, 0x00ff, 0xff00, 0x,
@@ -624,6 +620,12 @@ static void video_putchar(int xx, int yy, unsigned char c)
video_drawchars(xx, yy + video_logo_height, c, 1);
}
+static void video_putchar_cr(int col, int row, const char c)
+{
+ video_putchar(col * VIDEO_FONT_WIDTH, row * VIDEO_FONT_HEIGHT,
+ (unsigned char)c);
+}
+
#if defined(CONFIG_CONSOLE_CURSOR) || defined(CONFIG_VIDEO_SW_CURSOR)
static void video_set_cursor(void)
{
@@ -742,9 +744,8 @@ static void console_clear_line(int line, int begin, int end)
#endif
}
-static void console_scrollup(void)
+static void console_scrollup(int rows)
{
- const int rows = CONFIG_CONSOLE_SCROLL_LINES;
int i;
/* copy up rows ignoring the first one */
@@ -773,20 +774,6 @@ static void console_scrollup(void)
console_row -= rows;
}
-static void console_back(void)
-{
- console_col--;
-
- if (console_col 0) {
- console_col = CONSOLE_COLS - 1;
- console_row--;
- if (console_row 0)
- console_row = 0;
- }
-}
-
-#ifdef CONFIG_CFB_CONSOLE_ANSI
-
static void console_clear(void)
{
#ifdef VIDEO_HW_RECTFILL
@@ -802,58 +789,6 @@ static void console_clear(void)
#endif
}
-static void console_cursor_fix(void)
-{
- if (console_row 0)
- console_row = 0;
- if (console_row = CONSOLE_ROWS)
- console_row = CONSOLE_ROWS - 1;
- if (console_col 0)
- console_col = 0;
- if (console_col = CONSOLE_COLS)
- console_col = CONSOLE_COLS - 1;
-}
-
-static void console_cursor_up(int n)
-{
- console_row -= n;
- console_cursor_fix();
-}
-
-static void console_cursor_down(int n)
-{
- console_row += n;
- console_cursor_fix();
-}
-
-static void console_cursor_left(int n)
-{
- console_col -= n;
- console_cursor_fix();
-}
-
-static void console_cursor_right(int n)
-{
- console_col += n;
- console_cursor_fix();
-}
-
-static void console_cursor_set_position(int row, int col)
-{
- if (console_row != -1)
- console_row = row;
- if (console_col != -1)
- console_col = col;
- console_cursor_fix();
-}
-
-static void console_previousline(int n)
-{
- /* FIXME: also scroll terminal ? */
- console_row -= n;
- console_cursor_fix();
-}
-
static void console_swap_colors(void)
{
eorx = fgx;
@@ -864,76 +799,15 @@ static void console_swap_colors(void)
static inline int console_cursor_is_visible(void)
{
- return !ansi_cursor_hidden;
-}
-#else
-static inline int console_cursor_is_visible(void)
-{
- return 1;
-}
-#endif
-
-static void console_newline(int n)
-{
- console_row += n;
- console_col = 0;
-
- /* Check if we need to scroll the terminal */
- if (console_row =
[U-Boot] [RFC 4/4] paz00: enable bootmenu
Signed-off-by: Andrey Danin danind...@mail.ru --- include/configs/paz00.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 284419f..17063d0 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -64,6 +64,11 @@ #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES10 +#define CONFIG_CONSOLE_ANSI_EXTENSION_ENABLED +#define CONFIG_CMD_BOOTMENU +#define CONFIG_MENU +#define CONFIG_AUTOBOOT_KEYED + #include tegra-common-post.h #endif /* __CONFIG_H */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 0/8] Extend LPC32xx functionality and add LPC32xx-based work_92015 board
Hi Albert, On 13 March 2015 at 02:04, Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr wrote: This series extends functionality for the LPC32xx platform and introduces the WORK Microwave work_92105 board which makes use of the extended functionality. NOTES: A - I2C driver remains non-DM During v2 review, it was suggested to move to DM for I2C. However, this caused issues with the 'date', 'dtt' and 'eeprom' commands which are configured in this board. Therefore the I2C move to DM was not done. Does CONFIG_DM_I2C_COMPAT help with this? If you define that you get the old API. Otherwise if you can share the (broken) patches I can take a look at how to fix those commands. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC 0/4] ansi console support for lcd driver
Main reason for this patches is ability to use bootmenu on devices that use lcd driver (like Toshiba AC100). Lcd driver doesn't have ansi support while cfb_console does. Ansi related code was moved from cfb_console to separate place. Then this code was used in both cfb_console and lcd driver. There are other duplicated code between cfb_console and lcd. I'm not very experienced with video subsystem. Maybe there is a better/more proper way to add ansi support for Toshiba AC100. --- Andrey Danin (4): common: add ansi console base implementation video: cfb_console: use common ansi implementation lcd: use ansi console paz00: enable bootmenu common/Makefile | 2 +- common/ansi_console.c | 355 + common/lcd.c| 24 --- common/lcd_console.c| 122 -- drivers/video/Makefile | 2 +- drivers/video/cfb_console.c | 381 include/ansi_console.h | 39 + include/configs/paz00.h | 5 + include/lcd_console.h | 33 9 files changed, 537 insertions(+), 426 deletions(-) create mode 100644 common/ansi_console.c create mode 100644 include/ansi_console.h -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/8] lpc32xx: mtd: nand: add MLC NAND controller
On Fri, 2015-03-13 at 09:04 +0100, Albert ARIBAUD (3ADEV) wrote:
+ /* go through all four small pages */
+ for (i = 0; i 4; i++) {
+ /* start auto decode (reads 528 NAND bytes) */
+ writel(0, lpc32xx_nand_mlc_registers-ecc_auto_dec_reg);
+ /* wait for controller to return to ready state */
+ timeout = LPC32X_NAND_TIMEOUT;
+ do {
+ if (timeout-- == 0)
+ return -1;
+ status = readl(lpc32xx_nand_mlc_registers-isr);
+ } while (!(status ISR_CONTROLLER_READY));
How much time does 1 reads of this register equate to? Are you sure
it's enough? Timeouts should generally be in terms of time, not loop
iterations.
+static int read_single_page(uint8_t *dest, int page,
+ struct lpc32xx_oob *oob)
+{
+ int status, i, timeout, err, max_bitflips = 0;
+
+ /* enter read mode */
+ writel(NAND_CMD_READ0, lpc32xx_nand_mlc_registers-cmd);
+ /* send column (lsb then MSB) and page (lsb to MSB) */
+ writel(0, lpc32xx_nand_mlc_registers-addr);
+ writel(0, lpc32xx_nand_mlc_registers-addr);
+ writel(page 0xff, lpc32xx_nand_mlc_registers-addr);
+ writel((page8) 0xff, lpc32xx_nand_mlc_registers-addr);
+ writel((page16) 0xff, lpc32xx_nand_mlc_registers-addr);
+ /* start reading */
+ writel(NAND_CMD_READSTART, lpc32xx_nand_mlc_registers-cmd);
+
+ /* large page auto decode read */
+ for (i = 0; i 4; i++) {
+ /* start auto decode (reads 528 NAND bytes) */
+ writel(0, lpc32xx_nand_mlc_registers-ecc_auto_dec_reg);
+ /* wait for controller to return to ready state */
+ timeout = LPC32X_NAND_TIMEOUT;
+ do {
+ if (timeout-- == 0)
+ return -1;
+ status = readl(lpc32xx_nand_mlc_registers-isr);
+ } while (!(status ISR_CONTROLLER_READY))
+ ;
+ /* return -1 if hard error */
+ if (status ISR_DECODER_FAILURE)
+ return -1;
+ /* keep count of maximum bitflips performed */
+ if (status ISR_DECODER_ERROR) {
+ err = ISR_DECODER_ERRORS(status);
+ if (err max_bitflips)
+ max_bitflips = err;
+ }
+ /* copy first 512 bytes into buffer */
+ memcpy(dest+i*512, lpc32xx_nand_mlc_registers-buff, 512);
+ /* copy next 6 bytes bytes into OOB buffer */
+ memcpy(oob-free[i], lpc32xx_nand_mlc_registers-buff, 6);
+ }
+ return max_bitflips;
+}
+
Why keep track of max_bitflips if the caller doesn't use it?
+#define LARGE_PAGE_SIZE 2048
+
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+ struct lpc32xx_oob oob;
+ unsigned int page = offs / LARGE_PAGE_SIZE;
+ unsigned int left = DIV_ROUND_UP(size, LARGE_PAGE_SIZE);
+
+ while (left) {
+ int res = read_single_page(dst, page, oob);
+ page++;
+ /* if read succeeded, even if fixed by ECC */
+ if (res = 0) {
+ /* skip bad block */
+ if (oob.free[0].free_oob_bytes[0] != 0xff)
+ continue;
+ if (oob.free[0].free_oob_bytes[1] != 0xff)
+ continue;
+ /* page is good, keep it */
+ dst += LARGE_PAGE_SIZE;
+ left--;
+ }
You should be checking the designated page(s) of the block, rather than
the current page, for the bad block markers -- and skipping the entire
block if it's bad.
Also, if you fail ECC, that should be a fatal error, not something to
silently skip.
-Scott
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Re: [U-Boot] [PATCH] autoboot.c: Add feature to stop autobooting via SHA256 encrypted password
Hi Simon,
On 13.03.2015 03:48, Simon Glass wrote:
This patch adds the feature to only stop the autobooting, and therefor
boot into the U-Boot prompt, when the input string / password matches
a values that is encypted via a SHA256 hash and saved in the environment.
This feature is enabled by defined these config options:
CONFIG_AUTOBOOT_KEYED
CONFIG_AUTOBOOT_STOP_STR_SHA256
Signed-off-by: Stefan Roese s...@denx.de
This is certainly interesting but I think brings us back to a point
Simon made a long while back about needing to factor out this code
better. Especially since this adds big long #if-#else-#endif blocks.
Can we re-do this so at least have some functions be called out instead?
Thanks!
Also if these CONFIG options are in Kconfig (as they should be) then we can use
if (IS_ENABLED(CONFIG_AUTOBOOT_STOP_STR_SHA256))
instead of #ifdef which may improve the code.
Right. I also thought about this. But the resulting code has all the
functionality extracted into 2 functions:
#if defined(CONFIG_AUTOBOOT_STOP_STR_SHA256)
static int passwd_abort(uint64_t etime)
{
const char *sha_env_str = getenv(bootstopkeysha256);
...
}
#else
static int passwd_abort(uint64_t etime)
{
int abort = 0;
...
}
#endif
And this function is now called unconditionally:
...
abort = passwd_abort(etime);
So there is nothing here that could be simplified by using IS_ENABLED().
I could of course just add this new config option to Kconfig. But with
all the other related options not in Kconfig (CONFIG_AUTOBOOT_KEYED,
CONFIG_AUTOBOOT_DELAY_STR...), this doesn't make much sense. So at some
point all those config options should be moved to Kconfig. Unfortunately
I don't have the time for this right now. But I'll add it to my list to
do this at a later time.
Thanks,
Stefan
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[U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys-virt address translations
BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. That document also states that Software accessing RAM using the DMA engines must use bus addresses (base at 0xc000). However, this appears to be incorrect since it does not work in practice on the bcm2835 (although it does on bcm2836). usb start causes some EABI function to call raise(8), presumably due to corrupted USB IN data (the converse is true on bcm2836; a value of 4 causes signals). However, I haven't investigated the cause. A value of 4 matches what the RPI Foundation's kernel; see the definition of _REAL_BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h. With the code updated to implement a phys-bus translation by setting the top two bits of DWC2 DMA addresses to 4, USB keyboard support appears stable. A similar change is made for bcm2836 (RPi 2). I can't justify this value since it doesn't match the RPi Foundation kernel. However, it does appear to work for the built-in USB Ethernet at least. Ideally, the bcm2835 SoC support would provide some common function for any DMA-capable driver to call to perform the phys-bus translation, rather than placing ifdefs in each driver file. However, I can't find such a standard function in U-Boot. I'm not sure if e.g. SDHCI needs this change too? It appears to work fine without... Cc: Eric Anholt e...@anholt.net Cc: Gordon Hollingworth gor...@holliweb.co.uk Signed-off-by: Stephen Warren swar...@wwwdotorg.org --- (For those CC'd: note that this is a patch for U-Boot) drivers/usb/host/dwc2.c | 22 +- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index e370d29ffc8e..f647461eabbb 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -752,6 +752,7 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, uint32_t xfer_len; uint32_t num_packets; int stop_transfer = 0; + uint32_t dma_addr; debug(%s: msg: pipe %lx pid %d in %d len %d\n, __func__, pipe, *pid, in, len); @@ -792,7 +793,26 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, if (!in) memcpy(aligned_buffer, (char *)buffer + done, len); - writel((uint32_t)aligned_buffer, hc_regs-hcdma); + dma_addr = (uint32_t)aligned_buffer; +#if defined(CONFIG_BCM2836) + /* +* BCM2836 bus addresses use the top 2 bits to determine +* whether peripherals use or bypass the GPU L1 and L2 cache. +* While this doesn't match the value the RPi Foundation +* kernel uses, it does work in practice for U-Boot. +*/ + dma_addr |= 0xc000; +#elif defined(CONFIG_BCM2835) + /* +* BCM2835 bus addresses use the top 2 bits to determine +* whether peripherals use or bypass the GPU L1 and L2 cache. +* This phys-virt mapping matches what the RPI Foundation's +* kernel does; see the definition of _REAL_BUS_OFFSET in +* arch/arm/mach-bcm2708/include/mach/memory.h. +*/ + dma_addr |= 0x4000; +#endif + writel(dma_addr, hc_regs-hcdma); /* Set host channel enable after all other setup is complete. */ clrsetbits_le32(hc_regs-hcchar, DWC2_HCCHAR_MULTICNT_MASK | -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] exynos5: add trace feature #ifdef in exynos5-common.h
We can enable / disable trace feature from the FTRACE config options. To enable, compile U-Boot with FTRACE=1. This patch add #ifdef FTRACE in exynos5-common.h for enable/disable to use FTRACE configs instead of having to change board config files. Signed-off-by: Inha Song ideal.s...@samsung.com --- include/configs/exynos5-common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 3ab8d55..2eddb07 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -16,14 +16,14 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_EXYNOS_SPL -/* Allow tracing to be enabled */ +#ifdef FTRACE #define CONFIG_TRACE #define CONFIG_CMD_TRACE #define CONFIG_TRACE_BUFFER_SIZE (16 20) #define CONFIG_TRACE_EARLY_SIZE(8 20) #define CONFIG_TRACE_EARLY #define CONFIG_TRACE_EARLY_ADDR0x5000 - +#endif /* Enable ACE acceleration for SHA1 and SHA256 */ #define CONFIG_EXYNOS_ACE_SHA -- 2.0.0.390.gcb682f8 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] kbuild: remove *_felconfig target
This target was added by commit cbdd9a9737cc (sunxi: kconfig: Add
%_felconfig rule to enable FEL build of sunxi platforms.).
At that time, U-Boot used separate .config files for U-Boot proper
and SPL. I understood the pain to modify both .config and
spl/.config.
Now, we have switched to single .config configuration.
It seems acceptable to run make menuconfig or friends to enable
CONFIG_SPL_FEL, as we do for other CONFIGs.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Cc: Ian Campbell i...@hellion.org.uk
Cc: Hans de Goede hdego...@redhat.com
---
scripts/multiconfig.sh | 12
1 file changed, 12 deletions(-)
diff --git a/scripts/multiconfig.sh b/scripts/multiconfig.sh
index cc8a787..9c6b256 100755
--- a/scripts/multiconfig.sh
+++ b/scripts/multiconfig.sh
@@ -70,16 +70,6 @@ do_board_defconfig () {
cleanup_after_defconfig
}
-do_board_felconfig () {
-do_board_defconfig ${1%%_felconfig}_defconfig
-if ! grep -q CONFIG_ARCH_SUNXI=y .config || ! grep -q CONFIG_SPL=y .config
; then
- echo $progname: Cannot felconfig a non-sunxi or non-SPL platform 2
- exit 1
-fi
-sed -i -e 's/\# CONFIG_SPL_FEL is not
set/CONFIG_SPL_FEL=y\nCONFIG_UART0_PORT_F=n/g' \
- .config
-}
-
do_others () {
run_make_config $1
}
@@ -90,8 +80,6 @@ target=$1
case $target in
*_defconfig)
do_board_defconfig $target;;
-*_felconfig)
- do_board_felconfig $target;;
*_config)
# backward compatibility
do_board_defconfig ${target%_config}_defconfig;;
--
1.9.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 5/8] lpc32xx: add LPC32xx SSP support (SPI mode)
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- move regs and functions in private struct
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm/include/asm/arch-lpc32xx/clk.h | 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/spi/Makefile | 1 +
drivers/spi/lpc32xx_ssp.c | 144 ++
5 files changed, 163 insertions(+)
create mode 100644 drivers/spi/lpc32xx_ssp.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index a407098..5a453e3 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -8,11 +8,13 @@
#include asm/arch/cpu.h
#include asm/arch/clk.h
#include asm/arch/uart.h
+#include asm/arch/mux.h
#include asm/io.h
#include dm.h
static struct clk_pm_regs*clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
+static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;
void lpc32xx_uart_init(unsigned int uart_id)
{
@@ -66,3 +68,15 @@ void lpc32xx_i2c_init(unsigned int devnum)
U_BOOT_DEVICE(lpc32xx_gpios) = {
.name = gpio_lpc32xx
};
+
+/* Mux for SCK0, MISO0, MOSI0. We do not use SSEL0. */
+
+#define P_MUX_SET_SSP0 0x1600
+
+void lpc32xx_ssp_init(void)
+{
+ /* Enable SSP0 interface */
+ writel(CLK_SSP0_ENABLE_CLOCK, clk-ssp_ctrl);
+ /* Mux SSP0 pins */
+ writel(P_MUX_SET_SSP0, mux-p_mux_set);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/clk.h
b/arch/arm/include/asm/arch-lpc32xx/clk.h
index 781ac07..2cb5703 100644
--- a/arch/arm/include/asm/arch-lpc32xx/clk.h
+++ b/arch/arm/include/asm/arch-lpc32xx/clk.h
@@ -155,6 +155,9 @@ struct clk_pm_regs {
#define CLK_NAND_MLC (1 1)
#define CLK_NAND_MLC_INT (1 5)
+/* SSP Clock Control Register bits */
+#define CLK_SSP0_ENABLE_CLOCK (1 0)
+
unsigned int get_sys_clk_rate(void);
unsigned int get_hclk_pll_rate(void);
unsigned int get_hclk_clk_div(void);
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index a4a05d1..86d5ee9 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -11,5 +11,6 @@ void lpc32xx_uart_init(unsigned int uart_id);
void lpc32xx_mac_init(void);
void lpc32xx_mlc_nand_init(void);
void lpc32xx_i2c_init(unsigned int devnum);
+void lpc32xx_ssp_init(void);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index edbd520..ce6f1cc 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
obj-$(CONFIG_FTSSP010_SPI) += ftssp010_spi.o
obj-$(CONFIG_ICH_SPI) += ich.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
+obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
obj-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
obj-$(CONFIG_MXC_SPI) += mxc_spi.o
diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c
new file mode 100644
index 000..0fc44a0
--- /dev/null
+++ b/drivers/spi/lpc32xx_ssp.c
@@ -0,0 +1,144 @@
+/*
+ * LPC32xx SSP interface (SPI mode)
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include linux/compat.h
+#include asm/io.h
+#include malloc.h
+#include spi.h
+#include asm/arch/clk.h
+
+/* SSP chip registers */
+struct ssp_regs {
+ u32 cr0;
+ u32 cr1;
+ u32 data;
+ u32 sr;
+ u32 cpsr;
+ u32 imsc;
+ u32 ris;
+ u32 mis;
+ u32 icr;
+ u32 dmacr;
+};
+
+/* CR1 register defines */
+#define SSP_CR1_SSP_ENABLE 0x0002
+
+/* SR register defines */
+#define SSP_SR_TNF 0x0002
+/* SSP status RX FIFO not empty bit */
+#define SSP_SR_RNE 0x0004
+
+/* zynq spi slave */
+struct lpc32xx_spi_slave {
+ struct spi_slave slave;
+ struct ssp_regs *regs;
+};
+
+static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave(
+ struct spi_slave *slave)
+{
+ return container_of(slave, struct lpc32xx_spi_slave, slave);
+}
+
+/* spi_init is called during boot when CONFIG_CMD_SPI is defined */
+void spi_init(void)
+{
+ /*
+* nothing to do: clocking was enabled in lpc32xx_ssp_enable()
+* and configuration will be done in spi_setup_slave()
+ */
+}
+
+/* the following is called in sequence by do_spi_xfer() */
+
+struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
+{
+ struct lpc32xx_spi_slave *lslave;
+
+ /* we only set up SSP0 for now, so ignore bus */
+
+ if (mode SPI_3WIRE) {
+ error(3-wire mode not supported);
+
[U-Boot] [PATCH v5 4/8] lpc32xx: add GPIO support
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private struct
- discourage readers from using functions implementation as an example
Changes in v2:
- move from legacy to Driver Model support
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 5 +
arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 +
drivers/gpio/Kconfig | 7 +
drivers/gpio/Makefile| 1 +
drivers/gpio/lpc32xx_gpio.c | 293 +++
5 files changed, 349 insertions(+)
create mode 100644 arch/arm/include/asm/arch-lpc32xx/gpio.h
create mode 100644 drivers/gpio/lpc32xx_gpio.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index 81b53ea..a407098 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -9,6 +9,7 @@
#include asm/arch/clk.h
#include asm/arch/uart.h
#include asm/io.h
+#include dm.h
static struct clk_pm_regs*clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
@@ -61,3 +62,7 @@ void lpc32xx_i2c_init(unsigned int devnum)
ctrl |= CLK_I2C2_ENABLE;
writel(ctrl, clk-i2cclk_ctrl);
}
+
+U_BOOT_DEVICE(lpc32xx_gpios) = {
+ .name = gpio_lpc32xx
+};
diff --git a/arch/arm/include/asm/arch-lpc32xx/gpio.h
b/arch/arm/include/asm/arch-lpc32xx/gpio.h
new file mode 100644
index 000..3bd94e3
--- /dev/null
+++ b/arch/arm/include/asm/arch-lpc32xx/gpio.h
@@ -0,0 +1,43 @@
+/*
+ * LPC32xx GPIO interface
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/**
+ * GPIO Register map for LPC32xx
+ */
+
+struct gpio_regs {
+ u32 p3_inp_state;
+ u32 p3_outp_set;
+ u32 p3_outp_clr;
+ u32 p3_outp_state;
+ /* Watch out! the following are shared between p2 and p3 */
+ u32 p2_p3_dir_set;
+ u32 p2_p3_dir_clr;
+ u32 p2_p3_dir_state;
+ /* Now back to 'one register for one port' */
+ u32 p2_inp_state;
+ u32 p2_outp_set;
+ u32 p2_outp_clr;
+ u32 reserved1[6];
+ u32 p0_inp_state;
+ u32 p0_outp_set;
+ u32 p0_outp_clr;
+ u32 p0_outp_state;
+ u32 p0_dir_set;
+ u32 p0_dir_clr;
+ u32 p0_dir_state;
+ u32 reserved2;
+ u32 p1_inp_state;
+ u32 p1_outp_set;
+ u32 p1_outp_clr;
+ u32 p1_outp_state;
+ u32 p1_dir_set;
+ u32 p1_dir_clr;
+ u32 p1_dir_state;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index b609e73..7b5178a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -7,3 +7,10 @@ config DM_GPIO
the GPIO uclass. Drivers provide methods to query the
particular GPIOs that they provide. The uclass interface
is defined in include/asm-generic/gpio.h.
+
+config LPC32XX_GPIO
+ bool LPC32XX GPIO driver
+ depends on DM
+ default n
+ help
+ Support for the LPC32XX GPIO driver.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index fe9a3b2..85f71c5 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -41,3 +41,4 @@ obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
obj-$(CONFIG_TCA642X) += tca642x.o
oby-$(CONFIG_SX151X) += sx151x.o
obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
+obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o
diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c
new file mode 100644
index 000..96b3125
--- /dev/null
+++ b/drivers/gpio/lpc32xx_gpio.c
@@ -0,0 +1,293 @@
+/*
+ * LPC32xxGPIO driver
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include asm/io.h
+#include asm/arch-lpc32xx/cpu.h
+#include asm/arch-lpc32xx/gpio.h
+#include asm-generic/gpio.h
+#include dm.h
+
+/**
+ * LPC32xx GPIOs work in banks but are non-homogeneous:
+ * - each bank holds a different number of GPIOs
+ * - some GPIOs are input/ouput, some input only, some output only;
+ * - some GPIOs have different meanings as an input and as an output;
+ * - some GPIOs are controlled on a given port and bit index, but
+ * read on another one.
+*
+ * In order to keep this code simple, GPIOS are considered here as
+ * homogeneous and linear, from 0 to 127.
+ *
+ * ** WARNING #1 **
+ *
+ * Client code is responsible for properly using valid GPIO numbers,
+ * including cases where a single physical GPIO has differing numbers
+ * for setting its direction, reading it and/or writing to it.
+ *
+ * ** WARNING #2 **
+ *
+ * Please read NOTE in description of
[U-Boot] [PATCH v5 1/8] lpc32xx: add Ethernet support
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx/config.h| 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/net/Makefile | 1 +
drivers/net/lpc32xx_eth.c | 636 ++
include/netdev.h | 1 +
7 files changed, 658 insertions(+)
create mode 100644 drivers/net/lpc32xx_eth.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
b/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
index 35095a9..eec4d9e 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
@@ -5,6 +5,7 @@
*/
#include common.h
+#include netdev.h
#include asm/arch/cpu.h
#include asm/arch/clk.h
#include asm/arch/wdt.h
@@ -55,3 +56,11 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+#ifdef CONFIG_LPC32XX_ETH
+int cpu_eth_init(bd_t *bis)
+{
+ lpc32xx_eth_initialize(bis);
+ return 0;
+}
+#endif
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index b567657..062db8d 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -37,3 +37,10 @@ void lpc32xx_uart_init(unsigned int uart_id)
writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
clk-u3clk + (uart_id - 3));
}
+
+void lpc32xx_mac_init(void)
+{
+ /* Enable MAC interface */
+ writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
+ | CLK_MAC_MII, clk-macclk_ctrl);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h
b/arch/arm/include/asm/arch-lpc32xx/config.h
index 564441c..d57bc48 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -52,6 +52,9 @@
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
+/* Ethernet */
+#define LPC32XX_ETH_BASE ETHERNET_BASE
+
/* NOR Flash */
#if defined(CONFIG_SYS_FLASH_CFI)
#define CONFIG_FLASH_CFI_DRIVER
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index 28812be..a6b8826 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -8,5 +8,6 @@
#define _LPC32XX_SYS_PROTO_H
void lpc32xx_uart_init(unsigned int uart_id);
+void lpc32xx_mac_init(void);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index b8b0803..af8941f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_GRETH) += greth.o
obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o
obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o
obj-$(CONFIG_LAN91C96) += lan91c96.o
+obj-$(CONFIG_LPC32XX_ETH) += lpc32xx_eth.o
obj-$(CONFIG_MACB) += macb.o
obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
obj-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
diff --git a/drivers/net/lpc32xx_eth.c b/drivers/net/lpc32xx_eth.c
new file mode 100644
index 000..16c8ef0
--- /dev/null
+++ b/drivers/net/lpc32xx_eth.c
@@ -0,0 +1,636 @@
+/*
+ * LPC32xx Ethernet MAC interface driver
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD - 3ADEV albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include net.h
+#include malloc.h
+#include miiphy.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/types.h
+#include asm/system.h
+#include asm/byteorder.h
+#include asm/arch/cpu.h
+#include asm/arch/config.h
+
+/*
+ * Notes:
+ *
+ * 1. Unless specified otherwise, all references to tables or paragraphs
+ *are to UM10326, LPC32x0 and LPC32x0/01 User manual.
+ *
+ * 2. Only bitfield masks/values which are actually used by the driver
+ *are defined.
+ */
+
+/* a single RX descriptor. The controller has an array of these */
+struct lpc32xx_eth_rxdesc {
+ u32 packet; /* Receive packet pointer */
+ u32 control;/* Descriptor command status */
+};
+
+#define LPC32XX_ETH_RX_DESC_SIZE (sizeof(struct lpc32xx_eth_rxdesc))
+
+/* RX control bitfields/masks (see Table 330) */
+#define LPC32XX_ETH_RX_CTRL_SIZE_MASK 0x07FF
+#define LPC32XX_ETH_RX_CTRL_UNUSED0x7800
+#define LPC32XX_ETH_RX_CTRL_INTERRUPT 0x8000
+
+/* a single RX status. The controller has an array of these */
+struct lpc32xx_eth_rxstat {
+ u32 statusinfo; /* Transmit Descriptor status */
+ u32 statushashcrc; /* Transmit Descriptor CRCs */
+};
+
+#define LPC32XX_ETH_RX_STAT_SIZE (sizeof(struct lpc32xx_eth_rxstat))
+
+/* RX statusinfo bitfields/masks (see Table 333) */
+#define RX_STAT_RXSIZE 0x07FF
+/* Helper: OR of all errors except RANGE */
+#define RX_STAT_ERRORS
[U-Boot] [PATCH v5 3/8] lpc32xx: i2c: add LPC32xx I2C interface support
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/i2c/Makefile | 1 +
drivers/i2c/lpc32xx_i2c.c | 249 ++
6 files changed, 268 insertions(+)
create mode 100644 drivers/i2c/lpc32xx_i2c.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index be4c93d..81b53ea 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -50,3 +50,14 @@ void lpc32xx_mlc_nand_init(void)
/* Enable NAND interface */
writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, clk-flashclk_ctrl);
}
+
+void lpc32xx_i2c_init(unsigned int devnum)
+{
+ /* Enable I2C interface */
+ uint32_t ctrl = readl(clk-i2cclk_ctrl);
+ if (devnum == 1)
+ ctrl |= CLK_I2C1_ENABLE;
+ if (devnum == 2)
+ ctrl |= CLK_I2C2_ENABLE;
+ writel(ctrl, clk-i2cclk_ctrl);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/clk.h
b/arch/arm/include/asm/arch-lpc32xx/clk.h
index bc7d33d..781ac07 100644
--- a/arch/arm/include/asm/arch-lpc32xx/clk.h
+++ b/arch/arm/include/asm/arch-lpc32xx/clk.h
@@ -123,6 +123,10 @@ struct clk_pm_regs {
#define CLK_MAC_SLAVE (1 1)
#define CLK_MAC_REG(1 0)
+/* I2C Clock Control Register bits */
+#define CLK_I2C2_ENABLE(1 1)
+#define CLK_I2C1_ENABLE(1 0)
+
/* Timer Clock Control1 Register bits */
#define CLK_TIMCLK_MOTOR (1 6)
#define CLK_TIMCLK_TIMER3 (1 5)
diff --git a/arch/arm/include/asm/arch-lpc32xx/cpu.h
b/arch/arm/include/asm/arch-lpc32xx/cpu.h
index 199b4a0..1067107 100644
--- a/arch/arm/include/asm/arch-lpc32xx/cpu.h
+++ b/arch/arm/include/asm/arch-lpc32xx/cpu.h
@@ -37,6 +37,8 @@
#define UART4_BASE 0x40088000 /* UART 4 registers base*/
#define UART5_BASE 0x4009 /* UART 5 registers base*/
#define UART6_BASE 0x40098000 /* UART 6 registers base*/
+#define I2C1_BASE 0x400A /* I2C 1 registers base*/
+#define I2C2_BASE 0x400A8000 /* I2C 2 registers base*/
/* External SDRAM Memory Bank base addresses */
#define EMC_DYCS0_BASE 0x8000 /* SDRAM DYCS0 base address */
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index 0c4e712..a4a05d1 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -10,5 +10,6 @@
void lpc32xx_uart_init(unsigned int uart_id);
void lpc32xx_mac_init(void);
void lpc32xx_mlc_nand_init(void);
+void lpc32xx_i2c_init(unsigned int devnum);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 774bc94..26ea854 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o
obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
+obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c
new file mode 100644
index 000..78d26e4
--- /dev/null
+++ b/drivers/i2c/lpc32xx_i2c.c
@@ -0,0 +1,249 @@
+/*
+ * LPC32xx I2C interface driver
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD - 3ADEV albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include i2c.h
+#include asm/errno.h
+#include asm/arch/clk.h
+
+/*
+ * Provide default speed and slave if target did not
+ */
+
+#if !defined(CONFIG_SYS_I2C_LPC32XX_SPEED)
+#define CONFIG_SYS_I2C_LPC32XX_SPEED 35
+#endif
+
+#if !defined(CONFIG_SYS_I2C_LPC32XX_SLAVE)
+#define CONFIG_SYS_I2C_LPC32XX_SLAVE 0
+#endif
+
+/* i2c register set */
+struct lpc32xx_i2c_registers {
+ union {
+ u32 rx;
+ u32 tx;
+ };
+ u32 stat;
+ u32 ctrl;
+ u32 clk_hi;
+ u32 clk_lo;
+ u32 adr;
+ u32 rxfl;
+ u32 txfl;
+ u32 rxb;
+ u32 txb;
+ u32 stx;
+ u32 stxfl;
+};
+
+/* TX register fields */
+#define LPC32XX_I2C_TX_START 0x0100
+#define LPC32XX_I2C_TX_STOP0x0200
+
+/* Control register values */
+#define LPC32XX_I2C_SOFT_RESET 0x0100
+
+/* Status register values */
+#define LPC32XX_I2C_STAT_TFF
[U-Boot] [PATCH v5 0/8] Extend LPC32xx functionality and add LPC32xx-based work_92015 board
This series extends functionality for the LPC32xx platform and introduces the WORK Microwave work_92105 board which makes use of the extended functionality. NOTES: A - I2C driver remains non-DM During v2 review, it was suggested to move to DM for I2C. However, this caused issues with the 'date', 'dtt' and 'eeprom' commands which are configured in this board. Therefore the I2C move to DM was not done. B - Some checkpatch diagnostics are not fixed The following warnings checkpatch warnings and checks were not fixed: 1. warning: arch/arm/Kconfig,135: please write a paragraph that describes the config symbol fully Other symbols in the same file have no description either. For consistency, I did not add the requested description. 1. check: include/configs/work_92105.h,187: spaces required around that ':' (ctx:VxV) (5 occurrences on the same line) This is due to the value of CONFIG_ETHADDR not being in quotes. As it never is in any other definition of CONFIG_ETHADDR, I left it unchanged. Changes in v5: - switch to CONFIG_SYS_NAND_SELF_INIT - switched board NAND config to CONFIG_SYS_NAND_SELF_INIT Changes in v4: - remove two debugging statements - add __iomem to regs struct - remove useless 'else return;' - take BB marker out of free OOB area - replace magic numbers in OOB reads/writes - add timeouts in NAND loops - use DIV_ROUND_UP where applicable - fix erroneous comment - skip bad blocks in SPL chainload loop Changes in v3: - move DM dependency constraint into Kconfig - move regs pointer and function cache into private struct - discourage readers from using functions implementation as an example - move regs and functions in private struct - remove script/Makefile.spl change - use writel() in DRAM initialization code - remove useless conditionals in dram.c - fix and complete the board README - remove redundant CONFIG_CMD_DM from config header file - add a note re the hard-coded MAC address - add 'single flashable file' make target Changes in v2: - move from legacy to Driver Model support - added MUX setting for SSP0 - cosmetic: added a blank line before copyright - move boot image generation to mkimage framework Albert ARIBAUD (3ADEV) (8): lpc32xx: add Ethernet support lpc32xx: mtd: nand: add MLC NAND controller lpc32xx: i2c: add LPC32xx I2C interface support lpc32xx: add GPIO support lpc32xx: add LPC32xx SSP support (SPI mode) dtt: add ds620 support lpc32xx: add lpc32xx-spl.bin boot image target lpc32xx: add support for board work_92105 Makefile | 20 + arch/arm/Kconfig | 6 + arch/arm/cpu/arm926ejs/lpc32xx/Makefile| 2 + arch/arm/cpu/arm926ejs/lpc32xx/clk.c | 34 ++ arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 13 + arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 43 ++ arch/arm/cpu/arm926ejs/lpc32xx/dram.c | 79 +++ arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S | 45 ++ arch/arm/include/asm/arch-lpc32xx/clk.h| 16 + arch/arm/include/asm/arch-lpc32xx/config.h | 3 + arch/arm/include/asm/arch-lpc32xx/cpu.h| 3 + arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 ++ arch/arm/include/asm/arch-lpc32xx/mux.h| 18 + arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 8 +- board/work-microwave/work_92105/Kconfig| 15 + board/work-microwave/work_92105/MAINTAINERS| 6 + board/work-microwave/work_92105/Makefile | 10 + board/work-microwave/work_92105/README | 91 +++ board/work-microwave/work_92105/work_92105.c | 62 ++ .../work-microwave/work_92105/work_92105_display.c | 349 +++ .../work-microwave/work_92105/work_92105_display.h | 14 + board/work-microwave/work_92105/work_92105_spl.c | 33 + common/image.c | 1 + configs/work_92105_defconfig | 5 + drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/lpc32xx_gpio.c| 293 + drivers/hwmon/Makefile | 1 + drivers/hwmon/ds620.c | 65 ++ drivers/i2c/Makefile | 1 + drivers/i2c/lpc32xx_i2c.c | 249 drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/lpc32xx_nand_mlc.c| 674 + drivers/net/Makefile | 1 + drivers/net/lpc32xx_eth.c | 636 +++ drivers/spi/Makefile | 1 + drivers/spi/lpc32xx_ssp.c | 144 + include/configs/work_92105.h | 268 include/dtt.h | 15 +- include/image.h
[U-Boot] [PATCH v5 2/8] lpc32xx: mtd: nand: add MLC NAND controller
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5:
- switch to CONFIG_SYS_NAND_SELF_INIT
Changes in v4:
- remove two debugging statements
- add __iomem to regs struct
- remove useless 'else return;'
- take BB marker out of free OOB area
- replace magic numbers in OOB reads/writes
- add timeouts in NAND loops
- use DIV_ROUND_UP where applicable
- fix erroneous comment
- skip bad blocks in SPL chainload loop
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 6 +
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/lpc32xx_nand_mlc.c | 674 ++
5 files changed, 686 insertions(+)
create mode 100644 drivers/mtd/nand/lpc32xx_nand_mlc.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index 062db8d..be4c93d 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -44,3 +44,9 @@ void lpc32xx_mac_init(void)
writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
| CLK_MAC_MII, clk-macclk_ctrl);
}
+
+void lpc32xx_mlc_nand_init(void)
+{
+ /* Enable NAND interface */
+ writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, clk-flashclk_ctrl);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/clk.h
b/arch/arm/include/asm/arch-lpc32xx/clk.h
index 92f6c15..bc7d33d 100644
--- a/arch/arm/include/asm/arch-lpc32xx/clk.h
+++ b/arch/arm/include/asm/arch-lpc32xx/clk.h
@@ -147,6 +147,10 @@ struct clk_pm_regs {
/* DMA Clock Control Register bits */
#define CLK_DMA_ENABLE (1 0)
+/* NAND Clock Control Register bits */
+#define CLK_NAND_MLC (1 1)
+#define CLK_NAND_MLC_INT (1 5)
+
unsigned int get_sys_clk_rate(void);
unsigned int get_hclk_pll_rate(void);
unsigned int get_hclk_clk_div(void);
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index a6b8826..0c4e712 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -9,5 +9,6 @@
void lpc32xx_uart_init(unsigned int uart_id);
void lpc32xx_mac_init(void);
+void lpc32xx_mlc_nand_init(void);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 1f02bfc..347ea62 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
+obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
obj-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
obj-$(CONFIG_NAND_MXC) += mxc_nand.o
diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c
b/drivers/mtd/nand/lpc32xx_nand_mlc.c
new file mode 100644
index 000..6b376c4
--- /dev/null
+++ b/drivers/mtd/nand/lpc32xx_nand_mlc.c
@@ -0,0 +1,674 @@
+/*
+ * LPC32xx MLC NAND flash controller driver
+ *
+ * (C) Copyright 2014 3ADEV http://3adev.com
+ * Written by Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * NOTE:
+ *
+ * The MLC NAND flash controller provides hardware Reed-Solomon ECC
+ * covering in- and out-of-band data together. Therefore, in- and out-
+ * of-band data must be written together in order to have a valid ECC.
+ *
+ * Consequently, pages with meaningful in-band data are written with
+ * blank (all-ones) out-of-band data and a valid ECC, and any later
+ * out-of-band data write will void the ECC.
+ *
+ * Therefore, code which reads such late-written out-of-band data
+ * should not rely on the ECC validity.
+ */
+
+#include common.h
+#include nand.h
+#include asm/errno.h
+#include asm/io.h
+#include nand.h
+#include asm/arch/clk.h
+#include asm/arch/sys_proto.h
+
+/*
+ * MLC NAND controller registers.
+ */
+struct lpc32xx_nand_mlc_registers {
+ u8 buff[32768]; /* controller's serial data buffer */
+ u8 data[32768]; /* NAND's raw data buffer */
+ u32 cmd;
+ u32 addr;
+ u32 ecc_enc_reg;
+ u32 ecc_dec_reg;
+ u32 ecc_auto_enc_reg;
+ u32 ecc_auto_dec_reg;
+ u32 rpr;
+ u32 wpr;
+ u32 rubp;
+ u32 robp;
+ u32 sw_wp_add_low;
+ u32 sw_wp_add_hig;
+ u32 icr;
+ u32 time_reg;
+ u32 irq_mr;
+ u32 irq_sr;
+ u32 lock_pr;
+ u32 isr;
+ u32 ceh;
+};
+
+/* LOCK_PR register defines */
+#define LOCK_PR_UNLOCK_KEY 0xA25E /* Magic unlock value */
+
+/* ICR defines */
+#define ICR_LARGE_BLOCKS 0x0004/*
[U-Boot] [PATCH 4/4] ARM: atmel: at91sam9n12ek: enable spl support
Enable SPL support for at91sam9n12ek boards, now it supports
boot up from NAND flash, serial flash.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/Makefile| 1 +
arch/arm/mach-at91/include/mach/at91_pmc.h | 4 +-
arch/arm/mach-at91/mpddrc.c| 2 +-
arch/arm/mach-at91/spl_at91.c | 2 +-
board/atmel/at91sam9n12ek/at91sam9n12ek.c | 73 ++
configs/at91sam9n12ek_nandflash_defconfig | 7 +--
configs/at91sam9n12ek_spiflash_defconfig | 7 +--
include/configs/at91sam9n12ek.h| 58 +++-
9 files changed, 144 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index bdf87f9..30c4e17 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -75,6 +75,7 @@ config TARGET_PM9G45
config TARGET_AT91SAM9N12EK
bool Atmel AT91SAM9N12-EK board
select CPU_ARM926EJS
+ select SUPPORT_SPL
config TARGET_AT91SAM9RLEK
bool Atmel at91sam9rl reference board
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index ba83616..0d3ee48 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,6 +2,7 @@ obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
ifneq ($(CONFIG_SPL_BUILD),)
obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
+obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h
b/arch/arm/mach-at91/include/mach/at91_pmc.h
index c903260..ebb7dec 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -98,7 +98,7 @@ typedef struct at91_pmc {
#define AT91_PMC_MCKR_CSS_MASK 0x0003
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
- defined(CONFIG_AT91SAM9X5)
+ defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
#define AT91_PMC_MCKR_PRES_1 0x
#define AT91_PMC_MCKR_PRES_2 0x0010
#define AT91_PMC_MCKR_PRES_4 0x0020
@@ -128,7 +128,7 @@ typedef struct at91_pmc {
#define AT91_PMC_MCKR_MDIV_1 0x
#define AT91_PMC_MCKR_MDIV_2 0x0100
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
- defined(CONFIG_AT91SAM9X5)
+ defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
#define AT91_PMC_MCKR_MDIV_3 0x0300
#endif
#define AT91_PMC_MCKR_MDIV_4 0x0200
diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c
index 24d5fcd..e2b6a49 100644
--- a/arch/arm/mach-at91/mpddrc.c
+++ b/arch/arm/mach-at91/mpddrc.c
@@ -20,7 +20,7 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
static int ddr2_decodtype_is_seq(u32 cr)
{
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
- defined(CONFIG_AT91SAM9X5)
+ defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
if (cr ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
return 0;
#endif
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index e28e568..a79a9dc 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -115,7 +115,7 @@ void board_init_f(ulong dummy)
timer_init();
/* enable clocks for all PIOs */
-#ifdef CONFIG_AT91SAM9X5
+#if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
at91_periph_clk_enable(ATMEL_ID_PIOAB);
at91_periph_clk_enable(ATMEL_ID_PIOCD);
#else
diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c
b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
index 9adc992..4f46a03 100644
--- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c
+++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
@@ -257,3 +257,76 @@ int dram_init(void)
CONFIG_SYS_SDRAM_SIZE);
return 0;
}
+
+#if defined(CONFIG_SPL_BUILD)
+#include spl.h
+#include nand.h
+
+void at91_spl_board_init(void)
+{
+#ifdef CONFIG_SYS_USE_MMC
+ at91_mci_hw_init();
+#elif CONFIG_SYS_USE_NANDFLASH
+ at91sam9n12ek_nand_hw_init();
+#elif CONFIG_SYS_USE_SPIFLASH
+ at91_spi0_hw_init(1 4);
+#endif
+}
+
+#include asm/arch/atmel_mpddrc.h
+static void ddr2_conf(struct atmel_mpddr *ddr2)
+{
+ ddr2-md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+ ddr2-cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+ ATMEL_MPDDRC_CR_NR_ROW_13 |
+ ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
+ ATMEL_MPDDRC_CR_NB_8BANKS |
+ ATMEL_MPDDRC_CR_DECOD_INTERLEAVED);
+
+ ddr2-rtr = 0x411;
+
+ ddr2-tpr0 = (6 ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
+ 2 ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
+
[U-Boot] [PATCH 2/4] ARM: atmel: at91sam9m10g45ek: enable spl support
Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.
As the boot from SD/MMC card with FAT file system, the BSS
segment is too big to fit into SRAM, so, use the lds to put
it into SDRAM.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 48 +++
arch/arm/mach-at91/spl_at91.c | 6 +-
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 80 +
configs/at91sam9m10g45ek_mmc_defconfig | 7 ++-
configs/at91sam9m10g45ek_nandflash_defconfig| 7 ++-
include/configs/at91sam9m10g45ek.h | 58 ++
7 files changed, 200 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 30945c1..25da926 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -66,6 +66,7 @@ config TARGET_STAMP9G20
config TARGET_AT91SAM9M10G45EK
bool Atmel AT91SAM9M10G45-EK board
select CPU_ARM926EJS
+ select SUPPORT_SPL
config TARGET_PM9G45
bool Ronetix pm9g45 board
diff --git a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
new file mode 100644
index 000..acadd1d
--- /dev/null
+++ b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ * Bo Shen voice.s...@atmel.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+ LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+ LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ __start = .;
+ *(.vectors)
+ arch/arm/cpu/arm926ejs/start.o (.text*)
+ *(.text*)
+ } .sram
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } .sram
+
+ . = ALIGN(4);
+ .data : { *(SORT_BY_ALIGNMENT(.data*)) } .sram
+
+ . = ALIGN(4);
+ __image_copy_end = .;
+
+ .end :
+ {
+ *(.__end)
+ } .sram
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_end = .;
+ } .sdram
+}
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index 89f588b..af6fc0d 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -71,7 +71,11 @@ void __weak at91_spl_board_init(void)
{
}
-void spl_board_init(void)
+void __weak spl_board_init(void)
+{
+}
+
+void board_init_f(ulong dummy)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index b807ef9..4289179 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -8,6 +8,7 @@
#include common.h
#include asm/io.h
+#include asm/arch/clk.h
#include asm/arch/at91sam9g45_matrix.h
#include asm/arch/at91sam9_smc.h
#include asm/arch/at91_common.h
@@ -15,6 +16,7 @@
#include asm/arch/gpio.h
#include asm/arch/clk.h
#include lcd.h
+#include linux/mtd/nand.h
#include atmel_lcdc.h
#include atmel_mci.h
#if defined(CONFIG_RESET_PHY_R) defined(CONFIG_MACB)
@@ -71,6 +73,84 @@ void at91sam9m10g45ek_nand_hw_init(void)
}
#endif
+#if defined(CONFIG_SPL_BUILD)
+#include spl.h
+#include nand.h
+
+void at91_spl_board_init(void)
+{
+ /*
+* On the at91sam9m10g45ek board, the chip wm9711 stays in the
+* test mode, so it needs do some action to exit test mode.
+*/
+ at91_periph_clk_enable(ATMEL_ID_PIODE);
+ at91_set_gpio_output(AT91_PIN_PD7, 0);
+ at91_set_gpio_output(AT91_PIN_PD8, 0);
+ at91_set_pio_pullup(AT91_PIO_PORTD, 7, 1);
+ at91_set_pio_pullup(AT91_PIO_PORTD, 8, 1);
+
+#ifdef CONFIG_SYS_USE_MMC
+ at91_mci_hw_init();
+#elif CONFIG_SYS_USE_NANDFLASH
+ at91sam9m10g45ek_nand_hw_init();
+#endif
+}
+
+#include asm/arch/atmel_mpddrc.h
+static void ddr2_conf(struct atmel_mpddr *ddr2)
+{
+ ddr2-md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+ ddr2-cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+ ATMEL_MPDDRC_CR_NR_ROW_14 |
+ ATMEL_MPDDRC_CR_DQMS_SHARED |
+ ATMEL_MPDDRC_CR_CAS_DDR_CAS3);
+
+ ddr2-rtr = 0x24b;
+
+ ddr2-tpr0 = (6 ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */
+ 2 ATMEL_MPDDRC_TPR0_TRCD_OFFSET |/* 2*7.5 = 15 ns */
+ 2
[U-Boot] [PATCH 3/4] ARM: atmel: at91sam9x5ek: enable spl support
Enable SPL support for at91sam9x5ek board. Now, it supports
boot up from NAND flash and SPI flash.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/include/mach/at91_pmc.h | 6 ++-
arch/arm/mach-at91/include/mach/at91sam9x5.h | 10
arch/arm/mach-at91/mpddrc.c | 3 +-
arch/arm/mach-at91/spl.c | 2 +-
arch/arm/mach-at91/spl_at91.c| 5 ++
board/atmel/at91sam9x5ek/at91sam9x5ek.c | 74
configs/at91sam9x5ek_nandflash_defconfig | 7 +--
configs/at91sam9x5ek_spiflash_defconfig | 7 +--
include/configs/at91sam9x5ek.h | 57 +
11 files changed, 163 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 25da926..bdf87f9 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -83,6 +83,7 @@ config TARGET_AT91SAM9RLEK
config TARGET_AT91SAM9X5EK
bool Atmel AT91SAM9X5-EK board
select CPU_ARM926EJS
+ select SUPPORT_SPL
config TARGET_SAMA5D3_XPLAINED
bool SAMA5D3 Xplained board
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index e596ba6..ba83616 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,6 +2,7 @@ obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
ifneq ($(CONFIG_SPL_BUILD),)
obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
+obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
obj-y += spl.o
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h
b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 65691ab..c903260 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -97,7 +97,8 @@ typedef struct at91_pmc {
#define AT91_PMC_MCKR_CSS_PLLB 0x0003
#define AT91_PMC_MCKR_CSS_MASK 0x0003
-#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
+#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
+ defined(CONFIG_AT91SAM9X5)
#define AT91_PMC_MCKR_PRES_1 0x
#define AT91_PMC_MCKR_PRES_2 0x0010
#define AT91_PMC_MCKR_PRES_4 0x0020
@@ -126,7 +127,8 @@ typedef struct at91_pmc {
#else
#define AT91_PMC_MCKR_MDIV_1 0x
#define AT91_PMC_MCKR_MDIV_2 0x0100
-#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
+#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
+ defined(CONFIG_AT91SAM9X5)
#define AT91_PMC_MCKR_MDIV_3 0x0300
#endif
#define AT91_PMC_MCKR_MDIV_4 0x0200
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h
b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index 36a5cdf..d18c936 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -124,6 +124,16 @@
#define ATMEL_BASE_EHCI0x0070 /* USB Host controller
(EHCI) */
#endif
+/*
+ * External memory
+ */
+#define ATMEL_BASE_CS0 0x1000
+#define ATMEL_BASE_CS1 0x2000
+#define ATMEL_BASE_CS2 0x3000
+#define ATMEL_BASE_CS3 0x4000
+#define ATMEL_BASE_CS4 0x5000
+#define ATMEL_BASE_CS5 0x6000
+
/* 9x5 series chip id definitions */
#define ARCH_ID_AT91SAM9X5 0x819a05a0
#define ARCH_ID_VERSION_MASK 0x1f
diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c
index beec13d..24d5fcd 100644
--- a/arch/arm/mach-at91/mpddrc.c
+++ b/arch/arm/mach-at91/mpddrc.c
@@ -19,7 +19,8 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
static int ddr2_decodtype_is_seq(u32 cr)
{
-#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
+#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
+ defined(CONFIG_AT91SAM9X5)
if (cr ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
return 0;
#endif
diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c
index aaa5eec..27a405a 100644
--- a/arch/arm/mach-at91/spl.c
+++ b/arch/arm/mach-at91/spl.c
@@ -29,7 +29,7 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_MMC1;
#elif CONFIG_SYS_USE_NANDFLASH
return BOOT_DEVICE_NAND;
-#elif CONFIG_SYS_USE_SERIALFLASH
+#elif CONFIG_SYS_USE_SERIALFLASH || CONFIG_SYS_USE_SPIFLASH
return BOOT_DEVICE_SPI;
#endif
return BOOT_DEVICE_NONE;
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index af6fc0d..e28e568 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -115,9 +115,14 @@ void board_init_f(ulong dummy)
timer_init();
/* enable clocks for all PIOs */
+#ifdef CONFIG_AT91SAM9X5
+ at91_periph_clk_enable(ATMEL_ID_PIOAB);
[U-Boot] [PATCH 1/4] ARM: atmel: arm926ejs: fix clock configuration
Config MCKR according to the datasheet sequence, or else it
will cause the MCKR configuration failed.
Remove timeout checking for clock configuration, if configure
the clock failed, let the system hang while not run in wrong
clock configuration.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
arch/arm/mach-at91/arm926ejs/clock.c | 54 +++-
1 file changed, 28 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-at91/arm926ejs/clock.c
b/arch/arm/mach-at91/arm926ejs/clock.c
index f363982..8d6934e 100644
--- a/arch/arm/mach-at91/arm926ejs/clock.c
+++ b/arch/arm/mach-at91/arm926ejs/clock.c
@@ -195,50 +195,52 @@ int at91_clock_init(unsigned long main_clock)
void at91_plla_init(u32 pllar)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- int timeout = AT91_PLL_LOCK_TIMEOUT;
writel(pllar, pmc-pllar);
- while (!(readl(pmc-sr) (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) {
- timeout--;
- if (timeout == 0)
- break;
- }
+ while (!(readl(pmc-sr) AT91_PMC_LOCKA))
+ ;
}
void at91_pllb_init(u32 pllbr)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- int timeout = AT91_PLL_LOCK_TIMEOUT;
writel(pllbr, pmc-pllbr);
- while (!(readl(pmc-sr) (AT91_PMC_LOCKB | AT91_PMC_MCKRDY))) {
- timeout--;
- if (timeout == 0)
- break;
- }
+ while (!(readl(pmc-sr) AT91_PMC_LOCKB))
+ ;
}
void at91_mck_init(u32 mckr)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- int timeout = AT91_PLL_LOCK_TIMEOUT;
u32 tmp;
tmp = readl(pmc-mckr);
- tmp = ~(AT91_PMC_MCKR_PRES_MASK |
-AT91_PMC_MCKR_MDIV_MASK |
-AT91_PMC_MCKR_PLLADIV_MASK |
-AT91_PMC_MCKR_CSS_MASK);
- tmp |= mckr (AT91_PMC_MCKR_PRES_MASK |
- AT91_PMC_MCKR_MDIV_MASK |
- AT91_PMC_MCKR_PLLADIV_MASK |
- AT91_PMC_MCKR_CSS_MASK);
+ tmp = ~AT91_PMC_MCKR_PRES_MASK;
+ tmp |= mckr AT91_PMC_MCKR_PRES_MASK;
writel(tmp, pmc-mckr);
+ while (!(readl(pmc-sr) AT91_PMC_MCKRDY))
+ ;
- while (!(readl(pmc-sr) AT91_PMC_MCKRDY)) {
- timeout--;
- if (timeout == 0)
- break;
- }
+ tmp = readl(pmc-mckr);
+ tmp = ~AT91_PMC_MCKR_MDIV_MASK;
+ tmp |= mckr AT91_PMC_MCKR_MDIV_MASK;
+ writel(tmp, pmc-mckr);
+ while (!(readl(pmc-sr) AT91_PMC_MCKRDY))
+ ;
+
+ tmp = readl(pmc-mckr);
+ tmp = ~AT91_PMC_MCKR_PLLADIV_MASK;
+ tmp |= mckr AT91_PMC_MCKR_PLLADIV_MASK;
+ writel(tmp, pmc-mckr);
+ while (!(readl(pmc-sr) AT91_PMC_MCKRDY))
+ ;
+
+ tmp = readl(pmc-mckr);
+ tmp = ~AT91_PMC_MCKR_CSS_MASK;
+ tmp |= mckr AT91_PMC_MCKR_CSS_MASK;
+ writel(tmp, pmc-mckr);
+ while (!(readl(pmc-sr) AT91_PMC_MCKRDY))
+ ;
}
void at91_periph_clk_enable(int id)
--
2.3.0
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[U-Boot] [PATCH 0/4] ARM: atmel: boards: enable SPL support
This patch series enable SPL support for following boards: - at91sam9m10g45ek - NAND flash boot support - SD card boot support - at91sam9n12ek - NAND flash boot support - SPI flash boot support - at91sam9x5ek - NAND flash boot support - SPI flash boot support Bo Shen (4): ARM: atmel: arm926ejs: fix clock configuration ARM: atmel: at91sam9m10g45ek: enable spl support ARM: atmel: at91sam9x5ek: enable spl support ARM: atmel: at91sam9n12ek: enable spl support arch/arm/mach-at91/Kconfig | 3 + arch/arm/mach-at91/Makefile | 2 + arch/arm/mach-at91/arm926ejs/clock.c| 54 + arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 48 +++ arch/arm/mach-at91/include/mach/at91_pmc.h | 6 +- arch/arm/mach-at91/include/mach/at91sam9x5.h| 10 arch/arm/mach-at91/mpddrc.c | 3 +- arch/arm/mach-at91/spl.c| 2 +- arch/arm/mach-at91/spl_at91.c | 11 +++- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 80 + board/atmel/at91sam9n12ek/at91sam9n12ek.c | 73 ++ board/atmel/at91sam9x5ek/at91sam9x5ek.c | 74 +++ configs/at91sam9m10g45ek_mmc_defconfig | 7 ++- configs/at91sam9m10g45ek_nandflash_defconfig| 7 ++- configs/at91sam9n12ek_nandflash_defconfig | 7 ++- configs/at91sam9n12ek_spiflash_defconfig| 7 ++- configs/at91sam9x5ek_nandflash_defconfig| 7 ++- configs/at91sam9x5ek_spiflash_defconfig | 7 ++- include/configs/at91sam9m10g45ek.h | 58 ++ include/configs/at91sam9n12ek.h | 58 +- include/configs/at91sam9x5ek.h | 57 ++ 21 files changed, 531 insertions(+), 50 deletions(-) create mode 100644 arch/arm/mach-at91/arm926ejs/u-boot-spl.lds -- 2.3.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] ARM: atmel: at91sam9m10g45ek: enable spl support
Hi Bo, 2015-03-13 18:19 GMT+09:00 Bo Shen voice.s...@atmel.com: diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 6949d3a..84d3133 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -1,4 +1,5 @@ +CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=AT91SAM9M10G45,SYS_USE_MMC -CONFIG_ARM=y -CONFIG_ARCH_AT91=y -CONFIG_TARGET_AT91SAM9M10G45EK=y ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y ++S:CONFIG_TARGET_AT91SAM9M10G45EK=y I abolished the prefixes such +S. Now they are harmless, but meaningless. I am ripping off all of them: http://patchwork.ozlabs.org/patch/449347/ Could you please not change those three lines? -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/4] fastboot: call board_usb_init() to enable usb
Hi Dileep,
g_dnl_gadget_register() fails for dra7xx dwc3 gadget when running
cmd_fastboot. Calling board_usb_init() to fix this.
fastboot command is now added with an optional controller index
argument with default value as 0, to facilitate configurable
controller index.
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
Changes in v2:
- Changed fastboot command to facilitate passing controller
index
- Added board_usb_cleanup()
This patch considers the following change by Inha Song, without which
the build will be broken on BeagleBone Black platform
https://patchwork.ozlabs.org/patch/430303/
common/cmd_fastboot.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c
index 346ab80..9ca4a2f 100644
--- a/common/cmd_fastboot.c
+++ b/common/cmd_fastboot.c
@@ -10,11 +10,19 @@
#include common.h
#include command.h
#include g_dnl.h
+#include usb.h
static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char
*const argv[]) {
int ret;
+ int controller_index = 0;
+ if (argc == 2) {
+ char *usb_controller = argv[1];
+ controller_index = simple_strtoul(usb_controller,
NULL, 0);
+ }
+
+ board_usb_init(controller_index, USB_INIT_DEVICE);
g_dnl_clear_detach();
ret = g_dnl_register(usb_dnl_fastboot);
if (ret)
@@ -36,12 +44,13 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int
flag, int argc, char *const argv[])
g_dnl_unregister();
g_dnl_clear_detach();
+ board_usb_cleanup(controller_index, USB_INIT_DEVICE);
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
- fastboot, 1, 0, do_fastboot,
+ fastboot, 2, 0, do_fastboot,
use USB Fastboot protocol,
- \nLukasz Majewski l.majew...@samsung.com
- - run as a fastboot usb device
+ [USB_controller]\n
+ - run as a fastboot usb device via USB_controller
);
Acked-by: Lukasz Majewski l.majew...@samsung.com
Since I'm not CC'ed to all patches, I assume that this work would go
via other tree?
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH v5 8/8] lpc32xx: add support for board work_92105
Work_92105 from Work Microwave is an LPC3250- based board with the following features: - 64MB SDR DRAM - 1 GB SLC NAND, managed through MLC controller. - Ethernet - Ethernet + PHY SMSC8710 - I2C: - EEPROM (24M01-compatible) - RTC (DS1374-compatible) - Temperature sensor (DS620) - DACs (2 x MAX518) - SPI (through SSP interface) - Port expander MAX6957 - LCD display (HD44780-compatible), controlled through the port expander and DACs This board has SPL support, and uses the LPC32XX boot image format. Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr --- Changes in v5: - switched board NAND config to CONFIG_SYS_NAND_SELF_INIT Changes in v4: None Changes in v3: - use writel() in DRAM initialization code - remove useless conditionals in dram.c - fix and complete the board README - remove redundant CONFIG_CMD_DM from config header file - add a note re the hard-coded MAC address - add 'single flashable file' make target Changes in v2: None Makefile | 20 ++ arch/arm/Kconfig | 6 + arch/arm/cpu/arm926ejs/lpc32xx/Makefile| 2 + arch/arm/cpu/arm926ejs/lpc32xx/clk.c | 34 ++ arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 4 + arch/arm/cpu/arm926ejs/lpc32xx/dram.c | 79 + arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S | 45 +++ arch/arm/include/asm/arch-lpc32xx/clk.h| 5 + arch/arm/include/asm/arch-lpc32xx/cpu.h| 1 + arch/arm/include/asm/arch-lpc32xx/mux.h| 18 ++ arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 4 +- board/work-microwave/work_92105/Kconfig| 15 + board/work-microwave/work_92105/MAINTAINERS| 6 + board/work-microwave/work_92105/Makefile | 10 + board/work-microwave/work_92105/README | 91 ++ board/work-microwave/work_92105/work_92105.c | 62 .../work-microwave/work_92105/work_92105_display.c | 349 + .../work-microwave/work_92105/work_92105_display.h | 14 + board/work-microwave/work_92105/work_92105_spl.c | 33 ++ configs/work_92105_defconfig | 5 + include/configs/work_92105.h | 268 21 files changed, 1070 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/dram.c create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S create mode 100644 arch/arm/include/asm/arch-lpc32xx/mux.h create mode 100644 board/work-microwave/work_92105/Kconfig create mode 100644 board/work-microwave/work_92105/MAINTAINERS create mode 100644 board/work-microwave/work_92105/Makefile create mode 100644 board/work-microwave/work_92105/README create mode 100644 board/work-microwave/work_92105/work_92105.c create mode 100644 board/work-microwave/work_92105/work_92105_display.c create mode 100644 board/work-microwave/work_92105/work_92105_display.h create mode 100644 board/work-microwave/work_92105/work_92105_spl.c create mode 100644 configs/work_92105_defconfig create mode 100644 include/configs/work_92105.h diff --git a/Makefile b/Makefile index 9747bd2..6013712 100644 --- a/Makefile +++ b/Makefile @@ -896,6 +896,26 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \ u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE $(call if_changed,pad_cat) +MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE) + +lpc32xx-spl.img: spl/u-boot-spl.bin FORCE + $(call if_changed,mkimage) + +OBJCOPYFLAGS_lpc32xx-boot-0.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) + +lpc32xx-boot-0.bin: lpc32xx-spl.img + $(call if_changed,objcopy) + +OBJCOPYFLAGS_lpc32xx-boot-1.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) + +lpc32xx-boot-1.bin: lpc32xx-spl.img + $(call if_changed,objcopy) + +lpc32xx-full.bin: lpc32xx-boot-0.bin lpc32xx-boot-1.bin u-boot.img + $(call if_changed,cat) + +CLEAN_FILES += lpc32xx-* + OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \ --pad-to=$(CONFIG_TPL_PAD_TO) tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b9ebee1..10d9280 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -132,6 +132,11 @@ config TARGET_DEVKIT3250 bool Support devkit3250 select CPU_ARM926EJS +config TARGET_WORK_92105 + bool Support work_92105 + select CPU_ARM926EJS + select SUPPORT_SPL + config TARGET_MX25PDK bool Support mx25pdk select CPU_ARM926EJS @@ -871,6 +876,7 @@ source board/vpac270/Kconfig source board/wandboard/Kconfig source board/warp/Kconfig source board/woodburn/Kconfig +source board/work-microwave/work_92105/Kconfig source board/xaeniax/Kconfig source board/xilinx/zynqmp/Kconfig source board/zipitz2/Kconfig diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/Makefile
[U-Boot] [PATCH v5 7/8] lpc32xx: add lpc32xx-spl.bin boot image target
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- remove script/Makefile.spl change
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
tools/Makefile | 1 +
tools/lpc32xximage.c | 178 +++
4 files changed, 181 insertions(+)
create mode 100644 tools/lpc32xximage.c
diff --git a/common/image.c b/common/image.c
index a911aa9..162b682 100644
--- a/common/image.c
+++ b/common/image.c
@@ -149,6 +149,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_MXSIMAGE, mxsimage, Freescale MXS Boot Image,},
{ IH_TYPE_ATMELIMAGE, atmelimage, ATMEL ROM-Boot Image,},
{ IH_TYPE_X86_SETUP, x86_setup, x86 setup.bin,},
+ { IH_TYPE_LPC32XXIMAGE, lpc32xximage, LPC32XX Boot Image, },
{ -1, , , },
};
diff --git a/include/image.h b/include/image.h
index 0e6af00..3844be6 100644
--- a/include/image.h
+++ b/include/image.h
@@ -242,6 +242,7 @@ struct lmb;
#define IH_TYPE_ATMELIMAGE 18 /* ATMEL ROM bootable Image */
#define IH_TYPE_SOCFPGAIMAGE 19 /* Altera SOCFPGA Preloader */
#define IH_TYPE_X86_SETUP 20 /* x86 setup.bin Image */
+#define IH_TYPE_LPC32XXIMAGE 21 /* x86 setup.bin Image */
/*
* Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 88770b0..4bbb153 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -83,6 +83,7 @@ dumpimage-mkimage-objs := aisimage.o \
imximage.o \
kwbimage.o \
lib/md5.o \
+ lpc32xximage.o \
mxsimage.o \
omapimage.o \
os_support.o \
diff --git a/tools/lpc32xximage.c b/tools/lpc32xximage.c
new file mode 100644
index 000..6b3865f
--- /dev/null
+++ b/tools/lpc32xximage.c
@@ -0,0 +1,178 @@
+/*
+ * Image manipulator for LPC32XX SoCs
+ *
+ * (C) Copyright 2015 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * Derived from omapimage.c:
+ *
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby john.ri...@linaro.org
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor www.marvell.com
+ * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include imagetool.h
+#include compiler.h
+#include image.h
+
+/*
+ * NAND page 0 boot header
+ */
+
+struct nand_page_0_boot_header {
+ uint32_t data[129];
+ uint32_t pad[383];
+};
+
+/*
+ * Default ICC (interface configuration data [sic]) if none specified
+ * in board config
+ */
+
+#ifndef LPC32XX_BOOT_ICR
+#define LPC32XX_BOOT_ICR 0x0096
+#endif
+
+/*
+ * Default boot NAND page size if none specified in board config
+ */
+
+#ifndef LPC32XX_BOOT_NAND_PAGESIZE
+#define LPC32XX_BOOT_NAND_PAGESIZE 2048
+#endif
+
+/*
+ * Default boot NAND pages per sector if none specified in board config
+ */
+
+#ifndef LPC32XX_BOOT_NAND_PAGES_PER_SECTOR
+#define LPC32XX_BOOT_NAND_PAGES_PER_SECTOR 64
+#endif
+
+/*
+ * Maximum size for boot code is 56K unless defined in board config
+ */
+
+#ifndef LPC32XX_BOOT_CODESIZE
+#define LPC32XX_BOOT_CODESIZE (56*1024)
+#endif
+
+/* signature byte for a readable block */
+
+#define LPC32XX_BOOT_BLOCK_OK 0xaa
+
+static struct nand_page_0_boot_header lpc32xximage_header;
+
+static int lpc32xximage_check_image_types(uint8_t type)
+{
+ if (type == IH_TYPE_LPC32XXIMAGE)
+ return EXIT_SUCCESS;
+ return EXIT_FAILURE;
+}
+
+static int lpc32xximage_verify_header(unsigned char *ptr, int image_size,
+ struct image_tool_params *params)
+{
+ struct nand_page_0_boot_header *hdr =
+ (struct nand_page_0_boot_header *)ptr;
+
+ /* turn image size from bytes to NAND pages, page 0 included */
+ int image_size_in_pages = ((image_size - 1)
+ / LPC32XX_BOOT_NAND_PAGESIZE);
+
+ if (hdr-data[0] != (0xff LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[1] != (0xff ~LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[2] != (0xff LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[3] != (0xff ~LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[4] != (0xff image_size_in_pages))
+ return -1;
+ if (hdr-data[5] != (0xff ~image_size_in_pages))
+ return -1;
+ if (hdr-data[6] != (0xff image_size_in_pages))
+ return -1;
+ if (hdr-data[7] != (0xff ~image_size_in_pages))
+ return -1;
+ if
[U-Boot] [PATCH v5 6/8] dtt: add ds620 support
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65 ++
include/dtt.h | 15 ++--
3 files changed, 74 insertions(+), 7 deletions(-)
create mode 100644 drivers/hwmon/ds620.c
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 25b8e8a..b4fb057 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DTT_ADT7460) += adt7460.o
obj-$(CONFIG_DTT_DS1621) += ds1621.o
obj-$(CONFIG_DTT_DS1722) += ds1722.o
obj-$(CONFIG_DTT_DS1775) += ds1775.o
+obj-$(CONFIG_DTT_DS620) += ds620.o
obj-$(CONFIG_DTT_LM63) += lm63.o
obj-$(CONFIG_DTT_LM73) += lm73.o
obj-$(CONFIG_DTT_LM75) += lm75.o
diff --git a/drivers/hwmon/ds620.c b/drivers/hwmon/ds620.c
new file mode 100644
index 000..1ecc3da
--- /dev/null
+++ b/drivers/hwmon/ds620.c
@@ -0,0 +1,65 @@
+/*
+ * DS620 DTT support
+ *
+ * (C) Copyright 2014 3ADEV http://www.3adev.com
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Dallas Semiconductor's DS1621/1631 Digital Thermometer and Thermostat.
+ */
+
+#include common.h
+#include i2c.h
+#include dtt.h
+
+/*
+ * Device code
+ */
+#define DTT_I2C_DEV_CODE 0x48
+#define DTT_START_CONVERT 0x51
+#define DTT_TEMP 0xAA
+#define DTT_CONFIG 0xAC
+
+/*
+ * Config register MSB bits
+ */
+#define DTT_CONFIG_1SHOT 0x01
+#define DTT_CONFIG_AUTOC 0x02
+#define DTT_CONFIG_R0 0x04 /* always 1 */
+#define DTT_CONFIG_R1 0x08 /* always 1 */
+#define DTT_CONFIG_TLF 0x10
+#define DTT_CONFIG_THF 0x20
+#define DTT_CONFIG_NVB 0x40
+#define DTT_CONFIG_DONE0x80
+
+#define CHIP(sensor) (DTT_I2C_DEV_CODE + (sensor 0x07))
+
+int dtt_init_one(int sensor)
+{
+ uint8_t config = DTT_CONFIG_1SHOT
+ | DTT_CONFIG_R0
+ | DTT_CONFIG_R1;
+ return i2c_write(CHIP(sensor), DTT_CONFIG, 1, config, 1);
+}
+
+int dtt_get_temp(int sensor)
+{
+ uint8_t status;
+ uint8_t temp[2];
+
+ /* Start a conversion, may take up to 1 second. */
+ i2c_write(CHIP(sensor), DTT_START_CONVERT, 1, NULL, 0);
+ do {
+ if (i2c_read(CHIP(sensor), DTT_CONFIG, 1, status, 1))
+ /* bail out if I2C error */
+ status |= DTT_CONFIG_DONE;
+ } while (!(status DTT_CONFIG_DONE));
+ if (i2c_read(CHIP(sensor), DTT_TEMP, 1, temp, 2))
+ /* bail out if I2C error */
+ return -274; /* below absolute zero == error */
+
+ return ((int16_t)(temp[1] | (temp[0] 8))) 7;
+}
diff --git a/include/dtt.h b/include/dtt.h
index 058bca4..173159d 100644
--- a/include/dtt.h
+++ b/include/dtt.h
@@ -12,13 +12,14 @@
#define _DTT_H_
#if defined(CONFIG_DTT_ADM1021)|| \
-defined(CONFIG_DTT_ADT7460)|| \
-defined(CONFIG_DTT_DS1621) || \
-defined(CONFIG_DTT_DS1775) || \
-defined(CONFIG_DTT_LM63) || \
-defined(CONFIG_DTT_LM73) || \
-defined(CONFIG_DTT_LM75) || \
-defined(CONFIG_DTT_LM81)
+ defined(CONFIG_DTT_ADT7460) || \
+ defined(CONFIG_DTT_DS1621) || \
+ defined(CONFIG_DTT_DS1775) || \
+ defined(CONFIG_DTT_DS620) || \
+ defined(CONFIG_DTT_LM63)|| \
+ defined(CONFIG_DTT_LM73)|| \
+ defined(CONFIG_DTT_LM75)|| \
+ defined(CONFIG_DTT_LM81)
#define CONFIG_DTT /* We have a DTT */
--
2.1.0
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Re: [U-Boot] [PATCH 2/3] arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
Hello Stefan,
Am 12.03.2015 um 16:18 schrieb Stefan Roese:
Hi Markus,
On 12.03.2015 15:25, Markus Niebel wrote:
Am 12.03.2015 um 13:34 schrieb Stefan Roese:
By making the tqma6_iomuxc_spi() weak, this patch adds the possibility to
add a different function for this SPI configuration. This can be used
by other baseboards, that might have a different SPI setup.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
---
board/tqc/tqma6/tqma6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index c9e163e..29db838 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -145,7 +145,7 @@ static unsigned const tqma6_ecspi1_cs[] = {
TQMA6_SF_CS_GPIO,
};
-static void tqma6_iomuxc_spi(void)
+__weak void tqma6_iomuxc_spi(void)
{
unsigned i;
When implementing an baseboard specific init handler, we will get
a warning about unused
tqma6_ecspi1_pads and tqma6_ecspi1_cs, or did I miss something?
I'm not getting one with the current (unfinished) WRU4 baseboard. Which has
no SPI.
Oops, not understand the weak mechanism completely - compiler sees usage of data
in weak function but linker selects function from baseboard - correct?
If this is the case, we have only the duplication of IOMUX and CS gpio.
Just as a thought (not ready): Could we supply CS initialisation
data via defines in the
baseboard config header and append it to the tables if needed?
Not sure if I understand this correctly. Could you give an example? Again, my
current baseboard has no SPI at all.
tqma6_iomux_spi is for the SPI controller the serial nor is connected,
so baseboard specific data are additional CS.
You could solve the data duplication using
#define TQMA6_BB_ECSPI1_CS_GPIO IMX_GPIO_NR(n, mm),
#define TQMA6_BB_CS_PAD_CTRLNEW_PAD_CTRL(MX6_PAD_bla__GPIOn, IOmm,
PAD_CTRL)
and in the board file:
if !defined(TQMA6_BB_ECSPI1_CS_GPIO)
#define TQMA6_BB_ECSPI1_CS_GPIO
#endif
static unsigned const tqma6_ecspi1_cs[] = {
TQMA6_SF_CS_GPIO,
TQMA6_BB_ECSPI1_CS_GPIO
};
But OK, this looks not very nice
As I said, not completely ready, but would prevent some code duplication.
Thanks,
Stefan
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Re: [U-Boot] [PATCH 2/4] ARM: atmel: at91sam9m10g45ek: enable spl support
Hi Masahiro, On 03/13/2015 05:34 PM, Masahiro Yamada wrote: Hi Bo, 2015-03-13 18:19 GMT+09:00 Bo Shen voice.s...@atmel.com: diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 6949d3a..84d3133 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -1,4 +1,5 @@ +CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS=AT91SAM9M10G45,SYS_USE_MMC -CONFIG_ARM=y -CONFIG_ARCH_AT91=y -CONFIG_TARGET_AT91SAM9M10G45EK=y ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y ++S:CONFIG_TARGET_AT91SAM9M10G45EK=y I abolished the prefixes such +S. Now they are harmless, but meaningless. I am ripping off all of them: http://patchwork.ozlabs.org/patch/449347/ Could you please not change those three lines? Thanks. I will remove this change in next version. Thanks again. Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] kbuild: clean up glue code to delete scripts/multoconfig.sh
Masahiro Yamada (2): kbuild: remove *_felconfig target kbuild: remove scripts/multiconfig.sh Makefile | 13 +- scripts/kconfig/Makefile | 10 + scripts/multiconfig.sh | 102 --- 3 files changed, 21 insertions(+), 104 deletions(-) delete mode 100755 scripts/multiconfig.sh -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] kbuild: remove scripts/multiconfig.sh
We have switched to the single .config configuration system,
the same one as used in Linux Kernel.
The necessary glue code is small enough now, so move it to the
top-level Makefile and scripts/kconfig/Makefile, and then delete
scripts/multiconfig.sh.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
This patch requires
http://patchwork.ozlabs.org/patch/449347/
as a prerequisite.
Makefile | 13 +--
scripts/kconfig/Makefile | 10 ++
scripts/multiconfig.sh | 90
3 files changed, 21 insertions(+), 92 deletions(-)
delete mode 100755 scripts/multiconfig.sh
diff --git a/Makefile b/Makefile
index 9747bd2..73e1362 100644
--- a/Makefile
+++ b/Makefile
@@ -469,10 +469,10 @@ KBUILD_DEFCONFIG := sandbox_defconfig
export KBUILD_DEFCONFIG KBUILD_KCONFIG
config: scripts_basic outputmakefile FORCE
- +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@
+ $(Q)$(MAKE) $(build)=scripts/kconfig $@
%config: scripts_basic outputmakefile FORCE
- +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@
+ $(Q)$(MAKE) $(build)=scripts/kconfig $@
else
# ===
@@ -496,6 +496,15 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
# we execute the config step to be sure to catch updated Kconfig files
include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
+ @# If the following part fails, include/config/auto.conf should be
+ @# deleted so make silentoldconfig will be re-run on the next build.
+ $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.autoconf || \
+ { rm -f include/config/auto.conf; false; }
+ @# include/config.h has been updated after make silentoldconfig.
+ @# We need to touch include/config/auto.conf so it gets newer
+ @# than include/config.h.
+ @# Otherwise, 'make silentoldconfig' would be invoked twice.
+ $(Q)touch include/config/auto.conf
-include include/autoconf.mk
-include include/autoconf.mk.dep
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index 349f770..ff4ce6e 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -5,6 +5,12 @@
PHONY += oldconfig xconfig gconfig menuconfig config silentoldconfig
update-po-config \
localmodconfig localyesconfig
+# Added for U-Boot
+# Linux has defconfig files in arch/$(SRCARCH)/configs/,
+# on the other hand, U-Boot does in configs/.
+# Set SRCARCH to .. fake this Makefile.
+SRCARCH := ..
+
ifdef KBUILD_KCONFIG
Kconfig := $(KBUILD_KCONFIG)
else
@@ -104,6 +110,10 @@ endif
%_defconfig: $(obj)/conf
$(Q)$ --defconfig=arch/$(SRCARCH)/configs/$@ $(Kconfig)
+# Added for U-Boot (backward compatibility)
+%_config: %_defconfig
+ @:
+
configfiles=$(wildcard $(srctree)/kernel/configs/$(1).config
$(srctree)/arch/$(SRCARCH)/configs/$(1).config)
define mergeconfig
diff --git a/scripts/multiconfig.sh b/scripts/multiconfig.sh
deleted file mode 100755
index 9c6b256..000
--- a/scripts/multiconfig.sh
+++ /dev/null
@@ -1,90 +0,0 @@
-#!/bin/sh
-#
-# A wrapper script to adjust Kconfig for U-Boot
-#
-# This file will be removed after cleaning up defconfig files
-#
-# Copyright (C) 2014, Masahiro Yamada yamad...@jp.panasonic.com
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-set -e
-
-# Make a configuration target
-# Usage:
-# run_make_config target objdir
-# target: Make target such as config, menuconfig, defconfig, etc.
-run_make_config () {
- # Linux expects defconfig files in arch/$(SRCARCH)/configs/ directory,
- # but U-Boot has them in configs/ directory.
- # Give SRCARCH=.. to fake scripts/kconfig/Makefile.
- $MAKE -f $srctree/scripts/Makefile.build obj=scripts/kconfig SRCARCH=..
$1
-}
-
-do_silentoldconfig () {
- run_make_config silentoldconfig
-
- # If the following part fails, include/config/auto.conf should be
- # deleted so make silentoldconfig will be re-run on the next build.
- $MAKE -f $srctree/scripts/Makefile.autoconf || {
- rm -f include/config/auto.conf
- exit 1
- }
-
- # include/config.h has been updated after make silentoldconfig.
- # We need to touch include/config/auto.conf so it gets newer
- # than include/config.h.
- # Otherwise, 'make silentoldconfig' would be invoked twice.
- touch include/config/auto.conf
-}
-
-cleanup_after_defconfig () {
- rm -f configs/.tmp_defconfig
- # ignore 'Directory not empty' error
- # without using non-POSIX option '--ignore-fail-on-non-empty'
- rmdir arch configs 2/dev/null || true
-}
-
-# Usage:
-# do_board_defconfig board_defconfig
-do_board_defconfig () {
- defconfig_path=$srctree/configs/$1
-
- if [ ! -r $defconfig_path ]; then
- echo 2 ***
- echo 2
Re: [U-Boot] [PATCH v2] common/board_f.c: Enable IMX watchdog in init_func_watchdog_init()
On 10/03/2015 08:04, Stefan Roese wrote: Without this patch, the IMX watchdog will not be initialized. And therefor not active. This patch fixes this by calling hw_watchdog_init() also when CONFIG_IMX_WATCHDOG is defined. Signed-off-by: Stefan Roese s...@denx.de Cc: Simon Glass s...@chromium.org Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de Cc: Heiko Schocher h...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/14] mx6sxsabresd: Use the default CONFIG_SYS_PBSIZE
Hi Fabio, On 02/03/2015 18:14, Fabio Estevam wrote: Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into the console and hitting enter afterwards, causes a hang in the system because CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error message: Unknown command '' - try 'help'. Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve this problem. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Whole series applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx53ard: Use the standard U-boot prompt
On 09/03/2015 16:49, Fabio Estevam wrote: By not defining CONFIG_SYS_PROMPT, the standard = prompt is used, so remove its definition. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] bootcount: Add dcache flush to bootcount_store()
On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: Without this dcache_flush the updated bootcounter may not be saved to its location. This was detected on an iMX.6 platform using the OCRAM (internal SRAM) as bootcounter storage area. And issuing reset from within U-Boot cause the bootcounter to stay on its initial value. Signed-off-by: Stefan Roese s...@denx.de Reviewed-by: Tom Rini tr...@konsulko.com OK, this breaks some platforms: powerpc: + TQM850L +(TQM850L) drivers/built-in.o: In function `bootcount_store': +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' +(TQM850L) make[1]: *** [u-boot] Error 1 +(TQM850L) make: *** [sub-make] Error 2 We'll see how many others have the same problem soon and then I'll decide on nuking the old platforms of holding off on this change. Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and mgcoge3ne also breaking from this (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, how do you want to proceed? We either need cache operations or dropping bootcount from the platforms or dropping the platforms. Frankly, after looking at most of arch/powerpc/cpu/*/cache.c I suspect 8xx and 83xx just need the dummy files copied over. Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: move -march=* and -mtune= options to arch/arm/Makefile
Albert, 2015-02-27 2:43 GMT+09:00 Masahiro YAMADA yamad...@jp.panasonic.com: Hi Albert, 2015-02-26 6:14 GMT+09:00 Albert ARIBAUD albert.u.b...@aribaud.net: I'm fine with the patch's goal and principle, but it does not seem to apply properly to u-boot-arm/master. Can you have a look? Sure. I've just posted v2: http://patchwork.ozlabs.org/patch/444028/ It should apply cleanly to u-boot-arm. Ping. I posted v2 as requested by you. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Setting up MAC address for eth drivers
Hi, I have a question regarding setting mac address for drivers. Drivers setting up write_hwaddr via eth_write_hwaddr via eth_initialize which is called from common/board_r.c. But then there are some drivers(macb, designware, altera_tse) which also calls mac setup from dev-init which has side effect for example when you setup CONFIG_ENV_OVERWRITE and change mac address you can directly use it. It also means if there is intention to call hwaddr from dev-init that for the first packet mac address is setup twice - in eth core init and then before every driver use. I am asking this question because I would like to know the right flow for eth mac setup. If it is set ethaddr xx saveenv reset eth with new mac or if set ethaddr eth with new mac should work The second approach looks reasonable when ethaddr is not set at all but then at least our driver needs to be fixed to support this feature. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6sabre_common.h: remove deprecated mmc open/close
Hi John, On 03/03/2015 15:48, Maxin B. John wrote: Replace mmc open/close with mmc dev in mx6sabre_common.h as those commands were removed with this commit: 614b2bf1c9bf80dbad24f5e5ce1d115bf24a831d cmd_mmc.c: Drop open/close mmc sub-commands Signed-off-by: Maxin B. John maxin.j...@enea.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] warp: Add Device Firmware Upgrade support
On 02/03/2015 14:17, Fabio Estevam wrote: Device Firmware Upgrade (DFU) is a very convenient mechanism to upgrade U-boot on the eMMC. Add support for it. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] warp: Add a README file
On 02/03/2015 16:57, Fabio Estevam wrote: Provide instructions on how to upgrade U-boot in the eMMC. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6sabre: Do not enable UMS with SPL
On 09/03/2015 22:44, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Since commit ad8aae82b20ac6a (mx6sabre: Enable User Mass Storage) SPL target does not boot anymore due to the increased spl image size. Only enable USB Mass Storage for the non-SPL target. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: soc: Switch to cold reset
Hi Dirk,
On 09/03/2015 14:48, Dirk Behme wrote:
Disable the warm reset and enable the cold reset for a more reliable
restart ('reset'). This is taken from the Linux kernel, see imx_src_init()
in arch/arm/mach-imx/src.c.
Signed-off-by: Dirk Behme dirk.be...@de.bosch.com
---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [PATCH] imx:mx6 remove duplicated includes
On 04/03/2015 14:33, Peng Fan wrote: There is no need to include asm/bootm.h twice, so remove one. Signed-off-by: Peng Fan peng@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] warp: Select CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
On 12/03/2015 02:52, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Warp has a DDR eMMC, so enable CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE for better performance: reading zImage 5790288 bytes read in 117 ms (47.2 MiB/s) Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] mx6_common: Do not select esdhc DDR mode for all boards
On 12/03/2015 02:52, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE should be selected only by boards that really have a DDR-capable eMMC, so remove this option from common code to avoid regressions. Reported-by: Stefan Roese s...@denx.de Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
Hi Markus,
On 13.03.2015 10:05, Markus Niebel wrote:
-static void tqma6_iomuxc_spi(void)
+__weak void tqma6_iomuxc_spi(void)
{
unsigned i;
When implementing an baseboard specific init handler, we will get
a warning about unused
tqma6_ecspi1_pads and tqma6_ecspi1_cs, or did I miss something?
I'm not getting one with the current (unfinished) WRU4 baseboard. Which has no
SPI.
Oops, not understand the weak mechanism completely - compiler sees usage of data
in weak function but linker selects function from baseboard - correct?
If this is the case, we have only the duplication of IOMUX and CS gpio.
Just as a thought (not ready): Could we supply CS initialisation
data via defines in the
baseboard config header and append it to the tables if needed?
Not sure if I understand this correctly. Could you give an example? Again, my
current baseboard has no SPI at all.
tqma6_iomux_spi is for the SPI controller the serial nor is connected,
so baseboard specific data are additional CS.
You could solve the data duplication using
#define TQMA6_BB_ECSPI1_CS_GPIO IMX_GPIO_NR(n, mm),
#define TQMA6_BB_CS_PAD_CTRLNEW_PAD_CTRL(MX6_PAD_bla__GPIOn, IOmm,
PAD_CTRL)
and in the board file:
if !defined(TQMA6_BB_ECSPI1_CS_GPIO)
#define TQMA6_BB_ECSPI1_CS_GPIO
#endif
static unsigned const tqma6_ecspi1_cs[] = {
TQMA6_SF_CS_GPIO,
TQMA6_BB_ECSPI1_CS_GPIO
};
But OK, this looks not very nice
As I said, not completely ready, but would prevent some code duplication.
With my current approach we have code duplication. I suggest we give
this version a try and see if it scales for other, future baseboards as
well. If not, we can always try a solution like you described above.
Okay?
Thanks,
Stefan
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Re: [U-Boot] [PATCH 2/3] arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
On 13.03.2015 14:25, Stefan Roese wrote: But OK, this looks not very nice As I said, not completely ready, but would prevent some code duplication. With my current approach we have code duplication. Ups. I meant we have *no* code duplication. Sorry! Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] bootcount: Add dcache flush to bootcount_store()
On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: Without this dcache_flush the updated bootcounter may not be saved to its location. This was detected on an iMX.6 platform using the OCRAM (internal SRAM) as bootcounter storage area. And issuing reset from within U-Boot cause the bootcounter to stay on its initial value. Signed-off-by: Stefan Roese s...@denx.de Reviewed-by: Tom Rini tr...@konsulko.com OK, this breaks some platforms: powerpc: + TQM850L +(TQM850L) drivers/built-in.o: In function `bootcount_store': +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dca che_range' +(TQM850L) make[1]: *** [u-boot] Error 1 +(TQM850L) make: *** [sub-make] Error 2 We'll see how many others have the same problem soon and then I'll decide on nuking the old platforms of holding off on this change. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys-virt address translations
On Friday, March 13, 2015 at 07:13:09 AM, Stephen Warren wrote: BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. Caches aren't working on BCM2xxx or what's the reason for this hack ? Or are these different (not on-CPU) caches we're talking about (yes, I did notice the GPU Lx cache stuff)? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] usb: dwc2: handle bcm2835 phys-virt address translations
On 03/13/2015 08:30 AM, Marek Vasut wrote: On Friday, March 13, 2015 at 07:13:09 AM, Stephen Warren wrote: BCM2835 bus addresses use the top 2 bits to determine whether peripherals use or bypass the GPU L1 and L2 cache. BCM2835-ARM-Peripherals.pdf states that: 0: L1 L2 cached 4: L2 cache coherent (non allocaing) 8: L2 cached only c: Direct uncached. Caches aren't working on BCM2xxx or what's the reason for this hack ? Or are these different (not on-CPU) caches we're talking about (yes, I did notice the GPU Lx cache stuff)? Yes, the GPU has its own caches, entirely separate from the ARM core and at a different location in the system bus structure, and it seems as if at least some other peripherals other than GPU/graphics/VideoCore access DRAM via those caches too. There are some brief details in BCM2835-ARM-Peripherals.pdf, although it isn't terribly clear. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
Hello Stefan,
Am 13.03.2015 um 14:25 schrieb Stefan Roese:
Hi Markus,
On 13.03.2015 10:05, Markus Niebel wrote:
Not sure if I understand this correctly. Could you give an example? Again,
my current baseboard has no SPI at all.
tqma6_iomux_spi is for the SPI controller the serial nor is connected,
so baseboard specific data are additional CS.
You could solve the data duplication using
#define TQMA6_BB_ECSPI1_CS_GPIOIMX_GPIO_NR(n, mm),
#define TQMA6_BB_CS_PAD_CTRLNEW_PAD_CTRL(MX6_PAD_bla__GPIOn, IOmm,
PAD_CTRL)
and in the board file:
if !defined(TQMA6_BB_ECSPI1_CS_GPIO)
#define TQMA6_BB_ECSPI1_CS_GPIO
#endif
static unsigned const tqma6_ecspi1_cs[] = {
TQMA6_SF_CS_GPIO,
TQMA6_BB_ECSPI1_CS_GPIO
};
But OK, this looks not very nice
As I said, not completely ready, but would prevent some code duplication.
With my current approach we have code duplication. I suggest we give this
version a try and see if it scales for other, future baseboards as well. If
not, we can always try a solution like you described above.
Okay?
Yes, Okay.
you can add my Acked-by
Thanks,
Stefan
Regards
Markus
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