Re: [U-Boot] i.MX6 boot mode on SRC_SBMR1

2015-05-12 Thread Igor Grinberg
On 05/12/15 01:09, Troy Kisky wrote:
 On 5/11/2015 3:24 AM, Palacios, Hector wrote:
 Hello Troy,

 Code comments on commit 124a06d7fbbf82f47304d499418460312a725ad6 for forcing 
 the boot mode say:

 +/*
 + * cfg_val will be used for
 + * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
 + * After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0]
 + * to SBMR1, which will determine the boot device.
 + */


 Although this works (the ROM boots from the media configured in GPR9[25:0] 
 if GPR10[28] is set), the value of SBMR1 does not really change, as the 
 comment says, and is still the one read by the strapping.

 I didn't find this documented on the HRM. Where did you find it?

 Thanks
 --
 Héctor Palacios


 In source code from a boot shim from freescale.

BTW, we have observed that the description in the comment is not exact and
therefore commit:
f2863ff (arm: imx: make bmode command work with SPL/U-Boot combo)
fixes also the comment.

-- 
Regards,
Igor.
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[U-Boot] [PATCH v3 3/4] x86: gpio: add pinctrl support from the device tree

2015-05-12 Thread Gabriel Huau
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr

---

Changes in v3:
- Fix the dt-binding copyright header
- Remove define for IOBASE and use a property
- Fix issues with signed/unsigned variable type
- Fix coding style
- Add a compatible string for the driver

Changes in v2:
- Clean commit message
- Rename compatible string 'ich6' to 'x86'
- Fix coding style
- Create a dt-bindinds documentation
- Move x86-gpio defines to a specific header
- Reorder the functions to avoid the need for forward declarations
- Rename double underscore functions to only one
- Create a specific function to configure one pin
- Use a define to prevent build/support issues with other x86 CPU that
doesn't have a IOBASE.

 arch/x86/dts/minnowmax.dts |  23 ++
 arch/x86/include/asm/gpio.h|   1 +
 .../gpio/intel,x86-pinctrl.txt |  31 +++
 drivers/gpio/intel_ich6_gpio.c | 254 ++---
 include/dt-bindings/gpio/x86-gpio.h|  31 +++
 include/fdtdec.h   |   1 +
 lib/fdtdec.c   |   1 +
 7 files changed, 312 insertions(+), 30 deletions(-)
 create mode 100644 doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
 create mode 100644 include/dt-bindings/gpio/x86-gpio.h

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7103bc5..bd21bfb 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -6,6 +6,8 @@
 
 /dts-v1/;
 
+#include dt-bindings/gpio/x86-gpio.h
+
 /include/ skeleton.dtsi
 /include/ serial.dtsi
 
@@ -22,6 +24,27 @@
silent_console = 0;
};
 
+   pch_pinctrl {
+   compatible = intel,x86-pinctrl;
+   io-base = 0x4c;
+
+   pin_usb_host_en0@0 {
+   gpio-offset = 0x80 8;
+   pad-offset = 0x260;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+
+   pin_usb_host_en1@0 {
+   gpio-offset = 0x80 9;
+   pad-offset = 0x258;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+   };
+
gpioa {
compatible = intel,ich6-gpio;
u-boot,dm-pre-reloc;
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1099427..ed85b08 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,6 +147,7 @@ struct pch_gpio_map {
} set3;
 };
 
+int gpio_ich6_pinctrl_init(void);
 void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
 void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
 
diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt 
b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
new file mode 100644
index 000..45ab1af
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -0,0 +1,31 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on x86 can be described with a node for the PINCTRL master
+node and a set of child nodes for each pin on the SoC.
+
+The PINCTRL master node requires the following properties:
+- compatible : intel,x86-pinctrl
+
+Pin nodes must be children of the pinctrl master node and can
+contain the following properties:
+- pad-offset- (required) offset in the IOBASE for the pin to 
configured.
+- gpio-offset   - (required) offset in the GPIOBASE for the pin to 
configured and
+   also the bit shift in this register.
+- mode-gpio- (optional) standalone property to force the 
pin into GPIO mode.
+- mode-func- (optional) function number to assign to the 
pin. if 'mode-gpio'
+   is set, this property will be ignored.
+in case of 'mode-gpio' property set:
+- output-value - (optional) this set the default output value of the 
GPIO.
+- direction - (optional) this set the direction of the gpio.
+- pull-str  - (optional) this set the pull strength of the pin.
+- pull-assign   - (optional) this set the pull assignement (up/down) of 
the pin.
+
+Example:
+
+pin_usb_host_en0@0 {
+gpio-offset = 0x80 8;
+pad-offset = 0x260;
+mode-gpio;
+output-value = 1;
+direction = PIN_OUTPUT;
+};
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 7e679a0..35e8197 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -44,21 +44,28 @@ struct ich6_bank_priv {
uint16_t lvl;
 };
 
+#define GPIO_USESEL_OFFSET(x)  (x)
+#define 

[U-Boot] [PATCH v3 4/4] x86: minnowmax: initialize the pin-muxing from device tree

2015-05-12 Thread Gabriel Huau
Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr
Acked-by: Simon Glass s...@chromium.org

---

Changes in v3:
- Rebase to the origin/master

Changes in v2:
- Fix ordering of include header

 board/intel/minnowmax/minnowmax.c | 9 +
 include/configs/minnowmax.h   | 1 +
 2 files changed, 10 insertions(+)

diff --git a/board/intel/minnowmax/minnowmax.c 
b/board/intel/minnowmax/minnowmax.c
index 1f5549a..383cae0 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -5,6 +5,7 @@
  */
 
 #include common.h
+#include asm/gpio.h
 #include asm/ibmpc.h
 #include asm/pnp_def.h
 #include netdev.h
@@ -12,6 +13,14 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, 4)
 
+int arch_early_init_r(void)
+{
+   /* do the pin-muxing */
+   gpio_ich6_pinctrl_init();
+
+   return 0;
+}
+
 int board_early_init_f(void)
 {
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index eb35a50..547765d 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -15,6 +15,7 @@
 
 #define CONFIG_SYS_MONITOR_LEN (1  20)
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_ARCH_EARLY_INIT_R
 
 #define CONFIG_X86_SERIAL
 #define CONFIG_SMSC_LPC47M
-- 
2.1.4

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[U-Boot] [PATCH v3 3/4] x86: gpio: add pinctrl support from the device tree

2015-05-12 Thread Gabriel Huau
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr

---

Changes in v3:
- Fix the dt-binding copyright header
- Remove define for IOBASE and use a property
- Fix issues with signed/unsigned variable type
- Fix coding style
- Add a compatible string for the driver

Changes in v2:
- Clean commit message
- Rename compatible string 'ich6' to 'x86'
- Fix coding style
- Create a dt-bindinds documentation
- Move x86-gpio defines to a specific header
- Reorder the functions to avoid the need for forward declarations
- Rename double underscore functions to only one
- Create a specific function to configure one pin
- Use a define to prevent build/support issues with other x86 CPU that
doesn't have a IOBASE.

 arch/x86/dts/minnowmax.dts |  23 ++
 arch/x86/include/asm/gpio.h|   1 +
 .../gpio/intel,x86-pinctrl.txt |  31 +++
 drivers/gpio/intel_ich6_gpio.c | 254 ++---
 include/dt-bindings/gpio/x86-gpio.h|  31 +++
 include/fdtdec.h   |   1 +
 lib/fdtdec.c   |   1 +
 7 files changed, 312 insertions(+), 30 deletions(-)
 create mode 100644 doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
 create mode 100644 include/dt-bindings/gpio/x86-gpio.h

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7103bc5..bd21bfb 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -6,6 +6,8 @@
 
 /dts-v1/;
 
+#include dt-bindings/gpio/x86-gpio.h
+
 /include/ skeleton.dtsi
 /include/ serial.dtsi
 
@@ -22,6 +24,27 @@
silent_console = 0;
};
 
+   pch_pinctrl {
+   compatible = intel,x86-pinctrl;
+   io-base = 0x4c;
+
+   pin_usb_host_en0@0 {
+   gpio-offset = 0x80 8;
+   pad-offset = 0x260;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+
+   pin_usb_host_en1@0 {
+   gpio-offset = 0x80 9;
+   pad-offset = 0x258;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+   };
+
gpioa {
compatible = intel,ich6-gpio;
u-boot,dm-pre-reloc;
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1099427..ed85b08 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,6 +147,7 @@ struct pch_gpio_map {
} set3;
 };
 
+int gpio_ich6_pinctrl_init(void);
 void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
 void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
 
diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt 
b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
new file mode 100644
index 000..45ab1af
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -0,0 +1,31 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on x86 can be described with a node for the PINCTRL master
+node and a set of child nodes for each pin on the SoC.
+
+The PINCTRL master node requires the following properties:
+- compatible : intel,x86-pinctrl
+
+Pin nodes must be children of the pinctrl master node and can
+contain the following properties:
+- pad-offset- (required) offset in the IOBASE for the pin to 
configured.
+- gpio-offset   - (required) offset in the GPIOBASE for the pin to 
configured and
+   also the bit shift in this register.
+- mode-gpio- (optional) standalone property to force the 
pin into GPIO mode.
+- mode-func- (optional) function number to assign to the 
pin. if 'mode-gpio'
+   is set, this property will be ignored.
+in case of 'mode-gpio' property set:
+- output-value - (optional) this set the default output value of the 
GPIO.
+- direction - (optional) this set the direction of the gpio.
+- pull-str  - (optional) this set the pull strength of the pin.
+- pull-assign   - (optional) this set the pull assignement (up/down) of 
the pin.
+
+Example:
+
+pin_usb_host_en0@0 {
+gpio-offset = 0x80 8;
+pad-offset = 0x260;
+mode-gpio;
+output-value = 1;
+direction = PIN_OUTPUT;
+};
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 7e679a0..35e8197 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -44,21 +44,28 @@ struct ich6_bank_priv {
uint16_t lvl;
 };
 
+#define GPIO_USESEL_OFFSET(x)  (x)
+#define 

[U-Boot] [PATCH v3 3/4] x86: gpio: add pinctrl support from the device tree

2015-05-12 Thread Gabriel Huau
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr

---

Changes in v3:
- Fix the dt-binding copyright header
- Remove define for IOBASE and use a property
- Fix issues with signed/unsigned variable type
- Fix coding style
- Add a compatible string for the driver

Changes in v2:
- Clean commit message
- Rename compatible string 'ich6' to 'x86'
- Fix coding style
- Create a dt-bindinds documentation
- Move x86-gpio defines to a specific header
- Reorder the functions to avoid the need for forward declarations
- Rename double underscore functions to only one
- Create a specific function to configure one pin
- Use a define to prevent build/support issues with other x86 CPU that
doesn't have a IOBASE.

 arch/x86/dts/minnowmax.dts |  23 ++
 arch/x86/include/asm/gpio.h|   1 +
 .../gpio/intel,x86-pinctrl.txt |  31 +++
 drivers/gpio/intel_ich6_gpio.c | 254 ++---
 include/dt-bindings/gpio/x86-gpio.h|  31 +++
 include/fdtdec.h   |   1 +
 lib/fdtdec.c   |   1 +
 7 files changed, 312 insertions(+), 30 deletions(-)
 create mode 100644 doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
 create mode 100644 include/dt-bindings/gpio/x86-gpio.h

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7103bc5..bd21bfb 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -6,6 +6,8 @@
 
 /dts-v1/;
 
+#include dt-bindings/gpio/x86-gpio.h
+
 /include/ skeleton.dtsi
 /include/ serial.dtsi
 
@@ -22,6 +24,27 @@
silent_console = 0;
};
 
+   pch_pinctrl {
+   compatible = intel,x86-pinctrl;
+   io-base = 0x4c;
+
+   pin_usb_host_en0@0 {
+   gpio-offset = 0x80 8;
+   pad-offset = 0x260;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+
+   pin_usb_host_en1@0 {
+   gpio-offset = 0x80 9;
+   pad-offset = 0x258;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+   };
+
gpioa {
compatible = intel,ich6-gpio;
u-boot,dm-pre-reloc;
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1099427..ed85b08 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,6 +147,7 @@ struct pch_gpio_map {
} set3;
 };
 
+int gpio_ich6_pinctrl_init(void);
 void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
 void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
 
diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt 
b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
new file mode 100644
index 000..45ab1af
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -0,0 +1,31 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on x86 can be described with a node for the PINCTRL master
+node and a set of child nodes for each pin on the SoC.
+
+The PINCTRL master node requires the following properties:
+- compatible : intel,x86-pinctrl
+
+Pin nodes must be children of the pinctrl master node and can
+contain the following properties:
+- pad-offset- (required) offset in the IOBASE for the pin to 
configured.
+- gpio-offset   - (required) offset in the GPIOBASE for the pin to 
configured and
+   also the bit shift in this register.
+- mode-gpio- (optional) standalone property to force the 
pin into GPIO mode.
+- mode-func- (optional) function number to assign to the 
pin. if 'mode-gpio'
+   is set, this property will be ignored.
+in case of 'mode-gpio' property set:
+- output-value - (optional) this set the default output value of the 
GPIO.
+- direction - (optional) this set the direction of the gpio.
+- pull-str  - (optional) this set the pull strength of the pin.
+- pull-assign   - (optional) this set the pull assignement (up/down) of 
the pin.
+
+Example:
+
+pin_usb_host_en0@0 {
+gpio-offset = 0x80 8;
+pad-offset = 0x260;
+mode-gpio;
+output-value = 1;
+direction = PIN_OUTPUT;
+};
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 7e679a0..35e8197 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -44,21 +44,28 @@ struct ich6_bank_priv {
uint16_t lvl;
 };
 
+#define GPIO_USESEL_OFFSET(x)  (x)
+#define 

[U-Boot] [PATCH v3 4/4] x86: minnowmax: initialize the pin-muxing from device tree

2015-05-12 Thread Gabriel Huau
Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr
Acked-by: Simon Glass s...@chromium.org

---

Changes in v3:
- Rebase to the origin/master

Changes in v2:
- Fix ordering of include header

 board/intel/minnowmax/minnowmax.c | 9 +
 include/configs/minnowmax.h   | 1 +
 2 files changed, 10 insertions(+)

diff --git a/board/intel/minnowmax/minnowmax.c 
b/board/intel/minnowmax/minnowmax.c
index 1f5549a..383cae0 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -5,6 +5,7 @@
  */
 
 #include common.h
+#include asm/gpio.h
 #include asm/ibmpc.h
 #include asm/pnp_def.h
 #include netdev.h
@@ -12,6 +13,14 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, 4)
 
+int arch_early_init_r(void)
+{
+   /* do the pin-muxing */
+   gpio_ich6_pinctrl_init();
+
+   return 0;
+}
+
 int board_early_init_f(void)
 {
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index eb35a50..547765d 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -15,6 +15,7 @@
 
 #define CONFIG_SYS_MONITOR_LEN (1  20)
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_ARCH_EARLY_INIT_R
 
 #define CONFIG_X86_SERIAL
 #define CONFIG_SMSC_LPC47M
-- 
2.1.4

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Re: [U-Boot] [PATCH v3 4/4] x86: minnowmax: initialize the pin-muxing from device tree

2015-05-12 Thread gabriel huau

Please ignore this email/patch, I put the wrong message id ...

On 05/11/2015 11:12 PM, Gabriel Huau wrote:

Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr
Acked-by: Simon Glass s...@chromium.org

---

Changes in v3:
 - Rebase to the origin/master

Changes in v2:
 - Fix ordering of include header

  board/intel/minnowmax/minnowmax.c | 9 +
  include/configs/minnowmax.h   | 1 +
  2 files changed, 10 insertions(+)

diff --git a/board/intel/minnowmax/minnowmax.c 
b/board/intel/minnowmax/minnowmax.c
index 1f5549a..383cae0 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -5,6 +5,7 @@
   */
  
  #include common.h

+#include asm/gpio.h
  #include asm/ibmpc.h
  #include asm/pnp_def.h
  #include netdev.h
@@ -12,6 +13,14 @@
  
  #define SERIAL_DEV PNP_DEV(0x2e, 4)
  
+int arch_early_init_r(void)

+{
+   /* do the pin-muxing */
+   gpio_ich6_pinctrl_init();
+
+   return 0;
+}
+
  int board_early_init_f(void)
  {
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index eb35a50..547765d 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -15,6 +15,7 @@
  
  #define CONFIG_SYS_MONITOR_LEN		(1  20)

  #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_ARCH_EARLY_INIT_R
  
  #define CONFIG_X86_SERIAL

  #define CONFIG_SMSC_LPC47M


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Re: [U-Boot] [PATCH v3 3/4] x86: gpio: add pinctrl support from the device tree

2015-05-12 Thread gabriel huau

Please ignore this email/patch, I put the wrong message id ...

On 05/11/2015 11:10 PM, Gabriel Huau wrote:

Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr

---

Changes in v3:
 - Fix the dt-binding copyright header
 - Remove define for IOBASE and use a property
 - Fix issues with signed/unsigned variable type
 - Fix coding style
 - Add a compatible string for the driver

Changes in v2:
 - Clean commit message
 - Rename compatible string 'ich6' to 'x86'
 - Fix coding style
 - Create a dt-bindinds documentation
 - Move x86-gpio defines to a specific header
 - Reorder the functions to avoid the need for forward declarations
 - Rename double underscore functions to only one
 - Create a specific function to configure one pin
 - Use a define to prevent build/support issues with other x86 CPU that
 doesn't have a IOBASE.

  arch/x86/dts/minnowmax.dts |  23 ++
  arch/x86/include/asm/gpio.h|   1 +
  .../gpio/intel,x86-pinctrl.txt |  31 +++
  drivers/gpio/intel_ich6_gpio.c | 254 ++---
  include/dt-bindings/gpio/x86-gpio.h|  31 +++
  include/fdtdec.h   |   1 +
  lib/fdtdec.c   |   1 +
  7 files changed, 312 insertions(+), 30 deletions(-)
  create mode 100644 doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
  create mode 100644 include/dt-bindings/gpio/x86-gpio.h

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7103bc5..bd21bfb 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -6,6 +6,8 @@
  
  /dts-v1/;
  
+#include dt-bindings/gpio/x86-gpio.h

+
  /include/ skeleton.dtsi
  /include/ serial.dtsi
  
@@ -22,6 +24,27 @@

silent_console = 0;
};
  
+	pch_pinctrl {

+   compatible = intel,x86-pinctrl;
+   io-base = 0x4c;
+
+   pin_usb_host_en0@0 {
+   gpio-offset = 0x80 8;
+   pad-offset = 0x260;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+
+   pin_usb_host_en1@0 {
+   gpio-offset = 0x80 9;
+   pad-offset = 0x258;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+   };
+
gpioa {
compatible = intel,ich6-gpio;
u-boot,dm-pre-reloc;
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1099427..ed85b08 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,6 +147,7 @@ struct pch_gpio_map {
} set3;
  };
  
+int gpio_ich6_pinctrl_init(void);

  void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
  void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
  
diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt

new file mode 100644
index 000..45ab1af
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -0,0 +1,31 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on x86 can be described with a node for the PINCTRL master
+node and a set of child nodes for each pin on the SoC.
+
+The PINCTRL master node requires the following properties:
+- compatible : intel,x86-pinctrl
+
+Pin nodes must be children of the pinctrl master node and can
+contain the following properties:
+- pad-offset- (required) offset in the IOBASE for the pin to 
configured.
+- gpio-offset   - (required) offset in the GPIOBASE for the pin to 
configured and
+   also the bit shift in this register.
+- mode-gpio- (optional) standalone property to force the 
pin into GPIO mode.
+- mode-func- (optional) function number to assign to the 
pin. if 'mode-gpio'
+   is set, this property will be ignored.
+in case of 'mode-gpio' property set:
+- output-value - (optional) this set the default output value of the 
GPIO.
+- direction - (optional) this set the direction of the gpio.
+- pull-str  - (optional) this set the pull strength of the pin.
+- pull-assign   - (optional) this set the pull assignement (up/down) of 
the pin.
+
+Example:
+
+pin_usb_host_en0@0 {
+gpio-offset = 0x80 8;
+pad-offset = 0x260;
+mode-gpio;
+output-value = 1;
+direction = PIN_OUTPUT;
+};
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 7e679a0..35e8197 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ 

Re: [U-Boot] [PATCH v3 3/4] x86: gpio: add pinctrl support from the device tree

2015-05-12 Thread gabriel huau

Please ignore this email/patch, I put the wrong message id ...

On 05/11/2015 11:15 PM, Gabriel Huau wrote:

Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr

---

Changes in v3:
 - Fix the dt-binding copyright header
 - Remove define for IOBASE and use a property
 - Fix issues with signed/unsigned variable type
 - Fix coding style
 - Add a compatible string for the driver

Changes in v2:
 - Clean commit message
 - Rename compatible string 'ich6' to 'x86'
 - Fix coding style
 - Create a dt-bindinds documentation
 - Move x86-gpio defines to a specific header
 - Reorder the functions to avoid the need for forward declarations
 - Rename double underscore functions to only one
 - Create a specific function to configure one pin
 - Use a define to prevent build/support issues with other x86 CPU that
 doesn't have a IOBASE.

  arch/x86/dts/minnowmax.dts |  23 ++
  arch/x86/include/asm/gpio.h|   1 +
  .../gpio/intel,x86-pinctrl.txt |  31 +++
  drivers/gpio/intel_ich6_gpio.c | 254 ++---
  include/dt-bindings/gpio/x86-gpio.h|  31 +++
  include/fdtdec.h   |   1 +
  lib/fdtdec.c   |   1 +
  7 files changed, 312 insertions(+), 30 deletions(-)
  create mode 100644 doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
  create mode 100644 include/dt-bindings/gpio/x86-gpio.h

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7103bc5..bd21bfb 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -6,6 +6,8 @@
  
  /dts-v1/;
  
+#include dt-bindings/gpio/x86-gpio.h

+
  /include/ skeleton.dtsi
  /include/ serial.dtsi
  
@@ -22,6 +24,27 @@

silent_console = 0;
};
  
+	pch_pinctrl {

+   compatible = intel,x86-pinctrl;
+   io-base = 0x4c;
+
+   pin_usb_host_en0@0 {
+   gpio-offset = 0x80 8;
+   pad-offset = 0x260;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+
+   pin_usb_host_en1@0 {
+   gpio-offset = 0x80 9;
+   pad-offset = 0x258;
+   mode-gpio;
+   output-value = 1;
+   direction = PIN_OUTPUT;
+   };
+   };
+
gpioa {
compatible = intel,ich6-gpio;
u-boot,dm-pre-reloc;
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1099427..ed85b08 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,6 +147,7 @@ struct pch_gpio_map {
} set3;
  };
  
+int gpio_ich6_pinctrl_init(void);

  void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
  void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
  
diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt

new file mode 100644
index 000..45ab1af
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -0,0 +1,31 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on x86 can be described with a node for the PINCTRL master
+node and a set of child nodes for each pin on the SoC.
+
+The PINCTRL master node requires the following properties:
+- compatible : intel,x86-pinctrl
+
+Pin nodes must be children of the pinctrl master node and can
+contain the following properties:
+- pad-offset- (required) offset in the IOBASE for the pin to 
configured.
+- gpio-offset   - (required) offset in the GPIOBASE for the pin to 
configured and
+   also the bit shift in this register.
+- mode-gpio- (optional) standalone property to force the 
pin into GPIO mode.
+- mode-func- (optional) function number to assign to the 
pin. if 'mode-gpio'
+   is set, this property will be ignored.
+in case of 'mode-gpio' property set:
+- output-value - (optional) this set the default output value of the 
GPIO.
+- direction - (optional) this set the direction of the gpio.
+- pull-str  - (optional) this set the pull strength of the pin.
+- pull-assign   - (optional) this set the pull assignement (up/down) of 
the pin.
+
+Example:
+
+pin_usb_host_en0@0 {
+gpio-offset = 0x80 8;
+pad-offset = 0x260;
+mode-gpio;
+output-value = 1;
+direction = PIN_OUTPUT;
+};
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 7e679a0..35e8197 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ 

Re: [U-Boot] [PATCH 03/10] imx6: move generic imx6 options to mx6_common.h

2015-05-12 Thread Markus Niebel
Hello Peter,

Am 11.05.2015 um 13:23 schrieb Peter Robinson:
 All boards define CONFIG_MX6, CONFIG_DISPLAY_BOARDINFO, CONFIG_DISPLAY_CPUINFO
 and CONFIG_SYS_GENERIC_BOARD so define them in mx6_common
 
 Signed-off-by: Peter Robinson pbrobin...@gmail.com
 
 ---
  include/configs/aristainetos.h  | 7 ---
  include/configs/cgtqmx6eval.h   | 5 -
  include/configs/cm_fx6.h| 7 ---
  include/configs/embestmx6boards.h   | 7 ---
  include/configs/gw_ventana.h| 5 -
  include/configs/hummingboard.h  | 6 --
  include/configs/mx6_common.h| 5 +
  include/configs/mx6cuboxi.h | 4 
  include/configs/mx6qarm2.h  | 7 ---
  include/configs/mx6sabre_common.h   | 7 ---
  include/configs/mx6slevk.h  | 6 --
  include/configs/mx6sxsabresd.h  | 5 -
  include/configs/nitrogen6x.h| 4 
  include/configs/novena.h| 4 
  include/configs/ot1200.h| 4 
  include/configs/platinum.h  | 6 --
  include/configs/platinum_picon.h| 2 --
  include/configs/platinum_titanium.h | 2 --
  include/configs/secomx6quq7.h   | 4 
  include/configs/tbs2910.h   | 4 
  include/configs/titanium.h  | 3 ---
  include/configs/tqma6.h | 6 --
  include/configs/udoo.h  | 6 --
  include/configs/wandboard.h | 6 --
  include/configs/warp.h  | 5 -
  25 files changed, 5 insertions(+), 122 deletions(-)
 
 diff --git a/include/configs/aristainetos.h b/include/configs/aristainetos.h
 index 7bac18c..2865ef6 100644
 --- a/include/configs/aristainetos.h
 +++ b/include/configs/aristainetos.h
 @@ -13,20 +13,13 @@
  #ifndef __ARISTAINETOS_CONFIG_H
  #define __ARISTAINETOS_CONFIG_H
  
 -#define CONFIG_MX6
 -
  #include mx6_common.h
  
 -#define CONFIG_DISPLAY_CPUINFO
 -#define CONFIG_DISPLAY_BOARDINFO
 -
  #define CONFIG_MACH_TYPE 4501
  #define CONFIG_MMCROOT   /dev/mmcblk0p1
  #define CONFIG_HOSTNAME  aristainetos
  #define PHYS_SDRAM_SIZE  (1u * 1024 * 1024 * 1024)
  
 -#define CONFIG_SYS_GENERIC_BOARD
 -
  /* Size of malloc() pool */
  #define CONFIG_SYS_MALLOC_LEN(64 * SZ_1M)
  
 diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
 index d6018fd..fff950e 100644
 --- a/include/configs/cgtqmx6eval.h
 +++ b/include/configs/cgtqmx6eval.h
 @@ -13,13 +13,8 @@
  #ifndef __CONFIG_CGTQMX6EVAL_H
  #define __CONFIG_CGTQMX6EVAL_H
  
 -#define CONFIG_MX6
 -
  #include mx6_common.h
  
 -#define CONFIG_DISPLAY_CPUINFO
 -#define CONFIG_DISPLAY_BOARDINFO
 -
  #define CONFIG_MACH_TYPE 4122
  
  #define CONFIG_CMDLINE_TAG
 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
 index 8fd6350..c0607a4 100644
 --- a/include/configs/cm_fx6.h
 +++ b/include/configs/cm_fx6.h
 @@ -14,7 +14,6 @@
  #include mx6_common.h
  
  /* Machine config */
 -#define CONFIG_MX6
  #define CONFIG_SYS_LITTLE_ENDIAN
  #define CONFIG_MACH_TYPE 4273
  
 @@ -22,11 +21,6 @@
  #define CONFIG_CMD_GPIO
  #endif
  
 -/* Display information on boot */
 -#define CONFIG_DISPLAY_CPUINFO
 -#define CONFIG_DISPLAY_BOARDINFO
 -#define CONFIG_TIMESTAMP
 -
  /* CMD */
  #define CONFIG_CMD_GREPENV
  #undef CONFIG_CMD_FLASH
 @@ -274,7 +268,6 @@
  #define CONFIG_SERIAL_TAG
  
  /* misc */
 -#define CONFIG_SYS_GENERIC_BOARD
  #define CONFIG_STACKSIZE (128 * 1024)
  #define CONFIG_SYS_MALLOC_LEN(10 * 1024 * 1024)
  #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS   800 /* 400 KB */
 diff --git a/include/configs/embestmx6boards.h 
 b/include/configs/embestmx6boards.h
 index c327e9b..90ba948 100644
 --- a/include/configs/embestmx6boards.h
 +++ b/include/configs/embestmx6boards.h
 @@ -15,19 +15,12 @@
  
  #include mx6_common.h
  
 -#define CONFIG_SYS_GENERIC_BOARD
 -
  #define CONFIG_MXC_UART_BASE UART2_BASE
  #define CONFIG_CONSOLE_DEV   ttymxc1
  #define CONFIG_MMCROOT   /dev/mmcblk1p2
  
  #define PHYS_SDRAM_SIZE  (1u * 1024 * 1024 * 1024)
  
 -#define CONFIG_MX6
 -
 -#define CONFIG_DISPLAY_CPUINFO
 -#define CONFIG_DISPLAY_BOARDINFO
 -
  #define CONFIG_CMDLINE_TAG
  #define CONFIG_SETUP_MEMORY_TAGS
  #define CONFIG_INITRD_TAG
 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
 index 7e33f9d..fcdc7fd 100644
 --- a/include/configs/gw_ventana.h
 +++ b/include/configs/gw_ventana.h
 @@ -19,9 +19,6 @@
  
  #include imx6_spl.h  /* common IMX6 SPL configuration */
  #include mx6_common.h
 -#define CONFIG_MX6
 -#define CONFIG_DISPLAY_CPUINFO /* display cpu info */
 -#define CONFIG_DISPLAY_BOARDINFO_LATE  /* display board info (after reloc) */
  
  #define CONFIG_MACH_TYPE 4520   /* Gateworks Ventana Platform */
  
 @@ -32,8 +29,6 @@
  #define CONFIG_SERIAL_TAG
  #define CONFIG_REVISION_TAG
  
 -#define CONFIG_SYS_GENERIC_BOARD
 -
  /* Size of malloc() pool 

Re: [U-Boot] [RFC] FIT: use default configuration, if given configuration is not found

2015-05-12 Thread Yegor Yefremov
Hi Joe,

On Mon, May 4, 2015 at 8:16 PM, Joe Hershberger
joe.hershber...@gmail.com wrote:
 Hi Yegor,

 On Mon, May 4, 2015 at 2:53 AM,  yegorsli...@googlemail.com wrote:
 From: Yegor Yefremov yegorsli...@googlemail.com

 Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
 ---
  common/image-fit.c |4 
  1 files changed, 4 insertions(+), 0 deletions(-)

 diff --git a/common/image-fit.c b/common/image-fit.c
 index c61be65..b892d06 100644
 --- a/common/image-fit.c
 +++ b/common/image-fit.c
 @@ -1547,6 +1547,10 @@ int fit_image_load(bootm_headers_t *images, ulong 
 addr,
 } else {
 cfg_noffset = fit_conf_get_node(fit,
 fit_uname_config);
 +
 +   if (cfg_noffset  0) {
 +   cfg_noffset = fit_conf_get_node(fit, NULL);
 +   }

 It seems if you ask for a specific configuration that is not
 available, you should get an error.

 You can accomplish similar behavior you are implementing here by using
 the shell to try the default if the specified one returns an error.

Thanks. It is working:

bootm ${loadaddr}#conf${board_name}; if test $? -ne 0; then echo
Using default FIT configuration; bootm ${loadaddr}; fi;

Now I have another question, how can I split long line in uEnv.txt? Is
it possible at all?

Yegor
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Re: [U-Boot] [UBOOT PATCH] arasan: nfc: Add initial nand driver support for arasan

2015-05-12 Thread Michal Simek
On 04/28/2015 02:45 PM, Siva Durga Prasad Paladugu wrote:
 Added initial nand driver support for arasan nand flash
 controller.This supports nand erase,nand read, nand write
 This uses the hardware ECC for read and write operations
 
 Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com
 ---
  drivers/mtd/nand/Makefile |1 +
  drivers/mtd/nand/arasan_nfc.c | 1187 
 +
  2 files changed, 1188 insertions(+)
  create mode 100644 drivers/mtd/nand/arasan_nfc.c

Scott: Any comment on this one?

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




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Re: [U-Boot] [PATCH v5 15/15] sunxi: ohci: Add ohci usb host controller support

2015-05-12 Thread Hans de Goede

Hi Simon,

On 12-05-15 00:37, Simon Glass wrote:

On 10 May 2015 at 06:10, Hans de Goede hdego...@redhat.com wrote:

This commit adds support for the OHCI companion controller, which makes
usb-1 devices directly plugged into to usb root port work.

Note for now this switches usb-keyboard support for sunxi back from int-queue
support to the old interrupt polling method. Adding int-queue support to the
ohci code and switching back to int-queue support is in the works.

Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Marek Vasut ma...@denx.de
Acked-by: Ian Campbell i...@hellion.org.uk
---
  arch/arm/include/asm/arch-sunxi/clock_sun4i.h |   2 +
  arch/arm/include/asm/arch-sunxi/clock_sun6i.h |   2 +
  drivers/usb/host/Makefile |   1 +
  drivers/usb/host/ohci-sunxi.c | 104 ++
  include/configs/sunxi-common.h|   5 +-
  5 files changed, 113 insertions(+), 1 deletion(-)
  create mode 100644 drivers/usb/host/ohci-sunxi.c


Applied to u-boot-dm, thanks!


Thanks for merging this series!

Can you pick up these patches from yesterday too ? They have already
been reviewed and acked by Marek, and they sit on to of
this series :

http://patchwork.ozlabs.org/patch/471001/
http://patchwork.ozlabs.org/patch/471004/
http://patchwork.ozlabs.org/patch/471003/
http://patchwork.ozlabs.org/patch/471005/

Note the last one has queue misspelled (twice) in the commit
msg you may want to amend that.

Thanks  Regards,

Hans
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[U-Boot] [PATCH] LS1021atwr: Enable bootscript for secure boot

2015-05-12 Thread Gaurav Rana
Enable bootscript support in secure boot for establishing
chain of trust on LS1021atwr.

Signed-off-by: Gaurav Rana gaurav.r...@freescale.com
---
 include/configs/ls1021atwr.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 729205f..f637b59 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -444,6 +444,7 @@
 
 #ifdef CONFIG_SECURE_BOOT
 #define CONFIG_CMD_BLOB
+#include asm/fsl_secure_boot.h
 #endif
 
 #endif
-- 
1.8.1.4

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Re: [U-Boot] wandboard: Switch to SPL support

2015-05-12 Thread Vagrant Cascadian
On 2015-05-11, Fabio Estevam wrote:
 From: Fabio Estevam fabio.este...@freescale.com

 Currently we need to build one U-boot image for each of the wandboard
 variants: quad, dual-lite and solo.

 By switching to SPL we can support all these variants with a single binary,
 which is very convenient.

 Based on the work from Richard Hu.

 Tested kernel booting on the three boards.

 Signed-off-by: Richard Hu hak...@gmail.com
 Signed-off-by: Fabio Estevam fabio.este...@freescale.com

Tested kernel boot on wandboard quad and dual-lite variants.

Tested-by: Vagrant Cascadian vagr...@aikidev.net

 ---
  arch/arm/Kconfig |   1 +
  board/wandboard/MAINTAINERS  |   4 +-
  board/wandboard/Makefile |   2 +-
  board/wandboard/README   |  22 +--
  board/wandboard/spl.c| 317 
 +++
  board/wandboard/wandboard.c  | 176 --
  configs/wandboard_defconfig  |   6 +
  configs/wandboard_dl_defconfig   |   3 -
  configs/wandboard_quad_defconfig |   3 -
  configs/wandboard_solo_defconfig |   3 -
  include/configs/wandboard.h  |  27 ++--
  11 files changed, 448 insertions(+), 116 deletions(-)
  create mode 100644 board/wandboard/spl.c
  create mode 100644 configs/wandboard_defconfig
  delete mode 100644 configs/wandboard_dl_defconfig
  delete mode 100644 configs/wandboard_quad_defconfig
  delete mode 100644 configs/wandboard_solo_defconfig

 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index 00be305..ca7448e 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -493,6 +493,7 @@ config TARGET_UDOO
  config TARGET_WANDBOARD
   bool Support wandboard
   select CPU_V7
 + select SUPPORT_SPL
  
  config TARGET_WARP
   bool Support WaRP
 diff --git a/board/wandboard/MAINTAINERS b/board/wandboard/MAINTAINERS
 index b986980..0680517 100644
 --- a/board/wandboard/MAINTAINERS
 +++ b/board/wandboard/MAINTAINERS
 @@ -3,6 +3,4 @@ M:Fabio Estevam fabio.este...@freescale.com
  S:   Maintained
  F:   board/wandboard/
  F:   include/configs/wandboard.h
 -F:   configs/wandboard_dl_defconfig
 -F:   configs/wandboard_quad_defconfig
 -F:   configs/wandboard_solo_defconfig
 +F:   configs/wandboard_defconfig
 diff --git a/board/wandboard/Makefile b/board/wandboard/Makefile
 index 5b50eca..db9f4a6 100644
 --- a/board/wandboard/Makefile
 +++ b/board/wandboard/Makefile
 @@ -4,4 +4,4 @@
  # SPDX-License-Identifier:   GPL-2.0+
  #
  
 -obj-y  := wandboard.o
 +obj-y  := wandboard.o spl.o
 diff --git a/board/wandboard/README b/board/wandboard/README
 index 1f678e1..c6c0132 100644
 --- a/board/wandboard/README
 +++ b/board/wandboard/README
 @@ -12,31 +12,25 @@ http://www.wandboard.org/
  Building U-boot for Wandboard
  -
  
 -To build U-Boot for the Wandboard Dual Lite version:
 +To build U-Boot for the Wandboard:
  
 -$ make wandboard_dl_config
 -$ make
 -
 -To build U-Boot for the Wandboard Solo version:
 -
 -$ make wandboard_solo_config
 -$ make
 -
 -To build U-Boot for the Wandboard Quad version:
 -
 -$ make wandboard_quad_config
 +$ make wandboard_config
  $ make
  
  Flashing U-boot into the SD card
  
  
 -- After the 'make' command completes, the generated 'u-boot.imx' binary must 
 be
 +- After the 'make' command completes, the generated 'SPL' binary must be
  flashed into the SD card;
  
 -$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2; sync
 +$ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
  
  (Note - the SD card node may vary, so adjust this as needed).
  
 +- Flash the u-boot.img image into the SD card:
 +
 +sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
 +
  - Insert the SD card into the slot located in the bottom of the board (same 
 side
  as the mx6 processor)
  
 diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
 new file mode 100644
 index 000..77afae7
 --- /dev/null
 +++ b/board/wandboard/spl.c
 @@ -0,0 +1,317 @@
 +/*
 + * Copyright (C) 2014 Wandboard
 + * Author: Tungyi Lin tungyilin1...@gmail.com
 + * Richard Hu hak...@gmail.com
 + * SPDX-License-Identifier: GPL-2.0+
 + */
 +
 +#include asm/arch/clock.h
 +#include asm/arch/imx-regs.h
 +#include asm/arch/iomux.h
 +#include asm/arch/mx6-pins.h
 +#include asm/errno.h
 +#include asm/gpio.h
 +#include asm/imx-common/iomux-v3.h
 +#include asm/imx-common/video.h
 +#include mmc.h
 +#include fsl_esdhc.h
 +#include asm/arch/crm_regs.h
 +#include asm/io.h
 +#include asm/arch/sys_proto.h
 +#include spl.h
 +
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +#if defined(CONFIG_SPL_BUILD)
 +#include asm/arch/mx6-ddr.h
 +/*
 + * Driving strength:
 + *   0x30 == 40 Ohm
 + *   0x28 == 48 Ohm
 + */
 +
 +#define IMX6DQ_DRIVE_STRENGTH0x30
 +#define IMX6SDL_DRIVE_STRENGTH   0x28
 +
 +/* configure MX6Q/DUAL mmdc DDR io registers */
 +static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {
 + .dram_sdclk_0 = IMX6DQ_DRIVE_STRENGTH,
 + .dram_sdclk_1 

[U-Boot] [PATCH] usb: kbd: Fix key repeat not always using

2015-05-12 Thread Hans de Goede
The usb-kbd key repeat code assumes that reports get repeated every 40 ms,
this is never true when using CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP, and
does not always works for CONFIG_SYS_USB_EVENT_POLL and
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE since not all usb keyboards honor
the usb_set_idle() command.

For CONFIG_SYS_USB_EVENT_POLL we must use usb_set_idle() since we do a
blocking wait for the hid report, so if we do not tell the keyboard to send
a hid report every 40ms even if nothing changes then we will block u-boot
for 1s (the default u-boot usb interrupt packet timeout). Note that in this
case on keyboards which do not support usb_set_idle() we loose and we actually
get 1s latencies on other u-boot activities.

For the other poll-methods this commit stops using usb_set_idle() and instead
repeats the last received hid-report every 40 ms as long as no new hid-report
is received. This fixes key-repeat not working at all with
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP and fixes it not working with
keyboards which do not implement usb_set_idle() when using
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 common/usb_kbd.c | 22 +-
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 24a1a56..d4733b1 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -31,7 +31,7 @@ int overwrite_console(void)
 #endif
 
 /* Keyboard sampling rate */
-#define REPEAT_RATE(40 / 4)/* 40msec - 25cps */
+#define REPEAT_RATE40  /* 40msec - 25cps */
 #define REPEAT_DELAY   10  /* 10 x REPEAT_RATE = 400msec */
 
 #define NUM_LOCK   0x53
@@ -103,6 +103,7 @@ struct usb_kbd_pdata {
unsigned long   intpipe;
int intpktsize;
int intinterval;
+   int last_report;
struct int_queue *intq;
 
uint32_trepeat_delay;
@@ -318,15 +319,16 @@ static inline void usb_kbd_poll_for_event(struct 
usb_device *dev)
   data-intinterval);
 
usb_kbd_irq_worker(dev);
-#elif  defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
+#else
+# if   defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
struct usb_interface *iface;
struct usb_kbd_pdata *data = dev-privptr;
iface = dev-config.if_desc[0];
usb_get_report(dev, iface-desc.bInterfaceNumber,
   1, 0, data-new, USB_KBD_BOOT_REPORT_SIZE);
-   if (memcmp(data-old, data-new, USB_KBD_BOOT_REPORT_SIZE))
+   if (memcmp(data-old, data-new, USB_KBD_BOOT_REPORT_SIZE)) {
usb_kbd_irq_worker(dev);
-#elif  defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
+# elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
struct usb_kbd_pdata *data = dev-privptr;
if (poll_int_queue(dev, data-intq)) {
usb_kbd_irq_worker(dev);
@@ -335,6 +337,13 @@ static inline void usb_kbd_poll_for_event(struct 
usb_device *dev)
data-intq = create_int_queue(dev, data-intpipe, 1,
  USB_KBD_BOOT_REPORT_SIZE, data-new,
  data-intinterval);
+# endif
+   data-last_report = get_timer(0);
+   /* Repeat last usb hid report every REPEAT_RATE ms for keyrepeat */
+   } else if (data-last_report != -1 
+  get_timer(data-last_report)  REPEAT_RATE) {
+   usb_kbd_irq_worker(dev);
+   data-last_report = get_timer(0);
}
 #endif
 }
@@ -445,12 +454,15 @@ static int usb_kbd_probe(struct usb_device *dev, unsigned 
int ifnum)
data-intpktsize = min(usb_maxpacket(dev, data-intpipe),
   USB_KBD_BOOT_REPORT_SIZE);
data-intinterval = ep-bInterval;
+   data-last_report = -1;
 
/* We found a USB Keyboard, install it. */
usb_set_protocol(dev, iface-desc.bInterfaceNumber, 0);
 
+#ifdef CONFIG_SYS_USB_EVENT_POLL
debug(USB KBD: found set idle...\n);
-   usb_set_idle(dev, iface-desc.bInterfaceNumber, REPEAT_RATE, 0);
+   usb_set_idle(dev, iface-desc.bInterfaceNumber, REPEAT_RATE / 4, 0);
+#endif
 
debug(USB KBD: enable interrupt pipe...\n);
 #ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
-- 
2.3.6

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Re: [U-Boot] [PATCH] Clean all defconfigs with savedefconfig

2015-05-12 Thread Joe Hershberger
Hi Tom,

On Tue, May 12, 2015 at 10:18 AM, Tom Rini tr...@konsulko.com wrote:
 On Mon, May 11, 2015 at 01:32:40PM -0500, Joe Hershberger wrote:
 Hi Tom,

 On Mon, May 11, 2015 at 12:08 PM, Joe Hershberger
 joe.hershber...@ni.com wrote:
  In order to reduce merge conflicts and to maintain the simplest possible
  defconfig files, we should be using the savedefconfig feature of Kconfig
  every time a new feature is added. This keeps the defconfig settings to
  a minimum (only those things not default) and keeps them in the same
  order as the Kconfig options.
 
  Signed-off-by: Joe Hershberger joe.hershber...@ni.com
  Cc: Masahiro Yamada yamada.masah...@socionext.com

 This is easy to generate, but as you can imagine it will become a
 conflict rapidly. Please let me know if you choose to wait past today
 on this... if you do, let me know when you want to pull it in and I
 can generate it again. We should coordinate.

 I'm taking what you and Stephen talked about as changes will be coming
 and not applying this patch.

That's correct. I'm running a test now. Are you about to push more
changes that include defconfig or Kconfig changes or am I safe with
the current HEAD to generate this patch?

Thanks,
-Joe
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[U-Boot] [PATCH v2 1/2] kconfig: Make board selection choices optional

2015-05-12 Thread Joe Hershberger
By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Masahiro Yamada yamada.masah...@socionext.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Tom Rini tr...@konsulko.com

---

Changes in v2:
-New to prevent lost defconfig settings

 arch/arc/Kconfig | 1 +
 arch/arm/Kconfig | 1 +
 arch/arm/cpu/armv7/exynos/Kconfig| 1 +
 arch/arm/cpu/armv7/mx5/Kconfig   | 1 +
 arch/arm/cpu/armv7/mx6/Kconfig   | 1 +
 arch/arm/cpu/armv7/omap3/Kconfig | 1 +
 arch/arm/cpu/armv7/omap4/Kconfig | 1 +
 arch/arm/cpu/armv7/omap5/Kconfig | 1 +
 arch/arm/cpu/armv7/rmobile/Kconfig   | 1 +
 arch/arm/cpu/armv7/s5pc1xx/Kconfig   | 1 +
 arch/arm/mach-at91/Kconfig   | 1 +
 arch/arm/mach-bcm283x/Kconfig| 1 +
 arch/arm/mach-davinci/Kconfig| 1 +
 arch/arm/mach-integrator/Kconfig | 2 ++
 arch/arm/mach-keystone/Kconfig   | 1 +
 arch/arm/mach-kirkwood/Kconfig   | 1 +
 arch/arm/mach-nomadik/Kconfig| 1 +
 arch/arm/mach-orion5x/Kconfig| 1 +
 arch/arm/mach-socfpga/Kconfig| 1 +
 arch/arm/mach-tegra/Kconfig  | 1 +
 arch/arm/mach-tegra/tegra114/Kconfig | 1 +
 arch/arm/mach-tegra/tegra124/Kconfig | 1 +
 arch/arm/mach-tegra/tegra20/Kconfig  | 1 +
 arch/arm/mach-tegra/tegra30/Kconfig  | 1 +
 arch/arm/mach-uniphier/Kconfig   | 1 +
 arch/arm/mach-zynq/Kconfig   | 1 +
 arch/avr32/Kconfig   | 1 +
 arch/blackfin/Kconfig| 1 +
 arch/microblaze/Kconfig  | 1 +
 arch/mips/Kconfig| 1 +
 arch/nds32/Kconfig   | 1 +
 arch/nios2/Kconfig   | 1 +
 arch/openrisc/Kconfig| 1 +
 arch/powerpc/Kconfig | 1 +
 arch/powerpc/cpu/mpc512x/Kconfig | 1 +
 arch/powerpc/cpu/mpc5xx/Kconfig  | 1 +
 arch/powerpc/cpu/mpc5xxx/Kconfig | 1 +
 arch/powerpc/cpu/mpc8260/Kconfig | 1 +
 arch/powerpc/cpu/mpc83xx/Kconfig | 1 +
 arch/powerpc/cpu/mpc85xx/Kconfig | 1 +
 arch/powerpc/cpu/mpc86xx/Kconfig | 1 +
 arch/powerpc/cpu/mpc8xx/Kconfig  | 1 +
 arch/powerpc/cpu/ppc4xx/Kconfig  | 1 +
 arch/sh/Kconfig  | 1 +
 arch/sparc/Kconfig   | 1 +
 board/amcc/canyonlands/Kconfig   | 1 +
 board/coreboot/Kconfig   | 1 +
 board/dbau1x00/Kconfig   | 1 +
 board/google/Kconfig | 1 +
 board/intel/Kconfig  | 1 +
 board/micronas/vct/Kconfig   | 1 +
 board/seco/Kconfig   | 2 ++
 board/sunxi/Kconfig  | 1 +
 53 files changed, 55 insertions(+)

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index c044ad4..85fddd2 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -132,6 +132,7 @@ config ARC_CACHE_LINE_SHIFT
 
 choice
prompt Target select
+   optional
 
 config TARGET_DUMMY
bool Dummy target
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cee3126..1c7cf7f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -64,6 +64,7 @@ config SEMIHOSTING
 
 choice
prompt Target select
+   optional
 
 config ARCH_AT91
bool Atmel AT91
diff --git a/arch/arm/cpu/armv7/exynos/Kconfig 
b/arch/arm/cpu/armv7/exynos/Kconfig
index f6084ac..c614425 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -2,6 +2,7 @@ if ARCH_EXYNOS
 
 choice
prompt EXYNOS board select
+   optional
 
 config TARGET_SMDKV310
select SUPPORT_SPL
diff --git a/arch/arm/cpu/armv7/mx5/Kconfig b/arch/arm/cpu/armv7/mx5/Kconfig
index 2d6c0ce..9f250c6 100644
--- a/arch/arm/cpu/armv7/mx5/Kconfig
+++ b/arch/arm/cpu/armv7/mx5/Kconfig
@@ -12,6 +12,7 @@ config MX53
 
 choice
prompt MX5 board select
+   optional
 
 config TARGET_USBARMORY
bool Support USB armory
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 076ba52..1282be3 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -27,6 +27,7 @@ config MX6SX
 
 choice
prompt MX6 board select
+   optional
 
 config TARGET_SECOMX6
bool Support secomx6 boards
diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
index cc82c50..b32a6b0 100644
--- a/arch/arm/cpu/armv7/omap3/Kconfig
+++ b/arch/arm/cpu/armv7/omap3/Kconfig
@@ -2,6 +2,7 @@ if OMAP34XX
 
 choice
prompt OMAP3 board select
+   optional
 
 config TARGET_AM3517_EVM
bool AM3517 EVM
diff --git a/arch/arm/cpu/armv7/omap4/Kconfig b/arch/arm/cpu/armv7/omap4/Kconfig
index eccf897..df27ea1 100644
--- a/arch/arm/cpu/armv7/omap4/Kconfig
+++ b/arch/arm/cpu/armv7/omap4/Kconfig
@@ -2,6 +2,7 @@ if OMAP44XX
 
 choice
prompt OMAP4 board select
+   optional
 
 config 

[U-Boot] [PATCH] warp: README: Fix typo

2015-05-12 Thread Fabio Estevam
Fix the spelling of 'successful'.

Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
 board/warp/README | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/warp/README b/board/warp/README
index 0e1f076..db3100e 100644
--- a/board/warp/README
+++ b/board/warp/README
@@ -43,8 +43,8 @@ Transfer u-boot.imx that will be flashed into the eMMC:
 
 $ sudo dfu-util -D u-boot.imx -a boot
 
-Then on the U-boot prompt the following message should be seen after a 
succesful
-upgrade:
+Then on the U-boot prompt the following message should be seen after a
+successful upgrade:
 
 #DOWNLOAD ... OK
 Ctrl+C to exit ...
-- 
1.9.1

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Re: [U-Boot] [PATCH] usb: kbd: Fix key repeat not always using

2015-05-12 Thread Michael Trimarchi
Hi

On Tue, May 12, 2015 at 6:58 PM, Hans de Goede hdego...@redhat.com wrote:
 The usb-kbd key repeat code assumes that reports get repeated every 40 ms,
 this is never true when using CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP, and
 does not always works for CONFIG_SYS_USB_EVENT_POLL and
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE since not all usb keyboards honor
 the usb_set_idle() command.

 For CONFIG_SYS_USB_EVENT_POLL we must use usb_set_idle() since we do a
 blocking wait for the hid report, so if we do not tell the keyboard to send
 a hid report every 40ms even if nothing changes then we will block u-boot
 for 1s (the default u-boot usb interrupt packet timeout). Note that in this
 case on keyboards which do not support usb_set_idle() we loose and we actually
 get 1s latencies on other u-boot activities.

 For the other poll-methods this commit stops using usb_set_idle() and instead
 repeats the last received hid-report every 40 ms as long as no new hid-report
 is received. This fixes key-repeat not working at all with
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP and fixes it not working with
 keyboards which do not implement usb_set_idle() when using
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE.

 Signed-off-by: Hans de Goede hdego...@redhat.com
 ---
  common/usb_kbd.c | 22 +-
  1 file changed, 17 insertions(+), 5 deletions(-)

 diff --git a/common/usb_kbd.c b/common/usb_kbd.c
 index 24a1a56..d4733b1 100644
 --- a/common/usb_kbd.c
 +++ b/common/usb_kbd.c
 @@ -31,7 +31,7 @@ int overwrite_console(void)
  #endif

  /* Keyboard sampling rate */
 -#define REPEAT_RATE(40 / 4)/* 40msec - 25cps */
 +#define REPEAT_RATE40  /* 40msec - 25cps */
  #define REPEAT_DELAY   10  /* 10 x REPEAT_RATE = 400msec */

  #define NUM_LOCK   0x53
 @@ -103,6 +103,7 @@ struct usb_kbd_pdata {
 unsigned long   intpipe;
 int intpktsize;
 int intinterval;
 +   int last_report;
 struct int_queue *intq;

 uint32_trepeat_delay;
 @@ -318,15 +319,16 @@ static inline void usb_kbd_poll_for_event(struct 
 usb_device *dev)
data-intinterval);

 usb_kbd_irq_worker(dev);
 -#elif  defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
 +#else
 +# if   defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
 struct usb_interface *iface;
 struct usb_kbd_pdata *data = dev-privptr;
 iface = dev-config.if_desc[0];
 usb_get_report(dev, iface-desc.bInterfaceNumber,
1, 0, data-new, USB_KBD_BOOT_REPORT_SIZE);
 -   if (memcmp(data-old, data-new, USB_KBD_BOOT_REPORT_SIZE))
 +   if (memcmp(data-old, data-new, USB_KBD_BOOT_REPORT_SIZE)) {
 usb_kbd_irq_worker(dev);
 -#elif  defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
 +# elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
 struct usb_kbd_pdata *data = dev-privptr;
 if (poll_int_queue(dev, data-intq)) {
 usb_kbd_irq_worker(dev);
 @@ -335,6 +337,13 @@ static inline void usb_kbd_poll_for_event(struct 
 usb_device *dev)
 data-intq = create_int_queue(dev, data-intpipe, 1,
   USB_KBD_BOOT_REPORT_SIZE, data-new,
   data-intinterval);
 +# endif

With or without space?

 +   data-last_report = get_timer(0);
 +   /* Repeat last usb hid report every REPEAT_RATE ms for keyrepeat */
 +   } else if (data-last_report != -1 
 +  get_timer(data-last_report)  REPEAT_RATE) {
 +   usb_kbd_irq_worker(dev);
 +   data-last_report = get_timer(0);

is int get_timer type?

 }
  #endif
  }
 @@ -445,12 +454,15 @@ static int usb_kbd_probe(struct usb_device *dev, 
 unsigned int ifnum)
 data-intpktsize = min(usb_maxpacket(dev, data-intpipe),
USB_KBD_BOOT_REPORT_SIZE);
 data-intinterval = ep-bInterval;
 +   data-last_report = -1;

 /* We found a USB Keyboard, install it. */
 usb_set_protocol(dev, iface-desc.bInterfaceNumber, 0);

 +#ifdef CONFIG_SYS_USB_EVENT_POLL
 debug(USB KBD: found set idle...\n);
 -   usb_set_idle(dev, iface-desc.bInterfaceNumber, REPEAT_RATE, 0);
 +   usb_set_idle(dev, iface-desc.bInterfaceNumber, REPEAT_RATE / 4, 0);
 +#endif

 debug(USB KBD: enable interrupt pipe...\n);
  #ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
 --
 2.3.6

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Re: [U-Boot] [PATCH] Clean all defconfigs with savedefconfig

2015-05-12 Thread Tom Rini
On Tue, May 12, 2015 at 11:20:07AM -0500, Joe Hershberger wrote:
 Hi Tom,
 
 On Tue, May 12, 2015 at 10:18 AM, Tom Rini tr...@konsulko.com wrote:
  On Mon, May 11, 2015 at 01:32:40PM -0500, Joe Hershberger wrote:
  Hi Tom,
 
  On Mon, May 11, 2015 at 12:08 PM, Joe Hershberger
  joe.hershber...@ni.com wrote:
   In order to reduce merge conflicts and to maintain the simplest possible
   defconfig files, we should be using the savedefconfig feature of Kconfig
   every time a new feature is added. This keeps the defconfig settings to
   a minimum (only those things not default) and keeps them in the same
   order as the Kconfig options.
  
   Signed-off-by: Joe Hershberger joe.hershber...@ni.com
   Cc: Masahiro Yamada yamada.masah...@socionext.com
 
  This is easy to generate, but as you can imagine it will become a
  conflict rapidly. Please let me know if you choose to wait past today
  on this... if you do, let me know when you want to pull it in and I
  can generate it again. We should coordinate.
 
  I'm taking what you and Stephen talked about as changes will be coming
  and not applying this patch.
 
 That's correct. I'm running a test now. Are you about to push more
 changes that include defconfig or Kconfig changes or am I safe with
 the current HEAD to generate this patch?

You're safe to continue.  Please cc Stephen on that one since I'll want
his ack before I grab it.  Thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v2 1/2] kconfig: Make board selection choices optional

2015-05-12 Thread Stephen Warren

On 05/12/2015 12:01 PM, Joe Hershberger wrote:

By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.


From a Tegra perspective, the series,
Acked-by: Stephen Warren swar...@nvidia.com

In patch 2/2, I do notice a couple of CONFIG_TARGET_xxx being removed 
rather than moved though:



diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig



-CONFIG_TARGET_M52277EVB=y



diff --git a/configs/M52277EVB_stmicro_defconfig 
b/configs/M52277EVB_stmicro_defconfig



-CONFIG_TARGET_M52277EVB=y


Perhaps patch 1/2 missed a Kconfig, or are those values meant to be removed?
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Re: [U-Boot] [PATCH] usb: kbd: Fix key repeat not always using

2015-05-12 Thread Marek Vasut
On Tuesday, May 12, 2015 at 06:58:23 PM, Hans de Goede wrote:
 The usb-kbd key repeat code assumes that reports get repeated every 40 ms,
 this is never true when using CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP, and
 does not always works for CONFIG_SYS_USB_EVENT_POLL and
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE since not all usb keyboards honor
 the usb_set_idle() command.
 
 For CONFIG_SYS_USB_EVENT_POLL we must use usb_set_idle() since we do a
 blocking wait for the hid report, so if we do not tell the keyboard to send
 a hid report every 40ms even if nothing changes then we will block u-boot
 for 1s (the default u-boot usb interrupt packet timeout). Note that in this
 case on keyboards which do not support usb_set_idle() we loose and we
 actually get 1s latencies on other u-boot activities.
 
 For the other poll-methods this commit stops using usb_set_idle() and
 instead repeats the last received hid-report every 40 ms as long as no new
 hid-report is received. This fixes key-repeat not working at all with
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP and fixes it not working with
 keyboards which do not implement usb_set_idle() when using
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE.
 
 Signed-off-by: Hans de Goede hdego...@redhat.com

Looks reasonable, I don't really care about the ifdef indent, but the
data type for get_timer() should be fixed. Otherwise,

Reviewed-by: Marek Vasut ma...@denx.de

Would this finally be a patch to pick through the USB tree ? :b

Best regards,
Marek Vasut
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[U-Boot] [PATCH v3 1/2] arch: Make board selection choices optional

2015-05-12 Thread Joe Hershberger
By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Masahiro Yamada yamada.masah...@socionext.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Tom Rini tr...@konsulko.com

---

Changes in v3:
-Add optional to the arch/m68k/Kconfig target selection

Changes in v2:
-New to prevent lost defconfig settings

 arch/arc/Kconfig | 1 +
 arch/arm/Kconfig | 1 +
 arch/arm/cpu/armv7/exynos/Kconfig| 1 +
 arch/arm/cpu/armv7/mx5/Kconfig   | 1 +
 arch/arm/cpu/armv7/mx6/Kconfig   | 1 +
 arch/arm/cpu/armv7/omap3/Kconfig | 1 +
 arch/arm/cpu/armv7/omap4/Kconfig | 1 +
 arch/arm/cpu/armv7/omap5/Kconfig | 1 +
 arch/arm/cpu/armv7/rmobile/Kconfig   | 1 +
 arch/arm/cpu/armv7/s5pc1xx/Kconfig   | 1 +
 arch/arm/mach-at91/Kconfig   | 1 +
 arch/arm/mach-bcm283x/Kconfig| 1 +
 arch/arm/mach-davinci/Kconfig| 1 +
 arch/arm/mach-integrator/Kconfig | 2 ++
 arch/arm/mach-keystone/Kconfig   | 1 +
 arch/arm/mach-kirkwood/Kconfig   | 1 +
 arch/arm/mach-nomadik/Kconfig| 1 +
 arch/arm/mach-orion5x/Kconfig| 1 +
 arch/arm/mach-socfpga/Kconfig| 1 +
 arch/arm/mach-tegra/Kconfig  | 1 +
 arch/arm/mach-tegra/tegra114/Kconfig | 1 +
 arch/arm/mach-tegra/tegra124/Kconfig | 1 +
 arch/arm/mach-tegra/tegra20/Kconfig  | 1 +
 arch/arm/mach-tegra/tegra30/Kconfig  | 1 +
 arch/arm/mach-uniphier/Kconfig   | 1 +
 arch/arm/mach-zynq/Kconfig   | 1 +
 arch/avr32/Kconfig   | 1 +
 arch/blackfin/Kconfig| 1 +
 arch/m68k/Kconfig| 1 +
 arch/microblaze/Kconfig  | 1 +
 arch/mips/Kconfig| 1 +
 arch/nds32/Kconfig   | 1 +
 arch/nios2/Kconfig   | 1 +
 arch/openrisc/Kconfig| 1 +
 arch/powerpc/Kconfig | 1 +
 arch/powerpc/cpu/mpc512x/Kconfig | 1 +
 arch/powerpc/cpu/mpc5xx/Kconfig  | 1 +
 arch/powerpc/cpu/mpc5xxx/Kconfig | 1 +
 arch/powerpc/cpu/mpc8260/Kconfig | 1 +
 arch/powerpc/cpu/mpc83xx/Kconfig | 1 +
 arch/powerpc/cpu/mpc85xx/Kconfig | 1 +
 arch/powerpc/cpu/mpc86xx/Kconfig | 1 +
 arch/powerpc/cpu/mpc8xx/Kconfig  | 1 +
 arch/powerpc/cpu/ppc4xx/Kconfig  | 1 +
 arch/sh/Kconfig  | 1 +
 arch/sparc/Kconfig   | 1 +
 board/amcc/canyonlands/Kconfig   | 1 +
 board/coreboot/Kconfig   | 1 +
 board/dbau1x00/Kconfig   | 1 +
 board/google/Kconfig | 1 +
 board/intel/Kconfig  | 1 +
 board/micronas/vct/Kconfig   | 1 +
 board/seco/Kconfig   | 2 ++
 board/sunxi/Kconfig  | 1 +
 54 files changed, 56 insertions(+)

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index c044ad4..85fddd2 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -132,6 +132,7 @@ config ARC_CACHE_LINE_SHIFT
 
 choice
prompt Target select
+   optional
 
 config TARGET_DUMMY
bool Dummy target
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cee3126..1c7cf7f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -64,6 +64,7 @@ config SEMIHOSTING
 
 choice
prompt Target select
+   optional
 
 config ARCH_AT91
bool Atmel AT91
diff --git a/arch/arm/cpu/armv7/exynos/Kconfig 
b/arch/arm/cpu/armv7/exynos/Kconfig
index f6084ac..c614425 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -2,6 +2,7 @@ if ARCH_EXYNOS
 
 choice
prompt EXYNOS board select
+   optional
 
 config TARGET_SMDKV310
select SUPPORT_SPL
diff --git a/arch/arm/cpu/armv7/mx5/Kconfig b/arch/arm/cpu/armv7/mx5/Kconfig
index 2d6c0ce..9f250c6 100644
--- a/arch/arm/cpu/armv7/mx5/Kconfig
+++ b/arch/arm/cpu/armv7/mx5/Kconfig
@@ -12,6 +12,7 @@ config MX53
 
 choice
prompt MX5 board select
+   optional
 
 config TARGET_USBARMORY
bool Support USB armory
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 076ba52..1282be3 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -27,6 +27,7 @@ config MX6SX
 
 choice
prompt MX6 board select
+   optional
 
 config TARGET_SECOMX6
bool Support secomx6 boards
diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
index cc82c50..b32a6b0 100644
--- a/arch/arm/cpu/armv7/omap3/Kconfig
+++ b/arch/arm/cpu/armv7/omap3/Kconfig
@@ -2,6 +2,7 @@ if OMAP34XX
 
 choice
prompt OMAP3 board select
+   optional
 
 config TARGET_AM3517_EVM
bool AM3517 EVM
diff --git a/arch/arm/cpu/armv7/omap4/Kconfig b/arch/arm/cpu/armv7/omap4/Kconfig
index eccf897..df27ea1 100644
--- a/arch/arm/cpu/armv7/omap4/Kconfig
+++ 

Re: [U-Boot] [PATCH v2 1/2] kconfig: Make board selection choices optional

2015-05-12 Thread Joe Hershberger
Hi Stephen,

On Tue, May 12, 2015 at 2:31 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 05/12/2015 12:01 PM, Joe Hershberger wrote:

 By making the board selections optional, every defconfig will include
 the board selection when running savedefconfig so if a new board is
 added to the top of the list of choices the former top's defconfig will
 still be correct.


 From a Tegra perspective, the series,
 Acked-by: Stephen Warren swar...@nvidia.com

 In patch 2/2, I do notice a couple of CONFIG_TARGET_xxx being removed rather
 than moved though:

 diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig


 -CONFIG_TARGET_M52277EVB=y


 diff --git a/configs/M52277EVB_stmicro_defconfig
 b/configs/M52277EVB_stmicro_defconfig


 -CONFIG_TARGET_M52277EVB=y


 Perhaps patch 1/2 missed a Kconfig, or are those values meant to be removed?

Great catch.  I did miss one.  The m68k one.

v3 coming.

Thanks,
-Joe
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Re: [U-Boot] [PATCH 6/6] ARM64: HiKey: hi6220: Add u-boot support for the 96boards CE HiKey board.

2015-05-12 Thread Rob Herring
On Tue, May 12, 2015 at 8:25 AM, Peter Griffin peter.grif...@linaro.org wrote:
 HiKey is the first 96boards consumer edition compliant board. It features a 
 hi6220
 SoC which has eight ARM A53 cpu's.

 This initial port adds support for: -
 1) Serial
 2) eMMC / sd card
 3) USB
 4) GPIO

 It has been tested with Arm Trusted Firmware running u-boot as the BL33 
 executable.

 Notes:

 eMMC has been tested with basic reading of eMMC partition intto DDR. I have 
 not
 tested writing / erasing. I suspect due to lack of clock control it won't be
 running in the most performant high speed mode.

 SD card slot has been tested for reading and booting kernels into DDR.
 It is also currently used for saving the u-boot enviroment.

 USB has been tested with ASIX networking adapter to tftpboot kernels
 into DDR. USB mass storage device enumeration doesn't currently work for
 an unkown reason.

 GPIO has been tested using gpio toggle GPIO4_1-3 to flash LEDs.

 Basic SoC datasheet can be found here: -
 https://github.com/96boards/documentation/blob/master/hikey/
 Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

 Board schematic can be found here: -
 https://github.com/96boards/documentation/blob/master/hikey/
 96Boards-Hikey-Rev-A1.pdf

 Signed-off-by: Peter Griffin peter.grif...@linaro.org
 ---
  arch/arm/Kconfig|   5 +
  board/96boards/hikey64/Kconfig  |  12 ++
  board/96boards/hikey64/Makefile |   8 +
  board/96boards/hikey64/hikey.c  | 439 
 

This is more likely to have common parts with other HiSi boards than
other 96boards compliant boards.

  configs/hikey_aemv8a_defconfig  |   5 +
  include/configs/hikey_aemv8a.h  | 187 +

aemv8a seems to be leftover from VExpress. Just hikey should be enough.

  6 files changed, 656 insertions(+)
  create mode 100644 board/96boards/hikey64/Kconfig
  create mode 100644 board/96boards/hikey64/Makefile
  create mode 100644 board/96boards/hikey64/hikey.c
  create mode 100644 configs/hikey_aemv8a_defconfig
  create mode 100644 include/configs/hikey_aemv8a.h

 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index 7ed0e20..0b6de5d 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -656,6 +656,10 @@ config TARGET_LS2085A_SIMU
 select ARM64
 select ARMV8_MULTIENTRY

 +config TARGET_96BOARDS_HIKEY
 +   bool Support HiKey 96boards Consumer Edition Platform
 +   select ARM64
 +
  config TARGET_LS1021AQDS
 bool Support ls1021aqds
 select CPU_V7
 @@ -787,6 +791,7 @@ source board/armadeus/apf27/Kconfig
  source board/armltd/integrator/Kconfig
  source board/armltd/vexpress/Kconfig
  source board/armltd/vexpress64/Kconfig
 +source board/96boards/hikey64/Kconfig
  source board/bachmann/ot1200/Kconfig
  source board/balloon3/Kconfig
  source board/barco/platinum/Kconfig
 diff --git a/board/96boards/hikey64/Kconfig b/board/96boards/hikey64/Kconfig
 new file mode 100644
 index 000..eb1709b
 --- /dev/null
 +++ b/board/96boards/hikey64/Kconfig
 @@ -0,0 +1,12 @@
 +if TARGET_96BOARDS_HIKEY
 +
 +config SYS_BOARD
 +   default hikey64
 +
 +config SYS_VENDOR
 +   default 96boards

96boards doesn't really make boards. This should be CircuitCo or HiSilicon.

 +
 +config SYS_CONFIG_NAME
 +   default hikey_aemv8a
 +
 +endif
 diff --git a/board/96boards/hikey64/Makefile b/board/96boards/hikey64/Makefile
 new file mode 100644
 index 000..d4ec8c7
 --- /dev/null
 +++ b/board/96boards/hikey64/Makefile
 @@ -0,0 +1,8 @@
 +#
 +# (C) Copyright 2000-2004
 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
 +#
 +# SPDX-License-Identifier: GPL-2.0+
 +#
 +
 +obj-y  := hikey.o
 diff --git a/board/96boards/hikey64/hikey.c b/board/96boards/hikey64/hikey.c
 new file mode 100644
 index 000..91e8e6b
 --- /dev/null
 +++ b/board/96boards/hikey64/hikey.c
 @@ -0,0 +1,439 @@
 +/*
 + * (C) Copyright 2015 Linaro
 + * Peter Griffin peter.grif...@linaro.org
 + *
 + * SPDX-License-Identifier:GPL-2.0+
 + */
 +#include common.h
 +#include dm.h
 +#include malloc.h
 +#include errno.h
 +#include netdev.h
 +#include asm/io.h
 +#include asm-generic/gpio.h
 +#include asm/arch/gpio.h
 +#include asm/arch/dwmmc.h
 +#include asm/arch/hi6220.h
 +#include asm/arch/hi6553.h
 +
 +#ifdef CONFIG_DM_GPIO
 +static const struct hikey_gpio_platdata hi6220_gpio[] = {
 +   { 0, HI6220_GPIO0_BASE},
 +   { 1, HI6220_GPIO1_BASE},
 +   { 2, HI6220_GPIO2_BASE},
 +   { 3, HI6220_GPIO3_BASE},
 +   { 4, HI6220_GPIO4_BASE},
 +   { 5, HI6220_GPIO5_BASE},
 +   { 6, HI6220_GPIO6_BASE},
 +   { 7, HI6220_GPIO7_BASE},
 +   { 8, HI6220_GPIO8_BASE},
 +   { 9, HI6220_GPIO9_BASE},
 +   { 10, HI6220_GPIO10_BASE},
 +   { 11, HI6220_GPIO11_BASE},
 +   { 12, HI6220_GPIO12_BASE},
 +   { 13, HI6220_GPIO13_BASE},
 +   { 14, HI6220_GPIO14_BASE},
 +   { 15, HI6220_GPIO15_BASE},
 +   { 16, HI6220_GPIO16_BASE},
 +   { 17, 

Re: [U-Boot] [PATCH 2/6] dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.

2015-05-12 Thread Marek Vasut
On Tuesday, May 12, 2015 at 03:38:28 PM, Peter Griffin wrote:

Hi!

 This patch adds support for the GPIO perif found on hi6220
 SoC.
 
 Signed-off-by: Peter Griffin peter.grif...@linaro.org
 ---
  arch/arm/include/asm/arch-armv8/gpio.h | 47 +
  drivers/gpio/Makefile  |  2 +
  drivers/gpio/hi6220_gpio.c | 95
 ++ 3 files changed, 144 insertions(+)
  create mode 100644 arch/arm/include/asm/arch-armv8/gpio.h
  create mode 100644 drivers/gpio/hi6220_gpio.c
 
 diff --git a/arch/arm/include/asm/arch-armv8/gpio.h
 b/arch/arm/include/asm/arch-armv8/gpio.h new file mode 100644
 index 000..162c2d9
 --- /dev/null
 +++ b/arch/arm/include/asm/arch-armv8/gpio.h
 @@ -0,0 +1,47 @@
 +/*
 + * Copyright (C) 2015 Linaro
 + * Peter Griffin peter.grif...@linaro.org
 + *
 + * SPDX-License-Identifier:  GPL-2.0+
 + */
 +
 +#ifndef _HI6220_GPIO_H_
 +#define _HI6220_GPIO_H_
 +
 +#define HI6220_GPIO0_BASE(void *)0xf8011000

You should drop the explicit cast, that's nasty.

Also, why don't you define this as a HI6220_GPIO_BASE(bank) instead?
That'd trim down the number of macros and from what I see, it should
be rather easy to do ...

#define HI6220_GPIO_BASE(bank)
(((bank  4) ? 0xf8012000 : (0xf702 - 0x4000)) + (0x1000 * bank))

 +#define HI6220_GPIO1_BASE(void *)0xf8012000
 +#define HI6220_GPIO2_BASE(void *)0xf8013000
 +#define HI6220_GPIO3_BASE(void *)0xf8014000
 +#define HI6220_GPIO4_BASE(void *)0xf702
 +#define HI6220_GPIO5_BASE(void *)0xf7021000
 +#define HI6220_GPIO6_BASE(void *)0xf7022000
 +#define HI6220_GPIO7_BASE(void *)0xf7023000
 +#define HI6220_GPIO8_BASE(void *)0xf7024000
 +#define HI6220_GPIO9_BASE(void *)0xf7025000
 +#define HI6220_GPIO10_BASE   (void *)0xf7026000
 +#define HI6220_GPIO11_BASE   (void *)0xf7027000
 +#define HI6220_GPIO12_BASE   (void *)0xf7028000
 +#define HI6220_GPIO13_BASE   (void *)0xf7029000
 +#define HI6220_GPIO14_BASE   (void *)0xf702a000
 +#define HI6220_GPIO15_BASE   (void *)0xf702b000
 +#define HI6220_GPIO16_BASE   (void *)0xf702c000
 +#define HI6220_GPIO17_BASE   (void *)0xf702d000
 +#define HI6220_GPIO18_BASE   (void *)0xf702e000
 +#define HI6220_GPIO19_BASE   (void *)0xf702f000

But are these even used in the driver anywhere ?

 +#define BIT(x)   (1  (x))

This macro should be placed into common header files.

 +#define HI6220_GPIO_PER_BANK 8
 +#define HI6220_GPIO_DIR  0x400
 +
 +struct gpio_bank {
 + u8 *base;   /* address of registers in physical memory */

Should be void __iomem *, no ?

 +};
 +
 +/* Information about a GPIO bank */
 +struct hikey_gpio_platdata {
 + int bank_index;
 + void *base; /* address of registers in physical memory */
 +};
 +
 +#endif /* _HI6220_GPIO_H_ */

[...]
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Re: [U-Boot] [PATCH 1/6] usb: dwc2: Add support for v3 snpsid value

2015-05-12 Thread Marek Vasut
On Tuesday, May 12, 2015 at 03:38:27 PM, Peter Griffin wrote:
 This has been tested to the extent that I can enumerate
 a asix usb networking adapter and boot a kernel over usb
 on the 96boards hikey u-boot port I'm currently doing.
 
 Signed-off-by: Peter Griffin peter.grif...@linaro.org
 ---
  drivers/usb/host/dwc2.c | 3 ++-
  drivers/usb/host/dwc2.h | 1 +
  2 files changed, 3 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
 index e8142ac..19a6007 100644
 --- a/drivers/usb/host/dwc2.c
 +++ b/drivers/usb/host/dwc2.c
 @@ -1015,7 +1015,8 @@ int usb_lowlevel_init(int index, enum usb_init_type
 init, void **controller) snpsid = readl(regs-gsnpsid);
   printf(Core Release: %x.%03x\n, snpsid  12  0xf, snpsid  0xfff);
 
 - if ((snpsid  DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx) {
 + if ((snpsid  DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx 
 + (snpsid  DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx) {

Isn't this then a DWC3 controller instead ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 5/6] mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.

2015-05-12 Thread Marek Vasut
On Tuesday, May 12, 2015 at 03:38:31 PM, Peter Griffin wrote:
 This patch adds the glue code for hi6220 SoC which has 2x synopsis
 dw_mmc controllers. This will be used by the hikey board support
 in subsequent patches.
 
 Signed-off-by: Peter Griffin peter.grif...@linaro.org

[...]

 diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
 new file mode 100644
 index 000..a3880a3
 --- /dev/null
 +++ b/drivers/mmc/hi6220_dw_mmc.c
 @@ -0,0 +1,63 @@
 +/*
 + * (C) Copyright 2015 Linaro
 + * peter.griffin peter.grif...@linaro.org
 + *
 + * SPDX-License-Identifier:  GPL-2.0+
 + */
 +
 +#include common.h
 +#include dwmmc.h
 +#include malloc.h
 +#include asm-generic/errno.h
 +
 +#define  DWMMC_MAX_CH_NUM4
 +
 +/*
 +#define  DWMMC_MAX_FREQ  5200
 +#define  DWMMC_MIN_FREQ  40
 +*/

Please zap these dead macros.

 +/*TODO we should probably use the frequencies above, but ATF uses
 +  the ones below so stick with that for the moment */
 +#define  DWMMC_MAX_FREQ  5000
 +#define  DWMMC_MIN_FREQ  378000
 +
 +/* Source clock is configured to 100Mhz by ATF bl1*/
 +#define MMC0_DEFAULT_FREQ1

[...]

 +int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
 +{
 + struct dwmci_host *host = NULL;
 +
 + host = malloc(sizeof(struct dwmci_host));

calloc(1, sizeof(...)) so the data are inited/zero'd out please.
[...]
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Re: [U-Boot] [PATCH 2/6] dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.

2015-05-12 Thread Tom Rini
On Tue, May 12, 2015 at 08:36:30PM +0200, Marek Vasut wrote:
 On Tuesday, May 12, 2015 at 03:38:28 PM, Peter Griffin wrote:
[snip]
  +#define BIT(x) (1  (x))
 
 This macro should be placed into common header files.

We'll fix that once Jagan's series comes in which gives everyone BIT().

-- 
Tom


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[U-Boot] [PATCH] serial: stm32: Automatically generate CR when LF is observed

2015-05-12 Thread Daniel Thompson
Currently the u-boot output looks rather odd when running the minicom
terminal emulator in its default mode (just a string of random looking
text down the right hand side of the screen).

This is caused by a combination of minicom not automatically wrapping
lines and the stm32 serial driver never sending a carriage return.

Issue is trivially solved by automatically generating a CR whenever a LF
is transmitted, Several other serial drivers implement this behaviour.

Signed-off-by: Daniel Thompson daniel.thomp...@linaro.org
Cc: Kamil Lulko re...@wp.pl
---
 drivers/serial/serial_stm32.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 3c80096..8c613db 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -81,6 +81,10 @@ static int stm32_serial_getc(void)
 static void stm32_serial_putc(const char c)
 {
struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
+
+   if (c == '\n')
+   stm32_serial_putc('\r');
+
while ((readl(usart-sr)  USART_SR_FLAG_TXE) == 0)
;
writel(c, usart-dr);
-- 
2.1.0

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[U-Boot] [PATCH] beagle-xm: gpio_63 fix wrong pin initialization

2015-05-12 Thread Evgeniy Dushistov
DM3730 CPU used on beagleboard-xm doesn't have any gpio
multiplexed with wait0 pin,
but gpio_63 multiplexed with wait1, so it looks like typo.
At current form it has no sense, 
because of wait0 have no function 4.

Signed-off-by: Evgneiy A. Dushistov dushis...@mail.ru
---

 board/ti/beagle/beagle.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index 6dd2ffe..86bd6e9 100644
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -375,7 +375,7 @@ const omap3_sysinfo sysinfo = {
 
 #define MUX_BEAGLE_XM() \
MUX_VAL(CP(GPMC_NCS5),  (IDIS | PTD | EN  | M4)) /*GPIO_56*/\
-   MUX_VAL(CP(GPMC_WAIT0), (IDIS | PTU | EN  | M4)) /*GPIO_63*/\
+   MUX_VAL(CP(GPMC_WAIT1), (IDIS | PTU | EN  | M4)) /*GPIO_63*/\
MUX_VAL(CP(MMC1_DAT7),  (IDIS | PTU | EN  | M4)) /*GPIO_129*/\
MUX_VAL(CP(HDQ_SIO),(IDIS | PTU | EN  | M4)) /*GPIO_170*/\
MUX_VAL(CP(MCBSP3_DX),  (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
-- 
2.0.5

-- 
/Evgeniy
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Re: [U-Boot] [PATCH] ppc: xilinx: Remove ancient ppc405 and ppc440 platform

2015-05-12 Thread Georg Schardt
Hello,

yes, we have still some fx12mm  in use and i can try to compile and run
the newest u-boot in the next few days.

regards
Georg

Am 12.05.2015 um 16:19 schrieb Ricardo Ribalda Delgado:
 Hello

 I have followed doc/README.generic-board  and simply adding
 CONFIG_SYS_GENERIC_BOARD does the trick.

 So far it has build with no warnings for:

 ml507
 ml507_flash
 xilinx-ppc440-generic
 v5fx30teval

 and I have run it on the ml507 with no issues (is the only hw I have
 with me this week, but it is VERY similar to the others):


 Simply adding  CONFIG_SYS_GENERIC_BOARD to the .h file works perfectly
 As you can see from here:


 U-Boot 2015.07-rc1-00091-g698a12bef9e7-dirty (May 12 2015 - 10:14:15)

 CPU:   IBM PowerPC 440x5 VIRTEX5 at 400 MHz (PLB=100 OPB=8 EBC=67)
32 KiB I-Cache 32 KiB D-Cache
 DRAM:  256 MiB
 Flash: 32 MiB
 *** Warning - bad CRC, using default environment

 U-Boot is up and runnining
 ml507:/#


 Regarding xilinx-ppc404 and fx12mm

 It also builds ok, but I have no access to an fx12mm. Perhaps Georg
 can give it a try to confirm that this still works.


 Is there any other test that needs to be done after porting them to
 generic board?


 Thanks

 On Mon, May 11, 2015 at 3:45 PM, Michal Simek michal.si...@xilinx.com wrote:
 Hi,

 On 05/11/2015 09:34 AM, Ricardo Ribalda Delgado wrote:
 Hello Michal

 Thanks for your reply

 On Mon, May 11, 2015 at 9:11 AM, Michal Simek michal.si...@xilinx.com 
 wrote:
 Hi,

 On 05/09/2015 06:24 PM, Ricardo Ribalda Delgado wrote:
 Hello Michal and Stefan

 Could you provide some context about why are we removing this? Virtex
 5 (and V4) are not yet in their end of life.
 I was checking this internally and ppc is not supported by tools for
 several releases (roughly ~2 years). All support from tools was already
 removed.
 Virtex5 is only supported by ise/edk, not vivado. This is why the
 tools from the last two years does not support ppc.
 It is also about SDK where that support was removed.

 I think that the position from xilinx was to support ise for as long
 as v5, s6... was on sale.

 http://forums.xilinx.com/t5/Implementation/VIrtex-5-and-Vivado-HSL/td-p/250930
 One thing was support design tools and the next was to support the
 latest SW.
 Anyway this is Virtex5 - ppc440. Any intention to keep ppc405 alive?


 There is no testing on it done for a long time that's why this platform
 is obsolete from my point of view.
 We still use it actively on the fpga family of our productsm and cisco
 uses quite a lot of virtex5 :)

 Also avnet virtex5 boards are still available

 http://avnetexpress.avnet.com/store/em/EMController?action=productscatalogId=500201storeId=500201N=0langId=-1slnk=bterm=AES-XLX-V5LX-EVL110-Ghrf=http%3A%2F%2Fwww.em.avnet.com%2Fen-us%2Fdesign%2Fdrc%2FPages%2FXilinx-Virtex-5-LX-Evaluation-Kit.aspxintcmp=EMA-BUY-AES-XLX-V5LX-EVL110-G
 ok. I really have no problem to let you support these boards. :-)

 The plan is to re-factor the code for this platform or just drop all
 the support?
 Platform needs to be moved to generic board support and none from xilinx
 will do it. If you want to invest your time and support these boards
 feel free to do it but from my perspective we should just remove it
 because it is just old and make no sense to waste our time on it.
 Give me a couple of days and I will be able to answer to that question.

 If the patch can wait a bit before it is merged it will be great.
 Definitely it can wait but it has to be moved and test for generic board
 support.

 There are also yocto layers that support ml507 and ml405
 http://git.yoctoproject.org/cgit/cgit.cgi/meta-xilinx-community/tree/conf/machine
 I am not yocto guy but from cgit it looks like that it is pretty old
 too. ppc support 4 years ago, ml507 2 years ago.
 Last change for virtex5 is from 2014.
 :-) really just make no sense for me to keep these things alive because
 we are not testing it at all.

 Thanks,
 Michal



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[U-Boot] Patch to enable LEDs on sunxi/Cubietruck

2015-05-12 Thread Prof. Dr. Gundolf Kiefer
Dear developers,

the attached patch adds LED support for the Cubietruck board.

I found that the support for the onboard leds is missing for
sunxi-based boards in the latest Debian unstable and perhaps
upstream version of U-Boot. IMHO LEDs are very helpful for headless
systems. Perhaps the patch can be helpful somehow.

The code has basically been ported from the U-Boot version maintained at
linux-sunxi.org. As in the sunxi version, the blue led is switched on
by default.

Kind regards,

Gundolf Kiefer



Begin forwarded message:

Date: Tue, 05 May 2015 09:46:39 -0700
From: Vagrant Cascadian vagr...@aikidev.net
To: Prof. Dr. Gundolf Kiefer gundolf.kie...@hs-augsburg.de,
783...@bugs.debian.org Subject: Re: Bug#783846: Patch to enable LEDs on
sunix/Cubietruck


On 2015-04-30, Prof. Dr. Gundolf Kiefer wrote:
 It seems that the support for the onboard leds is missing for
 sunxi-based boards even in the latest version (Debian unstable). IMHO
 LEDs are very helpful for headless systems.

Thanks for the patches!

If you could submit these patches to u-boot upstream, that would be
best; we're trying to minimize the patches that are not already included
upstream.


live well,
  vagrant



---
Prof. Dr. Gundolf Kiefer
Effiziente Eingebettete Systeme  -  Efficient Embedded Systems
Fakultät für Informatik  -  Faculty of Computer Science
Hochschule Augsburg - University of Applied Sciences
http://www.hs-augsburg.de/~kiefer
---


enabled-LEDs-for-sunxiCubietruck
Description: Binary data
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[U-Boot] [PATCH v2 03/18] dts: Disable device tree for SPL on all boards

2015-05-12 Thread Simon Glass
We plan to enable device tree in SPL by default. Before doing this,
explicitly disable it for all boards.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 arch/arm/Kconfig | 2 ++
 arch/arm/cpu/armv7/exynos/Kconfig| 8 
 arch/arm/cpu/armv7/s5pc1xx/Kconfig   | 2 ++
 arch/arm/mach-tegra/Kconfig  | 3 +++
 configs/am335x_boneblack_vboot_defconfig | 1 +
 configs/arches_defconfig | 1 +
 configs/canyonlands_defconfig| 1 +
 configs/galileo_defconfig| 1 +
 configs/microblaze-generic_defconfig | 1 +
 configs/odroid_defconfig | 1 +
 configs/origen_defconfig | 1 +
 configs/s5pc210_universal_defconfig  | 1 +
 configs/socfpga_socrates_defconfig   | 1 +
 configs/trats2_defconfig | 1 +
 configs/trats_defconfig  | 1 +
 configs/zynq_microzed_defconfig  | 1 +
 configs/zynq_zc70x_defconfig | 1 +
 configs/zynq_zc770_xm010_defconfig   | 1 +
 configs/zynq_zc770_xm012_defconfig   | 1 +
 configs/zynq_zc770_xm013_defconfig   | 1 +
 configs/zynq_zed_defconfig   | 1 +
 configs/zynq_zybo_defconfig  | 1 +
 22 files changed, 33 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cee3126..c85c728 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -666,6 +666,7 @@ config TEGRA
select SUPPORT_SPL
select SPL
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
select CPU_V7
select DM
select DM_SPI_FLASH
@@ -792,6 +793,7 @@ config ARCH_UNIPHIER
select DM
select DM_SERIAL
select DM_I2C
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_STM32F429_DISCOVERY
bool Support STM32F429 Discovery
diff --git a/arch/arm/cpu/armv7/exynos/Kconfig 
b/arch/arm/cpu/armv7/exynos/Kconfig
index f6084ac..f0a6330 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -7,6 +7,7 @@ config TARGET_SMDKV310
select SUPPORT_SPL
bool Exynos4210 SMDKV310 board
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_TRATS
bool Exynos4210 Trats board
@@ -27,6 +28,7 @@ config TARGET_ODROID
 config TARGET_ODROID_XU3
bool Exynos5422 Odroid board
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_ARNDALE
bool Exynos5250 Arndale board
@@ -34,31 +36,37 @@ config TARGET_ARNDALE
select CPU_V7_HAS_VIRT
select SUPPORT_SPL
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_SMDK5250
bool SMDK5250 board
select SUPPORT_SPL
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_SNOW
bool Snow board
select SUPPORT_SPL
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_SMDK5420
bool SMDK5420 board
select SUPPORT_SPL
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_PEACH_PI
bool Peach Pi board
select SUPPORT_SPL
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_PEACH_PIT
bool Peach Pit board
select SUPPORT_SPL
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 endchoice
 
diff --git a/arch/arm/cpu/armv7/s5pc1xx/Kconfig 
b/arch/arm/cpu/armv7/s5pc1xx/Kconfig
index bc73813..65cc9eb 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/Kconfig
+++ b/arch/arm/cpu/armv7/s5pc1xx/Kconfig
@@ -6,10 +6,12 @@ choice
 config TARGET_S5P_GONI
bool S5P Goni board
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 config TARGET_SMDKC100
bool Support smdkc100 board
select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
 
 endchoice
 
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 8bab594..36e7389 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -26,6 +26,9 @@ config USE_PRIVATE_LIBGCC
 config SPL_DM
default y
 
+config SPL_DISABLE_OF_CONTROL
+   default y
+
 source arch/arm/mach-tegra/tegra20/Kconfig
 source arch/arm/mach-tegra/tegra30/Kconfig
 source arch/arm/mach-tegra/tegra114/Kconfig
diff --git a/configs/am335x_boneblack_vboot_defconfig 
b/configs/am335x_boneblack_vboot_defconfig
index e4ffe5f..df36a32 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS=EMMC_BOOT,ENABLE_VBOOT
 CONFIG_ARM=y
 CONFIG_TARGET_AM335X_EVM=y
 CONFIG_OF_CONTROL=y
+CONFIG_SPL_DISABLE_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE=am335x-boneblack
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
diff --git a/configs/arches_defconfig b/configs/arches_defconfig
index 30c6932..2af8446 100644
--- a/configs/arches_defconfig
+++ b/configs/arches_defconfig
@@ -4,4 +4,5 @@ CONFIG_TARGET_CANYONLANDS=y
 CONFIG_ARCHES=y
 

[U-Boot] [PATCH v2 09/18] fdt: Add fdt_first/next_region() functions

2015-05-12 Thread Simon Glass
These have been sent upstream but not accessed to libfdt. For now, bring
these into U-Boot to enable fdtgrep to operate. We will use fdtgrep to
cut device tree files down for SPL.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Add new patch with fdt_first/next_region() functions

 include/libfdt.h| 239 ++-
 lib/libfdt/Makefile |   2 +-
 lib/libfdt/fdt_region.c | 492 
 3 files changed, 731 insertions(+), 2 deletions(-)
 create mode 100644 lib/libfdt/fdt_region.c

diff --git a/include/libfdt.h b/include/libfdt.h
index 60e612a..2a81fbb 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -121,7 +121,12 @@
/* FDT_ERR_BADNCELLS: Device tree has a #address-cells, #size-cells
 * or similar property with a bad format or value */
 
-#define FDT_ERR_MAX14
+#define FDT_ERR_TOODEEP15
+   /* FDT_ERR_TOODEEP: The depth of a node has exceeded the internal
+* libfdt limit. This can happen if you have more than
+* FDT_MAX_DEPTH nested nodes. */
+
+#define FDT_ERR_MAX15
 
 /**/
 /* Low-level functions (you probably don't need these)*/
@@ -1668,6 +1673,77 @@ struct fdt_region {
int size;
 };
 
+/*
+ * Flags for fdt_find_regions()
+ *
+ * Add a region for the string table (always the last region)
+ */
+#define FDT_REG_ADD_STRING_TAB (1  0)
+
+/*
+ * Add all supernodes of a matching node/property, useful for creating a
+ * valid subset tree
+ */
+#define FDT_REG_SUPERNODES (1  1)
+
+/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
+#define FDT_REG_DIRECT_SUBNODES(1  2)
+
+/* Add all subnodes of a matching node */
+#define FDT_REG_ALL_SUBNODES   (1  3)
+
+/* Add a region for the mem_rsvmap table (always the first region) */
+#define FDT_REG_ADD_MEM_RSVMAP (1  4)
+
+/* Indicates what an fdt part is (node, property, value) */
+#define FDT_IS_NODE(1  0)
+#define FDT_IS_PROP(1  1)
+#define FDT_IS_VALUE   (1  2)/* not supported */
+#define FDT_IS_COMPAT  (1  3)/* used internally */
+#define FDT_NODE_HAS_PROP  (1  4)/* node contains prop */
+
+#define FDT_ANY_GLOBAL (FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
+   FDT_IS_COMPAT)
+#define FDT_IS_ANY 0x1f/* all the above */
+
+/* We set a reasonable limit on the number of nested nodes */
+#define FDT_MAX_DEPTH  32
+
+/* Decribes what we want to include from the current tag */
+enum want_t {
+   WANT_NOTHING,
+   WANT_NODES_ONLY,/* No properties */
+   WANT_NODES_AND_PROPS,   /* Everything for one level */
+   WANT_ALL_NODES_AND_PROPS/* Everything for all levels */
+};
+
+/* Keeps track of the state at parent nodes */
+struct fdt_subnode_stack {
+   int offset; /* Offset of node */
+   enum want_t want;   /* The 'want' value here */
+   int included;   /* 1 if we included this node, 0 if not */
+};
+
+struct fdt_region_ptrs {
+   int depth;  /* Current tree depth */
+   int done;   /* What we have completed scanning */
+   enum want_t want;   /* What we are currently including */
+   char *end;  /* Pointer to end of full node path */
+   int nextoffset; /* Next node offset to check */
+};
+
+/* The state of our finding algortihm */
+struct fdt_region_state {
+   struct fdt_subnode_stack stack[FDT_MAX_DEPTH];  /* node stack */
+   struct fdt_region *region;  /* Contains list of regions found */
+   int count;  /* Numnber of regions found */
+   const void *fdt;/* FDT blob */
+   int max_regions;/* Maximum regions to find */
+   int can_merge;  /* 1 if we can merge with previous region */
+   int start;  /* Start position of current region */
+   struct fdt_region_ptrs ptrs;/* Pointers for what we are up to */
+};
+
 /**
  * fdt_find_regions() - find regions in device tree
  *
@@ -1727,4 +1803,165 @@ int fdt_find_regions(const void *fdt, char * const 
inc[], int inc_count,
 struct fdt_region region[], int max_regions,
 char *path, int path_len, int add_string_tab);
 
+/**
+ * fdt_first_region() - find regions in device tree
+ *
+ * Given a nodes and properties to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The use for this function is twofold. Firstly it provides a convenient
+ * way of performing a structure-aware grep of the tree. For 

[U-Boot] [PATCH v2 10/18] fdt: Add fdtgrep tool

2015-05-12 Thread Simon Glass
This tool allows us to extract subsets of a device tree file. It is used by
the SPL vuild, which needs to cut down the device tree size for use in
limited memory.

This tool was originally written for libfdt but it has not been accepted
upstream, so for now, include it in U-Boot. Several utilfdt library
functions been included inline here.

If fdtgrep is eventually accepted in libfdt then we can bring that version
of libfdt in here, and drop fdtgrep (requiring that fdtgrep is provided by
the user).

If it is not accepted then another approach would be to write a special
tool for chopping down device tree files for SPL. While it would use the
same libfdt support, it would be less code than fdtgrep.c because it would
not have general-purpose functions.

Another approach (which was used with v1 of this series) is to sprinkler all
the device tree files with #ifdef. I don't like that idea.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Add new patch with fdtgrep tool

 tools/Makefile  |6 +-
 tools/fdtgrep.c | 1234 +++
 2 files changed, 1239 insertions(+), 1 deletion(-)
 create mode 100644 tools/fdtgrep.c

diff --git a/tools/Makefile b/tools/Makefile
index 4bbb153..003bfc6 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -58,7 +58,8 @@ hostprogs-$(CONFIG_FIT_SIGNATURE) += fit_info fit_check_sign
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 # Flattened device tree objects
 LIBFDT_OBJS := $(addprefix lib/libfdt/, \
-   fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_wip.o)
+   fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_wip.o \
+   fdt_region.o)
 RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
rsa-sign.o rsa-verify.o rsa-checksum.o \
rsa-mod-exp.o)
@@ -154,6 +155,9 @@ hostprogs-$(CONFIG_ARMADA_XP) += kwboot
 hostprogs-y += proftool
 hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela
 
+hostprogs-y += fdtgrep
+fdtgrep-objs += $(LIBFDT_OBJS) fdtgrep.o
+
 # We build some files with extra pedantic flags to try to minimize things
 # that won't build on some weird host compiler -- though there are lots of
 # exceptions for files that aren't complaint.
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
new file mode 100644
index 000..caaf600
--- /dev/null
+++ b/tools/fdtgrep.c
@@ -0,0 +1,1234 @@
+/*
+ * Copyright (c) 2013, Google Inc.
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Perform a grep of an FDT either displaying the source subset or producing
+ * a new .dtb subset which can be used as required.
+ */
+
+#include assert.h
+#include ctype.h
+#include getopt.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+#include unistd.h
+
+#include ../include/libfdt.h
+#include libfdt_internal.h
+
+/* Define DEBUG to get some debugging output on stderr */
+#ifdef DEBUG
+#define debug(a, b...) fprintf(stderr, a, ## b)
+#else
+#define debug(a, b...)
+#endif
+
+/* A linked list of values we are grepping for */
+struct value_node {
+   int type;   /* Types this value matches (FDT_IS... mask) */
+   int include;/* 1 to include matches, 0 to exclude */
+   const char *string; /* String to match */
+   struct value_node *next;/* Pointer to next node, or NULL */
+};
+
+/* Output formats we support */
+enum output_t {
+   OUT_DTS,/* Device tree source */
+   OUT_DTB,/* Valid device tree binary */
+   OUT_BIN,/* Fragment of .dtb, for hashing */
+};
+
+/* Holds information which controls our output and options */
+struct display_info {
+   enum output_t output;   /* Output format */
+   int add_aliases;/* Add aliases node to output */
+   int all;/* Display all properties/nodes */
+   int colour; /* Display output in ANSI colour */
+   int region_list;/* Output a region list */
+   int flags;  /* Flags (FDT_REG_...) */
+   int list_strings;   /* List strings in string table */
+   int show_offset;/* Show offset */
+   int show_addr;  /* Show address */
+   int header; /* Output an FDT header */
+   int diff;   /* Show +/- diff markers */
+   int include_root;   /* Include the root node and all properties */
+   int remove_strings; /* Remove unused strings */
+   int show_dts_version;   /* Put '/dts-v1/;' on the first line */
+   int types_inc;  /* Mask of types that we include (FDT_IS...) */
+   int types_exc;  /* Mask of types that we exclude (FDT_IS...) */
+   int invert; /* Invert polarity of match */
+   struct value_node *value_head;  /* List of values to match */
+   const char *output_fname;   /* Output filename 

Re: [U-Boot] U-Boot 2015.04 failing to build with GCC 5.1

2015-05-12 Thread Peter Robinson
Hi,

On Tue, May 12, 2015 at 10:00 PM, Otavio Salvador
ota...@ossystems.com.br wrote:
 Hello,

 We are working at enabling GCC 5.1 at the Yocto Project and we found a
 build error:

On Fedora we've been building with gcc5 for some time, Hans added
support for it in the following commit

http://git.denx.de/?p=u-boot.git;a=commit;h=478b02f1a7043b673565075ea5016376f3293b23

Peter
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Re: [U-Boot] [PATCH] serial: stm32: Automatically generate CR when LF is observed

2015-05-12 Thread Kamil Lulko
Strange, this was already posted by Kunhua Huang - then reverted in
commit 698a12bef9e782dcd99c555a739c16eec8669f14. Anyway, yes this
carriage return should be added there. I simply forgot it since I had
implicit CR for each LF turned on in my terminal. Never thought this
would cause so much havoc for users ;)

/Kamil

2015-05-12 21:25 GMT+02:00 Daniel Thompson daniel.thomp...@linaro.org:
 Currently the u-boot output looks rather odd when running the minicom
 terminal emulator in its default mode (just a string of random looking
 text down the right hand side of the screen).

 This is caused by a combination of minicom not automatically wrapping
 lines and the stm32 serial driver never sending a carriage return.

 Issue is trivially solved by automatically generating a CR whenever a LF
 is transmitted, Several other serial drivers implement this behaviour.

 Signed-off-by: Daniel Thompson daniel.thomp...@linaro.org
 Cc: Kamil Lulko re...@wp.pl
 ---
  drivers/serial/serial_stm32.c | 4 
  1 file changed, 4 insertions(+)

 diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
 index 3c80096..8c613db 100644
 --- a/drivers/serial/serial_stm32.c
 +++ b/drivers/serial/serial_stm32.c
 @@ -81,6 +81,10 @@ static int stm32_serial_getc(void)
  static void stm32_serial_putc(const char c)
  {
 struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
 +
 +   if (c == '\n')
 +   stm32_serial_putc('\r');
 +
 while ((readl(usart-sr)  USART_SR_FLAG_TXE) == 0)
 ;
 writel(c, usart-dr);
 --
 2.1.0


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Re: [U-Boot] [RFC] FIT: use default configuration, if given configuration is not found

2015-05-12 Thread Yegor Yefremov
Hi Joe,

On Tue, May 12, 2015 at 10:18 PM, Joe Hershberger
joe.hershber...@gmail.com wrote:
 Hi Yegor,

 On Tue, May 12, 2015 at 1:43 AM, Yegor Yefremov
 yegorsli...@googlemail.com wrote:
 Hi Joe,

 On Mon, May 4, 2015 at 8:16 PM, Joe Hershberger
 joe.hershber...@gmail.com wrote:
 Hi Yegor,

 On Mon, May 4, 2015 at 2:53 AM,  yegorsli...@googlemail.com wrote:
 From: Yegor Yefremov yegorsli...@googlemail.com

 Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
 ---
  common/image-fit.c |4 
  1 files changed, 4 insertions(+), 0 deletions(-)

 diff --git a/common/image-fit.c b/common/image-fit.c
 index c61be65..b892d06 100644
 --- a/common/image-fit.c
 +++ b/common/image-fit.c
 @@ -1547,6 +1547,10 @@ int fit_image_load(bootm_headers_t *images, ulong 
 addr,
 } else {
 cfg_noffset = fit_conf_get_node(fit,
 fit_uname_config);
 +
 +   if (cfg_noffset  0) {
 +   cfg_noffset = fit_conf_get_node(fit, NULL);
 +   }

 It seems if you ask for a specific configuration that is not
 available, you should get an error.

 You can accomplish similar behavior you are implementing here by using
 the shell to try the default if the specified one returns an error.

 Thanks. It is working:

 bootm ${loadaddr}#conf${board_name}; if test $? -ne 0; then echo
 Using default FIT configuration; bootm ${loadaddr}; fi;

 Great!

 Now I have another question, how can I split long line in uEnv.txt? Is
 it possible at all?

 I assume you are loading it and eventually calling env import on the memory?

 Have you tried passing the -t switch to the env import command?

 Or are you talking about a single variable value that is a long line?

Yes, I'm talking about a single variable with very long value.

Yegor
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Re: [U-Boot] [RFC] FIT: use default configuration, if given configuration is not found

2015-05-12 Thread Joe Hershberger
Hi Yegor,

On Tue, May 12, 2015 at 3:41 PM, Yegor Yefremov
yegorsli...@googlemail.com wrote:
 Hi Joe,

 On Tue, May 12, 2015 at 10:18 PM, Joe Hershberger
 joe.hershber...@gmail.com wrote:
 Hi Yegor,

 On Tue, May 12, 2015 at 1:43 AM, Yegor Yefremov
 yegorsli...@googlemail.com wrote:
 Hi Joe,

 On Mon, May 4, 2015 at 8:16 PM, Joe Hershberger
 joe.hershber...@gmail.com wrote:
 Hi Yegor,

 On Mon, May 4, 2015 at 2:53 AM,  yegorsli...@googlemail.com wrote:
 From: Yegor Yefremov yegorsli...@googlemail.com

 Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
 ---
  common/image-fit.c |4 
  1 files changed, 4 insertions(+), 0 deletions(-)

 diff --git a/common/image-fit.c b/common/image-fit.c
 index c61be65..b892d06 100644
 --- a/common/image-fit.c
 +++ b/common/image-fit.c
 @@ -1547,6 +1547,10 @@ int fit_image_load(bootm_headers_t *images, ulong 
 addr,
 } else {
 cfg_noffset = fit_conf_get_node(fit,
 fit_uname_config);
 +
 +   if (cfg_noffset  0) {
 +   cfg_noffset = fit_conf_get_node(fit, 
 NULL);
 +   }

 It seems if you ask for a specific configuration that is not
 available, you should get an error.

 You can accomplish similar behavior you are implementing here by using
 the shell to try the default if the specified one returns an error.

 Thanks. It is working:

 bootm ${loadaddr}#conf${board_name}; if test $? -ne 0; then echo
 Using default FIT configuration; bootm ${loadaddr}; fi;

 Great!

 Now I have another question, how can I split long line in uEnv.txt? Is
 it possible at all?

 I assume you are loading it and eventually calling env import on the memory?

 Have you tried passing the -t switch to the env import command?

 Or are you talking about a single variable value that is a long line?

 Yes, I'm talking about a single variable with very long value.

I think we would need to patch the env import to handle escaping
newlines to do something like this. Then you could end a line with \
and it would still be part of the value of the previous variable.

I'm not sure of a way as it works now.

-Joe
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[U-Boot] [PATCH v2 18/18] rockchip: Add basic support for jerry

2015-05-12 Thread Simon Glass
This builds and displays an SPL message, but does not function beyond that.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Tidy up license headers and remove SPL #ifdefs

 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/cros-ec-sbs.dtsi  |  16 +
 arch/arm/dts/rk3288-jerry.dts  | 203 
 arch/arm/dts/rk3288-veyron-chromebook.dtsi | 200 +++
 arch/arm/dts/rk3288-veyron.dtsi| 808 +
 arch/arm/mach-rockchip/rk3288/Kconfig  |  10 +
 board/google/chromebook_jerry/Kconfig  |  15 +
 board/google/chromebook_jerry/MAINTAINERS  |   6 +
 board/google/chromebook_jerry/Makefile |   7 +
 board/google/chromebook_jerry/jerry.c  |   7 +
 board/google/common/Makefile   |   2 +-
 configs/chromebook_jerry_defconfig |  10 +
 include/configs/chromebook_jerry.h |  50 ++
 13 files changed, 1335 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/cros-ec-sbs.dtsi
 create mode 100644 arch/arm/dts/rk3288-jerry.dts
 create mode 100644 arch/arm/dts/rk3288-veyron-chromebook.dtsi
 create mode 100644 arch/arm/dts/rk3288-veyron.dtsi
 create mode 100644 board/google/chromebook_jerry/Kconfig
 create mode 100644 board/google/chromebook_jerry/MAINTAINERS
 create mode 100644 board/google/chromebook_jerry/Makefile
 create mode 100644 board/google/chromebook_jerry/jerry.c
 create mode 100644 configs/chromebook_jerry_defconfig
 create mode 100644 include/configs/chromebook_jerry.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 141fb2b..be87f24 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -15,7 +15,8 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5800-peach-pi.dtb \
exynos5422-odroidxu3.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
-   rk3288-firefly.dtb
+   rk3288-firefly.dtb \
+   rk3288-jerry.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/cros-ec-sbs.dtsi b/arch/arm/dts/cros-ec-sbs.dtsi
new file mode 100644
index 000..3f35d20
--- /dev/null
+++ b/arch/arm/dts/cros-ec-sbs.dtsi
@@ -0,0 +1,16 @@
+/*
+ * Smart battery dts fragment for devices that use cros-ec-sbs
+ *
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0
+*/
+
+i2c_tunnel {
+   battery: sbs-battery@b {
+   compatible = sbs,sbs-battery;
+   reg = 0xb;
+   sbs,i2c-retry-count = 2;
+   sbs,poll-retry-count = 1;
+   };
+};
diff --git a/arch/arm/dts/rk3288-jerry.dts b/arch/arm/dts/rk3288-jerry.dts
new file mode 100644
index 000..da37ea8
--- /dev/null
+++ b/arch/arm/dts/rk3288-jerry.dts
@@ -0,0 +1,203 @@
+/*
+ * Google Veyron Jerry Rev 3+ board device tree source
+ *
+ * Copyright 2014 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+/dts-v1/;
+#include rk3288-veyron-chromebook.dtsi
+#include cros-ec-sbs.dtsi
+
+/ {
+   model = Google Jerry;
+   compatible = google,veyron-jerry-rev7, google,veyron-jerry-rev6,
+google,veyron-jerry-rev5, google,veyron-jerry-rev4,
+google,veyron-jerry-rev3, google,veyron-jerry,
+google,veyron, rockchip,rk3288;
+
+chosen {
+stdout-path = uart2;
+};
+
+   panel_regulator: panel-regualtor {
+   compatible = regulator-fixed;
+   enable-active-high;
+   gpio = gpio7 14 GPIO_ACTIVE_HIGH;
+   pinctrl-names = default;
+   pinctrl-0 = lcd_enable_h;
+   regulator-name = panel_regulator;
+   vin-supply = vcc33_sys;
+   };
+
+   vcc18_lcd: vcc18-lcd {
+   compatible = regulator-fixed;
+   enable-active-high;
+   gpio = gpio2 13 GPIO_ACTIVE_HIGH;
+   pinctrl-names = default;
+   pinctrl-0 = avdd_1v8_disp_en;
+   regulator-name = vcc18_lcd;
+   regulator-always-on;
+   regulator-boot-on;
+   vin-supply = vcc18_wl;
+   };
+
+   backlight_regulator: backlight-regulator {
+   compatible = regulator-fixed;
+   enable-active-high;
+   gpio = gpio2 12 GPIO_ACTIVE_HIGH;
+   pinctrl-names = default;
+   pinctrl-0 = bl_pwr_en;
+   regulator-name = backlight_regulator;
+   vin-supply = vcc33_sys;
+   startup-delay-us = 15000;
+   };
+};
+
+gpio_keys {
+   power {
+   gpios = gpio0 5 GPIO_ACTIVE_LOW;
+   };
+};
+
+backlight {
+   power-supply = backlight_regulator;
+};
+
+panel {
+   power-supply= panel_regulator;
+};
+
+rk808 {
+   pinctrl-names = default;
+   pinctrl-0 = pmic_int_l dvs_1 dvs_2;
+   dvs-gpios = gpio7 12 GPIO_ACTIVE_HIGH,
+   gpio7 15 GPIO_ACTIVE_HIGH;
+
+   regulators {
+

[U-Boot] [PATCH v2 15/18] rockchip: Add basic support for firefly-rk3288

2015-05-12 Thread Simon Glass
The Firefly RK3288 is a suitable target board for initial mainline Rockchip
support. It includes a good set of peripherals, a recent SoC and it is
readily available.

This adds only some basic files required to allow the baord to display a
serial message in SPL and hang.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Tidy up license headers and remove SPL #ifdefs
- Drop use of CONFIG_USE_PRIVATE_LIBGCC=y

 arch/arm/dts/Makefile |   2 +
 arch/arm/dts/rk3288-firefly.dts   |  44 +++
 arch/arm/dts/rk3288-firefly.dtsi  | 454 ++
 arch/arm/mach-rockchip/rk3288/Kconfig |  10 +
 board/firefly/firefly-rk3288/Kconfig  |  15 +
 board/firefly/firefly-rk3288/MAINTAINERS  |   6 +
 board/firefly/firefly-rk3288/Makefile |   7 +
 board/firefly/firefly-rk3288/firefly-rk3288.c |   7 +
 configs/firefly-rk3288_defconfig  |  10 +
 include/configs/firefly-rk3288.h  |  50 +++
 10 files changed, 605 insertions(+)
 create mode 100644 arch/arm/dts/rk3288-firefly.dts
 create mode 100644 arch/arm/dts/rk3288-firefly.dtsi
 create mode 100644 board/firefly/firefly-rk3288/Kconfig
 create mode 100644 board/firefly/firefly-rk3288/MAINTAINERS
 create mode 100644 board/firefly/firefly-rk3288/Makefile
 create mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c
 create mode 100644 configs/firefly-rk3288_defconfig
 create mode 100644 include/configs/firefly-rk3288.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 13efa7a..141fb2b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -14,6 +14,8 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5420-peach-pit.dtb \
exynos5800-peach-pi.dtb \
exynos5422-odroidxu3.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += \
+   rk3288-firefly.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts
new file mode 100644
index 000..158b33f
--- /dev/null
+++ b/arch/arm/dts/rk3288-firefly.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki nao...@gmail.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include rk3288-firefly.dtsi
+
+/ {
+   model = Firefly-RK3288;
+   compatible = firefly,firefly-rk3288, rockchip,rk3288;
+
+   chosen {
+   stdout-path = uart2;
+   };
+};
+
+ir {
+   gpios = gpio7 0 GPIO_ACTIVE_LOW;
+};
+
+pinctrl {
+   act8846 {
+   pmic_vsel: pmic-vsel {
+   rockchip,pins = 7 14 RK_FUNC_GPIO pcfg_output_low;
+   };
+   };
+
+   ir {
+   ir_int: ir-int {
+   rockchip,pins = 7 0 RK_FUNC_GPIO pcfg_pull_up;
+   };
+   };
+};
+
+pwm1 {
+   status = okay;
+};
+
+uart2 {
+   u-boot,dm-pre-reloc;
+   reg-shift = 2;
+};
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
new file mode 100644
index 000..ce68f16
--- /dev/null
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -0,0 +1,454 @@
+/*
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki nao...@gmail.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+#include rk3288.dtsi
+
+/ {
+   memory {
+   reg = 0 0x8000;
+   };
+
+   ext_gmac: external-gmac-clock {
+   compatible = fixed-clock;
+   #clock-cells = 0;
+   clock-frequency = 12500;
+   clock-output-names = ext_gmac;
+   };
+
+   ir: ir-receiver {
+   compatible = gpio-ir-receiver;
+   pinctrl-names = default;
+   pinctrl-0 = ir_int;
+   };
+
+   keys: gpio-keys {
+   compatible = gpio-keys;
+   #address-cells = 1;
+   #size-cells = 0;
+
+   button@0 {
+   gpio-key,wakeup = 1;
+   gpios = gpio0 5 GPIO_ACTIVE_LOW;
+   label = GPIO Power;
+   linux,code = 116;
+   pinctrl-names = default;
+   pinctrl-0 = pwr_key;
+   };
+   };
+
+   leds {
+   compatible = gpio-leds;
+
+   work {
+   gpios = gpio8 1 GPIO_ACTIVE_LOW;
+   label = firefly:blue:user;
+   linux,default-trigger = rc-feedback;
+   pinctrl-names = default;
+   pinctrl-0 = work_led;
+   };
+
+   power {
+   gpios = gpio8 2 GPIO_ACTIVE_LOW;
+   label = firefly:green:power;
+   linux,default-trigger = default-on;
+   pinctrl-names = default;
+   pinctrl-0 = power_led;
+   };
+   };
+
+   vcc_sys: vsys-regulator {
+

[U-Boot] [PATCH v2 16/18] rockchip: Add the beginnings of an image tool

2015-05-12 Thread Simon Glass
Rockchip SoCs require certain formats for code that they execute, The
simplest format is a 4-byte header at the start of a binary file. Add
support for this intiially.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/image.c  |  1 +
 include/image.h |  3 ++-
 tools/Makefile  |  1 +
 tools/rkimage.c | 63 +
 4 files changed, 67 insertions(+), 1 deletion(-)
 create mode 100644 tools/rkimage.c

diff --git a/common/image.c b/common/image.c
index d18e02d..096c662 100644
--- a/common/image.c
+++ b/common/image.c
@@ -151,6 +151,7 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_ATMELIMAGE, atmelimage, ATMEL ROM-Boot Image,},
{   IH_TYPE_X86_SETUP,  x86_setup,  x86 setup.bin,},
{   IH_TYPE_LPC32XXIMAGE, lpc32xximage,  LPC32XX Boot Image, },
+   {   IH_TYPE_ROCKCHIP,   rockchip,   Rockchip Boot Image },
{   -1, ,   ,   },
 };
 
diff --git a/include/image.h b/include/image.h
index a4a8ff6..4dc24bc 100644
--- a/include/image.h
+++ b/include/image.h
@@ -244,8 +244,9 @@ struct lmb;
 #define IH_TYPE_SOCFPGAIMAGE   19  /* Altera SOCFPGA Preloader */
 #define IH_TYPE_X86_SETUP  20  /* x86 setup.bin Image  */
 #define IH_TYPE_LPC32XXIMAGE   21  /* x86 setup.bin Image  */
+#define IH_TYPE_ROCKCHIP   22  /* Rockchip Boot Image  */
 
-#define IH_TYPE_COUNT  22  /* Number of image types */
+#define IH_TYPE_COUNT  23  /* Number of image types */
 
 /*
  * Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 003bfc6..d76d707 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -90,6 +90,7 @@ dumpimage-mkimage-objs := aisimage.o \
os_support.o \
pblimage.o \
pbl_crc32.o \
+   rkimage.o \
socfpgaimage.o \
lib/sha1.o \
lib/sha256.o \
diff --git a/tools/rkimage.c b/tools/rkimage.c
new file mode 100644
index 000..433b5eb
--- /dev/null
+++ b/tools/rkimage.c
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include imagetool.h
+#include image.h
+
+static uint32_t header;
+
+static int rkimage_check_params(struct image_tool_params *params)
+{
+   return 0;
+}
+
+static int rkimage_verify_header(unsigned char *buf, int size,
+struct image_tool_params *params)
+{
+   return 0;
+}
+
+static void rkimage_print_header(const void *buf)
+{
+}
+
+static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd,
+  struct image_tool_params *params)
+{
+   memcpy(buf, RK32, 4);
+}
+
+static int rkimage_extract_subimage(void *buf, struct image_tool_params 
*params)
+{
+   return 0;
+}
+
+static int rkimage_check_image_type(uint8_t type)
+{
+   if (type == IH_TYPE_ROCKCHIP)
+   return EXIT_SUCCESS;
+   else
+   return EXIT_FAILURE;
+}
+
+/*
+ * rk_image parameters
+ */
+U_BOOT_IMAGE_TYPE(
+   rkimage,
+   Rockchip Boot Image support,
+   4,
+   header,
+   rkimage_check_params,
+   rkimage_verify_header,
+   rkimage_print_header,
+   rkimage_set_header,
+   rkimage_extract_subimage,
+   rkimage_check_image_type,
+   NULL,
+   NULL
+);
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 08/18] fdt: Add a function to remove unused strings from a device tree

2015-05-12 Thread Simon Glass
Property names are stored in a string table. When a node property is
removed, the string table is not updated since other nodes may have a
property with the same name.

Thus it is possible for the string table to build up a number of unused
strings. Add a function to remove these. This works by building a new device
tree from the old one, adding strings one by one as needed.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Add new patch to remove unused strings from a device tree

 include/libfdt.h| 17 +
 lib/libfdt/fdt_rw.c | 32 
 2 files changed, 49 insertions(+)

diff --git a/include/libfdt.h b/include/libfdt.h
index f3cbb63..60e612a 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -1646,6 +1646,23 @@ int fdt_del_node(void *fdt, int nodeoffset);
 
 const char *fdt_strerror(int errval);
 
+/**
+ * fdt_remove_unused_strings() - Remove any unused strings from an FDT
+ *
+ * This creates a new device tree in @new with unused strings removed. The
+ * called can then use fdt_pack() to minimise the space consumed.
+ *
+ * @old:   Old device tree blog
+ * @new:   Place to put new device tree blob, which must be as large as
+ * @old
+ * @return
+ * 0, on success
+ * -FDT_ERR_BADOFFSET, corrupt device tree
+ * -FDT_ERR_NOSPACE, out of space, which should not happen unless there
+ * is something very wrong with the device tree input
+ */
+int fdt_remove_unused_strings(const void *old, void *new);
+
 struct fdt_region {
int offset;
int size;
diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index bec8b8a..1a358a8 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -449,3 +449,35 @@ int fdt_pack(void *fdt)
 
return 0;
 }
+
+int fdt_remove_unused_strings(const void *old, void *new)
+{
+   const struct fdt_property *old_prop;
+   struct fdt_property *new_prop;
+   int size = fdt_totalsize(old);
+   int next_offset, offset;
+   const char *str;
+   int ret;
+   int tag = FDT_PROP;
+
+   /* Make a copy and remove the strings */
+   memcpy(new, old, size);
+   fdt_set_size_dt_strings(new, 0);
+
+   /* Add every property name back into the new string table */
+   for (offset = 0; tag != FDT_END; offset = next_offset) {
+   tag = fdt_next_tag(old, offset, next_offset);
+   if (tag != FDT_PROP)
+   continue;
+   old_prop = fdt_get_property_by_offset(old, offset, NULL);
+   new_prop = (struct fdt_property *)(unsigned long)
+   fdt_get_property_by_offset(new, offset, NULL);
+   str = fdt_string(old, fdt32_to_cpu(old_prop-nameoff));
+   ret = _fdt_find_add_string(new, str);
+   if (ret  0)
+   return ret;
+   new_prop-nameoff = cpu_to_fdt32(ret);
+   }
+
+   return 0;
+}
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 12/18] dm: rockchip: Add serial support

2015-05-12 Thread Simon Glass
Add support for the Rockchip serial device using the ns16550 driver.
This uses driver model and device tree for both SPL and U-Boot proper.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/serial/Kconfig   |  9 +
 drivers/serial/Makefile  |  1 +
 drivers/serial/serial_rockchip.c | 41 
 3 files changed, 51 insertions(+)
 create mode 100644 drivers/serial/serial_rockchip.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 54e6f26..2e87199 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -76,6 +76,15 @@ config DEBUG_UART_SHIFT
  value. Use this value to specify the shift to use, where 0=byte
  registers, 2=32-bit word registers, etc.
 
+config ROCKCHIP_SERIAL
+   bool Rockchip on-chip UART support
+   depends on ARCH_UNIPHIER  DM_SERIAL
+   help
+ Select this to enable a debug UART for Rockchip devices. This uses
+ the ns16550 driver. You will need to #define CONFIG_SYS_NS16550 in
+ your board config header. The clock input is automatically set to
+ use the oscillator (24MHz).
+
 config UNIPHIER_SERIAL
bool UniPhier on-chip UART support
depends on ARCH_UNIPHIER  DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index d183eed..b926b49 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o
 obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
 obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o
 obj-$(CONFIG_MXS_AUART) += mxs_auart.o
+obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
new file mode 100644
index 000..319e350
--- /dev/null
+++ b/drivers/serial/serial_rockchip.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm.h
+#include ns16550.h
+#include serial.h
+#include asm/arch/clock.h
+
+static const struct udevice_id rockchip_serial_ids[] = {
+   { .compatible = rockchip,rk3288-uart },
+   { }
+};
+
+static int rockchip_serial_ofdata_to_platdata(struct udevice *dev)
+{
+   struct ns16550_platdata *plat = dev_get_platdata(dev);
+   int ret;
+
+   ret = ns16550_serial_ofdata_to_platdata(dev);
+   if (ret)
+   return ret;
+   plat-clock = OSC_HZ;
+
+   return 0;
+}
+
+U_BOOT_DRIVER(serial_ns16550) = {
+   .name   = serial_rockchip,
+   .id = UCLASS_SERIAL,
+   .of_match = rockchip_serial_ids,
+   .ofdata_to_platdata = rockchip_serial_ofdata_to_platdata,
+   .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
+   .priv_auto_alloc_size = sizeof(struct NS16550),
+   .probe = ns16550_serial_probe,
+   .ops= ns16550_serial_ops,
+   .flags  = DM_FLAG_PRE_RELOC,
+};
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 14/18] rockchip: Add base SoC files

2015-05-12 Thread Simon Glass
Add some basic files required to allow the SoC to start up. This is a
minimal set, enough only to display a serial message in SPL and hang.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Tidy up license headers

 arch/arm/Kconfig   |  16 +++
 arch/arm/Makefile  |   1 +
 arch/arm/include/asm/arch-rockchip/clock.h |  12 ++
 arch/arm/include/asm/arch-rockchip/gpio.h  |   5 +
 arch/arm/include/asm/arch-rockchip/grf.h   | 181 +
 arch/arm/mach-rockchip/Kconfig |  23 
 arch/arm/mach-rockchip/Makefile|  12 ++
 arch/arm/mach-rockchip/board-spl.c |  54 +
 arch/arm/mach-rockchip/board.c |  17 +++
 arch/arm/mach-rockchip/common.c|  11 ++
 arch/arm/mach-rockchip/rk3288/Kconfig  |   6 +
 11 files changed, 338 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rockchip/clock.h
 create mode 100644 arch/arm/include/asm/arch-rockchip/gpio.h
 create mode 100644 arch/arm/include/asm/arch-rockchip/grf.h
 create mode 100644 arch/arm/mach-rockchip/Kconfig
 create mode 100644 arch/arm/mach-rockchip/Makefile
 create mode 100644 arch/arm/mach-rockchip/board-spl.c
 create mode 100644 arch/arm/mach-rockchip/board.c
 create mode 100644 arch/arm/mach-rockchip/common.c
 create mode 100644 arch/arm/mach-rockchip/rk3288/Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c85c728..12320c8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -799,6 +799,20 @@ config TARGET_STM32F429_DISCOVERY
bool Support STM32F429 Discovery
select CPU_V7M
 
+config ARCH_ROCKCHIP
+   bool Support Rockchip SoCs
+   select SUPPORT_SPL
+   select SPL
+   select OF_CONTROL
+   select CPU_V7
+   select DM
+   select SPL_DM
+   select DM_SERIAL
+   select DM_SPI
+   select  DM_SPI_FLASH
+   select DM_I2C
+   select DM_GPIO
+
 endchoice
 
 source arch/arm/mach-at91/Kconfig
@@ -833,6 +847,8 @@ source arch/arm/mach-orion5x/Kconfig
 
 source arch/arm/cpu/armv7/rmobile/Kconfig
 
+source arch/arm/mach-rockchip/Kconfig
+
 source arch/arm/cpu/armv7/s5pc1xx/Kconfig
 
 source arch/arm/mach-socfpga/Kconfig
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6f30098..2a91c04 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -54,6 +54,7 @@ machine-$(CONFIG_ARCH_NOMADIK)+= nomadik
 # TODO: rename CONFIG_ORION5X - CONFIG_ARCH_ORION5X
 machine-$(CONFIG_ORION5X)  += orion5x
 machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
+machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip
 machine-$(CONFIG_TEGRA)+= tegra
 machine-$(CONFIG_ARCH_UNIPHIER)+= uniphier
 machine-$(CONFIG_ARCH_VERSATILE)   += versatile
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h 
b/arch/arm/include/asm/arch-rockchip/clock.h
new file mode 100644
index 000..9314585
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#ifndef _ASM_ARCH_CLOCK_H
+#define _ASM_ARCH_CLOCK_H
+
+#define OSC_HZ (24 * 1000 * 1000)
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/gpio.h 
b/arch/arm/include/asm/arch-rockchip/gpio.h
new file mode 100644
index 000..607949c
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/gpio.h
@@ -0,0 +1,5 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
diff --git a/arch/arm/include/asm/arch-rockchip/grf.h 
b/arch/arm/include/asm/arch-rockchip/grf.h
new file mode 100644
index 000..8722a89
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf.h
@@ -0,0 +1,181 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Copyright 2014 Rockchip Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ *
+ * From coreboot file of the same name
+ */
+
+#ifndef _ASM_ARCH_GRF_H
+#define _ASM_ARCH_GRF_H
+
+struct rk3288_grf_gpio_lh {
+   u32 l;
+   u32 h;
+};
+
+struct rk3288_grf_regs {
+   u32 reserved[3];
+   union {
+   u32 gpio1d_iomux;
+   u32 iomux_lcdc;
+   };
+   u32 gpio2a_iomux;
+   u32 gpio2b_iomux;
+   union {
+   u32 gpio2c_iomux;
+   u32 iomux_i2c3;
+   };
+   u32 reserved2;
+   union {
+   u32 gpio3a_iomux;
+   u32 iomux_emmcdata;
+   };
+   union {
+   u32 gpio3b_iomux;
+   u32 iomux_emmcpwren;
+   };
+   union {
+   u32 gpio3c_iomux;
+   u32 iomux_emmccmd;
+   };
+   u32 gpio3dl_iomux;
+   u32 gpio3dh_iomux;
+   u32 gpio4al_iomux;
+   u32 gpio4ah_iomux;
+   u32 gpio4bl_iomux;
+   u32 reserved3;
+   u32 gpio4c_iomux;
+   u32 gpio4d_iomux;
+   u32 reserved4;
+   union {
+   u32 gpio5b_iomux;
+   u32 iomux_spi0;
+   };
+   

Re: [U-Boot] U-Boot 2015.04 failing to build with GCC 5.1

2015-05-12 Thread Otavio Salvador
On Tue, May 12, 2015 at 6:13 PM, Peter Robinson pbrobin...@gmail.com wrote:
 On Tue, May 12, 2015 at 10:00 PM, Otavio Salvador
 ota...@ossystems.com.br wrote:
 Hello,

 We are working at enabling GCC 5.1 at the Yocto Project and we found a
 build error:

 On Fedora we've been building with gcc5 for some time, Hans added
 support for it in the following commit

 http://git.denx.de/?p=u-boot.git;a=commit;h=478b02f1a7043b673565075ea5016376f3293b23

May it be related to the out of tree build?

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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Re: [U-Boot] [RFC] FIT: use default configuration, if given configuration is not found

2015-05-12 Thread Joe Hershberger
Hi Yegor,

On Tue, May 12, 2015 at 1:43 AM, Yegor Yefremov
yegorsli...@googlemail.com wrote:
 Hi Joe,

 On Mon, May 4, 2015 at 8:16 PM, Joe Hershberger
 joe.hershber...@gmail.com wrote:
 Hi Yegor,

 On Mon, May 4, 2015 at 2:53 AM,  yegorsli...@googlemail.com wrote:
 From: Yegor Yefremov yegorsli...@googlemail.com

 Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
 ---
  common/image-fit.c |4 
  1 files changed, 4 insertions(+), 0 deletions(-)

 diff --git a/common/image-fit.c b/common/image-fit.c
 index c61be65..b892d06 100644
 --- a/common/image-fit.c
 +++ b/common/image-fit.c
 @@ -1547,6 +1547,10 @@ int fit_image_load(bootm_headers_t *images, ulong 
 addr,
 } else {
 cfg_noffset = fit_conf_get_node(fit,
 fit_uname_config);
 +
 +   if (cfg_noffset  0) {
 +   cfg_noffset = fit_conf_get_node(fit, NULL);
 +   }

 It seems if you ask for a specific configuration that is not
 available, you should get an error.

 You can accomplish similar behavior you are implementing here by using
 the shell to try the default if the specified one returns an error.

 Thanks. It is working:

 bootm ${loadaddr}#conf${board_name}; if test $? -ne 0; then echo
 Using default FIT configuration; bootm ${loadaddr}; fi;

Great!

 Now I have another question, how can I split long line in uEnv.txt? Is
 it possible at all?

I assume you are loading it and eventually calling env import on the memory?

Have you tried passing the -t switch to the env import command?

Or are you talking about a single variable value that is a long line?

-Joe
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[U-Boot] [PATCH v2 07/18] mkimage: Display a better list of available image types

2015-05-12 Thread Simon Glass
Offer to display the available image types in help. Also, rather than
hacking the genimg_get_type_id() function to display a list of types,
do this in the tool. Also, sort the list.

The list of image types is quite long, and hard to discover. Print it out
when we show help information.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 common/image.c  | 58 +++-
 include/image.h | 11 +++
 tools/mkimage.c | 59 ++---
 3 files changed, 95 insertions(+), 33 deletions(-)

diff --git a/common/image.c b/common/image.c
index fdec496..d18e02d 100644
--- a/common/image.c
+++ b/common/image.c
@@ -543,6 +543,15 @@ void genimg_print_time(time_t timestamp)
 }
 #endif
 
+const table_entry_t *get_table_entry(const table_entry_t *table, int id)
+{
+   for (; table-id = 0; ++table) {
+   if (table-id == id)
+   return table;
+   }
+   return NULL;
+}
+
 /**
  * get_table_entry_name - translate entry id to long name
  * @table: pointer to a translation table for entries of a specific type
@@ -559,15 +568,14 @@ void genimg_print_time(time_t timestamp)
  */
 char *get_table_entry_name(const table_entry_t *table, char *msg, int id)
 {
-   for (; table-id = 0; ++table) {
-   if (table-id == id)
+   table = get_table_entry(table, id);
+   if (!table)
+   return msg;
 #if defined(USE_HOSTCC) || !defined(CONFIG_NEEDS_MANUAL_RELOC)
-   return table-lname;
+   return table-lname;
 #else
-   return table-lname + gd-reloc_off;
+   return table-lname + gd-reloc_off;
 #endif
-   }
-   return (msg);
 }
 
 const char *genimg_get_os_name(uint8_t os)
@@ -586,6 +594,20 @@ const char *genimg_get_type_name(uint8_t type)
return (get_table_entry_name(uimage_type, Unknown Image, type));
 }
 
+const char *genimg_get_type_short_name(uint8_t type)
+{
+   const table_entry_t *table;
+
+   table = get_table_entry(uimage_type, type);
+   if (!table)
+   return unknown;
+#if defined(USE_HOSTCC) || !defined(CONFIG_NEEDS_MANUAL_RELOC)
+   return table-sname;
+#else
+   return table-sname + gd-reloc_off;
+#endif
+}
+
 const char *genimg_get_comp_name(uint8_t comp)
 {
return (get_table_entry_name(uimage_comp, Unknown Compression,
@@ -610,34 +632,18 @@ int get_table_entry_id(const table_entry_t *table,
const char *table_name, const char *name)
 {
const table_entry_t *t;
-#ifdef USE_HOSTCC
-   int first = 1;
-
-   for (t = table; t-id = 0; ++t) {
-   if (t-sname  strcasecmp(t-sname, name) == 0)
-   return(t-id);
-   }
 
-   fprintf(stderr, \nInvalid %s Type - valid names are, table_name);
-   for (t = table; t-id = 0; ++t) {
-   if (t-sname == NULL)
-   continue;
-   fprintf(stderr, %c %s, (first) ? ':' : ',', t-sname);
-   first = 0;
-   }
-   fprintf(stderr, \n);
-#else
for (t = table; t-id = 0; ++t) {
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
-   if (t-sname  strcmp(t-sname + gd-reloc_off, name) == 0)
+   if (t-sname  strcasecmp(t-sname + gd-reloc_off, name) == 0)
 #else
-   if (t-sname  strcmp(t-sname, name) == 0)
+   if (t-sname  strcasecmp(t-sname, name) == 0)
 #endif
return (t-id);
}
debug(Invalid %s Type: %s\n, table_name, name);
-#endif /* USE_HOSTCC */
-   return (-1);
+
+   return -1;
 }
 
 int genimg_get_os_id(const char *name)
diff --git a/include/image.h b/include/image.h
index 60b924a..a4a8ff6 100644
--- a/include/image.h
+++ b/include/image.h
@@ -245,6 +245,8 @@ struct lmb;
 #define IH_TYPE_X86_SETUP  20  /* x86 setup.bin Image  */
 #define IH_TYPE_LPC32XXIMAGE   21  /* x86 setup.bin Image  */
 
+#define IH_TYPE_COUNT  22  /* Number of image types */
+
 /*
  * Compression Types
  */
@@ -410,6 +412,15 @@ char *get_table_entry_name(const table_entry_t *table, 
char *msg, int id);
 const char *genimg_get_os_name(uint8_t os);
 const char *genimg_get_arch_name(uint8_t arch);
 const char *genimg_get_type_name(uint8_t type);
+
+/**
+ * genimg_get_type_short_name() - get the short name for an image type
+ *
+ * @param type Image type (IH_TYPE_...)
+ * @return image short name, or unknown if unknown
+ */
+const char *genimg_get_type_short_name(uint8_t type);
+
 const char *genimg_get_comp_name(uint8_t comp);
 int genimg_get_os_id(const char *name);
 int genimg_get_arch_id(const char *name);
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 5ccd951..8808d70 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -26,8 +26,48 @@ struct image_tool_params params = {
.imagename2 = ,
 };
 
-int
-main (int argc, char **argv)
+static int h_compare_image_name(const void 

[U-Boot] [PATCH v2 13/18] rockchip: Bring in RK3288 device tree file includes and bindings

2015-05-12 Thread Simon Glass
Bring in required device tree files from Linux. Since mainline Linux is
somewhat behind, use the files from the Chromium tree. We can re-sync once
further code is acccepted upstream.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Tidy up license headers and remove SPL #ifdefs

 arch/arm/dts/rk3288-thermal.dtsi   |   88 ++
 arch/arm/dts/rk3288.dtsi   | 1458 
 .../clock/rockchip,rk3288-cru.txt  |   61 +
 doc/device-tree-bindings/clock/rockchip.txt|   77 ++
 .../pinctrl/rockchip,pinctrl.txt   |  157 +++
 .../thermal/rockchip-thermal.txt   |   68 +
 include/dt-bindings/clock/rk3288-cru.h |  370 +
 include/dt-bindings/clock/rockchip,rk808.h |   11 +
 include/dt-bindings/pinctrl/rockchip.h |   26 +
 include/dt-bindings/power-domain/rk3288.h  |   11 +
 10 files changed, 2327 insertions(+)
 create mode 100644 arch/arm/dts/rk3288-thermal.dtsi
 create mode 100644 arch/arm/dts/rk3288.dtsi
 create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt
 create mode 100644 doc/device-tree-bindings/clock/rockchip.txt
 create mode 100644 doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt
 create mode 100644 doc/device-tree-bindings/thermal/rockchip-thermal.txt
 create mode 100644 include/dt-bindings/clock/rk3288-cru.h
 create mode 100644 include/dt-bindings/clock/rockchip,rk808.h
 create mode 100644 include/dt-bindings/pinctrl/rockchip.h
 create mode 100644 include/dt-bindings/power-domain/rk3288.h

diff --git a/arch/arm/dts/rk3288-thermal.dtsi b/arch/arm/dts/rk3288-thermal.dtsi
new file mode 100644
index 000..59482c1
--- /dev/null
+++ b/arch/arm/dts/rk3288-thermal.dtsi
@@ -0,0 +1,88 @@
+/*
+ * Device Tree Source for RK3288 SoC thermal
+ *
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include dt-bindings/thermal/thermal.h
+
+reserve_thermal: reserve_thermal {
+   polling-delay-passive = 1000; /* milliseconds */
+   polling-delay = 5000; /* milliseconds */
+
+   /* sensor   ID */
+   thermal-sensors = tsadc   0;
+
+};
+
+cpu_thermal: cpu_thermal {
+   polling-delay-passive = 100; /* milliseconds */
+   polling-delay = 5000; /* milliseconds */
+
+   /* sensor   ID */
+   thermal-sensors = tsadc   1;
+   linux,hwmon;
+
+   trips {
+   cpu_alert0: cpu_alert0 {
+   temperature = 7; /* millicelsius */
+   hysteresis = 2000; /* millicelsius */
+   type = passive;
+   };
+   cpu_alert1: cpu_alert1 {
+   temperature = 75000; /* millicelsius */
+   hysteresis = 2000; /* millicelsius */
+   type = passive;
+   };
+   cpu_crit: cpu_crit {
+   temperature = 10; /* millicelsius */
+   hysteresis = 2000; /* millicelsius */
+   type = critical;
+   };
+   };
+
+   cooling-maps {
+   map0 {
+   trip = cpu_alert0;
+   cooling-device =
+   cpu0 THERMAL_NO_LIMIT 6;
+   };
+   map1 {
+   trip = cpu_alert1;
+   cooling-device =
+   cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT;
+   };
+   };
+};
+
+gpu_thermal: gpu_thermal {
+   polling-delay-passive = 100; /* milliseconds */
+   polling-delay = 5000; /* milliseconds */
+
+   /* sensor   ID */
+   thermal-sensors = tsadc   2;
+   linux,hwmon;
+
+   trips {
+   gpu_alert0: gpu_alert0 {
+   temperature = 8; /* millicelsius */
+   hysteresis = 2000; /* millicelsius */
+   type = passive;
+   };
+   gpu_crit: gpu_crit {
+   temperature = 10; /* millicelsius */
+   hysteresis = 2000; /* millicelsius */
+   type = critical;
+   };
+   };
+
+   cooling-maps {
+   map0 {
+   trip = gpu_alert0;
+   cooling-device =
+   cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT;
+   };
+   };
+};
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
new file mode 100644
index 000..6b5145c
--- /dev/null
+++ b/arch/arm/dts/rk3288.dtsi
@@ -0,0 +1,1458 @@
+/*
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include dt-bindings/gpio/gpio.h
+#include dt-bindings/interrupt-controller/irq.h
+#include dt-bindings/interrupt-controller/arm-gic.h
+#include dt-bindings/pinctrl/rockchip.h
+#include 

[U-Boot] [PATCH v2 06/18] Remove SPL undefine of CONFIG_OF_CONTROL

2015-05-12 Thread Simon Glass
Allow SPL to be built with this option so that we can support device tree
control. Disable the simple bus for now in SPL. It may be needed later.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/core/Makefile  | 2 ++
 include/config_uncmd_spl.h | 2 ++
 scripts/Makefile.uncmd_spl | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/drivers/core/Makefile b/drivers/core/Makefile
index f14695b..a3fec38 100644
--- a/drivers/core/Makefile
+++ b/drivers/core/Makefile
@@ -5,5 +5,7 @@
 #
 
 obj-$(CONFIG_DM)   += device.o lists.o root.o uclass.o util.o
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_OF_CONTROL) += simple-bus.o
+endif
 obj-$(CONFIG_DM_DEVICE_REMOVE) += device-remove.o
diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h
index 38cb0e8..c191f56 100644
--- a/include/config_uncmd_spl.h
+++ b/include/config_uncmd_spl.h
@@ -20,7 +20,9 @@
 #undef CONFIG_CMD_SNTP
 #undef CONFIG_CMD_TFTPPUT
 #undef CONFIG_CMD_TFTPSRV
+#ifdef CONFIG_SPL_DISABLE_OF_CONTROL
 #undef CONFIG_OF_CONTROL
+#endif
 
 #ifndef CONFIG_SPL_DM
 #undef CONFIG_DM_SERIAL
diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl
index 343c3fc..4f05652 100644
--- a/scripts/Makefile.uncmd_spl
+++ b/scripts/Makefile.uncmd_spl
@@ -3,7 +3,9 @@
 # TODO: Invent a better way
 
 ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_DISABLE_OF_CONTROL
 CONFIG_OF_CONTROL=
+endif
 
 ifndef CONFIG_SPL_DM
 CONFIG_DM_SERIAL=
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 01/18] dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model

2015-05-12 Thread Simon Glass
This option is used by some boards, so support it with driver model. This
is really ugly - we should rewrite this driver once all users are moved to
driver model.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Simplify the support for CONFIG_SYS_NS16550_MEM32

 drivers/serial/ns16550.c | 4 
 include/ns16550.h| 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 3d376d7..9b044a3 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -65,6 +65,8 @@ static inline void serial_out_shift(void *addr, int shift, 
int value)
out_le32(addr, value);
 #elif defined(CONFIG_SYS_NS16550_MEM32)  defined(CONFIG_SYS_BIG_ENDIAN)
out_be32(addr, value);
+#elif defined(CONFIG_SYS_NS16550_MEM32)
+   writel(value, addr);
 #elif defined(CONFIG_SYS_BIG_ENDIAN)
writeb(value, addr + (1  shift) - 1);
 #else
@@ -80,6 +82,8 @@ static inline int serial_in_shift(void *addr, int shift)
return in_le32(addr);
 #elif defined(CONFIG_SYS_NS16550_MEM32)  defined(CONFIG_SYS_BIG_ENDIAN)
return in_be32(addr);
+#elif defined(CONFIG_SYS_NS16550_MEM32)
+   return readl(addr);
 #elif defined(CONFIG_SYS_BIG_ENDIAN)
return readb(addr + (1  shift) - 1);
 #else
diff --git a/include/ns16550.h b/include/ns16550.h
index 0607379..4e62067 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -33,7 +33,7 @@
 
 #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0)
 #error Please define NS16550 registers size.
-#elif defined(CONFIG_SYS_NS16550_MEM32)
+#elif defined(CONFIG_SYS_NS16550_MEM32)  !defined(CONFIG_DM_SERIAL)
 #define UART_REG(x) u32 x
 #elif (CONFIG_SYS_NS16550_REG_SIZE  0)
 #define UART_REG(x)   \
-- 
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[U-Boot] [PATCH v2 02/18] fdt: arm: Drop device tree padding

2015-05-12 Thread Simon Glass
The 4KB padding doesn't seem necessary since we don't normally adjust the
control device tree file within U-Boot. Also drop the memory table space.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Also drop the memory table space

 arch/arm/dts/Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 267fd17..13efa7a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -132,7 +132,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \
 
 targets += $(dtb-y)
 
-DTC_FLAGS += -R 4 -p 0x1000
+# Add any required device tree compiler flags here
+DTC_FLAGS +=
 
 PHONY += dtbs
 dtbs: $(addprefix $(obj)/, $(dtb-y))
-- 
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[U-Boot] [PATCH v2 17/18] rockchip: Add a simple README

2015-05-12 Thread Simon Glass
Add a few notes on how to try out the Rockchip support so far.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 doc/README.rockchip | 83 +
 1 file changed, 83 insertions(+)
 create mode 100644 doc/README.rockchip

diff --git a/doc/README.rockchip b/doc/README.rockchip
new file mode 100644
index 000..2f26814
--- /dev/null
+++ b/doc/README.rockchip
@@ -0,0 +1,83 @@
+#
+# Copyright (C) 2015 Google. Inc
+# Written by Simon Glass s...@chromium.org
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+U-Boot on Rockchip
+==
+
+There are several repositories available with versions of U-Boot that support
+many Rockchip devices [1] [2].
+
+The current mainline support is experimental only and is not useful for
+anything. It should provide a base on which to build.
+
+
+Prerequisites
+=
+
+You will need:
+
+   - Firefly RK3288 baord
+   - Power connection to 5V using the supplied micro-USB power cable
+   - Separate USB serial cable attached to your computer and the Firefly
+(connect to the micro-USB connector below the logo)
+   - rkflashtool [3]
+   - openssl (sudo apt-get install openssl)
+   - Serial UART connection [4]
+   - Suitable ARM cross compiler, e.g.:
+sudo apt-get install gcc-4.7-arm-linux-gnueabi
+
+
+Building
+
+
+At present, only Firefly RK3288 is supported. You can use the firefly-rk3288
+configuration for this.
+
+   CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
+
+(or you can use another cross compiler if you prefer)
+
+
+Writing to the board
+
+
+Only USB is supported. For this to work you must get your board into ROM
+boot mode, either by erasing your MMC or (perhaps) holding the recovery
+button when you boot the board. To erase your MMC, you can boot into Linux
+and type (as root) 'dd if=/dev/zero of=/dev/mmcblk0 bs=1M'.
+
+To create a suitable image and write it to the board:
+
+   ./firefly/tools/mkimage -T rockchip -d firefly/spl/u-boot-spl-dtb.bin out
+   cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 |  rkflashtool l
+
+If all goes well you should something like:
+
+   U-Boot SPL 2015.04-rc2-00123-gc5b539a-dirty (Feb 27 2015 - 09:35:31)
+   SPL: Unsupported Boot Device!
+   ### ERROR ### Please RESET the board ###
+
+You will need to reset the board before each time you try. Yes, that's all
+it does so far.
+
+
+Future work
+===
+
+Immediate priorities are:
+
+- Support SPL clock init
+- Support loading U-Boot from MMC
+- Boot U-Boot to a prompt
+
+There are plenty of patches in the links below to help with this work.
+
+
+[1] https://github.com/rkchrome/uboot.git
+[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
+[3] https://github.com/linux-rockchip/rkflashtool.git
+[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
-- 
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[U-Boot] [PATCH v2 05/18] Add a simple version of memalign()

2015-05-12 Thread Simon Glass
This is used when the full malloc() is not available.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Add a new patch for memalign_simple()

 common/malloc_simple.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/common/malloc_simple.c b/common/malloc_simple.c
index d445199..9811ab6 100644
--- a/common/malloc_simple.c
+++ b/common/malloc_simple.c
@@ -26,6 +26,20 @@ void *malloc_simple(size_t bytes)
return ptr;
 }
 
+void *memalign_simple(size_t align, size_t bytes)
+{
+   ulong addr, new_ptr;
+   void *ptr;
+
+   addr = ALIGN(gd-malloc_base + gd-malloc_ptr, bytes);
+   new_ptr = addr + bytes;
+   if (new_ptr  gd-malloc_limit)
+   return NULL;
+   ptr = map_sysmem(addr, bytes);
+   gd-malloc_ptr = ALIGN(new_ptr, sizeof(new_ptr));
+   return ptr;
+}
+
 #ifdef CONFIG_SYS_MALLOC_SIMPLE
 void *calloc(size_t nmemb, size_t elem_size)
 {
-- 
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[U-Boot] [PATCH v2 04/18] dm: serial: Don't support CONFIG_CONS_INDEX with device tree

2015-05-12 Thread Simon Glass
This feature should be deprecated for new boards, and significantly adds
to SPL code size. Drop it. Instead, we can use stdout-path in the /chosen
node.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 drivers/serial/serial-uclass.c | 69 ++
 1 file changed, 37 insertions(+), 32 deletions(-)

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index b8c2f48..5674d5e 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -30,49 +30,54 @@ static const unsigned long baudrate_table[] = 
CONFIG_SYS_BAUDRATE_TABLE;
 static void serial_find_console_or_panic(void)
 {
struct udevice *dev;
-
-#ifdef CONFIG_OF_CONTROL
int node;
 
-   /* Check for a chosen console */
-   node = fdtdec_get_chosen_node(gd-fdt_blob, stdout-path);
-   if (node  0)
-   node = fdt_path_offset(gd-fdt_blob, console);
-   if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, dev)) {
-   gd-cur_serial_dev = dev;
-   return;
-   }
-
-   /*
-* If the console is not marked to be bound before relocation, bind
-* it anyway.
-*/
-   if (node  0 
-   !lists_bind_fdt(gd-dm_root, gd-fdt_blob, node, dev)) {
-   if (!device_probe(dev)) {
+   if (OF_CONTROL) {
+   /* Check for a chosen console */
+   node = fdtdec_get_chosen_node(gd-fdt_blob, stdout-path);
+   if (node  0)
+   node = fdt_path_offset(gd-fdt_blob, console);
+   if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node,
+   dev)) {
gd-cur_serial_dev = dev;
return;
}
-   }
-#endif
-   /*
-* Try to use CONFIG_CONS_INDEX if available (it is numbered from 1!).
-*
-* Failing that, get the device with sequence number 0, or in extremis
-* just the first serial device we can find. But we insist on having
-* a console (even if it is silent).
-*/
+
+   /*
+   * If the console is not marked to be bound before relocation,
+   * bind it anyway.
+   */
+   if (node  0 
+   !lists_bind_fdt(gd-dm_root, gd-fdt_blob, node, dev)) {
+   if (!device_probe(dev)) {
+   gd-cur_serial_dev = dev;
+   return;
+   }
+   }
+   } else {
+   /*
+   * Try to use CONFIG_CONS_INDEX if available (it is numbered
+   * from 1!).
+   *
+   * Failing that, get the device with sequence number 0, or in
+   * extremis just the first serial device we can find. But we
+   * insist on having a console (even if it is silent).
+   */
 #ifdef CONFIG_CONS_INDEX
 #define INDEX (CONFIG_CONS_INDEX - 1)
 #else
 #define INDEX 0
 #endif
-   if (uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, dev) 
-   uclass_get_device(UCLASS_SERIAL, INDEX, dev) 
-   (uclass_first_device(UCLASS_SERIAL, dev) || !dev))
-   panic_str(No serial driver found);
+   if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, dev) ||
+   !uclass_get_device(UCLASS_SERIAL, INDEX, dev) ||
+   (!uclass_first_device(UCLASS_SERIAL, dev) || dev)) {
+   gd-cur_serial_dev = dev;
+   return;
+   }
 #undef INDEX
-   gd-cur_serial_dev = dev;
+   }
+
+   panic_str(No serial driver found);
 }
 
 /* Called prior to relocation */
-- 
2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 11/18] dm: Reduce SPL device tree size

2015-05-12 Thread Simon Glass
The SPL device tree size must be minimised to save memory. Only include
properties that are needed by SPL - this is determined by the presence
of the u-boot,dm-pre-reloc property. Also remove a predefined list of
unused properties from the nodes that remain.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2:
- Add new patch to reduce SPL device tree size with fdtgrep

 Makefile|  2 +-
 arch/arm/cpu/u-boot-spl.lds |  2 +-
 dts/Kconfig | 12 
 scripts/Makefile.spl| 28 
 4 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index cecb8fa..c82ca3d 100644
--- a/Makefile
+++ b/Makefile
@@ -1255,7 +1255,7 @@ u-boot.lds: $(LDSCRIPT) prepare FORCE
 
 spl/u-boot-spl.bin: spl/u-boot-spl
@:
-spl/u-boot-spl: tools prepare
+spl/u-boot-spl: tools prepare $(if $(CONFIG_OF_SEPARATE),dts/dt.dtb)
$(Q)$(MAKE) obj=spl -f $(srctree)/scripts/Makefile.spl all
 
 spl/sunxi-spl.bin: spl/u-boot-spl
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index a8be204..4b6e0f6 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -66,7 +66,7 @@ SECTIONS
 . = ALIGN(4);
__bss_end = .;
}
-
+   __bss_size = __bss_end - __bss_start;
.dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
diff --git a/dts/Kconfig b/dts/Kconfig
index 957f5c7..7825b4e 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -56,4 +56,16 @@ config DEFAULT_DEVICE_TREE
  It can be overridden from the command line:
  $ make DEVICE_TREE=device-tree-name
 
+config OF_SPL_REMOVE_PROPS
+   string List of device tree properties to drop for SPL
+   depends on OF_CONTROL  SPL
+   default pinctrl-0 pinctrl-names clocks clock-names interrupts 
interrupt-parent
+   help
+ Since SPL normally runs in a reduced memory space, the device tree
+ is cut down to only what is needed to load and start U-Boot. Only
+ nodes marked with the property u-boot,dm-pre-reloc will be
+ included. In addition, some properties are not used by U-Boot and
+ can be discarded. This option defines the list of properties to
+ discard.
+
 endmenu
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index ea67137..33c36e6 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -151,6 +151,8 @@ boot.bin: $(obj)/u-boot-spl.bin
 
 ALL-y  += $(obj)/$(SPL_BIN).bin $(obj)/$(SPL_BIN).cfg
 
+ALL-$(CONFIG_OF_SEPARATE) += $(obj)/$(SPL_BIN)-pad.bin 
$(obj)/$(SPL_BIN)-dtb.bin
+
 ifdef CONFIG_SAMSUNG
 ALL-y  += $(obj)/$(BOARD)-spl.bin
 endif
@@ -165,6 +167,32 @@ endif
 
 all:   $(ALL-y)
 
+quiet_cmd_cat = CAT $@
+cmd_cat = cat $(filter-out $(PHONY), $^)  $@
+
+$(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN).bin $(obj)/$(SPL_BIN)-pad.bin \
+   $(obj)/$(SPL_BIN).dtb FORCE
+   $(call if_changed,cat)
+
+# Create a file that pads from the end of u-boot-spl.bin to bss_end
+$(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
+   @bss_size_str=$(shell $(NM) $ | awk 'BEGIN {size = 0} /__bss_size/ 
{size = $$1} END {print ibase=16;  size}' | bc); \
+   dd if=/dev/zero of=$@ bs=1 count=$${bss_size_str} 2/dev/null;
+
+# Pass the original device tree file through fdtgrep twice. The first pass
+# removes any unwanted nodes (i.e. those which don't have the
+# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second
+# pass removes various unused properties from the remaining nodes.
+# The output is typically a much smaller device tree file.
+quiet_cmd_fdtgrep = FDTGREP $@
+  cmd_fdtgrep = $(objtree)/tools/fdtgrep -b u-boot,dm-pre-reloc -RT $ \
+   -n /chosen -O dtb | \
+   $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
+   $(addprefix -P ,$(subst $\,,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+
+$(obj)/$(SPL_BIN).dtb: dts/dt.dtb
+   $(call cmd,fdtgrep)
+
 quiet_cmd_cpp_cfg = CFG $@
 cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
-D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $
-- 
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[U-Boot] [PATCH v2 00/18] dm: Introduce device tree support in SPL (for Rockchip)

2015-05-12 Thread Simon Glass
With driver model SPL support in place the remaining driver difference
between U-Boot proper and SPL is that SPL does not support device tree.
This series adds this support, using a Rockchip board as an example.

One problem with device tree is that U-Boot has no way of dropping features
it does not need or use. For SPL this problem needs to be solved and this
series uses a new 'fdtgrep' tool for this. The 45KB Firefly device tree
reduces to 558 bytes when unused material is removed.

This series includes some changes aimed at reduce code size in SPL,
including:
- dropping alias sequence support (the aliases node) since many boards just
use a single UART in SPL
- adding a smaller panic() function that does not support printf()-format
strings
- removing device unbind code which will never be used in SPL

Overall the resulting SPL binary is 8694 bytes with my Linaro 4.8.2 compiler,
including the device tree, using Thumb-2 and with a hacked build so that
CONFIG_USE_PRIVATE_LIBGCC is enabled. Of this:

1768 bytes is driver model core code
1556 bytes is device tree code
558 bytes is the device tree itself
4756 is other code, including serial drivers, rodata and data

The last figure includes rodata incorrectly added by the tool chain [1].
With a bug-fixed gcc 4.9.2 the total size is 6758 bytes including device
tree.

Approximately 750 bytes is used for strings and driver data (root device
and serial) associated with driver model and device tree. This adds up an
overhead of around 4750 bytes for driver model and device tree, including
the code, rodata and device tree itself.

It should therefore be possible to use driver model and device tree in
SPL for board that have enough SRAM. Clearly 4KB is impossible without
further work (perhaps removing some error strings). I suspect 8KB would
be tricky, allowing only 3KB for stack and other code. But 16KB should
work OK.

SRAM sizes for recent SoCs I am aware of are:

Rockchip RK3288: 96KB
Tegra 124:   128KB
Samsung Exynos 5420: 384KB

The Rockchip Firefly was chosen for this work since it is a fairly recent
board and is readily available. Rockchip engineers have been actively
upstreaming code to Linux in the past year and there is a very
full-featured U-Boot available. But it is invisible to most U-Boot
people - mainline Rockchip support seems well overdue. This series does
not make a serious start on that, since it only prints a message in SPL
and then hangs, but additional work should get it booting to a prompt.

This series has not yet been tested on a Radxa Rock Pro but is likely to
work there also, using the Firefly config. Future work will add support
for this board also.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303

Changes in v2:
- Simplify the support for CONFIG_SYS_NS16550_MEM32
- Also drop the memory table space
- Add a new patch for memalign_simple()
- Add new patch to remove unused strings from a device tree
- Add new patch with fdt_first/next_region() functions
- Add new patch with fdtgrep tool
- Add new patch to reduce SPL device tree size with fdtgrep
- Tidy up license headers and remove SPL #ifdefs
- Tidy up license headers
- Tidy up license headers and remove SPL #ifdefs
- Drop use of CONFIG_USE_PRIVATE_LIBGCC=y
- Tidy up license headers and remove SPL #ifdefs

Simon Glass (18):
  dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model
  fdt: arm: Drop device tree padding
  dts: Disable device tree for SPL on all boards
  dm: serial: Don't support CONFIG_CONS_INDEX with device tree
  Add a simple version of memalign()
  Remove SPL undefine of CONFIG_OF_CONTROL
  mkimage: Display a better list of available image types
  fdt: Add a function to remove unused strings from a device tree
  fdt: Add fdt_first/next_region() functions
  fdt: Add fdtgrep tool
  dm: Reduce SPL device tree size
  dm: rockchip: Add serial support
  rockchip: Bring in RK3288 device tree file includes and bindings
  rockchip: Add base SoC files
  rockchip: Add basic support for firefly-rk3288
  rockchip: Add the beginnings of an image tool
  rockchip: Add a simple README
  rockchip: Add basic support for jerry

 Makefile   |2 +-
 arch/arm/Kconfig   |   18 +
 arch/arm/Makefile  |1 +
 arch/arm/cpu/armv7/exynos/Kconfig  |8 +
 arch/arm/cpu/armv7/s5pc1xx/Kconfig |2 +
 arch/arm/cpu/u-boot-spl.lds|2 +-
 arch/arm/dts/Makefile  |6 +-
 arch/arm/dts/cros-ec-sbs.dtsi  |   16 +
 arch/arm/dts/rk3288-firefly.dts|   44 +
 arch/arm/dts/rk3288-firefly.dtsi   |  454 ++
 arch/arm/dts/rk3288-jerry.dts  |  203 +++
 arch/arm/dts/rk3288-thermal.dtsi   |   88 ++
 arch/arm/dts/rk3288-veyron-chromebook.dtsi |  200 +++
 arch/arm/dts/rk3288-veyron.dtsi  

[U-Boot] U-Boot 2015.04 failing to build with GCC 5.1

2015-05-12 Thread Otavio Salvador
Hello,

We are working at enabling GCC 5.1 at the Yocto Project and we found a
build error:

make -f ../scripts/Makefile.build obj=examples/standalone
  arm-oel-linux-gnueabi-ld.bfd   -pie  --gc-sections -Bstatic -Ttext
0x40002000 -o u-boot -T u-boot.lds arch/arm/cpu/arm926ejs/start.o
--start-group  arch/arm/cpu/built-in.o
arch/arm/cpu/arm926ejs/built-in.o  arch/arm/imx-common/built-in.o
arch/arm/lib/built-in.o  board/freescale/common/built-in.o
board/freescale/mx28evk/built-in.o  common/built-in.o  disk/built-in.o
 drivers/built-in.o  drivers/dma/built-in.o  drivers/gpio/built-in.o
drivers/i2c/built-in.o  drivers/mmc/built-in.o  drivers/mtd/built-in.o
 drivers/mtd/nand/built-in.o  drivers/mtd/onenand/built-in.o
drivers/mtd/spi/built-in.o  drivers/mtd/ubi/built-in.o
drivers/net/built-in.o  drivers/net/phy/built-in.o
drivers/pci/built-in.o  drivers/power/built-in.o
drivers/power/battery/built-in.o  drivers/power/fuel_gauge/built-in.o
drivers/power/mfd/built-in.o  drivers/power/pmic/built-in.o
drivers/serial/built-in.o  drivers/spi/built-in.o
drivers/usb/eth/built-in.o  drivers/usb/gadget/built-in.o
drivers/usb/host/built-in.o  drivers/usb/musb-new/built-in.o
drivers/usb/musb/built-in.o  drivers/usb/phy/built-in.o
drivers/usb/ulpi/built-in.o  fs/built-in.o  lib/built-in.o
net/built-in.o  test/built-in.o  test/dm/built-in.o --end-group
arch/arm/lib/eabi_compat.o  -L
/home/otavio/src/ossystems/yocto/build/tmp/sysroots/imx28evk/usr/lib/arm-oel-linux-gnueabi/5.1.0
-lgcc -Map u-boot.map
arch/arm/cpu/arm926ejs/start.o: In function `flush_dcache':
/home/otavio/src/ossystems/yocto/build/tmp/work/imx28evk-oel-linux-gnueabi/u-boot-fslc/v2015.04+gitAUTOINC+b16ec2de8d-r0/git/mx28evk_config/../arch/arm/cpu/arm926ejs/start.S:108:
undefined reference to `lowlevel_init'
arm-oel-linux-gnueabi-ld.bfd: BFD (GNU Binutils) 2.25.0 assertion fail
/home/otavio/src/ossystems/yocto/build/tmp/work/x86_64-oel-linux-gnueabi/binutils-cross-arm/2.25-r0/git/bfd/elf32-arm.c:7827
arm-oel-linux-gnueabi-ld.bfd: error: required section '.rel.plt' not
found in the linker script
arm-oel-linux-gnueabi-ld.bfd: final link failed: Invalid operation
/home/otavio/src/ossystems/yocto/build/tmp/work/imx28evk-oel-linux-gnueabi/u-boot-fslc/v2015.04+gitAUTOINC+b16ec2de8d-r0/git/Makefile:1127:
recipe for target 'u-boot' failed
make[1]: *** [u-boot] Error 1
make[1]: Leaving directory
'/home/otavio/src/ossystems/yocto/build/tmp/work/imx28evk-oel-linux-gnueabi/u-boot-fslc/v2015.04+gitAUTOINC+b16ec2de8d-r0/git/mx28evk_config'
Makefile:145: recipe for target 'sub-make' failed
make: *** [sub-make] Error 2

Does someone have any idea what is going on?

-- 
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[U-Boot] [PATCH] tools: use pkg-config when available to get SSL flags

2015-05-12 Thread Thomas Petazzoni
Instead of hardcoding -lssl -lcrypto as the flags needed to build
mkimage with FIT signature enabled, use pkg-config when
available. This allows to properly support cases where static linking
is used, which requires linking with -lz, since OpenSSL uses zlib
internally.

We gracefully fallback on the previous behavior of hardcoding -lssl
-lcrypto if pkg-config is not available or fails with an error.

Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
 tools/Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/Makefile b/tools/Makefile
index 4bbb153..e1bcd59 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -122,7 +122,8 @@ endif
 
 # MXSImage needs LibSSL
 ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_FIT_SIGNATURE),)
-HOSTLOADLIBES_mkimage += -lssl -lcrypto
+HOSTLOADLIBES_mkimage += \
+   $(shell pkg-config --libs libssl 2 /dev/null || echo -lssl -lcrypto)
 endif
 
 HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage)
-- 
2.1.0

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Re: [U-Boot] [PATCH] Clean all defconfigs with savedefconfig

2015-05-12 Thread Masahiro Yamada
Hi.

I was a little late...

2015-05-13 1:32 GMT+09:00 Tom Rini tr...@konsulko.com:
 On Tue, May 12, 2015 at 11:20:07AM -0500, Joe Hershberger wrote:
 Hi Tom,

 On Tue, May 12, 2015 at 10:18 AM, Tom Rini tr...@konsulko.com wrote:
  On Mon, May 11, 2015 at 01:32:40PM -0500, Joe Hershberger wrote:
  Hi Tom,
 
  On Mon, May 11, 2015 at 12:08 PM, Joe Hershberger
  joe.hershber...@ni.com wrote:
   In order to reduce merge conflicts and to maintain the simplest possible
   defconfig files, we should be using the savedefconfig feature of Kconfig
   every time a new feature is added. This keeps the defconfig settings to
   a minimum (only those things not default) and keeps them in the same
   order as the Kconfig options.
  
   Signed-off-by: Joe Hershberger joe.hershber...@ni.com
   Cc: Masahiro Yamada yamada.masah...@socionext.com
 
  This is easy to generate, but as you can imagine it will become a
  conflict rapidly. Please let me know if you choose to wait past today
  on this... if you do, let me know when you want to pull it in and I
  can generate it again. We should coordinate.
 
  I'm taking what you and Stephen talked about as changes will be coming
  and not applying this patch.

 That's correct. I'm running a test now. Are you about to push more
 changes that include defconfig or Kconfig changes or am I safe with
 the current HEAD to generate this patch?

 You're safe to continue.  Please cc Stephen on that one since I'll want
 his ack before I grab it.  Thanks!



I don't want to bother you guys after Tom decided to apply this patch,
but just my comment.

I personally hesitate to make the board choice optional.

With this change, Kconfig is allowed to generate the .config without any board.

The build always fails with such a .config,
i.e. it is completely an insane .config.


I think Stephen's idea (adding the default board explicitly) works well.


Another solution can be seen arch/arc/Kconfig.
Alexey added TARGET_DUMMY to the top of the board select list.
It looks a bit ugly, so I do not like it very much, though.


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Re: [U-Boot] [PATCH v1 1/4] Kconfig: Enable usage of escape char '\' in string values

2015-05-12 Thread Masahiro Yamada
Hi, Simon, Stefan,


2015-05-12 7:41 GMT+09:00 Simon Glass s...@chromium.org:
 Hi Stefan,

 On 11 May 2015 at 07:27, Stefan Roese m...@roese.nl wrote:
 Hi Simon, Hi Masahiro,


 On 11.05.2015 09:58, Stefan Roese wrote:

 On 10.05.2015 16:48, Simon Glass wrote:

 On 7 May 2015 at 06:13, Stefan Roese s...@denx.de wrote:

 I might have missed something, but I failed to use the escape char '\'
 in strings. To pass a printf format string like foo %d bar\n via
 Kconfig to the code.

 Right now its not possible to use the escape character '\' in Kconfig
 string values correctly to e.g. set this string value test output\n.
 The '\n' will be converted to 'n'.

 The current implementation removes some of the '\' chars from the input
 string in conf_set_sym_val(). Examples:

 '\' - ''
 '\\'- '\'
 '\\\'   - '\'
 ''  - '\\'
 ...

 And then doubles the backslash chars in the output string in
 sym_escape_string_value(). Example:

 '\' - ''   - ''
 '\\'- '\'  - '\\'
 '\\\'   - '\'  - '\\'
 ''  - '\\' - ''
 ...

 As you see in these examples, its impossible to generate a single '\'
 charater in the output string as its needed for something like '\n'.

 This patch now changes this behavior to not drop some backslashes in
 conf_set_sym_val() and to not add new backslashes in the resulting
 output string. Removing the function sym_escape_string_value()
 completely as its not needed anymore.

 Signed-off-by: Stefan Roese s...@denx.de
 Cc: Masahiro Yamada yamada.masah...@socionext.com
 Cc: Simon Glass s...@chromium.org
 ---

   scripts/kconfig/confdata.c | 20 +---
   scripts/kconfig/symbol.c   | 43
 ---
   2 files changed, 9 insertions(+), 54 deletions(-)


 This looks right to me. But I do see one problem - the default string
 for CONFIG_AUTOBOOT_PROMPT appears as:

 Autoboot in %d secondsn

 so something is still removing the \ in the Kconfig default;


 Right. Thanks for spotting. I'll fix this in v3.


 I could easily change the default string in the Kconfig file to Autoboot in
 %d seconds\\n. This works. But its a different syntax regarding using the
 escape character backslash compared to editing the .config file or editing
 the string in make menuconfig etc So I hesitate to fix it this way.

 Unfortunately fixing this issue in the code is not that easy. At least not
 for me. As the default values of the string values are set in the
 conf_parse() function (in scripts/kconfig/zconf.y). And I really have
 absolutely no experience with yacc / bison. Perhaps one of you guys has a
 quick fix to make this default value of strings compatible again so that
 this additional '\' is not needed in the Kconfig file?

 Well I am familiar with those tools but I think Masahiro probably
 knows a lot more here.


I am not so familiar with Bison, and I am getting a bit busy these days.
So, I cannot find time to take a close look.  Sorry.

If Simon (or someone else) could follow it up, that'd be nice.

BTW, if you have already figured out that conf_parse() is the cause of
the problem,
you do not have to invoke Bison.

Bison does not touch the C part.
conf_parse() is just copied verbatim from zconf.y to zconf.tab.c_shipped.

You can modify conf_parse() exactly in the same way in both of them.


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Re: [U-Boot] [PATCH v2 0/5] Introduce BIT and GENMASK

2015-05-12 Thread Simon Glass
Hi,

On 12 May 2015 at 09:23, Marek Vasut ma...@denx.de wrote:
 On Tuesday, May 12, 2015 at 05:02:37 PM, Tom Rini wrote:
 On Tue, May 12, 2015 at 01:33:39PM +0200, Marek Vasut wrote:
  On Tuesday, May 12, 2015 at 01:25:30 PM, Jagan Teki wrote:
   On 10 May 2015 at 20:52, Jagan Teki jt...@openedev.com wrote:
I have sent one v1 for BIT macro change for entire u-boot,
but this time I'm just introduce by changing this with spi/sf
code, will send more in changes in future.
   
Along with BIT and also introduces GENMASK with spi/sf code.
   
Changes for v2:
- break the BIT macro patch only for spi/sf code.
   
thanks!
Jagan.
   
Jagan Teki (5):
  spi/sf: Add BIT macro in linux/bitops.h
  spi: Remove #define BIT in local file
  spi/sf: Use BIT macro from linux/bitops.h
  linux/bitops.h: GENMASK copy from linux
  spi: Use GENMASK instead of numeric hexcodes
  
   Any comments on this series - early push will have enough time to test
   and I have more patches that need to use these macros.
 
  I'm not very fond of this macro, it makes the code more cryptic .

 BIT/GENMASK are (growing in usage) kernel macros, so I think it'll help
 us in the long run.

 I won't block this, but I'm not very fond of such cryptic stuff.

Not thrilled either, but I agree it makes sense to follow kernel
practice here as elsewhere.

Regards,
Simon
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Re: [U-Boot] [PATCH V3] i2c: mxc: refactor i2c driver and support dm

2015-05-12 Thread Fan Peng
Hi,

Is there any further comments? Or this patch will be applied?

Regards,
Peng.

-Original Message-
From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
Sent: Wednesday, May 06, 2015 4:56 AM
To: Fan Peng-B51431
Cc: Stefano Babic; Heiko Schocher; Marek Vašut; Nikita Kiryanov; U-Boot Mailing 
List
Subject: Re: [PATCH V3] i2c: mxc: refactor i2c driver and support dm

On 27 April 2015 at 07:36, Peng Fan peng@freescale.com wrote:

 1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
used for non-DM and DM.
 2. Remove `struct mxc_i2c_regs` structure, but use register offset to access
registers based on `base` entry of `struct mxc_i2c_bus`.
 3. Remove most `#ifdef I2C_QUIRK_REG`. Using driver_data to contain platform
flags. A new flag is introduced, I2C_QUIRK_FLAG.
 4. Most functions use `struct mxc_i2c_bus` as one of the parameters.
Make most functions common to DM and non-DM, try to avoid duplicated code.
 5. Support DM. Pinmux setting is still set by setup_i2c, but we do not
need bus_i2c_init for DM.
 6. struct i2c_parms and struct sram_data are removed.
 7. Remove bus_i2c_read bus_i2c_write prototype in header file. The frist
paramter of bus_i2c_init is modified to i2c index. Add new prototype
i2c_idle_bus and force_idle_bus. Since bus_i2c_init is not good for
DM I2C and pinctrl is missed, we use a weak function for i2c_idle_bus
for DM part.
Board file take the responsibility to implement this function, like this:

int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)
{
if (i2c_bus-index == 0)
force_idle_bus(i2c_pads_info0);
else if (i2c_bus-index == 1)
force_idle_bus(i2c_pads_info1);
else
xx
}


 Signed-off-by: Peng Fan peng@freescale.com
 ---

 Changes v3:
  1. remove bus_i2c_init for DM, introuduce a weak function i2c_idle_bus.
  2. remove static return type for force_idle_bus, since we need to call
 it in i2c_idle_bus which may be implemented in board file. This does
 not hurt for non-DM.

Acked-by: Simon Glass s...@chromium.org


 Changes v2:
  1. Refactor driver, remove register access based on structure, but use
'base + offset'
  2. Introduce mxc_i2c_bus structure
  3. Introduce I2C_QUIRK_FLAG and remove most I2C_QUIRK_REG and use
 driver_data to contain the flags for different platforms  4. Avoid 
 duplicated code between DM and non-DM part  5. The function name 
 i2c_init_transfer is not changed.
  6. Remove bus_i2c_read/write prototype from header file  7. change 
 bus_i2c_init's first parameter to i2c index  8. Rename patch name, 
 since refactor non-DM part.

  arch/arm/imx-common/i2c-mxv7.c|   7 +-
  arch/arm/include/asm/imx-common/mxc_i2c.h |  38 +-
  drivers/i2c/mxc_i2c.c | 575 
 --
  3 files changed, 426 insertions(+), 194 deletions(-)

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Re: [U-Boot] Pull request: u-boot-tegra/master

2015-05-12 Thread Masahiro Yamada
Hi Tom Warren,

2015-05-13 6:49 GMT+09:00 Tom Warren tcwarren3...@gmail.com:
 Tom,

 Please pull u-boot-tegra/master into u-boot/master. ./MAKEALL -s tegra is
 clean. Thanks.

 The following changes since commit b939689c7b87773c44275a578ffc8674a867e39d:

   Merge branch 'u-boot/master' into 'u-boot-arm/master' (2015-05-05
 10:09:06 +0200)

 are available in the git repository at:


   git://git.denx.de/u-boot-tegra.git master

 for you to fetch changes up to 5168604f3b7e5b8ea077a69fe9acb7c14a36adf7:

   jetson-tk1: Add PSCI configuration options and reserve secure code
 (2015-05-11 08:35:13 -0700)




What about my patch (http://patchwork.ozlabs.org/patch/460596/)?
Has it been rejected or deferred?



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Re: [U-Boot] [PATCH v2 2/7] moveconfig: Add a mapping for the arc cross-compiler

2015-05-12 Thread Masahiro Yamada
Hi Joe.

2015-05-12 2:23 GMT+09:00 Joe Hershberger joe.hershber...@ni.com:
 The arc architecture is supported by U-Boot, so add a mapping here
 for it as well.

 Signed-off-by: Joe Hershberger joe.hershber...@ni.com
 ---

 Changes in v2: None

  tools/moveconfig.py | 1 +
  1 file changed, 1 insertion(+)

 diff --git a/tools/moveconfig.py b/tools/moveconfig.py
 index 30dc4f6..c81f32c 100755
 --- a/tools/moveconfig.py
 +++ b/tools/moveconfig.py
 @@ -26,6 +26,7 @@ SLEEP_TIME=0.03

  CROSS_COMPILE = {
  'aarch64': 'aarch64-linux-',
 +'arc': 'arc-linux-',
  'arm': 'arm-unknown-linux-gnueabi-',
  'avr32': 'avr32-linux-',
  'blackfin': 'bfin-elf-',


IIRC, I intentionally did not add it
because the default ARC CROSS_COMPILE is defined by arch/arc/config.mk
(Looks like ARC wants to choose little/big endian variants
depending on the configuration, although it might not be an issue for
this tool.)

Better to override it?


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Re: [U-Boot] [PATCH v3 1/2] arch: Make board selection choices optional

2015-05-12 Thread Masahiro Yamada
Hi Joe,

2015-05-13 7:12 GMT+09:00 Tom Rini tr...@konsulko.com:

 diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
 index c044ad4..85fddd2 100644
 --- a/arch/arc/Kconfig
 +++ b/arch/arc/Kconfig
 @@ -132,6 +132,7 @@ config ARC_CACHE_LINE_SHIFT

  choice
 prompt Target select
 +   optional

  config TARGET_DUMMY
 bool Dummy target


You do not need to add optional to the ARC board select
because Alexey intentionally added TARGET_DUMMY
to the top of the board select list.

This is another solution to not lose any CONFIG_BOARD_
by savedefconfig although I personally prefer this idea very much.



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Re: [U-Boot] [PATCH V3] i2c: mxc: refactor i2c driver and support dm

2015-05-12 Thread Simon Glass
Hi,

On 12 May 2015 at 19:09, Fan Peng peng@freescale.com wrote:

 Hi,

 Is there any further comments? Or this patch will be applied?


I can apply it if you like - Heiko what do you prefer?

- Simon

 Regards,
 Peng.

 -Original Message-
 From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
 Sent: Wednesday, May 06, 2015 4:56 AM
 To: Fan Peng-B51431
 Cc: Stefano Babic; Heiko Schocher; Marek Vašut; Nikita Kiryanov; U-Boot 
 Mailing List
 Subject: Re: [PATCH V3] i2c: mxc: refactor i2c driver and support dm

 On 27 April 2015 at 07:36, Peng Fan peng@freescale.com wrote:
 
  1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
 used for non-DM and DM.
  2. Remove `struct mxc_i2c_regs` structure, but use register offset to access
 registers based on `base` entry of `struct mxc_i2c_bus`.
  3. Remove most `#ifdef I2C_QUIRK_REG`. Using driver_data to contain platform
 flags. A new flag is introduced, I2C_QUIRK_FLAG.
  4. Most functions use `struct mxc_i2c_bus` as one of the parameters.
 Make most functions common to DM and non-DM, try to avoid duplicated 
  code.
  5. Support DM. Pinmux setting is still set by setup_i2c, but we do not
 need bus_i2c_init for DM.
  6. struct i2c_parms and struct sram_data are removed.
  7. Remove bus_i2c_read bus_i2c_write prototype in header file. The frist
 paramter of bus_i2c_init is modified to i2c index. Add new prototype
 i2c_idle_bus and force_idle_bus. Since bus_i2c_init is not good for
 DM I2C and pinctrl is missed, we use a weak function for i2c_idle_bus
 for DM part.
 Board file take the responsibility to implement this function, like this:
 
 int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)
 {
 if (i2c_bus-index == 0)
 force_idle_bus(i2c_pads_info0);
 else if (i2c_bus-index == 1)
 force_idle_bus(i2c_pads_info1);
 else
 xx
 }
 
 
  Signed-off-by: Peng Fan peng@freescale.com
  ---
 
  Changes v3:
   1. remove bus_i2c_init for DM, introuduce a weak function i2c_idle_bus.
   2. remove static return type for force_idle_bus, since we need to call
  it in i2c_idle_bus which may be implemented in board file. This does
  not hurt for non-DM.

 Acked-by: Simon Glass s...@chromium.org

 
  Changes v2:
   1. Refactor driver, remove register access based on structure, but use
 'base + offset'
   2. Introduce mxc_i2c_bus structure
   3. Introduce I2C_QUIRK_FLAG and remove most I2C_QUIRK_REG and use
  driver_data to contain the flags for different platforms  4. Avoid
  duplicated code between DM and non-DM part  5. The function name
  i2c_init_transfer is not changed.
   6. Remove bus_i2c_read/write prototype from header file  7. change
  bus_i2c_init's first parameter to i2c index  8. Rename patch name,
  since refactor non-DM part.
 
   arch/arm/imx-common/i2c-mxv7.c|   7 +-
   arch/arm/include/asm/imx-common/mxc_i2c.h |  38 +-
   drivers/i2c/mxc_i2c.c | 575 
  --
   3 files changed, 426 insertions(+), 194 deletions(-)
 
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Re: [U-Boot] [PATCH 09/12] sandbox: add: sandbox PMIC device drivers: I2C emul, pmic, regulator

2015-05-12 Thread Simon Glass
Hi Przemyslaw,

On 12 May 2015 at 03:43, Przemyslaw Marczak p.marc...@samsung.com wrote:
 Hello Simon,

 On 05/10/2015 03:57 PM, Simon Glass wrote:

 Hi Przemyslaw,

 On 8 May 2015 at 10:20, Przemyslaw Marczak p.marc...@samsung.com wrote:

 This commit adds emulation of sandbox PMIC device, which includes:
 - PMIC I2C emulation driver
 - PMIC I/O driver (UCLASS_PMIC)
 - PMIC regulator driver (UCLASS_REGULATOR)

 The sandbox PMIC has 12 significant registers and 4 as padding to 16
 bytes,
 which allows using 'i2c md' command with the default count (16).

 The sandbox PMIC provides regulators:
 - 2x BUCK
 - 2x LDO

 Each, with adjustable output:
 - Enable state
 - Voltage
 - Current limit (LDO1/BUCK1 only)
 - Operation mode (different for BUCK and LDO)

 Each attribute has it's own register, beside the enable state, which
 depends
 on operation mode.

 The header file: sandbox_pmic.h includes PMIC's default register values,
 which are set on i2c pmic emul driver's probe() method.

 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 ---
   doc/device-tree-bindings/pmic/sandbox.txt  |  35 +++
   doc/device-tree-bindings/regulator/sandbox.txt |  45 
   drivers/power/pmic/Kconfig |  25 ++
   drivers/power/pmic/Makefile|   3 +-
   drivers/power/pmic/i2c_pmic_emul.c | 145 ++
   drivers/power/pmic/sandbox.c   |  79 ++
   drivers/power/regulator/Kconfig|  30 +++
   drivers/power/regulator/Makefile   |   1 +
   drivers/power/regulator/sandbox.c  | 355
 +
   include/power/sandbox_pmic.h   | 189 +
   10 files changed, 906 insertions(+), 1 deletion(-)
   create mode 100644 doc/device-tree-bindings/pmic/sandbox.txt
   create mode 100644 doc/device-tree-bindings/regulator/sandbox.txt
   create mode 100644 drivers/power/pmic/i2c_pmic_emul.c
   create mode 100644 drivers/power/pmic/sandbox.c
   create mode 100644 drivers/power/regulator/sandbox.c
   create mode 100644 include/power/sandbox_pmic.h


 Acked-by: Simon Glass s...@chromium.org
 Tested on sandbox:
 Tested-by: Simon Glass s...@chromium.org

 I expected i2c_pmic_emul to get its settings from the device tree too
 - is that not possible for some reason?

 Regards,
 Simon


 To put the default PMIC register settings into device tree,
 I would like add some changes:
 - add arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h - to define
 VAL2REG(min, step, val) macro and operation mode IDs
 - add arch/sandbox/dts/sandbox_pmic.dtsi
 - include the sandbox_pmic.dtsi in sandbox.dts
 - include the sandbox_pmic.dtsi in test.dts

 And the last one is a problem, because it's compiled without the U-Boot
 build system - but by dtc command. I could extend the dtc by arg '-i' - to
 include the sandbox_pmic.dtsi, but then, still I can't use the preprocessor
 macro.

 I think, that move the test.dts into arch/sandbox/dts directory is a
 good idea in this case.

 Is that acceptable for you?

Yes I think that is OK. Another option may be to add a -I option to
include $(ARCH)/dts.


 Actually I didn't used the script test-dm.sh before, since I just compile
 the U-Boot by my own script with the dtc routine.

Regards,
Simon
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[U-Boot] [Patch 1/2] arm: mx6: tqma6: fix spelling error in condition

2015-05-12 Thread Markus Niebel
From: Markus Niebel markus.nie...@tq-group.com

Signed-off-by: Markus Niebel markus.nie...@tq-group.com
---
 include/configs/tqma6_mba6.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
index 88c0067..2f52598 100644
--- a/include/configs/tqma6_mba6.h
+++ b/include/configs/tqma6_mba6.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2013, 2014 Markus Niebel markus.nie...@tq-group.com
+ * Copyright (C) 2013 - 2015 Markus Niebel markus.nie...@tq-group.com
  *
  * Configuration settings for the TQ Systems TQMa6Q,S module.
  *
@@ -11,7 +11,7 @@
 
 #if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
 #define CONFIG_DEFAULT_FDT_FILEimx6dl-mba6x.dtb
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
+#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
 #define CONFIG_DEFAULT_FDT_FILEimx6q-mba6x.dtb
 #endif
 
-- 
2.3.0

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[U-Boot] [PATCH][v2] powerpc/b4860qds: Update README for correct DIP information

2015-05-12 Thread Raghav Dogra
Correct boolean values for ON and OFF

Signed-off-by: Raghav Dogra rag...@freescale.com
---
Changes for v2:
 -Reduced the description 
 -Modified the heading 



 doc/README.b4860qds | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/doc/README.b4860qds b/doc/README.b4860qds
index eada0c7..c28bdec 100644
--- a/doc/README.b4860qds
+++ b/doc/README.b4860qds
@@ -119,7 +119,10 @@ B4860QDS Default Settings
 Switch Settings
 
 
-SW1OFF [0] OFF [1] OFF [1] OFF [0] OFF [1] OFF [0] OFF [1] OFF [1]
+OFF-[0]
+ON -[1]
+
+SW1OFF OFF OFF OFF OFF OFF OFF OFF
 SW2ON  ON  ON  ON  ON  ON  OFF OFF
 SW3OFF OFF OFF ON  OFF OFF ON  OFF
 SW5OFF OFF OFF OFF OFF OFF ON  ON
@@ -144,7 +147,7 @@ B4420QDS Default Settings
 
 Switch Settings
 
-SW1OFF[0]  OFF [0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0]
+SW1OFF OFF OFF OFF OFF OFF OFF OFF
 SW2ON  OFF ON  OFF ON  ON  OFF OFF
 SW3OFF OFF OFF ON  OFF OFF ON  OFF
 SW5OFF OFF OFF OFF OFF OFF ON  ON
-- 
1.9.1


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[U-Boot] [patch][U-Boot 4/4] arm: imx6: tqma6: implement KConfig baseboard selection

2015-05-12 Thread Markus Niebel
From: Markus Niebel markus.nie...@tq-group.com

this finally removes the need for extra settings in
defconfig

Signed-off-by: Markus Niebel markus.nie...@tq-group.com
---
 board/tqc/tqma6/Kconfig   | 11 +++
 configs/tqma6q_mba6_mmc_defconfig |  2 +-
 configs/tqma6q_mba6_spi_defconfig |  2 +-
 configs/tqma6s_mba6_mmc_defconfig |  2 +-
 configs/tqma6s_mba6_spi_defconfig |  2 +-
 5 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/board/tqc/tqma6/Kconfig b/board/tqc/tqma6/Kconfig
index 132e82f..5612f27 100644
--- a/board/tqc/tqma6/Kconfig
+++ b/board/tqc/tqma6/Kconfig
@@ -52,6 +52,17 @@ config TQMA6X_SPI_BOOT
 
 endchoice
 
+choice
+   prompt TQMa6 base board variant
+
+config MBA6
+   bool TQMa6 on MBa6 Starterkit
+   help
+ Select the MBa6 starterkit. This features a GigE Phy, USB, SD-Card
+ etc.
+
+endchoice
+
 config IMX_CONFIG
default board/tqc/tqma6/tqma6q.cfg if TQMA6Q
default board/tqc/tqma6/tqma6s.cfg if TQMA6S
diff --git a/configs/tqma6q_mba6_mmc_defconfig 
b/configs/tqma6q_mba6_mmc_defconfig
index c57ee5a..9a78a7e 100644
--- a/configs/tqma6q_mba6_mmc_defconfig
+++ b/configs/tqma6q_mba6_mmc_defconfig
@@ -3,4 +3,4 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6Q=y
 CONFIG_TQMA6X_MMC_BOOT=y
-CONFIG_SYS_EXTRA_OPTIONS=MBA6
\ No newline at end of file
+CONFIG_MBA6=y
diff --git a/configs/tqma6q_mba6_spi_defconfig 
b/configs/tqma6q_mba6_spi_defconfig
index dbc366b..1808d35 100644
--- a/configs/tqma6q_mba6_spi_defconfig
+++ b/configs/tqma6q_mba6_spi_defconfig
@@ -3,4 +3,4 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6Q=y
 CONFIG_TQMA6X_SPI_BOOT=y
-CONFIG_SYS_EXTRA_OPTIONS=MBA6
+CONFIG_MBA6=y
diff --git a/configs/tqma6s_mba6_mmc_defconfig 
b/configs/tqma6s_mba6_mmc_defconfig
index 4e7317e..5dcf0a1 100644
--- a/configs/tqma6s_mba6_mmc_defconfig
+++ b/configs/tqma6s_mba6_mmc_defconfig
@@ -3,4 +3,4 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6S=y
 CONFIG_TQMA6X_MMC_BOOT=y
-CONFIG_SYS_EXTRA_OPTIONS=MBA6
+CONFIG_MBA6=y
diff --git a/configs/tqma6s_mba6_spi_defconfig 
b/configs/tqma6s_mba6_spi_defconfig
index d874dc2..0946f39 100644
--- a/configs/tqma6s_mba6_spi_defconfig
+++ b/configs/tqma6s_mba6_spi_defconfig
@@ -3,4 +3,4 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6S=y
 CONFIG_TQMA6X_SPI_BOOT=y
-CONFIG_SYS_EXTRA_OPTIONS=MBA6
+CONFIG_MBA6=y
-- 
2.3.0

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Re: [U-Boot] [PATCH 03/10] imx6: move generic imx6 options to mx6_common.h

2015-05-12 Thread Markus Niebel
Hello

Am 12.05.2015 um 12:51 schrieb Tom Rini:
 On Tue, May 12, 2015 at 10:40:25AM +0200, Markus Niebel wrote:
 
 Hello Peter,

 sorry for the noise, did not see v2 of your series. Just one thing:

 Am 11.05.2015 um 18:22 schrieb Peter Robinson:
 All boards define CONFIG_MX6, CONFIG_DISPLAY_BOARDINFO, 
 CONFIG_DISPLAY_CPUINFO
 and CONFIG_SYS_GENERIC_BOARD so define them in mx6_common

 Signed-off-by: Peter Robinson pbrobin...@gmail.com
 Reviewed-by: Tom Rini trini at konsulko.com

 [...] 

  
 diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
 index 85bf039..fc19fbb 100644
 --- a/include/configs/mx6_common.h
 +++ b/include/configs/mx6_common.h
 @@ -38,4 +38,9 @@
  #include asm/imx-common/gpio.h
  #include config_cmd_default.h
  
 +#define CONFIG_MX6

 Here we need an #if !defined(CONFIG_MX6) because secomx6quq7
 (and soon hopefully other boards) sets this via Kconfig under
 arch/arm/cpu/armv7/mx6
 
 Oh good catch.  Would it be hard to just make everyone do this via
 Kconfig instead?  I would expect not...
 

See the series for TQMa6 I posted. Main point is to delete inclusion
of the board Kconfig from arch/arm/Kconfig and to add them to
source them from arch/arm/cpu/armv7/mx6/Kconfig.

As a side effect the CPU type can then also be selected using Kconfig ...

 
 
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Re: [U-Boot] [PATCH] vexpress64: specify CONFIG_SYS_FLASH_CFI_WIDTH

2015-05-12 Thread Linus Walleij
On Fri, May 8, 2015 at 7:07 PM, Ryan Harkin ryan.har...@linaro.org wrote:

 Testing on the ARM Versatile Express Juno board showed intermittent CFI
 flash detection problems.

 Debug output in exception cases showed that the NOR flash was returning
 incorrect values to a query command:

 fwc addr 0800 cmd f0 f0f0f0f0 32bit x 8 bit
 fwc addr 0800 cmd ff  32bit x 8 bit
 fwc addr 08000154 cmd 98 98989898 32bit x 8 bit
 is= cmd 51(Q) addr 0840 is= 00800051 51515151
 fwc addr 08001554 cmd 98 98989898 32bit x 8 bit
 is= cmd 51(Q) addr 0840 is= 00800051 51515151
 fwc addr 0800 cmd f0 00f000f0 32bit x 16 bit
 fwc addr 0800 cmd ff 00ff00ff 32bit x 16 bit
 fwc addr 08000154 cmd 98 00980098 32bit x 16 bit
 is= cmd 51(Q) addr 0840 is= 00800051 00510051
 fwc addr 08001554 cmd 98 00980098 32bit x 16 bit
 is= cmd 51(Q) addr 0840 is= 00800051 00510051

 Debugging showed that the problem could be solved by preventing u-boot
 from scanning different flash widths by specifying
 CONFIG_SYS_FLASH_CFI_WIDTH so that only using the 'correct' width was
 used.

 Signed-off-by: Ryan Harkin ryan.har...@linaro.org

Ah, good catch. No instabilities on my (old) machine but
this is just as good.

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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[U-Boot] [Patch 0/2] arm: imx6: tqma6: minor config fixes

2015-05-12 Thread Markus Niebel
From: Markus Niebel markus.nie...@tq-group.com

Two minor config fixes for the TQMa6 modules

Markus Niebel (2):
  arm: mx6: tqma6: fix spelling error in condition
  arm: mx6: tqma6: use default CONFIG_SYS_PBSIZE

 include/configs/tqma6.h  | 3 ---
 include/configs/tqma6_mba6.h | 4 ++--
 2 files changed, 2 insertions(+), 5 deletions(-)

-- 
2.3.0

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[U-Boot] [Patch 2/2] arm: mx6: tqma6: use default CONFIG_SYS_PBSIZE

2015-05-12 Thread Markus Niebel
From: Markus Niebel markus.nie...@tq-group.com

this removes a config entry and uses the default value
defined in config_fallbacks.h. This implements the same
behaviour as a patch series for other i.MX6 boards from
Freescale

Signed-off-by: Markus Niebel markus.nie...@tq-group.com
---
 include/configs/tqma6.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 012fa1c..7c06d37 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -416,9 +416,6 @@
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_CBSIZE  512
 
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + \
-sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE
 
-- 
2.3.0

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Re: [U-Boot] [PATCH 09/12] sandbox: add: sandbox PMIC device drivers: I2C emul, pmic, regulator

2015-05-12 Thread Przemyslaw Marczak

Hello Simon,

On 05/10/2015 03:57 PM, Simon Glass wrote:

Hi Przemyslaw,

On 8 May 2015 at 10:20, Przemyslaw Marczak p.marc...@samsung.com wrote:

This commit adds emulation of sandbox PMIC device, which includes:
- PMIC I2C emulation driver
- PMIC I/O driver (UCLASS_PMIC)
- PMIC regulator driver (UCLASS_REGULATOR)

The sandbox PMIC has 12 significant registers and 4 as padding to 16 bytes,
which allows using 'i2c md' command with the default count (16).

The sandbox PMIC provides regulators:
- 2x BUCK
- 2x LDO

Each, with adjustable output:
- Enable state
- Voltage
- Current limit (LDO1/BUCK1 only)
- Operation mode (different for BUCK and LDO)

Each attribute has it's own register, beside the enable state, which depends
on operation mode.

The header file: sandbox_pmic.h includes PMIC's default register values,
which are set on i2c pmic emul driver's probe() method.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
  doc/device-tree-bindings/pmic/sandbox.txt  |  35 +++
  doc/device-tree-bindings/regulator/sandbox.txt |  45 
  drivers/power/pmic/Kconfig |  25 ++
  drivers/power/pmic/Makefile|   3 +-
  drivers/power/pmic/i2c_pmic_emul.c | 145 ++
  drivers/power/pmic/sandbox.c   |  79 ++
  drivers/power/regulator/Kconfig|  30 +++
  drivers/power/regulator/Makefile   |   1 +
  drivers/power/regulator/sandbox.c  | 355 +
  include/power/sandbox_pmic.h   | 189 +
  10 files changed, 906 insertions(+), 1 deletion(-)
  create mode 100644 doc/device-tree-bindings/pmic/sandbox.txt
  create mode 100644 doc/device-tree-bindings/regulator/sandbox.txt
  create mode 100644 drivers/power/pmic/i2c_pmic_emul.c
  create mode 100644 drivers/power/pmic/sandbox.c
  create mode 100644 drivers/power/regulator/sandbox.c
  create mode 100644 include/power/sandbox_pmic.h


Acked-by: Simon Glass s...@chromium.org
Tested on sandbox:
Tested-by: Simon Glass s...@chromium.org

I expected i2c_pmic_emul to get its settings from the device tree too
- is that not possible for some reason?

Regards,
Simon



To put the default PMIC register settings into device tree,
I would like add some changes:
- add arch/sandbox/dts/include/dt-bindings/pmic/sandbox_pmic.h - to 
define VAL2REG(min, step, val) macro and operation mode IDs

- add arch/sandbox/dts/sandbox_pmic.dtsi
- include the sandbox_pmic.dtsi in sandbox.dts
- include the sandbox_pmic.dtsi in test.dts

And the last one is a problem, because it's compiled without the U-Boot 
build system - but by dtc command. I could extend the dtc by arg '-i' - 
to include the sandbox_pmic.dtsi, but then, still I can't use the 
preprocessor macro.


I think, that move the test.dts into arch/sandbox/dts directory is a 
good idea in this case.


Is that acceptable for you?

Actually I didn't used the script test-dm.sh before, since I just 
compile the U-Boot by my own script with the dtc routine.


Best regards,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v2 0/5] Introduce BIT and GENMASK

2015-05-12 Thread Jagan Teki
On 10 May 2015 at 20:52, Jagan Teki jt...@openedev.com wrote:
 I have sent one v1 for BIT macro change for entire u-boot,
 but this time I'm just introduce by changing this with spi/sf
 code, will send more in changes in future.

 Along with BIT and also introduces GENMASK with spi/sf code.

 Changes for v2:
 - break the BIT macro patch only for spi/sf code.

 thanks!
 Jagan.

 Jagan Teki (5):
   spi/sf: Add BIT macro in linux/bitops.h
   spi: Remove #define BIT in local file
   spi/sf: Use BIT macro from linux/bitops.h
   linux/bitops.h: GENMASK copy from linux
   spi: Use GENMASK instead of numeric hexcodes

Any comments on this series - early push will have enough time to test and
I have more patches that need to use these macros.


  drivers/mtd/spi/sandbox.c  |  4 +--
  drivers/mtd/spi/sf_internal.h  | 36 ++--
  drivers/spi/altera_spi.c   | 26 +++
  drivers/spi/atmel_spi.h| 54 +++---
  drivers/spi/bfin_spi6xx.c  |  8 ++---
  drivers/spi/cadence_qspi_apb.c | 76 
 +-
  drivers/spi/davinci_spi.c  |  2 --
  drivers/spi/designware_spi.c   | 16 -
  drivers/spi/ep93xx_spi.c   |  6 +---
  drivers/spi/exynos_spi.c   |  4 +--
  drivers/spi/fsl_dspi.c |  2 +-
  drivers/spi/fsl_espi.c | 20 +--
  drivers/spi/fsl_qspi.c |  6 ++--
  drivers/spi/ich.c  |  4 +--
  drivers/spi/mpc8xxx_spi.c  |  2 +-
  drivers/spi/mxs_spi.c  |  2 +-
  drivers/spi/omap3_spi.h| 64 +--
  drivers/spi/sh_qspi.c  | 16 -
  drivers/spi/tegra114_spi.c | 76 
 +-
  drivers/spi/tegra20_sflash.c   | 54 +++---
  drivers/spi/tegra20_slink.c| 60 -
  drivers/spi/ti_qspi.c  | 10 +++---
  drivers/spi/xilinx_spi.c   | 46 -
  drivers/spi/zynq_spi.c | 22 ++--
  include/linux/bitops.h | 12 +++
  include/spi.h  | 46 -
  26 files changed, 340 insertions(+), 334 deletions(-)

 --
 1.9.1

thanks!
-- 
Jagan Teki,
Openedev.
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Re: [U-Boot] [PATCH 03/10] imx6: move generic imx6 options to mx6_common.h

2015-05-12 Thread Markus Niebel
Hello Peter,

sorry for the noise, did not see v2 of your series. Just one thing:

Am 11.05.2015 um 18:22 schrieb Peter Robinson:
 All boards define CONFIG_MX6, CONFIG_DISPLAY_BOARDINFO, CONFIG_DISPLAY_CPUINFO
 and CONFIG_SYS_GENERIC_BOARD so define them in mx6_common
 
 Signed-off-by: Peter Robinson pbrobin...@gmail.com
 Reviewed-by: Tom Rini trini at konsulko.com

[...] 

  
 diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
 index 85bf039..fc19fbb 100644
 --- a/include/configs/mx6_common.h
 +++ b/include/configs/mx6_common.h
 @@ -38,4 +38,9 @@
  #include asm/imx-common/gpio.h
  #include config_cmd_default.h
  
 +#define CONFIG_MX6

Here we need an #if !defined(CONFIG_MX6) because secomx6quq7
(and soon hopefully other boards) sets this via Kconfig under
arch/arm/cpu/armv7/mx6

[...]

Regards

Markus
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Re: [U-Boot] [PATCH v2 0/5] Introduce BIT and GENMASK

2015-05-12 Thread Marek Vasut
On Tuesday, May 12, 2015 at 01:25:30 PM, Jagan Teki wrote:
 On 10 May 2015 at 20:52, Jagan Teki jt...@openedev.com wrote:
  I have sent one v1 for BIT macro change for entire u-boot,
  but this time I'm just introduce by changing this with spi/sf
  code, will send more in changes in future.
  
  Along with BIT and also introduces GENMASK with spi/sf code.
  
  Changes for v2:
  - break the BIT macro patch only for spi/sf code.
  
  thanks!
  Jagan.
  
  Jagan Teki (5):
spi/sf: Add BIT macro in linux/bitops.h
spi: Remove #define BIT in local file
spi/sf: Use BIT macro from linux/bitops.h
linux/bitops.h: GENMASK copy from linux
spi: Use GENMASK instead of numeric hexcodes
 
 Any comments on this series - early push will have enough time to test and
 I have more patches that need to use these macros.

I'm not very fond of this macro, it makes the code more cryptic .

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3 1/2] arch: Make board selection choices optional

2015-05-12 Thread Stephen Warren

On 05/12/2015 01:46 PM, Joe Hershberger wrote:

By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.


The series,
Acked-by: Stephen Warren swar...@nvidia.com

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Re: [U-Boot] [PATCH v3 1/2] arch: Make board selection choices optional

2015-05-12 Thread Joe Hershberger
Hi Tom,

On Tue, May 12, 2015 at 4:55 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 05/12/2015 01:46 PM, Joe Hershberger wrote:

 By making the board selections optional, every defconfig will include
 the board selection when running savedefconfig so if a new board is
 added to the top of the list of choices the former top's defconfig will
 still be correct.


 The series,
 Acked-by: Stephen Warren swar...@nvidia.com

Please pull this in ASAP.

Thanks,
-Joe
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[U-Boot] [PATCH] board: add support for Vision System's Baltos Industrial PC

2015-05-12 Thread Felipe Balbi
From: Yegor Yefremov yegorsli...@googlemail.com

Vision Systems's Baltos is based on AM335x SoC
from Texas Instruments. This patch adds support
such Industrial PCs in mainline u-boot.

[ ba...@ti.com: updated original patch to current u-boot ]

Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
Signed-off-by: Felipe Balbi ba...@ti.com
---

This is a respin of patch available from [1]

[1] 
https://github.com/visionsystemsgmbh/onrisc_br_bsp/blob/master/board/vscom/u-boot-patches/2014.07/uboot-0001-Add-support-for-Baltos-system.patch

 arch/arm/Kconfig|   6 +
 board/vscom/baltos/Kconfig  |  33 +++
 board/vscom/baltos/Makefile |  13 ++
 board/vscom/baltos/README   |   1 +
 board/vscom/baltos/board.c  | 474 
 board/vscom/baltos/board.h  |  90 
 board/vscom/baltos/mux.c| 194 
 board/vscom/baltos/u-boot.lds   | 128 +++
 configs/am335x_baltos_defconfig |   7 +
 include/configs/baltos.h| 346 +
 10 files changed, 1292 insertions(+)
 create mode 100644 board/vscom/baltos/Kconfig
 create mode 100644 board/vscom/baltos/Makefile
 create mode 100644 board/vscom/baltos/README
 create mode 100644 board/vscom/baltos/board.c
 create mode 100644 board/vscom/baltos/board.h
 create mode 100644 board/vscom/baltos/mux.c
 create mode 100644 board/vscom/baltos/u-boot.lds
 create mode 100644 configs/am335x_baltos_defconfig
 create mode 100644 include/configs/baltos.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7ed0e2052107..608c39f91843 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -376,6 +376,11 @@ config TARGET_AM335X_EVM
select CPU_V7
select SUPPORT_SPL
 
+config TARGET_AM335X_BALTOS
+   bool Support am335x_baltos
+   select CPU_V7
+   select SUPPORT_SPL
+
 config TARGET_AM43XX_EVM
bool Support am43xx_evm
select CPU_V7
@@ -868,6 +873,7 @@ source board/st/stv0991/Kconfig
 source board/sunxi/Kconfig
 source board/syteco/zmx25/Kconfig
 source board/tbs/tbs2910/Kconfig
+source board/vscom/baltos/Kconfig
 source board/ti/am335x/Kconfig
 source board/ti/am43xx/Kconfig
 source board/birdland/bav335x/Kconfig
diff --git a/board/vscom/baltos/Kconfig b/board/vscom/baltos/Kconfig
new file mode 100644
index ..880b6f2ee5f3
--- /dev/null
+++ b/board/vscom/baltos/Kconfig
@@ -0,0 +1,33 @@
+if TARGET_AM335X_BALTOS
+
+config SYS_BOARD
+   default baltos
+
+config SYS_VENDOR
+   default vscom
+
+config SYS_SOC
+   default am33xx
+
+config SYS_CONFIG_NAME
+   default baltos
+
+config CONS_INDEX
+   int UART used for console
+   range 1 6
+   default 1
+   help
+ The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
+ in documentation, etc) available to it.  Depending on your specific
+ board you may want something other than UART0.
+
+config DM
+   default y
+
+config DM_GPIO
+   default y if DM
+
+config DM_SERIAL
+   default y if DM
+
+endif
diff --git a/board/vscom/baltos/Makefile b/board/vscom/baltos/Makefile
new file mode 100644
index ..804ac379dbd4
--- /dev/null
+++ b/board/vscom/baltos/Makefile
@@ -0,0 +1,13 @@
+#
+# Makefile
+#
+# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+obj-y  := mux.o
+endif
+
+obj-y  += board.o
diff --git a/board/vscom/baltos/README b/board/vscom/baltos/README
new file mode 100644
index ..f744ace9972f
--- /dev/null
+++ b/board/vscom/baltos/README
@@ -0,0 +1 @@
+BSP for VScom OnRISC Balios family devices, like Balios iR 5221.
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
new file mode 100644
index ..69264b706b10
--- /dev/null
+++ b/board/vscom/baltos/board.c
@@ -0,0 +1,474 @@
+/*
+ * board.c
+ *
+ * Board functions for TI AM335X based boards
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include spl.h
+#include asm/arch/cpu.h
+#include asm/arch/hardware.h
+#include asm/arch/omap.h
+#include asm/arch/ddr_defs.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc_host_def.h
+#include asm/arch/sys_proto.h
+#include asm/arch/mem.h
+#include asm/arch/mux.h
+#include asm/io.h
+#include asm/emif.h
+#include asm/gpio.h
+#include i2c.h
+#include miiphy.h
+#include cpsw.h
+#include power/tps65217.h
+#include power/tps65910.h
+#include environment.h
+#include watchdog.h
+#include board.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* GPIO that controls power to DDR on EVM-SK */
+#define GPIO_DDR_VTT_EN7
+#define DIP_S1 44
+
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+static int baltos_set_console(void)
+{
+   int val, i, dips = 0;
+   char buf[7];

Re: [U-Boot] [PATCH 09/24] arm: Include the .got section in the binary

2015-05-12 Thread Simon Glass
On 4 May 2015 at 11:31, Simon Glass s...@chromium.org wrote:
 Commit 47ed5dd0 dropped the .got section from U-Boot binaries. This is needed
 for some relocations, and causes failures if missing. Add it back.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

  arch/arm/config.mk | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)


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Re: [U-Boot] [PATCH 07/24] tpm: Rename Infineon TPM to slb9645tt

2015-05-12 Thread Simon Glass
On 4 May 2015 at 11:31, Simon Glass s...@chromium.org wrote:
 This name is used in Linux, so use it in U-Boot.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

  arch/arm/dts/exynos5420-peach-pit.dts | 2 +-
  arch/arm/dts/exynos5800-peach-pi.dts  | 2 +-
  lib/fdtdec.c  | 2 +-
  3 files changed, 3 insertions(+), 3 deletions(-)

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Re: [U-Boot] [PATCH 14/24] sandbox: Correct error handling in state_read_file()

2015-05-12 Thread Simon Glass
On 4 May 2015 at 15:12, Joe Hershberger joe.hershber...@gmail.com wrote:
 Hi Simon,

 On Mon, May 4, 2015 at 12:31 PM, Simon Glass s...@chromium.org wrote:
 This function should return a useful error for U-Boot, rather than -1.

 Signed-off-by: Simon Glass s...@chromium.org
 ---
 Reviewed-by: Joe Hershberger joe.hershber...@ni.com

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Re: [U-Boot] [PATCH 15/24] sandbox: Add missing errno.h includes in a few files

2015-05-12 Thread Simon Glass
On 4 May 2015 at 11:31, Simon Glass s...@chromium.org wrote:
 These files use error numbering, so add the include.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

  arch/sandbox/cpu/start.c   | 1 +
  drivers/misc/i2c_eeprom_emul.c | 1 +
  drivers/misc/swap_case.c   | 1 +
  3 files changed, 3 insertions(+)

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Re: [U-Boot] [PATCH 10/24] arm: Add a prototype for save_boot_params_ret()

2015-05-12 Thread Simon Glass
On 4 May 2015 at 15:09, Joe Hershberger joe.hershber...@gmail.com wrote:
 Hi Simon,

 On Mon, May 4, 2015 at 12:31 PM, Simon Glass s...@chromium.org wrote:
 It is convenient for some boards to implement save_boot_params() in C rather
 than assembler. Provide a way to return in this case.

 Signed-off-by: Simon Glass s...@chromium.org
 ---
 Reviewed-by: Joe Hershberger joe.hershber...@ni.com

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Re: [U-Boot] [PATCH 16/24] sandbox: cros_ec: Support EC_CMD_ENTERING_MODE emulation

2015-05-12 Thread Simon Glass
On 4 May 2015 at 11:31, Simon Glass s...@chromium.org wrote:
 Emualate this function which is used with Chrome OS verified boot.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

  drivers/misc/cros_ec_sandbox.c |  2 ++
  include/ec_commands.h  | 15 +++
  2 files changed, 17 insertions(+)


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Re: [U-Boot] [PATCH 08/24] dm: gpio: Fix comment typo in GPIOD_IS_IN

2015-05-12 Thread Simon Glass
On 4 May 2015 at 11:31, Simon Glass s...@chromium.org wrote:
 This should say 'in', not 'out'.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

  include/asm-generic/gpio.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH] serial: stm32: Automatically generate CR when LF is observed

2015-05-12 Thread Tom Rini
On Tue, May 12, 2015 at 10:35:55PM +0200, Kamil Lulko wrote:

 Strange, this was already posted by Kunhua Huang - then reverted in
 commit 698a12bef9e782dcd99c555a739c16eec8669f14. Anyway, yes this
 carriage return should be added there. I simply forgot it since I had
 implicit CR for each LF turned on in my terminal. Never thought this
 would cause so much havoc for users ;)

I reverted it since the author said it wasn't needed with the other
patch they did being applied.  Daniel, can you confirm the odd behavior
exists with top of tree? Thanks!

-- 
Tom


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[U-Boot] [PATCH 1/4] arm: mvebu: Disable L2 cache before enabling d-cache

2015-05-12 Thread Kevin Smith
From: Stefan Roese s...@denx.de

L2 cache may still be enabled by the BootROM. We need to first disable
it before enabling d-cache support.

Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Kevin Smith kevin.sm...@elecsyscorp.com
---
 arch/arm/mach-mvebu/cpu.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 04681fc..417fc35 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -7,6 +7,7 @@
 #include common.h
 #include netdev.h
 #include asm/io.h
+#include asm/pl310.h
 #include asm/arch/cpu.h
 #include asm/arch/soc.h
 
@@ -240,6 +241,13 @@ int cpu_eth_init(bd_t *bis)
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
+   struct pl310_regs *const pl310 =
+   (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+   /* First disable L2 cache - may still be enable from BootROM */
+   if (mvebu_soc_family() == MVEBU_SOC_A38X)
+   clrbits_le32(pl310-pl310_ctrl, L2X0_CTRL_EN);
+
/* Avoid problem with e.g. neta ethernet driver */
invalidate_dcache_all();
 
-- 
2.3.2
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[U-Boot] [PATCH 2/4] arm: mvebu: Update CBAR with SOC regs base

2015-05-12 Thread Kevin Smith
SMP-enabled Linux kernels read the CBAR register in CP15 to find
the address of the SCU registers.  After remapping internal
registers, also update the CBAR so the kernel can find them.

Signed-off-by: Kevin Smith kevin.sm...@elecsyscorp.com
---
 arch/arm/mach-mvebu/cpu.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 417fc35..2ac5349 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -161,10 +161,17 @@ static void update_sdram_window_sizes(void)
 }
 
 #ifdef CONFIG_ARCH_CPU_INIT
+static void set_cbar (u32 addr)
+{
+asm (mcr p15, 4, %0, c15, c0 : : r (addr));
+}
+
+
 int arch_cpu_init(void)
 {
/* Linux expects the internal registers to be at 0xf100 */
writel(SOC_REGS_PHY_BASE, INTREG_BASE_ADDR_REG);
+   set_cbar (SOC_REGS_PHY_BASE);
 
/*
 * We need to call mvebu_mbus_probe() before calling
-- 
2.3.2
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[U-Boot] [PATCH 3/4] mv-common.h: Include support for device trees

2015-05-12 Thread Kevin Smith
Signed-off-by: Kevin Smith kevin.sm...@elecsyscorp.com
---
 include/configs/mv-common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index 51436da..03518b0 100644
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -59,6 +59,8 @@
 #define CONFIG_BOOTDELAY   3   /* default enable autoboot */
 #define CONFIG_PREBOOT
 
+#define CONFIG_OF_LIBFDT   1   /* Device tree support */
+
 /*
  * For booting Linux, the board info and command line data
  * have to be in the first 8 MB of memory, since this is
-- 
2.3.2
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[U-Boot] [PATCH 0/4] arm: mvebu: Allow DB-88F6820-GP to boot Linux

2015-05-12 Thread Kevin Smith
Changes needed to allow the DB-88F6820-GP development board to successfully
boot a Linux kernel.

Kevin Smith (3):
  arm: mvebu: Update CBAR with SOC regs base
  mv-common.h: Include support for device trees
  db-88f6820-gp.h: Load data blobs into lower memory

Stefan Roese (1):
  arm: mvebu: Disable L2 cache before enabling d-cache

 arch/arm/mach-mvebu/cpu.c   | 15 +++
 include/configs/db-88f6820-gp.h |  5 +
 include/configs/mv-common.h |  2 ++
 3 files changed, 22 insertions(+)

-- 
2.3.2
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[U-Boot] Pull request: u-boot-tegra/master

2015-05-12 Thread Tom Warren
Tom,

Please pull u-boot-tegra/master into u-boot/master. ./MAKEALL -s tegra is
clean. Thanks.

The following changes since commit b939689c7b87773c44275a578ffc8674a867e39d:

  Merge branch 'u-boot/master' into 'u-boot-arm/master' (2015-05-05
10:09:06 +0200)

are available in the git repository at:


  git://git.denx.de/u-boot-tegra.git master

for you to fetch changes up to 5168604f3b7e5b8ea077a69fe9acb7c14a36adf7:

  jetson-tk1: Add PSCI configuration options and reserve secure code
(2015-05-11 08:35:13 -0700)


Ian Campbell (3):
  tegra124: Add more registers to struct mc_ctlr
  tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
  jetson-tk1: Add PSCI configuration options and reserve secure code

Jan Kiszka (13):
  ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditions
  sun7i: Remove duplicate call to psci_arch_init
  ARM: Factor out common psci_get_cpu_id
  ARM: Factor out reusable psci_cpu_off_common
  ARM: Factor out reusable psci_cpu_entry
  ARM: Factor out reusable psci_get_cpu_stack_top
  ARM: Put target PC for PSCI CPU_ON on per-CPU stack
  virt-dt: Allow reservation of secure region when in a RAM carveout
  tegra: Make tegra_powergate_power_on public
  ARM: Add board-specific initialization hook for PSCI
  tegra124: Add PSCI support for Tegra124
  tegra: Set CNTFRQ for secondary CPUs
  tegra: Boot in non-secure mode by default

Simon Glass (26):
  dm: core: Sort the uclasses
  dm: gpio: Add error handling and a function to claim vector GPIOs
  fdt: Add binding decode function for display-timings
  tegra: Move the pwm into tegra-common
  tegra: pwm: Allow the clock rate to be left as is
  tegra: Move checkboard() into the board code
  tegra: Add a board ID function
  power: Export register access functions from as3722
  tegra: Provide a function to allow LCD PMIC setup
  tegra: Add support for setting up a as3722 PMIC
  tegra: nyan-big: Add LCD PMIC init and board ID
  tegra124: dts: Add host1x node to provide display information
  tegra: config: Use CONFIG_LCD to detect LCD presence
  tegra: clock: Add checking for invalid clock IDs
  tegra: clock: Split the clock source code into a separate function
  tegra124: clock: Add display clocks and functions
  tegra: Move display controller header into common
  video: Add drm_dp_helper.h
  edid: Add a function to read detailed monitor timings
  dm: video: Add a uclass for display port
  tegra: dts: nyan-big: Add definitions for eDP display
  tegra: video: Support serial output resource (SOR) on tegra124
  tegra: video: Add Embedded DisplayPort driver
  tegra: video: support eDP displays on Tegra124 devices
  tegra: config: nyan-big: Enable LCD
  tegra124: video: Add full link training for eDP

Stephen Warren (2):
  ARM: tegra: CONFIG_{SYS_, }LOAD{_, }ADDR rationalization
  ARM: tegra: enable STDIO deregistration

Thierry Reding (1):
  ARM: tegra: Enable SMMU when going non-secure

 arch/arm/cpu/armv7/Kconfig |2 +-
 arch/arm/cpu/armv7/Makefile|2 +-
 arch/arm/cpu/armv7/ls102xa/cpu.c   |2 +-
 arch/arm/cpu/armv7/psci.S  |  121 ++
 arch/arm/cpu/armv7/sunxi/psci.S|  112 +-
 arch/arm/cpu/armv7/virt-dt.c   |   31 +-
 arch/arm/cpu/armv7/virt-v7.c   |   11 +
 arch/arm/cpu/u-boot.lds|2 +-
 arch/arm/dts/tegra124-nyan-big.dts |   47 +
 arch/arm/dts/tegra124.dtsi |   84 +
 arch/arm/include/asm/arch-tegra/clk_rst.h  |   15 +-
 arch/arm/include/asm/arch-tegra/clock.h|   14 +
 .../include/asm/{arch-tegra20 = arch-tegra}/dc.h  |   67 +-
 arch/arm/include/asm/arch-tegra/powergate.h|1 +
 arch/arm/include/asm/arch-tegra/pwm.h  |   60 +
 arch/arm/include/asm/arch-tegra/sys_proto.h|   19 +-
 arch/arm/include/asm/arch-tegra124/clock-tables.h  |3 +-
 arch/arm/include/asm/arch-tegra124/clock.h |   21 +
 arch/arm/include/asm/arch-tegra124/display.h   |   58 +
 arch/arm/include/asm/arch-tegra124/flow.h  |6 +
 arch/arm/include/asm/arch-tegra124/mc.h|   37 +-
 arch/arm/include/asm/arch-tegra124/pwm.h   |   14 +
 arch/arm/include/asm/arch-tegra20/display.h|2 +-
 arch/arm/include/asm/arch-tegra20/pwm.h|   54 +-
 arch/arm/include/asm/armv7.h   |5 +-
 arch/arm/include/asm/psci.h|1 +
 arch/arm/include/asm/system.h  |1 +
 arch/arm/lib/bootm-fdt.c   |8 +-
 arch/arm/lib/bootm.c   |6 +-
 arch/arm/mach-tegra/Makefile   |5 +
 

Re: [U-Boot] [PATCH v3 1/2] arch: Make board selection choices optional

2015-05-12 Thread Tom Rini
On Tue, May 12, 2015 at 02:46:23PM -0500, Joe Hershberger wrote:

 By making the board selections optional, every defconfig will include
 the board selection when running savedefconfig so if a new board is
 added to the top of the list of choices the former top's defconfig will
 still be correct.
 
 Signed-off-by: Joe Hershberger joe.hershber...@ni.com
 Cc: Masahiro Yamada yamada.masah...@socionext.com
 Acked-by: Stephen Warren swar...@wwwdotorg.org
 Cc: Tom Rini tr...@konsulko.com
 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v3 2/2] Clean all defconfigs with savedefconfig

2015-05-12 Thread Tom Rini
On Tue, May 12, 2015 at 02:46:24PM -0500, Joe Hershberger wrote:

 In order to reduce merge conflicts and to maintain the simplest possible
 defconfig files, we should be using the savedefconfig feature of Kconfig
 every time a new feature is added. This keeps the defconfig settings to
 a minimum (only those things not default) and keeps them in the same
 order as the Kconfig options.
 
 Signed-off-by: Joe Hershberger joe.hershber...@ni.com
 Cc: Masahiro Yamada yamada.masah...@socionext.com
 Acked-by: Stephen Warren swar...@wwwdotorg.org
 Cc: Tom Rini tr...@konsulko.com
 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH 19/24] sandbox: Support wide-screen LCD emulation

2015-05-12 Thread Simon Glass
On 4 May 2015 at 15:36, Simon Glass s...@chromium.org wrote:
 Hi Joe,

 On 4 May 2015 at 15:27, Joe Hershberger joe.hershber...@gmail.com wrote:
 Hi Simon,

 On Mon, May 4, 2015 at 12:31 PM, Simon Glass s...@chromium.org wrote:
 Increase the LCD size to 1366x768.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Is this actually emulated somehow? Maybe I just don't see it since I'm
 SSH'ed into my build machine?

 Yes, plus you need the -l option.

 Regards,
 Simon

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