[U-Boot] [PATCH] ARM: k2e/l: Apply WA for selecting PA clock source

2015-10-07 Thread Lokesh Vutla
On keystone2 Lamarr and Edison platforms, the PA clocksource
mux in PLL REG1, can be changed only after enabling its clock
domain.
So selecting the output of PASS PLL as input to PA only after
enabling the clockdomain.
This is as per the debug done by "Vitaly Andrianov "
and based on the previous work done by "Hao Zhang "

Fixes: d634a0775bcf ("ARM: keystone2: Cleanup PLL init code")
Reported-by: Vitaly Andrianov 
Tested-by: Vitaly Andrianov 
Signed-off-by: Lokesh Vutla 
---
 arch/arm/mach-keystone/clock.c  | 10 +++---
 arch/arm/mach-keystone/include/mach/clock.h |  1 +
 board/ti/ks2_evm/board.c|  4 
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index fc3eadb..6cb6467 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -33,6 +33,11 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1},
 };
 
+inline void pll_pa_clk_sel(void)
+{
+   setbits_le32(keystone_pll_regs[PASS_PLL].reg1, CFG_PLLCTL1_PAPLL_MASK);
+}
+
 static void wait_for_completion(const struct pll_init_data *data)
 {
int i;
@@ -180,9 +185,8 @@ void configure_secondary_pll(const struct pll_init_data 
*data)
sdelay(21000);
 
/* Select the Output of PASS PLL as input to PASS */
-   if (data->pll == PASS_PLL)
-   setbits_le32(keystone_pll_regs[data->pll].reg1,
-CFG_PLLCTL1_PAPLL_MASK);
+   if (data->pll == PASS_PLL && cpu_is_k2hk())
+   pll_pa_clk_sel();
 
/* Select the Output of ARM PLL as input to ARM */
if (data->pll == TETRIS_PLL)
diff --git a/arch/arm/mach-keystone/include/mach/clock.h 
b/arch/arm/mach-keystone/include/mach/clock.h
index ddc5f8e..7e51702 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -118,6 +118,7 @@ unsigned long clk_round_rate(unsigned int clk, unsigned 
long hz);
 int clk_set_rate(unsigned int clk, unsigned long hz);
 int get_max_dev_speed(void);
 int get_max_arm_speed(void);
+void pll_pa_clk_sel(void);
 
 #endif
 #endif
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 859a260..bee42bc 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -81,6 +82,9 @@ int board_eth_init(bd_t *bis)
if (psc_enable_module(KS2_LPSC_CRYPTO))
return -1;
 
+   if (cpu_is_k2e() || cpu_is_k2l())
+   pll_pa_clk_sel();
+
port_num = get_num_eth_ports();
 
for (j = 0; j < port_num; j++) {
-- 
2.1.4

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[U-Boot] [PATCH v3 3/3] net: eth: Check return value in various places

2015-10-07 Thread Bin Meng
eth_get_dev() can return NULL which means device_probe() fails for
that ethernet device. Add return value check in various places or
U-Boot will crash due to NULL pointer access.

With this commit, 'dm_test_eth_act' test case passes.

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 

---

Changes in v3: None
Changes in v2:
- Change check logic in eth_init() (do not use break)
- Add device_probe() return value check

 net/eth.c | 43 +--
 1 file changed, 25 insertions(+), 18 deletions(-)

diff --git a/net/eth.c b/net/eth.c
index 0d66f33..a754651 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -179,8 +179,12 @@ struct udevice *eth_get_dev(void)
  */
 static void eth_set_dev(struct udevice *dev)
 {
-   if (dev && !device_active(dev))
+   if (dev && !device_active(dev)) {
eth_errno = device_probe(dev);
+   if (eth_errno)
+   dev = NULL;
+   }
+
eth_get_uclass_priv()->current = dev;
 }
 
@@ -213,10 +217,9 @@ struct udevice *eth_get_dev_by_name(const char *devname)
 * match an alias or it will match a literal name and we'll pick
 * up the error when we try to probe again in eth_set_dev().
 */
-   device_probe(it);
-   /*
-* Check for the name or the sequence number to match
-*/
+   if (device_probe(it))
+   continue;
+   /* Check for the name or the sequence number to match */
if (strcmp(it->name, devname) == 0 ||
(endp > startp && it->seq == seq))
return it;
@@ -346,23 +349,27 @@ int eth_init(void)
 
old_current = current;
do {
-   debug("Trying %s\n", current->name);
-
-   if (device_active(current)) {
-   ret = eth_get_ops(current)->start(current);
-   if (ret >= 0) {
-   struct eth_device_priv *priv =
-   current->uclass_priv;
-
-   priv->state = ETH_STATE_ACTIVE;
-   return 0;
+   if (current) {
+   debug("Trying %s\n", current->name);
+
+   if (device_active(current)) {
+   ret = eth_get_ops(current)->start(current);
+   if (ret >= 0) {
+   struct eth_device_priv *priv =
+   current->uclass_priv;
+
+   priv->state = ETH_STATE_ACTIVE;
+   return 0;
+   }
+   } else {
+   ret = eth_errno;
}
+
+   debug("FAIL\n");
} else {
-   ret = eth_errno;
+   debug("PROBE FAIL\n");
}
 
-   debug("FAIL\n");
-
/*
 * If ethrotate is enabled, this will change "current",
 * otherwise we will drop out of this while loop immediately
-- 
1.8.2.1

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[U-Boot] [PATCH v3 1/3] net: eth: Clear MAC address in eth_pre_remove()

2015-10-07 Thread Bin Meng
platdata->enetaddr was assigned to a value in dev_probe() last time.
If we don't clear it, for dev_probe() at the second time, dm eth
will end up treating it as a MAC address from ROM no matter where it
came from originally (maybe env, ROM, or even random). Fix this by
clearing platdata->enetaddr when removing an Ethernet device.

Signed-off-by: Bin Meng 

---

Changes in v3:
- Update commit message to mention the reason of why

Changes in v2:
- New patch to clear MAC address in eth_pre_remove()

 net/eth.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/net/eth.c b/net/eth.c
index 2e24b55..0d66f33 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -575,8 +575,13 @@ static int eth_post_probe(struct udevice *dev)
 
 static int eth_pre_remove(struct udevice *dev)
 {
+   struct eth_pdata *pdata = dev->platdata;
+
eth_get_ops(dev)->stop(dev);
 
+   /* clear the MAC address */
+   memset(pdata->enetaddr, 0, 6);
+
return 0;
 }
 
-- 
1.8.2.1

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[U-Boot] [PATCH v3 2/3] dm: test: Add a new test case against dm eth codes for NULL pointer access

2015-10-07 Thread Bin Meng
U-Boot crashes when doing a 'ping' with the following test scenario:

  - All ethernet devices are not probed
  - "ethaddr" for all ethernet devices are not set
  - "ethact" is set to a valid ethernet device name

Add a new test case 'dm_test_eth_act' to hit such scenario.

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 

---

Changes in v3: None
Changes in v2:
- New patch to add a new test case against dm eth codes for NULL pointer access

 test/dm/eth.c | 64 +++
 1 file changed, 64 insertions(+)

diff --git a/test/dm/eth.c b/test/dm/eth.c
index fcfb3e1..6288ae2 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -13,11 +13,15 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define DM_TEST_ETH_NUM4
+
 static int dm_test_eth(struct unit_test_state *uts)
 {
net_ping_ip = string_to_ip("1.1.2.2");
@@ -82,6 +86,66 @@ static int dm_test_eth_prime(struct unit_test_state *uts)
 }
 DM_TEST(dm_test_eth_prime, DM_TESTF_SCAN_FDT);
 
+/**
+ * This test case is trying to test the following scenario:
+ * - All ethernet devices are not probed
+ * - "ethaddr" for all ethernet devices are not set
+ * - "ethact" is set to a valid ethernet device name
+ *
+ * With Sandbox default test configuration, all ethernet devices are
+ * probed after power-up, so we have to manually create such scenario:
+ * - Remove all ethernet devices
+ * - Remove all "ethaddr" environment variables
+ * - Set "ethact" to the first ethernet device
+ *
+ * Do a ping test to see if anything goes wrong.
+ */
+static int dm_test_eth_act(struct unit_test_state *uts)
+{
+   struct udevice *dev[DM_TEST_ETH_NUM];
+   const char *ethname[DM_TEST_ETH_NUM] = {"eth@10002000", "eth@10003000",
+   "sbe5", "eth@10004000"};
+   const char *addrname[DM_TEST_ETH_NUM] = {"ethaddr", "eth5addr",
+"eth3addr", "eth1addr"};
+   char ethaddr[DM_TEST_ETH_NUM][18];
+   int i;
+
+   net_ping_ip = string_to_ip("1.1.2.2");
+
+   /* Prepare the test scenario */
+   for (i = 0; i < DM_TEST_ETH_NUM; i++) {
+   ut_assertok(uclass_find_device_by_name(UCLASS_ETH,
+  ethname[i], &dev[i]));
+   ut_assertok(device_remove(dev[i]));
+
+   /* Invalidate MAC address */
+   strcpy(ethaddr[i], getenv(addrname[i]));
+   /* Must disable access protection for ethaddr before clearing */
+   setenv(".flags", addrname[i]);
+   setenv(addrname[i], NULL);
+   }
+
+   /* Set ethact to "eth@10002000" */
+   setenv("ethact", ethname[0]);
+
+   /* Segment fault might happen if something is wrong */
+   ut_asserteq(-ENODEV, net_loop(PING));
+
+   for (i = 0; i < DM_TEST_ETH_NUM; i++) {
+   /* Restore the env */
+   setenv(".flags", addrname[i]);
+   setenv(addrname[i], ethaddr[i]);
+
+   /* Probe the device again */
+   ut_assertok(device_probe(dev[i]));
+   }
+   setenv(".flags", NULL);
+   setenv("ethact", NULL);
+
+   return 0;
+}
+DM_TEST(dm_test_eth_act, DM_TESTF_SCAN_FDT);
+
 /* The asserts include a return on fail; cleanup in the caller */
 static int _dm_test_eth_rotate1(struct unit_test_state *uts)
 {
-- 
1.8.2.1

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Re: [U-Boot] Inconsistencies in commands regarding load_addr

2015-10-07 Thread Wolfgang Denk
Dear BenoƮt,

In message <5613e20f.8060...@wsystem.com> you wrote:
> 
> I've just noticed that before the commit
> 045fa1e1142552799ad3203e9e0bc22a11e866ea, ext2load and ext4load were setting 
> the
> load_addr global variable, but not fatload. Since then, none of these commands
> set load_addr (initially derived from the loadaddr environment variable).

That's bad.

> ubifsload also does not set load_addr, but a quick grep shows that some other
> filesystem commands set it, e.g. for zfs, jffs2, reiser or cramfs.
> 
> Also, some commands set it only on success, while some other commands set it
> from the command line arguments unconditionally.
> 
> What's the expected correct behavior here?

After successful loading the data to memory, load_addr should be set
correctly, for all commands.  In the error case, the value of
load_addr is undefined.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
A verbal contract isn't worth the paper it's written on.
-- Samuel Goldwyn
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[U-Boot] [PATCH v2 4/4] dm: core: Remove unnecessary codes in uclass_pre_remove_device()

2015-10-07 Thread Bin Meng
dev->uclass->uc_drv->per_device_auto_alloc_size is to be freed in
device_free(), so is dev->seq. Remove these unnecessary codes.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass 

---

Changes in v2:
- Drop the v1 patch: "dm: core: Remove the call to device_free()"

 drivers/core/uclass.c | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index e800c28..1af0947 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -523,22 +523,15 @@ int uclass_post_probe_device(struct udevice *dev)
 #if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
 int uclass_pre_remove_device(struct udevice *dev)
 {
-   struct uclass_driver *uc_drv;
struct uclass *uc;
int ret;
 
uc = dev->uclass;
-   uc_drv = uc->uc_drv;
if (uc->uc_drv->pre_remove) {
ret = uc->uc_drv->pre_remove(dev);
if (ret)
return ret;
}
-   if (uc_drv->per_device_auto_alloc_size) {
-   free(dev->uclass_priv);
-   dev->uclass_priv = NULL;
-   }
-   dev->seq = -1;
 
return 0;
 }
-- 
1.8.2.1

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[U-Boot] [PATCH v2 3/4] net: pch_gbe: Add driver remove support

2015-10-07 Thread Bin Meng
In pch_gbe_probe(), some additional resources are allocated
(eg: mdio, phy). We should free these in the driver remove phase.
Add pch_gbe_remove() to clean it up.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v2: None

 drivers/net/pch_gbe.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index 004fcf8..dfc0100 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -452,6 +452,17 @@ int pch_gbe_probe(struct udevice *dev)
return pch_gbe_phy_init(dev);
 }
 
+int pch_gbe_remove(struct udevice *dev)
+{
+   struct pch_gbe_priv *priv = dev_get_priv(dev);
+
+   free(priv->phydev);
+   mdio_unregister(priv->bus);
+   mdio_free(priv->bus);
+
+   return 0;
+}
+
 static const struct eth_ops pch_gbe_ops = {
.start = pch_gbe_start,
.send = pch_gbe_send,
@@ -470,6 +481,7 @@ U_BOOT_DRIVER(eth_pch_gbe) = {
.id = UCLASS_ETH,
.of_match = pch_gbe_ids,
.probe = pch_gbe_probe,
+   .remove = pch_gbe_remove,
.ops = &pch_gbe_ops,
.priv_auto_alloc_size = sizeof(struct pch_gbe_priv),
.platdata_auto_alloc_size = sizeof(struct eth_pdata),
-- 
1.8.2.1

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[U-Boot] [PATCH v2 1/4] net: mdio: Add mdio_free() and mdio_unregister() API

2015-10-07 Thread Bin Meng
Currently there is no API to uninitialize mdio. Add two APIs for this.

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 
---

Changes in v2: None

 common/miiphyutil.c | 19 +++
 include/miiphy.h|  2 ++
 2 files changed, 21 insertions(+)

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index c88c28a..e499b58 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -152,6 +152,11 @@ struct mii_dev *mdio_alloc(void)
return bus;
 }
 
+void mdio_free(struct mii_dev *bus)
+{
+   free(bus);
+}
+
 int mdio_register(struct mii_dev *bus)
 {
if (!bus || !bus->name || !bus->read || !bus->write)
@@ -173,6 +178,20 @@ int mdio_register(struct mii_dev *bus)
return 0;
 }
 
+int mdio_unregister(struct mii_dev *bus)
+{
+   if (!bus)
+   return 0;
+
+   /* delete it from the list */
+   list_del(&bus->link);
+
+   if (current_mii == bus)
+   current_mii = NULL;
+
+   return 0;
+}
+
 void mdio_list_devices(void)
 {
struct list_head *entry;
diff --git a/include/miiphy.h b/include/miiphy.h
index 088797e..af12274 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -59,7 +59,9 @@ struct phy_device *mdio_phydev_for_ethname(const char 
*devname);
 void miiphy_listdev(void);
 
 struct mii_dev *mdio_alloc(void);
+void mdio_free(struct mii_dev *bus);
 int mdio_register(struct mii_dev *bus);
+int mdio_unregister(struct mii_dev *bus);
 void mdio_list_devices(void);
 
 #ifdef CONFIG_BITBANGMII
-- 
1.8.2.1

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[U-Boot] [PATCH v2 2/4] net: designware: Add driver remove support

2015-10-07 Thread Bin Meng
In designware_eth_probe(), some additional resources are allocated
(eg: mdio, phy). We should free these in the driver remove phase.
Add designware_eth_remove() to clean it up.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass 
---

Changes in v2: None

 drivers/net/designware.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 6433896..a6c39c3 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -613,6 +613,17 @@ static int designware_eth_probe(struct udevice *dev)
return ret;
 }
 
+static int designware_eth_remove(struct udevice *dev)
+{
+   struct dw_eth_dev *priv = dev_get_priv(dev);
+
+   free(priv->phydev);
+   mdio_unregister(priv->bus);
+   mdio_free(priv->bus);
+
+   return 0;
+}
+
 static const struct eth_ops designware_eth_ops = {
.start  = designware_eth_start,
.send   = designware_eth_send,
@@ -653,6 +664,7 @@ U_BOOT_DRIVER(eth_designware) = {
.ofdata_to_platdata = designware_eth_ofdata_to_platdata,
.bind   = designware_eth_bind,
.probe  = designware_eth_probe,
+   .remove = designware_eth_remove,
.ops= &designware_eth_ops,
.priv_auto_alloc_size = sizeof(struct dw_eth_dev),
.platdata_auto_alloc_size = sizeof(struct eth_pdata),
-- 
1.8.2.1

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[U-Boot] [PATCH v2 3/3] net: phy: Test previous phydev->dev against new mac dev

2015-10-07 Thread Bin Meng
In phy_connect_dev(), if the phy device has an accociated mac device
before, a warning message will be printed. But we should test the
old device against the new one, if they are actually the same one,
don't print the warning message.

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 

---

Changes in v2: None

 drivers/net/phy/phy.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index d0b3e85..d7364ff 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -789,7 +789,7 @@ void phy_connect_dev(struct phy_device *phydev, struct 
eth_device *dev)
 {
/* Soft Reset the PHY */
phy_reset(phydev);
-   if (phydev->dev) {
+   if (phydev->dev && phydev->dev != dev) {
printf("%s:%d is connected to %s.  Reconnecting to %s\n",
phydev->bus->name, phydev->addr,
phydev->dev->name, dev->name);
-- 
1.8.2.1

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[U-Boot] [PATCH v2 2/3] net: phy: Change to print all phys that are not found

2015-10-07 Thread Bin Meng
In get_phy_device_by_mask(), when no phy is found, currently we only
print a message to show the first phy address that is not found. But
this is not always the case as multiple phys can be specified by
phy_mask. Change to print all phys that are not found, and to reduce
the console boot log, change to use 'debug' instead of 'printf'.

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 
---

Changes in v2: None

 drivers/net/phy/phy.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 4063894..d0b3e85 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -671,7 +671,14 @@ static struct phy_device *get_phy_device_by_mask(struct 
mii_dev *bus,
if (phydev)
return phydev;
}
-   printf("Phy %d not found\n", ffs(phy_mask) - 1);
+
+   debug("\n%s PHY: ", bus->name);
+   while (phy_mask) {
+   int addr = ffs(phy_mask) - 1;
+   debug("%d ", addr);
+   phy_mask &= ~(1 << addr);
+   }
+   debug("not found\n");
 
return NULL;
 }
-- 
1.8.2.1

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[U-Boot] [PATCH v2 1/3] net: phy: Don't create phy device when there is no phy

2015-10-07 Thread Bin Meng
In get_phy_device_by_mask(), when no phy is found, we should not
create any phy device.

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 

---

Changes in v2:
- Rebase on u-boot/master

 drivers/net/phy/phy.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index a6023f1..4063894 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -672,7 +672,8 @@ static struct phy_device *get_phy_device_by_mask(struct 
mii_dev *bus,
return phydev;
}
printf("Phy %d not found\n", ffs(phy_mask) - 1);
-   return phy_device_create(bus, ffs(phy_mask) - 1, 0x, interface);
+
+   return NULL;
 }
 
 /**
-- 
1.8.2.1

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[U-Boot] [PATCH v3 12/12] doc: Complement document about booting VxWorks

2015-10-07 Thread Bin Meng
Current document about how to boot VxWorks is limited.
Add several chapters in README.vxworks to document this.

Signed-off-by: Bin Meng 
Reviewed-by: Tom Rini 

---

Changes in v3: None
Changes in v2:
- Describe typical values for bootaddr, e820data, e820info.

 doc/README.vxworks | 82 --
 doc/README.x86 |  2 ++
 2 files changed, 76 insertions(+), 8 deletions(-)

diff --git a/doc/README.vxworks b/doc/README.vxworks
index 4cb302e..3433e4f 100644
--- a/doc/README.vxworks
+++ b/doc/README.vxworks
@@ -1,19 +1,85 @@
-From VxWorks 6.9+ (not include 6.9), VxWorks starts adopting device tree as 
its hardware
-decription mechansim (for PowerPC and ARM), thus requiring boot interface 
changes.
+#
+# Copyright (C) 2013, Miao Yan 
+# Copyright (C) 2015, Bin Meng 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+VxWorks Support
+===
+
+This document describes the information about U-Boot loading VxWorks kernel.
+
+Status
+--
+U-Boot supports loading VxWorks kernels via 'bootvx' and 'bootm' commands.
+For booting old kernels (6.9.x) on PowerPC and ARM, and all kernel versions
+on other architectures, 'bootvx' shall be used. For booting VxWorks 7 kernels
+on PowerPC and ARM, 'bootm' shall be used.
+
+64-bit x86 kernel cannot be loaded as of today.
+
+VxWork 7 on PowerPC and ARM
+---
+From VxWorks 7, VxWorks starts adopting device tree as its hardware decription
+mechansim (for PowerPC and ARM), thus requiring boot interface changes.
 This section will describe the new interface.
 
-For PowerPC, the calling convention of the new VxWorks entry point conforms to 
the ePAPR standard,
-which is shown below (see ePAPR for more details):
+For PowerPC, the calling convention of the new VxWorks entry point conforms to
+the ePAPR standard, which is shown below (see ePAPR for more details):
 
-void (*kernel_entry)(fdt_addr,
-  0, 0, EPAPR_MAGIC, boot_IMA, 0, 0)
+void (*kernel_entry)(fdt_addr, 0, 0, EPAPR_MAGIC, boot_IMA, 0, 0)
 
 For ARM, the calling convention is show below:
 
 void (*kernel_entry)(void *fdt_addr)
 
-When booting new VxWorks kernel (uImage format), the parameters passed to 
bootm is like below:
+When booting new VxWorks kernel (uImage format), the parameters passed to bootm
+is like below:
 
 bootm  - 
 
-The do_bootvx command still works as it was for older VxWorks kernels.
+VxWorks bootline
+
+When using 'bootvx', the kernel bootline must be prepared by U-Boot at a
+board-specific address before loading VxWorks. U-Boot supplies its address
+via "bootaddr" environment variable. To check where the bootline should be
+for a specific board, go to the VxWorks BSP for that board, and look for a
+parameter called BOOT_LINE_ADRS. Assign its value to "bootaddr". A typical
+value for "bootaddr" is 0x101200.
+
+If a "bootargs" variable is defined, its content will be copied to the memory
+location pointed by "bootaddr" as the kernel bootline. If "bootargs" is not
+there, command 'bootvx' can construct a valid bootline using the following
+environments variables: bootdev, bootfile, ipaddr, netmask, serverip,
+gatewayip, hostname, othbootargs.
+
+When using 'bootm', just define "bootargs" in the environment and U-Boot will
+handle bootline fix up for the kernel dtb automatically.
+
+Serial console
+--
+It's very common that VxWorks BSPs configure a different baud rate for the
+serial console from what is being used by U-Boot. For example, VxWorks tends
+to use 9600 as the default baud rate on all x86 BSPs while U-Boot uses 115200.
+Please configure both U-Boot and VxWorks to use the same baud rate, or it may
+look like VxWorks hangs somewhere as nothing outputs on the serial console.
+
+x86-specific information
+
+Before loading an x86 kernel, two additional environment variables need to be
+provided. They are "e820data" and "e820info", which represent the address of
+E820 table and E820 information (defined by VxWorks) in system memory.
+
+Check VxWorks kernel configuration to look for BIOS_E820_DATA_START and
+BIOS_E820_INFO_START, and assign their values to "e820data" and "e820info"
+accordingly. If neither of these two are supplied, U-Boot assumes a default
+location at 0x4000 for "e820data" and 0x4a00 for "e820info". Typical values
+for "e820data" and "e820info" are 0x104000 and 0x104a00. But there is one
+exception on Intel Galileo, where "e820data" and "e820info" should be left
+unset, which assume the default location for VxWorks.
+
+Note since currently U-Boot does not support ACPI yet, VxWorks kernel must
+be configured to use MP table and virtual wire interrupt mode. This requires
+INCLUDE_MPTABLE_BOOT_OP and INCLUDE_VIRTUAL_WIRE_MODE to be included in a
+VxWorks kernel configuration.
diff --git a/doc/README.x86 b/doc/README.x86
index 6cf293b..a4f5321 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -25,6 +25,8 @@ targets and all Intel 

[U-Boot] [PATCH v3 07/12] cmd: bootvx: Avoid strlen() calls when constructing VxWorks bootline

2015-10-07 Thread Bin Meng
Remember the position in the VxWorks bootline buffer to avoid the call
to strlen() each time.

Signed-off-by: Bin Meng 

---

Changes in v3:
- New patch to avoid strlen() calls when constructing VxWorks bootline

Changes in v2: None

 common/cmd_elf.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 62863df..6c95851 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -213,6 +213,7 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
char *bootline; /* Text of the bootline */
char *tmp; /* Temporary char pointer */
char build_buf[128]; /* Buffer for building the bootline */
+   int ptr = 0;
 
/*
 * Check the loadaddr variable.
@@ -277,30 +278,29 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
   max(strlen(bootline), (size_t)255));
flush_cache(bootaddr, max(strlen(bootline), (size_t)255));
} else {
-   sprintf(build_buf, CONFIG_SYS_VXWORKS_BOOT_DEVICE);
+   ptr = sprintf(build_buf, CONFIG_SYS_VXWORKS_BOOT_DEVICE);
tmp = getenv("bootfile");
if (tmp)
-   sprintf(&build_buf[strlen(build_buf)],
-   "%s:%s ", CONFIG_SYS_VXWORKS_SERVERNAME, tmp);
+   ptr += sprintf(build_buf + ptr, "%s:%s ",
+  CONFIG_SYS_VXWORKS_SERVERNAME, tmp);
else
-   sprintf(&build_buf[strlen(build_buf)],
-   "%s:file ", CONFIG_SYS_VXWORKS_SERVERNAME);
+   ptr += sprintf(build_buf + ptr, "%s:file ",
+  CONFIG_SYS_VXWORKS_SERVERNAME);
 
tmp = getenv("ipaddr");
if (tmp)
-   sprintf(&build_buf[strlen(build_buf)], "e=%s ", tmp);
+   ptr += sprintf(build_buf + ptr, "e=%s ", tmp);
 
tmp = getenv("serverip");
if (tmp)
-   sprintf(&build_buf[strlen(build_buf)], "h=%s ", tmp);
+   ptr += sprintf(build_buf + ptr, "h=%s ", tmp);
 
tmp = getenv("hostname");
if (tmp)
-   sprintf(&build_buf[strlen(build_buf)], "tn=%s ", tmp);
+   ptr += sprintf(build_buf + ptr, "tn=%s ", tmp);
 
 #ifdef CONFIG_SYS_VXWORKS_ADD_PARAMS
-   sprintf(&build_buf[strlen(build_buf)],
-   CONFIG_SYS_VXWORKS_ADD_PARAMS);
+   ptr += sprintf(build_buf + ptr, CONFIG_SYS_VXWORKS_ADD_PARAMS);
 #endif
 
memcpy((void *)bootaddr, build_buf,
-- 
1.8.2.1

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[U-Boot] [PATCH v3 10/12] cmd: bootvx: Pass E820 information to an x86 VxWorks kernel

2015-10-07 Thread Bin Meng
E820 is critical to the kernel as it provides system memory map
information. Pass it to an x86 VxWorks kernel.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass 
Reviewed-by: Tom Rini 
Tested-by: Jian Luo 
---

Changes in v3: None
Changes in v2: None

 common/cmd_elf.c  | 30 ++
 include/vxworks.h | 29 +
 2 files changed, 59 insertions(+)

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index da70ef3..d6a2036 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -18,6 +18,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_X86
+#include 
+#endif
 
 /*
  * A very simple elf loader, assumes the image is valid, returns the
@@ -214,6 +217,10 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
char *tmp; /* Temporary char pointer */
char build_buf[128]; /* Buffer for building the bootline */
int ptr = 0;
+#ifdef CONFIG_X86
+   struct e820info *info;
+   struct e820entry *data;
+#endif
 
/*
 * Check the loadaddr variable.
@@ -336,6 +343,29 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
   (char *)bootaddr);
}
 
+#ifdef CONFIG_X86
+   /*
+* Since E820 information is critical to the kernel, if we don't
+* specify these in the environments, use a default one.
+*/
+   tmp = getenv("e820data");
+   if (tmp)
+   data = (struct e820entry *)simple_strtoul(tmp, NULL, 16);
+   else
+   data = (struct e820entry *)VXWORKS_E820_DATA_ADDR;
+   tmp = getenv("e820info");
+   if (tmp)
+   info = (struct e820info *)simple_strtoul(tmp, NULL, 16);
+   else
+   info = (struct e820info *)VXWORKS_E820_INFO_ADDR;
+
+   memset(info, 0, sizeof(struct e820info));
+   info->sign = E820_SIGNATURE;
+   info->entries = install_e820_map(E820MAX, data);
+   info->addr = (info->entries - 1) * sizeof(struct e820entry) +
+VXWORKS_E820_DATA_ADDR;
+#endif
+
/*
 * If the data at the load address is an elf image, then
 * treat it like an elf image. Otherwise, assume that it is a
diff --git a/include/vxworks.h b/include/vxworks.h
index 297a70f..f69b008 100644
--- a/include/vxworks.h
+++ b/include/vxworks.h
@@ -8,6 +8,35 @@
 #ifndef _VXWORKS_H_
 #define _VXWORKS_H_
 
+/*
+ * VxWorks x86 E820 related stuff
+ *
+ * VxWorks on x86 gets E820 information from pre-defined address @
+ * 0x4a00 and 0x4000. At 0x4a00 it's an information table defined
+ * by VxWorks and the actual E820 table entries starts from 0x4000.
+ * As defined by the BIOS E820 spec, the maximum number of E820 table
+ * entries is 128 and each entry occupies 20 bytes, so it's 128 * 20
+ * = 2560 (0xa00) bytes in total. That's where VxWorks stores some
+ * information that is retrieved from the BIOS E820 call and saved
+ * later for sanity test during the kernel boot-up.
+ */
+#define VXWORKS_E820_DATA_ADDR 0x4000
+#define VXWORKS_E820_INFO_ADDR 0x4a00
+
+/* E820 info signatiure "SMAP" - System MAP */
+#define E820_SIGNATURE 0x534d4150
+
+struct e820info {
+   u32 sign;   /* "SMAP" signature */
+   u32 x0; /* don't care, used by VxWorks */
+   u32 x1; /* don't care, used by VxWorks */
+   u32 x2; /* don't care, used by VxWorks */
+   u32 addr;   /* last e820 table entry addr */
+   u32 x3; /* don't care, used by VxWorks */
+   u32 entries;/* e820 table entry count */
+   u32 error;  /* must be zero */
+};
+
 int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 void boot_prep_vxworks(bootm_headers_t *images);
 void boot_jump_vxworks(bootm_headers_t *images);
-- 
1.8.2.1

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[U-Boot] [PATCH v3 06/12] cmd: elf: Reorder load_elf_image_phdr() and load_elf_image_shdr()

2015-10-07 Thread Bin Meng
Move load_elf_image_phdr() and load_elf_image_shdr() to the beginning
of the cmd_elf.c so that forward declaration is not needed.

Signed-off-by: Bin Meng 
Reviewed-by: Tom Rini 
---

Changes in v3: None
Changes in v2: None

 common/cmd_elf.c | 161 +++
 1 file changed, 79 insertions(+), 82 deletions(-)

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index c5e4432..62863df 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -19,8 +19,85 @@
 #include 
 #include 
 
-static unsigned long load_elf_image_phdr(unsigned long addr);
-static unsigned long load_elf_image_shdr(unsigned long addr);
+/*
+ * A very simple elf loader, assumes the image is valid, returns the
+ * entry point address.
+ */
+static unsigned long load_elf_image_phdr(unsigned long addr)
+{
+   Elf32_Ehdr *ehdr; /* Elf header structure pointer */
+   Elf32_Phdr *phdr; /* Program header structure pointer */
+   int i;
+
+   ehdr = (Elf32_Ehdr *)addr;
+   phdr = (Elf32_Phdr *)(addr + ehdr->e_phoff);
+
+   /* Load each program header */
+   for (i = 0; i < ehdr->e_phnum; ++i) {
+   void *dst = (void *)(uintptr_t)phdr->p_paddr;
+   void *src = (void *)addr + phdr->p_offset;
+   debug("Loading phdr %i to 0x%p (%i bytes)\n",
+ i, dst, phdr->p_filesz);
+   if (phdr->p_filesz)
+   memcpy(dst, src, phdr->p_filesz);
+   if (phdr->p_filesz != phdr->p_memsz)
+   memset(dst + phdr->p_filesz, 0x00,
+  phdr->p_memsz - phdr->p_filesz);
+   flush_cache((unsigned long)dst, phdr->p_filesz);
+   ++phdr;
+   }
+
+   return ehdr->e_entry;
+}
+
+static unsigned long load_elf_image_shdr(unsigned long addr)
+{
+   Elf32_Ehdr *ehdr; /* Elf header structure pointer */
+   Elf32_Shdr *shdr; /* Section header structure pointer */
+   unsigned char *strtab = 0; /* String table pointer */
+   unsigned char *image; /* Binary image pointer */
+   int i; /* Loop counter */
+
+   ehdr = (Elf32_Ehdr *)addr;
+
+   /* Find the section header string table for output info */
+   shdr = (Elf32_Shdr *)(addr + ehdr->e_shoff +
+(ehdr->e_shstrndx * sizeof(Elf32_Shdr)));
+
+   if (shdr->sh_type == SHT_STRTAB)
+   strtab = (unsigned char *)(addr + shdr->sh_offset);
+
+   /* Load each appropriate section */
+   for (i = 0; i < ehdr->e_shnum; ++i) {
+   shdr = (Elf32_Shdr *)(addr + ehdr->e_shoff +
+(i * sizeof(Elf32_Shdr)));
+
+   if (!(shdr->sh_flags & SHF_ALLOC) ||
+   shdr->sh_addr == 0 || shdr->sh_size == 0) {
+   continue;
+   }
+
+   if (strtab) {
+   debug("%sing %s @ 0x%08lx (%ld bytes)\n",
+ (shdr->sh_type == SHT_NOBITS) ? "Clear" : "Load",
+  &strtab[shdr->sh_name],
+  (unsigned long)shdr->sh_addr,
+  (long)shdr->sh_size);
+   }
+
+   if (shdr->sh_type == SHT_NOBITS) {
+   memset((void *)(uintptr_t)shdr->sh_addr, 0,
+  shdr->sh_size);
+   } else {
+   image = (unsigned char *)addr + shdr->sh_offset;
+   memcpy((void *)(uintptr_t)shdr->sh_addr,
+  (const void *)image, shdr->sh_size);
+   }
+   flush_cache(shdr->sh_addr, shdr->sh_size);
+   }
+
+   return ehdr->e_entry;
+}
 
 /* Allow ports to override the default behavior */
 static unsigned long do_bootelf_exec(ulong (*entry)(int, char * const[]),
@@ -253,86 +330,6 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
return 1;
 }
 
-/*
- * A very simple elf loader, assumes the image is valid, returns the
- * entry point address.
- */
-static unsigned long load_elf_image_phdr(unsigned long addr)
-{
-   Elf32_Ehdr *ehdr; /* Elf header structure pointer */
-   Elf32_Phdr *phdr; /* Program header structure pointer */
-   int i;
-
-   ehdr = (Elf32_Ehdr *)addr;
-   phdr = (Elf32_Phdr *)(addr + ehdr->e_phoff);
-
-   /* Load each program header */
-   for (i = 0; i < ehdr->e_phnum; ++i) {
-   void *dst = (void *)(uintptr_t)phdr->p_paddr;
-   void *src = (void *)addr + phdr->p_offset;
-   debug("Loading phdr %i to 0x%p (%i bytes)\n",
- i, dst, phdr->p_filesz);
-   if (phdr->p_filesz)
-   memcpy(dst, src, phdr->p_filesz);
-   if (phdr->p_filesz != phdr->p_memsz)
-   memset(dst + phdr->p_filesz, 0x00,
-  phdr->p_memsz - phdr->p_filesz);
-   flush_cache((uns

[U-Boot] [PATCH v3 11/12] cmd: bootvx: Add asmlinkage to the VxWorks x86 entry

2015-10-07 Thread Bin Meng
VxWorks on x86 uses stack to pass parameters.

Reported-by: Jian Luo 
Signed-off-by: Bin Meng 
Acked-by: Simon Glass 

---

Changes in v3: None
Changes in v2:
- New patch to add asmlinkage to the VxWorks x86 entry

 common/cmd_elf.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index d6a2036..86e694a 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -20,6 +20,7 @@
 #include 
 #ifdef CONFIG_X86
 #include 
+#include 
 #endif
 
 /*
@@ -379,7 +380,12 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
printf("## Starting vxWorks at 0x%08lx ...\n", addr);
 
dcache_disable();
+#ifdef CONFIG_X86
+   /* VxWorks on x86 uses stack to pass parameters */
+   ((asmlinkage void (*)(int))addr)(0);
+#else
((void (*)(int))addr)(0);
+#endif
 
puts("## vxWorks terminated\n");
 
-- 
1.8.2.1

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[U-Boot] [PATCH v3 09/12] cmd: bootvx: Always get VxWorks bootline from env

2015-10-07 Thread Bin Meng
So far VxWorks bootline can be contructed from various environment
variables, but when these variables do not exist we get these from
corresponding config macros. This is not helpful as it requires
rebuilding U-Boot, and to make sure these config macros take effect
we should not have these environment variables. This is a little
bit complex and confusing.

Now we change the logic to always contruct the bootline from
environments (the only single source), by adding two new variables
"bootdev" and "othbootargs", and adding some comments about network
related settings mentioning they are optional. The doc about the
bootline handling is also updated.

Signed-off-by: Bin Meng 
Reviewed-by: Tom Rini 
Tested-by: Hannes Schmelzer 
---

Changes in v3: None
Changes in v2: None

 README|  12 +-
 common/cmd_elf.c  | 119 ++
 include/vxworks.h |  22 --
 3 files changed, 68 insertions(+), 85 deletions(-)

diff --git a/README b/README
index c22b60b..f2350ed 100644
--- a/README
+++ b/README
@@ -794,18 +794,10 @@ The following options need to be configured:
 - vxWorks boot parameters:
 
bootvx constructs a valid bootline using the following
-   environments variables: bootfile, ipaddr, serverip, hostname.
+   environments variables: bootdev, bootfile, ipaddr, netmask,
+   serverip, gatewayip, hostname, othbootargs.
It loads the vxWorks image pointed bootfile.
 
-   CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
-   CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
-   CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
-   CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
-
-   CONFIG_SYS_VXWORKS_ADD_PARAMS
-
-   Add it at the end of the bootline. E.g "u=username pw=secret"
-
Note: If a "bootargs" environment is defined, it will overwride
the defaults discussed just above.
 
diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 6a09378..da70ef3 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -257,68 +257,83 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
/*
 * Use bootaddr to find the location in memory that VxWorks
-* will look for the bootline string. The default value for
-* PowerPC is LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET which
-* defaults to 0x4200.
+* will look for the bootline string. The default value is
+* (LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET) as defined by
+* VxWorks BSP. For example, on PowerPC it defaults to 0x4200.
 */
tmp = getenv("bootaddr");
-   if (!tmp)
-   bootaddr = CONFIG_SYS_VXWORKS_BOOT_ADDR;
-   else
-   bootaddr = simple_strtoul(tmp, NULL, 16);
-
-   /*
-* Check to see if the bootline is defined in the 'bootargs'
-* parameter. If it is not defined, we may be able to
-* construct the info.
-*/
-   bootline = getenv("bootargs");
-   if (bootline) {
-   memcpy((void *)bootaddr, bootline,
-  max(strlen(bootline), (size_t)255));
-   flush_cache(bootaddr, max(strlen(bootline), (size_t)255));
+   if (!tmp) {
+   printf("## VxWorks bootline address not specified\n");
} else {
-   ptr = sprintf(build_buf, CONFIG_SYS_VXWORKS_BOOT_DEVICE);
-   tmp = getenv("bootfile");
-   if (tmp)
-   ptr += sprintf(build_buf + ptr, "%s:%s ",
-  CONFIG_SYS_VXWORKS_SERVERNAME, tmp);
-   else
-   ptr += sprintf(build_buf + ptr, "%s:file ",
-  CONFIG_SYS_VXWORKS_SERVERNAME);
+   bootaddr = simple_strtoul(tmp, NULL, 16);
 
-   tmp = getenv("ipaddr");
-   if (tmp) {
-   ptr += sprintf(build_buf + ptr, "e=%s", tmp);
-   tmp = getenv("netmask");
+   /*
+* Check to see if the bootline is defined in the 'bootargs'
+* parameter. If it is not defined, we may be able to
+* construct the info.
+*/
+   bootline = getenv("bootargs");
+   if (bootline) {
+   memcpy((void *)bootaddr, bootline,
+  max(strlen(bootline), (size_t)255));
+   flush_cache(bootaddr, max(strlen(bootline),
+ (size_t)255));
+   } else {
+   tmp = getenv("bootdev");
+   if (tmp)
+   ptr = sprintf(build_buf, tmp);
+   else
+   printf("## VxWorks boot device not 
specified

[U-Boot] [PATCH v3 08/12] cmd: bootvx: Pass netmask and gatewayip to VxWorks bootline

2015-10-07 Thread Bin Meng
There are fields in VxWorks bootline for netmask and gatewayip.
We can get these from U-Boot environment variables and pass them
to VxWorks, just like ipaddr and serverip.

Signed-off-by: Bin Meng 

---

Changes in v3:
- Avoid calls to strlen()

Changes in v2:
- Fix the endian issue for netmask

 common/cmd_elf.c | 17 +++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 6c95851..6a09378 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -288,13 +288,26 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
   CONFIG_SYS_VXWORKS_SERVERNAME);
 
tmp = getenv("ipaddr");
-   if (tmp)
-   ptr += sprintf(build_buf + ptr, "e=%s ", tmp);
+   if (tmp) {
+   ptr += sprintf(build_buf + ptr, "e=%s", tmp);
+   tmp = getenv("netmask");
+   if (tmp) {
+   __be32 addr = getenv_ip("netmask").s_addr;
+   ptr += sprintf(build_buf + ptr, ":%08x ",
+  ntohl(addr));
+   } else {
+   ptr += sprintf(build_buf + ptr, " ");
+   }
+   }
 
tmp = getenv("serverip");
if (tmp)
ptr += sprintf(build_buf + ptr, "h=%s ", tmp);
 
+   tmp = getenv("gatewayip");
+   if (tmp)
+   ptr += sprintf(build_buf + ptr, "g=%s ", tmp);
+
tmp = getenv("hostname");
if (tmp)
ptr += sprintf(build_buf + ptr, "tn=%s ", tmp);
-- 
1.8.2.1

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[U-Boot] [PATCH v3 00/12] Better support of booting VxWorks via 'bootvx'

2015-10-07 Thread Bin Meng
This series adds better support of booting VxWorks using 'bootvx'.

Tested by booting a VxWorks 6.9.4 kernel on Intel Crown Bay, and
a VxWorks 7 kernel on Intel Galileo.

Rebased on u-boot/master branch and dropped the #1 and #2 patches
in the v2 series as they were already applied in the main stream.

Changes in v3:
- New patch to avoid strlen() calls when constructing VxWorks bootline
- Avoid calls to strlen()

Changes in v2:
- New patch to move install_e820_map() out of zimage.c
- New patch to remove quotation mark in CONFIG_HOSTNAME
- Split the defconfig reorder to another patch, making this patch
  as CONFIG_CMD_ELF mods only
- Update sparc and avr32 boards to unset CONFIG_CMD_ELF
- Fix the endian issue for netmask
- New patch to add asmlinkage to the VxWorks x86 entry
- Describe typical values for bootaddr, e820data, e820info.

Bin Meng (12):
  x86: Initialize GDT entry 1 to be the 32-bit CS as well
  x86: Move install_e820_map() out of zimage.c
  x86: Remove quotation mark in CONFIG_HOSTNAME
  cmd: Convert CONFIG_CMD_ELF to Kconfig
  cmd: Clean up cmd_elf a little bit
  cmd: elf: Reorder load_elf_image_phdr() and load_elf_image_shdr()
  cmd: bootvx: Avoid strlen() calls when constructing VxWorks bootline
  cmd: bootvx: Pass netmask and gatewayip to VxWorks bootline
  cmd: bootvx: Always get VxWorks bootline from env
  cmd: bootvx: Pass E820 information to an x86 VxWorks kernel
  cmd: bootvx: Add asmlinkage to the VxWorks x86 entry
  doc: Complement document about booting VxWorks

 README  |  12 +-
 arch/x86/cpu/cpu.c  |   7 +-
 arch/x86/include/asm/e820.h |   3 +
 arch/x86/include/asm/zimage.h   |   3 -
 arch/x86/lib/Makefile   |   1 +
 arch/x86/lib/e820.c |  37 +++
 arch/x86/lib/zimage.c   |  26 --
 common/Kconfig  |   6 +
 common/cmd_elf.c| 406 +---
 configs/atngw100_defconfig  |   1 +
 configs/atngw100mkii_defconfig  |   1 +
 configs/atstk1002_defconfig |   1 +
 configs/dbau1000_defconfig  |   1 +
 configs/dbau1100_defconfig  |   1 +
 configs/dbau1500_defconfig  |   1 +
 configs/dbau1550_defconfig  |   1 +
 configs/dbau1550_el_defconfig   |   1 +
 configs/dlvision-10g_defconfig  |   1 +
 configs/dlvision_defconfig  |   1 +
 configs/gr_cpci_ax2000_defconfig|   1 +
 configs/gr_ep2s60_defconfig |   1 +
 configs/gr_xc3s_1500_defconfig  |   1 +
 configs/grasshopper_defconfig   |   1 +
 configs/grsim_defconfig |   1 +
 configs/grsim_leon2_defconfig   |   1 +
 configs/io_defconfig|   1 +
 configs/iocon_defconfig |   1 +
 configs/neo_defconfig   |   1 +
 configs/pb1000_defconfig|   1 +
 configs/sandbox_defconfig   |   1 +
 configs/vct_platinum_onenand_small_defconfig|   1 +
 configs/vct_platinum_small_defconfig|   1 +
 configs/vct_platinumavc_onenand_small_defconfig |   1 +
 configs/vct_platinumavc_small_defconfig |   1 +
 configs/vct_premium_onenand_small_defconfig |   1 +
 configs/vct_premium_small_defconfig |   1 +
 doc/README.vxworks  |  82 -
 doc/README.x86  |   2 +
 include/config_cmd_all.h|   1 -
 include/config_distro_defaults.h|   1 -
 include/configs/B4860QDS.h  |   1 -
 include/configs/BSC9131RDB.h|   1 -
 include/configs/BSC9132QDS.h|   1 -
 include/configs/C29XPCIE.h  |   1 -
 include/configs/CPCI2DP.h   |   1 -
 include/configs/CPCI4052.h  |   1 -
 include/configs/M5208EVBE.h |   1 -
 include/configs/M52277EVB.h |   1 -
 include/configs/M5235EVB.h  |   1 -
 include/configs/M5272C3.h   |   1 -
 include/configs/M5275EVB.h  |   1 -
 include/configs/M53017EVB.h |   1 -
 include/configs/M5329EVB.h  |   1 -
 include/configs/M5373EVB.h  |   1 -
 include/configs/M54418TWR.h |   1 -
 include/configs/M54451EVB.h |   1 -
 include/configs/M54455EVB.h |   1 -
 include/configs/M5475EVB.h  |   1 -
 include/configs/M5485EVB.h  |   1 -
 include/configs/MIP405.h|   1 -
 include/configs/MPC8536DS.h   

[U-Boot] [PATCH v3 03/12] x86: Remove quotation mark in CONFIG_HOSTNAME

2015-10-07 Thread Bin Meng
CONFIG_HOSTNAME is an environment varible, so that quotation mark
is not needed.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass 

---

Changes in v3: None
Changes in v2:
- New patch to remove quotation mark in CONFIG_HOSTNAME

 include/configs/x86-common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 3f153f2..44765f6 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -217,7 +217,7 @@
 
 /* Default environment */
 #define CONFIG_ROOTPATH"/opt/nfsroot"
-#define CONFIG_HOSTNAME"x86"
+#define CONFIG_HOSTNAMEx86
 #define CONFIG_BOOTFILE"bzImage"
 #define CONFIG_LOADADDR0x100
 
-- 
1.8.2.1

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[U-Boot] [PATCH v3 04/12] cmd: Convert CONFIG_CMD_ELF to Kconfig

2015-10-07 Thread Bin Meng
Convert CONFIG_CMD_ELF to Kconfig and tidy up affected boards.

Signed-off-by: Bin Meng 

---

Changes in v3: None
Changes in v2:
- Split the defconfig reorder to another patch, making this patch
  as CONFIG_CMD_ELF mods only
- Update sparc and avr32 boards to unset CONFIG_CMD_ELF

 common/Kconfig  | 6 ++
 configs/atngw100_defconfig  | 1 +
 configs/atngw100mkii_defconfig  | 1 +
 configs/atstk1002_defconfig | 1 +
 configs/dbau1000_defconfig  | 1 +
 configs/dbau1100_defconfig  | 1 +
 configs/dbau1500_defconfig  | 1 +
 configs/dbau1550_defconfig  | 1 +
 configs/dbau1550_el_defconfig   | 1 +
 configs/dlvision-10g_defconfig  | 1 +
 configs/dlvision_defconfig  | 1 +
 configs/gr_cpci_ax2000_defconfig| 1 +
 configs/gr_ep2s60_defconfig | 1 +
 configs/gr_xc3s_1500_defconfig  | 1 +
 configs/grasshopper_defconfig   | 1 +
 configs/grsim_defconfig | 1 +
 configs/grsim_leon2_defconfig   | 1 +
 configs/io_defconfig| 1 +
 configs/iocon_defconfig | 1 +
 configs/neo_defconfig   | 1 +
 configs/pb1000_defconfig| 1 +
 configs/sandbox_defconfig   | 1 +
 configs/vct_platinum_onenand_small_defconfig| 1 +
 configs/vct_platinum_small_defconfig| 1 +
 configs/vct_platinumavc_onenand_small_defconfig | 1 +
 configs/vct_platinumavc_small_defconfig | 1 +
 configs/vct_premium_onenand_small_defconfig | 1 +
 configs/vct_premium_small_defconfig | 1 +
 include/config_cmd_all.h| 1 -
 include/config_distro_defaults.h| 1 -
 include/configs/B4860QDS.h  | 1 -
 include/configs/BSC9131RDB.h| 1 -
 include/configs/BSC9132QDS.h| 1 -
 include/configs/C29XPCIE.h  | 1 -
 include/configs/CPCI2DP.h   | 1 -
 include/configs/CPCI4052.h  | 1 -
 include/configs/M5208EVBE.h | 1 -
 include/configs/M52277EVB.h | 1 -
 include/configs/M5235EVB.h  | 1 -
 include/configs/M5272C3.h   | 1 -
 include/configs/M5275EVB.h  | 1 -
 include/configs/M53017EVB.h | 1 -
 include/configs/M5329EVB.h  | 1 -
 include/configs/M5373EVB.h  | 1 -
 include/configs/M54418TWR.h | 1 -
 include/configs/M54451EVB.h | 1 -
 include/configs/M54455EVB.h | 1 -
 include/configs/M5475EVB.h  | 1 -
 include/configs/M5485EVB.h  | 1 -
 include/configs/MIP405.h| 1 -
 include/configs/MPC8536DS.h | 1 -
 include/configs/MPC8540ADS.h| 1 -
 include/configs/MPC8541CDS.h| 1 -
 include/configs/MPC8544DS.h | 1 -
 include/configs/MPC8548CDS.h| 1 -
 include/configs/MPC8555CDS.h| 1 -
 include/configs/MPC8560ADS.h| 1 -
 include/configs/MPC8568MDS.h| 1 -
 include/configs/MPC8569MDS.h| 1 -
 include/configs/MPC8572DS.h | 1 -
 include/configs/P1010RDB.h  | 1 -
 include/configs/P1022DS.h   | 1 -
 include/configs/P2041RDB.h  | 1 -
 include/configs/PIP405.h| 1 -
 include/configs/PLU405.h| 1 -
 include/configs/PMC405DE.h  | 1 -
 include/configs/PMC440.h| 1 -
 include/configs/T102xQDS.h  | 1 -
 include/configs/T102xRDB.h  | 1 -
 include/configs/T1040QDS.h  | 1 -
 include/configs/T104xRDB.h  | 1 -
 include/configs/T208xQDS.h  | 1 -
 include/configs/T208xRDB.h  | 1 -
 include/configs/T4240RDB.h  | 1 -
 include/configs/TQM823L.h   | 1 -
 include/configs/TQM823M.h   | 1 -
 include/configs/TQM850L.h   | 1 -
 include/configs/TQM850M.h   | 1 -
 include/configs/TQM855L.h   | 1 -
 include/configs/TQM855M.h   | 1 -
 include/configs/TQM860L.h   | 1 -
 include/configs/TQM860M.h   | 1 -
 include/configs/TQM862L.h   | 1 -
 include/configs/TQM862M.h   | 1 -
 include/configs/TQM866M.h   | 1 -
 include/configs/UCP1020.h  

[U-Boot] [PATCH v3 02/12] x86: Move install_e820_map() out of zimage.c

2015-10-07 Thread Bin Meng
install_e820_map() has nothing to do with zimage related codes.
Move it to a dedicated place.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass 

---

Changes in v3: None
Changes in v2:
- New patch to move install_e820_map() out of zimage.c

 arch/x86/include/asm/e820.h   |  3 +++
 arch/x86/include/asm/zimage.h |  3 ---
 arch/x86/lib/Makefile |  1 +
 arch/x86/lib/e820.c   | 37 +
 arch/x86/lib/zimage.c | 26 --
 5 files changed, 41 insertions(+), 29 deletions(-)
 create mode 100644 arch/x86/lib/e820.c

diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 21bc633..351f021 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -23,4 +23,7 @@ struct e820entry {
 
 #endif /* __ASSEMBLY__ */
 
+/* Implementation defined function to install an e820 map */
+unsigned install_e820_map(unsigned max_entries, struct e820entry *);
+
 #endif /* _ASM_X86_E820_H */
diff --git a/arch/x86/include/asm/zimage.h b/arch/x86/include/asm/zimage.h
index bf351ed..94fa2a7 100644
--- a/arch/x86/include/asm/zimage.h
+++ b/arch/x86/include/asm/zimage.h
@@ -31,9 +31,6 @@
 #define BZIMAGE_LOAD_ADDR  0x10
 #define ZIMAGE_LOAD_ADDR   0x1
 
-/* Implementation defined function to install an e820 map. */
-unsigned install_e820_map(unsigned max_entries, struct e820entry *);
-
 struct boot_params *load_zimage(char *image, unsigned long kernel_size,
ulong *load_addressp);
 int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot,
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 6ecd6db..169062e 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o
 obj-y  += cmd_boot.o
 obj-$(CONFIG_HAVE_FSP) += cmd_hob.o
 obj-$(CONFIG_EFI) += efi/
+obj-y  += e820.o
 obj-y  += gcc.o
 obj-y  += init_helpers.o
 obj-y  += interrupts.o
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
new file mode 100644
index 000..5babfde
--- /dev/null
+++ b/arch/x86/lib/e820.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2015, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Install a default e820 table with 4 entries as follows:
+ *
+ * 0x00-0x0a   Useable RAM
+ * 0x0a-0x10   Reserved for ISA
+ * 0x10-gd->ram_size   Useable RAM
+ * CONFIG_PCIE_ECAM_BASE   PCIe ECAM
+ */
+__weak unsigned install_e820_map(unsigned max_entries,
+struct e820entry *entries)
+{
+   entries[0].addr = 0;
+   entries[0].size = ISA_START_ADDRESS;
+   entries[0].type = E820_RAM;
+   entries[1].addr = ISA_START_ADDRESS;
+   entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
+   entries[1].type = E820_RESERVED;
+   entries[2].addr = ISA_END_ADDRESS;
+   entries[2].size = gd->ram_size - ISA_END_ADDRESS;
+   entries[2].type = E820_RAM;
+   entries[3].addr = CONFIG_PCIE_ECAM_BASE;
+   entries[3].size = CONFIG_PCIE_ECAM_SIZE;
+   entries[3].type = E820_RESERVED;
+
+   return 4;
+}
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index a1ec57e..1b33c77 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -42,32 +42,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define COMMAND_LINE_SIZE  2048
 
-/*
- * Install a default e820 table with 3 entries as follows:
- *
- * 0x00-0x0a   Useable RAM
- * 0x0a-0x10   Reserved for ISA
- * 0x10-gd->ram_size   Useable RAM
- */
-__weak unsigned install_e820_map(unsigned max_entries,
-struct e820entry *entries)
-{
-   entries[0].addr = 0;
-   entries[0].size = ISA_START_ADDRESS;
-   entries[0].type = E820_RAM;
-   entries[1].addr = ISA_START_ADDRESS;
-   entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
-   entries[1].type = E820_RESERVED;
-   entries[2].addr = ISA_END_ADDRESS;
-   entries[2].size = gd->ram_size - ISA_END_ADDRESS;
-   entries[2].type = E820_RAM;
-   entries[3].addr = CONFIG_PCIE_ECAM_BASE;
-   entries[3].size = CONFIG_PCIE_ECAM_SIZE;
-   entries[3].type = E820_RESERVED;
-
-   return 4;
-}
-
 static void build_command_line(char *command_line, int auto_boot)
 {
char *env_command_line;
-- 
1.8.2.1

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[U-Boot] [PATCH v3 05/12] cmd: Clean up cmd_elf a little bit

2015-10-07 Thread Bin Meng
This commit cleans up cmd_elf.c per U-Boot coding convention,
and removes the unnecessary DECLARE_GLOBAL_DATA_PTR and out-of-date
powerpc comments (it actually supports not only powerpc targets).

Signed-off-by: Bin Meng 
Reviewed-by: Tom Rini 
---

Changes in v3: None
Changes in v2: None

 common/cmd_elf.c | 171 ---
 1 file changed, 73 insertions(+), 98 deletions(-)

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 22475dc..c5e4432 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -14,23 +14,17 @@
  */
 
 #include 
-#include 
 #include 
-#include 
-#include 
 #include 
+#include 
 #include 
 
-#if defined(CONFIG_WALNUT) || defined(CONFIG_SYS_VXWORKS_MAC_PTR)
-DECLARE_GLOBAL_DATA_PTR;
-#endif
-
 static unsigned long load_elf_image_phdr(unsigned long addr);
 static unsigned long load_elf_image_shdr(unsigned long addr);
 
 /* Allow ports to override the default behavior */
 static unsigned long do_bootelf_exec(ulong (*entry)(int, char * const[]),
-  int argc, char * const argv[])
+int argc, char * const argv[])
 {
unsigned long ret;
 
@@ -54,18 +48,16 @@ static unsigned long do_bootelf_exec(ulong (*entry)(int, 
char * const[]),
return ret;
 }
 
-/* ==
+/*
  * Determine if a valid ELF image exists at the given memory location.
- * First looks at the ELF header magic field, the makes sure that it is
- * executable and makes sure that it is for a PowerPC.
- * == */
+ * First look at the ELF header magic field, then make sure that it is
+ * executable.
+ */
 int valid_elf_image(unsigned long addr)
 {
-   Elf32_Ehdr *ehdr;   /* Elf header structure pointer */
-
-   /* -- */
+   Elf32_Ehdr *ehdr; /* Elf header structure pointer */
 
-   ehdr = (Elf32_Ehdr *) addr;
+   ehdr = (Elf32_Ehdr *)addr;
 
if (!IS_ELF(*ehdr)) {
printf("## No elf image at address 0x%08lx\n", addr);
@@ -77,27 +69,17 @@ int valid_elf_image(unsigned long addr)
return 0;
}
 
-#if 0
-   if (ehdr->e_machine != EM_PPC) {
-   printf("## Not a PowerPC elf image at address 0x%08lx\n", addr);
-   return 0;
-   }
-#endif
-
return 1;
 }
 
-/* ==
- * Interpreter command to boot an arbitrary ELF image from memory.
- * == */
+/* Interpreter command to boot an arbitrary ELF image from memory */
 int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   unsigned long addr; /* Address of the ELF image */
-   unsigned long rc;   /* Return value from user code  */
+   unsigned long addr; /* Address of the ELF image */
+   unsigned long rc; /* Return value from user code */
char *sload, *saddr;
const char *ep = getenv("autostart");
 
-   /* -- */
int rcode = 0;
 
sload = saddr = NULL;
@@ -138,28 +120,27 @@ int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
rcode = 1;
 
printf("## Application terminated, rc = 0x%lx\n", rc);
+
return rcode;
 }
 
-/* ==
+/*
  * Interpreter command to boot VxWorks from a memory image.  The image can
  * be either an ELF image or a raw binary.  Will attempt to setup the
  * bootline and other parameters correctly.
- * == */
+ */
 int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   unsigned long addr; /* Address of image*/
-   unsigned long bootaddr; /* Address to put the bootline */
-   char *bootline; /* Text of the bootline*/
-   char *tmp;  /* Temporary char pointer  */
-   char build_buf[128];/* Buffer for building the bootline */
-
-   /* ---
-*
+   unsigned long addr; /* Address of image */
+   unsigned long bootaddr; /* Address to put the bootline */
+   char *bootline; /* Text of the bootline */
+   char *tmp; /* Temporary char pointer */
+   char build_buf[128]; /* Buffer for building the bootline */
+
+   /*
 * Check the loadaddr variable.
 * If we don't know where the image is then we're done.
 */
-
if (argc < 2)
addr = load_addr;
else
@@ -167,7 +148,8 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 #if defined(CONFI

[U-Boot] [PATCH v3 01/12] x86: Initialize GDT entry 1 to be the 32-bit CS as well

2015-10-07 Thread Bin Meng
Some OS (like VxWorks) requires GDT entry 1 to be the 32-bit CS.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass 
Tested-by: Jian Luo 
---

Changes in v3: None
Changes in v2: None

 arch/x86/cpu/cpu.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 1b76ca1..812c5e4 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -142,7 +142,12 @@ void arch_setup_gd(gd_t *new_gd)
 
gdt_addr = new_gd->arch.gdt;
 
-   /* CS: code, read/execute, 4 GB, base 0 */
+   /*
+* CS: code, read/execute, 4 GB, base 0
+*
+* Some OS (like VxWorks) requires GDT entry 1 to be the 32-bit CS
+*/
+   gdt_addr[X86_GDT_ENTRY_UNUSED] = GDT_ENTRY(0xc09b, 0, 0xf);
gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xf);
 
/* DS: data, read/write, 4 GB, base 0 */
-- 
1.8.2.1

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Re: [U-Boot] U-Boot v2015.04, x86 Intel Baytrail, and hsuart0 configuration

2015-10-07 Thread Bin Meng
Hi Tim,

On Wed, Oct 7, 2015 at 11:26 PM, Timothy Scott  wrote:
> Bin,
>
> Thanks for the response.  I've got things working with v2015.04, but it took
> some tweaking.  Here's what I learned:
>
> 1) PCI is initialized AFTER the code was attempting to configure hsuart0.
> Since hsuart0 is on the PCI bus, the various registers being read were
> coming up 0x and therefore hsuart0 access was invalid.

Yes, in v2015.04, Intel Crown Bay codes did this by defining
CONFIG_SYS_EARLY_PCI_INIT and calling the PCI enumeration in
arch_cpu_init() manually. With DM conversion on the latest
u-boot/master branch, this is not needed as the enumeration will be
triggered as needed.

> 2) I'm swapping between PCU_UART (legac y) and SIO_UART at run-time, while
> using the ns16550 driver in both instances.  The code that underlies
> ns16550_writeb() and ns16550_readb() expects things to be configured at
> compile time via CONFIG options instead of something you can jack with at
> run-time.
>

This can be enhanced by converting the ns16550 CONFIG options to a
device tree bindings, however I don't know if there is any plan to do
this. My only concern of doing it via device tree is that some
performance degradation might be observed.

> My workarounds:
> - created hsuart_init() in serial-uclass.c, patterned off of
> serial_find_console_or_panic().  This references a unique chosen option I
> named "hsuart-path" and loads up hsuart device for me.  I do this to get the
> hsuart0 probed and loaded.  (If there's a better way to force a device
> probe, please let me know.)
> - created initr_hsuart_serial() in board_r.c, and invoked this via the
> init_sequence_r[] table, after initr_pci.
> - updated ns16550.c's ns16550_platdata with a "mem_map" parameter.  I added
> a "mem-map" parm to the hsuart DTS entry, and load this value in via
> ns16550_serial_ofdata_to_platdata.  This is then referenced in
> ns16550_writeb() and ns16550_readb() to perform a memory mapped access,
> instead of whatever the CONFIG options have defined.  In my case, CONFIG
> options result in a port mapped access.
>
> All this is pretty hackish but works for my purposes.
>
> Thanks again,
> --tim
>
>

Regards,
Bin
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[U-Boot] [PATCH v5 2/3] timer: start a new dm_timer after relocation

2015-10-07 Thread Thomas Chou
Start a new dm_timer after relocation, just in case the
timer has been used in per-relocation.

Signed-off-by: Thomas Chou 
---
 common/board_r.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/common/board_r.c b/common/board_r.c
index f8c1baa..aaf390e 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -290,6 +290,9 @@ static int initr_dm(void)
/* Save the pre-reloc driver model and start a new one */
gd->dm_root_f = gd->dm_root;
gd->dm_root = NULL;
+#ifdef CONFIG_DM_TIMER
+   gd->dm_timer = NULL;
+#endif
return dm_init_and_scan(false);
 }
 #endif
-- 
2.1.4

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[U-Boot] [PATCH v5 1/3] dm: implement a Timer uclass

2015-10-07 Thread Thomas Chou
Implement a Timer uclass to work with lib/time.c.

Signed-off-by: Thomas Chou 
Reviewed-by: Simon Glass 
---
v2
  fix coding style.
v3
  add description to Kconfig as Simon suggested.
  move timer.c code to lib/time.c.
  add dm_timer dev to global data.
  remove timer_init().
  change API name get_clock.
v4
  add comment about timer hardware.
v5
  revert to get_rate and use uclass priv to store the clock_rate.
  split gd->dm_timer renewal to anohter patch.

 drivers/Kconfig   |  2 ++
 drivers/Makefile  |  1 +
 drivers/timer/Kconfig | 12 +
 drivers/timer/Makefile|  7 ++
 drivers/timer/timer-uclass.c  | 42 +++
 include/asm-generic/global_data.h |  3 +++
 include/dm/uclass-id.h|  1 +
 include/timer.h   | 52 +++
 lib/time.c| 49 
 9 files changed, 169 insertions(+)
 create mode 100644 drivers/timer/Kconfig
 create mode 100644 drivers/timer/Makefile
 create mode 100644 drivers/timer/timer-uclass.c
 create mode 100644 include/timer.h

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 63c92c5..f9496f7 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -56,6 +56,8 @@ source "drivers/spi/Kconfig"
 
 source "drivers/thermal/Kconfig"
 
+source "drivers/timer/Kconfig"
+
 source "drivers/tpm/Kconfig"
 
 source "drivers/usb/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 9d0a595..692da78 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -48,6 +48,7 @@ obj-y += pcmcia/
 obj-y += dfu/
 obj-y += rtc/
 obj-y += sound/
+obj-y += timer/
 obj-y += tpm/
 obj-y += twserial/
 obj-y += video/
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
new file mode 100644
index 000..54a4c40
--- /dev/null
+++ b/drivers/timer/Kconfig
@@ -0,0 +1,12 @@
+menu "Timer Support"
+
+config DM_TIMER
+   bool "Enable Driver Model for Timer drivers"
+   depends on DM
+   help
+ Enable driver model for Timer access. It uses the same API as
+ lib/time.c. But now implemented by the uclass. The first timer
+ will be used. The timer is usually a 32 bits free-running up
+ counter. There may be no real tick, and no timer interrupt.
+
+endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
new file mode 100644
index 000..a24179a
--- /dev/null
+++ b/drivers/timer/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015 Thomas Chou 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_DM_TIMER) += timer-uclass.o
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
new file mode 100644
index 000..daf19fa
--- /dev/null
+++ b/drivers/timer/timer-uclass.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2015 Thomas Chou 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Implement a Timer uclass to work with lib/time.c. The timer is usually
+ * a 32 bits free-running up counter. The get_rate() method is used to get
+ * the input clock frequency of the timer. The get_count() method is used
+ * get the current 32 bits count value. If the hardware is counting down,
+ * the value should be inversed inside the method. There may be no real
+ * tick, and no timer interrupt.
+ */
+
+int timer_get_count(struct udevice *dev, unsigned long *count)
+{
+   const struct dm_timer_ops *ops = device_get_ops(dev);
+
+   if (!ops->get_count)
+   return -ENOSYS;
+
+   return ops->get_count(dev, count);
+}
+
+unsigned long timer_get_rate(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+   return uc_priv->clock_rate;
+}
+
+UCLASS_DRIVER(timer) = {
+   .id = UCLASS_TIMER,
+   .name   = "timer",
+   .per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
+};
diff --git a/include/asm-generic/global_data.h 
b/include/asm-generic/global_data.h
index 2155265..ebecb5f 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -69,6 +69,9 @@ typedef struct global_data {
struct udevice  *dm_root_f; /* Pre-relocation root instance */
struct list_head uclass_root;   /* Head of core tree */
 #endif
+#ifdef CONFIG_DM_TIMER
+   struct udevice  *dm_timer;  /* Timer instance for Driver Model */
+#endif
 
const void *fdt_blob;   /* Our device tree, NULL if none */
void *new_fdt;  /* Relocated FDT */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 1eeec74..aff34a4 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -56,6 +56,7 @@ enum uclass_id {
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_SYSCON,  /* System configuration device */
UCLASS_THERMAL, /* Thermal sensor */
+   UCLASS_TIMER,   /* Timer device */
U

[U-Boot] [PATCH v5 3/3] nios2: convert altera timer to driver model

2015-10-07 Thread Thomas Chou
Convert altera timer to driver model.

Signed-off-by: Thomas Chou 
Acked-by: Chin Liang See 
---
v2
  fix coding style.
v3
  doc dts binding.
v4
  no change.
v5
  revert to get_rate and use uclass priv to store the clock_rate.

 arch/nios2/cpu/Makefile |   2 +-
 arch/nios2/cpu/timer.c  |  65 ---
 common/board_f.c|   3 +-
 configs/nios2-generic_defconfig |   2 +
 doc/device-tree-bindings/timer/altera_timer.txt |  19 +
 drivers/timer/Kconfig   |   7 ++
 drivers/timer/Makefile  |   1 +
 drivers/timer/altera_timer.c| 103 
 include/configs/nios2-generic.h |   6 --
 9 files changed, 134 insertions(+), 74 deletions(-)
 delete mode 100644 arch/nios2/cpu/timer.c
 create mode 100644 doc/device-tree-bindings/timer/altera_timer.txt
 create mode 100644 drivers/timer/altera_timer.c

diff --git a/arch/nios2/cpu/Makefile b/arch/nios2/cpu/Makefile
index c85e261..3fe7847 100644
--- a/arch/nios2/cpu/Makefile
+++ b/arch/nios2/cpu/Makefile
@@ -7,5 +7,5 @@
 
 extra-y= start.o
 obj-y  = exceptions.o
-obj-y  += cpu.o interrupts.o sysid.o timer.o traps.o
+obj-y  += cpu.o interrupts.o sysid.o traps.o
 obj-y  += fdt.o
diff --git a/arch/nios2/cpu/timer.c b/arch/nios2/cpu/timer.c
deleted file mode 100644
index b8aa9dd..000
--- a/arch/nios2/cpu/timer.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * (C) Copyright 2004, Psyent Corporation 
- * Scott McNutt 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-#include 
-#include 
-#include 
-
-struct nios_timer {
-   u32 status; /* Timer status reg */
-   u32 control;/* Timer control reg */
-   u32 periodl;/* Timeout period low */
-   u32 periodh;/* Timeout period high */
-   u32 snapl;  /* Snapshot low */
-   u32 snaph;  /* Snapshot high */
-};
-
-/* status register */
-#define NIOS_TIMER_TO  (1 << 0)/* Timeout */
-#define NIOS_TIMER_RUN (1 << 1)/* Timer running */
-
-/* control register */
-#define NIOS_TIMER_ITO (1 << 0)/* Timeout interrupt enable */
-#define NIOS_TIMER_CONT(1 << 1)/* Continuous mode */
-#define NIOS_TIMER_START   (1 << 2)/* Start timer */
-#define NIOS_TIMER_STOP(1 << 3)/* Stop timer */
-
-/*/
-unsigned long notrace timer_read_counter(void)
-{
-   struct nios_timer *tmr = (struct nios_timer *)CONFIG_SYS_TIMER_BASE;
-   u32 val;
-
-   /* Trigger update */
-   writel(0x0, &tmr->snapl);
-
-   /* Read timer value */
-   val = readl(&tmr->snapl) & 0x;
-   val |= (readl(&tmr->snaph) & 0x) << 16;
-
-   return ~val;
-}
-
-int timer_init(void)
-{
-   struct nios_timer *tmr = (struct nios_timer *)CONFIG_SYS_TIMER_BASE;
-
-   writel(0, &tmr->status);
-   writel(0, &tmr->control);
-   writel(NIOS_TIMER_STOP, &tmr->control);
-
-   writel(0x, &tmr->periodl);
-   writel(0x, &tmr->periodh);
-
-   writel(NIOS_TIMER_CONT | NIOS_TIMER_START, &tmr->control);
-
-   return 0;
-}
diff --git a/common/board_f.c b/common/board_f.c
index d0a9ff7..613332e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -795,8 +795,7 @@ static init_fnc_t init_sequence_f[] = {
init_timebase,
 #endif
 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
-defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
-defined(CONFIG_NIOS2)
+   defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32)
timer_init, /* initialize timer */
 #endif
 #ifdef CONFIG_SYS_ALLOC_DPRAM
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
index 707ee33..dac0b62 100644
--- a/configs/nios2-generic_defconfig
+++ b/configs/nios2-generic_defconfig
@@ -18,3 +18,5 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_ALTERA_PIO=y
 CONFIG_ALTERA_JTAG_UART=y
 CONFIG_ALTERA_JTAG_UART_BYPASS=y
+CONFIG_DM_TIMER=y
+CONFIG_ALTERA_TIMER=y
diff --git a/doc/device-tree-bindings/timer/altera_timer.txt 
b/doc/device-tree-bindings/timer/altera_timer.txt
new file mode 100644
index 000..904a584
--- /dev/null
+++ b/doc/device-tree-bindings/timer/altera_timer.txt
@@ -0,0 +1,19 @@
+Altera Timer
+
+Required properties:
+
+- compatible : should be "altr,timer-1.0"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-parent: phandle of the interrupt controller
+- interrupts : Should contain the timer interrupt number
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+   compatible = "altr,timer-1.0";
+   reg = <0x0040 0x0020>;
+   in

Re: [U-Boot] [PATCH v4 1/2] dm: implement a Timer uclass

2015-10-07 Thread Thomas Chou

Hi Simon,

On 10/06/2015 10:14 PM, Simon Glass wrote:

Hi Thomas,

On 4 October 2015 at 14:56, Thomas Chou  wrote:

Implement a Timer uclass to work with lib/time.c.

Signed-off-by: Thomas Chou 
Reviewed-by: Simon Glass 


Sorry, after a lot of consideration I'd like to retract that :-(

Please see below.

No worries. Your nits are welcome.


Also can you add a patch with a sandbox timer driver and a test (in
test/dm) for the timer?
I didn't  try sandbox before. I will learn sandbox and test. Then submit 
a patch for a sandbox timer driver.


Best regards,
Thomas
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[U-Boot] [PATCH] cmd_pci: Check for VendorID earlier

2015-10-07 Thread Fabio Estevam
From: Fabio Estevam 

Since commit ff3e077bd2 ("dm: pci: Add a uclass for PCI") the following
error message is seen:

=> pci 0
Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class   Sub-Class
_
00.01.00   0x16c3 0xabcd Bridge device   0x04
Cannot read bus configuration: -1

=> pci 1
Scanning PCI devices on bus 1
BusDevFun  VendorId   DeviceId   Device Class   Sub-Class
_
01.00.00   0x8086 0x08b1 Network controller  0x80
Cannot read bus configuration: -1

When we are done scanning the PCI devices pci_read_config_word() will
return -1 and VendorID will contain 0x.

The original code would exit the 'for' loop in this condition.

Keep the same original behaviour by first testing the VendorID value
and then checking and propagating the pci_read_config_word() error
afterwards.

Signed-off-by: Fabio Estevam 
---
 common/cmd_pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index dcecef8..92dc643 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -77,10 +77,10 @@ void pciinfo(int BusNum, int ShortPCIListing)
 
ret = pci_read_config_word(dev, PCI_VENDOR_ID,
   &VendorID);
-   if (ret)
-   goto error;
if ((VendorID == 0x) || (VendorID == 0x))
continue;
+   if (ret)
+   goto error;
 
if (!Function) pci_read_config_byte(dev, 
PCI_HEADER_TYPE, &HeaderType);
 
-- 
1.9.1

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Re: [U-Boot] PCI: Cannot read bus configuration

2015-10-07 Thread Fabio Estevam
On Wed, Oct 7, 2015 at 8:24 PM, Fabio Estevam  wrote:
> On Wed, Oct 7, 2015 at 8:07 PM, Fabio Estevam  wrote:
>> Hi Simon,
>>
>> On Wed, Oct 7, 2015 at 7:30 PM, Simon Glass  wrote:
>>
>>> This added error checking to pci_read_config_word(). It might be worth
>>> looking at why the access is failing.
>>
>> I noticed that when VendorID !=0x  then pci_read_config_word() returns 0.
>>
>> In the case when VendorID ==0x then it returns -1.
>>
>> If I do like this:
>>
>> --- a/common/cmd_pci.c
>> +++ b/common/cmd_pci.c
>> @@ -77,7 +77,7 @@ void pciinfo(int BusNum, int ShortPCIListing)
>>
>> ret = pci_read_config_word(dev, PCI_VENDOR_ID,
>>&VendorID);
>> -   if (ret)
>> +   if (ret && (VendorID != 0x))
>> goto error;
>> if ((VendorID == 0x) || (VendorID == 0x))
>> continue;
>>
>> Then the error message is not printed.
>>
>> Not familiar with the PCI code, so any suggestions are welcome.
>
> If I read the code right it seems that in this loop all the PCI
> devices will be scanned.
>
> When no more devices are found then pci_read_config_word() returns -1
> and VendoID == 0x.
>
> Maybe all we need to do is to filter the error message like this:
>
> --- a/common/cmd_pci.c
> +++ b/common/cmd_pci.c
> @@ -100,7 +100,8 @@ void pciinfo(int BusNum, int ShortPCIListing)
>
> return;
>  error:
> -   printf("Cannot read bus configuration: %d\n", ret);
> +   if (VendorID != 0x)
> +   printf("Cannot read bus configuration: %d\n", ret);
>  }
>
> Makes sense?

Ok, sent a patch that restored the original behaviour.
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Re: [U-Boot] PCI: Cannot read bus configuration

2015-10-07 Thread Fabio Estevam
On Wed, Oct 7, 2015 at 8:07 PM, Fabio Estevam  wrote:
> Hi Simon,
>
> On Wed, Oct 7, 2015 at 7:30 PM, Simon Glass  wrote:
>
>> This added error checking to pci_read_config_word(). It might be worth
>> looking at why the access is failing.
>
> I noticed that when VendorID !=0x  then pci_read_config_word() returns 0.
>
> In the case when VendorID ==0x then it returns -1.
>
> If I do like this:
>
> --- a/common/cmd_pci.c
> +++ b/common/cmd_pci.c
> @@ -77,7 +77,7 @@ void pciinfo(int BusNum, int ShortPCIListing)
>
> ret = pci_read_config_word(dev, PCI_VENDOR_ID,
>&VendorID);
> -   if (ret)
> +   if (ret && (VendorID != 0x))
> goto error;
> if ((VendorID == 0x) || (VendorID == 0x))
> continue;
>
> Then the error message is not printed.
>
> Not familiar with the PCI code, so any suggestions are welcome.

If I read the code right it seems that in this loop all the PCI
devices will be scanned.

When no more devices are found then pci_read_config_word() returns -1
and VendoID == 0x.

Maybe all we need to do is to filter the error message like this:

--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -100,7 +100,8 @@ void pciinfo(int BusNum, int ShortPCIListing)

return;
 error:
-   printf("Cannot read bus configuration: %d\n", ret);
+   if (VendorID != 0x)
+   printf("Cannot read bus configuration: %d\n", ret);
 }

Makes sense?

Thanks
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Re: [U-Boot] PCI: Cannot read bus configuration

2015-10-07 Thread Fabio Estevam
Hi Simon,

On Wed, Oct 7, 2015 at 7:30 PM, Simon Glass  wrote:

> This added error checking to pci_read_config_word(). It might be worth
> looking at why the access is failing.

I noticed that when VendorID !=0x  then pci_read_config_word() returns 0.

In the case when VendorID ==0x then it returns -1.

If I do like this:

--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -77,7 +77,7 @@ void pciinfo(int BusNum, int ShortPCIListing)

ret = pci_read_config_word(dev, PCI_VENDOR_ID,
   &VendorID);
-   if (ret)
+   if (ret && (VendorID != 0x))
goto error;
if ((VendorID == 0x) || (VendorID == 0x))
continue;

Then the error message is not printed.

Not familiar with the PCI code, so any suggestions are welcome.

Thanks
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Re: [U-Boot] [PATCH v5 2/2] nios2: convert altera sysid to driver model

2015-10-07 Thread Simon Glass
On 7 October 2015 at 13:29, Thomas Chou  wrote:
> Convert altera sysid to driver model with misc uclass.
>
> Signed-off-by: Thomas Chou 
> Acked-by: Chin Liang See 
> ---
> v2
>   fix coding style.
> v3
>   doc dts binding.
> v4
>   no change.
> v5
>   sort headers inclusion as Simon suggested.
>   add display_sysid() to asm/system.h.
>
>  arch/nios2/cpu/Makefile|   2 +-
>  arch/nios2/cpu/cpu.c   |  13 +---
>  arch/nios2/cpu/sysid.c |  46 -
>  arch/nios2/dts/3c120_devboard.dts  |   6 ++
>  arch/nios2/include/asm/system.h|   2 +
>  board/altera/nios2-generic/nios2-generic.c |   5 +-
>  configs/nios2-generic_defconfig|   2 +
>  drivers/misc/Kconfig   |   7 ++
>  drivers/misc/Makefile  |   1 +
>  drivers/misc/altera_sysid.c| 101 
> +
>  include/configs/nios2-generic.h|   2 +-
>  11 files changed, 127 insertions(+), 60 deletions(-)
>  delete mode 100644 arch/nios2/cpu/sysid.c
>  create mode 100644 drivers/misc/altera_sysid.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] PCI: Cannot read bus configuration

2015-10-07 Thread Simon Glass
Hi Fabio,

On 7 October 2015 at 19:34, Fabio Estevam  wrote:
> Hi Simon,
>
> Since commit ff3e077bd2 ("dm: pci: Add a uclass for PCI") I see the following
> error message after running the 'pci' command:
>
> => pci 0
> Scanning PCI devices on bus 0
> BusDevFun  VendorId   DeviceId   Device Class   Sub-Class
> _
> 00.01.00   0x16c3 0xabcd Bridge device   0x04
> Cannot read bus configuration: -1
> => pci 1
> Scanning PCI devices on bus 1
> BusDevFun  VendorId   DeviceId   Device Class   Sub-Class
> _
> 01.00.00   0x8086 0x08b1 Network controller  0x80
> Cannot read bus configuration: -1
> =>
>
> How can we silent this error?

This added error checking to pci_read_config_word(). It might be worth
looking at why the access is failing.

Regards,
Simon
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Re: [U-Boot] SPL and DM on ZYNQ

2015-10-07 Thread Simon Glass
Hi Jagan,

On 7 October 2015 at 19:01, Jagan Teki  wrote:
> On 7 October 2015 at 21:29, Simon Glass  wrote:
>> Hi,
>>
>> On 7 October 2015 at 13:50, Hannes Schmelzer  wrote:
>>> hi folks,
>>>
>>> i am not very familar with driver model until now and so i've a question.
>>>
>>> I'm trying to bring up my Zynq ZC702 evalboard using driver-model during SPL
>>> stage (because QSPI needs this).
>>> I simply switched on "Driver Model for SPL" within Kconfig and compiled.
>>>
>>> This ends up in:
>>>
>>> U-Boot SPL 2015.10-rc4-00050-g996ec1d-dirty (Oct 07 2015 - 13:57:32)
>spl:board_init_r()
>>> using memory 0x10c0-0x20c0 for malloc()
>>> spl_init()
>>> dm_init() failed: -2
>>> dm_init_and_scan() returned error -2
>>> ### ERROR ### Please RESET the board ###
>>>
>>>
>>> i had a look into drivers/core/root.c and saw that
>>>
>>> device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);
>>>
>>> fails.
>>>
>>> Any idea why the root-driver cannot be found ?
>>> Maybe there are some switched need to be switched on too.
>>
>> Is there any chance that your SPL does not have the linker lists set
>> up correctly?
>>
>> See this code in the standard ARM u-boot-spl.lds:
>>
>> #ifdef CONFIG_SPL_DM
>> .u_boot_list : {
>> KEEP(*(SORT(.u_boot_list_*_driver_*)));
>> KEEP(*(SORT(.u_boot_list_*_uclass_*)));
>> }
>> #endif
>
> I think these changes still in queue[1] I'm keep sending remainders,
> there is on PR blocks these changes[2]
>
> [1] 
> http://git.denx.de/?p=u-boot/u-boot-dm.git;a=shortlog;h=refs/heads/zynq-working
> [2] https://patchwork.ozlabs.org/patch/517709/
>

OK, I don't believe they are going in before the release, nor that I
should be pulling them. Please let me know if I have this wrong.

>>
>> I don't see it in the zynq one (arch/arm/mach-zynq).
>>
>> That would cause the uclass driver to be missing.
>
> --  Jagan.

Regards,
Simon
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Re: [U-Boot] U-Boot malloc implementation on arm - problem after relocation

2015-10-07 Thread mar.krzeminski



W dniu 07.10.2015 o 19:38, Andreas FƤrber pisze:

Hi Marcin,

Am 07.10.2015 um 15:58 schrieb Marcin Krzemiński:

Since I use qemu it
is very hard to debug with gdb u-boot after relocation( or I do not know
how to do it), so I am almost blind.

QEMU has a built-in gdb stub that you can just connect to as gdb remote
target, similar to how you would connect to a JTAG adapter's gdb server.
See documentation of qemu-system-arm -gdb and -s options.

It should behave the same as with a physical remote target, otherwise
please report to qemu-devel or a suitable bug tracker.

Regards,
Andreas


Hi Andreas,

I am debugging under qemu, and I can debug easily just to a moment 
before relocation.
If I reload symbols to my relocation address qemu does not stop at 
breakpoints (after I reinserted them).
As I understand qemus list there is a problem with relocated code. 
Anyway, you're right I'll ask.
Regarding my problem, debugging with prints showed me that it fails when 
malloc tries to extend top area,

and the top pointer seem to be in SDRAM.
If I do not use malloc before relocation (with enabled malloc_f) all 
seems to work just fine.


Regards,
Marcin


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[U-Boot] [PATCH] net: phy: micrel: disable NAND-tree for KSZ8051

2015-10-07 Thread Sylvain Rochet
NAND-tree is used to check wiring between MAC and PHY using NAND gates
on the PHY side, hence the name.

NAND-tree initial status is latched at reset by probing the IRQ pin.
However some devices are sharing the PHY IRQ pin with other peripherals
such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000
display module, therefore they are switching the PHY in NAND-tree test
mode depending on the current IRQ line status at reset.

This patch ensure PHY is not in NAND-tree test mode only for the Micrel
KSZ8051 PHY used by Atmel. There are other Micrel PHY affected but I
doubt they are used on such weird hardware design.

Signed-off-by: Sylvain Rochet 
---
 drivers/net/phy/micrel.c | 29 +
 1 file changed, 29 insertions(+)

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 507b9a3..a4a0efa 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -22,6 +22,34 @@ static struct phy_driver KSZ804_driver = {
.shutdown = &genphy_shutdown,
 };
 
+/**
+ * KSZ8051
+ */
+#define MII_KSZ8051_PHY_OMSO   0x16
+#define MII_KSZ8051_PHY_OMSO_NAND_TREE_ON  (1 << 5)
+
+static int ksz8051_config(struct phy_device *phydev)
+{
+   unsigned val;
+
+   /* Disable NAND-tree */
+   val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO);
+   val &= ~MII_KSZ8051_PHY_OMSO_NAND_TREE_ON;
+   phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO, val);
+
+   return genphy_config(phydev);
+}
+
+static struct phy_driver KSZ8051_driver = {
+   .name = "Micrel KSZ8051",
+   .uid = 0x221550,
+   .mask = 0xf0,
+   .features = PHY_BASIC_FEATURES,
+   .config = &ksz8051_config,
+   .startup = &genphy_startup,
+   .shutdown = &genphy_shutdown,
+};
+
 #ifndef CONFIG_PHY_MICREL_KSZ9021
 /*
  * I can't believe Micrel used the exact same part number
@@ -215,6 +243,7 @@ static struct phy_driver ksz9031_driver = {
 int phy_micrel_init(void)
 {
phy_register(&KSZ804_driver);
+   phy_register(&KSZ8051_driver);
 #ifdef CONFIG_PHY_MICREL_KSZ9021
phy_register(&ksz9021_driver);
 #else
-- 
2.5.1

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Re: [U-Boot] [PATCH] ls102xa: Fix reset hang

2015-10-07 Thread Fabio Estevam
On Wed, Oct 7, 2015 at 6:45 PM, York Sun  wrote:

> Please use master, or Tom's tree. My tree is behind and I only update before
> requesting a pull.

I generated the patches against master, so Tom should be able to apply
them cleanly.
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Re: [U-Boot] [PATCH] ls102xa: Fix reset hang

2015-10-07 Thread York Sun


On 10/07/2015 02:43 PM, Fabio Estevam wrote:
> On Sat, Oct 3, 2015 at 12:18 PM, Tom Rini  wrote:
> 
>> Fabio, can you do a v2 that makes the commit message a bit clearer that
>> this is a temporary work-around and that a proper solution to the
>> underlying problem is coming?  I think everyone that's reading this
>> thread knows this but we should make it clear to someone that just picks
>> up the code / commit (so maybe a comment block too) that we're making
>> things non-broken for the release but that's not the same thing as
>> making it correct for the long term.  Thanks!
> 
> Did as suggested in v3.
> 
> Into which tree will the patch go in: Yours or York's?
> 

Please use master, or Tom's tree. My tree is behind and I only update before
requesting a pull.

York
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Re: [U-Boot] [PATCH] ls102xa: Fix reset hang

2015-10-07 Thread Fabio Estevam
On Sat, Oct 3, 2015 at 12:18 PM, Tom Rini  wrote:

> Fabio, can you do a v2 that makes the commit message a bit clearer that
> this is a temporary work-around and that a proper solution to the
> underlying problem is coming?  I think everyone that's reading this
> thread knows this but we should make it clear to someone that just picks
> up the code / commit (so maybe a comment block too) that we're making
> things non-broken for the release but that's not the same thing as
> making it correct for the long term.  Thanks!

Did as suggested in v3.

Into which tree will the patch go in: Yours or York's?
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Re: [U-Boot] [PATCH] imximage: fix commands other than write_data

2015-10-07 Thread Troy Kisky
On 10/7/2015 11:25 AM, Fabio Estevam wrote:
> On Wed, Oct 7, 2015 at 2:54 PM, Troy Kisky
>  wrote:
> 
>> Could someone verify that one of the following boards still boot
>> with this patch?
>>
>>
>>
>> colibri_vf_dtb
>> mx6sabresd_spl
> 
> Tested with mx6sabresd_spl and it still boots.
> 
Thanks Fabio

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Re: [U-Boot] DWMMC crontroller in Exynos4412

2015-10-07 Thread Humberto LĆ³pez LeĆ³n

Hi Przemyslaw,

the version of the U-boot on which you made the corrections in the SDHCI 
controller is at 
https://github.com/hardkernel/u-boot/commits/odroid-v2015.10?


Regards,
Humberto

On 10/01/2015 07:24 AM, Przemyslaw Marczak wrote:

Hello Humberto,

On 09/28/2015 03:27 PM, Humberto LĆ³pez LeĆ³n wrote:

Hi Przemyslaw,

With the information you gave me I managed to implement an important
part of SDHCI controller. Currently the driver detects the SD card
correctly but I have a problem with writing operations. With the help of
linux command dd I found that the driver reads correctly but fails when
trying to write. I studied implementations of SDHCI controller in the
Linux kernel and the U-boot, but there are things I do not understand.

You have a document that explains how works the SDHCI controller ?


Please register at Jedec.org, and get this:

https://www.jedec.org/standards-documents/results/JESD84-B451

for eMMC 4.51, there are also older versions.

For SD card:

https://www.sdcard.org/downloads/pls/index.html

Try to find: SDCardStandardv1.9.pdf on the internet :)


I've also been working on the implementation of DWMMC controller to
manage the eMMC in ODROID-X2 (Exynos4412). Currently this driver detects
the eMMC card but fails to calculate the capacity of the card. The read
and write operations are not yet implemented.

You have a document that explains how works the DWMMC controller?

Thank you for your help!!
Humberto



Which U-Boot version do you use? There was an issue in the mainline 
with device-tree, which results in eMMC/SD card detection issue.

I think, that in few days my patches with fixes can be merged.


On 08/27/2015 02:47 AM, Przemyslaw Marczak wrote:

Hi Humberto,

On 08/26/2015 07:24 PM, Humberto LĆ³pez LeĆ³n wrote:

Hi Przemyslaw,

On 08/26/2015 10:12 AM, Przemyslaw Marczak wrote:

Hi Humberto,

On 08/26/2015 03:40 PM, Humberto LĆ³pez LeĆ³n wrote:

Hi community,

thank you all for answering my questions.

On 08/26/2015 02:53 AM, Przemyslaw Marczak wrote:

Hi,

On 08/26/2015 08:23 AM, Jaehoon Chung wrote:

On 08/26/2015 11:26 AM, Simon Glass wrote:

+Samsung people

Hi,

On 25 August 2015 at 13:10, Humberto LĆ³pez LeĆ³n 


wrote:

Hi Simon,
I'm working on implementing a driver for SD/MMC cards in the
framework
GenodeOS. I think you could help me with your experience in this
type of
implementation in the u-boot.
The hardware platform on which the driver will work is a 
ODROID-x2
(exynos4412). I use the DWMMC contoller, but I'm not sure if 
this

is the
right controller to handle SD/MMC cards in Exynos4412 SoC. The
SDHCI
controller is most appropriate?


If you're using exynos4412 board, you can choose sdhci or dwmmc
controller for eMMC, not SD/SDIO.
And in my experiment, dwmmc controller is more appropriate than
sdhci.(ex, performance)



It depends which mmc channel is used. In Exynos4412, there are 5
channels, but some channel configurations shares GPIO pins:
- MMC0 - sdhci
- MMC1 - sdhci, or MMC0 8-bit
- MMC2 - sdhci - Odroid SD card, 4-bit mode
- MMC3 - sdhci - or MMC2 8-bit
- MMC4 - dwmmc, uses MMC0 pins for 4-bit, and MMC0-1 for 8-bit mode

Odroid is using MMC2(sdhci) and MMC0/4(sdhci or dwmmc).

So for eMMC cards you can use the dwmmc, and as Jaehoon wrote it is
recommended for the better performance, but for SD card you must 
use

sdhci controller.

This information is valuable to me, but now I would help if you
tell me
where I can find the code of SDHCI controller for the SD card of
Exynos4412 in U-boat 2015.04-rc2 for a implementationtation
reference. I
was reviewing the file  exynos_dw_mmc.c as reference of DWMMC 
driver,

but now I have no idea what the file where the SDHCI driver for the
exynos4412 is implemented.

Thank you very much for your collaboration.





Please check those files:
- drivers/mmc/s5p_sdhci.c
- drivers/mmc/sdhci.c

But, isn't the kernel a better reference for you?

Thanks for your time to answer my questions. I have reviewed the
implementation of SDHCI controller in the Linux kernel for Odroid
(https://github.com/hardkernel/linux/blob/odroid-3.0.y/), but have not
been able to identify the specific implementation that is used for
handling of SD cards in exynos4412.
You know in what  file this controller is implemented? I think the 
file

should be drivers/mmc/host/sdhci-s3c.c
(https://github.com/hardkernel/linux/blob/odroid-3.0.y/drivers/mmc/host/sdhci-s3c.c) 



but I'm not sure.
What do you think?

Thanks again.

Humberto



Yes, this is the right file. Also remember about the pinmux setting
for sd/mmc.
In U-Boot: arch/arm/mach-exynos/pinmux.c
In kernel: drivers/pinctrl/pinctrl-exynos.c

Best regards,





Best regards,


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Re: [U-Boot] [PATCH 1/5] fs/fat/fat_write: Fix buffer alignments

2015-10-07 Thread BenoƮt ThƩbaudeau
Hi Tom,

On Mon, Sep 28, 2015 at 5:22 PM, Tom Rini  wrote:
> On Mon, Sep 28, 2015 at 03:45:28PM +0200, BenoƮt ThƩbaudeau wrote:
>
>> set_cluster() was using a temporary buffer without enforcing its
>> alignment for DMA and cache. Moreover, it did not check the alignment of
>> the passed buffer, which can come directly from applicative code or from
>> the user.
>>
>> This could cause random data corruption, which has been observed on
>> i.MX25 writing to an SD card.
>>
>> Fix this by only passing ARCH_DMA_MINALIGN-aligned buffers to
>> disk_write(), which requires the introduction of a buffer bouncing
>> mechanism for the misaligned buffers passed to set_cluster().
>>
>> By the way, improve the handling of the corresponding return values from
>> disk_write():
>>  - print them with debug() in case of error,
>>  - consider that there is an error is disk_write() returns a smaller
>>block count than the requested one, not only if its return value is
>>negative.
>>
>> After this change, set_cluster() and get_cluster() are almost
>> symmetrical.
>>
>> Signed-off-by: BenoƮt ThƩbaudeau 
>
> OK.  I know Stephen has a series to replace all of the FAT code for
> the next release once some performance issues are addressed.  But I'm
> inclined to take this series (after some reviews and so forth) for this
> release at least because this sounds like some bad bugs and more things
> are starting to rely on fatwrite functionality (for example, env saved
> as a file in FAT is getting common on community-style boards).

I agree, but there is not much review activity. Do you know anyone
else who might be interested in this and who should be Cc'ed?

Best regards,
BenoƮt
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Re: [U-Boot] U-Boot - Download URL and certificates

2015-10-07 Thread Wolfgang Denk
Dear Markus,

In message <56122fa6.8010...@tqsc.de> you wrote:
> 
> we are facing problems with downloading U-Boot tarballs and
> automated build systems.

Tarballs?  But that should be trivial.  Tarballs are easily available
on the FTP server.  They are also eavailable on ACD, but this is not
exactly easy to script.  See [1], bullet # 2 for details.

Alternatively, you can always use the snapshot links from the git
repository to dynamically create and download tarballs of arbitrary
versions in the git repo.  This is also trivial to script (but please
minimize such use to the necessary, as it puts a high load on the git
server).


> The old URL are redirected to owncloud.denx.de and owncloud.denx.de
> uses a self signed certificate.

What exactly do you mean by "old URL"?

owncloud.denx.de is in no way used for distributing the mainline
versions of U-Boot.  We host a number of customer specific
repositories there, that's true, but these customers know how to
access it.  I don't think that there are any TQ specific repositories
on our owncloud server.


> Did we miss the hint where to get the certificate(s)?

I think you must be doing something wrong.  No certificates are needed
to download the tarballs from the FTP server, ACD or git. 


[1] http://www.denx.de/wiki/U-Boot/SourceCode


Hope this helps.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
As long as we're going to reinvent the wheel again, we might as  well
try making it round this time.- Mike Dennison
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Re: [U-Boot] [PATCH 2/6] video: vesa_fb: Fix wrong return value check of pci_find_class()

2015-10-07 Thread Anatolij Gustschin
On Thu,  1 Oct 2015 00:36:00 -0700
Bin Meng  wrote:

> When pci_find_class() fails to find a device, it returns -ENODEV.
> But now we check the return value against -1. Fix it.
> 
> Signed-off-by: Bin Meng 
> ---
> 
>  drivers/video/vesa_fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Anatolij Gustschin 
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[U-Boot] PCI: Cannot read bus configuration

2015-10-07 Thread Fabio Estevam
Hi Simon,

Since commit ff3e077bd2 ("dm: pci: Add a uclass for PCI") I see the following
error message after running the 'pci' command:

=> pci 0
Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class   Sub-Class
_
00.01.00   0x16c3 0xabcd Bridge device   0x04
Cannot read bus configuration: -1
=> pci 1
Scanning PCI devices on bus 1
BusDevFun  VendorId   DeviceId   Device Class   Sub-Class
_
01.00.00   0x8086 0x08b1 Network controller  0x80
Cannot read bus configuration: -1
=>

How can we silent this error?

Regards,

Fabio Estevam
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Re: [U-Boot] [PATCH] imximage: fix commands other than write_data

2015-10-07 Thread Fabio Estevam
On Wed, Oct 7, 2015 at 2:54 PM, Troy Kisky
 wrote:

> Could someone verify that one of the following boards still boot
> with this patch?
>
>
>
> colibri_vf_dtb
> mx6sabresd_spl

Tested with mx6sabresd_spl and it still boots.
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Re: [U-Boot] [PATCH] common/image.c: Make boot_get_ramdisk() perform a check for Android images

2015-10-07 Thread Paul Kocialkowski
Hi,

Le lundi 05 octobre 2015 Ć  14:23 -0500, Rob Herring a Ć©crit :
> On Tue, Sep 1, 2015 at 8:50 AM, Paul Kocialkowski 
> wrote:
> > Le jeudi 27 aoƻt 2015 Ơ 15:42 -0400, Tom Rini a Ʃcrit :
> > > In 2dd4632 the check for where a ramdisk is found on an Android
> > > image
> > > was got moved into the "normal" loop here, causing people to have
> > > to
> > > pass the kernel address in the ramdisk address location in order
> > > to have
> > > Android boot still.  This changed previous behavior so perform a
> > > check
> > > early in the function to see if we have an Android image and if
> > > so use
> > > that as where to look for the ramdisk (which is what the rest of
> > > the
> > > code here expects).
> > 
> > That patch does fix my problem (the ramdisk is now correctly passed
> > to
> > the kernel). I suggest that you merge it ASAP.
> 
> Doesn't look like this was ever merged or respun. I had some
> comments,
> but have no issue if they addressed separately as part of some
> refactoring.

Well, I would like to see this getting merged soon, because Android
booting on sniper (LG Optimus Black) is currently broken.

Tom, would you consider picking it up for the current rc round?
I realize I had forgotten about this patch and should have suggested it
earlier on in the cycle.

Either way, I should test the current rc on my device and report back
if there is anything else going wrong.

-- 
Paul Kocialkowski, Replicant developer

Replicant is a fully free Android distribution running on several
devices, a free software mobile operating system putting the emphasis
on
freedom and privacy/security.

Website: https://www.replicant.us/
Blog: https://blog.replicant.us/
Wiki/tracker/forums: https://redmine.replicant.us/


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Re: [U-Boot] SPL and DM on ZYNQ

2015-10-07 Thread Jagan Teki
On 7 October 2015 at 21:29, Simon Glass  wrote:
> Hi,
>
> On 7 October 2015 at 13:50, Hannes Schmelzer  wrote:
>> hi folks,
>>
>> i am not very familar with driver model until now and so i've a question.
>>
>> I'm trying to bring up my Zynq ZC702 evalboard using driver-model during SPL
>> stage (because QSPI needs this).
>> I simply switched on "Driver Model for SPL" within Kconfig and compiled.
>>
>> This ends up in:
>>
>> U-Boot SPL 2015.10-rc4-00050-g996ec1d-dirty (Oct 07 2015 - 13:57:32)
spl:board_init_r()
>> using memory 0x10c0-0x20c0 for malloc()
>> spl_init()
>> dm_init() failed: -2
>> dm_init_and_scan() returned error -2
>> ### ERROR ### Please RESET the board ###
>>
>>
>> i had a look into drivers/core/root.c and saw that
>>
>> device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);
>>
>> fails.
>>
>> Any idea why the root-driver cannot be found ?
>> Maybe there are some switched need to be switched on too.
>
> Is there any chance that your SPL does not have the linker lists set
> up correctly?
>
> See this code in the standard ARM u-boot-spl.lds:
>
> #ifdef CONFIG_SPL_DM
> .u_boot_list : {
> KEEP(*(SORT(.u_boot_list_*_driver_*)));
> KEEP(*(SORT(.u_boot_list_*_uclass_*)));
> }
> #endif

I think these changes still in queue[1] I'm keep sending remainders,
there is on PR blocks these changes[2]

[1] 
http://git.denx.de/?p=u-boot/u-boot-dm.git;a=shortlog;h=refs/heads/zynq-working
[2] https://patchwork.ozlabs.org/patch/517709/

>
> I don't see it in the zynq one (arch/arm/mach-zynq).
>
> That would cause the uclass driver to be missing.

--  Jagan.
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Re: [U-Boot] [PATCH] Fix variation in timestamps caused by timezone differences.

2015-10-07 Thread Paul Kocialkowski
Le vendredi 02 octobre 2015 Ć  09:11 -0700, Vagrant Cascadian a Ć©crit :
> When building with SOURCE_DATE_EPOCH set, avoid use of mktime in
> default_image.c, which converts the timestamp into localtime. This
> causes variation based on timezone when building u-boot.img and
> u-boot-sunxi-with-spl.bin targets.

I have tested this with the Cubieboard2_defconfig when setting
SOURCE_DATE_EPOCH and changing TZ. This corrects the problem in the way
I suggested, so this is:

Tested-by: Paul Kocialkowski 
Acked-by: Paul Kocialkowski 

Thanks!

> Signed-off-by: Vagrant Cascadian 
> ---
> 
>  tools/default_image.c | 6 +-
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/tools/default_image.c b/tools/default_image.c
> index 18940af..3ed7014 100644
> --- a/tools/default_image.c
> +++ b/tools/default_image.c
> @@ -89,7 +89,6 @@ static void image_set_header(void *ptr, struct stat
> *sbuf, int ifd,
>  {
>   uint32_t checksum;
>   char *source_date_epoch;
> - struct tm *time_universal;
>   time_t time;
>  
>   image_header_t * hdr = (image_header_t *)ptr;
> @@ -103,13 +102,10 @@ static void image_set_header(void *ptr, struct
> stat *sbuf, int ifd,
>   if (source_date_epoch != NULL) {
>   time = (time_t) strtol(source_date_epoch, NULL, 10);
>  
> - time_universal = gmtime(&time);
> - if (time_universal == NULL) {
> + if (gmtime(&time) == NULL) {
>   fprintf(stderr, "%s: SOURCE_DATE_EPOCH is
> not valid\n",
>   __func__);
>   time = 0;
> - } else {
> - time = mktime(time_universal);
>   }
>   } else {
>   time = sbuf->st_mtime;


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Re: [U-Boot] [PATCH] imximage: fix commands other than write_data

2015-10-07 Thread Troy Kisky
On 10/7/2015 5:05 AM, Stefano Babic wrote:
> Hi Troy,
> 
> On 15/09/2015 03:06, Troy Kisky wrote:
>> When CHECK_BITS_SET was added, they forgot to add
>> a new command table, and instead overwrote the
>> previous table.
>>
>> Signed-off-by: Troy Kisky 
>>
>> ---
> 
> Applied to u-boot-imx (fix), thanks !
> 
> Best regards,
> Stefano Babic
> 

Could someone verify that one of the following boards still boot
with this patch?



colibri_vf_dtb
mx6sabresd_spl
colibri_vf
vf610twr
cm_fx6
vf610twr_nand
mx6cuboxi


Just in case the ROM has a need for a non-empty DCD table.

Thanks
Troy
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Re: [U-Boot] U-Boot malloc implementation on arm - problem after relocation

2015-10-07 Thread Andreas FƤrber
Hi Marcin,

Am 07.10.2015 um 15:58 schrieb Marcin Krzemiński:
> Since I use qemu it
> is very hard to debug with gdb u-boot after relocation( or I do not know
> how to do it), so I am almost blind.

QEMU has a built-in gdb stub that you can just connect to as gdb remote
target, similar to how you would connect to a JTAG adapter's gdb server.
See documentation of qemu-system-arm -gdb and -s options.

It should behave the same as with a physical remote target, otherwise
please report to qemu-devel or a suitable bug tracker.

Regards,
Andreas

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Re: [U-Boot] SPL and DM on ZYNQ

2015-10-07 Thread Simon Glass
Hi,

On 7 October 2015 at 13:50, Hannes Schmelzer  wrote:
> hi folks,
>
> i am not very familar with driver model until now and so i've a question.
>
> I'm trying to bring up my Zynq ZC702 evalboard using driver-model during SPL
> stage (because QSPI needs this).
> I simply switched on "Driver Model for SPL" within Kconfig and compiled.
>
> This ends up in:
>
> U-Boot SPL 2015.10-rc4-00050-g996ec1d-dirty (Oct 07 2015 - 13:57:32)
>>>spl:board_init_r()
> using memory 0x10c0-0x20c0 for malloc()
> spl_init()
> dm_init() failed: -2
> dm_init_and_scan() returned error -2
> ### ERROR ### Please RESET the board ###
>
>
> i had a look into drivers/core/root.c and saw that
>
> device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);
>
> fails.
>
> Any idea why the root-driver cannot be found ?
> Maybe there are some switched need to be switched on too.

Is there any chance that your SPL does not have the linker lists set
up correctly?

See this code in the standard ARM u-boot-spl.lds:

#ifdef CONFIG_SPL_DM
.u_boot_list : {
KEEP(*(SORT(.u_boot_list_*_driver_*)));
KEEP(*(SORT(.u_boot_list_*_uclass_*)));
}
#endif

I don't see it in the zynq one (arch/arm/mach-zynq).

That would cause the uclass driver to be missing.

Regards,
Simon
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Re: [U-Boot] [PATCH] tools/proftool: fix use-after-free

2015-10-07 Thread Tom Rini
On Wed, Oct 07, 2015 at 04:35:53PM +0200, Vincent StehlƩ wrote:
> On 10/07/2015 04:19 PM, Tom Rini wrote:
> ..
> > Were you in the Coverity talk too? :)
> 
> Hi Tom,
> 
> No, I was not following that talk, sorry.

Ah, coincidence then.

> ..
> > free(line);
> > -   return regex_report_error(&line->regex, err, 
> > "compile",
> > +   err = regex_report_error(&line->regex, err, 
> > "compile",
> >   tok);
> > +   return err;
> 
> I am not sure you solve the problem this way. Indeed the structure
> pointed to by the line pointer will still have been freed before use
> even this way. Who knows what the memory contains when regerror() will
> access &line->regex, which is contained into the freed structure?

Er, bah.  That's what I get for writing something in the middle of
listening to a talk too.  I meant to also move the free() to after the
regex_report_error call and just avoid adding another variable.

-- 
Tom


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[U-Boot] [PATCH 1/2] x86: gpio: Make x86-pinctrl subnode of ich6-gpio

2015-10-07 Thread George McCollister
Instead of having x86-pinctrl work separately from ich6-gpio have it
work underneath ich6-gpio. This removes redundant configuration and will
allow the addition of shared bank settings in future commits.

Signed-off-by: George McCollister 
---
 arch/x86/dts/minnowmax.dts |  96 +-
 arch/x86/include/asm/gpio.h|   1 -
 board/intel/minnowmax/minnowmax.c  |   9 +-
 doc/device-tree-bindings/gpio/intel,ich6-gpio.txt  |  14 +++
 .../gpio/intel,x86-pinctrl.txt |  17 ++--
 drivers/gpio/intel_ich6_gpio.c | 107 -
 6 files changed, 118 insertions(+), 126 deletions(-)
 create mode 100644 doc/device-tree-bindings/gpio/intel,ich6-gpio.txt

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index e917f0f..79ac26d 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -26,54 +26,6 @@
silent_console = <0>;
};
 
-   pch_pinctrl {
-   compatible = "intel,x86-pinctrl";
-   io-base = <0x4c>;
-
-   /* GPIO E0 */
-   soc_gpio_s5_0@0 {
-   gpio-offset = <0x80 0>;
-   pad-offset = <0x1d0>;
-   mode-gpio;
-   output-value = <0>;
-   direction = ;
-   };
-
-   /* GPIO E1 */
-   soc_gpio_s5_1@0 {
-   gpio-offset = <0x80 1>;
-   pad-offset = <0x210>;
-   mode-gpio;
-   output-value = <0>;
-   direction = ;
-   };
-
-   /* GPIO E2 */
-   soc_gpio_s5_2@0 {
-   gpio-offset = <0x80 2>;
-   pad-offset = <0x1e0>;
-   mode-gpio;
-   output-value = <0>;
-   direction = ;
-   };
-
-   pin_usb_host_en0@0 {
-   gpio-offset = <0x80 8>;
-   pad-offset = <0x260>;
-   mode-gpio;
-   output-value = <1>;
-   direction = ;
-   };
-
-   pin_usb_host_en1@0 {
-   gpio-offset = <0x80 9>;
-   pad-offset = <0x250>;
-   mode-gpio;
-   output-value = <1>;
-   direction = ;
-   };
-   };
-
gpioa {
compatible = "intel,ich6-gpio";
u-boot,dm-pre-reloc;
@@ -107,6 +59,54 @@
u-boot,dm-pre-reloc;
reg = <0x80 0x20>;
bank-name = "E";
+
+   pch_pinctrl@0 {
+   compatible = "intel,x86-pinctrl";
+   io-base = <0x4c>;
+
+   /* GPIO E0 */
+   soc_gpio_s5_0@0 {
+   gpio-offset = <0>;
+   pad-offset = <0x1d0>;
+   mode-gpio;
+   output-value = <0>;
+   direction = ;
+   };
+
+   /* GPIO E1 */
+   soc_gpio_s5_1@0 {
+   gpio-offset = <1>;
+   pad-offset = <0x210>;
+   mode-gpio;
+   output-value = <0>;
+   direction = ;
+   };
+
+   /* GPIO E2 */
+   soc_gpio_s5_2@0 {
+   gpio-offset = <2>;
+   pad-offset = <0x1e0>;
+   mode-gpio;
+   output-value = <0>;
+   direction = ;
+   };
+
+   pin_usb_host_en0@0 {
+   gpio-offset = <8>;
+   pad-offset = <0x260>;
+   mode-gpio;
+   output-value = <1>;
+   direction = ;
+   };
+
+   pin_usb_host_en1@0 {
+   gpio-offset = <9>;
+   pad-offset = <0x250>;
+   mode-gpio;
+   output-value = <1>;
+   direction = ;
+   };
+   };
};
 
gpiof {
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index ed85b08..1099427 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,7 +147,6 @@ struct pch_gpio_map {
} set3;
 };
 
-int gpio_ich6_pinctrl_init(void);
 void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpi

Re: [U-Boot] U-Boot v2015.04, x86 Intel Baytrail, and hsuart0 configuration

2015-10-07 Thread Timothy Scott
Bin,

Thanks for the response.  I've got things working with v2015.04, but it
took some tweaking.  Here's what I learned:

1) PCI is initialized AFTER the code was attempting to configure hsuart0.
Since hsuart0 is on the PCI bus, the various registers being read were
coming up 0x and therefore hsuart0 access was invalid.
2) I'm swapping between PCU_UART (legac y) and SIO_UART at run-time, while
using the ns16550 driver in both instances.  The code that underlies
ns16550_writeb() and ns16550_readb() expects things to be configured at
compile time via CONFIG options instead of something you can jack with at
run-time.

My workarounds:
- created hsuart_init() in serial-uclass.c, patterned off of
serial_find_console_or_panic().  This references a unique chosen option I
named "hsuart-path" and loads up hsuart device for me.  I do this to get
the hsuart0 probed and loaded.  (If there's a better way to force a device
probe, please let me know.)
- created initr_hsuart_serial() in board_r.c, and invoked this via the
init_sequence_r[] table, after initr_pci.
- updated ns16550.c's ns16550_platdata with a "mem_map" parameter.  I added
a "mem-map" parm to the hsuart DTS entry, and load this value in via
ns16550_serial_ofdata_to_platdata.  This is then referenced in
ns16550_writeb() and ns16550_readb() to perform a memory mapped access,
instead of whatever the CONFIG options have defined.  In my case, CONFIG
options result in a port mapped access.

All this is pretty hackish but works for my purposes.

Thanks again,
--tim


On Wed, Oct 7, 2015 at 3:10 AM, Bin Meng  wrote:

> Hi Tim,
>
> +Simon and U-Boot ML.
>
> On Wed, Oct 7, 2015 at 12:22 AM, Timothy Scott 
> wrote:
> > Bin,
> >
> > I've seen your name associated with U-boot repo commits relating to the
> > ns16550 and the UARTs that are sitting on the PCI bus for the Intel
> > Baytrail.  I'm working on setting up a board based on the Intel E3815
> > (Baytrail) and am having difficulty redirecting the console to hsuart0.
> > Things work great for the legacy COM port @ address 0x3F8, but fail (ie.
> > continuous U-Boot resets) when I try to change things to use hsuart0.
> With
> > the hsuart0 defined in the DTS, I'd expect "coninfo" to reflect the
> hsuart0
> > device, but I do not see it.  "dm tree" shows the device present but
> that it
> > is unprobed.
> >
> > Note that I'm working against U-Boot v2015.04.  I tried updating to
> v2015.07
> > to see if that would help, but that ended up killing other devices that
> are
> > working fine on v2015.04 so I'm trying to stick with that.
> >
>
> Can you please rebase your working tree based on commit
>
> commit b21b208184721eed198bdf59204b452716986377
> Author: Bin Meng 
> Date:   Wed Dec 31 16:05:14 2014 +0800
>
> x86: crownbay: Add pci devices in the dts file
>
> This is the initial commit that was the first time to support PCI UART
> and verified on Intel Crown Bay.
>
> At some time later there was a change in the dev_get_addr() API that
> broke the PCI UART codes but I can't remember when that regression was
> introduced. This was later fixed by commit:
>
> commit 236efe36be6d1c544f9477f10fdf38a17cd7a869
> Author: Simon Glass 
> Date:   Sun Aug 2 18:13:50 2015 -0600
>
> Revert "fdt: Fix fdtdec_get_addr_size() for 64-bit"
>
> The symptom you observed (continuous U-Boot reset) is probably due to
> this. As when U-Boot does not find a working serial console, it simply
> resets.
>
> > Here's my current DTS file.  I used the crownbay.dts configuration as a
> > reference.  Not sure if you can see anything wrong with my config, but a
> > second pair of eyes on it would help!
> >
> > /dts-v1/;
> >
> > /include/ "skeleton.dtsi"
> > /include/ "serial.dtsi"
> >
> > / {
> > model = "Yukon"; /* my board name */
> > compatible = "intel,yukon", "intel,baytrail";
> >
> > aliases {
> > serial0 = "/serial";
> > serial1 = "/pci/serial@1e,3";
> > };
> >
> > config {
> > silent_console = <0>;
> > };
> >
> > chosen {
> > stdout-path = "/serial"; /* switching this to &hsuart0; results in
> > continuous resets.  Configuration as-is works fine but uses the PCU uart
> on
> > the baytrail part. */
> > };
> > pci {
> > #address-cells = <3>;
> > #size-cells = <2>;
> > compatible = "simple-bus"; /* I had to change this from intel,cpi to
> > simple-bus in order for 'dm tree' to show this node and the hsuart0
> node/ */
> > device_type="pci";
> >
> > hsuart0: serial@1e,3 {
> > compatible = "pci8086,0f0a","x86-uart";
> > u-boot,dm-pre-reloc;
> > reg = <0x0200F310 0x0 0x0 0x0 0x0>; /* memory-mapped, PCI 0/30/3
> > device, config @ address 0x10 */
> > reg-shift = <0>;
> > clock-frequency = <1843200>;
> > current-speed = <115200>;
> > };
> > };
> > };
> >
> > Here is the output of "coninfo" with the above DTS definitions:
> >
> > => coninfo
> > List of available devices:
> > serial   0003 .IO stdin stdout stderr
> > sserial  8003 SIO
> > nulldev  8003 SIO
> > nc

[U-Boot] [PATCH 2/2] x86: gpio: Add use-lvl-write-cache to fix baytrail

2015-10-07 Thread George McCollister
Add a device-tree property use-lvl-write-cache that will cause writes to
lvl to be cached instead of read from lvl before each write. This is
required on some platforms that have the register implemented as dual
read/write (such as Baytrail).

Prior to this fix the blue USB port on the Minnowboard Max was unusable
since USB_HOST_EN0 was set high then immediately set low when
USB_HOST_EN1 was written.

Signed-off-by: George McCollister 
---
 arch/x86/dts/minnowmax.dts|  6 ++
 doc/device-tree-bindings/gpio/intel,ich6-gpio.txt |  5 +
 drivers/gpio/intel_ich6_gpio.c| 20 +++-
 3 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 79ac26d..5a76c8e 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -31,6 +31,7 @@
u-boot,dm-pre-reloc;
reg = <0 0x20>;
bank-name = "A";
+   use-lvl-write-cache;
};
 
gpiob {
@@ -38,6 +39,7 @@
u-boot,dm-pre-reloc;
reg = <0x20 0x20>;
bank-name = "B";
+   use-lvl-write-cache;
};
 
gpioc {
@@ -45,6 +47,7 @@
u-boot,dm-pre-reloc;
reg = <0x40 0x20>;
bank-name = "C";
+   use-lvl-write-cache;
};
 
gpiod {
@@ -52,6 +55,7 @@
u-boot,dm-pre-reloc;
reg = <0x60 0x20>;
bank-name = "D";
+   use-lvl-write-cache;
};
 
gpioe {
@@ -59,6 +63,7 @@
u-boot,dm-pre-reloc;
reg = <0x80 0x20>;
bank-name = "E";
+   use-lvl-write-cache;
 
pch_pinctrl@0 {
compatible = "intel,x86-pinctrl";
@@ -114,6 +119,7 @@
u-boot,dm-pre-reloc;
reg = <0xA0 0x20>;
bank-name = "F";
+   use-lvl-write-cache;
};
 
chosen {
diff --git a/doc/device-tree-bindings/gpio/intel,ich6-gpio.txt 
b/doc/device-tree-bindings/gpio/intel,ich6-gpio.txt
index 23345b2..dbdcff4 100644
--- a/doc/device-tree-bindings/gpio/intel,ich6-gpio.txt
+++ b/doc/device-tree-bindings/gpio/intel,ich6-gpio.txt
@@ -4,6 +4,10 @@ Each GPIO bank node can have the following properties:
 - compatible  - (required) must be set to "intel,x86-pinctrl"
 - reg - (required) GPIO offset and length.
 - bank-name   - (required) Name of the bank.
+- use-lvl-write-cache - (optional) Cache last value written to lvl and use it
+   the next time lvl is written instead of
+   reading lvl prior to writing. Required
+   for some platforms (Baytrail).
 
 Example:
 gpioa {
@@ -11,4 +15,5 @@ gpioa {
u-boot,dm-pre-reloc;
reg = <0 0x20>;
bank-name = "A";
+   use-lvl-write-cache;
 };
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 18420f3..b239ab5 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -44,6 +44,8 @@ struct ich6_bank_priv {
u16 use_sel;
u16 io_sel;
u16 lvl;
+   u32 lvl_write_cache;
+   bool use_lvl_write_cache;
 };
 
 #define IOPAD_MODE_MASK0x7
@@ -150,12 +152,17 @@ static int ich6_gpio_set_value(struct udevice *dev, 
unsigned offset,
struct ich6_bank_priv *bank = dev_get_priv(dev);
u32 val;
 
-   val = inl(bank->lvl);
+   if (bank->use_lvl_write_cache)
+   val = bank->lvl_write_cache;
+   else
+   val = inl(bank->lvl);
if (value)
val |= (1UL << offset);
else
val &= ~(1UL << offset);
outl(val, bank->lvl);
+   if (bank->use_lvl_write_cache)
+   bank->lvl_write_cache = val;
 
return 0;
 }
@@ -353,6 +360,7 @@ static int ich6_gpio_probe(struct udevice *dev)
struct ich6_bank_platdata *plat = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct ich6_bank_priv *bank = dev_get_priv(dev);
+   const void *prop;
 
if (gd->arch.gpio_map) {
setup_pch_gpios(plat->base_addr, gd->arch.gpio_map);
@@ -365,6 +373,14 @@ static int ich6_gpio_probe(struct udevice *dev)
bank->io_sel = plat->base_addr + 4;
bank->lvl = plat->base_addr + 8;
 
+   prop = fdt_getprop(gd->fdt_blob, dev->of_offset,
+  "use-lvl-write-cache", NULL);
+   if (prop)
+   bank->use_lvl_write_cache = true;
+   else
+   bank->use_lvl_write_cache = false;
+   bank->lvl_write_cache = 0;
+
gpio_ich6_pinctrl_init(dev);
 
return 0;
@@ -415,6 +431,8 @@ static int ich6_gpio_get_value(struct udevice *dev, 
unsigned offset)
 

Re: [U-Boot] [PATCH] tools/proftool: fix use-after-free

2015-10-07 Thread Vincent StehlƩ
On 10/07/2015 04:19 PM, Tom Rini wrote:
..
> Were you in the Coverity talk too? :)

Hi Tom,

No, I was not following that talk, sorry.

..
> free(line);
> -   return regex_report_error(&line->regex, err, 
> "compile",
> +   err = regex_report_error(&line->regex, err, "compile",
>   tok);
> +   return err;

I am not sure you solve the problem this way. Indeed the structure
pointed to by the line pointer will still have been freed before use
even this way. Who knows what the memory contains when regerror() will
access &line->regex, which is contained into the freed structure?

Best regards,

V.




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[U-Boot] Please pull ARC fixes

2015-10-07 Thread Alexey Brodkin
Hi Tom,

The following changes since commit 996ec1dcc58a34b53891acde0ec5df9141b5fcc2:

  Merge branch 'master' of git://git.denx.de/u-boot-fdt (2015-10-03 10:48:06 
-0400)

are available in the git repository at:

  git://git.denx.de/u-boot-arc.git 

for you to fetch changes up to f6e27ba5b40a8861336f4e27a7b95cf60b0c8961:

  board: axs10x - cap max SDIO clock value to bus/2 (2015-10-07 18:16:13 +0300)


Alexey Brodkin (1):
  board: axs10x - cap max SDIO clock value to bus/2

 board/synopsys/axs101/axs101.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Regards,
Alexey
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[U-Boot] [PATCH] board: axs10x - cap max SDIO clock value to bus/2

2015-10-07 Thread Alexey Brodkin
It turned out with some boards (FPGA firmwares?) and cards combos
current clock settings doesn't work as expected leading to strange
card freezes or corrupted data being read from the card.

Especially this was seen with Transcend 2Gb cards shipped as a part of
ARC SDP:
->8---
AXS# mmcinfo
Device: Synopsys Mobile storage
Manufacturer ID: 74
OEM: 4a60
Name: SDC
Tran Speed: 5000
Rd Block Len: 512
SD version 3.0
High Capacity: No
Capacity: 1.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
AXS# fatload mmc 0
** Unrecognized filesystem type **
->8---

With this change that problem is fixed.
Note "Tran Speed" above doesn't match clock value set in DW MMC.
It is max value for card's speed class.

Signed-off-by: Alexey Brodkin 
---
 board/synopsys/axs101/axs101.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/synopsys/axs101/axs101.c b/board/synopsys/axs101/axs101.c
index d4280f7..aa446b9 100644
--- a/board/synopsys/axs101/axs101.c
+++ b/board/synopsys/axs101/axs101.c
@@ -30,7 +30,7 @@ int board_mmc_init(bd_t *bis)
host->dev_index = 0;
host->bus_hz = 5000;
 
-   add_dwmci(host, host->bus_hz, 40);
+   add_dwmci(host, host->bus_hz / 2, 40);
 
return 0;
 }
-- 
2.4.3

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Re: [U-Boot] [PATCH] tools/proftool: fix use-after-free

2015-10-07 Thread Tom Rini
On Wed, Oct 07, 2015 at 03:48:48PM +0200, Vincent StehlƩ wrote:

> The read_trace_config() can dereference the line pointer after freeing
> it on its error path. Avoid that.
> 
> This was found by Coverity Scan.
> 
> Signed-off-by: Vincent StehlƩ 
> Cc: Simon Glass 

Were you in the Coverity talk too? :)  I saw this error as well today
now.  I was actually thinking along the lines of:
diff --git a/tools/proftool.c b/tools/proftool.c
index 9ce7a77..b3d3057 100644
--- a/tools/proftool.c
+++ b/tools/proftool.c
@@ -433,8 +433,9 @@ static int read_trace_config(FILE *fin)
err = regcomp(&line->regex, tok, REG_NOSUB);
if (err) {
free(line);
-   return regex_report_error(&line->regex, err, "compile",
+   err = regex_report_error(&line->regex, err, "compile",
  tok);
+   return err;
}
 
/* link this new one to the end of the list */

-- 
Tom


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[U-Boot] U-Boot malloc implementation on arm - problem after relocation

2015-10-07 Thread Marcin Krzemiński
Hello,

In my board I have some problems with malloc functionality. In config I
have settings for malloc:
#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
#define CONFIG_SYS_MALLOC_F_LEN (1024)
I am running u-boot without SPL. Uboot starts from SRAM and then relocates
to DRAM.
When I run u-boot from flash (_f functions ) I am opening spi to access one
sector from flash - that is why i need malloc in that phase.
After relocation first call of malloc cause u-boot to genrate data-access
exception. From my debugging it seems, that top pointer from dlmalloc is
still points to malloc region before relocation(SRAM). Since I use qemu it
is very hard to debug with gdb u-boot after relocation( or I do not know
how to do it), so I am almost blind.
Do you know what I am doing wrong?
Additionally I  do not use CONFIG_NEEDS_MANUAL_RELOC since i do not need it
(or i think I do not need).

Regards,
Marcin
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[U-Boot] [PATCH] tools/proftool: fix use-after-free

2015-10-07 Thread Vincent StehlƩ
The read_trace_config() can dereference the line pointer after freeing
it on its error path. Avoid that.

This was found by Coverity Scan.

Signed-off-by: Vincent StehlƩ 
Cc: Simon Glass 
---
 tools/proftool.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tools/proftool.c b/tools/proftool.c
index 9ce7a77..ddf870f 100644
--- a/tools/proftool.c
+++ b/tools/proftool.c
@@ -432,9 +432,10 @@ static int read_trace_config(FILE *fin)
 
err = regcomp(&line->regex, tok, REG_NOSUB);
if (err) {
+   int r = regex_report_error(&line->regex, err,
+  "compile", tok);
free(line);
-   return regex_report_error(&line->regex, err, "compile",
- tok);
+   return r;
}
 
/* link this new one to the end of the list */
-- 
2.5.3

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Re: [U-Boot] DWMMC crontroller in Exynos4412

2015-10-07 Thread Humberto LĆ³pez LeĆ³n

Hi Przemyslaw,

Thanks for the documents suggested by you. Now I understand better the 
SDHCI controller implementations. The U-boot version I'm using the 
downloaded from 
https://github.com/hardkernel/u-boot/commits/odroid-v2010.12. From where 
I can download the version you're fixing?


Thank you very much for your collaboration.
Humberto

On 10/01/2015 07:24 AM, Przemyslaw Marczak wrote:

Hello Humberto,

On 09/28/2015 03:27 PM, Humberto LĆ³pez LeĆ³n wrote:

Hi Przemyslaw,

With the information you gave me I managed to implement an important
part of SDHCI controller. Currently the driver detects the SD card
correctly but I have a problem with writing operations. With the help of
linux command dd I found that the driver reads correctly but fails when
trying to write. I studied implementations of SDHCI controller in the
Linux kernel and the U-boot, but there are things I do not understand.

You have a document that explains how works the SDHCI controller ?


Please register at Jedec.org, and get this:

https://www.jedec.org/standards-documents/results/JESD84-B451

for eMMC 4.51, there are also older versions.

For SD card:

https://www.sdcard.org/downloads/pls/index.html

Try to find: SDCardStandardv1.9.pdf on the internet :)


I've also been working on the implementation of DWMMC controller to
manage the eMMC in ODROID-X2 (Exynos4412). Currently this driver detects
the eMMC card but fails to calculate the capacity of the card. The read
and write operations are not yet implemented.

You have a document that explains how works the DWMMC controller?

Thank you for your help!!
Humberto



Which U-Boot version do you use? There was an issue in the mainline 
with device-tree, which results in eMMC/SD card detection issue.

I think, that in few days my patches with fixes can be merged.

On 08/27/2015 02:47 AM, Przemyslaw Marczak wrote:

Hi Humberto,

On 08/26/2015 07:24 PM, Humberto LĆ³pez LeĆ³n wrote:

Hi Przemyslaw,

On 08/26/2015 10:12 AM, Przemyslaw Marczak wrote:

Hi Humberto,

On 08/26/2015 03:40 PM, Humberto LĆ³pez LeĆ³n wrote:

Hi community,

thank you all for answering my questions.

On 08/26/2015 02:53 AM, Przemyslaw Marczak wrote:

Hi,

On 08/26/2015 08:23 AM, Jaehoon Chung wrote:

On 08/26/2015 11:26 AM, Simon Glass wrote:

+Samsung people

Hi,

On 25 August 2015 at 13:10, Humberto LĆ³pez LeĆ³n 


wrote:

Hi Simon,
I'm working on implementing a driver for SD/MMC cards in the
framework
GenodeOS. I think you could help me with your experience in this
type of
implementation in the u-boot.
The hardware platform on which the driver will work is a 
ODROID-x2
(exynos4412). I use the DWMMC contoller, but I'm not sure if 
this

is the
right controller to handle SD/MMC cards in Exynos4412 SoC. The
SDHCI
controller is most appropriate?


If you're using exynos4412 board, you can choose sdhci or dwmmc
controller for eMMC, not SD/SDIO.
And in my experiment, dwmmc controller is more appropriate than
sdhci.(ex, performance)



It depends which mmc channel is used. In Exynos4412, there are 5
channels, but some channel configurations shares GPIO pins:
- MMC0 - sdhci
- MMC1 - sdhci, or MMC0 8-bit
- MMC2 - sdhci - Odroid SD card, 4-bit mode
- MMC3 - sdhci - or MMC2 8-bit
- MMC4 - dwmmc, uses MMC0 pins for 4-bit, and MMC0-1 for 8-bit mode

Odroid is using MMC2(sdhci) and MMC0/4(sdhci or dwmmc).

So for eMMC cards you can use the dwmmc, and as Jaehoon wrote it is
recommended for the better performance, but for SD card you must 
use

sdhci controller.

This information is valuable to me, but now I would help if you
tell me
where I can find the code of SDHCI controller for the SD card of
Exynos4412 in U-boat 2015.04-rc2 for a implementationtation
reference. I
was reviewing the file  exynos_dw_mmc.c as reference of DWMMC 
driver,

but now I have no idea what the file where the SDHCI driver for the
exynos4412 is implemented.

Thank you very much for your collaboration.





Please check those files:
- drivers/mmc/s5p_sdhci.c
- drivers/mmc/sdhci.c

But, isn't the kernel a better reference for you?

Thanks for your time to answer my questions. I have reviewed the
implementation of SDHCI controller in the Linux kernel for Odroid
(https://github.com/hardkernel/linux/blob/odroid-3.0.y/), but have not
been able to identify the specific implementation that is used for
handling of SD cards in exynos4412.
You know in what  file this controller is implemented? I think the 
file

should be drivers/mmc/host/sdhci-s3c.c
(https://github.com/hardkernel/linux/blob/odroid-3.0.y/drivers/mmc/host/sdhci-s3c.c) 



but I'm not sure.
What do you think?

Thanks again.

Humberto



Yes, this is the right file. Also remember about the pinmux setting
for sd/mmc.
In U-Boot: arch/arm/mach-exynos/pinmux.c
In kernel: drivers/pinctrl/pinctrl-exynos.c

Best regards,





Best regards,


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[U-Boot] [PATCH] nios2: remove asm/psr.h

2015-10-07 Thread Thomas Chou
Remove asm/psr.h, which is not used.
Also clean up asm/sections.h and unaligned.h.

Signed-off-by: Thomas Chou 
---
 arch/nios2/include/asm/psr.h   | 12 
 arch/nios2/include/asm/sections.h  | 10 --
 arch/nios2/include/asm/unaligned.h |  5 -
 3 files changed, 27 deletions(-)
 delete mode 100644 arch/nios2/include/asm/psr.h

diff --git a/arch/nios2/include/asm/psr.h b/arch/nios2/include/asm/psr.h
deleted file mode 100644
index 3ebb2a0..000
--- a/arch/nios2/include/asm/psr.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation 
- * Scott McNutt 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef __ASM_NIOS2_PSR_H_
-#define __ASM_NIOS2_PSR_H_
-
-
-#endif /* __ASM_NIOS2_PSR_H_ */
diff --git a/arch/nios2/include/asm/sections.h 
b/arch/nios2/include/asm/sections.h
index f0da75d..2b8c516 100644
--- a/arch/nios2/include/asm/sections.h
+++ b/arch/nios2/include/asm/sections.h
@@ -1,11 +1 @@
-/*
- * Copyright (c) 2012 The Chromium OS Authors.
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef __ASM_NIOS2_SECTIONS_H
-#define __ASM_NIOS2_SECTIONS_H
-
 #include 
-
-#endif
diff --git a/arch/nios2/include/asm/unaligned.h 
b/arch/nios2/include/asm/unaligned.h
index 779117c..6cecbbb 100644
--- a/arch/nios2/include/asm/unaligned.h
+++ b/arch/nios2/include/asm/unaligned.h
@@ -1,6 +1 @@
-#ifndef _ASM_NIOS2_UNALIGNED_H
-#define _ASM_NIOS2_UNALIGNED_H
-
 #include 
-
-#endif /* _ASM_NIOS2_UNALIGNED_H */
-- 
2.1.4

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[U-Boot] SPL and DM on ZYNQ

2015-10-07 Thread Hannes Schmelzer

hi folks,

i am not very familar with driver model until now and so i've a question.

I'm trying to bring up my Zynq ZC702 evalboard using driver-model during 
SPL stage (because QSPI needs this).

I simply switched on "Driver Model for SPL" within Kconfig and compiled.

This ends up in:

U-Boot SPL 2015.10-rc4-00050-g996ec1d-dirty (Oct 07 2015 - 13:57:32)
>>spl:board_init_r()
using memory 0x10c0-0x20c0 for malloc()
spl_init()
dm_init() failed: -2
dm_init_and_scan() returned error -2
### ERROR ### Please RESET the board ###


i had a look into drivers/core/root.c and saw that

device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);

fails.

Any idea why the root-driver cannot be found ?
Maybe there are some switched need to be switched on too.

thanks,
Hannes

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Re: [U-Boot] zynq: mmc boot issue

2015-10-07 Thread Hannes Schmelzer

Hi Jagan,

i tried this time most current mainline u-boot with default config.
My ZC702 evalboard is still booting fine from MMC-card.

best regars,
Hannes

On 10/07/2015 12:02 PM, Jagan Teki wrote:

Hi Michal/Siva,

Looks like somethings broken with mmc boot, could you please check.

dump1:
U-Boot SPL 2015.10-rc4-00104-gafcdb02-dirty (Oct 07 2015 - 15:16:54)
mmc boot
reading system.dtb
spl_load_image_fat_os: error reading image system.dtb, err - -1
reading u-boot.img
spl_load_image_fat: error reading image u-boot-dtb.img, err - -1
spl: mmc: no boot mode left to try
### ERROR ### Please RESET the board ###

dump2:
U-Boot SPL 2015.10-rc4-00104-gafcdb02-dirty (Oct 07 2015 - 15:16:54)
mmc boot
MMC: no card present
spl: mmc init failed with error: -16
### ERROR ### Please RESET the board ###

-- Jagan.
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[U-Boot] [PATCH v5 2/2] nios2: convert altera sysid to driver model

2015-10-07 Thread Thomas Chou
Convert altera sysid to driver model with misc uclass.

Signed-off-by: Thomas Chou 
Acked-by: Chin Liang See 
---
v2
  fix coding style.
v3
  doc dts binding.
v4
  no change.
v5
  sort headers inclusion as Simon suggested.
  add display_sysid() to asm/system.h.

 arch/nios2/cpu/Makefile|   2 +-
 arch/nios2/cpu/cpu.c   |  13 +---
 arch/nios2/cpu/sysid.c |  46 -
 arch/nios2/dts/3c120_devboard.dts  |   6 ++
 arch/nios2/include/asm/system.h|   2 +
 board/altera/nios2-generic/nios2-generic.c |   5 +-
 configs/nios2-generic_defconfig|   2 +
 drivers/misc/Kconfig   |   7 ++
 drivers/misc/Makefile  |   1 +
 drivers/misc/altera_sysid.c| 101 +
 include/configs/nios2-generic.h|   2 +-
 11 files changed, 127 insertions(+), 60 deletions(-)
 delete mode 100644 arch/nios2/cpu/sysid.c
 create mode 100644 drivers/misc/altera_sysid.c

diff --git a/arch/nios2/cpu/Makefile b/arch/nios2/cpu/Makefile
index 3fe7847..185ca3c 100644
--- a/arch/nios2/cpu/Makefile
+++ b/arch/nios2/cpu/Makefile
@@ -7,5 +7,5 @@
 
 extra-y= start.o
 obj-y  = exceptions.o
-obj-y  += cpu.o interrupts.o sysid.o traps.o
+obj-y  += cpu.o interrupts.o traps.o
 obj-y  += fdt.o
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
index bd11abc..106f0bf 100644
--- a/arch/nios2/cpu/cpu.c
+++ b/arch/nios2/cpu/cpu.c
@@ -13,20 +13,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined (CONFIG_SYS_NIOS_SYSID_BASE)
-extern void display_sysid (void);
-#endif /* CONFIG_SYS_NIOS_SYSID_BASE */
-
 #ifdef CONFIG_DISPLAY_CPUINFO
 int print_cpuinfo(void)
 {
-   printf ("CPU   : Nios-II\n");
-#if !defined(CONFIG_SYS_NIOS_SYSID_BASE)
-   printf ("SYSID : \n");
-#else
-   display_sysid ();
-#endif
-   return (0);
+   printf("CPU:   Nios-II\n");
+   return 0;
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
 
diff --git a/arch/nios2/cpu/sysid.c b/arch/nios2/cpu/sysid.c
deleted file mode 100644
index 50819b2..000
--- a/arch/nios2/cpu/sysid.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation 
- * Scott McNutt 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-
-#if defined (CONFIG_SYS_NIOS_SYSID_BASE)
-
-#include 
-#include 
-#include 
-
-typedef volatile struct {
-   unsignedid; /* The system build id */
-   unsignedtimestamp;  /* Timestamp */
-} nios_sysid_t;
-
-void display_sysid (void)
-{
-   nios_sysid_t *sysid = (nios_sysid_t *)CONFIG_SYS_NIOS_SYSID_BASE;
-   struct tm t;
-   char asc[32];
-   time_t stamp;
-
-   stamp = readl (&sysid->timestamp);
-   localtime_r (&stamp, &t);
-   asctime_r (&t, asc);
-   printf ("SYSID : %08lx, %s", readl (&sysid->id), asc);
-
-}
-
-int do_sysid (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-   display_sysid ();
-   return (0);
-}
-
-U_BOOT_CMD(
-   sysid,  1,  1,  do_sysid,
-   "display Nios-II system id",
-   ""
-);
-#endif /* CONFIG_SYS_NIOS_SYSID_BASE */
diff --git a/arch/nios2/dts/3c120_devboard.dts 
b/arch/nios2/dts/3c120_devboard.dts
index 2e2956f..2455fff 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -72,6 +72,7 @@
<0x4cc0 0x08004cc0 0x0010>,
<0x4ce0 0x08004ce0 0x0010>,
<0x4d00 0x08004d00 0x0010>,
+   <0x4d40 0x08004d40 0x0008>,
<0x4d50 0x08004d50 0x0008>,
<0x8000 0x08008000 0x0020>,
<0x0040 0x0840 0x0020>;
@@ -92,6 +93,11 @@
clock-frequency = < 12500 >;
};
 
+   sysid: sysid@0x4d40 {
+   compatible = "altr,sysid-1.0";
+   reg = <0x4d40 0x0008>;
+   };
+
jtag_uart: serial@0x4d50 {
compatible = "altr,juart-1.0";
reg = <0x4d50 0x0008>;
diff --git a/arch/nios2/include/asm/system.h b/arch/nios2/include/asm/system.h
index 6213a16..b158535 100644
--- a/arch/nios2/include/asm/system.h
+++ b/arch/nios2/include/asm/system.h
@@ -45,4 +45,6 @@
"callr  %0" \
: : "r" (addr))
 
+void display_sysid(void);
+
 #endif /* __ASM_NIOS2_SYSTEM_H */
diff --git a/board/altera/nios2-generic/nios2-generic.c 
b/board/altera/nios2-generic/nios2-generic.c
index 61d32c7..be5c350 100644
--- a/board/altera/nios2-generic/nios2-generic.c
+++ b/board/altera/nios2-generic/nios2-generic.c
@@ -42,7 +42,10 @@ int board_early_init_r(void)
 
 int checkboard

[U-Boot] [PATCH v5 1/2] dm: implement a Miscellaneous uclass

2015-10-07 Thread Thomas Chou
Implement a Miscellaneous uclass with generic read or
write operations. This class is used only for those
do not fit other more general classes.

Signed-off-by: Thomas Chou 
Acked-by: Simon Glass 
---
v2
  add missing misc.h.
v3
  no change.
v4
  add ioctl and comments as Simon suggested.
v5
  no change.

 drivers/misc/Kconfig   |  9 ++
 drivers/misc/Makefile  |  1 +
 drivers/misc/misc-uclass.c | 51 ++
 include/dm/uclass-id.h |  1 +
 include/misc.h | 79 ++
 5 files changed, 141 insertions(+)
 create mode 100644 drivers/misc/misc-uclass.c
 create mode 100644 include/misc.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 8b38a84..2699329 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -4,6 +4,15 @@
 
 menu "Multifunction device drivers"
 
+config DM_MISC
+   bool "Enable Driver Model for Misc drivers"
+   depends on DM
+   help
+ Enable driver model for miscellaneous devices. This class is
+ used only for those do not fit other more general classes. A
+ set of generic read, write and ioctl methods may be used to
+ access the device.
+
 config CMD_CROS_EC
bool "Enable crosec command"
depends on CROS_EC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 8d0fc3c..b285946 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -5,6 +5,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+obj-$(CONFIG_DM_MISC) += misc-uclass.o
 obj-$(CONFIG_ALI152X) += ali512x.o
 obj-$(CONFIG_DS4510)  += ds4510.o
 obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
new file mode 100644
index 000..a436ff5
--- /dev/null
+++ b/drivers/misc/misc-uclass.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2010 Thomas Chou 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Implement a  miscellaneous uclass for those do not fit other more
+ * general classes. A set of generic read, write and ioctl methods may
+ * be used to access the device.
+ */
+
+int misc_read(struct udevice *dev, int offset, void *buf, int size)
+{
+   const struct dm_misc_ops *ops = device_get_ops(dev);
+
+   if (!ops->read)
+   return -ENOSYS;
+
+   return ops->read(dev, offset, buf, size);
+}
+
+int misc_write(struct udevice *dev, int offset, void *buf, int size)
+{
+   const struct dm_misc_ops *ops = device_get_ops(dev);
+
+   if (!ops->write)
+   return -ENOSYS;
+
+   return ops->write(dev, offset, buf, size);
+}
+
+int misc_ioctl(struct udevice *dev, unsigned long request, void *buf)
+{
+   const struct dm_misc_ops *ops = device_get_ops(dev);
+
+   if (!ops->ioctl)
+   return -ENOSYS;
+
+   return ops->ioctl(dev, request, buf);
+}
+
+UCLASS_DRIVER(misc) = {
+   .id = UCLASS_MISC,
+   .name   = "misc",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index aff34a4..a6982ab 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -39,6 +39,7 @@ enum uclass_id {
UCLASS_LED, /* Light-emitting diode (LED) */
UCLASS_LPC, /* x86 'low pin count' interface */
UCLASS_MASS_STORAGE,/* Mass storage device */
+   UCLASS_MISC,/* Miscellaneous device */
UCLASS_MMC, /* SD / MMC card or chip */
UCLASS_MOD_EXP, /* RSA Mod Exp device */
UCLASS_PCH, /* x86 platform controller hub */
diff --git a/include/misc.h b/include/misc.h
new file mode 100644
index 000..73de11b
--- /dev/null
+++ b/include/misc.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2015 Thomas Chou 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _DM_MISC_H_
+#define _DM_MISC_H_
+
+/*
+ * Read the device to buffer, optional.
+ *
+ * @dev: the device
+ * @offset: offset to read the device
+ * @buf: pointer to data buffer
+ * @size: data size in bytes to read the device
+ * @return: 0 if OK, -ve on error
+ */
+int misc_read(struct udevice *dev, int offset, void *buf, int size);
+/*
+ * Write buffer to the device, optional.
+ *
+ * @dev: the device
+ * @offset: offset to write the device
+ * @buf: pointer to data buffer
+ * @size: data size in bytes to write the device
+ * @return: 0 if OK, -ve on error
+ */
+int misc_write(struct udevice *dev, int offset, void *buf, int size);
+/*
+ * Assert command to the device, optional.
+ *
+ * @dev: the device
+ * @request: command to be sent to the device
+ * @buf: pointer to buffer related to the requset
+ * @return: 0 if OK, -ve on error
+ */
+int misc_ioctl(struct udevice *dev, unsigned long request, void *buf);
+
+/*
+ * struct dm_misc_ops - Driver model Misc operations
+ *
+ * The uclass interface is implemented by all miscellaneous devices which
+ * use driver model.
+ */
+struct dm_misc_ops {
+  

Re: [U-Boot] [PATCH] imximage: fix commands other than write_data

2015-10-07 Thread Stefano Babic
Hi Troy,

On 15/09/2015 03:06, Troy Kisky wrote:
> When CHECK_BITS_SET was added, they forgot to add
> a new command table, and instead overwrote the
> previous table.
> 
> Signed-off-by: Troy Kisky 
> 
> ---

Applied to u-boot-imx (fix), thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 1/1] imximage: header.length of 4 is valid

2015-10-07 Thread Stefano Babic


On 21/09/2015 23:02, Troy Kisky wrote:
> Signed-off-by: Troy Kisky 
> ---
>  tools/imximage.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/imximage.c b/tools/imximage.c
> index 97a6880..7c21922 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -396,8 +396,8 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
>   dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table;
>   uint32_t size, version;
>  
> - size = be16_to_cpu(dcd_v2->header.length) - 8;
> - if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
> + size = be16_to_cpu(dcd_v2->header.length);
> + if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t)) + 8) {
>   fprintf(stderr,
>   "Error: Image corrupt DCD size %d exceed maximum %d\n",
>   (uint32_t)(size / sizeof(dcd_addr_data_t)),
> 

Applied to u-boot-imx (fix), thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 2/2][v3] armv8: ls2085a: Add support of random MAC address

2015-10-07 Thread Bin Meng
On Wed, Oct 7, 2015 at 7:00 PM, Prabhakar Kushwaha
 wrote:
> Add support of setting RANDOM MAC address if env variable not available.
>
> Signed-off-by: Prabhakar Kushwaha 
> ---
> Changs for v2: Incorporated Bin Meng's comments
>  - Moved defines to defconfig
>  - updated subject
> Changes for v3: Incorporated Bin Meng's comments
>  - Removed CONFIG_LIB_RAND
>  - used make savedefconfig to generate defconfigs
>
>  configs/ls2085a_simu_defconfig| 1 +
>  configs/ls2085aqds_defconfig  | 1 +
>  configs/ls2085aqds_nand_defconfig | 1 +
>  configs/ls2085ardb_defconfig  | 1 +
>  configs/ls2085ardb_nand_defconfig | 1 +
>  5 files changed, 5 insertions(+)
>
> diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig
> index de9776d..9d04218 100644
> --- a/configs/ls2085a_simu_defconfig
> +++ b/configs/ls2085a_simu_defconfig
> @@ -12,3 +12,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SIMU"
>  # CONFIG_CMD_SETEXPR is not set
>  # CONFIG_CMD_NFS is not set
>  # CONFIG_CMD_MISC is not set
> +CONFIG_NET_RANDOM_ETHADDR=y
> diff --git a/configs/ls2085aqds_defconfig b/configs/ls2085aqds_defconfig
> index 0c770e4..78b121d 100644
> --- a/configs/ls2085aqds_defconfig
> +++ b/configs/ls2085aqds_defconfig
> @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2085a-qds"
>  CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_OF_CONTROL=y
> +CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_DM=y
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
> diff --git a/configs/ls2085aqds_nand_defconfig 
> b/configs/ls2085aqds_nand_defconfig
> index 10eda97..ce2a81c 100644
> --- a/configs/ls2085aqds_nand_defconfig
> +++ b/configs/ls2085aqds_nand_defconfig
> @@ -3,5 +3,6 @@ CONFIG_TARGET_LS2085AQDS=y
>  CONFIG_SPL=y
>  CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
>  # CONFIG_CMD_SETEXPR is not set
> +CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
> diff --git a/configs/ls2085ardb_defconfig b/configs/ls2085ardb_defconfig
> index 7956533..d0f16f2 100644
> --- a/configs/ls2085ardb_defconfig
> +++ b/configs/ls2085ardb_defconfig
> @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2085a-rdb"
>  CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_OF_CONTROL=y
> +CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_DM=y
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
> diff --git a/configs/ls2085ardb_nand_defconfig 
> b/configs/ls2085ardb_nand_defconfig
> index 96a0dfd..25a6f71 100644
> --- a/configs/ls2085ardb_nand_defconfig
> +++ b/configs/ls2085ardb_nand_defconfig
> @@ -3,5 +3,6 @@ CONFIG_TARGET_LS2085ARDB=y
>  CONFIG_SPL=y
>  CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
>  # CONFIG_CMD_SETEXPR is not set
> +CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
> --

Reviewed-by: Bin Meng 
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[U-Boot] [PATCH 2/2][v3] armv8: ls2085a: Add support of random MAC address

2015-10-07 Thread Prabhakar Kushwaha
Add support of setting RANDOM MAC address if env variable not available.

Signed-off-by: Prabhakar Kushwaha 
---
Changs for v2: Incorporated Bin Meng's comments
 - Moved defines to defconfig
 - updated subject
Changes for v3: Incorporated Bin Meng's comments
 - Removed CONFIG_LIB_RAND
 - used make savedefconfig to generate defconfigs

 configs/ls2085a_simu_defconfig| 1 +
 configs/ls2085aqds_defconfig  | 1 +
 configs/ls2085aqds_nand_defconfig | 1 +
 configs/ls2085ardb_defconfig  | 1 +
 configs/ls2085ardb_nand_defconfig | 1 +
 5 files changed, 5 insertions(+)

diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig
index de9776d..9d04218 100644
--- a/configs/ls2085a_simu_defconfig
+++ b/configs/ls2085a_simu_defconfig
@@ -12,3 +12,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SIMU"
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
+CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ls2085aqds_defconfig b/configs/ls2085aqds_defconfig
index 0c770e4..78b121d 100644
--- a/configs/ls2085aqds_defconfig
+++ b/configs/ls2085aqds_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2085a-qds"
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
diff --git a/configs/ls2085aqds_nand_defconfig 
b/configs/ls2085aqds_nand_defconfig
index 10eda97..ce2a81c 100644
--- a/configs/ls2085aqds_nand_defconfig
+++ b/configs/ls2085aqds_nand_defconfig
@@ -3,5 +3,6 @@ CONFIG_TARGET_LS2085AQDS=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
diff --git a/configs/ls2085ardb_defconfig b/configs/ls2085ardb_defconfig
index 7956533..d0f16f2 100644
--- a/configs/ls2085ardb_defconfig
+++ b/configs/ls2085ardb_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2085a-rdb"
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
diff --git a/configs/ls2085ardb_nand_defconfig 
b/configs/ls2085ardb_nand_defconfig
index 96a0dfd..25a6f71 100644
--- a/configs/ls2085ardb_nand_defconfig
+++ b/configs/ls2085ardb_nand_defconfig
@@ -3,5 +3,6 @@ CONFIG_TARGET_LS2085ARDB=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
-- 
1.9.1


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[U-Boot] [PATCH 1/2][v3] driver: net: ldpaa_eth: Set MAC address during interface open

2015-10-07 Thread Prabhakar Kushwaha
Currently ldpaa ethernet driver rely on DPL file to statically configure
mac address for the DPNIs. It is not a correct approach.

Add support setting MAC address from env variable or Random MAC address.

Signed-off-by: Prabhakar Kushwaha 
---
Changs for v2: Sending as it is
Changs for v3: Sending as it is

 drivers/net/ldpaa_eth/ldpaa_eth.c | 15 +++
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c 
b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 4de7586..99acb7a 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -220,7 +220,6 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t 
*bd)
 {
struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
struct dpni_queue_attr rx_queue_attr;
-   uint8_t mac_addr[6];
int err;
 
if (net_dev->state == ETH_STATE_ACTIVE)
@@ -240,21 +239,13 @@ static int ldpaa_eth_open(struct eth_device *net_dev, 
bd_t *bd)
if (err)
goto err_bind;
 
-   err = dpni_get_primary_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
-   priv->dpni_handle, mac_addr);
+   err = dpni_add_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
+   priv->dpni_handle, net_dev->enetaddr);
if (err) {
-   printf("dpni_get_primary_mac_addr() failed\n");
+   printf("dpni_add_mac_addr() failed\n");
return err;
}
 
-   memcpy(net_dev->enetaddr, mac_addr, 0x6);
-
-   /* setup the MAC address */
-   if (net_dev->enetaddr[0] & 0x01) {
-   printf("%s: MacAddress is multcast address\n",  __func__);
-   return 1;
-   }
-
 #ifdef CONFIG_PHYLIB
/* TODO Check this path */
err = phy_startup(priv->phydev);
-- 
1.9.1


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Re: [U-Boot] [PATCH 2/2] armv8: ls2085a: Add support of random MAC address

2015-10-07 Thread Bin Meng
Hi Prabhakar,

On Wed, Oct 7, 2015 at 6:00 PM, Prabhakar Kushwaha
 wrote:
> Add support of setting RANDOM MAC address if env variable not available.
>
> Signed-off-by: Prabhakar Kushwaha 
> ---
> Changs for v2: Incorporated Bin Meng's comments
>  - Moved defines to defconfig
>  - updated subject
>
>  configs/ls2085a_simu_defconfig| 2 ++
>  configs/ls2085aqds_defconfig  | 2 ++
>  configs/ls2085aqds_nand_defconfig | 2 ++
>  configs/ls2085ardb_defconfig  | 2 ++
>  configs/ls2085ardb_nand_defconfig | 2 ++
>  5 files changed, 10 insertions(+)
>
> diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig
> index de9776d..0c450a9 100644
> --- a/configs/ls2085a_simu_defconfig
> +++ b/configs/ls2085a_simu_defconfig
> @@ -1,6 +1,8 @@
>  CONFIG_ARM=y
>  CONFIG_TARGET_LS2085A_SIMU=y
>  CONFIG_SYS_EXTRA_OPTIONS="SIMU"
> +CONFIG_LIB_RAND=y

This is not needed as it is selected by CONFIG_NET_RANDOM_ETHADDR automatically.

> +CONFIG_NET_RANDOM_ETHADDR=y
>  # CONFIG_CMD_CONSOLE is not set
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_XIMG is not set
> diff --git a/configs/ls2085aqds_defconfig b/configs/ls2085aqds_defconfig
> index 0c770e4..267ad95 100644
> --- a/configs/ls2085aqds_defconfig
> +++ b/configs/ls2085aqds_defconfig
> @@ -11,3 +11,5 @@ CONFIG_DM=y
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
>  CONFIG_FSL_DSPI=y
> +CONFIG_LIB_RAND=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> diff --git a/configs/ls2085aqds_nand_defconfig 
> b/configs/ls2085aqds_nand_defconfig
> index 10eda97..916504a 100644
> --- a/configs/ls2085aqds_nand_defconfig
> +++ b/configs/ls2085aqds_nand_defconfig
> @@ -5,3 +5,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
> +CONFIG_LIB_RAND=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> diff --git a/configs/ls2085ardb_defconfig b/configs/ls2085ardb_defconfig
> index 7956533..3f8be26 100644
> --- a/configs/ls2085ardb_defconfig
> +++ b/configs/ls2085ardb_defconfig
> @@ -11,3 +11,5 @@ CONFIG_DM=y
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
>  CONFIG_FSL_DSPI=y
> +CONFIG_LIB_RAND=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> diff --git a/configs/ls2085ardb_nand_defconfig 
> b/configs/ls2085ardb_nand_defconfig
> index 96a0dfd..5fb1901 100644
> --- a/configs/ls2085ardb_nand_defconfig
> +++ b/configs/ls2085ardb_nand_defconfig
> @@ -5,3 +5,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_NETDEVICES=y
>  CONFIG_E1000=y
> +CONFIG_LIB_RAND=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> --

Also please make sure adding these Kconfig options with correct order.
You can do this by for example, 'make ls2085a_simu_defconfig' then
'make savedefconfig'

Regards,
Bin
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[U-Boot] zynq: mmc boot issue

2015-10-07 Thread Jagan Teki
Hi Michal/Siva,

Looks like somethings broken with mmc boot, could you please check.

dump1:
U-Boot SPL 2015.10-rc4-00104-gafcdb02-dirty (Oct 07 2015 - 15:16:54)
mmc boot
reading system.dtb
spl_load_image_fat_os: error reading image system.dtb, err - -1
reading u-boot.img
spl_load_image_fat: error reading image u-boot-dtb.img, err - -1
spl: mmc: no boot mode left to try
### ERROR ### Please RESET the board ###

dump2:
U-Boot SPL 2015.10-rc4-00104-gafcdb02-dirty (Oct 07 2015 - 15:16:54)
mmc boot
MMC: no card present
spl: mmc init failed with error: -16
### ERROR ### Please RESET the board ###

-- Jagan.
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[U-Boot] [PATCH 1/2][v2] driver: net: ldpaa_eth: Set MAC address during interface open

2015-10-07 Thread Prabhakar Kushwaha
Currently ldpaa ethernet driver rely on DPL file to statically configure
mac address for the DPNIs. It is not a correct approach.

Add support setting MAC address from env variable or Random MAC address.

Signed-off-by: Prabhakar Kushwaha 
---
Changs for v2: Sending as it is

 drivers/net/ldpaa_eth/ldpaa_eth.c | 15 +++
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c 
b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 4de7586..99acb7a 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -220,7 +220,6 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t 
*bd)
 {
struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
struct dpni_queue_attr rx_queue_attr;
-   uint8_t mac_addr[6];
int err;
 
if (net_dev->state == ETH_STATE_ACTIVE)
@@ -240,21 +239,13 @@ static int ldpaa_eth_open(struct eth_device *net_dev, 
bd_t *bd)
if (err)
goto err_bind;
 
-   err = dpni_get_primary_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
-   priv->dpni_handle, mac_addr);
+   err = dpni_add_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
+   priv->dpni_handle, net_dev->enetaddr);
if (err) {
-   printf("dpni_get_primary_mac_addr() failed\n");
+   printf("dpni_add_mac_addr() failed\n");
return err;
}
 
-   memcpy(net_dev->enetaddr, mac_addr, 0x6);
-
-   /* setup the MAC address */
-   if (net_dev->enetaddr[0] & 0x01) {
-   printf("%s: MacAddress is multcast address\n",  __func__);
-   return 1;
-   }
-
 #ifdef CONFIG_PHYLIB
/* TODO Check this path */
err = phy_startup(priv->phydev);
-- 
1.9.1


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[U-Boot] [PATCH 2/2] armv8: ls2085a: Add support of random MAC address

2015-10-07 Thread Prabhakar Kushwaha
Add support of setting RANDOM MAC address if env variable not available.

Signed-off-by: Prabhakar Kushwaha 
---
Changs for v2: Incorporated Bin Meng's comments
 - Moved defines to defconfig
 - updated subject

 configs/ls2085a_simu_defconfig| 2 ++
 configs/ls2085aqds_defconfig  | 2 ++
 configs/ls2085aqds_nand_defconfig | 2 ++
 configs/ls2085ardb_defconfig  | 2 ++
 configs/ls2085ardb_nand_defconfig | 2 ++
 5 files changed, 10 insertions(+)

diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig
index de9776d..0c450a9 100644
--- a/configs/ls2085a_simu_defconfig
+++ b/configs/ls2085a_simu_defconfig
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS2085A_SIMU=y
 CONFIG_SYS_EXTRA_OPTIONS="SIMU"
+CONFIG_LIB_RAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
diff --git a/configs/ls2085aqds_defconfig b/configs/ls2085aqds_defconfig
index 0c770e4..267ad95 100644
--- a/configs/ls2085aqds_defconfig
+++ b/configs/ls2085aqds_defconfig
@@ -11,3 +11,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_FSL_DSPI=y
+CONFIG_LIB_RAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ls2085aqds_nand_defconfig 
b/configs/ls2085aqds_nand_defconfig
index 10eda97..916504a 100644
--- a/configs/ls2085aqds_nand_defconfig
+++ b/configs/ls2085aqds_nand_defconfig
@@ -5,3 +5,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
+CONFIG_LIB_RAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ls2085ardb_defconfig b/configs/ls2085ardb_defconfig
index 7956533..3f8be26 100644
--- a/configs/ls2085ardb_defconfig
+++ b/configs/ls2085ardb_defconfig
@@ -11,3 +11,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_FSL_DSPI=y
+CONFIG_LIB_RAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/ls2085ardb_nand_defconfig 
b/configs/ls2085ardb_nand_defconfig
index 96a0dfd..5fb1901 100644
--- a/configs/ls2085ardb_nand_defconfig
+++ b/configs/ls2085ardb_nand_defconfig
@@ -5,3 +5,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
+CONFIG_LIB_RAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
-- 
1.9.1


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Re: [U-Boot] [PATCH 05/10] net: designware: Add a post-started hook

2015-10-07 Thread Bin Meng
Hi,

On Tue, Oct 6, 2015 at 12:39 AM, Joe Hershberger
 wrote:
> Hi Sjoerd,
>
> On Mon, Oct 5, 2015 at 3:55 AM, Sjoerd Simons
>  wrote:
>>
>> On Sat, 2015-10-03 at 15:30 +0100, Simon Glass wrote:
>> > Hi Sjoerd,
>>
>> > >  static int designware_eth_send(struct udevice *dev, void *packet,
>> > > int length)
>> > > diff --git a/drivers/net/designware.h b/drivers/net/designware.h
>> > > index 47e727b..b45599b 100644
>> > > --- a/drivers/net/designware.h
>> > > +++ b/drivers/net/designware.h
>> > > @@ -236,6 +236,10 @@ struct dw_eth_dev {
>> > >  #endif
>> > > struct phy_device *phydev;
>> > > struct mii_dev *bus;
>> > > +
>> > > +#ifdef CONFIG_DM_ETH
>> > > +   int (*started)(struct udevice *dev);
>> > > +#endif
>> >
>> > With driver model we should not need to add such hooks. is this
>> > needed
>> > because we don't have a PHY uclass yet?
>>
>> Essentially I need to be able to configure one of the GMAC clocks
>> depending on the result of the phy negotiation. Looking at the linux
>> kernel this seems a rather common item for the dw gmac interface.
>>
>> I guess, I could do without that hook by exporting all functions
>> required to fill the eth_ops struct and override the start function.
>> Would you prefer that?
>
> I prefer the hook.
>
>> I guess a PHY uclass would also help here, assuming such a uclass would
>> provide a callback for link state changes (e.g. like of_phy_connect in
>> Linux).
>

>From what I read to this codes, the work done in the hook is to
program the MAC's clock, not the PHY. So not sure if the PHY uclass
can help here.

> I agree that once we have the phy uclass then we should handle it much
> more like Linux, but for now the hook seems cleaner.
>

Has anyone looked at my suggestion about where we should insert the hook?

Regards,
Bin
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Re: [U-Boot] [PATCH] pci: Fix expansion ROM programming for multi-function devices

2015-10-07 Thread Bin Meng
Hi Tom,

On Wed, Oct 7, 2015 at 5:13 PM, Bin Meng  wrote:
> PCI_HEADER_TYPE register (offset 0x0e) bit 7 is an indicator
> for multi-function devices. We should mask it off before using
> it as the header type.
>
> Signed-off-by: Bin Meng 
> ---
>
>  drivers/pci/pci_auto.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
> index 41d5447..79f27c7 100644
> --- a/drivers/pci/pci_auto.c
> +++ b/drivers/pci/pci_auto.c
> @@ -185,6 +185,7 @@ void pciauto_setup_device(struct pci_controller *hose,
>  #ifndef CONFIG_PCI_ENUM_ONLY
> /* Configure the expansion ROM address */
> pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
> +   header_type &= 0x7f;
> if (header_type != PCI_HEADER_TYPE_CARDBUS) {
> rom_addr = (header_type == PCI_HEADER_TYPE_NORMAL) ?
>PCI_ROM_ADDRESS : PCI_ROM_ADDRESS1;
> --

I think we should get this patch in v2015.10 as it's a bug fix
otherwise multi-function devices won't get ROM address assigned.

Regards,
Bin
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Re: [U-Boot] [PATCH 2/2] armv8: ls2085a: Add support of random MAC address for QDS and RDB

2015-10-07 Thread Bin Meng
On Wed, Oct 7, 2015 at 5:08 PM, Kushwaha Prabhakar
 wrote:
>
>
> Regards,
> Prabhakar
>
>> -Original Message-
>> From: Bin Meng [mailto:bmeng...@gmail.com]
>> Sent: Wednesday, October 07, 2015 1:56 PM
>> To: Kushwaha Prabhakar-B32579 
>> Cc: U-Boot Mailing List ; Sun York-R58495
>> 
>> Subject: Re: [U-Boot] [PATCH 2/2] armv8: ls2085a: Add support of random
>> MAC address for QDS and RDB
>>
>> Hi,
>>
>> On Tue, Oct 6, 2015 at 8:43 PM, Prabhakar Kushwaha
>>  wrote:
>> > Add support of setting RANDOM MAC address if env variable not available.
>> >
>> > Signed-off-by: Prabhakar Kushwaha 
>> > ---
>> >  include/configs/ls2085a_common.h | 4 
>> >  1 file changed, 4 insertions(+)
>> >
>> > diff --git a/include/configs/ls2085a_common.h
>> > b/include/configs/ls2085a_common.h
>> > index 1ec95d2..edd434a 100644
>> > --- a/include/configs/ls2085a_common.h
>> > +++ b/include/configs/ls2085a_common.h
>> > @@ -173,6 +173,10 @@ unsigned long long get_qixis_addr(void);
>> >  #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH   0x20
>> >  #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET  0x0700
>> >
>> > +/* Add Random lib for random MAC address */ #define
>> CONFIG_LIB_RAND
>> > +#define CONFIG_NET_RANDOM_ETHADDR
>> > +
>>
>> Can you please add such in the boards' defconfig files instead?
>>
>
> Ls2085a_common.h is included by boards'd defconfig i.e. ls2085aqds.h and 
> ls2085rdb.h.
> As this piece is common so added in ls2085a_common.h

I mean defconfig files in configs/, not include/configs/

>
> --prabhakar
>

Regards,
Bin
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[U-Boot] [PATCH] pci: Fix expansion ROM programming for multi-function devices

2015-10-07 Thread Bin Meng
PCI_HEADER_TYPE register (offset 0x0e) bit 7 is an indicator
for multi-function devices. We should mask it off before using
it as the header type.

Signed-off-by: Bin Meng 
---

 drivers/pci/pci_auto.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 41d5447..79f27c7 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -185,6 +185,7 @@ void pciauto_setup_device(struct pci_controller *hose,
 #ifndef CONFIG_PCI_ENUM_ONLY
/* Configure the expansion ROM address */
pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
+   header_type &= 0x7f;
if (header_type != PCI_HEADER_TYPE_CARDBUS) {
rom_addr = (header_type == PCI_HEADER_TYPE_NORMAL) ?
   PCI_ROM_ADDRESS : PCI_ROM_ADDRESS1;
-- 
1.8.2.1

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Re: [U-Boot] [PATCH 2/2] armv8: ls2085a: Add support of random MAC address for QDS and RDB

2015-10-07 Thread Kushwaha Prabhakar


Regards,
Prabhakar

> -Original Message-
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Wednesday, October 07, 2015 1:56 PM
> To: Kushwaha Prabhakar-B32579 
> Cc: U-Boot Mailing List ; Sun York-R58495
> 
> Subject: Re: [U-Boot] [PATCH 2/2] armv8: ls2085a: Add support of random
> MAC address for QDS and RDB
> 
> Hi,
> 
> On Tue, Oct 6, 2015 at 8:43 PM, Prabhakar Kushwaha
>  wrote:
> > Add support of setting RANDOM MAC address if env variable not available.
> >
> > Signed-off-by: Prabhakar Kushwaha 
> > ---
> >  include/configs/ls2085a_common.h | 4 
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/include/configs/ls2085a_common.h
> > b/include/configs/ls2085a_common.h
> > index 1ec95d2..edd434a 100644
> > --- a/include/configs/ls2085a_common.h
> > +++ b/include/configs/ls2085a_common.h
> > @@ -173,6 +173,10 @@ unsigned long long get_qixis_addr(void);
> >  #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH   0x20
> >  #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET  0x0700
> >
> > +/* Add Random lib for random MAC address */ #define
> CONFIG_LIB_RAND
> > +#define CONFIG_NET_RANDOM_ETHADDR
> > +
> 
> Can you please add such in the boards' defconfig files instead?
> 

Ls2085a_common.h is included by boards'd defconfig i.e. ls2085aqds.h and 
ls2085rdb.h.
As this piece is common so added in ls2085a_common.h

--prabhakar

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Re: [U-Boot] [PATCH 2/2] armv8: ls2085a: Add support of random MAC address for QDS and RDB

2015-10-07 Thread Bin Meng
Hi,

On Tue, Oct 6, 2015 at 8:43 PM, Prabhakar Kushwaha
 wrote:
> Add support of setting RANDOM MAC address if env variable not available.
>
> Signed-off-by: Prabhakar Kushwaha 
> ---
>  include/configs/ls2085a_common.h | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/include/configs/ls2085a_common.h 
> b/include/configs/ls2085a_common.h
> index 1ec95d2..edd434a 100644
> --- a/include/configs/ls2085a_common.h
> +++ b/include/configs/ls2085a_common.h
> @@ -173,6 +173,10 @@ unsigned long long get_qixis_addr(void);
>  #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH   0x20
>  #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET  0x0700
>
> +/* Add Random lib for random MAC address */
> +#define CONFIG_LIB_RAND
> +#define CONFIG_NET_RANDOM_ETHADDR
> +

Can you please add such in the boards' defconfig files instead?

>  /*
>   * Carve out a DDR region which will not be used by u-boot/Linux
>   *
> --

Regards,
Bin
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Re: [U-Boot] [PATCH 6/6] x86: Allow disabling IGD on Intel Queensbay

2015-10-07 Thread Bin Meng
Hi Simon,

On Sat, Oct 3, 2015 at 10:29 PM, Simon Glass  wrote:
> Hi Bin,
>
> On 1 October 2015 at 08:36, Bin Meng  wrote:
>> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
>> so that it does not show in the PCI configuration space as a VGA
>> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
>> based graphics card's VGA BIOS and use that for the graphics console.
>>
>> Signed-off-by: Bin Meng 
>>
>> ---
>>
>>  arch/x86/cpu/queensbay/Kconfig|  8 
>>  arch/x86/cpu/queensbay/tnc.c  | 19 +++
>>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +
>>  include/configs/crownbay.h|  1 +
>>  4 files changed, 33 insertions(+)
>
> Acked-by: Simon Glass 
>
> But do we really want configs for such device-specific things? I
> wonder if device tree would be better. E.g. add 'status = "disabled"'
> in the PCI node.
>

I am not sure if I understand you correctly. To me 'status =
"disabled"' is a generic device binding, and when it comes to PCI
device, how do we define a device is in a 'disabled' state? Is it we
program the COMMAND register to disable bus master, mem and I/O
access? Or we program a chipset-specific register (Intel chipset
normally has such) to make it invisible from PCI configuration space
completely? And as you said, this is really chipset-specific thing, so
I chose to do via a platform-specific configuration macro, instead of
doing such work under a generic bindings ..

[snip]

Regards,
Bin
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Re: [U-Boot] U-Boot v2015.04, x86 Intel Baytrail, and hsuart0 configuration

2015-10-07 Thread Bin Meng
Hi Tim,

+Simon and U-Boot ML.

On Wed, Oct 7, 2015 at 12:22 AM, Timothy Scott  wrote:
> Bin,
>
> I've seen your name associated with U-boot repo commits relating to the
> ns16550 and the UARTs that are sitting on the PCI bus for the Intel
> Baytrail.  I'm working on setting up a board based on the Intel E3815
> (Baytrail) and am having difficulty redirecting the console to hsuart0.
> Things work great for the legacy COM port @ address 0x3F8, but fail (ie.
> continuous U-Boot resets) when I try to change things to use hsuart0.  With
> the hsuart0 defined in the DTS, I'd expect "coninfo" to reflect the hsuart0
> device, but I do not see it.  "dm tree" shows the device present but that it
> is unprobed.
>
> Note that I'm working against U-Boot v2015.04.  I tried updating to v2015.07
> to see if that would help, but that ended up killing other devices that are
> working fine on v2015.04 so I'm trying to stick with that.
>

Can you please rebase your working tree based on commit

commit b21b208184721eed198bdf59204b452716986377
Author: Bin Meng 
Date:   Wed Dec 31 16:05:14 2014 +0800

x86: crownbay: Add pci devices in the dts file

This is the initial commit that was the first time to support PCI UART
and verified on Intel Crown Bay.

At some time later there was a change in the dev_get_addr() API that
broke the PCI UART codes but I can't remember when that regression was
introduced. This was later fixed by commit:

commit 236efe36be6d1c544f9477f10fdf38a17cd7a869
Author: Simon Glass 
Date:   Sun Aug 2 18:13:50 2015 -0600

Revert "fdt: Fix fdtdec_get_addr_size() for 64-bit"

The symptom you observed (continuous U-Boot reset) is probably due to
this. As when U-Boot does not find a working serial console, it simply
resets.

> Here's my current DTS file.  I used the crownbay.dts configuration as a
> reference.  Not sure if you can see anything wrong with my config, but a
> second pair of eyes on it would help!
>
> /dts-v1/;
>
> /include/ "skeleton.dtsi"
> /include/ "serial.dtsi"
>
> / {
> model = "Yukon"; /* my board name */
> compatible = "intel,yukon", "intel,baytrail";
>
> aliases {
> serial0 = "/serial";
> serial1 = "/pci/serial@1e,3";
> };
>
> config {
> silent_console = <0>;
> };
>
> chosen {
> stdout-path = "/serial"; /* switching this to &hsuart0; results in
> continuous resets.  Configuration as-is works fine but uses the PCU uart on
> the baytrail part. */
> };
> pci {
> #address-cells = <3>;
> #size-cells = <2>;
> compatible = "simple-bus"; /* I had to change this from intel,cpi to
> simple-bus in order for 'dm tree' to show this node and the hsuart0 node/ */
> device_type="pci";
>
> hsuart0: serial@1e,3 {
> compatible = "pci8086,0f0a","x86-uart";
> u-boot,dm-pre-reloc;
> reg = <0x0200F310 0x0 0x0 0x0 0x0>; /* memory-mapped, PCI 0/30/3
> device, config @ address 0x10 */
> reg-shift = <0>;
> clock-frequency = <1843200>;
> current-speed = <115200>;
> };
> };
> };
>
> Here is the output of "coninfo" with the above DTS definitions:
>
> => coninfo
> List of available devices:
> serial   0003 .IO stdin stdout stderr
> sserial  8003 SIO
> nulldev  8003 SIO
> nc   8003 SIO
> cbmem0002 ..O
>
> Here is the output of "dm tree" and "dm uclass" with the above DTS
> definition:
>
> => dm tree
>  Class   Probed   Name
> 
>  root[ + ]root_driver
>  serial  [ + ]|-- serial
>  simple_bus  [   ]`-- pci
>  serial  [   ]`-- serial@1e,3
> => dm uclass
> uclass 0: root
> - * root_driver @ 7aa12058
>
> Cannot find uclass for id 1: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 2: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 3: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 4: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 5: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 6: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> uclass 7: simple_bus
> -   pci @ 7aa12158
>
> uclass 8: gpio
> uclass 9: serial
> - * serial @ 7aa120d0, 0
> -   serial@1e,3 @ 7aa121b0, 1
>
> Cannot find uclass for id 10: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 11: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 12: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 13: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 14: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 15: please add the UCLASS_DRIVER() declaration for
> this UCLASS_... id
> Cannot find uclass for id 16: 

Re: [U-Boot] [PATCH 1/1] imximage: header.length of 4 is valid

2015-10-07 Thread Stefano Babic
Hi Troy,

On 06/10/2015 20:09, Troy Kisky wrote:
> On 10/6/2015 4:30 AM, stefano babic wrote:
>> Hi Troy,
>>
>> Am 06.10.2015 um 00:17 schrieb Troy Kisky:
>>> On 9/21/2015 2:02 PM, Troy Kisky wrote:
 Signed-off-by: Troy Kisky 
 ---
  tools/imximage.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/tools/imximage.c b/tools/imximage.c
 index 97a6880..7c21922 100644
 --- a/tools/imximage.c
 +++ b/tools/imximage.c
 @@ -396,8 +396,8 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table;
uint32_t size, version;
  
 -  size = be16_to_cpu(dcd_v2->header.length) - 8;
 -  if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
 +  size = be16_to_cpu(dcd_v2->header.length);
 +  if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t)) + 8) {
fprintf(stderr,
"Error: Image corrupt DCD size %d exceed maximum %d\n",
(uint32_t)(size / sizeof(dcd_addr_data_t)),

>>> Hi Stefano,
>>>
>>>
>>> Are there outstanding concerns about applying this patch and then
>>> applying
>>>
>>> imximage: fix commands other than write_data
>>>
>>> Where you replied
>>> "This patch breaks building boards with SPL:
>>>
>>> Building current source for 85 boards (6 threads, 1 job per thread)
>>>arm:  +   colibri_vf_dtb
>>> +Error: Image corrupt DCD size 536870911 exceed maximum 220
>>> +make[2]: *** [u-boot-dtb.imx] Error 1
>>> +make[1]: *** [u-boot-dtb.imx] Error 2
>>> +make: *** [sub-make] Error 2
>>>arm:  +   mx6sabresd_spl
>>> +Error: Image corrupt DCD size 536870911 exceed maximum 220
>>> "
>>>
>>>
>>> Or would you rather that I squash them together?
>>
>> Yes, please do it - I would like to avoid issues by git bisect.
>>
> 
> 
> That is not an issue if you apply "imximage: header.length of 4 is valid" 
> first.

Sorry, you're right, of course !
> 
> Would you still like it squashed, or a new series, or just use the previous 
> patches ?

No, I apply both patches.

Regards,
Stefano


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[U-Boot] [PATCHv3] Add support for LZ4 decompression algorithm

2015-10-07 Thread Julius Werner
This patch adds support for LZ4-compressed FIT image contents. This
algorithm has a slightly worse compression ration than LZO while being
nearly twice as fast to decompress. When loading images from a fast
storage medium this usually results in a boot time win.

Sandbox-tested only since I don't have a U-Boot development system set
up right now. The code was imported unchanged from coreboot where it's
proven to work, though. I'm mostly interested in getting this recognized
by mkImage for use in a downstream project.

Signed-off-by: Julius Werner 
---
 common/bootm.c|   9 ++
 common/image.c|   1 +
 configs/sandbox_defconfig |   1 +
 include/common.h  |   3 +
 include/image.h   |   1 +
 lib/Kconfig   |  18 
 lib/Makefile  |   1 +
 lib/lz4.c | 243 ++
 lib/lz4_wrapper.c | 137 ++
 test/compression.c|  57 +++
 10 files changed, 471 insertions(+)
 create mode 100644 lib/lz4.c
 create mode 100644 lib/lz4_wrapper.c

diff --git a/common/bootm.c b/common/bootm.c
index c0d0d09..58936ca 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -389,6 +389,15 @@ int bootm_decomp_image(int comp, ulong load, ulong 
image_start, int type,
break;
}
 #endif /* CONFIG_LZO */
+#ifdef CONFIG_LZ4
+   case IH_COMP_LZ4: {
+   size_t size = unc_len;
+
+   ret = ulz4fn(image_buf, image_len, load_buf, &size);
+   image_len = size;
+   break;
+   }
+#endif /* CONFIG_LZ4 */
default:
printf("Unimplemented compression type %d\n", comp);
return BOOTM_ERR_UNIMPLEMENTED;
diff --git a/common/image.c b/common/image.c
index 1325e07..c33749d 100644
--- a/common/image.c
+++ b/common/image.c
@@ -167,6 +167,7 @@ static const table_entry_t uimage_comp[] = {
{   IH_COMP_GZIP,   "gzip", "gzip compressed",  },
{   IH_COMP_LZMA,   "lzma", "lzma compressed",  },
{   IH_COMP_LZO,"lzo",  "lzo compressed",   },
+   {   IH_COMP_LZ4,"lz4",  "lz4 compressed",   },
{   -1, "", "", },
 };
 
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ae96b63..b2675c7 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -56,6 +56,7 @@ CONFIG_USB_STORAGE=y
 CONFIG_SYS_VSNPRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_TPM=y
+CONFIG_LZ4=y
 CONFIG_ERRNO_STR=y
 CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
diff --git a/include/common.h b/include/common.h
index 68b24d0..ecb1f06 100644
--- a/include/common.h
+++ b/include/common.h
@@ -826,6 +826,9 @@ int gzwrite(unsigned char *src, int len,
u64 startoffs,
u64 szexpected);
 
+/* lib/lz4_wrapper.c */
+int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn);
+
 /* lib/qsort.c */
 void qsort(void *base, size_t nmemb, size_t size,
   int(*compar)(const void *, const void *));
diff --git a/include/image.h b/include/image.h
index 8a864ae..08ae24a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -259,6 +259,7 @@ struct lmb;
 #define IH_COMP_BZIP2  2   /* bzip2 Compression Used   */
 #define IH_COMP_LZMA   3   /* lzma  Compression Used   */
 #define IH_COMP_LZO4   /* lzo   Compression Used   */
+#define IH_COMP_LZ45   /* lz4   Compression Used   */
 
 #define IH_MAGIC   0x27051956  /* Image Magic Number   */
 #define IH_NMLEN   32  /* Image Name Length*/
diff --git a/lib/Kconfig b/lib/Kconfig
index 0673072..a8f8460 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -100,6 +100,24 @@ config SHA_PROG_HW_ACCEL
  is performed in hardware.
 endmenu
 
+menu "Compression Support"
+
+config LZ4
+   bool "Enable LZ4 decompression support"
+   help
+ If this option is set, support for LZ4 compressed images
+ is included. The LZ4 algorithm can run in-place as long as the
+ compressed image is loaded to the end of the output buffer, and
+ trades lower compression ratios for much faster decompression.
+ 
+ NOTE: This implements the release version of the LZ4 frame
+ format as generated by default by the 'lz4' command line tool.
+ This is not the same as the outdated, less efficient legacy
+ frame format currently (2015) implemented in the Linux kernel
+ (generated by 'lz4 -l'). The two formats are incompatible.
+
+endmenu
+
 config ERRNO_STR
bool "Enable function for getting errno-related string message"
help
diff --git a/lib/Makefile b/lib/Makefile
index 96f832e..3eecefa 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
 obj-y += initcall.o
 obj-$(CONFIG_LMB) += lmb.

Re: [U-Boot] [PATCHv2] Add support for LZ4 decompression algorithm

2015-10-07 Thread Julius Werner
Well then... a few hours and a significant reduction in sanity later,
I found that I'm shadowing the new 'ret' variable from changing the
API around because I forgot to remove the declaration part from the
'ret' that already existed in the else block. It would be nice if
U-Boot compiled with -Wshadow...

This made the (outer) return variable uninitialized in the compression
error case, which on my native x86_64 happened to produce a non-zero
value... but with an i686 cross-compiler I could reproduce the error
you saw. Fixed in the next version and moved the config to
sandbox_defconfig as you suggested.
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