[U-Boot] [RFC PATCH 6/8] net: TFTP over IPv6

[Chris Packham]

Add support for UDP/TFTP over IPv6.

Signed-off-by: Chris Packham 
---
One problem with the [hostIpAddr:]fileName syntax is that IPv6 addresses
contains colons. So tftp_start() would be confused by 'tftpboot6
$loadaddr 2001:db8::1:zImage'. It is probably possible to change the
parsing to separate the host from the filename by parsing from the end
(i.e. use strrchr() instead of strchr()) but then there are error cases
that may not be handled correctly (e.g. omitting the filename).

 common/cmd_net.c | 13 
 include/net6.h   |  4 
 net/net.c|  3 +++
 net/net6.c   | 64 
 net/tftp.c   | 37 
 5 files changed, 121 insertions(+)

diff --git a/common/cmd_net.c b/common/cmd_net.c
index 271f91d..3541599 100644
--- a/common/cmd_net.c
+++ b/common/cmd_net.c
@@ -42,6 +42,19 @@ U_BOOT_CMD(
"[loadAddress] [[hostIPaddr:]bootfilename]"
 );
 
+#ifdef CONFIG_CMD_NET6
+int do_tftpb6(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   return netboot_common(TFTP6, cmdtp, argc, argv);
+}
+
+U_BOOT_CMD(
+   tftpboot6,  3,  1,  do_tftpb6,
+   "boot image via network using TFTP protocol",
+   "[loadAddress] [bootfilename]"
+);
+#endif
+
 #ifdef CONFIG_CMD_TFTPPUT
 int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
diff --git a/include/net6.h b/include/net6.h
index a0374df..df6d38e 100644
--- a/include/net6.h
+++ b/include/net6.h
@@ -264,6 +264,10 @@ void ping6_start(void);
 void ping6_receive(struct ethernet_hdr *et, struct ip6_hdr *ip6,
  int len);
 
+/* Transmit UDP packet using IPv6, performing neighbour discovery if needed */
+int net_send_udp_packet6(uchar *ether, struct in6_addr *dest,
+   int dport, int sport, int len);
+
 /* handler for incoming IPv6 echo packet */
 void net_ip6_handler(struct ethernet_hdr *et, struct ip6_hdr *ip6,
int len);
diff --git a/net/net.c b/net/net.c
index 349a18e..9e682b4 100644
--- a/net/net.c
+++ b/net/net.c
@@ -454,6 +454,9 @@ restart:
 #ifdef CONFIG_CMD_TFTPPUT
case TFTPPUT:
 #endif
+#ifdef CONFIG_CMD_NET6
+   case TFTP6:
+#endif
/* always use ARP to get server ethernet address */
tftp_start(protocol);
break;
diff --git a/net/net6.c b/net/net6.c
index 2315704..f5e272a 100644
--- a/net/net6.c
+++ b/net/net6.c
@@ -322,6 +322,50 @@ ip6_add_hdr(uchar *xip, struct in6_addr *src, struct 
in6_addr *dest,
return sizeof(struct ip6_hdr);
 }
 
+int
+net_send_udp_packet6(uchar *ether, struct in6_addr *dest, int dport, int 
sport, int len)
+{
+   uchar *pkt;
+   struct udp_hdr *udp;
+
+   udp = (struct udp_hdr *)((uchar *)net_tx_packet + net_eth_hdr_size() + 
IP6_HDR_SIZE);
+
+   udp->udp_dst = htons(dport);
+   udp->udp_src = htons(sport);
+   udp->udp_len = htons(len + IP6_UDPHDR_SIZE);
+   /* checksum */
+   udp->udp_xsum = 0;
+   udp->udp_xsum = csum_ipv6_magic(_ip6, dest, len + IP6_UDPHDR_SIZE,
+   IPPROTO_UDP, csum_partial((__u8 *)udp, len + IP6_UDPHDR_SIZE, 
0));
+
+   /* if MAC address was not discovered yet, save the packet and do 
neighbour discovery */
+   if (memcmp(ether, net_null_ethaddr, 6) == 0) {
+   net_copy_ip6(_nd_sol_packet_ip6, dest);
+   net_nd_packet_mac = ether;
+
+   pkt = net_nd_tx_packet;
+   pkt += net_set_ether(pkt, net_nd_packet_mac, PROT_IP6);
+   pkt += ip6_add_hdr(pkt, _ip6, dest, IPPROTO_UDP, 64, len + 
IP6_UDPHDR_SIZE);
+   memcpy(pkt, (uchar *)udp, len + IP6_UDPHDR_SIZE);
+
+   /* size of the waiting packet */
+   net_nd_tx_packet_size = (pkt - net_nd_tx_packet) + 
IP6_UDPHDR_SIZE + len;
+
+   /* and do the neighbor solicitation */
+   net_nd_try = 1;
+   net_nd_timer_start = get_timer(0);
+   ip6_NDISC_Request();
+   return 1;   /* waiting */
+   }
+
+   pkt = (uchar *)net_tx_packet;
+   pkt += net_set_ether(pkt, ether, PROT_IP6);
+   pkt += ip6_add_hdr(pkt, _ip6, dest, IPPROTO_UDP, 64, len + 
IP6_UDPHDR_SIZE);
+   (void) eth_send(net_tx_packet, (pkt - net_tx_packet) + IP6_UDPHDR_SIZE 
+ len);
+
+   return 0;   /* transmitted */
+}
+
 void net_ip6_handler(struct ethernet_hdr *et, struct ip6_hdr *ip6, int len)
 {
struct in_addr zero_ip = {.s_addr = 0 };
@@ -368,6 +412,26 @@ void net_ip6_handler(struct ethernet_hdr *et, struct 
ip6_hdr *ip6, int len)
}
break;
 
+   case IPPROTO_UDP:
+   udp = (struct udp_hdr *)(((uchar *)ip6) + IP6_HDR_SIZE);
+   csum = udp->udp_xsum;
+   hlen = ntohs(ip6->payload_len);
+   udp->udp_xsum = 0;
+  

[U-Boot] [RFC PATCH 5/8] net: ipv6 support

[Chris Packham]

Adds basic support for IPv6. Neighbor discovery and ping6 are the only
things supported at the moment.

Helped-by: Hanna Hawa  [endian & alignment fixes]
Signed-off-by: Chris Packham 
---
Now we have something functional. With this you can do something like
'setenv ipaddr6 3ffe::2' and 'ping6 3ffe::1' should work.

I seem to have a problem that when you send a ping6 for a non-existent
address that ends up stuck and the next non-ipv6 net operation tries to
resolve it. I suspect this is because the pending neighbor discovery
information isn't cleaned up properly, I need to look into that.

The environment variable prefixlength6 is a bit fiddly. No-one uses a
netmask6 (it'd mean a lot of ::...) it's almost always done by
including the prefix length in the address (e.g. ip addr add
2001:db8::1/64) I'm contemplating adopting that syntax and dropping
prefixlength6.

This patch is bigger than I'd like it to be but I'm not sure how to
split it up and keep the parts build able.

 common/Kconfig |  15 ++
 common/cmd_net.c   |  28 
 include/env_callback.h |   9 ++
 include/env_flags.h|  10 ++
 include/net.h  |   5 +-
 include/net6.h | 212 
 net/Kconfig|   5 +
 net/Makefile   |   3 +
 net/ndisc.c| 269 +++
 net/ndisc.h|  27 
 net/net.c  |  36 -
 net/net6.c | 375 +
 net/ping6.c| 111 +++
 13 files changed, 1102 insertions(+), 3 deletions(-)
 create mode 100644 net/ndisc.c
 create mode 100644 net/ndisc.h
 create mode 100644 net/net6.c
 create mode 100644 net/ping6.c

diff --git a/common/Kconfig b/common/Kconfig
index 2c42b8e..c72563d 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -389,6 +389,15 @@ config CMD_NET
  bootp - boot image via network using BOOTP/TFTP protocol
  tftpboot - boot image via network using TFTP protocol
 
+config CMD_NET6
+   bool "ipv6 commands"
+   select NET
+   select NET6
+   default n
+   help
+ IPv6 network commands
+ tftpboot6 - boot image via network using TFTP protocol
+
 config CMD_TFTPPUT
bool "tftp put"
help
@@ -420,6 +429,12 @@ config CMD_PING
help
  Send ICMP ECHO_REQUEST to network host
 
+config CMD_PING6
+   bool "ping6"
+   depends on CMD_NET6
+   help
+ Send ICMPv6 ECHO_REQUEST to network host
+
 config CMD_CDP
bool "cdp"
help
diff --git a/common/cmd_net.c b/common/cmd_net.c
index b2f3c7b..271f91d 100644
--- a/common/cmd_net.c
+++ b/common/cmd_net.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static int netboot_common(enum proto_t, cmd_tbl_t *, int, char * const []);
 
@@ -284,6 +285,33 @@ U_BOOT_CMD(
 );
 #endif
 
+#ifdef CONFIG_CMD_PING6
+int do_ping6(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   if (argc < 2)
+   return -1;
+
+   if (string_to_ip6(argv[1], _ping_ip6) != 0)
+   return CMD_RET_USAGE;
+
+   if (net_loop(PING6) < 0) {
+   printf("ping6 failed; host %pI6c is not alive\n",
+  _ping_ip6);
+   return 1;
+   }
+
+   printf("host %pI6c is alive\n", _ping_ip6);
+
+   return 0;
+}
+
+U_BOOT_CMD(
+   ping6,  2,  1,  do_ping6,
+   "send ICMPv6 ECHO_REQUEST to network host",
+   "pingAddress"
+);
+#endif /* CONFIG_CMD_PING6 */
+
 #if defined(CONFIG_CMD_CDP)
 
 static void cdp_update_env(void)
diff --git a/include/env_callback.h b/include/env_callback.h
index 90b95b5..9027f3f 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -60,6 +60,14 @@
 #define NET_CALLBACKS
 #endif
 
+#ifdef CONFIG_NET6
+#define NET6_CALLBACKS \
+   "ip6addr:ip6addr," \
+   "serverip6:serverip6," \
+   "prefixlength6:prefixlength6,"
+#else
+#define NET6_CALLBACKS
+#endif
 /*
  * This list of callback bindings is static, but may be overridden by defining
  * a new association in the ".callbacks" environment variable.
@@ -68,6 +76,7 @@
ENV_DOT_ESCAPE ENV_FLAGS_VAR ":flags," \
"baudrate:baudrate," \
NET_CALLBACKS \
+   NET6_CALLBACKS \
"loadaddr:loadaddr," \
SILENT_CALLBACK \
SPLASHIMAGE_CALLBACK \
diff --git a/include/env_flags.h b/include/env_flags.h
index 8823fb9..6e1891d 100644
--- a/include/env_flags.h
+++ b/include/env_flags.h
@@ -65,6 +65,15 @@ enum env_flags_varaccess {
 #define NET_FLAGS
 #endif
 
+#ifdef CONFIG_CMD_NET6
+#define NET6_FLAGS \
+   "ip6addr:s," \
+   "serverip6:s," \
+   "prefixlength6:d,"
+#else
+#define NET6_FLAGS
+#endif
+
 #ifndef CONFIG_ENV_OVERWRITE
 #define SERIAL_FLAGS "serial#:so,"
 #else
@@ -74,6 +83,7 @@ enum env_flags_varaccess {
 #define ENV_FLAGS_LIST_STATIC \
ETHADDR_FLAGS \
NET_FLAGS \
+   

[U-Boot] [RFC PATCH 3/8] lib: net_utils: make string_to_ip stricter

[Chris Packham]

Previously values greater than 255 were implicitly truncated. Add some
stricter checking to reject addresses with components >255.

With the input "1234192.168.1.1" the old behaviour would truncate the
address to 192.168.1.1. New behaviour rejects the string outright and
returns 0.0.0.0, which for the purposes of IP addresses can be
considered an error.

Signed-off-by: Chris Packham 
---

 lib/net_utils.c | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/lib/net_utils.c b/lib/net_utils.c
index cfae842..0fca54d 100644
--- a/lib/net_utils.c
+++ b/lib/net_utils.c
@@ -24,10 +24,19 @@ struct in_addr string_to_ip(const char *s)
 
for (addr.s_addr = 0, i = 0; i < 4; ++i) {
ulong val = s ? simple_strtoul(s, , 10) : 0;
+   if (val > 255) {
+   addr.s_addr = 0;
+   return addr;
+   }
addr.s_addr <<= 8;
addr.s_addr |= (val & 0xFF);
-   if (s) {
-   s = (*e) ? e+1 : e;
+   if (*e == '.') {
+   s = e + 1;
+   } else if (*e == '\0') {
+   break;
+   } else {
+   addr.s_addr = 0;
+   return addr;
}
}
 
-- 
2.5.3

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[U-Boot] [RFC PATCH 1/8] Initial net6.h

[Chris Packham]

The initial net6.h just has the definition of an IPv6 address and IPv6
header. Subsequent changes will build on this.

Signed-off-by: Chris Packham 
---
It may make sense to include this in net.h but for now I haven't done
so.

 include/net6.h | 48 
 1 file changed, 48 insertions(+)
 create mode 100644 include/net6.h

diff --git a/include/net6.h b/include/net6.h
new file mode 100644
index 000..b622951
--- /dev/null
+++ b/include/net6.h
@@ -0,0 +1,48 @@
+/**
+ * Simple IPv6 network layer implementation.
+ *
+ * Based and/or adapted from the IPv4 network layer in net.[hc]
+ *
+ * (C) Copyright 2013 Allied Telesis Labs NZ
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef __NET6_H__
+#define __NET6_H__
+
+struct in6_addr {
+   union {
+   __u8u6_addr8[16];
+   __be16  u6_addr16[8];
+   __be32  u6_addr32[4];
+   } in6_u;
+
+#define s6_addrin6_u.u6_addr8
+#define s6_addr16  in6_u.u6_addr16
+#define s6_addr32  in6_u.u6_addr32
+};
+
+/**
+ * struct ipv6hdr - Internet Protocol V6 (IPv6) header.
+ *
+ * IPv6 packet header as defined in RFC 2460.
+ */
+struct ip6_hdr {
+#if defined(__LITTLE_ENDIAN_BITFIELD)
+   __u8priority:4,
+   version:4;
+#elif defined(__BIG_ENDIAN_BITFIELD)
+   __u8version:4,
+   priority:4;
+#else
+#error  "Please fix "
+#endif
+   __u8flow_lbl[3];
+   __be16  payload_len;
+   __u8nexthdr;
+   __u8hop_limit;
+   struct in6_addr saddr;
+   struct in6_addr daddr;
+};
+
+#endif /* __NET6_H__ */
-- 
2.5.3

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[U-Boot] [RFC PATCH 4/8] lib: net_utils: add string_to_ip6

[Chris Packham]

string_to_ip6 parses an IPv6 address from a string. Parsing v6 addresses
is a bit more complicated than parsing v4 because there are a number of
different formats that can be used.

Signed-off-by: Chris Packham 
---
I'm sure the parsing can be better and done in less code with only a
single pass but I haven't yet figured it out. The main problem is that
"::" can represent a variable number of contiguous ":" so when
parsing "::" we can't tell how many half words to skip.

 include/net6.h  |   3 ++
 lib/net_utils.c | 119 
 2 files changed, 122 insertions(+)

diff --git a/include/net6.h b/include/net6.h
index 1b82c25..a41eb87 100644
--- a/include/net6.h
+++ b/include/net6.h
@@ -58,4 +58,7 @@ static inline int ipv6_addr_is_isatap(const struct in6_addr 
*a)
return (a->s6_addr32[2] | htonl(0x0200)) == htonl(0x02005EFE);
 }
 
+/* Convert a string to an ipv6 address */
+int string_to_ip6(const char *s, struct in6_addr *addr);
+
 #endif /* __NET6_H__ */
diff --git a/lib/net_utils.c b/lib/net_utils.c
index 0fca54d..b0d0364 100644
--- a/lib/net_utils.c
+++ b/lib/net_utils.c
@@ -11,6 +11,8 @@
  */
 
 #include 
+#include 
+#include 
 
 struct in_addr string_to_ip(const char *s)
 {
@@ -43,3 +45,120 @@ struct in_addr string_to_ip(const char *s)
addr.s_addr = htonl(addr.s_addr);
return addr;
 }
+
+/**
+ * Parses an struct in6_addr from the given string. IPv6 address parsing is a 
bit
+ * more complicated than v4 due to the flexible format and some of the special
+ * cases (e.g. v4 mapped).
+ *
+ * Examples of valid strings:
+ *   2001:db8::0:1234:1
+ *   2001:0db8:::::1234:0001
+ *   ::1
+ *   :::192.168.1.1
+ *
+ * Examples of invalid strings
+ *   2001:db8::0::0  (:: can only appear once)
+ *   2001:db8:192.168.1.1::1 (v4 part can only appear at the end)
+ *   192.168.1.1 (we don't implicity map v4)
+ */
+int string_to_ip6(const char *strpt, struct in6_addr *addrpt)
+{
+   int colon_count = 0;
+   int found_double_colon = 0;
+   int xstart = 0; /* first zero (double colon) */
+   int len = 7;/* num words the double colon represents */
+   int i;
+   const char *s = strpt;
+   struct in_addr zero_ip = {.s_addr = 0};
+
+   if (strpt == NULL)
+   return -1;
+
+   /* First pass, verify the syntax and locate the double colon */
+   for (;;) {
+   while (isxdigit((int)*s))
+   s++;
+   if (*s == '\0')
+   break;
+   if (*s != ':') {
+   if (*s == '.' && len >= 2) {
+   struct in_addr v4;
+   while (s != strpt && *(s - 1) != ':')
+   --s;
+   v4 = string_to_ip(s);
+   if (memcmp(_ip, ,
+  sizeof(struct in_addr) != 0)) {
+   len -= 2;
+   break;
+   }
+   }
+   /* This could be a valid address */
+   break;
+   }
+   if (s == strpt) {
+   /* The address begins with a colon */
+   if (*++s != ':')
+   /* Must start with a double colon or a number */
+   goto out_err;
+   } else {
+   s++;
+   if (found_double_colon)
+   len--;
+   else
+   xstart++;
+   }
+
+   if (*s == ':') {
+   if (found_double_colon)
+   /* Two double colons are not allowed */
+   goto out_err;
+   found_double_colon = 1;
+   len -= xstart;
+   s++;
+   }
+
+   if (++colon_count == 7)
+   /* Found all colons */
+   break;
+   }
+
+   if (colon_count == 0 || colon_count > 7)
+   goto out_err;
+   if (*--s == ':')
+   len++;
+
+   /* Second pass, read the address */
+   s = strpt;
+   for (i = 0; i < 8; i++) {
+   int val = 0;
+   char *end;
+
+   if (found_double_colon && i >= xstart && i < xstart + len) {
+   addrpt->s6_addr16[i] = 0;
+   continue;
+   }
+   while (*s == ':')
+   s++;
+
+   if (i == 6 && isdigit((int)*s)) {
+   struct in_addr v4 = string_to_ip(s);
+   if (memcmp(_ip, ,
+  

[U-Boot] [RFC PATCH 2/8] lib: vsprintf: add IPv6 compressed format %pI6c

[Chris Packham]

Add support for "human friendly" IPv6 address representations as
specified in
http://tools.ietf.org/html/draft-ietf-6man-text-addr-representation-00

This code has been adapted from Linux kernel with minimal modification.

Signed-off-by: Chris Packham 
---

 include/net6.h |  13 ++
 lib/vsprintf.c | 144 +
 2 files changed, 137 insertions(+), 20 deletions(-)

diff --git a/include/net6.h b/include/net6.h
index b622951..1b82c25 100644
--- a/include/net6.h
+++ b/include/net6.h
@@ -45,4 +45,17 @@ struct ip6_hdr {
struct in6_addr daddr;
 };
 
+/* :::0:0/96 is reserved for v4 mapped addresses */
+static inline int ipv6_addr_v4mapped(const struct in6_addr *a)
+{
+   return (a->s6_addr32[0] | a->s6_addr32[1] |
+   (a->s6_addr32[2] ^ htonl(0x))) == 0;
+}
+
+/* Intra-Site Automatic Tunnel Addressing Protocol Address */
+static inline int ipv6_addr_is_isatap(const struct in6_addr *a)
+{
+   return (a->s6_addr32[2] | htonl(0x0200)) == htonl(0x02005EFE);
+}
+
 #endif /* __NET6_H__ */
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 4c82837..349234a 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -23,6 +23,7 @@
 #endif
 
 #include 
+#include 
 #define noinline __attribute__((noinline))
 
 unsigned long simple_strtoul(const char *cp, char **endp,
@@ -304,6 +305,7 @@ static noinline char *put_dec(char *buf, uint64_t num)
 #define LEFT   16  /* left justified */
 #define SMALL  32  /* Must be 32 == 0x20 */
 #define SPECIAL64  /* 0x */
+#define COMPRESSED 128 /* use compressed format */
 
 #ifdef CONFIG_SYS_VSNPRINTF
 /*
@@ -469,12 +471,108 @@ static char *mac_address_string(char *buf, char *end, u8 
*addr, int field_width,
  flags & ~SPECIAL);
 }
 
-static char *ip6_addr_string(char *buf, char *end, u8 *addr, int field_width,
-int precision, int flags)
+static char *ip4_string(char *p, u8 *addr)
+{
+   char temp[3];   /* hold each IP quad in reverse order */
+   int i, digits;
+
+   for (i = 0; i < 4; i++) {
+   digits = put_dec_trunc(temp, addr[i]) - temp;
+   /* reverse the digits in the quad */
+   while (digits--)
+   *p++ = temp[digits];
+   if (i != 3)
+   *p++ = '.';
+   }
+   *p = '\0';
+
+   return p;
+}
+
+static char *ip6_compressed_string(char *p, u8 *addr)
+{
+   int i, j, range;
+   unsigned char zerolength[8];
+   int longest = 1;
+   int colonpos = -1;
+   u16 word;
+   u8 hi, lo;
+   int needcolon = 0;
+   int useIPv4;
+   struct in6_addr in6;
+
+   memcpy(, addr, sizeof(struct in6_addr));
+
+   useIPv4 = ipv6_addr_v4mapped() || ipv6_addr_is_isatap();
+
+   memset(zerolength, 0, sizeof(zerolength));
+
+   if (useIPv4)
+   range = 6;
+   else
+   range = 8;
+
+   /* find position of longest 0 run */
+   for (i = 0; i < range; i++) {
+   for (j = i; j < range; j++) {
+   if (in6.s6_addr16[j] != 0)
+   break;
+   zerolength[i]++;
+   }
+   }
+   for (i = 0; i < range; i++) {
+   if (zerolength[i] > longest) {
+   longest = zerolength[i];
+   colonpos = i;
+   }
+   }
+   if (longest == 1)   /* don't compress a single 0 */
+   colonpos = -1;
+
+   /* emit address */
+   for (i = 0; i < range; i++) {
+   if (i == colonpos) {
+   if (needcolon || i == 0)
+   *p++ = ':';
+   *p++ = ':';
+   needcolon = 0;
+   i += longest - 1;
+   continue;
+   }
+   if (needcolon) {
+   *p++ = ':';
+   needcolon = 0;
+   }
+   /* hex u16 without leading 0s */
+   word = ntohs(in6.s6_addr16[i]);
+   hi = word >> 8;
+   lo = word & 0xff;
+   if (hi) {
+   if (hi > 0x0f)
+   p = pack_hex_byte(p, hi);
+   else
+   *p++ = hex_asc_lo(hi);
+   p = pack_hex_byte(p, lo);
+   } else if (lo > 0x0f) {
+   p = pack_hex_byte(p, lo);
+   } else {
+   *p++ = hex_asc_lo(lo);
+   }
+   needcolon = 1;
+   }
+
+   if (useIPv4) {
+   if (needcolon)
+   *p++ = ':';
+   p = ip4_string(p, _addr[12]);
+   }
+   *p = '\0';
+
+   return p;
+}
+
+static char *ip6_string(char *p, u8 *addr, int flags)
 

[U-Boot] [RFC PATCH 8/8] net: e1000 enable multicast reception

[Chris Packham]

IPv6 neighbor discovery uses various multicast addresses to send the
request and receive the response. For neighbor discovery to work
properly in U-boot the Ethernet device needs to support joining/leaving
various L2 multicast groups or it needs to support multicast/promiscuous
mode. For the sake of simplicity the latter approach has been taken. The
e1000 hardware has slightly finer grained control in that it is possible
to enable support for multicast-promiscuous mode separately from unicast
so the extra traffic received is less.

Signed-off-by: Chris Packham 
---
Drivers that support multicast reception have it enabled/disabled with
CONFIG_MCAST_TFTP. It wouldn't be too hard to create a separate
CONFIG_MCAST that is selected by enabling CONFIG_MCAST_TFTP or
CONFIG_NET6.

 drivers/net/e1000.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 2ba03ed..e5b00a4 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -5090,6 +5090,11 @@ e1000_setup_rctl(struct e1000_hw *hw)
rctl &= ~(E1000_RCTL_SZ_4096);
rctl |= E1000_RCTL_SZ_2048;
rctl &= ~(E1000_RCTL_BSEX | E1000_RCTL_LPE);
+
+#ifdef CONFIG_CMD_NET6
+   rctl |= E1000_RCTL_MPE;
+#endif
+
E1000_WRITE_REG(hw, RCTL, rctl);
 }
 
-- 
2.5.3

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[U-Boot] [RFC PATCH 0/8] IPv6 support

[Chris Packham]

This series adds basic IPv6 support to U-boot. It is a reboot of my
earlier work on this[1]. Technically this is v4 of the series but with
the amount of time that has passed, rebasing and running though
checkpatch as well as the support for TFTP I've decided to reset the
counter back to 1.

Most of this is ported from Allied Telesis' additions to u-boot[2].
(Note that I am employed by Allied Telesis[3]). The hard work was done
some time ago by Angga, I've cleaned it up and made some improvements
with the hope of getting it accepted upstream.

A few open issues/questions

1) Presumably the majority of the actual V6 code would be included by a
config option. How far should I take that? Should the vsprintf code be
conditional? I'm also not sure where to draw the line between
CONFIG_NET6 and CONFIG_CMD_NET6, CONFIG_NET and CONFIG_CMD_NET look
similarly confused.

2) This code parallels net.c and net.h. Should I
continue this for the final version or integrate it into net.[ch].

3) rxhand_f currently takes an struct in_addr *. TFTP doesn't use this
(I haven't looked at other users). To support V6 this may need to be a
new union, a void * with some kind of flag or nothing if no rxhandler
actually cares.

Regards,
Chris
--
[1] - http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/151390
[2] - http://www.alliedtelesis.co.nz/support/gpl/other.html
[3] - some of this has been done on work time, other parts have been
  done in my personal time. Since I'm subscribed to the list using
  my gmail account I've signed using that.



Chris Packham (8):
  Initial net6.h
  lib: vsprintf: add IPv6 compressed format %pI6c
  lib: net_utils: make string_to_ip stricter
  lib: net_utils: add string_to_ip6
  net: ipv6 support
  net: TFTP over IPv6
  net: IPv6 documentation
  net: e1000 enable multicast reception

 README |   3 +
 common/Kconfig |  15 ++
 common/cmd_net.c   |  41 +
 doc/README.ipv6|  34 
 drivers/net/e1000.c|   5 +
 include/env_callback.h |   9 +
 include/env_flags.h|  10 ++
 include/net.h  |   5 +-
 include/net6.h | 280 +++
 lib/net_utils.c| 132 ++-
 lib/vsprintf.c | 144 +---
 net/Kconfig|   5 +
 net/Makefile   |   3 +
 net/ndisc.c| 269 ++
 net/ndisc.h|  27 +++
 net/net.c  |  39 -
 net/net6.c | 439 +
 net/ping6.c| 111 +
 net/tftp.c |  37 +
 19 files changed, 1583 insertions(+), 25 deletions(-)
 create mode 100644 doc/README.ipv6
 create mode 100644 include/net6.h
 create mode 100644 net/ndisc.c
 create mode 100644 net/ndisc.h
 create mode 100644 net/net6.c
 create mode 100644 net/ping6.c

-- 
2.5.3

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[U-Boot] [RFC PATCH 7/8] net: IPv6 documentation

[Chris Packham]

Signed-off-by: Chris Packham 
---

 README  |  3 +++
 doc/README.ipv6 | 34 ++
 2 files changed, 37 insertions(+)
 create mode 100644 doc/README.ipv6

diff --git a/README b/README
index c22b60b..6118de2 100644
--- a/README
+++ b/README
@@ -1116,6 +1116,7 @@ The following options need to be configured:
CONFIG_CMD_MTDPARTS * MTD partition support
CONFIG_CMD_NAND * NAND support
CONFIG_CMD_NETbootp, tftpboot, rarpboot
+   CONFIG_CMD_NET6 * tftpboot6
CONFIG_CMD_NFSNFS support
CONFIG_CMD_PCA953X  * PCA953x I2C gpio commands
CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
@@ -1123,6 +1124,8 @@ The following options need to be configured:
CONFIG_CMD_PCMCIA   * PCMCIA support
CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
  host
+   CONFIG_CMD_PING6* send ICMPv6 ECHO_REQUEST to network
+ host
CONFIG_CMD_PORTIO   * Port I/O
CONFIG_CMD_READ * Read raw data from partition
CONFIG_CMD_REGINFO  * Register dump
diff --git a/doc/README.ipv6 b/doc/README.ipv6
new file mode 100644
index 000..d4f738f
--- /dev/null
+++ b/doc/README.ipv6
@@ -0,0 +1,34 @@
+IPv6 Support in U-boot
+--
+IPv6 support in U-boot can be considered experimental. The commands
+currently supported are tftpboot6 and ping6.
+
+The following environment variables are used
+- ip6addr - IPv6 address of the device
+- prefixlength6 - The prefix length of the IPv6 subnet (equivalent to
+  netmask for IPv4)
+- gatewayip6 - IPv6 address of the default gateway
+- serverip6 - IPv6 of the tftp server
+
+Configuration
+-
+The following configuration option needs to be selected to support IPv6.
+- CONFIG_CMD_NET6
+Optionally the following can also be selected to enable the ping6
+command.
+- CONFIG_CMD_PING6
+
+TFTP Server Configuration
+-
+At the time of writing U-boot has been tested against tftp-hpa
+(https://www.kernel.org/pub/software/network/tftp/) the default Debian
+package sets TFTP_ADDRESS=0.0.0.0:69 (in /etc/default/tftpd-hpa) to
+support both IPv4 and IPv6 this need to be changed to ':69'.
+
+Ethernet Driver Requirements
+
+For IPv6 to operate correctly the Ethernet device needs to support
+transmission and reception of L2 multicast packets. Transmission is
+usually not a problem. To receive multicast packets the driver needs to
+enable promiscuous mode (some devices have the option of just enabling
+promiscuous multicast reception).
-- 
2.5.3

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[U-Boot] [PATCH v3] env: export fdt_blob to the environment variable

[Thomas Chou]

Export fdt_blob to the environment variable. So that we may
use it to boot Linux.

Signed-off-by: Thomas Chou 
---
v2
  move the code to per board, nios2-generic.c.
v3
  move the code to generic, board_r.c.

 common/board_r.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/common/board_r.c b/common/board_r.c
index a4facf8..6f10a31 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -449,6 +449,7 @@ static int initr_env(void)
env_relocate();
else
set_default_env(NULL);
+   setenv_addr("fdt_blob", gd->fdt_blob);
 
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
-- 
2.1.4

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[U-Boot] [PATCH 3/3] x86: galileo: Enable mrc cache

[Bin Meng]

Now that we have added MRC cache on quark support codes,
enable it on Intel Galileo board.

Signed-off-by: Bin Meng 
---

 arch/x86/dts/galileo.dts  | 4 
 configs/galileo_defconfig | 1 +
 2 files changed, 5 insertions(+)

diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index a4e1676..b49b1f5 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -132,6 +132,10 @@
reg = <0>;
compatible = "winbond,w25q64", "spi-flash";
memory-map = <0xff80 0x0080>;
+   rw-mrc-cache {
+   label = "rw-mrc-cache";
+   reg = <0x0001 0x0001>;
+   };
};
};
 
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index d1808a5..1e1ce95 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -2,6 +2,7 @@ CONFIG_X86=y
 CONFIG_VENDOR_INTEL=y
 CONFIG_DEFAULT_DEVICE_TREE="galileo"
 CONFIG_TARGET_GALILEO=y
+CONFIG_ENABLE_MRC_CACHE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
-- 
1.8.2.1

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[U-Boot] [PATCH 2/3] x86: quark: Implement mrc cache

[Bin Meng]

Using existing mrccache library to implement mrc cache support
for Intel Quark.

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/quark/dram.c  | 52 +++---
 arch/x86/cpu/quark/quark.c | 19 +
 2 files changed, 64 insertions(+), 7 deletions(-)

diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c
index 1b89376..40c830a 100644
--- a/arch/x86/cpu/quark/dram.c
+++ b/arch/x86/cpu/quark/dram.c
@@ -7,6 +7,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -15,6 +17,29 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static __maybe_unused int prepare_mrc_cache(struct mrc_params *mrc_params)
+{
+   struct mrc_data_container *cache;
+   struct mrc_region entry;
+   int ret;
+
+   ret = mrccache_get_region(NULL, );
+   if (ret)
+   return ret;
+
+   cache = mrccache_find_current();
+   if (!cache)
+   return -ENOENT;
+
+   debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
+ cache->data, cache->data_size, cache->checksum);
+
+   /* copy mrc cache to the mrc_params */
+   memcpy(_params->timings, cache->data, cache->data_size);
+
+   return 0;
+}
+
 static int mrc_configure_params(struct mrc_params *mrc_params)
 {
const void *blob = gd->fdt_blob;
@@ -27,14 +52,15 @@ static int mrc_configure_params(struct mrc_params 
*mrc_params)
return -EINVAL;
}
 
-   /*
-* TODO:
-*
-* We need support fast boot (MRC cache) in the future.
-*
-* Set boot mode to cold boot for now
-*/
+#ifdef CONFIG_ENABLE_MRC_CACHE
+   mrc_params->boot_mode = prepare_mrc_cache(mrc_params);
+   if (mrc_params->boot_mode)
+   mrc_params->boot_mode = BM_COLD;
+   else
+   mrc_params->boot_mode = BM_FAST;
+#else
mrc_params->boot_mode = BM_COLD;
+#endif
 
/*
 * TODO:
@@ -98,6 +124,9 @@ static int mrc_configure_params(struct mrc_params 
*mrc_params)
 int dram_init(void)
 {
struct mrc_params mrc_params;
+#ifdef CONFIG_ENABLE_MRC_CACHE
+   char *cache;
+#endif
int ret;
 
memset(_params, 0, sizeof(struct mrc_params));
@@ -121,6 +150,15 @@ int dram_init(void)
   (~(gd->ram_size - 1)) | MTRR_PHYS_MASK_VALID);
enable_caches();
 
+#ifdef CONFIG_ENABLE_MRC_CACHE
+   cache = malloc(sizeof(struct mrc_timings));
+   if (cache) {
+   memcpy(cache, _params.timings, sizeof(struct mrc_timings));
+   gd->arch.mrc_output = cache;
+   gd->arch.mrc_output_len = sizeof(struct mrc_timings);
+   }
+#endif
+
return 0;
 }
 
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 77d644a..f737e19 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -368,6 +369,15 @@ void cpu_irq_init(void)
 
 int arch_misc_init(void)
 {
+#ifdef CONFIG_ENABLE_MRC_CACHE
+   /*
+* We intend not to check any return value here, as even MRC cache
+* is not saved successfully, it is not a severe error that will
+* prevent system from continuing to boot.
+*/
+   mrccache_save();
+#endif
+
return pirq_init();
 }
 
@@ -390,3 +400,12 @@ void board_final_cleanup(void)
 
return;
 }
+
+int reserve_arch(void)
+{
+#ifdef CONFIG_ENABLE_MRC_CACHE
+   return mrccache_reserve();
+#else
+   return 0;
+#endif
+}
-- 
1.8.2.1

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[U-Boot] [PATCH 1/3] x86: ivybridge: Fix saving mrc cache and enable it

[Bin Meng]

Currently sdram_initialise() saves pei_data->mrc_output directly to
gd->arch.mrc_output. This is incorrect as pei_data->mrc_output points
to an address on the stack whose content is no longer valid when we
call mrccache_reserve(). To fix this, save it on the heap instead.

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/ivybridge/sdram.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index fc66a3c..f3d97ca 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -151,14 +151,8 @@ static int prepare_mrc_cache(struct pei_data *pei_data)
if (!mrc_cache)
return -ENOENT;
 
-   /*
-* TODO(s...@chromium.org): Skip this for now as it causes boot
-* problems
-*/
-   if (0) {
-   pei_data->mrc_input = mrc_cache->data;
-   pei_data->mrc_input_len = mrc_cache->data_size;
-   }
+   pei_data->mrc_input = mrc_cache->data;
+   pei_data->mrc_input_len = mrc_cache->data_size;
debug("%s: at %p, size %x checksum %04x\n", __func__,
  pei_data->mrc_input, pei_data->mrc_input_len,
  mrc_cache->checksum);
@@ -289,6 +283,7 @@ int sdram_initialise(struct pei_data *pei_data)
unsigned version;
const char *data;
uint16_t done;
+   char *cache;
int ret;
 
report_platform_info();
@@ -386,8 +381,13 @@ int sdram_initialise(struct pei_data *pei_data)
 * This will be copied to SDRAM in reserve_arch(), then written
 * to SPI flash in mrccache_save()
 */
-   gd->arch.mrc_output = (char *)pei_data->mrc_output;
-   gd->arch.mrc_output_len = pei_data->mrc_output_len;
+   cache = malloc(pei_data->mrc_output_len);
+   if (cache) {
+   memcpy(cache, pei_data->mrc_output,
+  pei_data->mrc_output_len);
+   gd->arch.mrc_output = cache;
+   gd->arch.mrc_output_len = pei_data->mrc_output_len;
+   }
ret = write_seeds_to_cmos(pei_data);
if (ret)
debug("Failed to write seeds to CMOS: %d\n", ret);
-- 
1.8.2.1

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Re: [U-Boot] [RFC] odroid DTB support

[Guillaume Gardet]

Hi,


Le 12/10/2015 01:45, Tom Rini a écrit :

On Fri, Oct 09, 2015 at 02:35:24PM +0200, Guillaume Gardet wrote:


Le 09/10/2015 14:23, Przemyslaw Marczak a écrit :

Hello Guillaume,

On 10/09/2015 02:11 PM, Guillaume Gardet wrote:

Hi Przemyslaw,

I would like to add DTB support for odroid board to be able to boot
upstream kernel easily.

I see 2 ways to do it:
* Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support to set 'board_rev'
and 'board_name' env vars. Then, you need a 'findfdt' script to check
'board_rev' and set fdtfile accordingly (as done for OMAP4 panda board)
* Set fdtfile name directly (as done for rpi or igep00x0).

What would you prefer?


Guillaume



Is, that the reason of adding the boot script by your last patches?

No, we need a boot script, because this is the way we boot our
openSUSE images (we boot with an initrd and some special bootargs).

Hang on, exynos stuff uses the generic distro hooks.  Can you take a
look at doc/README.distro and see what openSUSE can hook into / provide
some feedback on what needs doing?  Thanks!


This is true for odroid XU3 (Exynos5 based) but Odroid U3/X2 (Exynos4 based) 
has no generic distro hooks at the moment.

What we need:
* Boot on boot.scr (mainly to define kernel name, initrd name and bootargs)
* Use (pre-defined) fdtfile, or be able to define it manually if not already 
set (or not in sync with Linux kernel)


Guillaume


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Re: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use malloc_cache_aligned

[Marek Vasut]

On Monday, October 12, 2015 at 07:29:43 AM, Thomas Chou wrote:
> Convert dma_alloc_coherent to use memalign.
> 
> Signed-off-by: Thomas Chou 
> ---
> v2
>   use memalign.
> v3
>   check memalign() return for out of memory.
> v4
>   use malloc_cache_aligned().
> 
>  arch/nios2/include/asm/dma-mapping.h | 24 +++-
>  1 file changed, 11 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/nios2/include/asm/dma-mapping.h
> b/arch/nios2/include/asm/dma-mapping.h index 1350e3b..bfaf662 100644
> --- a/arch/nios2/include/asm/dma-mapping.h
> +++ b/arch/nios2/include/asm/dma-mapping.h
> @@ -1,23 +1,21 @@
>  #ifndef __ASM_NIOS2_DMA_MAPPING_H
>  #define __ASM_NIOS2_DMA_MAPPING_H
> 
> -/* dma_alloc_coherent() return cache-line aligned allocation which is
> mapped +#include 
> +#include 
> +
> +/*
> + * dma_alloc_coherent() return cache-line aligned allocation which is
> mapped * to uncached io region.
> - *
> - * IO_REGION_BASE should be defined in board config header file
> - *   0x8000 for nommu, 0xe000 for mmu
>   */
> -
>  static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
>  {
> - void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
> - if (!addr)
> - return 0;
> - flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
> - *handle = ((unsigned long)addr +
> -(CONFIG_SYS_DCACHELINE_SIZE - 1)) &
> - ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
> - return (void *)(*handle | IO_REGION_BASE);
> + *handle = (unsigned long)malloc_cache_aligned(len);
> + if (!*handle)
> + return NULL;
> + flush_dcache_range(*handle, *handle + len);

Wouldn't invalidate_dcache_range() be enough here ? You don't care about the
data in the newly allocated area at this point I guess -- either you fill them
in and then flush, for DMA from CPU to device OR you receive data from device
to CPU and then you invalidate this buffer again.

> + return ioremap(*handle, len);
>  }
> 
>  #endif /* __ASM_NIOS2_DMA_MAPPING_H */

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] nios2: convert cache flush to use dm cpu data

[Marek Vasut]

On Monday, October 12, 2015 at 02:34:16 AM, Thomas Chou wrote:
> Hi Marek,

Hi!

> On 10/11/2015 08:15 PM, Marek Vasut wrote:
> > On Sunday, October 11, 2015 at 02:38:35 AM, Thomas Chou wrote:
> >> Hi Marek,
> > 
> > Hi,
> > 
> >> On 10/11/2015 02:18 AM, Marek Vasut wrote:
> >>> Then you'd also need means to allocate variables to aligned memory
> >>> location to prevent invalid cache flush. (Linux does this with it's DMA
> >>> API). We are much simpler and thus this abstraction is still not
> >>> available. I wonder if the overhead of DMA API would be high or not for
> >>> U-Boot.
> >> 
> >> I see most people use memalign(ARCH_DMA_MINALIGN, len) in u-boot to
> >> allocate DMA buffers so that they are cache aligned.
> > 
> > That and include/memalign.h , which contains macros that are used to
> > align variables.
> 
> Yes. It is malloc_cache_aligned(), which should be used to allocate DMA
> buffer. Thank you for the pointer.

There are also DEFINE_CACHE_ALIGN_BUFFER() and ALLOC_CACHE_ALIGN_BUFFER()
macros which can be used to allocate such stuff on stack. And you sometimes
do want to allocate things on stack instead of using malloc().

> >>> It is even worse if the cache flush operators permit incorrect cache
> >>> flushes or invalidations. Like I mentioned before, this can lead to
> >>> hard to debug problems when using DMA (at least on ARM).
> >> 
> >> I would suggest debug check should be left as for debug only. The
> >> definition of common functions should be kept as it is more important
> >> than coding style.
> > 
> > Uh yes, that's what arm926 cache functions do, they're debug only.
> > 
> >> I debugged DMA issues a lot in the past until I realized the importance
> >> of aligned buffers. So there should be a developer's guideline.
> > 
> > For what exactly?
> 
> For u-boot, every DMA buffer must be allocated with
> malloc_cache_aligned(). Then there will be not variables and DMA buffers
> cache racing issues as you describe below.

Sometimes you might want to allocate DMA buffers on stack, for example if
you don't have mallocator running yet or if it's more convenient for some
reason. So forcing everyone to allocate DMA buffers using malloc is not
gonna slide I'm afraid.

> >> But it is even much more difficult when something you believed does not
> >> work as expected, what is taken as common sense. It will trap a lot of
> >> developers when they called your flush cache functions but was skipped
> >> just because, eg, the end of packets are not aligned which is usually
> >> the case.
> > 
> > This is good, it should bite them, because this is a bug. If, on the
> > other hand, you will paper over such bugs by adding crap to the cache
> > ops, there will be even worse bugs coming for you, like variables which
> > are sitting in the same cacheline as your unaligned buffer that you want
> > to invalidate or flush will possibly get trashed by such cache
> > operation.
> > 
> > Consider this:
> > 
> > cacheline 0: [ variable A ; buffer B . ]
> > cacheline 1: [ buffer B . ; Empty  ]
> > 
> > Now you do the following:
> > 
> > 1) Variable A = 0;
> > 2) Flush buffer B (which is unaligned, so flush cacheline 0 and 1)
> > 3) Start DMA to buffer B
> > 4) Variable A = 1;
> > 5) Check if DMA finished, it did
> > 6) Invalidate buffer B ... oh, but it's unaligned, let's invalidate
> > 
> > everything around it, which is cacheline 0 and 1.
> > 
> > 7) What is the value of variable A ? Oh, it's fetched from memory and
> > 
> > it's 0 there, even though we did set it to 1 ...
> >> 
> >> I would suggest that, with the best of my knowledge, please change the
> >> range check to a debug probe, and restore the cache flush functions to
> >> the common definition.
> > 
> > See above, does my example make it clear why we should never ever hide
> > bugs in the cache ops code ?
> 
> It is the drivers' responsibility to follow the guide line above. If
> there is such a bug, it is not the cache flush ops bug. It is a driver's
> bug. You may add a probe to show the bug from caller, but you may not
> call it a bug of cache ops and skip the flush. Given that it is quite
> common that the return of such cache ops is not checked, few (if not
> none) will ever know that the flush was skipped.

The cache flush ops is the best place to scream death and murder if someone
tries such unaligned cache operation, so maybe you should even do a printf()
there to weed such crappy drivers out for the 2016.01 release.

I agree it's the responsibility of the driver, so if the driver doesn't do
things right, it's a bug and the behavior of cache ops is undefined, which
might as well be that we do the safer thing here and flush nothing.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 00/13] x86: Provide a common MRC cache library and enable it for FSP

[Bin Meng]

Hi Simon,

On Mon, Oct 12, 2015 at 12:37 PM, Bin Meng  wrote:
> This series moves existing MRC cache codes in the ivybridge cpu
> diretory to a common place and makes some changes so that every
> x86 board benefits from it. It also updates FSP support codes
> to pass MRC cache data to fsp_init() to speed up boot time.
>
> Currently tested on Intel Bayley Bay board. Minnow Max board should
> work as it uses the same FSP that Bayley Bay uses. For Chromebook
> I cannot test that, but I see Simon added a TODO in the codes below:
>
> /*
>  * TODO(s...@chromium.org): Skip this for now as it causes boot
>  * problems
>  */
> if (0) {
> pei_data->mrc_input = mrc_cache->data;
> pei_data->mrc_input_len = mrc_cache->data_size;
> }
>
> I have no idea what breaks the MRC cache on the Chromebook board.
> Simon, you may retest this on top of this series to see if things
> go better.
>

Can you please try this patch on Chromebook?
http://patchwork.ozlabs.org/patch/528970/

I suspect this patch fixes the boot failures you saw before.

[snip]

Regards,
Bin
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Re: [U-Boot] [RFC] odroid DTB support

[Przemyslaw Marczak]

Hello,

On 10/12/2015 10:54 AM, Guillaume Gardet wrote:

Hi,


Le 12/10/2015 01:45, Tom Rini a écrit :

On Fri, Oct 09, 2015 at 02:35:24PM +0200, Guillaume Gardet wrote:


Le 09/10/2015 14:23, Przemyslaw Marczak a écrit :

Hello Guillaume,

On 10/09/2015 02:11 PM, Guillaume Gardet wrote:

Hi Przemyslaw,

I would like to add DTB support for odroid board to be able to boot
upstream kernel easily.

I see 2 ways to do it:
* Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support to set 'board_rev'
and 'board_name' env vars. Then, you need a 'findfdt' script to check
'board_rev' and set fdtfile accordingly (as done for OMAP4 panda
board)
* Set fdtfile name directly (as done for rpi or igep00x0).

What would you prefer?


Guillaume



Is, that the reason of adding the boot script by your last patches?

No, we need a boot script, because this is the way we boot our
openSUSE images (we boot with an initrd and some special bootargs).

Hang on, exynos stuff uses the generic distro hooks.  Can you take a
look at doc/README.distro and see what openSUSE can hook into / provide
some feedback on what needs doing?  Thanks!


This is true for odroid XU3 (Exynos5 based) but Odroid U3/X2 (Exynos4
based) has no generic distro hooks at the moment.

What we need:
* Boot on boot.scr (mainly to define kernel name, initrd name and bootargs)


If you need some more, than the above, then using boot.scr is required, 
but if not, then U-Boot provides this all at default.



* Use (pre-defined) fdtfile, or be able to define it manually if not
already set (or not in sync with Linux kernel)


Guillaume





For odroid_defconfig, the basic things are done automatically.

The variables:
- $fdtfile
- $boardname
are set automatically and are consistent with the mainline kernel file 
names, so for U3 the fdtfile is set as "exynos4412-odroidu3.dtb".
If you have u/zImage and fdtfile on the first partition(boot), then it 
just boot with defaults.

If you need some more features, then you can use multi config itb format.

The initrd is also loaded automatically.

All images must be stored on $boot partition

Best regards,
--
Przemyslaw Marczak
Samsung R Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH] pcm052: fix MTD partitioning

[Albert ARIBAUD]

Bonjour Tom,

Le Mon, 12 Oct 2015 11:18:24 -0400, Tom Rini  a
écrit :

> On Sun, Oct 11, 2015 at 08:06:39PM +0200, Albert ARIBAUD (3ADEV) wrote:
> 
> > MTD partitioning in current pcm052 configuration is inconsistent.
> > Fix it across MTDPARTS_DEFAULT, CONFIG_EXTRA_ENV_SETTINGS, and
> > CONFIG_ENV_OFFSET[_REDUND].
> > 
> > Signed-off-by: Albert ARIBAUD (3ADEV) 
> 
> Applied to u-boot/master, thanks!

Great, thanks!

Cordialement,
Albert ARIBAUD
3ADEV
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Re: [U-Boot] [PATCH v3 2/2] ls102xa: Fix reset hang

[York Sun]

On 10/12/2015 09:06 AM, Fabio Estevam wrote:
> On Mon, Oct 12, 2015 at 1:01 PM, Tom Rini  wrote:
> 
>>> Are you happy with this series?
>>>
>>> This one fixes a regression, so it would be nice to have it applied in 
>>> 2015.10.
>>
>> Sorry, for some reason I thought it had been picked up already by
>> Stefano.
>>
>> Stefano, are there any other release critical imx/related changes?  If
>> not, I can pickup these two directly, otherwise put together a PR
>> please.  Or just put together a PR if you like, thanks!
> 
> Initially I thought Layerscape patches would go via York Sun's tree.
> 
> When I checked with him he said it would go via your tree:
> https://www.mail-archive.com/u-boot@lists.denx.de/msg187705.html
> 

Tom,

There might be a confusion. Please pick it up if you think it is ready.

York
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Re: [U-Boot] [U-Boot,v4,02/10] vexpress64: Kconfig: tidy up

[Ryan Harkin]

Hi Tom,

On 12 October 2015 at 16:17, Tom Rini  wrote:

> On Fri, Oct 09, 2015 at 05:18:00PM +0100, Ryan Harkin wrote:
>
> > The FVP and Juno settings were identical, but duplicated, so I removed
> > the duplication with this patch.
> >
> > Signed-off-by: Ryan Harkin 
> > Reviewed-by: Linus Walleij 
>
> Applied to u-boot/master, thanks!
>

Thanks for applying my series!


> But note that I had to "dirty" up the Kconfig file a bit to not break
> other boards.


I'm sorry about that.  I had to look, but now I see that arch/arm/Kconfig
is unconditionally including that Kconfig, which I hadn't realised.


>   I suspect you want to make more clean-ups and model on
> say ARCH_UNIPHIER stuff instead.
>

Thanks, I'll check that out.  A quick look shows that it seems to cover
multiple similar platforms quite well.

Regards,
Ryan.



>
> --
> Tom
>
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Re: [U-Boot] lpc32xx: remove surplus clock cycle in PL175 WAIT_OEN config

[Tom Rini]

On Sun, Oct 04, 2015 at 11:18:24PM +0100, Vladimir Zapolskiy wrote:

> According to ARM PrimeCell PL175 documentation WAIT_OEN config value
> is defined without any additional clocks added to the value set by a
> client, the change fixes the wrong interface to WAIT_OEN config.
> 
> The change also touches a single user of LPC32xx EMC and corrects
> configured "output enable delay" value on its side according to the
> changed interface.
> 
> No functional change intended.
> 
> Signed-off-by: Vladimir Zapolskiy 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/3] Revert "powerpc: ppc4xx: remove lwmon5 support"

[Tom Rini]

On Fri, Oct 02, 2015 at 08:20:35AM +0200, Stefan Roese wrote:

> This reverts commit 8fe11b8901a31d11990488c82bc23612589d57be.
> 
> I'll add support to lwmon5 in the next patch and will remove
> support for the broken lcd4_lwmon5 as well.
> 
> Signed-off-by: Stefan Roese 
> Cc: Masahiro Yamada 

Applied to u-boot/master, thanks!

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[U-Boot] [ANN] U-Boot v2015.10-rc5 released

[Tom Rini]

Hey all,

Today is the scheduled release date for v2015.10.  But as you can tell
from the list of patches I just merged, a lot of stuff needed to go in
still and while I'm "happy" it's all safe it's also too much to not do
another -rc.  So here we are and I'm expecting to do the release next
Monday.  So please, test this.  If you have a regression, speak up.  If
you have a bugfix, speak up.

And to the maintainers, if you want to start on your "next" branch now
so that you can just rebase it to master next week, that might not be a
bad idea.  I might even do that myself (but please keep your stuff based
on my master).  Thanks!

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Re: [U-Boot] [PATCH] pcm052: fix MTD partitioning

[Tom Rini]

On Sun, Oct 11, 2015 at 08:06:39PM +0200, Albert ARIBAUD (3ADEV) wrote:

> MTD partitioning in current pcm052 configuration is inconsistent.
> Fix it across MTDPARTS_DEFAULT, CONFIG_EXTRA_ENV_SETTINGS, and
> CONFIG_ENV_OFFSET[_REDUND].
> 
> Signed-off-by: Albert ARIBAUD (3ADEV) 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v3] Revert "env_eeprom: Assign default environment during board_init_f"

[Tom Rini]

On Mon, Oct 12, 2015 at 01:34:24PM +0200, Ludger Dreier wrote:

> The crc-check and decision on which environment to use is now moved to
> env_relocate_spec. This is done for both the "redundant env" and the
> "single env" case.
> This also solves problems introduced from the commit "env_eeprom: Assign
> default environment during board_init_f"
> (ed6a5d4f880ac248530dbf64683b2257dbe54b64) due to the use of
> ENV_IS_EMBEDDED.
> 
> Signed-off-by: Ludger Dreier 

Reworded the commit message and applied to u-boot/master, thanks!

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Re: [U-Boot] Fix variation in timestamps caused by timezone differences.

[Tom Rini]

On Fri, Oct 02, 2015 at 09:11:51AM -0700, Vagrant Cascadian wrote:

> When building with SOURCE_DATE_EPOCH set, avoid use of mktime in
> default_image.c, which converts the timestamp into localtime. This
> causes variation based on timezone when building u-boot.img and
> u-boot-sunxi-with-spl.bin targets.
> 
> Signed-off-by: Vagrant Cascadian 
> Tested-by: Paul Kocialkowski 
> Acked-by: Paul Kocialkowski 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v3 2/2] ls102xa: Fix reset hang

[Tom Rini]

On Mon, Oct 12, 2015 at 12:53:12PM -0300, Fabio Estevam wrote:
> Hi Tom,
> 
> On Sat, Oct 3, 2015 at 2:21 PM, Fabio Estevam  wrote:
> > From: Fabio Estevam 
> >
> > Since commit 623d96e89aca6("imx: wdog: correct wcr register settings")
> > issuing a 'reset' command causes the system to hang.
> >
> > Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
> >
> > This means that the watchdog on LS1021 has been working by accident as
> > it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c.
> > Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only
> > revelead the endianness problem on LS102x.
> >
> > In order to fix the reset hang, introduce a reset_cpu() implementation that
> > is specific for ls102x, which accesses the watchdog WCR register in 
> > big-endian
> > format. All that is required to reset LS102x is to clear the SRS bit.
> >
> > This approach is a temporary workaround to avoid a regression for LS102x
> > in the 2015.10 release. The proper fix is to make the watchdog driver
> > endian-aware, so that it can work for i.MX, Vybrid and LS102x.
> >
> > Reported-by: Sinan Akman 
> > Tested-by: Sinan Akman 
> > Reviewed-by: Wolfgang Denk 
> > Signed-off-by: Fabio Estevam 
> 
> Are you happy with this series?
> 
> This one fixes a regression, so it would be nice to have it applied in 
> 2015.10.

Sorry, for some reason I thought it had been picked up already by
Stefano.

Stefano, are there any other release critical imx/related changes?  If
not, I can pickup these two directly, otherwise put together a PR
please.  Or just put together a PR if you like, thanks!

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Re: [U-Boot] lpc32xx: fix calculation of HCLK PLL output clock

[Tom Rini]

On Sun, Oct 04, 2015 at 11:18:45PM +0100, Vladimir Zapolskiy wrote:

> Execution branches on feedback mode are swapped, this has no effect
> if default direct mode is on (then p_div is equal to 1 and Fout equals
> to Fcco), that's why the problem remained unnoticed for a long time.
> 
> Signed-off-by: Vladimir Zapolskiy 

Applied to u-boot/master, thanks!

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Re: [U-Boot] nand: omap_gpmc: Change correctable bit-flips messages to debug()

[Tom Rini]

On Sun, Oct 04, 2015 at 06:34:42PM -0300, Ezequiel García wrote:

> Messages on corrected bit-flips are not really useful,
> as bit-flips are perfectly normal. Let's avoid cluttering
> the console and make them debug.
> 
> Signed-off-by: Ezequiel Garcia 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v4,01/10] vexpress64: fix checkpatch warnings

[Tom Rini]

On Fri, Oct 09, 2015 at 05:17:59PM +0100, Ryan Harkin wrote:

> This patch fixes a couple of checkpatch warnings on the vexpress64 config.
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, PATCHv3] Add support for LZ4 decompression algorithm

[Tom Rini]

On Tue, Oct 06, 2015 at 08:03:53PM -0700, Julius Werner wrote:

> This patch adds support for LZ4-compressed FIT image contents. This
> algorithm has a slightly worse compression ration than LZO while being
> nearly twice as fast to decompress. When loading images from a fast
> storage medium this usually results in a boot time win.
> 
> Sandbox-tested only since I don't have a U-Boot development system set
> up right now. The code was imported unchanged from coreboot where it's
> proven to work, though. I'm mostly interested in getting this recognized
> by mkImage for use in a downstream project.
> 
> Signed-off-by: Julius Werner 
> Acked-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v4, 04/10] vexpress64: fvp dram: add DRAM configuration

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:02PM +0100, Ryan Harkin wrote:

> Create an additional FVP configuration to boot images pre-loaded into
> DRAM.
> 
> Sometimes it's preferential to boot the model by loading the files
> directly into DRAM via model parameters, rather than using
> SemiHosting.
> 
> An example of model parmaters that are used to pre-load the files
> into DRAM:
> --data cluster0.cpu0=Image@0x8008 \
> --data cluster0.cpu0=fvp-base-gicv2-psci.dtb@0x8300 \
> --data cluster0.cpu0=uInitrd@0x8400
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v4,02/10] vexpress64: Kconfig: tidy up

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:00PM +0100, Ryan Harkin wrote:

> The FVP and Juno settings were identical, but duplicated, so I removed
> the duplication with this patch.
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

But note that I had to "dirty" up the Kconfig file a bit to not break
other boards.  I suspect you want to make more clean-ups and model on
say ARCH_UNIPHIER stuff instead.

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Re: [U-Boot] [U-Boot, v4, 08/10] vexpress64: juno: add optional initrd

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:06PM +0100, Ryan Harkin wrote:

> Some OS images require an initrd on Juno.
> 
> If the file ramdisk.img exists in NOR flash, then we load it and pass
> the address to the kernel.  Otherwise, we pass the "-" parameter as
> before.
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v3 2/2] ls102xa: Fix reset hang

[Fabio Estevam]

Hi Tom,

On Sat, Oct 3, 2015 at 2:21 PM, Fabio Estevam  wrote:
> From: Fabio Estevam 
>
> Since commit 623d96e89aca6("imx: wdog: correct wcr register settings")
> issuing a 'reset' command causes the system to hang.
>
> Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
>
> This means that the watchdog on LS1021 has been working by accident as
> it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c.
> Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only
> revelead the endianness problem on LS102x.
>
> In order to fix the reset hang, introduce a reset_cpu() implementation that
> is specific for ls102x, which accesses the watchdog WCR register in big-endian
> format. All that is required to reset LS102x is to clear the SRS bit.
>
> This approach is a temporary workaround to avoid a regression for LS102x
> in the 2015.10 release. The proper fix is to make the watchdog driver
> endian-aware, so that it can work for i.MX, Vybrid and LS102x.
>
> Reported-by: Sinan Akman 
> Tested-by: Sinan Akman 
> Reviewed-by: Wolfgang Denk 
> Signed-off-by: Fabio Estevam 

Are you happy with this series?

This one fixes a regression, so it would be nice to have it applied in 2015.10.

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Re: [U-Boot] [PATCH v3 2/2] ls102xa: Fix reset hang

[Fabio Estevam]

On Mon, Oct 12, 2015 at 1:01 PM, Tom Rini  wrote:

>> Are you happy with this series?
>>
>> This one fixes a regression, so it would be nice to have it applied in 
>> 2015.10.
>
> Sorry, for some reason I thought it had been picked up already by
> Stefano.
>
> Stefano, are there any other release critical imx/related changes?  If
> not, I can pickup these two directly, otherwise put together a PR
> please.  Or just put together a PR if you like, thanks!

Initially I thought Layerscape patches would go via York Sun's tree.

When I checked with him he said it would go via your tree:
https://www.mail-archive.com/u-boot@lists.denx.de/msg187705.html
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[U-Boot] [PATCH v3] Revert "env_eeprom: Assign default environment during board_init_f"

[Ludger Dreier]

The crc-check and decision on which environment to use is now moved to
env_relocate_spec. This is done for both the "redundant env" and the
"single env" case.
This also solves problems introduced from the commit "env_eeprom: Assign
default environment during board_init_f"
(ed6a5d4f880ac248530dbf64683b2257dbe54b64) due to the use of
ENV_IS_EMBEDDED.

Signed-off-by: Ludger Dreier 
---
Changes for v2:
  -instead of reverting the patch, the disabled, but needed code
   was moved from env_init to env_relocate_spec
---
Changes for v3:
  -used git send-email instead of git imap-send
---
 common/env_eeprom.c |  166 ---
 1 files changed, 77 insertions(+), 89 deletions(-)

diff --git a/common/env_eeprom.c b/common/env_eeprom.c
index 905d39a..eea169d 100644
--- a/common/env_eeprom.c
+++ b/common/env_eeprom.c
@@ -82,75 +82,13 @@ uchar env_get_char_spec(int index)
 
 void env_relocate_spec(void)
 {
-   char buf[CONFIG_ENV_SIZE];
+   char buf_env[CONFIG_ENV_SIZE];
unsigned int off = CONFIG_ENV_OFFSET;
 
 #ifdef CONFIG_ENV_OFFSET_REDUND
-   if (gd->env_valid == 2)
-   off = CONFIG_ENV_OFFSET_REDUND;
-#endif
-   eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
-   off, (uchar *)buf, CONFIG_ENV_SIZE);
-
-   env_import(buf, 1);
-}
-
-int saveenv(void)
-{
-   env_t   env_new;
-   int rc;
-   unsigned int off= CONFIG_ENV_OFFSET;
-#ifdef CONFIG_ENV_OFFSET_REDUND
-   unsigned int off_red= CONFIG_ENV_OFFSET_REDUND;
-   char flag_obsolete  = OBSOLETE_FLAG;
-#endif
-
-   BUG_ON(env_ptr != NULL);
-
-   rc = env_export(_new);
-   if (rc)
-   return rc;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-   if (gd->env_valid == 1) {
-   off = CONFIG_ENV_OFFSET_REDUND;
-   off_red = CONFIG_ENV_OFFSET;
-   }
-
-   env_new.flags = ACTIVE_FLAG;
-#endif
-
-   rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
- off, (uchar *)_new, CONFIG_ENV_SIZE);
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-   if (rc == 0) {
-   eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
-off_red + offsetof(env_t, flags),
-(uchar *)_obsolete, 1);
-
-   if (gd->env_valid == 1)
-   gd->env_valid = 2;
-   else
-   gd->env_valid = 1;
-   }
-#endif
-   return rc;
-}
-
-/*
- * Initialize Environment use
- *
- * We are still running from ROM, so data use is limited.
- * Use a (moderately small) buffer on the stack
- */
-#ifdef CONFIG_ENV_OFFSET_REDUND
-int env_init(void)
-{
-#ifdef ENV_IS_EMBEDDED
ulong len, crc[2], crc_tmp;
-   unsigned int off, off_env[2];
-   uchar buf[64], flags[2];
+   unsigned int off_env[2];
+   uchar rdbuf[64], flags[2];
int i, crc_ok[2] = {0, 0};
 
eeprom_init();  /* prepare for EEPROM read/write */
@@ -172,12 +110,12 @@ int env_init(void)
len = ENV_SIZE;
off = off_env[i] + offsetof(env_t, data);
while (len > 0) {
-   int n = (len > sizeof(buf)) ? sizeof(buf) : len;
+   int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
 
eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR, off,
-   buf, n);
+   rdbuf, n);
 
-   crc_tmp = crc32(crc_tmp, buf, n);
+   crc_tmp = crc32(crc_tmp, rdbuf, n);
len -= n;
off += n;
}
@@ -189,8 +127,6 @@ int env_init(void)
if (!crc_ok[0] && !crc_ok[1]) {
gd->env_addr= 0;
gd->env_valid   = 0;
-
-   return 0;
} else if (crc_ok[0] && !crc_ok[1]) {
gd->env_valid = 1;
} else if (!crc_ok[0] && crc_ok[1]) {
@@ -213,19 +149,10 @@ int env_init(void)
gd->env_addr = off_env[1] + offsetof(env_t, data);
else if (gd->env_valid == 1)
gd->env_addr = off_env[0] + offsetof(env_t, data);
-#else
-   gd->env_addr = (ulong)_environment[0];
-   gd->env_valid = 1;
-#endif
-   return 0;
-}
-#else
-int env_init(void)
-{
-#ifdef ENV_IS_EMBEDDED
+
+#else /* CONFIG_ENV_OFFSET_REDUND */
ulong crc, len, new;
-   unsigned off;
-   uchar buf[64];
+   uchar rdbuf[64];
 
eeprom_init();  /* prepare for EEPROM read/write */
 
@@ -237,13 +164,12 @@ int env_init(void)
new = 0;
len = ENV_SIZE;
off = offsetof(env_t, data);
-
while (len > 0) {
-   int n = (len > sizeof(buf)) ? sizeof(buf) : len;
+   int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
 
eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
-   

Re: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use malloc_cache_aligned

[Thomas Chou]

Hi Marek,

On 10/12/2015 06:32 PM, Marek Vasut wrote:

Wouldn't invalidate_dcache_range() be enough here ? You don't care about the
data in the newly allocated area at this point I guess -- either you fill them
in and then flush, for DMA from CPU to device OR you receive data from device
to CPU and then you invalidate this buffer again.


No. We cannot use invalidate cache here. This is related to cache design 
of nios2, kind of direct mapped cache.


Best regards,
Thomas
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Re: [U-Boot] [PATCH] nios2: convert cache flush to use dm cpu data

[Thomas Chou]

Hi Marek,

On 10/12/2015 06:30 PM, Marek Vasut wrote:

There are also DEFINE_CACHE_ALIGN_BUFFER() and ALLOC_CACHE_ALIGN_BUFFER()
macros which can be used to allocate such stuff on stack. And you sometimes
do want to allocate things on stack instead of using malloc().


Thanks for sharing this.


Sometimes you might want to allocate DMA buffers on stack, for example if
you don't have mallocator running yet or if it's more convenient for some
reason. So forcing everyone to allocate DMA buffers using malloc is not
gonna slide I'm afraid.


The same rule can be applied to buffer allocated on stack, with the 
macro you mentioned above. In all, cache line aware allocation on heap 
or on stack must be used for DMA buffer.



The cache flush ops is the best place to scream death and murder if someone
tries such unaligned cache operation, so maybe you should even do a printf()
there to weed such crappy drivers out for the 2016.01 release.

I agree it's the responsibility of the driver, so if the driver doesn't do
things right, it's a bug and the behavior of cache ops is undefined, which
might as well be that we do the safer thing here and flush nothing.


It won't be safer to flush nothing. Sooner or later the cache will be 
flushed due to data access, even if the cache flush ops is skip.


To solve problem like this, the only solution is to enforce the rule to 
allocate DMA buffer. It is wrong to skip the flush.


Best regards,
Thomas
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Re: [U-Boot] [PATCH] nios2: convert cache flush to use dm cpu data

[Marek Vasut]

On Monday, October 12, 2015 at 03:12:18 PM, Thomas Chou wrote:
> Hi Marek,
> 
> On 10/12/2015 06:30 PM, Marek Vasut wrote:
> > There are also DEFINE_CACHE_ALIGN_BUFFER() and ALLOC_CACHE_ALIGN_BUFFER()
> > macros which can be used to allocate such stuff on stack. And you
> > sometimes do want to allocate things on stack instead of using malloc().
> 
> Thanks for sharing this.
> 
> > Sometimes you might want to allocate DMA buffers on stack, for example if
> > you don't have mallocator running yet or if it's more convenient for some
> > reason. So forcing everyone to allocate DMA buffers using malloc is not
> > gonna slide I'm afraid.
> 
> The same rule can be applied to buffer allocated on stack, with the
> macro you mentioned above. In all, cache line aware allocation on heap
> or on stack must be used for DMA buffer.

That's correct, they must be used. But sadly, this is not yet the case in
all the drivers, which we need to rectify. And how best to rectify this
than to scream when someone does such a thing, right ?

> > The cache flush ops is the best place to scream death and murder if
> > someone tries such unaligned cache operation, so maybe you should even
> > do a printf() there to weed such crappy drivers out for the 2016.01
> > release.
> > 
> > I agree it's the responsibility of the driver, so if the driver doesn't
> > do things right, it's a bug and the behavior of cache ops is undefined,
> > which might as well be that we do the safer thing here and flush
> > nothing.
> 
> It won't be safer to flush nothing. Sooner or later the cache will be
> flushed due to data access, even if the cache flush ops is skip.

That is bad bad bad, that's even nastier. We really need to fix the drivers,
not paper over it in the cache ops.

> To solve problem like this, the only solution is to enforce the rule to
> allocate DMA buffer. It is wrong to skip the flush.

I absolutelly agree we need aligned allocations for DMA memory areas. But,
we also shouldn't hide bugs. And I believe aligning the incorrect arguments
to cache functions is not the way to go. We should check the arguments and
if someone tries an unaligned cache op, we should scream. What do you think?

btw. I think you won't get way too many cache warnings nowadays and we can
fix those few remaining way before the 2016.01 is out.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 2/2] x86: Add SMBIOS table support

[Bin Meng]

Hi Simon,

On Mon, Oct 12, 2015 at 8:23 PM, Bin Meng  wrote:
> System Management BIOS (SMBIOS) is a specification for how
> motherboard and system vendors present management information
> about their products in a standard format by extending the BIOS
> interface on Intel architecture systems. As of today the latest
> spec is 3.0 and can be downloaded from DMTF website. This commit
> adds a simple and minimum required implementation.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - Add comments for smbios_add_string() and smbios_string_table_len()
> - Add inline function fill_smbios_header() to fill the table header
> - Remove update_max() macro, instead use a function pointer table
>   to handle the writing of each table structure
> - Add writing SMBIOS type2 table (similar to type1)
>

This is actually the v2 series. Sorry I forgot to add a 'Series-version' ..

>  arch/x86/Kconfig  |  11 ++
>  arch/x86/include/asm/smbios.h | 236 
>  arch/x86/lib/Makefile |   1 +
>  arch/x86/lib/smbios.c | 269 
> ++
>  arch/x86/lib/tables.c |   5 +
>  doc/README.x86|   2 -
>  6 files changed, 522 insertions(+), 2 deletions(-)
>  create mode 100644 arch/x86/include/asm/smbios.h
>  create mode 100644 arch/x86/lib/smbios.c
>

[snip]

Regards,
Bin
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Re: [U-Boot] [PATCH 3/3] x86: Added support for Advantech SOM-6896

[George McCollister]

On Fri, Oct 9, 2015 at 10:31 PM, Bin Meng  wrote:
> Hi George,
>
> On Sat, Oct 10, 2015 at 5:54 AM, George McCollister
>  wrote:
>> Advantech SOM-6896 is a Broadwell U based COM Express Compact Module
>> Type 6. This patch adds support for it as a coreboot payload.
>>
>> On board SATA and SPI are functional. On board Ethernet isn't functional
>> but since it's optional and ties up a PCIe x4 that is otherwise brought
>> out, this isn't a concern at the moment. USB doesn't work since the
>> xHCI driver appears to be broken.
>>
>> Signed-off-by: George McCollister 
>> ---
>>  arch/x86/dts/Makefile  |  3 ++-
>>  arch/x86/dts/som-6896.dts  | 43 +++
>>  include/configs/som-6896.h | 38 ++
>>  3 files changed, 83 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/x86/dts/som-6896.dts
>>  create mode 100644 include/configs/som-6896.h
>>
>> diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
>> index 71595c7..9fa2e21 100644
>> --- a/arch/x86/dts/Makefile
>> +++ b/arch/x86/dts/Makefile
>> @@ -6,7 +6,8 @@ dtb-y += bayleybay.dtb \
>> galileo.dtb \
>> minnowmax.dtb \
>> qemu-x86_i440fx.dtb \
>> -   qemu-x86_q35.dtb
>> +   qemu-x86_q35.dtb \
>> +   som-6896.dtb
>>
>>  targets += $(dtb-y)
>>
>> diff --git a/arch/x86/dts/som-6896.dts b/arch/x86/dts/som-6896.dts
>> new file mode 100644
>> index 000..ad904c9
>> --- /dev/null
>> +++ b/arch/x86/dts/som-6896.dts
>> @@ -0,0 +1,43 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +/include/ "serial.dtsi"
>> +/include/ "rtc.dtsi"
>> +
>> +/ {
>> +   model = "Advantech SOM-6896";
>> +   compatible = "advantech,som-6896", "intel,broadwell";
>> +
>> +   aliases {
>> +   spi0 = "/spi";
>> +   };
>> +
>> +   config {
>> +  silent_console = <0>;
>> +   };
>> +
>> +   chosen {
>> +   stdout-path = "/serial";
>> +   };
>> +
>> +   pci {
>> +   compatible = "intel,pci-broadwell", "pci-x86";
>
> I would just describe it as "pci-x86" as Intel chipset PCI is compatible.
Okay
>
>> +   #address-cells = <3>;
>> +   #size-cells = <2>;
>> +   u-boot,dm-pre-reloc;
>> +   ranges = <0x0200 0x0 0xe000 0xe000 0 0x1000
>
> Can you verify 0xe000 is not configured by coreboot as the PCIe
> ECAM base address?
I'll try to verify these, it's quite possible they are incorrect.
>
>> +   0x4200 0x0 0xd000 0xd000 0 0x1000
>> +   0x0100 0x0 0x1000 0x1000 0 0xefff>;
>> +   };
>> +
>> +   spi {
>> +   #address-cells = <1>;
>> +   #size-cells = <0>;
>> +   compatible = "intel,ich-spi";
>> +   spi-flash@0 {
>> +   reg = <0>;
>> +   compatible = "winbond,w25q128", "spi-flash";
>> +   memory-map = <0xff80 0x0080>;
>> +   };
>> +   };
>> +};
>> diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h
>> new file mode 100644
>> index 000..518bf11
>> --- /dev/null
>> +++ b/include/configs/som-6896.h
>> @@ -0,0 +1,38 @@
>> +/*
>> + * Configuration settings for the SOM-6896
>> + *
>> + * Copyright (C) 2015 NovaTech LLC
>> + *   George McCollister 
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +#ifndef __CONFIG_H
>> +#define __CONFIG_H
>> +
>> +#include 
>> +
>> +#define CONFIG_SYS_MONITOR_LEN (1 << 20)
>> +
>> +#define CONFIG_BOARD_EARLY_INIT_F
>> +#define CONFIG_MISC_INIT_R
>> +
>> +#define CONFIG_SCSI_DEV_LIST   \
>> +   {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
>> +
>> +#define CONFIG_SYS_EARLY_PCI_INIT
>> +#define CONFIG_PCI_PNP
>> +
>> +#define VIDEO_IO_OFFSET0
>> +#define CONFIG_X86EMU_RAW_IO
>> +
>> +#define CONFIG_ARCH_EARLY_INIT_R
>> +
>> +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga,usbkbd\0" \
>> +   "stdout=serial,vga\0" \
>> +   "stderr=serial,vga\0"
>> +
>> +#define CONFIG_ENV_SECT_SIZE   0x1000
>> +#define CONFIG_ENV_OFFSET  0x00ff
>
> This address looks odd to me. As in the dts file, the SPI flash is
> described as a 8MB chip, but here the offset is below 16MB, which is
> outside the flash address range.
Yeah it's a 16MB chip, I screwed that up, I'll fix it. Thanks for catching that.
>
>> +
>> +#endif /* __CONFIG_H */
>> --
>
> Regards,
> Bin
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[U-Boot] [PATCH 1/2] Makefile: Generate U_BOOT_DMI_DATE for SMBIOS

[Bin Meng]

Add U_BOOT_DMI_DATE (format mm/dd/) generation to be used by
SMBIOS tables, as required by SMBIOS spec 3.0 [1]. See chapter 7.1,
BIOS information structure offset 08h for details.

[1] 
http://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.0.0.pdf

Signed-off-by: Bin Meng 
Acked-by: Simon Glass 
---

Changes in v2: None

 Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Makefile b/Makefile
index 8c0ca1b..3177e43 100644
--- a/Makefile
+++ b/Makefile
@@ -1278,6 +1278,7 @@ define filechk_timestamp.h
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define 
U_BOOT_DATE "%b %d %C%y"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define 
U_BOOT_TIME "%T"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define 
U_BOOT_TZ "%z"'; \
+   LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define 
U_BOOT_DMI_DATE "%m/%d/%Y"'; \
else \
return 42; \
fi; \
@@ -1285,6 +1286,7 @@ define filechk_timestamp.h
LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \
LC_ALL=C date +'#define U_BOOT_TIME "%T"'; \
LC_ALL=C date +'#define U_BOOT_TZ "%z"'; \
+   LC_ALL=C date +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; \
fi)
 endef
 
-- 
1.8.2.1

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[U-Boot] [PATCH 2/2] x86: Add SMBIOS table support

[Bin Meng]

System Management BIOS (SMBIOS) is a specification for how
motherboard and system vendors present management information
about their products in a standard format by extending the BIOS
interface on Intel architecture systems. As of today the latest
spec is 3.0 and can be downloaded from DMTF website. This commit
adds a simple and minimum required implementation.

Signed-off-by: Bin Meng 

---

Changes in v2:
- Add comments for smbios_add_string() and smbios_string_table_len()
- Add inline function fill_smbios_header() to fill the table header
- Remove update_max() macro, instead use a function pointer table
  to handle the writing of each table structure
- Add writing SMBIOS type2 table (similar to type1)

 arch/x86/Kconfig  |  11 ++
 arch/x86/include/asm/smbios.h | 236 
 arch/x86/lib/Makefile |   1 +
 arch/x86/lib/smbios.c | 269 ++
 arch/x86/lib/tables.c |   5 +
 doc/README.x86|   2 -
 6 files changed, 522 insertions(+), 2 deletions(-)
 create mode 100644 arch/x86/include/asm/smbios.h
 create mode 100644 arch/x86/lib/smbios.c

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5e42d7d..bf09b21 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -358,6 +358,17 @@ config GENERATE_ACPI_TABLE
  by the operating system. It defines platform-independent interfaces
  for configuration and power management monitoring.
 
+config GENERATE_SMBIOS_TABLE
+   bool "Generate an SMBIOS (System Management BIOS) table"
+   default y
+   help
+ The System Management BIOS (SMBIOS) specification addresses how
+ motherboard and system vendors present management information about
+ their products in a standard format by extending the BIOS interface
+ on Intel architecture systems.
+
+ Check http://www.dmtf.org/standards/smbios for details.
+
 endmenu
 
 config MAX_PIRQ_LINKS
diff --git a/arch/x86/include/asm/smbios.h b/arch/x86/include/asm/smbios.h
new file mode 100644
index 000..623a703
--- /dev/null
+++ b/arch/x86/include/asm/smbios.h
@@ -0,0 +1,236 @@
+/*
+ * Copyright (C) 2015, Bin Meng 
+ *
+ * Adapted from coreboot src/include/smbios.h
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SMBIOS_H_
+#define _SMBIOS_H_
+
+/* SMBIOS spec version implemented */
+#define SMBIOS_MAJOR_VER   3
+#define SMBIOS_MINOR_VER   0
+
+/* SMBIOS structure types */
+enum {
+   SMBIOS_BIOS_INFORMATION = 0,
+   SMBIOS_SYSTEM_INFORMATION = 1,
+   SMBIOS_BOARD_INFORMATION = 2,
+   SMBIOS_SYSTEM_ENCLOSURE = 3,
+   SMBIOS_PROCESSOR_INFORMATION = 4,
+   SMBIOS_CACHE_INFORMATION = 7,
+   SMBIOS_SYSTEM_SLOTS = 9,
+   SMBIOS_PHYS_MEMORY_ARRAY = 16,
+   SMBIOS_MEMORY_DEVICE = 17,
+   SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS = 19,
+   SMBIOS_SYSTEM_BOOT_INFORMATION = 32,
+   SMBIOS_END_OF_TABLE = 127
+};
+
+#define SMBIOS_INTERMEDIATE_OFFSET 16
+#define SMBIOS_STRUCT_EOS_BYTES2
+
+struct __packed smbios_entry {
+   u8 anchor[4];
+   u8 checksum;
+   u8 length;
+   u8 major_ver;
+   u8 minor_ver;
+   u16 max_struct_size;
+   u8 entry_point_rev;
+   u8 formatted_area[5];
+   u8 intermediate_anchor[5];
+   u8 intermediate_checksum;
+   u16 struct_table_length;
+   u32 struct_table_address;
+   u16 struct_count;
+   u8 bcd_rev;
+};
+
+/* BIOS characteristics */
+#define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7)
+#define BIOS_CHARACTERISTICS_UPGRADEABLE   (1 << 11)
+#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT   (1 << 16)
+
+#define BIOS_CHARACTERISTICS_EXT1_ACPI (1 << 0)
+#define BIOS_CHARACTERISTICS_EXT2_TARGET   (1 << 2)
+
+struct __packed smbios_type0 {
+   u8 type;
+   u8 length;
+   u16 handle;
+   u8 vendor;
+   u8 bios_ver;
+   u16 bios_start_segment;
+   u8 bios_release_date;
+   u8 bios_rom_size;
+   u64 bios_characteristics;
+   u8 bios_characteristics_ext1;
+   u8 bios_characteristics_ext2;
+   u8 bios_major_release;
+   u8 bios_minor_release;
+   u8 ec_major_release;
+   u8 ec_minor_release;
+   char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+struct __packed smbios_type1 {
+   u8 type;
+   u8 length;
+   u16 handle;
+   u8 manufacturer;
+   u8 product_name;
+   u8 version;
+   u8 serial_number;
+   u8 uuid[16];
+   u8 wakeup_type;
+   u8 sku_number;
+   u8 family;
+   char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+#define SMBIOS_BOARD_FEATURE_HOSTING   (1 << 0)
+#define SMBIOS_BOARD_MOTHERBOARD   10
+
+struct __packed smbios_type2 {
+   u8 type;
+   u8 length;
+   u16 handle;
+   u8 manufacturer;
+   u8 product_name;
+   u8 version;
+   u8 serial_number;
+   u8 asset_tag_number;
+   u8 feature_flags;
+   

[U-Boot] Fastboot behaviour with sparse images

[Maxime Ripard]

Hi,

I'm currently writing the support in U-Boot for NAND-backed devices
using fastboot [1], and that work derived a bit to supporting the
sparse images.

For "regular" images that are being stored, we expect a pair of
download and flash commands. Simple.

Things start to get a bit more complex with sparse images that have
been split because of a max-download-size lower than the actual image
size.

Here, from what I could gather from various random blog posts, the
fastboot client implementation and dumping a few USB sessions, the
client simply creates several download / flash pairs, always on the
same partition, without any way to distinct that from several
subsequent writes issued by the user.

So, I'm guessing that the expectation is that the bootloader
implementation should store the last offset it wrote to, and simple
resume from there if the partition names in the flash commands are the
same, which would prevent two subsequent write on the same partition
by any client. Am I right?

A related question is when should we erase the NAND partition? Only
when doing fastboot erase, or also when doing fastboot write (which,
combined with the issue raised above, would also mean that we don't
want to do an erase on the whole partition everytime there's a flash
command on it).

Thanks!
Maxime

1: http://lists.denx.de/pipermail/u-boot/2015-August/226053.html

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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[U-Boot] [PATCH] SECURE_BOOT: Correct reading of ITS bit

[Aneesh Bansal]

The ITS bit was being read incorrectly beacause of operator
precedence. The same ahs been corrected.

Signed-off-by: Lawish Deshmukh 
Signed-off-by: Aneesh Bansal 
---
 board/freescale/common/fsl_validate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/freescale/common/fsl_validate.c 
b/board/freescale/common/fsl_validate.c
index 5283648..b528fb7 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -246,7 +246,7 @@ static void fsl_secboot_image_verification_failure(void)
struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR);
u32 sts = sec_mon_in32(_mon_regs->hp_stat);
 
-   u32 its = sfp_in32(_regs->ospr) & ITS_MASK >> ITS_BIT;
+   u32 its = (sfp_in32(_regs->ospr) & ITS_MASK) >> ITS_BIT;
 
/*
 * Read the SEC_MON status register
-- 
1.8.1.4

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Re: [U-Boot] [RFC PATCH 0/8] IPv6 support

[Jean-Pierre Tosoni]

Chris,

Thanks for the update. I didn't receive all the patches but well, a couple
of comments below.

> -Message d'origine-
> De : Chris Packham [mailto:judge.pack...@gmail.com]
> Envoyé : lundi 12 octobre 2015 09:43
> À : u-boot@lists.denx.de; Joe Hershberger
> Cc : jp.tos...@acksys.fr; han...@marvell.com; Angga; Chris Packham; Tom
> Rini; Simon Glass; Masahiro Yamada
> Objet : [RFC PATCH 0/8] IPv6 support
> 
> This series adds basic IPv6 support to U-boot. It is a reboot of my
> earlier work on this[1]. Technically this is v4 of the series but with the
> amount of time that has passed, rebasing and running though checkpatch as
> well as the support for TFTP I've decided to reset the counter back to 1.
> 
> Most of this is ported from Allied Telesis' additions to u-boot[2].
> (Note that I am employed by Allied Telesis[3]). The hard work was done
> some time ago by Angga, I've cleaned it up and made some improvements with
> the hope of getting it accepted upstream.
> 
> A few open issues/questions
> 
> 1) Presumably the majority of the actual V6 code would be included by a
> config option. How far should I take that? Should the vsprintf code be
> conditional? I'm also not sure where to draw the line between
> CONFIG_NET6 and CONFIG_CMD_NET6, CONFIG_NET and CONFIG_CMD_NET look
> similarly confused.

If possible vsprintf code should be a different conditional since it could
be
used for other purpose than in IPv6 frames processing; ie. CONFIG_FORMAT_IP6
?

> 
> 2) This code parallels net.c and net.h. Should I continue this for the
> final version or integrate it into net.[ch].

Net.c is already big and most of your changes look independent. I would keep
net6.c separate. Maybe in an ideal future, split net.c into net4.c and net.c
?

> (...)

Regards,
Jean-Pierre Tosoni


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Re: [U-Boot] [PATCH] nios2: convert cache flush to use dm cpu data

[Wolfgang Denk]

Dear Marek,

In message <201510121529.45730.ma...@denx.de> you wrote:
>
> That is bad bad bad, that's even nastier. We really need to fix the drivers,
> not paper over it in the cache ops.

Full ACK here.

> > To solve problem like this, the only solution is to enforce the rule to
> > allocate DMA buffer. It is wrong to skip the flush.
> 
> I absolutelly agree we need aligned allocations for DMA memory areas. But,
> we also shouldn't hide bugs. And I believe aligning the incorrect arguments
> to cache functions is not the way to go. We should check the arguments and
> if someone tries an unaligned cache op, we should scream. What do you think?

Again, full ACK.

We should make sure we get clear, unmistakable error messages for such
bugs, and not silent non-deterministic behaviour.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
There you go man, Keep as cool as you can. It riles them  to  believe
that you perceive the web they weave. Keep on being free!
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Re: [U-Boot] U-Boot version issue

[ba_f]

Am 2015-10-09 15:02, schrieb Simon Glass:

+Marcel who is the maintainer

Hi,

On 8 October 2015 at 14:56, ba_f  
wrote:


Hello,


i have an issue with different U-Boot versions, and i have no clue 
what's

the problem.
Maybe someone's got an idea?

Working on Xilinx' ARM Platform i use U-Boot version
u-boot-xlnx-xilinx-v14.6.01, and it's all good with that one and even 
lower

versions.
But, using u-boot-xlnx-xilinx-v14.7 or higher results in serious CPU 
errors:


uboot> fatload mmc 0 0x00c0 bootstrap.uimage
reading bootstrap.uimage
6139968 bytes read in 528 ms (11.1 MiB/s)
uboot> go 0x0100


What is that bootstrap program? Maybe you need to turn off the cache
before starting it with the 'dcache off' command?



Indeed DCache is the problem.

The old u-boot had CONFIG_SYS_DCACHE_OFF=y.



Thanks,
ba_f
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Re: [U-Boot] [PATCH 1/2] arm: socfpga: mmc: Enable calibration for drvsel and smpsel

[Marek Vasut]

On Wednesday, October 07, 2015 at 04:54:25 AM, Chin Liang See wrote:
> Hi Marek,

Hi!

> > > > 5. Affect at booting time??
> > > 
> > > We measured this before and it took around ~5.2ms for worst case.
> > 
> > Hm, what about supporting both the DT variant (where you specify drvsel
> > and smplsel in DT, the way we do it in Linux) and this calibration
> > variant. The calibration would only be executed if the smplsel and
> > drvsel args were missing from the DT.
> > 
> > What do you think ?
> 
> Sorry as missing out this email.

No problem, I was also pretty busy myself.

> Yah, this sound good to me where user can use DT variant if concern
> about the boot time. Let me create that and sending in new revision.

Thanks!

Best regards,
Marek Vasut
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[U-Boot] [PATCH v4 11/21] sf: Move BAR defined code at once place

[Jagan Teki]

Move bar read code below the bar write hance both at once place,
hence it easy for #ifdef macro only once and readable.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_ops.c | 81 +++-
 1 file changed, 39 insertions(+), 42 deletions(-)

diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 016a5df..e20a3d6 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -29,6 +29,16 @@ static void spi_flash_addr(u32 addr, u8 *cmd)
cmd[3] = addr >> 0;
 }
 
+/* Read commands array */
+static u8 spi_read_cmds_array[] = {
+   CMD_READ_ARRAY_SLOW,
+   CMD_READ_ARRAY_FAST,
+   CMD_READ_DUAL_OUTPUT_FAST,
+   CMD_READ_DUAL_IO_FAST,
+   CMD_READ_QUAD_OUTPUT_FAST,
+   CMD_READ_QUAD_IO_FAST,
+};
+
 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
 {
int ret;
@@ -132,6 +142,35 @@ bar_end:
flash->bank_curr = bank_sel;
return flash->bank_curr;
 }
+
+static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
+{
+   u8 curr_bank = 0;
+   int ret;
+
+   if (flash->size <= SPI_FLASH_16MB_BOUN)
+   goto bank_end;
+
+   switch (idcode0) {
+   case SPI_FLASH_CFI_MFR_SPANSION:
+   flash->bank_read_cmd = CMD_BANKADDR_BRRD;
+   flash->bank_write_cmd = CMD_BANKADDR_BRWR;
+   default:
+   flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
+   flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
+   }
+
+   ret = spi_flash_read_common(flash, >bank_read_cmd, 1,
+   _bank, 1);
+   if (ret) {
+   debug("SF: fail to read bank addr register\n");
+   return ret;
+   }
+
+bank_end:
+   flash->bank_curr = curr_bank;
+   return 0;
+}
 #endif
 
 #ifdef CONFIG_SF_DUAL_FLASH
@@ -569,17 +608,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, 
size_t len,
 }
 #endif
 
-
-/* Read commands array */
-static u8 spi_read_cmds_array[] = {
-   CMD_READ_ARRAY_SLOW,
-   CMD_READ_ARRAY_FAST,
-   CMD_READ_DUAL_OUTPUT_FAST,
-   CMD_READ_DUAL_IO_FAST,
-   CMD_READ_QUAD_OUTPUT_FAST,
-   CMD_READ_QUAD_IO_FAST,
-};
-
 #ifdef CONFIG_SPI_FLASH_MACRONIX
 static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
 {
@@ -647,37 +675,6 @@ static int spi_flash_set_qeb(struct spi_flash *flash, u8 
idcode0)
}
 }
 
-#ifdef CONFIG_SPI_FLASH_BAR
-static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
-{
-   u8 curr_bank = 0;
-   int ret;
-
-   if (flash->size <= SPI_FLASH_16MB_BOUN)
-   goto bank_end;
-
-   switch (idcode0) {
-   case SPI_FLASH_CFI_MFR_SPANSION:
-   flash->bank_read_cmd = CMD_BANKADDR_BRRD;
-   flash->bank_write_cmd = CMD_BANKADDR_BRWR;
-   default:
-   flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
-   flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
-   }
-
-   ret = spi_flash_read_common(flash, >bank_read_cmd, 1,
-   _bank, 1);
-   if (ret) {
-   debug("SF: fail to read bank addr register\n");
-   return ret;
-   }
-
-bank_end:
-   flash->bank_curr = curr_bank;
-   return 0;
-}
-#endif
-
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 {
-- 
1.9.1

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[U-Boot] [PATCH v4 06/21] sf: Update status reg check in spi_flash_cmd_wait_ready

[Jagan Teki]

Current flash wait_ready logic is not modular to add new
register status check, hence updated the status check for
adding few more register checks in future.

Below are the sf speed runs with 'sf update' on whole flash, 16MiB.

=> sf update 0x100 0x0 0x100
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.564s, speed 289262 B/s

=> sf update 0x100 0x0 0x100
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 62.549s, speed 275036 B/s

=> sf update 0x100 0x0 0x100
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 61.276s, speed 284359 B/s

Signed-off-by: Jagan Teki 
Cc: Simon Glass 
Cc: Marek Vasut 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Stefan Roese 
Cc: Tom Warren 
Cc: Tom Rini 
Tested-by: Jagan Teki 
Tested-by: Bin Meng 
---
Changes for v4:
- none
Changes for v3:
- Fixed comments from Marek
Changes for v2:
- none

 drivers/mtd/spi/sf_ops.c | 71 +---
 1 file changed, 13 insertions(+), 58 deletions(-)

diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 6e457ec..c820d48 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -139,72 +139,27 @@ static void spi_flash_dual_flash(struct spi_flash *flash, 
u32 *addr)
 }
 #endif
 
-static int spi_flash_poll_status(struct spi_slave *spi, unsigned long timeout,
-u8 cmd, u8 poll_bit)
-{
-   unsigned long timebase;
-   unsigned long flags = SPI_XFER_BEGIN;
-   int ret;
-   u8 status;
-   u8 check_status = 0x0;
-
-   if (cmd == CMD_FLAG_STATUS)
-   check_status = poll_bit;
-
-#ifdef CONFIG_SF_DUAL_FLASH
-   if (spi->flags & SPI_XFER_U_PAGE)
-   flags |= SPI_XFER_U_PAGE;
-#endif
-   ret = spi_xfer(spi, 8, , NULL, flags);
-   if (ret) {
-   debug("SF: fail to read %s status register\n",
- cmd == CMD_READ_STATUS ? "read" : "flag");
-   return ret;
-   }
-
-   timebase = get_timer(0);
-   do {
-   WATCHDOG_RESET();
-
-   ret = spi_xfer(spi, 8, NULL, , 0);
-   if (ret)
-   return -1;
-
-   if ((status & poll_bit) == check_status)
-   break;
-
-   } while (get_timer(timebase) < timeout);
-
-   spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
-
-   if ((status & poll_bit) == check_status)
-   return 0;
-
-   /* Timed out */
-   debug("SF: time out!\n");
-   return -1;
-}
-
 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 {
-   struct spi_slave *spi = flash->spi;
-   int ret;
-   u8 poll_bit = STATUS_WIP;
-   u8 cmd = CMD_READ_STATUS;
+   u8 sr;
+   int timebase, ret;
 
-   ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
-   if (ret < 0)
-   return ret;
+   timebase = get_timer(0);
 
-   if (flash->poll_cmd == CMD_FLAG_STATUS) {
-   poll_bit = STATUS_PEC;
-   cmd = CMD_FLAG_STATUS;
-   ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
+   while (get_timer(timebase) < timeout) {
+   ret = spi_flash_cmd_read_status(flash, );
if (ret < 0)
return ret;
+
+   if (!(sr & STATUS_WIP))
+   return 0;
+   else
+   break;
}
 
-   return 0;
+   printf("SF: Timeout!\n");
+
+   return -ETIMEDOUT;
 }
 
 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
-- 
1.9.1

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[U-Boot] [PATCH v4 08/21] sf: spi_flash_validate_params => spi_flash_scan

[Jagan Teki]

Rename spi_flash_validate_params to spi_flash_scan as this
code not only deals with params setup but also configure
all spi_flash attributes. And also moved all flash related
code into spi_flash_scan for future functionality addition.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_probe.c | 145 +++--
 1 file changed, 75 insertions(+), 70 deletions(-)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index f591ab1..a150263 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -130,13 +130,42 @@ bank_end:
 }
 #endif
 
-static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
+{
+   fdt_addr_t addr;
+   fdt_size_t size;
+   int node;
+
+   /* If there is no node, do nothing */
+   node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
+   if (node < 0)
+   return 0;
+
+   addr = fdtdec_get_addr_size(blob, node, "memory-map", );
+   if (addr == FDT_ADDR_T_NONE) {
+   debug("%s: Cannot decode address\n", __func__);
+   return 0;
+   }
+
+   if (flash->size != size) {
+   debug("%s: Memory map must cover entire device\n", __func__);
+   return -1;
+   }
+   flash->memory_map = map_sysmem(addr, size);
+
+   return 0;
+}
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
+
+static int spi_flash_scan(struct spi_slave *spi, u8 *idcode,
 struct spi_flash *flash)
 {
const struct spi_flash_params *params;
u8 cmd;
u16 jedec = idcode[1] << 8 | idcode[2];
u16 ext_jedec = idcode[3] << 8 | idcode[4];
+   int ret;
 
/* Validate params from spi_flash_params table */
params = spi_flash_params_table;
@@ -158,6 +187,13 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
return -EPROTONOSUPPORT;
}
 
+   /* Flash powers up read-only, so clear BP# bits */
+#if defined(CONFIG_SPI_FLASH_ATMEL) || \
+   defined(CONFIG_SPI_FLASH_MACRONIX) || \
+   defined(CONFIG_SPI_FLASH_SST)
+   spi_flash_cmd_write_status(flash, 0);
+#endif
+
/* Assign spi data */
flash->spi = spi;
flash->name = params->name;
@@ -238,6 +274,17 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
/* Go for default supported write cmd */
flash->write_cmd = CMD_PAGE_PROGRAM;
 
+   /* Set the quad enable bit - only for quad commands */
+   if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
+   (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
+   (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
+   ret = spi_flash_set_qeb(flash, idcode[0]);
+   if (ret) {
+   debug("SF: Fail to set QEB for %02x\n", idcode[0]);
+   return -EINVAL;
+   }
+   }
+
/* Read dummy_byte: dummy byte is determined based on the
 * dummy cycles of a particular command.
 * Fast commands - dummy_byte = dummy_cycles/8
@@ -264,48 +311,41 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
 
/* Configure the BAR - discover bank cmds and read current bank */
 #ifdef CONFIG_SPI_FLASH_BAR
-   int ret = spi_flash_read_bank(flash, idcode[0]);
+   ret = spi_flash_read_bank(flash, idcode[0]);
if (ret < 0)
return ret;
 #endif
 
-   /* Flash powers up read-only, so clear BP# bits */
-#if defined(CONFIG_SPI_FLASH_ATMEL) || \
-   defined(CONFIG_SPI_FLASH_MACRONIX) || \
-   defined(CONFIG_SPI_FLASH_SST)
-   spi_flash_cmd_write_status(flash, 0);
-#endif
-
-   return 0;
-}
-
 #if CONFIG_IS_ENABLED(OF_CONTROL)
-int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
-{
-   fdt_addr_t addr;
-   fdt_size_t size;
-   int node;
-
-   /* If there is no node, do nothing */
-   node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
-   if (node < 0)
-   return 0;
-
-   addr = fdtdec_get_addr_size(blob, node, "memory-map", );
-   if (addr == FDT_ADDR_T_NONE) {
-   debug("%s: Cannot decode address\n", __func__);
-   return 0;
+   ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
+   if (ret) {
+   debug("SF: FDT decode error\n");
+   return -EINVAL;
}
+#endif
 
-   if (flash->size != size) {
-   debug("%s: Memory map must cover entire device\n", __func__);
-   return -1;
+#ifndef CONFIG_SPL_BUILD
+   printf("SF: Detected %s with page size ", flash->name);
+   print_size(flash->page_size, ", erase size ");
+   print_size(flash->erase_size, 

[U-Boot] [PATCH v4 07/21] sf: Add FSR support to spi_flash_cmd_wait_ready

[Jagan Teki]

This patch adds flag status register reading support to
spi_flash_cmd_wait_ready.

Signed-off-by: Jagan Teki 
Cc: Simon Glass 
Cc: Marek Vasut 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Stefan Roese 
Cc: Tom Warren 
Cc: Tom Rini 
Cc: Hou Zhiqiang 
Tested-by: Jagan Teki 
Tested-by: Bin Meng 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_internal.h |  1 +
 drivers/mtd/spi/sf_ops.c  | 64 +++
 drivers/mtd/spi/sf_probe.c|  4 +--
 include/spi_flash.h   |  2 --
 4 files changed, 60 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 53998fc..8a3e5ec 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -53,6 +53,7 @@ enum {
 
 enum spi_nor_option_flags {
SNOR_F_SST_WR   = (1 << 0),
+   SNOR_F_USE_FSR  = (1 << 1),
 };
 
 #define SPI_FLASH_3B_ADDR_LEN  3
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index c820d48..f2a9244 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -41,6 +41,20 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 
*rs)
return 0;
 }
 
+static int read_fsr(struct spi_flash *flash, u8 *fsr)
+{
+   int ret;
+   const u8 cmd = CMD_FLAG_STATUS;
+
+   ret = spi_flash_read_common(flash, , 1, fsr, 1);
+   if (ret < 0) {
+   debug("SF: fail to read flag status register\n");
+   return ret;
+   }
+
+   return 0;
+}
+
 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
 {
u8 cmd;
@@ -139,22 +153,60 @@ static void spi_flash_dual_flash(struct spi_flash *flash, 
u32 *addr)
 }
 #endif
 
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
+static int spi_flash_sr_ready(struct spi_flash *flash)
 {
u8 sr;
+   int ret;
+
+   ret = spi_flash_cmd_read_status(flash, );
+   if (ret < 0)
+   return ret;
+
+   return !(sr & STATUS_WIP);
+}
+
+static int spi_flash_fsr_ready(struct spi_flash *flash)
+{
+   u8 fsr;
+   int ret;
+
+   ret = read_fsr(flash, );
+   if (ret < 0)
+   return ret;
+
+   return fsr & STATUS_PEC;
+}
+
+static int spi_flash_ready(struct spi_flash *flash)
+{
+   int sr, fsr;
+
+   sr = spi_flash_sr_ready(flash);
+   if (sr < 0)
+   return sr;
+
+   fsr = 1;
+   if (flash->flags & SNOR_F_USE_FSR) {
+   fsr = spi_flash_fsr_ready(flash);
+   if (fsr < 0)
+   return fsr;
+   }
+
+   return sr && fsr;
+}
+
+int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
+{
int timebase, ret;
 
timebase = get_timer(0);
 
while (get_timer(timebase) < timeout) {
-   ret = spi_flash_cmd_read_status(flash, );
+   ret = spi_flash_ready(flash);
if (ret < 0)
return ret;
-
-   if (!(sr & STATUS_WIP))
+   if (ret)
return 0;
-   else
-   break;
}
 
printf("SF: Timeout!\n");
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 2634e90..f591ab1 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -257,11 +257,9 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
flash->dummy_byte = 1;
}
 
-   /* Poll cmd selection */
-   flash->poll_cmd = CMD_READ_STATUS;
 #ifdef CONFIG_SPI_FLASH_STMICRO
if (params->flags & E_FSR)
-   flash->poll_cmd = CMD_FLAG_STATUS;
+   flash->flags |= SNOR_F_USE_FSR;
 #endif
 
/* Configure the BAR - discover bank cmds and read current bank */
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 8d85468..4312d3d 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -49,7 +49,6 @@ struct spi_slave;
  * @bank_read_cmd: Bank read cmd
  * @bank_write_cmd:Bank write cmd
  * @bank_curr: Current flash bank
- * @poll_cmd:  Poll cmd - for flash erase/program
  * @erase_cmd: Erase cmd 4K, 32K, 64K
  * @read_cmd:  Read cmd - Array Fast, Extn read and quad read.
  * @write_cmd: Write cmd - page and quad program.
@@ -82,7 +81,6 @@ struct spi_flash {
u8 bank_write_cmd;
u8 bank_curr;
 #endif
-   u8 poll_cmd;
u8 erase_cmd;
u8 read_cmd;
u8 write_cmd;
-- 
1.9.1

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[U-Boot] [PATCH] T104xD4RDB: Fix PHY address for PHY connected to FM1@DTSEC3

[Codrin Ciubotariu]

On T1040D4RDB board, u-boot fails to connect port FM1@DTSEC3 to
the Ethernet PHY because the wrong PHY address is used. Also,
T1040D4RDB supports SGMII on one port only.

Signed-off-by: Codrin Ciubotariu 
---
 include/configs/T104xRDB.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 5b61b56..e872507 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -742,7 +742,9 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
 #ifdef CONFIG_FMAN_ENET
 #if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
 #define CONFIG_SYS_SGMII1_PHY_ADDR 0x03
-#elif defined(CONFIG_T1040D4RDB) || defined(CONFIG_T1042D4RDB)
+#elif defined(CONFIG_T1040D4RDB)
+#define CONFIG_SYS_SGMII1_PHY_ADDR 0x01
+#elif defined(CONFIG_T1042D4RDB)
 #define CONFIG_SYS_SGMII1_PHY_ADDR 0x02
 #define CONFIG_SYS_SGMII2_PHY_ADDR 0x03
 #define CONFIG_SYS_SGMII3_PHY_ADDR 0x01
-- 
1.9.3

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Re: [U-Boot] ti: omap3: config: remove 1 from boolean define

[Tom Rini]

On Thu, Oct 08, 2015 at 09:12:25PM +0300, Igor Grinberg wrote:

> CONFIG_TWL4030_POWER is a boolean define variable. It is either defined
> or not defined and should not have a value assigned to it.
> Remove the value.
> 
> Signed-off-by: Igor Grinberg 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v4, 05/10] vexpress64: juno: add androidboot.hardware=juno

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:03PM +0100, Ryan Harkin wrote:

> Linaro's Juno Android builds requires the androidboot.hardware parameter
> be set to a know board name.
> 
> Non-Android kernels ignore this extra parameter because they don't
> contain code to parse it.
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v4, 03/10] vexpress64: increase max gunzip size

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:01PM +0100, Ryan Harkin wrote:

> vexpress64 kernels are usually over 8 MBytes in length, so setting the
> max uImage length to 64 Mbytes should give us plenty of scope for
> expansion.
> 
> I mostly chose this length to match other board configs that use
> "(64 << 20)".
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v4, 06/10] common/armflash: add command to check if image exists

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:04PM +0100, Ryan Harkin wrote:

> Add a command to the ARM flash support to check if an image exists or
> not.
> 
> If the image is found, it will return CMD_RET_SUCCESS, else
> CMD_RET_FAILURE.  This allows hush scripts to conditionally load images.
> 
> A simple example:
> 
> if afs exists ${kernel_name}; then echo found; else echo \
> not found; fi
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v4, 09/10] vexpress64: juno: add alternate kernel and device tree filenames

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:07PM +0100, Ryan Harkin wrote:

> The latest Juno firmware stores the files in NOR flash as "norkern" for
> kernel binary, "board.dtb" for the device tree binary.
> 
> The "old" firmware used the name "Image" for the kernel binary and
> "juno" for the device tree binary.
> 
> Rather than just change the default U-Boot configuration to use the new
> names, breaking users with the old firmware, attempt to load the default
> filename first.  If that fails, attempt to load the alternate filename.
> 
> I've echo'd that we are loading the alternate file to counter the
> output from "afs load" shown if the first load attempt fails.  For
> example, I see output like this on my Juno board when it's configured
> the with the "old" firmware:
> 
> image "norkern" not found in flash
> Loading Image instead of norkern
> loaded region 0 from 0850 to 8000, 00AB6318 bytes
> image "board.dtb" not found in flash
> Loading juno instead of board.dtb
> loaded region 0 from 0A00 to 8300, 3188 bytes
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v4, 07/10] common/armflash: load_image returns success or failure

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:05PM +0100, Ryan Harkin wrote:

> Change the load_image so that it returns success or failure of the
> command (using CMD_RET_SUCCESS or CMD_RET_FAILURE).
> 
> This way, hush scripts can optionally load different files depending
> upon the system configuration.
> 
> A simple example:
> 
> if afs load ${kernel_name} ${kernel_addr}; then echo loaded; else echo \
> not loaded; fi
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH v4 21/21] dm-sf: Re-factorize spi_flash_std_probe code

[Jagan Teki]

spi_flash_probe_tail code looks not in proper shape to
add more functionalities. hence refactorized so-that it's
more readable and hence we may extend more functionalies to it.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_probe.c | 22 ++
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 319b7e6..87ac33e 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -123,15 +123,12 @@ int spi_flash_std_erase(struct udevice *dev, u32 offset, 
size_t len)
 
 int spi_flash_std_probe(struct udevice *dev)
 {
-   struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
+   struct spi_flash *flash = dev_get_uclass_priv(dev);
struct spi_slave *slave = dev_get_parentdata(dev);
-   struct spi_flash *flash;
int ret;
 
-   debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
-
-   flash = dev_get_uclass_priv(dev);
flash->dev = dev;
+   flash->spi = slave;
 
/* Claim spi bus */
ret = spi_claim_bus(slave);
@@ -140,17 +137,26 @@ int spi_flash_std_probe(struct udevice *dev)
return ret;
}
 
-   ret = spi_flash_scan(slave, flash);
+   ret = spi_flash_scan(flash);
if (ret) {
ret = -EINVAL;
-   goto err_read_id;
+   goto err_scan;
}
 
 #ifdef CONFIG_SPI_FLASH_MTD
ret = spi_flash_mtd_register(flash);
+   if (ret) {
+   printf("SF: failed to register mtd device: %d\n", ret);
+   goto err_mtd;
+   }
 #endif
+   return ret;
 
-err_read_id:
+#ifdef CONFIG_SPI_FLASH_MTD
+err_mtd:
+   spi_free_slave(slave);
+#endif
+err_scan:
spi_release_bus(slave);
return ret;
 }
-- 
1.9.1

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[U-Boot] [PATCH v4 01/21] spi: zynq_spi: Remove unneeded headers

[Jagan Teki]

- Removed unneeded inclusion of header files
- Add "Xilinx" on license text

Signed-off-by: Jagan Teki 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
---
Changes for v4, v3, v2:
- none

 drivers/spi/zynq_spi.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 65a9633..33a13bf 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2013 Inc.
+ * (C) Copyright 2013 Xilinx, Inc.
  * (C) Copyright 2015 Jagan Teki 
  *
  * Xilinx Zynq PS SPI controller driver (master mode only)
@@ -7,15 +7,11 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 
-#include 
 #include 
 #include 
-#include 
 #include 
 #include 
-#include 
 #include 
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-- 
1.9.1

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Re: [U-Boot] [U-Boot, 2/3] ppc4xx: Convert lwmon5 board to generic board

[Tom Rini]

On Fri, Oct 02, 2015 at 08:20:36AM +0200, Stefan Roese wrote:

> Add CONFIG_SYS_GENERIC_BOARD to lwmon5.h and CONFIG_DISPLAY_BOARDINFO
> to Kconfig file.
> 
> Signed-off-by: Stefan Roese 
> Cc: Masahiro Yamada 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,3/3] ppc4xx: Remove lcd4_lwmon5 support

[Tom Rini]

On Fri, Oct 02, 2015 at 08:20:37AM +0200, Stefan Roese wrote:

> This platform has not gone into production. So lets remove it.
> 
> Signed-off-by: Stefan Roese 
> Cc: Masahiro Yamada 

Applied to u-boot/master, thanks!

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Re: [U-Boot] image: fix support for Android boot images with no ramdisk

[Tom Rini]

On Mon, Oct 05, 2015 at 02:37:07PM -0500, Rob Herring wrote:

> If an Android boot image does not contain a ramdisk, make sure rd_len
> and rd_data are returned to indicate no ramdisk rather than just relying
> on returning an error.
> 
> Signed-off-by: Rob Herring 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use malloc_cache_aligned

[Marek Vasut]

On Monday, October 12, 2015 at 02:55:03 PM, Thomas Chou wrote:
> Hi Marek,

Hi Thomas,

> On 10/12/2015 06:32 PM, Marek Vasut wrote:
> > Wouldn't invalidate_dcache_range() be enough here ? You don't care about
> > the data in the newly allocated area at this point I guess -- either you
> > fill them in and then flush, for DMA from CPU to device OR you receive
> > data from device to CPU and then you invalidate this buffer again.
> 
> No. We cannot use invalidate cache here. This is related to cache design
> of nios2, kind of direct mapped cache.

Can you please expand on this ?

btw. I was thinking about this whole cache situation. Please don't get me wrong,
my intention is not to put way more work unto you and/or grind you about minor
details. I hope it doesn't look that way to you.

Best regards,
Marek Vasut
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[U-Boot] [PATCH v4 20/21] sf: Re-factorize spi_flash_probe_tail code

[Jagan Teki]

spi_flash_probe_tail code looks not in proper shape to
add more functionalities. hence refactorized so-that it's
more readable and hence we may extend more functionalies to it.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_internal.h |  3 +-
 drivers/mtd/spi/sf_ops.c  |  7 ++---
 drivers/mtd/spi/sf_probe.c| 72 +--
 3 files changed, 33 insertions(+), 49 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 2873402..d74bc18 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -198,7 +198,6 @@ void spi_flash_mtd_unregister(void);
 
 /**
  * spi_flash_scan - scan the SPI FLASH
- * @spi:   the spi slave structure
  * @flash: the spi flash structure
  *
  * The drivers can use this fuction to scan the SPI FLASH.
@@ -207,6 +206,6 @@ void spi_flash_mtd_unregister(void);
  *
  * Return: 0 for success, others for failure.
  */
-int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash);
+int spi_flash_scan(struct spi_flash *flash);
 
 #endif /* _SF_INTERNAL_H_ */
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index d3e8a83..703099f 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -703,7 +703,7 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash 
*flash)
 }
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
-int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash)
+int spi_flash_scan(struct spi_flash *flash)
 {
const struct spi_flash_params *params;
u16 jedec, ext_jedec;
@@ -712,7 +712,7 @@ int spi_flash_scan(struct spi_slave *spi, struct spi_flash 
*flash)
int ret;
 
/* Read the ID codes */
-   ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+   ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode, sizeof(idcode));
if (ret) {
printf("SF: Failed to get idcodes\n");
return -EINVAL;
@@ -753,9 +753,8 @@ int spi_flash_scan(struct spi_slave *spi, struct spi_flash 
*flash)
write_sr(flash, 0);
 
/* Assign spi data */
-   flash->spi = spi;
flash->name = params->name;
-   flash->memory_map = spi->memory_map;
+   flash->memory_map = flash->spi->memory_map;
flash->dual_flash = flash->spi->option;
 
/* Assign spi_flash ops */
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 6ce82a7..319b7e6 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -17,49 +17,11 @@
 
 #include "sf_internal.h"
 
-/**
- * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
- *
- * @spi: Bus to probe
- * @flashp: Pointer to place to put flash info, which may be NULL if the
- * space should be allocated
- */
-int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
-{
-   int ret;
-
-   /* Setup spi_slave */
-   if (!spi) {
-   printf("SF: Failed to set up slave\n");
-   return -ENODEV;
-   }
-
-   /* Claim spi bus */
-   ret = spi_claim_bus(spi);
-   if (ret) {
-   debug("SF: Failed to claim SPI bus: %d\n", ret);
-   return ret;
-   }
-
-   ret = spi_flash_scan(spi, flash);
-   if (ret) {
-   ret = -EINVAL;
-   goto err_read_id;
-   }
-
-#ifdef CONFIG_SPI_FLASH_MTD
-   ret = spi_flash_mtd_register(flash);
-#endif
-
-err_read_id:
-   spi_release_bus(spi);
-   return ret;
-}
-
 #ifndef CONFIG_DM_SPI_FLASH
 struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
 {
struct spi_flash *flash;
+   int ret;
 
/* Allocate space if needed (not used by sf-uclass */
flash = calloc(1, sizeof(*flash));
@@ -68,13 +30,37 @@ struct spi_flash *spi_flash_probe_tail(struct spi_slave 
*bus)
return NULL;
}
 
-   if (spi_flash_probe_slave(bus, flash)) {
-   spi_free_slave(bus);
-   free(flash);
-   return NULL;
+   flash->spi = bus;
+
+   /* Claim spi bus */
+   ret = spi_claim_bus(bus);
+   if (ret) {
+   debug("SF: Failed to claim SPI bus: %d\n", ret);
+   goto err_claim;
}
 
+   ret = spi_flash_scan(flash);
+   if (ret)
+   goto err_scan;
+
+#ifdef CONFIG_SPI_FLASH_MTD
+   ret = spi_flash_mtd_register(flash);
+   if (ret) {
+   printf("SF: failed to register mtd device: %d\n", ret);
+   goto err_mtd;
+   }
+#endif
return flash;
+
+#ifdef CONFIG_SPI_FLASH_MTD
+err_mtd:
+   spi_free_slave(bus);
+#endif
+err_scan:
+   spi_release_bus(bus);
+err_claim:
+   free(flash);
+   return NULL;
 }
 
 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
-- 
1.9.1

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[U-Boot] [PATCH v4 18/21] sf: Remove unneeded header includes

[Jagan Teki]

Removed unneeded header includes in sf_ops and sf_probe.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_ops.c   | 2 --
 drivers/mtd/spi/sf_probe.c | 3 ---
 2 files changed, 5 deletions(-)

diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index e04f8aa..d3e8a83 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -14,8 +14,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 
 #include "sf_internal.h"
 
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index e2dac7e..cfc696f 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -11,12 +11,9 @@
 #include 
 #include 
 #include 
-#include 
 #include 
-#include 
 #include 
 #include 
-#include 
 
 #include "sf_internal.h"
 
-- 
1.9.1

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[U-Boot] [PATCH v4 04/21] sf: Optimize BAR write code

[Jagan Teki]

Optimized spi-flash bar writing code and also removed
unnecessary bank_sel in read_ops.

Signed-off-by: Jagan Teki 
Cc: Simon Glass 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_ops.c | 41 +
 1 file changed, 13 insertions(+), 28 deletions(-)

diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index b33fe5a..6e457ec 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -95,15 +95,14 @@ int spi_flash_cmd_write_config(struct spi_flash *flash, u8 
wc)
 #endif
 
 #ifdef CONFIG_SPI_FLASH_BAR
-static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
+static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
 {
-   u8 cmd;
+   u8 cmd, bank_sel;
int ret;
 
-   if (flash->bank_curr == bank_sel) {
-   debug("SF: not require to enable bank%d\n", bank_sel);
-   return bank_sel;
-   }
+   bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
+   if (bank_sel == flash->bank_curr)
+   goto bar_end;
 
cmd = flash->bank_write_cmd;
ret = spi_flash_write_common(flash, , 1, _sel, 1);
@@ -111,25 +110,10 @@ static int spi_flash_cmd_bankaddr_write(struct spi_flash 
*flash, u8 bank_sel)
debug("SF: fail to write bank register\n");
return ret;
}
-   flash->bank_curr = bank_sel;
-
-   return 0;
-}
-
-static int spi_flash_bank(struct spi_flash *flash, u32 offset)
-{
-   u8 bank_sel;
-   int ret;
-
-   bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
-
-   ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
-   if (ret) {
-   debug("SF: fail to set bank%d\n", bank_sel);
-   return ret;
-   }
 
-   return bank_sel;
+bar_end:
+   flash->bank_curr = bank_sel;
+   return flash->bank_curr;
 }
 #endif
 
@@ -285,7 +269,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 
offset, size_t len)
spi_flash_dual_flash(flash, _addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-   ret = spi_flash_bank(flash, erase_addr);
+   ret = spi_flash_write_bank(flash, erase_addr);
if (ret < 0)
return ret;
 #endif
@@ -327,7 +311,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 
offset,
spi_flash_dual_flash(flash, _addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-   ret = spi_flash_bank(flash, write_addr);
+   ret = spi_flash_write_bank(flash, write_addr);
if (ret < 0)
return ret;
 #endif
@@ -422,9 +406,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 
offset,
spi_flash_dual_flash(flash, _addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-   bank_sel = spi_flash_bank(flash, read_addr);
-   if (bank_sel < 0)
+   ret = spi_flash_write_bank(flash, read_addr);
+   if (ret < 0)
return ret;
+   bank_sel = flash->bank_curr;
 #endif
remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
(bank_sel + 1)) - offset;
-- 
1.9.1

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[U-Boot] [PATCH v4 16/21] sf: Flash power up read-only based on idcode0

[Jagan Teki]

Using macro's for flash power up read-only access code leads
wrong behaviour hence use idcode0 for runtime detection, hence
the flash which require this functionality gets detected at runtime.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_internal.h | 2 ++
 drivers/mtd/spi/sf_ops.c  | 7 +++
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 8ef88f4..39749c2 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -64,7 +64,9 @@ enum spi_nor_option_flags {
 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
 #define SPI_FLASH_CFI_MFR_STMICRO  0x20
 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
+#define SPI_FLASH_CFI_MFR_SST  0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND  0xef
+#define SPI_FLASH_CFI_MFR_ATMEL0x1f
 
 /* Erase commands */
 #define CMD_ERASE_4K   0x20
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index f63ce7a..f90f041 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -748,11 +748,10 @@ int spi_flash_scan(struct spi_slave *spi, struct 
spi_flash *flash)
}
 
/* Flash powers up read-only, so clear BP# bits */
-#if defined(CONFIG_SPI_FLASH_ATMEL) || \
-   defined(CONFIG_SPI_FLASH_MACRONIX) || \
-   defined(CONFIG_SPI_FLASH_SST)
+   if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
+   idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
+   idcode[0] == SPI_FLASH_CFI_MFR_SST)
write_sr(flash, 0);
-#endif
 
/* Assign spi data */
flash->spi = spi;
-- 
1.9.1

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[U-Boot] [PATCH v4 19/21] sf: probe: Use spi_flash_scan in dm-spi-flash

[Jagan Teki]

This patch add support to use spi_flash_scan in
dm-spi-flash probe, so-that it can access the spi_flash
functionalities same as non-dm sf probe.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_probe.c | 28 +---
 1 file changed, 25 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index cfc696f..6ce82a7 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -137,14 +137,36 @@ int spi_flash_std_erase(struct udevice *dev, u32 offset, 
size_t len)
 
 int spi_flash_std_probe(struct udevice *dev)
 {
-   struct spi_slave *slave = dev_get_parentdata(dev);
struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
+   struct spi_slave *slave = dev_get_parentdata(dev);
struct spi_flash *flash;
+   int ret;
+
+   debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
 
flash = dev_get_uclass_priv(dev);
flash->dev = dev;
-   debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
-   return spi_flash_probe_slave(slave, flash);
+
+   /* Claim spi bus */
+   ret = spi_claim_bus(slave);
+   if (ret) {
+   debug("SF: Failed to claim SPI bus: %d\n", ret);
+   return ret;
+   }
+
+   ret = spi_flash_scan(slave, flash);
+   if (ret) {
+   ret = -EINVAL;
+   goto err_read_id;
+   }
+
+#ifdef CONFIG_SPI_FLASH_MTD
+   ret = spi_flash_mtd_register(flash);
+#endif
+
+err_read_id:
+   spi_release_bus(slave);
+   return ret;
 }
 
 static const struct dm_spi_flash_ops spi_flash_std_ops = {
-- 
1.9.1

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[U-Boot] [PATCH v4 13/21] sf: Fix Makefile

[Jagan Teki]

This patch removes unneeded ifdef and fixed accordingly.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/Makefile | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index ff48b25..66c4424 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -12,11 +12,7 @@ obj-$(CONFIG_SPL_SPI_LOAD)   += spi_spl_load.o
 obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
 endif
 
-#ifndef CONFIG_DM_SPI
-obj-$(CONFIG_SPI_FLASH) += sf_probe.o
-#endif
-obj-$(CONFIG_CMD_SF) += sf.o
-obj-$(CONFIG_SPI_FLASH) += sf_ops.o sf_params.o
+obj-$(CONFIG_SPI_FLASH) += sf_probe.o sf_ops.o sf_params.o sf.o
 obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o
 obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o
 obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
-- 
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[U-Boot] [PATCH v4 14/21] sf: Use simple name for register access functions

[Jagan Teki]

Most of the register access function are static, so used
simple name to represent each.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_ops.c | 42 +-
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index af94c0b..97e644d 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -39,7 +39,7 @@ static u8 spi_read_cmds_array[] = {
CMD_READ_QUAD_IO_FAST,
 };
 
-static int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
+static int read_sr(struct spi_flash *flash, u8 *rs)
 {
int ret;
u8 cmd;
@@ -68,7 +68,7 @@ static int read_fsr(struct spi_flash *flash, u8 *fsr)
return 0;
 }
 
-static int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
+static int write_sr(struct spi_flash *flash, u8 ws)
 {
u8 cmd;
int ret;
@@ -84,7 +84,7 @@ static int spi_flash_cmd_write_status(struct spi_flash 
*flash, u8 ws)
 }
 
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
-static int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
+static int read_cr(struct spi_flash *flash, u8 *rc)
 {
int ret;
u8 cmd;
@@ -99,13 +99,13 @@ static int spi_flash_cmd_read_config(struct spi_flash 
*flash, u8 *rc)
return 0;
 }
 
-static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
+static int write_cr(struct spi_flash *flash, u8 wc)
 {
u8 data[2];
u8 cmd;
int ret;
 
-   ret = spi_flash_cmd_read_status(flash, [0]);
+   ret = read_sr(flash, [0]);
if (ret < 0)
return ret;
 
@@ -122,7 +122,7 @@ static int spi_flash_cmd_write_config(struct spi_flash 
*flash, u8 wc)
 #endif
 
 #ifdef CONFIG_SPI_FLASH_BAR
-static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
+static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
 {
u8 cmd, bank_sel;
int ret;
@@ -143,7 +143,7 @@ bar_end:
return flash->bank_curr;
 }
 
-static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
+static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
 {
u8 curr_bank = 0;
int ret;
@@ -174,7 +174,7 @@ bank_end:
 #endif
 
 #ifdef CONFIG_SF_DUAL_FLASH
-static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
+static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
 {
switch (flash->dual_flash) {
case SF_DUAL_STACKED_FLASH:
@@ -200,7 +200,7 @@ static int spi_flash_sr_ready(struct spi_flash *flash)
u8 sr;
int ret;
 
-   ret = spi_flash_cmd_read_status(flash, );
+   ret = read_sr(flash, );
if (ret < 0)
return ret;
 
@@ -316,10 +316,10 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 
offset, size_t len)
 
 #ifdef CONFIG_SF_DUAL_FLASH
if (flash->dual_flash > SF_SINGLE_FLASH)
-   spi_flash_dual_flash(flash, _addr);
+   spi_flash_dual(flash, _addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-   ret = spi_flash_write_bank(flash, erase_addr);
+   ret = spi_flash_write_bar(flash, erase_addr);
if (ret < 0)
return ret;
 #endif
@@ -358,10 +358,10 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 
offset,
 
 #ifdef CONFIG_SF_DUAL_FLASH
if (flash->dual_flash > SF_SINGLE_FLASH)
-   spi_flash_dual_flash(flash, _addr);
+   spi_flash_dual(flash, _addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-   ret = spi_flash_write_bank(flash, write_addr);
+   ret = spi_flash_write_bar(flash, write_addr);
if (ret < 0)
return ret;
 #endif
@@ -453,10 +453,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 
offset,
 
 #ifdef CONFIG_SF_DUAL_FLASH
if (flash->dual_flash > SF_SINGLE_FLASH)
-   spi_flash_dual_flash(flash, _addr);
+   spi_flash_dual(flash, _addr);
 #endif
 #ifdef CONFIG_SPI_FLASH_BAR
-   ret = spi_flash_write_bank(flash, read_addr);
+   ret = spi_flash_write_bar(flash, read_addr);
if (ret < 0)
return ret;
bank_sel = flash->bank_curr;
@@ -615,14 +615,14 @@ static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
u8 qeb_status;
int ret;
 
-   ret = spi_flash_cmd_read_status(flash, _status);
+   ret = read_sr(flash, _status);
if (ret < 0)
return ret;
 
if (qeb_status & STATUS_QEB_MXIC) {
debug("SF: mxic: QEB is already set\n");
} else {
-   ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
+   ret = write_sr(flash, STATUS_QEB_MXIC);
if (ret < 0)
  

[U-Boot] [PATCH v4 10/21] sf: Move the read_id code to sf_ops

[Jagan Teki]

read_id code is related to spi_flash stuff hence moved to sf_ops.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_internal.h |  3 +--
 drivers/mtd/spi/sf_ops.c  | 21 ++---
 drivers/mtd/spi/sf_probe.c| 15 +--
 3 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 3f07560..8216fdc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -235,7 +235,6 @@ void spi_flash_mtd_unregister(void);
 /**
  * spi_flash_scan - scan the SPI FLASH
  * @spi:   the spi slave structure
- * @idcode:idcode of spi flash
  * @flash: the spi flash structure
  *
  * The drivers can use this fuction to scan the SPI FLASH.
@@ -244,6 +243,6 @@ void spi_flash_mtd_unregister(void);
  *
  * Return: 0 for success, others for failure.
  */
-int spi_flash_scan(struct spi_slave *spi, u8 *idcode, struct spi_flash *flash);
+int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash);
 
 #endif /* _SF_INTERNAL_H_ */
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index d37b0a9..016a5df 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -706,14 +706,29 @@ int spi_flash_decode_fdt(const void *blob, struct 
spi_flash *flash)
 }
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
-int spi_flash_scan(struct spi_slave *spi, u8 *idcode, struct spi_flash *flash)
+int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash)
 {
const struct spi_flash_params *params;
+   u16 jedec, ext_jedec;
+   u8 idcode[5];
u8 cmd;
-   u16 jedec = idcode[1] << 8 | idcode[2];
-   u16 ext_jedec = idcode[3] << 8 | idcode[4];
int ret;
 
+   /* Read the ID codes */
+   ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+   if (ret) {
+   printf("SF: Failed to get idcodes\n");
+   return -EINVAL;
+   }
+
+#ifdef DEBUG
+   printf("SF: Got idcodes\n");
+   print_buffer(0, idcode, 1, sizeof(idcode), 0);
+#endif
+
+   jedec = idcode[1] << 8 | idcode[2];
+   ext_jedec = idcode[3] << 8 | idcode[4];
+
/* Validate params from spi_flash_params table */
params = spi_flash_params_table;
for (; params->name != NULL; params++) {
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index d2991de..a712792 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -29,7 +29,6 @@
  */
 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
 {
-   u8 idcode[5];
int ret;
 
/* Setup spi_slave */
@@ -45,19 +44,7 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct 
spi_flash *flash)
return ret;
}
 
-   /* Read the ID codes */
-   ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
-   if (ret) {
-   printf("SF: Failed to get idcodes\n");
-   goto err_read_id;
-   }
-
-#ifdef DEBUG
-   printf("SF: Got idcodes\n");
-   print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
-
-   ret = spi_flash_scan(spi, idcode, flash);
+   ret = spi_flash_scan(spi, flash);
if (ret) {
ret = -EINVAL;
goto err_read_id;
-- 
1.9.1

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[U-Boot] [PATCH v4 12/21] sf: Use static for file-scope functions

[Jagan Teki]

Use static for file-scope functions and removed them from
header files.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_internal.h | 18 --
 drivers/mtd/spi/sf_ops.c  | 11 ++-
 2 files changed, 6 insertions(+), 23 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 8216fdc..8ef88f4 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -167,18 +167,6 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 
*cmd, size_t cmd_len,
 /* Flash erase(sectors) operation, support all possible erase commands */
 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
 
-/* Read the status register */
-int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
-
-/* Program the status register */
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
-
-/* Read the config register */
-int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
-
-/* Program the config register */
-int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
-
 /* Enable writing on the SPI flash */
 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
 {
@@ -192,12 +180,6 @@ static inline int spi_flash_cmd_write_disable(struct 
spi_flash *flash)
 }
 
 /*
- * Send the read status command to the device and wait for the wip
- * (write-in-progress) bit to clear itself.
- */
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
-
-/*
  * Used for spi_flash write operation
  * - SPI claim
  * - spi_flash_cmd_write_enable
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index e20a3d6..af94c0b 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -39,7 +39,7 @@ static u8 spi_read_cmds_array[] = {
CMD_READ_QUAD_IO_FAST,
 };
 
-int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
+static int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
 {
int ret;
u8 cmd;
@@ -68,7 +68,7 @@ static int read_fsr(struct spi_flash *flash, u8 *fsr)
return 0;
 }
 
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
+static int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
 {
u8 cmd;
int ret;
@@ -84,7 +84,7 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
 }
 
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
-int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
+static int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
 {
int ret;
u8 cmd;
@@ -99,7 +99,7 @@ int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
return 0;
 }
 
-int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
+static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
 {
u8 data[2];
u8 cmd;
@@ -237,7 +237,8 @@ static int spi_flash_ready(struct spi_flash *flash)
return sr && fsr;
 }
 
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
+static int spi_flash_cmd_wait_ready(struct spi_flash *flash,
+   unsigned long timeout)
 {
int timebase, ret;
 
-- 
1.9.1

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Re: [U-Boot] [PATCH] part:efi: add GUID for linux file system data

[Tom Rini]

On Mon, Oct 12, 2015 at 05:03:15PM +0200, Patrick Delaunay wrote:

> Signed-off-by: Patrick Delaunay 
> ---
> 
> see https://en.wikipedia.org/wiki/GUID_Partition_Table#Partition_type_GUIDs
> 
> nota 9 :
> Previously, Linux used the same GUID for the data partitions as Windows
> (Basic data partition: EBD0A0A2-B9E5-4433-87C0-68B6B72699C7).
> Linux never had a separate unique partition type GUID defined for its
> data partitions.
> This created problems when dual-booting Linux and Windows in UEFI-GPT
> setup.
> The new GUID (Linux filesystem data: 0FC63DAF-8483-4772-8E79-3D69D8477DE4)
> was defined jointly by GPT fdisk and GNU Parted developers.
> It is identified as type code 0x8300 in GPT fdisk.
> (See definitions in gdisk's parttypes.cc)

Some of this should be in the main commit message, not the discarded
part.

>  include/part_efi.h | 3 +++
>  1 file changed, 3 insertions(+)

And without some changes to disk/part_efi.c I believe, this isn't used
anywhere so not actually changing behavior yet :)

-- 
Tom


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Re: [U-Boot] [U-Boot, 2/2] tools/mkimage.c: Clarify help text for -D slightly

[Tom Rini]

On Wed, Aug 26, 2015 at 03:21:23PM -0400, Tom Rini wrote:

> Try and make it clear that -D will replace all arguments passed to dtc
> and is not appending them.
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PATCH v4 02/21] sf: Return bank_sel, if flash->bank_curr == bank_sel

[Jagan Teki]

If computed bank_sel is same as flash->bank_curr which is
computed at probe time, then return the bank_sel instead of zero.

Signed-off-by: Jagan Teki 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_ops.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 900ec1f..b33fe5a 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -102,7 +102,7 @@ static int spi_flash_cmd_bankaddr_write(struct spi_flash 
*flash, u8 bank_sel)
 
if (flash->bank_curr == bank_sel) {
debug("SF: not require to enable bank%d\n", bank_sel);
-   return 0;
+   return bank_sel;
}
 
cmd = flash->bank_write_cmd;
-- 
1.9.1

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[U-Boot] [PATCH v4 09/21] sf: Move spi_flash_scan code to sf_ops

[Jagan Teki]

Intension is that sf_ops should deals all spi_flash related
stuff and sf_probe(which should renamed future) should be an
interface layer for spi_flash versus spi drivers.

sf_ops => spi_flash interface
sf_probe => interface layer vs spi_flash(sf_probe) to spi drivers

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_internal.h |  14 ++
 drivers/mtd/spi/sf_ops.c  | 328 ++
 drivers/mtd/spi/sf_probe.c| 327 -
 3 files changed, 342 insertions(+), 327 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 8a3e5ec..3f07560 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -232,4 +232,18 @@ int spi_flash_mtd_register(struct spi_flash *flash);
 void spi_flash_mtd_unregister(void);
 #endif
 
+/**
+ * spi_flash_scan - scan the SPI FLASH
+ * @spi:   the spi slave structure
+ * @idcode:idcode of spi flash
+ * @flash: the spi flash structure
+ *
+ * The drivers can use this fuction to scan the SPI FLASH.
+ * In the scanning, it will try to get all the necessary information to
+ * fill the spi_flash{}.
+ *
+ * Return: 0 for success, others for failure.
+ */
+int spi_flash_scan(struct spi_slave *spi, u8 *idcode, struct spi_flash *flash);
+
 #endif /* _SF_INTERNAL_H_ */
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index f2a9244..d37b0a9 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -18,6 +19,8 @@
 
 #include "sf_internal.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static void spi_flash_addr(u32 addr, u8 *cmd)
 {
/* cmd[0] is actual command */
@@ -565,3 +568,328 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, 
size_t len,
return ret;
 }
 #endif
+
+
+/* Read commands array */
+static u8 spi_read_cmds_array[] = {
+   CMD_READ_ARRAY_SLOW,
+   CMD_READ_ARRAY_FAST,
+   CMD_READ_DUAL_OUTPUT_FAST,
+   CMD_READ_DUAL_IO_FAST,
+   CMD_READ_QUAD_OUTPUT_FAST,
+   CMD_READ_QUAD_IO_FAST,
+};
+
+#ifdef CONFIG_SPI_FLASH_MACRONIX
+static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
+{
+   u8 qeb_status;
+   int ret;
+
+   ret = spi_flash_cmd_read_status(flash, _status);
+   if (ret < 0)
+   return ret;
+
+   if (qeb_status & STATUS_QEB_MXIC) {
+   debug("SF: mxic: QEB is already set\n");
+   } else {
+   ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
+   if (ret < 0)
+   return ret;
+   }
+
+   return ret;
+}
+#endif
+
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
+{
+   u8 qeb_status;
+   int ret;
+
+   ret = spi_flash_cmd_read_config(flash, _status);
+   if (ret < 0)
+   return ret;
+
+   if (qeb_status & STATUS_QEB_WINSPAN) {
+   debug("SF: winspan: QEB is already set\n");
+   } else {
+   ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
+   if (ret < 0)
+   return ret;
+   }
+
+   return ret;
+}
+#endif
+
+static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
+{
+   switch (idcode0) {
+#ifdef CONFIG_SPI_FLASH_MACRONIX
+   case SPI_FLASH_CFI_MFR_MACRONIX:
+   return spi_flash_set_qeb_mxic(flash);
+#endif
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+   case SPI_FLASH_CFI_MFR_SPANSION:
+   case SPI_FLASH_CFI_MFR_WINBOND:
+   return spi_flash_set_qeb_winspan(flash);
+#endif
+#ifdef CONFIG_SPI_FLASH_STMICRO
+   case SPI_FLASH_CFI_MFR_STMICRO:
+   debug("SF: QEB is volatile for %02x flash\n", idcode0);
+   return 0;
+#endif
+   default:
+   printf("SF: Need set QEB func for %02x flash\n", idcode0);
+   return -1;
+   }
+}
+
+#ifdef CONFIG_SPI_FLASH_BAR
+static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
+{
+   u8 curr_bank = 0;
+   int ret;
+
+   if (flash->size <= SPI_FLASH_16MB_BOUN)
+   goto bank_end;
+
+   switch (idcode0) {
+   case SPI_FLASH_CFI_MFR_SPANSION:
+   flash->bank_read_cmd = CMD_BANKADDR_BRRD;
+   flash->bank_write_cmd = CMD_BANKADDR_BRWR;
+   default:
+   flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
+   flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
+   }
+
+   ret = spi_flash_read_common(flash, >bank_read_cmd, 1,
+   _bank, 1);
+   if (ret) {
+   debug("SF: fail to read bank addr register\n");
+   return ret;
+   }
+
+bank_end:
+   flash->bank_curr = curr_bank;
+   return 0;
+}

[U-Boot] [PATCH v4 00/21] sf: Tunning spi-flash layer

[Jagan Teki]

Previous version link:
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/233262

spi-flash layer need to tune a lot for better code handling and
to sync with Linux spi-nor. So below areas got updated in this series.
- BAR handling
- spi_flash_cmd_wait_ready updates.
- Separate core spi-flash handling and spi-flash interface
  (interface between spi drivers vs spi-flash layer)

Currently I'm working on spi-nor framework for u-boot which
is slighly same as Linux spi-nor core with addition of
u-boot driver model to it.

This series will be starting point to add spi-nor functionalities.

TODO:
- MTD core addition to spi-flash layer.
- spi-nor core addition.

Code sizes:
After:
dm:
   textdata bss dec hex filename
 354820   12016  221112  587948   8f8ac u-boot
non-dm
   textdata bss dec hex filename
 354317   11876  221124  587317   8f635 u-boot

Before:
dm
   textdata bss dec hex filename
 354878   12016  221096  587990   8f8d6 u-boot
non-dm
   textdata bss dec hex filename
 354447   11876  221124  587447   8f6b7 u-boot

Testing:
$ git clone git://git.denx.de/u-boot-spi.git
$ cd u-boot-spi
$ git checkout -b spi-nor-tune origin/next-spi-nor-tune

thanks!
Jagan.

Jagan Teki (21):
  spi: zynq_spi: Remove unneeded headers
  sf: Return bank_sel, if flash->bank_curr == bank_sel
  sf: Add spi_flash_read_bar
  sf: Optimize BAR write code
  sf: Make flash->flags use for generic usage
  sf: Update status reg check in spi_flash_cmd_wait_ready
  sf: Add FSR support to spi_flash_cmd_wait_ready
  sf: spi_flash_validate_params => spi_flash_scan
  sf: Move spi_flash_scan code to sf_ops
  sf: Move the read_id code to sf_ops
  sf: Move BAR defined code at once place
  sf: Use static for file-scope functions
  sf: Fix Makefile
  sf: Use simple name for register access functions
  sf: Use flash function pointers in dm_spi_flash_ops
  sf: Flash power up read-only based on idcode0
  sf: Use static for file-scope functions
  sf: Remove unneeded header includes
  sf: probe: Use spi_flash_scan in dm-spi-flash
  sf: Re-factorize spi_flash_probe_tail code
  dm-sf: Re-factorize spi_flash_std_probe code

 drivers/mtd/spi/Makefile  |   6 +-
 drivers/mtd/spi/sf_internal.h |  57 ++---
 drivers/mtd/spi/sf_ops.c  | 488 +++---
 drivers/mtd/spi/sf_probe.c| 446 ++
 drivers/spi/zynq_spi.c|   6 +-
 include/spi_flash.h   |  19 +-
 6 files changed, 494 insertions(+), 528 deletions(-)

-- 
1.9.1

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[U-Boot] [PATCH v4 03/21] sf: Add spi_flash_read_bar

[Jagan Teki]

Add spi_flash_read_bar function for reading bar and
discovering bar commands at probe time.

Signed-off-by: Jagan Teki 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_probe.c | 53 +-
 1 file changed, 34 insertions(+), 19 deletions(-)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 954376d..f17ec17 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -99,6 +99,37 @@ static int spi_flash_set_qeb(struct spi_flash *flash, u8 
idcode0)
}
 }
 
+#ifdef CONFIG_SPI_FLASH_BAR
+static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
+{
+   u8 curr_bank = 0;
+   int ret;
+
+   if (flash->size <= SPI_FLASH_16MB_BOUN)
+   goto bank_end;
+
+   switch (idcode0) {
+   case SPI_FLASH_CFI_MFR_SPANSION:
+   flash->bank_read_cmd = CMD_BANKADDR_BRRD;
+   flash->bank_write_cmd = CMD_BANKADDR_BRWR;
+   default:
+   flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
+   flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
+   }
+
+   ret = spi_flash_read_common(flash, >bank_read_cmd, 1,
+   _bank, 1);
+   if (ret) {
+   debug("SF: fail to read bank addr register\n");
+   return ret;
+   }
+
+bank_end:
+   flash->bank_curr = curr_bank;
+   return 0;
+}
+#endif
+
 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
 struct spi_flash *flash)
 {
@@ -235,25 +266,9 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
 
/* Configure the BAR - discover bank cmds and read current bank */
 #ifdef CONFIG_SPI_FLASH_BAR
-   u8 curr_bank = 0;
-   if (flash->size > SPI_FLASH_16MB_BOUN) {
-   int ret;
-
-   flash->bank_read_cmd = (idcode[0] == 0x01) ?
-   CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
-   flash->bank_write_cmd = (idcode[0] == 0x01) ?
-   CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;
-
-   ret = spi_flash_read_common(flash, >bank_read_cmd, 1,
-   _bank, 1);
-   if (ret) {
-   debug("SF: fail to read bank addr register\n");
-   return ret;
-   }
-   flash->bank_curr = curr_bank;
-   } else {
-   flash->bank_curr = curr_bank;
-   }
+   int ret = spi_flash_read_bank(flash, idcode[0]);
+   if (ret < 0)
+   return ret;
 #endif
 
/* Flash powers up read-only, so clear BP# bits */
-- 
1.9.1

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Re: [U-Boot] Pull-request: u-boot-spi/master

[Tom Rini]

On Sun, Oct 11, 2015 at 04:52:08PM +0530, Jagan Teki wrote:

> Hi Tom,
> 
> Please pull this PR.
> 
> thanks!
> Jagan.
> 
> The following changes since commit 9a4c6e9abf5261f565cfbf1e80c6e17d26ad0b1e:
> 
>   sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig (2015-10-10 
> 11:54:16 +0200)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-spi.git master
> 
> for you to fetch changes up to 03d1d568a04b3d67e0f09b598554c2b74e31224f:
> 
>   configs: ls1021atwr: Enable DSPI for LS1021ATWR (2015-10-11 16:43:06 +0530)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 2/5] fs/fat/fat_write: Merge calls to set_cluster()

[Tom Rini]

On Mon, Sep 28, 2015 at 03:45:29PM +0200, Benoît Thébaudeau wrote:

> set_contents() had uselessly split calls to set_cluster(). Merge these
> calls, which removes some cases of set_cluster() being called with a
> size of zero.
> 
> Signed-off-by: Benoît Thébaudeau 

Applied to u-boot/master, thanks!

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Re: [U-Boot] common/image.c: Make boot_get_ramdisk() perform a check for Android images

[Tom Rini]

On Thu, Aug 27, 2015 at 03:42:41PM -0400, Tom Rini wrote:

> In 2dd4632 the check for where a ramdisk is found on an Android image
> was got moved into the "normal" loop here, causing people to have to
> pass the kernel address in the ramdisk address location in order to have
> Android boot still.  This changed previous behavior so perform a check
> early in the function to see if we have an Android image and if so use
> that as where to look for the ramdisk (which is what the rest of the
> code here expects).
> 
> Cc: Rob Herring 
> Reported-by: Paul Kocialkowski 
> Signed-off-by: Tom Rini 

Moved around slightly so that we can override the ramdisk still and
then:

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH 1/2] pl310: arm: fix up define typo for the share override bit

[dinguyen]

From: Dinh Nguyen 

s/L310_SHARED_ATT_OVERRIDE_ENABLE/PL310_SHARED_ATT_OVERRIDE_ENABLE

Signed-off-by: Dinh Nguyen 
---
 arch/arm/imx-common/cache.c  | 2 +-
 arch/arm/include/asm/pl310.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/cache.c b/arch/arm/imx-common/cache.c
index 54b021c..d6b1955 100644
--- a/arch/arm/imx-common/cache.c
+++ b/arch/arm/imx-common/cache.c
@@ -47,7 +47,7 @@ void v7_outer_cache_enable(void)
 * is cleared, PL310 treats Normal Shared Non-cacheable
 * accesses as Cacheable no-allocate.
 */
-   setbits_le32(>pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE);
+   setbits_le32(>pl310_aux_ctrl, PL310_SHARED_ATT_OVERRIDE_ENABLE);
 
 #if defined CONFIG_MX6SL
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index de7650e..18b90b7 100644
--- a/arch/arm/include/asm/pl310.h
+++ b/arch/arm/include/asm/pl310.h
@@ -16,7 +16,7 @@
 #define L2X0_STNDBY_MODE_EN(1 << 0)
 #define L2X0_CTRL_EN   1
 
-#define L310_SHARED_ATT_OVERRIDE_ENABLE(1 << 22)
+#define PL310_SHARED_ATT_OVERRIDE_ENABLE   (1 << 22)
 
 struct pl310_regs {
u32 pl310_cache_id;
-- 
2.4.5

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Re: [U-Boot] [RFC] odroid DTB support

[Tom Rini]

On Mon, Oct 12, 2015 at 10:54:04AM +0200, Guillaume Gardet wrote:
> Hi,
> 
> 
> Le 12/10/2015 01:45, Tom Rini a écrit :
> >On Fri, Oct 09, 2015 at 02:35:24PM +0200, Guillaume Gardet wrote:
> >>
> >>Le 09/10/2015 14:23, Przemyslaw Marczak a écrit :
> >>>Hello Guillaume,
> >>>
> >>>On 10/09/2015 02:11 PM, Guillaume Gardet wrote:
> Hi Przemyslaw,
> 
> I would like to add DTB support for odroid board to be able to boot
> upstream kernel easily.
> 
> I see 2 ways to do it:
> * Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support to set 'board_rev'
> and 'board_name' env vars. Then, you need a 'findfdt' script to check
> 'board_rev' and set fdtfile accordingly (as done for OMAP4 panda board)
> * Set fdtfile name directly (as done for rpi or igep00x0).
> 
> What would you prefer?
> 
> 
> Guillaume
> 
> 
> >>>Is, that the reason of adding the boot script by your last patches?
> >>No, we need a boot script, because this is the way we boot our
> >>openSUSE images (we boot with an initrd and some special bootargs).
> >Hang on, exynos stuff uses the generic distro hooks.  Can you take a
> >look at doc/README.distro and see what openSUSE can hook into / provide
> >some feedback on what needs doing?  Thanks!
> 
> This is true for odroid XU3 (Exynos5 based) but Odroid U3/X2 (Exynos4
> based) has no generic distro hooks at the moment.

No, exynos-common pulls in generic distro.  And in the event of boards
that do not the answer is to pull in the generic distro framework.

-- 
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[U-Boot] [PATCH v4 15/21] sf: Use flash function pointers in dm_spi_flash_ops

[Jagan Teki]

flash operations are defined as static and reuse them with
function-pointers so call them with generic function pounters
instead of calling like normal functions.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_ops.c   |  2 --
 drivers/mtd/spi/sf_probe.c | 15 +++
 include/spi_flash.h| 13 -
 3 files changed, 3 insertions(+), 27 deletions(-)

diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 97e644d..f63ce7a 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -761,7 +761,6 @@ int spi_flash_scan(struct spi_slave *spi, struct spi_flash 
*flash)
flash->dual_flash = flash->spi->option;
 
/* Assign spi_flash ops */
-#ifndef CONFIG_DM_SPI_FLASH
flash->write = spi_flash_cmd_write_ops;
 #if defined(CONFIG_SPI_FLASH_SST)
if (params->flags & SST_WR)
@@ -776,7 +775,6 @@ int spi_flash_scan(struct spi_slave *spi, struct spi_flash 
*flash)
 #endif
flash->erase = spi_flash_cmd_erase_ops;
flash->read = spi_flash_cmd_read_ops;
-#endif
 
/* Compute the flash size */
flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index a712792..e2dac7e 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -120,7 +120,7 @@ static int spi_flash_std_read(struct udevice *dev, u32 
offset, size_t len,
 {
struct spi_flash *flash = dev_get_uclass_priv(dev);
 
-   return spi_flash_cmd_read_ops(flash, offset, len, buf);
+   return flash->read(flash, offset, len, buf);
 }
 
 int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
@@ -128,23 +128,14 @@ int spi_flash_std_write(struct udevice *dev, u32 offset, 
size_t len,
 {
struct spi_flash *flash = dev_get_uclass_priv(dev);
 
-#if defined(CONFIG_SPI_FLASH_SST)
-   if (flash->flags & SNOR_F_SST_WR) {
-   if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
-   return sst_write_bp(flash, offset, len, buf);
-   else
-   return sst_write_wp(flash, offset, len, buf);
-   }
-#endif
-
-   return spi_flash_cmd_write_ops(flash, offset, len, buf);
+   return flash->write(flash, offset, len, buf);
 }
 
 int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
 {
struct spi_flash *flash = dev_get_uclass_priv(dev);
 
-   return spi_flash_cmd_erase_ops(flash, offset, len);
+   return flash->erase(flash, offset, len);
 }
 
 int spi_flash_std_probe(struct udevice *dev)
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 4312d3d..0732172 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -87,23 +87,10 @@ struct spi_flash {
u8 dummy_byte;
 
void *memory_map;
-#ifndef CONFIG_DM_SPI_FLASH
-   /*
-* These are not strictly needed for driver model, but keep them here
-* while the transition is in progress.
-*
-* Normally each driver would provide its own operations, but for
-* SPI flash most chips use the same algorithms. One approach is
-* to create a 'common' SPI flash device which knows how to talk
-* to most devices, and then allow other drivers to be used instead
-* if required, perhaps with a way of scanning through the list to
-* find the driver that matches the device.
-*/
int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
int (*write)(struct spi_flash *flash, u32 offset, size_t len,
const void *buf);
int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
-#endif
 };
 
 struct dm_spi_flash_ops {
-- 
1.9.1

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[U-Boot] [PATCH v4 05/21] sf: Make flash->flags use for generic usage

[Jagan Teki]

Use the flash->flags for generic usage, not only for dm-spi-flash,
this will be used for future flag additions.

Signed-off-by: Jagan Teki 
[Correct the spi flash flags detect logic]
Signed-off-by: Bin Meng 
Tested-by: Bin Meng 
---
Changes for v4:
- Fixed SNOR_F_SST_WR
Changes for v3, v2:
- none

 drivers/mtd/spi/sf_internal.h |  4 
 drivers/mtd/spi/sf_probe.c| 10 +-
 include/spi_flash.h   |  4 ++--
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 9c95d56..53998fc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -51,6 +51,10 @@ enum {
 
 #define SST_WR (SST_BP | SST_WP)
 
+enum spi_nor_option_flags {
+   SNOR_F_SST_WR   = (1 << 0),
+};
+
 #define SPI_FLASH_3B_ADDR_LEN  3
 #define SPI_FLASH_CMD_LEN  (1 + SPI_FLASH_3B_ADDR_LEN)
 #define SPI_FLASH_16MB_BOUN0x100
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index f17ec17..2634e90 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -163,15 +163,15 @@ static int spi_flash_validate_params(struct spi_slave 
*spi, u8 *idcode,
flash->name = params->name;
flash->memory_map = spi->memory_map;
flash->dual_flash = flash->spi->option;
-#ifdef CONFIG_DM_SPI_FLASH
-   flash->flags = params->flags;
-#endif
 
/* Assign spi_flash ops */
 #ifndef CONFIG_DM_SPI_FLASH
flash->write = spi_flash_cmd_write_ops;
 #if defined(CONFIG_SPI_FLASH_SST)
-   if (params->flags & SST_WR) {
+   if (params->flags & SST_WR)
+   flash->flags |= SNOR_F_SST_WR;
+
+   if (params->flags & SNOR_F_SST_WR) {
if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
flash->write = sst_write_bp;
else
@@ -466,7 +466,7 @@ int spi_flash_std_write(struct udevice *dev, u32 offset, 
size_t len,
struct spi_flash *flash = dev_get_uclass_priv(dev);
 
 #if defined(CONFIG_SPI_FLASH_SST)
-   if (flash->flags & SST_WR) {
+   if (flash->flags & SNOR_F_SST_WR) {
if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
return sst_write_bp(flash, offset, len, buf);
else
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 3b2d555..8d85468 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -38,10 +38,10 @@ struct spi_slave;
  *
  * @spi:   SPI slave
  * @dev:   SPI flash device
- * @flags: Indication of spi flash flags
  * @name:  Name of SPI flash
  * @dual_flash:Indicates dual flash memories - dual stacked, 
parallel
  * @shift: Flash shift useful in dual parallel
+ * @flags: Indication of spi flash flags
  * @size:  Total flash size
  * @page_size: Write (page) size
  * @sector_size:   Sector size
@@ -67,11 +67,11 @@ struct spi_flash {
struct spi_slave *spi;
 #ifdef CONFIG_DM_SPI_FLASH
struct udevice *dev;
-   u16 flags;
 #endif
const char *name;
u8 dual_flash;
u8 shift;
+   u16 flags;
 
u32 size;
u32 page_size;
-- 
1.9.1

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[U-Boot] [PATCH v4 17/21] sf: Use static for file-scope functions

[Jagan Teki]

Use static for file-scope functions and removed them from
header files.

Signed-off-by: Jagan Teki 
---
Changes for v4, v3, v2:
- none

 drivers/mtd/spi/sf_internal.h | 20 
 drivers/mtd/spi/sf_ops.c  | 11 ++-
 2 files changed, 6 insertions(+), 25 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 39749c2..2873402 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -117,11 +117,6 @@ enum spi_nor_option_flags {
 #ifdef CONFIG_SPI_FLASH_SST
 # define CMD_SST_BP0x02/* Byte Program */
 # define CMD_SST_AAI_WP0xAD/* Auto Address Incr Word 
Program */
-
-int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
-   const void *buf);
-int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
-   const void *buf);
 #endif
 
 /**
@@ -166,9 +161,6 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 
*cmd, size_t cmd_len,
const void *data, size_t data_len);
 
 
-/* Flash erase(sectors) operation, support all possible erase commands */
-int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
-
 /* Enable writing on the SPI flash */
 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
 {
@@ -193,24 +185,12 @@ int spi_flash_write_common(struct spi_flash *flash, const 
u8 *cmd,
size_t cmd_len, const void *buf, size_t buf_len);
 
 /*
- * Flash write operation, support all possible write commands.
- * Write the requested data out breaking it up into multiple write
- * commands as needed per the write size.
- */
-int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
-   size_t len, const void *buf);
-
-/*
  * Same as spi_flash_cmd_read() except it also claims/releases the SPI
  * bus. Used as common part of the ->read() operation.
  */
 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len);
 
-/* Flash read operation, support all possible read commands */
-int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
-   size_t len, void *data);
-
 #ifdef CONFIG_SPI_FLASH_MTD
 int spi_flash_mtd_register(struct spi_flash *flash);
 void spi_flash_mtd_unregister(void);
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index f90f041..e04f8aa 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -298,7 +298,8 @@ int spi_flash_write_common(struct spi_flash *flash, const 
u8 *cmd,
return ret;
 }
 
-int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
+static int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset,
+   size_t len)
 {
u32 erase_size, erase_addr;
u8 cmd[SPI_FLASH_CMD_LEN];
@@ -341,7 +342,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 
offset, size_t len)
return ret;
 }
 
-int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
+static int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
size_t len, const void *buf)
 {
unsigned long byte_addr, page_size;
@@ -418,7 +419,7 @@ void __weak spi_flash_copy_mmap(void *data, void *offset, 
size_t len)
memcpy(data, offset, len);
 }
 
-int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
+static int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
size_t len, void *data)
 {
u8 *cmd, cmdsz;
@@ -510,7 +511,7 @@ static int sst_byte_write(struct spi_flash *flash, u32 
offset, const void *buf)
return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 }
 
-int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+static int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
const void *buf)
 {
size_t actual, cmd_len;
@@ -577,7 +578,7 @@ int sst_write_wp(struct spi_flash *flash, u32 offset, 
size_t len,
return ret;
 }
 
-int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
+static int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
const void *buf)
 {
size_t actual;
-- 
1.9.1

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[U-Boot] [PATCH 2/2] arm: socfpga: enable data/inst prefetch and shared override in the L2

[dinguyen]

From: Dinh Nguyen 

Update the L2 AUX CTRL settings for the SoCFPGA.

Enabling D and I prefetch bits helps improve SDRAM performance on the
platform.

Also, we need to enable bit 22 of the L2. By not having bit 22 set in the
PL310 Auxiliary Control register (shared attribute override enable) has the
side effect of transforming Normal Shared Non-cacheable reads into Cacheable
no-allocate reads.

Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.

Signed-off-by: Dinh Nguyen 
---
 arch/arm/include/asm/pl310.h |  2 ++
 arch/arm/mach-socfpga/misc.c | 12 
 2 files changed, 14 insertions(+)

diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index 18b90b7..7a11405 100644
--- a/arch/arm/include/asm/pl310.h
+++ b/arch/arm/include/asm/pl310.h
@@ -17,6 +17,8 @@
 #define L2X0_CTRL_EN   1
 
 #define PL310_SHARED_ATT_OVERRIDE_ENABLE   (1 << 22)
+#define PL310_AUX_CTRL_DATA_PREFETCH_MASK  (1 << 28)
+#define PL310_AUX_CTRL_INST_PREFETCH_MASK  (1 << 29)
 
 struct pl310_regs {
u32 pl310_cache_id;
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 0940cc5..a134760 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -52,6 +52,18 @@ void enable_caches(void)
 #endif
 }
 
+void v7_outer_cache_enable(void)
+{
+   /* disable the L2 cache */
+   writel(0, >pl310_ctrl);
+
+   /* enable BRESP, instruction and data prefetch, full line of zeroes */
+   setbits_le32(>pl310_aux_ctrl,
+   PL310_AUX_CTRL_DATA_PREFETCH_MASK |
+   PL310_AUX_CTRL_INST_PREFETCH_MASK |
+   PL310_SHARED_ATT_OVERRIDE_ENABLE);
+}
+
 /*
  * DesignWare Ethernet initialization
  */
-- 
2.4.5

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Re: [U-Boot] arndale: Apply Cortex-A15 errata #773022 and #774769

[Tom Rini]

On Tue, Sep 29, 2015 at 10:27:09AM +0100, Ian Campbell wrote:

> We run 4 Arndale boards in our automated test framework, they have
> been running quite happily for quite some time using a Debian Wheezy
> userspace.
> 
> However when upgrading to a Debian Jessie we started seeing frequent
> segmentation faults from gcc when building the kernel, to the extent
> that it is unable to successfully build the kernel twice in a row, and
> often fails on the first attempt.
> 
> Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
> which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
> and CPU Errata 773022 and 774769.
> 
> This errata needs to be applied to all processors in an SMP system,
> meaning that the usual strategy of applying them in
> arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
> the boot processor only). Instead we apply these errata in the secure
> monitor which is code that is traversed by all processors as they are
> brought up.
> 
> The net affect on Arndale is that ACTLR changes from 0x40 to
> 0x242. I ran 17 kernel compile iterations overnight with no
> segfaults.
> 
> Runtime testing was done on our v2014.10 based branch and forward
> ported (with only minimal and trivial contextual conflicts) to current
> master, where it has been build tested only.
> 
> I suppose in theory these errata apply to any Exynos5250 based boards,
> but Arndale is the only one I have access to and I have therefore
> chosen to be conservative and only apply it there.
> 
> Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
> numerically sorted.
> 
> Signed-off-by: Ian Campbell 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 5/5] fs/fat/fat_write: Fix management of empty files

[Tom Rini]

On Mon, Sep 28, 2015 at 03:45:32PM +0200, Benoît Thébaudeau wrote:

> Overwriting an empty file not created by U-Boot did not work, and it
> could even corrupt the FAT. Moreover, creating empty files or emptying
> existing files allocated a cluster, which is not standard.
> 
> Fix this by always keeping empty files clusterless as specified by
> Microsoft (the start cluster must be set to 0 in the directory entry in
> that case), and by supporting overwriting such files.
> 
> Signed-off-by: Benoît Thébaudeau 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,1/5] fs/fat/fat_write: Fix buffer alignments

[Tom Rini]

On Mon, Sep 28, 2015 at 03:45:28PM +0200, Benoît Thébaudeau wrote:

> set_cluster() was using a temporary buffer without enforcing its
> alignment for DMA and cache. Moreover, it did not check the alignment of
> the passed buffer, which can come directly from applicative code or from
> the user.
> 
> This could cause random data corruption, which has been observed on
> i.MX25 writing to an SD card.
> 
> Fix this by only passing ARCH_DMA_MINALIGN-aligned buffers to
> disk_write(), which requires the introduction of a buffer bouncing
> mechanism for the misaligned buffers passed to set_cluster().
> 
> By the way, improve the handling of the corresponding return values from
> disk_write():
>  - print them with debug() in case of error,
>  - consider that there is an error is disk_write() returns a smaller
>block count than the requested one, not only if its return value is
>negative.
> 
> After this change, set_cluster() and get_cluster() are almost
> symmetrical.
> 
> Signed-off-by: Benoît Thébaudeau 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 4/5] fs/fat/fat_write: Factor out duplicate code

[Tom Rini]

On Mon, Sep 28, 2015 at 03:45:31PM +0200, Benoît Thébaudeau wrote:

> Signed-off-by: Benoît Thébaudeau 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 3/5] fs/fat/fat_write: Fix curclust/newclust mix-up

[Tom Rini]

On Mon, Sep 28, 2015 at 03:45:30PM +0200, Benoît Thébaudeau wrote:

> curclust was used instead of newclust in the debug() calls and in one
> CHECK_CLUST() call, which could skip a failure case.
> 
> Signed-off-by: Benoît Thébaudeau 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v4,10/10] vexpress64: juno: use /dev/sda2

[Tom Rini]

On Fri, Oct 09, 2015 at 05:18:08PM +0100, Ryan Harkin wrote:

> This patch changes the default "root=" parameter to "/dev/sda2".
> 
> Many linux based distros use /dev/sda1 for their boot partition; this is
> often not a rootfs that can be used by the "root=" parameter.
> 
> Linaro images use /dev/sda1 as a boot partition, although this of a
> different nature to a distro image.  Linaro uses /dev/sda2 for the rootfs
> partition.
> 
> Signed-off-by: Ryan Harkin 
> Reviewed-by: Linus Walleij 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] test/fs/fs-test.sh: Update expected results and TC10 logic

[Tom Rini]

On Sun, Oct 11, 2015 at 04:51:04PM -0400, Tom Rini wrote:

> With the changes in 7a3e70c we now get read(2) behavior so trying to
> read 2MB with 1MB left in the file results in 1MB read and a warning.
> We update the test logic here to make sure we read back 1MB as expected.
> This change however changes the overall summary as while EXT4 continues
> to not have offset support the test now fails when expected to pass
> rather than fails when expected to fail (and we report that as pass).
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

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[U-Boot] How to set IPU parent clock to TVE?

[DaveKucharczyk]

This is more kernel related than U-Boot, but I'm hoping you guys can help me
out. I've been stuck on this for some days now with no response in the
Freescale forum.

We ported our custom imx51 board from Linux 2.6 to Linux 3.14 (also u-boot
2009 -> 2014).

In old kernel we set the ipu_di_clk parent to tve_clk in
arch/arm/mach-mx5/clk.c. 

I'm having a heck of a time trying to figure out where or how to do that in
new kernel. 

Can this be done in the dts or must it be done kernel code?

I tried a few things in the dts and tried to set the IPU parent in the
imx51.dtsi to TVE, but no cigar.

I tried reading through ipu-di.c and ipu-common.c

I tried different clock parent setups in clk-imx51-imx53.c.

I checked the CCM registers and the relevant ones seem the same between both
kernels. I'm sure I'm missing something or doing something wrong. 

Any help would be appreciated. 



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