[U-Boot] [PATCH v4 2/2] usb: eth: add Realtek RTL8152B/RTL8153 DRIVER
This patch adds driver support for the Realtek RTL8152B/RTL8153 USB
network adapters.
Signed-off-by: Ted Chen
[swarren, fixed a few compiler warnings]
[swarren, with permission, converted license header to SPDX]
[swarren, removed printf() spew during probe()]
Signed-off-by: Stephen Warren
---
drivers/usb/eth/Makefile|1 +
drivers/usb/eth/r8152.c | 1459 +++
drivers/usb/eth/r8152.h | 623 ++
drivers/usb/eth/r8152_fw.c | 980 +
drivers/usb/eth/usb_ether.c |7 +
include/usb_ether.h |6 +
6 files changed, 3076 insertions(+)
create mode 100644 drivers/usb/eth/r8152.c
create mode 100644 drivers/usb/eth/r8152.h
create mode 100644 drivers/usb/eth/r8152_fw.c
Changes for v2: Modified by Marek's comments.
- Remove pattern informations.
- Don't allocate & free when read/write register.
- relpace udelay to mdelay.
- pull firmware into global variable.
- code review.
Changes for v3: Modified by Marek's and Joe's comments.
- Remove driver version informations.
- separate firmware code to individual file.
- split extensive defines to r8152.h.
- code review.
Changes for v4: Modified by Marek's comments.
- remove the redundant code in generic_ocp_read and generic_ocp_write.
- remove redundant typecasting.
- collect the codes of busy waiting to rtl8152_reinit_ll and rtl8152_nic_reset.
- use ARRAY_SIZE() to avoid having 0x00 as a terminating entry of r8152_dongles.
- using if (!ep_in_found && (ep_addr & USB_DIR_IN)) ... to replace old version.
- code review.
diff --git a/drivers/usb/eth/Makefile b/drivers/usb/eth/Makefile
index c92d2b0..4c44efc 100644
--- a/drivers/usb/eth/Makefile
+++ b/drivers/usb/eth/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_USB_ETHER_ASIX) += asix.o
obj-$(CONFIG_USB_ETHER_ASIX88179) += asix88179.o
obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o
obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
+obj-$(CONFIG_USB_ETHER_RTL8152) += r8152.o r8152_fw.o
diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
new file mode 100644
index 000..1b0f556
--- /dev/null
+++ b/drivers/usb/eth/r8152.c
@@ -0,0 +1,1459 @@
+/*
+ * Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "usb_ether.h"
+#include "r8152.h"
+
+/* local vars */
+static int curr_eth_dev; /* index for name of next device detected */
+
+struct r8152_dongle {
+ unsigned short vendor;
+ unsigned short product;
+};
+
+static const struct r8152_dongle const r8152_dongles[] = {
+ /* Realtek */
+ { 0x0bda, 0x8050 },
+ { 0x0bda, 0x8152 },
+ { 0x0bda, 0x8153 },
+
+ /* Samsung */
+ { 0x04e8, 0xa101 },
+
+ /* Lenovo */
+ { 0x17ef, 0x304f },
+ { 0x17ef, 0x3052 },
+ { 0x17ef, 0x3054 },
+ { 0x17ef, 0x3057 },
+ { 0x17ef, 0x7205 },
+ { 0x17ef, 0x720a },
+ { 0x17ef, 0x720b },
+ { 0x17ef, 0x720c },
+
+ /* TP-LINK */
+ { 0x2357, 0x0601 },
+
+ /* Nvidia */
+ { 0x0955, 0x09ff },
+};
+
+static
+int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
+{
+ return usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
+ RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
+ value, index, data, size, 500);
+
+}
+
+static
+int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
+{
+ return usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
+ RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
+ value, index, data, size, 500);
+}
+
+int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
+void *data, u16 type)
+{
+ u16 burst_size = 64;
+ int ret;
+ int txsize;
+
+ /* both size and index must be 4 bytes align */
+ if ((size & 3) || !size || (index & 3) || !data)
+ return -EINVAL;
+
+ if (index + size > 0x)
+ return -EINVAL;
+
+ while (size) {
+ txsize = min(size, burst_size);
+ ret = get_registers(tp, index, type, txsize, data);
+ if (ret < 0)
+ break;
+
+ index += txsize;
+ data += txsize;
+ size -= txsize;
+ }
+
+ return ret;
+}
+
+int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
+ u16 size, void *data, u16 type)
+{
+ int ret;
+ u16 byteen_start, byteen_end, byte_en_to_hw;
+ u16 burst_size = 512;
+ int txsize;
+
+ /* both size and index must be 4 bytes align */
+ if ((size & 3) || !size || (index & 3) || !data)
+ return -EINVAL;
+
+ if (index + size > 0x)
+ return -EINVAL;
+
+ byteen_star
Re: [U-Boot] [PATCH 7/8] serial: lpuart: Add driver model serial support
On 01/14/2016 07:54 AM, Bin Meng wrote: Hi Stefan, On Thu, Jan 14, 2016 at 3:20 AM, Stefan Agner wrote: On 2016-01-13 00:19, Bin Meng wrote: +Simon Hi Bhuvan, On Wed, Jan 13, 2016 at 4:07 PM, Bhuvanchandra DV wrote: Hi Bin, On 01/13/2016 11:43 AM, Bin Meng wrote: Hi Bhuvan, On Wed, Jan 13, 2016 at 1:49 PM, Bhuvanchandra DV wrote: Hi Bin, With reference to the discussion here[1]. Unfortunately the lpuart driver is now broken for legacy code and also the driver doesn't work with serial driver model enabled on Toradex Colibri VF50/VF61, Freescale VF610twr and Phytec pcm052 boards. Did some one tested this patchset on these boards ? I will fix the legacy code build in v2. About serial driver model not working on these boards, is that the caused by no device tree of these boards? Yes, i tested on Colibri VF50/VF61 with device tree and it works fine. Great to know! I think it would be nice to have the support for both platform data and device tree so that we can use it with platform data via board files and device tree too. I believe we should introduce device tree support on these boards. The configuration data (like in your patches the reg base for LPUART) should really be put into device tree. I adapted the comments from platdata.h below: Currently colibri_vf has both, a DT and a non-DT config. There has been only one driver (SPI I think?) which required DT so far, and since most user do not use that driver, we created two configs. However, if something like UART requires DT, then we can as well drop the non-DT config for colibri_vf. I vote for dropping the non-DT config. 31/** 32 * NOTE: Avoid using these except in extreme circumstances, where device tree 33 * is not feasible (e.g. serial driver in SPL where <8KB of SRAM is 34 * available). U-Boot's driver model uses device tree for configuration. 35 */ 36#define U_BOOT_DEVICE(__name) \ 37ll_entry_declare(struct driver_info, __name, driver_info) Since Vybrid has so large internal SRAM, there has been no need for SPL at all so far. Not sure about LS1021a/other LPUART SoCs... LS1021 has 128KB SRAM, and current lp1021atwr_nor_lpuart does not use SPL. It boots from NOR flash. Since only few boards are using lpuart driver we can update the driver completly to driver model, drop the legacy code and update the boards. Since in my patches I only updated ls1021atwr board to use driver model serial, and I don't have those other boards (like Colibri VF50/VF61) to test this lpuart dm driver. I chose to leave the legacy codes there. On top of my series, you can prepare a patch to completely drop those legacy codes after you switch to use driver model lpuart driver on those boards in your series. Then we get a legacy-free driver for lpuart boards :) I guess nobody has all this boards, we should nontheless try to find a solution for all of them. I see three options: - Leave legacy code and the other boards as is (pcm052/vf610twr) - Drop legacy code, and add platform data support and the corresponding platform data for pcm052/vf610twr (in this case, we could also keep the colibri_vf non-DT config) - Drop legacy code, add device tree for pcm052/vf610twr, extend colibri_vf device tree and drop non-DT config for colibri_vf. I am inclined to say lets go for the pure DT solution, since that is where U-Boot is evolving to long term anyway. Not sure how much work is required to make that happen. I guess the lpuart only DT for pcm052/vf610twr should be fairly easy to create...? Other opinions? -- I would go for option 3. I too agree with Stefan and Bin for going with pure DT solution. Will do the device tree files for vf610-twr, pcm052 boards and extend Colibri-VFxx board with lpuart support. Will submit the new patchset after Bin's patchset upstreamed. Regards, Bin -- Best regards, Bhuvan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 7/9] serial: lpuart: Add driver model serial support
On 01/14/2016 09:09 AM, Bin Meng wrote:
This adds driver model support to lpuart serial driver.
Tested on Toradex Colibri VF50/VF61 h/w with legacy and DT, works fine
as expected.
Signed-off-by: Bin Meng
Acked-by: Bhuvanchandra DV
also
Tested-by: Bhuvanchandra DV
---
Changes in v2:
- Split to use two separate U_BOOT_DRIVER()
doc/driver-model/serial-howto.txt | 1 -
drivers/serial/serial_lpuart.c| 167 ++
2 files changed, 167 insertions(+), 1 deletion(-)
diff --git a/doc/driver-model/serial-howto.txt
b/doc/driver-model/serial-howto.txt
index 4706d56..c933b90 100644
--- a/doc/driver-model/serial-howto.txt
+++ b/doc/driver-model/serial-howto.txt
@@ -11,7 +11,6 @@ is time for maintainers to start converting over the
remaining serial drivers:
opencores_yanu.c
serial_bfin.c
serial_imx.c
- serial_lpuart.c
serial_max3100.c
serial_pxa.c
serial_s3c24x0.c
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 5cc1997..3f9c4d1 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -5,6 +5,7 @@
*/
#include
+#include
#include
#include
#include
@@ -49,6 +50,10 @@ DECLARE_GLOBAL_DATA_PTR;
struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE;
+struct lpuart_serial_platdata {
+ struct lpuart_fsl *reg;
+};
+
#ifndef CONFIG_LPUART_32B_REG
static void _lpuart_serial_setbrg(struct lpuart_fsl *base, int baudrate)
{
@@ -122,6 +127,7 @@ static int _lpuart_serial_init(struct lpuart_fsl *base)
return 0;
}
+#ifndef CONFIG_DM_SERIAL
static void lpuart_serial_setbrg(void)
{
_lpuart_serial_setbrg(base, gd->baudrate);
@@ -157,6 +163,54 @@ static struct serial_device lpuart_serial_drv = {
.getc = lpuart_serial_getc,
.tstc = lpuart_serial_tstc,
};
+#else /* CONFIG_DM_SERIAL */
+static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ _lpuart_serial_setbrg(reg, baudrate);
+
+ return 0;
+}
+
+static int lpuart_serial_getc(struct udevice *dev)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ return _lpuart_serial_getc(reg);
+}
+
+static int lpuart_serial_putc(struct udevice *dev, const char c)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ _lpuart_serial_putc(reg, c);
+
+ return 0;
+}
+
+static int lpuart_serial_pending(struct udevice *dev, bool input)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ if (input)
+ return _lpuart_serial_tstc(reg);
+ else
+ return __raw_readb(®->us1) & US1_TDRE ? 0 : 1;
+}
+
+static int lpuart_serial_probe(struct udevice *dev)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ return _lpuart_serial_init(reg);
+}
+#endif /* CONFIG_DM_SERIAL */
#else
static void _lpuart32_serial_setbrg(struct lpuart_fsl *base, int baudrate)
{
@@ -227,6 +281,7 @@ static int _lpuart32_serial_init(struct lpuart_fsl *base)
return 0;
}
+#ifndef CONFIG_DM_SERIAL
static void lpuart32_serial_setbrg(void)
{
_lpuart32_serial_setbrg(base, gd->baudrate);
@@ -262,8 +317,57 @@ static struct serial_device lpuart32_serial_drv = {
.getc = lpuart32_serial_getc,
.tstc = lpuart32_serial_tstc,
};
+#else /* CONFIG_DM_SERIAL */
+static int lpuart32_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ _lpuart32_serial_setbrg(reg, baudrate);
+
+ return 0;
+}
+
+static int lpuart32_serial_getc(struct udevice *dev)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ return _lpuart32_serial_getc(reg);
+}
+
+static int lpuart32_serial_putc(struct udevice *dev, const char c)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ _lpuart32_serial_putc(reg, c);
+
+ return 0;
+}
+
+static int lpuart32_serial_pending(struct udevice *dev, bool input)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ if (input)
+ return _lpuart32_serial_tstc(reg);
+ else
+ return in_be32(®->stat) & STAT_TDRE ? 0 : 1;
+}
+
+static int lpuart32_serial_probe(struct udevice *dev)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+
+ return _lpuart32_serial_init(reg);
+}
+#endif /* CONFIG_DM_SERIAL */
#endif
+#ifndef CONFIG_DM_SERIAL
void lpuart_seri
Re: [U-Boot] [PATCH v3 11/14] board: add SDHCI support for PIC32MZDASK board.
On 01/13/2016 08:26 PM, Tom Rini wrote:
> On Tue, Jan 12, 2016 at 03:48:26PM +0530, Purna Chandra Mandal wrote:
>
>> Enable MMC, SDHCI, FAT FS, EXT4 FS support for PIC32MZ[DA] StarterKit.
>> Also add custom scripts, rules to boot Linux from microSD card.
>>
>> Signed-off-by: Purna Chandra Mandal
> [snip]
>> +#define CONFIG_EXTRA_ENV_SETTINGS \
>> +"loadaddr="__stringify(CONFIG_SYS_LOAD_ADDR)"\0"\
>> +"uenvfile=uEnv.txt\0" \
>> +"uenvaddr="__stringify(CONFIG_SYS_ENV_ADDR)"\0" \
>> +"scriptfile=boot.scr\0" \
>> +"ubootfile=u-boot.bin\0"\
>> +"importbootenv= " \
>> +"env import -t -r ${uenvaddr} ${filesize};\0" \
>> +\
>> +"mmcloadenv=fatload mmc 0 ${uenvaddr} ${uenvfile}\0"\
>> +"mmcloadscr=fatload mmc 0 ${uenvaddr} ${scriptfile}\0" \
>> +"mmcloadub=fatload mmc 0 ${loadaddr} ${ubootfile}\0"\
>> +\
>> +"loadbootenv=run mmcloadenv\0" \
>> +"loadbootscr=run mmcloadscr\0" \
>> +"bootcmd_root= "\
>> +"if run loadbootenv; then " \
>> +"echo Loaded environment ${uenvfile}; " \
>> +"run importbootenv; " \
>> +"fi; " \
>> +"if test -n \"${bootcmd_uenv}\" ; then "\
>> +"echo Running bootcmd_uenv ...; " \
>> +"run bootcmd_uenv; "\
>> +"fi; " \
>> +"if run loadbootscr; then " \
>> +"echo Jumping to ${scriptfile}; " \
>> +"source ${uenvaddr}; " \
>> +"fi; " \
>> +"echo Custom environment or script not found. " \
>> +"Aborting auto booting...; \0" \
>> +""
>> +
>> +#define CONFIG_BOOTCOMMAND "run bootcmd_root"
> I would like to see the env above done as a separate commit and then
> using config_distro_default / bootcmd :)
agreed. Will add in separate commit and using config_distro_default(/bootcmd).h.
___
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Re: [U-Boot] [PATCH v3 09/14] board: Add Microchip PIC32MZ[DA]-Starter-Kit board.
On 01/13/2016 08:33 PM, Daniel Schwierzeck wrote:
> Am Dienstag, den 12.01.2016, 15:48 +0530 schrieb Purna Chandra Mandal:
>> This adds support for Microchip PIC32MZ[DA] StarterKit board
>> based on a PIC32MZ[DA] family of microcontroller.
>>
>> Signed-off-by: Purna Chandra Mandal
>>
>>
>> ---
>>
>> Changes in v3:
>> - drop SKIP_LOWLEVEL_INIT, GBL_DATA_OFFSET from config header
>> - move CMD_MEMTEST, CMD_MEMINFO to defconfig
>> - increase SYS_MALLOC_F_LEN to 0x600
>> - use auto-generated defconfig - no hand edit
>>
>> Changes in v2:
>> - move CONFIG_SYS_TEXT_BASE (from board/*/config.mk) to
>> include/configs/.h
>>
>> arch/mips/dts/Makefile| 2 +-
>> arch/mips/dts/pic32mzda_sk.dts| 38
>> arch/mips/mach-pic32/Kconfig | 13 ++
>> board/microchip/pic32mzda/Kconfig | 13 ++
>> board/microchip/pic32mzda/MAINTAINERS | 6 +
>> board/microchip/pic32mzda/Makefile| 7 +
>> board/microchip/pic32mzda/README | 22 ++
>> board/microchip/pic32mzda/pic32mzda.c | 31 +++
>> configs/pic32mzdask_defconfig | 416
>> ++
>> include/configs/pic32mzdask.h | 94
>> 10 files changed, 641 insertions(+), 1 deletion(-)
>> create mode 100644 arch/mips/dts/pic32mzda_sk.dts
>> create mode 100644 board/microchip/pic32mzda/Kconfig
>> create mode 100644 board/microchip/pic32mzda/MAINTAINERS
>> create mode 100644 board/microchip/pic32mzda/Makefile
>> create mode 100644 board/microchip/pic32mzda/README
>> create mode 100644 board/microchip/pic32mzda/pic32mzda.c
>> create mode 100644 configs/pic32mzdask_defconfig
>> create mode 100644 include/configs/pic32mzdask.h
>>
>> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
>> index 47b6eb5..b513918 100644
>> --- a/arch/mips/dts/Makefile
>> +++ b/arch/mips/dts/Makefile
>> @@ -2,7 +2,7 @@
>> # SPDX-License-Identifier: GPL-2.0+
>> #
>>
>> -dtb-y +=
>> +dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
>>
>> targets += $(dtb-y)
>>
>> diff --git a/arch/mips/dts/pic32mzda_sk.dts
>> b/arch/mips/dts/pic32mzda_sk.dts
>> new file mode 100644
>> index 000..99e7f64
>> --- /dev/null
>> +++ b/arch/mips/dts/pic32mzda_sk.dts
>> @@ -0,0 +1,38 @@
>> +/*
>> + * Copyright (C) 2015 Purna Chandra Mandal,
>> purna.man...@microchip.com
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "pic32mzda.dtsi"
>> +
>> +/ {
>> +model = "Microchip PIC32MZDASK";
>> +compatible = "microchip,pic32mzdask", "microchip,pic32mzda";
>> +
>> +aliases {
>> +console = &uart2;
>> +serial0 = &uart2;
>> +};
>> +
>> +chosen {
>> +stdout-path = "serial0:115200n8";
>> +};
>> +};
>> +
>> +&clock {
>> +status = "okay";
>> +u-boot,dm-pre-reloc;
>> +};
>> +
>> +&pinctrl {
>> +status = "okay";
>> +u-boot,dm-pre-reloc;
>> +};
>> +
>> +&uart2 {
>> +status = "okay";
>> +u-boot,dm-pre-reloc;
>> +};
>> diff --git a/arch/mips/mach-pic32/Kconfig b/arch/mips/mach
>> -pic32/Kconfig
>> index 74be9fb..d665f63 100644
>> --- a/arch/mips/mach-pic32/Kconfig
>> +++ b/arch/mips/mach-pic32/Kconfig
>> @@ -22,4 +22,17 @@ config SOC_PIC32MZDA
>>
>> endchoice
>>
>> +choice
>> +prompt "Board select"
>> +
>> +config TARGET_PIC32MZDASK
>> +bool "Microchip PIC32MZ[DA] Starter Kit"
>> +depends on SOC_PIC32MZDA
>> +help
>> + This supports Microchip PIC32MZ[DA] Starter Kit.
>> +
>> +endchoice
>> +
>> +source "board/microchip/pic32mzda/Kconfig"
>> +
>> endmenu
>> diff --git a/board/microchip/pic32mzda/Kconfig
>> b/board/microchip/pic32mzda/Kconfig
>> new file mode 100644
>> index 000..8acb393
>> --- /dev/null
>> +++ b/board/microchip/pic32mzda/Kconfig
>> @@ -0,0 +1,13 @@
>> +
>> +if TARGET_PIC32MZDASK
>> +
>> +config SYS_BOARD
>> +default "pic32mzda"
>> +
>> +config SYS_VENDOR
>> +default "microchip"
>> +
>> +config SYS_CONFIG_NAME
>> +default "pic32mzdask"
>> +
>> +endif
>> diff --git a/board/microchip/pic32mzda/MAINTAINERS
>> b/board/microchip/pic32mzda/MAINTAINERS
>> new file mode 100644
>> index 000..c934f1a
>> --- /dev/null
>> +++ b/board/microchip/pic32mzda/MAINTAINERS
>> @@ -0,0 +1,6 @@
>> +PIC32MZDASK BOARD
>> +M: Purna Chandra Mandal
>> +S: Maintained
>> +F: board/microchip/pic32mzda/
>> +F: include/configs/pic32mzdask.h
>> +F: configs/pic32mzdask_defconfig
>> diff --git a/board/microchip/pic32mzda/Makefile
>> b/board/microchip/pic32mzda/Makefile
>> new file mode 100644
>> index 000..3629530
>> --- /dev/null
>> +++ b/board/microchip/pic32mzda/Makefile
>> @@ -0,0 +1,7 @@
>> +#
>> +# (C) Copyright 2015
>> +# Purna Chandra Mandal, purna.man...@microchip.com.
>> +#
>> +# SPDX-License-Identifier: GPL-2.0+
>> +#
>> +obj-y := pic32mzda.o
>> diff --git a/board/microchip/pic32mzda/README
>> b/board/microchip/pic32mzda/README
>> new file mode 100644
>> index 000..91d16ab
>> --- /dev/null
>> +++ b/board/microchip/pic32mzda/README
>> @@ -
[U-Boot] [GIT PULL] Microblaze changes
Hi Tom, here are microblaze patches for moving stuff to DM. This is the patch series which we postpone to next release. Buildman doesn't show any problems for mb, zynq_zc702 and zynqmp. Thanks, Michal The following changes since commit d29892ba854f40980b84f86566cd0c2308c66afe: part_dos.c: Don't wrap to negative after 2G sectors (2016-01-13 16:33:20 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git mb for you to fetch changes up to 8283903d4df0685af98a45d323f880ce07c60cec: microblaze: Fix board_init calling sequence (2016-01-14 09:35:04 +0100) Michal Simek (45): microblaze: Remove CONSOLE_ARG microblaze: Move baudrate setting out driver selection serial: uartlite: Move driver to DM serial: uartlite: Add support for debug console serial: uartlite: Add uartlite to Kconfig microblaze: Enable uart16550 DM by default microblaze: Do not print eth device when DM_ETH is enabled microblaze: Enable PHYLIB via Kconfig microblaze: Remove unused I2C macros microblaze: Wire-up debug_uart in asm microblaze: Enable MICREL_KSZ9021 net: axi_emac: Fix parentheses around operand ! net: axi_emac: Show phy address instead of register content net: axi_emac: Pass directly pointer to register space net: axi_emac: Put iobase to private structure net: axi_emac: Pass private structure to phyread/phywrite net: axi_emac: Pass private structure where possible net: axi_emac: Move driver to DM net: axi_emac: Enable access to MDIO in probe net: axi_emac: Split recv from free_pkt net: axi_emac: Rename start, stop, write_hwaddr functions net: Add axi emac to Kconfig net: emaclite: Remove ancient OF probe function net: emaclite: Add MDIO support to driver net: emaclite: Convert MDIO to use register offset net: emaclite: Use indirect register access for tx_ping/pong net: emaclite: Use indirect register access for rx_ping/pong net: emaclite: Use indirect register access for TX reset net: emaclite: Fix logic around available TX buffers net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flag net: emaclite: Use indirect reg access in send net: emaclite: Use indirect access in emaclite_recv net: emaclite: Move driver to DM net: emaclite: Rename start and stop functions net: emaclite: Let core to handle received packet net: emaclite: Move emaclite to Kconfig microblaze: Enable axi emac via Kconfig microblaze: Move eth configuration to Kconfig microblaze: Remove systemace from board file microblaze: Remove CONFIG_FIT from board file microblaze: Move CONFIG_NETCONSOLE to Kconfig microblaze: Remove empty file - cpu.c microblaze: Read information about RAM from DT microblaze: Enable HUSH via Kconfig microblaze: Fix board_init calling sequence arch/microblaze/Kconfig | 1 + arch/microblaze/cpu/Makefile | 2 +- arch/microblaze/cpu/cpu.c| 9 -- arch/microblaze/cpu/start.S | 4 + board/xilinx/microblaze-generic/microblaze-generic.c | 39 +-- board/xilinx/microblaze-generic/xparameters.h| 21 board/xilinx/zynq/board.c| 24 common/cmd_bdinfo.c | 2 +- configs/microblaze-generic_defconfig | 14 +++ doc/device-tree-bindings/serial/xilinx_uartlite.txt | 13 +++ doc/driver-model/serial-howto.txt| 1 - drivers/net/Kconfig | 16 +++ drivers/net/xilinx_axi_emac.c| 280 - drivers/net/xilinx_emaclite.c| 610 +++-- drivers/serial/Kconfig | 14 +++ drivers/serial/serial_xuartlite.c| 194 ++- include/configs/microblaze-generic.h | 74 +--- include/netdev.h | 5 - 18 files changed, 757 insertions(+), 566 deletions(-) delete mode 100644 arch/microblaze/cpu/cpu.c create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/l
Re: [U-Boot] [PATCH v3 10/14] drivers: mmc: add driver for Microchip PIC32 SDHCI controller.
On 01/13/2016 08:45 PM, Daniel Schwierzeck wrote:
> Am Dienstag, den 12.01.2016, 15:48 +0530 schrieb Purna Chandra Mandal:
>> From: Andrei Pistirica
>>
>> This driver implements platform specific glue and fixups for
>> PIC32 internal SDHCI controller.
>>
>> Signed-off-by: Andrei Pistirica
>> Signed-off-by: Sandeep Sheriker Mallikarjun <
>> sandeepsheriker.mallikar...@microchip.com>
>> Signed-off-by: Purna Chandra Mandal
>>
> Reviewed-by: Daniel Schwierzeck
>
> nits below
>
>> ---
>>
>> Changes in v3:
>> - remove ofdata_to_platdata, and replace platdata with priv
>> - replace pic32_ioremap() with ioremap()
>>
>> Changes in v2:
>> - drop sdhci shared bus configuration (for shared interrupt, clock
>> pins)
>>
>> drivers/mmc/Kconfig | 6 +
>> drivers/mmc/Makefile | 2 +-
>> drivers/mmc/pic32_sdhci.c | 61
>> +++
>> drivers/mmc/sdhci.c | 12 ++
>> 4 files changed, 80 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/mmc/pic32_sdhci.c
>>
>> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
>> index ceae7bc..0b6f54b 100644
>> --- a/drivers/mmc/Kconfig
>> +++ b/drivers/mmc/Kconfig
>> @@ -31,4 +31,10 @@ config SH_SDHI
>> help
>>Support for the on-chip SDHI host controller on
>> SuperH/Renesas ARM SoCs platform
>>
>> +config PIC32_SDHCI
>> +bool "Microchip PIC32 on-chip SDHCI support"
>> +depends on DM_MMC && MACH_PIC32
>> +help
>> + Support for the on-chip SDHCI support on Microchip PIC32
>> platforms.
>> +
>> endmenu
>> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
>> index 5d35705..c9c3e3e 100644
>> --- a/drivers/mmc/Makefile
>> +++ b/drivers/mmc/Makefile
>> @@ -48,4 +48,4 @@ obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
>> else
>> obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
>> endif
>> -
>> +obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
>> diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c
>> new file mode 100644
>> index 000..f8a5a23
>> --- /dev/null
>> +++ b/drivers/mmc/pic32_sdhci.c
>> @@ -0,0 +1,61 @@
>> +/*
>> + * Support of SDHCI for Microchip PIC32 SoC.
>> + *
>> + * Copyright (C) 2015 Microchip Technology Inc.
>> + * Andrei Pistirica
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +static int pic32_sdhci_probe(struct udevice *dev)
>> +{
>> +struct sdhci_host *host = dev_get_priv(dev);
>> +const void *fdt = gd->fdt_blob;
>> +u32 f_min_max[2];
>> +fdt_addr_t addr;
>> +fdt_size_t size;
>> +int ret;
>> +
>> +addr = fdtdec_get_addr_size(fdt, dev->of_offset, "reg",
>> &size);
>> +if (addr == FDT_ADDR_T_NONE)
>> +return -EINVAL;
>> +
>> +host->ioaddr = ioremap(addr, size);
>> +if (!host->ioaddr)
>> +return -EINVAL;
> this check can be dropped. ioremap() always returns a mapped address
Ack. Will drop.
>> +
>> +host->name = (char *)dev->name;
>> +host->quirks= SDHCI_QUIRK_NO_HISPD_BIT;
>> +host->bus_width = fdtdec_get_int(gd->fdt_blob, dev
>> ->of_offset,
>> +"bus-width", 4);
>> +
>> +ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
>> + "clock-freq-min-max", f_min_max,
>> 2);
>> +if (ret) {
>> +printf("sdhci: clock-freq-min-max not found\n");
>> +return ret;
>> +}
>> +
>> +return add_sdhci(host, f_min_max[1], f_min_max[0]);
>> +}
>> +
>> +static const struct udevice_id pic32_sdhci_ids[] = {
>> +{ .compatible = "microchip,pic32mzda-sdhci" },
>> +{ }
>> +};
>> +
>> +U_BOOT_DRIVER(pic32_sdhci_drv) = {
>> +.name = "pic32_sdhci",
>> +.id = UCLASS_MMC,
>> +.of_match = pic32_sdhci_ids,
>> +.probe = pic32_sdhci_probe,
>> +.priv_auto_alloc_size = sizeof(struct sdhci_host),
>> +};
>> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
>> index 02d71b9..f32fe67 100644
>> --- a/drivers/mmc/sdhci.c
>> +++ b/drivers/mmc/sdhci.c
>> @@ -424,6 +424,18 @@ static void sdhci_set_ios(struct mmc *mmc)
>> if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
>> ctrl &= ~SDHCI_CTRL_HISPD;
>>
>> +#if defined(CONFIG_PIC32_SDHCI)
>> +/*
>> +* In PIC32MZ[DA] due to h/w bug SDHCI fails detecting card
>> when JTAG
>> +* is not connected.
>> +* To work-around this problem:
>> +* - set Card_Detect_Signal_Selection bit in
>> SDHCI_Host_Control register
>> +* - clear Card_Detect_Test_Level bit in SDHCI_Host_Control
>> register
>> +*/
>> +ctrl |= SDHCI_CTRL_CD_TEST;
>> +ctrl &= ~SDHCI_CTRL_CD_TEST_INS;
>> +#endif
> I think this could (or should?) be implemented with a new quirks bit
Will add new quirk (SDHCI_QUIRK_TEST_CD) to force CARD_PRESENT using TEST
signals.
It will even help .dts to disable/enable based on its devic
Re: [U-Boot] [PATCH v3 13/14] drivers: net: Add ethernet driver for Microchip PIC32.
On 01/13/2016 09:07 PM, Daniel Schwierzeck wrote:
> Am Dienstag, den 12.01.2016, 15:48 +0530 schrieb Purna Chandra Mandal:
>> This driver implements MAC and MII layer of the ethernet controller.
>> Network data transfer is handled by controller internal DMA engine.
>> Ethernet controller is configurable through device-tree file.
>>
>> Signed-off-by: Purna Chandra Mandal
>>
>>
>> ---
>>
>> Changes in v3:
>> - merge wrappers with eth operation callbacks
>> - read phy address from device-tree
>> - rename functions (e.g. _eth_xyz() with pic32_eth_xyz())
>>
>> Changes in v2: None
>>
>> drivers/net/Kconfig | 7 +
>> drivers/net/Makefile | 1 +
>> drivers/net/pic32_eth.c | 606
>> +++
>> drivers/net/pic32_eth.h | 171 +
>> drivers/net/pic32_mdio.c | 121 ++
>> 5 files changed, 906 insertions(+)
>> create mode 100644 drivers/net/pic32_eth.c
>> create mode 100644 drivers/net/pic32_eth.h
>> create mode 100644 drivers/net/pic32_mdio.c
>>
>> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
>> index ae5e78d..dc49493 100644
>> --- a/drivers/net/Kconfig
>> +++ b/drivers/net/Kconfig
>> @@ -108,4 +108,11 @@ config ZYNQ_GEM
>> help
>>This MAC is present in Xilinx Zynq and ZynqMP SoCs.
>>
>> +config PIC32_ETH
>> +bool "Microchip PIC32 Ethernet Support"
>> +depends on MACH_PIC32
> should be
>
> depends on DM_ETH && MACH_PIC32
> select PHYLIB
ack.
>> +help
>> + This driver implements 10/100 Mbps Ethernet and MAC layer
>> for
>> + Microchip PIC32 microcontrollers.
>> +
>> endif # NETDEVICES
>> diff --git a/drivers/net/Makefile b/drivers/net/Makefile
>> index 150470c..33a81ee 100644
>> --- a/drivers/net/Makefile
>> +++ b/drivers/net/Makefile
>> @@ -72,3 +72,4 @@ obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
>> obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/
>> obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o
>> obj-$(CONFIG_VSC9953) += vsc9953.o
>> +obj-$(CONFIG_PIC32_ETH) += pic32_mdio.o pic32_eth.o
>> diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c
>> new file mode 100644
>> index 000..1cef62e
>> --- /dev/null
>> +++ b/drivers/net/pic32_eth.c
>> @@ -0,0 +1,606 @@
>> +/*
>> + * (c) 2015 Purna Chandra Mandal
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + *
>> + */
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#include "pic32_eth.h"
>> +
>> +#define MAX_RX_BUF_SIZE 1536
>> +#define MAX_RX_DESCRPKTBUFSRX
>> +#define MAX_TX_DESCR2
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +struct pic32eth_dev {
>> +struct eth_dma_desc rxd_ring[MAX_RX_DESCR];
>> +struct eth_dma_desc txd_ring[MAX_TX_DESCR];
>> +u32 rxd_idx; /* index of RX desc to read */
>> +/* regs */
>> +struct pic32_ectl_regs *ectl_regs;
>> +struct pic32_emac_regs *emac_regs;
>> +/* Phy */
>> +struct phy_device *phydev;
>> +phy_interface_t phyif;
>> +u32 phy_addr;
>> +struct gpio_desc rst_gpio;
>> +};
>> +
>> +void __weak board_netphy_reset(void *dev)
>> +{
>> +struct pic32eth_dev *priv = (struct pic32eth_dev *)dev;
> the cast is not necessary
ack. Will remove,
>> +
>> +if (!dm_gpio_is_valid(&priv->rst_gpio))
>> +return;
>> +
>> +/* phy reset */
>> +dm_gpio_set_value(&priv->rst_gpio, 0);
>> +udelay(300);
>> +dm_gpio_set_value(&priv->rst_gpio, 1);
>> +udelay(300);
>> +}
>> +
>> +/* Initialize mii(MDIO) interface, discover which PHY is
>> + * attached to the device, and configure it properly.
>> + */
>> +static int pic32_mii_init(struct pic32eth_dev *priv)
>> +{
>> +struct pic32_ectl_regs *ectl_p = priv->ectl_regs;
>> +struct pic32_emac_regs *emac_p = priv->emac_regs;
>> +
>> +/* board phy reset */
>> +board_netphy_reset(priv);
>> +
>> +/* disable RX, TX & all transactions */
>> +writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p
>> ->con1.clr);
>> +
>> +/* wait till busy */
>> +wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY,
>> false,
>> + CONFIG_SYS_HZ, false);
>> +
>> +/* turn controller ON to access PHY over MII */
>> +writel(ETHCON_ON, &ectl_p->con1.set);
>> +
>> +mdelay(10);
>> +
>> +/* reset MAC */
>> +writel(EMAC_SOFTRESET, &emac_p->cfg1.set); /* reset assert
>> */
>> +mdelay(10);
>> +writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert
>> */
>> +
>> +/* initialize MDIO/MII */
>> +if (priv->phyif == PHY_INTERFACE_MODE_RMII) {
>> +writel(EMAC_RMII_RESET, &emac_p->supp.set);
>> +mdelay(10);
>> +writel(EMAC_RMII_RESET, &emac_p->supp.clr);
>> +}
>> +
>> +return pic32_mdio_init(PIC32_MDIO_NAME, (ulong)&emac_p
>> ->mii);
>> +}
>> +
>> +static int pic32_phy_init(struct pic32eth_dev *priv, struct udevice
>> *dev)
>> +{
>> +struct mii_dev *mii;
>> +
>> +mii = miiphy_get_dev_by_name(PIC32_MDIO_NAM
Re: [U-Boot] [PATCH 01/50] dm: clk: Add support for decoding clocks from the device tree
Hi Simon,
> @@ -12,6 +12,8 @@
> #include
> #include
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> ulong clk_get_rate(struct udevice *dev)
> {
> struct clk_ops *ops = clk_get_ops(dev);
> @@ -62,6 +64,32 @@ int clk_get_id(struct udevice *dev, int args_count,
> uint32_t *args)
> return ops->get_id(dev, args_count, args);
> }
>
> +int clk_get_by_index(struct udevice *dev, int index, struct udevice
> **clk_devp,
> +int *periphp)
This function causes NULL pointer access
if called with clk_devp == NULL.
You can decrease the number of arguments
if this function returns periph ID.
> +{
> + struct fdtdec_phandle_args args;
> + int ret;
> +
> + ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev->of_offset,
> +"clocks", "#clock-cells", 0,
> index,
> +&args);
> + if (ret) {
> + debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
> + __func__, ret);
> + return ret;
> + }
> +
> + ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, clk_devp);
> + if (ret) {
> + debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
> + __func__, ret);
> + return ret;
> + }
> + *periphp = args.args_count > 0 ? args.args[0] : -1;
Do you want to let this function fail against #clock-cells == 0?
This code should be compiled only when OF_CONTROL is on.
--
Best Regards
Masahiro Yamada
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Re: [U-Boot] [PATCH v3 05/14] drivers: gpio: add driver for Microchip PIC32 GPIO controller.
On 01/14/2016 01:40 AM, Simon Glass wrote:
> Hi Puma,
>
> On 12 January 2016 at 03:18, Purna Chandra Mandal
> wrote:
>> In PIC32 GPIO controller is part of PIC32 pin controller.
>> PIC32 has ten independently programmable ports and each with multiple pins.
>> Each of these pins can be configured and used as GPIO, provided they
>> are not in use for other peripherals.
>>
>> Signed-off-by: Purna Chandra Mandal
>>
>> ---
>>
>> Changes in v3:
>> - add check on dev_get_addr()
>>
>> Changes in v2: None
>>
>> drivers/gpio/Kconfig | 7 ++
>> drivers/gpio/Makefile | 2 +-
>> drivers/gpio/pic32_gpio.c | 175
>> ++
>> 3 files changed, 183 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/gpio/pic32_gpio.c
>>
> Reviewed-by: Simon Glass
>
> Just a few nits.
>
>> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
>> index e60e9fd..13e9a6a 100644
>> --- a/drivers/gpio/Kconfig
>> +++ b/drivers/gpio/Kconfig
>> @@ -83,4 +83,11 @@ config VYBRID_GPIO
>> help
>> Say yes here to support Vybrid vf610 GPIOs.
>>
>> +config PIC32_GPIO
>> + bool "Microchip PIC32 GPIO driver"
>> + depends on DM_GPIO
>> + default y if MACH_PIC32
>> + help
>> + Say yes here to support Microchip PIC32 GPIOs.
>> +
>> endmenu
>> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
>> index fb4fd25..845a6d4 100644
>> --- a/drivers/gpio/Makefile
>> +++ b/drivers/gpio/Makefile
>> @@ -46,4 +46,4 @@ obj-$(CONFIG_STM32_GPIO) += stm32_gpio.o
>> obj-$(CONFIG_ZYNQ_GPIO)+= zynq_gpio.o
>> obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
>> obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
>> -
>> +obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
>> diff --git a/drivers/gpio/pic32_gpio.c b/drivers/gpio/pic32_gpio.c
>> new file mode 100644
>> index 000..5b23af4
>> --- /dev/null
>> +++ b/drivers/gpio/pic32_gpio.c
>> @@ -0,0 +1,175 @@
>> +/*
>> + * Copyright (c) 2015 Microchip Technology Inc
>> + * Purna Chandra Mandal
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +/* Peripheral Pin Control */
>> +struct pic32_reg_port {
>> + struct pic32_reg_atomic ansel;
>> + struct pic32_reg_atomic tris;
>> + struct pic32_reg_atomic port;
>> + struct pic32_reg_atomic lat;
>> + struct pic32_reg_atomic open_drain;
>> + struct pic32_reg_atomic cnpu;
>> + struct pic32_reg_atomic cnpd;
>> + struct pic32_reg_atomic cncon;
>> +};
>> +
>> +enum {
>> + MICROCHIP_GPIO_DIR_OUT,
>> + MICROCHIP_GPIO_DIR_IN,
>> + MICROCHIP_GPIOS_PER_BANK = 16,
>> +};
>> +
>> +struct pic32_gpio_priv {
>> + struct pic32_reg_port *regs;
>> + char name[2];
>> +};
>> +
>> +static int pic32_gpio_get_value(struct udevice *dev, unsigned offset)
>> +{
>> + struct pic32_gpio_priv *priv = dev_get_priv(dev);
>> +
>> + return !!(readl(&priv->regs->port.raw) & BIT(offset));
>> +}
>> +
>> +static int pic32_gpio_set_value(struct udevice *dev, unsigned offset,
>> + int value)
>> +{
>> + struct pic32_gpio_priv *priv = dev_get_priv(dev);
>> + int mask = BIT(offset);
>> +
>> + if (value)
>> + writel(mask, &priv->regs->port.set);
>> + else
>> + writel(mask, &priv->regs->port.clr);
>> +
>> + return 0;
>> +}
>> +
>> +static int pic32_gpio_direction(struct udevice *dev, unsigned offset)
>> +{
>> + struct pic32_gpio_priv *priv = dev_get_priv(dev);
>> +
>> + if (readl(&priv->regs->ansel.raw) & BIT(offset))
>> + return -1;
> What does this error mean? Should it be -EPERM? Perhaps add a comment.
It checks whether the pin is still in ANALOG mode. Report error (-EPERM is
better) in case of analog. For GPIO to work the pin has to be in DIGITAL mode
which is configured in _direction_input(), _direction_output() callbacks.
>> +
>> + if (readl(&priv->regs->tris.raw) & BIT(offset))
>> + return MICROCHIP_GPIO_DIR_IN;
>> + else
>> + return MICROCHIP_GPIO_DIR_OUT;
>> +}
>> +
>> +static int pic32_gpio_direction_input(struct udevice *dev, unsigned offset)
>> +{
>> + struct pic32_gpio_priv *priv = dev_get_priv(dev);
>> + int mask = BIT(offset);
>> +
>> + writel(mask, &priv->regs->ansel.clr);
>> + writel(mask, &priv->regs->tris.set);
>> +
>> + return 0;
>> +}
>> +
>> +static int pic32_gpio_direction_output(struct udevice *dev,
>> + unsigned offset, int value)
>> +{
>> + struct pic32_gpio_priv *priv = dev_get_priv(dev);
>> + int mask = BIT(offset);
>> +
>> + writel(mask, &priv->regs->ansel.clr);
>> + writel(mask, &priv->regs->tris.clr);
>> +
>> + pic32_gpio_set_value(dev, offset
Re: [U-Boot] [PATCH v3 13/14] drivers: net: Add ethernet driver for Microchip PIC32.
On 01/13/2016 08:26 PM, Tom Rini wrote: > On Tue, Jan 12, 2016 at 03:48:28PM +0530, Purna Chandra Mandal wrote: > >> This driver implements MAC and MII layer of the ethernet controller. >> Network data transfer is handled by controller internal DMA engine. >> Ethernet controller is configurable through device-tree file. >> >> Signed-off-by: Purna Chandra Mandal > [snip] >> +/* cache operation helper */ >> +#define __dcache_flush(__a, __l) \ >> +flush_dcache_range((ulong)(__a), ((__l) + (ulong)(__a))) >> + >> +#define __dcache_invalidate(__a, __l) \ >> +invalidate_dcache_range((ulong)(__a), ((__l) + (ulong)(__a))) > Why using these helper functions instead of directly? Yes, we may be > casting in some cases and if that's how it must be, so be it (it's how > we're doing it in other drivers). Thanks! Thanks, Will drop these helpers/macros. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 03/14] drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.
On Thu, Jan 14, 2016 at 11:34:27AM +0530, Purna Chandra Mandal wrote: > On 01/13/2016 08:25 PM, Tom Rini wrote: > > > On Tue, Jan 12, 2016 at 03:48:18PM +0530, Purna Chandra Mandal wrote: > > > >> PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers > >> and dividers capable of supplying clock to various controllers > >> on or off-chip. > > [snip] > >> include/dt-bindings/clock/microchip,clock.h| 29 ++ > > Has this been submitted for the kernel and reviewed there as well > > already? Thanks! > > > Clock driver in kernel is under review. > [1] clock driver: https://lkml.org/lkml/2016/1/7/764 > [0] clock binding: https://lkml.org/lkml/2016/1/7/762 > > Please note clock driver in Linux kernel is implemented in more > elaborate/descriptive way - all the sub-modules are individually defined in > device-tree (having "#clock-cells = <0>") and their phandles are directly > referred in clock clients so there was no need of having dt-binding header. Note that we really must have the same DT functional in both cases. So it's fine to have extra nodes that U-Boot doesn't use. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/83xx: fix build failure
Remove duplicated SDRAM_INTERVAL_BSTOPRE from mpc83xx.h, which has been defined in fsl_ddr_sdram.h Signed-off-by: Shengzhou Liu --- include/mpc83xx.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/mpc83xx.h b/include/mpc83xx.h index a6d721a..b5a0bbf 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -1297,7 +1297,6 @@ */ #define SDRAM_INTERVAL_REFINT 0x3FFF #define SDRAM_INTERVAL_REFINT_SHIFT16 -#define SDRAM_INTERVAL_BSTOPRE 0x3FFF #define SDRAM_INTERVAL_BSTOPRE_SHIFT 0 /* -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MAINTAINERS: Update Marvell custodianship
Acked-by: Prafulla Wadaskar Original Message- From: Luka Perkov [mailto:luka.per...@sartura.hr] Sent: Thursday, January 14, 2016 3:55 PM To: Stefan Roese Cc: u-boot@lists.denx.de; Prafulla Wadaskar; Tom Rini Subject: Re: [PATCH] MAINTAINERS: Update Marvell custodianship On Thu, Jan 14, 2016 at 05:05:11AM +0100, Stefan Roese wrote: > Add myself as custodian for the Marvell git repository. Additionally, > add the mach-mvebu directory to the list of files / directories. And > add Armada XP & Armada 38x to the title (not only ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MAINTAINERS: Update Marvell custodianship
On Thu, Jan 14, 2016 at 05:05:11AM +0100, Stefan Roese wrote: > Add myself as custodian for the Marvell git repository. Additionally, > add the mach-mvebu directory to the list of files / directories. And > add Armada XP & Armada 38x to the title (not only kirkwood). Acked-by: Luka Perkov Welcome! Luka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] clk: change the type of return value to long
2016-01-14 5:10 GMT+09:00 Simon Glass : > Hi Masahiro, > > On 12 January 2016 at 00:40, Masahiro Yamada > wrote: >> The comments in include/clk.h state "or -ve error code" for these >> functions, and actually the functions return negative error code >> here and there. Returning unsigned value is not suitable. >> >> Signed-off-by: Masahiro Yamada >> --- >> >> drivers/clk/clk-uclass.c | 8 >> drivers/clk/clk_rk3036.c | 6 +++--- >> drivers/clk/clk_rk3288.c | 6 +++--- >> drivers/clk/clk_sandbox.c | 9 - >> include/clk.h | 16 >> 5 files changed, 22 insertions(+), 23 deletions(-) > > This limits us to about 2GHz which seems a bit dangerous. We are > starting to see things around that level. We can use IS_ERR_VALUE(). > OK, please disregard this patch. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] sunxi: Add support for the I2C controller which is part of the PRCM
From: Jelle van der Waa
Signed-off-by: Jelle van der Waa
[hdego...@redhat.com: Minor cleanups]
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 10 ++
arch/arm/cpu/armv7/sunxi/prcm.c | 12
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 1 +
arch/arm/include/asm/arch-sunxi/gpio.h | 2 ++
arch/arm/include/asm/arch-sunxi/i2c.h | 3 +++
arch/arm/include/asm/arch-sunxi/prcm.h | 2 ++
board/sunxi/Kconfig | 6 ++
board/sunxi/board.c | 6 ++
configs/orangepi_pc_defconfig | 1 +
drivers/i2c/mvtwsi.c| 11 +++
include/configs/sunxi-common.h | 2 +-
11 files changed, 55 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 4501884..1da5455 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -77,6 +77,16 @@ int clock_twi_onoff(int port, int state)
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ if (port == 5) {
+ if (state)
+ prcm_apb0_enable(
+ PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
+ else
+ prcm_apb0_disable(
+ PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
+ return 0;
+ }
+
/* set the apb clock gate for twi */
if (state)
setbits_le32(&ccm->apb2_gate,
diff --git a/arch/arm/cpu/armv7/sunxi/prcm.c b/arch/arm/cpu/armv7/sunxi/prcm.c
index 19b4938..e1d091f 100644
--- a/arch/arm/cpu/armv7/sunxi/prcm.c
+++ b/arch/arm/cpu/armv7/sunxi/prcm.c
@@ -33,3 +33,15 @@ void prcm_apb0_enable(u32 flags)
/* deassert reset for module */
setbits_le32(&prcm->apb0_reset, flags);
}
+
+void prcm_apb0_disable(u32 flags)
+{
+ struct sunxi_prcm_reg *prcm =
+ (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+
+ /* assert reset for module */
+ clrbits_le32(&prcm->apb0_reset, flags);
+
+ /* close the clock for module */
+ clrbits_le32(&prcm->apb0_gate, flags);
+}
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 63b161a..0cdefdc 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -134,6 +134,7 @@
#define SUNXI_RTC_BASE 0x01f0
#define SUNXI_PRCM_BASE0x01f01400
#define SUN6I_CPUCFG_BASE 0x01f01c00
+#define SUNXI_R_TWI_BASE 0x01f02400
#define SUNXI_R_UART_BASE 0x01f02800
#define SUNXI_R_PIO_BASE 0x01f02c00
#define SUN6I_P2WI_BASE0x01f03400
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index a2a9a38..0eca859 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -199,6 +199,8 @@ enum sunxi_gpio_number {
#define SUN6I_GPL1_R_P2WI_SDA 3
#define SUN8I_GPL_R_RSB2
+#define SUN8I_H3_GPL_R_TWI 2
+#define SUN8I_A23_GPL_R_TWI3
#define SUN8I_GPL_R_UART 2
#define SUN9I_GPN_R_RSB3
diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h
b/arch/arm/include/asm/arch-sunxi/i2c.h
index 561cd2b..4dfd313 100644
--- a/arch/arm/include/asm/arch-sunxi/i2c.h
+++ b/arch/arm/include/asm/arch-sunxi/i2c.h
@@ -23,6 +23,9 @@
#ifdef CONFIG_I2C4_ENABLE
#define CONFIG_I2C_MVTWSI_BASE4SUNXI_TWI4_BASE
#endif
+#ifdef CONFIG_R_I2C_ENABLE
+#define CONFIG_I2C_MVTWSI_BASE5 SUNXI_R_TWI_BASE
+#endif
/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
#define CONFIG_SYS_TCLK2400
diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h
b/arch/arm/include/asm/arch-sunxi/prcm.h
index 82ed541..556c1af 100644
--- a/arch/arm/include/asm/arch-sunxi/prcm.h
+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
@@ -236,5 +236,7 @@ struct sunxi_prcm_reg {
};
void prcm_apb0_enable(u32 flags);
+void prcm_apb0_disable(u32 flags);
+
#endif /* __ASSEMBLY__ */
#endif /* _PRCM_H */
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 9d67847..7c69be9 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -363,6 +363,12 @@ config I2C3_ENABLE
See I2C0_ENABLE help text.
endif
+config R_I2C_ENABLE
+ bool "Enable the PRCM I2C/TWI controller"
+ default n
+ ---help---
+ Set this to y to enable the I2C controller which is part of the PRCM.
+
if MACH_SUN7I
config I2C4_ENABLE
bool "Enable I2C/TWI controller 4"
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 386e2e0..1cc39e4 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -422,6 +422,12 @@ void i2c_init_board(void)
clock_twi_onof
[U-Boot] [PATCH 1/2] i2c: mvtwsi: Fix mvtwsi not working on sun6i and newer sunxi SoCs
On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1,
rather then a normal r/w bit which is cleared by writing 0.
Signed-off-by: Hans de Goede
---
drivers/i2c/mvtwsi.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index f20d1b2..698bfc1 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -73,6 +73,17 @@ struct mvtwsi_registers {
#defineMVTWSI_CONTROL_INTEN0x0080
/*
+ * On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1,
+ * on other platforms it is a normal r/w bit which is cleared by writing 0.
+ */
+
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+#defineMVTWSI_CONTROL_CLEAR_IFLG 0x0008
+#else
+#defineMVTWSI_CONTROL_CLEAR_IFLG 0x
+#endif
+
+/*
* Status register values -- only those expected in normal master
* operation on non-10-bit-address devices; whatever status we don't
* expect in nominal conditions (bus errors, arbitration losses,
@@ -189,7 +200,7 @@ static int twsi_start(struct i2c_adapter *adap, int
expected_status)
/* globally set TWSIEN in case it was not */
twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
/* assert START */
- writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
+ writel(twsi_control_flags | MVTWSI_CONTROL_START |
MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for controller to process START */
return twsi_wait(adap, expected_status);
}
@@ -204,7 +215,7 @@ static int twsi_send(struct i2c_adapter *adap, u8 byte, int
expected_status)
/* put byte in data register for sending */
writel(byte, &twsi->data);
/* clear any pending interrupt -- that'll cause sending */
- writel(twsi_control_flags, &twsi->control);
+writel(twsi_control_flags | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for controller to receive byte and check ACK */
return twsi_wait(adap, expected_status);
}
@@ -224,7 +235,7 @@ static int twsi_recv(struct i2c_adapter *adap, u8 *byte)
else
expected_status = MVTWSI_STATUS_DATA_R_NAK;
/* acknowledge *previous state* and launch receive */
- writel(twsi_control_flags, &twsi->control);
+ writel(twsi_control_flags | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for controller to receive byte and assert ACK or NAK */
status = twsi_wait(adap, expected_status);
/* if we did receive expected byte then store it */
@@ -246,7 +257,7 @@ static int twsi_stop(struct i2c_adapter *adap, int status)
/* assert STOP */
control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
- writel(control, &twsi->control);
+ writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
do {
stop_status = readl(&twsi->status);
--
2.5.0
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Re: [U-Boot] [PATCH] MAINTAINERS: Update Marvell custodianship
On Thu, Jan 14, 2016 at 05:05:11AM +0100, Stefan Roese wrote: > Add myself as custodian for the Marvell git repository. Additionally, > add the mach-mvebu directory to the list of files / directories. And > add Armada XP & Armada 38x to the title (not only kirkwood). > > Signed-off-by: Stefan Roese > Cc: Prafulla Wadaskar > Cc: Luka Perkov > Cc: Tom Rini Acked-by: Tom Rini Since that make 3, go ahead and include this in your first pull request :) -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Microblaze changes
On Thu, Jan 14, 2016 at 09:51:32AM +0100, Michal Simek wrote: > Hi Tom, > > here are microblaze patches for moving stuff to DM. This is the patch > series which we postpone to next release. Buildman doesn't show any > problems for mb, zynq_zc702 and zynqmp. It breaks xilinx-ppc440-generic at least 'tho, please fix, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-net
On Wed, Jan 13, 2016 at 02:58:41PM -0600, Joe Hershberger wrote: > Hi Tom, > > On Thu, Jan 7, 2016 at 10:29 AM, Tom Rini wrote: > > On Thu, Jan 07, 2016 at 10:49:51AM +0800, Bin Meng wrote: > >> On Tue, Jan 5, 2016 at 9:18 PM, Tom Rini wrote: > >> > On Tue, Jan 05, 2016 at 12:18:35PM +0800, Bin Meng wrote: > >> >> Hi Tom, > >> >> > >> >> On Mon, Jan 4, 2016 at 10:22 PM, Tom Rini wrote: > >> >> > On Mon, Jan 04, 2016 at 09:48:08PM +0800, Bin Meng wrote: > >> >> >> Hi Dirk, > >> >> >> > >> >> >> On Mon, Jan 4, 2016 at 7:46 PM, Dirk Eibach > >> >> >> wrote: > >> >> >> > Hi Bin, > >> >> >> > > >> >> >> >> ... > >> >> >> >> The simple fix is to change change iocon to a more larger size > >> >> >> >> since > >> >> >> >> it has a 64MB flash. Dirk, can you please comment? > >> >> >> > > >> >> >> > The problem is the flash partition layout, coming from a time where > >> >> >> > u-boot was an order of magnitude smaller :) > >> >> >> > > >> >> >> > >> >> >> I guess so. > >> >> >> > >> >> >> > Updating partition layout in tens of thousands of devices in the > >> >> >> > field > >> >> >> > is not an option for us. > >> >> >> > > >> >> >> > >> >> >> I suspect 256KB won't fit anyway, if trying to make use of these new > >> >> >> U-Boot features,eg: using driver model adds some more footprints too. > >> >> >> So in your deployment, you just upgrade those devices in the field to > >> >> >> latest U-Boot (new version) but not changing partition layout, for > >> >> >> fix > >> >> >> only? > >> >> > > >> >> > I'm not convinced that we shouldn't be able to be useful in 256KB. > >> >> > Sure, a kitchen-sink EVM + config will be large but iocon is a defined > >> >> > production type config. If we can't make this work, I'm going to be > >> >> > worried. I've already gotten some aside pokes about making U-Boot > >> >> > shrink down when you turn stuff off. > >> >> > > >> >> > I want to cycle back to saying that we need to look at ways to > >> >> > work-around the gcc issue that's keeping a bunch of unused strings in > >> >> > the resulting binary. > >> >> > >> >> So, what's our best way to do with this PR? I am worried that since > >> >> this iocon board is already at an edge, any ramdom bug fix (to common > >> >> codes) in the future could be the next victim. > >> > > >> > For this PR, I think we need to push the fdt patch in question out and > >> > for the next release look at splitting up common/fdt_support.c into > >> > logical chunks. > >> > > >> > >> Do anyone volunteer to do this "splitting up common/fdt_support.c into > >> logical chunks"? I still cannot make ELDK work in my env thus cannot > >> make any further investigation :( > > > > I'll put it on my TODO list. I'll leave ELDK support up to the denx > > folks. > > Maybe Bin can make a patch to disable Ethernet on iocon and apply > before the fdt patch? Or would we rather wait on this until you rework > the fdt_support? Or just rebase this pr and apply as is? Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MAINTAINERS: Update Marvell custodianship
On 14.01.2016 14:14, Tom Rini wrote: On Thu, Jan 14, 2016 at 05:05:11AM +0100, Stefan Roese wrote: Add myself as custodian for the Marvell git repository. Additionally, add the mach-mvebu directory to the list of files / directories. And add Armada XP & Armada 38x to the title (not only kirkwood). Signed-off-by: Stefan Roese Cc: Prafulla Wadaskar Cc: Luka Perkov Cc: Tom Rini Acked-by: Tom Rini Since that make 3, go ahead and include this in your first pull request :) Will do. Pull request coming up shortly... Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] SPL_DM_SEQ_ALIAS changes
On Wed, Jan 13, 2016 at 07:47:11PM +0100, Michal Simek wrote: > Hi Tom, > > please pull these 4 patches to your tree. Socfpga changes were Acked-by > Marek and mvebu by Stefan. > > Thanks, > Michal > > The following changes since commit fa85e826c16b9ce1ad302a57e9c4b24db0d8b930: > > Prepare v2016.01 (2016-01-12 09:06:54 -0500) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to fc82edd8440721aadf3bfc784f29a513ad7680be: > > arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs > (2016-01-13 13:20:03 +0100) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v7, 1/2] Fix board init code to respect the C runtime environment
On Wed, Nov 25, 2015 at 05:56:32PM +0100, Albert ARIBAUD wrote: > board_init_f_mem() alters the C runtime environment's > stack it is actually already using. This is not a valid > behaviour within a C runtime environment. > > Split board_init_f_mem into C functions which do not alter > their own stack and always behave properly with respect to > their C runtime environment. > > Signed-off-by: Albert ARIBAUD > Acked-by: Thomas Chou Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] hash.c: Conditionally compile hash_command, static hash_show
On Tue, Jan 05, 2016 at 08:50:01AM -0500, Tom Rini wrote: > The function hash_show is now only called by hash_command, so mark it as > static (and drop from hash.h). We only call hash_command when any of > CONFIG_CMD_CRC32, CONFIG_CMD_SHA1SUM or CONFIG_CMD_HASH are set. Since > hash.c is linked in unconditionally we must take extra care with > functions that bring in read-only strings as these will not be > discarded. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Re-enable setexpr on Raspberry Pi
On Sun, Nov 29, 2015 at 07:30:42PM +0100, Marco Schuster wrote: > This patch re-enables the setexpr command, I don't really understand > why it got excluded in the first place. > > setexpr can be used e.g. to implement failed-boot-counters and > failovers to rescue firmware. > > > Signed-off-by: Marco Schuster Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v7, 2/2] arm: move gd handling outside of C code
On Wed, Nov 25, 2015 at 05:56:33PM +0100, Albert ARIBAUD wrote: > As of gcc 5.2.1 for Thumb-1, it is not possible any > more to assign gd from C code, as gd is mapped to r9, > and r9 may now be saved in the prolog sequence, and > restored in the epilog sequence, of any C functions. > > Therefore arch_setup_gd(), which is supposed to set > r9, may actually have no effect, causing U-Boot to > use a bad address to access GD. > > Fix this by never calling arch_setup_gd() for ARM, > and instead setting r9 in arch/arm/lib/crt0.S, to > the value returned by board_init_f_alloc_reserve(). > > Signed-off-by: Albert ARIBAUD > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,2/3] mmc: store hwpart in the block device
On Mon, Dec 07, 2015 at 11:38:49AM -0700, Stephen Warren wrote: > From: Stephen Warren > > This will allow us to have multiple block device structs each referring > to the same eMMC device, yet different HW partitions. > > For now, there is still a single block device per eMMC device. As before, > this block device always accesses whichever HW partition was most recently > selected. Clients wishing to make use of multiple block devices referring > to different HW partitions can simply take a copy of this block device > once it points at the correct HW partition, and use each one as they wish. > This feature will be used by the next patch. > > In the future, perhaps get_device() could be enhanced to return a > dynamically allocated block device struct, to avoid the client needing to > copy it in order to maintain multiple block devices. However, this would > require all users to be updated to free those block device structs at some > point, which is rather a large change. > > Most callers of mmc_switch_part() wish to permanently switch the default > MMC block device's HW partition. Enhance mmc_switch_part() so that it does > this. This removes the need for callers to do this. However, > common/env_mmc.c needs to save and restore the current HW partition. Make > it do this more explicitly. > > Replace use of mmc_switch_part() with mmc_select_hwpart() in order to > remove duplicate code that skips the call if that HW partition is already > selected. > > Signed-off-by: Stephen Warren > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/3] block: pass block dev not num to read/write/erase()
On Mon, Dec 07, 2015 at 11:38:48AM -0700, Stephen Warren wrote: > From: Stephen Warren > > This will allow the implementation to make use of data in the block_dev > structure beyond the base device number. This will be useful so that eMMC > block devices can encompass the HW partition ID rather than treating this > out-of-band. Equally, the existence of the priv field is crying out for > this patch to exist. > > Signed-off-by: Stephen Warren > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,3/3] ums: support multiple LUNs at once
On Mon, Dec 07, 2015 at 11:38:50AM -0700, Stephen Warren wrote: > From: Stephen Warren > > Extend the ums command to accept a list of block devices. Each of these > will be exported as a separate LUN. An example use-case would be: > > ums 0 mmc 0,0.1,0.2 > > ... which would export LUNs for eMMC 0's user data, boot0, and boot1 HW > partitions. This is useful since it allows the host access to everything > on the eMMC without having to somehow stop the ums command from executing > and restart it with different parameters. > > Signed-off-by: Stephen Warren > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ext4_common.c: Clean up failure cases in alloc_triple_indirect_block
On Thu, Dec 10, 2015 at 04:42:21PM -0500, Tom Rini wrote: > As noted by Coverity, when we have an error in > alloc_triple_indirect_block we will leak ti_pbuff_start_addr as it's not > being freed. Further inspection here shows that we could also leak > ti_cbuff_start_addr in one corner case so free that as well. > > Reported-by: Coverity (CID 131205, 131206) > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,1/3] am335x_evm.h: unsed CONFIG_BOOTDELAY
On Thu, Dec 10, 2015 at 04:46:01PM -0500, Tom Rini wrote: > Now that ti_armv7_common.h uses config_distro_defaults.h we don't need > to include it again and then undef CONFIG_BOOTDELAY > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/3] ti_armv7_common.h: Add CONFIG_CMD_EXT4_WRITE
On Thu, Dec 10, 2015 at 04:46:02PM -0500, Tom Rini wrote: > Given that with config_distro_defaults.h we always have ext4 read > support, add in write support. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] test/fs: error case fixes/enhancements
On Mon, Dec 14, 2015 at 03:01:15PM -0700, Stephen Warren wrote: > From: Stephen Warren > > - Use "mkdir -p" to avoid errors when intermediate directories are > missing. > - Fall back to "dd" when "fallocate" fails. For example, fallocate isn't > supported on ext4. > - Add error checking for test image generation. Without this, the test > simply plows on spewing all kinds of errors which are hard to > immediately root-cause. > > Signed-off-by: Stephen Warren Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 3/3] omap4_panda: Convert to config_distro_bootcmd.h
On Thu, Dec 10, 2015 at 04:46:03PM -0500, Tom Rini wrote: > Based on the am335x_evm conversion, switch to config_distro_bootcmd for > mmc and pxe. Tested with Fedora 23. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 2/3] arm: lpc32xx: switch serial console to driver model
On Sat, Dec 19, 2015 at 11:29:25PM +0200, Vladimir Zapolskiy wrote: > On NXP LPC32xx platform for non-SPL builds the change adds > standard (NS16550) and high-speed UARTs to driver model. > Due to specific of DM NS16550 device description UART clock can not be > got in runtime and by default it is set to 13MHz, if board PERIPH_CLK > is different, this should be specified in board configuration file. > > For SPL builds HSUARTs are disabled and non-DM NS16550 driver is > compiled, if needed. > > The change also updates default configs of devkit3250 and work_92105 > boards to reflect updates in platform files. > > Signed-off-by: Vladimir Zapolskiy > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 1/3] serial: lpc32xx hsuart: port driver to driver model
On Sat, Dec 19, 2015 at 11:29:24PM +0200, Vladimir Zapolskiy wrote: > The change ports NXP LPC32xx 14-clock UART device driver to driver > model. > > Signed-off-by: Vladimir Zapolskiy > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 3/3] arm: lpc32xx: switch SPL builds to driver model
On Sat, Dec 19, 2015 at 11:29:26PM +0200, Vladimir Zapolskiy wrote: > For NXP LPC32xx boards the change enables SPL_DM option, this allows > to use any driver model UART driver in SPL images, hence a restriction > on HSUART in SPL image is removed and well as definitions for non-DM > NS16550 driver, its DM version is used instead. > > Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE > for LPC32xx boards. > > The change adds about 5KB to the resulting SPL image (for devkit3250 > board SPL image is increased from 10672 to 15608 bytes). > > Signed-off-by: Vladimir Zapolskiy > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/2] sniper: Various boot-related env settings, devicetree support
On Wed, Dec 23, 2015 at 11:28:29AM +0100, Paul Kocialkowski wrote: > This adds various env settings for more flexible boot possibilities, including > devicetree support and distro defaults config. > > Signed-off-by: Paul Kocialkowski Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] net: lpc32xx: fix ignored MDIO busy wait status on read
On Sun, Dec 27, 2015 at 05:12:24AM +0200, Vladimir Zapolskiy wrote: > The change fixes PHY write operation, which incorrectly waits for > released busy state before issuing a write operation, this breaks > sequential write/read operation logic, because read operation > starts immediately on request and it completes, when busy state is > gone. > > Instead of adding the second preceding busy state check to read > function, do busy state release check after issuing a write operation, > this method of operation is also recommended by the LPC32xx User's > Manual, see MII Mgmt Indicators Register notes: > > For PHY Write if scan is not used: > 1. Write 0 to MCMD > 2. Write PHY address and register address to MADR > 3. Write data to MWTD > 4. Wait for busy bit to be cleared in MIND > > Reported-by: Alexandre Messier > Signed-off-by: Vladimir Zapolskiy > Tested-by: Alexandre Messier Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,2/2] sniper: Mux configuration cleanup
On Wed, Dec 23, 2015 at 11:28:30AM +0100, Paul Kocialkowski wrote: > This cleans up the mux configuration a bit, setting mmc clock signals to input > enabled and specifying pull-down (0) when pull is not used. > > Signed-off-by: Paul Kocialkowski Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] lpc32xx: devkit3250: update board configuration file
On Sat, Dec 19, 2015 at 11:41:23PM +0200, Vladimir Zapolskiy wrote: > The change updates DevKit3250 board powerd by NXP LPC3250 SoC: > * due to increased resulting U-boot image size give more space to > store loaded and relocated versions, > * add DMA support, which is used by NAND SLC driver, > * add NXP OHCI and PHY drivers to the image, > * add USB, JFFS and FAT commands. > > Signed-off-by: Vladimir Zapolskiy Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, V2] common: cli_simple: use strlcpy instead of strcpy
On Sun, Jan 10, 2016 at 01:01:22PM +0800, Peng Fan wrote: > Report Coverity log: > Destination buffer too small (STRING_OVERFLOW) > string_overflow: You might overrun the 1024 byte destination string > lastcommand by writing 1025 bytes from console_buffer > > Signed-off-by: Peng Fan > Cc: Heiko Schocher > Cc: Simon Glass > Cc: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] common: env_flags: fix loop condition when using env_flags_varaccess_mask
On Tue, Jan 12, 2016 at 05:23:12PM +0800, Peng Fan wrote: > From: Peng Fan > > We should use ARRAY_SIZE, but not sizeof. The size of > env_flags_varaccess_mask is 16bytes, but we only need 4 loops. > If using 16 as the end condition, we may access memory that > not belong to array env_flags_varaccess_mask. > > Signed-off-by: Peng Fan > Cc: Joe Hershberger > Cc: York Sun > Cc: Simon Glass > Cc: Tom Rini > Reviewed-by: Simon Glass > Acked-by: Joe Hershberger Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,v2,resend] cmd_boot: Add a poweroff command
On Wed, Jan 13, 2016 at 07:31:17PM +0100, Hans de Goede wrote: > From: Michael van Slingerland > > Add a 'poweroff' command to boot commands, this only gets enabled if the > board Kconfig does a "select CMD_POWEROFF". > > Signed-off-by: Michael van Slingerland > [hdego...@redhat.com: Make the cmd conditional on a CMD_POWEROFF Kconfig] > Signed-off-by: Hans de Goede Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-marvell/master
Hi Tom, please pull all the pending Marvell patches, mostly Armada XP and 38x related. Thanks, Stefan The following changes since commit d29892ba854f40980b84f86566cd0c2308c66afe: part_dos.c: Don't wrap to negative after 2G sectors (2016-01-13 16:33:20 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-marvell.git for you to fetch changes up to f822d8578ba395d9af1cc315a2fb87b1eed3d355: MAINTAINERS: Update Marvell custodianship (2016-01-14 14:17:36 +0100) Phil Sutter (10): drivers/pci: Fix for debug builds without CONFIG_PCI_ENUM_ONLY README: Review the u-boot porting guide list axp: Fix debugging support in DDR3 write leveling drivers/pci/pci_mvebu: Fix for boards with X4 lanes mvebu: axp: refactor board_sat_r_get() and caller mvebu: Introduce kconfig symbols for SoC variants mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT mvebu: Add rudimental MV78230 support mvebu: Support Synology DS414 mvebu: ds414: Implement Synology specific command set Stefan Roese (34): arm: mvebu/kirkwood: Use common timer functions arm: mvebu: ddr: Fix compilation warning arm: mvebu: Add DM and OF_CONTROL support to SPL spi: kirkwood_spi.c: Prepare for driver model support spi: kirkwood_spi.c: Add driver model support arm: mvebu: Add SPI driver model support arm: mvebu: Add armada-xp-maxbcm.dts for maxbcm board arm: mvebu: armada-388-gp.dts: Add ethernet aliases net: mvneta: Convert to driver model arm: mvebu: Move some defines to common include file arm: mvebu: Add SolidRun ClearFog Armada 38x initial support arm: mvebu: db-mv784mp-gp: Switch from IDE to SATA support arm: mvebu: db-mv784mp-gp: Enable common file-system support arm: mvebu: db-mv784mp-gp: Enable cache command arm: mvebu: Enable L2 cache on Armada XP arm: mvebu: Add v7_outer_cache_disable function for AXP & A38x arm: mvebu: Don't call arch_cpu_init() from SPL at all arm: mvebu: Remove SYS_MALLOC_CLEAR_ON_INIT from DB-MV784MP-GP AXP board arm: mvebu: Don't disable cache at startup on Armada XP at all arm: mvebu: Simplify code in setup_usb_phys() a bit arm: mvebu: Don't use 0 as board ID as its used for the custom boards arm: mvebu: Add support for MV78260 arm: mvebu: Make ECC support configurable on Armada XP arm: mvebu: Don't include "netdev.h" in cpu.c arm: mvebu: Make serdes setup on Armada XP less noisy arm: mvebu: Print CPU and SDRAM frequency upon startup arm: mvebu: Consolidate board Kconfig options into one file arm: mvebu: Move SoC selection (A38X vs AXP) into Kconfig arm: mvebu: Remove leftover Makefile arm: mvebu: Move SAR register defines into header arm: mvebu: Make local structs static const arm: mvebu: Add runtime boot-device detection arm: mvebu: Add runtime detection of UART (xmodem) boot-mode MAINTAINERS: Update Marvell custodianship Tor Krill (1): sata: Add SATA driver with DMA support for Marvell Kirkwood and Armada XP MAINTAINERS|4 +- Makefile | 10 - README | 11 +- arch/arm/Kconfig |9 +- arch/arm/Makefile |2 +- arch/arm/dts/Makefile |5 +- arch/arm/dts/armada-370-xp.dtsi|1 + arch/arm/dts/armada-388-clearfog.dts | 509 ++ arch/arm/dts/armada-388-gp.dts |9 + arch/arm/dts/armada-38x.dtsi |2 + arch/arm/dts/armada-xp-gp.dts |7 + arch/arm/dts/armada-xp-maxbcm.dts | 249 + arch/arm/dts/armada-xp-synology-ds414.dts | 337 +++ arch/arm/dts/armada-xp.dtsi|1 + arch/arm/mach-kirkwood/include/mach/config.h |5 + arch/arm/mach-mvebu/Kconfig| 63 +- arch/arm/mach-mvebu/Makefile |8 +- arch/arm/mach-mvebu/cpu.c | 207 ++-- arch/arm/mach-mvebu/dram.c | 20 +- arch/arm/mach-mvebu/include/mach/config.h | 26 +- arch/arm/mach-mvebu/include/mach/cpu.h | 10 + arch/arm/mach-mvebu/include/mach/soc.h | 63 +- arch/arm/mach-mvebu/lowlevel_spl.S |6 - arch/arm/mach-mvebu/mbus.c |2 +- arch/arm/mach-mvebu/serdes/axp/board_env_spec.h|4 +- .../arm/mach-mvebu/serdes/axp/high_speed_env_lib.c | 88 +- arch/arm/mach-mvebu/spl.c | 87 +- arch/arm/mach-mvebu/timer.c| 136 +-- arch/arm/mach-mvebu/u-boot-spl.lds
[U-Boot] [PATCH 3/3] fpga: Fix compilation warnings
Signed-off-by: Michal Simek
---
common/cmd_fpga.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index 7f99aabf8a5c..8956eb1b654a 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -86,7 +86,7 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const
argv[])
debug("* fpga: cmdline image address = 0x%08lx\n",
(ulong)fpga_data);
}
- debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data);
+ debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
case 3: /* fpga */
dev = (int)simple_strtoul(argv[2], NULL, 16);
@@ -107,13 +107,13 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char
*const argv[])
} else
#endif
{
- fpga_data = (void *)dev;
+ fpga_data = (void *)(uintptr_t)dev;
debug("* fpga: cmdline image addr = 0x%08lx\n",
(ulong)fpga_data);
}
- debug("%s: fpga_data = 0x%x\n",
- __func__, (uint)fpga_data);
+ debug("%s: fpga_data = 0x%lx\n",
+ __func__, (ulong)fpga_data);
dev = FPGA_INVALID_DEVICE; /* reset device num */
}
--
1.9.1
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[U-Boot] [PATCH 2/3] fpga: Add bitstream type BIT_NONE
From: Siva Durga Prasad Paladugu
Add bitstream type BIT_NONE to the bitstream type
enum. This might be useful while loading bitstreams
in respective drivers.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
include/fpga.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/fpga.h b/include/fpga.h
index e0d12981b283..d768fb14171a 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -46,6 +46,7 @@ typedef struct {/* typedef fpga_desc */
typedef enum {
BIT_FULL = 0,
BIT_PARTIAL,
+ BIT_NONE = 0xFF,
} bitstream_type;
/* root function definitions */
--
1.9.1
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[U-Boot] [PATCH 2/2] serial: zynq: Fix address reading from DM
Signed-off-by: Michal Simek
---
drivers/serial/serial_zynq.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 112a7a27b875..e79d997cbab7 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -156,13 +156,8 @@ static int zynq_serial_pending(struct udevice *dev, bool
input)
static int zynq_serial_ofdata_to_platdata(struct udevice *dev)
{
struct zynq_uart_priv *priv = dev_get_priv(dev);
- fdt_addr_t addr;
- addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- priv->regs = (struct uart_zynq *)addr;
+ priv->regs = (struct uart_zynq *)dev_get_addr(dev);
return 0;
}
--
1.9.1
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[U-Boot] [PATCH 1/2] serial: zynq: Extend compatible string list
From: Michal Simek
ZynqMP is using updated core with cdns,uart-r1p12 compatible string.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
drivers/serial/serial_zynq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 3430482f8d8b..112a7a27b875 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -177,6 +177,7 @@ static const struct dm_serial_ops zynq_serial_ops = {
static const struct udevice_id zynq_serial_ids[] = {
{ .compatible = "xlnx,xuartps" },
{ .compatible = "cdns,uart-r1p8" },
+ { .compatible = "cdns,uart-r1p12" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 1/3] fpga: xilinx: Check for substring in device ID validation
From: Siva Durga Prasad Paladugu
Check for substrings in deviceID validation check
so that it can support xa bitstreams also.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
drivers/fpga/xilinx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index c765a74a25e0..d459a2f7a572 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -75,8 +75,8 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t
size,
buffer[i] = *dataptr++;
if (xdesc->name) {
- i = strncmp(buffer, xdesc->name, strlen(xdesc->name));
- if (i) {
+ i = (ulong)strstr(buffer, xdesc->name);
+ if (!i) {
printf("%s: Wrong bitstream ID for this device\n",
__func__);
printf("%s: Bitstream ID %s, current device ID %d/%s\n",
--
1.9.1
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[U-Boot] [PATCH] net: phy: ti: Enable automatic crossover mode
Enable automatic crossover cable detection.
Signed-off-by: Michal Simek
---
drivers/net/phy/ti.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
index 541a57f98028..c3912d52f320 100644
--- a/drivers/net/phy/ti.c
+++ b/drivers/net/phy/ti.c
@@ -41,6 +41,8 @@
/* PHY CTRL bits */
#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
+#define DP83867_MDI_CROSSOVER 5
+#define DP83867_MDI_CROSSOVER_AUTO 2
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
@@ -149,6 +151,7 @@ static int dp83867_config(struct phy_device *phydev)
if (phy_interface_is_rgmii(phydev)) {
ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,
+ (DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) |
(FIFO_DEPTH << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
if (ret)
return ret;
--
1.9.1
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[U-Boot] [PATCH] sdhci: zynq: Remove hardcoded value zero as min frequency
From: Siva Durga Prasad Paladugu
Remove hardcoded value zero as min frequency and
use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ
defined in board config
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
drivers/mmc/zynq_sdhci.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 4fe3da93b206..f21ea524af9f 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -13,6 +13,10 @@
#include
#include
+#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ
+# define CONFIG_ZYNQ_SDHCI_MIN_FREQ0
+#endif
+
static int arasan_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
@@ -22,7 +26,8 @@ static int arasan_sdhci_probe(struct udevice *dev)
SDHCI_QUIRK_BROKEN_R1B;
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
- add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, 0);
+ add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ,
+ CONFIG_ZYNQ_SDHCI_MIN_FREQ);
upriv->mmc = host->mmc;
--
1.9.1
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[U-Boot] [PATCH] net: zynq: Change MDC setup for arm64
MDC setting depends on pclk input clocks which varies across SoC. This driver is used by xilinx zynq and zynqmp SOC. Input clock frequence on silicon is 125MHz where divider 64 put frequency below 2.5MHz requires by spec (125/64=1.95). Signed-off-by: Michal Simek --- drivers/net/zynq_gem.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 7059c8432a34..a9cebccfbb5d 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -56,7 +56,11 @@ DECLARE_GLOBAL_DATA_PTR; #define ZYNQ_GEM_NWCFG_SPEED1000 0x00400 /* 1Gbps operation */ #define ZYNQ_GEM_NWCFG_FDEN0x2 /* Full Duplex mode */ #define ZYNQ_GEM_NWCFG_FSREM 0x2 /* FCS removal */ +#ifdef CONFIG_ARM64 +#define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x00010 /* Div pclk by 64, max 160MHz */ +#else #define ZYNQ_GEM_NWCFG_MDCCLKDIV 0xc /* Div pclk by 48, max 120MHz */ +#endif #ifdef CONFIG_ARM64 # define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] mmc: sdhci: Clear high speed if not supported
From: Siva Durga Prasad Paladugu Clear high speed bit if it was not supported by the driver. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Emil Lenchak Signed-off-by: Michal Simek --- drivers/mmc/sdhci.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 02d71b934409..ff770b16e27a 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -530,6 +530,10 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) if (caps & SDHCI_CAN_DO_8BIT) host->cfg.host_caps |= MMC_MODE_8BIT; } + + if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) + host->cfg.host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz); + if (host->host_caps) host->cfg.host_caps |= host->host_caps; -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] mmc: zynq_sdhci: Added qurik to disable high speed
From: Siva Durga Prasad Paladugu Add quirk to disable high speed incase the high speed was broken.This solves the issue where the the controller is used in High Speed Mode and the the hold time requirement for the JEDEC/MMC 4.41 specification is NOT met. This timing issue is not on all boards and hence provided config option to enable it when required. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Emil Lenchak Signed-off-by: Michal Simek --- drivers/mmc/zynq_sdhci.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index f21ea524af9f..039ec16e91fe 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -24,6 +24,11 @@ static int arasan_sdhci_probe(struct udevice *dev) host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B; + +#ifdef CONFIG_ZYNQ_HISPD_BROKEN + host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; +#endif + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/9] ARM: zynq: Remove memory division by 2 for ECC case
For ECC case u-boot divided memory by 2 because one u-boot could be used
for both cases when ECC is off or on.
Remove this division and make sure that dts file contain the correct
memory size when ECC is enabled.
Signed-off-by: Michal Simek
---
arch/arm/mach-zynq/ddrc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c
index 5b20accbcb17..d74f8dbbc45d 100644
--- a/arch/arm/mach-zynq/ddrc.c
+++ b/arch/arm/mach-zynq/ddrc.c
@@ -42,8 +42,6 @@ void zynq_ddrc_init(void)
*/
/* cppcheck-suppress nullPointer */
memset((void *)0, 0, 1 * 1024 * 1024);
-
- gd->ram_size /= 2;
} else {
puts("ECC disabled ");
}
--
1.9.1
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[U-Boot] [PATCH 3/9] ARM: zynq: Define sys prompt for all Zynq boards
From: Siva Durga Prasad Paladugu Define CONFIG_SYS_PROMPT for all Zynq boards It was removed by: "kconfig: add config option for shell prompt" (sha1: 181bd9dc61d2da88b78f1c1138a685dae39354d6) Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- configs/zynq_microzed_defconfig| 1 + configs/zynq_picozed_defconfig | 1 + configs/zynq_zc702_defconfig | 1 + configs/zynq_zc706_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm011_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + configs/zynq_zybo_defconfig| 1 + 10 files changed, 10 insertions(+) diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index e577c931735e..221c5a88d1bc 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 7d52d8e941b7..302d17f96885 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y CONFIG_TARGET_ZYNQ_PICOZED=y CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed" CONFIG_SPL=y +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 9d1b40d76ef6..0ae6c1b13017 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index bba91dfdfa78..7ce067a0e4b1 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 96f0a794a382..4519abcae738 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010" +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index b0c535e88e19..371241f0e08b 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011" +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 7fb03eb0491b..e08220b69449 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" +CONFIG_SYS_PROMPT="Zynq> " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 67665127b5ba..c906af9cb9a8 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013" +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 058bb05ba658..074c6430e3ce 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 231483e3dbd3..b51a6779a1db 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/9] ARM: zynq: Do not select options if SPL is not enabled
Zynq setups some default options for SPL but not all targets are enabling SPL. Signed-off-by: Michal Simek --- arch/arm/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9bd6cf1d807d..8c6c35bb0f43 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -551,15 +551,15 @@ config ARCH_ZYNQ select CPU_V7 select SUPPORT_SPL select OF_CONTROL - select SPL_OF_CONTROL + select SPL_OF_CONTROL if SPL select DM select DM_ETH - select SPL_DM + select SPL_DM if SPL select DM_MMC select DM_SPI select DM_SERIAL select DM_SPI_FLASH - select SPL_SEPARATE_BSS + select SPL_SEPARATE_BSS if SPL config ARCH_ZYNQMP bool "Support Xilinx ZynqMP Platform" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/9] ARM: zynq: Enable SPI_FLASH for zc770 xm013 platform
From: Michal Simek Enable SPI flash. Signed-off-by: Michal Simek Signed-off-by: Michal Simek --- configs/zynq_zc770_xm013_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index c906af9cb9a8..f3401af94b53 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -13,4 +13,5 @@ CONFIG_SYS_PROMPT="Zynq> " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y CONFIG_ZYNQ_GEM=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/9] ARM: zynq: Fix all remaining zynq platform to use stdout-path
Fix console setup for all remaining zynq boards.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynq-zc770-xm010.dts | 5 ++---
arch/arm/dts/zynq-zc770-xm011.dts | 5 ++---
arch/arm/dts/zynq-zc770-xm012.dts | 5 ++---
arch/arm/dts/zynq-zc770-xm013.dts | 5 ++---
4 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts
b/arch/arm/dts/zynq-zc770-xm010.dts
index 07e2b7a7387d..b6982c0c45da 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -21,9 +21,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
diff --git a/arch/arm/dts/zynq-zc770-xm011.dts
b/arch/arm/dts/zynq-zc770-xm011.dts
index 77e3bb0e6310..ae54519630bf 100644
--- a/arch/arm/dts/zynq-zc770-xm011.dts
+++ b/arch/arm/dts/zynq-zc770-xm011.dts
@@ -18,9 +18,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
diff --git a/arch/arm/dts/zynq-zc770-xm012.dts
b/arch/arm/dts/zynq-zc770-xm012.dts
index 3e1769acb51f..3c50b99933fe 100644
--- a/arch/arm/dts/zynq-zc770-xm012.dts
+++ b/arch/arm/dts/zynq-zc770-xm012.dts
@@ -20,9 +20,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts
b/arch/arm/dts/zynq-zc770-xm013.dts
index 288e24837479..5077cdbc3e46 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -20,9 +20,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart0;
- stdout-path = &uart0;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
--
1.9.1
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[U-Boot] [PATCH 5/9] ARM: zynq: Move FLASH_BAR to Kconfig
Clean up config and use Kconfig more. Signed-off-by: Michal Simek --- configs/zynq_zc702_defconfig | 1 + configs/zynq_zc706_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + include/configs/zynq-common.h | 1 - 6 files changed, 5 insertions(+), 1 deletion(-) diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 0ae6c1b13017..0ede96f4405b 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 7ce067a0e4b1..4a8c7de7294f 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 4519abcae738..0b583c3850ab 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -14,6 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index f3401af94b53..b1de8efdec54 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -14,4 +14,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 074c6430e3ce..9ba4d0ea5c54 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 0ab60839b6cf..e8c3ef0c3872 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -66,7 +66,6 @@ #ifdef CONFIG_ZYNQ_QSPI # define CONFIG_SF_DEFAULT_SPEED 3000 # define CONFIG_SPI_FLASH_ISSI -# define CONFIG_SPI_FLASH_BAR # define CONFIG_CMD_SF #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 9/9] ARM: zynq: Move spi node to aligned location
From: Michal Simek
Keep nodes aligned.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
arch/arm/dts/zynq-zc770-xm011.dts | 12 ++--
arch/arm/dts/zynq-zc770-xm012.dts | 12 ++--
arch/arm/dts/zynq-zc770-xm013.dts | 30 +++---
3 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/arch/arm/dts/zynq-zc770-xm011.dts
b/arch/arm/dts/zynq-zc770-xm011.dts
index ae54519630bf..4fed2215365c 100644
--- a/arch/arm/dts/zynq-zc770-xm011.dts
+++ b/arch/arm/dts/zynq-zc770-xm011.dts
@@ -33,12 +33,6 @@
};
};
-&spi0 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
-};
-
&can0 {
status = "okay";
};
@@ -53,6 +47,12 @@
};
};
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+};
+
&uart1 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynq-zc770-xm012.dts
b/arch/arm/dts/zynq-zc770-xm012.dts
index 3c50b99933fe..8d69f0e0f5ef 100644
--- a/arch/arm/dts/zynq-zc770-xm012.dts
+++ b/arch/arm/dts/zynq-zc770-xm012.dts
@@ -30,12 +30,6 @@
};
};
-&spi1 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
-};
-
&can1 {
status = "okay";
};
@@ -60,6 +54,12 @@
};
};
+&spi1 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+};
+
&uart1 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts
b/arch/arm/dts/zynq-zc770-xm013.dts
index 5077cdbc3e46..77fdfcc00947 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -30,21 +30,6 @@
};
};
-&spi0 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
- eeprom: at25@0 {
- at25,byte-len = <8192>;
- at25,addr-mode = <2>;
- at25,page-size = <32>;
-
- compatible = "atmel,at25";
- reg = <2>;
- spi-max-frequency = <100>;
- };
-};
-
&can1 {
status = "okay";
};
@@ -73,6 +58,21 @@
};
};
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+ eeprom: at25@0 {
+ at25,byte-len = <8192>;
+ at25,addr-mode = <2>;
+ at25,page-size = <32>;
+
+ compatible = "atmel,at25";
+ reg = <2>;
+ spi-max-frequency = <100>;
+ };
+};
+
&uart0 {
u-boot,dm-pre-reloc;
status = "okay";
--
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[U-Boot] [PATCH 6/9] ARM: zynq: Clean DTSI coding style
From: Michal Simek
Fix minor indentation problems.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
arch/arm/dts/zynq-7000.dtsi | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 83be51ae9df6..2d786f0fd15d 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -234,7 +234,7 @@
interrupt-parent = <&intc>;
interrupts = <0 24 4>;
reg = <0xe010 0x1000>;
- } ;
+ };
sdhci1: sdhci@e0101000 {
compatible = "arasan,sdhci-8.9a";
@@ -244,7 +244,7 @@
interrupt-parent = <&intc>;
interrupts = <0 47 4>;
reg = <0xe0101000 0x1000>;
- } ;
+ };
slcr: slcr@f800 {
#address-cells = <1>;
@@ -326,11 +326,11 @@
scutimer: timer@f8f00600 {
interrupt-parent = <&intc>;
- interrupts = < 1 13 0x301 >;
+ interrupts = <1 13 0x301>;
compatible = "arm,cortex-a9-twd-timer";
- reg = < 0xf8f00600 0x20 >;
+ reg = <0xf8f00600 0x20>;
clocks = <&clkc 4>;
- } ;
+ };
usb0: usb@e0002000 {
compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
--
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[U-Boot] [PATCH 01/23] ARM64: zynqmp: ep: Define minimum sdhci frequency for ep
From: Siva Durga Prasad Paladugu Define minimum sdhci frequency for ep, as not defining it causes the divisor to be 2048 as per sd version but keeping clock very low on ep causes command failures. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp_ep.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index ec39211af3db..ed7ae177bc9b 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -17,6 +17,7 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 5200 +#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9) #define CONFIG_ZYNQ_I2C0 #define CONFIG_SYS_I2C_ZYNQ #define CONFIG_ZYNQ_EEPROM -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/9] ARM: zynq: Fix defconfig for zybo
Change possition of SPI_FLASH to by align with savedefconfig. Signed-off-by: Michal Simek --- configs/zynq_zybo_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index b51a6779a1db..83149eb22565 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -12,11 +12,11 @@ CONFIG_SYS_PROMPT="Zynq> " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=5000 -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_SPANSION=y CONFIG_ZYNQ_QSPI=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 05/23] ARM64: zynqmp: Fix coding style in phy node
From: Michal Simek
Trivial fix.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-ep108.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts
index 4481bd07c9e8..754604ea7251 100644
--- a/arch/arm/dts/zynqmp-ep108.dts
+++ b/arch/arm/dts/zynqmp-ep108.dts
@@ -41,7 +41,7 @@
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@0{
+ phy0: phy@0 {
reg = <0>;
max-speed = <100>;
};
--
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[U-Boot] [PATCH 04/23] ARM64: zynqmp: Add initial support for the first silicon
Add basic configuration for the first silicon. Signed-off-by: Michal Simek --- arch/arm/cpu/armv8/zynqmp/clk.c | 4 +++- arch/arm/cpu/armv8/zynqmp/cpu.c | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c index 40bd2ca213a8..690c72dd6683 100644 --- a/arch/arm/cpu/armv8/zynqmp/clk.c +++ b/arch/arm/cpu/armv8/zynqmp/clk.c @@ -21,9 +21,11 @@ unsigned long get_uart_clk(int dev_id) return 48000; case ZYNQMP_CSU_VERSION_EP108: return 2500; + case ZYNQMP_CSU_VERSION_QEMU: + return 13300; } - return 13300; + return 1; } unsigned long zynqmp_get_system_timer_freq(void) diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 45b49dc0182e..c71f29152dee 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -38,9 +38,11 @@ unsigned int zynqmp_get_silicon_version(void) return ZYNQMP_CSU_VERSION_VELOCE; case 5000: return ZYNQMP_CSU_VERSION_QEMU; + case 400: + return ZYNQMP_CSU_VERSION_EP108; } - return ZYNQMP_CSU_VERSION_EP108; + return ZYNQMP_CSU_VERSION_SILICON; } #ifndef CONFIG_SYS_DCACHE_OFF -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/23] ARM64: zynqmp: Use the same U-Boot version with/without ATF
Remove SECURE_IOU option which is not needed. U-Boot itself can detect
which EL level it is on and based on that use do platform setup.
It also simplify usage because one Kconfig entry is gone.
Signed-off-by: Michal Simek
---
arch/arm/cpu/armv8/zynqmp/Kconfig | 4
arch/arm/cpu/armv8/zynqmp/clk.c | 16
arch/arm/cpu/armv8/zynqmp/cpu.c | 14 ++
arch/arm/include/asm/arch-zynqmp/clk.h | 1 +
arch/arm/include/asm/arch-zynqmp/hardware.h | 24
board/xilinx/zynqmp/zynqmp.c| 17 +
6 files changed, 64 insertions(+), 12 deletions(-)
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig
b/arch/arm/cpu/armv8/zynqmp/Kconfig
index e5a4fdd0fda0..9a19dfa77f79 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -20,10 +20,6 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "xilinx_zynqmp_ep" if TARGET_ZYNQMP_EP
-config SECURE_IOU
- bool "Configure ZynqMP secure IOU"
- default n
-
config ZYNQMP_USB
bool "Configure ZynqMP USB"
diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c
index 9218586e94a3..40bd2ca213a8 100644
--- a/arch/arm/cpu/armv8/zynqmp/clk.c
+++ b/arch/arm/cpu/armv8/zynqmp/clk.c
@@ -26,6 +26,22 @@ unsigned long get_uart_clk(int dev_id)
return 13300;
}
+unsigned long zynqmp_get_system_timer_freq(void)
+{
+ u32 ver = zynqmp_get_silicon_version();
+
+ switch (ver) {
+ case ZYNQMP_CSU_VERSION_VELOCE:
+ return 1;
+ case ZYNQMP_CSU_VERSION_EP108:
+ return 400;
+ case ZYNQMP_CSU_VERSION_QEMU:
+ return 5000;
+ }
+
+ return 1;
+}
+
#ifdef CONFIG_CLOCKS
/**
* set_cpu_clk_info() - Initialize clock framework
diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c
index f90cca36aa72..45b49dc0182e 100644
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c
@@ -15,8 +15,22 @@
DECLARE_GLOBAL_DATA_PTR;
+static unsigned int zynqmp_get_silicon_version_secure(void)
+{
+ u32 ver;
+
+ ver = readl(&csu_base->version);
+ ver &= ZYNQMP_SILICON_VER_MASK;
+ ver >>= ZYNQMP_SILICON_VER_SHIFT;
+
+ return ver;
+}
+
unsigned int zynqmp_get_silicon_version(void)
{
+ if (current_el() == 3)
+ return zynqmp_get_silicon_version_secure();
+
gd->cpu_clk = get_tbclk();
switch (gd->cpu_clk) {
diff --git a/arch/arm/include/asm/arch-zynqmp/clk.h
b/arch/arm/include/asm/arch-zynqmp/clk.h
index d55bc31c4399..b18333d1ca25 100644
--- a/arch/arm/include/asm/arch-zynqmp/clk.h
+++ b/arch/arm/include/asm/arch-zynqmp/clk.h
@@ -9,5 +9,6 @@
#define _ASM_ARCH_CLK_H_
unsigned long get_uart_clk(int dev_id);
+unsigned long zynqmp_get_system_timer_freq(void);
#endif /* _ASM_ARCH_CLK_H_ */
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h
b/arch/arm/include/asm/arch-zynqmp/hardware.h
index bbf89d9dd746..5f4cfe3b6b68 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -41,11 +41,8 @@ struct crlapb_regs {
#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
-#if defined(CONFIG_SECURE_IOU)
-#define ZYNQMP_IOU_SCNTR 0xFF26
-#else
+#define ZYNQMP_IOU_SCNTR_SECURE0xFF26
#define ZYNQMP_IOU_SCNTR 0xFF25
-#endif
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2
@@ -57,6 +54,14 @@ struct iou_scntr {
#define iou_scntr ((struct iou_scntr *)ZYNQMP_IOU_SCNTR)
+struct iou_scntr_secure {
+ u32 counter_control_register;
+ u32 reserved0[7];
+ u32 base_frequency_id_register;
+};
+
+#define iou_scntr_secure ((struct iou_scntr_secure *)ZYNQMP_IOU_SCNTR_SECURE)
+
/* Bootmode setting values */
#define BOOT_MODES_MASK0x000F
#define SD_MODE0x0003
@@ -106,9 +111,20 @@ struct apu_regs {
#define apu_base ((struct apu_regs *)ZYNQMP_APU_BASEADDR)
/* Board version value */
+#define ZYNQMP_CSU_BASEADDR0xFFCA
#define ZYNQMP_CSU_VERSION_SILICON 0x0
#define ZYNQMP_CSU_VERSION_EP108 0x1
#define ZYNQMP_CSU_VERSION_VELOCE 0x2
#define ZYNQMP_CSU_VERSION_QEMU0x3
+#define ZYNQMP_SILICON_VER_MASK0xF000
+#define ZYNQMP_SILICON_VER_SHIFT 12
+
+struct csu_regs {
+ u32 reserved0[17];
+ u32 version;
+};
+
+#define csu_base ((struct csu_regs *)ZYNQMP_CSU_BASEADDR)
+
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 2cf47125d433..63c332f03dc2 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -28,10 +29,18 @@ int board_early_init_r(vo
[U-Boot] [PATCH 02/23] ARM64: zynqmp: Remove incorrect link to common config file
Link to zynqmp common file is incorrect. Fix it by removing the whole link because it is visible from the file where to look at it. Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp_ep.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index ed7ae177bc9b..23a69db0c823 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -1,7 +1,5 @@ /* - * Configuration for Xilinx ZynqMP emulation - * platforms. See zynqmp-common.h for ZynqMP - * common configs + * Configuration for Xilinx ZynqMP emulation platforms * * (C) Copyright 2014 - 2015 Xilinx, Inc. * Michal Simek -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/23] ARM64: zynqmp: Modify the SD and QSPI bootmode values
From: Siva Durga Prasad Paladugu
Modify the SD bootmode value to 0x3 as per latest
spec. Also add new boot mode QSPI 32 bit boot mode
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
arch/arm/include/asm/arch-zynqmp/hardware.h | 3 +++
board/xilinx/zynqmp/zynqmp.c| 7 +++
2 files changed, 10 insertions(+)
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h
b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 5f4cfe3b6b68..5eec999d5f32 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -64,7 +64,10 @@ struct iou_scntr_secure {
/* Bootmode setting values */
#define BOOT_MODES_MASK0x000F
+#define QSPI_MODE_24BIT0x0001
+#define QSPI_MODE_32BIT0x0002
#define SD_MODE0x0003
+#define NAND_MODE 0x0004
#define EMMC_MODE 0x0006
#define JTAG_MODE 0x
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 63c332f03dc2..cf8d6a4a51db 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -83,6 +83,13 @@ int board_late_init(void)
bootmode = reg & BOOT_MODES_MASK;
switch (bootmode) {
+ case JTAG_MODE:
+ setenv("modeboot", "netboot");
+ break;
+ case QSPI_MODE_24BIT:
+ case QSPI_MODE_32BIT:
+ setenv("modeboot", "qspiboot");
+ break;
case SD_MODE:
case EMMC_MODE:
setenv("modeboot", "sdboot");
--
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[U-Boot] [PATCH 06/23] ARM64: zynqmp: Correct the watchdog timer interrupt number
From: Punnaiah Choudary Kalluri Corrected the watchdog timer interrupt number. Origin value was for CSUPMU watchdog. Signed-off-by: Punnaiah Choudary Kalluri Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 24a34e6d85d2..f4b94014de8b 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -559,7 +559,7 @@ compatible = "cdns,wdt-r1p2"; status = "disabled"; interrupt-parent = <&gic>; - interrupts = <0 52 1>; + interrupts = <0 113 1>; reg = <0x0 0xfd4d 0x1000>; timeout-sec = <10>; }; -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/23] ARM64: zynqmp: Add support for SD1 boot mode
SD1 boot mode is using different bootmode values.
Add support for this mode used on DC1.
Signed-off-by: Michal Simek
---
arch/arm/include/asm/arch-zynqmp/hardware.h | 3 ++-
board/xilinx/zynqmp/zynqmp.c| 6 ++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h
b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 5eec999d5f32..587938249e8f 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -66,7 +66,8 @@ struct iou_scntr_secure {
#define BOOT_MODES_MASK0x000F
#define QSPI_MODE_24BIT0x0001
#define QSPI_MODE_32BIT0x0002
-#define SD_MODE0x0003
+#define SD_MODE0x0003 /* sd 0 */
+#define SD_MODE1 0x0005 /* sd 1 */
#define NAND_MODE 0x0004
#define EMMC_MODE 0x0006
#define JTAG_MODE 0x
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index cf8d6a4a51db..6bdec205a773 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -94,6 +94,12 @@ int board_late_init(void)
case EMMC_MODE:
setenv("modeboot", "sdboot");
break;
+ case SD_MODE1:
+ setenv("modeboot", "sdboot1");
+ break;
+ case NAND_MODE:
+ setenv("modeboot", "nandboot");
+ break;
default:
printf("Invalid Boot Mode:0x%x\n", bootmode);
break;
--
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[U-Boot] [PATCH 07/23] ARM64: zynqmp: DT: Fix UART compatible string
From: Soren Brinkmann
ZynqMP has r1p12 not r1p8. r1p12 contains break detection support.
Signed-off-by: Soren Brinkmann
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index f4b94014de8b..8733604a5738 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -520,7 +520,7 @@
};
uart0: serial@ff00 {
- compatible = "cdns,uart-r1p8";
+ compatible = "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 21 4>;
@@ -529,7 +529,7 @@
};
uart1: serial@ff01 {
- compatible = "cdns,uart-r1p8";
+ compatible = "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 22 4>;
--
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[U-Boot] [PATCH 10/23] ARM64: zynqmp: Show information about bootmode
Showing information about bootmode is very useful to make sure
that correct bootmode is selected.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 6bdec205a773..9c176d01c430 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -82,22 +82,28 @@ int board_late_init(void)
reg = readl(&crlapb_base->boot_mode);
bootmode = reg & BOOT_MODES_MASK;
+ puts("Bootmode: ");
switch (bootmode) {
case JTAG_MODE:
- setenv("modeboot", "netboot");
+ puts("JTAG_MODE\n");
+ setenv("modeboot", "jtagboot");
break;
case QSPI_MODE_24BIT:
case QSPI_MODE_32BIT:
setenv("modeboot", "qspiboot");
+ puts("QSPI_MODE\n");
break;
case SD_MODE:
case EMMC_MODE:
+ puts("SD_MODE\n");
setenv("modeboot", "sdboot");
break;
case SD_MODE1:
+ puts("SD_MODE1\n");
setenv("modeboot", "sdboot1");
break;
case NAND_MODE:
+ puts("NAND_MODE\n");
setenv("modeboot", "nandboot");
break;
default:
--
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[U-Boot] [PATCH 12/23] ARM64: zynqmp: Fix bootmode SD_MODE1
When only sdhci1 IP is enabled and SD_MODE1 bootmode is selected
U-Boot using sdboot1 variable which refers to mmc dev 1.
But this device doesn't exist because only one controller is available.
This patch fix logic around sdboot mode with using sdbootdev internal
variable.
Reported-by: Chris Kohn
Acked-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c| 5 -
include/configs/xilinx_zynqmp.h | 6 --
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index a1d3fef24e8e..ac2362532590 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -103,7 +103,10 @@ int board_late_init(void)
break;
case SD_MODE1:
puts("SD_MODE1\n");
- setenv("modeboot", "sdboot1");
+#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
+ setenv("sdbootdev", "1");
+#endif
+ setenv("modeboot", "sdboot");
break;
case NAND_MODE:
puts("NAND_MODE\n");
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 03f74508efea..2d9f020f50d7 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -156,8 +156,10 @@
"kernel_addr=0x8\0" \
"fdt_addr=0x700\0" \
"fdt_high=0x1000\0" \
- "sdboot=mmcinfo && load mmc 0:0 $fdt_addr system.dtb && " \
- "load mmc 0:0 $kernel_addr Image && booti $kernel_addr -
$fdt_addr\0" \
+ "sdbootdev=0\0"\
+ "sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid
$fdt_addr system.dtb && " \
+ "load mmc $sdbootdev:$partid $kernel_addr Image && " \
+ "booti $kernel_addr - $fdt_addr\0" \
DFU_ALT_INFO
#define CONFIG_BOOTARGS"setenv bootargs
console=ttyPS0,${baudrate} " \
--
1.9.1
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[U-Boot] [PATCH 15/23] ARM64: zynqmp: Move memory setup to board file
Setup memory size for ep108 in ep108 config file.
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp.h| 5 -
include/configs/xilinx_zynqmp_ep.h | 5 +
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index f6a36a3fabdd..ac68998aeb90 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -23,11 +23,6 @@
#define GICD_BASE 0xF901
#define GICC_BASE 0xF902
-/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_SYS_SDRAM_SIZE 0x4000
-
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc
diff --git a/include/configs/xilinx_zynqmp_ep.h
b/include/configs/xilinx_zynqmp_ep.h
index 23a69db0c823..0204d2c59320 100644
--- a/include/configs/xilinx_zynqmp_ep.h
+++ b/include/configs/xilinx_zynqmp_ep.h
@@ -23,6 +23,11 @@
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR}
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0
+#define CONFIG_SYS_SDRAM_SIZE 0x4000
+
#include
#endif /* __CONFIG_ZYNQMP_EP_H */
--
1.9.1
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[U-Boot] [PATCH 13/23] ARM64: zynqmp: Remove unneeded timer_init function
Empty weak function is used instead.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index ac2362532590..1a837897194e 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -57,11 +57,6 @@ int dram_init(void)
return 0;
}
-int timer_init(void)
-{
- return 0;
-}
-
void reset_cpu(ulong addr)
{
}
--
1.9.1
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[U-Boot] [PATCH 14/23] ARM64: zynqmp: Enable advance memory test by default
Temp space in at the beginning of OCM. Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 2d9f020f50d7..f6a36a3fabdd 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -28,6 +28,9 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_SDRAM_SIZE 0x4000 +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc + #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 11/23] ARM64: zynqmp: Differentiate EMMC boot mode
Show also EMMC bootmode if selected. There is difference compare to SD
bootmode. Use the same bootcommand till better boot command is created.
Reported-by: Sai Pavan Boddu
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 9c176d01c430..a1d3fef24e8e 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -93,8 +93,11 @@ int board_late_init(void)
setenv("modeboot", "qspiboot");
puts("QSPI_MODE\n");
break;
- case SD_MODE:
case EMMC_MODE:
+ puts("EMMC_MODE\n");
+ setenv("modeboot", "sdboot");
+ break;
+ case SD_MODE:
puts("SD_MODE\n");
setenv("modeboot", "sdboot");
break;
--
1.9.1
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[U-Boot] [PATCH 17/23] ARM64: zynqmp: Allow overwrite identification string
Keep default option there but allow overwrite it. Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index dcd7552bd1ad..5008722bf4ce 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -35,7 +35,9 @@ /* Cache Definitions */ #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_IDENT_STRING" Xilinx ZynqMP" +#if !defined(CONFIG_IDENT_STRING) +# define CONFIG_IDENT_STRING " Xilinx ZynqMP" +#endif #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x7fff0) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 20/23] ARM64: zynqmp: Modify the autoboot commands
From: Siva Durga Prasad Paladugu Modify DFU commands to use latest kernel offsets and sizes as per modified partitions in the linux device tree. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 20bb359cdebd..0e5e28b41683 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -140,8 +140,8 @@ #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "set dfu_alt_info " \ - "Image ram 0x20 0x180;" \ - "system.dtb ram 0x700 0x4\0" \ + "Image ram $kernel_addr $kernel_size;" \ + "system.dtb ram $fdt_addr $fdt_size\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" @@ -158,6 +158,8 @@ "kernel_addr=0x8\0" \ "fdt_addr=0x700\0" \ "fdt_high=0x1000\0" \ + "kernel_size=0x200\0" \ + "fdt_size=0x8\0" \ "sdbootdev=0\0"\ "sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \ "load mmc $sdbootdev:$partid $kernel_addr Image && " \ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 19/23] ARM64: zynqmp: Include GbE speed/duplex detection
Get right speed/duplex via mii info. Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index eae1a4988b07..20bb359cdebd 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -195,6 +195,7 @@ # define CONFIG_PHY_MARVELL # define CONFIG_PHY_NATSEMI # define CONFIG_PHY_TI +# define CONFIG_PHY_GIGE #endif /* I2C */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 18/23] ARM64: zynqmp: Enable NATSEMI phys
Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 5008722bf4ce..eae1a4988b07 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -193,6 +193,7 @@ # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_PHY_MARVELL +# define CONFIG_PHY_NATSEMI # define CONFIG_PHY_TI #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 21/23] ARM64: zynqmp: Dont use shortcut for setenv
From: Siva Durga Prasad Paladugu Dont use shortcut command for setenv as it wont work now due introduction of new command setexpr. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 0e5e28b41683..862f3e6f978c 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -139,7 +139,7 @@ #define CONFIG_THOR_RESET_OFF #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ - "set dfu_alt_info " \ + "setenv dfu_alt_info " \ "Image ram $kernel_addr $kernel_size;" \ "system.dtb ram $fdt_addr $fdt_size\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 16/23] ARM64: zynqmp: Setup correct COUNTER_FREQUENCY for silicon
When U-Boot runs from EL3 system timer is setup based on this macro. Software default freq for silicon is 100MHz but enable opton to rewrite it. Emulation platform is using 4MHz. Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h| 4 +++- include/configs/xilinx_zynqmp_ep.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ac68998aeb90..dcd7552bd1ad 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -43,7 +43,9 @@ #define CONFIG_OF_LIBFDT /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ -#define COUNTER_FREQUENCY 400 +#if !defined(COUNTER_FREQUENCY) +# define COUNTER_FREQUENCY 1 +#endif /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x200) diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index 0204d2c59320..9906c426f50f 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -28,6 +28,8 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_SDRAM_SIZE 0x4000 +#define COUNTER_FREQUENCY 400 + #include #endif /* __CONFIG_ZYNQMP_EP_H */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 23/23] ARM64: zynqmp: Define auto negotiation timeout
From: Siva Durga Prasad Paladugu Define auto negotiation timeout as 20secs the default 4secs might not be sufficient always and hence defined for worst case. It is observed that autoneg takes moretime if connected to outside network and hence increase it to 20secs. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 899dd3ad46be..27ef74daf50f 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -196,6 +196,7 @@ # define CONFIG_PHY_NATSEMI # define CONFIG_PHY_TI # define CONFIG_PHY_GIGE +# define PHY_ANEG_TIMEOUT 2 #endif /* I2C */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Microblaze changes
Hi Ricardo, On 14.1.2016 14:17, Tom Rini wrote: > On Thu, Jan 14, 2016 at 09:51:32AM +0100, Michal Simek wrote: > >> Hi Tom, >> >> here are microblaze patches for moving stuff to DM. This is the patch >> series which we postpone to next release. Buildman doesn't show any >> problems for mb, zynq_zc702 and zynqmp. > > It breaks xilinx-ppc440-generic at least 'tho, please fix, thanks! The reason for this break is moving serial driver to DM. Can you please tell us when you move platform to DM? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 22/23] ARM64: zynqmp: Do not setup bootargs
From: Michal Simek
Bootargs will be taken from DTS files.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 862f3e6f978c..899dd3ad46be 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -166,8 +166,6 @@
"booti $kernel_addr - $fdt_addr\0" \
DFU_ALT_INFO
-#define CONFIG_BOOTARGS"setenv bootargs
console=ttyPS0,${baudrate} " \
- "earlycon=cdns,mmio,0xff00,${baudrate}n8"
#define CONFIG_PREBOOT "run bootargs"
#define CONFIG_BOOTCOMMAND "run $modeboot"
#define CONFIG_BOOTDELAY 5
--
1.9.1
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[U-Boot] [PATCH 2/2] powerpc/SECURE_BOOT: Add PAMU driver
PAMU driver basic support for usage in Secure Boot.
In secure boot PAMU is not in bypass mode. Hence to use
any peripheral (SEC Job ring in our case), PAMU has to be
configured.
The Header file pamu.h and few functions in driver have been derived
from Freescale Libos.
Signed-off-by: Ruchika Gupta
Signed-off-by: Aneesh Bansal
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 +
arch/powerpc/cpu/mpc8xxx/Makefile | 1 +
arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 449 ++
arch/powerpc/cpu/mpc8xxx/pamu_table.c | 57 +
arch/powerpc/include/asm/fsl_pamu.h | 169 +
arch/powerpc/include/asm/immap_85xx.h | 18 ++
drivers/crypto/fsl/jr.c | 23 ++
7 files changed, 726 insertions(+)
create mode 100644 arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
create mode 100644 arch/powerpc/cpu/mpc8xxx/pamu_table.c
create mode 100644 arch/powerpc/include/asm/fsl_pamu.h
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index c738c96..50bb86a 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -30,6 +30,10 @@
#ifdef CONFIG_FSL_CAAM
#include
#endif
+#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)
+#include
+#include
+#endif
#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
#include
#include
@@ -933,6 +937,11 @@ int cpu_init_r(void)
fman_enet_init();
#endif
+#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)
+ if (pamu_init() < 0)
+ fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT);
+#endif
+
#ifdef CONFIG_FSL_CAAM
sec_init();
#endif
diff --git a/arch/powerpc/cpu/mpc8xxx/Makefile
b/arch/powerpc/cpu/mpc8xxx/Makefile
index ac45e0e..c5592cd 100644
--- a/arch/powerpc/cpu/mpc8xxx/Makefile
+++ b/arch/powerpc/cpu/mpc8xxx/Makefile
@@ -24,5 +24,6 @@ obj-$(CONFIG_OF_LIBFDT) += fdt.o
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_SYS_SRIO) += srio.o
obj-$(CONFIG_FSL_LAW) += law.o
+obj-$(CONFIG_FSL_CORENET) += fsl_pamu.o pamu_table.o
endif
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
new file mode 100644
index 000..8dee2e7
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
@@ -0,0 +1,449 @@
+/*
+ * FSL PAMU driver
+ *
+ * Copyright 2012-2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+struct paace *ppaact;
+struct paace *sec;
+unsigned long fspi;
+
+static inline int __ilog2_roundup_64(uint64_t val)
+{
+ if ((val & (val - 1)) == 0)
+ return __ilog2_u64(val);
+ else
+ return __ilog2_u64(val) + 1;
+}
+
+
+static inline int count_lsb_zeroes(unsigned long val)
+{
+ return ffs(val) - 1;
+}
+
+static unsigned int map_addrspace_size_to_wse(uint64_t addrspace_size)
+{
+ /* window size is 2^(WSE+1) bytes */
+ return count_lsb_zeroes(addrspace_size >> PAMU_PAGE_SHIFT) +
+ PAMU_PAGE_SHIFT - 1;
+}
+
+static unsigned int map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)
+{
+ /* window count is 2^(WCE+1) bytes */
+ return count_lsb_zeroes(subwindow_cnt) - 1;
+}
+
+static void pamu_setup_default_xfer_to_host_ppaace(struct paace *ppaace)
+{
+ set_bf(ppaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_PRIMARY);
+ set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
+ PAACE_M_COHERENCE_REQ);
+}
+
+static void pamu_setup_default_xfer_to_host_spaace(struct paace *spaace)
+{
+ set_bf(spaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_SECONDARY);
+ set_bf(spaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
+ PAACE_M_COHERENCE_REQ);
+}
+
+/** Sets up PPAACE entry for specified liodn
+ *
+ * @param[in] liodn Logical IO device number
+ * @param[in] win_addr starting address of DSA window
+ * @param[in] win-size size of DSA window
+ * @param[in] omiOperation mapping index -- if ~omi == 0 then omi
+ not defined
+ * @param[in] stashidcache stash id for associated cpu -- if ~stashid == 0
+ then stashid not defined
+ * @param[in] snoopidsnoop id for hardware coherency -- if ~snoopid == 0
+ then snoopid not defined
+ * @param[in] subwin_cnt number of sub-windows
+ *
+ * @return Returns 0 upon success else error code < 0 returned
+ */
+static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,
+ uint64_t win_size, uint32_t omi,
+ uint32_t snoopid, uint32_t stashid,
+ uint32_t subwin_cnt)
+{
+ struct paace *ppaace;
+
+ if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE)
+ return -1;
+
+ if (win_addr & (win_size - 1))
+ return -2;
+
+ if (liodn > NUM_PPAACT_ENTRIES) {
+ printf("Entries in PPACT not sufficient\n");
+ return -3;
+ }
+
+ ppaace =
[U-Boot] [PATCH] ls2-2085ardb: Correct the model name of ls2085ardb
From: Ashish Kumar
Signed-off-by: Ashish Kumar
---
arch/arm/dts/fsl-ls2080a-rdb.dts |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2080a-rdb.dts b/arch/arm/dts/fsl-ls2080a-rdb.dts
index 1a1813b..71d1969 100644
--- a/arch/arm/dts/fsl-ls2080a-rdb.dts
+++ b/arch/arm/dts/fsl-ls2080a-rdb.dts
@@ -11,7 +11,7 @@
#include "fsl-ls2080a.dtsi"
/ {
- model = "Freescale Layerscape 2080a RDB Board";
+ model = "Freescale Layerscape 2085a RDB Board";
compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
aliases {
--
1.7.6.GIT
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[U-Boot] [PATCH] ls2-2085ardb: Correct the model name of ls2085ardb
From: Ashish Kumar
Signed-off-by: Ashish Kumar
---
arch/arm/dts/fsl-ls2080a-rdb.dts |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2080a-rdb.dts b/arch/arm/dts/fsl-ls2080a-rdb.dts
index 1a1813b..71d1969 100644
--- a/arch/arm/dts/fsl-ls2080a-rdb.dts
+++ b/arch/arm/dts/fsl-ls2080a-rdb.dts
@@ -11,7 +11,7 @@
#include "fsl-ls2080a.dtsi"
/ {
- model = "Freescale Layerscape 2080a RDB Board";
+ model = "Freescale Layerscape 2085a RDB Board";
compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
aliases {
--
1.7.6.GIT
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[U-Boot] [PATCH 1/2] Revert "powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot"
This reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3.
Signed-off-by: Aneesh Bansal
CC: Ruchika Gupta
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 +
arch/powerpc/include/asm/immap_85xx.h | 1 -
2 files changed, 1 insertion(+), 9 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 13a7d0f..c738c96 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -425,8 +425,7 @@ void fsl_erratum_a007212_workaround(void)
ulong cpu_init_f(void)
{
extern void m8560_cpm_reset (void);
-#if defined(CONFIG_SYS_DCSRBAR_PHYS) || \
- (defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET))
+#ifdef CONFIG_SYS_DCSRBAR_PHYS
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
#endif
#if defined(CONFIG_SECURE_BOOT)
@@ -458,12 +457,6 @@ ulong cpu_init_f(void)
#if defined(CONFIG_SYS_CPC_REINIT_F)
disable_cpc_sram();
#endif
-
-#if defined(CONFIG_FSL_CORENET)
- /* Put PAMU in bypass mode */
- out_be32(&gur->pamubypenr, FSL_CORENET_PAMU_BYPASS);
-#endif
-
#endif
#ifdef CONFIG_CPM2
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 101b8db..667a97e 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1933,7 +1933,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
u8 res24[64];
u32 pblsr; /* Preboot loader status */
u32 pamubypenr; /* PAMU bypass enable */
-#define FSL_CORENET_PAMU_BYPASS0x
u32 dmacr1; /* DMA control */
u8 res25[4];
u32 gensr1; /* General status */
--
1.8.1.4
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[U-Boot] [PATCH] ls2-2085a: Increase default hugepage count
From: Ashish Kumar * Increase default hugepage count to 256 from 16 * Note: default env variables are stored at 0x58020/0x58420 of size 0x2000 Signed-off-by: Ashish Kumar --- include/configs/ls2080a_common.h |2 +- include/configs/ls2080ardb.h |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 4ae7d11..a503934 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -272,7 +272,7 @@ unsigned long long get_qixis_addr(void); #define CONFIG_BOOTARGS"console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500" \ "ramdisk_size=0x200 default_hugepagesz=2m" \ - " hugepagesz=2m hugepages=16" + " hugepagesz=2m hugepages=256" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 10 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 116dbcd..356d254 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -333,7 +333,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_BOOTARGS"console=ttyS1,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0600" \ "ramdisk_size=0x200 default_hugepagesz=2m" \ - " hugepagesz=2m hugepages=16" + " hugepagesz=2m hugepages=256" /* MAC/PHY configuration */ #ifdef CONFIG_FSL_MC_ENET -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 43/50] rockchip: pinctrl: Reduce the size for SPL
Hi Simon
I think the best way to reduce SPL size is to jump back to boot rom.
Which don't require eMMC, SD card driver in SPL any more. Even clock
and pinctrl driver is not required. All we need is DDR initialization.
We should do as little thing as possible in SPL and let U-boot take
care others.
Thanks
Eddie
2016-01-14 7:25 GMT+08:00 Simon Glass :
> This file has many features that are not needed by SPL. Use #ifdef to
> remove the unused features and reduce the code size.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/pinctrl/rockchip/pinctrl_rk3288.c | 20 +---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
> b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
> index 0e7721e..53b8cf2 100644
> --- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
> +++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
> @@ -158,6 +158,7 @@ static void pinctrl_rk3288_i2c_config(struct rk3288_grf
> *grf,
> GPIO0_C0_MASK << GPIO0_C0_SHIFT,
> GPIO0_C0_I2C0PMU_SCL << GPIO0_C0_SHIFT);
> break;
> +#ifndef CONFIG_SPL_BUILD
> case PERIPH_ID_I2C1:
> rk_clrsetreg(&grf->gpio8a_iomux,
> GPIO8A4_MASK << GPIO8A4_SHIFT |
> @@ -194,12 +195,14 @@ static void pinctrl_rk3288_i2c_config(struct rk3288_grf
> *grf,
> GPIO7C4_MASK << GPIO7C4_SHIFT,
> GPIO7C4_I2C5HDMI_SCL << GPIO7C4_SHIFT);
> break;
> +#endif
> default:
> debug("i2c id = %d iomux error!\n", i2c_id);
> break;
> }
> }
>
> +#ifndef CONFIG_SPL_BUILD
> static void pinctrl_rk3288_lcdc_config(struct rk3288_grf *grf, int lcd_id)
> {
> switch (lcd_id) {
> @@ -219,11 +222,13 @@ static void pinctrl_rk3288_lcdc_config(struct
> rk3288_grf *grf, int lcd_id)
> break;
> }
> }
> +#endif
>
> static int pinctrl_rk3288_spi_config(struct rk3288_grf *grf,
> enum periph_id spi_id, int cs)
> {
> switch (spi_id) {
> +#ifndef CONFIG_SPL_BUILD
> case PERIPH_ID_SPI0:
> switch (cs) {
> case 0:
> @@ -260,6 +265,7 @@ static int pinctrl_rk3288_spi_config(struct rk3288_grf
> *grf,
> GPIO7B5_SPI1_CSN0 << GPIO7B5_SHIFT |
> GPIO7B4_SPI1_CLK << GPIO7B4_SHIFT);
> break;
> +#endif
> case PERIPH_ID_SPI2:
> switch (cs) {
> case 0:
> @@ -297,6 +303,7 @@ err:
> static void pinctrl_rk3288_uart_config(struct rk3288_grf *grf, int uart_id)
> {
> switch (uart_id) {
> +#ifndef CONFIG_SPL_BUILD
> case PERIPH_ID_UART_BT:
> rk_clrsetreg(&grf->gpio4c_iomux,
> GPIO4C3_MASK << GPIO4C3_SHIFT |
> @@ -319,6 +326,7 @@ static void pinctrl_rk3288_uart_config(struct rk3288_grf
> *grf, int uart_id)
> GPIO5B1_UART1BB_SOUT << GPIO5B1_SHIFT |
> GPIO5B0_UART1BB_SIN << GPIO5B0_SHIFT);
> break;
> +#endif
> case PERIPH_ID_UART_DBG:
> rk_clrsetreg(&grf->gpio7ch_iomux,
> GPIO7C7_MASK << GPIO7C7_SHIFT |
> @@ -326,6 +334,7 @@ static void pinctrl_rk3288_uart_config(struct rk3288_grf
> *grf, int uart_id)
> GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
> GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
> break;
> +#ifndef CONFIG_SPL_BUILD
> case PERIPH_ID_UART_GPS:
> rk_clrsetreg(&grf->gpio7b_iomux,
> GPIO7B2_MASK << GPIO7B2_SHIFT |
> @@ -349,6 +358,7 @@ static void pinctrl_rk3288_uart_config(struct rk3288_grf
> *grf, int uart_id)
> GPIO5B6_UART4EXP_SOUT << GPIO5B6_SHIFT |
> GPIO5B7_UART4EXP_SIN << GPIO5B7_SHIFT);
> break;
> +#endif
> default:
> debug("uart id = %d iomux error!\n", uart_id);
> break;
> @@ -393,6 +403,7 @@ static void pinctrl_rk3288_sdmmc_config(struct rk3288_grf
> *grf, int mmc_id)
> }
> }
>
> +#ifndef CONFIG_SPL_BUILD
> static void pinctrl_rk3288_hdmi_config(struct rk3288_grf *grf, int hdmi_id)
> {
> switch (hdmi_id) {
> @@ -407,6 +418,7 @@ static void pinctrl_rk3288_hdmi_config(struct rk3288_grf
> *grf, int hdmi_id)
> break;
> }
> }
> +#endif
>
> static int rk3288_pinctrl_request(struct udevice *dev, int func, int flags)
> {
> @@ -441,17 +453,19 @@ static int rk3288_pinctrl_request(struct udevice *dev,
> int func, int flags)
> case PERIPH_ID_UART4:
> pinctrl_rk3288_uart_config(priv->grf, func);
> break;
> +#ifndef CONFIG_SPL_BUILD
> case PERIPH_ID_LCDC0:
> case PERIPH
[U-Boot] [PATCH] ls2-2085a: Increase default hugepage count
From: Ashish Kumar * Increase default hugepage count to 256 from 16 * Note: default env variables are stored at 0x58020/0x58420 of size 0x2000 Signed-off-by: Ashish Kumar --- include/configs/ls2080a_common.h |2 +- include/configs/ls2080ardb.h |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 4ae7d11..a503934 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -272,7 +272,7 @@ unsigned long long get_qixis_addr(void); #define CONFIG_BOOTARGS"console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500" \ "ramdisk_size=0x200 default_hugepagesz=2m" \ - " hugepagesz=2m hugepages=16" + " hugepagesz=2m hugepages=256" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 10 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 116dbcd..356d254 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -333,7 +333,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_BOOTARGS"console=ttyS1,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0600" \ "ramdisk_size=0x200 default_hugepagesz=2m" \ - " hugepagesz=2m hugepages=16" + " hugepagesz=2m hugepages=256" /* MAC/PHY configuration */ #ifdef CONFIG_FSL_MC_ENET -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ls2-2085a: Increase default hugepage count
* Increase default hugepage count to 256 from 16 * Note: default env variables are stored at 0x58020/0x58420 of size 0x2000 Signed-off-by: Ashish Kumar --- include/configs/ls2080a_common.h |2 +- include/configs/ls2080ardb.h |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 4ae7d11..a503934 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -272,7 +272,7 @@ unsigned long long get_qixis_addr(void); #define CONFIG_BOOTARGS"console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500" \ "ramdisk_size=0x200 default_hugepagesz=2m" \ - " hugepagesz=2m hugepages=16" + " hugepagesz=2m hugepages=256" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 10 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 116dbcd..356d254 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -333,7 +333,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_BOOTARGS"console=ttyS1,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0600" \ "ramdisk_size=0x200 default_hugepagesz=2m" \ - " hugepagesz=2m hugepages=16" + " hugepagesz=2m hugepages=256" /* MAC/PHY configuration */ #ifdef CONFIG_FSL_MC_ENET -- 1.7.6.GIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ls2-2085ardb: Correct the model name of ls2085ardb
Signed-off-by: Ashish Kumar
---
arch/arm/dts/fsl-ls2080a-rdb.dts |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2080a-rdb.dts b/arch/arm/dts/fsl-ls2080a-rdb.dts
index 1a1813b..71d1969 100644
--- a/arch/arm/dts/fsl-ls2080a-rdb.dts
+++ b/arch/arm/dts/fsl-ls2080a-rdb.dts
@@ -11,7 +11,7 @@
#include "fsl-ls2080a.dtsi"
/ {
- model = "Freescale Layerscape 2080a RDB Board";
+ model = "Freescale Layerscape 2085a RDB Board";
compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
aliases {
--
1.7.6.GIT
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Re: [U-Boot] [PATCH v3 13/14] drivers: net: Add ethernet driver for Microchip PIC32.
Am Donnerstag, den 14.01.2016, 15:35 +0530 schrieb Purna Chandra
Mandal:
> On 01/13/2016 09:07 PM, Daniel Schwierzeck wrote:
>
> > Am Dienstag, den 12.01.2016, 15:48 +0530 schrieb Purna Chandra
> > Mandal:
> > > This driver implements MAC and MII layer of the ethernet
> > > controller.
> > > Network data transfer is handled by controller internal DMA
> > > engine.
> > > Ethernet controller is configurable through device-tree file.
> > >
> > > Signed-off-by: Purna Chandra Mandal
> > >
> > >
> > > ---
> > >
> > > Changes in v3:
> > > - merge wrappers with eth operation callbacks
> > > - read phy address from device-tree
> > > - rename functions (e.g. _eth_xyz() with pic32_eth_xyz())
> > >
> > > Changes in v2: None
> > >
> > > drivers/net/Kconfig | 7 +
> > > drivers/net/Makefile | 1 +
> > > drivers/net/pic32_eth.c | 606
> > > +++
> > > drivers/net/pic32_eth.h | 171 +
> > > drivers/net/pic32_mdio.c | 121 ++
> > > 5 files changed, 906 insertions(+)
> > > create mode 100644 drivers/net/pic32_eth.c
> > > create mode 100644 drivers/net/pic32_eth.h
> > > create mode 100644 drivers/net/pic32_mdio.c
> > >
> > > diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> > > index ae5e78d..dc49493 100644
> > > --- a/drivers/net/Kconfig
> > > +++ b/drivers/net/Kconfig
> > > @@ -108,4 +108,11 @@ config ZYNQ_GEM
> > > help
> > > This MAC is present in Xilinx Zynq and ZynqMP SoCs.
> > >
> > > +config PIC32_ETH
> > > + bool "Microchip PIC32 Ethernet Support"
> > > + depends on MACH_PIC32
> > should be
> >
> > depends on DM_ETH && MACH_PIC32
> > select PHYLIB
>
> ack.
>
> > > + help
> > > + This driver implements 10/100 Mbps Ethernet and MAC
> > > layer
> > > for
> > > + Microchip PIC32 microcontrollers.
> > > +
> > > endif # NETDEVICES
> > > diff --git a/drivers/net/Makefile b/drivers/net/Makefile
> > > index 150470c..33a81ee 100644
> > > --- a/drivers/net/Makefile
> > > +++ b/drivers/net/Makefile
> > > @@ -72,3 +72,4 @@ obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
> > > obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/
> > > obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o
> > > obj-$(CONFIG_VSC9953) += vsc9953.o
> > > +obj-$(CONFIG_PIC32_ETH) += pic32_mdio.o pic32_eth.o
> > > diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c
> > > new file mode 100644
> > > index 000..1cef62e
> > > --- /dev/null
> > > +++ b/drivers/net/pic32_eth.c
> > > @@ -0,0 +1,606 @@
> > > +/*
> > > + * (c) 2015 Purna Chandra Mandal
> > > + *
> > > + * SPDX-License-Identifier: GPL-2.0+
> > > + *
> > > + */
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +#include "pic32_eth.h"
> > > +
> > > +#define MAX_RX_BUF_SIZE 1536
> > > +#define MAX_RX_DESCR PKTBUFSRX
> > > +#define MAX_TX_DESCR 2
> > > +
> > > +DECLARE_GLOBAL_DATA_PTR;
> > > +
> > > +struct pic32eth_dev {
> > > + struct eth_dma_desc rxd_ring[MAX_RX_DESCR];
> > > + struct eth_dma_desc txd_ring[MAX_TX_DESCR];
> > > + u32 rxd_idx; /* index of RX desc to read */
> > > + /* regs */
> > > + struct pic32_ectl_regs *ectl_regs;
> > > + struct pic32_emac_regs *emac_regs;
> > > + /* Phy */
> > > + struct phy_device *phydev;
> > > + phy_interface_t phyif;
> > > + u32 phy_addr;
> > > + struct gpio_desc rst_gpio;
> > > +};
> > > +
> > > +void __weak board_netphy_reset(void *dev)
> > > +{
> > > + struct pic32eth_dev *priv = (struct pic32eth_dev *)dev;
> > the cast is not necessary
>
> ack. Will remove,
>
> > > +
> > > + if (!dm_gpio_is_valid(&priv->rst_gpio))
> > > + return;
> > > +
> > > + /* phy reset */
> > > + dm_gpio_set_value(&priv->rst_gpio, 0);
> > > + udelay(300);
> > > + dm_gpio_set_value(&priv->rst_gpio, 1);
> > > + udelay(300);
> > > +}
> > > +
> > > +/* Initialize mii(MDIO) interface, discover which PHY is
> > > + * attached to the device, and configure it properly.
> > > + */
> > > +static int pic32_mii_init(struct pic32eth_dev *priv)
> > > +{
> > > + struct pic32_ectl_regs *ectl_p = priv->ectl_regs;
> > > + struct pic32_emac_regs *emac_p = priv->emac_regs;
> > > +
> > > + /* board phy reset */
> > > + board_netphy_reset(priv);
> > > +
> > > + /* disable RX, TX & all transactions */
> > > + writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p
> > > ->con1.clr);
> > > +
> > > + /* wait till busy */
> > > + wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY,
> > > false,
> > > + CONFIG_SYS_HZ, false);
> > > +
> > > + /* turn controller ON to access PHY over MII */
> > > + writel(ETHCON_ON, &ectl_p->con1.set);
> > > +
> > > + mdelay(10);
> > > +
> > > + /* reset MAC */
> > > + writel(EMAC_SOFTRESET, &emac_p->cfg1.set); /* reset
> > > assert
> > > */
> > > + mdelay(10);
> > > + writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset
> > > deassert
> > > */
> > > +
> > > + /* initialize MDIO/MII */
> > > + if (priv->phyif == PHY_INTE
Re: [U-Boot] [PATCH 1/2] arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL
On Wed, Jan 13, 2016 at 7:06 PM, Marek Vasut wrote: > On Thursday, January 14, 2016 at 03:52:27 AM, Eric Nelson wrote: >> On 01/13/2016 07:50 PM, Marek Vasut wrote: >> > On Thursday, January 14, 2016 at 03:37:09 AM, Eric Nelson wrote: >> >> Hi Marek, >> > >> > Hi! >> > >> >> On 01/13/2016 07:10 PM, Marek Vasut wrote: >> >>> On Tuesday, December 22, 2015 at 04:37:12 PM, Eric Nelson wrote: >> Hi Marek, >> >>> >> >>> Hi Eric, >> >>> >> >>> [..] >> >>> >> >> This should also have parameters of mx6_ddr_sysinfo (input) and >> >> mx6_mmdc_calibration (output), at least for sysinfo->dsize >> > >> > Would it be possible for you to send a subsequent patch(set)? I would >> > like to have this code as a working base , since I tested this >> > thoroughly. If I apply all of your changes, it would basically mean >> > almost complete rewrite of the code and that would disallow me bisect >> > possible bugs introduced by these changes. >> >> I think that's a bit of overstatement, but I'm okay sending patches >> in principle. >> >> I do think that at least the test for calibration failure should be >> fixed before your patch is applied. >> >> This also has the benefit of allowing discussion about each of >> my points individually instead of in one e-mail thread. >> >>> >> >>> I have to admit I'm a bit lost in this. What do you say we ask Stefano >> >>> to apply this so people can start fiddling with it. I'd also like to >> >>> see the patches for MX6SX and your fixes (if you feel like it). >> >> >> >> I'm okay with that. >> >> >> >> I was hoping to check out the error handling code but unfortunately, >> >> the boards I have that are supporting SPL are all either i.MX6DL, >> >> i.MX6S, or i.MX6SL. >> >> >> >> You should be able to force a failure by setting WALAT and/or RALAT >> >> to extreme values and see how the DDR controller responds. >> > >> > I only have Q ;-) The DDR calibration code _should_ work on DL though. >> >> It at least needs a change to some #ifdefs: >> >> +#if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) > > And then you can test it ;-) Have fun, I'm looking forward to improvements :) > I was able to test the auto calibration a couple of weeks ago on a set of boards. I have a mix of boards with IMX6Q/IMX6DL 16/32/64bit 2/4/8Gb density - a pretty broad range. I did find the that a couple of my boards hung during mx6_dram_cfg if I skip writing anything to the calib registers (I made mx6_dram_cfg able to take a null struct mx6_mmc_calibration and call mmdc_do_write_level_calibration() and mmdc_do_dqs_calibration() automatically if null after config). I haven't had time to troubleshoot yet. Its possible I need some initial value for the calib registers or its possible there is a step in the init that should differ if we have not yet calibrated. I am all for committing what we have (as its opt-in) and we can continue to improve/test/troubleshoot. Tim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
