Re: [U-Boot] [PATCH 2/2] armv8/ls1043aqds: use configuarable clock for non-QSPI boot

2016-03-18 Thread Qianyu Gong
Hi York,

在 2016年3月19日,上午12:53,york sun mailto:york@nxp.com>> 写道:

On 03/14/2016 03:06 AM, Gong Qianyu wrote:
For QSPI boot and SD boot with QSPI, we could only read from FPGA
through I2C to get the system clock and DDR clock info. However in
U-Boot booting flow, I2C is not initialized when get_clocks() is
called and thus it couldn't get correct value of the clocks.
So the configuarable clock is only supported by non-QSPI boot.

Signed-off-by: Gong Qianyu mailto:qianyu.g...@nxp.com>>
---
include/configs/ls1043aqds.h | 5 +
1 file changed, 5 insertions(+)

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 158cf02..93671f0 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -29,8 +29,13 @@ unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
#endif

+#if defined(CONFIG_QSPI_BOOT) || (CONFIG_SD_BOOT_QSPI)
#define CONFIG_SYS_CLK_FREQ 1
#define CONFIG_DDR_CLK_FREQ 1
+#else
+#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
+#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
+#endif

#define CONFIG_SKIP_LOWLEVEL_INIT


Qianyu,

Please work with Yuan Yao on qixis access. We may have a solution to get the
clocks on QSPI boot.

York

Yes. I have been discussing with Yuan Yao these days.
Yesterday we tried to initialize i2c by writing several related registers and 
finally
verified on LS2080AQDS board. Seems that this way is feasible and simple
enough for us to read FPGA earlier.
Then I’ll send a new version of this patch.


Regards,
Qianyu



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[U-Boot] [PATCH v3 1/2] flash: add device ID for Microchip PIC32 internal flash.

2016-03-18 Thread Purna Chandra Mandal
Microchip PIC32 has internal parallel flash (non-CFI compliant).
These flash devices do not support any identifier command so no
standard IDs. Added unique IDs to seperate these flash devices
from others supported by U-Boot.

Signed-off-by: Purna Chandra Mandal 
---

Changes in v3: None
Changes in v2: None

 include/flash.h | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/flash.h b/include/flash.h
index f53ace7..c9aacd5 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -400,6 +400,9 @@ extern flash_info_t *flash_get_info(ulong base);
 #define FLASH_STM800DT 0x00D7  /* STM M29W800DT (1M = 64K x 16, top)   
*/
 #define FLASH_STM800DB 0x005B  /* STM M29W800DB (1M = 64K x 16, 
bottom)*/
 
+#define FLASH_MCHP100T 0x0060  /* MCHP internal (1M = 64K x 16) */
+#define FLASH_MCHP100B 0x0061  /* MCHP internal (1M = 64K x 16) */
+
 #define FLASH_28F400_T 0x0062  /* MT  28F400B3 ID (  4M = 256K x 16 )  
*/
 #define FLASH_28F400_B 0x0063  /* MT  28F400B3 ID (  4M = 256K x 16 )  
*/
 
@@ -486,7 +489,7 @@ extern flash_info_t *flash_get_info(ulong base);
 #define FLASH_MAN_SHARP 0x0050
 #define FLASH_MAN_ATM  0x0060
 #define FLASH_MAN_CFI  0x0100
-
+#define FLASH_MAN_MCHP 0x0200  /* Microchip Technology */
 
 #define FLASH_TYPEMASK 0x  /* extract FLASH type   information 
*/
 #define FLASH_VENDMASK 0x  /* extract FLASH vendor information 
*/
-- 
1.8.3.1

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[U-Boot] [PATCH v4 2/4] drivers: remove writes{b, w, l, q} and reads{b, w, l, q}.

2016-03-18 Thread Purna Chandra Mandal
Definition of writes{bwlq}, reads{bwlq} are now added into arch specific
asm/io.h. So removing them from drivers to fix re-definition error

Signed-off-by: Purna Chandra Mandal 
---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/pxa3xx_nand.c  | 8 
 drivers/usb/musb-new/linux-compat.h | 7 ---
 2 files changed, 15 deletions(-)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 9392742..d529467 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -19,14 +19,6 @@
 
 #include "pxa3xx_nand.h"
 
-/* Some U-Boot compatibility macros */
-#define writesl(a, d, s)   __raw_writesl((unsigned long)a, d, s)
-#define readsl(a, d, s)__raw_readsl((unsigned long)a, d, s)
-#define writesw(a, d, s)   __raw_writesw((unsigned long)a, d, s)
-#define readsw(a, d, s)__raw_readsw((unsigned long)a, d, s)
-#define writesb(a, d, s)   __raw_writesb((unsigned long)a, d, s)
-#define readsb(a, d, s)__raw_readsb((unsigned long)a, d, s)
-
 #define TIMEOUT_DRAIN_FIFO 5   /* in ms */
 #defineCHIP_DELAY_TIMEOUT  200
 #define NAND_STOP_DELAY40
diff --git a/drivers/usb/musb-new/linux-compat.h 
b/drivers/usb/musb-new/linux-compat.h
index 46f83d9..526f4f2 100644
--- a/drivers/usb/musb-new/linux-compat.h
+++ b/drivers/usb/musb-new/linux-compat.h
@@ -13,13 +13,6 @@
printf(fmt, ##args);\
ret_warn; })
 
-#define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
-#define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
-#define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
-#define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
-#define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
-#define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
-
 #define device_init_wakeup(dev, a) do {} while (0)
 
 #define platform_data device_data
-- 
1.8.3.1

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[U-Boot] Please pull u-boot-x86

2016-03-18 Thread Bin Meng
Hi Tom,

The following changes since commit f8a4826383860318d90079bf40402447d369ad87:

  spl: arm: Make sure to include all of the u_boot_list entries
(2016-03-16 15:27:55 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-x86.git master

for you to fetch changes up to 82ceba2ca2487c4967419cf7053e1301709219e5:

  x86: Add congatec conga-QA3/E3845-4G (Bay Trail) support (2016-03-17
10:27:27 +0800)


Bin Meng (12):
  x86: Move asm/arch-coreboot/tables.h to a common place
  x86: Move sysinfo related to sysinfo.h
  x86: Clean up coreboot_tables.h
  x86: Change to use start/end address pair in write_tables()
  x86: Use a macro for ROM table alignment
  x86: Change write_acpi_tables() signature a little bit
  x86: Simplify codes in write_tables()
  x86: Support writing configuration tables in high area
  x86: Implement functions for writing coreboot table
  x86: Support booting SeaBIOS
  x86: qemu: Enable ACPI table generation by default
  x86: Document how to play with SeaBIOS

Simon Glass (69):
  video: Allow simple-panel to be used without regulators
  cpu: Add support for microcode version and CPU ID
  gpio: Add a function to obtain a GPIO vector value
  gpio: Use const where possible
  pci: Add functions to update PCI configuration registers
  pci: Correct a few comments and nits
  malloc_simple: Add a little more debugging
  x86: cpu: Make the vendor table const
  x86: Add some more common MSR indexes
  x86: link: Add required GPIO properties
  x86: dts: link: Move SPD info into the memory controller
  x86: dts: link: Add board ID GPIOs
  x86: gpio: Correct GPIO setup ordering
  x86: Add a script to aid code conversion from coreboot
  x86: Correct duplicate POST values
  x86: Tidy up mp_init to reduce duplication
  x86: Add comments to the SIPI vector
  x86: broadwell: Add a few microcode files
  dm: timer: Correct timer init ordering after relocation
  syscon: Avoid returning a device on failure
  input: i8042: Make sure the keyboard is enabled
  x86: Allow use of serial soon after relocation
  x86: cpu: Add functions to return the family and stepping
  x86: Move cache-as-RAM code into a common location
  x86: Move microcode code to a common location
  x86: Create a common header for Intel register access
  x86: Add the root-complex block to common intel registers
  x86: Move common LPC code to its own place
  x86: Move common CPU code to its own place
  x86: Rename PORT_RESET to IO_PORT_RESET
  x86: Move Intel Management Engine code to a common place
  x86: ivybridge: Drop sandybridge_early_init()
  x86: Add macros to clear and set I/O bits
  x86: Allow I/O functions to use pointers
  x86: Move common MRC Kconfig options to the common file
  x86: Record the CPU details when starting each core
  x86: ivybridge: Show microcode version for each core
  x86: Update microcode for secondary CPUs
  x86: link: Add pin configuration to the device tree
  x86: Add an ICH6 pin configuration driver
  x86: gpio: Allow the pinctrl driver to set up the pin config
  x86: Drop all the old pin configuration code
  x86: Add support for running Intel reference code
  x86: dts: Update the pinctrl binding a little
  x86: Add basic support for broadwell
  x86: broadwell: Add a PCH driver
  x86: broadwell: Add a pinctrl driver
  x86: broadwell: Add a SATA driver
  x86: broadwell: Add a northbridge driver
  x86: broadwell: Add an LPC driver
  x86: broadwell: Add reference code support
  x86: broadwell: Add power-control support
  x86: broadwell: Add support for SDRAM setup
  x86: broadwell: Add a GPIO driver
  x86: broadwell: Add support for high-speed I/O lane with ME
  x86: broadwell: Add video support
  x86: Add a default address for reference code
  x86: Use white on black for the console on chromebooks
  x86: Update README for new developments
  x86: Add a function to set the IOAPIC ID
  x86: Fix a header nit in x86-chromebook.h
  arm: Add a 64-bit division routine to the private library
  dhry: Correct dhrystone calculation for fast machines
  x86: Move common PCH code into a common place
  x86: Add common SDRAM-init code
  x86: ivybridge: Convert to use the common SDRAM code
  x86: dts: Drop memory SPD compatible string
  x86: Support a chained-boot development flow
  x86: Add support for the samus chromebook

Stefan Roese (1):
  x86: Add congatec conga-QA3/E3845-4G (Bay Trail) support

 Makefile
 |   14 +-
 arch/arm/lib/Makefile
 |3 +-
 arch/arm/lib/_uldivmod.S
 |  245 +++
 arch/x86/Kconfig
 |   87 
 arch/x86/cpu/Makefile  |2 +
 arch/x86/cpu/broad

[U-Boot] [PATCH 1/2] efi_stub: Move carriage return before line feed in putc()

2016-03-18 Thread Bin Meng
A carriage return needs to execute before a line feed.

Signed-off-by: Bin Meng 
---

 lib/efi/efi_stub.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/lib/efi/efi_stub.c b/lib/efi/efi_stub.c
index e138709..8b4bb4e 100644
--- a/lib/efi/efi_stub.c
+++ b/lib/efi/efi_stub.c
@@ -65,6 +65,9 @@ void _debug_uart_init(void)
 
 void putc(const char ch)
 {
+   if (ch == '\n')
+   putc('\r');
+
if (use_uart) {
NS16550_t com_port = (NS16550_t)0x3f8;
 
@@ -74,8 +77,6 @@ void putc(const char ch)
} else {
efi_putc(global_priv, ch);
}
-   if (ch == '\n')
-   putc('\r');
 }
 
 void puts(const char *str)
-- 
1.8.2.1

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Re: [U-Boot] [PATCH 2/3] ARM: keystone2: Convert BOOT_READ_BITFIELD into static inline function

2016-03-18 Thread Tom Rini
On Tue, Mar 15, 2016 at 10:25:52AM -0500, Nishanth Menon wrote:

> BOOT_READ_BITFIELD can easily be a static inline function and be a
> little more readable with the same functionality.
> 
> Reported-by: Tom Rini 
> Signed-off-by: Nishanth Menon 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH 1/2] dm: gpio: mxc: fix mxc_gpio_bank_get_value

2016-03-18 Thread Peng Fan
On Wed, Mar 16, 2016 at 09:48:24AM -0300, Fabio Estevam wrote:
>Hi Peng,
>
>On Tue, Mar 15, 2016 at 10:27 PM, Peng Fan  wrote:
>
>> If set the SION bit, we need to change the pinmux settings in device tree,
>> however device tree are introduced from linux kernel. I would not like
>> to change the pinmux setting value.
>>
>> So I choose to use data register but not PSR register.
>
>Haven't checked the kernel driver, but just curious: how does the
>kernel handle this?

bgc->gc.get = bgpio_get;

The get method:
* @get: returns value for signal "offset"; for output signals this
*  returns either the value actually sensed, or zero

138 static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
139 {
140 struct bgpio_chip *bgc = to_bgpio_chip(gc);
141
142 return !!(bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio));
143 }

The gpio subsystem use reg_data. The reg_data is GPIO_PSR for gpio-mxc.c:

450 err = bgpio_init(&port->bgc, &pdev->dev, 4,
451  port->base + GPIO_PSR,
452  port->base + GPIO_DR, NULL,
453  port->base + GPIO_GDIR, NULL, 0);

So we know that kernel gpio-mxc use GPIO_PSR for reading data, but
as the comments for get method "for output signals this returns
either the value actually sensed, or zero", if no SION bit set, reading
PSR will return 0 with direction output.

But in U-Boot, the regulator driver needs to get the value when direction is
configured as output, we can use data register here or configure SION in pinmux.
But I prefer using data register here.

Thanks,
Peng.
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[U-Boot] [PATCH 08/14] mkimage: Add a missing free() to fit_import_data()

2016-03-18 Thread Simon Glass
The space allocated to fdt is not freed on error. Fix it.

Reported-by: Coverity (CID: 138494)

Signed-off-by: Simon Glass 
---

 tools/fit_image.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 8a93ea3..8d58370 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -541,6 +541,7 @@ static int fit_import_data(struct image_tool_params 
*params, const char *fname)
ret = 0;
 
 err:
+   free(fdt);
close(fd);
return ret;
 }
-- 
2.7.0.rc3.207.g0ac5344

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[U-Boot] [PATCH] image-fit: Change FIT prefix for configurations

2016-03-18 Thread Sáreník Ján
Instead of `bootm ${loadaddr}#conf@1`
one uses   `bootm ${loadaddr}_conf@1`

This fixes the bug with using just `bootm #conf@2`
without $loadaddr where text starting with # is
interpreted as a comment.
---
 cmd/bootm.c  | 2 +-
 common/image-fit.c   | 2 +-
 doc/uImage.FIT/command_syntax_extensions.txt | 2 +-
 include/configs/baltos.h | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/cmd/bootm.c b/cmd/bootm.c
index 555ccbc..23740c5 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -124,7 +124,7 @@ int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
  *
  * Right now we assume the first arg should never be '-'
  */
-if ((*endp != 0) && (*endp != ':') && (*endp != '#'))
+if ((*endp != 0) && (*endp != ':') && (*endp != '_'))
 return do_bootm_subcommand(cmdtp, flag, argc, argv);
 }

diff --git a/common/image-fit.c b/common/image-fit.c
index 25f8a11..e23796f 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -75,7 +75,7 @@ static int fit_parse_spec(const char *spec, char sepc, ulong 
addr_curr,
 int fit_parse_conf(const char *spec, ulong addr_curr,
 ulong *addr, const char **conf_name)
 {
-return fit_parse_spec(spec, '#', addr_curr, addr, conf_name);
+return fit_parse_spec(spec, '_', addr_curr, addr, conf_name);
 }

 /**
diff --git a/doc/uImage.FIT/command_syntax_extensions.txt 
b/doc/uImage.FIT/command_syntax_extensions.txt
index 6c99b1c..ef4db80 100644
--- a/doc/uImage.FIT/command_syntax_extensions.txt
+++ b/doc/uImage.FIT/command_syntax_extensions.txt
@@ -36,7 +36,7 @@ Old uImage:
 New uImage:
 8.  bootm 
 9.  bootm []:
-10. bootm []#
+10. bootm []_
 11. bootm []: []:
 12. bootm []: []: []:
 13. bootm []: []: 
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index b8c915c..8a01fe8 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -80,7 +80,7 @@
 "ubifsmount ubi0:kernel; " \
 "ubifsload $loadaddr kernel-fit.itb;" \
 "ubifsumount; " \
-"bootm ${loadaddr}#conf${board_name}; " \
+"bootm ${loadaddr}_conf${board_name}; " \
 "if test $? -ne 0; then echo Using default FIT config; " \
 "bootm ${loadaddr}; fi;\0"
 #else
--
2.7.3



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Re: [U-Boot] Problems with D-cache invalidation in Freescale eSDHC driver

2016-03-18 Thread Peng Fan
Hi Mario,

On Fri, Mar 18, 2016 at 09:16:48AM +0100, mario@gdsys.cc wrote:
>
>Hello,
>
>I've been working on a QorIQ P1022 board (controlcenterd) to run the newest
>U-Boot on it, and I encountered some strange behavior.
>
>During boot, we get these error messages
>
>"
>ERROR: Cannot import environment: errno = 12
>
>at common/env_common.c:221/env_import()
>*** Warning - import failed, using default environment
>
>ERROR: Environment import failed: errno = 12
>
>at common/env_common.c:123/set_default_env()
>## Can't malloc 9 bytes
>"
>
>After bisecting, I found out that the commit 4683b22 (mmc:fsl_esdhc
>invalidate dcache before read) apparently causes this. With the additional
>d-cache invalidations in place, malloc and free calls fail.
>
>Now, after some experimenting, I found out that deactivating the d-cache
>invalidation when reading the first sector is enough; that is, if one
>replaces the first invalidation
>
>"
>if (data->flags & MMC_DATA_READ)
>   check_and_invalidate_dcache_range(cmd, data);
>"
>
>with
>
>"
>if (data->flags & MMC_DATA_READ && (cmd->cmdidx != MMC_CMD_READ_SINGLE_BLOCK
>|| cmd->cmdarg != 0))
>   check_and_invalidate_dcache_range(cmd, data);
>"
>
>in fsl_esdhc.c, it seems to work, but I have no idea why that is the case.
>
>Any ideas would be greatly appreciated.

Before you chaning:
"
if (data->flags & MMC_DATA_READ)
check_and_invalidate_dcache_range(cmd, data);
"

can you please try this, https://patchwork.ozlabs.org/patch/511889/ and
kindly give some feedback whether the patch can fix you issue or not?

I strongly agree that U-Boot should flow the Linux DMA flow to avoid
potential write back and speculative read which may cause DMA data
be polluted.

Anyway please first try first invalidate L2, then invalidate L1.

I plan to pick the upper patch or rework for DMA usage, but have not
began the work (:

Thanks,
Peng.

>
>Best regards,
>Mario
>
>
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Re: [U-Boot] [PATCH] sun7i: Add support for the Itead Core EVB

2016-03-18 Thread Code Kipper
Please ignoreforgot that I'd added all the relevant emails to my git config.
CK

On 17 March 2016 at 14:33,   wrote:
> From: Marcus Cooper 
>
> ---
>  arch/arm/dts/Makefile |   1 +
>  arch/arm/dts/sun7i-a20-itead-core-evb.dts | 316 
> ++
>  configs/Itead_Core_EVB_defconfig  |  22 +++
>  3 files changed, 339 insertions(+)
>  create mode 100644 arch/arm/dts/sun7i-a20-itead-core-evb.dts
>  create mode 100644 configs/Itead_Core_EVB_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index b574284..dae2bfc 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -162,6 +162,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
> sun7i-a20-cubietruck.dtb \
> sun7i-a20-hummingbird.dtb \
> sun7i-a20-i12-tvbox.dtb \
> +   sun7i-a20-itead-core-evb.dtb \
> sun7i-a20-lamobo-r1.dtb \
> sun7i-a20-m3.dtb \
> sun7i-a20-m5.dtb \
> diff --git a/arch/arm/dts/sun7i-a20-itead-core-evb.dts 
> b/arch/arm/dts/sun7i-a20-itead-core-evb.dts
> new file mode 100644
> index 000..140f0dd
> --- /dev/null
> +++ b/arch/arm/dts/sun7i-a20-itead-core-evb.dts
> @@ -0,0 +1,316 @@
> +/*
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun7i-a20.dtsi"
> +#include "sunxi-common-regulators.dtsi"
> +
> +#include 
> +#include 
> +#include 
> +
> +/ {
> +   model = "Itead Core EVB";
> +   compatible = "itead,core-evb", "allwinner,sun7i-a20";
> +
> +   aliases {
> +   serial0 = &uart0;
> +   };
> +
> +   chosen {
> +   stdout-path = "serial0:115200n8";
> +   };
> +
> +   leds {
> +   compatible = "gpio-leds";
> +   pinctrl-names = "default";
> +   pinctrl-0 = <&led_pins_itead_core_evb>;
> +
> +   blue {
> +   label = "itead_core_evb:blue:usr";
> +   gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
> +   };
> +
> +   orange {
> +   label = "itead_core_evb:orange:usr";
> +   gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
> +   };
> +
> +   white {
> +   label = "itead_core_evb:white:usr";
> +   gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;
> +   };
> +
> +   green {
> +   label = "itead_core_evb:green:usr";
> +   gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>;
> +   };
> +   };
> +
> +   mmc3_pwrseq: mmc3_pwrseq {
> +   compatible = "mmc-pwrseq-simple";
> +   pinctrl-names = "default";
> +   pinctrl-0 = <&mmc3_pwrseq_pin_itead_core_evb>;
> +   reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
> +   };
> +};
> +
> +&ahci {
> +   target-supply = <®_ahci_5v>;
> +   status = "okay";
> +};
> +
> +&cpu0 {
> +   cpu-supply = <®_dcdc2>;
> +};
> +
> +&ehci0 {
> +   

Re: [U-Boot] [U-Boot, 26/27] kc1: Power off when the power on reason is not a valid one

2016-03-18 Thread Tom Rini
On Sat, Feb 27, 2016 at 07:19:14PM +0100, Paul Kocialkowski wrote:

> Some power on reasons are not desirable (e.g. too short press on the power
> button), battery plug. Thus, power off the device when one of those occurs.
> 
> Signed-off-by: Paul Kocialkowski 

Applied to u-boot/master, thanks!

-- 
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[U-Boot] [PATCH 06/14] part_efi: Drop NULL check in part_get_info_efi()

2016-03-18 Thread Simon Glass
This cannot be NULL since part_get_info() calls this function and requires
it to be non-NULL.

Reported-by: Coverity (CID: 138497)

Signed-off-by: Simon Glass 
---

 disk/part_efi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 93a7e81..fe308d7 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -240,7 +240,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
gpt_entry *gpt_pte = NULL;
 
/* "part" argument must be at least 1 */
-   if (!dev_desc || !info || part < 1) {
+   if (part < 1) {
printf("%s: Invalid Argument(s)\n", __func__);
return -1;
}
-- 
2.7.0.rc3.207.g0ac5344

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Re: [U-Boot] [PATCH 1/3] Fix typo in chosen parameter in vf610-twr.dts

2016-03-18 Thread Bin Meng
On Thu, Mar 17, 2016 at 10:44 PM, Alexander Merkle
 wrote:
> Fix typo "choosen" instead of "chosen" in vf610-twr.dts.
> Fixes boot process and terminal output for Vybrid series.
>
> Signed-off-by: Alexander Merkle 
> ---
>
>  arch/arm/dts/vf610-twr.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [U-Boot, v5, 30/30] efi_loader: Pass proper device path in on boot

2016-03-18 Thread Tom Rini
On Fri, Mar 04, 2016 at 01:10:14AM +0100, Alexander Graf wrote:

> EFI payloads can query for the device they were booted from. Because
> we have a disconnect between loading binaries and running binaries,
> we passed in a dummy device path so far.
> 
> Unfortunately that breaks grub2's logic to find its configuration
> file from the same device it was booted from.
> 
> This patch adds logic to have the "load" command call into our efi
> code to set the device path to the one we last loaded a binary from.
> 
> With this grub2 properly detects where we got booted from and can
> find its configuration file, even when searching by-partition.
> 
> Signed-off-by: Alexander Graf 

Applied to u-boot/master, thanks!

-- 
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[U-Boot] [PATCH 07/14] mkimage: Close the file when unable to get its size

2016-03-18 Thread Simon Glass
There is a missing close() on the error path. Add it.

Reported-by: Coverity (CID: 138496)
Signed-off-by: Simon Glass 
---

 tools/imagetool.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/imagetool.c b/tools/imagetool.c
index 351211c..916ab96 100644
--- a/tools/imagetool.c
+++ b/tools/imagetool.c
@@ -107,6 +107,7 @@ int imagetool_get_filesize(struct image_tool_params 
*params, const char *fname)
if (fstat(fd, &sbuf) < 0) {
fprintf(stderr, "%s: Can't stat %s: %s\n",
params->cmdname, fname, strerror(errno));
+   close(fd);
return -1;
}
close(fd);
-- 
2.7.0.rc3.207.g0ac5344

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[U-Boot] Problems with D-cache invalidation in Freescale eSDHC driver

2016-03-18 Thread mario . six


Hello,

I've been working on a QorIQ P1022 board (controlcenterd) to run the  
newest U-Boot on it, and I encountered some strange behavior.


During boot, we get these error messages

"
ERROR: Cannot import environment: errno = 12

at common/env_common.c:221/env_import()
*** Warning - import failed, using default environment

ERROR: Environment import failed: errno = 12

at common/env_common.c:123/set_default_env()
## Can't malloc 9 bytes
"

After bisecting, I found out that the commit 4683b22 (mmc:fsl_esdhc  
invalidate dcache before read) apparently causes this. With the  
additional d-cache invalidations in place, malloc and free calls fail.


Now, after some experimenting, I found out that deactivating the  
d-cache invalidation when reading the first sector is enough; that is,  
if one replaces the first invalidation


"
if (data->flags & MMC_DATA_READ)
check_and_invalidate_dcache_range(cmd, data);
"

with

"
if (data->flags & MMC_DATA_READ && (cmd->cmdidx !=  
MMC_CMD_READ_SINGLE_BLOCK || cmd->cmdarg != 0))

check_and_invalidate_dcache_range(cmd, data);
"

in fsl_esdhc.c, it seems to work, but I have no idea why that is the case.

Any ideas would be greatly appreciated.

Best regards,
Mario


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Re: [U-Boot] [PATCH 00/18] sf: fix support of QSPI memories and controllers

2016-03-18 Thread Cyrille Pitchen
Hi Stefan,

Le 18/03/2016 14:48, Stefan Roese a écrit :
> Hi All,
> 
> please excuse the late reply to this thread. But I'm very interested
> in QSPI, as one of my customers uses Micron QSPI NOR and really wants
> to take full advantage of the device (quad access) to speed up the
> overall boot process. This is on SoCFPGA btw.
> 
> Please allow me a few comments below.
> 
> On 16.03.2016 15:14, Jagan Teki wrote:
>> On Wednesday 16 March 2016 07:00 PM, Cyrille Pitchen wrote:
>>> Le 15/03/2016 19:21, Jagan Teki a écrit :
 On Tuesday 15 March 2016 11:42 PM, Cyrille Pitchen wrote:
> Hi all,
>
> This series of patches fixes and extend the support of QSPI memories
> in the SPI flash framework. The updates are split into many parts to
> make it easier to understand and review but they should be considered
> as a whole.
>
> This was tested on a Atmel sama5d2 xplained board with a Micron
> n25q128a
> memory.
>
> Best regards,
>
> Cyrille
>
> Cyrille Pitchen (18):
> Revert "sf: Fix quad bit set for micron devices"
> sf: call spi_claim_bus() and spi_release_bus() only once per read,
>   write or erase
> sf: replace spi_flash_read_common() calls by spi_flash_cmd_read()
> sf: remove spi_flash_write_common()
> sf: export spi_flash_wait_ready() function
> sf: share erase generic algorithm
> sf: share write generic algorithm
> sf: share read generic algorithm
> sf: add hooks to handle register read and write operations
> sf: move support of SST flash into generic spi_flash_write_alg()
> sf: fix selection of supported READ commands for QSPI memories
> sf: fix detection of QSPI memories when they boot in Quad or
> Dual mode
> sf: add helper function to set the number of dummy bytes
> sf: add 4byte address opcodes
> sf: prepare next fixes to support of QSPI memories by manufacturer
> sf: fix support of Micron memories
> ARM: at91: clock: add function to get QSPI clocks
> sf: add driver for Atmel QSPI controller

 Appreciate for the work, we're working on spi-nor framework[1]
 planning to push in couple of weeks. Will let you know once it merged
 so that you can add your changes on top of that.

 [1]
 http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-nor-next


>>>
>>> Hi Jagan,
>>>
>>> I've started to have a look on your branch. I hope it's not to late
>>> for few
>>> comments:
>>>
>>> Globally I see the new code attend to match the spi-nor framework from
>>> Linux.
>>> OK that's fine but please note the current spi-nor framework in Linux has
>>> incomplete and sometime not working support of QSPI memories.
>>>
>>> First, after a discussion with Brian and Bean on linux-mtd [1], Bean's
>>> commit
>>> to add support to Micron QSPI memories was reverted since it didn't
>>> work alone.
>>> In his reply, Brian agreed the code was not tested and should not have
>>> been
>>> merged.
>>>
>>> This highlights a more general issue: currently, there is no mean for the
>>> spi-nor framework to notify the SPI controller driver about a SPI
>>> protocol
>>> change at the QSPI memory side. This applies to Micron memories when
>>> they enter
>>> their Quad I/O mode. If so, ALL commands, even JEDEC Read ID, Read Status
>>> Register, ..., MUST use the SPI 4-4-4 protocol. Commands sent using
>>> SPI 1-x-y
>>> protocols are no longer decoded properly.
>>> This also applies to Macronix and Winbond memories if they enter their
>>> QPI
>>> mode, which is the equivalent of Micron Quad I/O mode.
>>> This is why I've suggested to add 4 new fields in the struct spi_nor:
>>> - .reg_proto: the SPI protocol to be used by .read_reg() and .write_reg()
>>>hooks.
>>> - .read_proto: the SPI protocol to be used by the .read() hooks, maybe
>>> by the
>>>.read_mmap() also.
>>> - .write_proto: the SPI protocol to be used by the .write() hooks
>>> - .erase_proto: the SPI protocol to be used by the .erase() hooks.
>>>
>>> (Q)SPI controller drivers cannot guess the protocol to be used from
>>> the command
>>> op code. Indeed, taking the Micron case as un example, the very same
>>> 0xeb op
>>> code may be used with the SPI 1-4-4 protocol (Micron Extended SPI
>>> mode) or
>>> with the SPI 4-4-4 protocol (Micron Quad I/O mode).
>>>
>>>
>>> Also just some words about the naming of SPI x-y-z protocols:
>>> - x refers to the number of I/O lines used to send the op code byte
>>> - y is the number of I/O lines used to send the address, mode/dummy
>>> cycles
>>>(if these cycles exist for the command op code)
>>> - z is the number of I/O lines used to send/receive data (if needed)
>>>
>>> So the SNOR_OP_READ_1_1_2_IO macro for the Fast Read Dual I/O command (as
>>> opposed to the macro SNOR_OP_READ_1_1_2 macro for the Fast Read Dual
>>> Output
>>> command) doesn't make sense: it should be 

Re: [U-Boot] [PATCH 00/18] sf: fix support of QSPI memories and controllers

2016-03-18 Thread Albert ARIBAUD
Hello Jagan,

On Wed, 16 Mar 2016 22:04:23 +0530, Jagan Teki 
wrote:
> Hi Albert,
> 
> On Wednesday 16 March 2016 09:53 PM, Albert ARIBAUD wrote:
> > Hello Jagan,
> >
> > On Wed, 16 Mar 2016 19:44:26 +0530, Jagan Teki 
> > wrote:
> >> On Wednesday 16 March 2016 07:00 PM, Cyrille Pitchen wrote:
> >>> Le 15/03/2016 19:21, Jagan Teki a écrit :
>  On Tuesday 15 March 2016 11:42 PM, Cyrille Pitchen wrote:
> > Hi all,
> >
> > This series of patches fixes and extend the support of QSPI memories
> > in the SPI flash framework. The updates are split into many parts to
> > make it easier to understand and review but they should be considered
> > as a whole.
> >
> > This was tested on a Atmel sama5d2 xplained board with a Micron n25q128a
> > memory.
> >
> > Best regards,
> >
> > Cyrille
> >
> > Cyrille Pitchen (18):
> >  Revert "sf: Fix quad bit set for micron devices"
> >  sf: call spi_claim_bus() and spi_release_bus() only once per read,
> >write or erase
> >  sf: replace spi_flash_read_common() calls by spi_flash_cmd_read()
> >  sf: remove spi_flash_write_common()
> >  sf: export spi_flash_wait_ready() function
> >  sf: share erase generic algorithm
> >  sf: share write generic algorithm
> >  sf: share read generic algorithm
> >  sf: add hooks to handle register read and write operations
> >  sf: move support of SST flash into generic spi_flash_write_alg()
> >  sf: fix selection of supported READ commands for QSPI memories
> >  sf: fix detection of QSPI memories when they boot in Quad or Dual 
> > mode
> >  sf: add helper function to set the number of dummy bytes
> >  sf: add 4byte address opcodes
> >  sf: prepare next fixes to support of QSPI memories by manufacturer
> >  sf: fix support of Micron memories
> >  ARM: at91: clock: add function to get QSPI clocks
> >  sf: add driver for Atmel QSPI controller
> 
>  Appreciate for the work, we're working on spi-nor framework[1] planning 
>  to push in couple of weeks. Will let you know once it merged so that you 
>  can add your changes on top of that.
> 
>  [1] 
>  http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-nor-next
> 
> >>>
> >>> Hi Jagan,
> >>>
> >>> I've started to have a look on your branch. I hope it's not to late for 
> >>> few
> >>> comments:
> >>>
> >>> Globally I see the new code attend to match the spi-nor framework from 
> >>> Linux.
> >>> OK that's fine but please note the current spi-nor framework in Linux has
> >>> incomplete and sometime not working support of QSPI memories.
> >>>
> >>> First, after a discussion with Brian and Bean on linux-mtd [1], Bean's 
> >>> commit
> >>> to add support to Micron QSPI memories was reverted since it didn't work 
> >>> alone.
> >>> In his reply, Brian agreed the code was not tested and should not have 
> >>> been
> >>> merged.
> >>>
> >>> This highlights a more general issue: currently, there is no mean for the
> >>> spi-nor framework to notify the SPI controller driver about a SPI protocol
> >>> change at the QSPI memory side. This applies to Micron memories when they 
> >>> enter
> >>> their Quad I/O mode. If so, ALL commands, even JEDEC Read ID, Read Status
> >>> Register, ..., MUST use the SPI 4-4-4 protocol. Commands sent using SPI 
> >>> 1-x-y
> >>> protocols are no longer decoded properly.
> >>> This also applies to Macronix and Winbond memories if they enter their QPI
> >>> mode, which is the equivalent of Micron Quad I/O mode.
> >>> This is why I've suggested to add 4 new fields in the struct spi_nor:
> >>> - .reg_proto: the SPI protocol to be used by .read_reg() and .write_reg()
> >>> hooks.
> >>> - .read_proto: the SPI protocol to be used by the .read() hooks, maybe by 
> >>> the
> >>> .read_mmap() also.
> >>> - .write_proto: the SPI protocol to be used by the .write() hooks
> >>> - .erase_proto: the SPI protocol to be used by the .erase() hooks.
> >>>
> >>> (Q)SPI controller drivers cannot guess the protocol to be used from the 
> >>> command
> >>> op code. Indeed, taking the Micron case as un example, the very same 0xeb 
> >>> op
> >>> code may be used with the SPI 1-4-4 protocol (Micron Extended SPI mode) or
> >>> with the SPI 4-4-4 protocol (Micron Quad I/O mode).
> >>>
> >>>
> >>> Also just some words about the naming of SPI x-y-z protocols:
> >>> - x refers to the number of I/O lines used to send the op code byte
> >>> - y is the number of I/O lines used to send the address, mode/dummy cycles
> >>> (if these cycles exist for the command op code)
> >>> - z is the number of I/O lines used to send/receive data (if needed)
> >>>
> >>> So the SNOR_OP_READ_1_1_2_IO macro for the Fast Read Dual I/O command (as
> >>> opposed to the macro SNOR_OP_READ_1_1_2 macro for the Fast Read Dual 
> >>> Output
> >>> command) doe

[U-Boot] [PATCH 3/4] dts: add dts file for Atmel sama5d2 xplained board

2016-03-18 Thread Cyrille Pitchen
Signed-off-by: Cyrille Pitchen 
---
 arch/arm/dts/Makefile  |  3 +++
 arch/arm/dts/at91-sama5d2_xplained.dts | 33 +
 arch/arm/dts/sama5d2.dtsi  | 19 +++
 3 files changed, 55 insertions(+)
 create mode 100644 arch/arm/dts/at91-sama5d2_xplained.dts
 create mode 100644 arch/arm/dts/sama5d2.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 578038be21f9..97521f16aac4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -207,6 +207,9 @@ dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2e-evm.dtb \
k2g-evm.dtb
 
+dtb-$(CONFIG_ARCH_AT91) += \
+   at91-sama5d2_xplained.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts 
b/arch/arm/dts/at91-sama5d2_xplained.dts
new file mode 100644
index ..2394f6bd4249
--- /dev/null
+++ b/arch/arm/dts/at91-sama5d2_xplained.dts
@@ -0,0 +1,33 @@
+/dts-v1/;
+#include "sama5d2.dtsi"
+
+/ {
+   model = "Atmel SAMA5D2 Xplained";
+   compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
+
+   chosen {
+   stdout-path = "serial0";
+   };
+};
+
+&qspi0 {
+   status = "okay";
+
+   flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "atmel,sama5d2-qspi-flash";
+   reg = <0>;
+   spi-max-frequency = <8300>;
+
+   partition@ {
+   label = "boot";
+   reg = <0x 0x00c0>;
+   };
+
+   partition@00c0 {
+   label = "rootfs";
+   reg = <0x00c0 0x>;
+   };
+   };
+};
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
new file mode 100644
index ..dccc66cccb88
--- /dev/null
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -0,0 +1,19 @@
+#include "skeleton.dtsi"
+
+/ {
+   model = "Atmel SAMA5D2 family SoC";
+   compatible = "atmel,sama5d2";
+
+   aliases {
+   spi0 = &qspi0;
+   };
+
+   qspi0: spi@f002 {
+   compatible = "atmel,sama5d2-qspi";
+   reg = <0xf002 0x100>, <0xd000 0x0800>;
+   reg-names = "qspi_base", "qspi_mmap";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+};
\ No newline at end of file
-- 
1.8.2.2

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Re: [U-Boot] [PATCH v4 08/14] armv8 : ls2080: Add config for endianess of CCSR GUR

2016-03-18 Thread york sun
On 02/08/2016 09:27 PM, Saksham Jain wrote:
> The GUR (DCFG) registers in CCSR space are in LE format
> for ls2080/ls2085. Defined a config CONFIG_SYS_FSL_CCSR_GUR_LE in

Since ls2085 is a variation of ls2080, you don't need to mention ls2085 if not
specifically dealing with it.

York

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Re: [U-Boot] [U-Boot,v5,16/30] efi_loader: Add console interface

2016-03-18 Thread Tom Rini
On Fri, Mar 04, 2016 at 01:10:00AM +0100, Alexander Graf wrote:

> One of the basic EFI interfaces is the console interface. Using it an EFI
> application can interface with the user. This patch implements an EFI console
> interface using getc() and putc().
> 
> Today, we only implement text based consoles. We also convert the EFI Unicode
> characters to UTF-8 on the fly, hoping that everyone managed to jump on the
> train by now.
> 
> Signed-off-by: Alexander Graf 
> Reviewed-by: Simon Glass 
> Tested-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 25/27] input: TWL6030 input support for power button, USB and charger

2016-03-18 Thread Tom Rini
On Sat, Feb 27, 2016 at 07:19:13PM +0100, Paul Kocialkowski wrote:

> This adds support for detecting a few inputs exported by the TWL6030.
> Currently-supported inputs are the power button, USB and charger presence.
> 
> Signed-off-by: Paul Kocialkowski 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH 08/13] ARM: uniphier: enable DDR PHY parameter dump commands by default

2016-03-18 Thread Masahiro Yamada
These commands are not necessarily needed for usual operations
(they are useful in case of DDR memory trouble), but enabling them
by default would be nice in terms of the compilation test coverage.
They are small enough, so limited impact on the memory footprint.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-uniphier/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 8dc6f98..4724af5 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -69,6 +69,7 @@ config CMD_PINMON
 config CMD_DDRPHY_DUMP
bool "Enable dump command of DDR PHY parameters"
depends on ARCH_UNIPHIER_LD4 || ARCH_UNIPHIER_PRO4 || ARCH_UNIPHIER_SLD8
+   default y
help
  The command "ddrphy" shows the resulting parameters of DDR PHY
  training; it is useful for the evaluation of DDR PHY training.
@@ -76,6 +77,7 @@ config CMD_DDRPHY_DUMP
 config CMD_DDRMPHY_DUMP
bool "Enable dump command of DDR Multi PHY parameters"
depends on ARCH_UNIPHIER_PXS2 || ARCH_UNIPHIER_LD6B
+   default y
help
  The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
  training; it is useful for the evaluation of DDR Multi PHY training.
-- 
1.9.1

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Re: [U-Boot] [PATCH v3 09/10] x86: Add missing pci.h header in me_common.h

2016-03-18 Thread Bin Meng
On Wed, Mar 16, 2016 at 9:44 PM, Simon Glass  wrote:
> This uses PCI so should include the header.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v3:
> - Add new patch top include missing pci.h header in me_common.c
>
> Changes in v2: None
>
>  arch/x86/include/asm/me_common.h | 1 +
>  1 file changed, 1 insertion(+)
>

Squashed into http://patchwork.ozlabs.org/patch/596594/, and applied
to u-boot-x86, thanks!
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Re: [U-Boot] [RFC PATCH 1/2] add block device cache

2016-03-18 Thread Stephen Warren

On 03/16/2016 03:40 PM, Eric Nelson wrote:

Signed-off-by: Eric Nelson 


A patch description would be useful here; the cover letter wouldn't be 
checked in.



diff --git a/drivers/block/cache_block.c b/drivers/block/cache_block.c



+static int cache_iftype = -1;
+static int cache_devnum = -1;
+static lbaint_t cache_start = -1;
+static lbaint_t cache_blkcnt = -1;

> +static unsigned long cache_blksz;
> +static void *cache;

Since variable "cache" is in BSS and hence is 0, which is included in 
all checks below, none of the other values need to be initialized.



+int cache_block_read(int iftype, int dev,
+lbaint_t start, lbaint_t blkcnt,
+unsigned long blksz, void *buffer)
+{
+   if ((iftype == cache_iftype) &&
+   (dev == cache_devnum) &&
+   (start == cache_start) &&
+   (blkcnt <= cache_blkcnt) &&
+   (blksz == cache_blksz) &&
+   (cache != 0)) {


I'd suggest putting (cache != 0) first, since that check indicates 
whether any of the others are relevant.



+   memcpy(buffer, cache, blksz*blkcnt);


Nit: space around the * operator. Same comment everywhere.

It's probably hard to fix this given the simple API and lack of MMU 
page-tables to remap on a per-page basis, but one deficiency in this 
(deliberately) simple implementation is that if someone caches blocks 
0..7 then later tries to read 2..10 (or even 2..3) they won't get a 
cache hit. While partial hits (the 2..10 case) are hard to deal with, 
perhaps it's useful to make subset cases (2..3 with 0..7 cached) work?



+void cache_block_fill(int iftype, int dev,
+ lbaint_t start, lbaint_t blkcnt,
+ unsigned long blksz, void const *buffer)



+   bytes = blksz*blkcnt;
+   if (cache != 0) {
+   if (bytes != (cache_blksz*cache_blkcnt)) {
+   free(cache);
+   cache = malloc(blksz*blkcnt);
+   if (!cache)
+   return;
+   } /* change in size */
+   } else {
+   cache = malloc(blksz*blkcnt);
+   if (!cache)
+   return;
+   }


Is it better to put the if (!cache) test after the whole if/else block 
so it's unified?



+void cache_block_invalidate(int iftype, int dev)
+{
+   cache_iftype = -1;


That isn't actually necessary, since assigning 0 to cache below will 
prevent anything from using the cache.



+   if (cache) {
+   free(cache);
+   cache = 0;
+   }
+}



diff --git a/include/part.h b/include/part.h



+#ifdef CONFIG_BLOCK_CACHE
+/**
+ * cache_block_read() - attempt to read a set of blocks from cache
+ *
+ * @param iftype - IF_TYPE_x for type of device
+ * @param dev - device index of particular type
+ * @param start - starting block number
+ * @param blkcnt - number of blocks to read
+ * @param blksz - size in bytes of each block
+ * @param buf - buffer to contain cached data


s/contain/receive/?


+ *
+ * @return - '1' if block returned from cache, '0' otherwise.
+ */
+int cache_block_read
+   (int iftype, int dev,
+lbaint_t start, lbaint_t blkcnt,
+unsigned long blksz, void *buffer);


Nit: ( and probably the first n parameters should be on the same line as 
the function name.

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[U-Boot] [PATCH V2] serial: add BCM283x mini UART driver

2016-03-18 Thread Stephen Warren
The RPi3 typically uses the regular UART for high-speed communication with
the Bluetooth device, leaving us the mini UART to use for the serial
console. Add support for this UART so we can use it.

Signed-off-by: Stephen Warren 
---
v2: Add clock and skip_init fields to platform data.
---
 drivers/serial/Makefile  |   1 +
 drivers/serial/serial_bcm283x_mu.c   | 140 +++
 include/dm/platform_data/serial_bcm283x_mu.h |  24 +
 3 files changed, 165 insertions(+)
 create mode 100644 drivers/serial/serial_bcm283x_mu.c
 create mode 100644 include/dm/platform_data/serial_bcm283x_mu.h

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 05bdf56c6fe9..ee7147a77abc 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
+obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_bcm283x_mu.c 
b/drivers/serial/serial_bcm283x_mu.c
new file mode 100644
index ..fc36bc0e85d6
--- /dev/null
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -0,0 +1,140 @@
+/*
+ * (C) Copyright 2016 Stephen Warren 
+ *
+ * Derived from pl01x code:
+ *
+ * (C) Copyright 2000
+ * Rob Taylor, Flying Pig Systems. r...@flyingpig.com.
+ *
+ * (C) Copyright 2004
+ * ARM Ltd.
+ * Philippe Robin, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/* Simple U-Boot driver for the BCM283x mini UART */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct bcm283x_mu_regs {
+   u32 io;
+   u32 iir;
+   u32 ier;
+   u32 lcr;
+   u32 mcr;
+   u32 lsr;
+   u32 msr;
+   u32 scratch;
+   u32 cntl;
+   u32 stat;
+   u32 baud;
+};
+
+#define BCM283X_MU_LCR_DATA_SIZE_8 3
+
+#define BCM283X_MU_LSR_TX_IDLE BIT(6)
+/* This actually means not full, but is named not empty in the docs */
+#define BCM283X_MU_LSR_TX_EMPTYBIT(5)
+#define BCM283X_MU_LSR_RX_READYBIT(0)
+
+struct bcm283x_mu_priv {
+   struct bcm283x_mu_regs *regs;
+};
+
+static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
+{
+   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+   struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+   struct bcm283x_mu_regs *regs = priv->regs;
+   u32 divider;
+
+   if (plat->skip_init)
+   return 0;
+
+   divider = plat->clock / (baudrate * 8);
+
+   writel(BCM283X_MU_LCR_DATA_SIZE_8, ®s->lcr);
+   writel(divider - 1, ®s->baud);
+
+   return 0;
+}
+
+static int bcm283x_mu_serial_probe(struct udevice *dev)
+{
+   struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+   struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+
+   priv->regs = (struct bcm283x_mu_regs *)plat->base;
+
+   return 0;
+}
+
+static int bcm283x_mu_serial_getc(struct udevice *dev)
+{
+   struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+   struct bcm283x_mu_regs *regs = priv->regs;
+   u32 data;
+
+   /* Wait until there is data in the FIFO */
+   if (!(readl(®s->lsr) & BCM283X_MU_LSR_RX_READY))
+   return -EAGAIN;
+
+   data = readl(®s->io);
+
+   return (int)data;
+}
+
+static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
+{
+   struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+   struct bcm283x_mu_regs *regs = priv->regs;
+
+   /* Wait until there is space in the FIFO */
+   if (!(readl(®s->lsr) & BCM283X_MU_LSR_TX_EMPTY))
+   return -EAGAIN;
+
+   /* Send the character */
+   writel(data, ®s->io);
+
+   return 0;
+}
+
+static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)
+{
+   struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+   struct bcm283x_mu_regs *regs = priv->regs;
+   unsigned int lsr = readl(®s->lsr);
+
+   if (input) {
+   WATCHDOG_RESET();
+   return lsr & BCM283X_MU_LSR_RX_READY;
+   } else {
+   return !(lsr & BCM283X_MU_LSR_TX_IDLE);
+   }
+}
+
+static const struct dm_serial_ops bcm283x_mu_serial_ops = {
+   .putc = bcm283x_mu_serial_putc,
+   .pending = bcm283x_mu_serial_pending,
+   .getc = bcm283x_mu_serial_getc,
+   .setbrg = bcm283x_mu_serial_setbrg,
+};
+
+U_BOOT_DRIVER(serial_bcm283x_mu) = {
+   .name = "serial_bcm283x_mu",
+   .id = UCLASS_SERIAL,
+   .platdata_auto_alloc_size = sizeof(struct bcm283x_mu_serial_platdata),
+   .probe = bcm283x_mu_serial_probe,
+   .ops = &bcm283x_mu_serial_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+   .priv_auto_alloc_size = sizeof(struct bcm283x_mu_priv),
+};
diff --git a/include/dm/platform_d

Re: [U-Boot] [PATCH] Add CONFIG_GMAC_TX_DELAY=4 for OlinuXino Lime2

2016-03-18 Thread Michael Haas
On 03/18/2016 08:02 PM, Karsten Merker wrote:
> The installer supports a number of systems that can only load images
> of limited size, therefore the installer includes only an
> installation-related subset of all the kernel modules and i2c-mv64xxx
> currently isn't among those. This hasn't been a practical problem up
> to now, but being able to talk to the pmic is indeed something that
> should be possible even in the installer. I'll try to address that in
> the next days. Regards, Karsten 

Just an anecdote: I loaded i2c-mv64xx.ko which I had extracted from the
deb and the olinuxino locked up.

So now I'm trying to reproduce broken GBit, which is harder than
expected. I managed to do it once right after the lockup in u-boot: tftp
was slow and ran into timeouts. Then I typed 'reset' in the u-boot
shell. u-boot started again and GBit was working again.

Weird.
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[U-Boot] U-Boot broken for LS2080

2016-03-18 Thread york sun
Alison and Prabhakar,

Heads up, U-Boot is broken for LS2080 boards. Git bisects to this commit

7985cdf74b280f86a1c7440298a84f1fb2876fd9
arm64: Remove non-full-va map code

Please take a deeper look at the MMU tables.

York
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Re: [U-Boot] [PATCH 12/14] mkimage: Ensure file is closed in fdt_property_file()

2016-03-18 Thread Tom Rini
On Wed, Mar 16, 2016 at 07:45:42AM -0600, Simon Glass wrote:

> The file that is opened is not closed in all cases. Fix it.
> 
> Reported-by: Coverity (CID: 138490)
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [U-Boot, v5, 13/30] include/efi_api.h: Add more detailed API definitions

2016-03-18 Thread Tom Rini
On Fri, Mar 04, 2016 at 01:09:57AM +0100, Alexander Graf wrote:

> The EFI API header is great, but missing a good chunk of function prototype,
> GUID defines and enum declarations.
> 
> This patch extends it to cover more of the EFI API. It's still not 100%
> complete, but sufficient enough for our EFI payload interface.
> 
> Signed-off-by: Alexander Graf 
> Reviewed-by: Simon Glass 
> Tested-by: Simon Glass 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH] fastboot: allow retrieving fastboot variables from env

2016-03-18 Thread Boris Brezillon
From: Rob Herring 

Some boards need to expose device specific variable through fastboot
(to adpat the flashing script depending on hardware revision for
example).

Provide a way to expose custom fastboot variables. Note that all
variables meant to be exposed through fastboot should be be prefixed
with 'fastboot.', the variable should not exceed 32 bytes (including
the prefix and the trailing '\0') and the variable content should
fit in the response buffer (60 bytes excluding the 'OKAY' prefix and
the trailing '\0').

Signed-off-by: Rob Herring 
[Boris Brezillon: add a commit message]
Signed-off-by: Boris Brezillon 

Signed-off-by: Boris Brezillon 
---
 drivers/usb/gadget/f_fastboot.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index a54b4ee..2e87fee 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -413,8 +413,16 @@ static void cb_getvar(struct usb_ep *ep, struct 
usb_request *req)
else
strcpy(response, "FAILValue not set");
} else {
-   printf("WARNING: unknown variable: %s\n", cmd);
-   strcpy(response, "FAILVariable not implemented");
+   char envstr[32];
+
+   snprintf(envstr, sizeof(envstr) - 1, "fastboot.%s", cmd);
+   s = getenv(envstr);
+   if (s) {
+   strncat(response, s, chars_left);
+   } else {
+   printf("WARNING: unknown variable: %s\n", cmd);
+   strcpy(response, "FAILVariable not implemented");
+   }
}
fastboot_tx_write_str(response);
 }
-- 
2.5.0

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Re: [U-Boot] [PATCH 02/14] mkimage: Correct file being closed twice in fit_import_data()

2016-03-18 Thread Tom Rini
On Wed, Mar 16, 2016 at 07:45:32AM -0600, Simon Glass wrote:

> The code flows through to the end of the function, so we don't need another
> close() before this. Remove it.
> 
> Reported-by: Coverity (CID: 138504)
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH v3 07/10] x86: Support a chained-boot development flow

2016-03-18 Thread Bin Meng
On Wed, Mar 16, 2016 at 9:44 PM, Simon Glass  wrote:
> Sometimes it is useful to jump into U-Boot directly from coreboot or UEFI
> without any 16-bit init. This can help during development by allowing U-Boot
> to avoid doing all the init required by the platform.
>
> U-Boot expects its GDT to be set up correctly by its 16-bit code. If
> coreboot doesn't do this (because it hasn't run the payload setup code yet)
> then this won't happen.
>
> In this case we cannot rely on the GDT settings. U-Boot will hang or crash
> if these are wrong. Provide a development-only option to set up the GDT
> correctly. This is just a hack so you can jump to U-Boot from any stage of
> coreboot, not just at the end.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v3:
> - Add more detail to the commit message and code comments
>
> Changes in v2: None
>
>  arch/x86/cpu/start.S | 80 
> 
>  1 file changed, 80 insertions(+)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [U-Boot, 08/10] k2g: configs: Add support to save env in MMC

2016-03-18 Thread Tom Rini
On Wed, Mar 09, 2016 at 03:39:37PM +0530, Lokesh Vutla wrote:

> Adding support to save env in MMC on k2g platforms, as it is the
> preferred peripheral in saving env.
> 
> Signed-off-by: Lokesh Vutla 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i

2016-03-18 Thread Hans de Goede
The clock_sun6i.c implementation was not deasserting the reset for
the regular i2c controllers, this commit fixes this.

Signed-off-by: Hans de Goede 
---
 arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c 
b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 700b605..4e1e1a4 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -100,13 +100,18 @@ int clock_twi_onoff(int port, int state)
return 0;
}
 
-   /* set the apb clock gate for twi */
-   if (state)
+   /* set the apb clock gate and reset for twi */
+   if (state) {
setbits_le32(&ccm->apb2_gate,
 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
-   else
+   setbits_le32(&ccm->apb2_reset_cfg,
+1 << (APB2_RESET_TWI_SHIFT + port));
+   } else {
+   clrbits_le32(&ccm->apb2_reset_cfg,
+1 << (APB2_RESET_TWI_SHIFT + port));
clrbits_le32(&ccm->apb2_gate,
 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
+   }
 
return 0;
 }
-- 
2.7.2

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Re: [U-Boot] buildman: arm: undefined reference to `__aeabi_ldivmod'

2016-03-18 Thread Jagan Teki
On 14 March 2016 at 23:44, Stephen Warren  wrote:
> On 03/14/2016 11:32 AM, Jagan Teki wrote:
>>
>> Hi Simon,
>>
>> On 12 March 2016 at 06:02, Simon Glass  wrote:
>>>
>>> +Stephen
>>>
>>> Hi Jagan,
>>>
>>> On 11 March 2016 at 01:00, Jagan Teki  wrote:


 Hi,

 Did anyone encounter this issue? please let me know for any inputs.

 arm:  +   venice2
 +drivers/mtd/spi-nor/built-in.o: In function `spi_nor_write':
 +build/../drivers/mtd/spi-nor/spi-nor.c:585: undefined reference to
 `__aeabi_ldivmod'
 +arm-unknown-linux-gnueabi-ld.bfd: BFD (GNU Binutils) 2.24 assertion
 fail /home/tony/buildall/src/binutils/bfd/elf32-arm.c:7696
 +arm-unknown-linux-gnueabi-ld.bfd: error: required section '.rel.plt'
 not found in the linker script
 +arm-unknown-linux-gnueabi-ld.bfd: final link failed: Invalid operation
 +make[1]: *** [u-boot] Error 1
 +make: *** [sub-make] Error 2
>>>
>>>
>>> Are you using 64-bit division? Tegra uses the private libgcc. This
>>> patch might help:
>>
>>
>> Yes, I'm using 64-bit.
>>
>>> http://patchwork.ozlabs.org/patch/592628/
>>
>>
>> Still the same issue.
>
>
> If I start with v2016.03, and apply the following patch, I can reproduce
> this issue when building venice2 (a 32-bit Tegra build) but not p2371-2180
> (a 64-bit Tegra build):
>
> diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
> index ac274e17e8bd..9b1a4112a0b1 100644
> --- a/arch/arm/mach-tegra/board2.c
> +++ b/arch/arm/mach-tegra/board2.c
> @@ -235,9 +235,13 @@ __weak void pin_mux_mmc(void)
>  {
>  }
>
> +uint64_t a = 200;
> +uint64_t b = 5;
> +
>  /* this is a weak define that we are overriding */
>  int board_mmc_init(bd_t *bd)
>  {
> +   printf("a/b = %llu\n", a / b);
> debug("%s called\n", __func__);
>
> /* Enable muxes, etc. for SDMMC controllers */
>
> However, if I apply the patch Simon mentioned above, the problem is fixed.
> Are you sure you applied that patch correctly?

Yeah, I tried this on latest as well, same issue.

-- 
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Re: [U-Boot] [U-Boot,v2] ARM: DRA7xx: Enable NFS boot command

2016-03-18 Thread Tom Rini
On Fri, Mar 11, 2016 at 03:22:20PM -0600, Andrew F. Davis wrote:

> NFS loading works on DRA7 variants, remove the undefinition.
> 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [PATCH 0/3] Fix multipe typos "choosen" instead of "chosen" in dts/code

2016-03-18 Thread Bhuvanchandra DV

On 03/17/2016 08:50 PM, Alexander Merkle wrote:

Hi,

may be the subject is misleading. The DTS/DTB entry should be named
   "chosen"
but it was "choosen" with "oo" in the git master. Have a look to the
commits.


My bad! got it.



diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
index a4ccbcb..237aa8d 100644
--- a/arch/arm/dts/vf610-twr.dts
+++ b/arch/arm/dts/vf610-twr.dts
@@ -11,7 +11,7 @@
  model = "VF610 Tower Board";
  compatible = "fsl,vf610-twr", "fsl,vf610";

-choosen {
+chosen {
  stdout-path = &uart1;
  };

Regards,

Alex

Alexander Merkle
System Engineer
   Lauterbach GmbH
   Altlaufstraße 40
   85635 Hoehenkirchen-Siegertsbrunn
   Germany
Tel +49 8102 9876-147
mailto:alexander.mer...@lauterbach.com
http://www.lauterbach.com

On 17.03.2016 16:06, Bhuvanchandra DV wrote:

On 03/17/2016 08:14 PM, Alexander Merkle wrote:


The dts files for NXP/Freescale Vybrid series were broken.
Fixed some other typos in comments & printfs to.


I guess this is not typo the node name is 'chosen'.
Some documentation is here[1].

[1]
http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/chosen.txt






Alexander Merkle (3):
   Fix typo in chosen parameter in vf610-twr.dts
   Fix typo in chosen parameter of pcm052.dts
   Fix typo choosen in comments and printf logs

  arch/arm/dts/pcm052.dts | 2 +-
  arch/arm/dts/vf610-twr.dts  | 2 +-
  common/menu.c   | 2 +-
  drivers/ddr/fsl/lc_common_dimm_params.c | 4 ++--
  4 files changed, 5 insertions(+), 5 deletions(-)





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Bhuvan
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Re: [U-Boot] [PATCH v1 1/1] fastboot: Update getvar command to get 'userdata' partition size

2016-03-18 Thread Boris Brezillon
Hi Rob,

On Fri, 20 Feb 2015 08:54:56 -0600
Rob Herring  wrote:

> On Wed, Feb 18, 2015 at 1:52 PM, Dileep Katta  wrote:
> > This patch adds functionality to getvar command to get the userdata 
> > partition
> > size.
> 
> This is non-standard and doesn't scale to other partitions. There is
> already a standard var "partition-size:". There is also
> "partition-type:" which probably needs to be supported as
> well. It would probably be good to have generic code to retrieve
> fastboot variables from a u-boot environment variables. Something like
> this:
> 
> fastboot: allow retrieving fastboot variables from env
> 
> Signed-off-by: Rob Herring 
> 
> diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
> index 310175a..31e1063 100644
> --- a/drivers/usb/gadget/f_fastboot.c
> +++ b/drivers/usb/gadget/f_fastboot.c
> @@ -364,8 +364,15 @@ static void cb_getvar(struct usb_ep *ep, struct
> usb_request *req)
> else
> strcpy(response, "FAILValue not set");
> } else {
> -   error("unknown variable: %s\n", cmd);
> -   strcpy(response, "FAILVariable not implemented");
> +   char envstr[32];
> +   snprintf(envstr, sizeof(envstr) - 1, "fastboot.%s", cmd);
> +   s = getenv(envstr);
> +   if (s) {
> +   strncat(response, s, chars_left);
> +   } else {
> +   error("unknown variable: %s\n", cmd);
> +   strcpy(response, "FAILVariable not implemented");
> +   }
> }
> fastboot_tx_write_str(response);
>  }
> 

I need this feature to expose some uboot variable through 'fastboot
getvar', would you mind if I resend this patch for you?

Best Regards,

Boris

-- 
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Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [U-Boot] [PATCH 0/3] Fix multipe typos "choosen" instead of "chosen" in dts/code

2016-03-18 Thread Alexander Merkle

Hi,

may be the subject is misleading. The DTS/DTB entry should be named
  "chosen"
but it was "choosen" with "oo" in the git master. Have a look to the 
commits.


diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
index a4ccbcb..237aa8d 100644
--- a/arch/arm/dts/vf610-twr.dts
+++ b/arch/arm/dts/vf610-twr.dts
@@ -11,7 +11,7 @@
model = "VF610 Tower Board";
compatible = "fsl,vf610-twr", "fsl,vf610";

-   choosen {
+   chosen {
stdout-path = &uart1;
};

Regards,

Alex

Alexander Merkle
System Engineer
  Lauterbach GmbH
  Altlaufstraße 40
  85635 Hoehenkirchen-Siegertsbrunn
  Germany
Tel +49 8102 9876-147
mailto:alexander.mer...@lauterbach.com
http://www.lauterbach.com

On 17.03.2016 16:06, Bhuvanchandra DV wrote:

On 03/17/2016 08:14 PM, Alexander Merkle wrote:


The dts files for NXP/Freescale Vybrid series were broken.
Fixed some other typos in comments & printfs to.


I guess this is not typo the node name is 'chosen'.
Some documentation is here[1].

[1]
http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/chosen.txt





Alexander Merkle (3):
   Fix typo in chosen parameter in vf610-twr.dts
   Fix typo in chosen parameter of pcm052.dts
   Fix typo choosen in comments and printf logs

  arch/arm/dts/pcm052.dts | 2 +-
  arch/arm/dts/vf610-twr.dts  | 2 +-
  common/menu.c   | 2 +-
  drivers/ddr/fsl/lc_common_dimm_params.c | 4 ++--
  4 files changed, 5 insertions(+), 5 deletions(-)




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Re: [U-Boot] [PATCH 1/2] dm: gpio: mxc: fix mxc_gpio_bank_get_value

2016-03-18 Thread Fabio Estevam
Hi Peng,

On Tue, Mar 15, 2016 at 10:27 PM, Peng Fan  wrote:

> If set the SION bit, we need to change the pinmux settings in device tree,
> however device tree are introduced from linux kernel. I would not like
> to change the pinmux setting value.
>
> So I choose to use data register but not PSR register.

Haven't checked the kernel driver, but just curious: how does the
kernel handle this?
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Re: [U-Boot] [U-Boot, v5, 20/30] efi_loader: Implement memory allocation and map

2016-03-18 Thread Tom Rini
On Fri, Mar 04, 2016 at 01:10:04AM +0100, Alexander Graf wrote:

> The EFI loader needs to maintain views of memory - general system memory
> windows as well as used locations inside those and potential runtime service
> MMIO windows.
> 
> To manage all of these, add a few helpers that maintain an internal
> representation of the map the similar to how the EFI API later on reports
> it to the application.
> 
> For allocations, the scheme is very simple. We basically allow allocations
> to replace chunks of previously done maps, so that a new LOADER_DATA
> allocation for example can remove a piece of the RAM map. When no specific
> address is given, we just take the highest possible address in the lowest
> RAM map that fits the allocation size.
> 
> Signed-off-by: Alexander Graf 
> Tested-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [PATCH 14/14] usb: Correct return value in usb_stor_info()

2016-03-18 Thread Marek Vasut
On 03/16/2016 02:45 PM, Simon Glass wrote:
> This should return 0 on success, not 1. Fix it.
> 
> Signed-off-by: Simon Glass 

Yikes. Thanks for finding this.

Acked-by: Marek Vasut 

> ---
> 
>  common/usb_storage.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/common/usb_storage.c b/common/usb_storage.c
> index 1472824..18fdf73 100644
> --- a/common/usb_storage.c
> +++ b/common/usb_storage.c
> @@ -193,7 +193,7 @@ int usb_stor_info(void)
>   return 1;
>   }
>  
> - return 1;
> + return 0;
>  }
>  
>  static unsigned int usb_get_max_lun(struct us_data *us)
> 


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Re: [U-Boot] [PATCH v3 03/10] x86: Move common PCH code into a common place

2016-03-18 Thread Bin Meng
On Wed, Mar 16, 2016 at 9:44 PM, Simon Glass  wrote:
> The SATA indexed register write functions are common to several Intel PCHs.
> Move this into a common location.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v3:
> - Rename pch_common.c to pch.c
>
> Changes in v2: None
>
>  arch/x86/cpu/intel_common/Makefile|  1 +
>  arch/x86/cpu/intel_common/pch.c   | 25 ++
>  arch/x86/cpu/ivybridge/cpu.c  |  1 +
>  arch/x86/cpu/ivybridge/sata.c | 47 +-
>  arch/x86/include/asm/arch-ivybridge/pch.h | 53 -
>  arch/x86/include/asm/pch_common.h | 56 
> +++
>  6 files changed, 99 insertions(+), 84 deletions(-)
>  create mode 100644 arch/x86/cpu/intel_common/pch.c
>  create mode 100644 arch/x86/include/asm/pch_common.h
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH v2 0/5] Enable caches for the RPi2

2016-03-18 Thread Stephen Warren

On 03/17/2016 01:58 AM, Alexander Graf wrote:



On 17.03.16 05:26, Stephen Warren wrote:

On 03/16/2016 08:41 AM, Alexander Graf wrote:

This patch set converts the Raspberry Pi 2 system to properly make use of
the caches available in it.

Because we're running in HYP mode, we first need to teach U-Boot how to
make use of HYP registers and the LPAE page layout which is mandated by
hardware when running in HYP mode.

Then while we're at it, also mark the frame buffer cached to speed up
screen updates.

With this patch set, my Raspberry Pi 3 running in AArch32 mode is a *lot*
faster than without.

Please verify that the code works on a RPi2 as well and doesn't break the
original Pi. In theory it should work, but I only have a 3 to test on
available here.


This series mostly works OK. I found the following results, with my
rpi_dev branch on github if you want to test the exact same commits:

RPi B+ (running rpi_1 build):
- Very minor transient corruption when running "ls mmc 0:2 /etc"

RPi 2 (running rpi_2 build):
RPi 3 (booting in 32-bit mode and running rpi_2 build):
RPi 3 (booting in 32-bit mode and running rpi_3_32b build):
- Obvious transient corruption when running "ls mmc 0:2 /etc"

RPi 3 (booting in 64-bit mode and running rpi_3 build):
- No issues

...

Ugh. It helps when you get the parameters for ALIGN() correctly.

Please just squash the patch below into the last patch, then things
should work fine. If you like I can resend a v3, but I guess the change
is small enough?


With that fix squashed in, the series,
Tested-by: Stephen Warren 

(You probably want to Cc Tom Rini on the revised patches since he 
applies ARM board patches these days.)

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[U-Boot] [PATCH 1/2] net: export eth_setenv_enetaddr_by_index() to net.h

2016-03-18 Thread Roger Quadros
Some TI boards (e.g. IDK) have 4 to 6 ethernet ports and
this function is handy at board.c to configure the
MAC address of the ports.

Signed-off-by: Roger Quadros 
---
 include/net.h | 17 +
 1 file changed, 17 insertions(+)

diff --git a/include/net.h b/include/net.h
index a739f45..03ae232 100644
--- a/include/net.h
+++ b/include/net.h
@@ -237,6 +237,23 @@ void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
 int eth_getenv_enetaddr(const char *name, uchar *enetaddr);
 int eth_setenv_enetaddr(const char *name, const uchar *enetaddr);
 
+/**
+ * eth_setenv_enetaddr_by_index() - set the MAC address envrionment variable
+ *
+ * This sets up an environment variable with the given MAC address (@enetaddr).
+ * The environment variable to be set is defined by <@base_name><@index>addr.
+ * If @index is 0 it is omitted. For common Ethernet this means ethaddr,
+ * eth1addr, etc.
+ *
+ * @base_name:  Base name for variable, typically "eth"
+ * @index:  Index of interface being updated (>=0)
+ * @enetaddr:   Pointer to MAC address to put into the variable
+ * @return 0 if OK, other value on error
+ */
+int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+uchar *enetaddr);
+
+
 /*
  * Get the hardware address for an ethernet interface .
  * Args:
-- 
2.5.0

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Re: [U-Boot] [U-Boot, 01/10] ti_armv7_keystone2: configs: add usb mass storage support

2016-03-18 Thread Tom Rini
On Wed, Mar 09, 2016 at 03:39:30PM +0530, Lokesh Vutla wrote:

> From: Mugunthan V N 
> 
> Add USB mass storage support so that kernel can be read from
> connected usb storage.
> 
> Signed-off-by: Mugunthan V N 
> Signed-off-by: Lokesh Vutla 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH 4/6] cmd: scsi: Group the command portion together, guard with !CONFIG_SPL_BUILD

2016-03-18 Thread Tom Rini
When we switch to including all linker lists in U-Boot it is important
to not include commands as that may lead to link errors due to other
things we have already discarded.  In this case, the SCSI code needs a lot
of attention so for now just guard the command portions.

Signed-off-by: Tom Rini 
---
 cmd/scsi.c |   43 ++-
 1 file changed, 22 insertions(+), 21 deletions(-)

diff --git a/cmd/scsi.c b/cmd/scsi.c
index 951d1e5..8991125 100644
--- a/cmd/scsi.c
+++ b/cmd/scsi.c
@@ -245,6 +245,7 @@ struct blk_desc *scsi_get_dev(int dev)
 }
 #endif
 
+#ifndef CONFIG_SPL_BUILD
 /**
  * scsi boot command intepreter. Derived from diskboot
  */
@@ -368,6 +369,27 @@ int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
return CMD_RET_USAGE;
 }
 
+U_BOOT_CMD(
+   scsi, 5, 1, do_scsi,
+   "SCSI sub-system",
+   "reset - reset SCSI controller\n"
+   "scsi info  - show available SCSI devices\n"
+   "scsi scan  - (re-)scan SCSI bus\n"
+   "scsi device [dev] - show or set current device\n"
+   "scsi part [dev] - print partition table of one or all SCSI devices\n"
+   "scsi read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n"
+   " to memory address `addr'\n"
+   "scsi write addr blk# cnt - write `cnt' blocks starting at block\n"
+   " `blk#' from memory address `addr'"
+);
+
+U_BOOT_CMD(
+   scsiboot, 3, 1, do_scsiboot,
+   "boot from SCSI device",
+   "loadAddr dev:part"
+);
+#endif
+
 
/
  * scsi_read
  */
@@ -710,24 +732,3 @@ void scsi_setup_inquiry(ccb * pccb)
pccb->cmdlen=6;
pccb->msgout[0]=SCSI_IDENTIFY; /* NOT USED */
 }
-
-
-U_BOOT_CMD(
-   scsi, 5, 1, do_scsi,
-   "SCSI sub-system",
-   "reset - reset SCSI controller\n"
-   "scsi info  - show available SCSI devices\n"
-   "scsi scan  - (re-)scan SCSI bus\n"
-   "scsi device [dev] - show or set current device\n"
-   "scsi part [dev] - print partition table of one or all SCSI devices\n"
-   "scsi read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n"
-   " to memory address `addr'\n"
-   "scsi write addr blk# cnt - write `cnt' blocks starting at block\n"
-   " `blk#' from memory address `addr'"
-);
-
-U_BOOT_CMD(
-   scsiboot, 3, 1, do_scsiboot,
-   "boot from SCSI device",
-   "loadAddr dev:part"
-);
-- 
1.7.9.5

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[U-Boot] [PATCH 2/2] net: xilinx_axi: Clear Isolate bit if found during phy setup

2016-03-18 Thread Michal Simek
From: Siva Durga Prasad Paladugu 

In SGMII cases the isolate bit might set after DMA and
ethernet resets and hence check and clear during
setup_phy if it was set.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
---

 drivers/net/xilinx_axi_emac.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 46b8d2d07ee9..4c72702cbd48 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -269,6 +269,23 @@ static int setup_phy(struct udevice *dev)
struct axi_regs *regs = priv->iobase;
struct phy_device *phydev = priv->phydev;
 
+   if (priv->interface == PHY_INTERFACE_MODE_SGMII) {
+   /*
+* In SGMII cases the isolate bit might set
+* after DMA and ethernet resets and hence
+* check and clear if set.
+*/
+   ret = phyread(priv, priv->phyaddr, MII_BMCR, &temp);
+   if (ret)
+   return 0;
+   if (temp & BMCR_ISOLATE) {
+   temp &= ~BMCR_ISOLATE;
+   ret = phywrite(priv, priv->phyaddr, MII_BMCR, temp);
+   if (ret)
+   return 0;
+   }
+   }
+
if (phy_startup(phydev)) {
printf("axiemac: could not initialize PHY %s\n",
   phydev->dev->name);
-- 
1.9.1

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Re: [U-Boot] [U-Boot,v6,19/30] efi_loader: Add "bootefi" command

2016-03-18 Thread Tom Rini
On Thu, Mar 10, 2016 at 12:27:20AM +0100, Alexander Graf wrote:

> In order to execute an EFI application, we need to bridge the gap between
> U-Boot's notion of executing images and EFI's notion of doing the same.
> 
> The best path forward IMHO here is to stick completely to the way U-Boot
> deals with payloads. You manually load them using whatever method to RAM
> and then have a simple boot command to execute them. So in our case, you
> would do
> 
>   # load mmc 0:1 $loadaddr grub.efi
>   # bootefi $loadaddr
> 
> which then gets you into a grub shell. Fdt information known to U-boot
> via the fdt addr command is also passed to the EFI payload.
> 
> Signed-off-by: Alexander Graf 
> Reviewed-by: Simon Glass 
> Tested-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [PATCH 1/2] ARM: bcm283x: don't always define CONFIG_BCM2835

2016-03-18 Thread Tom Rini
On Thu, Mar 17, 2016 at 11:35:39AM -0600, Stephen Warren wrote:
> On 03/17/2016 09:54 AM, Tom Rini wrote:
> >On Wed, Mar 16, 2016 at 09:40:56PM -0600, Stephen Warren wrote:
> >
> >>Currently, CONFIG_BCM2835 is defined for all BCM283x builds and _BCM2836
> >>is defined when building for that SoC. That means there isn't a single
> >>define that means "exactly BCM2835". This will complicate future patches
> >>where BCM2835-vs-anything-else needs to be determined simply.
> >>
> >>Modify the code to define one or the other of CONFIG_BCM2835/BCM2836 so
> >>future patches are simpler.
> >>
> >>Signed-off-by: Stephen Warren 
> >[snip]
> >>diff --git a/include/configs/rpi.h b/include/configs/rpi.h
> >>index 86422e390da2..a788ce42e44c 100644
> >>--- a/include/configs/rpi.h
> >>+++ b/include/configs/rpi.h
> >>@@ -7,6 +7,7 @@
> >>  #ifndef __CONFIG_H
> >>  #define __CONFIG_H
> >>
> >>+#define CONFIG_BCM2835
> >>  #define CONFIG_SYS_CACHELINE_SIZE 32
> >>
> >>  #include "rpi-common.h"
> >
> >Shouldn't we take this as the time to move it to
> >arch/arm/mach-bcm283x/Kconfig ?
> 
> It is probably time yes, although I'd rather do that in a separate
> patch either way. I should be able to work that patch up before
> sending the actual RPi3 board file patches.

OK:

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 00/18] sf: fix support of QSPI memories and controllers

2016-03-18 Thread Cyrille Pitchen
Le 15/03/2016 19:21, Jagan Teki a écrit :
> On Tuesday 15 March 2016 11:42 PM, Cyrille Pitchen wrote:
>> Hi all,
>>
>> This series of patches fixes and extend the support of QSPI memories
>> in the SPI flash framework. The updates are split into many parts to
>> make it easier to understand and review but they should be considered
>> as a whole.
>>
>> This was tested on a Atmel sama5d2 xplained board with a Micron n25q128a
>> memory.
>>
>> Best regards,
>>
>> Cyrille
>>
>> Cyrille Pitchen (18):
>>Revert "sf: Fix quad bit set for micron devices"
>>sf: call spi_claim_bus() and spi_release_bus() only once per read,
>>  write or erase
>>sf: replace spi_flash_read_common() calls by spi_flash_cmd_read()
>>sf: remove spi_flash_write_common()
>>sf: export spi_flash_wait_ready() function
>>sf: share erase generic algorithm
>>sf: share write generic algorithm
>>sf: share read generic algorithm
>>sf: add hooks to handle register read and write operations
>>sf: move support of SST flash into generic spi_flash_write_alg()
>>sf: fix selection of supported READ commands for QSPI memories
>>sf: fix detection of QSPI memories when they boot in Quad or Dual mode
>>sf: add helper function to set the number of dummy bytes
>>sf: add 4byte address opcodes
>>sf: prepare next fixes to support of QSPI memories by manufacturer
>>sf: fix support of Micron memories
>>ARM: at91: clock: add function to get QSPI clocks
>>sf: add driver for Atmel QSPI controller
> 
> Appreciate for the work, we're working on spi-nor framework[1] planning to 
> push in couple of weeks. Will let you know once it merged so that you can add 
> your changes on top of that.
> 
> [1] 
> http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-nor-next
> 

Hi Jagan,

I've started to have a look on your branch. I hope it's not to late for few
comments:

Globally I see the new code attend to match the spi-nor framework from Linux.
OK that's fine but please note the current spi-nor framework in Linux has
incomplete and sometime not working support of QSPI memories.

First, after a discussion with Brian and Bean on linux-mtd [1], Bean's commit
to add support to Micron QSPI memories was reverted since it didn't work alone.
In his reply, Brian agreed the code was not tested and should not have been
merged.

This highlights a more general issue: currently, there is no mean for the
spi-nor framework to notify the SPI controller driver about a SPI protocol
change at the QSPI memory side. This applies to Micron memories when they enter
their Quad I/O mode. If so, ALL commands, even JEDEC Read ID, Read Status
Register, ..., MUST use the SPI 4-4-4 protocol. Commands sent using SPI 1-x-y
protocols are no longer decoded properly.
This also applies to Macronix and Winbond memories if they enter their QPI
mode, which is the equivalent of Micron Quad I/O mode.
This is why I've suggested to add 4 new fields in the struct spi_nor:
- .reg_proto: the SPI protocol to be used by .read_reg() and .write_reg()
  hooks.
- .read_proto: the SPI protocol to be used by the .read() hooks, maybe by the
  .read_mmap() also.
- .write_proto: the SPI protocol to be used by the .write() hooks
- .erase_proto: the SPI protocol to be used by the .erase() hooks.

(Q)SPI controller drivers cannot guess the protocol to be used from the command
op code. Indeed, taking the Micron case as un example, the very same 0xeb op
code may be used with the SPI 1-4-4 protocol (Micron Extended SPI mode) or
with the SPI 4-4-4 protocol (Micron Quad I/O mode).


Also just some words about the naming of SPI x-y-z protocols:
- x refers to the number of I/O lines used to send the op code byte
- y is the number of I/O lines used to send the address, mode/dummy cycles
  (if these cycles exist for the command op code)
- z is the number of I/O lines used to send/receive data (if needed)

So the SNOR_OP_READ_1_1_2_IO macro for the Fast Read Dual I/O command (as
opposed to the macro SNOR_OP_READ_1_1_2 macro for the Fast Read Dual Output
command) doesn't make sense: it should be named SNOR_OP_READ_1_2_2.


Then about the value used for the dummy cycles, it's not always true that we
don't care about initializing them. Depending on the configuration of the
memory, some special dummy cycles, sometime called mode cycles, are used to
during Fast Read operations to make the memory enter/leaver its Continuous Read
mode. Once is Continuous Read mode, the op code byte is no longer sent, it is
implicit and the command actually starts from the address cycles. This mode
is mostly used for XIP applications hence is not relevant for mtd usage.
However we should take care not to enter this Continuous Mode by mistake.
Depending on the memory manufacturer, the Continuous Mode can be disabled by
updating the relevant bit in some configuration register (e.g. setting the XIP
bit in Micron Volatile Configuration Register) or by choosing the right op code
(e.g. fo

Re: [U-Boot] [U-Boot, 04/27] omap_hsmmc: Board-specific TWL6030 MMC power initialization

2016-03-18 Thread Tom Rini
On Sat, Feb 27, 2016 at 07:18:52PM +0100, Paul Kocialkowski wrote:

> Boards using the TWL6030 regulator may not all use the LDOs the same way.
> Some might also not use MMC1 at all, so VMMC would't have to be enabled.
> 
> This delegates TWL6030 MMC power initializations to board-specific functions,
> that may still call twl6030_power_mmc_init for the default behavior.
> 
> Signed-off-by: Paul Kocialkowski 

Applied to u-boot/master, thanks!

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[U-Boot] [PATCH] mmc: bcm2835: fix 64-bit build warning

2016-03-18 Thread Stephen Warren
Fixes:
drivers/mmc/bcm2835_sdhci.c: In function ‘bcm2835_sdhci_init’:
drivers/mmc/bcm2835_sdhci.c:181:17: warning: cast to pointer from integer of 
different size [-Wint-to-pointer-cast]

Signed-off-by: Stephen Warren 
---
 drivers/mmc/bcm2835_sdhci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index 227d2dfa2efd..680b754af63e 100644
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -178,7 +178,7 @@ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq)
 
host = &bcm_host->host;
host->name = "bcm2835_sdhci";
-   host->ioaddr = (void *)regbase;
+   host->ioaddr = (void *)(unsigned long)regbase;
host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B |
SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_NO_HISPD_BIT;
host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
-- 
2.7.3

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Re: [U-Boot] [U-Boot, 20/27] omap4: Check warm reset for reboot mode validity

2016-03-18 Thread Tom Rini
On Sat, Feb 27, 2016 at 07:19:08PM +0100, Paul Kocialkowski wrote:

> Since the SAR registers are filled with garbage on cold reset, this checks 
> for a
> warm reset to assert the validity of reboot mode.
> 
> Signed-off-by: Paul Kocialkowski 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Could you please update your denx.de U-Boot repos?

2016-03-18 Thread Stephen Warren

On 03/18/2016 10:11 AM, Stephen Warren wrote:

I'm running some automated build/test cycles on a variety of git repos
on denx.de. The repos below (master branch in all cases) all have some
build and/or test failures simply because the code in those branches is
very old. Could I ask you to push an updated commit (e.g. v2016.03) into
the master branch in these repos? Once all builds/tests start working
everywhere, it'll make it a bit easier for me to see any new failures.

Thanks very much!

u-boot-tegra.git
u-boot-arm.git
u-boot-mmc.git
u-boot-i2c.git
u-boot-dfu.git

(Note: I don't have any public web pages displaying the status of these
builds set up, but I do email repo owners off-list if any commits they
apply break anything new).


(Sorry for the repeat; I CC'd the wrong mailing list the first time around)
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Re: [U-Boot] [PATCH 1/3] ARM: keystone2: Convert BOOTBITMASK to static inline function

2016-03-18 Thread Tom Rini
On Tue, Mar 15, 2016 at 10:25:51AM -0500, Nishanth Menon wrote:

> BOOTBITMASK is almost impossible to decode, so convert it into a simpler
> static line functions of equivalent solution.
> 
> Reported-by: Tom Rini 
> Signed-off-by: Nishanth Menon 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 5/5] bcm2835 video: Map fb as cached

2016-03-18 Thread Andreas Färber
Am 15.03.2016 um 18:21 schrieb Alexander Graf:
> The bcm2835 frame buffer is in RAM, so we can easily map it as cached and gain
> all the glorious performance boost that brings with it.
> 
> Signed-off-by: Alexander Graf 
> ---
>  drivers/video/bcm2835.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c
> index bff1fcb..fe49f2e 100644
> --- a/drivers/video/bcm2835.c
> +++ b/drivers/video/bcm2835.c
> @@ -106,6 +106,12 @@ void lcd_ctrl_init(void *lcdbase)
>  
>   gd->fb_base = bus_to_phys(
>   msg_setup->allocate_buffer.body.resp.fb_address);
> +
> + /* Enable dcache for the frame buffer */
> +mmu_set_region_dcache_behaviour(gd->fb_base,

Spaces vs. tab.

Andreas

> + ALIGN(PAGE_SIZE, msg_setup->allocate_buffer.body.resp.fb_size),
> + DCACHE_WRITEBACK);
> + lcd_set_flush_dcache(1);
>  }
>  
>  void lcd_enable(void)
> 


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Re: [U-Boot] [PATCH 1/2] ARM: bcm283x: don't always define CONFIG_BCM2835

2016-03-18 Thread Stephen Warren

On 03/17/2016 09:54 AM, Tom Rini wrote:

On Wed, Mar 16, 2016 at 09:40:56PM -0600, Stephen Warren wrote:


Currently, CONFIG_BCM2835 is defined for all BCM283x builds and _BCM2836
is defined when building for that SoC. That means there isn't a single
define that means "exactly BCM2835". This will complicate future patches
where BCM2835-vs-anything-else needs to be determined simply.

Modify the code to define one or the other of CONFIG_BCM2835/BCM2836 so
future patches are simpler.

Signed-off-by: Stephen Warren 

[snip]

diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 86422e390da2..a788ce42e44c 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -7,6 +7,7 @@
  #ifndef __CONFIG_H
  #define __CONFIG_H

+#define CONFIG_BCM2835
  #define CONFIG_SYS_CACHELINE_SIZE 32

  #include "rpi-common.h"


Shouldn't we take this as the time to move it to
arch/arm/mach-bcm283x/Kconfig ?


It is probably time yes, although I'd rather do that in a separate patch 
either way. I should be able to work that patch up before sending the 
actual RPi3 board file patches.


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Re: [U-Boot] fdt problem

2016-03-18 Thread Peng Fan
On Tue, Mar 15, 2016 at 09:27:51AM +0100, Safa Hamza wrote:
>the same problem ... but when i wrote fdt resize before U-Boot# fdt mknode /
>chosen modules no error appeared 
>is that right ?

Yeah. correct. "fdt mknode /xxx" needs more space, so need to first 
"fdt addr xxx [0x10]", then "fdt resize", then "mknode"

Regards,
Peng.

>
>On Tue, Mar 15, 2016 at 6:34 AM, Peng Fan  wrote:
>
>Hi Safa,
>
>Cc Xen experts, Ian.
>   
>On Mon, Mar 14, 2016 at 10:21:15AM +0100, Safa Hamza wrote:
>>i'm trying to run xen on omap5 ..but i get a problem while doing this
>>libfdt fdt_setprop(): FDT_ERR_NOSPACE
>>
>>
>
> **
>>U-Boot#  setenv dtb_addr_r 0x825f
>>U-Boot# setenv xen_addr_r 0x9000
>>U-Boot# setenv kernel_addr_r 0xa000
>>U-Boot# setenv xen_bootargs 'sync_console console=dtuart dtuart=serial2'
>>U-Boot#  setenv dom0_bootargs 'console=hvc0,115200n8 earlyprintk=xen debug
>>ignore_loglevel root=/dev/mmcblk0p2 rw rootwait fixrtc'
>>U-Boot# fatload mmc 0:1 $dtb_addr_r omap5-uevm.dtb
>>reading omap5-uevm.dtb
>>44836 bytes read in 7 ms (6.1 MiB/s)
>>U-Boot# fatload mmc 0:1 $xen_addr_r xen-uImage
>>reading xen-uImage
>>787372 bytes read in 43 ms (17.5 MiB/s)
>>U-Boot#  fatload mmc 0:1 $kernel_addr_r zImage
>>reading zImage
>>4284248 bytes read in 212 ms (19.3 MiB/s)
>>U-Boot# fdt addr $dtb_addr_r
>
>I think you need to enlarge the space allocated to device tree.
>
>Change "fdt addr $dtb_addr_r" to "fdt addr $dtb_addr_r 0x10", then
>have a try.
>
>Regards,
>Peng.
>   
>>U-Boot# fdt resize
>>U-Boot# fdt set /chosen xen,xen-bootargs \"$xen_bootargs\"
>>U-Boot# fdt resize
>>U-Boot# fdt set /chosen xen,dom0-bootargs \"$dom0_bootargs\"
>>U-Boot# fdt mknode /chosen modules
>>libfdt fdt_add_subnode(): FDT_ERR_NOSPACE
>>
>
> *
>>how can i fix this ??
>>___
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>
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[U-Boot] [PATCH 05/14] part_efi: Drop the NULL check on dev_desc in part_print_efi()

2016-03-18 Thread Simon Glass
This cannot be NULL since part_print() calls this function and requires it
to be non-NULL.

Reported-by: Coverity (CID: 138498)
Signed-off-by: Simon Glass 
---

 disk/part_efi.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 77bdfcb..93a7e81 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -184,10 +184,6 @@ void part_print_efi(struct blk_desc *dev_desc)
char uuid[37];
unsigned char *uuid_bin;
 
-   if (!dev_desc) {
-   printf("%s: Invalid Argument(s)\n", __func__);
-   return;
-   }
/* This function validates AND fills in the GPT header and PTE */
if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
 gpt_head, &gpt_pte) != 1) {
-- 
2.7.0.rc3.207.g0ac5344

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Re: [U-Boot] [PATCH 2/6] ARM: keystone2: Switch to using the poweroff command

2016-03-18 Thread Tom Rini
On Wed, Mar 16, 2016 at 11:03:04AM -0400, Tom Rini wrote:

> Now that we have a standard way to power off the hardware, switch to
> using that rather than our own command.
> 
> Cc: Vitaly Andrianov 
> Cc: Nishanth Menon 
> Cc: Lokesh Vutla 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 2/5] arm: Add support for HYP mode and LPAE page tables

2016-03-18 Thread Tom Rini
On Wed, Mar 16, 2016 at 09:33:12AM +0100, Alexander Graf wrote:
> 
> 
> On 15.03.16 18:35, Tom Rini wrote:
> > On Tue, Mar 15, 2016 at 06:21:45PM +0100, Alexander Graf wrote:
> > 
> >> Signed-off-by: Alexander Graf 
> >> ---
> >>  arch/arm/include/asm/system.h | 99 
> >> ---
> >>  arch/arm/lib/cache-cp15.c | 66 ++---
> >>  2 files changed, 153 insertions(+), 12 deletions(-)
> > 
> > I think in this patch we need to add SYS_ARM_LPAE to arch/arm/Kconfig
> > and then later select it under ARCH_BCM283X or TARGET_RPI_2 (I don't
> > know the SoC well enough to say which side is forcing this on us).
> 
> So you'd prefer to go via kconfig rather than a board #define?

Yes.

> The reason we need this is that U-Boot gets entered in HYP mode. This is
> not specific to the SoC, it's specific to the way it boots, so it
> belongs in the rpi2 configuration. The only other system I'm aware of
> that supposedly works like this is the Calxeda Midway.

Right, OK, so selected by TARGET_RPI_2 it is :)

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