Re: [U-Boot] [PATCH v4 00/13] ARM: uniphier: add ARMv8 SoCs support

2016-04-23 Thread Masahiro Yamada 
2016-04-21 14:43 GMT+09:00 Masahiro Yamada :
>
> Masahiro Yamada (13):
>   pinctrl: uniphier: rename function/array names
>   pinctrl: uniphier: fix NAND and SD pin-mux settings for PH1-LD11/LD20
>   ARM: uniphier: avoid unaligned access to DT on 64bit SoC
>   ARM: dts: uniphier: use Ref Daughter board on PH1-LD20 Ref board
>   ARM: dts: uniphier: move aliases node up to satisfy fdtgrep
>   ARM: uniphier: add sg_set_iectrl_range()
>   ARM: uniphier: carry on booting for Unknown boot mode
>   ARM: uniphier: rework uniphier_set_fdt_file()
>   ARM: uniphier: add PH1-LD20 SoC support
>   ARM: uniphier: reserve the last 64 byte of SDRAM
>   ARM: dts: uniphier: add SD controller node for PH1-LD20
>   clk: uniphier: add Media I/O clock driver support for PH1-LD20
>   ARM: uniphier: increase image load speed from NOR device
>
>

Series, applied to u-boot-uniphier/master.

-- 
Best Regards
Masahiro Yamada
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[U-Boot] pull request: u-boot-uniphier/master

2016-04-23 Thread Masahiro Yamada 
Hi Tom,

Finally, this series adds support for the first ARMv8 SoC
from Socionext Inc.



The following changes since commit 65341967ce9ef2656c61dcd3126536e8865c349d:

  Merge branch 'master' of git://git.denx.de/u-boot-x86 (2016-04-22
07:25:18 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-uniphier.git master

for you to fetch changes up to b75e072c1c53cade2c3944433d852d7d6046661b:

  ARM: uniphier: speed up loading kernel image from NOR device
(2016-04-24 09:56:47 +0900)


Masahiro Yamada (13):
  pinctrl: uniphier: rename function/array names
  pinctrl: uniphier: fix NAND and SD pin-mux settings for PH1-LD11/LD20
  ARM: uniphier: avoid unaligned access to DT on 64bit SoC
  ARM: dts: uniphier: use Ref Daughter board on PH1-LD20 Ref board
  ARM: dts: uniphier: move aliases node up to satisfy fdtgrep
  ARM: uniphier: add sg_set_iectrl_range()
  ARM: uniphier: carry on booting for Unknown boot mode
  ARM: uniphier: rework uniphier_set_fdt_file()
  ARM: uniphier: add PH1-LD20 SoC support
  ARM: uniphier: reserve the last 64 byte of SDRAM
  ARM: dts: uniphier: add SD controller node for PH1-LD20
  clk: uniphier: add Media I/O clock driver support for PH1-LD20
  ARM: uniphier: speed up loading kernel image from NOR device

 arch/arm/dts/uniphier-ph1-ld11-ref.dts|  18 +-
 arch/arm/dts/uniphier-ph1-ld20-ref.dts|  19 +-
 arch/arm/dts/uniphier-ph1-ld20.dtsi   |  17 ++
 arch/arm/mach-uniphier/Kconfig|   5 +
 arch/arm/mach-uniphier/Makefile   |   1 +
 arch/arm/mach-uniphier/arm64/Makefile |  10 +
 arch/arm/mach-uniphier/arm64/arm-cci500.c |  41 +++
 arch/arm/mach-uniphier/arm64/mem_map.c|  28 ++
 arch/arm/mach-uniphier/arm64/smp.S|  19 ++
 arch/arm/mach-uniphier/arm64/smp_kick_cpus.c  |  31 +++
 arch/arm/mach-uniphier/arm64/timer.c  |  38 +++
 arch/arm/mach-uniphier/board_common.c |   6 +-
 arch/arm/mach-uniphier/board_early_init_f.c   |   8 +
 arch/arm/mach-uniphier/board_late_init.c  |  66 ++---
 arch/arm/mach-uniphier/boards.c   |  25 ++
 arch/arm/mach-uniphier/boot-mode/Makefile |   1 +
 arch/arm/mach-uniphier/boot-mode/boot-device.h|   2 +
 arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c |  77 ++
 arch/arm/mach-uniphier/boot-mode/boot-mode.c  |   4 +
 arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c |   5 +
 arch/arm/mach-uniphier/clk/Makefile   |   1 +
 arch/arm/mach-uniphier/clk/clk-ld20.c |  14 +
 arch/arm/mach-uniphier/cpu_info.c |   2 +-
 arch/arm/mach-uniphier/dram/Makefile  |   1 +
 arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h|  41 +++
 arch/arm/mach-uniphier/dram/umc-ld20-regs.h   |  73 ++
 arch/arm/mach-uniphier/dram/umc-ld20.c| 306 ++
 arch/arm/mach-uniphier/dram_init.c|  10 +-
 arch/arm/mach-uniphier/early-clk/Makefile |   1 +
 arch/arm/mach-uniphier/early-clk/early-clk-ld20.c |  30 +++
 arch/arm/mach-uniphier/init.h |   7 +
 arch/arm/mach-uniphier/init/Makefile  |   1 +
 arch/arm/mach-uniphier/init/init-ld20.c   |  53 
 arch/arm/mach-uniphier/init/init.c|   5 +
 arch/arm/mach-uniphier/memconf/Makefile   |   1 +
 arch/arm/mach-uniphier/memconf/memconf-pxs2.c |   3 +
 arch/arm/mach-uniphier/pinctrl/Makefile   |   1 +
 arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c |  46 
 arch/arm/mach-uniphier/sbc/Makefile   |   1 +
 arch/arm/mach-uniphier/sg-regs.h  |  11 +-
 configs/uniphier_ld20_defconfig   |  28 ++
 drivers/clk/uniphier/clk-uniphier-mio.c   |   4 +
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c  |   8 +-
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c   |  34 +--
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c  |  34 +--
 drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c  |  34 +--
 drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c  |  34 +--
 drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c  |  34 +--
 drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c  |  34 +--
 include/configs/uniphier.h|  52 +++-
 50 files changed, 1151 insertions(+), 174 deletions(-)
 create mode 100644 arch/arm/mach-uniphier/arm64/Makefile
 create mode 100644 arch/arm/mach-uniphier/arm64/arm-cci500.c
 create mode 100644 arch/arm/mach-uniphier/arm64/mem_map.c
 create mode 100644 arch/arm/mach-uniphier/arm64/smp.S
 create mode 100644 arch/arm/mach-uniphier/arm64/smp_kick_cpus.c
 create mode 100644 arch/arm/mach-uniphier/arm64/timer.c
 create mode 100644 arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
 create mode 100644 arch/arm/mach-uniphier/clk/clk-ld20.c
 create mode 100644

Re: [U-Boot] [PATCH] Revert "rockchip: rk3288: correct sdram setting"

2016-04-23 Thread Simon Glass 
On 20 April 2016 at 13:25, Simon Glass  wrote:
> On 15 April 2016 at 14:43, Vagrant Cascadian  wrote:
>> This reverts commit b5788dc0dd9570e98552833767f4373db965985d.
>>
>> Ram size is incorrectly reported as 512MB on a firefly-rk3288 board
>> with 2GB of ram. Reverting this patch displays the full amount of ram.
>>
>> Signed-off-by: Vagrant Cascadian 
>> ---
>>
>>  arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 14 +++---
>>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> Acked-by: Simon Glass 

Applied to u-boot-rockchip/master, thanks!
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Re: [U-Boot] [PATCH 38/60] ARM: tegra: remove tegra_get_chip()

2016-04-23 Thread Simon Glass 
Hi Stephen,

On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> U-Boot is compiled for a single board, which in turn uses a specific SoC.
> There's no need to make runtime decisions based on SoC ID. While there's
> certainly an argument for making the code support different SoCs at
> run-time, the Tegra code is so far from that possible ideal that the
> existing runtime code is an anomaly. If this changes in the future, all
> runtime decisions should likely be based on DT anyway.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/ap.c   | 106 
> ++---
>  arch/arm/mach-tegra/cache.c|  20 +++
>  arch/arm/mach-tegra/cpu.c  |  16 ++---
>  arch/arm/mach-tegra/cpu.h  |   6 --
>  arch/arm/mach-tegra/tegra20/warmboot.c |  20 ++-
>  5 files changed, 51 insertions(+), 117 deletions(-)

What exactly is missing to prevent multi-arch support? Shouldn't we
head towards that rather than making it harder?

Regards,
Simon
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Re: [U-Boot] [PATCH 37/60] ARM: tegra: move SDIOCFG_DRV* to pinmux.h

2016-04-23 Thread Simon Glass 
On 19 April 2016 at 14:59, Stephen Warren  wrote:
> From: Stephen Warren 
>
> These defines are used with APIs in pinmux.h, so it makes sense to put
> them into the same header. It also allows all includes of gp_padctrl.h
> to be removed from code outside arch/arm/mach-tegra/.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/include/asm/arch-tegra114/gp_padctrl.h | 8 +---
>  arch/arm/include/asm/arch-tegra114/pinmux.h | 8 +++-
>  arch/arm/include/asm/arch-tegra124/gp_padctrl.h | 8 +---
>  arch/arm/include/asm/arch-tegra124/pinmux.h | 8 +++-
>  arch/arm/include/asm/arch-tegra210/gp_padctrl.h | 8 +---
>  arch/arm/include/asm/arch-tegra210/pinmux.h | 8 +++-
>  arch/arm/include/asm/arch-tegra30/gp_padctrl.h  | 8 +---
>  arch/arm/include/asm/arch-tegra30/pinmux.h  | 8 +++-
>  board/avionic-design/common/tamonten-ng.c   | 1 -
>  board/nvidia/cardhu/cardhu.c| 1 -
>  board/nvidia/dalmore/dalmore.c  | 3 +--
>  board/toradex/apalis_t30/apalis_t30.c   | 1 -
>  12 files changed, 33 insertions(+), 37 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH V4] dm: gpio: pca953x: introduce driver model support for pca953x

2016-04-23 Thread Simon Glass 
On 14 April 2016 at 07:54, Michal Simek  wrote:
> On 14.4.2016 15:45, Peng Fan wrote:
>> Introduce a new driver that supports driver model for pca953x.
>> The pca953x chips are used as I2C I/O expanders.
>> This driver is designed to support the following chips:
>> "
>> 4 bits: pca9536, pca9537
>> 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
>> pca9556, pca9557, pca9574, tca6408, xra1202
>> 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
>>  tca6416
>> 24 bits: tca6424
>> 40 bits: pca9505, pca9698
>> "
>> But for now this driver only supports max 24 bits and pca953x compatible
>> chips. pca957x compatible chips are not supported now.
>> These can be addressed when we need to add such support for the different
>> chips.
>> This driver has been tested on i.MX6 SoloX Sabreauto board with max7310
>> i2c expander using gpio command as following:
>>
>> =>gpio status -a
>> Bank gpio@30_:
>> gpio@30_0: input: 1 [ ]
>>
>> => dm tree:
>>  i2c [   ]|   |   `-- i2c@021a8000
>>  gpio[   ]|   |   |-- gpio@30
>>  gpio[   ]|   |   `-- gpio@32
>>
>> Signed-off-by: Peng Fan 
>> Cc: Simon Glass 
>> Cc: Masahiro Yamada 
>> Cc: Wenyou Yang 
>> Cc: Daniel Schwierzeck 
>> Cc: Purna Chandra Mandal 
>> Cc: Thomas Chou 
>> Cc: Bhuvanchandra DV 
>> Cc: Andrea Scian 
>> Cc: Michal Simek 
>> Cc: Stefano Babic 
>> Cc: Fabio Estevam 
>> Acked-by: Simon Glass 
>> Tested-by: Michal Simek  #on ZynqMP zcu102
>> ---
>
> When someone takes this there is a conflict in Kconfig but it is easy to
> resolved. All looks good.
>
> Thanks,
> Michal

Applied to u-boot-dm, thanks!
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Re: [U-Boot] [PATCH v3 4/8] serial: s5p: get the port id number from the alias of the device node

2016-04-23 Thread Simon Glass 
On 23 April 2016 at 10:48, Thomas Abraham  wrote:
> From: Thomas Abraham 
>
> The port id, if not specified in the device node, can be obtained from
> the alias of the device node listed in the aliases node.
>
> Cc: Minkyu Kang 
> Signed-off-by: Thomas Abraham 
> ---
>  drivers/serial/serial_s5p.c |4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 3/8] clk: exynos: add clock driver for Exynos7420 Soc

2016-04-23 Thread Simon Glass 
On 23 April 2016 at 10:48, Thomas Abraham  wrote:
> From: Thomas Abraham 
>
> Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
> blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
> are added in this initial version of the driver.
>
> Cc: Minkyu Kang 
> Cc: Simon Glass 
> Signed-off-by: Thomas Abraham 
> ---
>  drivers/clk/Kconfig|1 +
>  drivers/clk/Makefile   |1 +
>  drivers/clk/exynos/Kconfig |   18 ++
>  drivers/clk/exynos/Makefile|9 +
>  drivers/clk/exynos/clk-exynos7420.c|  236 
> 
>  drivers/clk/exynos/clk-pll.c   |   33 
>  drivers/clk/exynos/clk-pll.h   |9 +
>  include/dt-bindings/clock/exynos7420-clk.h |  207 
>  8 files changed, 514 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/clk/exynos/Kconfig
>  create mode 100644 drivers/clk/exynos/Makefile
>  create mode 100644 drivers/clk/exynos/clk-exynos7420.c
>  create mode 100644 drivers/clk/exynos/clk-pll.c
>  create mode 100644 drivers/clk/exynos/clk-pll.h
>  create mode 100644 include/dt-bindings/clock/exynos7420-clk.h

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 6/8] arm: exynos: realign the code to allow support for newer 64-bit platforms

2016-04-23 Thread Simon Glass 
On 23 April 2016 at 10:48, Thomas Abraham  wrote:
> From: Thomas Abraham 
>
> The existing Exynos 32-bit platform support needs to be realigned in
> order to support newer 64-bit Exynos platforms. The driver model will
> be utlized for drivers on the 64-bit Exynos platforms and so some of
> the older platform support code would not be required for the newer
> 64-bit Exynos platforms.
>
> Cc: Minkyu Kang 
> Signed-off-by: Thomas Abraham 
> ---
>  arch/arm/Kconfig |1 -
>  arch/arm/mach-exynos/Kconfig |   34 
> +-
>  arch/arm/mach-exynos/Makefile|5 ++-
>  arch/arm/mach-exynos/include/mach/cpu.h  |2 +-
>  arch/arm/mach-exynos/include/mach/gpio.h |2 +-
>  arch/arm/mach-exynos/soc.c   |2 +
>  configs/arndale_defconfig|1 +
>  configs/odroid-xu3_defconfig |1 +
>  configs/odroid_defconfig |1 +
>  configs/origen_defconfig |1 +
>  configs/peach-pi_defconfig   |1 +
>  configs/peach-pit_defconfig  |1 +
>  configs/s5pc210_universal_defconfig  |1 +
>  configs/smdk5250_defconfig   |1 +
>  configs/smdk5420_defconfig   |1 +
>  configs/smdkv310_defconfig   |1 +
>  configs/snow_defconfig   |1 +
>  configs/spring_defconfig |1 +
>  configs/trats2_defconfig |1 +
>  configs/trats_defconfig  |1 +
>  20 files changed, 54 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 0/9] Add support for Espresso7420 board

2016-04-23 Thread Thomas Abraham 
Hi Alim,

On Wed, Apr 20, 2016 at 2:47 PM, Alim Akhtar  wrote:
> Hi Thomas,
>
> On 04/13/2016 04:13 PM, Thomas Abraham wrote:
>>
>> This patch series add support for Espresso7420 board. This board is
>> the development/evaluation platform for Exynos7420 SoC. The SoC is
>> composed of quad Cortex-A57 block, a quad Cortex-A53 block and
>> various other peripherals. The board includes multiple components
>> such as the EMMC/Codec and support multiple interconnect interfaces
>> including HDMI and USB.
>>
>> The first two patches add Exynos7420 pinctrl driver support which
>> was initially posted seperatly but now included in this series.
>> Thanks to Simon Glass and Minkyu Kang for their review. The rest
>> of the patches add Exynos7420 clock driver support, minor changes
>> in the S5P serial driver, Exynos7420 SoC support and Espresso7420
>> board support.
>>
>> Thomas Abraham (9):
>>pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devices
>>pinctrl: Add pinctrl driver support for Exynos7420 SoC
>>clk: fixed_rate: allow driver usage prior to relocation
>>clk: exynos: add clock driver for Exynos7420 Soc
>>serial: s5p: get the port id number from the alias of the device node
>>serial: s5p: use clock api to get clock rate
>>arm: exynos: realign the code to allow support for newer 64-bit
>> platforms
>>arm: exynos: add support for Exynos7420 SoC
>>board: samsung: add initial Espresso7420 board support
>>
> Thanks for posting this series.
> Have tested this series on espresso7420 board.
> Feel free to add
> Tested-by: Alim Akhtar 

Thanks. There were few more changes in the v3 version and so your
tested-by tag was dropped for the v3 version. Request your review
again.

Regards,
Thomas.

>
>
>>   arch/arm/Kconfig|1 -
>>   arch/arm/dts/Makefile   |1 +
>>   arch/arm/dts/exynos7420-espresso7420.dts|   24 +++
>>   arch/arm/dts/exynos7420.dtsi|   82 ++
>>   arch/arm/mach-exynos/Kconfig|   25 +++
>>   arch/arm/mach-exynos/Makefile   |8 +-
>>   arch/arm/mach-exynos/include/mach/cpu.h |2 +-
>>   arch/arm/mach-exynos/include/mach/gpio.h|2 +-
>>   arch/arm/mach-exynos/mmu-arm64.c|   35 
>>   arch/arm/mach-exynos/soc.c  |   10 ++
>>   board/samsung/common/board.c|   18 ++-
>>   board/samsung/espresso7420/Kconfig  |   12 ++
>>   board/samsung/espresso7420/MAINTAINERS  |5 +
>>   board/samsung/espresso7420/Makefile |   16 ++
>>   board/samsung/espresso7420/espresso7420.c   |   16 ++
>>   configs/espresso7420_defconfig  |8 +
>>   drivers/clk/Kconfig |1 +
>>   drivers/clk/Makefile|1 +
>>   drivers/clk/clk_fixed_rate.c|1 +
>>   drivers/clk/exynos/Kconfig  |   18 ++
>>   drivers/clk/exynos/Makefile |9 +
>>   drivers/clk/exynos/clk-exynos7420.c |  227
>> +++
>>   drivers/clk/exynos/clk-pll.c|   35 
>>   drivers/clk/exynos/clk-pll.h|9 +
>>   drivers/pinctrl/Kconfig |1 +
>>   drivers/pinctrl/Makefile|1 +
>>   drivers/pinctrl/exynos/Kconfig  |   10 ++
>>   drivers/pinctrl/exynos/Makefile |9 +
>>   drivers/pinctrl/exynos/pinctrl-exynos.c |  141 +
>>   drivers/pinctrl/exynos/pinctrl-exynos.h |   77 +
>>   drivers/pinctrl/exynos/pinctrl-exynos7420.c |  121 ++
>>   drivers/pinctrl/pinctrl-uclass.c|1 +
>>   drivers/serial/serial_s5p.c |   17 ++-
>>   include/configs/espresso7420.h  |   35 
>>   include/configs/exynos7420-common.h |  117 ++
>>   include/dt-bindings/clock/exynos7420-clk.h  |  207
>> 
>>   36 files changed, 1295 insertions(+), 8 deletions(-)
>>   create mode 100644 arch/arm/dts/exynos7420-espresso7420.dts
>>   create mode 100644 arch/arm/dts/exynos7420.dtsi
>>   create mode 100644 arch/arm/mach-exynos/mmu-arm64.c
>>   create mode 100644 board/samsung/espresso7420/Kconfig
>>   create mode 100644 board/samsung/espresso7420/MAINTAINERS
>>   create mode 100644 board/samsung/espresso7420/Makefile
>>   create mode 100644 board/samsung/espresso7420/espresso7420.c
>>   create mode 100644 configs/espresso7420_defconfig
>>   create mode 100644 drivers/clk/exynos/Kconfig
>>   create mode 100644 drivers/clk/exynos/Makefile
>>   create mode 100644 drivers/clk/exynos/clk-exynos7420.c
>>   create mode 100644 drivers/clk/exynos/clk-pll.c
>>   create mode 100644 drivers/clk/exynos/clk-pll.h
>>   create mode 100644 drivers/pinctrl/exynos/Kconfig
>>   create mode 100644 drivers/pinctrl/exynos/Makefile
>>   create mode 100644

[U-Boot] [PATCH v3 7/8] arm: exynos: add support for Exynos7420 SoC

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

Add support for Exynos7420 SoC. The Exynos7420 SoC has four Cortex-A57
and four Cortex-A53 CPUs and includes various peripheral controllers.

Signed-off-by: Thomas Abraham 
Reviewed-by: Simon Glass 
---
 arch/arm/dts/exynos7420.dtsi|   83 +
 arch/arm/mach-exynos/Kconfig|8 +++
 arch/arm/mach-exynos/Makefile   |1 +
 arch/arm/mach-exynos/mmu-arm64.c|   35 +++
 arch/arm/mach-exynos/soc.c  |8 +++
 include/configs/espresso7420.h  |   34 +++
 include/configs/exynos7420-common.h |  113 +++
 7 files changed, 282 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/dts/exynos7420.dtsi
 create mode 100644 arch/arm/mach-exynos/mmu-arm64.c
 create mode 100644 include/configs/espresso7420.h
 create mode 100644 include/configs/exynos7420-common.h

diff --git a/arch/arm/dts/exynos7420.dtsi b/arch/arm/dts/exynos7420.dtsi
new file mode 100644
index 000..b398021
--- /dev/null
+++ b/arch/arm/dts/exynos7420.dtsi
@@ -0,0 +1,83 @@
+/*
+ * Samsung Exynos7420 SoC device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+#include "skeleton.dtsi"
+#include 
+/ {
+   compatible = "samsung,exynos7420";
+
+   fin_pll: xxti {
+   compatible = "fixed-clock";
+   clock-output-names = "fin_pll";
+   u-boot,dm-pre-reloc;
+   #clock-cells = <0>;
+   };
+
+   clock_topc: clock-controller@1057 {
+   compatible = "samsung,exynos7-clock-topc";
+   reg = <0x1057 0x1>;
+   u-boot,dm-pre-reloc;
+   #clock-cells = <1>;
+   clocks = <_pll>;
+   clock-names = "fin_pll";
+   };
+
+   clock_top0: clock-controller@105d {
+   compatible = "samsung,exynos7-clock-top0";
+   reg = <0x105d 0xb000>;
+   u-boot,dm-pre-reloc;
+   #clock-cells = <1>;
+   clocks = <_pll>, <_topc DOUT_SCLK_BUS0_PLL>,
+<_topc DOUT_SCLK_BUS1_PLL>,
+<_topc DOUT_SCLK_CC_PLL>,
+<_topc DOUT_SCLK_MFC_PLL>;
+   clock-names = "fin_pll", "dout_sclk_bus0_pll",
+ "dout_sclk_bus1_pll", "dout_sclk_cc_pll",
+ "dout_sclk_mfc_pll";
+   };
+
+   clock_peric1: clock-controller@14c8 {
+   compatible = "samsung,exynos7-clock-peric1";
+   reg = <0x14c8 0xd00>;
+   u-boot,dm-pre-reloc;
+   #clock-cells = <1>;
+   clocks = <_pll>, <_top0 DOUT_ACLK_PERIC1>,
+<_top0 CLK_SCLK_UART1>,
+<_top0 CLK_SCLK_UART2>,
+<_top0 CLK_SCLK_UART3>;
+   clock-names = "fin_pll", "dout_aclk_peric1_66",
+ "sclk_uart1", "sclk_uart2", "sclk_uart3";
+   };
+
+   pinctrl@1347 {
+   compatible = "samsung,exynos7420-pinctrl";
+   reg = <0x1347 0x1000>;
+   u-boot,dm-pre-reloc;
+
+   serial2_bus: serial2-bus {
+   samsung,pins = "gpd1-4", "gpd1-5";
+   samsung,pin-function = <2>;
+   samsung,pin-pud = <3>;
+   samsung,pin-drv = <0>;
+   u-boot,dm-pre-reloc;
+   };
+   };
+
+   serial@14C3 {
+   compatible = "samsung,exynos4210-uart";
+   reg = <0x14C3 0x100>;
+   u-boot,dm-pre-reloc;
+   clocks = <_peric1 PCLK_UART2>,
+<_peric1 SCLK_UART2>;
+   clock-names = "uart", "clk_uart_baud0";
+   pinctrl-names = "default";
+   pinctrl-0 = <_bus>;
+   };
+};
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 28a6a60..0a6cb33 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -20,6 +20,14 @@ config ARCH_EXYNOS5
  Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
  in this family including Exynos5250, Exynos5420 and Exynos5800.
 
+config ARCH_EXYNOS7
+   bool "Exynos7 SoC family"
+   select ARM64
+   help
+ Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or
+ Cortex-A53 CPU (and some in a big.LITTLE configuration). There are
+ multiple SoCs in this family including Exynos7420.
+
 endchoice
 
 if ARCH_EXYNOS4
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index f3c07b7..0cc6c32 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -7,6 +7,7 @@
 
 obj-y  += soc.o
 obj-$(CONFIG_CPU_V7)

[U-Boot] [PATCH v3 8/8] board: samsung: add initial Espresso7420 board support

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

Espresso7420 is a development/evaluation board for Exynos7420 SoC. It
includes multiple onboard compoments (EMMC/Codec) and various
interconnects (USB/HDMI).

Signed-off-by: Thomas Abraham 
Reviewed-by: Simon Glass 
---
 arch/arm/dts/Makefile |1 +
 arch/arm/dts/exynos7420-espresso7420.dts  |   24 
 arch/arm/mach-exynos/Kconfig  |   19 +++
 board/samsung/common/board.c  |   10 --
 board/samsung/espresso7420/Kconfig|   16 
 board/samsung/espresso7420/MAINTAINERS|5 +
 board/samsung/espresso7420/Makefile   |   10 ++
 board/samsung/espresso7420/espresso7420.c |   16 
 configs/espresso7420_defconfig|9 +
 9 files changed, 108 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/exynos7420-espresso7420.dts
 create mode 100644 board/samsung/espresso7420/Kconfig
 create mode 100644 board/samsung/espresso7420/MAINTAINERS
 create mode 100644 board/samsung/espresso7420/Makefile
 create mode 100644 board/samsung/espresso7420/espresso7420.c
 create mode 100644 configs/espresso7420_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aa31fd9..a08e45f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -19,6 +19,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5420-peach-pit.dtb \
exynos5800-peach-pi.dtb \
exynos5422-odroidxu3.dtb
+dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \
rk3288-jerry.dtb \
diff --git a/arch/arm/dts/exynos7420-espresso7420.dts 
b/arch/arm/dts/exynos7420-espresso7420.dts
new file mode 100644
index 000..f17a848
--- /dev/null
+++ b/arch/arm/dts/exynos7420-espresso7420.dts
@@ -0,0 +1,24 @@
+/*
+ * Samsung Espresso7420 board device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include "exynos7420.dtsi"
+/ {
+   model = "Samsung Espresso7420 board based on Exynos7420";
+   compatible = "samsung,espresso7420", "samsung,exynos7420";
+
+   aliases {
+   serial2 = "/serial@14C3";
+   console = "/serial@14C3";
+   pinctrl0 = "/pinctrl@1347";
+   };
+};
+
+_pll {
+   clock-frequency = <2400>;
+};
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 0a6cb33..c25fcf3 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -109,6 +109,24 @@ config TARGET_PEACH_PIT
 endchoice
 endif
 
+if ARCH_EXYNOS7
+
+choice
+   prompt "EXYNOS7 board select"
+
+config  TARGET_ESPRESSO7420
+   bool "ESPRESSO7420 board"
+   select ARM64
+   select SUPPORT_SPL
+   select OF_CONTROL
+   select SPL_DISABLE_OF_CONTROL
+   select PINCTRL
+   select PINCTRL_EXYNOS7420
+   select CLK_EXYNOS
+
+endchoice
+endif
+
 config SYS_SOC
default "exynos"
 
@@ -121,5 +139,6 @@ source "board/samsung/odroid/Kconfig"
 source "board/samsung/arndale/Kconfig"
 source "board/samsung/smdk5250/Kconfig"
 source "board/samsung/smdk5420/Kconfig"
+source "board/samsung/espresso7420/Kconfig"
 
 endif
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 1334c22..7995174 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -27,6 +27,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -97,7 +99,7 @@ int board_init(void)
 int dram_init(void)
 {
unsigned int i;
-   u32 addr;
+   unsigned long addr;
 
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
@@ -109,7 +111,7 @@ int dram_init(void)
 void dram_init_banksize(void)
 {
unsigned int i;
-   u32 addr, size;
+   unsigned long addr, size;
 
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
@@ -122,6 +124,7 @@ void dram_init_banksize(void)
 
 static int board_uart_init(void)
 {
+#ifndef CONFIG_PINCTRL_EXYNOS
int err, uart_id, ret = 0;
 
for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
@@ -133,6 +136,9 @@ static int board_uart_init(void)
}
}
return ret;
+#else
+   return 0;
+#endif
 }
 
 #ifdef CONFIG_BOARD_EARLY_INIT_F
diff --git a/board/samsung/espresso7420/Kconfig 
b/board/samsung/espresso7420/Kconfig
new file mode 100644
index 000..62251c5
--- /dev/null
+++ b/board/samsung/espresso7420/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_ESPRESSO7420
+
+config SYS_BOARD
+   default "espresso7420"
+   help
+ Espresso7420 is a development/evaluation board for

[U-Boot] [PATCH v3 5/8] serial: s5p: use clock api to get clock rate

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

On Exynos platforms that support clock driver API, allow the driver to
use clock api get the SCLK clock rate.

Cc: Minkyu Kang 
Signed-off-by: Thomas Abraham 
Reviewed-by: Simon Glass 
---
 drivers/serial/serial_s5p.c |   15 ++-
 1 files changed, 14 insertions(+), 1 deletions(-)

diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 8590dfd..cb55c5a 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -90,7 +91,19 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate)
 {
struct s5p_serial_platdata *plat = dev->platdata;
struct s5p_uart *const uart = plat->reg;
-   u32 uclk = get_uart_clk(plat->port_id);
+   u32 uclk;
+
+#ifdef CONFIG_CLK_EXYNOS
+   struct udevice *clk_dev;
+   u32 ret;
+
+   ret = clk_get_by_index(dev, 1, _dev);
+   if (ret < 0)
+   return ret;
+   uclk = clk_get_periph_rate(clk_dev, ret);
+#else
+   uclk = get_uart_clk(plat->port_id);
+#endif
 
s5p_serial_baud(uart, uclk, baudrate);
 
-- 
1.6.6.rc2

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[U-Boot] [PATCH v3 6/8] arm: exynos: realign the code to allow support for newer 64-bit platforms

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

The existing Exynos 32-bit platform support needs to be realigned in
order to support newer 64-bit Exynos platforms. The driver model will
be utlized for drivers on the 64-bit Exynos platforms and so some of
the older platform support code would not be required for the newer
64-bit Exynos platforms.

Cc: Minkyu Kang 
Signed-off-by: Thomas Abraham 
---
 arch/arm/Kconfig |1 -
 arch/arm/mach-exynos/Kconfig |   34 +-
 arch/arm/mach-exynos/Makefile|5 ++-
 arch/arm/mach-exynos/include/mach/cpu.h  |2 +-
 arch/arm/mach-exynos/include/mach/gpio.h |2 +-
 arch/arm/mach-exynos/soc.c   |2 +
 configs/arndale_defconfig|1 +
 configs/odroid-xu3_defconfig |1 +
 configs/odroid_defconfig |1 +
 configs/origen_defconfig |1 +
 configs/peach-pi_defconfig   |1 +
 configs/peach-pit_defconfig  |1 +
 configs/s5pc210_universal_defconfig  |1 +
 configs/smdk5250_defconfig   |1 +
 configs/smdk5420_defconfig   |1 +
 configs/smdkv310_defconfig   |1 +
 configs/snow_defconfig   |1 +
 configs/spring_defconfig |1 +
 configs/trats2_defconfig |1 +
 configs/trats_defconfig  |1 +
 20 files changed, 54 insertions(+), 6 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d1c3157..0ad5fa9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -426,7 +426,6 @@ config TARGET_BCMNSP
 
 config ARCH_EXYNOS
bool "Samsung EXYNOS"
-   select CPU_V7
select DM
select DM_SPI_FLASH
select DM_SERIAL
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index a6a7597..28a6a60 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -1,9 +1,32 @@
 if ARCH_EXYNOS
 
 choice
-   prompt "EXYNOS board select"
+   prompt "EXYNOS architecture type select"
optional
 
+config ARCH_EXYNOS4
+   bool "Exynos4 SoC family"
+   select CPU_V7
+   help
+ Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
+ are multiple SoCs in this family including Exynos4210, Exynos4412,
+ and Exynos4212.
+
+config ARCH_EXYNOS5
+   bool "Exynos5 SoC family"
+   select CPU_V7
+   help
+ Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
+ Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
+ in this family including Exynos5250, Exynos5420 and Exynos5800.
+
+endchoice
+
+if ARCH_EXYNOS4
+
+choice
+   prompt "EXYNOS4 board select"
+
 config TARGET_SMDKV310
select SUPPORT_SPL
bool "Exynos4210 SMDKV310 board"
@@ -25,6 +48,14 @@ config TARGET_TRATS2
 config TARGET_ODROID
bool "Exynos4412 Odroid board"
 
+endchoice
+endif
+
+if ARCH_EXYNOS5
+
+choice
+   prompt "EXYNOS5 board select"
+
 config TARGET_ODROID_XU3
bool "Exynos5422 Odroid board"
select OF_CONTROL
@@ -68,6 +99,7 @@ config TARGET_PEACH_PIT
select OF_CONTROL
 
 endchoice
+endif
 
 config SYS_SOC
default "exynos"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 8542f89..f3c07b7 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -5,7 +5,8 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y  += clock.o power.o soc.o system.o pinmux.o tzpc.o
+obj-y  += soc.o
+obj-$(CONFIG_CPU_V7) += clock.o pinmux.o power.o system.o
 
 obj-$(CONFIG_EXYNOS5420)   += sec_boot.o
 
@@ -13,6 +14,6 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_EXYNOS5)  += clock_init_exynos5.o
 obj-$(CONFIG_EXYNOS5)  += dmc_common.o dmc_init_ddr3.o
 obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
-obj-y  += spl_boot.o
+obj-y  += spl_boot.o tzpc.o
 obj-y  += lowlevel_init.o
 endif
diff --git a/arch/arm/mach-exynos/include/mach/cpu.h 
b/arch/arm/mach-exynos/include/mach/cpu.h
index 14a1692..f12e3d6 100644
--- a/arch/arm/mach-exynos/include/mach/cpu.h
+++ b/arch/arm/mach-exynos/include/mach/cpu.h
@@ -270,7 +270,7 @@ IS_EXYNOS_TYPE(exynos5420, 0x5420)
 IS_EXYNOS_TYPE(exynos5422, 0x5422)
 
 #define SAMSUNG_BASE(device, base) \
-static inline unsigned int __attribute__((no_instrument_function)) \
+static inline unsigned long __attribute__((no_instrument_function)) \
samsung_get_base_##device(void) \
 {  \
if (cpu_is_exynos4()) { \
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h 
b/arch/arm/mach-exynos/include/mach/gpio.h
index 7fc8e61..81363bd 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -1349,7

[U-Boot] [PATCH v3 4/8] serial: s5p: get the port id number from the alias of the device node

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

The port id, if not specified in the device node, can be obtained from
the alias of the device node listed in the aliases node.

Cc: Minkyu Kang 
Signed-off-by: Thomas Abraham 
---
 drivers/serial/serial_s5p.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index feba467..8590dfd 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -174,8 +174,8 @@ static int s5p_serial_ofdata_to_platdata(struct udevice 
*dev)
return -EINVAL;
 
plat->reg = (struct s5p_uart *)addr;
-   plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1);
-
+   plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+   "id", dev->seq);
return 0;
 }
 
-- 
1.6.6.rc2

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[U-Boot] [PATCH v3 2/8] pinctrl: Add pinctrl driver support for Exynos7420 SoC

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes
have been split into Exynos7420 specific and common Exynos specific
portions so that this implementation is reusable on other Exynos
SoCs as well.

The Exynos pinctrl driver supports only device tree based pin
configuration. The bindings used are similar to the ones used in the
linux kernel.

Cc: Masahiro Yamada 
Cc: Simon Glass 
Cc: Minkyu Kang 
Signed-off-by: Thomas Abraham 
Reviewed-by: Simon Glass 
Acked-by: Minkyu Kang 
---
 drivers/pinctrl/Kconfig |1 +
 drivers/pinctrl/Makefile|1 +
 drivers/pinctrl/exynos/Kconfig  |   10 ++
 drivers/pinctrl/exynos/Makefile |9 ++
 drivers/pinctrl/exynos/pinctrl-exynos.c |  141 +++
 drivers/pinctrl/exynos/pinctrl-exynos.h |   77 +++
 drivers/pinctrl/exynos/pinctrl-exynos7420.c |  120 +++
 7 files changed, 359 insertions(+), 0 deletions(-)
 create mode 100644 drivers/pinctrl/exynos/Kconfig
 create mode 100644 drivers/pinctrl/exynos/Makefile
 create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.c
 create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.h
 create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos7420.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 2a69bab..bdf8931 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -145,5 +145,6 @@ endif
 
 source "drivers/pinctrl/nxp/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"
+source "drivers/pinctrl/exynos/Kconfig"
 
 endmenu
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 37dc904..19beb04 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
 
 obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
 obj-$(CONFIG_PIC32_PINCTRL)+= pinctrl_pic32.o
+obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
diff --git a/drivers/pinctrl/exynos/Kconfig b/drivers/pinctrl/exynos/Kconfig
new file mode 100644
index 000..84b6aaa
--- /dev/null
+++ b/drivers/pinctrl/exynos/Kconfig
@@ -0,0 +1,10 @@
+config PINCTRL_EXYNOS
+   bool
+
+config PINCTRL_EXYNOS7420
+   bool "Samsung Exynos7420 pinctrl driver"
+   depends on ARCH_EXYNOS && PINCTRL_FULL
+   select PINCTRL_EXYNOS
+   help
+ Support pin multiplexing and pin configuration control on
+ Samsung's Exynos7420 SoC.
diff --git a/drivers/pinctrl/exynos/Makefile b/drivers/pinctrl/exynos/Makefile
new file mode 100644
index 000..d9b941a
--- /dev/null
+++ b/drivers/pinctrl/exynos/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2016 Samsung Electronics
+# Thomas Abraham 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_PINCTRL_EXYNOS)   += pinctrl-exynos.o
+obj-$(CONFIG_PINCTRL_EXYNOS7420)   += pinctrl-exynos7420.o
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c 
b/drivers/pinctrl/exynos/pinctrl-exynos.c
new file mode 100644
index 000..a28405f
--- /dev/null
+++ b/drivers/pinctrl/exynos/pinctrl-exynos.c
@@ -0,0 +1,141 @@
+/*
+ * Exynos pinctrl driver common code.
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "pinctrl-exynos.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * exynos_pinctrl_setup_peri: setup pinctrl for a peripheral.
+ * conf: soc specific pin configuration data array
+ * num_conf: number of configurations in the conf array.
+ * base: base address of the pin controller.
+ */
+void exynos_pinctrl_setup_peri(struct exynos_pinctrl_config_data *conf,
+   unsigned int num_conf, unsigned long base)
+{
+   unsigned int idx, val;
+
+   for (idx = 0; idx < num_conf; idx++) {
+   val = readl(base + conf[idx].offset);
+   val &= ~(conf[idx].mask);
+   val |= conf[idx].value;
+   writel(val, base + conf[idx].offset);
+   }
+}
+
+/* given a pin-name, return the address of pin config registers */
+static unsigned long pin_to_bank_base(struct udevice *dev, const char 
*pin_name,
+   u32 *pin)
+{
+   struct exynos_pinctrl_priv *priv = dev_get_priv(dev);
+   const struct samsung_pin_ctrl *pin_ctrl = priv->pin_ctrl;
+   const struct samsung_pin_bank_data *bank_data = pin_ctrl->pin_banks;
+   u32 nr_banks = pin_ctrl->nr_banks, idx = 0;
+   char bank[10];
+
+   /*
+* The format of the pin name is -.
+* Example: gpa0-4 (gpa0 is the bank name and 4 is the pin number.
+*/
+   while (pin_name[idx] != '-') {
+   bank[idx] = pin_name[idx];
+   idx++;
+   }
+

[U-Boot] [PATCH v3 3/8] clk: exynos: add clock driver for Exynos7420 Soc

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
are added in this initial version of the driver.

Cc: Minkyu Kang 
Cc: Simon Glass 
Signed-off-by: Thomas Abraham 
---
 drivers/clk/Kconfig|1 +
 drivers/clk/Makefile   |1 +
 drivers/clk/exynos/Kconfig |   18 ++
 drivers/clk/exynos/Makefile|9 +
 drivers/clk/exynos/clk-exynos7420.c|  236 
 drivers/clk/exynos/clk-pll.c   |   33 
 drivers/clk/exynos/clk-pll.h   |9 +
 include/dt-bindings/clock/exynos7420-clk.h |  207 
 8 files changed, 514 insertions(+), 0 deletions(-)
 create mode 100644 drivers/clk/exynos/Kconfig
 create mode 100644 drivers/clk/exynos/Makefile
 create mode 100644 drivers/clk/exynos/clk-exynos7420.c
 create mode 100644 drivers/clk/exynos/clk-pll.c
 create mode 100644 drivers/clk/exynos/clk-pll.h
 create mode 100644 include/dt-bindings/clock/exynos7420-clk.h

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index a98b74b..6eee8eb 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -21,5 +21,6 @@ config SPL_CLK
  used as U-Boot proper.
 
 source "drivers/clk/uniphier/Kconfig"
+source "drivers/clk/exynos/Kconfig"
 
 endmenu
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index c51db15..81fe600 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
+obj-$(CONFIG_CLK_EXYNOS) += exynos/
diff --git a/drivers/clk/exynos/Kconfig b/drivers/clk/exynos/Kconfig
new file mode 100644
index 000..eb0efa9
--- /dev/null
+++ b/drivers/clk/exynos/Kconfig
@@ -0,0 +1,18 @@
+config CLK_EXYNOS
+   bool
+   select CLK
+   help
+ This enables support for common clock driver API on Samsung
+ Exynos SoCs.
+
+menu "Clock drivers for Exynos SoCs"
+   depends on CLK_EXYNOS
+
+config CLK_EXYNOS7420
+   bool "Clock driver for Samsung's Exynos7420 SoC"
+   default y
+   help
+ This enables common clock driver support for platforms based
+ on Samsung Exynos7420 SoC.
+
+endmenu
diff --git a/drivers/clk/exynos/Makefile b/drivers/clk/exynos/Makefile
new file mode 100644
index 000..1df10fe
--- /dev/null
+++ b/drivers/clk/exynos/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2016 Samsung Electronics
+# Thomas Abraham 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += clk-pll.o
+obj-$(CONFIG_CLK_EXYNOS7420)   += clk-exynos7420.o
diff --git a/drivers/clk/exynos/clk-exynos7420.c 
b/drivers/clk/exynos/clk-exynos7420.c
new file mode 100644
index 000..bf5d0e6
--- /dev/null
+++ b/drivers/clk/exynos/clk-exynos7420.c
@@ -0,0 +1,236 @@
+/*
+ * Samsung Exynos7420 clock driver.
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "clk-pll.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DIVIDER(reg, shift, mask)  \
+   (((readl(reg) >> shift) & mask) + 1)
+
+/* CMU TOPC block device structure */
+struct exynos7420_clk_cmu_topc {
+   unsigned intrsvd1[68];
+   unsigned intbus0_pll_con[2];
+   unsigned intrsvd2[2];
+   unsigned intbus1_pll_con[2];
+   unsigned intrsvd3[54];
+   unsigned intmux_sel[6];
+   unsigned intrsvd4[250];
+   unsigned intdiv[4];
+};
+
+/* CMU TOP0 block device structure */
+struct exynos7420_clk_cmu_top0 {
+   unsigned intrsvd0[128];
+   unsigned intmux_sel[7];
+   unsigned intrsvd1[261];
+   unsigned intdiv_peric[5];
+};
+
+/**
+ * struct exynos7420_clk_topc_priv - private data for CMU topc clock driver.
+ *
+ * @topc: base address of the memory mapped CMU TOPC controller.
+ * @fin_freq: frequency of the Oscillator clock.
+ * @sclk_bus0_pll_a: frequency of sclk_bus0_pll_a clock.
+ * @sclk_bus1_pll_a: frequency of sclk_bus1_pll_a clock.
+ */
+struct exynos7420_clk_topc_priv {
+   struct exynos7420_clk_cmu_topc *topc;
+   unsigned long fin_freq;
+   unsigned long sclk_bus0_pll_a;
+   unsigned long sclk_bus1_pll_a;
+};
+
+/**
+ * struct exynos7420_clk_top0_priv - private data for CMU top0 clock driver.
+ *
+ * @top0: base address of the memory mapped CMU TOP0 controller.
+ * @mout_top0_bus0_pll_half: frequency of mout_top0_bus0_pll_half clock
+ * @sclk_uart2: frequency of sclk_uart2 clock.
+ */
+struct exynos7420_clk_top0_priv {
+   struct exynos7420_clk_cmu_top0 *top0;
+

[U-Boot] [PATCH v3 1/8] pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devices

2016-04-23 Thread Thomas Abraham 
From: Thomas Abraham 

It is possible to have multiple pin controllers in the system. Use the
DM_UC_FLAG_SEQ_ALIAS flag so that the pinctrl instances are assigned
a sequence number.

Cc: Masahiro Yamada 
Cc: Simon Glass 
Signed-off-by: Thomas Abraham 
Reviewed-by: Simon Glass 
---
 drivers/pinctrl/pinctrl-uclass.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index ccc5d30..fd04b26 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -287,5 +287,6 @@ static int pinctrl_post_bind(struct udevice *dev)
 UCLASS_DRIVER(pinctrl) = {
.id = UCLASS_PINCTRL,
.post_bind = pinctrl_post_bind,
+   .flags = DM_UC_FLAG_SEQ_ALIAS,
.name = "pinctrl",
 };
-- 
1.6.6.rc2

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[U-Boot] [PATCH v3 0/8] Add support for Espresso7420 board

2016-04-23 Thread Thomas Abraham 
Changes since v2:
- changes based on comments from Simon Glass and Minkyu Kang.

This patch series add support for Espresso7420 board. This board is
the development/evaluation platform for Exynos7420 SoC. The SoC is
composed of quad Cortex-A57 block, a quad Cortex-A53 block and
various other peripherals. The board includes multiple components
such as the EMMC/Codec and support multiple interconnect interfaces
including HDMI and USB.

The first two patches add Exynos7420 pinctrl driver support which
was initially posted seperatly but now included in this series.
Thanks to Simon Glass and Minkyu Kang for their review. The rest
of the patches add Exynos7420 clock driver support, minor changes
in the S5P serial driver, Exynos7420 SoC support and Espresso7420
board support.

Thomas Abraham (8):
  pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devices
  pinctrl: Add pinctrl driver support for Exynos7420 SoC
  clk: exynos: add clock driver for Exynos7420 Soc
  serial: s5p: get the port id number from the alias of the device node
  serial: s5p: use clock api to get clock rate
  arm: exynos: realign the code to allow support for newer 64-bit
platforms
  arm: exynos: add support for Exynos7420 SoC
  board: samsung: add initial Espresso7420 board support

 arch/arm/Kconfig|1 -
 arch/arm/dts/Makefile   |1 +
 arch/arm/dts/exynos7420-espresso7420.dts|   24 +++
 arch/arm/dts/exynos7420.dtsi|   83 ++
 arch/arm/mach-exynos/Kconfig|   61 +++-
 arch/arm/mach-exynos/Makefile   |6 +-
 arch/arm/mach-exynos/include/mach/cpu.h |2 +-
 arch/arm/mach-exynos/include/mach/gpio.h|2 +-
 arch/arm/mach-exynos/mmu-arm64.c|   35 
 arch/arm/mach-exynos/soc.c  |   10 +
 board/samsung/common/board.c|   10 +-
 board/samsung/espresso7420/Kconfig  |   16 ++
 board/samsung/espresso7420/MAINTAINERS  |5 +
 board/samsung/espresso7420/Makefile |   10 +
 board/samsung/espresso7420/espresso7420.c   |   16 ++
 configs/arndale_defconfig   |1 +
 configs/espresso7420_defconfig  |9 +
 configs/odroid-xu3_defconfig|1 +
 configs/odroid_defconfig|1 +
 configs/origen_defconfig|1 +
 configs/peach-pi_defconfig  |1 +
 configs/peach-pit_defconfig |1 +
 configs/s5pc210_universal_defconfig |1 +
 configs/smdk5250_defconfig  |1 +
 configs/smdk5420_defconfig  |1 +
 configs/smdkv310_defconfig  |1 +
 configs/snow_defconfig  |1 +
 configs/spring_defconfig|1 +
 configs/trats2_defconfig|1 +
 configs/trats_defconfig |1 +
 drivers/clk/Kconfig |1 +
 drivers/clk/Makefile|1 +
 drivers/clk/exynos/Kconfig  |   18 ++
 drivers/clk/exynos/Makefile |9 +
 drivers/clk/exynos/clk-exynos7420.c |  236 +++
 drivers/clk/exynos/clk-pll.c|   33 
 drivers/clk/exynos/clk-pll.h|9 +
 drivers/pinctrl/Kconfig |1 +
 drivers/pinctrl/Makefile|1 +
 drivers/pinctrl/exynos/Kconfig  |   10 +
 drivers/pinctrl/exynos/Makefile |9 +
 drivers/pinctrl/exynos/pinctrl-exynos.c |  141 
 drivers/pinctrl/exynos/pinctrl-exynos.h |   77 +
 drivers/pinctrl/exynos/pinctrl-exynos7420.c |  120 ++
 drivers/pinctrl/pinctrl-uclass.c|1 +
 drivers/serial/serial_s5p.c |   19 ++-
 include/configs/espresso7420.h  |   34 
 include/configs/exynos7420-common.h |  113 +
 include/dt-bindings/clock/exynos7420-clk.h  |  207 +++
 49 files changed, 1334 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/dts/exynos7420-espresso7420.dts
 create mode 100644 arch/arm/dts/exynos7420.dtsi
 create mode 100644 arch/arm/mach-exynos/mmu-arm64.c
 create mode 100644 board/samsung/espresso7420/Kconfig
 create mode 100644 board/samsung/espresso7420/MAINTAINERS
 create mode 100644 board/samsung/espresso7420/Makefile
 create mode 100644 board/samsung/espresso7420/espresso7420.c
 create mode 100644 configs/espresso7420_defconfig
 create mode 100644 drivers/clk/exynos/Kconfig
 create mode 100644 drivers/clk/exynos/Makefile
 create mode 100644 drivers/clk/exynos/clk-exynos7420.c
 create mode 100644 drivers/clk/exynos/clk-pll.c
 create mode 100644 drivers/clk/exynos/clk-pll.h
 create mode 100644 drivers/pinctrl/exynos/Kconfig
 create mode 100644 drivers/pinctrl/exynos/Makefile
 create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.c
 create mode 100644

Re: [U-Boot] [PATCH 9/9] board: samsung: add initial Espresso7420 board support

2016-04-23 Thread Thomas Abraham 
Hi Simon,

On Wed, Apr 20, 2016 at 8:11 PM, Simon Glass  wrote:
> Hi Thomas,
>
> On 13 April 2016 at 04:43, Thomas Abraham  wrote:
>> From: Thomas Abraham 
>>
>> Espresso7420 is a development/evaluation board for Exynos7420 SoC. It
>> includes multiple onboard compoments (EMMC/Codec) and various
>> interconnects (USB/HDMI).
>>
>> Signed-off-by: Thomas Abraham 
>> ---
>>  arch/arm/dts/Makefile |1 +
>>  arch/arm/dts/exynos7420-espresso7420.dts  |   24 
>>  board/samsung/common/board.c  |   18 --
>>  board/samsung/espresso7420/Kconfig|   12 
>>  board/samsung/espresso7420/MAINTAINERS|5 +
>>  board/samsung/espresso7420/Makefile   |   16 
>>  board/samsung/espresso7420/espresso7420.c |   16 
>>  configs/espresso7420_defconfig|8 
>>  8 files changed, 98 insertions(+), 2 deletions(-)
>>  create mode 100644 arch/arm/dts/exynos7420-espresso7420.dts
>>  create mode 100644 board/samsung/espresso7420/Kconfig
>>  create mode 100644 board/samsung/espresso7420/MAINTAINERS
>>  create mode 100644 board/samsung/espresso7420/Makefile
>>  create mode 100644 board/samsung/espresso7420/espresso7420.c
>>  create mode 100644 configs/espresso7420_defconfig
>>
>
> Reviewed-by: Simon Glass 
>
> See below.
>
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index ea635e4..a61bbff 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -19,6 +19,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
>> exynos5420-peach-pit.dtb \
>> exynos5800-peach-pi.dtb \
>> exynos5422-odroidxu3.dtb
>> +dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
>>  dtb-$(CONFIG_ARCH_ROCKCHIP) += \
>> rk3288-firefly.dtb \
>> rk3288-jerry.dtb \
>> diff --git a/arch/arm/dts/exynos7420-espresso7420.dts 
>> b/arch/arm/dts/exynos7420-espresso7420.dts
>> new file mode 100644
>> index 000..f17a848
>> --- /dev/null
>> +++ b/arch/arm/dts/exynos7420-espresso7420.dts
>> @@ -0,0 +1,24 @@
>> +/*
>> + * Samsung Espresso7420 board device tree source
>> + *
>> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +#include "exynos7420.dtsi"
>> +/ {
>> +   model = "Samsung Espresso7420 board based on Exynos7420";
>> +   compatible = "samsung,espresso7420", "samsung,exynos7420";
>> +
>> +   aliases {
>> +   serial2 = "/serial@14C3";
>> +   console = "/serial@14C3";
>> +   pinctrl0 = "/pinctrl@1347";
>> +   };
>> +};
>> +
>> +_pll {
>> +   clock-frequency = <2400>;
>> +};
>> diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
>> index 1334c22..e4f189c 100644
>> --- a/board/samsung/common/board.c
>> +++ b/board/samsung/common/board.c
>> @@ -27,6 +27,8 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>> +#include 
>>
>>  DECLARE_GLOBAL_DATA_PTR;
>>
>> @@ -97,7 +99,7 @@ int board_init(void)
>>  int dram_init(void)
>>  {
>> unsigned int i;
>> -   u32 addr;
>> +   unsigned long addr;
>>
>> for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
>> addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
>> @@ -109,7 +111,7 @@ int dram_init(void)
>>  void dram_init_banksize(void)
>>  {
>> unsigned int i;
>> -   u32 addr, size;
>> +   unsigned long addr, size;
>>
>> for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
>> addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
>> @@ -122,6 +124,17 @@ void dram_init_banksize(void)
>>
>>  static int board_uart_init(void)
>>  {
>> +#if CONFIG_PINCTRL_EXYNOS
>> +   struct udevice *pinctrl;
>> +   int ret;
>> +
>> +   ret = uclass_get_device(UCLASS_PINCTRL, 0, );
>> +   if (ret)
>> +   return ret;
>> +
>> +   ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART2);
>
> Does this not happen automatically when the UART is probed? It should
> call  pinctrl_select_state(dev, "default");

Right, this was not required. With the "u-boot,dm-pre-reloc" property
added to the pin configuration node, this change is not required. This
change will be remove in the next version.

Thanks,
Thomas.

>
>> +   return ret;
>> +#else
>> int err, uart_id, ret = 0;
>>
>> for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; 
>> uart_id++) {
>> @@ -133,6 +146,7 @@ static int board_uart_init(void)
>> }
>> }
>> return ret;
>> +#endif
>>  }
>>
>>  #ifdef CONFIG_BOARD_EARLY_INIT_F
>> diff --git a/board/samsung/espresso7420/Kconfig 
>> b/board/samsung/espresso7420/Kconfig
>> new file mode 100644
>> index 000..6cfead0
>> --- /dev/null
>> +++

Re: [U-Boot] [PATCH 8/9] arm: exynos: add support for Exynos7420 SoC

2016-04-23 Thread Thomas Abraham 
Hi Simon,

On Wed, Apr 20, 2016 at 8:11 PM, Simon Glass  wrote:
> Hi Thomas,
>
> On 13 April 2016 at 04:43, Thomas Abraham  wrote:
>> From: Thomas Abraham 
>>
>> Add support for Exynos7420 SoC. The Exynos7420 SoC has four Cortex-A57
>> and four Cortex-A53 CPUs and includes various peripheral controllers.
>>
>> Signed-off-by: Thomas Abraham 
>> ---
>>  arch/arm/dts/exynos7420.dtsi|   82 
>>  arch/arm/mach-exynos/Kconfig|   11 +++
>>  arch/arm/mach-exynos/Makefile   |1 +
>>  arch/arm/mach-exynos/mmu-arm64.c|   35 ++
>>  arch/arm/mach-exynos/soc.c  |8 +++
>>  include/configs/espresso7420.h  |   35 ++
>>  include/configs/exynos7420-common.h |  117 
>> +++
>>  7 files changed, 289 insertions(+), 0 deletions(-)
>>  create mode 100644 arch/arm/dts/exynos7420.dtsi
>>  create mode 100644 arch/arm/mach-exynos/mmu-arm64.c
>>  create mode 100644 include/configs/espresso7420.h
>>  create mode 100644 include/configs/exynos7420-common.h
>>
>
> Please see below:
>
> Reviewed-by: Simon Glass 

Thanks.

>
>> diff --git a/arch/arm/dts/exynos7420.dtsi b/arch/arm/dts/exynos7420.dtsi
>> new file mode 100644
>> index 000..990f8a1
>> --- /dev/null
>> +++ b/arch/arm/dts/exynos7420.dtsi
>> @@ -0,0 +1,82 @@
>> +/*
>> + * Samsung Exynos7420 SoC device tree source
>> + *
>> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +/dts-v1/;
>> +#include "skeleton.dtsi"
>> +#include 
>> +/ {
>> +   compatible = "samsung,exynos7420";
>> +
>> +   fin_pll: xxti {
>> +   compatible = "fixed-clock";
>> +   clock-output-names = "fin_pll";
>> +   u-boot,dm-pre-reloc;
>> +   #clock-cells = <0>;
>> +   };
>> +
>> +   clock_topc: clock-controller@1057 {
>> +   compatible = "samsung,exynos7-clock-topc";
>> +   reg = <0x1057 0x1>;
>> +   u-boot,dm-pre-reloc;
>> +   #clock-cells = <1>;
>> +   clocks = <_pll>;
>> +   clock-names = "fin_pll";
>> +   };
>> +
>> +   clock_top0: clock-controller@105d {
>> +   compatible = "samsung,exynos7-clock-top0";
>> +   reg = <0x105d 0xb000>;
>> +   u-boot,dm-pre-reloc;
>> +   #clock-cells = <1>;
>> +   clocks = <_pll>, <_topc DOUT_SCLK_BUS0_PLL>,
>> +<_topc DOUT_SCLK_BUS1_PLL>,
>> +<_topc DOUT_SCLK_CC_PLL>,
>> +<_topc DOUT_SCLK_MFC_PLL>;
>> +   clock-names = "fin_pll", "dout_sclk_bus0_pll",
>> + "dout_sclk_bus1_pll", "dout_sclk_cc_pll",
>> + "dout_sclk_mfc_pll";
>> +   };
>> +
>> +   clock_peric1: clock-controller@14c8 {
>> +   compatible = "samsung,exynos7-clock-peric1";
>> +   reg = <0x14c8 0xd00>;
>> +   u-boot,dm-pre-reloc;
>> +   #clock-cells = <1>;
>> +   clocks = <_pll>, <_top0 DOUT_ACLK_PERIC1>,
>> +<_top0 CLK_SCLK_UART1>,
>> +<_top0 CLK_SCLK_UART2>,
>> +<_top0 CLK_SCLK_UART3>;
>> +   clock-names = "fin_pll", "dout_aclk_peric1_66",
>> + "sclk_uart1", "sclk_uart2", "sclk_uart3";
>> +   };
>> +
>> +   pinctrl@1347 {
>> +   compatible = "samsung,exynos7420-pinctrl";
>> +   reg = <0x1347 0x1000>;
>> +   u-boot,dm-pre-reloc;
>> +
>> +   serial2_bus: serial2-bus {
>> +   samsung,pins = "gpd1-4", "gpd1-5";
>> +   samsung,pin-function = <2>;
>> +   samsung,pin-pud = <3>;
>> +   samsung,pin-drv = <0>;
>> +   };
>> +   };
>> +
>> +   serial@14C3 {
>> +   compatible = "samsung,exynos4210-uart";
>> +   reg = <0x14C3 0x100>;
>> +   u-boot,dm-pre-reloc;
>> +   clocks = <_peric1 PCLK_UART2>,
>> +<_peric1 SCLK_UART2>;
>> +   clock-names = "uart", "clk_uart_baud0";
>> +   pinctrl-names = "default";
>> +   pinctrl-0 = <_bus>;
>> +   };
>> +};
>> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
>> index acab947..52a5a30 100644
>> --- a/arch/arm/mach-exynos/Kconfig
>> +++ b/arch/arm/mach-exynos/Kconfig
>> @@ -81,6 +81,16 @@ config TARGET_PEACH_PIT
>> select SUPPORT_SPL
>> select OF_CONTROL
>>
>> +config  TARGET_ESPRESSO7420
>> +   bool "ESPRESSO7420 board"
>> +   select ARM64
>> +   select SUPPORT_SPL
>> +   select OF_CONTROL

Re: [U-Boot] [PATCH 7/9] arm: exynos: realign the code to allow support for newer 64-bit platforms

2016-04-23 Thread Thomas Abraham 
Hi Mr. Kang,

On Thu, Apr 21, 2016 at 7:21 PM, Minkyu Kang  wrote:
> Hi,
>
> On 18/04/16 23:11, Thomas Abraham wrote:
>> Hi Mr. Kang,
>>
>> On Mon, Apr 18, 2016 at 4:39 PM, Minkyu Kang  wrote:
>>> Dear Thomas Abraham,
>>>
>>> On 13/04/16 19:43, Thomas Abraham wrote:
 From: Thomas Abraham 

 The existing Exynos 32-bit platform support needs to be realigned in
 order to support newer 64-bit Exynos platforms. The driver model will
 be utlized for drivers on the 64-bit Exynos platforms and so some of
 the older platform support code would not be required for the newer
 64-bit Exynos platforms.

 Cc: Minkyu Kang 
 Signed-off-by: Thomas Abraham 
 ---
  arch/arm/Kconfig |1 -
  arch/arm/mach-exynos/Kconfig |   14 ++
  arch/arm/mach-exynos/Makefile|7 +--
  arch/arm/mach-exynos/include/mach/cpu.h  |2 +-
  arch/arm/mach-exynos/include/mach/gpio.h |2 +-
  arch/arm/mach-exynos/soc.c   |2 ++
  6 files changed, 23 insertions(+), 5 deletions(-)

 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index b82ec18..ee22a3c 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -426,7 +426,6 @@ config TARGET_BCMNSP

  config ARCH_EXYNOS
   bool "Samsung EXYNOS"
 - select CPU_V7
   select DM
   select DM_SPI_FLASH
   select DM_SERIAL
 diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
 index a6a7597..acab947 100644
 --- a/arch/arm/mach-exynos/Kconfig
 +++ b/arch/arm/mach-exynos/Kconfig
 @@ -7,30 +7,38 @@ choice
  config TARGET_SMDKV310
   select SUPPORT_SPL
   bool "Exynos4210 SMDKV310 board"
 + select CPU_V7
   select OF_CONTROL

  config TARGET_TRATS
   bool "Exynos4210 Trats board"
 + select CPU_V7

  config TARGET_S5PC210_UNIVERSAL
   bool "EXYNOS4210 Universal C210 board"
 + select CPU_V7

  config TARGET_ORIGEN
   bool "Exynos4412 Origen board"
 + select CPU_V7
   select SUPPORT_SPL

  config TARGET_TRATS2
   bool "Exynos4412 Trat2 board"
 + select CPU_V7

  config TARGET_ODROID
   bool "Exynos4412 Odroid board"
 + select CPU_V7

  config TARGET_ODROID_XU3
   bool "Exynos5422 Odroid board"
 + select CPU_V7
   select OF_CONTROL

  config TARGET_ARNDALE
   bool "Exynos5250 Arndale board"
 + select CPU_V7
   select CPU_V7_HAS_NONSEC
   select CPU_V7_HAS_VIRT
   select SUPPORT_SPL
 @@ -38,32 +46,38 @@ config TARGET_ARNDALE

  config TARGET_SMDK5250
   bool "SMDK5250 board"
 + select CPU_V7
   select SUPPORT_SPL
   select OF_CONTROL

  config TARGET_SNOW
   bool "Snow board"
 + select CPU_V7
   select SUPPORT_SPL
   select OF_CONTROL

  config TARGET_SPRING
   bool "Spring board"
 + select CPU_V7
   select SUPPORT_SPL
   select OF_CONTROL
   select SPL_DISABLE_OF_CONTROL

  config TARGET_SMDK5420
   bool "SMDK5420 board"
 + select CPU_V7
   select SUPPORT_SPL
   select OF_CONTROL

  config TARGET_PEACH_PI
   bool "Peach Pi board"
 + select CPU_V7
   select SUPPORT_SPL
   select OF_CONTROL

  config TARGET_PEACH_PIT
   bool "Peach Pit board"
 + select CPU_V7
   select SUPPORT_SPL
   select OF_CONTROL
>>>
>>> I think it's better to split to new architecture type for 64bit exynos 
>>> platform - ARCH_EXYNOS64?
>>> What do you think?
>>
>> I was infact thinking to avoid adding a new ARCH type as much as
>> possible and reuse ARCH_EXYNOS for 64-bit as well. Eventually, the
>> code in mach-exynos has to move into respective driver folders
>> (atleast for ARM64 platforms) and have as little as possible in
>> mach-exynos directory.
>
> I understood what you want.
> But I think, we can reuse mach-exynos code even if we make new ARCH type.
> And the cpu type should have a dependency with ARCH, not boards.
> I don't believe that we should add a cpu type to every boards.
> Please consider again.

Ok, I understand your point. There is one more approach without adding
a new ARCH_EXYNOS64. This will be posted in the next version of the
patch. I hope that would resolve the concern here.

Thanks,
Thomas.

>
> Thanks,
> Minkyu Kang.
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Re: [U-Boot] [PATCH 4/9] clk: exynos: add clock driver for Exynos7420 Soc

2016-04-23 Thread Thomas Abraham 
Hi Simon,

On Wed, Apr 20, 2016 at 8:11 PM, Simon Glass  wrote:
> Hi Thomas,
>
> On 13 April 2016 at 04:43, Thomas Abraham  wrote:
>> From: Thomas Abraham 
>>
>> Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
>> blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
>> are added in this initial version of the driver.
>>
>> Cc: Minkyu Kang 
>> Cc: Simon Glass 
>> Signed-off-by: Thomas Abraham 
>> ---
>>  drivers/clk/Kconfig|1 +
>>  drivers/clk/Makefile   |1 +
>>  drivers/clk/exynos/Kconfig |   18 +++
>>  drivers/clk/exynos/Makefile|9 +
>>  drivers/clk/exynos/clk-exynos7420.c|  227 
>> 
>>  drivers/clk/exynos/clk-pll.c   |   35 +
>>  drivers/clk/exynos/clk-pll.h   |9 +
>>  include/dt-bindings/clock/exynos7420-clk.h |  207 +
>>  8 files changed, 507 insertions(+), 0 deletions(-)
>>  create mode 100644 drivers/clk/exynos/Kconfig
>>  create mode 100644 drivers/clk/exynos/Makefile
>>  create mode 100644 drivers/clk/exynos/clk-exynos7420.c
>>  create mode 100644 drivers/clk/exynos/clk-pll.c
>>  create mode 100644 drivers/clk/exynos/clk-pll.h
>>  create mode 100644 include/dt-bindings/clock/exynos7420-clk.h
>>
>> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
>> index a98b74b..6eee8eb 100644
>> --- a/drivers/clk/Kconfig
>> +++ b/drivers/clk/Kconfig
>> @@ -21,5 +21,6 @@ config SPL_CLK
>>   used as U-Boot proper.
>>
>>  source "drivers/clk/uniphier/Kconfig"
>> +source "drivers/clk/exynos/Kconfig"
>>
>>  endmenu
>> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
>> index c51db15..81fe600 100644
>> --- a/drivers/clk/Makefile
>> +++ b/drivers/clk/Makefile
>> @@ -11,3 +11,4 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
>>  obj-$(CONFIG_SANDBOX) += clk_sandbox.o
>>  obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
>>  obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
>> +obj-$(CONFIG_CLK_EXYNOS) += exynos/
>> diff --git a/drivers/clk/exynos/Kconfig b/drivers/clk/exynos/Kconfig
>> new file mode 100644
>> index 000..eb0efa9
>> --- /dev/null
>> +++ b/drivers/clk/exynos/Kconfig
>> @@ -0,0 +1,18 @@
>> +config CLK_EXYNOS
>> +   bool
>> +   select CLK
>> +   help
>> + This enables support for common clock driver API on Samsung
>> + Exynos SoCs.
>> +
>> +menu "Clock drivers for Exynos SoCs"
>> +   depends on CLK_EXYNOS
>> +
>> +config CLK_EXYNOS7420
>> +   bool "Clock driver for Samsung's Exynos7420 SoC"
>> +   default y
>> +   help
>> + This enables common clock driver support for platforms based
>> + on Samsung Exynos7420 SoC.
>> +
>> +endmenu
>> diff --git a/drivers/clk/exynos/Makefile b/drivers/clk/exynos/Makefile
>> new file mode 100644
>> index 000..1df10fe
>> --- /dev/null
>> +++ b/drivers/clk/exynos/Makefile
>> @@ -0,0 +1,9 @@
>> +#
>> +# Copyright (C) 2016 Samsung Electronics
>> +# Thomas Abraham 
>> +#
>> +# SPDX-License-Identifier: GPL-2.0+
>> +#
>> +
>> +obj-y  += clk-pll.o
>> +obj-$(CONFIG_CLK_EXYNOS7420)   += clk-exynos7420.o
>> diff --git a/drivers/clk/exynos/clk-exynos7420.c 
>> b/drivers/clk/exynos/clk-exynos7420.c
>> new file mode 100644
>> index 000..1feaea4
>> --- /dev/null
>> +++ b/drivers/clk/exynos/clk-exynos7420.c
>> @@ -0,0 +1,226 @@
>> +/*
>> + * Samsung Exynos7420 clock driver.
>> + * Copyright (C) 2016 Samsung Electronics
>> + * Thomas Abraham 
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include "clk-pll.h"
>> +#include 
>
> Please see include order.
>
>
> http://www.denx.de/wiki/U-Boot/CodingStyle
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#define DIVIDER(reg, shift, mask)  \
>> +   (((readl(reg) >> shift) & mask) + 1)
>> +
>> +struct exynos7420_clk_cmu_topc {
>> +   unsigned intrsvd1[68];
>> +   unsigned intbus0_pll_con[2];
>> +   unsigned intrsvd2[2];
>> +   unsigned intbus1_pll_con[2];
>> +   unsigned intrsvd3[54];
>> +   unsigned intmux_sel[6];
>> +   unsigned intrsvd4[250];
>> +   unsigned intdiv[4];
>> +};
>> +
>> +struct exynos7420_clk_topc_priv {
>> +   struct exynos7420_clk_cmu_topc *topc;
>> +   unsigned long fin_freq;
>> +   unsigned long sclk_bus0_pll_a;
>> +   unsigned long sclk_bus1_pll_a;
>
> Comments on these members please.
>
>> +};
>> +
>> +static ulong exynos7420_topc_get_periph_rate(struct udevice *dev, int 
>> periph)
>> +{
>> +   struct exynos7420_clk_topc_priv *priv = dev_get_priv(dev);
>> +
>> +   switch (periph) {
>> +   case DOUT_SCLK_BUS0_PLL:
>> +   case SCLK_BUS0_PLL_A:
>> +

Re: [U-Boot] [PATCH] pci: Device scanning range fix.

2016-04-23 Thread Simon Glass 
Hi Yoshinori,

On 18 April 2016 at 02:02, Yoshinori Sato  wrote:
> Don't lookup pci device 1f.7
>
> Signed-off-by: Yoshinori Sato 
> ---
>  drivers/pci/pci-uclass.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> index c7fbf7b..32590ce 100644
> --- a/drivers/pci/pci-uclass.c
> +++ b/drivers/pci/pci-uclass.c
> @@ -682,7 +682,7 @@ int pci_bind_bus_devices(struct udevice *bus)
> found_multi = false;
> end = PCI_BDF(bus->seq, PCI_MAX_PCI_DEVICES - 1,
>   PCI_MAX_PCI_FUNCTIONS - 1);
> -   for (bdf = PCI_BDF(bus->seq, 0, 0); bdf < end;
> +   for (bdf = PCI_BDF(bus->seq, 0, 0); bdf <= end;
>  bdf += PCI_BDF(0, 0, 1)) {
> struct pci_child_platdata *pplat;
> struct udevice *dev;

The patch looks good thank you. But your commit message seem the
opposite of what this patch does. Can you update it in v2, or explain
it better?

Regards,
Simon
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