Re: [U-Boot] [PATCH v2] x86: Fix Linux v4.7+ zimage booting (update bootparam.h)
On Fri, Sep 30, 2016 at 3:15 PM, Stefan Roese wrote: > Booting Linux kernel v4.7+ does not work since commit Linux commit 974f221c > "x86/boot: Move compressed kernel to the end of the decompression buffer". > > This patch adds the latest version of the setup_header struct, adding > "init_size" which is needed since this commit referenced above. With this > patch, booting Linux v4.8-rc8 does work again on x86 boards. > > Signed-off-by: Stefan Roese > Reviewed-by: Simon Glass > Reviewed-by: Bin Meng > Tested-by: Bin Meng > --- > v2: > - Specified that the refereced git commit is a Linux commit as > suggested by Bin > > arch/x86/include/asm/bootparam.h | 3 +++ > 1 file changed, 3 insertions(+) > applied to u-boot-x86, thanks! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 14/16] README: Drop README.imx31
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > The only content of this file is CONFIG options which are no-longer present > in U-Boot. Drop it. > > Signed-off-by: Simon Glass > --- > > doc/README.imx31 | 29 - > 1 file changed, 29 deletions(-) > delete mode 100644 doc/README.imx31 > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 15/16] README: Drop CONFIG_MPC8349ADS
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This option is not used now. > > Signed-off-by: Simon Glass > --- > > doc/README.mpc83xxads | 1 - > 1 file changed, 1 deletion(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 16/16] README: Fix CONFIG_SYS_NAND_MAX_DEVICE typo
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it. > > Signed-off-by: Simon Glass > --- > > doc/README.nand | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 13/16] atmel: Drop README.at91-soc
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This issue covered by this doc appears to be fixed, so let's remove the > README. > > Signed-off-by: Simon Glass > --- > > doc/README.at91-soc | 48 > 1 file changed, 48 deletions(-) > delete mode 100644 doc/README.at91-soc > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/16] README: i2c: Drop unused i2c CONFIG options
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > CONFIG_SYS_NUM_I2C_ADAPTERS and CONFIG_SYS_I2C_MULTI_NOPROBES are not used > in U-Boot, so drop them. > > Signed-off-by: Simon Glass > --- > > README | 7 ++- > 1 file changed, 2 insertions(+), 5 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/16] README: sh: Drop CONFIG_SYS_I2C_SH_BASE5
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This is not used in U-Boot. Drop both the BASE and the SIZE config. > > Signed-off-by: Simon Glass > --- > > README | 2 -- > 1 file changed, 2 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 12/16] README: Drop CONFIG_SYS_USE_OSCCLK
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This is not used in U-Boot so drop it. > > Signed-off-by: Simon Glass > --- > > README | 5 - > 1 file changed, 5 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 11/16] README: Drop CONFIG_SYS_INIT_DATA_SIZE
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This appears to be calculated automatically now. Drop the old reference. > > Signed-off-by: Simon Glass > --- > > README | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/16] README: Drop CONFIG_LAN91C96_BASE
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This is not used in U-Boot. > > Signed-off-by: Simon Glass > --- > > README | 4 > 1 file changed, 4 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/16] README: Drop unused CONFIG_SYS_LS_MC_FW_... options
Hi Simon, On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > Drop a few that are not used in U-Boot. > > Signed-off-by: Simon Glass > --- > > README | 20 > include/configs/ls2080a_simu.h | 3 --- > 2 files changed, 23 deletions(-) > Reviewed-by: Bin Meng Should we clean up scripts/config_whitelist.txt to remove these options too? Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/16] README: Drop CONFIG_SYS_USB_BRG_CLK
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This is not used in U-Boot. > > Signed-off-by: Simon Glass > --- > > README | 4 > 1 file changed, 4 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/16] README: Drop CONFIG_OF_BOOT_CPU
On Mon, Oct 3, 2016 at 8:01 AM, Simon Glass wrote: > This is not used in U-Boot. > > Signed-off-by: Simon Glass > --- > > README | 5 - > 1 file changed, 5 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/16] README: Drop unused JFFS2 options
On Mon, Oct 3, 2016 at 8:00 AM, Simon Glass wrote: > There appear to be neither implemented nor used. Drop them. > > Signed-off-by: Simon Glass > --- > > README| 12 +--- > doc/README.JFFS2 | 43 +++ > doc/README.JFFS2_NAND | 20 ++-- > 3 files changed, 6 insertions(+), 69 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/16] README: Drop old Intel Monahans comment
On Mon, Oct 3, 2016 at 8:00 AM, Simon Glass wrote: > This is no longer in the U-Boot source code, so drop this note from the > README. > > Signed-off-by: Simon Glass > --- > > README | 14 -- > 1 file changed, 14 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/16] README: Correct CONFIG_ENV_OFFSET_RENDUND typo
On Mon, Oct 3, 2016 at 8:00 AM, Simon Glass wrote: > Change this to CONFIG_ENV_OFFSET_REDUND. > > Signed-off-by: Simon Glass > --- > > README | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/16] README: Drop CONFIG_COGENT and related options
On Mon, Oct 3, 2016 at 8:00 AM, Simon Glass wrote: > These are no-longer present in U-Boot. Drop them. > > Signed-off-by: Simon Glass > --- > > README | 25 - > 1 file changed, 25 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ACPI in general
Hi York, On Wed, Oct 5, 2016 at 12:38 AM, york sun wrote: > Simon and Bin, > > Is there any activity to bring ACPI to other than x86 arch? If not, do > we have a plan to do so? > No plan to do ACPI on ARM yet. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 01/10] binman: Introduce binman, a tool for building binary images
Hi Simon,
2016-10-05 9:25 GMT+09:00 Simon Glass :
> +
> +Image description format
> +
> +
> +The binman node is called 'binman'. An example image description is shown
> +below:
> +
> + binman {
> + filename = "u-boot-sunxi-with-spl.bin";
> + pad-byte = <0xff>;
> + blob {
> + filename = "spl/sunxi-spl.bin";
> + };
> + u-boot {
> + pos = ;
> + };
> + };
Oh my, finally CONFIG_ in device tree.
If CONFIG_SPL_OF_CONTROL is enabled, SPL can parse "/binman/u-boot/pos" property
to know which offset address SPL should load U-Boot proper from,
then remove CONFIG_SPL_PAD_TO.
Otherwise, I have no idea to avoid this.
--
Best Regards
Masahiro Yamada
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Re: [U-Boot] [PATCH v3 08/10] binman: Automatically include a U-Boot .dtsi file
2016-10-05 9:25 GMT+09:00 Simon Glass : > For boards that need U-Boot-specific additions to the device tree, it is > a minor annoyance to have to add these each time the tree is synced with > upstream. > > Add a means to include a file (e.g. u-boot.dtsi) automatically into the .dts > file before it is compiled. > > The file uses is the first one that exists in this list: > >arch//dts/-u-boot.dtsi >arch//dts/-u-boot.dtsi >arch//dts/-u-boot.dtsi >arch//dts/u-boot.dtsi > > Signed-off-by: Simon Glass > Suggested-by: Tom Rini > --- > > Changes in v3: > - Add a new patch to automatically include a U-Boot .dtsi file > > Changes in v2: None > > scripts/Makefile.lib | 15 ++- > 1 file changed, 14 insertions(+), 1 deletion(-) > > diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib > index 2539ba5..b414a0c 100644 > --- a/scripts/Makefile.lib > +++ b/scripts/Makefile.lib > @@ -164,6 +164,17 @@ cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) > $(UBOOTINCLUDE) \ > > ld_flags = $(LDFLAGS) $(ldflags-y) > > +dts_dir = $(srctree)/arch/$(ARCH)/dts > + > +# Try these files in order to find the U-Boot-specific .dtsi include file > +binman_dtsi_options = $(wildcard $(dts_dir)/$(basename $(notdir > $<))-u-boot.dtsi) \ > + $(wildcard $(dts_dir)/$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \ > + $(wildcard $(dts_dir)/$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) > \ > + $(wildcard $(dts_dir)/u-boot.dtsi) > + > +# We use the first match > +binman_dtsi = $(firstword $(binman_dtsi_options)) > + I do not think this feature is binman-specific. Perhaps u_boot_dtsi? We are already suffering from U-Boot specific properties like "u-boot,dm-pre-reloc", which make it difficult to simply copy DT files from the kernel tree. So, my first guess was this feature might be useful to split such properties out to *-u-boot.dtsi. (it is a trade-off of more and more DT files, though.) -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY
Hi Simon,
2016-10-05 0:37 GMT+09:00 Simon Glass :
>> diff --git a/common/image-fdt.c b/common/image-fdt.c
>> index 3d23608..91970d4 100644
>> --- a/common/image-fdt.c
>> +++ b/common/image-fdt.c
>> @@ -458,6 +458,11 @@ __weak int ft_verify_fdt(void *fdt)
>> return 1;
>> }
>>
>> +__weak int arch_fixup_fdt(void *blob)
>> +{
>> + return 0;
>> +}
>
> Do we have to have a weak function? I was hoping we could avoid these
> since they make it hard to figure out at build time what code is
> executed.
>
This hunk is just reverting Michal's commit e2f88dfd2d9671.
Is it better to add an empty stub to every architecture that may call it?
--
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Masahiro Yamada
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[U-Boot] SPL load ARM Trusted Firmware BL31?
Hi. Recently I implemented ARM Trusted Firmware BL31 for my SoCs. But, I am wondering how the boot-flow should be. Here is my situation. [1] When my company developed its first ARMv8 SoC, I had to bring up the system very quickly. I was familiar with U-Boot and Linux to some extent, but not with ATF at that time. Also I was too pressed, so I decided to build up the system without ATF. The boot-flow was like this: BootROM -> U-Boot SPL -> U-Boot proper -> Linux In this flow, the secure runtime firmware is missing, so I used Spin-Table for the enable-method. [2] Now I finished porting ATF BL31. The low-level init code (basic SoC init + DRAM initialization) already exists in U-Boot SPL. So, I am currently re-using SPL, like follows: BootROM -> U-Boot SPL -> ATF BL31 -> U-Boot proper (=BL33) -> Linux As far as I know, SPL can not load multiple images such as BL31, BL32, BL33 (here BL32 is optional). So, I hacked my SPL to load multi images and jump to BL31. [3] I am guessing most vendors use vendor-specific firmware for low-level init because I see many of ARMv8 SoCs disabling CONFIG_SPL. Correct? Boot ROM -> Vendor proprietary firmware -> ATF BL31 -> U-Boot or UEFI (=BL33) -> Linux [4] Is it a good idea to implement everything in ATF like Juno/FVP? BL1 -> BL2 -> BL31 -> U-Boot or UEFI (BL33) -> Linux Recently I saw Simon's binman patches. It provides a fancy way to pack multiple firmware components into a single image, but I did not see the systematic way to load every entry in the image. (under way?) I was wondering if I should move my low-level init code from SPL to ATF BL2 or somewhere. Comments are welcome. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH][v3] board: ls1012afrdm: overwrite CONFIG_EXTRA_ENV_SETTINGS
LS1012AFRDM has 512MB of DDR. So update Kernel load address as 0x9600 instead of default 0xa000. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Pratiyush Mohan Srivastava --- Changes for v3: - Rebased v2 patch to master - Removed "initrd_high=0x\0" - Removed console variable "console=ttyAMA0,115200n8\0" Changes for v2: Incorporated York's comments - Removed ramdisk_addr, ramdisk_size - Updated UART baud-rate. include/configs/ls1012afrdm.h | 12 1 file changed, 12 insertions(+) diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 612f243..5763d86 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -20,6 +20,18 @@ #define CONFIG_SYS_MEMTEST_START 0x8000 #define CONFIG_SYS_MEMTEST_END 0x9fff +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=no\0" \ + "hwconfig=fsl_ddr:bank_intlv=auto\0"\ + "loadaddr=0x8010\0" \ + "kernel_addr=0x10\0"\ + "fdt_high=0x\0" \ + "initrd_high=0x\0" \ + "kernel_start=0xa0\0" \ + "kernel_load=0x9600\0" \ + "kernel_size=0x280\0" + /* * USB */ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] STM32F7 Discovery hangs on master
Hello, I just tested v2016.11-rc1 on STM32F7 Discovery and it hangs: (gdb) c Continuing. ^C Program received signal SIGTRAP, Trace/breakpoint trap. 0x08000d56 in dram_init () at board/st/stm32f746-disco/stm32f746-disco.c:211 211 FMC_BUSY_WAIT(); (gdb) bt #0 0x08000d56 in dram_init () at board/st/stm32f746-disco/stm32f746-disco.c:211 #1 0x0800d75a in initcall_run_list (init_sequence=init_sequence@entry=0x801b434 ) at lib/initcall.c:31 #2 0x0800614e in board_init_f (boot_flags=) at common/board_f.c:1081 #3 0x0800046a in _main () at arch/arm/lib/crt0.S:93 #4 0x0800046a in _main () at arch/arm/lib/crt0.S:93 Backtrace stopped: previous frame inner to this frame (corrupt stack?) It prints this: U-Boot 2016.11-rc1 (Oct 04 2016 - 19:53:31 +0300) DRAM: 8 MiB or this: U-Boot 2016.11-rc1 (Oct 04 2016 - 19:53:31 +0300) DRAM: Reverting 25c1b1353ce4b8188de6058f9f3b0d5d2dad8230 (not desirable) makes it working again but I can't seem to write anything to the console. Offtopic: How are you developing for this board? I'm using gcc 5_4-2016q3 from [0], st-util [1] which exports a /dev/ttyACM0 UART port I'm using at 115200n8 and gdb connected to st-util gdbserver. Best regards, Nicolae Rosia [0] https://github.com/texane/stlink [1] https://launchpad.net/gcc-arm-embedded ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 6/8] arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to Kconfig
Move these options to Kconfig and clean up existing uses.
Signed-off-by: York Sun
Reviewed-by: Simon Glass
---
Changes in v2: None
arch/arm/cpu/armv7/ls102xa/Kconfig| 11 +++
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 16
arch/arm/include/asm/arch-fsl-layerscape/config.h | 5 -
arch/arm/include/asm/arch-ls102xa/config.h| 2 --
include/configs/ls1012a_common.h | 2 --
include/configs/ls1021aqds.h | 2 --
include/configs/ls1021atwr.h | 2 --
include/configs/ls1043a_common.h | 3 ---
include/configs/ls1043aqds.h | 2 --
include/configs/ls1046a_common.h | 3 ---
include/configs/ls1046aqds.h | 2 --
include/configs/ls2080a_common.h | 3 ---
12 files changed, 27 insertions(+), 26 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 88983f4..17f1975 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -1,6 +1,8 @@
config ARCH_LS1021A
bool
select SYS_FSL_ERRATUM_A010315
+ select SYS_FSL_SRDS_1
+ select SYS_HAS_SERDES
menu "LS102xA architecture"
depends on ARCH_LS1021A
@@ -23,6 +25,15 @@ config MAX_CPUS
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"
+config SYS_FSL_SRDS_1
+ bool
+
+config SYS_FSL_SRDS_2
+ bool
+
+config SYS_HAS_SERDES
+ bool
+
config SYS_FSL_IFC_BANK_COUNT
int "Maximum banks of Integrated flash controller"
depends on ARCH_LS1021A
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index f683a14..66e509e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -12,16 +12,23 @@ config ARCH_LS1043A
config ARCH_LS1046A
bool
select FSL_LSCH2
+ select SYS_FSL_SRDS_2
config ARCH_LS2080A
bool
select FSL_LSCH3
+ select SYS_FSL_HAS_DP_DDR
+ select SYS_FSL_SRDS_2
config FSL_LSCH2
bool
+ select SYS_FSL_SRDS_1
+ select SYS_HAS_SERDES
config FSL_LSCH3
bool
+ select SYS_FSL_SRDS_1
+ select SYS_HAS_SERDES
menu "Layerscape architecture"
depends on FSL_LSCH2 || FSL_LSCH3
@@ -60,4 +67,13 @@ config SYS_FSL_IFC_BANK_COUNT
config SYS_FSL_HAS_DP_DDR
bool
+config SYS_FSL_SRDS_1
+ bool
+
+config SYS_FSL_SRDS_2
+ bool
+
+config SYS_HAS_SERDES
+ bool
+
endmenu
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 6ee75cb..3039e72 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -32,8 +32,6 @@
#ifdef CONFIG_LS2080A
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 }
#defineSRDS_MAX_LANES 8
-#define CONFIG_SYS_FSL_SRDS_1
-#define CONFIG_SYS_FSL_SRDS_2
#define CONFIG_SYS_PAGE_SIZE 0x1
#ifndef L1_CACHE_BYTES
#define L1_CACHE_SHIFT 6
@@ -162,8 +160,6 @@
#define CONFIG_SYS_FSL_PEX_LUT_BE
#define CONFIG_SYS_FSL_SEC_BE
-#define CONFIG_SYS_FSL_SRDS_1
-
/* SoC related */
#ifdef CONFIG_LS1043A
#define CONFIG_SYS_FMAN_V3
@@ -212,7 +208,6 @@
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
-#define CONFIG_SYS_FSL_SRDS_2
#define CONFIG_SYS_FSL_IFC_BE
#define CONFIG_SYS_FSL_SFP_VER_3_2
#define CONFIG_SYS_FSL_SNVS_LE
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h
b/arch/arm/include/asm/arch-ls102xa/config.h
index 70cc703..dfcb546 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -120,8 +120,6 @@
#define DCU_LAYER_MAX_NUM 16
-#define CONFIG_SYS_FSL_SRDS_1
-
#ifdef CONFIG_LS102XA
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CONFIG_NUM_DDR_CONTROLLERS 1
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 1056755..ced8ead 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -10,8 +10,6 @@
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_GICV2
-#defineCONFIG_SYS_HAS_SERDES
-
#include
#define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 0d72e69..5ff3db6 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -143,8 +143,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
-#define CONFIG_SYS_HAS_SERDES
-
#define CONFIG_FSL_CAAM/* Enable CAAM */
#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
diff --git a/include/configs/ls1021atwr.h b/includ
Re: [U-Boot] [PATCH] libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY
Hi Masahiro,
On 4 October 2016 at 06:03, Masahiro Yamada
wrote:
> Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option")
> allows us to skip memory setup of DTB, but a problem for ARM is that
> spin_table_update_dt() and psci_update_dt() are skipped as well if
> CONFIG_ARCH_FIXUP_FDT is disabled.
>
> This commit allows us to skip only fdt_fixup_memory_banks() instead
> of the whole of arch_fixup_fdt(). It will be useful when we want to
> use a memory node from a kernel DTB as is, but need some fixups for
> Spin-Table/PSCI.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> Kconfig | 5 ++---
> arch/arm/lib/bootm-fdt.c | 2 --
> arch/arm/lib/bootm.c | 2 --
> arch/mips/lib/bootm.c| 2 --
> common/fdt_support.c | 2 ++
> common/image-fdt.c | 7 +--
> include/fdt_support.h| 8
> 7 files changed, 17 insertions(+), 11 deletions(-)
>
> diff --git a/Kconfig b/Kconfig
> index 1263d0b..b7cb142 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -324,9 +324,8 @@ config SYS_CLK_FREQ
> help
> TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture
>
> -config ARCH_FIXUP_FDT
> - bool "Enable arch_fixup_fdt() call"
> - depends on ARM || MIPS
> +config ARCH_FIXUP_FDT_MEMORY
> + bool "Enable arch_fixup_memory_banks() call"
> default y
> help
> Enable FDT memory map syncup before OS boot. This feature can be
> diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
> index a517550..4481f9e 100644
> --- a/arch/arm/lib/bootm-fdt.c
> +++ b/arch/arm/lib/bootm-fdt.c
> @@ -25,7 +25,6 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -#ifdef CONFIG_ARCH_FIXUP_FDT
> int arch_fixup_fdt(void *blob)
> {
> bd_t *bd = gd->bd;
> @@ -61,4 +60,3 @@ int arch_fixup_fdt(void *blob)
>
> return 0;
> }
> -#endif
> diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
> index 53c3141..0e890ce 100644
> --- a/arch/arm/lib/bootm.c
> +++ b/arch/arm/lib/bootm.c
> @@ -372,10 +372,8 @@ void boot_prep_vxworks(bootm_headers_t *images)
> if (images->ft_addr) {
> off = fdt_path_offset(images->ft_addr, "/memory");
> if (off < 0) {
> -#ifdef CONFIG_ARCH_FIXUP_FDT
> if (arch_fixup_fdt(images->ft_addr))
> puts("## WARNING: fixup memory failed!\n");
> -#endif
> }
> }
> #endif
> diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
> index 0c6a4ab..aa0475a 100644
> --- a/arch/mips/lib/bootm.c
> +++ b/arch/mips/lib/bootm.c
> @@ -253,7 +253,6 @@ static int boot_reloc_fdt(bootm_headers_t *images)
> #endif
> }
>
> -#ifdef CONFIG_ARCH_FIXUP_FDT
> int arch_fixup_fdt(void *blob)
> {
> #if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
> @@ -265,7 +264,6 @@ int arch_fixup_fdt(void *blob)
> return 0;
> #endif
> }
> -#endif
>
> static int boot_setup_fdt(bootm_headers_t *images)
> {
> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index 2020586..c87031f 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c
> @@ -381,6 +381,7 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
> do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create);
> }
>
> +#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
> /*
> * fdt_pack_reg - pack address and size array into the "reg"-suitable stream
> */
> @@ -459,6 +460,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64
> size[], int banks)
> }
> return 0;
> }
> +#endif
>
> int fdt_fixup_memory(void *blob, u64 start, u64 size)
> {
> diff --git a/common/image-fdt.c b/common/image-fdt.c
> index 3d23608..91970d4 100644
> --- a/common/image-fdt.c
> +++ b/common/image-fdt.c
> @@ -458,6 +458,11 @@ __weak int ft_verify_fdt(void *fdt)
> return 1;
> }
>
> +__weak int arch_fixup_fdt(void *blob)
> +{
> + return 0;
> +}
Do we have to have a weak function? I was hoping we could avoid these
since they make it hard to figure out at build time what code is
executed.
> +
> int image_setup_libfdt(bootm_headers_t *images, void *blob,
>int of_size, struct lmb *lmb)
> {
> @@ -474,12 +479,10 @@ int image_setup_libfdt(bootm_headers_t *images, void
> *blob,
> printf("ERROR: /chosen node create failed\n");
> goto err;
> }
> -#ifdef CONFIG_ARCH_FIXUP_FDT
> if (arch_fixup_fdt(blob) < 0) {
> printf("ERROR: arch-specific fdt fixup failed\n");
> goto err;
> }
> -#endif
> if (IMAGE_OF_BOARD_SETUP) {
> fdt_ret = ft_board_setup(blob, gd->bd);
> if (fdt_ret) {
> diff --git a/include/fdt_support.h b/include/fdt_support.h
> index 8f40231..7110061 100644
> --- a/include/fdt_support.h
> +++ b/include/fdt_support.h
> @@ -93,7 +93,15 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size);
> * property will be left untouched.
> * @return 0 if
Re: [U-Boot] [PATCH] serial: ns16550: Handle -ENOENT when requesting clock
On Mon, Oct 03, 2016 at 10:23:49AM -0600, Stephen Warren wrote: > On 09/30/2016 02:37 AM, Alexandre Courbot wrote: > > When calling clk_get_by_index(), fall back to the legacy method of > > getting the clock if -ENOENT is returned. > > Tested-by: Stephen Warren Agreed, this looks like the more correct fix in retrospect. Acked-by: Thierry Reding signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 02/12] serial: ns16550: Support clocks via phandle
Hello,
I found that this commit breaks serial ns16550 driver on ARC.
I have investigated the issue and found that it is because ARC timer node in
device tree doesn't refer to any clock
devices.
In such case clk_get_by_index() returns -ENOENT error, but neither -ENODEV nor
-ENOSYS (as CONFIG_CLK is enabled for
ARC). So the error is not ignored and we exit with error instead of trying to
get "clock-frequency" property from the
device tree.
Thus I wonder why we ignore only ENOSYS and ENODEV errors and exit if any other
error code appears?
As shown in my example such behavior can lead to breakages.
What should we do if ENOENT occurs?
Thanks.
On Thu, 2016-09-08 at 07:47 +0100, Paul Burton wrote:
> Previously ns16550 compatible UARTs probed via device tree have needed
> their device tree nodes to contain a clock-frequency property. An
> alternative to this commonly used with Linux is to reference a clock via
> a phandle. This patch allows U-Boot to support that, retrieving the
> clock frequency by probing the appropriate clock device.
>
> For example, a system might choose to provide the UART base clock as a
> reference to a clock common to multiple devices:
>
> sys_clk: clock {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <1000>;
> };
>
> uart0: uart@1000 {
> compatible = "ns16550a";
> reg = <0x1000 0x1000>;
> clocks = <&sys_clk>;
> };
>
> uart1: uart@1000 {
> compatible = "ns16550a";
> reg = <0x10001000 0x1000>;
> clocks = <&sys_clk>;
> };
>
> This removes the need for the frequency information to be duplicated in
> multiple nodes and allows the device tree to be more descriptive of the
> system.
>
> Signed-off-by: Paul Burton
> Reviewed-by: Simon Glass
>
> ---
>
> Changes in v7:
> - Check clk_get_rate return for error values
>
> Changes in v6:
> - Ignore -ENOSYS from clk_get_by_index too, for systems with CONFIG_CLK=n
>
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Propogate non-ENODEV errors from clk_get_by_index
>
> drivers/serial/ns16550.c | 21 ++---
> 1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index 88fca15..3f6ea4d 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -5,6 +5,7 @@
> */
>
> #include
> +#include
> #include
> #include
> #include
> @@ -352,6 +353,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
> {
> struct ns16550_platdata *plat = dev->platdata;
> fdt_addr_t addr;
> + struct clk clk;
> + int err;
>
> /* try Processor Local Bus device first */
> addr = dev_get_addr(dev);
> @@ -397,9 +400,21 @@ int ns16550_serial_ofdata_to_platdata(struct udevice
> *dev)
> "reg-offset", 0);
> plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> "reg-shift", 0);
> - plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> - "clock-frequency",
> - CONFIG_SYS_NS16550_CLK);
> +
> + err = clk_get_by_index(dev, 0, &clk);
> + if (!err) {
> + err = clk_get_rate(&clk);
> + if (!IS_ERR_VALUE(err))
> + plat->clock = err;
> + } else if (err != -ENODEV && err != -ENOSYS) {
> + debug("ns16550 failed to get clock\n");
> + return err;
> + }
> +
> + if (!plat->clock)
> + plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> + "clock-frequency",
> + CONFIG_SYS_NS16550_CLK);
> if (!plat->clock) {
> debug("ns16550 clock not defined\n");
> return -EINVAL;
--
Best regards,
Vlad Zakharov
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[U-Boot] imx53 performance issue after updating to version 2016.9 (tftp download, hash calculation)
After updating a mx53 based custom design to u-boot version 2016.9 from 2013.10 I’m facing performance problems. Change in performance can be observed e.g. during following situations: - TFTP download has decreased from 3 MiB/s to only 517.6 KiB/s - Hash value calculation (sha1) during FIT image format check. Hash calculation now takes a noticeable amount of time instead of finishing virtually immediately. Unfortunately I don’t have access to a Freescale evaluation board to cross check my problems with another i.Mx53 based design. My first assumption was a connection with caching, but according to lowlevel_init.S L2 cache is enabled. Same for D-cache and I-cache. Is anybody facing the same problems or could state information about the behavior on other MX53 boards? Any other suggestions? Regards Martin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 7/8] armv8: fsl-layerscape: Move DDR config options to Kconfig
Move DDR3, DDR4 and realted options to Kconfig and clean up existing uses. Signed-off-by: York Sun --- Changes in v2: No patch arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 54 +++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 14 -- configs/ls1043aqds_defconfig | 2 +- configs/ls1043aqds_lpuart_defconfig | 3 +- configs/ls1043aqds_nand_defconfig | 3 +- configs/ls1043aqds_nor_ddr3_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 3 +- configs/ls1043aqds_sdcard_ifc_defconfig | 3 +- configs/ls1043aqds_sdcard_qspi_defconfig | 3 +- configs/ls1043ardb_SECURE_BOOT_defconfig | 3 +- configs/ls1043ardb_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 3 +- configs/ls1043ardb_sdcard_defconfig | 3 +- include/configs/ls1043a_common.h | 4 -- include/configs/ls1043aqds.h | 3 -- include/configs/ls2080a_common.h | 1 - 16 files changed, 73 insertions(+), 32 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 66e509e..52a3535 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,22 +1,31 @@ config ARCH_LS1012A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 config ARCH_LS1043A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE + select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A010315 config ARCH_LS1046A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE + select SYS_FSL_DDR4 + select SYS_FSL_DDR_VER_50 select SYS_FSL_SRDS_2 config ARCH_LS2080A bool select FSL_LSCH3 + select SYS_FSL_DDR4 + select SYS_FSL_DDR_LE + select SYS_FSL_DDR_VER_50 select SYS_FSL_HAS_DP_DDR select SYS_FSL_SRDS_2 @@ -76,4 +85,49 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool +config SYS_FSL_DDR + bool "Freescale DDR driver" + help + Select Freescale General DDR driver, shared between most Freescale + PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- + based Layerscape SoCs (such as ls2080a). + +config SYS_FSL_DDR_BE + bool + help + Access DDR registers in big-endian. + +config SYS_FSL_DDR_LE + bool + help + Access DDR registers in little-endian. + +config SYS_FSL_DDR_VER + int + default 50 if SYS_FSL_DDR_VER_50 + +config SYS_FSL_DDR_VER_50 + bool + +config SYS_FSL_DDRC_ARM_GEN3 + bool + +config SYS_FSL_DDRC_GEN4 + bool + +config SYS_FSL_DDR3 + bool "Freescale DDR3 controller" + depends on !SYS_FSL_DDR4 + select SYS_FSL_DDR + select SYS_FSL_DDRC_ARM_GEN3 + help + Enable Freescale DDR3 controller on ARM-based SoCs. + +config SYS_FSL_DDR4 + bool "Freescale DDR4 controller" + select SYS_FSL_DDR + select SYS_FSL_DDRC_GEN4 + help + Enable Freescale DDR4 controller. + endmenu diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 3039e72..4201e0f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -12,17 +12,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR0x8030 -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#else -#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */ -#endif - -#ifndef CONFIG_ARCH_LS1012A -#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */ -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 -#endif - /* * Reserve secure memory * To be aligned with MMU block size @@ -42,7 +31,6 @@ #define CONFIG_SYS_FSL_OCRAM_SIZE 0x0020 /* 2M */ /* DDR */ -#define CONFIG_SYS_FSL_DDR_LE #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE @@ -166,7 +154,6 @@ #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 7 #define CONFIG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE @@ -204,7 +191,6 @@ #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 2 -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE diff --git a/configs/ls1043aqds_
[U-Boot] [PATCH v2 8/8] armv7: ls1021a: Move DDR config options to Kconfig
Move DDR3, DDR4 and related config options to Kconfig and clean up existing uses. Signed-off-by: York Sun --- Changes in v2: No patch arch/arm/cpu/armv7/ls102xa/Kconfig | 47 arch/arm/include/asm/arch-ls102xa/config.h | 10 -- configs/ls1021aqds_ddr4_nor_defconfig| 2 +- configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 3 +- configs/ls1021aqds_nand_defconfig| 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig| 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + include/configs/ls1021aqds.h | 1 - 12 files changed, 57 insertions(+), 13 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 17f1975..28bf778 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -3,6 +3,8 @@ config ARCH_LS1021A select SYS_FSL_ERRATUM_A010315 select SYS_FSL_SRDS_1 select SYS_HAS_SERDES + select SYS_FSL_DDR_BE + select SYS_FSL_DDR_VER_50 menu "LS102xA architecture" depends on ARCH_LS1021A @@ -22,6 +24,10 @@ config MAX_CPUS cores, count the reserved ports. This will allocate enough memory in spin table to properly handle all cores. +config NUM_DDR_CONTROLLERS + int "Maximum DDR controllers" + default 1 + config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" @@ -34,6 +40,47 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool +config SYS_FSL_DDR + bool "Freescale DDR driver" + help + Select Freescale General DDR driver, shared between most Freescale + PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- + based Layerscape SoCs (such as ls2080a). + +config SYS_FSL_DDR_BE + bool + default y + help + Access DDR registers in big-endian. + +config SYS_FSL_DDR_VER + int + default 50 if SYS_FSL_DDR_VER_50 + +config SYS_FSL_DDR_VER_50 + bool + +config SYS_FSL_DDRC_ARM_GEN3 + bool + +config SYS_FSL_DDRC_GEN4 + bool + +config SYS_FSL_DDR3 + bool "Freescale DDR3 controller" + depends on !SYS_FSL_DDR4 + select SYS_FSL_DDR + select SYS_FSL_DDRC_ARM_GEN3 + help + Enable Freescale DDR3 controller on ARM-based SoCs. + +config SYS_FSL_DDR4 + bool "Freescale DDR4 controller" + select SYS_FSL_DDR + select SYS_FSL_DDRC_GEN4 + help + Enable Freescale DDR4 controller. + config SYS_FSL_IFC_BANK_COUNT int "Maximum banks of Integrated flash controller" depends on ARCH_LS1021A diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index dfcb546..ec65cc0 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -94,14 +94,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A008407 #ifdef CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_VERY_BIG_RAM -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#else -#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 -#endif -#define CONFIG_SYS_FSL_DDR #define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE #endif @@ -121,9 +114,6 @@ #define DCU_LAYER_MAX_NUM 16 #ifdef CONFIG_LS102XA -#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 -#define CONFIG_NUM_DDR_CONTROLLERS 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_USB_MAX_CONTROLLER_COUNT1 #define CONFIG_SYS_FSL_ERRATUM_A008378 diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 8761b60..b746ad7 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -5,7 +5,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 5bb475e..b6df305 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -5,7 +5,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig i
[U-Boot] [PATCH v3 10/10] RFC: Use binman for an x86 board
Add an example usage of binman for an x86 board. This involves adding the
image definition to the device tree and using it in the Makefile. The
existing ifdtool features are no-longer needed.
This is for example only. Note that the binman.dtsi file is common and
could be used for all x86 boards. However, FSP support is missing.
Signed-off-by: Simon Glass
---
Changes in v3:
- Put the binman definition in u-boot.dtsi
Changes in v2:
- Add automated test coverage
- Various changes and improvements based on using this tool for a while
- Put the binman definition in a common file for x86
Makefile | 45 +++
arch/x86/dts/u-boot.dtsi | 62
2 files changed, 65 insertions(+), 42 deletions(-)
create mode 100644 arch/x86/dts/u-boot.dtsi
diff --git a/Makefile b/Makefile
index 31c9483..64aab44 100644
--- a/Makefile
+++ b/Makefile
@@ -1060,50 +1060,11 @@ endif
# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including
# reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in
-# the middle.
+# the middle. This is handled by binman based on an image description in the
+# board's device tree.
ifneq ($(CONFIG_X86_RESET_VECTOR),)
rom: u-boot.rom FORCE
-IFDTOOL=$(objtree)/tools/ifdtool
-IFDTOOL_FLAGS = -f 0:$(objtree)/u-boot.dtb
-IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut -d'
' -f1)
-IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-nodtb.bin
-IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin
-IFDTOOL_FLAGS += -C
-
-ifneq ($(CONFIG_HAVE_INTEL_ME),)
-IFDTOOL_ME_FLAGS = -D $(srctree)/board/$(BOARDDIR)/descriptor.bin
-IFDTOOL_ME_FLAGS += -i ME:$(srctree)/board/$(BOARDDIR)/me.bin
-endif
-
-ifneq ($(CONFIG_HAVE_MRC),)
-IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_ADDR):$(srctree)/board/$(BOARDDIR)/mrc.bin
-endif
-
-ifneq ($(CONFIG_HAVE_FSP),)
-IFDTOOL_FLAGS += -w
$(CONFIG_FSP_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_FSP_FILE)
-endif
-
-ifneq ($(CONFIG_HAVE_CMC),)
-IFDTOOL_FLAGS += -w
$(CONFIG_CMC_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_CMC_FILE)
-endif
-
-ifneq ($(CONFIG_HAVE_VGA_BIOS),)
-IFDTOOL_FLAGS += -w
$(CONFIG_VGA_BIOS_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_VGA_BIOS_FILE)
-endif
-
-ifneq ($(CONFIG_HAVE_REFCODE),)
-IFDTOOL_FLAGS += -w $(CONFIG_X86_REFCODE_ADDR):refcode.bin
-endif
-
-quiet_cmd_ifdtool = IFDTOOL $@
-cmd_ifdtool = $(IFDTOOL) -c -r $(CONFIG_ROM_SIZE) u-boot.tmp;
-ifneq ($(CONFIG_HAVE_INTEL_ME),)
-cmd_ifdtool += $(IFDTOOL) $(IFDTOOL_ME_FLAGS) u-boot.tmp;
-endif
-cmd_ifdtool += $(IFDTOOL) $(IFDTOOL_FLAGS) u-boot.tmp;
-cmd_ifdtool += mv u-boot.tmp $@
-
refcode.bin: $(srctree)/board/$(BOARDDIR)/refcode.bin FORCE
$(call if_changed,copy)
@@ -1113,7 +1074,7 @@ cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
u-boot.rom: u-boot-x86-16bit.bin u-boot.bin FORCE \
$(if $(CONFIG_HAVE_REFCODE),refcode.bin)
- $(call if_changed,ifdtool)
+ $(call if_changed,binman)
OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec
u-boot-x86-16bit.bin: u-boot FORCE
diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
new file mode 100644
index 000..724913f
--- /dev/null
+++ b/arch/x86/dts/u-boot.dtsi
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2016 Google, Inc
+ * Written by Simon Glass
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+
+#ifdef CONFIG_ROM_SIZE
+/ {
+ binman {
+ filename = "u-boot.rom";
+ end-at-4gb;
+ sort-by-pos;
+ pad-byte = <0xff>;
+ size = ;
+#ifdef CONFIG_HAVE_INTEL_ME
+ intel-descriptor {
+ };
+ intel-me {
+ };
+#endif
+ u-boot-with-ucode-ptr {
+ pos = ;
+ };
+ u-boot-dtb-with-ucode {
+ };
+ u-boot-ucode {
+ align = <16>;
+ };
+#ifdef CONFIG_HAVE_MRC
+ intel-mrc {
+ pos = ;
+ };
+#endif
+#ifdef CONFIG_HAVE_FSP
+ intel-fsp {
+ pos = ;
+ };
+#endif
+#ifdef CONFIG_HAVE_CMC
+ intel-cmc {
+ pos = ;
+ };
+#endif
+#ifdef CONFIG_HAVE_VGA_BIOS
+ intel-vga {
+ pos = ;
+ };
+#endif
+#ifdef CONFIG_HAVE_REFCODE
+ intel-refcode {
+ pos = ;
+ };
+#endif
+ x86-start16 {
+ pos = ;
+ };
+ };
+};
+#endif
--
2.8.0.rc3.226.g39d4020
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[U-Boot] [PATCH v3 08/10] binman: Automatically include a U-Boot .dtsi file
For boards that need U-Boot-specific additions to the device tree, it is
a minor annoyance to have to add these each time the tree is synced with
upstream.
Add a means to include a file (e.g. u-boot.dtsi) automatically into the .dts
file before it is compiled.
The file uses is the first one that exists in this list:
arch//dts/-u-boot.dtsi
arch//dts/-u-boot.dtsi
arch//dts/-u-boot.dtsi
arch//dts/u-boot.dtsi
Signed-off-by: Simon Glass
Suggested-by: Tom Rini
---
Changes in v3:
- Add a new patch to automatically include a U-Boot .dtsi file
Changes in v2: None
scripts/Makefile.lib | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 2539ba5..b414a0c 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -164,6 +164,17 @@ cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS)
$(UBOOTINCLUDE) \
ld_flags = $(LDFLAGS) $(ldflags-y)
+dts_dir = $(srctree)/arch/$(ARCH)/dts
+
+# Try these files in order to find the U-Boot-specific .dtsi include file
+binman_dtsi_options = $(wildcard $(dts_dir)/$(basename $(notdir
$<))-u-boot.dtsi) \
+ $(wildcard $(dts_dir)/$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \
+ $(wildcard $(dts_dir)/$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \
+ $(wildcard $(dts_dir)/u-boot.dtsi)
+
+# We use the first match
+binman_dtsi = $(firstword $(binman_dtsi_options))
+
# Modified for U-Boot
dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc\
-I$(srctree)/arch/$(ARCH)/dts \
@@ -293,8 +304,10 @@ $(obj)/%.dtb.S: $(obj)/%.dtb
quiet_cmd_dtc = DTC $@
# Modified for U-Boot
+# Bring in any U-Boot-specific include after the '/dts-v1/;' header
cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
- $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
+ cat $< $(if $(binman_dtsi),| sed '/dts-v1/a\#include
\"$(binman_dtsi)\"') | \
+ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ;
\
$(DTC) -O dtb -o $@ -b 0 \
-i $(dir $<) $(DTC_FLAGS) \
-d $(depfile).dtc.tmp $(dtc-tmp) ; \
--
2.8.0.rc3.226.g39d4020
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[U-Boot] [PATCH v3 09/10] RFC: Use binman for a sunxi board
Add an example usage of binman for a sunxi board. This involves adding the
image definition to the device tree and using it in the Makefile.
This is for example only.
Signed-off-by: Simon Glass
---
Changes in v3:
- Use a -u-boot.dtsi file for the binman changes
Changes in v2: None
Makefile| 4 +---
arch/arm/dts/sun7i-a20-pcduino3-u-boot.dtsi | 14 ++
2 files changed, 15 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/dts/sun7i-a20-pcduino3-u-boot.dtsi
diff --git a/Makefile b/Makefile
index a5428a2..31c9483 100644
--- a/Makefile
+++ b/Makefile
@@ -1121,10 +1121,8 @@ u-boot-x86-16bit.bin: u-boot FORCE
endif
ifneq ($(CONFIG_SUNXI),)
-OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
- --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
- $(call if_changed,pad_cat)
+ $(call if_changed,binman)
endif
ifneq ($(CONFIG_TEGRA),)
diff --git a/arch/arm/dts/sun7i-a20-pcduino3-u-boot.dtsi
b/arch/arm/dts/sun7i-a20-pcduino3-u-boot.dtsi
new file mode 100644
index 000..5adfd9b
--- /dev/null
+++ b/arch/arm/dts/sun7i-a20-pcduino3-u-boot.dtsi
@@ -0,0 +1,14 @@
+#include
+
+/ {
+ binman {
+ filename = "u-boot-sunxi-with-spl.bin";
+ pad-byte = <0xff>;
+ blob {
+ filename = "spl/sunxi-spl.bin";
+ };
+ u-boot-img {
+ pos = ;
+ };
+ };
+};
--
2.8.0.rc3.226.g39d4020
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[U-Boot] [PATCH v3 03/10] binman: Add support for building x86 ROMs
The structure of x86 ROMs is pretty complex. There are various binary blobs
to place in the image. Microcode requires special handling so that it is
available to very early code and can be used without any memory whatsoever.
Add support for the various entry types that are currently needed, along
with some tests.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
tools/binman/etype/intel_descriptor.py | 55 +++
tools/binman/etype/intel_me.py | 17
tools/binman/etype/intel_mrc.py | 17
tools/binman/etype/intel_vga.py | 17
tools/binman/etype/u_boot_dtb_with_ucode.py | 72 ++
tools/binman/etype/u_boot_ucode.py | 77 +++
tools/binman/etype/u_boot_with_ucode_ptr.py | 73 ++
tools/binman/etype/x86_start16.py | 17
tools/binman/func_test.py | 145
tools/binman/test/27_pack_4gb_no_size.dts | 18
tools/binman/test/28_pack_4gb_outside.dts | 19
tools/binman/test/29_x86-rom.dts| 19
tools/binman/test/30_x86-rom-me-no-desc.dts | 15 +++
tools/binman/test/31_x86-rom-me.dts | 18
tools/binman/test/32_intel-vga.dts | 13 +++
tools/binman/test/33_x86-start16.dts| 13 +++
tools/binman/test/34_x86_ucode.dts | 29 ++
tools/binman/test/35_x86_single_ucode.dts | 26 +
tools/binman/test/u_boot_ucode_ptr | Bin 0 -> 4175 bytes
tools/binman/test/u_boot_ucode_ptr.c| 15 +++
tools/binman/test/u_boot_ucode_ptr.lds | 18
21 files changed, 693 insertions(+)
create mode 100644 tools/binman/etype/intel_descriptor.py
create mode 100644 tools/binman/etype/intel_me.py
create mode 100644 tools/binman/etype/intel_mrc.py
create mode 100644 tools/binman/etype/intel_vga.py
create mode 100644 tools/binman/etype/u_boot_dtb_with_ucode.py
create mode 100644 tools/binman/etype/u_boot_ucode.py
create mode 100644 tools/binman/etype/u_boot_with_ucode_ptr.py
create mode 100644 tools/binman/etype/x86_start16.py
create mode 100644 tools/binman/test/27_pack_4gb_no_size.dts
create mode 100644 tools/binman/test/28_pack_4gb_outside.dts
create mode 100644 tools/binman/test/29_x86-rom.dts
create mode 100644 tools/binman/test/30_x86-rom-me-no-desc.dts
create mode 100644 tools/binman/test/31_x86-rom-me.dts
create mode 100644 tools/binman/test/32_intel-vga.dts
create mode 100644 tools/binman/test/33_x86-start16.dts
create mode 100644 tools/binman/test/34_x86_ucode.dts
create mode 100644 tools/binman/test/35_x86_single_ucode.dts
create mode 100755 tools/binman/test/u_boot_ucode_ptr
create mode 100644 tools/binman/test/u_boot_ucode_ptr.c
create mode 100644 tools/binman/test/u_boot_ucode_ptr.lds
diff --git a/tools/binman/etype/intel_descriptor.py
b/tools/binman/etype/intel_descriptor.py
new file mode 100644
index 000..7f4ea0b
--- /dev/null
+++ b/tools/binman/etype/intel_descriptor.py
@@ -0,0 +1,55 @@
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for 'u-boot'
+#
+
+import struct
+
+from entry import Entry
+from blob import Entry_blob
+
+FD_SIGNATURE = struct.pack('> 4) | 0xfff
+self.size = self.limit - self.base + 1
+
+class Entry_intel_descriptor(Entry_blob):
+"""Intel flash descriptor block (4KB)
+
+This is placed at the start of flash and provides information about
+the SPI flash regions. In particular it provides the base address and
+size of the ME region, allowing us to place the ME binary in the right
+place.
+"""
+def __init__(self, image, etype, node):
+Entry_blob.__init__(self, image, etype, node)
+self._regions = []
+
+def GetDefaultFilename(self):
+return 'descriptor.bin'
+
+def GetPositions(self):
+pos = self.data.find(FD_SIGNATURE)
+if pos == -1:
+self.Raise('Cannot find FD signature')
+flvalsig, flmap0, flmap1, flmap2 = struct.unpack('> 16) & 0xff) << 4
+for i in range(MAX_REGIONS):
+self._regions.append(Region(self.data, frba, i))
+
+# Set the offset for ME only, for now, since the others are not used
+return {'intel-me': [self._regions[REGION_ME].base,
+ self._regions[REGION_ME].size]}
diff --git a/tools/binman/etype/intel_me.py b/tools/binman/etype/intel_me.py
new file mode 100644
index 000..fbb553a
--- /dev/null
+++ b/tools/binman/etype/intel_me.py
@@ -0,0 +1,17 @@
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for 'u-boot'
+#
+
+from entry import Entry
+from blob import Entry_blob
+
+class Entry_intel_me(Entry_blob):
+def __init__(self, image, etype, node):
+Entry_blob.__init__(self, image, etype, node)
+
+def GetDefaultFilename(self):
+return 'm
[U-Boot] [PATCH v3 05/10] binman: Add support for building x86 ROMs with SPL
When building for 64-bit x86 we need an SPL binary in the ROM. Add support
for this. Also increase entry test code coverage to 100%.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
tools/binman/etype/u_boot_spl_bss_pad.py | 26 +
tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 28 +
tools/binman/etype/x86_start16_spl.py| 17 ++
tools/binman/func_test.py| 71 +++
tools/binman/test/37_x86_no_ucode.dts| 20 +++
tools/binman/test/38_x86_ucode_missing_node.dts | 26 +
tools/binman/test/39_x86_ucode_missing_node2.dts | 23
tools/binman/test/40_x86_ucode_not_in_image.dts | 28 +
tools/binman/test/41_unknown_pos_size.dts| 11
tools/binman/test/u_boot_no_ucode_ptr| Bin 0 -> 4182 bytes
tools/binman/test/u_boot_no_ucode_ptr.c | 15 +
11 files changed, 265 insertions(+)
create mode 100644 tools/binman/etype/u_boot_spl_bss_pad.py
create mode 100644 tools/binman/etype/u_boot_spl_with_ucode_ptr.py
create mode 100644 tools/binman/etype/x86_start16_spl.py
create mode 100644 tools/binman/test/37_x86_no_ucode.dts
create mode 100644 tools/binman/test/38_x86_ucode_missing_node.dts
create mode 100644 tools/binman/test/39_x86_ucode_missing_node2.dts
create mode 100644 tools/binman/test/40_x86_ucode_not_in_image.dts
create mode 100644 tools/binman/test/41_unknown_pos_size.dts
create mode 100755 tools/binman/test/u_boot_no_ucode_ptr
create mode 100644 tools/binman/test/u_boot_no_ucode_ptr.c
diff --git a/tools/binman/etype/u_boot_spl_bss_pad.py
b/tools/binman/etype/u_boot_spl_bss_pad.py
new file mode 100644
index 000..c005f28
--- /dev/null
+++ b/tools/binman/etype/u_boot_spl_bss_pad.py
@@ -0,0 +1,26 @@
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for BSS padding for spl/u-boot-spl.bin. This padding
+# can be added after the SPL binary to ensure that anything concatenated
+# to it will appear to SPL to be at the end of BSS rather than the start.
+#
+
+import command
+from entry import Entry
+from blob import Entry_blob
+import tools
+
+class Entry_u_boot_spl_bss_pad(Entry_blob):
+def __init__(self, image, etype, node):
+Entry_blob.__init__(self, image, etype, node)
+
+def ObtainContents(self):
+fname = tools.GetInputFilename('spl/u-boot-spl')
+args = [['nm', fname], ['grep', '__bss_size']]
+out = command.RunPipe(args, capture=True).stdout.splitlines()
+bss_size = int(out[0].split()[0], 16)
+self.data = chr(0) * bss_size
+self.contents_size = bss_size
diff --git a/tools/binman/etype/u_boot_spl_with_ucode_ptr.py
b/tools/binman/etype/u_boot_spl_with_ucode_ptr.py
new file mode 100644
index 000..764c282
--- /dev/null
+++ b/tools/binman/etype/u_boot_spl_with_ucode_ptr.py
@@ -0,0 +1,28 @@
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for an SPL binary with an embedded microcode pointer
+#
+
+import struct
+
+import command
+from entry import Entry
+from blob import Entry_blob
+from u_boot_with_ucode_ptr import Entry_u_boot_with_ucode_ptr
+import tools
+
+class Entry_u_boot_spl_with_ucode_ptr(Entry_u_boot_with_ucode_ptr):
+"""U-Boot SPL with embedded microcode pointer
+
+See Entry_u_boot_ucode for full details of the entries involved in this
+process.
+"""
+def __init__(self, image, etype, node):
+Entry_blob.__init__(self, image, etype, node)
+self.elf_fname = 'spl/u-boot-spl'
+
+def GetDefaultFilename(self):
+return 'spl/u-boot-spl.bin'
diff --git a/tools/binman/etype/x86_start16_spl.py
b/tools/binman/etype/x86_start16_spl.py
new file mode 100644
index 000..3679a43
--- /dev/null
+++ b/tools/binman/etype/x86_start16_spl.py
@@ -0,0 +1,17 @@
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for the 16-bit x86 start-up code for U-Boot SPL
+#
+
+from entry import Entry
+from blob import Entry_blob
+
+class Entry_x86_start16_spl(Entry_blob):
+def __init__(self, image, etype, node):
+Entry_blob.__init__(self, image, etype, node)
+
+def GetDefaultFilename(self):
+return 'spl/u-boot-x86-16bit-spl.bin'
diff --git a/tools/binman/func_test.py b/tools/binman/func_test.py
index e36d7bd..3202947 100644
--- a/tools/binman/func_test.py
+++ b/tools/binman/func_test.py
@@ -686,7 +686,78 @@ class TestFunctional(unittest.TestCase):
self.assertEqual('nodtb with microcode' + pos_and_size +
' somewhere in here', first)
+def testPackUbootSingleMicrocode(self):
+"""Test that x86 microcode can be handled correctly with fdt_normal.
+"""
+self._RunPackUbootSingleMicrocode(False)
+
+def t
[U-Boot] [PATCH v3 07/10] binman: Allow configuration options to be used in .dts files
It is sometimes useful to be able to reference configuration options in a device tree source file. Add the necessary includes so that this works. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None scripts/Makefile.lib | 5 + 1 file changed, 5 insertions(+) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 2b31b1a..2539ba5 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -168,6 +168,11 @@ ld_flags = $(LDFLAGS) $(ldflags-y) dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc\ -I$(srctree)/arch/$(ARCH)/dts \ -I$(srctree)/arch/$(ARCH)/dts/include \ +-Iinclude \ +-I$(srctree)/include\ +-I$(srctree)/arch/$(ARCH)/include \ +-include $(srctree)/include/linux/kconfig.h \ +-D__ASSEMBLY__ \ -undef -D__DTS__ # Finds the multi-part object the current object will be linked into -- 2.8.0.rc3.226.g39d4020 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 06/10] binman: Add a build rule for binman
Add a standard command definition for binman so that it can be used in makefiles. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None Makefile | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Makefile b/Makefile index b5c9421..a5428a2 100644 --- a/Makefile +++ b/Makefile @@ -889,6 +889,12 @@ u-boot.ldr:u-boot $(LDR) -T $(CONFIG_CPU) -c $@ $< $(LDR_FLAGS) $(BOARD_SIZE_CHECK) +# binman +# --- +quiet_cmd_binman = BINMAN $@ +cmd_binman = $(srctree)/tools/binman/binman -d u-boot.dtb -O . \ + -I . -I $(srctree)/board/$(BOARDDIR) $< + OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex OBJCOPYFLAGS_u-boot.ldr.srec := -I binary -O srec -- 2.8.0.rc3.226.g39d4020 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 02/10] binman: Add basic entry types for U-Boot
Add entries to support some standard U-Boot binaries, such as u-boot.bin,
u-boot.dtb, etc. Also add some tests for these.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
tools/binman/entry_test.py | 27 +
tools/binman/etype/_testing.py | 26 +
tools/binman/etype/blob.py | 37 ++
tools/binman/etype/u_boot.py | 17 +
tools/binman/etype/u_boot_dtb.py | 17 +
tools/binman/etype/u_boot_nodtb.py | 17 +
tools/binman/etype/u_boot_spl.py | 17 +
tools/binman/func_test.py | 542 +
tools/binman/test/01_invalid.dts | 5 +
tools/binman/test/02_missing_node.dts | 6 +
tools/binman/test/03_empty.dts | 9 +
tools/binman/test/04_invalid_entry.dts | 11 +
tools/binman/test/05_simple.dts| 11 +
tools/binman/test/06_dual_image.dts| 22 +
tools/binman/test/07_bad_align.dts | 12 +
tools/binman/test/08_pack.dts | 30 ++
tools/binman/test/09_pack_extra.dts| 35 ++
tools/binman/test/10_pack_align_power2.dts | 12 +
tools/binman/test/11_pack_align_size_power2.dts| 12 +
tools/binman/test/12_pack_inv_align.dts| 13 +
tools/binman/test/13_pack_inv_size_align.dts | 13 +
tools/binman/test/14_pack_overlap.dts | 16 +
tools/binman/test/15_pack_overflow.dts | 12 +
tools/binman/test/16_pack_image_overflow.dts | 13 +
tools/binman/test/17_pack_image_size.dts | 13 +
tools/binman/test/18_pack_image_align.dts | 13 +
tools/binman/test/19_pack_inv_image_align.dts | 14 +
.../binman/test/20_pack_inv_image_align_power2.dts | 13 +
tools/binman/test/21_image_pad.dts | 16 +
tools/binman/test/22_image_name.dts| 21 +
tools/binman/test/23_blob.dts | 12 +
tools/binman/test/24_sorted.dts| 17 +
tools/binman/test/25_pack_zero_size.dts| 15 +
tools/binman/test/26_pack_u_boot_dtb.dts | 14 +
34 files changed, 1080 insertions(+)
create mode 100644 tools/binman/entry_test.py
create mode 100644 tools/binman/etype/_testing.py
create mode 100644 tools/binman/etype/blob.py
create mode 100644 tools/binman/etype/u_boot.py
create mode 100644 tools/binman/etype/u_boot_dtb.py
create mode 100644 tools/binman/etype/u_boot_nodtb.py
create mode 100644 tools/binman/etype/u_boot_spl.py
create mode 100644 tools/binman/func_test.py
create mode 100644 tools/binman/test/01_invalid.dts
create mode 100644 tools/binman/test/02_missing_node.dts
create mode 100644 tools/binman/test/03_empty.dts
create mode 100644 tools/binman/test/04_invalid_entry.dts
create mode 100644 tools/binman/test/05_simple.dts
create mode 100644 tools/binman/test/06_dual_image.dts
create mode 100644 tools/binman/test/07_bad_align.dts
create mode 100644 tools/binman/test/08_pack.dts
create mode 100644 tools/binman/test/09_pack_extra.dts
create mode 100644 tools/binman/test/10_pack_align_power2.dts
create mode 100644 tools/binman/test/11_pack_align_size_power2.dts
create mode 100644 tools/binman/test/12_pack_inv_align.dts
create mode 100644 tools/binman/test/13_pack_inv_size_align.dts
create mode 100644 tools/binman/test/14_pack_overlap.dts
create mode 100644 tools/binman/test/15_pack_overflow.dts
create mode 100644 tools/binman/test/16_pack_image_overflow.dts
create mode 100644 tools/binman/test/17_pack_image_size.dts
create mode 100644 tools/binman/test/18_pack_image_align.dts
create mode 100644 tools/binman/test/19_pack_inv_image_align.dts
create mode 100644 tools/binman/test/20_pack_inv_image_align_power2.dts
create mode 100644 tools/binman/test/21_image_pad.dts
create mode 100644 tools/binman/test/22_image_name.dts
create mode 100644 tools/binman/test/23_blob.dts
create mode 100644 tools/binman/test/24_sorted.dts
create mode 100644 tools/binman/test/25_pack_zero_size.dts
create mode 100644 tools/binman/test/26_pack_u_boot_dtb.dts
diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py
new file mode 100644
index 000..8a9ae01
--- /dev/null
+++ b/tools/binman/entry_test.py
@@ -0,0 +1,27 @@
+#
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Test for the Entry class
+
+import collections
+import unittest
+
+import entry
+
+class TestEntry(unittest.TestCase):
+def testEntryContents(self):
+"""Test the Entry bass class"""
+base_entry = entry.Entry(None, None, None, read_node=False)
+self.assertEqual(True, base_entry.ObtainContents())
+
+def testUnknownEntry(self):
+"""Test that unknown entry types are detected"""
+Node = collections.namedtuple('Node', ['name', 'path'])
+
[U-Boot] [PATCH v3 01/10] binman: Introduce binman, a tool for building binary images
This adds the basic code for binman, including command parsing, processing of entries and generation of images. So far no entry types are supported. These will be added in future commits as examples of how to add new types. See the README for documentation. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: - Add test for code coverage - drop the unused __len__() method - Fix the -b option tools/binman/.gitignore | 1 + tools/binman/README | 491 tools/binman/binman | 1 + tools/binman/binman.py | 116 +++ tools/binman/cmdline.py | 53 + tools/binman/control.py | 118 +++ tools/binman/etype/entry.py | 190 + tools/binman/fdt_test.py| 48 + tools/binman/image.py | 229 + 9 files changed, 1247 insertions(+) create mode 100644 tools/binman/.gitignore create mode 100644 tools/binman/README create mode 12 tools/binman/binman create mode 100755 tools/binman/binman.py create mode 100644 tools/binman/cmdline.py create mode 100644 tools/binman/control.py create mode 100644 tools/binman/etype/entry.py create mode 100644 tools/binman/fdt_test.py create mode 100644 tools/binman/image.py diff --git a/tools/binman/.gitignore b/tools/binman/.gitignore new file mode 100644 index 000..0d20b64 --- /dev/null +++ b/tools/binman/.gitignore @@ -0,0 +1 @@ +*.pyc diff --git a/tools/binman/README b/tools/binman/README new file mode 100644 index 000..c73fb3c --- /dev/null +++ b/tools/binman/README @@ -0,0 +1,491 @@ +# Copyright (c) 2016 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +Introduction + + +Firmware often consists of several components which must be packaged together. +For example, we may have SPL, U-Boot, a device tree and an environment area +grouped together and placed in MMC flash. When the system starts, it must be +able to find these pieces. + +So far U-Boot has not provided a way to handle creating such images in a +general way. Each SoC does what it needs to build an image, often packing or +concatenating images in the U-Boot build system. + +Binman aims to provide a mechanism for building images, from simple +SPL + U-Boot combinations, to more complex arrangements with many parts. + + +What it does + + +Binman reads your board's device tree and finds a node which describes the +required image layout. It uses this to work out what to place where. The +output file normally contains the device tree, so it is in principle possible +to read an image and extract its constituent parts. + + +Features + + +So far binman is pretty simple. It supports binary blobs, such as 'u-boot', +'spl' and 'fdt'. It supports empty entries (such as setting to 0xff). It can +place entries at a fixed location in the image, or fit them together with +suitable padding and alignment. It provides a way to process binaries before +they are included, by adding a Python plug-in. The device tree is available +to U-Boot at run-time so that the images can be interpreted. + +Binman does not yet update the device tree with the final location of +everything when it is done. A simple C structure could be generated for +constrained environments like SPL (using dtoc) but this is also not +implemented. + +Binman can also support incorporating filesystems in the image if required. +For example x86 platforms may use CBFS in some cases. + +Binman is intended for use with U-Boot but is designed to be general enough +to be useful in other image-packaging situations. + + +Motivation +-- + +Packaging of firmware is quite a different task from building the various +parts. In many cases the various binaries which go into the image come from +separate build systems. For example, ARM Trusted Firmware is used on ARMv8 +devices but is not built in the U-Boot tree. If a Linux kernel is included +in the firmware image, it is built elsewhere. + +It is of course possible to add more and more build rules to the U-Boot +build system to cover these cases. It can shell out to other Makefiles and +build scripts. But it seems better to create a clear divide between building +software and packaging it. + +At present this is handled by manual instructions, different for each board, +on how to create images that will boot. By turning these instructions into a +standard format, we can support making valid images for any board without +manual effort, lots of READMEs, etc. + +Benefits: +- Each binary can have its own build system and tool chain without creating +any dependencies between them +- Avoids the need for a single-shot build: individual parts can be updated +and brought in as needed +- Provides for a standard image description available in the build and at +run-time +- SoC-specific image-signing tools can be accomodated +- Avoids cluttering the U-Boot build system with image-building code +- The image description is automatical
[U-Boot] [PATCH v3 04/10] binman: Add support for u-boot.img as an input binary
Add an entry type for u-boot.img (a legacy U-Boot image) and a simple test.
Signed-off-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
tools/binman/etype/u_boot_img.py| 17 +
tools/binman/func_test.py | 5 +
tools/binman/test/36_u_boot_img.dts | 11 +++
3 files changed, 33 insertions(+)
create mode 100644 tools/binman/etype/u_boot_img.py
create mode 100644 tools/binman/test/36_u_boot_img.dts
diff --git a/tools/binman/etype/u_boot_img.py b/tools/binman/etype/u_boot_img.py
new file mode 100644
index 000..744f1b4
--- /dev/null
+++ b/tools/binman/etype/u_boot_img.py
@@ -0,0 +1,17 @@
+# Copyright (c) 2016 Google, Inc
+# Written by Simon Glass
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for U-Boot binary
+#
+
+from entry import Entry
+from blob import Entry_blob
+
+class Entry_u_boot_img(Entry_blob):
+def __init__(self, image, etype, node):
+Entry_blob.__init__(self, image, etype, node)
+
+def GetDefaultFilename(self):
+return 'u-boot.img'
diff --git a/tools/binman/func_test.py b/tools/binman/func_test.py
index a32f640..e36d7bd 100644
--- a/tools/binman/func_test.py
+++ b/tools/binman/func_test.py
@@ -685,3 +685,8 @@ class TestFunctional(unittest.TestCase):
first = data[:len(U_BOOT_NODTB_DATA)]
self.assertEqual('nodtb with microcode' + pos_and_size +
' somewhere in here', first)
+
+def testUBootImg(self):
+"""Test that u-boot.img can be put in a file"""
+data = self._DoReadFile('36_u_boot_img.dts')
+self.assertEqual(U_BOOT_IMG_DATA, data)
diff --git a/tools/binman/test/36_u_boot_img.dts
b/tools/binman/test/36_u_boot_img.dts
new file mode 100644
index 000..aa5a3fe
--- /dev/null
+++ b/tools/binman/test/36_u_boot_img.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ u-boot-img {
+ };
+ };
+};
--
2.8.0.rc3.226.g39d4020
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[U-Boot] [PATCH v3 00/10] binman: A tool for creating firmware images
This series introduces binman, a tool designed to create firmware images. It provides a way to bring together various binaries and place them in an image, at particular positions and with configurable alignment. Packaging of firmware is quite a different task from building the various parts. In many cases the various binaries which go into the image come from separate build systems. For example, ARM Trusted Firmware is used on ARMv8 devices but is not built in the U-Boot tree. If a Linux kernel is included in the firmware image, it is built elsewhere. It is of course possible to add more and more build rules to the U-Boot build system to cover these cases. It can shell out to other Makefiles and build scripts. But it seems better to create a clear divide between building software and packaging it. U-Boot supports a very large number of boards. Many of these have their own specific rules for how an image should be put together so that it boots correctly. At present these rules are described by manual instructions, different for each board. By turning these instructions into a standard format, we can support making valid images for any board without manual effort, lots of READMEs, etc. Images consist of a number of entries which are combined to make up the final image. The image is described in the device tree for the board, meaning that it can be accessed at run-time if desired. Binman is an extensible tool. A set of standard entries is provides, but new entries can be created fairly easily. Entries can be as simple as providing the name of a file to include. They can also handle more complex requirements, such as adjusting the input file or reading header information from one entry to control the position of another. U-Boot's mkimage builds FIT images and various other binaries. Binman augments this by allowing these binaries to be packed together. While FIT should be used where possible, it cannot be used everywhere. For example, many devices require executable code at a particular offset in the image. X86 machines require lots of binary blobs at particular places, and a microcode collection easily accessible at boot. So far binman has enough functionality to be useful, but apart from a few RFC patches, no attempt is made to switch boards over to use it. There should be enough material to permit review and comments. The series is available at u-boot-dm/binman-working Future work and missing features are documented in the README. Changes in v3: - Add a new patch to automatically include a U-Boot .dtsi file - Use a -u-boot.dtsi file for the binman changes - Put the binman definition in u-boot.dtsi Changes in v2: - Add test for code coverage - drop the unused __len__() method - Fix the -b option - Add automated test coverage - Various changes and improvements based on using this tool for a while - Put the binman definition in a common file for x86 Simon Glass (10): binman: Introduce binman, a tool for building binary images binman: Add basic entry types for U-Boot binman: Add support for building x86 ROMs binman: Add support for u-boot.img as an input binary binman: Add support for building x86 ROMs with SPL binman: Add a build rule for binman binman: Allow configuration options to be used in .dts files binman: Automatically include a U-Boot .dtsi file RFC: Use binman for a sunxi board RFC: Use binman for an x86 board Makefile | 55 +- arch/arm/dts/sun7i-a20-pcduino3-u-boot.dtsi| 14 + arch/x86/dts/u-boot.dtsi | 62 ++ scripts/Makefile.lib | 20 +- tools/binman/.gitignore| 1 + tools/binman/README| 491 + tools/binman/binman| 1 + tools/binman/binman.py | 116 tools/binman/cmdline.py| 53 ++ tools/binman/control.py| 118 tools/binman/entry_test.py | 27 + tools/binman/etype/_testing.py | 26 + tools/binman/etype/blob.py | 37 + tools/binman/etype/entry.py| 190 + tools/binman/etype/intel_descriptor.py | 55 ++ tools/binman/etype/intel_me.py | 17 + tools/binman/etype/intel_mrc.py| 17 + tools/binman/etype/intel_vga.py| 17 + tools/binman/etype/u_boot.py | 17 + tools/binman/etype/u_boot_dtb.py | 17 + tools/binman/etype/u_boot_dtb_with_ucode.py| 72 ++ tools/binman/etype/u_boot_img.py | 17 + tools/binman/etype/u_boot_nodtb.py | 17 + tools/binman/etype/u_boot_spl.py | 17 + tools/binman/etype/u_boot_spl_bss_pad.py | 26 + tools/binman/etype/u_boot_spl_with_ucode_ptr.py| 28 +
[U-Boot] [PATCH v2] cmd: cros_ec: Move crosec commands to cmd subdirectory
Move crosec commands from drivers/misc/cros_ec.c to
cmd/cros_ec.c
Acked-by: Simon Glass
Signed-off-by: Moritz Fischer
Cc: Simon Glass
Cc: Heiko Schocher
Cc: Bin Meng
Cc: Miao Yan
Cc: Masahiro Yamada
Cc: Stefan Roese
Cc: Przemyslaw Marczak
Cc: Maxime Ripard
Cc: Nishanth Menon
Cc: u-boot@lists.denx.de
---
Changes from v1:
- Default to build CMD_CROS_EC in when CROS_EC is activated
- Get rid of leftover const ec_current_image_name[] artifact from
moving stuff to separate file
- Added Simon's Acked-By:
---
cmd/Kconfig| 13 ++
cmd/Makefile | 1 +
cmd/cros_ec.c | 366 +
drivers/misc/cros_ec.c | 351 ---
include/cros_ec.h | 11 ++
5 files changed, 391 insertions(+), 351 deletions(-)
create mode 100644 cmd/cros_ec.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 86554ea..e339d86 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -677,6 +677,19 @@ config CMD_TPM_TEST
endmenu
+menu "Firmware commands"
+config CMD_CROS_EC
+ bool "Enable crosec command"
+ depends on CROS_EC
+ default y
+ help
+ Enable command-line access to the Chrome OS EC (Embedded
+ Controller). This provides the 'crosec' command which has
+ a number of sub-commands for performing EC tasks such as
+ updating its flash, accessing a small saved context area
+ and talking to the I2C bus behind the EC (if there is one).
+endmenu
+
menu "Filesystem commands"
config CMD_EXT2
bool "ext2 command support"
diff --git a/cmd/Makefile b/cmd/Makefile
index 81b98ee..9c9a9d1 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -128,6 +128,7 @@ obj-$(CONFIG_CMD_TRACE) += trace.o
obj-$(CONFIG_HUSH_PARSER) += test.o
obj-$(CONFIG_CMD_TPM) += tpm.o
obj-$(CONFIG_CMD_TPM_TEST) += tpm_test.o
+obj-$(CONFIG_CMD_CROS_EC) += cros_ec.o
obj-$(CONFIG_CMD_TSI148) += tsi148.o
obj-$(CONFIG_CMD_UBI) += ubi.o
obj-$(CONFIG_CMD_UBIFS) += ubifs.o
diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c
new file mode 100644
index 000..543dd28
--- /dev/null
+++ b/cmd/cros_ec.c
@@ -0,0 +1,366 @@
+/*
+ * Chromium OS cros_ec driver
+ *
+ * Copyright (c) 2016 The Chromium OS Authors.
+ * Copyright (c) 2016 National Instruments Corp
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Note: depends on enum ec_current_image */
+static const char * const ec_current_image_name[] = {"unknown", "RO", "RW"};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * Perform a flash read or write command
+ *
+ * @param dev CROS-EC device to read/write
+ * @param is_write 1 do to a write, 0 to do a read
+ * @param argc Number of arguments
+ * @param argv Arguments (2 is region, 3 is address)
+ * @return 0 for ok, 1 for a usage error or -ve for ec command error
+ * (negative EC_RES_...)
+ */
+static int do_read_write(struct cros_ec_dev *dev, int is_write, int argc,
+char * const argv[])
+{
+ uint32_t offset, size = -1U, region_size;
+ unsigned long addr;
+ char *endp;
+ int region;
+ int ret;
+
+ region = cros_ec_decode_region(argc - 2, argv + 2);
+ if (region == -1)
+ return 1;
+ if (argc < 4)
+ return 1;
+ addr = simple_strtoul(argv[3], &endp, 16);
+ if (*argv[3] == 0 || *endp != 0)
+ return 1;
+ if (argc > 4) {
+ size = simple_strtoul(argv[4], &endp, 16);
+ if (*argv[4] == 0 || *endp != 0)
+ return 1;
+ }
+
+ ret = cros_ec_flash_offset(dev, region, &offset, ®ion_size);
+ if (ret) {
+ debug("%s: Could not read region info\n", __func__);
+ return ret;
+ }
+ if (size == -1U)
+ size = region_size;
+
+ ret = is_write ?
+ cros_ec_flash_write(dev, (uint8_t *)addr, offset, size) :
+ cros_ec_flash_read(dev, (uint8_t *)addr, offset, size);
+ if (ret) {
+ debug("%s: Could not %s region\n", __func__,
+ is_write ? "write" : "read");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
+{
+ struct cros_ec_dev *dev;
+ struct udevice *udev;
+ const char *cmd;
+ int ret = 0;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ cmd = argv[1];
+ if (0 == strcmp("init", cmd)) {
+ /* Remove any existing device */
+ ret = uclass_find_device(UCLASS_CROS_EC, 0, &udev);
+ if (!ret)
+ device_remove(udev);
+ ret = uclass_get_device(UCLASS_CROS_EC, 0, &udev);
+ if (ret) {
+ printf("Could not init cros_ec device (err %d)\n", ret);
+ return
Re: [U-Boot] [PATCH v2 1/2] tools: buildmand: Remove duplicated code
Oops. Please fix the subject when merging. It should read "buildman" instead of "buildmand". York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 5/8] arm: Move FSL_HAS_DP_DDR and NUM_DDR_CONTROLLERS to Kconfig
Move this option to Kconfig and clean up existing uses.
NUM_DDR_CONTROLLERS is also used by PowerPC SoCs.
Signed-off-by: York Sun
Reviewed-by: Simon Glass
---
Changes in v2: None
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8
arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 ---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index aa412ec..f683a14 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -45,6 +45,11 @@ config MAX_CPUS
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
+config NUM_DDR_CONTROLLERS
+ int "Maximum DDR controllers"
+ default 3 if ARCH_LS2080A
+ default 1
+
config SYS_FSL_IFC_BANK_COUNT
int "Maximum banks of Integrated flash controller"
depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
@@ -52,4 +57,7 @@ config SYS_FSL_IFC_BANK_COUNT
default 4 if ARCH_LS1046A
default 8 if ARCH_LS2080A
+config SYS_FSL_HAS_DP_DDR
+ bool
+
endmenu
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 2f10ab7..6ee75cb 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -30,8 +30,6 @@
#define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */
#ifdef CONFIG_LS2080A
-#define CONFIG_NUM_DDR_CONTROLLERS 3
-#define CONFIG_SYS_FSL_HAS_DP_DDR /* Runtime check to confirm */
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 }
#defineSRDS_MAX_LANES 8
#define CONFIG_SYS_FSL_SRDS_1
@@ -150,7 +148,6 @@
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#elif defined(CONFIG_FSL_LSCH2)
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_FSL_SEC_COMPAT 5
#define CONFIG_SYS_FSL_OCRAM_BASE 0x1000 /* initial RAM */
#define CONFIG_SYS_FSL_OCRAM_SIZE 0x0020 /* 2M */
--
2.7.4
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[U-Boot] [PATCH v2 4/8] arm: Move SYS_FSL_IFC_BANK_COUNT to Kconfig
Move this option to Kconfig and clean up existing uses.
This option is also used by PowerPC SoCs.
Signed-off-by: York Sun
Reviewed-by: Simon Glass
---
Changes in v2: None
arch/arm/cpu/armv7/ls102xa/Kconfig| 5 +
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 +++
arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 ---
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index e8264f5..88983f4 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -23,4 +23,9 @@ config MAX_CPUS
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"
+config SYS_FSL_IFC_BANK_COUNT
+ int "Maximum banks of Integrated flash controller"
+ depends on ARCH_LS1021A
+ default 8
+
endmenu
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 6d87fd8..aa412ec 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -45,4 +45,11 @@ config MAX_CPUS
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
+config SYS_FSL_IFC_BANK_COUNT
+ int "Maximum banks of Integrated flash controller"
+ depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
+ default 4 if ARCH_LS1043A
+ default 4 if ARCH_LS1046A
+ default 8 if ARCH_LS2080A
+
endmenu
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 572fa94..2f10ab7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -30,7 +30,6 @@
#define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */
#ifdef CONFIG_LS2080A
-#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CONFIG_NUM_DDR_CONTROLLERS 3
#define CONFIG_SYS_FSL_HAS_DP_DDR /* Runtime check to confirm */
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 }
@@ -174,7 +173,6 @@
#define CONFIG_SYS_NUM_FMAN1
#define CONFIG_SYS_NUM_FM1_DTSEC 7
#define CONFIG_SYS_NUM_FM1_10GEC 1
-#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_FSL_DDR_BE
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
@@ -213,7 +211,6 @@
#define CONFIG_SYS_NUM_FMAN1
#define CONFIG_SYS_NUM_FM1_DTSEC 8
#define CONFIG_SYS_NUM_FM1_10GEC 2
-#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_FSL_DDR_BE
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
--
2.7.4
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[U-Boot] [PATCH v2 3/8] arm: Move MAX_CPUS to Kconfig
Move MAX_CPUS option to Kconfig and clean up existing uses for ARM. This option is used by Freescale Layerscape SoCs. Signed-off-by: York Sun Reviewed-by: Simon Glass --- Changes in v2: None arch/arm/cpu/armv7/ls102xa/Kconfig| 11 +++ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 13 + arch/arm/include/asm/arch-fsl-layerscape/config.h | 4 arch/arm/include/asm/arch-ls102xa/config.h| 1 - 4 files changed, 24 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 2648416..e8264f5 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -9,6 +9,17 @@ config LS1_DEEP_SLEEP bool "Deep sleep" depends on ARCH_LS1021A +config MAX_CPUS + int "Maximum number of CPUs permitted for LS102xA" + depends on ARCH_LS1021A + default 2 + help + Set this number to the maximum number of possible CPUs in the SoC. + SoCs may have multiple clusters with each cluster may have multiple + ports. If some ports are reserved but higher ports are used for + cores, count the reserved ports. This will allocate enough memory + in spin table to properly handle all cores. + config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5619e0d..6d87fd8 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -32,4 +32,17 @@ config SYS_FSL_MMDC config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" +config MAX_CPUS + int "Maximum number of CPUs permitted for Layerscape" + default 4 if ARCH_LS1043A + default 4 if ARCH_LS1046A + default 16 if ARCH_LS2080A + default 1 + help + Set this number to the maximum number of possible CPUs in the SoC. + SoCs may have multiple clusters with each cluster may have multiple + ports. If some ports are reserved but higher ports are used for + cores, count the reserved ports. This will allocate enough memory + in spin table to properly handle all cores. + endmenu diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index a5c6c4c..572fa94 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */ #ifdef CONFIG_LS2080A -#define CONFIG_MAX_CPUS16 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_NUM_DDR_CONTROLLERS 3 #define CONFIG_SYS_FSL_HAS_DP_DDR /* Runtime check to confirm */ @@ -171,7 +170,6 @@ /* SoC related */ #ifdef CONFIG_LS1043A -#define CONFIG_MAX_CPUS4 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 7 @@ -206,13 +204,11 @@ #define CONFIG_SYS_FSL_ERRATUM_A009660 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #elif defined(CONFIG_ARCH_LS1012A) -#define CONFIG_MAX_CPUS 1 #undef CONFIG_SYS_FSL_DDRC_ARM_GEN3 #define GICD_BASE 0x01401000 #define GICC_BASE 0x01402000 #elif defined(CONFIG_ARCH_LS1046A) -#define CONFIG_MAX_CPUS4 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index fab8774..70cc703 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -123,7 +123,6 @@ #define CONFIG_SYS_FSL_SRDS_1 #ifdef CONFIG_LS102XA -#define CONFIG_MAX_CPUS2 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] tools: buildman: Add compiler wrapper
Now we can use compiler wrapper such as ccache or distcc for buildman.
Signed-off-by: York Sun
CC: Simon Glass
Acked-by: Simon Glass
---
Changes in v2:
Move preparing variable wrapper to GetWrapper()
tools/buildman/README | 9 +
tools/buildman/toolchain.py | 18 --
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/tools/buildman/README b/tools/buildman/README
index 8c5f861..514bebc 100644
--- a/tools/buildman/README
+++ b/tools/buildman/README
@@ -211,6 +211,15 @@ arm: arm-none-eabi-
and buildman will find arm-none-eabi-gcc in /usr/bin if you have it installed.
+[toolchain-wrapper]
+wrapper: ccache
+
+This tells buildman to use a compiler wrapper in front of CROSS_COMPILE. In
+this example, ccache. It doesn't affect the toolchain scan. The wrapper is
+added when CROSS_COMPILE environtal variable is set. The name in this
+section is ignored. If more than one line is provided, only the last one
+is taken.
+
3. Make sure you have the require Python pre-requisites
Buildman uses multiprocessing, Queue, shutil, StringIO, ConfigParser and
diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py
index 41e4e4c..4778876 100644
--- a/tools/buildman/toolchain.py
+++ b/tools/buildman/toolchain.py
@@ -127,6 +127,18 @@ class Toolchain:
return PRIORITY_CALC + prio
return PRIORITY_CALC + prio
+def GetWrapper(self, show_warning=True):
+"""Get toolchain wrapper from the setting file.
+"""
+ value = ''
+ for name, value in bsettings.GetItems('toolchain-wrapper'):
+if not value:
+print "Warning: Wrapper not found"
+if value:
+value = value + ' '
+
+return value
+
def MakeEnvironment(self, full_path):
"""Returns an environment for using the toolchain.
@@ -138,10 +150,12 @@ class Toolchain:
PATH
"""
env = dict(os.environ)
+wrapper = self.GetWrapper()
+
if full_path:
-env['CROSS_COMPILE'] = os.path.join(self.path, self.cross)
+env['CROSS_COMPILE'] = wrapper + os.path.join(self.path,
self.cross)
else:
-env['CROSS_COMPILE'] = self.cross
+env['CROSS_COMPILE'] = wrapper + self.cross
env['PATH'] = self.path + ':' + env['PATH']
return env
--
2.7.4
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[U-Boot] [PATCH v2 1/2] tools: buildmand: Remove duplicated code
Signed-off-by: York Sun
CC: Simon Glass
Acked-by: Simon Glass
---
Changes in v2: None
tools/buildman/builderthread.py | 4
1 file changed, 4 deletions(-)
diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py
index c512d3b..16e87f3 100644
--- a/tools/buildman/builderthread.py
+++ b/tools/buildman/builderthread.py
@@ -304,10 +304,6 @@ class BuilderThread(threading.Thread):
print >>fd, 'arch', result.toolchain.arch
fd.write('%s' % result.return_code)
-with open(os.path.join(build_dir, 'toolchain'), 'w') as fd:
-print >>fd, 'gcc', result.toolchain.gcc
-print >>fd, 'path', result.toolchain.path
-
# Write out the image and function size information and an objdump
env = result.toolchain.MakeEnvironment(self.builder.full_path)
lines = []
--
2.7.4
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[U-Boot] [PATCH v2 2/8] arm: Move FSL_LSCH2 FSL_LSCH3 to Kconfig
Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by: York Sun Reviewed-by: Simon Glass --- Changes in v2: None arch/arm/Kconfig | 4 arch/arm/cpu/armv7/ls102xa/Kconfig| 8 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 15 +++ include/configs/ls1012a_common.h | 1 - include/configs/ls1043a_common.h | 1 - include/configs/ls1046a_common.h | 1 - include/configs/ls2080a_common.h | 1 - scripts/config_whitelist.txt | 2 -- 8 files changed, 27 insertions(+), 6 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f55d5b2..802d385 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -652,6 +652,7 @@ config TARGET_VEXPRESS64_JUNO config TARGET_LS2080A_EMU bool "Support ls2080a_emu" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY help @@ -662,6 +663,7 @@ config TARGET_LS2080A_EMU config TARGET_LS2080A_SIMU bool "Support ls2080a_simu" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY help @@ -672,6 +674,7 @@ config TARGET_LS2080A_SIMU config TARGET_LS2080AQDS bool "Support ls2080aqds" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY select SUPPORT_SPL @@ -683,6 +686,7 @@ config TARGET_LS2080AQDS config TARGET_LS2080ARDB bool "Support ls2080ardb" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY select SUPPORT_SPL diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index f0e7ae9..2648416 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -2,6 +2,14 @@ config ARCH_LS1021A bool select SYS_FSL_ERRATUM_A010315 +menu "LS102xA architecture" + depends on ARCH_LS1021A + config LS1_DEEP_SLEEP bool "Deep sleep" depends on ARCH_LS1021A + +config SYS_FSL_ERRATUM_A010315 + bool "Workaround for PCIe erratum A010315" + +endmenu diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 045261f..5619e0d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,20 +1,35 @@ config ARCH_LS1012A bool + select FSL_LSCH2 select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 config ARCH_LS1043A bool + select FSL_LSCH2 select SYS_FSL_ERRATUM_A010315 config ARCH_LS1046A bool + select FSL_LSCH2 config ARCH_LS2080A bool + select FSL_LSCH3 + +config FSL_LSCH2 + bool + +config FSL_LSCH3 + bool + +menu "Layerscape architecture" + depends on FSL_LSCH2 || FSL_LSCH3 config SYS_FSL_MMDC bool config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" + +endmenu diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 5fb6c47..1056755 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -8,7 +8,6 @@ #define __LS1012A_COMMON_H #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH2 #define CONFIG_GICV2 #defineCONFIG_SYS_HAS_SERDES diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index ed0e434..ac86c08 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -9,7 +9,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH2 #define CONFIG_LS1043A #define CONFIG_MP #define CONFIG_SYS_FSL_CLK diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 7c5e635..ec6c908 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -9,7 +9,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH2 #define CONFIG_MP #define CONFIG_SYS_FSL_CLK #define CONFIG_GICV2 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 42d0298..d9eea09 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -9,7 +9,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH3 #define CONFIG_MP #define CONFIG_GICV3 #define CONFIG_FSL_TZPC_BP147 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index efa95f0..d717103 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1299,8 +1299,6 @@ CONFIG_FSL_LAW CONFIG_FSL_LAYERSCAPE CONFIG_FSL_LBC CONFIG_FSL_LINFLEXUART -CONFIG_FSL_LSCH2 -CONFIG_FSL_LSCH3 CONFIG_FSL_LS_PPA CONFIG_FSL_MC9SDZ60 CONFIG_FSL_MC_ENET -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/8] arm: Fix Kconfig for proper display menu
Some config options should not have prompt. They are selected by choosing target. Signed-off-by: York Sun Reviewed-by: Simon Glass --- Changes in v2: None arch/arm/cpu/armv7/ls102xa/Kconfig| 5 +++-- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 11 +++ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 920eb4a..f0e7ae9 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,6 +1,7 @@ config ARCH_LS1021A - bool "Freescale Layerscape LS1021A SoC" + bool select SYS_FSL_ERRATUM_A010315 config LS1_DEEP_SLEEP - bool "Freescale Layerscape 1 deep sleep" + bool "Deep sleep" + depends on ARCH_LS1021A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index f8057ba..045261f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,17 +1,20 @@ config ARCH_LS1012A - bool "Freescale Layerscape LS1012A SoC" + bool select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 config ARCH_LS1043A - bool "Freescale Layerscape LS1043A SoC" + bool select SYS_FSL_ERRATUM_A010315 config ARCH_LS1046A - bool "Freescale Layerscape LS1046A SoC" + bool + +config ARCH_LS2080A + bool config SYS_FSL_MMDC - bool "Freescale Multi Mode DDR Controller" + bool config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/21] imx6: Add Engicam i.CoreM6 QDL support
Hi Stefano, On Tue, Oct 4, 2016 at 10:51 PM, Stefano Babic wrote: > Hi Jagan, > > On 04/10/2016 15:43, Jagan Teki wrote: >> On Tue, Oct 4, 2016 at 6:58 PM, Stefano Babic wrote: >>> Hi Jagan, >>> >>> On 30/09/2016 08:44, Jagan Teki wrote: >>> Can you pick this series. >>> >>> Series cannot be applied: I see several issue. The series breaks for >>> different reason a lot of boards. I get 3 boards broken and 15 with >>> warnings. Here the resons: >>> >>> CONFIG_DEFAULT_FDT_FILE was moved to Kconfig, but without updating the >>> boards that have already defined. This generated a duplication, for >>> example : >>> >>> w+include/configs/mx53ard.h:84:0: warning: "CONFIG_DEFAULT_FDT_FILE" >>> redefined [enabled by default] >>> w+include/generated/autoconf.h:13:0: note: this is the location of the >>> previous definition >>>arm: + dms-ba16-1g >>> +In file included from include/config.h:5:0, >>> >>> You have to move at the same time all CONFIG_DEFAULT_FDT_FILE from the >>> board's config file to defconfig. >>> >>> I add at the same time build errors by compiling the new boards, for >>> example: >>> >>>arm: + imx6qdl_icore_mmc >>> +arch/arm/imx-common/cpu.c: At top level: >>> +arch/arm/cpu/armv7/built-in.o: In function `lldiv': >>> +include/div64.h:45: undefined reference to `__div64_32' >>> +arch/arm/cpu/armv7/built-in.o: In function `lpddr2_rl': >>> +arch/arm/cpu/armv7/mx6/ddr.c:943: undefined reference to `hang' >>> +arch/arm/cpu/armv7/built-in.o: In function `mx6_lpddr2_cfg': >>> +arch/arm/cpu/armv7/mx6/ddr.c:1175: undefined reference to `mdelay' >>> +arch/arm/cpu/armv7/built-in.o: In function `mx6_ddr3_cfg': >>> +arch/arm/cpu/armv7/mx6/ddr.c:1281: undefined reference to `hang' >>> +arch/arm/cpu/armv7/mx6/ddr.c:1480: undefined reference to `mdelay' >>> +arch/arm/cpu/armv7/built-in.o: In function `mx6_dram_cfg': >>> +arch/arm/cpu/armv7/mx6/ddr.c:1493: undefined reference to `hang' >>> >>> It looks strange, it is maybe due to the fact that I am rearranging the >>> order how I apply the patches because I see issues in other patchset. >>> But can you check it, please ? >> >> May be because of u-boot-imx/master is head, shall I try it on master >> instead of next? > > Please try with -master. Anyway, I have pushed my rearranged -next (just > the order was changed due to issues in other patchset), and I see the > same problems. Fixed the issue, where few of the configs from mx6_spl.h has removed and tend to use it on defconfig (Simon patches did that) So I re-synced and rebased all. Please find the v6 [PATCH v6 00/21] imx6: Add Engicam i.CoreM6 QDL support and try to apply fec_mxc dm conversion patches as well [PATCH v4 0/3] net: fec_mxc: Convert to DM thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 3/3] icorem6: Use CONFIG_DM_ETH support
From: Jagan Teki
Use CONFIG_DM_ETH and remove board_eth_init code
from board files.
Cc: Joe Hershberger
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 1 +
board/engicam/icorem6/icorem6.c | 71
configs/imx6qdl_icore_mmc_defconfig | 1 -
configs/imx6qdl_icore_nand_defconfig | 1 -
4 files changed, 1 insertion(+), 73 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 762a581..8456b0e 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -100,6 +100,7 @@ config TARGET_MX6Q_ICORE
select MX6QDL
select OF_CONTROL
select DM
+ select DM_ETH
select DM_GPIO
select DM_MMC
select DM_THERMAL
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index c152007..587775e 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -7,8 +7,6 @@
*/
#include
-#include
-#include
#include
#include
@@ -27,80 +25,11 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
-static iomux_v3_cfg_t const enet_pads[] = {
- IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL |
PAD_CTL_SRE_FAST)),
- IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-#ifdef CONFIG_FEC_MXC
-#define ENET_PHY_RST IMX_GPIO_NR(7, 12)
-static int setup_fec(void)
-{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
- s32 timeout = 10;
- u32 reg = 0;
- int ret;
-
- /* Enable fec clock */
- setbits_le32(&ccm->CCGR1, MXC_CCM_CCGR1_ENET_MASK);
-
- /* use 50MHz */
- ret = enable_fec_anatop_clock(0, ENET_50MHZ);
- if (ret)
- return ret;
-
- /* Enable PLLs */
- reg = readl(&anatop->pll_enet);
- reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN;
- writel(reg, &anatop->pll_enet);
- reg = readl(&anatop->pll_enet);
- reg |= BM_ANADIG_PLL_SYS_ENABLE;
- while (timeout--) {
- if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_SYS_LOCK)
- break;
- }
- if (timeout <= 0)
- return -EIO;
- reg &= ~BM_ANADIG_PLL_SYS_BYPASS;
- writel(reg, &anatop->pll_enet);
-
- /* reset the phy */
- gpio_direction_output(ENET_PHY_RST, 0);
- udelay(1);
- gpio_set_value(ENET_PHY_RST, 1);
-
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- int ret;
-
- SETUP_IOMUX_PADS(enet_pads);
- setup_fec();
-
- return ret = cpu_eth_init(bis);
-}
-#endif
-
#ifdef CONFIG_NAND_MXS
#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
diff --git a/configs/imx6qdl_icore_mmc_defconfig
b/configs/imx6qdl_icore_mmc_defconfig
index 221ea7e..fbcbdc8 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -28,7 +28,6 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_LIBFDT=y
CONFIG_FEC_MXC=y
CONFIG_MXC_UART=y
-CONFIG_NETDEVICES=y
CONFIG_IMX_THERMAL=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
diff --git a/configs/imx6qdl_icore_nand_defconfig
b/configs/imx6qdl_icore_nand_defconfig
index 8ac3099..4b544fc 100644
--- a/configs/imx6qdl_icore_nand_defconfig
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -24,7 +24,6 @@ CONFIG_OF_LIBFDT=y
CONFIG_FEC_MXC=y
CONFIG_MXC_UART=y
CONFIG_NAND_MXS=y
-CONFIG_NETDEVICES=y
CONFIG_IMX_THERMAL=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
--
2.7.4
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[U-Boot] [PATCH v4 1/3] net: fec_mxc: Convert into driver model
From: Jagan Teki
This patch add driver model support for fec_mxc driver.
Cc: Simon Glass
Cc: Joe Hershberger
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
drivers/net/fec_mxc.c | 273 +-
drivers/net/fec_mxc.h | 11 ++
2 files changed, 258 insertions(+), 26 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 8e3b839..a58ab19 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -9,6 +9,7 @@
*/
#include
+#include
#include
#include
#include
@@ -362,17 +363,32 @@ static void fec_rbd_clean(int last, struct fec_bd *pRbd)
writew(0, &pRbd->data_length);
}
+#ifdef CONFIG_DM_ETH
+static int fec_get_hwaddr(struct udevice *dev, int dev_id,
+ unsigned char *mac)
+#else
static int fec_get_hwaddr(struct eth_device *dev, int dev_id,
unsigned char *mac)
+#endif
{
imx_get_mac_from_fuse(dev_id, mac);
return !is_valid_ethaddr(mac);
}
+#ifdef CONFIG_DM_ETH
+static int fecmxc_set_hwaddr(struct udevice *dev)
+#else
static int fec_set_hwaddr(struct eth_device *dev)
+#endif
{
+#ifdef CONFIG_DM_ETH
+ struct fec_priv *fec = dev_get_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ uchar *mac = pdata->enetaddr;
+#else
uchar *mac = dev->enetaddr;
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
writel(0, &fec->eth->iaddr1);
writel(0, &fec->eth->iaddr2);
@@ -427,9 +443,17 @@ static void fec_reg_setup(struct fec_priv *fec)
* Start the FEC engine
* @param[in] dev Our device to handle
*/
+#ifdef CONFIG_DM_ETH
+static int fec_open(struct udevice *dev)
+#else
static int fec_open(struct eth_device *edev)
+#endif
{
+#ifdef CONFIG_DM_ETH
+ struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)edev->priv;
+#endif
int speed;
uint32_t addr, size;
int i;
@@ -535,14 +559,26 @@ static int fec_open(struct eth_device *edev)
return 0;
}
+#ifdef CONFIG_DM_ETH
+static int fecmxc_init(struct udevice *dev)
+#else
static int fec_init(struct eth_device *dev, bd_t* bd)
+#endif
{
+#ifdef CONFIG_DM_ETH
+ struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop;
int i;
/* Initialize MAC address */
+#ifdef CONFIG_DM_ETH
+ fecmxc_set_hwaddr(dev);
+#else
fec_set_hwaddr(dev);
+#endif
/*
* Setup transmit descriptors, there are two in total.
@@ -596,9 +632,17 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
* Halt the FEC engine
* @param[in] dev Our device to handle
*/
+#ifdef CONFIG_DM_ETH
+static void fecmxc_halt(struct udevice *dev)
+#else
static void fec_halt(struct eth_device *dev)
+#endif
{
+#ifdef CONFIG_DM_ETH
+ struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
int counter = 0x;
/*
@@ -638,7 +682,11 @@ static void fec_halt(struct eth_device *dev)
* @param[in] length Data count in bytes
* @return 0 on success
*/
+#ifdef CONFIG_DM_ETH
+static int fecmxc_send(struct udevice *dev, void *packet, int length)
+#else
static int fec_send(struct eth_device *dev, void *packet, int length)
+#endif
{
unsigned int status;
uint32_t size, end;
@@ -650,7 +698,11 @@ static int fec_send(struct eth_device *dev, void *packet,
int length)
* This routine transmits one frame. This routine only accepts
* 6-byte Ethernet addresses.
*/
+#ifdef CONFIG_DM_ETH
+ struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
/*
* Check for valid length of data.
@@ -783,9 +835,17 @@ out:
* @param[in] dev Our ethernet device to handle
* @return Length of packet read
*/
+#ifdef CONFIG_DM_ETH
+static int fecmxc_recv(struct udevice *dev, int flags, uchar **packetp)
+#else
static int fec_recv(struct eth_device *dev)
+#endif
{
+#ifdef CONFIG_DM_ETH
+ struct fec_priv *fec = dev_get_priv(dev);
+#else
struct fec_priv *fec = (struct fec_priv *)dev->priv;
+#endif
struct fec_bd *rbd = &fec->rbd_base[fec->rbd_index];
unsigned long ievent;
int frame_length, len = 0;
@@ -801,8 +861,13 @@ static int fec_recv(struct eth_device *dev)
writel(ievent, &fec->eth->ievent);
debug("fec_recv: ievent 0x%lx\n", ievent);
if (ievent & FEC_IEVENT_BABR) {
+#ifdef CONFIG_DM_ETH
+ fecmxc_halt(dev);
+ fecmxc_init(dev);
+#else
fec_halt(dev);
fec_init(dev, fec->bd);
+#endif
printf("some error: 0x%08lx\n", ievent);
[U-Boot] [PATCH v4 2/3] ARM: dts: imx6qdl-icore: Add FEC support
From: Jagan Teki
Add FEC dts support for Engicam i.CoreM6 dql modules.
Cc: Joe Hershberger
Cc: Stefano Babic
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6qdl-icore.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi
index f424cd5..a485c3e 100644
--- a/arch/arm/dts/imx6qdl-icore.dtsi
+++ b/arch/arm/dts/imx6qdl-icore.dtsi
@@ -75,6 +75,14 @@
assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
};
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ phy-mode = "rmii";
+ status = "okay";
+};
+
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
@@ -118,6 +126,22 @@
};
&iomuxc {
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK0x1b0b1
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
+ >;
+ };
+
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020
--
2.7.4
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[U-Boot] [PATCH v4 0/3] net: fec_mxc: Convert to DM
From: Jagan Teki This series convert fec_mxc to DM and tested both dm and non-dm code and it is on top of u-boot-imx/master Changes for v4: - rebase to u-boot-imx/master Changes for v3: - Add ARM: dts: imx6qdl-icore: Add FEC support - icorem6: Use CONFIG_DM_ETH support Changes for v2: - Add TODO for implementing the enet reset code Jagan Teki (3): net: fec_mxc: Convert into driver model ARM: dts: imx6qdl-icore: Add FEC support icorem6: Use CONFIG_DM_ETH support arch/arm/cpu/armv7/mx6/Kconfig | 1 + arch/arm/dts/imx6qdl-icore.dtsi | 24 +++ board/engicam/icorem6/icorem6.c | 71 - configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_nand_defconfig | 1 - drivers/net/fec_mxc.c| 273 +++ drivers/net/fec_mxc.h| 11 ++ 7 files changed, 283 insertions(+), 99 deletions(-) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 21/21] imx6: icorem6: Add default mtd nand partition table
From: Jagan Teki icorem6qdl> mtdparts device nand0 , # parts = 6 0: spl 0x0020 0x 0 1: uboot 0x0020 0x0020 0 2: env 0x0010 0x0040 0 3: kernel 0x0040 0x0050 0 4: dtb 0x0010 0x0090 0 5: rootfs 0x1f60 0x00a0 0 Cc: Stefano Babic Cc: Peng Fan Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- include/configs/imx6qdl_icore.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 6e33ec3..f8a1263 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -129,6 +129,8 @@ # define CONFIG_CMD_MTDPARTS # define CONFIG_MTD_PARTITIONS # define MTDIDS_DEFAULT"nand0=nand" +# define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl),2m(uboot)," \ + "1m(env),4m(kernel),1m(dtb),-(rootfs)" # define CONFIG_APBH_DMA # define CONFIG_APBH_DMA_BURST -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 20/21] imx6: icorem6: Enable MTD device support
From: Jagan Teki Enable MTD device, partition and command support. Cc: Stefano Babic Cc: Peng Fan Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- include/configs/imx6qdl_icore.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index cd3aa43..6e33ec3 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -124,6 +124,12 @@ # define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE # define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20 +/* MTD device */ +# define CONFIG_MTD_DEVICE +# define CONFIG_CMD_MTDPARTS +# define CONFIG_MTD_PARTITIONS +# define MTDIDS_DEFAULT"nand0=nand" + # define CONFIG_APBH_DMA # define CONFIG_APBH_DMA_BURST # define CONFIG_APBH_DMA_BURST8 -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 17/21] arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual
From: Jagan Teki
i.CoreM6 Quad/Dual modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU NXP i.MX6 DQ, 800MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
Power supply Single 5V
MAX LCD RES FULLHD
and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q
Cc: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/dts/Makefile| 3 ++-
arch/arm/dts/imx6q-icore.dts | 59
board/engicam/icorem6/README | 9 ++-
3 files changed, 69 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/dts/imx6q-icore.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 783352a8..0cf360f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -281,7 +281,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
pcm052.dtb
dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
- imx6dl-icore.dtb
+ imx6dl-icore.dtb \
+ imx6q-icore.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
diff --git a/arch/arm/dts/imx6q-icore.dts b/arch/arm/dts/imx6q-icore.dts
new file mode 100644
index 000..025f543
--- /dev/null
+++ b/arch/arm/dts/imx6q-icore.dts
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad/Dual Starter Kit";
+ compatible = "engicam,imx6-icore", "fsl,imx6q";
+};
+
+&can1 {
+ status = "okay";
+};
+
+&can2 {
+ status = "okay";
+};
diff --git a/board/engicam/icorem6/README b/board/engicam/icorem6/README
index c264a94..12d1e21 100644
--- a/board/engicam/icorem6/README
+++ b/board/engicam/icorem6/README
@@ -1,12 +1,19 @@
How to use U-Boot on Engicam i.CoreM6 DualLite/Solo and Quad/Dual Starter Kit:
-
-- Build U-Boot for Engicam i.CoreM6 QDL:
+- Configure U-Boot for Engicam i.CoreM6 QDL:
$ make mrproper
$ make icorem6qdl_mmc_defconfig
+
+- Build for i.CoreM6 DualLite/Solo
+
$ make
+- Build for i.CoreM6 Quad/Dual
+
+$ make DEVICE_TREE=imx6q-icore
+
This will generate the SPL image called SPL and the u-boot-dtb.img.
- Flash the SPL image into the micro SD card:
--
2.7.4
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[U-Boot] [PATCH v6 19/21] imx6: icorem6: Add NAND support
From: Jagan Teki
Add NAND support for Engicam i.CoreM6 qdl board.
Boot Log:
U-Boot SPL 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43)
Trying to boot from NAND
NAND : 512 MiB
U-Boot 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43 +0530)
CPU: Freescale i.MX6SOLO rev1.3 at 792MHz
CPU: Industrial temperature grade (-40C to 105C) at 55C
Reset cause: WDOG
Model: Engicam i.CoreM6 DualLite/Solo Starter Kit
DRAM: 256 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
In:serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
icorem6qdl>
Cc: Scott Wood
Cc: Stefano Babic
Cc: Peng Fan
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
board/engicam/icorem6/icorem6.c | 63
configs/imx6qdl_icore_nand_defconfig | 37 +
include/configs/imx6qdl_icore.h | 25 +-
3 files changed, 124 insertions(+), 1 deletion(-)
create mode 100644 configs/imx6qdl_icore_nand_defconfig
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index a370c8b..c152007 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -101,6 +101,66 @@ int board_eth_init(bd_t *bis)
}
#endif
+#ifdef CONFIG_NAND_MXS
+
+#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
+#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \
+ PAD_CTL_SRE_FAST)
+#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1)
+
+iomux_v3_cfg_t gpmi_pads[] = {
+ IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL0)),
+ IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+ IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07| MUX_PAD_CTRL(GPMI_PAD_CTRL2)),
+};
+
+static void setup_gpmi_nand(void)
+{
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ /* config gpmi nand iomux */
+ SETUP_IOMUX_PADS(gpmi_pads);
+
+ /* gate ENFC_CLK_ROOT clock first,before clk source switch */
+ clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
+
+ /* config gpmi and bch clock to 100 MHz */
+ clrsetbits_le32(&mxc_ccm->cs2cdr,
+ MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK |
+ MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK |
+ MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK,
+ MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
+ MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
+ MXC_CCM_CS2CDR_ENFC_CLK_SEL(3));
+
+ /* enable ENFC_CLK_ROOT clock */
+ setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
+
+ /* enable gpmi and bch clock gating */
+ setbits_le32(&mxc_ccm->CCGR4,
+MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
+MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK |
+MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK |
+MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
+MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET);
+
+ /* enable apbh clock gating */
+ setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
+}
+#endif
+
int board_early_init_f(void)
{
SETUP_IOMUX_PADS(uart4_pads);
@@ -113,6 +173,9 @@ int board_init(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+#ifdef CONFIG_NAND_MXS
+ setup_gpmi_nand();
+#endif
return 0;
}
diff --git a/configs/imx6qdl_icore_nand_defconfig
b/configs/imx6qdl_icore_nand_defconfig
new file mode 100644
index 000..8ac3099
--- /dev/null
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6Q_ICORE=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND"
+CONFIG_DEFAULT_FDT_FILE="imx6dl-icore.dtb"
+CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore"
+CONFIG_SYS_PROM
[U-Boot] [PATCH v6 18/21] mtd: nand: Kconfig: Add NAND_MXS entry
From: Jagan Teki Added kconfig for NAND_MXS driver. Cc: Scott Wood Cc: Simon Glass Cc: Fabio Estevam Cc: Stefano Babic Cc: Peng Fan Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- drivers/mtd/nand/Kconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 5ce7d6d..df154bf 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -80,6 +80,13 @@ config NAND_ARASAN controller. This uses the hardware ECC for read and write operations. +config NAND_MXS + bool "MXS NAND support" + depends on MX6 + help + This enables NAND driver for the NAND flash controller on the + MXS processors. + comment "Generic NAND options" # Enhance depends when converting drivers to Kconfig which use this config -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 15/21] arm: dts: Add devicetree for i.MX6Q
From: Jagan Teki
Add i.MX6Q dtsi support from Linux.
Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)
Cc: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6q.dtsi | 300
1 file changed, 300 insertions(+)
create mode 100644 arch/arm/dts/imx6q.dtsi
diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi
new file mode 100644
index 000..c30c836
--- /dev/null
+++ b/arch/arm/dts/imx6q.dtsi
@@ -0,0 +1,300 @@
+
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include "imx6q-pinfunc.h"
+#include "imx6qdl.dtsi"
+
+/ {
+ aliases {
+ ipu1 = &ipu2;
+ spi4 = &ecspi5;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ operating-points = <
+ /* kHzuV */
+ 120 1275000
+ 996000 125
+ 852000 125
+ 792000 1175000
+ 396000 975000
+ >;
+ fsl,soc-operating-points = <
+ /* ARM kHz SOC-PU uV */
+ 120 1275000
+ 996000 125
+ 852000 125
+ 792000 1175000
+ 396000 1175000
+ >;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clks IMX6QDL_CLK_ARM>,
+<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
+<&clks IMX6QDL_CLK_STEP>,
+<&clks IMX6QDL_CLK_PLL1_SW>,
+<&clks IMX6QDL_CLK_PLL1_SYS>;
+ clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+ arm-supply = <®_arm>;
+ pu-supply = <®_pu>;
+ soc-supply = <®_soc>;
+ };
+
+ cpu@1 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ reg = <1>;
+ next-level-cache = <&L2>;
+ };
+
+ cpu@2 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ reg = <2>;
+ next-level-cache = <&L2>;
+ };
+
+ cpu@3 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ reg = <3>;
+ next-level-cache = <&L2>;
+ };
+ };
+
+ soc {
+ ocram: sram@0090 {
+ compatible = "mmio-sram";
+ reg = <0x0090 0x4>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
+ aips-bus@0200 { /* AIPS1 */
+ spba-bus@0200 {
+ ecspi5: ecspi@02018000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ecspi",
"fsl,imx51-ecspi";
+ reg = <0x02018000 0x4000>;
+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6Q_CLK_ECSPI5>,
+<&clks IMX6Q_CLK_ECSPI5>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+ };
+
+ iomuxc: iomuxc@020e {
+ compatible = "fsl,imx6q-iomuxc";
+ };
+ };
+
+ sata: sata@0220 {
+ compatible = "fsl,imx6q-ahci";
+ reg = <0
[U-Boot] [PATCH v6 14/21] engicam: icorem6: Add DM_GPIO, DM_MMC support
From: Jagan Teki
Add DM_GPIO, DM_MMC support for u-boot and disable for SPL.
Cc: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 2 +
board/engicam/icorem6/icorem6.c | 142
include/configs/imx6qdl_icore.h | 4 ++
3 files changed, 78 insertions(+), 70 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index e2431a8..762a581 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -100,6 +100,8 @@ config TARGET_MX6Q_ICORE
select MX6QDL
select OF_CONTROL
select DM
+ select DM_GPIO
+ select DM_MMC
select DM_THERMAL
select SUPPORT_SPL
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index a23cb7e..a370c8b 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -7,8 +7,6 @@
*/
#include
-#include
-#include
#include
#include
@@ -29,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
- PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
@@ -55,70 +49,6 @@ static iomux_v3_cfg_t const enet_pads[] = {
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
};
-static iomux_v3_cfg_t const usdhc1_pads[] = {
- IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
-};
-
-#ifdef CONFIG_FSL_ESDHC
-#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1)
-
-struct fsl_esdhc_cfg usdhc_cfg[1] = {
- {USDHC1_BASE_ADDR, 0, 4},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC1_BASE_ADDR:
- ret = !gpio_get_value(USDHC1_CD_GPIO);
- break;
- }
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
- int i, ret;
-
- /*
- * According to the board_mmc_init() the following map is done:
- * (U-boot device node)(Physical Port)
- * mmc0 USDHC1
- */
- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
- switch (i) {
- case 0:
- SETUP_IOMUX_PADS(usdhc1_pads);
- gpio_direction_input(USDHC1_CD_GPIO);
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
- break;
- default:
- printf("Warning - USDHC%d controller not supporting\n",
- i + 1);
- return 0;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (ret) {
- printf("Warning: failed to initialize mmc dev %d\n", i);
- return ret;
- }
- }
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_FEC_MXC
#define ENET_PHY_RST IMX_GPIO_NR(7, 12)
static int setup_fec(void)
@@ -200,6 +130,78 @@ int dram_init(void)
#include
#include
+/* MMC board initialization is needed till adding DM support in SPL */
+#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
+#include
+#include
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
+ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
+ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+ IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
+};
+
+#define USDHC1_CD_GPIO IMX_GPIO_NR
[U-Boot] [PATCH v6 16/21] arm: dts: imx6q: Add pinctrl defines
From: Jagan Teki Add imx6q pinctrl defines support from Linux. Here is the last commit: "ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ" (sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2) Cc: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- arch/arm/dts/imx6q-pinfunc.h | 1047 ++ 1 file changed, 1047 insertions(+) create mode 100644 arch/arm/dts/imx6q-pinfunc.h diff --git a/arch/arm/dts/imx6q-pinfunc.h b/arch/arm/dts/imx6q-pinfunc.h new file mode 100644 index 000..9fc6120 --- /dev/null +++ b/arch/arm/dts/imx6q-pinfunc.h @@ -0,0 +1,1047 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __DTS_IMX6Q_PINFUNC_H +#define __DTS_IMX6Q_PINFUNC_H + +/* + * The pin function ID is a tuple of + * + */ +#define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0 +#define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0 +#define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0 +#define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0 +#define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0 +#define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0 +#define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0 +#define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0 +#define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0 +#define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0 +#define MX6QDL_PAD_SD2_DAT2__KEY_ROW6 0x050 0x364 0x8f8 0x4 0x0 +#define MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x050 0x364 0x000 0x5 0x0 +#define MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x054 0x368 0x000 0x0 0x0 +#define MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO0x054 0x368 0x82c 0x1 0x0 +#define MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x054 0x368 0x7b4 0x3 0x0 +#define MX6QDL_PAD_SD2_DAT0__KEY_ROW7 0x054 0x368 0x8fc 0x4 0x0 +#define MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x054 0x368 0x000 0x5 0x0 +#define MX6QDL_PAD_SD2_DAT0__DCIC2_OUT 0x054 0x368 0x000 0x6 0x0 +#define MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x058 0x36c 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x058 0x36c 0x000 0x1 0x0 +#define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x058 0x36c 0x918 0x2 0x0 +#define MX6QDL_PAD_RGMII_TXC__GPIO6_IO190x058 0x36c 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M 0x058 0x36c 0x000 0x7 0x0 +#define MX6QDL_PAD_RGMII_TD0__HSI_TX_READY 0x05c 0x370 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x05c 0x370 0x000 0x1 0x0 +#define MX6QDL_PAD_RGMII_TD0__GPIO6_IO200x05c 0x370 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG 0x060 0x374 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x060 0x374 0x000 0x1 0x0 +#define MX6QDL_PAD_RGMII_TD1__GPIO6_IO210x060 0x374 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA 0x064 0x378 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x064 0x378 0x000 0x1 0x0 +#define MX6QDL_PAD_RGMII_TD2__GPIO6_IO220x064 0x378 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE 0x068 0x37c 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x068 0x37c 0x000 0x1 0x0 +#define MX6QDL_PAD_RGMII_TD3__GPIO6_IO230x068 0x37c 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA0x06c 0x380 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x06c 0x380 0x858 0x1 0x0 +#define MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24 0x06c 0x380 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_RD0__HSI_RX_READY 0x070 0x384 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x070 0x384 0x848 0x1 0x0 +#define MX6QDL_PAD_RGMII_RD0__GPIO6_IO250x070 0x384 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x074 0x388 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x074 0x388 0x000 0x1 0x0 +#define MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x074 0x388 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK 0x074 0x388 0x83c 0x7 0x0 +#define MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG 0x078 0x38c 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x078 0x38c 0x84c 0x1 0x0 +#define MX6QDL_PAD_RGMII_RD1__GPIO6_IO270x078 0x38c 0x000 0x5 0x0 +#define MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA 0x07c 0x390 0x000 0x0 0x0 +#define MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x07c 0x390 0x850 0x1 0x0 +#
[U-Boot] [PATCH v6 13/21] imx6q: icorem6: Enable pinctrl driver
From: Jagan Teki Enable imx6 pinctrl driver support for i.CoreM6. Cc: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- configs/imx6qdl_icore_mmc_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6786daf..221ea7e 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -30,6 +30,8 @@ CONFIG_FEC_MXC=y CONFIG_MXC_UART=y CONFIG_NETDEVICES=y CONFIG_IMX_THERMAL=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 11/21] dt-bindings: clock: imx6qdl: Add clock defines
From: Jagan Teki Add imx6qdl clock header defines support from Linux. "clk: imx: Add clock support for imx6qp" (sha1: ee36027427c769b0b9e5e205fe43aced93d6aa66) Cc: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- include/dt-bindings/clock/imx6qdl-clock.h | 274 ++ 1 file changed, 274 insertions(+) create mode 100644 include/dt-bindings/clock/imx6qdl-clock.h diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h new file mode 100644 index 000..2905033 --- /dev/null +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -0,0 +1,274 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __DT_BINDINGS_CLOCK_IMX6QDL_H +#define __DT_BINDINGS_CLOCK_IMX6QDL_H + +#define IMX6QDL_CLK_DUMMY 0 +#define IMX6QDL_CLK_CKIL 1 +#define IMX6QDL_CLK_CKIH 2 +#define IMX6QDL_CLK_OSC3 +#define IMX6QDL_CLK_PLL2_PFD0_352M 4 +#define IMX6QDL_CLK_PLL2_PFD1_594M 5 +#define IMX6QDL_CLK_PLL2_PFD2_396M 6 +#define IMX6QDL_CLK_PLL3_PFD0_720M 7 +#define IMX6QDL_CLK_PLL3_PFD1_540M 8 +#define IMX6QDL_CLK_PLL3_PFD2_508M 9 +#define IMX6QDL_CLK_PLL3_PFD3_454M 10 +#define IMX6QDL_CLK_PLL2_198M 11 +#define IMX6QDL_CLK_PLL3_120M 12 +#define IMX6QDL_CLK_PLL3_80M 13 +#define IMX6QDL_CLK_PLL3_60M 14 +#define IMX6QDL_CLK_TWD15 +#define IMX6QDL_CLK_STEP 16 +#define IMX6QDL_CLK_PLL1_SW17 +#define IMX6QDL_CLK_PERIPH_PRE 18 +#define IMX6QDL_CLK_PERIPH2_PRE19 +#define IMX6QDL_CLK_PERIPH_CLK2_SEL20 +#define IMX6QDL_CLK_PERIPH2_CLK2_SEL 21 +#define IMX6QDL_CLK_AXI_SEL22 +#define IMX6QDL_CLK_ESAI_SEL 23 +#define IMX6QDL_CLK_ASRC_SEL 24 +#define IMX6QDL_CLK_SPDIF_SEL 25 +#define IMX6QDL_CLK_GPU2D_AXI 26 +#define IMX6QDL_CLK_GPU3D_AXI 27 +#define IMX6QDL_CLK_GPU2D_CORE_SEL 28 +#define IMX6QDL_CLK_GPU3D_CORE_SEL 29 +#define IMX6QDL_CLK_GPU3D_SHADER_SEL 30 +#define IMX6QDL_CLK_IPU1_SEL 31 +#define IMX6QDL_CLK_IPU2_SEL 32 +#define IMX6QDL_CLK_LDB_DI0_SEL33 +#define IMX6QDL_CLK_LDB_DI1_SEL34 +#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL 35 +#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL 36 +#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL 37 +#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL 38 +#define IMX6QDL_CLK_IPU1_DI0_SEL 39 +#define IMX6QDL_CLK_IPU1_DI1_SEL 40 +#define IMX6QDL_CLK_IPU2_DI0_SEL 41 +#define IMX6QDL_CLK_IPU2_DI1_SEL 42 +#define IMX6QDL_CLK_HSI_TX_SEL 43 +#define IMX6QDL_CLK_PCIE_AXI_SEL 44 +#define IMX6QDL_CLK_SSI1_SEL 45 +#define IMX6QDL_CLK_SSI2_SEL 46 +#define IMX6QDL_CLK_SSI3_SEL 47 +#define IMX6QDL_CLK_USDHC1_SEL 48 +#define IMX6QDL_CLK_USDHC2_SEL 49 +#define IMX6QDL_CLK_USDHC3_SEL 50 +#define IMX6QDL_CLK_USDHC4_SEL 51 +#define IMX6QDL_CLK_ENFC_SEL 52 +#define IMX6QDL_CLK_EIM_SEL53 +#define IMX6QDL_CLK_EIM_SLOW_SEL 54 +#define IMX6QDL_CLK_VDO_AXI_SEL55 +#define IMX6QDL_CLK_VPU_AXI_SEL56 +#define IMX6QDL_CLK_CKO1_SEL 57 +#define IMX6QDL_CLK_PERIPH 58 +#define IMX6QDL_CLK_PERIPH259 +#define IMX6QDL_CLK_PERIPH_CLK260 +#define IMX6QDL_CLK_PERIPH2_CLK2 61 +#define IMX6QDL_CLK_IPG62 +#define IMX6QDL_CLK_IPG_PER63 +#define IMX6QDL_CLK_ESAI_PRED 64 +#define IMX6QDL_CLK_ESAI_PODF 65 +#define IMX6QDL_CLK_ASRC_PRED 66 +#define IMX6QDL_CLK_ASRC_PODF 67 +#define IMX6QDL_CLK_SPDIF_PRED 68 +#define IMX6QDL_CLK_SPDIF_PODF 69 +#define IMX6QDL_CLK_CAN_ROOT 70 +#define IMX6QDL_CLK_ECSPI_ROOT 71 +#define IMX6QDL_CLK_GPU2D_CORE_PODF72 +#define IMX6QDL_CLK_GPU3D_CORE_PODF73 +#define IMX6QDL_CLK_GPU3D_SHADER 74 +#define IMX6QDL_CLK_IPU1_PODF 75 +#define IMX6QDL_CLK_IPU2_PODF
[U-Boot] [PATCH v6 12/21] arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo
From: Jagan Teki
i.CoreM6 DualLite/Solo modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU NXP i.MX6 DL, 800MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
Power supply Single 5V
MAX LCD RES FULLHD
and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q
Cc: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 1 +
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/imx6dl-icore.dts | 59 +++
arch/arm/dts/imx6qdl-icore.dtsi | 196
board/engicam/icorem6/README| 6 +-
configs/imx6qdl_icore_mmc_defconfig | 1 +
6 files changed, 262 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/dts/imx6dl-icore.dts
create mode 100644 arch/arm/dts/imx6qdl-icore.dtsi
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 5d549bd..e2431a8 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -98,6 +98,7 @@ config TARGET_MX6QARM2
config TARGET_MX6Q_ICORE
bool "Support Engicam i.Core"
select MX6QDL
+ select OF_CONTROL
select DM
select DM_THERMAL
select SUPPORT_SPL
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 19140b4..783352a8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -280,7 +280,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
vf610-twr.dtb \
pcm052.dtb
-dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb
+dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
+ imx6dl-icore.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
diff --git a/arch/arm/dts/imx6dl-icore.dts b/arch/arm/dts/imx6dl-icore.dts
new file mode 100644
index 000..aec332c
--- /dev/null
+++ b/arch/arm/dts/imx6dl-icore.dts
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-icore.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 DualLite/Solo Starter Kit";
+ compatible = "engicam,imx6-icore", "fsl,imx6dl";
+};
+
+&can1 {
+ status = "okay";
+};
+
+&can2 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi
new file mode 100644
index 000..f424cd5
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-icore.dtsi
@@ -0,0 +1,196 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distri
[U-Boot] [PATCH v6 08/21] arm: dts: Add devicetree for i.MX6DL
From: Jagan Teki
Add i.MX6DL dtsi support from Linux.
Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)
Cc: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6dl.dtsi | 133 +++
1 file changed, 133 insertions(+)
create mode 100644 arch/arm/dts/imx6dl.dtsi
diff --git a/arch/arm/dts/imx6dl.dtsi b/arch/arm/dts/imx6dl.dtsi
new file mode 100644
index 000..9a4c22c
--- /dev/null
+++ b/arch/arm/dts/imx6dl.dtsi
@@ -0,0 +1,133 @@
+
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include "imx6dl-pinfunc.h"
+#include "imx6qdl.dtsi"
+
+/ {
+ aliases {
+ i2c3 = &i2c4;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ operating-points = <
+ /* kHzuV */
+ 996000 125
+ 792000 1175000
+ 396000 115
+ >;
+ fsl,soc-operating-points = <
+ /* ARM kHz SOC-PU uV */
+ 996000 1175000
+ 792000 1175000
+ 396000 1175000
+ >;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clks IMX6QDL_CLK_ARM>,
+<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
+<&clks IMX6QDL_CLK_STEP>,
+<&clks IMX6QDL_CLK_PLL1_SW>,
+<&clks IMX6QDL_CLK_PLL1_SYS>;
+ clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+ arm-supply = <®_arm>;
+ pu-supply = <®_pu>;
+ soc-supply = <®_soc>;
+ };
+
+ cpu@1 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ reg = <1>;
+ next-level-cache = <&L2>;
+ };
+ };
+
+ soc {
+ ocram: sram@0090 {
+ compatible = "mmio-sram";
+ reg = <0x0090 0x2>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
+ aips1: aips-bus@0200 {
+ iomuxc: iomuxc@020e {
+ compatible = "fsl,imx6dl-iomuxc";
+ };
+
+ pxp: pxp@020f {
+ reg = <0x020f 0x4000>;
+ interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ epdc: epdc@020f4000 {
+ reg = <0x020f4000 0x4000>;
+ interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ lcdif: lcdif@020f8000 {
+ reg = <0x020f8000 0x4000>;
+ interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ aips2: aips-bus@0210 {
+ i2c4: i2c@021f8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+ reg = <0x021f8000 0x4000>;
+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6DL_CLK_I2C4>;
+ status = "disabled";
+ };
+ };
+ };
+
+ display-subsystem {
+ compatible = "fsl,imx-display-subsystem";
+ ports = <&ipu1_di0>, <&ipu1_di1>;
+ };
+
+ gpu-subsystem {
+ compatible = "fsl,imx-gpu-subsystem";
+ cores = <&gpu_2d>, <&gpu_3d>;
+ };
+};
+
+&gpt {
+ compatible = "fsl,imx6dl-gpt";
+};
+
+&hdmi {
+ compatible = "fsl,imx6dl-hdmi";
+};
+
+&ldb {
+ clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks
IMX6QDL_CLK_LDB_DI1_SEL>,
+<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks
IMX6QD
[U-Boot] [PATCH v6 10/21] arm: dts: imx6dl: Add pinctrl defines
From: Jagan Teki Add imx6dl pinctrl defines support from Linux. Here is the last commit: "ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ" (sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2) Cc: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- arch/arm/dts/imx6dl-pinfunc.h | 1091 + 1 file changed, 1091 insertions(+) create mode 100644 arch/arm/dts/imx6dl-pinfunc.h diff --git a/arch/arm/dts/imx6dl-pinfunc.h b/arch/arm/dts/imx6dl-pinfunc.h new file mode 100644 index 000..0ead323 --- /dev/null +++ b/arch/arm/dts/imx6dl-pinfunc.h @@ -0,0 +1,1091 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __DTS_IMX6DL_PINFUNC_H +#define __DTS_IMX6DL_PINFUNC_H + +/* + * The pin function ID is a tuple of + * + */ +#define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0 +#define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA0x04c 0x360 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA0x04c 0x360 0x8fc 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0 +#define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS0x050 0x364 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0 +#define MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA0x050 0x364 0x8fc 0x3 0x1 +#define MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA0x050 0x364 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x050 0x364 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x050 0x364 0x000 0x7 0x0 +#define MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x054 0x368 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x054 0x368 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA0x054 0x368 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA0x054 0x368 0x914 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x054 0x368 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x054 0x368 0x000 0x7 0x0 +#define MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x058 0x36c 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x058 0x36c 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA0x058 0x36c 0x914 0x3 0x1 +#define MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA0x058 0x36c 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x058 0x36c 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x058 0x36c 0x000 0x7 0x0 +#define MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x05c 0x370 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x05c 0x370 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA0x05c 0x370 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA0x05c 0x370 0x91c 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x05c 0x370 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x05c 0x370 0x000 0x7 0x0 +#define MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x060 0x374 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x060 0x374 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA0x060 0x374 0x91c 0x3 0x1 +#define MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA0x060 0x374 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x060 0x374 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x060 0x374 0x000 0x7 0x0 +#define MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x064 0x378 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x064 0x378 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x064 0x378 0x910 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B 0x064 0x378 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x064 0x378 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x064 0x378 0x000 0x7 0x0 +#define MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x068 0x37c 0x000 0x0 0x0 +#define MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x068 0x37c 0x000 0x1 0x0 +#define MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x068 0x37c 0x000 0x3 0x0 +#define MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B 0x068 0x37c 0x910 0x3 0x1 +#define MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x068 0x37c 0x000 0x5 0x0 +#define MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x068 0x37c 0x000 0x7
[U-Boot] [PATCH v6 09/21] arm: dts: Add devicetree for i.MX6DQL
From: Jagan Teki
Add i.MX6DQL dtsi support from Linux.
Here is the last commit:
"ARM: dts: imx6qdl: Fix SPDIF regression"
(sha1: f065e9e4addd75c21bb976bb2558648bf4f61de6)
Cc: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6qdl.dtsi | 1281 +
1 file changed, 1281 insertions(+)
create mode 100644 arch/arm/dts/imx6qdl.dtsi
diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
new file mode 100644
index 000..b13b0b2
--- /dev/null
+++ b/arch/arm/dts/imx6qdl.dtsi
@@ -0,0 +1,1281 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include
+#include
+
+#include "skeleton.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &fec;
+ can0 = &can1;
+ can1 = &can2;
+ gpio0 = &gpio1;
+ gpio1 = &gpio2;
+ gpio2 = &gpio3;
+ gpio3 = &gpio4;
+ gpio4 = &gpio5;
+ gpio5 = &gpio6;
+ gpio6 = &gpio7;
+ i2c0 = &i2c1;
+ i2c1 = &i2c2;
+ i2c2 = &i2c3;
+ ipu0 = &ipu1;
+ mmc0 = &usdhc1;
+ mmc1 = &usdhc2;
+ mmc2 = &usdhc3;
+ mmc3 = &usdhc4;
+ serial0 = &uart1;
+ serial1 = &uart2;
+ serial2 = &uart3;
+ serial3 = &uart4;
+ serial4 = &uart5;
+ spi0 = &ecspi1;
+ spi1 = &ecspi2;
+ spi2 = &ecspi3;
+ spi3 = &ecspi4;
+ usbphy0 = &usbphy1;
+ usbphy1 = &usbphy2;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ckil {
+ compatible = "fsl,imx-ckil", "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
+ ckih1 {
+ compatible = "fsl,imx-ckih1", "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ osc {
+ compatible = "fsl,imx-osc", "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2400>;
+ };
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ interrupt-parent = <&gpc>;
+ ranges;
+
+ dma_apbh: dma-apbh@0011 {
+ compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
+ reg = <0x0011 0x2000>;
+ interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ clocks = <&clks IMX6QDL_CLK_APBH_DMA>;
+ };
+
+ gpmi: gpmi-nand@00112000 {
+ compatible = "fsl,imx6q-gpmi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
+ reg-names = "gpmi-nand", "bch";
+ interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "bch";
+ clocks = <&clks IMX6QDL_CLK_GPMI_IO>,
+<&clks IMX6QDL_CLK_GPMI_APB>,
+<&clks IMX6QDL_CLK_GPMI_BCH>,
+<&clks IMX6QDL_CLK_GPMI_BCH_APB>,
+<&clks IMX6QDL_CLK_PER1_BCH>;
+ clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+ dmas = <&dma_apbh 0>;
+ dma-names = "rx-tx";
+ status = "disabled";
+ };
+
+ hdmi: hdmi@012 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0012 0x9000>;
+ interrupts = <0 115 0x04>;
+ gpr = <&gpr>;
+ clock
[U-Boot] [PATCH v6 05/21] net: Kconfig: Add FEC_MXC entry
From: Jagan Teki Added kconfig for FEC_MXC driver. Cc: Joe Hershberger Cc: Simon Glass Cc: Fabio Estevam Cc: Stefano Babic Cc: Peng Fan Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- drivers/net/Kconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 302c005..7b9961d 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -129,6 +129,13 @@ config ETHOC help This MAC is present in OpenRISC and Xtensa XTFPGA boards. +config FEC_MXC + bool "FEC Ethernet controller" + depends on MX6 + help + This driver supports the 10/100 Fast Ethernet controller for + NXP i.MX processors. + config MVPP2 bool "Marvell Armada 375 network interface support" depends on ARMADA_375 -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 06/21] imx6: icorem6: Add ENET support
From: Jagan Teki
Add enet support for engicam icorem6 qdl starter kit.
- Add pinmux settings
- Add board_eth_init
TFTP log:
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
icorem6qdl> tftpboot {fdt_addr} imx6dl-icore.dtb
Using FEC device
TFTP from server 192.168.2.96; our IP address is 192.168.2.75
Filename 'imx6dl-icore.dtb'.
Load address: 0x0
Loading: ##
1.3 MiB/s
done
Bytes transferred = 28976 (7130 hex)
CACHE: Misaligned operation at range [, 7130]
icorem6qdl>
Cc: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Matteo Lisi
Cc: Michael Trimarchi
Acked-by: Joe Hershberger
Signed-off-by: Jagan Teki
---
board/engicam/icorem6/icorem6.c | 72 +
configs/imx6qdl_icore_mmc_defconfig | 4 +++
include/configs/imx6qdl_icore.h | 12 +++
3 files changed, 88 insertions(+)
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index 1856972..a23cb7e 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -9,12 +9,15 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -30,11 +33,28 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
+ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
static iomux_v3_cfg_t const uart4_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
+static iomux_v3_cfg_t const enet_pads[] = {
+ IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL |
PAD_CTL_SRE_FAST)),
+ IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
static iomux_v3_cfg_t const usdhc1_pads[] = {
IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -99,6 +119,58 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#ifdef CONFIG_FEC_MXC
+#define ENET_PHY_RST IMX_GPIO_NR(7, 12)
+static int setup_fec(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+ s32 timeout = 10;
+ u32 reg = 0;
+ int ret;
+
+ /* Enable fec clock */
+ setbits_le32(&ccm->CCGR1, MXC_CCM_CCGR1_ENET_MASK);
+
+ /* use 50MHz */
+ ret = enable_fec_anatop_clock(0, ENET_50MHZ);
+ if (ret)
+ return ret;
+
+ /* Enable PLLs */
+ reg = readl(&anatop->pll_enet);
+ reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN;
+ writel(reg, &anatop->pll_enet);
+ reg = readl(&anatop->pll_enet);
+ reg |= BM_ANADIG_PLL_SYS_ENABLE;
+ while (timeout--) {
+ if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_SYS_LOCK)
+ break;
+ }
+ if (timeout <= 0)
+ return -EIO;
+ reg &= ~BM_ANADIG_PLL_SYS_BYPASS;
+ writel(reg, &anatop->pll_enet);
+
+ /* reset the phy */
+ gpio_direction_output(ENET_PHY_RST, 0);
+ udelay(1);
+ gpio_set_value(ENET_PHY_RST, 1);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int ret;
+
+ SETUP_IOMUX_PADS(enet_pads);
+ setup_fec();
+
+ return ret = cpu_eth_init(bis);
+}
+#endif
+
int board_early_init_f(void)
{
SETUP_IOMUX_PADS(uart4_pads);
diff --git a/configs/imx6qdl_icore_mmc_defconfig
b/configs/imx6qdl_icore_mmc_defconfig
index ced6b10..c2c2fe8 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -14,6 +14,8 @@ CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MMC=y
CONFIG_CMD_CACHE=y
@@ -23,7 +25,9 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_LIBFDT=y
+CONFIG_FEC_MXC=y
CONFIG_MXC_UART=y
+CONFIG_NETDEVICES=y
CONFIG_IMX_THERMAL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
[U-Boot] [PATCH v6 07/21] imx: s/docs\/README.imximage/doc\/README.imximage/g
From: Jagan Teki Fixed typo for doc/README.imximage on respective imximage.cfg files. Cc: Tom Rini Cc: Stefano Babic Cc: Fabio Estevam Acked-by: Peng Fan Signed-off-by: Jagan Teki --- board/barco/titanium/imximage.cfg | 2 +- board/ccv/xpress/imximage.cfg | 2 +- board/denx/m53evk/imximage.cfg | 2 +- board/freescale/mx6sabresd/mx6dlsabresd.cfg | 2 +- board/freescale/mx6slevk/imximage.cfg | 2 +- board/freescale/mx6ullevk/imximage.cfg | 2 +- board/freescale/mx7dsabresd/imximage.cfg| 2 +- board/freescale/s32v234evb/s32v234evb.cfg | 2 +- board/freescale/vf610twr/imximage.cfg | 2 +- board/phytec/pcm052/imximage.cfg| 2 +- board/technexion/pico-imx6ul/imximage.cfg | 2 +- board/toradex/colibri_imx7/imximage.cfg | 2 +- board/toradex/colibri_vf/imximage.cfg | 2 +- board/warp/imximage.cfg | 2 +- board/warp7/imximage.cfg| 2 +- 15 files changed, 15 insertions(+), 15 deletions(-) diff --git a/board/barco/titanium/imximage.cfg b/board/barco/titanium/imximage.cfg index 7219256..4fb6982 100644 --- a/board/barco/titanium/imximage.cfg +++ b/board/barco/titanium/imximage.cfg @@ -7,7 +7,7 @@ * * SPDX-License-Identifier:GPL-2.0+ * - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure * and create imximage boot image * * The syntax is taken as close as possible with the kwbimage diff --git a/board/ccv/xpress/imximage.cfg b/board/ccv/xpress/imximage.cfg index 92167c9..d98bc36 100644 --- a/board/ccv/xpress/imximage.cfg +++ b/board/ccv/xpress/imximage.cfg @@ -3,7 +3,7 @@ * * SPDX-License-Identifier:GPL-2.0+ * - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure * and create imximage boot image * * The syntax is taken as close as possible with the kwbimage diff --git a/board/denx/m53evk/imximage.cfg b/board/denx/m53evk/imximage.cfg index 4cd002c..c0e2602 100644 --- a/board/denx/m53evk/imximage.cfg +++ b/board/denx/m53evk/imximage.cfg @@ -4,7 +4,7 @@ * * SPDX-License-Identifier:GPL-2.0+ * - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure * and create imximage boot image * * The syntax is taken as close as possible with the kwbimage diff --git a/board/freescale/mx6sabresd/mx6dlsabresd.cfg b/board/freescale/mx6sabresd/mx6dlsabresd.cfg index f35f22e..be9f87f 100644 --- a/board/freescale/mx6sabresd/mx6dlsabresd.cfg +++ b/board/freescale/mx6sabresd/mx6dlsabresd.cfg @@ -3,7 +3,7 @@ * * SPDX-License-Identifier:GPL-2.0+ * - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure * and create imximage boot image * * The syntax is taken as close as possible with the kwbimage diff --git a/board/freescale/mx6slevk/imximage.cfg b/board/freescale/mx6slevk/imximage.cfg index c77bbde..024de9c 100644 --- a/board/freescale/mx6slevk/imximage.cfg +++ b/board/freescale/mx6slevk/imximage.cfg @@ -3,7 +3,7 @@ * * SPDX-License-Identifier:GPL-2.0+ * - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure * and create imximage boot image * * The syntax is taken as close as possible with the kwbimage diff --git a/board/freescale/mx6ullevk/imximage.cfg b/board/freescale/mx6ullevk/imximage.cfg index 4604b62..3ae4912 100644 --- a/board/freescale/mx6ullevk/imximage.cfg +++ b/board/freescale/mx6ullevk/imximage.cfg @@ -3,7 +3,7 @@ * * SPDX-License-Identifier:GPL-2.0+ * - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure * and create imximage boot image * * The syntax is taken as close as possible with the kwbimage diff --git a/board/freescale/mx7dsabresd/imximage.cfg b/board/freescale/mx7dsabresd/imximage.cfg index 76574ff..c2b3a8c 100644 --- a/board/freescale/mx7dsabresd/imximage.cfg +++ b/board/freescale/mx7dsabresd/imximage.cfg @@ -3,7 +3,7 @@ * * SPDX-License-Identifier:GPL-2.0+ * - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure * and create imximage boot image * * The syntax is taken as close as possible with the kwbimage diff --git a/board/freescale/s32v234evb/s32v234evb.cfg b/board/freescale/s32v234evb/s32v234evb.cfg index 6017a40..6449ef2 100644 --- a/board/freescale/s32v234evb/s32v234evb.cfg +++ b/board/freescale/s32v234evb/s32v234evb.cfg @@ -5,7 +5,7 @@ */ /* - * Refer docs/README.imxmage for more details about how-to configure + * Refer doc/README.imximage for more details about how-to configure
[U-Boot] [PATCH v6 04/21] arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support
From: Jagan Teki Boot Log for i.CoreM6 DualLite/Solo Starter Kit: --- U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46) Trying to boot from MMC1 U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530) CPU: Freescale i.MX6SOLO rev1.3 at 792MHz CPU: Industrial temperature grade (-40C to 105C) at 31C Reset cause: POR DRAM: 256 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device switch to partitions #0, OK mmc0 is current device reading boot.scr ** Unable to read file boot.scr ** reading zImage 6741808 bytes read in 341 ms (18.9 MiB/s) Booting from mmc ... reading imx6dl-icore.dtb 30600 bytes read in 19 ms (1.5 MiB/s) Booting using the fdt blob at 0x1800 Using Device Tree in place at 1800, end 1800a787 Starting kernel ... [0.00] Booting Linux on physical CPU 0x0 Boot Log for i.CoreM6 Quad/Dual Starter Kit: U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46) Trying to boot from MMC1 U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530) CPU: Freescale i.MX6Q rev1.2 at 792MHz CPU: Industrial temperature grade (-40C to 105C) at 28C Reset cause: POR DRAM: 512 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 icorem6qdl> Cc: Stefano Babic Cc: Fabio Estevam Cc: Matteo Lisi Cc: Michael Trimarchi Acked-by: Peng Fan Signed-off-by: Jagan Teki --- arch/arm/cpu/armv7/mx6/Kconfig | 8 + arch/arm/include/asm/imx-common/sys_proto.h | 2 + board/engicam/icorem6/Kconfig | 12 + board/engicam/icorem6/MAINTAINERS | 6 + board/engicam/icorem6/Makefile | 6 + board/engicam/icorem6/README| 31 +++ board/engicam/icorem6/icorem6.c | 400 configs/imx6qdl_icore_mmc_defconfig | 35 +++ include/configs/imx6qdl_icore.h | 120 + 9 files changed, 620 insertions(+) create mode 100644 board/engicam/icorem6/Kconfig create mode 100644 board/engicam/icorem6/MAINTAINERS create mode 100644 board/engicam/icorem6/Makefile create mode 100644 board/engicam/icorem6/README create mode 100644 board/engicam/icorem6/icorem6.c create mode 100644 configs/imx6qdl_icore_mmc_defconfig create mode 100644 include/configs/imx6qdl_icore.h diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index d851b26..5d549bd 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -95,6 +95,13 @@ config TARGET_MX6CUBOXI config TARGET_MX6QARM2 bool "mx6qarm2" +config TARGET_MX6Q_ICORE + bool "Support Engicam i.Core" + select MX6QDL + select DM + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6QSABREAUTO bool "mx6qsabreauto" select DM @@ -225,6 +232,7 @@ source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" source "board/el/el6x/Kconfig" source "board/embest/mx6boards/Kconfig" +source "board/engicam/icorem6/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig" diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 6ace8bb..005435a 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -30,8 +30,10 @@ #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)) #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) #define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL)) +#define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL)) #define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX)) #define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL)) +#define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO)) #define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL)) #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL)) diff --git a/board/engicam/icorem6/Kconfig b/board/engicam/icorem6/Kconfig new file mode 100644 index 000..6d62f0e --- /dev/null +++ b/board/engicam/icorem6/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6Q_ICORE + +config SYS_BOARD + default "icorem6" + +config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6qdl_icore" + +endif diff --git a/board/engicam/icorem6/MAINTAINERS b/board/engicam/icorem6/MAINTAINERS new file mode 100644 index 000..3e06c6b --- /dev/null +++ b/board/engicam/icorem6/MAINTAINERS @@ -0,0 +1,6 @@ +ICOREM6QDL BOARD +M: Jagan Teki +S: Maintained +F: bo
[U-Boot] [PATCH v6 03/21] Kconfig: Add DEFAULT_FDT_FILE entry
From: Jagan Teki Add kconfig entry for CONFIG_DEFAULT_FDT_FILE Cc: Tom Rini Cc: Simon Glass Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- common/Kconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/common/Kconfig b/common/Kconfig index c69c141..9cbcbd4 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -203,6 +203,11 @@ config IDENT_STRING help This options adds the board specific name to u-boot version. +config DEFAULT_FDT_FILE + string "Default fdt file" + help + This option is used to set the default fdt file to boot OS. + config SYS_NO_FLASH bool "Disable support for parallel NOR flash" default n -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 02/21] thermal: Kconfig: Add IMX_THERMAL entry
From: Jagan Teki Added kconfig for IMX_THERMAL driver. Cc: Simon Glass Cc: Fabio Estevam Cc: Stefano Babic Cc: Peng Fan Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- drivers/thermal/Kconfig | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 8e22ea7..f0ffbb3 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -5,3 +5,16 @@ config DM_THERMAL temperature sensors to permit warnings, speed throttling or even automatic power-off when the temperature gets too high or low. Other devices may be discrete but connected on a suitable bus. + +if DM_THERMAL + +config IMX_THERMAL + bool "Temperature sensor driver for Freescale i.MX SoCs" + depends on MX6 + help + Support for Temperature Monitor (TEMPMON) found on Freescale i.MX SoCs. + It supports one critical trip point and one passive trip point. The + cpufreq is used as the cooling device to throttle CPUs when the + passive trip is crossed. + +endif # if DM_THERMAL -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 01/21] serial: Kconfig: Add MXC_UART entry
From: Jagan Teki Added kconfig for MXC_UART driver. Cc: Simon Glass Cc: Fabio Estevam Cc: Stefano Babic Cc: Peng Fan Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- drivers/serial/Kconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 541cf2e..317d158 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -309,6 +309,13 @@ config MVEBU_A3700_UART Choose this option to add support for UART driver on the Marvell Armada 3700 SoC. The base address is configured via DT. +config MXC_UART + bool "IMX serial port support" + depends on MX6 + help + If you have a machine based on a Motorola IMX CPU you + can enable its onboard serial port by enabling this option. + config PIC32_SERIAL bool "Support for Microchip PIC32 on-chip UART" depends on DM_SERIAL && MACH_PIC32 -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 00/21] imx6: Add Engicam i.CoreM6 QDL support
From: Jagan Teki This series supports Engicam i.CoreM6 QDL modules on top of u-boot-imx/master and test on the respective starter kits as well. Tested both MMC and NAND boot. Changes for v6: - Rebase to u-boot-imx/master - Move few SPL configs to defconfigs Changes for v5: - Add NAND support Changes for v4: - Add 'net: Kconfig: Add FEC_MXC entry' patch - Updated ENV configs along with comments - Restructured configs for more readability - Add CONFIG_ENV_OVERWRITE - Rename icorem6qdl_defconfig with icorem6qdl_mmc_defconfig Changes for v3: - Remove "v2 01/17 imx: iomux-v3: Fix build error with snvs base" patch - Remove 'default n' on Kconfig DEFAULT_FDT_FILE patch - Add minimal devicetree support for Engicam i.CoreM6 QDL - Add is_mx6dl() - Add is_mx6solo() - Use is_mx6dq() - Add last commit sha1 and header in pull devicetree files from Linux Changes for v2: - Make static to local iomux structure in board file - Corrected rowaddr in mx6_ddr3_cfg - Used imx_ddr_size - Add FEC support and tested the same - Add DM_GPIO, DM_MMC support - Add pinctrl support - Add devicetree support Jagan Teki (21): serial: Kconfig: Add MXC_UART entry thermal: Kconfig: Add IMX_THERMAL entry Kconfig: Add DEFAULT_FDT_FILE entry arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support net: Kconfig: Add FEC_MXC entry imx6: icorem6: Add ENET support imx: s/docs\/README.imximage/doc\/README.imximage/g arm: dts: Add devicetree for i.MX6DL arm: dts: Add devicetree for i.MX6DQL arm: dts: imx6dl: Add pinctrl defines dt-bindings: clock: imx6qdl: Add clock defines arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo imx6q: icorem6: Enable pinctrl driver engicam: icorem6: Add DM_GPIO, DM_MMC support arm: dts: Add devicetree for i.MX6Q arm: dts: imx6q: Add pinctrl defines arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual mtd: nand: Kconfig: Add NAND_MXS entry imx6: icorem6: Add NAND support imx6: icorem6: Enable MTD device support imx6: icorem6: Add default mtd nand partition table arch/arm/cpu/armv7/mx6/Kconfig | 11 + arch/arm/dts/Makefile |4 +- arch/arm/dts/imx6dl-icore.dts | 59 ++ arch/arm/dts/imx6dl-pinfunc.h | 1091 +++ arch/arm/dts/imx6dl.dtsi| 133 +++ arch/arm/dts/imx6q-icore.dts| 59 ++ arch/arm/dts/imx6q-pinfunc.h| 1047 ++ arch/arm/dts/imx6q.dtsi | 300 +++ arch/arm/dts/imx6qdl-icore.dtsi | 196 arch/arm/dts/imx6qdl.dtsi | 1281 +++ arch/arm/include/asm/imx-common/sys_proto.h |2 + board/barco/titanium/imximage.cfg |2 +- board/ccv/xpress/imximage.cfg |2 +- board/denx/m53evk/imximage.cfg |2 +- board/engicam/icorem6/Kconfig | 12 + board/engicam/icorem6/MAINTAINERS |6 + board/engicam/icorem6/Makefile |6 + board/engicam/icorem6/README| 38 + board/engicam/icorem6/icorem6.c | 537 +++ board/freescale/mx6sabresd/mx6dlsabresd.cfg |2 +- board/freescale/mx6slevk/imximage.cfg |2 +- board/freescale/mx6ullevk/imximage.cfg |2 +- board/freescale/mx7dsabresd/imximage.cfg|2 +- board/freescale/s32v234evb/s32v234evb.cfg |2 +- board/freescale/vf610twr/imximage.cfg |2 +- board/phytec/pcm052/imximage.cfg|2 +- board/technexion/pico-imx6ul/imximage.cfg |2 +- board/toradex/colibri_imx7/imximage.cfg |2 +- board/toradex/colibri_vf/imximage.cfg |2 +- board/warp/imximage.cfg |2 +- board/warp7/imximage.cfg|2 +- common/Kconfig |5 + configs/imx6qdl_icore_mmc_defconfig | 42 + configs/imx6qdl_icore_nand_defconfig| 37 + drivers/mtd/nand/Kconfig|7 + drivers/net/Kconfig |7 + drivers/serial/Kconfig |7 + drivers/thermal/Kconfig | 13 + include/configs/imx6qdl_icore.h | 167 include/dt-bindings/clock/imx6qdl-clock.h | 274 ++ 40 files changed, 5355 insertions(+), 16 deletions(-) create mode 100644 arch/arm/dts/imx6dl-icore.dts create mode 100644 arch/arm/dts/imx6dl-pinfunc.h create mode 100644 arch/arm/dts/imx6dl.dtsi create mode 100644 arch/arm/dts/imx6q-icore.dts create mode 100644 arch/arm/dts/imx6q-pinfunc.h create mode 100644 arch/arm/dts/imx6q.dtsi create mode 100644 arch/arm/dts/imx6qdl-icore.dtsi create mode 100644 arch/arm/dts/imx6qdl.dtsi create mode 100644 board/engicam/icor
[U-Boot] [PATCH v2 4/5] sandbox/fs: Set correct filetype for unknown filetype
The "hostfs ls" command prefixes each directory entry with either DIR, LNK or " " if it is a directory, symlink resp. regular file, or "???" for any other or unknown type. The latter only works if the type is set correctly, as the entry defaults to OS_FILET_REG and e.g. socket files show up as regular files. Signed-off-by: Stefan Brüns Acked-by: Simon Glass --- arch/sandbox/cpu/os.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 16af3f5..df2bd4c 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -363,6 +363,8 @@ int os_dirent_ls(const char *dirname, struct os_dirent_node **headp) case DT_LNK: next->type = OS_FILET_LNK; break; + default: + next->type = OS_FILET_UNKNOWN; } next->size = 0; snprintf(fname, len, "%s/%s", dirname, next->name); -- 2.10.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] ACPI in general
Simon and Bin, Is there any activity to bring ACPI to other than x86 arch? If not, do we have a plan to do so? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] git send-email and patch headers/subject line
Thanks for the extra tidbits; I just updated my notes: OE and U-Boot mailing list patch guidelines Following git send-email man page setup, note that app passwords are now required. Replace with number of commits; if N=1, can leave off cover letter. Add vN for patch revisions or use new variant. git format-patch --cover-letter --subject-prefix="PATCH v2" -o outgoing/ or git format-patch -v 2 edit outgoing/-* (add Cc:. etc) git send-email --to=u-boot@lists.denx.de --cc outgoing/* or git send-email --to=openembedded-c...@lists.openembedded.org --subject="meta-oe][PATCH" outgoing/* As far as threading/reply-to settings, my .gitconfig has "chainreplyto = false" in the sendemail section; do I need to set thread or add --in-reply-to to make that work? The man page doesn't seem too clear on what the defaults should be or when to override. Thanks again for the tips! Steve On Tue, Oct 4, 2016 at 8:10 AM, Brüns, Stefan wrote: > On Montag, 3. Oktober 2016 17:02:37 CEST Stephen Arnold wrote: >> Howdy: >> >> I could swear this worked the last time I sent patches to the OE list >> (at least it didn't need the gmail insecure app workaround so I guess >> it was a while ago). >> >> Anyway, the real commit msg starts with ARM, I git format-patch and >> this time didn't touch the patches, then: >> >> git send-email --to=t...@lists.denx.de --confirm=always -M -1 >> --subject-prefix="U-Boot][PATCH v3" outgoing/* > > You should *not* add the [U-Boot] tag to the message, this is done by the > mailinglist software. > > The wiki states to use: > $> git format-patch --subject-prefix="PATCH v2" > > Current git allows a simpler variant, "--reroll-count", or short "-v": > $> git format-patch -v 2 > > > "git send-email" has no "--subject-prefix" nor "-M" nor "-" option. Just > use > $> git send-email --to= --cc outgoing/* > > Formatting and sending patches are two independent steps. You can't apply/copy > options from one command to the other. > > Prior to sending the patch, you *should* edit the -cover-letter.patch. > > Kind regards, > > Stefan > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 1/8] tools: imximage: add plugin support
Hi Peng,
On 27/09/2016 11:23, Peng Fan wrote:
> Add plugin support for imximage.
>
> Define CONFIG_USE_IMXIMG_PLUGIN in defconfig to enable using plugin.
>
> Signed-off-by: Peng Fan
> Cc: Stefano Babic
> Cc: Eric Nelson
> Cc: Troy Kisky
> Cc: Ye Li
> ---
This patch breaks mx28 boards.
arm: + mx28evk
+In file included from include/asm/arch/iomux-mx28.h:16:0,
+ from include/configs/mxs.h:37,
+ from include/configs/mx28evk.h:303,
+ from include/config.h:6,
+ from tools/imximage.h:11,
+ from tools/imximage.c:14:
+include/asm/arch/iomux.h:30:9: error: unknown type name ‘u32’
+ typedef u32 iomux_cfg_t;
+
The check for DCD size is broken as well:
arm: + mx6sabresd_spl
+Error: Image corrupt DCD size 536870911 exceed maximum 220
+make[2]: *** [SPL] Error 1
+make[1]: *** [SPL] Error 2
+make: *** [sub-make] Error 2
This happens for most mx6 boards, anyway.
Best regards,
Stefano
>
> V2:
> Drop the CONFIG_USE_PLUGIN, make plugin always support in imximage.
>
> tools/imximage.c | 282
> +++
> tools/imximage.h | 8 +-
> 2 files changed, 230 insertions(+), 60 deletions(-)
>
> diff --git a/tools/imximage.c b/tools/imximage.c
> index 092d550..fefc129 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -27,6 +27,7 @@ static table_entry_t imximage_cmds[] = {
> {CMD_CHECK_BITS_CLR,"CHECK_BITS_CLR", "Reg Check bits clr", },
> {CMD_CSF, "CSF", "Command Sequence File", },
> {CMD_IMAGE_VERSION, "IMAGE_VERSION","image version", },
> + {CMD_PLUGIN,"PLUGIN", "file plugin_addr", },
> {-1,"", "", },
> };
>
> @@ -80,6 +81,9 @@ static uint32_t imximage_ivt_offset = UNDEFINED;
> static uint32_t imximage_csf_size = UNDEFINED;
> /* Initial Load Region Size */
> static uint32_t imximage_init_loadsize;
> +static uint32_t imximage_iram_free_start;
> +static uint32_t imximage_plugin_size;
> +static uint32_t plugin_image;
>
> static set_dcd_val_t set_dcd_val;
> static set_dcd_param_t set_dcd_param;
> @@ -118,7 +122,11 @@ static uint32_t detect_imximage_version(struct
> imx_header *imx_hdr)
>
> /* Try to detect V2 */
> if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
> - (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
> + (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
> + return IMXIMAGE_V2;
> +
> + if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
> + hdr_v2->boot_data.plugin)
> return IMXIMAGE_V2;
>
> return IMXIMAGE_VER_INVALID;
> @@ -165,7 +173,7 @@ static struct dcd_v2_cmd *gd_last_cmd;
> static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
> int32_t cmd)
> {
> - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
> + dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
> struct dcd_v2_cmd *d = gd_last_cmd;
> struct dcd_v2_cmd *d2;
> int len;
> @@ -261,21 +269,23 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr,
> uint32_t dcd_len,
> static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
> char *name, int lineno)
> {
> - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
> - struct dcd_v2_cmd *d = gd_last_cmd;
> - int len;
> -
> - if (!d)
> - d = &dcd_v2->dcd_cmd;
> - len = be16_to_cpu(d->write_dcd_command.length);
> - if (len > 4)
> - d = (struct dcd_v2_cmd *)(((char *)d) + len);
> -
> - len = (char *)d - (char *)&dcd_v2->header;
> -
> - dcd_v2->header.tag = DCD_HEADER_TAG;
> - dcd_v2->header.length = cpu_to_be16(len);
> - dcd_v2->header.version = DCD_VERSION;
> + if (!imxhdr->header.hdr_v2.boot_data.plugin) {
> + dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
> + struct dcd_v2_cmd *d = gd_last_cmd;
> + int len;
> +
> + if (!d)
> + d = &dcd_v2->dcd_cmd;
> + len = be16_to_cpu(d->write_dcd_command.length);
> + if (len > 4)
> + d = (struct dcd_v2_cmd *)(((char *)d) + len);
> +
> + len = (char *)d - (char *)&dcd_v2->header;
> +
> + dcd_v2->header.tag = DCD_HEADER_TAG;
> + dcd_v2->header.length = cpu_to_be16(len);
> + dcd_v2->header.version = DCD_VERSION;
> + }
> }
>
> static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
> @@ -317,24 +327,93 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr,
> uint32_t dcd_len,
> fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
> fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
>
> - fhdr_v2->entry = entry_point;
> - fhdr_v2->reserved1
Re: [U-Boot] [PATCH v5 00/21] imx6: Add Engicam i.CoreM6 QDL support
Hi Jagan, On 04/10/2016 15:43, Jagan Teki wrote: > On Tue, Oct 4, 2016 at 6:58 PM, Stefano Babic wrote: >> Hi Jagan, >> >> On 30/09/2016 08:44, Jagan Teki wrote: >> >>> >>> Can you pick this series. >> >> Series cannot be applied: I see several issue. The series breaks for >> different reason a lot of boards. I get 3 boards broken and 15 with >> warnings. Here the resons: >> >> CONFIG_DEFAULT_FDT_FILE was moved to Kconfig, but without updating the >> boards that have already defined. This generated a duplication, for >> example : >> >> w+include/configs/mx53ard.h:84:0: warning: "CONFIG_DEFAULT_FDT_FILE" >> redefined [enabled by default] >> w+include/generated/autoconf.h:13:0: note: this is the location of the >> previous definition >>arm: + dms-ba16-1g >> +In file included from include/config.h:5:0, >> >> You have to move at the same time all CONFIG_DEFAULT_FDT_FILE from the >> board's config file to defconfig. >> >> I add at the same time build errors by compiling the new boards, for >> example: >> >>arm: + imx6qdl_icore_mmc >> +arch/arm/imx-common/cpu.c: At top level: >> +arch/arm/cpu/armv7/built-in.o: In function `lldiv': >> +include/div64.h:45: undefined reference to `__div64_32' >> +arch/arm/cpu/armv7/built-in.o: In function `lpddr2_rl': >> +arch/arm/cpu/armv7/mx6/ddr.c:943: undefined reference to `hang' >> +arch/arm/cpu/armv7/built-in.o: In function `mx6_lpddr2_cfg': >> +arch/arm/cpu/armv7/mx6/ddr.c:1175: undefined reference to `mdelay' >> +arch/arm/cpu/armv7/built-in.o: In function `mx6_ddr3_cfg': >> +arch/arm/cpu/armv7/mx6/ddr.c:1281: undefined reference to `hang' >> +arch/arm/cpu/armv7/mx6/ddr.c:1480: undefined reference to `mdelay' >> +arch/arm/cpu/armv7/built-in.o: In function `mx6_dram_cfg': >> +arch/arm/cpu/armv7/mx6/ddr.c:1493: undefined reference to `hang' >> >> It looks strange, it is maybe due to the fact that I am rearranging the >> order how I apply the patches because I see issues in other patchset. >> But can you check it, please ? > > May be because of u-boot-imx/master is head, shall I try it on master > instead of next? Please try with -master. Anyway, I have pushed my rearranged -next (just the order was changed due to issues in other patchset), and I see the same problems. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Adding memcmp to standalone application
Is it correct that memcmp functionality does not exist for a standalone application based upon exports.h/_exports.h? The correct way to proceed in order to add this would be follow the guidelines in README.STANDALONE? Any functionality added to the exported functions and/or jump table is GPL'd code? Sent from my Verizon, Samsung Galaxy smartphone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/8] arm: efi: Add a hello world test program
Hi Alex, On 3 October 2016 at 21:15, Alexander Graf wrote: > > > Am 03.10.2016 um 23:50 schrieb Simon Glass : > > Hi, > > On 27 September 2016 at 15:28, Tom Rini wrote: > > On Mon, Sep 26, 2016 at 09:36:19AM +0200, Alexander Graf wrote: > > > > On 25.09.16 23:27, Simon Glass wrote: > > It is useful to have a basic sanity check for EFI loader support. Add a > > 'bootefi hello' command which loads HelloWord.efi and runs it under U-Boot. > > > Signed-off-by: Simon Glass > > --- > > > Changes in v2: None > > > arch/arm/lib/HelloWorld32.efi | Bin 0 -> 11712 bytes > > > IIRC U-Boot as a whole is GPL licensed, which means that any binaries > > shipped inside would also need to be GPL compatibly licensed which again > > means that the source code (and build instructions?) for this .efi file > > would need to be part of the tree, no? > > > Yeah, I'm not super comfortable with this. > > > Do you think we should drop these binary patches? I could always put > the binaries somewhere along with instructions on how to get them. > > > I think that's the best option, yes. You can always just add a url to the > readme to point people into the right direction. OK. One problem is that we cannot write a test for it unless we actually run an EFI application. > > > I do think it is useful to be able to test the platform though. > > > I don't disagree, but I would argue that for the average u-boot user it > brings no additional value ;). And people like you who know how to enable a > new architecture probably also know how to get a file into their target's > memory. I wonder if we can build our own hello world application? I think I did it once. But there is EFI library code that we would need to bring in (perhaps a small amount). Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/8] arm: efi: Add a hello world test program
> Am 04.10.2016 um 17:37 schrieb Simon Glass : > > Hi Alex, > >> On 3 October 2016 at 21:15, Alexander Graf wrote: >> >> >> Am 03.10.2016 um 23:50 schrieb Simon Glass : >> >> Hi, >> >> On 27 September 2016 at 15:28, Tom Rini wrote: >> >> On Mon, Sep 26, 2016 at 09:36:19AM +0200, Alexander Graf wrote: >> >> >> >> On 25.09.16 23:27, Simon Glass wrote: >> >> It is useful to have a basic sanity check for EFI loader support. Add a >> >> 'bootefi hello' command which loads HelloWord.efi and runs it under U-Boot. >> >> >> Signed-off-by: Simon Glass >> >> --- >> >> >> Changes in v2: None >> >> >> arch/arm/lib/HelloWorld32.efi | Bin 0 -> 11712 bytes >> >> >> IIRC U-Boot as a whole is GPL licensed, which means that any binaries >> >> shipped inside would also need to be GPL compatibly licensed which again >> >> means that the source code (and build instructions?) for this .efi file >> >> would need to be part of the tree, no? >> >> >> Yeah, I'm not super comfortable with this. >> >> >> Do you think we should drop these binary patches? I could always put >> the binaries somewhere along with instructions on how to get them. >> >> >> I think that's the best option, yes. You can always just add a url to the >> readme to point people into the right direction. > > OK. One problem is that we cannot write a test for it unless we > actually run an EFI application. Well, you could always provide a binary disk image that you run in qemu as test case. That one doesn't have to be gpl compliant thn because it's not derived work :). > >> >> >> I do think it is useful to be able to test the platform though. >> >> >> I don't disagree, but I would argue that for the average u-boot user it >> brings no additional value ;). And people like you who know how to enable a >> new architecture probably also know how to get a file into their target's >> memory. > > I wonder if we can build our own hello world application? I think I > did it once. But there is EFI library code that we would need to bring > in (perhaps a small amount). We could. The main problem is the PE header. Maybe we can trick around that with bincopy -O binary though. Hmm :). Alex > > Regards, > Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd: cros_ec: Move crosec commands to cmd subdirectory
Hi Simon, On Tue, Oct 4, 2016 at 8:37 AM, Simon Glass wrote: >> +menu "Firmware commands" >> +config CMD_CROS_EC >> + bool "Enable crosec command" >> + depends on CROS_EC > > Can this be enabled by default if CROS_EC is enabled? At present I > think your change will disable it. Will send a v2 in a bit. Thanks for the review Moritz ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd: cros_ec: Move crosec commands to cmd subdirectory
Hi Moritz, On 3 October 2016 at 16:53, Moritz Fischer wrote: > Move crosec commands from drivers/misc/cros_ec.c to > cmd/cros_ec.c > > Signed-off-by: Moritz Fischer > Cc: Simon Glass > Cc: Heiko Schocher > Cc: Bin Meng > Cc: Miao Yan > Cc: Masahiro Yamada > Cc: Stefan Roese > Cc: Przemyslaw Marczak > Cc: Maxime Ripard > Cc: Nishanth Menon > Cc: u-boot@lists.denx.de > --- > cmd/Kconfig| 12 ++ > cmd/Makefile | 1 + > cmd/cros_ec.c | 366 > + > drivers/misc/cros_ec.c | 348 -- > include/cros_ec.h | 11 ++ > 5 files changed, 390 insertions(+), 348 deletions(-) > create mode 100644 cmd/cros_ec.c Acked-by: Simon Glass But please see below. > > diff --git a/cmd/Kconfig b/cmd/Kconfig > index 86554ea..141281f 100644 > --- a/cmd/Kconfig > +++ b/cmd/Kconfig > @@ -677,6 +677,18 @@ config CMD_TPM_TEST > > endmenu > > +menu "Firmware commands" > +config CMD_CROS_EC > + bool "Enable crosec command" > + depends on CROS_EC Can this be enabled by default if CROS_EC is enabled? At present I think your change will disable it. e.g. default y > + help > + Enable command-line access to the Chrome OS EC (Embedded > + Controller). This provides the 'crosec' command which has > + a number of sub-commands for performing EC tasks such as > + updating its flash, accessing a small saved context area > + and talking to the I2C bus behind the EC (if there is one). > +endmenu > + ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM:dts: Added device tree for socfpga arria10 development kit sdmmc
On 10/04/2016 12:34 PM, Tien Fong Chee wrote: > On Fri, 2016-09-30 at 19:29 +0200, Marek Vasut wrote: >> On 09/30/2016 10:12 AM, Tien Fong Chee wrote: >>> This is initial version of device tree for the Intel socfpga >>> arria10 >>> development kit with sdmmc. >>> >>> Signed-off-by: Tien Fong Chee >>> Cc: Marek Vasut >>> Cc: Stefan Roese >>> Cc: Dinh Nguyen >>> Cc: Chin Liang See >>> Cc: Tien Fong >>> --- >>> arch/arm/dts/socfpga_arria10.dtsi | 866 >>> +++ >>> arch/arm/dts/socfpga_arria10_handoff_sdmmc.dtsi | 457 >>> >>> arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts| 30 + >>> 3 files changed, 1353 insertions(+), 0 deletions(-) >>> create mode 100755 arch/arm/dts/socfpga_arria10.dtsi >>> create mode 100755 arch/arm/dts/socfpga_arria10_handoff_sdmmc.dtsi >>> create mode 100755 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts >>> >> >> How does this fit with this previous stuff ? >> http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/hea >> ds/01-arria10 >> >> Can I compile U-Boot and run it on A10 with this DT ? >> > I have compiled this with master branch to make sure no DTS syntax > error. But, there are still a lot errors at 01-arria10 when i am trying > to compile, which blocking the way to compile this DT. We will continue > to upstream the subsequent patches to solve those errors, so it is > crucial to upstream this DTS as soon as possile, because those patches > would reference to it. Sorry, the DT is just a platform description, it can be added later. What is sorely missing is the hardware support for A10, some of which was already added previously, some of it is rotting in the 01-arria10 branch and some of it (DDR controller support) is missing altogether. So what I'd like to see is a patchset that makes the A10 support usable, such that I can use mainline U-Boot on the A10 devkit without any additional out-of-tree stuff. I am not interested in picking separate bits and pieces which in itself are only dead weight. > Regards, > TF > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] git send-email and patch headers/subject line
On Montag, 3. Oktober 2016 17:02:37 CEST Stephen Arnold wrote: > Howdy: > > I could swear this worked the last time I sent patches to the OE list > (at least it didn't need the gmail insecure app workaround so I guess > it was a while ago). > > Anyway, the real commit msg starts with ARM, I git format-patch and > this time didn't touch the patches, then: > > git send-email --to=t...@lists.denx.de --confirm=always -M -1 > --subject-prefix="U-Boot][PATCH v3" outgoing/* You should *not* add the [U-Boot] tag to the message, this is done by the mailinglist software. The wiki states to use: $> git format-patch --subject-prefix="PATCH v2" Current git allows a simpler variant, "--reroll-count", or short "-v": $> git format-patch -v 2 "git send-email" has no "--subject-prefix" nor "-M" nor "-" option. Just use $> git send-email --to= --cc outgoing/* Formatting and sending patches are two independent steps. You can't apply/copy options from one command to the other. Prior to sending the patch, you *should* edit the -cover-letter.patch. Kind regards, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/21] imx6: Add Engicam i.CoreM6 QDL support
On Tue, Oct 4, 2016 at 6:58 PM, Stefano Babic wrote: > Hi Jagan, > > On 30/09/2016 08:44, Jagan Teki wrote: > >> >> Can you pick this series. > > Series cannot be applied: I see several issue. The series breaks for > different reason a lot of boards. I get 3 boards broken and 15 with > warnings. Here the resons: > > CONFIG_DEFAULT_FDT_FILE was moved to Kconfig, but without updating the > boards that have already defined. This generated a duplication, for > example : > > w+include/configs/mx53ard.h:84:0: warning: "CONFIG_DEFAULT_FDT_FILE" > redefined [enabled by default] > w+include/generated/autoconf.h:13:0: note: this is the location of the > previous definition >arm: + dms-ba16-1g > +In file included from include/config.h:5:0, > > You have to move at the same time all CONFIG_DEFAULT_FDT_FILE from the > board's config file to defconfig. > > I add at the same time build errors by compiling the new boards, for > example: > >arm: + imx6qdl_icore_mmc > +arch/arm/imx-common/cpu.c: At top level: > +arch/arm/cpu/armv7/built-in.o: In function `lldiv': > +include/div64.h:45: undefined reference to `__div64_32' > +arch/arm/cpu/armv7/built-in.o: In function `lpddr2_rl': > +arch/arm/cpu/armv7/mx6/ddr.c:943: undefined reference to `hang' > +arch/arm/cpu/armv7/built-in.o: In function `mx6_lpddr2_cfg': > +arch/arm/cpu/armv7/mx6/ddr.c:1175: undefined reference to `mdelay' > +arch/arm/cpu/armv7/built-in.o: In function `mx6_ddr3_cfg': > +arch/arm/cpu/armv7/mx6/ddr.c:1281: undefined reference to `hang' > +arch/arm/cpu/armv7/mx6/ddr.c:1480: undefined reference to `mdelay' > +arch/arm/cpu/armv7/built-in.o: In function `mx6_dram_cfg': > +arch/arm/cpu/armv7/mx6/ddr.c:1493: undefined reference to `hang' > > It looks strange, it is maybe due to the fact that I am rearranging the > order how I apply the patches because I see issues in other patchset. > But can you check it, please ? May be because of u-boot-imx/master is head, shall I try it on master instead of next? thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/21] imx6: Add Engicam i.CoreM6 QDL support
Hi Jagan, On 30/09/2016 08:44, Jagan Teki wrote: > > Can you pick this series. Series cannot be applied: I see several issue. The series breaks for different reason a lot of boards. I get 3 boards broken and 15 with warnings. Here the resons: CONFIG_DEFAULT_FDT_FILE was moved to Kconfig, but without updating the boards that have already defined. This generated a duplication, for example : w+include/configs/mx53ard.h:84:0: warning: "CONFIG_DEFAULT_FDT_FILE" redefined [enabled by default] w+include/generated/autoconf.h:13:0: note: this is the location of the previous definition arm: + dms-ba16-1g +In file included from include/config.h:5:0, You have to move at the same time all CONFIG_DEFAULT_FDT_FILE from the board's config file to defconfig. I add at the same time build errors by compiling the new boards, for example: arm: + imx6qdl_icore_mmc +arch/arm/imx-common/cpu.c: At top level: +arch/arm/cpu/armv7/built-in.o: In function `lldiv': +include/div64.h:45: undefined reference to `__div64_32' +arch/arm/cpu/armv7/built-in.o: In function `lpddr2_rl': +arch/arm/cpu/armv7/mx6/ddr.c:943: undefined reference to `hang' +arch/arm/cpu/armv7/built-in.o: In function `mx6_lpddr2_cfg': +arch/arm/cpu/armv7/mx6/ddr.c:1175: undefined reference to `mdelay' +arch/arm/cpu/armv7/built-in.o: In function `mx6_ddr3_cfg': +arch/arm/cpu/armv7/mx6/ddr.c:1281: undefined reference to `hang' +arch/arm/cpu/armv7/mx6/ddr.c:1480: undefined reference to `mdelay' +arch/arm/cpu/armv7/built-in.o: In function `mx6_dram_cfg': +arch/arm/cpu/armv7/mx6/ddr.c:1493: undefined reference to `hang' It looks strange, it is maybe due to the fact that I am rearranging the order how I apply the patches because I see issues in other patchset. But can you check it, please ? Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ANN] U-Boot v2016.11-rc1 released
Hello Tom, Am 04.10.2016 um 14:29 schrieb Tom Rini: On Tue, Oct 04, 2016 at 07:52:35AM +0200, Heiko Schocher wrote: Hello Tom, Am 03.10.2016 um 15:39 schrieb Tom Rini: Hey all, It's release day and v2016.11-rc1 is out and the merge window is closed. I've updated git and the tarballs are also up now. I plan on doing -rc2 on the 17th. I know there's a good chunk of my patchwork queue that needs going over and bringing in, and I shall soon. Thanks all! Thanks for your work! Release works on the following boards: arch board AT91 : corvus and smartweb am335x : shc mpc5200: tqm5200 see: http://xeidos.ddns.net/tests/test_db_auslesen.php#102 and newer IDs ... Nice! BTW: The cyclic tests run each monday morning between 03:00 +0200 and 06:00 +0200, so if you do a release before, you can look if it works on this boards on monday morning ;-) I don't think I'm likely to move up to a Sunday release schedule but... if you move that window to Tuesday it should always catch releases :) I selected monday nights for automated tests, as this is the time with the lowest traffic in our lab ... but yes, why not, I moved the tests to tuesday nights. bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/10] dm: imx: serial: support device tree
Hi Stefan, On 29/08/2016 02:00, Stefan Agner wrote: >> >> I have applied it, I just noted a slight drawback because this breaks >> boards that do not have CONFIG_FIT set. > > Hm, maybe due to missing CONFIG_OF_LIBFDT? Do you want me to fix it, do > you have a certain board you can reproduce it? No, I have found it. The patchset breaks two boards (gwventana and cmx6), and the reason is that lib/fdtdec.c is not compiled. This is because CONFIG_OF_CONTROL is not set for these two boards, but as far as I understand this should be not set, because there is no device tree for these two boards. The issue is generate by the feature use_dte: in fact: plat->use_dte = fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fsl,dte-mode"); but for boards without DT, fdtdec is not built and gd->fdt_blob is maybe not set. Can you take a look ? What do you think about it ? The second issue is related to CONFIG_CUSTOM_BOARDINFO: arm: + colibri_imx7 +Error: You must add new CONFIG options using Kconfig +The following new ad-hoc CONFIG options were detected: +CONFIG_CUSTOM_BOARDINFO + +Please add these via Kconfig instead. Find a suitable Kconfig +file and add a 'config' or 'menuconfig' option. This is related to: Author: Stefan Agner Date: Mon Aug 1 22:50:24 2016 -0700 configs: enable device tree for Colibri iMX7 Enable device tree configuration and specify default device tree for Toradex Colibri iMX7. Also configure CONFIG_CUSTOM_BOARDINFO to avoid that board info get printed twice (once from the device tree and one from the runtime detection in board specific code). Signed-off-by: Stefan Agner What about to split it ? I will let this patch to just enable the device tree, and let fix the double output with a follow up patch. What do you think ? Best regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY
Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.
This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt(). It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.
Signed-off-by: Masahiro Yamada
---
Kconfig | 5 ++---
arch/arm/lib/bootm-fdt.c | 2 --
arch/arm/lib/bootm.c | 2 --
arch/mips/lib/bootm.c| 2 --
common/fdt_support.c | 2 ++
common/image-fdt.c | 7 +--
include/fdt_support.h| 8
7 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/Kconfig b/Kconfig
index 1263d0b..b7cb142 100644
--- a/Kconfig
+++ b/Kconfig
@@ -324,9 +324,8 @@ config SYS_CLK_FREQ
help
TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture
-config ARCH_FIXUP_FDT
- bool "Enable arch_fixup_fdt() call"
- depends on ARM || MIPS
+config ARCH_FIXUP_FDT_MEMORY
+ bool "Enable arch_fixup_memory_banks() call"
default y
help
Enable FDT memory map syncup before OS boot. This feature can be
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index a517550..4481f9e 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -25,7 +25,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_ARCH_FIXUP_FDT
int arch_fixup_fdt(void *blob)
{
bd_t *bd = gd->bd;
@@ -61,4 +60,3 @@ int arch_fixup_fdt(void *blob)
return 0;
}
-#endif
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 53c3141..0e890ce 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -372,10 +372,8 @@ void boot_prep_vxworks(bootm_headers_t *images)
if (images->ft_addr) {
off = fdt_path_offset(images->ft_addr, "/memory");
if (off < 0) {
-#ifdef CONFIG_ARCH_FIXUP_FDT
if (arch_fixup_fdt(images->ft_addr))
puts("## WARNING: fixup memory failed!\n");
-#endif
}
}
#endif
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 0c6a4ab..aa0475a 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -253,7 +253,6 @@ static int boot_reloc_fdt(bootm_headers_t *images)
#endif
}
-#ifdef CONFIG_ARCH_FIXUP_FDT
int arch_fixup_fdt(void *blob)
{
#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
@@ -265,7 +264,6 @@ int arch_fixup_fdt(void *blob)
return 0;
#endif
}
-#endif
static int boot_setup_fdt(bootm_headers_t *images)
{
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 2020586..c87031f 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -381,6 +381,7 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create);
}
+#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
/*
* fdt_pack_reg - pack address and size array into the "reg"-suitable stream
*/
@@ -459,6 +460,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64
size[], int banks)
}
return 0;
}
+#endif
int fdt_fixup_memory(void *blob, u64 start, u64 size)
{
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 3d23608..91970d4 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -458,6 +458,11 @@ __weak int ft_verify_fdt(void *fdt)
return 1;
}
+__weak int arch_fixup_fdt(void *blob)
+{
+ return 0;
+}
+
int image_setup_libfdt(bootm_headers_t *images, void *blob,
int of_size, struct lmb *lmb)
{
@@ -474,12 +479,10 @@ int image_setup_libfdt(bootm_headers_t *images, void
*blob,
printf("ERROR: /chosen node create failed\n");
goto err;
}
-#ifdef CONFIG_ARCH_FIXUP_FDT
if (arch_fixup_fdt(blob) < 0) {
printf("ERROR: arch-specific fdt fixup failed\n");
goto err;
}
-#endif
if (IMAGE_OF_BOARD_SETUP) {
fdt_ret = ft_board_setup(blob, gd->bd);
if (fdt_ret) {
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 8f40231..7110061 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -93,7 +93,15 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size);
* property will be left untouched.
* @return 0 if ok, or -1 or -FDT_ERR_... on error
*/
+#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks);
+#else
+static inline int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[],
+int banks)
+{
+ return 0;
+}
+#endif
void fdt_fixup_ethernet(void *fdt);
int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
--
1.9.1
___
[U-Boot] [PATCH][v2] armv8: ls1012a: Updating CONFIG_EXTRA_ENV_SETTINGS
Remove ramdisk_addr, ramdisk_size and update UART baud-rate. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Pratiyush Mohan Srivastava --- Changes for v2 : - Removed "initrd_high=0x\0" - Removed console variable include/configs/ls1012a_common.h | 4 1 file changed, 4 deletions(-) diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index af45993..02cbf5d 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -106,19 +106,15 @@ /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "initrd_high=0x\0" \ "verify=no\0" \ "hwconfig=fsl_ddr:bank_intlv=auto\0"\ "loadaddr=0x8010\0" \ "kernel_addr=0x10\0"\ - "ramdisk_addr=0x80\0" \ - "ramdisk_size=0x200\0" \ "fdt_high=0x\0" \ "initrd_high=0x\0" \ "kernel_start=0xa0\0" \ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ - "console=ttyAMA0,38400n8\0" #define CONFIG_BOOTARGS"console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500" -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 00/10] mx7: add dt support for Colibri iMX7S/iMX7D
On 03/10/2016 21:59, Stefan Agner wrote: > Hi Stefano, > > On 2016-08-26 06:25, Stefano Babic wrote: >> Hi Stefan, >> >> On 26/07/2016 08:22, Stefan Agner wrote: >>> From: Stefan Agner >>> >>> This patchset adds device tree support for Colibri iMX7S/iMX7D. >>> It is the first device tree enabled board for any i.MX 7 SoC >>> hence the patchset adds some common infrastructure: >>> - Add device tree support for serial_mxc. >>> - imx7.dtsi - I descided to leave the s/d suffix since the SoCs >>> are very similar and boards will likely use runtime detection >>> to distinguish the two available SoCs. >>> - The pinmux file imx7d-pinfunc.h is taken from the Kernel and >>> stored in the same place >>> >>> Otherwise the conversion is quite straightforward and simplified >>> the board code somewhat. Two patches enhance the board support >>> with PMIC support, which has been the driver for this conversion. >>> >>> -- >> >> >> Applied (whole series) to u-boot-imx, thanks ! > > I did not see this patch set in 2016.11-rc1, will it still make it > there? I check it - I have also a list of patches to be merged, I will go in and pick them. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Unable to boot from QSPI (u-boot 2016.11-rc1)
Hi all, I have a custom board based on Altera Cyclone V SoC, when I tried to boot from QSPI, it stuck in a boot loop, I try to enable some debug message, and here it is: U-Boot SPL 2016.09.01 (Oct 03 2016 - 18:14:42) drivers/ddr/altera/sequencer.c: Preparing to start memory calibration drivers/ddr/altera/sequencer.c: CALIBRATION PASSED drivers/ddr/altera/sequencer.c: Calibration complete bind node soc - found match at 'generic_simple_bus' bind node dwmmc0@ff704000 - found match at 'socfpga_dwmmc' Bound device dwmmc0@ff704000 to soc bind node spi@ff705000 - found match at 'cadence_spi' bind node n25q00@0 No match for node 'n25q00@0' Bound device spi@ff705000 to soc Bound device soc to root_driver Trying to boot from SPI Bound device spi_flash to spi@ff705000 SF: Got idcodes x: x x x x x .!.D u-boot from Altera working fine, but I plan to use the mainline u-boot. Any idea why it does not work? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 02/12] serial: ns16550: Support clocks via phandle
Hello,
I found that this commit breaks serial ns16550 driver on ARC.
I have investigated the issue and found that it is because ARC timer node in
device tree doesn't refer to any clock
devices.
In such case clk_get_by_index() returns -ENOENT error, but neither -ENODEV nor
-ENOSYS (as CONFIG_CLK is enabled for
ARC). So the error is not ignored and we exit with error instead of trying to
get "clock-frequency" property from the
device tree.
Thus I wonder why we ignore only ENOSYS and ENODEV errors and exit if any other
error code appears?
As shown in my example such behavior can lead to breakages.
What should we do if ENOENT occurs?
Thanks.
On Thu, 2016-09-08 at 07:47 +0100, Paul Burton wrote:
> Previously ns16550 compatible UARTs probed via device tree have needed
> their device tree nodes to contain a clock-frequency property. An
> alternative to this commonly used with Linux is to reference a clock via
> a phandle. This patch allows U-Boot to support that, retrieving the
> clock frequency by probing the appropriate clock device.
>
> For example, a system might choose to provide the UART base clock as a
> reference to a clock common to multiple devices:
>
> sys_clk: clock {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <1000>;
> };
>
> uart0: uart@1000 {
> compatible = "ns16550a";
> reg = <0x1000 0x1000>;
> clocks = <&sys_clk>;
> };
>
> uart1: uart@1000 {
> compatible = "ns16550a";
> reg = <0x10001000 0x1000>;
> clocks = <&sys_clk>;
> };
>
> This removes the need for the frequency information to be duplicated in
> multiple nodes and allows the device tree to be more descriptive of the
> system.
>
> Signed-off-by: Paul Burton
> Reviewed-by: Simon Glass
>
> ---
>
> Changes in v7:
> - Check clk_get_rate return for error values
>
> Changes in v6:
> - Ignore -ENOSYS from clk_get_by_index too, for systems with CONFIG_CLK=n
>
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Propogate non-ENODEV errors from clk_get_by_index
>
> drivers/serial/ns16550.c | 21 ++---
> 1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index 88fca15..3f6ea4d 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -5,6 +5,7 @@
> */
>
> #include
> +#include
> #include
> #include
> #include
> @@ -352,6 +353,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
> {
> struct ns16550_platdata *plat = dev->platdata;
> fdt_addr_t addr;
> + struct clk clk;
> + int err;
>
> /* try Processor Local Bus device first */
> addr = dev_get_addr(dev);
> @@ -397,9 +400,21 @@ int ns16550_serial_ofdata_to_platdata(struct udevice
> *dev)
> "reg-offset", 0);
> plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> "reg-shift", 0);
> - plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> - "clock-frequency",
> - CONFIG_SYS_NS16550_CLK);
> +
> + err = clk_get_by_index(dev, 0, &clk);
> + if (!err) {
> + err = clk_get_rate(&clk);
> + if (!IS_ERR_VALUE(err))
> + plat->clock = err;
> + } else if (err != -ENODEV && err != -ENOSYS) {
> + debug("ns16550 failed to get clock\n");
> + return err;
> + }
> +
> + if (!plat->clock)
> + plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> + "clock-frequency",
> + CONFIG_SYS_NS16550_CLK);
> if (!plat->clock) {
> debug("ns16550 clock not defined\n");
> return -EINVAL;
--
Best regards,
Vlad Zakharov
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[U-Boot] Unable to boot from QSPI (u-boot 2016.09.01)
Hi all, I have a custom board based on Altera Cyclone V SoC, when I tried to boot from QSPI, it stuck in a boot loop, I try to enable some debug message, and here it is: U-Boot SPL 2016.09.01 (Oct 03 2016 - 18:14:42) drivers/ddr/altera/sequencer.c: Preparing to start memory calibration drivers/ddr/altera/sequencer.c: CALIBRATION PASSED drivers/ddr/altera/sequencer.c: Calibration complete bind node soc - found match at 'generic_simple_bus' bind node dwmmc0@ff704000 - found match at 'socfpga_dwmmc' Bound device dwmmc0@ff704000 to soc bind node spi@ff705000 - found match at 'cadence_spi' bind node n25q00@0 No match for node 'n25q00@0' Bound device spi@ff705000 to soc Bound device soc to root_driver Trying to boot from SPI Bound device spi_flash to spi@ff705000 SF: Got idcodes x: x x x x x .!.D u-boot from Altera working fine, but I plan to use the mainline u-boot. Any idea why it does not work? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
