[U-Boot] [PATCH] spi: mxc_spi: support driver model

[Peng Fan]

Add driver model support for mxc spi driver.
Most functions are restructured to be reused by DM and non-DM.
Tested on mx6slevk board.

Signed-off-by: Peng Fan 
Cc: Jagan Teki 
cc: Stefano Babic 
---
 drivers/spi/mxc_spi.c | 185 +-
 1 file changed, 152 insertions(+), 33 deletions(-)

diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index fc2786e..431e042 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -14,6 +15,8 @@
 #include 
 #include 
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_MX27
 /* i.MX27 has a completely wrong register layout and register definitions in 
the
  * datasheet, the correct one is in the Freescale's Linux driver */
@@ -22,10 +25,6 @@
 "See linux mxc_spi driver from Freescale for details."
 #endif
 
-static unsigned long spi_bases[] = {
-   MXC_SPI_BASE_ADDRESSES
-};
-
 __weak int board_spi_cs_gpio(unsigned bus, unsigned cs)
 {
return -1;
@@ -40,6 +39,8 @@ __weak int board_spi_cs_gpio(unsigned bus, unsigned cs)
 #define CONFIG_SYS_SPI_MXC_WAIT(CONFIG_SYS_HZ/100) /* 10 
ms */
 #endif
 
+#define MXC_SPI_MAX_FREQ   2000
+
 struct mxc_spi_slave {
struct spi_slave slave;
unsigned long   base;
@@ -51,6 +52,7 @@ struct mxc_spi_slave {
int ss_pol;
unsigned intmax_hz;
unsigned intmode;
+   struct gpio_desc ss;
 };
 
 static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
@@ -58,19 +60,24 @@ static inline struct mxc_spi_slave *to_mxc_spi_slave(struct 
spi_slave *slave)
return container_of(slave, struct mxc_spi_slave, slave);
 }
 
-void spi_cs_activate(struct spi_slave *slave)
+static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs)
 {
-   struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
-   if (mxcs->gpio > 0)
-   gpio_set_value(mxcs->gpio, mxcs->ss_pol);
+   if (CONFIG_IS_ENABLED(DM_SPI)) {
+   dm_gpio_set_value(>ss, mxcs->ss_pol);
+   } else {
+   if (mxcs->gpio > 0)
+   gpio_set_value(mxcs->gpio, mxcs->ss_pol);
+   }
 }
 
-void spi_cs_deactivate(struct spi_slave *slave)
+static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs)
 {
-   struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
-   if (mxcs->gpio > 0)
-   gpio_set_value(mxcs->gpio,
- !(mxcs->ss_pol));
+   if (CONFIG_IS_ENABLED(DM_SPI)) {
+   dm_gpio_set_value(>ss, !(mxcs->ss_pol));
+   } else {
+   if (mxcs->gpio > 0)
+   gpio_set_value(mxcs->gpio, !(mxcs->ss_pol));
+   }
 }
 
 u32 get_cspi_div(u32 div)
@@ -211,10 +218,9 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, 
unsigned int cs)
 }
 #endif
 
-int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
+int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen,
const u8 *dout, u8 *din, unsigned long flags)
 {
-   struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
int nbytes = DIV_ROUND_UP(bitlen, 8);
u32 data, cnt, i;
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
@@ -327,8 +333,9 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int 
bitlen,
 
 }
 
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
-   void *din, unsigned long flags)
+static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs,
+unsigned int bitlen, const void *dout,
+void *din, unsigned long flags)
 {
int n_bytes = DIV_ROUND_UP(bitlen, 8);
int n_bits;
@@ -337,11 +344,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int 
bitlen, const void *dout,
u8 *p_outbuf = (u8 *)dout;
u8 *p_inbuf = (u8 *)din;
 
-   if (!slave)
-   return -1;
+   if (!mxcs)
+   return -EINVAL;
 
if (flags & SPI_XFER_BEGIN)
-   spi_cs_activate(slave);
+   mxc_spi_cs_activate(mxcs);
 
while (n_bytes > 0) {
if (n_bytes < MAX_SPI_BYTES)
@@ -351,7 +358,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, 
const void *dout,
 
n_bits = blk_size * 8;
 
-   ret = spi_xchg_single(slave, n_bits, p_outbuf, p_inbuf, 0);
+   ret = spi_xchg_single(mxcs, n_bits, p_outbuf, p_inbuf, 0);
 
if (ret)
return ret;
@@ -363,12 +370,39 @@ int spi_xfer(struct spi_slave *slave, unsigned int 
bitlen, const void *dout,
}
 
if (flags & SPI_XFER_END) {
-   spi_cs_deactivate(slave);
+   mxc_spi_cs_deactivate(mxcs);
+   }
+
+   return 0;
+}
+
+static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int 

[U-Boot] [PATCH 3/3] imx: mx6slevk: enable more DM drivers

[Peng Fan]

Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. So needs to enable them together.

DM FEC and SPI are not enabled, but they use gpio in board code.
So use gpio_request first to request the gpio, because DM_GPIO
is enabled.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 board/freescale/mx6slevk/mx6slevk.c | 244 +++-
 configs/mx6slevk_defconfig  |  13 ++
 configs/mx6slevk_spinor_defconfig   |  13 ++
 configs/mx6slevk_spl_defconfig  |   2 +-
 include/configs/mx6slevk.h  |   7 --
 5 files changed, 130 insertions(+), 149 deletions(-)

diff --git a/board/freescale/mx6slevk/mx6slevk.c 
b/board/freescale/mx6slevk/mx6slevk.c
index 96c0e8c..d495433 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -47,11 +47,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
  PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
 
-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |  \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
 #define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
PAD_CTL_DSE_80ohm | PAD_CTL_HYS |   \
@@ -155,157 +150,55 @@ static void setup_iomux_fec(void)
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
 
/* Power up LAN8720 PHY */
+   gpio_request(ETH_PHY_POWER, "eth_pwr");
gpio_direction_output(ETH_PHY_POWER , 1);
udelay(15000);
 }
 
-#define USDHC1_CD_GPIO IMX_GPIO_NR(4, 7)
-#define USDHC2_CD_GPIO IMX_GPIO_NR(5, 0)
-#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 22)
-
-static struct fsl_esdhc_cfg usdhc_cfg[3] = {
-   {USDHC1_BASE_ADDR},
-   {USDHC2_BASE_ADDR, 0, 4},
-   {USDHC3_BASE_ADDR, 0, 4},
-};
-
 int board_mmc_get_env_dev(int devno)
 {
return devno;
 }
 
-int board_mmc_getcd(struct mmc *mmc)
+#ifdef CONFIG_DM_PMIC_PFUZE100
+int power_init_board(void)
 {
-   struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-   int ret = 0;
+   struct udevice *dev;
+   int ret;
+   u32 dev_id, rev_id, i;
+   u32 switch_num = 6;
+   u32 offset = PFUZE100_SW1CMODE;
 
-   switch (cfg->esdhc_base) {
-   case USDHC1_BASE_ADDR:
-   ret = !gpio_get_value(USDHC1_CD_GPIO);
-   break;
-   case USDHC2_BASE_ADDR:
-   ret = !gpio_get_value(USDHC2_CD_GPIO);
-   break;
-   case USDHC3_BASE_ADDR:
-   ret = !gpio_get_value(USDHC3_CD_GPIO);
-   break;
-   }
-
-   return ret;
-}
+   ret = pmic_get("pfuze100", );
+   if (ret == -ENODEV)
+   return 0;
 
-int board_mmc_init(bd_t *bis)
-{
-#ifndef CONFIG_SPL_BUILD
-   int i, ret;
-
-   /*
-* According to the board_mmc_init() the following map is done:
-* (U-Boot device node)(Physical Port)
-* mmc0USDHC1
-* mmc1USDHC2
-* mmc2USDHC3
-*/
-   for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-   switch (i) {
-   case 0:
-   imx_iomux_v3_setup_multiple_pads(
-   usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
-   gpio_direction_input(USDHC1_CD_GPIO);
-   usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-   break;
-   case 1:
-   imx_iomux_v3_setup_multiple_pads(
-   usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
-   gpio_direction_input(USDHC2_CD_GPIO);
-   usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-   break;
-   case 2:
-   imx_iomux_v3_setup_multiple_pads(
-   usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
-   gpio_direction_input(USDHC3_CD_GPIO);
-   usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-   break;
-   default:
-   printf("Warning: you configured more USDHC controllers"
-   "(%d) than supported by the board\n", i + 1);
-   return -EINVAL;
-   }
-
-   ret = fsl_esdhc_initialize(bis, _cfg[i]);
-   if (ret) {
-   printf("Warning: failed to initialize "
-   "mmc dev %d\n", i);
-   return ret;
-   }
-   }
+   if (ret != 0)
+   return ret;
 
-   return 0;
-#else
-   struct src *src_regs = (struct src *)SRC_BASE_ADDR;

[U-Boot] [PATCH 1/3] imx: mx6slevk: use SPI_BOOT

[Peng Fan]

Use SPI_BOOT instead of SYS_BOOT_SPINOR.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 configs/mx6slevk_spinor_defconfig | 3 ++-
 include/configs/mx6slevk.h| 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/configs/mx6slevk_spinor_defconfig 
b/configs/mx6slevk_spinor_defconfig
index 7c0a3a8..e1c9118 100644
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -1,7 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SLEVK=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL,SYS_BOOT_SPINOR"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
+CONFIG_SPI_BOOT=y
 CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 3e7e5a3..19dcc5c 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -145,7 +145,7 @@
 /* Environment organization */
 #define CONFIG_ENV_SIZESZ_8K
 
-#if defined CONFIG_SYS_BOOT_SPINOR
+#if defined CONFIG_SPI_BOOT
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_OFFSET   (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE(64 * 1024)
-- 
2.6.2

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Re: [U-Boot] [ PATCH 1/2] net: fix cache misaligned issue in Broadcom SF2 driver

[Steve Rae]

On Fri, Mar 3, 2017 at 5:06 PM, Steve Rae  wrote:

> From: Suji Velupillai 
>
> Fixed cache misaligned issue in the net driver. The issue shows-up when
> a call to flush_dcache_range is made with unaligned memory. The memory
> must be aligned to ARCH_DMA_MINALIGN.
>
> Signed-off-by: Suji Velupillai 
> Tested-by: Suji Velupillai 
> Reviewed-by: Arun Parameswaran 
> Reviewed-by: JD Zheng 
> Reviewed-by: Shamez Kurji 
> Signed-off-by: Steve Rae 
>
> Cover Letter:
> This series resolves issues specific to the Broadcom SF2 driver:
> - fix cache misaligned issue
> - convert to Kconfig
> END
>
> Needs to be "Cover-letter:"
- I'll update this in V2

> ---
>
>  drivers/net/bcm-sf2-eth-gmac.c | 113 +-
> ---
>  drivers/net/bcm-sf2-eth.h  |   4 +-
>  2 files changed, 60 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-
> gmac.c
> index f2853cf..9ff72fa 100644
> --- a/drivers/net/bcm-sf2-eth-gmac.c
> +++ b/drivers/net/bcm-sf2-eth-gmac.c
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright 2014 Broadcom Corporation.
> + * Copyright 2014-2017 Broadcom.
>   *
>   * SPDX-License-Identifier:GPL-2.0+
>   */
> @@ -28,6 +28,10 @@
> } \
>  }
>
> +#define RX_BUF_SIZE_ALIGNEDALIGN(RX_BUF_SIZE, ARCH_DMA_MINALIGN)
> +#define TX_BUF_SIZE_ALIGNEDALIGN(TX_BUF_SIZE, ARCH_DMA_MINALIGN)
> +#define DESCP_SIZE_ALIGNED ALIGN(sizeof(dma64dd_t), ARCH_DMA_MINALIGN)
> +
>  static int gmac_disable_dma(struct eth_dma *dma, int dir);
>  static int gmac_enable_dma(struct eth_dma *dma, int dir);
>
> @@ -114,7 +118,7 @@ static void dma_tx_dump(struct eth_dma *dma)
> printf("TX Buffers:\n");
> /* Initialize TX DMA descriptor table */
> for (i = 0; i < TX_BUF_NUM; i++) {
> -   bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE);
> +   bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE_ALIGNED);
> printf("buf%d:0x%x; ", i, (uint32_t)bufp);
> }
> printf("\n");
> @@ -145,7 +149,7 @@ static void dma_rx_dump(struct eth_dma *dma)
>
> printf("RX Buffers:\n");
> for (i = 0; i < RX_BUF_NUM; i++) {
> -   bufp = dma->rx_buf + i * RX_BUF_SIZE;
> +   bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED;
> printf("buf%d:0x%x; ", i, (uint32_t)bufp);
> }
> printf("\n");
> @@ -163,15 +167,15 @@ static int dma_tx_init(struct eth_dma *dma)
>
> /* clear descriptor memory */
> memset((void *)(dma->tx_desc_aligned), 0,
> -  TX_BUF_NUM * sizeof(dma64dd_t));
> -   memset(dma->tx_buf, 0, TX_BUF_NUM * TX_BUF_SIZE);
> +  TX_BUF_NUM * DESCP_SIZE_ALIGNED);
> +   memset(dma->tx_buf, 0, TX_BUF_NUM * TX_BUF_SIZE_ALIGNED);
>
> /* Initialize TX DMA descriptor table */
> for (i = 0; i < TX_BUF_NUM; i++) {
> descp = (dma64dd_t *)(dma->tx_desc_aligned) + i;
> -   bufp = dma->tx_buf + i * TX_BUF_SIZE;
> +   bufp = dma->tx_buf + i * TX_BUF_SIZE_ALIGNED;
> /* clear buffer memory */
> -   memset((void *)bufp, 0, TX_BUF_SIZE);
> +   memset((void *)bufp, 0, TX_BUF_SIZE_ALIGNED);
>
> ctrl = 0;
> /* if last descr set endOfTable */
> @@ -187,10 +191,11 @@ static int dma_tx_init(struct eth_dma *dma)
> descp = dma->tx_desc_aligned;
> bufp = dma->tx_buf;
> flush_dcache_range((unsigned long)descp,
> -  (unsigned long)(descp +
> -  sizeof(dma64dd_t) *
> TX_BUF_NUM));
> -   flush_dcache_range((unsigned long)(bufp),
> -  (unsigned long)(bufp + TX_BUF_SIZE *
> TX_BUF_NUM));
> +  (unsigned long)descp +
> +  DESCP_SIZE_ALIGNED * TX_BUF_NUM);
> +   flush_dcache_range((unsigned long)bufp,
> +  (unsigned long)bufp +
> +  TX_BUF_SIZE_ALIGNED * TX_BUF_NUM);
>
> /* initialize the DMA channel */
> writel((uint32_t)(dma->tx_desc_aligned),
> GMAC0_DMA_TX_ADDR_LOW_ADDR);
> @@ -215,20 +220,20 @@ static int dma_rx_init(struct eth_dma *dma)
>
> /* clear descriptor memory */
> memset((void *)(dma->rx_desc_aligned), 0,
> -  RX_BUF_NUM * sizeof(dma64dd_t));
> +  RX_BUF_NUM * DESCP_SIZE_ALIGNED);
> /* clear buffer memory */
> -   memset(dma->rx_buf, 0, RX_BUF_NUM * RX_BUF_SIZE);
> +   memset(dma->rx_buf, 0, RX_BUF_NUM * RX_BUF_SIZE_ALIGNED);
>
> /* Initialize RX DMA descriptor table */
> for (i = 0; i < RX_BUF_NUM; i++) {
> descp = (dma64dd_t *)(dma->rx_desc_aligned) + 

[U-Boot] [ PATCH 2/2] net: move Broadcom SF2 driver to Kconfig

[Steve Rae]

From: Suji Velupillai 

move to Kconfig:
CONFIG_BCM_SF2_ETH
CONFIG_BCM_SF2_ETH_GMAC

Also modified defconfigs of all platforms that use these configs.

Signed-off-by: Suji Velupillai 
Tested-by: Suji Velupillai 
Reviewed-by: JD Zheng 
Reviewed-by: Scott Branden 
Signed-off-by: Steve Rae 
---

 arch/arm/include/asm/arch-bcmcygnus/configs.h |  6 +-
 configs/bcm28155_w1d_defconfig|  5 +++--
 configs/bcm911360_entphn-ns_defconfig |  3 +++
 configs/bcm911360_entphn_defconfig|  3 +++
 configs/bcm911360k_defconfig  |  3 +++
 configs/bcm958300k-ns_defconfig   |  3 +++
 configs/bcm958300k_defconfig  |  3 +++
 configs/bcm958305k_defconfig  |  3 +++
 drivers/net/Kconfig   | 15 +++
 scripts/config_whitelist.txt  |  2 --
 10 files changed, 37 insertions(+), 9 deletions(-)

diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h 
b/arch/arm/include/asm/arch-bcmcygnus/configs.h
index af7f3bf..92b1c5e 100644
--- a/arch/arm/include/asm/arch-bcmcygnus/configs.h
+++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2014 Broadcom Corporation.
+ * Copyright 2014-2017 Broadcom.
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
@@ -23,10 +23,6 @@
 #define CONFIG_SYS_NS16550_COM30x18023000
 
 /* Ethernet */
-#define CONFIG_BCM_SF2_ETH
-#define CONFIG_BCM_SF2_ETH_GMAC
-
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_BROADCOM
 #define CONFIG_PHY_RESET_DELAY 1 /* PHY reset delay in us*/
 
diff --git a/configs/bcm28155_w1d_defconfig b/configs/bcm28155_w1d_defconfig
index aa5216e..4adbce6 100644
--- a/configs/bcm28155_w1d_defconfig
+++ b/configs/bcm28155_w1d_defconfig
@@ -1,7 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
 CONFIG_TARGET_BCM28155_AP=y
-CONFIG_SYS_EXTRA_OPTIONS="BCM_SF2_ETH,BCM_SF2_ETH_GMAC"
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -15,7 +14,6 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_FAT=y
@@ -33,3 +31,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0x0d02
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
diff --git a/configs/bcm911360_entphn-ns_defconfig 
b/configs/bcm911360_entphn-ns_defconfig
index adcc152..f1df78a 100644
--- a/configs/bcm911360_entphn-ns_defconfig
+++ b/configs/bcm911360_entphn-ns_defconfig
@@ -19,3 +19,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
diff --git a/configs/bcm911360_entphn_defconfig 
b/configs/bcm911360_entphn_defconfig
index e49071d..22da69e 100644
--- a/configs/bcm911360_entphn_defconfig
+++ b/configs/bcm911360_entphn_defconfig
@@ -19,3 +19,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
diff --git a/configs/bcm911360k_defconfig b/configs/bcm911360k_defconfig
index 8077c4a..0281fc8 100644
--- a/configs/bcm911360k_defconfig
+++ b/configs/bcm911360k_defconfig
@@ -19,3 +19,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
diff --git a/configs/bcm958300k-ns_defconfig b/configs/bcm958300k-ns_defconfig
index 26d0b0b..c837721 100644
--- a/configs/bcm958300k-ns_defconfig
+++ b/configs/bcm958300k-ns_defconfig
@@ -19,3 +19,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig
index 8077c4a..0281fc8 100644
--- a/configs/bcm958300k_defconfig
+++ b/configs/bcm958300k_defconfig
@@ -19,3 +19,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
diff --git a/configs/bcm958305k_defconfig b/configs/bcm958305k_defconfig
index 8077c4a..0281fc8 100644
--- a/configs/bcm958305k_defconfig
+++ b/configs/bcm958305k_defconfig
@@ -19,3 +19,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 70e3661..34c4f23 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -40,6 +40,21 @@ config ALTERA_TSE
  Please find details on the "Triple-Speed Ethernet MegaCore 

[U-Boot] [ PATCH 1/2] net: fix cache misaligned issue in Broadcom SF2 driver

[Steve Rae]

From: Suji Velupillai 

Fixed cache misaligned issue in the net driver. The issue shows-up when
a call to flush_dcache_range is made with unaligned memory. The memory
must be aligned to ARCH_DMA_MINALIGN.

Signed-off-by: Suji Velupillai 
Tested-by: Suji Velupillai 
Reviewed-by: Arun Parameswaran 
Reviewed-by: JD Zheng 
Reviewed-by: Shamez Kurji 
Signed-off-by: Steve Rae 

Cover Letter:
This series resolves issues specific to the Broadcom SF2 driver:
- fix cache misaligned issue
- convert to Kconfig
END

---

 drivers/net/bcm-sf2-eth-gmac.c | 113 +
 drivers/net/bcm-sf2-eth.h  |   4 +-
 2 files changed, 60 insertions(+), 57 deletions(-)

diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c
index f2853cf..9ff72fa 100644
--- a/drivers/net/bcm-sf2-eth-gmac.c
+++ b/drivers/net/bcm-sf2-eth-gmac.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2014 Broadcom Corporation.
+ * Copyright 2014-2017 Broadcom.
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
@@ -28,6 +28,10 @@
} \
 }
 
+#define RX_BUF_SIZE_ALIGNEDALIGN(RX_BUF_SIZE, ARCH_DMA_MINALIGN)
+#define TX_BUF_SIZE_ALIGNEDALIGN(TX_BUF_SIZE, ARCH_DMA_MINALIGN)
+#define DESCP_SIZE_ALIGNED ALIGN(sizeof(dma64dd_t), ARCH_DMA_MINALIGN)
+
 static int gmac_disable_dma(struct eth_dma *dma, int dir);
 static int gmac_enable_dma(struct eth_dma *dma, int dir);
 
@@ -114,7 +118,7 @@ static void dma_tx_dump(struct eth_dma *dma)
printf("TX Buffers:\n");
/* Initialize TX DMA descriptor table */
for (i = 0; i < TX_BUF_NUM; i++) {
-   bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE);
+   bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE_ALIGNED);
printf("buf%d:0x%x; ", i, (uint32_t)bufp);
}
printf("\n");
@@ -145,7 +149,7 @@ static void dma_rx_dump(struct eth_dma *dma)
 
printf("RX Buffers:\n");
for (i = 0; i < RX_BUF_NUM; i++) {
-   bufp = dma->rx_buf + i * RX_BUF_SIZE;
+   bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED;
printf("buf%d:0x%x; ", i, (uint32_t)bufp);
}
printf("\n");
@@ -163,15 +167,15 @@ static int dma_tx_init(struct eth_dma *dma)
 
/* clear descriptor memory */
memset((void *)(dma->tx_desc_aligned), 0,
-  TX_BUF_NUM * sizeof(dma64dd_t));
-   memset(dma->tx_buf, 0, TX_BUF_NUM * TX_BUF_SIZE);
+  TX_BUF_NUM * DESCP_SIZE_ALIGNED);
+   memset(dma->tx_buf, 0, TX_BUF_NUM * TX_BUF_SIZE_ALIGNED);
 
/* Initialize TX DMA descriptor table */
for (i = 0; i < TX_BUF_NUM; i++) {
descp = (dma64dd_t *)(dma->tx_desc_aligned) + i;
-   bufp = dma->tx_buf + i * TX_BUF_SIZE;
+   bufp = dma->tx_buf + i * TX_BUF_SIZE_ALIGNED;
/* clear buffer memory */
-   memset((void *)bufp, 0, TX_BUF_SIZE);
+   memset((void *)bufp, 0, TX_BUF_SIZE_ALIGNED);
 
ctrl = 0;
/* if last descr set endOfTable */
@@ -187,10 +191,11 @@ static int dma_tx_init(struct eth_dma *dma)
descp = dma->tx_desc_aligned;
bufp = dma->tx_buf;
flush_dcache_range((unsigned long)descp,
-  (unsigned long)(descp +
-  sizeof(dma64dd_t) * TX_BUF_NUM));
-   flush_dcache_range((unsigned long)(bufp),
-  (unsigned long)(bufp + TX_BUF_SIZE * TX_BUF_NUM));
+  (unsigned long)descp +
+  DESCP_SIZE_ALIGNED * TX_BUF_NUM);
+   flush_dcache_range((unsigned long)bufp,
+  (unsigned long)bufp +
+  TX_BUF_SIZE_ALIGNED * TX_BUF_NUM);
 
/* initialize the DMA channel */
writel((uint32_t)(dma->tx_desc_aligned), GMAC0_DMA_TX_ADDR_LOW_ADDR);
@@ -215,20 +220,20 @@ static int dma_rx_init(struct eth_dma *dma)
 
/* clear descriptor memory */
memset((void *)(dma->rx_desc_aligned), 0,
-  RX_BUF_NUM * sizeof(dma64dd_t));
+  RX_BUF_NUM * DESCP_SIZE_ALIGNED);
/* clear buffer memory */
-   memset(dma->rx_buf, 0, RX_BUF_NUM * RX_BUF_SIZE);
+   memset(dma->rx_buf, 0, RX_BUF_NUM * RX_BUF_SIZE_ALIGNED);
 
/* Initialize RX DMA descriptor table */
for (i = 0; i < RX_BUF_NUM; i++) {
descp = (dma64dd_t *)(dma->rx_desc_aligned) + i;
-   bufp = dma->rx_buf + i * RX_BUF_SIZE;
+   bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED;
ctrl = 0;
/* if last descr set endOfTable */
if (i == (RX_BUF_NUM - 1))
ctrl = D64_CTRL1_EOT;
descp->ctrl1 = ctrl;
-   

[U-Boot] [PATCH 5/5] omap4: Migrate to using imply

[Tom Rini]

Move the default y options under arch/arm/mach-omap2/omap4/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini 
---
 arch/arm/Kconfig  | 12 
 arch/arm/mach-omap2/omap4/Kconfig | 36 
 2 files changed, 12 insertions(+), 36 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index afb49fe5e5ef..7022e2af847e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -586,6 +586,18 @@ config OMAP44XX
bool "OMAP44XX SoC"
select ARCH_OMAP2
select USE_TINY_PRINTF
+   imply SPL_DISPLAY_PRINT
+   imply SPL_EXT_SUPPORT
+   imply SPL_FAT_SUPPORT
+   imply SPL_GPIO_SUPPORT
+   imply SPL_I2C_SUPPORT
+   imply SPL_LIBCOMMON_SUPPORT
+   imply SPL_LIBDISK_SUPPORT
+   imply SPL_LIBGENERIC_SUPPORT
+   imply SPL_MMC_SUPPORT
+   imply SPL_NAND_SUPPORT
+   imply SPL_POWER_SUPPORT
+   imply SPL_SERIAL_SUPPORT
 
 config OMAP54XX
bool "OMAP54XX SoC"
diff --git a/arch/arm/mach-omap2/omap4/Kconfig 
b/arch/arm/mach-omap2/omap4/Kconfig
index 2091dd781512..49adb8ec5be3 100644
--- a/arch/arm/mach-omap2/omap4/Kconfig
+++ b/arch/arm/mach-omap2/omap4/Kconfig
@@ -1,41 +1,5 @@
 if OMAP44XX
 
-config SPL_EXT_SUPPORT
-   default y
-
-config SPL_FAT_SUPPORT
-   default y
-
-config SPL_GPIO_SUPPORT
-   default y
-
-config SPL_I2C_SUPPORT
-   default y
-
-config SPL_LIBCOMMON_SUPPORT
-   default y
-
-config SPL_LIBDISK_SUPPORT
-   default y
-
-config SPL_LIBGENERIC_SUPPORT
-   default y
-
-config SPL_MMC_SUPPORT
-   default y
-
-config SPL_NAND_SUPPORT
-   default y
-
-config SPL_POWER_SUPPORT
-   default y
-
-config SPL_SERIAL_SUPPORT
-   default y
-
-config SPL_DISPLAY_PRINT
-   default y
-
 choice
prompt "OMAP4 board select"
optional
-- 
1.9.1

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[U-Boot] [PATCH 4/5] omap3: Migrate to using imply

[Tom Rini]

Move the default y options under arch/arm/mach-omap2/omap3/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini 
---
 arch/arm/Kconfig  | 11 +++
 arch/arm/mach-omap2/omap3/Kconfig | 33 -
 2 files changed, 11 insertions(+), 33 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5e1838474e33..afb49fe5e5ef 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -570,6 +570,17 @@ config OMAP34XX
bool "OMAP34XX SoC"
select ARCH_OMAP2
select USE_TINY_PRINTF
+   imply SPL_EXT_SUPPORT
+   imply SPL_FAT_SUPPORT
+   imply SPL_GPIO_SUPPORT
+   imply SPL_I2C_SUPPORT
+   imply SPL_LIBCOMMON_SUPPORT
+   imply SPL_LIBDISK_SUPPORT
+   imply SPL_LIBGENERIC_SUPPORT
+   imply SPL_MMC_SUPPORT
+   imply SPL_NAND_SUPPORT
+   imply SPL_POWER_SUPPORT
+   imply SPL_SERIAL_SUPPORT
 
 config OMAP44XX
bool "OMAP44XX SoC"
diff --git a/arch/arm/mach-omap2/omap3/Kconfig 
b/arch/arm/mach-omap2/omap3/Kconfig
index 4a7957fde85d..933fcba37cf5 100644
--- a/arch/arm/mach-omap2/omap3/Kconfig
+++ b/arch/arm/mach-omap2/omap3/Kconfig
@@ -1,38 +1,5 @@
 if OMAP34XX
 
-config SPL_EXT_SUPPORT
-   default y
-
-config SPL_FAT_SUPPORT
-   default y
-
-config SPL_GPIO_SUPPORT
-   default y
-
-config SPL_I2C_SUPPORT
-   default y
-
-config SPL_LIBCOMMON_SUPPORT
-   default y
-
-config SPL_LIBDISK_SUPPORT
-   default y
-
-config SPL_LIBGENERIC_SUPPORT
-   default y
-
-config SPL_MMC_SUPPORT
-   default y
-
-config SPL_NAND_SUPPORT
-   default y
-
-config SPL_POWER_SUPPORT
-   default y
-
-config SPL_SERIAL_SUPPORT
-   default y
-
 choice
prompt "OMAP3 board select"
optional
-- 
1.9.1

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[U-Boot] [PATCH 2/5] am335x_evm: Switch to using imply keyword

[Tom Rini]

These particular SPL options are part of what the ROM provides, but for
compatibility with how we have previously used them, move them to being
implied by the board being selected.

Signed-off-by: Tom Rini 
---
 arch/arm/mach-omap2/am33xx/Kconfig | 3 +++
 board/ti/am335x/Kconfig| 9 -
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx/Kconfig 
b/arch/arm/mach-omap2/am33xx/Kconfig
index 5b5d3f8cec29..5adcead185de 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -15,6 +15,9 @@ config TARGET_AM335X_EVM
select DM_SERIAL
select DM_GPIO
select TI_I2C_BOARD_DETECT
+   imply SPL_YMODEM_SUPPORT
+   imply SPL_ENV_SUPPORT
+   imply SPL_WATCHDOG_SUPPORT
help
  This option specifies support for the AM335x
  GP and HS EVM development platforms. The AM335x
diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig
index a84e91b3dc56..97374bdc12ae 100644
--- a/board/ti/am335x/Kconfig
+++ b/board/ti/am335x/Kconfig
@@ -1,14 +1,5 @@
 if TARGET_AM335X_EVM
 
-config SPL_ENV_SUPPORT
-   default y
-
-config SPL_WATCHDOG_SUPPORT
-   default y
-
-config SPL_YMODEM_SUPPORT
-   default y
-
 config SYS_BOARD
default "am335x"
 
-- 
1.9.1

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[U-Boot] [PATCH 3/5] TI: Migrate board/ti/common/Kconfig to imply

[Tom Rini]

The option that we had set in board/ti/common/Kconfig as default y are
best done with imply under the appropriate main Kconfig option instead.

Signed-off-by: Tom Rini 
---
 arch/arm/Kconfig   | 13 +
 arch/arm/mach-omap2/am33xx/Kconfig | 36 ++--
 arch/arm/mach-omap2/omap5/Kconfig  | 36 
 board/ti/common/Kconfig| 36 
 4 files changed, 39 insertions(+), 82 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e84b74efb664..5e1838474e33 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -579,6 +579,19 @@ config OMAP44XX
 config OMAP54XX
bool "OMAP54XX SoC"
select ARCH_OMAP2
+   imply SPL_DISPLAY_PRINT
+   imply SPL_ENV_SUPPORT
+   imply SPL_EXT_SUPPORT
+   imply SPL_FAT_SUPPORT
+   imply SPL_GPIO_SUPPORT
+   imply SPL_I2C_SUPPORT
+   imply SPL_LIBCOMMON_SUPPORT
+   imply SPL_LIBDISK_SUPPORT
+   imply SPL_LIBGENERIC_SUPPORT
+   imply SPL_MMC_SUPPORT
+   imply SPL_NAND_SUPPORT
+   imply SPL_POWER_SUPPORT
+   imply SPL_SERIAL_SUPPORT
 
 config AM43XX
bool "AM43XX SoC"
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig 
b/arch/arm/mach-omap2/am33xx/Kconfig
index 5adcead185de..865a8d2d04ac 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -15,9 +15,20 @@ config TARGET_AM335X_EVM
select DM_SERIAL
select DM_GPIO
select TI_I2C_BOARD_DETECT
-   imply SPL_YMODEM_SUPPORT
imply SPL_ENV_SUPPORT
+   imply SPL_EXT_SUPPORT
+   imply SPL_FAT_SUPPORT
+   imply SPL_GPIO_SUPPORT
+   imply SPL_I2C_SUPPORT
+   imply SPL_LIBCOMMON_SUPPORT
+   imply SPL_LIBDISK_SUPPORT
+   imply SPL_LIBGENERIC_SUPPORT
+   imply SPL_MMC_SUPPORT
+   imply SPL_NAND_SUPPORT
+   imply SPL_POWER_SUPPORT
+   imply SPL_SERIAL_SUPPORT
imply SPL_WATCHDOG_SUPPORT
+   imply SPL_YMODEM_SUPPORT
help
  This option specifies support for the AM335x
  GP and HS EVM development platforms. The AM335x
@@ -104,19 +115,24 @@ endif
 
 if AM43XX
 
-config SPL_EXT_SUPPORT
-   default y
-
-config SPL_GPIO_SUPPORT
-   default y
-
-config SPL_I2C_SUPPORT
-   default y
-
 config TARGET_AM43XX_EVM
bool "Support am43xx_evm"
select BOARD_LATE_INIT
select TI_I2C_BOARD_DETECT
+   imply SPL_ENV_SUPPORT
+   imply SPL_EXT_SUPPORT
+   imply SPL_FAT_SUPPORT
+   imply SPL_GPIO_SUPPORT
+   imply SPL_I2C_SUPPORT
+   imply SPL_LIBCOMMON_SUPPORT
+   imply SPL_LIBDISK_SUPPORT
+   imply SPL_LIBGENERIC_SUPPORT
+   imply SPL_MMC_SUPPORT
+   imply SPL_NAND_SUPPORT
+   imply SPL_POWER_SUPPORT
+   imply SPL_SERIAL_SUPPORT
+   imply SPL_WATCHDOG_SUPPORT
+   imply SPL_YMODEM_SUPPORT
help
  This option specifies support for the AM43xx
  GP and HS EVM development platforms.The AM437x
diff --git a/arch/arm/mach-omap2/omap5/Kconfig 
b/arch/arm/mach-omap2/omap5/Kconfig
index c5edc7c98d4d..4041adc9742e 100644
--- a/arch/arm/mach-omap2/omap5/Kconfig
+++ b/arch/arm/mach-omap2/omap5/Kconfig
@@ -1,41 +1,5 @@
 if OMAP54XX
 
-config SPL_EXT_SUPPORT
-   default y
-
-config SPL_FAT_SUPPORT
-   default y
-
-config SPL_GPIO_SUPPORT
-   default y
-
-config SPL_I2C_SUPPORT
-   default y
-
-config SPL_LIBCOMMON_SUPPORT
-   default y
-
-config SPL_LIBDISK_SUPPORT
-   default y
-
-config SPL_LIBGENERIC_SUPPORT
-   default y
-
-config SPL_MMC_SUPPORT
-   default y
-
-config SPL_NAND_SUPPORT
-   default y
-
-config SPL_POWER_SUPPORT
-   default y
-
-config SPL_SERIAL_SUPPORT
-   default y
-
-config SPL_DISPLAY_PRINT
-   default y
-
 choice
prompt "OMAP5 board select"
optional
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
index 4980a047143e..adf73abc9358 100644
--- a/board/ti/common/Kconfig
+++ b/board/ti/common/Kconfig
@@ -1,41 +1,5 @@
-config SPL_ENV_SUPPORT
-   default y
-
 config TI_I2C_BOARD_DETECT
bool "Support for Board detection for TI platforms"
help
   Support for detection board information on Texas Instrument's
   Evaluation Boards which have I2C based EEPROM detection
-
-config SPL_EXT_SUPPORT
-   default y
-
-config SPL_FAT_SUPPORT
-   default y
-
-config SPL_GPIO_SUPPORT
-   default y
-
-config SPL_I2C_SUPPORT
-   default y
-
-config SPL_LIBCOMMON_SUPPORT
-   default y
-
-config SPL_LIBDISK_SUPPORT
-   default y
-
-config SPL_LIBGENERIC_SUPPORT
-   default y
-
-config SPL_MMC_SUPPORT
-   default y
-
-config SPL_NAND_SUPPORT
-   default y
-
-config SPL_POWER_SUPPORT
-   default y
-
-config SPL_SERIAL_SUPPORT
-   default y
-- 
1.9.1

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[U-Boot] [PATCH 1/5] kconfiglib.py: Kludge in 'imply' support

[Tom Rini]

Currently upstream does not yet understand the imply keyword.  For what
we use kconfiglib.py for today, this is OK.  We only need to be able to
evaluate in order to make boards.cfg and none of those choices will
depend on how imply evaluates out.

Signed-off-by: Tom Rini 
---
 tools/buildman/kconfiglib.py | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py
index 7a47be9153f4..d28bbf0b49a2 100644
--- a/tools/buildman/kconfiglib.py
+++ b/tools/buildman/kconfiglib.py
@@ -892,7 +892,7 @@ class Config(object):
 
 line_feeder.unget()
 
-elif t0 == T_SELECT:
+elif t0 == T_SELECT or t0 == T_IMPLY:
 target = tokens.get_next()
 
 stmt.referenced_syms.add(target)
@@ -3406,8 +3406,8 @@ def _internal_error(msg):
  T_OPTIONAL, T_PROMPT, T_DEFAULT,
  T_BOOL, T_TRISTATE, T_HEX, T_INT, T_STRING,
  T_DEF_BOOL, T_DEF_TRISTATE,
- T_SELECT, T_RANGE, T_OPTION, T_ALLNOCONFIG_Y, T_ENV,
- T_DEFCONFIG_LIST, T_MODULES, T_VISIBLE) = range(39)
+ T_SELECT, T_IMPLY, T_RANGE, T_OPTION, T_ALLNOCONFIG_Y, T_ENV,
+ T_DEFCONFIG_LIST, T_MODULES, T_VISIBLE) = range(40)
 
 # The leading underscore before the function assignments below prevent pydoc
 # from listing them. The constants could be hidden too, but they're fairly
@@ -3424,8 +3424,9 @@ _get_keyword = \
"prompt": T_PROMPT, "default": T_DEFAULT, "bool": T_BOOL, "boolean": T_BOOL,
"tristate": T_TRISTATE, "int": T_INT, "hex": T_HEX, "def_bool": T_DEF_BOOL,
"def_tristate": T_DEF_TRISTATE, "string": T_STRING, "select": T_SELECT,
-   "range": T_RANGE, "option": T_OPTION, "allnoconfig_y": T_ALLNOCONFIG_Y,
-   "env": T_ENV, "defconfig_list": T_DEFCONFIG_LIST, "modules": T_MODULES,
+   "imply": T_IMPLY, "range": T_RANGE, "option": T_OPTION,
+   "allnoconfig_y": T_ALLNOCONFIG_Y, "env": T_ENV,
+   "defconfig_list": T_DEFCONFIG_LIST, "modules": T_MODULES,
"visible": T_VISIBLE}.get
 
 # Strings to use for True and False
-- 
1.9.1

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[U-Boot] [PATCH] sunxi: Add maintainer of the NanoPi NEO Air

[Jelle van der Waa]

Add myself as maintainer of the NanoPi NEO Air board.

Signed-off-by: Jelle van der Waa 
---
 board/sunxi/MAINTAINERS | 5 +
 1 file changed, 5 insertions(+)

diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 2321b8b08f..5ad40ab2a2 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -232,6 +232,11 @@ M: Jelle van der Waa 
 S: Maintained
 F: configs/nanopi_neo_defconfig
 
+NANOPI-NEO-AIR BOARD
+M: Jelle van der Waa 
+S: Maintained
+F: configs/nanopi_neo_air_defconfig
+
 NINTENDO NES CLASSIC EDITION BOARD
 M: FUKAUMI Naoki 
 S: Maintained
-- 
2.12.0

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Re: [U-Boot] [PATCH 04/17] SPL: FIT: factor out spl_load_fit_image()

[Franklin S Cooper Jr]

On 03/03/2017 10:56 AM, Andrew F. Davis wrote:
> On 02/28/2017 08:25 PM, Andre Przywara wrote:
>> At the moment we load two images from a FIT image: the actual U-Boot
>> image and the DTB. Both times we have very similar code to deal with
>> alignment requirement the media we load from imposes upon us.
>> Factor out this code into a new function, which we just call twice.
>>
>> Signed-off-by: Andre Przywara 
>> ---
> 
> Acked-by: Andrew F. Davis 
> 
> +Franklin,
> 
> This patch, and #12 look like something you would be interested in for
> your 66AK2G0x work.

I don't see that much similarity between what I need versus what this
patchset is doing. Although it would be nice if these functions were
broken out since I end up needing it for U-boot (non SPL).
> 
> Andrew
> 
>>  common/spl/spl_fit.c | 129 
>> +++
>>  1 file changed, 57 insertions(+), 72 deletions(-)
>>
>> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
>> index 572a5db..ad5ba15 100644
>> --- a/common/spl/spl_fit.c
>> +++ b/common/spl/spl_fit.c
>> @@ -18,7 +18,7 @@ static ulong fdt_getprop_u32(const void *fdt, int node, 
>> const char *prop)
>>  
>>  cell = fdt_getprop(fdt, node, prop, );
>>  if (len != sizeof(*cell))
>> -return -1U;
>> +return -1UL;
>>  return fdt32_to_cpu(*cell);
>>  }
>>  
>> @@ -139,19 +139,63 @@ static int get_aligned_image_size(struct spl_load_info 
>> *info, int data_size,
>>  return (data_size + info->bl_len - 1) / info->bl_len;
>>  }
>>  
>> +static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
>> +  void *fit, ulong base_offset, int node,
>> +  struct spl_image_info *image_info)
>> +{
>> +ulong offset;
>> +size_t length;
>> +ulong load_addr, load_ptr, entry;
>> +void *src;
>> +ulong overhead;
>> +int nr_sectors;
>> +int align_len = ARCH_DMA_MINALIGN - 1;
>> +
>> +offset = fdt_getprop_u32(fit, node, "data-offset") + base_offset;
>> +length = fdt_getprop_u32(fit, node, "data-size");
>> +load_addr = fdt_getprop_u32(fit, node, "load");
>> +if (load_addr == -1UL && image_info)
>> +load_addr = image_info->load_addr;
>> +load_ptr = (load_addr + align_len) & ~align_len;
>> +entry = fdt_getprop_u32(fit, node, "entry");
>> +
>> +overhead = get_aligned_image_overhead(info, offset);
>> +nr_sectors = get_aligned_image_size(info, length, offset);
>> +
>> +if (info->read(info, sector + get_aligned_image_offset(info, offset),
>> +   nr_sectors, (void*)load_ptr) != nr_sectors)
>> +return -EIO;
>> +debug("image: dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
>> +  (unsigned long)length);
>> +
>> +src = (void *)load_ptr + overhead;
>> +#ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
>> +board_fit_image_post_process(, );
>> +#endif
>> +
>> +memcpy((void*)load_addr, src, length);
>> +
>> +if (image_info) {
>> +image_info->load_addr = load_addr;
>> +image_info->size = length;
>> +if (entry == -1UL)
>> +image_info->entry_point = load_addr;
>> +else
>> +image_info->entry_point = entry;
>> +}
>> +
>> +return 0;
>> +}
>> +
>>  int spl_load_simple_fit(struct spl_image_info *spl_image,
>>  struct spl_load_info *info, ulong sector, void *fit)
>>  {
>>  int sectors;
>> -ulong size, load;
>> +ulong size;
>>  unsigned long count;
>> +struct spl_image_info image_info;
>>  int node, images;
>> -void *load_ptr;
>> -int fdt_offset, fdt_len;
>> -int data_offset, data_size;
>>  int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
>> -int src_sector;
>> -void *dst, *src;
>>  
>>  /*
>>   * Figure out where the external images start. This is the base for the
>> @@ -203,82 +247,23 @@ int spl_load_simple_fit(struct spl_image_info 
>> *spl_image,
>>  return -1;
>>  }
>>  
>> -/* Get its information and set up the spl_image structure */
>> -data_offset = fdt_getprop_u32(fit, node, "data-offset");
>> -data_size = fdt_getprop_u32(fit, node, "data-size");
>> -load = fdt_getprop_u32(fit, node, "load");
>> -debug("data_offset=%x, data_size=%x\n", data_offset, data_size);
>> -spl_image->load_addr = load;
>> -spl_image->entry_point = load;
>> +/* Load the image and set up the spl_image structure */
>> +spl_load_fit_image(info, sector, fit, base_offset, node, spl_image);
>>  spl_image->os = IH_OS_U_BOOT;
>>  
>> -/*
>> - * Work out where to place the image. We read it so that the first
>> - * byte will be at 'load'. This may mean we need to load it starting
>> - * before then, since we can only read whole blocks.
>> - */
>> -data_offset += base_offset;
>> -sectors = get_aligned_image_size(info, 

Re: [U-Boot] arm: cache: misaligned operation with fastboot

[Gary Bisson]

Hi Steve,

On Fri, Mar 3, 2017 at 12:03 AM, Steve Rae  wrote:
>
> Hi Gary,
>
> On Thu, Mar 2, 2017 at 3:12 AM, Lukasz Majewski  wrote:
>>
>> Hi,
>>
>> > Hi Fabio, Lukasz,
>> >
>> > On Wed, Feb 15, 2017 at 02:24:40PM -0200, Fabio Estevam wrote:
>> > > On Wed, Feb 15, 2017 at 2:04 PM, Gary Bisson
>> > >  wrote:
>> > > > Hi,
>> > > >
>> > > > I've been testing fastboot to flash a sparse image on a i.MX6Q
>> > > > platform (Nitrogen6x) with U-Boot v2017.01.
>> > > >
>> > > > This test shows a lot of "misaligned operation" traces:
>> > > > => fastboot 0
>> > > > Starting download of 415679660 bytes
>> > > > ...
>> > > > downloading of 415679660 bytes finished
>> > > > Flashing sparse image at offset 82124
>> > > > Flashing Sparse Image
>> > > > CACHE: Misaligned operation at range [1228, 12028028]
>> > > > CACHE: Misaligned operation at range [12028044, 1208f044]
>> > > > CACHE: Misaligned operation at range [1208f060, 123fd060]
>> > > > ...
>> > > >
>> > > > Has any of you seen that behavior?
>> > > >
>> > > > Note that this behavior only happens for sparse images, flashing
>> > > > a raw image doesn't exhibit the problem.
> 
> yes -- I have seen these warning messages when flashing a "sparse" image
> - they don't seem to cause any issues,

True, the flashing process is successful. But avoiding those warnings
would provide a better user experience. We've had customers asking for
it since to them it looks like something isn't copied properly.

> - I haven't had time to investigate yet

Well the whole image is downloaded to an aligned address which is
fine. But then the header is skipped which gives a non-aligned data
address for the write command:
http://git.denx.de/?p=u-boot.git;a=blob;f=common/image-sparse.c;hb=HEAD#l153

Here is the backtrace when that happens (not sure if it helps):
http://pastebin.com/Qun8uMXq

Not sure what would be the proper way to fix, copy the buffer to align
it seems inefficient.

Regards,
Gary
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Re: [U-Boot] [PATCH 12/17] Makefile: add rules to generate SPL FIT images

[Andrew F. Davis]

On 02/28/2017 08:25 PM, Andre Przywara wrote:
> Some platforms require more complex U-Boot images than we can easily
> generate via the mkimage command line, for instance to load additional
> image files.
> Introduce a CONFIG_SPL_FIT_SOURCE and CONFIG_SPL_FIT_GENERATOR symbol,
> which can either hold an .its source file describing the image layout,
> or, in the second case, a generator tool (script) to create such
> a source file. This script gets passed the list of device tree files
> from the CONFIG_OF_LIST variable.
> A platform or board can define either of those in their defconfig file
> to allow an easy building of such an image.
> 
> Signed-off-by: Andre Przywara 
> ---

Acked-by: Andrew F. Davis 

>  Kconfig  | 17 +
>  Makefile | 20 
>  2 files changed, 37 insertions(+)
> 
> diff --git a/Kconfig b/Kconfig
> index 81b4226..f3e4243 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -238,6 +238,23 @@ config SPL_FIT_IMAGE_POST_PROCESS
> injected into the FIT creation (i.e. the blobs would have been pre-
> processed before being added to the FIT image).
>  
> +config SPL_FIT_SOURCE
> + string ".its source file for U-Boot FIT image"
> + depends on SPL_FIT
> + help
> +   Specifies a (platform specific) FIT source file to generate the
> +   U-Boot FIT image. This could specify further image to load and/or
> +   execute.
> +
> +config SPL_FIT_GENERATOR
> + string ".its file generator script for U-Boot FIT image"
> + depends on SPL_FIT
> + help
> +   Specifies a (platform specific) script file to generate the FIT
> +   source file used to build the U-Boot FIT image file. This gets
> +   passed a list of supported device tree file stub names to
> +   include in the generated image.
> +
>  endif # FIT
>  
>  config OF_BOARD_SETUP
> diff --git a/Makefile b/Makefile
> index 38b42da..e09b0d9 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -826,6 +826,10 @@ quiet_cmd_mkimage = MKIMAGE $@
>  cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
>   $(if $(KBUILD_VERBOSE:1=), >$(MKIMAGEOUTPUT))
>  
> +quiet_cmd_mkfitimage = MKIMAGE $@
> +cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f 
> $(U_BOOT_ITS) -E $@ \
> + $(if $(KBUILD_VERBOSE:1=), >$(MKIMAGEOUTPUT))
> +
>  quiet_cmd_cat = CAT $@
>  cmd_cat = cat $(filter-out $(PHONY), $^) > $@
>  
> @@ -945,6 +949,19 @@ quiet_cmd_cpp_cfg = CFG $@
>  cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
>   -DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
>  
> +# Boards with more complex image requirments can provide an .its source file
> +# or a generator script
> +ifneq ($(CONFIG_SPL_FIT_SOURCE),"")
> +U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
> +else
> +ifneq ($(CONFIG_SPL_FIT_GENERATOR),"")
> +U_BOOT_ITS := u-boot.its
> +$(U_BOOT_ITS): FORCE
> + $(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \
> + $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
> +endif
> +endif
> +
>  ifdef CONFIG_SPL_LOAD_FIT
>  MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
>   -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
> @@ -977,6 +994,9 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl 
> u-boot-ivt.img: \
>   $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin 
> dts/dt.dtb,u-boot.bin) FORCE
>   $(call if_changed,mkimage)
>  
> +u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
> + $(call if_changed,mkfitimage)
> +
>  u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
>   $(call if_changed,mkimage)
>  
> 
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Re: [U-Boot] [PATCH 04/17] SPL: FIT: factor out spl_load_fit_image()

[Andrew F. Davis]

On 02/28/2017 08:25 PM, Andre Przywara wrote:
> At the moment we load two images from a FIT image: the actual U-Boot
> image and the DTB. Both times we have very similar code to deal with
> alignment requirement the media we load from imposes upon us.
> Factor out this code into a new function, which we just call twice.
> 
> Signed-off-by: Andre Przywara 
> ---

Acked-by: Andrew F. Davis 

+Franklin,

This patch, and #12 look like something you would be interested in for
your 66AK2G0x work.

Andrew

>  common/spl/spl_fit.c | 129 
> +++
>  1 file changed, 57 insertions(+), 72 deletions(-)
> 
> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
> index 572a5db..ad5ba15 100644
> --- a/common/spl/spl_fit.c
> +++ b/common/spl/spl_fit.c
> @@ -18,7 +18,7 @@ static ulong fdt_getprop_u32(const void *fdt, int node, 
> const char *prop)
>  
>   cell = fdt_getprop(fdt, node, prop, );
>   if (len != sizeof(*cell))
> - return -1U;
> + return -1UL;
>   return fdt32_to_cpu(*cell);
>  }
>  
> @@ -139,19 +139,63 @@ static int get_aligned_image_size(struct spl_load_info 
> *info, int data_size,
>   return (data_size + info->bl_len - 1) / info->bl_len;
>  }
>  
> +static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
> +   void *fit, ulong base_offset, int node,
> +   struct spl_image_info *image_info)
> +{
> + ulong offset;
> + size_t length;
> + ulong load_addr, load_ptr, entry;
> + void *src;
> + ulong overhead;
> + int nr_sectors;
> + int align_len = ARCH_DMA_MINALIGN - 1;
> +
> + offset = fdt_getprop_u32(fit, node, "data-offset") + base_offset;
> + length = fdt_getprop_u32(fit, node, "data-size");
> + load_addr = fdt_getprop_u32(fit, node, "load");
> + if (load_addr == -1UL && image_info)
> + load_addr = image_info->load_addr;
> + load_ptr = (load_addr + align_len) & ~align_len;
> + entry = fdt_getprop_u32(fit, node, "entry");
> +
> + overhead = get_aligned_image_overhead(info, offset);
> + nr_sectors = get_aligned_image_size(info, length, offset);
> +
> + if (info->read(info, sector + get_aligned_image_offset(info, offset),
> +nr_sectors, (void*)load_ptr) != nr_sectors)
> + return -EIO;
> + debug("image: dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
> +   (unsigned long)length);
> +
> + src = (void *)load_ptr + overhead;
> +#ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
> + board_fit_image_post_process(, );
> +#endif
> +
> + memcpy((void*)load_addr, src, length);
> +
> + if (image_info) {
> + image_info->load_addr = load_addr;
> + image_info->size = length;
> + if (entry == -1UL)
> + image_info->entry_point = load_addr;
> + else
> + image_info->entry_point = entry;
> + }
> +
> + return 0;
> +}
> +
>  int spl_load_simple_fit(struct spl_image_info *spl_image,
>   struct spl_load_info *info, ulong sector, void *fit)
>  {
>   int sectors;
> - ulong size, load;
> + ulong size;
>   unsigned long count;
> + struct spl_image_info image_info;
>   int node, images;
> - void *load_ptr;
> - int fdt_offset, fdt_len;
> - int data_offset, data_size;
>   int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
> - int src_sector;
> - void *dst, *src;
>  
>   /*
>* Figure out where the external images start. This is the base for the
> @@ -203,82 +247,23 @@ int spl_load_simple_fit(struct spl_image_info 
> *spl_image,
>   return -1;
>   }
>  
> - /* Get its information and set up the spl_image structure */
> - data_offset = fdt_getprop_u32(fit, node, "data-offset");
> - data_size = fdt_getprop_u32(fit, node, "data-size");
> - load = fdt_getprop_u32(fit, node, "load");
> - debug("data_offset=%x, data_size=%x\n", data_offset, data_size);
> - spl_image->load_addr = load;
> - spl_image->entry_point = load;
> + /* Load the image and set up the spl_image structure */
> + spl_load_fit_image(info, sector, fit, base_offset, node, spl_image);
>   spl_image->os = IH_OS_U_BOOT;
>  
> - /*
> -  * Work out where to place the image. We read it so that the first
> -  * byte will be at 'load'. This may mean we need to load it starting
> -  * before then, since we can only read whole blocks.
> -  */
> - data_offset += base_offset;
> - sectors = get_aligned_image_size(info, data_size, data_offset);
> - load_ptr = (void *)load;
> - debug("U-Boot size %x, data %p\n", data_size, load_ptr);
> - dst = load_ptr;
> -
> - /* Read the image */
> - src_sector = sector + get_aligned_image_offset(info, data_offset);
> - debug("Aligned image read: dst=%p, 

Re: [U-Boot] [PATCH 3/5] fsl PPA: add support PPA image loading from NAND and SD

[york sun]

On 03/03/2017 05:45 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Signed-off-by: Hou Zhiqiang 
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 118 
> +++-
>  1 file changed, 117 insertions(+), 1 deletion(-)



>
>  #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
>   ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
> + debug("%s: PPA image load from XIP\n", __func__);
> +#else /* !CONFIG_SYS_LS_PPA_FW_IN_XIP */
> + size_t fw_length, fdt_header_len = sizeof(struct fdt_header);
> +
> + /* Copy PPA image from MMC/SD/NAND to allocated memory */
> +#ifdef CONFIG_SYS_LS_PPA_FW_IN_MMC
> + struct mmc *mmc;
> + int dev = CONFIG_SYS_MMC_ENV_DEV;
> + struct fdt_header *fitp;
> + u32 cnt;
> + u32 blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
> +
> + debug("%s: PPA image load from eMMC/SD\n", __func__);
> +
> + mmc_initialize(gd->bd);
> + mmc = find_mmc_device(dev);
> + if (!mmc) {
> + printf("PPA: MMC cannot find device for PPA firmware\n");
> + return -ENODEV;
> + }
> +
> + mmc_init(mmc);
> +
> + fitp = malloc(roundup(fdt_header_len, 512));
> + if (!fitp) {
> + printf("PPA: malloc failed for FIT header(size 0x%zx)\n",
> +roundup(fdt_header_len, 512));
> + return -ENOMEM;
> + }
> +
> + cnt = DIV_ROUND_UP(fdt_header_len, 512);
> + debug("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n",
> +   __func__, dev, blk, cnt);
> + ret = mmc->block_dev.block_read(>block_dev, blk, cnt, fitp);
> + if (ret != cnt) {
> + free(fitp);
> + printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n",
> +CONFIG_SYS_LS_PPA_FW_ADDR);
> + return -EIO;
> + }
> +
> + /* flush cache after read */
> + flush_cache((ulong)fitp, cnt * 512);
> +
> + fw_length = fdt_totalsize(fitp);
> + free(fitp);
> +
> + fw_length = roundup(fw_length, 512);
> + ppa_fit_addr = malloc(fw_length);
> + if (!ppa_fit_addr) {
> + printf("PPA: malloc failed for PPA image(size 0x%zx)\n",
> +fw_length);
> + return -ENOMEM;
> + }
> +
> + cnt = DIV_ROUND_UP(fw_length, 512);
> + debug("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n",
> +   __func__, dev, blk, cnt);
> + ret = mmc->block_dev.block_read(>block_dev,
> + blk, cnt, ppa_fit_addr);
> + if (ret != cnt) {
> + free(ppa_fit_addr);
> + printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n",
> +CONFIG_SYS_LS_PPA_FW_ADDR);
> + return -EIO;
> + }
> +
> + flush_cache((ulong)ppa_fit_addr, cnt * 512);
> +
> +#elif CONFIG_SYS_LS_PPA_FW_IN_NAND
> + struct fdt_header fit;
> +
> + debug("%s: PPA image load from NAND\n", __func__);
> +
> + nand_init();
> + ret = nand_read(nand_info[0], (loff_t)CONFIG_SYS_LS_PPA_FW_ADDR,
> +_header_len, (u_char *));
> + if (ret == -EUCLEAN) {
> + printf("NAND read of PPA FIT header at offset 0x%x failed\n",
> +CONFIG_SYS_LS_PPA_FW_ADDR);
> + return -EIO;
> + }
> +
> + fw_length = fdt_totalsize();
> +
> + ppa_fit_addr = malloc(fw_length);
> + if (!ppa_fit_addr) {
> + printf("PPA: malloc failed for PPA image(size 0x%zx)\n",
> +fw_length);
> + return -ENOMEM;
> + }
> +
> + ret = nand_read(nand_info[0], (loff_t)CONFIG_SYS_LS_PPA_FW_ADDR,
> +_length, (u_char *)ppa_fit_addr);
> + if (ret == -EUCLEAN) {
> + free(ppa_fit_addr);
> + printf("NAND read of PPA firmware at offset 0x%x failed\n",
> +CONFIG_SYS_LS_PPA_FW_ADDR);
> + return -EIO;
> + }
>  #else
>  #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
>  #endif
>

Why do you flush the cache after reading from SD but not from NAND?

York
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Re: [U-Boot] [PATCH v3 01/11] armv8: Add global variable resv_ram

[york sun]

On 03/02/2017 08:53 PM, Simon Glass wrote:
> Hi York,
>
> On 1 March 2017 at 12:32, York Sun  wrote:
>> Use gd->arch.resv_ram to track reserved memory allocation.
>>
>> Signed-off-by: York Sun 
>> ---
>>
>> Changes in v3: None
>> Changes in v2: None
>>
>>  arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 6 ++
>>  arch/arm/include/asm/global_data.h| 3 +++
>>  cmd/bdinfo.c  | 4 
>>  3 files changed, 13 insertions(+)
>>
>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
>> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> index adccdf1..a40556f 100644
>> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> @@ -273,6 +273,12 @@ config SYS_FSL_SDHC_CLK_DIV
>>   clock, in another word SDHC_clk = Platform_clk / this_divider.
>>  endmenu
>>
>> +config RESV_RAM_TOP
>> +   bool
>> +   help
>> + Reserve memory from the top, tracked by gd->arch.resv_ram. It's up
>> + to implementation to allow access to this reserved memory or not.
>
> This is not sufficiently descriptive IMO. What is it used for? What do
> you mean by 'from the top'? What is the top?

Simon,

How about renaming it to RESV_RAM?

config RESV_RAM
 bool
help
  Reserve memory from the RAM, tracked by gd->arch.resv_ram.
   This reserved RAM can be used by special driver that resides
   in memory after U-Boot exits. It's up to the implementation
   to allocate and allow access to this reserved memory. For
   example, the reserved RAM can be at the high end of physical
   memory. The reserved RAM may be excluded from the memory
   bank(s) passed to OS, or marked as reserved.

>
>> +
>>  config SYS_FSL_ERRATUM_A008336
>> bool
>>
>> diff --git a/arch/arm/include/asm/global_data.h 
>> b/arch/arm/include/asm/global_data.h
>> index aee87cd..b1fc410 100644
>> --- a/arch/arm/include/asm/global_data.h
>> +++ b/arch/arm/include/asm/global_data.h
>> @@ -59,6 +59,9 @@ struct arch_global_data {
>> phys_addr_t secure_ram;
>> unsigned long tlb_allocated;
>>  #endif
>> +#ifdef CONFIG_RESV_RAM_TOP
>> +   phys_addr_t resv_ram;
>
> Please add a comment here explaining what it is for, or referencing something.

I will add a comment as
/*
  * Reserved RAM for memory resident eg. Management Complex (MC) driver
  * which continues to run after U-Boot exits.
  */

>
>> +#endif
>>
>>  #ifdef CONFIG_ARCH_OMAP2
>> u32 omap_boot_device;
>> diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
>> index ae3027a..0c5fa56 100644
>> --- a/cmd/bdinfo.c
>> +++ b/cmd/bdinfo.c
>> @@ -392,6 +392,10 @@ static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int 
>> argc,
>>   gd->arch.secure_ram & 
>> MEM_RESERVE_SECURE_ADDR_MASK);
>> }
>>  #endif
>> +#ifdef CONFIG_RESV_RAM_TOP
>> +   if (gd->arch.resv_ram)
>> +   print_num("Reserved ram", gd->arch.resv_ram);
>> +#endif
>>  #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
>> print_eths();
>>  #endif
>> --

This patch set includes the effort to rewrite the reservation code we 
discussed a year ago

https://lists.denx.de/pipermail/u-boot/2015-December/236974.html
https://lists.denx.de/pipermail/u-boot/2015-December/236979.html
https://lists.denx.de/pipermail/u-boot/2015-December/236996.html

York
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Re: [U-Boot] [PATCH 1/2] cmd: ubifs: Add a dependency on CMD_UBI

[Heiko Schocher]

Hello Maxime,

Am 03.03.2017 um 15:32 schrieb Maxime Ripard:

CMD_UBIFS can't compile without CMD_UBI enabled. Make sure we can't end up
in that case.

Signed-off-by: Maxime Ripard 
---
  cmd/Kconfig | 1 +
  1 file changed, 1 insertion(+)


Good catch! Thanks!

Acked-by: Heiko Schocher 

bye,
Heiko


diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8e2a05de82ea..585a00c31f4e 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -858,6 +858,7 @@ config CMD_UBI

  config CMD_UBIFS
tristate "Enable UBIFS - Unsorted block images filesystem commands"
+   depends on CMD_UBI
select CRC32
select RBTREE if ARCH_SUNXI
select LZO if ARCH_SUNXI



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Re: [U-Boot] armv5te: make 'ret lr' produce iinterworking 'bx lr'

[Tom Rini]

On Mon, Feb 27, 2017 at 08:19:07PM +0100, Albert ARIBAUD wrote:

> Current ARM assembler helper for the 'return to caller' pseudo-instruction
> turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain
> in its current ARM state even when the routine doing the 'ret' was called
> from Thumb-1 state, triggering an undefined instruction exception.
> 
> This causes early run-time failures in all boards compiled using the Thumb-1
> instruction set (for instance the Open-RD family).
> 
> ARMv5TE supports 'bx lr' which properly implements interworking and thus
> correctly returns to Thumb-1 state from ARM state.
> 
> This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
> 
> Signed-off-by: Albert ARIBAUD 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v4] armv8: spl: Call spl_relocate_stack_gd for ARMv8

[Tom Rini]

On Wed, Mar 01, 2017 at 09:04:15PM +0100, Philipp Tomsich wrote:

> As part of the startup process for boards using the SPL, we need to
> call spl_relocate_stack_gd. This is needed to set up malloc with its
> DRAM buffer.
> 
> Signed-off-by: Philipp Tomsich 
> Reviewed-by: Andre Przywara 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2] net: macb: Fix ETH not found when clock not support

[Tom Rini]

On Tue, Feb 14, 2017 at 04:24:40PM +0800, Wenyou Yang wrote:

> For the boards such as smartweb on which the clock driver isn't
> supported, the ethernet fail to be found when booting up with
> the below log.

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [PATCH v1] gpt: Fix uuid string format

[Andy Shevchenko]

On Fri, Mar 3, 2017 at 6:52 AM, Simon Glass  wrote:
> Hi Andy,
>
> On 27 February 2017 at 07:11, Andy Shevchenko
>  wrote:
>> From: Vincent Tinelli 
>>
>> Change GPT UUID string format from UUID to GUID per specification.
>>
>> Signed-off-by: Vincent Tinelli 
>> ---
>>  cmd/gpt.c   | 2 +-
>>  disk/part_efi.c | 2 +-
>>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> Reviewed-by: Simon Glass 
>
> How about also a patch to add comments to that enum in uuid.h?

I hope it's not a condition for your tag? Otherwise we might do this
later at some point.

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Re: [U-Boot] [PATCH v2 2/8] Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"

[Rush, Jason A.]

Marek Vasut wrote:
> On 03/01/2017 05:36 PM, Rush, Jason A. wrote:
>> This reverts commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f.
>>
>> The Cadence QSPI device does not work with caching (introduced with
>> the bounce buffer in this commit) on the Altera SoC platform.
>>
>> Signed-off-by: Jason A. Rush 
> 
> Do we really need the reverts or can we just fix the commit(s) up somehow ?
> 

Would you prefer I squash the 2 reverts and the subsequent patch together
as a single commit?

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Re: [U-Boot] [PATCH v5 16/16] sunxi: Add support for the CHIP Pro

[Tom Rini]

On Fri, Mar 03, 2017 at 03:48:08PM +0100, Maxime Ripard wrote:
> Hi Tom,
> 
> On Wed, Mar 01, 2017 at 10:58:56AM -0500, Tom Rini wrote:
> > On Mon, Feb 27, 2017 at 06:22:15PM +0100, Maxime Ripard wrote:
> > 
> > > The CHIP Pro is a SoM that features the GR8 SIP, an AXP209, a BT/WiFi chip
> > > and a 512MiB SLC NAND.
> > > 
> > > This it's an SLC NAND, it doesn't suffer the same drawbacks than found on
> > > the MLC NANDs, and we can enable it right away.
> > > 
> > > Signed-off-by: Maxime Ripard 
> > > Reviewed-by: Hans de Goede 
> > > ---
> > >  configs/CHIP_pro_defconfig | 33 +
> > [snip]
> > > +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,SYS_NAND_BLOCK_SIZE=0x4,SYS_NAND_PAGE_SIZE=4096,SYS_NAND_OOBSIZE=256"
> > 
> > Conversion itself won't be fun (I can see it'll take some regex'ing
> > before hand to convert various values to a number) but can you please
> > add Kconfig entires for SYS_NAND_xxx values and populate those for this
> > baord instead of adding more SYS_EXTRA_OPTIONS?  Thanks!
> 
> If you mean converting only the Allwinner boards to it, then yes,
> sure. If you also mean converting all the other architectures, then
> I'm sorry but I don't have the time to do that.

Yeah, if you add the Kconfig entries and make use of them here (and
convert the rest of sunxi, which I guess is just CHIP) that's fine.
These are non-trivial enough that moveconfig.py won't get them right I
suspect.  Thanks!

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Re: [U-Boot] [PATCH 1/4] arm: socfpga: Removing unused passing parameter of socfpga_bridges_reset

[Dinh Nguyen]

On 03/03/2017 06:50 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee 
> 
> This patch removes the unused passing parameter of socfpga_bridges_reset
> function in Arria10.
> 
> Signed-off-by: Tien Fong Chee 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Ching Liang See 
> Cc: Ley Foon 
> Cc: Westergreen Dalon 
> ---

Can you please add the proper [U-Boot][PATCH] header to your patches? It
would really help with filters for all of us!

Thanks,
Dinh
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Re: [U-Boot] [PATCH v5 16/16] sunxi: Add support for the CHIP Pro

[Maxime Ripard]

Hi Tom,

On Wed, Mar 01, 2017 at 10:58:56AM -0500, Tom Rini wrote:
> On Mon, Feb 27, 2017 at 06:22:15PM +0100, Maxime Ripard wrote:
> 
> > The CHIP Pro is a SoM that features the GR8 SIP, an AXP209, a BT/WiFi chip
> > and a 512MiB SLC NAND.
> > 
> > This it's an SLC NAND, it doesn't suffer the same drawbacks than found on
> > the MLC NANDs, and we can enable it right away.
> > 
> > Signed-off-by: Maxime Ripard 
> > Reviewed-by: Hans de Goede 
> > ---
> >  configs/CHIP_pro_defconfig | 33 +
> [snip]
> > +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,SYS_NAND_BLOCK_SIZE=0x4,SYS_NAND_PAGE_SIZE=4096,SYS_NAND_OOBSIZE=256"
> 
> Conversion itself won't be fun (I can see it'll take some regex'ing
> before hand to convert various values to a number) but can you please
> add Kconfig entires for SYS_NAND_xxx values and populate those for this
> baord instead of adding more SYS_EXTRA_OPTIONS?  Thanks!

If you mean converting only the Allwinner boards to it, then yes,
sure. If you also mean converting all the other architectures, then
I'm sorry but I don't have the time to do that.

Maxime

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Embedded Linux and Kernel engineering
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[U-Boot] [PATCH 1/2] cmd: ubifs: Add a dependency on CMD_UBI

[Maxime Ripard]

CMD_UBIFS can't compile without CMD_UBI enabled. Make sure we can't end up
in that case.

Signed-off-by: Maxime Ripard 
---
 cmd/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8e2a05de82ea..585a00c31f4e 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -858,6 +858,7 @@ config CMD_UBI
 
 config CMD_UBIFS
tristate "Enable UBIFS - Unsorted block images filesystem commands"
+   depends on CMD_UBI
select CRC32
select RBTREE if ARCH_SUNXI
select LZO if ARCH_SUNXI
-- 
2.11.0

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[U-Boot] [PATCH 2/2] cmd: nand: Make the NAND options default to NAND_SUNXI

[Maxime Ripard]

If we depend on the ARCH_SUNXI configuration option, the boards that do not
have NAND support enabled (with the associated options) will not compile
anymore.

Depend on the NAND driver configuration option to make sure that is not the
case.

Reported-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 cmd/Kconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 585a00c31f4e..91e3d6a46769 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -438,7 +438,7 @@ config CMD_MMC
 
 config CMD_NAND
bool "nand"
-   default y if ARCH_SUNXI
+   default y if NAND_SUNXI
help
  NAND support.
 
@@ -847,7 +847,7 @@ config CMD_UBI
tristate "Enable UBI - Unsorted block images commands"
select CRC32
select MTD_UBI
-   default y if ARCH_SUNXI
+   default y if NAND_SUNXI
help
  UBI is a software layer above MTD layer which admits use of LVM-like
  logical volumes on top of MTD devices, hides some complexities of
@@ -862,7 +862,7 @@ config CMD_UBIFS
select CRC32
select RBTREE if ARCH_SUNXI
select LZO if ARCH_SUNXI
-   default y if ARCH_SUNXI
+   default y if NAND_SUNXI
help
  UBIFS is a file system for flash devices which works on top of UBI.
 
-- 
2.11.0

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[U-Boot] [PATCH 5/5] fsl-layerscape/ls104xardb: enable PPA support for eMMC/SD and NAND boot

[Zhiqiang Hou]

From: Hou Zhiqiang 

Signed-off-by: Hou Zhiqiang 
---
 configs/ls1043ardb_nand_defconfig   | 1 +
 configs/ls1043ardb_sdcard_defconfig | 1 +
 configs/ls1046ardb_emmc_defconfig   | 1 +
 configs/ls1046ardb_sdcard_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1043ardb_nand_defconfig 
b/configs/ls1043ardb_nand_defconfig
index b41..1dfbb34 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -11,6 +11,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
 CONFIG_NAND_BOOT=y
diff --git a/configs/ls1043ardb_sdcard_defconfig 
b/configs/ls1043ardb_sdcard_defconfig
index 5587860..ee83530 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -11,6 +11,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
 CONFIG_SD_BOOT=y
diff --git a/configs/ls1046ardb_emmc_defconfig 
b/configs/ls1046ardb_emmc_defconfig
index 7b50fc7..1fead97 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046ARDB=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT"
 CONFIG_SD_BOOT=y
diff --git a/configs/ls1046ardb_sdcard_defconfig 
b/configs/ls1046ardb_sdcard_defconfig
index 9e6d23b..d0d2860 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046ARDB=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
 CONFIG_SD_BOOT=y
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH 4/5] Kconfig: fsl-ppa: support load PPA from eMMC/SD and NAND Flash

[Zhiqiang Hou]

From: Hou Zhiqiang 

Signed-off-by: Hou Zhiqiang 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index adccdf1..6d2dd15 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -122,6 +122,8 @@ config FSL_LS_PPA
 choice
prompt "FSL Layerscape PPA firmware loading-media select"
depends on FSL_LS_PPA
+   default SYS_LS_PPA_FW_IN_MMC if SD_BOOT
+   default SYS_LS_PPA_FW_IN_NAND if NAND_BOOT
default SYS_LS_PPA_FW_IN_XIP
 
 config SYS_LS_PPA_FW_IN_XIP
@@ -130,12 +132,24 @@ config SYS_LS_PPA_FW_IN_XIP
  Say Y here if the PPA firmware locate at XIP flash, such
  as NOR or QSPI flash.
 
+config SYS_LS_PPA_FW_IN_MMC
+   bool "eMMC or SD Card"
+   help
+ Say Y here if the PPA firmware locate at eMMC/SD card.
+
+config SYS_LS_PPA_FW_IN_NAND
+   bool "NAND"
+   help
+ Say Y here if the PPA firmware locate at NAND flash.
+
 endchoice
 
 config SYS_LS_PPA_FW_ADDR
hex "Address of PPA firmware loading from"
depends on FSL_LS_PPA
default 0x4050 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
+   default 0x50 if SYS_LS_PPA_FW_IN_MMC
+   default 0x50 if SYS_LS_PPA_FW_IN_NAND
default 0x6050 if SYS_LS_PPA_FW_IN_XIP
help
  If the PPA firmware locate at XIP flash, such as NOR or
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH 3/5] fsl PPA: add support PPA image loading from NAND and SD

[Zhiqiang Hou]

From: Hou Zhiqiang 

Signed-off-by: Hou Zhiqiang 
---
 arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 118 +++-
 1 file changed, 117 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index b68e87d..322432b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,9 +22,17 @@
 #include 
 #endif
 
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NAND
+#include 
+#elif defined(CONFIG_SYS_LS_PPA_FW_IN_MMC)
+#include 
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
 int ppa_init(void)
 {
-   const void *ppa_fit_addr;
+   void *ppa_fit_addr;
u32 *boot_loc_ptr_l, *boot_loc_ptr_h;
int ret;
 
@@ -34,10 +43,112 @@ int ppa_init(void)
 
 #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
+   debug("%s: PPA image load from XIP\n", __func__);
+#else /* !CONFIG_SYS_LS_PPA_FW_IN_XIP */
+   size_t fw_length, fdt_header_len = sizeof(struct fdt_header);
+
+   /* Copy PPA image from MMC/SD/NAND to allocated memory */
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_MMC
+   struct mmc *mmc;
+   int dev = CONFIG_SYS_MMC_ENV_DEV;
+   struct fdt_header *fitp;
+   u32 cnt;
+   u32 blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
+
+   debug("%s: PPA image load from eMMC/SD\n", __func__);
+
+   mmc_initialize(gd->bd);
+   mmc = find_mmc_device(dev);
+   if (!mmc) {
+   printf("PPA: MMC cannot find device for PPA firmware\n");
+   return -ENODEV;
+   }
+
+   mmc_init(mmc);
+
+   fitp = malloc(roundup(fdt_header_len, 512));
+   if (!fitp) {
+   printf("PPA: malloc failed for FIT header(size 0x%zx)\n",
+  roundup(fdt_header_len, 512));
+   return -ENOMEM;
+   }
+
+   cnt = DIV_ROUND_UP(fdt_header_len, 512);
+   debug("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n",
+ __func__, dev, blk, cnt);
+   ret = mmc->block_dev.block_read(>block_dev, blk, cnt, fitp);
+   if (ret != cnt) {
+   free(fitp);
+   printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n",
+  CONFIG_SYS_LS_PPA_FW_ADDR);
+   return -EIO;
+   }
+
+   /* flush cache after read */
+   flush_cache((ulong)fitp, cnt * 512);
+
+   fw_length = fdt_totalsize(fitp);
+   free(fitp);
+
+   fw_length = roundup(fw_length, 512);
+   ppa_fit_addr = malloc(fw_length);
+   if (!ppa_fit_addr) {
+   printf("PPA: malloc failed for PPA image(size 0x%zx)\n",
+  fw_length);
+   return -ENOMEM;
+   }
+
+   cnt = DIV_ROUND_UP(fw_length, 512);
+   debug("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n",
+ __func__, dev, blk, cnt);
+   ret = mmc->block_dev.block_read(>block_dev,
+   blk, cnt, ppa_fit_addr);
+   if (ret != cnt) {
+   free(ppa_fit_addr);
+   printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n",
+  CONFIG_SYS_LS_PPA_FW_ADDR);
+   return -EIO;
+   }
+
+   flush_cache((ulong)ppa_fit_addr, cnt * 512);
+
+#elif CONFIG_SYS_LS_PPA_FW_IN_NAND
+   struct fdt_header fit;
+
+   debug("%s: PPA image load from NAND\n", __func__);
+
+   nand_init();
+   ret = nand_read(nand_info[0], (loff_t)CONFIG_SYS_LS_PPA_FW_ADDR,
+  _header_len, (u_char *));
+   if (ret == -EUCLEAN) {
+   printf("NAND read of PPA FIT header at offset 0x%x failed\n",
+  CONFIG_SYS_LS_PPA_FW_ADDR);
+   return -EIO;
+   }
+
+   fw_length = fdt_totalsize();
+
+   ppa_fit_addr = malloc(fw_length);
+   if (!ppa_fit_addr) {
+   printf("PPA: malloc failed for PPA image(size 0x%zx)\n",
+  fw_length);
+   return -ENOMEM;
+   }
+
+   ret = nand_read(nand_info[0], (loff_t)CONFIG_SYS_LS_PPA_FW_ADDR,
+  _length, (u_char *)ppa_fit_addr);
+   if (ret == -EUCLEAN) {
+   free(ppa_fit_addr);
+   printf("NAND read of PPA firmware at offset 0x%x failed\n",
+  CONFIG_SYS_LS_PPA_FW_ADDR);
+   return -EIO;
+   }
 #else
 #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
 #endif
 
+#endif
+
 #ifdef CONFIG_CHAIN_OF_TRUST
ppa_img_addr = (uintptr_t)ppa_fit_addr;
if (fsl_check_boot_mode_secure() != 0) {
@@ -65,5 +176,10 @@ int ppa_init(void)
  boot_loc_ptr_l, boot_loc_ptr_h);
ret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h);
 
+#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
+   

[U-Boot] [PATCH 2/5] mtd: nand: remove nand size print from nand_init function

[Zhiqiang Hou]

From: Hou Zhiqiang 

Add nand_size() function to move the nand size print into initr_nand().
Remove nand size print from nand_init() to allow other function to call
nand_init() without printing nand size.

Signed-off-by: Hou Zhiqiang 
---
 common/board_r.c| 1 +
 drivers/mtd/nand/nand.c | 7 +--
 include/nand.h  | 1 +
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 48fa4ee..c39afe8 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -426,6 +426,7 @@ static int initr_nand(void)
 {
puts("NAND:  ");
nand_init();
+   printf("%lu MiB\n", nand_size() / 1024);
return 0;
 }
 #endif
diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c
index 3ea2dcf..168bac6 100644
--- a/drivers/mtd/nand/nand.c
+++ b/drivers/mtd/nand/nand.c
@@ -131,6 +131,11 @@ static void create_mtd_concat(void)
 }
 #endif
 
+unsigned long nand_size(void)
+{
+   return total_nand_size;
+}
+
 void nand_init(void)
 {
static int initialized;
@@ -152,8 +157,6 @@ void nand_init(void)
nand_init_chip(i);
 #endif
 
-   printf("%lu MiB\n", total_nand_size / 1024);
-
 #ifdef CONFIG_SYS_NAND_SELECT_DEVICE
/*
 * Select the chip in the board/cpu specific driver
diff --git a/include/nand.h b/include/nand.h
index b6eb223..a1f6632 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -28,6 +28,7 @@
 #endif
 
 extern void nand_init(void);
+extern unsigned long nand_size(void);
 
 #include 
 #include 
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH 1/5] mtd: nand: add initialization flag

[Zhiqiang Hou]

From: Hou Zhiqiang 

Add initialization flag to avoid initializing NAND Flash multiple
times, otherwise it will calculate a wrong total size.

Signed-off-by: Hou Zhiqiang 
---
 drivers/mtd/nand/nand.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c
index 0551241..3ea2dcf 100644
--- a/drivers/mtd/nand/nand.c
+++ b/drivers/mtd/nand/nand.c
@@ -133,6 +133,16 @@ static void create_mtd_concat(void)
 
 void nand_init(void)
 {
+   static int initialized;
+
+   /*
+* Avoid initializing NAND Flash multiple times,
+* otherwise it will calculate a wrong total size.
+*/
+   if (initialized)
+   return;
+   initialized = 1;
+
 #ifdef CONFIG_SYS_NAND_SELF_INIT
board_nand_init();
 #else
-- 
2.1.0.27.g96db324

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Re: [U-Boot] [PATCH] drivers/usb/ehci: Use platform-specific accessors

[Alexey Brodkin]

Hi Marek,

On Fri, 2017-03-03 at 00:57 +0100, Marek Vasut wrote:
> On 03/01/2017 01:52 PM, Alexey Brodkin wrote:
> > 
> > Hi Marek,
> > 
> > On Fri, 2017-02-10 at 21:33 +0100, Marek Vasut wrote:
> > > 
> > > On 02/10/2017 09:23 PM, Alexey Brodkin wrote:
> > > > 
> > > > 
> > > > Current implementation doesn't allow utilization of platform-specific
> > > > reads and writes.
> > > > 
> > > > But some arches or platforms may want to use their accessors that do
> > > > some extra work like adding barriers for data serialization etc.
> > > > 
> > > > Interesting enough OHCI accessors already do that so just aligning
> > > > EHCI to it now.
> > > > 
> > > > Signed-off-by: Alexey Brodkin 
> > > > Cc: Marek Vasut 
> > > > Cc: Simon Glass 
> > > > Cc: Mateusz Kulikowski 
> > > 
> > > IMO looks OK,
> > > 
> > > Acked-by: Marek Vasut 
> > > 
> > > I'd like to have a few more reviews of this before applying it for
> > > 2017.05 . Also CCing Wills, it'd be great to get a test on atheros
> > > MIPS .
> > 
> > It's been quite some time since your request to try the patch
> > on other systems and so far nobody answered. May we consider that
> > one for application then?
> > 
> > Essentially I'm not talking about current Tom's master branch
> > but would be good if the patch lands somewhere and once 2017.03
> > gets cut is merged in the main branch?
> 
> Yeah, it's not happening for 2017.03, it'll go into the next one.
> 
> Can you just rebase and repost the patch please ? I'll get to it next 
> week, I'm traveling until the 10th.

I just tried and the same .mbox applies cleanly on top of today's
U-Boot master so I believe there's no point in resending it.

Are you OK to just grab existing one?

-Alexey
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[U-Boot] [PATCH 4/4] arm: socfpga: Add FPGA driver support for Arria 10

[Chee Tien Fong]

From: Tien Fong Chee 

Add FPGA driver support for Arria 10.

Signed-off-by: Tien Fong Chee 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ching Liang See 
Cc: Ley Foon 
Cc: Westergreen Dalon 
---
 arch/arm/mach-socfpga/Makefile |1 +
 arch/arm/mach-socfpga/include/mach/fpga_manager.h  |2 +
 .../include/mach/fpga_manager_arria10.h|  120 +
 drivers/Makefile   |1 +
 drivers/fpga/Makefile  |1 +
 drivers/fpga/socfpga_arria10.c |  565 
 6 files changed, 690 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
 create mode 100644 drivers/fpga/socfpga_arria10.c

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 901bf91..d1ca3ee 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -18,6 +18,7 @@ obj-y += clock_manager_arria10.o
 obj-y  += misc_arria10.o
 obj-y  += pinmux_arria10.o
 obj-y  += reset_manager_arria10.o
+obj-y  += lowlevel_init.o
 endif
 
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager.h 
b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
index 76a9289..64e8344 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
@@ -12,6 +12,8 @@
 
 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 #include 
+#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
+#include 
 #endif
 
 /* FPGA CD Ratio Value */
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h 
b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
new file mode 100644
index 000..a273be7
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2017 Intel Corporation 
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier:BSD-3-Clause
+ */
+
+#ifndef _FPGA_MANAGER_ARRIA10_H_
+#define _FPGA_MANAGER_ARRIA10_H_
+
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK  0x0001
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK 0x0002
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK   0x0004
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_INITDONE_OE_SET_MSK0x0008
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK
0x0010
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_OE_SET_MSK 0x0020
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK
0x0040
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_OE_SET_MSK 0x0080
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CVP_CONF_DONE_SET_MSK  0x0100
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_READY_SET_MSK   0x0200
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_DONE_SET_MSK0x0400
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_ERROR_SET_MSK   0x0800
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK
0x1000
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NCEO_OE_SET_MSK0x2000
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_SET_MSK  0x0001
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL1_SET_MSK  0x0002
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL2_SET_MSK  0x0004
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SET_MSD (\
+   ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_SET_MSK |\
+   ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL1_SET_MSK |\
+   ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL2_SET_MSK)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_IMGCFG_FIFOEMPTY_SET_MSK   0x0100
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_IMGCFG_FIFOFULL_SET_MSK0x0200
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_JTAGM_SET_MSK  0x1000
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_EMR_SET_MSK
0x2000
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_LSB16
+
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NCONFIG_SET_MSK  0x0001
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NSTATUS_SET_MSK  0x0002
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_CONDONE_SET_MSK  0x0004
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG_SET_MSK  0x0100
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTATUS_OE_SET_MSK   0x0001
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET_MSK   0x0100
+
+#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG_SET_MSK   0x0001
+#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST_SET_MSK   0x0001
+#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NCE_SET_MSK  0x0100
+
+#define ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL_SET_MSK  0x0001
+#define ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_DATA_SET_MSK  0x0100
+#define ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SET_MSK  0x0003

[U-Boot] [PATCH 3/4] arm: socfpga: Add Arria10 FPGA manager program assembly driver

[Chee Tien Fong]

From: Tien Fong Chee 

This patch adding the Arria10 FPGA manager program assembly driver
which can be used for feeding bitstream to configure FPGA.

Signed-off-by: Tien Fong Chee 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ching Liang See 
Cc: Ley Foon 
Cc: Westergreen Dalon 
---
 arch/arm/mach-socfpga/lowlevel_init.S |   48 +
 1 files changed, 48 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/lowlevel_init.S

diff --git a/arch/arm/mach-socfpga/lowlevel_init.S 
b/arch/arm/mach-socfpga/lowlevel_init.S
new file mode 100644
index 000..79e9d07
--- /dev/null
+++ b/arch/arm/mach-socfpga/lowlevel_init.S
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2017 Intel Corporation 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+
+/*
+ * Write RBF data in burst form to FPGA Manager
+ * [r0] RBF binary source address
+ * [r1] FPGA Manager data address
+ * [r2] RBF data length
+ */
+
+ENTRY(fpgamgr_axi_write)
+   PUSH{r4-r11, lr}/* save registers per AAPCS */
+
+write_burst:
+   cmp r2,#32
+   beq write_burst_cont
+   bls write_word
+write_burst_cont:
+   ldmia   r0!, {r4-r11}
+   stmia   r1, {r4-r11}
+   subsr2, r2, #32
+   b   write_burst
+
+write_word:
+   cmp r2,#4
+   beq write_word_cont
+   bls write_byte
+write_word_cont:
+   ldmia   r0!, {r4}
+   stmia   r1, {r4}
+   subsr2, r2, #4
+   b   write_word
+
+write_byte:
+   cmp r2,#0
+   beq write_end
+   ldr r3, [r0]
+   str r3, [r1]
+write_end:
+   POP {r4-r11, pc}
+ENDPROC(fpgamgr_axi_write)
-- 
1.7.1

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[U-Boot] [PATCH 2/4] arm: socfpga: Restructure FPGA driver in the preparation to support A10.

[Chee Tien Fong]

From: Tien Fong Chee 

Move the Gen5 specific code to gen5 files. No functional change.

Signed-off-by: Tien Fong Chee 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ching Liang See 
Cc: Ley Foon 
Cc: Westergreen Dalon 
---
 arch/arm/mach-socfpga/Makefile |2 +-
 arch/arm/mach-socfpga/include/mach/fpga_manager.h  |   68 +
 .../mach/{fpga_manager.h => fpga_manager_gen5.h}   |   66 +++---
 drivers/fpga/Makefile  |5 +-
 drivers/fpga/socfpga.c |  272 +---
 drivers/fpga/{socfpga.c => socfpga_gen5.c} |   33 +---
 6 files changed, 51 insertions(+), 395 deletions(-)
 copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h => 
fpga_manager_gen5.h} (85%)
 copy drivers/fpga/{socfpga.c => socfpga_gen5.c} (91%)

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 7c7b471..901bf91 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -9,7 +9,6 @@
 
 obj-y  += board.o
 obj-y  += clock_manager.o
-obj-y  += fpga_manager.o
 obj-y  += misc.o
 obj-y  += reset_manager.o
 obj-y  += timer.o
@@ -28,6 +27,7 @@ obj-y += reset_manager_gen5.o
 obj-y  += scan_manager.o
 obj-y  += system_manager_gen5.o
 obj-y  += wrap_pll_config.o
+obj-y  += fpga_manager.o
 endif
 
 ifdef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager.h 
b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
index a077e22..76a9289 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2012 Altera Corporation 
+ * Copyright (C) 2012-2017 Altera Corporation 
  * All rights reserved.
  *
  * SPDX-License-Identifier:BSD-3-Clause
@@ -10,58 +10,9 @@
 
 #include 
 
-struct socfpga_fpga_manager {
-   /* FPGA Manager Module */
-   u32 stat;   /* 0x00 */
-   u32 ctrl;
-   u32 dclkcnt;
-   u32 dclkstat;
-   u32 gpo;/* 0x10 */
-   u32 gpi;
-   u32 misci;  /* 0x18 */
-   u32 _pad_0x1c_0x82c[517];
-
-   /* Configuration Monitor (MON) Registers */
-   u32 gpio_inten; /* 0x830 */
-   u32 gpio_intmask;
-   u32 gpio_inttype_level;
-   u32 gpio_int_polarity;
-   u32 gpio_intstatus; /* 0x840 */
-   u32 gpio_raw_intstatus;
-   u32 _pad_0x848;
-   u32 gpio_porta_eoi;
-   u32 gpio_ext_porta; /* 0x850 */
-   u32 _pad_0x854_0x85c[3];
-   u32 gpio_1s_sync;   /* 0x860 */
-   u32 _pad_0x864_0x868[2];
-   u32 gpio_ver_id_code;
-   u32 gpio_config_reg2;   /* 0x870 */
-   u32 gpio_config_reg1;
-};
-
-#define FPGAMGRREGS_STAT_MODE_MASK 0x7
-#define FPGAMGRREGS_STAT_MSEL_MASK 0xf8
-#define FPGAMGRREGS_STAT_MSEL_LSB  3
-
-#define FPGAMGRREGS_CTRL_CFGWDTH_MASK  0x200
-#define FPGAMGRREGS_CTRL_AXICFGEN_MASK 0x100
-#define FPGAMGRREGS_CTRL_NCONFIGPULL_MASK  0x4
-#define FPGAMGRREGS_CTRL_NCE_MASK  0x2
-#define FPGAMGRREGS_CTRL_EN_MASK   0x1
-#define FPGAMGRREGS_CTRL_CDRATIO_LSB   6
-
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CRC_MASK0x8
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_ID_MASK 0x4
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK 0x2
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK 0x1
-
-/* FPGA Mode */
-#define FPGAMGRREGS_MODE_FPGAOFF   0x0
-#define FPGAMGRREGS_MODE_RESETPHASE0x1
-#define FPGAMGRREGS_MODE_CFGPHASE  0x2
-#define FPGAMGRREGS_MODE_INITPHASE 0x3
-#define FPGAMGRREGS_MODE_USERMODE  0x4
-#define FPGAMGRREGS_MODE_UNKNOWN   0x5
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
+#include 
+#endif
 
 /* FPGA CD Ratio Value */
 #define CDRATIO_x1 0x0
@@ -69,9 +20,12 @@ struct socfpga_fpga_manager {
 #define CDRATIO_x4 0x2
 #define CDRATIO_x8 0x3
 
-/* SoCFPGA support functions */
-int fpgamgr_test_fpga_ready(void);
-int fpgamgr_poll_fpga_ready(void);
-int fpgamgr_get_mode(void);
+#define FPGA_TIMEOUT_CNT   0x100
+
+#ifndef __ASSEMBLY__
+
+/* Common prototypes */
+int fpgamgr_dclkcnt_set(unsigned long cnt);
 
+#endif /* __ASSEMBLY__ */
 #endif /* _FPGA_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager.h 
b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
similarity index 85%
copy from arch/arm/mach-socfpga/include/mach/fpga_manager.h
copy to arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
index a077e22..c03566e 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
+++ 

[U-Boot] [PATCH 1/4] arm: socfpga: Removing unused passing parameter of socfpga_bridges_reset

[Chee Tien Fong]

From: Tien Fong Chee 

This patch removes the unused passing parameter of socfpga_bridges_reset
function in Arria10.

Signed-off-by: Tien Fong Chee 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Ching Liang See 
Cc: Ley Foon 
Cc: Westergreen Dalon 
---
 arch/arm/mach-socfpga/include/mach/reset_manager.h |3 ---
 .../include/mach/reset_manager_arria10.h   |1 +
 .../mach-socfpga/include/mach/reset_manager_gen5.h |1 +
 arch/arm/mach-socfpga/reset_manager_arria10.c  |2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)
 mode change 100755 => 100644 
arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
 mode change 100755 => 100644 
arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 64526b6..f5189e8 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -8,9 +8,6 @@
 #define_RESET_MANAGER_H_
 
 void reset_cpu(ulong addr);
-
-void socfpga_bridges_reset(int enable);
-
 void socfpga_per_reset(u32 reset, int set);
 void socfpga_per_reset_all(void);
 
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
old mode 100755
new mode 100644
index 2668a86..954381c
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -16,6 +16,7 @@ void reset_assert_fpga_connected_peripherals(void);
 void reset_deassert_osc1wd0(void);
 void reset_assert_uart(void);
 void reset_deassert_uart(void);
+void socfpga_bridges_reset(void);
 
 struct socfpga_reset_manager {
u32 stat;
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
old mode 100755
new mode 100644
index 028974a..da17f4c
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
@@ -8,6 +8,7 @@
 #define_RESET_MANAGER_GEN5_H_
 
 void reset_deassert_peripherals_handoff(void);
+void socfpga_bridges_reset(int enable);
 
 struct socfpga_reset_manager {
u32 status;
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c 
b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 01156de..684c6be 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -355,7 +355,7 @@ void socfpga_bridges_reset(int enable)
/* For SoCFPGA-VT, this is NOP. */
 }
 #else
-void socfpga_bridges_reset(int enable)
+void socfpga_bridges_reset(void)
 {
 /* Disable all the bridges (hps2fpga, lwhps2fpga, fpga2hps, fpga2sdram) */
/* set idle request to all bridges */
-- 
1.7.1

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[U-Boot] [PATCH 0/4] Add Intel Arria 10 SoC FPGA driver

[Chee Tien Fong]

From: Tien Fong Chee 

This patchset adds FPGA driver to Intel Arria 10 SoC.

This series is working on top of [1] initial patchset which enables the basic
support for Arria 10 and other features.

[1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg240053.html

Regards,
Tien Fong

Tien Fong Chee (4):
  arm: socfpga: Removing unused passing parameter of
socfpga_bridges_reset
  arm: socfpga: Restructure FPGA driver in the preparation to support
A10.
  arm: socfpga: Add Arria10 FPGA manager program assembly driver
  arm: socfpga: Add FPGA driver support for Arria 10

 arch/arm/mach-socfpga/Makefile |3 +-
 arch/arm/mach-socfpga/include/mach/fpga_manager.h  |   70 +--
 .../include/mach/fpga_manager_arria10.h|  120 +
 .../mach/{fpga_manager.h => fpga_manager_gen5.h}   |   66 ++--
 arch/arm/mach-socfpga/include/mach/reset_manager.h |3 -
 .../include/mach/reset_manager_arria10.h   |1 +
 .../mach-socfpga/include/mach/reset_manager_gen5.h |1 +
 arch/arm/mach-socfpga/lowlevel_init.S  |   48 ++
 arch/arm/mach-socfpga/reset_manager_arria10.c  |2 +-
 drivers/Makefile   |1 +
 drivers/fpga/Makefile  |6 +-
 drivers/fpga/socfpga.c |  272 +--
 drivers/fpga/socfpga_arria10.c |  565 
 drivers/fpga/{socfpga.c => socfpga_gen5.c} |   33 +--
 14 files changed, 792 insertions(+), 399 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
 copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h => 
fpga_manager_gen5.h} (85%)
 mode change 100755 => 100644 
arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
 mode change 100755 => 100644 
arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
 create mode 100644 arch/arm/mach-socfpga/lowlevel_init.S
 create mode 100644 drivers/fpga/socfpga_arria10.c
 copy drivers/fpga/{socfpga.c => socfpga_gen5.c} (91%)

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Re: [U-Boot] [PATCH] usb gadget: increase envstr size in cb_getvar

[Lukasz Majewski]

Hi Nicolas,

+Marek on CC

> Hi,
> 
> would it be possible to consider this patch please?
> 
> Best Regards
> Nicolas
> 
> 2016-09-21 10:43 GMT+02:00 Nicolas le bayon :
> 
> > Hi,
> >
> > I propose you this patch in order to take into account strings
> > larger than actual size (32). I recently faced to
> > 'fastboot.partition-type:userdata' (it was in Android context) but
> > this could be the case for other purposes.
> >
> > I propose to simply double the size. Is it ok for you?
> >
> > Regards
> >
> > ---
> >  drivers/usb/gadget/f_fastboot.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_
> > fastboot.c
> > index 2160b1c..84e22e4 100644
> > --- a/drivers/usb/gadget/f_fastboot.c
> > +++ b/drivers/usb/gadget/f_fastboot.c
> > @@ -432,7 +432,7 @@ static void cb_getvar(struct usb_ep *ep, struct
> > usb_request *req)
> >   else
> >   strcpy(response, "FAILValue not set");
> >   } else {
> > - char envstr[32];
> > + char envstr[64];
> >
> >   snprintf(envstr, sizeof(envstr) - 1, "fastboot.%s", cmd);
> >   s = getenv(envstr);
> > --
> > 1.9.1
> >
> >
> >
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Best regards,

Lukasz Majewski

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Re: [U-Boot] [PATCH] cmd: wdt: Add "wdt disable" command

[Tom Rini]

On Fri, Mar 03, 2017 at 09:46:37AM +0100, Lukasz Majewski wrote:
> Hi Tom,
> 
> > On Fri, Mar 03, 2017 at 01:01:11AM +0100, Lukasz Majewski wrote:
> > 
> > > Add support for "wdt disable" command necessary for disabling the
> > > watchdog timer.
> > > 
> > > Signed-off-by: Lukasz Majewski 
> > > ---
> > >  cmd/Kconfig|  6 ++
> > >  cmd/Makefile   |  2 ++
> > >  cmd/wdt.c  | 32 
> > >  include/watchdog.h |  2 ++
> > >  4 files changed, 42 insertions(+)
> > >  create mode 100644 cmd/wdt.c
> > > 
> > > diff --git a/cmd/Kconfig b/cmd/Kconfig
> > > index e339d86..293e0bb 100644
> > > --- a/cmd/Kconfig
> > > +++ b/cmd/Kconfig
> > > @@ -426,6 +426,12 @@ config CMD_REMOTEPROC
> > >   help
> > > Support for Remote Processor control
> > >  
> > > +config CMD_WDT
> > > + bool "wdt"
> > > + default n
> > 
> > No need for default n, that is the default.
> 
> Ach... ok.
> 
> > 
> > > + help
> > > +   Enables the "wdt" command, which is used to control a
> > > watchdog timer. +
> > >  config CMD_GPIO
> > >   bool "gpio"
> > >   help
> > > diff --git a/cmd/Makefile b/cmd/Makefile
> > > index 9c9a9d1..4934427 100644
> > > --- a/cmd/Makefile
> > > +++ b/cmd/Makefile
> > > @@ -157,6 +157,8 @@ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
> > >  # Power
> > >  obj-$(CONFIG_CMD_PMIC) += pmic.o
> > >  obj-$(CONFIG_CMD_REGULATOR) += regulator.o
> > > +
> > > +obj-$(CONFIG_CMD_WDT) += wdt.o
> > >  endif # !CONFIG_SPL_BUILD
> > >  
> > >  obj-$(CONFIG_CMD_BLOB) += blob.o
> > > diff --git a/cmd/wdt.c b/cmd/wdt.c
> > > new file mode 100644
> > > index 000..aeaa9c2
> > > --- /dev/null
> > > +++ b/cmd/wdt.c
> > > @@ -0,0 +1,32 @@
> > > +/*
> > > + * wdt.c -- Watchdog support command
> > > + *
> > > + * Copyright (C) 2017
> > > + * Lukasz Majewski, DENX Software Engineering, lu...@denx.de.
> > > + *
> > > + * SPDX-License-Identifier:  GPL-2.0+
> > > + */
> > > +
> > > +#include 
> > > +#include 
> > > +
> > > +static int do_wdt(cmd_tbl_t *cmdtp, int flag, int argc,
> > > +   char * const argv[])
> > > +{
> > > + int ret = CMD_RET_SUCCESS;
> > > +
> > > + if (argc < 2 || argc > 2)
> > > + return CMD_RET_USAGE;
> > > +
> > > + if (!strcmp(argv[1], "disable")) {
> > > + WATCHDOG_DISABLE();
> > > + printf("WDT disabled\n");
> > > + }
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +U_BOOT_CMD(wdt, CONFIG_SYS_MAXARGS, 1, do_wdt,
> > > + "Watchdog (wdt)",
> > > + "disable - disable watchdog\n"
> > > +);
> > > diff --git a/include/watchdog.h b/include/watchdog.h
> > > index 174c894..b0716c5 100644
> > > --- a/include/watchdog.h
> > > +++ b/include/watchdog.h
> > > @@ -41,8 +41,10 @@ int init_func_watchdog_reset(void);
> > >   #define WATCHDOG_RESET bl hw_watchdog_reset
> > >   #else
> > >   extern void hw_watchdog_reset(void);
> > > + void hw_watchdog_disable(void);
> > >  
> > >   #define WATCHDOG_RESET hw_watchdog_reset
> > > + #define WATCHDOG_DISABLE hw_watchdog_disable
> > >   #endif /* __ASSEMBLY__ */
> > >  #else
> > >   /*
> > 
> > Can we add other commands, enable (calling _init() or _reset(),
> > I'm not sure which off the top of my head) as well?  
> 
> OK, I will think about adding such code.
> 
> > And we may want
> > to think how to handle that only "omap" and "xilinx_tb" support the
> > _disable function today.
> > 
> 
> The problem with WDT is that it is a "legacy" code, used by many boards
> and in many places. We do need to be careful here 

Exactly.  Perhaps a weak function that just returns error?

-- 
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Re: [U-Boot] [PATCH 02/17] SPL: FIT: refactor FDT loading

[Andre Przywara]

Hi Simon,

On 03/03/17 04:53, Simon Glass wrote:
> Hi Andre,
> 
> On 28 February 2017 at 19:25, Andre Przywara  wrote:
>> Currently the SPL FIT loader uses the spl_fit_select_fdt() function to
>> find the offset to the right DTB within the FIT image.
>> For this it iterates over all subnodes of the /configuration node in
>> the FIT tree and compares all "description" strings therein using a
>> board specific matching function.
>> If that finds a match, it uses the string in the "fdt" property of that
>> subnode to locate the matching subnode in the /images node, which points
>> to the DTB data.
>> Now this works very well, but is quite specific to cover this particular
>> use case. To open up the door for a more generic usage, let's split this
>> function into:
>> 1) a function that just returns the node offset for the matching
>>configuration node (spl_fit_find_config_node())
>> 2) a function that returns the image data any given property in a given
>>configuration node points to, additionally using a given index into
>>a possbile list of strings (spl_fit_select_index())
>> This allows us to replace the specific function above by asking for the
>> image the _first string of the "fdt" property_ in the matching
>> configuration subnode points to.
>>
>> This patch introduces no functional changes, it just refactors the code
>> to allow reusing it later.
>>
>> (diff is overly clever here and produces a hard-to-read patch, so I
>> recommend to throw a look at the result instead).
> 
> First I want to commend you on your excellent commit messages. For
> example this one explains the current situation, the change your
> commit performs and the motivation for that change. With these more
> complicated / core pieces, it is very valuable and you are an example
> to us all :-)

Thank you very much, you made my day. That is a welcome departure from
the usual Linux ML communication style ;-)

And yes, will fix those things you mentioned below, though have to wrap
my mind about pytest first.


Now back into the rough waters of the Linux mailing lists ...

Cheers,
Andre.

> 
>>
>> Signed-off-by: Andre Przywara 
>> ---
>>  common/spl/spl_fit.c | 83 
>> 
>>  1 file changed, 52 insertions(+), 31 deletions(-).
> 
> Reviewed-by: Simon Glass 
> 
> I think we need a pytest for this somewhere in this series. With
> sandbox_spl we can run spl/u-boot-spl and it jumps to u-boot. Can we
> use this to check that the right thing happens in a few simple cases?
> 
>>
>> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
>> index aae556f..ba45e65 100644
>> --- a/common/spl/spl_fit.c
>> +++ b/common/spl/spl_fit.c
>> @@ -22,13 +22,11 @@ static ulong fdt_getprop_u32(const void *fdt, int node, 
>> const char *prop)
>> return fdt32_to_cpu(*cell);
>>  }
>>
>> -static int spl_fit_select_fdt(const void *fdt, int images, int *fdt_offsetp)
>> +static int spl_fit_find_config_node(const void *fdt)
> 
> Can you comment this function please? I should have done this myself.
> 
>>  {
>> -   const char *name, *fdt_name;
>> -   int conf, node, fdt_node;
>> -   int len;
>> +   const char *name;
>> +   int conf, node, len;
>>
>> -   *fdt_offsetp = 0;
>> conf = fdt_path_offset(fdt, FIT_CONFS_PATH);
>> if (conf < 0) {
>> debug("%s: Cannot find /configurations node: %d\n", __func__,
>> @@ -50,39 +48,61 @@ static int spl_fit_select_fdt(const void *fdt, int 
>> images, int *fdt_offsetp)
>> continue;
>>
>> debug("Selecting config '%s'", name);
>> -   fdt_name = fdt_getprop(fdt, node, FIT_FDT_PROP, );
>> -   if (!fdt_name) {
>> -   debug("%s: Cannot find fdt name property: %d\n",
>> - __func__, len);
>> -   return -EINVAL;
>> -   }
>>
>> -   debug(", fdt '%s'\n", fdt_name);
>> -   fdt_node = fdt_subnode_offset(fdt, images, fdt_name);
>> -   if (fdt_node < 0) {
>> -   debug("%s: Cannot find fdt node '%s': %d\n",
>> - __func__, fdt_name, fdt_node);
>> -   return -EINVAL;
>> +   return node;
>> +   }
>> +
>> +   return -1;
> 
> How about -ENOENT?
> 
>> +}
>> +
>> +static int spl_fit_select_index(const void *fit, int images, int *offsetp,
>> +   const char *type, int index)
> 
> And this one.
> 
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Re: [U-Boot] [PATCH v2 2/6] dm: core: Allow multiple drivers to bind for a single node

[Dr. Philipp Tomsich]

Hi Simon,

> On 03 Mar 2017, at 05:52, Simon Glass  wrote:
> 
> Hi Philipp,
> 
> On 22 February 2017 at 13:47, Philipp Tomsich
>  > wrote:
>> Currently, driver binding stops once it encounters the first
>> compatible driver that doesn't refuse to bind. However, there are
>> cases where a single node will need to be handled by multiple driver
>> classes. For those cases we provide a configurable option to continue
>> to bind after the first driver has been found.
>> 
>> The first use cases for this are from the DM conversion of the sunxi
>> (Allwinner) architecture:
>> * pinctrl (UCLASS_PINCTRL) and gpio (UCLASS_GPIO) drivers need to
>>   bind against a single node
>> * clock (UCLASS_CLK) and reset (UCLASS_RESET) drivers also need to
>>   bind against a single node
> 
> Does linux work this way? Another approach would be to have a separate
> MISC driver with two children, one pinctrl, one clk.

The linux CLK driver creates and registers a reset-controller; the PINCTRL 
driver
does the same with the gpio-controller. Similar code to do this is easily 
possible in
U-Boot … see sunxi_pctrl_bind_gpio(…) in [PATCH v2 1/6] of this series.

However, binding multiple times makes for much simpler code and allows to keep
driver data in separate drivers.

Regards,
Philipp.
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Re: [U-Boot] [PATCH] usb gadget: increase envstr size in cb_getvar

[Nicolas le bayon]

Hi,

would it be possible to consider this patch please?

Best Regards
Nicolas

2016-09-21 10:43 GMT+02:00 Nicolas le bayon :

> Hi,
>
> I propose you this patch in order to take into account strings larger than
> actual size (32). I recently faced to 'fastboot.partition-type:userdata'
> (it was in Android context) but this could be the case for other purposes.
>
> I propose to simply double the size. Is it ok for you?
>
> Regards
>
> ---
>  drivers/usb/gadget/f_fastboot.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_
> fastboot.c
> index 2160b1c..84e22e4 100644
> --- a/drivers/usb/gadget/f_fastboot.c
> +++ b/drivers/usb/gadget/f_fastboot.c
> @@ -432,7 +432,7 @@ static void cb_getvar(struct usb_ep *ep, struct
> usb_request *req)
>   else
>   strcpy(response, "FAILValue not set");
>   } else {
> - char envstr[32];
> + char envstr[64];
>
>   snprintf(envstr, sizeof(envstr) - 1, "fastboot.%s", cmd);
>   s = getenv(envstr);
> --
> 1.9.1
>
>
>
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Re: [U-Boot] [PATCH v3] serial: Add serial driver for Intel MID

[Kever Yang]

Hi Andy,

On 02/28/2017 08:04 PM, Andy Shevchenko wrote:

Add a specific serial driver for Intel MID platforms.

It has special fractional divider which can be programmed via UART_PS,
UART_MUL, and UART_DIV registers.

The UART clock is calculated as

UART clock = XTAL * UART_MUL / UART_DIV

The baudrate is calculated as

baud rate = UART clock / UART_PS / DLAB

Initialize fractional divider correctly for Intel Edison platform.

For backward compatibility we have to set initial DLAB value to 16
and speed to 115200 baud, where initial frequency is 29491200Hz, and
XTAL frequency is 38.4MHz.

Signed-off-by: Andy Shevchenko 
---
  drivers/serial/Kconfig|  9 +
  drivers/serial/Makefile   |  1 +
  drivers/serial/serial_intel_mid.c | 69 +++
  3 files changed, 79 insertions(+)
  create mode 100644 drivers/serial/serial_intel_mid.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff89e..99dcdeb00d 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -347,6 +347,15 @@ config SYS_NS16550
  be used. It can be a constant or a function to get clock, eg,
  get_serial_clock().
  
+config INTEL_MID_SERIAL

+   bool "Intel MID platform UART support"
+   depends on DM_SERIAL && OF_CONTROL
+   depends on INTEL_MID
+   select SYS_NS16550
+   help
+ Select this to enable a UART for Intel MID platforms.
+ This uses the ns16550 driver as a library.
+
  config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on DM_SERIAL && SPL_OF_PLATDATA
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668bf9..abd9dea4dc 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_S5P) += serial_s5p.o
  obj-$(CONFIG_MXC_UART) += serial_mxc.o
  obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
  obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
+obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o
  ifdef CONFIG_SPL_BUILD
  obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
  endif
diff --git a/drivers/serial/serial_intel_mid.c 
b/drivers/serial/serial_intel_mid.c
new file mode 100644
index 00..777c09d6d2
--- /dev/null
+++ b/drivers/serial/serial_intel_mid.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * The UART clock is calculated as
+ *
+ * UART clock = XTAL * UART_MUL / UART_DIV
+ *
+ * The baudrate is calculated as
+ *
+ * baud rate = UART clock / UART_PS / DLAB
+ */
+#define UART_PS0x30
+#define UART_MUL   0x34
+#define UART_DIV   0x38
+
+static void mid_writel(struct ns16550_platdata *plat, int offset, int value)
+{
+   unsigned char *addr;
+
+   offset *= 1 << plat->reg_shift;
+   addr = (unsigned char *)plat->base + offset;
+
+   writel(value, addr + plat->reg_offset);
+}
+
+static int mid_serial_probe(struct udevice *dev)
+{
+   struct ns16550_platdata *plat = dev_get_platdata(dev);
+
+   /*
+* Initialize fractional divider correctly for Intel Edison
+* platform.
+*
+* For backward compatibility we have to set initial DLAB value
+* to 16 and speed to 115200 baud, where initial frequency is
+* 29491200Hz, and XTAL frequency is 38.4MHz.
+*/
+   mid_writel(plat, UART_MUL, 96);
+   mid_writel(plat, UART_DIV, 125);
+   mid_writel(plat, UART_PS, 16);
+
+   return ns16550_serial_probe(dev);
+}
+
+static const struct udevice_id mid_serial_ids[] = {
+   { .compatible = "intel,mid-uart" },
+   {}
+};
+
+U_BOOT_DRIVER(serial_intel_mid) = {
+   .name   = "serial_intel_mid",
+   .id = UCLASS_SERIAL,
+   .of_match = mid_serial_ids,
+   .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
+   .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
+   .priv_auto_alloc_size = sizeof(struct NS16550),
+   .probe  = mid_serial_probe,
+   .ops= _serial_ops,
+   .flags  = DM_FLAG_PRE_RELOC,
+};


Reviewed-by: Kever Yang 

Thanks,
- Kever

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Re: [U-Boot] [linux-sunxi] Re: [PATCH 14/17] sunxi: Pine64: defconfig: enable SPL FIT support

[Andre Przywara]

Hi,

On 03/03/17 09:22, Maxime Ripard wrote:
> On Thu, Mar 02, 2017 at 12:03:20AM +0800, Icenowy Zheng wrote:
>>
>> 2017年3月1日 23:51于 Maxime Ripard 写道：
>>>
>>> Hi Andre, 
>>>
>>> On Wed, Mar 01, 2017 at 02:25:26AM +, Andre Przywara wrote: 
 The Pine64 (and all other 64-bit Allwinner boards) need to load an 
 ARM Trusted Firmware image beside the actual U-Boot proper. 
 This can now be easily achieved by using the just extended SPL FIT 
 loading support, so enable it in the Pine64 defconfig. 
 Also add the FIT image as a build target to 64-bit sunxi board to 
 trigger the respective Makefile rules. 

 Signed-off-by: Andre Przywara  
 --- 
   configs/pine64_plus_defconfig  | 6 ++ 
   include/configs/sunxi-common.h | 4  
   2 files changed, 10 insertions(+) 

 diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig 
 index 7c7d86f..2b47157 100644 
 --- a/configs/pine64_plus_defconfig 
 +++ b/configs/pine64_plus_defconfig 
 @@ -3,9 +3,14 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y 
   CONFIG_ARCH_SUNXI=y 
   CONFIG_MACH_SUN50I=y 
   CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" 
 +CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" 
   # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set 
   CONFIG_CONSOLE_MUX=y 
   CONFIG_SPL=y 
 +CONFIG_FIT=y 
 +CONFIG_SPL_FIT=y 
 +CONFIG_SPL_LOAD_FIT=y 
 +CONFIG_SPL_OF_LIBFDT=y 
>>>
>>> I'm not sure we want to force down that support to all our users. 
>>
>> A64 boards are now unusable without proper ATF.
> 
> That's debatable, but that's not really what I meant. What I meant was
> that they're perfectly usable without FIT.

But this is a defconfig for a certain, and the Pine64 is not really
usable without ATF at the moment in an upstream tree.

Do you want a CONFIG_LOAD_ATF wrapper option, that would make it easier
to select / deselect?

Cheers,
Andre.
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Re: [U-Boot] [linux-sunxi] Re: [PATCH 14/17] sunxi: Pine64: defconfig: enable SPL FIT support

[Maxime Ripard]

On Thu, Mar 02, 2017 at 12:03:20AM +0800, Icenowy Zheng wrote:
> 
> 2017年3月1日 23:51于 Maxime Ripard 写道：
> >
> > Hi Andre, 
> >
> > On Wed, Mar 01, 2017 at 02:25:26AM +, Andre Przywara wrote: 
> > > The Pine64 (and all other 64-bit Allwinner boards) need to load an 
> > > ARM Trusted Firmware image beside the actual U-Boot proper. 
> > > This can now be easily achieved by using the just extended SPL FIT 
> > > loading support, so enable it in the Pine64 defconfig. 
> > > Also add the FIT image as a build target to 64-bit sunxi board to 
> > > trigger the respective Makefile rules. 
> > > 
> > > Signed-off-by: Andre Przywara  
> > > --- 
> > >  configs/pine64_plus_defconfig  | 6 ++ 
> > >  include/configs/sunxi-common.h | 4  
> > >  2 files changed, 10 insertions(+) 
> > > 
> > > diff --git a/configs/pine64_plus_defconfig 
> > > b/configs/pine64_plus_defconfig 
> > > index 7c7d86f..2b47157 100644 
> > > --- a/configs/pine64_plus_defconfig 
> > > +++ b/configs/pine64_plus_defconfig 
> > > @@ -3,9 +3,14 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y 
> > >  CONFIG_ARCH_SUNXI=y 
> > >  CONFIG_MACH_SUN50I=y 
> > >  CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" 
> > > +CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" 
> > >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set 
> > >  CONFIG_CONSOLE_MUX=y 
> > >  CONFIG_SPL=y 
> > > +CONFIG_FIT=y 
> > > +CONFIG_SPL_FIT=y 
> > > +CONFIG_SPL_LOAD_FIT=y 
> > > +CONFIG_SPL_OF_LIBFDT=y 
> >
> > I'm not sure we want to force down that support to all our users. 
> 
> A64 boards are now unusable without proper ATF.

That's debatable, but that's not really what I meant. What I meant was
that they're perfectly usable without FIT.

Maxime

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Embedded Linux and Kernel engineering
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Re: [U-Boot] [PATCH] do_smhload: fix return code

[Linus Walleij]

On Thu, Mar 2, 2017 at 6:45 PM, Ryan Harkin  wrote:

> do_smhload was using a ulong to store the return value from
> smh_load_file. That returns an int, where -1 indicates an error. As a
> ulong will never be negative, smh_load_file errors were not detected and
> so_smhload always returned zero.
>
> Also, when errors were spotted, do_smhload was returning 1, rather than
> the enumeration CMD_RET_FAILURE (which is also 1).
>
> Signed-off-by: Ryan Harkin 

Reviewed-by: Linus Walleij 

Yours,
Linus Walleij
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Re: [U-Boot] [PATCH] cmd: wdt: Add "wdt disable" command

[Lukasz Majewski]

Hi Tom,

> On Fri, Mar 03, 2017 at 01:01:11AM +0100, Lukasz Majewski wrote:
> 
> > Add support for "wdt disable" command necessary for disabling the
> > watchdog timer.
> > 
> > Signed-off-by: Lukasz Majewski 
> > ---
> >  cmd/Kconfig|  6 ++
> >  cmd/Makefile   |  2 ++
> >  cmd/wdt.c  | 32 
> >  include/watchdog.h |  2 ++
> >  4 files changed, 42 insertions(+)
> >  create mode 100644 cmd/wdt.c
> > 
> > diff --git a/cmd/Kconfig b/cmd/Kconfig
> > index e339d86..293e0bb 100644
> > --- a/cmd/Kconfig
> > +++ b/cmd/Kconfig
> > @@ -426,6 +426,12 @@ config CMD_REMOTEPROC
> > help
> >   Support for Remote Processor control
> >  
> > +config CMD_WDT
> > +   bool "wdt"
> > +   default n
> 
> No need for default n, that is the default.

Ach... ok.

> 
> > +   help
> > + Enables the "wdt" command, which is used to control a
> > watchdog timer. +
> >  config CMD_GPIO
> > bool "gpio"
> > help
> > diff --git a/cmd/Makefile b/cmd/Makefile
> > index 9c9a9d1..4934427 100644
> > --- a/cmd/Makefile
> > +++ b/cmd/Makefile
> > @@ -157,6 +157,8 @@ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
> >  # Power
> >  obj-$(CONFIG_CMD_PMIC) += pmic.o
> >  obj-$(CONFIG_CMD_REGULATOR) += regulator.o
> > +
> > +obj-$(CONFIG_CMD_WDT) += wdt.o
> >  endif # !CONFIG_SPL_BUILD
> >  
> >  obj-$(CONFIG_CMD_BLOB) += blob.o
> > diff --git a/cmd/wdt.c b/cmd/wdt.c
> > new file mode 100644
> > index 000..aeaa9c2
> > --- /dev/null
> > +++ b/cmd/wdt.c
> > @@ -0,0 +1,32 @@
> > +/*
> > + * wdt.c -- Watchdog support command
> > + *
> > + * Copyright (C) 2017
> > + * Lukasz Majewski, DENX Software Engineering, lu...@denx.de.
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +static int do_wdt(cmd_tbl_t *cmdtp, int flag, int argc,
> > + char * const argv[])
> > +{
> > +   int ret = CMD_RET_SUCCESS;
> > +
> > +   if (argc < 2 || argc > 2)
> > +   return CMD_RET_USAGE;
> > +
> > +   if (!strcmp(argv[1], "disable")) {
> > +   WATCHDOG_DISABLE();
> > +   printf("WDT disabled\n");
> > +   }
> > +
> > +   return ret;
> > +}
> > +
> > +U_BOOT_CMD(wdt, CONFIG_SYS_MAXARGS, 1, do_wdt,
> > +   "Watchdog (wdt)",
> > +   "disable - disable watchdog\n"
> > +);
> > diff --git a/include/watchdog.h b/include/watchdog.h
> > index 174c894..b0716c5 100644
> > --- a/include/watchdog.h
> > +++ b/include/watchdog.h
> > @@ -41,8 +41,10 @@ int init_func_watchdog_reset(void);
> > #define WATCHDOG_RESET bl hw_watchdog_reset
> > #else
> > extern void hw_watchdog_reset(void);
> > +   void hw_watchdog_disable(void);
> >  
> > #define WATCHDOG_RESET hw_watchdog_reset
> > +   #define WATCHDOG_DISABLE hw_watchdog_disable
> > #endif /* __ASSEMBLY__ */
> >  #else
> > /*
> 
> Can we add other commands, enable (calling _init() or _reset(),
> I'm not sure which off the top of my head) as well?  

OK, I will think about adding such code.

> And we may want
> to think how to handle that only "omap" and "xilinx_tb" support the
> _disable function today.
> 

The problem with WDT is that it is a "legacy" code, used by many boards
and in many places. We do need to be careful here 



Best regards,

Lukasz Majewski

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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de


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