Re: [U-Boot] [PATCH 1/2] arm64: A64/Pine64: update device tree from Linux
On Mon, May 22, 2017 at 01:59:32AM +0100, Andre Przywara wrote: > The Linux device tree for the Allwinner A64 SoC has changed a lot since > the U-Boot version was merged. > Let's replace the current DT with a exact copy of the Linux one as of: > commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b > Merge: 0ff4c01 3c0e3abd > Author: Linus Torvalds > Date: Tue May 9 10:07:33 2017 -0700 > > For this patch this makes U-Boot lose the (not yet upstream) Ethernet > node, but the next patch will fix this up. > > Signed-off-by: Andre Przywara Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] sunxi: A64: (re-)add sun8i emac DT nodes
On Mon, May 22, 2017 at 01:59:33AM +0100, Andre Przywara wrote: > As the kernel DT does not have an Ethernet driver and bindings, lets > (re-)add the DT bindings for U-Boot's sun8i EMAC Ethernet driver, which > got lost when syncing the kernel DT to U-Boot. > This slightly updates the DT nodes to adapt to the new DT (clock and > reset nodes), but keeps the rest the same to let it work with the > existing U-Boot driver. > > Signed-off-by: Andre Przywara Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/5] Add Intel Arria 10 SoC FPGA driver
On Jum, 2017-05-19 at 12:14 +0800, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This is the 4th version of patchset to adds support for Intel Arria
> 10 SoC FPGA
> driver. This version mainly resolved comments from Ley Foon and Dinh
> in [v3].
> This series is working on top of u-boot-socfpga-next branch
> http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/hea
> ds/next.
>
Hi Marek,
How about this series of patches? Good to get accepted?
Thanks.
> [v3]: https://www.mail-archive.com/u-
> b...@lists.denx.de/msg249160.html
>
> v3 -> v4 changes:
> -
> - Fixed typo on patch 1 and patch 2.
> - Created separate patch for enabling FPGA driver build on SPL.
> - No change on patch 3.
> - Removed some unnecessary wrappers and unused function.
>
> Patchset history
>
> [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg247788.htm
> l
> [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg248541.htm
> l
>
> Tien Fong Chee (5):
> arm: socfpga: Remove unused passing parameter of
> socfpga_bridges_reset
> arm: socfpga: Restructure FPGA driver in the preparation to support
> A10.
> arm: socfpga: Enable FPGA driver on SPL
> arm: socfpga: Move FPGA manager driver to FPGA driver
> arm: socfpga: Add FPGA driver support for Arria 10
>
> arch/arm/mach-socfpga/Makefile | 1 -
> arch/arm/mach-socfpga/fpga_manager.c | 78
> arch/arm/mach-socfpga/include/mach/fpga_manager.h | 70 +--
> .../include/mach/fpga_manager_arria10.h| 100 +
> .../mach/{fpga_manager.h => fpga_manager_gen5.h} | 69 ++-
> .../include/mach/reset_manager_arria10.h | 2 +-
> arch/arm/mach-socfpga/reset_manager_arria10.c | 4 +-
> drivers/Makefile | 1 +
> drivers/fpga/Makefile | 2 +
> drivers/fpga/socfpga.c | 241 +--
> drivers/fpga/socfpga_arria10.c | 479
> +
> drivers/fpga/{socfpga.c => socfpga_gen5.c} | 98 ++---
> include/configs/socfpga_common.h | 3 +-
> 13 files changed, 684 insertions(+), 464 deletions(-)
> delete mode 100644 arch/arm/mach-socfpga/fpga_manager.c
> create mode 100644 arch/arm/mach-
> socfpga/include/mach/fpga_manager_arria10.h
> copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h =>
> fpga_manager_gen5.h} (57%)
> create mode 100644 drivers/fpga/socfpga_arria10.c
> copy drivers/fpga/{socfpga.c => socfpga_gen5.c} (85%)
>
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[U-Boot] [PATCH V6 2/4] usb: rockchip: add rockusb command
this patch add rockusb command. the usage is
rockusb
e.g. rockusb 0 mmc 0
Signed-off-by: Eddie Cai
Reviewed-by: Simon Glass
Changes in v6:
-none
Changes in v5:
-none
Changes in v4:
-move USB_FUNCTION_ROCKUSB to drivers/usb/gadget/Kconfig
-modify the dependence
Changes in v3:
-fix comment from Simon and Lukasz
-fix checkpactch error
---
cmd/Kconfig | 9
cmd/Makefile | 1 +
cmd/rockusb.c | 74 +++
3 files changed, 84 insertions(+)
create mode 100644 cmd/rockusb.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d9f7151..81e9bdf 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -518,6 +518,15 @@ config CMD_DFU
Enables the command "dfu" which is used to have U-Boot create a DFU
class device via USB.
+config CMD_ROCKUSB
+ bool "rockusb"
+ depends on USB_FUNCTION_ROCKUSB
+ help
+ Rockusb protocol is widely used by Rockchip SoC based devices. It can
+ read/write info, image to/from devices. This enable rockusb command
+ support to comunication with rockusb device. for more detail about
+ this command, please read doc/README.rockusb.
+
config CMD_USB_MASS_STORAGE
bool "UMS usb mass storage"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index e987868..65d998d 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -109,6 +109,7 @@ obj-$(CONFIG_CMD_READ) += read.o
obj-$(CONFIG_CMD_REGINFO) += reginfo.o
obj-$(CONFIG_CMD_REISER) += reiser.o
obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
+obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
obj-$(CONFIG_SANDBOX) += host.o
obj-$(CONFIG_CMD_SATA) += sata.o
obj-$(CONFIG_CMD_SF) += sf.o
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
new file mode 100644
index 000..ae2baa6
--- /dev/null
+++ b/cmd/rockusb.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2017 Eddie Cai
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int do_rockusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ int controller_index, dev_index;
+ char *usb_controller;
+ char *devtype;
+ char *devnum;
+ int ret;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ usb_controller = argv[1];
+ controller_index = simple_strtoul(usb_controller, NULL, 0);
+
+ if (argc >= 4) {
+ devtype = argv[2];
+ devnum = argv[3];
+ } else {
+ return CMD_RET_USAGE;
+ }
+ dev_index = simple_strtoul(devnum, NULL, 0);
+ rockusb_dev_init(devtype, dev_index);
+
+ ret = board_usb_init(controller_index, USB_INIT_DEVICE);
+ if (ret) {
+ error("USB init failed: %d", ret);
+ return CMD_RET_FAILURE;
+ }
+
+ g_dnl_clear_detach();
+ ret = g_dnl_register("usb_dnl_rockusb");
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ if (!g_dnl_board_usb_cable_connected()) {
+ puts("\rUSB cable not detected, Command exit.\n");
+ ret = CMD_RET_FAILURE;
+ goto exit;
+ }
+
+ while (1) {
+ if (g_dnl_detach())
+ break;
+ if (ctrlc())
+ break;
+ usb_gadget_handle_interrupts(controller_index);
+ }
+ ret = CMD_RET_SUCCESS;
+
+exit:
+ g_dnl_unregister();
+ g_dnl_clear_detach();
+ board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+
+ return ret;
+}
+
+U_BOOT_CMD(rockusb, 4, 1, do_rockusb,
+ "use the rockusb protocol",
+ "e.g. rockusb 0 mmc 0\n"
+);
--
1.9.1
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[U-Boot] [PATCH V6 4/4] rockchip: rk3288: enable rockusb support on rk3288 based device
this patch enable rockusb support on rk3288 based device. Signed-off-by: Eddie Cai Changes in v6: -enable rockusb in defconfig Changes in v5: -none Changes in v4: -move to rk3288_common.h Changes in v3: -move to defconfig --- configs/evb-rk3288_defconfig | 11 +++ configs/fennec-rk3288_defconfig | 8 configs/firefly-rk3288_defconfig | 8 configs/miqi-rk3288_defconfig | 8 configs/popmetal-rk3288_defconfig | 8 configs/tinker-rk3288_defconfig | 8 include/configs/rk3288_common.h | 7 --- 7 files changed, 51 insertions(+), 7 deletions(-) diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 227150d..3954139 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y @@ -61,6 +62,16 @@ CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_GADGET_VBUS_DRAW=0 +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_CMD_ROCKUSB=y diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index befba18..a2e9602 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -66,3 +66,11 @@ CONFIG_USB_STORAGE=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_GADGET_VBUS_DRAW=0 +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_CMD_ROCKUSB=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index f2872a6..3e4b101 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -73,3 +73,11 @@ CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_GADGET_VBUS_DRAW=0 +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_CMD_ROCKUSB=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index d93bd97..22505a6 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -70,3 +70,11 @@ CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_GADGET_VBUS_DRAW=0 +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_CMD_ROCKUSB=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 748cda4..5fac2ea 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -66,3 +66,11 @@ CONFIG_USB_STORAGE=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_GADGET_VBUS_DRAW=0 +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_CMD_ROCKUSB=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index ada5950..85ef248 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -66,3 +66,11 @@ CONFIG_USB_STORAGE=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_GADGET_VBUS_DRAW=0 +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_CMD_ROCKUSB=y diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index e7a8f72..421ba60 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -58,11 +58,9 @@ #ifndef CONFIG_SPL_BUILD /* usb otg */ -#define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_DWC2_OTG #define CONFIG_ROCKCHIP_USB2_PHY -#define CONFIG_USB_GADGET_VBUS_DRAW0 /* fastboot */ #define CONFIG_CMD_FASTBOOT @@ -76,11 +74,6 @@ #define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_DOWNLOAD -#define CONFIG_G_DNL_MANUFACTURER "Rockchip" -#define CONFIG_G_DNL_VENDOR_NUM0x2207 -#define CONFIG_G_DNL_PRODUCT_NUM 0x320a - /* usb host support */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 -- 1.9.1 ___
[U-Boot] [PATCH V6 3/4] rockchip:usb: add a simple readme for rockusb
add a simple readme to introduce rockusb and tell people how to use it Signed-off-by: Eddie Cai Reviewed-by: Simon Glass Changes in v6: -none Changes in v5: -none Changes in v4: -add some blank line to make it look better Changes in v3: -fix checkpatch error --- doc/README.rockusb | 51 +++ 1 file changed, 51 insertions(+) create mode 100644 doc/README.rockusb diff --git a/doc/README.rockusb b/doc/README.rockusb new file mode 100644 index 000..5405dc4 --- /dev/null +++ b/doc/README.rockusb @@ -0,0 +1,51 @@ +Rockusb (Rockchip USB protocol) += + +Overview + + +Rockusb protocol is widely used by Rockchip SoC based devices. It can +read/write info, image to/from devices. This document briefly describes how to +use Rockusb for upgrading firmware (e.g. kernel, u-boot, rootfs, etc.). + +Tools + +There are many tools can support Rockusb protocol. rkdeveloptool +(https://github.com/rockchip-linux/rkdeveloptool) is open source, +It is maintained by Rockchip. People don't want to build from source +can download from here +(https://github.com/rockchip-linux/rkbin/blob/master/tools/rkdeveloptool) + +Usage + +The Usage of Rockusb command is: + +rockusb + +e.g. rockusb 0 mmc 0 + +On your U-Boot console, type this command to enter rockusb mode. +On your host PC. use lsusb command. you should see a usb device +using 0x2207 as its USB verdor id. + +for more detail about the rkdeveloptool. please read the usage. + +rkdeveloptool -h + +use rkdeveloptool wl command to write lba. BeginSec is the lba on device +you want to write. + +sudo rkdeveloptool wl + +to flash U-Boot image use below command. U-Boot binary is made by mkimage. +see doc/README.rockchip for more detail about how to get U-Boot binary. + +sudo rkdeveloptool wl 64 + +There are plenty of Rockusb command. but wl(write lba) and +rd(reboot) command. These two command can let people flash +image to device. + +To do +- +* Fully support Rockusb protocol -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH V6 1/4] usb: rockchip: add the rockusb gadget
this patch implement rockusb protocol on the device side. this is based on USB
download gadget infrastructure. the rockusb function implements the rd, wl, rid
commands. it can work with rkdeveloptool
Signed-off-by: Eddie Cai
Reviewed-by: Simon Glass
Changes in v6:
-move some data to f_rockusb structure
Changes in v5:
-fix build error when build non-rockchip board
-fix checkpatch error
Changes in v4:
-use enum instead of macro define
-move some structure define and macro to f_rockusb.h
-add some function comment as Simon required
-address other comment from Simon
-fix build error as Lukasz point out
Changes in v3:
-split the macro to f_rockusb.h
-use ALLOC_CACHE_ALIGN_BUFFER to define cache safe struct inside the function.
-fix checkpatch error
---
arch/arm/include/asm/arch-rockchip/f_rockusb.h | 132 +
drivers/usb/gadget/Kconfig | 8 +
drivers/usb/gadget/Makefile| 1 +
drivers/usb/gadget/f_rockusb.c | 691 +
4 files changed, 832 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip/f_rockusb.h
create mode 100644 drivers/usb/gadget/f_rockusb.c
diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
new file mode 100644
index 000..c207a78
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2017
+ *
+ * Eddie Cai
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _F_ROCKUSB_H_
+#define _F_ROCKUSB_H_
+#include
+
+#define ROCKUSB_VERSION"0.1"
+
+#define ROCKUSB_INTERFACE_CLASS0xff
+#define ROCKUSB_INTERFACE_SUB_CLASS0x06
+#define ROCKUSB_INTERFACE_PROTOCOL 0x05
+
+#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0 (0x0200)
+#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1 (0x0040)
+#define TX_ENDPOINT_MAXIMUM_PACKET_SIZE (0x0040)
+
+#define EP_BUFFER_SIZE 4096
+/*
+ * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
+ * (64 or 512 or 1024), else we break on certain controllers like DWC3
+ * that expect bulk OUT requests to be divisible by maxpacket size.
+ */
+
+#define CONFIG_ROCKUSB_BUF_ADDRCONFIG_SYS_LOAD_ADDR
+#define CONFIG_ROCKUSB_BUF_SIZE0x0800
+
+#define RKUSB_STATUS_IDLE 0
+#define RKUSB_STATUS_CMD 1
+#define RKUSB_STATUS_RXDATA2
+#define RKUSB_STATUS_TXDATA3
+#define RKUSB_STATUS_CSW 4
+#define RKUSB_STATUS_RXDATA_PREPARE5
+#define RKUSB_STATUS_TXDATA_PREPARE6
+
+enum rkusb_command {
+K_FW_TEST_UNIT_READY = 0x00,
+K_FW_READ_FLASH_ID = 0x01,
+K_FW_SET_DEVICE_ID = 0x02,
+K_FW_TEST_BAD_BLOCK = 0x03,
+K_FW_READ_10 = 0x04,
+K_FW_WRITE_10 = 0x05,
+K_FW_ERASE_10 = 0x06,
+K_FW_WRITE_SPARE = 0x07,
+K_FW_READ_SPARE = 0x08,
+
+K_FW_ERASE_10_FORCE = 0x0b,
+K_FW_GET_VERSION = 0x0c,
+
+K_FW_LBA_READ_10 = 0x14,
+K_FW_LBA_WRITE_10 = 0x15,
+K_FW_ERASE_SYS_DISK = 0x16,
+K_FW_SDRAM_READ_10 = 0x17,
+K_FW_SDRAM_WRITE_10 = 0x18,
+K_FW_SDRAM_EXECUTE = 0x19,
+K_FW_READ_FLASH_INFO = 0x1A,
+K_FW_GET_CHIP_VER = 0x1B,
+K_FW_LOW_FORMAT = 0x1C,
+K_FW_SET_RESET_FLAG = 0x1E,
+K_FW_SPI_READ_10 = 0x21,
+K_FW_SPI_WRITE_10 = 0x22,
+
+K_FW_SESSION = 0X30,
+K_FW_RESET = 0xff,
+};
+
+#define CBW_DIRECTION_OUT 0x00
+#define CBW_DIRECTION_IN 0x80
+
+struct cmd_dispatch_info {
+ enum rkusb_command cmd;
+ /* call back function to handle rockusb command */
+ void (*cb)(struct usb_ep *ep, struct usb_request *req);
+};
+
+/* Bulk-only data structures */
+
+/* Command Block Wrapper */
+struct fsg_bulk_cb_wrap {
+ __le32 signature; /* Contains 'USBC' */
+ u32 tag;/* Unique per command id */
+ __le32 data_transfer_length; /* Size of the data */
+ u8 flags; /* Direction in bit 7 */
+ u8 lun;/* lun (normally 0) */
+ u8 length; /* Of the CDB, <= MAX_COMMAND_SIZE */
+ u8 CDB[16];/* Command Data Block */
+};
+
+#define USB_BULK_CB_WRAP_LEN31
+#define USB_BULK_CB_SIG 0x43425355 /* Spells out USBC */
+#define USB_BULK_IN_FLAG0x80
+
+/* Command status Wrapper */
+struct bulk_cs_wrap {
+ __le32 signature; /* Should = 'USBS' */
+ u32 tag;/* Same as original command */
+ __le32 residue;/* Amount not transferred */
+ u8 status; /* See below */
+};
+
+#define USB_BULK_CS_WRAP_LEN13
+#define USB_BULK_CS_SIG 0x53425355 /* Spells out 'USBS' */
+#define USB_STATUS_PASS 0
+#define USB_STATUS_FAIL 1
+#define USB_STATUS_PHASE_ERROR 2
+
+#define CSW_GOOD0x00
+#define CSW_FAIL0x01
+
+struct f_rockusb {
+
[U-Boot] [PATCH V6 0/4] introduce Rockchip rockusb
rockusb is a protocol run between host pc and device. it help people get device info, flash image to device. this patch implement rockusb on device side Changes in v6: -enable rockusb in defconfig -move some data to f_rockusb structure Changes in v5: -fix build error when build other board -fix checkpatch error Changes in v4: -use enum instead of macro define -move some structure define and macro to f_rockusb.h -add some function comment as Simon required -address other comment from Simon -fix build error as Lukasz point out Changes in v3: -switch back to use g_dnl code -address comment from Lukasz and Simon -fix checkpatch error Changes in v2: -switch to use usb masstorage framework -add readme for rockusb Eddie Cai (4): usb: rockchip: add the rockusb gadget usb: rockchip: add rockusb command rockchip:usb: add a simple readme for rockusb rockchip: rk3288: enable rockusb support on rk3288 based device arch/arm/include/asm/arch-rockchip/f_rockusb.h | 132 + cmd/Kconfig| 9 + cmd/Makefile | 1 + cmd/rockusb.c | 74 +++ configs/evb-rk3288_defconfig | 11 + configs/fennec-rk3288_defconfig| 8 + configs/firefly-rk3288_defconfig | 8 + configs/miqi-rk3288_defconfig | 8 + configs/popmetal-rk3288_defconfig | 8 + configs/tinker-rk3288_defconfig| 8 + doc/README.rockusb | 51 ++ drivers/usb/gadget/Kconfig | 8 + drivers/usb/gadget/Makefile| 1 + drivers/usb/gadget/f_rockusb.c | 691 + include/configs/rk3288_common.h| 7 - 15 files changed, 1018 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/f_rockusb.h create mode 100644 cmd/rockusb.c create mode 100644 doc/README.rockusb create mode 100644 drivers/usb/gadget/f_rockusb.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ARM: rmobile: Move address of IICDVFS(I2C) to rcar-gen3-base.h
The IICDVFS(I2C) set in r8a7796.h is common in rcar-gen3. This moves CONFIG_SYS_I2C_SH_BASE0 in rcar-gen3-base.h. Signed-off-by: Nobuhiro Iwamatsu --- arch/arm/mach-rmobile/include/mach/r8a7796.h| 3 --- arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-rmobile/include/mach/r8a7796.h b/arch/arm/mach-rmobile/include/mach/r8a7796.h index a7d1ba23bb..dab6082012 100644 --- a/arch/arm/mach-rmobile/include/mach/r8a7796.h +++ b/arch/arm/mach-rmobile/include/mach/r8a7796.h @@ -33,7 +33,4 @@ #define CONFIG_SYS_SH_SDHI3_BASE 0xEE16/* either MMC1 */ #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4 -/* SH-I2C */ -#define CONFIG_SYS_I2C_SH_BASE00xE60B - #endif /* __ASM_ARCH_R8A7796_H */ diff --git a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h index fbd87c4a01..c197642fe4 100644 --- a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h +++ b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h @@ -79,6 +79,9 @@ #define PUEN_USB1_OVC (1 << 2) #define PUEN_USB1_PWEN (1 << 1) +/* IICDVFS (I2C) */ +#define CONFIG_SYS_I2C_SH_BASE00xE60B + #ifndef __ASSEMBLY__ #include -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ARM tools-only CROSS_COMPILE issues within Cygwin
From: U-Boot on behalf of Chris Renshaw
Sent: May 20, 2017 12:53 AM
To: u-boot@lists.denx.de
Subject: [U-Boot] ARM tools-only CROSS_COMPILE issues within Cygwin
Hi!
I've managed to get U-Boot sandbox_defconfig tools-only compiling nicely in
Cygwin with a few minor modifications to the source tree I hope you'll consider
for proper inclusion:
# Even with case insensitivity disabled, Cygwin does not handle
execution of the file scripts/Kconfig and the directory scripts/kconfig
correctly
mv scripts/Kconfig scripts/Kconfig-scripts;
sed -i 's;source "scripts/Kconfig";source "scripts/Kconfig-scripts";'
Kconfig;
# We can still be conservative with our standard without breaking the
Cygwin compile completely (inline function issues)
sed -i "s/HOSTCFLAGS\t+= -ansi/HOSTCFLAGS\t+= -std=gnu90/" Makefile;
# Cygwin's compiler will create a .dll, not a .so
sed -i 's/mv _libfdt.so/mv _libfdt.*/' tools/Makefile;
My problems arise when I then attempt to do the same for any Android NDK
stand-alone cross-compiler through Cygwin. I've managed to get most other
things to compile with this setup as the stand-alone is the preferred/only
method to ensure a proper sysroot etc. when using Makefiles. The issues and
some workarounds for getting any further with U-Boot sandbox_defconfig
tools-only I've come up with so far are as follows:
1) Despite exporting the usual PATH and CROSS_COMPILE environment tools-only
insists on using HOSTCC and creates Cygwin builds, so:
export CROSS_BUILD_TOOLS=y CC="${CROSS_COMPILE}gcc";
2) The exports in #1 appear to have the desired effect and forces the
CROSS_COMPILE toolchain to be used for the tool builds themselves, but produces
further frustrations:
HOSTCC tools/gen_eth_addr
g:/cygwin/home/chris/x-tools/arm-linux-androideabi-4.9/bin/../lib/gcc/arm-linux-androideabi/4.9/../../../../arm-linux-androideabi/bin/ld.exe:
error:
g:/cygwin/home/chris/x-tools/arm-linux-androideabi-4.9/bin/../sysroot/usr/lib/libc.a(atexit.o):
multiple definition of 'atexit'
g:/cygwin/home/chris/x-tools/arm-linux-androideabi-4.9/bin/../lib/gcc/arm-linux-androideabi/4.9/../../../../arm-linux-androideabi/bin/ld.exe:
g:/cygwin/home/chris/x-tools/arm-linux-androideabi-4.9/bin/../lib/gcc/arm-linux-androideabi/4.9/crtbegin_dynamic.o:
previous definition here
g:/cygwin/home/chris/x-tools/arm-linux-androideabi-4.9/bin/../lib/gcc/arm-linux-androideabi/4.9/../../../../arm-linux-androideabi/bin/ld.exe:
error: cannot find -ldl
/s/ndk-toolchain/src/build/../gcc/gcc-4.9/libgcc/config/arm/lib1funcs.S:1337:
error: undefined reference to 'raise'
collect2.exe: error: ld returned 1 exit status
make[1]: *** [scripts/Makefile.host:99: tools/gen_eth_addr] Error 1
make: *** [Makefile:1413: tools-only] Error 2
3) Attempting to resolve #2 by specifying --sysroot= with *any* value (ie. what
should be working paths like
"/home/Chris/x-tools/arm-linux-androideabi-4.9/sysroot",
"G:/cygwin/home/Chris/x-tools/arm-linux-androideabi-4.9/sysroot" or just a
single nonsense word like "fubar") breaks the compiler even further:
HOSTCC tools/gen_eth_addr
In file included from ././include/compiler.h:19:0,
from ././include/libfdt_env.h:12,
from :0:
g:\cygwin\home\chris\x-tools\arm-linux-androideabi-4.9\lib\gcc\arm-linux-androideabi\4.9\include\stdint.h:9:26:
fatal error: stdint.h: No such file or directory
# include_next
^
compilation terminated.
make[1]: *** [scripts/Makefile.host:99: tools/gen_eth_addr] Error 1
make: *** [Makefile:1413: tools-only] Error 2
I've attempted to throw -L and -I with various paths at it by adding them to
the exported CC= override, both with -Wl, and without to no avail. Considering
under Cygwin itself the tools build and the NDK stand-alone toolchains work
perfectly for other things I feel like I'm close, so I'm wondering if there is
anything I am missing or any fixes (e.g. to make CROSS_COMPILE work normally on
Cygwin with tools-only, or, getting --sysroot to cooperate like it should) you
could think of that might improve the situation.
Thank you for any insight or guidance you can provide!
Chris Renshaw
---
Hello,
I haven't yet received a response, but I've looked into this abit more, and it
appears it has nothing to do with Cygwin, as I'm trying it on my Ubuntu VM and
it still won't compile with the exact same -ldl error.
Has anyone had any success cross-compiling U-Boot tools with the Android NDK on
any platform? Is there something I'm missing? Please help.
I'm starting to think that there is some incompatibility between U-Boot's build
system and the Android NDK itself; could a U-Boot developer please look into
this?
Thank you for your time,
Chris Renshaw
___
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U-Boot@lists.denx.de
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Re: [U-Boot] [PATCH 11/38] samsung: usb: Drop ohci-s3c24xx driver
2017. 5. 18. 00:12에 "Simon Glass" 님이 작성:
This is not used anymore. Drop it.
Signed-off-by: Simon Glass
---
drivers/usb/host/Makefile |1 -
drivers/usb/host/ohci-s3c24xx.c | 1688 --
-
drivers/usb/host/ohci-s3c24xx.h | 409 --
include/common.h|3 +-
4 files changed, 1 insertion(+), 2100 deletions(-)
delete mode 100644 drivers/usb/host/ohci-s3c24xx.c
delete mode 100644 drivers/usb/host/ohci-s3c24xx.h
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index bf354fe8d5..2baec721fd 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -17,7 +17,6 @@ obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
-obj-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o
obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o
obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
diff --git a/drivers/usb/host/ohci-s3c24xx.c b/drivers/usb/host/ohci-
s3c24xx.c
deleted file mode 100644
index 28b9ab5176..00
--- a/drivers/usb/host/ohci-s3c24xx.c
+++ /dev/null
@@ -1,1688 +0,0 @@
-/*
- * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
- *
- * (C) Copyright 2003
- * Gary Jennejohn, DENX Software Engineering
- *
- * Note: Much of this code has been derived from Linux 2.4
- * (C) Copyright 1999 Roman Weissgaerber
- * (C) Copyright 2000-2002 David Brownell
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-/*
- * IMPORTANT NOTES
- * 1 - this driver is intended for use with USB Mass Storage Devices
- * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
- */
-
-#include
-/* #include no PCI on the S3C24X0 */
-
-#if defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0)
-
-#include
-#include
-#include
-#include
-#include "ohci-s3c24xx.h"
-
-#define OHCI_USE_NPS /* force NoPowerSwitching mode */
-#undef OHCI_VERBOSE_DEBUG /* not always helpful */
-
-
-/* For initializing controller (mask in an HCFS mode too) */
-#defineOHCI_CONTROL_INIT \
- (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
-
-#undef DEBUG
-#ifdef DEBUG
-#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
-#else
-#define dbg(format, arg...) do {} while(0)
-#endif /* DEBUG */
-#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
-#undef SHOW_INFO
-#ifdef SHOW_INFO
-#define info(format, arg...) printf("INFO: " format "\n", ## arg)
-#else
-#define info(format, arg...) do {} while(0)
-#endif
-
-#define m16_swap(x) swap_16(x)
-#define m32_swap(x) swap_32(x)
-
-/* global struct ohci */
-static struct ohci gohci;
-/* this must be aligned to a 256 byte boundary */
-struct ohci_hcca ghcca[1];
-/* a pointer to the aligned storage */
-struct ohci_hcca *phcca;
-/* this allocates EDs for all possible endpoints */
-struct ohci_device ohci_dev;
-/* urb_priv */
-struct urb_priv urb_priv;
-/* RHSC flag */
-int got_rhsc;
-/* device which was disconnected */
-struct usb_device *devgone;
-/* flag guarding URB transation */
-int urb_finished = 0;
-
-/*-
*/
-
-/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
- * The erratum (#4) description is incorrect. AMD's workaround waits
- * till some bits (mostly reserved) are clear; ok for all revs.
- */
-#define OHCI_QUIRK_AMD756 0xabcd
-#define read_roothub(hc, register, mask) ({ \
- u32 temp = readl (&hc->regs->roothub.register); \
- if (hc->flags & OHCI_QUIRK_AMD756) \
- while (temp & mask) \
- temp = readl (&hc->regs->roothub.register); \
- temp; })
-
-static u32 roothub_a(struct ohci *hc)
-{
- return read_roothub(hc, a, 0xfc0fe000);
-}
-static inline u32 roothub_b(struct ohci *hc)
-{
- return readl(&hc->regs->roothub.b);
-}
-static inline u32 roothub_status(struct ohci *hc)
-{
- return readl(&hc->regs->roothub.status);
-}
-static u32 roothub_portstatus(struct ohci *hc, int i)
-{
- return read_roothub(hc, portstatus[i], 0xffe0fce0);
-}
-
-/* forward declaration */
-static int hc_interrupt(void);
-static void td_submit_job(struct usb_device *dev, unsigned long pipe,
- void *buffer, int transfer_len,
- struct devrequest *setup, struct urb_priv *urb,
- int interval);
-
-/*-
*
- * URB support functions
- *---
--*/
-
-/* free HCD-private data associated with this URB */
-
-static void urb_free_priv(struct urb_priv *urb)
-{
- int i;
- int last;
- struct td *td;
-
- last = urb->length - 1;
- if (last >= 0) {
- for (i = 0; i <= last; i++) {
-
Re: [U-Boot] [PATCH 09/38] samsung: Drop s3c24x0 arch-specific code
2017. 5. 18. 00:04에 "Simon Glass" 님이 작성:
This is not used anymore. Drop it.
Signed-off-by: Simon Glass
---
arch/arm/cpu/arm920t/Makefile | 1 -
arch/arm/cpu/arm920t/s3c24x0/Makefile | 10 -
arch/arm/cpu/arm920t/s3c24x0/cpu_info.c | 38 --
arch/arm/cpu/arm920t/s3c24x0/speed.c| 102
arch/arm/cpu/arm920t/s3c24x0/timer.c| 160 --
arch/arm/include/asm/arch-s3c24x0/gpio.h| 155 --
arch/arm/include/asm/arch-s3c24x0/iomux.h | 184 --
arch/arm/include/asm/arch-s3c24x0/memory.h | 159 --
arch/arm/include/asm/arch-s3c24x0/s3c2400.h | 136 -
arch/arm/include/asm/arch-s3c24x0/s3c2410.h | 147 -
arch/arm/include/asm/arch-s3c24x0/s3c2440.h | 145 -
arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 708
arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h | 16 -
13 files changed, 1961 deletions(-)
delete mode 100644 arch/arm/cpu/arm920t/s3c24x0/Makefile
delete mode 100644 arch/arm/cpu/arm920t/s3c24x0/cpu_info.c
delete mode 100644 arch/arm/cpu/arm920t/s3c24x0/speed.c
delete mode 100644 arch/arm/cpu/arm920t/s3c24x0/timer.c
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/gpio.h
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/iomux.h
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/memory.h
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/s3c2400.h
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/s3c2410.h
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/s3c2440.h
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
delete mode 100644 arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h
diff --git a/arch/arm/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile
index 8faf34b87e..948b764193 100644
--- a/arch/arm/cpu/arm920t/Makefile
+++ b/arch/arm/cpu/arm920t/Makefile
@@ -11,7 +11,6 @@ obj-y += cpu.o
obj-$(CONFIG_EP93XX) += ep93xx/
obj-$(CONFIG_IMX) += imx/
-obj-$(CONFIG_S3C24X0) += s3c24x0/
# some files can only build in ARM mode
diff --git a/arch/arm/cpu/arm920t/s3c24x0/Makefile b/arch/arm/cpu/arm920t/
s3c24x0/Makefile
deleted file mode 100644
index e78f8a017c..00
--- a/arch/arm/cpu/arm920t/s3c24x0/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
-obj-y += speed.o
-obj-y += timer.o
diff --git a/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c b/arch/arm/cpu/arm920t/
s3c24x0/cpu_info.c
deleted file mode 100644
index fede51a160..00
--- a/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2010
- * David Mueller
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include
-#include
-#include
-
-typedef ulong (*getfreq)(void);
-
-static const getfreq freq_f[] = {
- get_FCLK,
- get_HCLK,
- get_PCLK,
-};
-
-static const char freq_c[] = { 'F', 'H', 'P' };
-
-int print_cpuinfo(void)
-{
- int i;
- char buf[32];
-/* the S3C2400 seems to be lacking a CHIP ID register */
-#ifndef CONFIG_S3C2400
- ulong cpuid;
- struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
-
- cpuid = readl(&gpio->gstatus1);
- printf("CPUID: %8lX\n", cpuid);
-#endif
- for (i = 0; i < ARRAY_SIZE(freq_f); i++)
- printf("%cCLK: %8s MHz\n", freq_c[i], strmhz(buf,
freq_f[i]()));
-
- return 0;
-}
diff --git a/arch/arm/cpu/arm920t/s3c24x0/speed.c b/arch/arm/cpu/arm920t/
s3c24x0/speed.c
deleted file mode 100644
index 3701c5d9a3..00
--- a/arch/arm/cpu/arm920t/s3c24x0/speed.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, d.muel...@elsoft.ch
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-/* This code should work for both the S3C2400 and the S3C2410
- * as they seem to have the same PLL and clock machinery inside.
- * The different address mapping is handled by the s3c24xx.h files below.
- */
-
-#include
-#ifdef CONFIG_S3C24X0
-
-#include
-#include
-
-#define MPLL 0
-#define UPLL 1
-
-/* -
*/
-/* NOTE: This describes the proper use of this file.
- *
- * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
- *
- * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
- * the specified bus in HZ.
- */
-/* -
*/
-
-static ulong get_PLLCLK(int pllreg)
-{
- struct s3c24x0_clock_power *clk_power =
s3c24x0_get_base_clock_power();
- ulong r, m, p, s;
-
- if (pllreg == MPLL)
- r = readl(&clk_power->mpllcon);
- else if (pllreg == UPLL)
- r = readl(&clk_power->upllcon);
- else
-
[U-Boot] [PATCH v2] cmd: fsfitxtract: Extract a part of a FIT multi-image stored on a filesystem
Sometimes we interested only in one single small subimage from big multipart
FIT. This command tries to avoid reading out the whole FIT because of memory
or time considerations.
Since we don't have mmap() in U-Boot, this is done by reading the file in
small chunks and trying to parse FIT, skipping reading the payload data
of all images before the requested one, while preserving FIT structure.
Changelog:
v2:
* Skip unneeded subimages data instead of reading it out
* Read whole data in one operation
* Lot of refactoring
* Faster, more versatile and robust
* Improved code readability
v1:
* First submission to maillist
Signed-off-by: Alexey Ignatov
---
cmd/Kconfig | 7 ++
cmd/ximg.c | 356
2 files changed, 363 insertions(+)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d9f7151bac..ff8ade96b4 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -265,6 +265,13 @@ config CMD_XIMG
help
Extract a part of a multi-image.
+config CMD_FSFITXIMG
+ bool "fsfitxtract"
+ default y
+ depends on FIT
+ help
+ Extract a part of a FIT multi-image stored on a filesystem
+
config CMD_POWEROFF
bool
diff --git a/cmd/ximg.c b/cmd/ximg.c
index 73a571b52b..62e2cb2ac1 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -22,6 +22,11 @@
#endif
#include
#include
+#ifdef CONFIG_CMD_FSFITXIMG
+#include
+#include
+#include
+#endif
#ifndef CONFIG_SYS_XIMG_LEN
/* use 8MByte as default max gunzip size */
@@ -283,3 +288,354 @@ U_BOOT_CMD(
imxtract, 4, 1, do_imgextract,
"extract a part of a multi-image", imgextract_help_text
);
+
+#if defined(CONFIG_FIT) && defined(CONFIG_CMD_FSFITXIMG)
+
+/* TODO: maybe make this configurable */
+#define CHUNK_SIZE (8*1024)
+#define IMAGE_TAIL_SIZECHUNK_SIZE
+
+struct fs_fdt_context {
+ const char *dev;
+ const char *part;
+ const char *name;
+
+ ulong dest;
+ ulong len;
+ ulong src_off;
+ void *fdt;
+};
+
+static int fs_load(struct fs_fdt_context *ctx, loff_t len)
+{
+ int ret = 0;
+ loff_t len_read;
+
+ debug("Reading %lld bytes from offset 0x%lx to 0x%lx\n",
+ len, ctx->src_off, ctx->dest + ctx->len);
+
+ if (fs_set_blk_dev(ctx->dev, ctx->part, FS_TYPE_ANY))
+ return -1;
+
+ ret = fs_read(ctx->name, ctx->dest + ctx->len, ctx->src_off, len,
&len_read);
+
+ if (ret < 0) {
+ printf("Read failed: %d", ret);
+ return ret;
+ }
+
+ return len_read;
+}
+
+static int fs_load_next_chunk(struct fs_fdt_context *ctx)
+{
+ int ret;
+ ret = fs_load(ctx, CHUNK_SIZE);
+ if (ret < 0)
+ return ret;
+
+ ctx->len += ret;
+ ctx->src_off += ret;
+
+ return 0;
+}
+
+static int fdt_err_retry(int err)
+{
+ return
+ (err == -FDT_ERR_TRUNCATED) ||
+ (err == -FDT_ERR_BADSTRUCTURE);
+}
+
+static int fs_fdt_wrap(struct fs_fdt_context *ctx,
+ int (*fdt_func)(const void *fdt, int offset), int offset)
+{
+ int ret = 0;
+ while (1) {
+ ret = fdt_func(ctx->fdt, offset);
+
+ if (ret >= 0)
+ break;
+
+ if (!fdt_err_retry(ret)) {
+ if (ret != -FDT_ERR_NOTFOUND)
+ printf("Error while parsing FIT: %s\n",
fdt_strerror(ret));
+ break;
+ }
+
+ ret = fs_load_next_chunk(ctx);
+ if (ret < 0)
+ break;
+ }
+
+ return ret;
+}
+
+static inline int fs_fit_image_skip_data(struct fs_fdt_context *ctx, int
noffset)
+{
+ int plen = 0;
+ int poffset = 0;
+ void *ptr;
+ const void *nptr;
+ int tail;
+
+ for (poffset = fs_fdt_wrap(ctx, fdt_first_property_offset, noffset);
+ poffset >= 0;
+ poffset = fs_fdt_wrap(ctx, fdt_next_property_offset,
poffset)) {
+ const struct fdt_property *prop =
+ fdt_get_property_by_offset(ctx->fdt, poffset, &plen);
+ const char *name;
+
+ if (!prop) {
+ printf("Can't get property: %s\n", fdt_strerror(plen));
+ return 1;
+ }
+
+ name = fdt_string(ctx->fdt, fdt32_to_cpu(prop->nameoff));
+ if (!name) {
+ printf("Can't get property name\n");
+ return 1;
+ }
+
+ if (strcmp(name, "data") == 0)
+ break;
+ };
+
+ if (poffset < 0)
+ return poffset;
+
+ debug("data prop offset %d, len %d\n", poffset, plen);
+
+ /* Skip the whole data property which can be quite big using
+* some sma
Re: [U-Boot] [PATCH 10/38] samsung: mmc: Drop s3c_sdi driver
2017. 5. 18. 00:18에 "Simon Glass" 님이 작성:
This is no-longer used in U-Boot. Drop it.
Signed-off-by: Simon Glass
---
drivers/mmc/Makefile | 1 -
drivers/mmc/s3c_sdi.c| 323 --
-
scripts/config_whitelist.txt | 1 -
3 files changed, 325 deletions(-)
delete mode 100644 drivers/mmc/s3c_sdi.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index a078649899..2d781c38a6 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -40,7 +40,6 @@ obj-$(CONFIG_MMC_MXS) += mxsmmc.o
obj-$(CONFIG_MMC_PCI) += pci_mmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
-obj-$(CONFIG_S3C_SDI) += s3c_sdi.o
obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
diff --git a/drivers/mmc/s3c_sdi.c b/drivers/mmc/s3c_sdi.c
deleted file mode 100644
index faf7b83a14..00
--- a/drivers/mmc/s3c_sdi.c
+++ /dev/null
@@ -1,323 +0,0 @@
-/*
- * S3C24xx SD/MMC driver
- *
- * Based on OpenMoko S3C24xx driver by Harald Welte
- *
- * Copyright (C) 2014 Marek Vasut
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#define S3C2440_SDICON_SDRESET (1 << 8)
-#define S3C2410_SDICON_FIFORESET (1 << 1)
-#define S3C2410_SDICON_CLOCKTYPE (1 << 0)
-
-#define S3C2410_SDICMDCON_LONGRSP (1 << 10)
-#define S3C2410_SDICMDCON_WAITRSP (1 << 9)
-#define S3C2410_SDICMDCON_CMDSTART (1 << 8)
-#define S3C2410_SDICMDCON_SENDERHOST (1 << 6)
-#define S3C2410_SDICMDCON_INDEX0x3f
-
-#define S3C2410_SDICMDSTAT_CRCFAIL (1 << 12)
-#define S3C2410_SDICMDSTAT_CMDSENT (1 << 11)
-#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1 << 10)
-#define S3C2410_SDICMDSTAT_RSPFIN (1 << 9)
-
-#define S3C2440_SDIDCON_DS_WORD(2 << 22)
-#define S3C2410_SDIDCON_TXAFTERRESP(1 << 20)
-#define S3C2410_SDIDCON_RXAFTERCMD (1 << 19)
-#define S3C2410_SDIDCON_BLOCKMODE (1 << 17)
-#define S3C2410_SDIDCON_WIDEBUS(1 << 16)
-#define S3C2440_SDIDCON_DATSTART (1 << 14)
-#define S3C2410_SDIDCON_XFER_RXSTART (2 << 12)
-#define S3C2410_SDIDCON_XFER_TXSTART (3 << 12)
-#define S3C2410_SDIDCON_BLKNUM 0x7ff
-
-#define S3C2410_SDIDSTA_FIFOFAIL (1 << 8)
-#define S3C2410_SDIDSTA_CRCFAIL(1 << 7)
-#define S3C2410_SDIDSTA_RXCRCFAIL (1 << 6)
-#define S3C2410_SDIDSTA_DATATIMEOUT(1 << 5)
-#define S3C2410_SDIDSTA_XFERFINISH (1 << 4)
-
-#define S3C2410_SDIFSTA_TFHALF (1 << 11)
-#define S3C2410_SDIFSTA_COUNTMASK 0x7f
-
-/*
- * WARNING: We only support one SD IP block.
- * NOTE: It's not likely there will ever exist an S3C24xx with two,
- * at least not in this universe all right.
- */
-static int wide_bus;
-
-static int
-s3cmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data
*data)
-{
- struct s3c24x0_sdi *sdi_regs = s3c24x0_get_base_sdi();
- uint32_t sdiccon, sdicsta, sdidcon, sdidsta, sdidat, sdifsta;
- uint32_t sdicsta_wait_bit = S3C2410_SDICMDSTAT_CMDSENT;
- unsigned int timeout = 10;
- int ret = 0, xfer_len, data_offset = 0;
- const uint32_t sdidsta_err_mask = S3C2410_SDIDSTA_FIFOFAIL |
- S3C2410_SDIDSTA_CRCFAIL | S3C2410_SDIDSTA_RXCRCFAIL |
- S3C2410_SDIDSTA_DATATIMEOUT;
-
-
- writel(0x, &sdi_regs->sdicsta);
- writel(0x, &sdi_regs->sdidsta);
- writel(0x, &sdi_regs->sdifsta);
-
- /* Set up data transfer (if applicable). */
- if (data) {
- writel(data->blocksize, &sdi_regs->sdibsize);
-
- sdidcon = data->blocks & S3C2410_SDIDCON_BLKNUM;
- sdidcon |= S3C2410_SDIDCON_BLOCKMODE;
-#if defined(CONFIG_S3C2440)
- sdidcon |= S3C2440_SDIDCON_DS_WORD |
S3C2440_SDIDCON_DATSTART;
-#endif
- if (wide_bus)
- sdidcon |= S3C2410_SDIDCON_WIDEBUS;
-
- if (data->flags & MMC_DATA_READ) {
- sdidcon |= S3C2410_SDIDCON_RXAFTERCMD;
- sdidcon |= S3C2410_SDIDCON_XFER_RXSTART;
- } else {
- sdidcon |= S3C2410_SDIDCON_TXAFTERRESP;
- sdidcon |= S3C2410_SDIDCON_XFER_TXSTART;
- }
-
- writel(sdidcon, &sdi_regs->sdidcon);
- }
-
- /* Write CMD arg. */
- writel(cmd->cmdarg, &sdi_regs->sdicarg);
-
- /* Write CMD index. */
- sdiccon = cmd->cmdidx & S3C2410_SDICMDCON_INDEX;
- sdiccon |= S3C2410_SDICMDCON_SENDERHOST;
- sdiccon |= S3C2410_SDICMDCON_CMDSTART;
-
- /* Command with short response. */
- if (cmd->resp_type & MMC_RSP_PRESENT) {
- sdiccon |= S3C2410_SDICMDCON_WAITRSP;
- sdicsta_wait_bit = S3C2410_SDICMDSTAT_RSPFIN;
-
Re: [U-Boot] [PATCH 13/38] samsung: Drop more references fo s3c24x0
2017. 5. 17. 23:54에 "Simon Glass" 님이 작성:
This is dead code now. Drop it.
Signed-off-by: Simon Glass
---
arch/arm/cpu/arm920t/start.S | 37 --
---
drivers/i2c/s3c24x0_i2c.c | 4
drivers/usb/gadget/gadget_chips.h | 8
drivers/usb/host/ohci-hcd.c | 1 -
scripts/config_whitelist.txt | 8
5 files changed, 58 deletions(-)
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 3ada6d026f..3880a402d8 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -50,43 +50,6 @@ copyex:
bne copyex
#endif
-#ifdef CONFIG_S3C24X0
- /* turn off the watchdog */
-
-# if defined(CONFIG_S3C2400)
-# define pWTCON 0x1530
-# define INTMSK 0x1448 /* Interrupt-Controller base
addresses */
-# define CLKDIVN 0x14800014 /* clock divisor register */
-#else
-# define pWTCON 0x5300
-# define INTMSK 0x4A08 /* Interrupt-Controller base
addresses */
-# define INTSUBMSK0x4A1C
-# define CLKDIVN 0x4C14 /* clock divisor register */
-# endif
-
- ldr r0, =pWTCON
- mov r1, #0x0
- str r1, [r0]
-
- /*
-* mask all IRQs by setting all bits in the INTMR - default
-*/
- mov r1, #0x
- ldr r0, =INTMSK
- str r1, [r0]
-# if defined(CONFIG_S3C2410)
- ldr r1, =0x3ff
- ldr r0, =INTSUBMSK
- str r1, [r0]
-# endif
-
- /* FCLK:HCLK:PCLK = 1:2:4 */
- /* default FCLK is 120 MHz ! */
- ldr r0, =CLKDIVN
- mov r1, #3
- str r1, [r0]
-#endif /* CONFIG_S3C24X0 */
-
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 3c69dbf409..939fbbc819 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -5,10 +5,6 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-/* This code should work for both the S3C2400 and the S3C2410
- * as they seem to have the same I2C controller inside.
- * The different address mapping is handled by the s3c24xx.h files below.
- */
#include
#include
#include
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_
chips.h
index 973cd971ad..0e3ba94730 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -91,12 +91,6 @@
#define gadget_is_atmel_usba(g)0
#endif
-#ifdef CONFIG_USB_GADGET_S3C2410
-#define gadget_is_s3c2410(g)(!strcmp("s3c2410_udc", (g)->name))
-#else
-#define gadget_is_s3c2410(g)0
-#endif
-
#ifdef CONFIG_USB_GADGET_AT91
#define gadget_is_at91(g) (!strcmp("at91_udc", (g)->name))
#else
@@ -207,8 +201,6 @@ static inline int usb_gadget_controller_number(struct
usb_gadget *gadget)
return 0x09;
else if (gadget_is_pxa27x(gadget))
return 0x10;
- else if (gadget_is_s3c2410(gadget))
- return 0x11;
else if (gadget_is_at91(gadget))
return 0x12;
else if (gadget_is_imx(gadget))
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 80cfe11290..b5e0304348 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -51,7 +51,6 @@
#endif
#if defined(CONFIG_CPU_ARM920T) || \
-defined(CONFIG_S3C24X0) || \
defined(CONFIG_440EP) || \
defined(CONFIG_PCI_OHCI) || \
defined(CONFIG_MPC5200) || \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index dd7b328d8f..10f9fb6371 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2361,14 +2361,7 @@ CONFIG_RUN_FROM_DDR1
CONFIG_RUN_FROM_IRAM_ONLY
CONFIG_RX_DESCR_NUM
CONFIG_S32V234
-CONFIG_S3C2400
-CONFIG_S3C2410
-CONFIG_S3C2410_NAND_BBT
-CONFIG_S3C2410_NAND_HWECC
CONFIG_S3C24X0
-CONFIG_S3C24XX_TACLS
-CONFIG_S3C24XX_TWRPH0
-CONFIG_S3C24XX_TWRPH1
CONFIG_S3D2_CLK_FREQ
CONFIG_S5P
CONFIG_S5PC100
@@ -6326,7 +6319,6 @@ CONFIG_USB_GADGET_NET2280
CONFIG_USB_GADGET_OMAP
CONFIG_USB_GADGET_PXA27X
CONFIG_USB_GADGET_PXA2XX
-CONFIG_USB_GADGET_S3C2410
CONFIG_USB_GADGET_SA1100
CONFIG_USB_GADGET_SUPERH
CONFIG_USB_GADGET_SX2
--
2.13.0.303.g4ebf302169-goog
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Acked-by: Minkyu Kang
Thanks,
Minkyu Kang
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 12/38] samsung: nand: Drop s3c2410_nand driver
2017. 5. 17. 23:53에 "Simon Glass" 님이 작성:
This is not used anymore. Drop it.
Signed-off-by: Simon Glass
---
drivers/mtd/nand/Makefile | 1 -
drivers/mtd/nand/s3c2410_nand.c | 175 --
--
2 files changed, 176 deletions(-)
delete mode 100644 drivers/mtd/nand/s3c2410_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 82358f674b..5d5f9f5267 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -59,7 +59,6 @@ obj-$(CONFIG_NAND_MXC) += mxc_nand.o
obj-$(CONFIG_NAND_MXS) += mxs_nand.o
obj-$(CONFIG_NAND_NDFC) += ndfc.o
obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
-obj-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nan
d.c
deleted file mode 100644
index dd742a6351..00
--- a/drivers/mtd/nand/s3c2410_nand.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * (C) Copyright 2006 OpenMoko, Inc.
- * Author: Harald Welte
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include
-
-#include
-#include
-#include
-
-#define S3C2410_NFCONF_EN (1<<15)
-#define S3C2410_NFCONF_512BYTE (1<<14)
-#define S3C2410_NFCONF_4STEP (1<<13)
-#define S3C2410_NFCONF_INITECC (1<<12)
-#define S3C2410_NFCONF_nFCE(1<<11)
-#define S3C2410_NFCONF_TACLS(x)((x)<<8)
-#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
-#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
-
-#define S3C2410_ADDR_NALE 4
-#define S3C2410_ADDR_NCLE 8
-
-#ifdef CONFIG_NAND_SPL
-
-/* in the early stage of NAND flash booting, printf() is not available */
-#define printf(fmt, args...)
-
-static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
-{
- int i;
- struct nand_chip *this = mtd_to_nand(mtd);
-
- for (i = 0; i < len; i++)
- buf[i] = readb(this->IO_ADDR_R);
-}
-#endif
-
-static void s3c24x0_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
ctrl)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct s3c24x0_nand *nand = s3c24x0_get_base_nand();
-
- debug("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
-
- if (ctrl & NAND_CTRL_CHANGE) {
- ulong IO_ADDR_W = (ulong)nand;
-
- if (!(ctrl & NAND_CLE))
- IO_ADDR_W |= S3C2410_ADDR_NCLE;
- if (!(ctrl & NAND_ALE))
- IO_ADDR_W |= S3C2410_ADDR_NALE;
-
- chip->IO_ADDR_W = (void *)IO_ADDR_W;
-
- if (ctrl & NAND_NCE)
- writel(readl(&nand->nfconf) & ~S3C2410_NFCONF_nFCE,
- &nand->nfconf);
- else
- writel(readl(&nand->nfconf) | S3C2410_NFCONF_nFCE,
- &nand->nfconf);
- }
-
- if (cmd != NAND_CMD_NONE)
- writeb(cmd, chip->IO_ADDR_W);
-}
-
-static int s3c24x0_dev_ready(struct mtd_info *mtd)
-{
- struct s3c24x0_nand *nand = s3c24x0_get_base_nand();
- debug("dev_ready\n");
- return readl(&nand->nfstat) & 0x01;
-}
-
-#ifdef CONFIG_S3C2410_NAND_HWECC
-void s3c24x0_nand_enable_hwecc(struct mtd_info *mtd, int mode)
-{
- struct s3c24x0_nand *nand = s3c24x0_get_base_nand();
- debug("s3c24x0_nand_enable_hwecc(%p, %d)\n", mtd, mode);
- writel(readl(&nand->nfconf) | S3C2410_NFCONF_INITECC,
&nand->nfconf);
-}
-
-static int s3c24x0_nand_calculate_ecc(struct mtd_info *mtd, const u_char
*dat,
- u_char *ecc_code)
-{
- struct s3c24x0_nand *nand = s3c24x0_get_base_nand();
- ecc_code[0] = readb(&nand->nfecc);
- ecc_code[1] = readb(&nand->nfecc + 1);
- ecc_code[2] = readb(&nand->nfecc + 2);
- debug("s3c24x0_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
- mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
-
- return 0;
-}
-
-static int s3c24x0_nand_correct_data(struct mtd_info *mtd, u_char *dat,
-u_char *read_ecc, u_char *calc_ecc)
-{
- if (read_ecc[0] == calc_ecc[0] &&
- read_ecc[1] == calc_ecc[1] &&
- read_ecc[2] == calc_ecc[2])
- return 0;
-
- printf("s3c24x0_nand_correct_data: not implemented\n");
- return -EBADMSG;
-}
-#endif
-
-int board_nand_init(struct nand_chip *nand)
-{
- u_int32_t cfg;
- u_int8_t tacls, twrph0, twrph1;
- struct s3c24x0_clock_power *clk_power =
s3c24x0_get_base_clock_power();
- struct s3c24x0_nand *nand_reg = s3c24x0_get_base_nand();
-
- debug("board_nand_init()\n");
-
- writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
-
- /* initialize hardware */
-#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
- tacls = CONFIG_S3C24XX_TACLS;
- twrph0 = CONFIG_S3C24XX_TWRPH0;
- twrph1 = CONFIG_S3C24XX_TWRPH1;
-#else
- tacls = 4;
-
Re: [U-Boot] [PATCH 8/8] sf: add driver for Atmel QSPI controller
On 2017/5/19 22:59, Cyrille Pitchen wrote:
This patch adds support to the Atmel Quad SPI controller.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/spi/Kconfig | 7 +
drivers/spi/Makefile | 1 +
drivers/spi/atmel_qspi.c | 404 +++
drivers/spi/atmel_qspi.h | 169
4 files changed, 581 insertions(+)
create mode 100644 drivers/spi/atmel_qspi.c
create mode 100644 drivers/spi/atmel_qspi.h
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index f3f7dbe0897b..73f2e5c26bfb 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -32,6 +32,13 @@ config ATH79_SPI
uses driver model and requires a device tree binding to operate.
please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
+config ATMEL_QSPI
+ bool "Atmel QSPI driver"
+ depends on ARCH_AT91
+ help
+ Enable the Ateml Quad-SPI (QSPI) driver. This driver can only be
+ used to access SPI NOR flashes.
+
config ATMEL_SPI
bool "Atmel SPI driver"
depends on ARCH_AT91
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c090562c7732..af75fa41c82f 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -18,6 +18,7 @@ endif
obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
+obj-$(CONFIG_ATMEL_QSPI) += atmel_qspi.o
obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/atmel_qspi.c b/drivers/spi/atmel_qspi.c
new file mode 100644
index ..6c265d0a4714
--- /dev/null
+++ b/drivers/spi/atmel_qspi.c
@@ -0,0 +1,404 @@
+/*
+ * Copyright (C) 2017 Atmel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "atmel_qspi.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void atmel_qspi_memcpy_fromio(void *dst, unsigned long src, size_t len)
+{
+ u8 *d = (u8 *)dst;
+
+ while (len--) {
+ *d++ = readb(src);
+ src++;
+ }
+}
+
+static void atmel_qspi_memcpy_toio(unsigned long dst, const void *src,
+ size_t len)
+{
+ const u8 *s = (const u8 *)src;
+
+ while (len--) {
+ writeb(*s, dst);
+ dst++;
+ s++;
+ }
+}
+
+static int atmel_qspi_set_ifr_tfrtype(u8 flags, u32 *ifr)
+{
+ u32 ifr_tfrtype;
+
+ switch (flags & SPI_FCMD_TYPE) {
+ case SPI_FCMD_READ:
+ ifr_tfrtype = QSPI_IFR_TFRTYPE_READ_MEMORY;
+ break;
+
+ case SPI_FCMD_WRITE:
+ ifr_tfrtype = QSPI_IFR_TFRTYPE_WRITE_MEMORY;
+ break;
+
+ case SPI_FCMD_ERASE:
+ case SPI_FCMD_WRITE_REG:
+ ifr_tfrtype = QSPI_IFR_TFRTYPE_WRITE;
+ break;
+
+ case SPI_FCMD_READ_REG:
+ ifr_tfrtype = QSPI_IFR_TFRTYPE_READ;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ *ifr = (*ifr & ~QSPI_IFR_TFRTYPE) | ifr_tfrtype;
+ return 0;
+}
+
+static int atmel_qpsi_set_ifr_width(enum spi_flash_protocol proto, u32 *ifr)
+{
+ u32 ifr_width;
+
+ switch (proto) {
+ case SPI_FPROTO_1_1_1:
+ ifr_width = QSPI_IFR_WIDTH_SINGLE_BIT_SPI;
+ break;
+
+ case SPI_FPROTO_1_1_2:
+ ifr_width = QSPI_IFR_WIDTH_DUAL_OUTPUT;
+ break;
+
+ case SPI_FPROTO_1_2_2:
+ ifr_width = QSPI_IFR_WIDTH_DUAL_IO;
+ break;
+
+ case SPI_FPROTO_2_2_2:
+ ifr_width = QSPI_IFR_WIDTH_DUAL_CMD;
+ break;
+
+ case SPI_FPROTO_1_1_4:
+ ifr_width = QSPI_IFR_WIDTH_QUAD_OUTPUT;
+ break;
+
+ case SPI_FPROTO_1_4_4:
+ ifr_width = QSPI_IFR_WIDTH_QUAD_IO;
+ break;
+
+ case SPI_FPROTO_4_4_4:
+ ifr_width = QSPI_IFR_WIDTH_QUAD_CMD;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ *ifr = (*ifr & ~QSPI_IFR_WIDTH) | ifr_width;
+ return 0;
+}
+
+static int atmel_qspi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ /* This controller can only be used with SPI NOR flashes. */
+ return -EINVAL;
+}
+
+static int atmel_qspi_set_speed(struct udevice *bus, uint hz)
+{
+ struct atmel_qspi_priv *aq = dev_get_priv(bus);
+ u32 scr, scbr, mask, new_value;
+
+ /* Compute the QSPI baudrate */
+ scbr = DIV_ROUND_UP(aq->bus_clk_rate, hz);
+ if (scbr > 0)
+ scbr--;
+
+ new_value = QSPI_SCR_SCBR_(scbr);
+ mask = QSPI_SCR_SCBR;
+
+ scr = qs
Re: [U-Boot] [PATCH 6/8] sf: add new option to support SPI flash above 16MiB
On 2017/5/19 22:59, Cyrille Pitchen wrote:
The patch provides an alternative method to support SPI flash size greater
than 16MiB (128Mib).
Indeed using the Base Address Register (BAR) is stateful. Hence, once the
BAR has been modified, if a spurious CPU reset occurs with no reset/power
off at the SPI flash side, early boot loarders may try to read from offset
0 but fails because of the new BAR value.
On the other hand, using the 4-byte address instruction set is stateless.
When supported by the SPI flash memory, it allows us to access memory data
area above 16MiB without changing the internal state of this SPI flash
memory. Then if a spirious reboot occurs, early boot loaders can still
access data from offset 0.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/mtd/spi/Kconfig | 15 ++-
drivers/mtd/spi/sf_internal.h | 18 +
drivers/mtd/spi/spi_flash.c | 92 ---
3 files changed, 118 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 5ca0a712d84a..c11e83263b16 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -34,14 +34,27 @@ config SPI_FLASH
If unsure, say N
+choice
+ prompt "Support SPI flash above 16MiB"
+ depends on SPI_FLASH
+ optional
+
config SPI_FLASH_BAR
bool "SPI flash Bank/Extended address register support"
- depends on SPI_FLASH
help
Enable the SPI flash Bank/Extended address register support.
Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.
+config SPI_FLASH_4BAIS
+ bool "SPI flash 4-byte address instruction set support"
+ help
+ Convert the selected 3-byte address op codes into their associated
+ 4-byte address op codes. Using this instruction set does not change
+ the internal state of the SPI flash device.
+
+endchoice
+
if SPI_FLASH
config SPI_FLASH_ATMEL
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 8b8c951bcc55..30994f9f460c 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -27,6 +27,7 @@ enum spi_nor_option_flags {
};
#define SPI_FLASH_3B_ADDR_LEN 3
+#define SPI_FLASH_4B_ADDR_LEN 4
#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN + 16)
#define SPI_FLASH_16MB_BOUN 0x100
@@ -64,6 +65,19 @@ enum spi_nor_option_flags {
#define CMD_READ_CONFIG 0x35
#define CMD_FLAG_STATUS 0x70
+/* 4-byte address instruction set */
+#define CMD_READ_ARRAY_SLOW_4B 0x13
+#define CMD_READ_ARRAY_FAST_4B 0x0c
+#define CMD_READ_DUAL_OUTPUT_FAST_4B 0x3c
+#define CMD_READ_DUAL_IO_FAST_4B 0xbc
+#define CMD_READ_QUAD_OUTPUT_FAST_4B 0x6c
+#define CMD_READ_QUAD_IO_FAST_4B 0xec
+#define CMD_PAGE_PROGRAM_4B0x12
+#define CMD_PAGE_PROGRAM_1_1_4_4B 0x34
+#define CMD_PAGE_PROGRAM_1_4_4_4B 0x3e
+#define CMD_ERASE_4K_4B0x21
+#define CMD_ERASE_64K_4B 0xdc
+
/* Bank addr access commands */
#ifdef CONFIG_SPI_FLASH_BAR
# define CMD_BANKADDR_BRWR0x17
@@ -133,6 +147,10 @@ struct spi_flash_info {
#define RD_QUADIO BIT(6) /* use Quad IO Read */
#define RD_DUALIO BIT(7) /* use Dual IO Read */
#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO |
RD_DUALIO)
+#define NO_4BAIS BIT(8) /*
+* 4-byte address instruction set
+* NOT supported
+*/
};
extern const struct spi_flash_info spi_flash_ids[];
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index c5e00772f241..695c8555db3f 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -176,6 +176,67 @@ bar_end:
}
#endif
+#ifdef CONFIG_SPI_FLASH_4BAIS
+static u8 spi_flash_convert_opcode(u8 opcode, const u8 table[][2], size_t size)
+{
+ size_t i;
+
+ for (i = 0; i < size; i++)
+ if (table[i][0] == opcode)
+ return table[i][1];
+
+ /* No conversion found, keep input op code. */
+ return opcode;
+}
+
+static u8 spi_flash_convert_3to4_read(u8 opcode)
+{
+ static const u8 spi_flash_3to4_read[][2] = {
+ {CMD_READ_ARRAY_SLOW, CMD_READ_ARRAY_SLOW_4B},
+ {CMD_READ_ARRAY_FAST, CMD_READ_ARRAY_FAST_4B},
+ {CMD_READ_DUAL_OUTPUT_FAST, CMD_READ_DUAL_OUTPUT_FAST_4B},
+ {CMD_READ_DUAL_IO_FAST, CMD_READ_DUAL_IO_FAST_4B},
+ {CMD_READ_QUAD_OUTPUT_FAST, CMD_READ_QUAD_OUTPUT_FAST_4B},
+ {CMD_READ_QUAD_IO_FAST, CMD_READ_QUAD_IO_FAST_4B},
+
Re: [U-Boot] [PATCH 7/8] sf: add support to Microchip SST26 QSPI memories
On 2017/5/19 22:59, Cyrille Pitchen wrote:
This patch adds support to Microchip SST26 QSPI memories.
Erase blocks are protected at power up and must be unlocked first before
being erased then programmed.
Also, the erase block sizes are not uniform. The memory layout is uniform
only for the 4K sector blocks. The 64K Block Erase (D8h) op code cannot be
used as currently done by the SPI FLASH sub-system.
The 4K Sector Erase (20h) op code should be chosen instead even if
CONFIG_SPI_FLASH_USE_4K_SECTORS is not set.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/mtd/spi/sf_internal.h | 3 +++
drivers/mtd/spi/spi_flash.c | 33 ++---
drivers/mtd/spi/spi_flash_ids.c | 5 +
3 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 30994f9f460c..4354a2aa532f 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -104,6 +104,7 @@ enum spi_nor_option_flags {
#ifdef CONFIG_SPI_FLASH_SST
# define CMD_SST_BP 0x02/* Byte Program */
# define CMD_SST_AAI_WP 0xAD/* Auto Address Incr Word
Program */
+# define CMD_SST_ULBPR 0x98/* Global Block Protection Unlock */
int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
const void *buf);
@@ -151,6 +152,8 @@ struct spi_flash_info {
* 4-byte address instruction set
* NOT supported
*/
+#define SECT_4K_ONLY BIT(9) /* use only CMD_ERASE_4K */
+#define SST_ULBPR BIT(10) /* use SST unlock block protection */
};
extern const struct spi_flash_info spi_flash_ids[];
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 695c8555db3f..307e4140826b 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -891,6 +891,22 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t
len)
}
#endif
+#ifdef CONFIG_SPI_FLASH_SST
+static int sst26_unlock(struct spi_flash *flash)
+{
+ struct spi_flash_command cmd;
+ int ret;
+
+ spi_flash_command_init(&cmd, CMD_SST_ULBPR, 0, SPI_FCMD_WRITE_REG);
+ ret = spi_flash_write_common(flash, &cmd);
+ if (ret) {
+ debug("SF: SST26 is still locked (read-only)\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX
static int macronix_quad_enable(struct spi_flash *flash)
@@ -920,7 +936,8 @@ static int macronix_quad_enable(struct spi_flash *flash)
}
#endif
-#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) ||\
+defined(CONFIG_SPI_FLASH_SST)
static int spansion_quad_enable(struct spi_flash *flash)
{
u8 qeb_status;
@@ -981,9 +998,11 @@ static int set_quad_mode(struct spi_flash *flash,
case SPI_FLASH_CFI_MFR_MACRONIX:
return macronix_quad_enable(flash);
#endif
-#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) ||\
+defined(CONFIG_SPI_FLASH_SST)
case SPI_FLASH_CFI_MFR_SPANSION:
case SPI_FLASH_CFI_MFR_WINBOND:
+ case SPI_FLASH_CFI_MFR_SST:
return spansion_quad_enable(flash);
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO
@@ -1040,6 +1059,11 @@ int spi_flash_scan(struct spi_flash *flash)
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
write_sr(flash, 0);
+#ifdef CONFIG_SPI_FLASH_SST
+ if (info->flags & SST_ULBPR)
+ sst26_unlock(flash);
+#endif
+
flash->name = info->name;
flash->memory_map = spi->memory_map;
@@ -1099,7 +1123,10 @@ int spi_flash_scan(struct spi_flash *flash)
flash->erase_size = 4096 << flash->shift;
} else
#endif
- {
+ if (info->flags & SECT_4K_ONLY) {
+ flash->erase_cmd = CMD_ERASE_4K;
+ flash->erase_size = 4096 << flash->shift;
+ } else {
flash->erase_cmd = CMD_ERASE_64K;
flash->erase_size = flash->sector_size;
}
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index edca94e30cf0..3d3132bc3b22 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -146,6 +146,11 @@ const struct spi_flash_info spi_flash_ids[] = {
{"sst25wf040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K
| SST_WR) },
{"sst25wf040b", INFO(0x621613, 0x0, 64 * 1024, 8,
SECT_4K) },
{"sst25wf080", INFO(0xbf2505, 0x0, 64 * 1024,16, SECT_4K
| SST_WR) },
+ {"sst26vf016b", INFO(0xbf2641, 0x0, 4 * 1024, 51
Re: [U-Boot] [PATCH 5/8] sf: add 'addr_len' member to 'struct spi_flash'
On 2017/5/19 22:59, Cyrille Pitchen wrote:
This is a transitional patch to prepare the SPI FLASH sub-system to
support the 4-byte address instruction set later.
For now, flash->addr_len is always set to SPI_FLASH_3B_ADDR_LEN.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/mtd/spi/spi_flash.c | 13 -
include/spi_flash.h | 2 ++
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index ec998166017d..c5e00772f241 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -322,7 +322,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32
offset, size_t len)
}
}
- spi_flash_command_init(&cmd, flash->erase_cmd, SPI_FLASH_3B_ADDR_LEN,
+ spi_flash_command_init(&cmd, flash->erase_cmd, flash->addr_len,
SPI_FCMD_ERASE);
while (len) {
erase_addr = offset;
@@ -377,7 +377,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32
offset,
}
}
- spi_flash_command_init(&cmd, flash->write_cmd, SPI_FLASH_3B_ADDR_LEN,
+ spi_flash_command_init(&cmd, flash->write_cmd, flash->addr_len,
SPI_FCMD_WRITE);
cmd.proto = flash->write_proto;
for (actual = 0; actual < len; actual += chunk_len) {
@@ -481,7 +481,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32
offset,
return 0;
}
- spi_flash_command_init(&cmd, flash->read_cmd, SPI_FLASH_3B_ADDR_LEN,
+ spi_flash_command_init(&cmd, flash->read_cmd, flash->addr_len,
SPI_FCMD_READ);
cmd.proto = flash->read_proto;
cmd.num_wait_states = flash->dummy_byte * 8;
@@ -529,7 +529,7 @@ static int sst_byte_write(struct spi_flash *flash, u32
offset, const void *buf)
int ret;
u8 sr = 0xFFu;
- spi_flash_command_init(&cmd, CMD_SST_BP, SPI_FLASH_3B_ADDR_LEN,
+ spi_flash_command_init(&cmd, CMD_SST_BP, flash->addr_len,
SPI_FCMD_WRITE);
cmd.addr = offset;
cmd.data_len = 1;
@@ -580,7 +580,7 @@ int sst_write_wp(struct spi_flash *flash, u32 offset,
size_t len,
if (ret)
goto done;
- spi_flash_command_init(&cmd, CMD_SST_AAI_WP, SPI_FLASH_3B_ADDR_LEN,
+ spi_flash_command_init(&cmd, CMD_SST_AAI_WP, flash->addr_len,
SPI_FCMD_WRITE);
cmd.addr = offset;
cmd.data_len = 2;
@@ -1103,6 +1103,9 @@ int spi_flash_scan(struct spi_flash *flash)
flash->flags |= SNOR_F_USE_FSR;
#endif
+ /* Set the address length */
+ flash->addr_len = SPI_FLASH_3B_ADDR_LEN;
+
/* Configure the BAR - discover bank cmds and read current bank */
#ifdef CONFIG_SPI_FLASH_BAR
ret = read_bar(flash, info);
diff --git a/include/spi_flash.h b/include/spi_flash.h
index ac2b37f0202f..9168fca8f96d 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -44,6 +44,7 @@ struct spi_slave;
* @bank_read_cmd:Bank read cmd
* @bank_write_cmd: Bank write cmd
* @bank_curr:Current flash bank
+ * @addr_len: Number of bytes for the address
* @erase_cmd:Erase cmd 4K, 32K, 64K
* @read_cmd: Read cmd - Array Fast, Extn read and quad read.
* @write_cmd:Write cmd - page and quad program.
@@ -81,6 +82,7 @@ struct spi_flash {
u8 bank_write_cmd;
u8 bank_curr;
#endif
+ u8 addr_len;
u8 erase_cmd;
u8 read_cmd;
u8 write_cmd;
___
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Re: [U-Boot] [PATCH 3/8] sf: select the relevant SPI flash protocol for read and write commands
On 2017/5/19 22:59, Cyrille Pitchen wrote:
SPI controller drivers should not check the instruction op code byte to
guess which SPI x-y-z protocol is to be used for Fast Read or Page Program
operations.
Indeed, the op code values are not so reliable. For instance, the 32h op
code is generally used for Page Program 1-1-4 operations. However
Microchip SST26 memories use this 32h op code for their Page Program 1-4-4
operations. There are many other examples of those SPI flash manufacturer
quirks.
Instead, the SPI FLASH sub-system now fills the 'proto' member
of 'struct spi_flash_command' with flash->read_proto for Fast Read
operations and flash->write_proto for Page Program operations.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/mtd/spi/spi_flash.c | 24
include/spi_flash.h | 4
2 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index d0634e5b28c7..7e35fb9f4802 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -379,6 +379,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32
offset,
spi_flash_command_init(&cmd, flash->write_cmd, SPI_FLASH_3B_ADDR_LEN,
SPI_FCMD_WRITE);
+ cmd.proto = flash->write_proto;
for (actual = 0; actual < len; actual += chunk_len) {
write_addr = offset;
@@ -482,6 +483,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
spi_flash_command_init(&cmd, flash->read_cmd, SPI_FLASH_3B_ADDR_LEN,
SPI_FCMD_READ);
+ cmd.proto = flash->read_proto;
cmd.num_wait_states = flash->dummy_byte * 8;
while (len) {
read_addr = offset;
@@ -1045,24 +1047,30 @@ int spi_flash_scan(struct spi_flash *flash)
/* Look for read commands */
flash->read_cmd = CMD_READ_ARRAY_FAST;
- if (spi->mode & SPI_RX_SLOW)
+ flash->read_proto = SPI_FPROTO_1_1_1;
+ if (spi->mode & SPI_RX_SLOW) {
flash->read_cmd = CMD_READ_ARRAY_SLOW;
- else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
+ } else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD) {
flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
- else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
+ flash->read_proto = SPI_FPROTO_1_1_4;
+ } else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL) {
flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
+ flash->read_proto = SPI_FPROTO_1_1_2;
+ }
/* Look for write commands */
- if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
+ if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD) {
flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
- else
+ flash->write_proto = SPI_FPROTO_1_1_4;
+ } else {
/* Go for default supported write cmd */
flash->write_cmd = CMD_PAGE_PROGRAM;
+ flash->write_proto = SPI_FPROTO_1_1_1;
+ }
/* Set the quad enable bit - only for quad commands */
- if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
- (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
- (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
+ if (spi_flash_protocol_get_data_nbits(flash->read_proto) == 4 ||
+ spi_flash_protocol_get_data_nbits(flash->write_proto) == 4) {
ret = set_quad_mode(flash, info);
if (ret) {
debug("SF: Fail to set QEB for %02x\n",
diff --git a/include/spi_flash.h b/include/spi_flash.h
index be2fe3f84cb9..ac2b37f0202f 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -48,6 +48,8 @@ struct spi_slave;
* @read_cmd: Read cmd - Array Fast, Extn read and quad read.
* @write_cmd:Write cmd - page and quad program.
* @dummy_byte: Dummy cycles for read operation.
+ * @read_proto:SPI x-y-z protocol for flash read ops
+ * @write_proto: SPI x-y-z protocol for flash write ops
* @memory_map: Address of read-only SPI flash access
* @flash_lock: lock a region of the SPI Flash
* @flash_unlock: unlock a region of the SPI Flash
@@ -83,6 +85,8 @@ struct spi_flash {
u8 read_cmd;
u8 write_cmd;
u8 dummy_byte;
+ enum spi_flash_protocol read_proto;
+ enum spi_flash_protocol write_proto;
void *memory_map;
___
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Re: [U-Boot] [PATCH 4/8] sf: differentiate Page Program 1-1-4 and 1-4-4
On 2017/5/19 22:59, Cyrille Pitchen wrote:
This patch simply renames the ambiguous CMD_QUAD_PAGE_PROGRAM macro
into the more explicit CMD_PAGE_PROGRAM_1_1_4.
Also it defines the CMD_PAGE_PROGRAM_1_4_4 macro to the standard 38h op
code.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/mtd/spi/sf_internal.h | 3 ++-
drivers/mtd/spi/spi_flash.c | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 5c551089d673..8b8c951bcc55 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -48,7 +48,8 @@ enum spi_nor_option_flags {
#define CMD_PAGE_PROGRAM 0x02
#define CMD_WRITE_DISABLE 0x04
#define CMD_WRITE_ENABLE 0x06
-#define CMD_QUAD_PAGE_PROGRAM 0x32
+#define CMD_PAGE_PROGRAM_1_1_4 0x32
+#define CMD_PAGE_PROGRAM_1_4_4 0x38
/* Read commands */
#define CMD_READ_ARRAY_SLOW 0x03
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 7e35fb9f4802..ec998166017d 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1060,7 +1060,7 @@ int spi_flash_scan(struct spi_flash *flash)
/* Look for write commands */
if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD) {
- flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
+ flash->write_cmd = CMD_PAGE_PROGRAM_1_1_4;
flash->write_proto = SPI_FPROTO_1_1_4;
} else {
/* Go for default supported write cmd */
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Re: [U-Boot] [PATCH 2/8] sf: describe all SPI flash commands with 'struct spi_flash_command'
On 2017/5/19 22:59, Cyrille Pitchen wrote:
Now that the SPI sub-system API has been extended with
'struct spi_flash_command' and spi_is_flash_command_supported() /
spi_exec_flash_command() functions, we update the SPI FLASH sub-system to
use this new API.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/mtd/spi/sf.c | 78 +
drivers/mtd/spi/sf_dataflash.c | 119 +-
drivers/mtd/spi/sf_internal.h | 24 +++---
drivers/mtd/spi/spi_flash.c| 184 +++--
4 files changed, 236 insertions(+), 169 deletions(-)
diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c
index d5e175ca..6178b0aa9824 100644
--- a/drivers/mtd/spi/sf.c
+++ b/drivers/mtd/spi/sf.c
@@ -9,46 +9,88 @@
#include
#include
+#include
-static int spi_flash_read_write(struct spi_slave *spi,
- const u8 *cmd, size_t cmd_len,
- const u8 *data_out, u8 *data_in,
- size_t data_len)
+#include "sf_internal.h"
+
+static void spi_flash_addr(u32 addr, u8 addr_len, u8 *cmd_buf)
{
+ u8 i;
+
+ for (i = 0; i < addr_len; i++)
+ cmd_buf[i] = addr >> ((addr_len - 1 - i) * 8);
+}
+
+static u8 spi_compute_num_dummy_bytes(enum spi_flash_protocol proto,
+ u8 num_dummy_clock_cycles)
+{
+ int shift = fls(spi_flash_protocol_get_addr_nbits(proto)) - 1;
+
+ if (shift < 0)
+ shift = 0;
+ return (num_dummy_clock_cycles << shift) >> 3;
+}
+
+static int spi_flash_exec(struct spi_flash *flash,
+ const struct spi_flash_command *cmd)
+{
+ struct spi_slave *spi = flash->spi;
+ u8 cmd_buf[SPI_FLASH_CMD_LEN];
+ size_t cmd_len, num_dummy_bytes;
unsigned long flags = SPI_XFER_BEGIN;
int ret;
- if (data_len == 0)
+ if (spi_is_flash_command_supported(spi, cmd))
+ return spi_exec_flash_command(spi, cmd);
+
+ if (cmd->data_len == 0)
flags |= SPI_XFER_END;
- ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+ cmd_buf[0] = cmd->inst;
+ spi_flash_addr(cmd->addr, cmd->addr_len, cmd_buf + 1);
+ cmd_len = 1 + cmd->addr_len;
+
+ num_dummy_bytes = spi_compute_num_dummy_bytes(cmd->proto,
+ cmd->num_mode_cycles +
+ cmd->num_wait_states);
+ memset(cmd_buf + cmd_len, 0xff, num_dummy_bytes);
+ cmd_len += num_dummy_bytes;
+
+ ret = spi_xfer(spi, cmd_len * 8, cmd_buf, NULL, flags);
if (ret) {
debug("SF: Failed to send command (%zu bytes): %d\n",
cmd_len, ret);
- } else if (data_len != 0) {
- ret = spi_xfer(spi, data_len * 8, data_out, data_in,
- SPI_XFER_END);
+ } else if (cmd->data_len != 0) {
+ ret = spi_xfer(spi, cmd->data_len * 8,
+ cmd->tx_data, cmd->rx_data,
+ SPI_XFER_END);
if (ret)
debug("SF: Failed to transfer %zu bytes of data: %d\n",
- data_len, ret);
+ cmd->data_len, ret);
}
return ret;
}
-int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
- size_t cmd_len, void *data, size_t data_len)
+int spi_flash_cmd_read(struct spi_flash *flash,
+ const struct spi_flash_command *cmd)
{
- return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
+ return spi_flash_exec(flash, cmd);
}
-int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
+int spi_flash_cmd(struct spi_flash *flash, u8 instr, void *response, size_t
len)
{
- return spi_flash_cmd_read(spi, &cmd, 1, response, len);
+ struct spi_flash_command cmd;
+ u8 flags = (response && len) ? SPI_FCMD_READ_REG : SPI_FCMD_WRITE_REG;
+
+ spi_flash_command_init(&cmd, instr, 0, flags);
+ cmd.data_len = len;
+ cmd.rx_data = response;
+ return spi_flash_exec(flash, &cmd);
}
-int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
- const void *data, size_t data_len)
+int spi_flash_cmd_write(struct spi_flash *flash,
+ const struct spi_flash_command *cmd)
{
- return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
+ return spi_flash_exec(flash, cmd);
}
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index bcddfa07556b..b2166ad4e5ff 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -73,7 +73,7 @@ struct dataflash {
};
/* Return the status of the DataFlash device */
-static i
Re: [U-Boot] [PATCH 1/8] spi: add support of SPI flash commands
On 2017/5/19 22:59, Cyrille Pitchen wrote:
This patch introduces 'struct spi_flash_command' and functions
spi_is_flash_command_supported() / spi_exec_flash_command().
The 'struct spi_flash_command' describes all the relevant parameters to
execute any SPI flash command:
- the instruction op code
- the number of bytes used to send the address: 0, 3 or 4 bytes
- the number of mode and wait-state clock cycles, also called dummy cycles
- the number and values of data bytes to be sent or received
- the SPI x-y-z protocol [1]
- the flash command type [2]
[1] SPI x-y-z protocol:
- x is the number of I/O lines used to send the instruction op code.
- y is the number of I/O lines used during address, mode and wait-state
clock cycles.
- z is the number of I/O lines used to send or received data.
[2] Flash command type:
The flash command type is provided to differenciate "memory"
read/write/erase operations from "flash internal register" read/write
operations. Indeed some SPI controller drivers handle those command type
in different ways.
However SPI controller drivers should not check the value of the
instruction op code to guess the actual kind of flash command to perform.
Many instruction op codes are SPI flash manufacturer specific and only
drivers/mtd/spi/spi_flash.c should have the knowledge of all of them.
Besides, more and more QSPI controllers, like those of TI and Candence,
have special way to support (Fast) Read operations using some
"memory like" area mapped into the system bus. Hence, if those drivers
choose to override the default implementation of
spi_is_flash_command_supported() so that their own functions return true
only for a "memory read" flash command type, then spi_exec_flash_command()
might be used to implement the read from the "memory like" area mapped
into the system bus.
It means that spi_exec_flash_command() could be used to supersede the
actual flash->memory_map mechanism; spi_is_flash_command_supported() /
spi_exec_flash_command() being more generic and covering more use cases.
For instance, the Atmel QSPI hardware controller uses its "memory like"
area mapped ino the system to perform not only (Fast) Read operations but
actually all other types of flash commands. Hence the regular SPI API
based on the spi_xfer() function is not suited to support the Atmel QSPI
controller.
Signed-off-by: Cyrille Pitchen
Acked-by Wenyou Yang
Best Regards,
Wenyou Yang
---
drivers/spi/spi-uclass.c | 40 +++
drivers/spi/spi.c| 13
include/spi.h| 168 +++
3 files changed, 221 insertions(+)
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index c061c05443d4..b8092538e9b0 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -92,6 +92,30 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
}
+bool dm_spi_is_flash_command_supported(struct udevice *dev,
+ const struct spi_flash_command *cmd)
+{
+ struct udevice *bus = dev->parent;
+ struct dm_spi_ops *ops = spi_get_ops(bus);
+
+ if (ops->is_flash_command_supported)
+ return ops->is_flash_command_supported(dev, cmd);
+
+ return false;
+}
+
+int dm_spi_exec_flash_command(struct udevice *dev,
+ const struct spi_flash_command *cmd)
+{
+ struct udevice *bus = dev->parent;
+ struct dm_spi_ops *ops = spi_get_ops(bus);
+
+ if (ops->exec_flash_command)
+ return ops->exec_flash_command(dev, cmd);
+
+ return -EINVAL;
+}
+
int spi_claim_bus(struct spi_slave *slave)
{
return dm_spi_claim_bus(slave->dev);
@@ -108,6 +132,18 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
return dm_spi_xfer(slave->dev, bitlen, dout, din, flags);
}
+bool spi_is_flash_command_supported(struct spi_slave *slave,
+ const struct spi_flash_command *cmd)
+{
+ return dm_spi_is_flash_command_supported(slave->dev, cmd);
+}
+
+int spi_exec_flash_command(struct spi_slave *slave,
+ const struct spi_flash_command *cmd)
+{
+ return dm_spi_exec_flash_command(slave->dev, cmd);
+}
+
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
static int spi_child_post_bind(struct udevice *dev)
{
@@ -147,6 +183,10 @@ static int spi_post_probe(struct udevice *bus)
ops->set_mode += gd->reloc_off;
if (ops->cs_info)
ops->cs_info += gd->reloc_off;
+ if (ops->is_flash_command_supported)
+ ops->is_flash_command_supported += gd->reloc_off;
+ if (ops->exec_flash_command)
+ ops->exec_flash_command += gd->reloc_off;
#endif
return 0;
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 7d81fbd7f8f5..e47acdc9e414 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -5,6 +5,7 @@
*/
[U-Boot] [PATCH 2/2] sunxi: A64: (re-)add sun8i emac DT nodes
As the kernel DT does not have an Ethernet driver and bindings, lets
(re-)add the DT bindings for U-Boot's sun8i EMAC Ethernet driver, which
got lost when syncing the kernel DT to U-Boot.
This slightly updates the DT nodes to adapt to the new DT (clock and
reset nodes), but keeps the rest the same to let it work with the
existing U-Boot driver.
Signed-off-by: Andre Przywara
---
arch/arm/dts/sun50i-a64-pine64-plus.dts | 14 +-
arch/arm/dts/sun50i-a64-pine64.dts | 1 +
arch/arm/dts/sun50i-a64.dtsi| 33 +
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts
b/arch/arm/dts/sun50i-a64-pine64-plus.dts
index 790d14d..948cb19 100644
--- a/arch/arm/dts/sun50i-a64-pine64-plus.dts
+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts
@@ -46,5 +46,17 @@
model = "Pine64+";
compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
- /* TODO: Camera, Ethernet PHY, touchscreen, etc. */
+ /* TODO: Camera, touchscreen, etc. */
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
};
diff --git a/arch/arm/dts/sun50i-a64-pine64.dts
b/arch/arm/dts/sun50i-a64-pine64.dts
index c680ed3..6c15040 100644
--- a/arch/arm/dts/sun50i-a64-pine64.dts
+++ b/arch/arm/dts/sun50i-a64-pine64.dts
@@ -52,6 +52,7 @@
aliases {
serial0 = &uart0;
+ ethernet0 = &emac;
};
chosen {
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index c7f669f..121e660 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -295,6 +295,25 @@
pins = "PG8", "PG9";
function = "uart1";
};
+
+ rmii_pins: rmii_pins {
+ allwinner,pins = "PD10", "PD11", "PD13", "PD14",
+"PD17", "PD18", "PD19", "PD20",
+"PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
+
+ rgmii_pins: rgmii_pins {
+ allwinner,pins = "PD8", "PD9", "PD10", "PD11",
+"PD12", "PD13", "PD15",
+"PD16", "PD17", "PD18", "PD19",
+"PD20", "PD21", "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
};
uart0: serial@1c28000 {
@@ -423,5 +442,19 @@
interrupt-controller;
#interrupt-cells = <3>;
};
+
+ emac: ethernet@01c3 {
+ compatible = "allwinner,sun50i-a64-emac";
+ reg = <0x01c3 0x2000>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = ;
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "ahb";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "ahb";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
--
2.8.2
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[U-Boot] [PATCH 1/2] arm64: A64/Pine64: update device tree from Linux
The Linux device tree for the Allwinner A64 SoC has changed a lot since
the U-Boot version was merged.
Let's replace the current DT with a exact copy of the Linux one as of:
commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b
Merge: 0ff4c01 3c0e3abd
Author: Linus Torvalds
Date: Tue May 9 10:07:33 2017 -0700
For this patch this makes U-Boot lose the (not yet upstream) Ethernet
node, but the next patch will fix this up.
Signed-off-by: Andre Przywara
---
arch/arm/dts/sun50i-a64-pine64-common.dtsi | 93 -
arch/arm/dts/sun50i-a64-pine64-plus.dts| 26 +-
arch/arm/dts/sun50i-a64-pine64.dts | 59 ++-
arch/arm/dts/sun50i-a64.dtsi | 639 +
include/dt-bindings/clock/sun50i-a64-ccu.h | 134 ++
include/dt-bindings/reset/sun50i-a64-ccu.h | 98 +
6 files changed, 480 insertions(+), 569 deletions(-)
delete mode 100644 arch/arm/dts/sun50i-a64-pine64-common.dtsi
create mode 100644 include/dt-bindings/clock/sun50i-a64-ccu.h
create mode 100644 include/dt-bindings/reset/sun50i-a64-ccu.h
diff --git a/arch/arm/dts/sun50i-a64-pine64-common.dtsi
b/arch/arm/dts/sun50i-a64-pine64-common.dtsi
deleted file mode 100644
index 9ec81c6..000
--- a/arch/arm/dts/sun50i-a64-pine64-common.dtsi
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Copyright (c) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "sun50i-a64.dtsi"
-
-/ {
-
- aliases {
- serial0 = &uart0;
- ethernet0 = &emac;
- };
-
- soc {
- reg_vcc3v3: vcc3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- };
- };
-};
-
-&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
- vmmc-supply = <®_vcc3v3>;
- cd-gpios = <&pio 5 6 0>;
- cd-inverted;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
- status = "okay";
-};
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
- status = "okay";
-};
-
-&usbphy {
- status = "okay";
-};
-
-&ohci1 {
- status = "okay";
-};
-
-&ehci1 {
- status = "okay";
-};
diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts
b/arch/arm/dts/sun50i-a64-pine64-plus.dts
index 389c609..790d14d 100644
--- a/arch/arm/dts/sun50i-a64-pine64-plus.dts
+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts
@@ -40,33 +40,11 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
-/dts-v1/;
-
-#include "sun50i-a64-pine64-common.dtsi"
+#include "sun50i-a64-pine64.dts"
/ {
model = "Pine64+";
compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */
- memory {
- reg = <0
[U-Boot] [PATCH 0/2] sunxi: update Pine64 device tree
When the Pine64 support was merged into U-Boot, there was no official Pine64 .dts in the Linux tree. Since this has changed now and the meanwhile merged Linux DT differs quite a lot from the (preliminary) .dts we used in U-Boot so far, let's update U-Boot's DT to match the Linux version. Beside the effect of using a single instance of the DT we gain the huge advantage of not (necessarily) needing to load a .dtb to boot Linux. Instead just specifying $fdtcontroladdr does the trick, which is used by the UEFI boot scheme already. This has the potential of relieving distributions from the burden of supplying .dtb files for each and every "supported" board. Following Chen-Yu's suggestion on the last post, the first patch is a 1:1 copy of the Linux version (as of 4.12-rc1), the second one (re-)adds the DT nodes for the Ethernet MAC, which is both not-yet-upstream in Linux and also differening from the proposed Linux driver bindings. But let's fix that later once the Linux driver gets merged. Given that U-Boot itself does not use the DT much (at least at the moment), there is little risk of breakage, so I'd be grateful if this could be still merged into the next release. Cheers, Andre. Andre Przywara (2): arm64: A64/Pine64: update device tree from Linux sunxi: A64: (re-)add sun8i emac DT nodes arch/arm/dts/sun50i-a64-pine64-common.dtsi | 93 - arch/arm/dts/sun50i-a64-pine64-plus.dts| 16 +- arch/arm/dts/sun50i-a64-pine64.dts | 60 ++- arch/arm/dts/sun50i-a64.dtsi | 634 ++--- include/dt-bindings/clock/sun50i-a64-ccu.h | 134 ++ include/dt-bindings/reset/sun50i-a64-ccu.h | 98 + 6 files changed, 496 insertions(+), 539 deletions(-) delete mode 100644 arch/arm/dts/sun50i-a64-pine64-common.dtsi create mode 100644 include/dt-bindings/clock/sun50i-a64-ccu.h create mode 100644 include/dt-bindings/reset/sun50i-a64-ccu.h -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] meson-gxbb: Add NanoPi K2
Hi FriendlyARM,
Am 15.05.2017 um 03:15 schrieb Andreas Färber:
> diff --git a/board/amlogic/nanopi-k2/nanopi-k2.c
> b/board/amlogic/nanopi-k2/nanopi-k2.c
> new file mode 100644
> index 00..b61daaa4a7
> --- /dev/null
> +++ b/board/amlogic/nanopi-k2/nanopi-k2.c
> @@ -0,0 +1,54 @@
> +/*
> + * (C) Copyright 2016 Beniamino Galvani
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define EFUSE_SN_OFFSET 20
> +#define EFUSE_SN_SIZE16
> +#define EFUSE_MAC_OFFSET 52
> +#define EFUSE_MAC_SIZE 6
> +
> +int board_init(void)
> +{
> + return 0;
> +}
> +
> +int misc_init_r(void)
> +{
> + u8 mac_addr[EFUSE_MAC_SIZE];
> + ssize_t len;
> +
> + /* Set RGMII mode */
> + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
> + GXBB_ETH_REG_0_TX_PHASE(1) |
> + GXBB_ETH_REG_0_TX_RATIO(4) |
> + GXBB_ETH_REG_0_PHY_CLK_EN |
> + GXBB_ETH_REG_0_CLK_EN);
> +
> + /* Enable power and clock gate */
> + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
> + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
> +
> + /* Reset PHY on GPIOZ_14 */
> + clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
> + clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
> + mdelay(10);
> + setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
> +
> + if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
> + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
> + mac_addr, EFUSE_MAC_SIZE);
> + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
> + eth_setenv_enetaddr("ethaddr", mac_addr);
This code copied from odroid-c2 is not working, I always get a random
MAC address.
The downstream U-Boot has no code in board_eth_init() to read the efuse,
unlike Hardkernel's. Is the MAC address not programmed into K2's efuse?
https://github.com/friendlyarm/u-boot/blob/nanopi-k2-v2015.01/board/amlogic/nanopi-k2/eth_setup.c
https://github.com/hardkernel/u-boot/blob/odroidc2-v2015.01/board/hardkernel/odroidc2/odroidc2-eth.c
> + }
> +
> + return 0;
> +}
[snip]
Regards,
Andreas
--
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GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
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Re: [U-Boot] [PATCH v4] net: usb: mcs7830: fix non-DM ingress path
On 05/21/2017 04:00 PM, Uri Mashiach wrote:
> The mcs7830_recv() (non-DM) function discards good packets and tries to
> process "bad" packets due to incorrect test condition.
> Fix the condition and return the proper value as described in function
> doc.
>
> Signed-off-by: Uri Mashiach
> Acked-by: Igor Grinberg
Applied, thanks
> ---
> v1 -> v4: update the commit message.
>
> drivers/usb/eth/mcs7830.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
> index 9d6cf8c..4abef5d 100644
> --- a/drivers/usb/eth/mcs7830.c
> +++ b/drivers/usb/eth/mcs7830.c
> @@ -622,10 +622,12 @@ static int mcs7830_recv(struct eth_device *eth)
> int len;
>
> len = mcs7830_recv_common(ueth, buf);
> - if (len <= 0)
> + if (len >= 0) {
> net_process_received_packet(buf, len);
> + return 0;
> + }
>
> - return 0;
> + return len;
> }
>
> /*
>
--
Best regards,
Marek Vasut
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[U-Boot] [PATCH v4] net: usb: mcs7830: fix non-DM ingress path
The mcs7830_recv() (non-DM) function discards good packets and tries to
process "bad" packets due to incorrect test condition.
Fix the condition and return the proper value as described in function
doc.
Signed-off-by: Uri Mashiach
Acked-by: Igor Grinberg
---
v1 -> v4: update the commit message.
drivers/usb/eth/mcs7830.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
index 9d6cf8c..4abef5d 100644
--- a/drivers/usb/eth/mcs7830.c
+++ b/drivers/usb/eth/mcs7830.c
@@ -622,10 +622,12 @@ static int mcs7830_recv(struct eth_device *eth)
int len;
len = mcs7830_recv_common(ueth, buf);
- if (len <= 0)
+ if (len >= 0) {
net_process_received_packet(buf, len);
+ return 0;
+ }
- return 0;
+ return len;
}
/*
--
2.7.4
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[U-Boot] [PATCH 3/3] rename GPT partitions to detect boot failure
From: Alison Chaiken
This patch provides support in u-boot for renaming GPT
partitions. The renaming is accomplished via a new 'gpt flip'
command.
The concept for the bootloader state machine is the following:
-- u-boot renames ‘primary’ partitions as ‘candidate’ and tries
to boot them.
-- Linux, at boot, will rename ‘candidate’ partitions as
‘primary’.
-- If u-boot sees a ‘candidate’ partition after a boot attempt,
it renames it failed’ and renames the ‘backup’ partition as
‘candidate’.
Logic:
-- Partitions can go to ‘failed’ only from ‘candidate’ and only
via u-boot. Partitions can go to ‘backup’ only from ‘primary’
and vice-versa, only via Linux. Partitions go to ‘candidate’
from ‘primary’ or ‘backup’ only via u-boot. Only system
update software will rename 'failed' partitions.
Rewriting the partition table has the side-effect that all partitions
end up with "msftdata" flag set. The reason is that partition type
PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte()
function. This does not appear to cause any harm.
Signed-off-by: Alison Chaiken
---
cmd/gpt.c | 207 --
1 file changed, 201 insertions(+), 6 deletions(-)
diff --git a/cmd/gpt.c b/cmd/gpt.c
index 128c895..f2c32ae 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -21,6 +21,9 @@
#include
#include
+/* ONEMIB is 2**20 */
+#define ONEMIB 1024*1024
+
static LIST_HEAD(disk_partitions);
/**
@@ -114,7 +117,6 @@ static char *extract_val(const char *str, const char *key)
break;
}
}
-
free(strcopy);
return new;
@@ -158,6 +160,7 @@ static void del_gpt_info(void)
{
struct list_head *pos = &disk_partitions;
struct disk_part *curr;
+
while (!list_empty(pos)) {
curr = list_entry(pos->next, struct disk_part, list);
list_del(pos->next);
@@ -165,6 +168,11 @@ static void del_gpt_info(void)
}
}
+/*
+ * The number '33' comes from the '32' in the definition of disk_partition_t
+ * in include/part.h. That file has '37' rather than UUID_STR_LEN + 1, from
+ * include/uuid.h
+ */
static struct disk_part *allocate_disk_part(disk_partition_t *info, int
partnum)
{
struct disk_part *newpart;
@@ -191,16 +199,33 @@ static struct disk_part
*allocate_disk_part(disk_partition_t *info, int partnum)
return newpart;
}
+static void prettyprint_part_size(char *sizestr, unsigned long partsize,
+ unsigned long blksize)
+{
+ unsigned long long partbytes;
+ unsigned long partmegabytes;
+
+ partbytes = partsize * blksize;
+ partmegabytes = lldiv(partbytes, ONEMIB);
+ snprintf(sizestr, 16, "%luMiB", partmegabytes);
+}
+
static void print_gpt_info(void)
{
struct list_head *pos;
struct disk_part *curr;
+ char partstartstr[16];
+ char partsizestr[16];
list_for_each(pos, &disk_partitions) {
curr = list_entry(pos, struct disk_part, list);
+ prettyprint_part_size(partstartstr, (unsigned
long)curr->gpt_part_info.start,
+ (unsigned long)
curr->gpt_part_info.blksz);
+ prettyprint_part_size(partsizestr, (unsigned
long)curr->gpt_part_info.size,
+ (unsigned long)
curr->gpt_part_info.blksz);
+
printf("Partition %d:\n", curr->partnum);
- printf("1st block %x, size %x\n",
(unsigned)curr->gpt_part_info.start,
- (unsigned)curr->gpt_part_info.size);
+ printf("Start %s, size %s\n", partstartstr, partsizestr);
printf("Block size %lu, name %s\n", curr->gpt_part_info.blksz,
curr->gpt_part_info.name);
printf("Type %s, bootable %d\n", curr->gpt_part_info.type,
@@ -212,6 +237,89 @@ static void print_gpt_info(void)
}
}
+static int calc_parts_list_len(int numparts)
+{
+ /*
+* prefatory string:
+* doc/README.GPT, suggests that
+* int partlistlen = UUID_STR_LEN + 1 + strlen("partitions=uuid_disk=");
+* is correct, but extract_val() expects "uuid_disk" first.
+*/
+ int partlistlen = UUID_STR_LEN + 1 + strlen("uuid_disk=");
+ /* for the comma */
+ partlistlen++;
+
+ /* per-partition additions; numparts starts at 1, so this should be
correct */
+ partlistlen += numparts * (strlen("name=,") + 33);
+ /* 17 because partstr below is 16 chars */
+ partlistlen += numparts * (strlen("start=MiB,") + 17);
+ partlistlen += numparts * (strlen("size=MiB,") + 17);
+ partlistlen += numparts * (strlen("uuid=;") + UUID_STR_LEN + 1);
+ /* for the terminating null */
+ partlistlen ++;
+ debug("Length of partitions_list is %d for %d partitions\n",
partlistlen,
+ numparts);
+ return partlistlen
[U-Boot] [PATCH 2/3] GPT: read partition table from device into a data structure
From: Alison Chaiken
Make the partition table available for modification by reading it from
the user-specified device into a linked list. Provide an accessor
function for command-line testing.
Signed-off-by: Alison Chaiken
---
cmd/gpt.c | 113 +
include/part.h | 9 +
2 files changed, 122 insertions(+)
diff --git a/cmd/gpt.c b/cmd/gpt.c
index 814cb11..128c895 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -19,6 +19,9 @@
#include
#include
#include
+#include
+
+static LIST_HEAD(disk_partitions);
/**
* extract_env(): Expand env name from string format '&{env_name}'
@@ -151,6 +154,112 @@ static bool found_key(const char *str, const char *key)
return result;
}
+static void del_gpt_info(void)
+{
+ struct list_head *pos = &disk_partitions;
+ struct disk_part *curr;
+ while (!list_empty(pos)) {
+ curr = list_entry(pos->next, struct disk_part, list);
+ list_del(pos->next);
+ free(curr);
+ }
+}
+
+static struct disk_part *allocate_disk_part(disk_partition_t *info, int
partnum)
+{
+ struct disk_part *newpart;
+ newpart = (struct disk_part *)malloc(sizeof(*newpart));
+
+ if (!newpart)
+ return ERR_PTR(-ENOMEM);
+ newpart->gpt_part_info.start = info->start;
+ newpart->gpt_part_info.size = info->size;
+ newpart->gpt_part_info.blksz = info->blksz;
+ /*
+* 33 rather than 32, as each string must be null-terminated;
+* other extract_val() above will fail.
+*/
+ strncpy((char *)newpart->gpt_part_info.name, (const char *)info->name,
33);
+ strncpy((char *)newpart->gpt_part_info.type, (const char *)info->type,
33);
+ newpart->gpt_part_info.bootable = info->bootable;
+#ifdef CONFIG_PARTITION_UUIDS
+ strncpy(newpart->gpt_part_info.uuid, (const char *)info->uuid,
+ UUID_STR_LEN + 1);
+#endif
+ newpart->partnum = partnum;
+
+ return newpart;
+}
+
+static void print_gpt_info(void)
+{
+ struct list_head *pos;
+ struct disk_part *curr;
+
+ list_for_each(pos, &disk_partitions) {
+ curr = list_entry(pos, struct disk_part, list);
+ printf("Partition %d:\n", curr->partnum);
+ printf("1st block %x, size %x\n",
(unsigned)curr->gpt_part_info.start,
+ (unsigned)curr->gpt_part_info.size);
+ printf("Block size %lu, name %s\n", curr->gpt_part_info.blksz,
+ curr->gpt_part_info.name);
+ printf("Type %s, bootable %d\n", curr->gpt_part_info.type,
+ curr->gpt_part_info.bootable);
+#ifdef CONFIG_PARTITION_UUIDS
+ printf("UUID %s\n", curr->gpt_part_info.uuid);
+#endif
+ printf("\n");
+ }
+}
+
+/*
+ * read partition info into disk_partitions list where
+ * it can be printed or modified
+ */
+static int get_gpt_info(struct blk_desc *dev_desc)
+{
+ /* start partition numbering at 1, as u-boot does */
+ int valid_parts = 1, p, ret = 0;
+ disk_partition_t info;
+ struct disk_part *new_disk_part;
+
+ if (disk_partitions.next == NULL)
+ INIT_LIST_HEAD(&disk_partitions);
+
+ for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
+ ret = part_get_info(dev_desc, p, &info);
+ if (ret)
+ continue;
+
+ new_disk_part = allocate_disk_part(&info, valid_parts);
+ if (IS_ERR(new_disk_part) && (valid_parts >= 2))
+ return -1;
+
+ list_add_tail(&new_disk_part->list, &disk_partitions);
+ valid_parts++;
+ }
+ if (!valid_parts) {
+ printf("** No valid partitions found **\n");
+ del_gpt_info();
+ return -1;
+ }
+ return --valid_parts;
+}
+
+/* a wrapper to test get_gpt_info */
+static int do_get_gpt_info(struct blk_desc *dev_desc)
+{
+ int ret;
+
+ ret = get_gpt_info(dev_desc);
+ if (ret > 0) {
+ print_gpt_info();
+ del_gpt_info();
+ }
+ return ret;
+}
+
+
/**
* set_gpt_info(): Fill partition information from string
* function allocates memory, remember to free!
@@ -456,6 +565,8 @@ static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
} else if (strcmp(argv[1], "guid") == 0) {
if (argc == 5) strcpy(varname, argv[4]);
return do_disk_guid(blk_dev_desc, varname);
+ } else if (strcmp(argv[1], "read") == 0) {
+ return do_get_gpt_info(blk_dev_desc);
} else {
return CMD_RET_USAGE;
}
@@ -478,6 +589,8 @@ U_BOOT_CMD(gpt, CONFIG_SYS_MAXARGS, 1, do_gpt,
" Example usage:\n"
" gpt write mmc 0 $partitions\n"
" gpt verify mmc 0 $partitions\n"
+ " read \n"
+ "- rea
[U-Boot] [PATCH 1/3] GPT: add accessor function for disk GUID
From: Alison Chaiken
In order to read the GPT, modify the partition name strings, and then
write out a new GPT, the disk GUID is needed. While there is an
existing accessor for the partition UUIDs, there is none yet for the
disk GUID.
Signed-off-by: Alison Chaiken
---
cmd/gpt.c | 29 -
disk/part_efi.c | 31 +++
include/part.h | 15 +++
3 files changed, 74 insertions(+), 1 deletion(-)
diff --git a/cmd/gpt.c b/cmd/gpt.c
index 3e98821..814cb11 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -398,6 +398,23 @@ static int gpt_verify(struct blk_desc *blk_dev_desc, const
char *str_part)
return ret;
}
+static int do_disk_guid(struct blk_desc *dev_desc, char * const namestr)
+{
+ int ret;
+ char disk_guid[UUID_STR_LEN + 1];
+
+ ret = get_disk_guid(dev_desc, disk_guid);
+ if (ret < 0)
+ return 1;
+
+ if (namestr != NULL)
+ setenv(namestr, disk_guid);
+ else
+ printf("%s\n", disk_guid);
+
+ return 0;
+}
+
/**
* do_gpt(): Perform GPT operations
*
@@ -412,7 +429,7 @@ static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
int ret = CMD_RET_SUCCESS;
int dev = 0;
- char *ep;
+ char *ep, *varname = NULL;
struct blk_desc *blk_dev_desc = NULL;
if (argc < 4 || argc > 5)
@@ -436,6 +453,9 @@ static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
} else if ((strcmp(argv[1], "verify") == 0)) {
ret = gpt_verify(blk_dev_desc, argv[4]);
printf("Verify GPT: ");
+ } else if (strcmp(argv[1], "guid") == 0) {
+ if (argc == 5) strcpy(varname, argv[4]);
+ return do_disk_guid(blk_dev_desc, varname);
} else {
return CMD_RET_USAGE;
}
@@ -458,4 +478,11 @@ U_BOOT_CMD(gpt, CONFIG_SYS_MAXARGS, 1, do_gpt,
" Example usage:\n"
" gpt write mmc 0 $partitions\n"
" gpt verify mmc 0 $partitions\n"
+ " guid \n"
+ "- print disk GUID\n"
+ " guid \n"
+ "- set environment variable to disk GUID\n"
+ " Example usage:\n"
+ " gpt guid mmc 0\n"
+ " gpt guid mmc 0 varname\n"
);
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 1b7ba27..de35c9b 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -178,6 +178,37 @@ static void prepare_backup_gpt_header(gpt_header *gpt_h)
* Public Functions (include/part.h)
*/
+/*
+ * UUID is displayed as 32 hexadecimal digits, in 5 groups,
+ * separated by hyphens, in the form 8-4-4-4-12 for a total of 36 characters
+ */
+int get_disk_guid(struct blk_desc * dev_desc, char *guid)
+{
+ ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz);
+ gpt_entry *gpt_pte = NULL;
+ unsigned char *guid_bin;
+
+ /* This function validates AND fills in the GPT header and PTE */
+ if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
+gpt_head, &gpt_pte) != 1) {
+ printf("%s: *** ERROR: Invalid GPT ***\n", __func__);
+ if (is_gpt_valid(dev_desc, (dev_desc->lba - 1),
+gpt_head, &gpt_pte) != 1) {
+ printf("%s: *** ERROR: Invalid Backup GPT ***\n",
+ __func__);
+ return -1;
+ } else {
+ printf("%s: ***Using Backup GPT ***\n",
+ __func__);
+ }
+ }
+
+ guid_bin = (unsigned char *)(gpt_head->disk_guid.b);
+ uuid_bin_to_str(guid_bin, guid, UUID_STR_FORMAT_GUID);
+
+ return 0;
+}
+
void part_print_efi(struct blk_desc *dev_desc)
{
ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz);
diff --git a/include/part.h b/include/part.h
index 83bce05..69143bb 100644
--- a/include/part.h
+++ b/include/part.h
@@ -367,6 +367,21 @@ int gpt_verify_headers(struct blk_desc *dev_desc,
gpt_header *gpt_head,
int gpt_verify_partitions(struct blk_desc *dev_desc,
disk_partition_t *partitions, int parts,
gpt_header *gpt_head, gpt_entry **gpt_pte);
+
+
+/**
+ * get_disk_guid() - Function to read the GUID string from a device's GPT
+ *
+ * This function reads the GUID string from a block device whose descriptor
+ * is provided.
+ *
+ * @param dev_desc - block device descriptor
+ * @param guid - pre-allocated string in which to return the GUID
+ *
+ * @return - '0' on success, otherwise error
+ */
+int get_disk_guid(struct blk_desc *dev_desc, char *guid);
+
#endif
#if CONFIG_IS_ENABLED(DOS_PARTITION)
--
2.1.4
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[U-Boot] [PATCH 0/3] add support for GPT partition name manipulation
From: Alison Chaiken One way for userspace and the bootloader to exchange information about dynamic image selection is via the storage device partition table, as described at https://source.android.com/devices/tech/ota/ab_updates The scheme described there relies on setting partitions' "boot" flag. When no partition on a device is bootable since the kernel and U-Boot are stored elsewhere, the name field in the GPT partition table offers another logical place to store information. These patches allow users to easily modify GPT partition names via bootscripts that can select different images based on a boot-failure counter, or when userspace installs a software update. These patches have been tested on a TI DRA7xx-based SOM with U-Boot 2015.07. The storage device is an eMMC. Alison Chaiken (3): GPT: add accessor function for disk GUID GPT: read partition table from device into a data structure rename GPT partitions to detect boot failure cmd/gpt.c | 339 +++- disk/part_efi.c | 31 ++ include/part.h | 24 3 files changed, 392 insertions(+), 2 deletions(-) -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
