[U-Boot] [PATCH RFT 2/3] spi-nor: spi-nor-ids: Rename mt25qu512a entry

[Vignesh Raghavendra]

mt25qu512a is just a rebranded name for n25q512a. All the 6 bytes of JEDEC
ID bytes are same for mt25qu512a and n25q512a. Therefore rename
mt25qu512a to "mt25qu512a (n25q512a)", so that its much clearer to user.

Signed-off-by: Vignesh Raghavendra 
---
 drivers/mtd/spi/spi-nor-ids.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 6f7386db4226..967537eafb55 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -163,7 +163,7 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_QUAD_READ) },
-   { INFO6("mt25qu512a",  0x20bb20, 0x104400, 64 * 1024, 1024,
+   { INFO6("mt25qu512a (n25q512a)",  0x20bb20, 0x104400, 64 * 1024, 1024,
 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("n25q512a",0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ) },
-- 
2.23.0

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[U-Boot] [PATCH RFT 1/3] spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

[Vignesh Raghavendra]

Older variants of n25q256* and n25q512* do not support 4 Byte stateless
addressing opcodes. Therefore drop SPI_NOR_4B_OPCODES flag from these
entries.

Signed-off-by: Vignesh Raghavendra 
---
 drivers/mtd/spi/spi-nor-ids.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index a3920ba520e0..6f7386db4226 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -161,12 +161,12 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("n25q064a",0x20bb17, 0, 64 * 1024,  128, SECT_4K | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | 
SPI_NOR_QUAD_READ) },
-   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-   { INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+   { INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_QUAD_READ) },
{ INFO6("mt25qu512a",  0x20bb20, 0x104400, 64 * 1024, 1024,
 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-   { INFO("n25q512a",0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-   { INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+   { INFO("n25q512a",0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ) },
+   { INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q00",  0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-- 
2.23.0

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[U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

[Vignesh Raghavendra]

Newer variants of n25q256* and n25q512* flashes support 4 Byte
addressing opcodes. Add entries for the same. These flashes Bit 6 set in
5th byte of READ ID response.

Signed-off-by: Vignesh Raghavendra 
---
 drivers/mtd/spi/spi-nor-ids.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 967537eafb55..0074073b123a 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -161,11 +161,14 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("n25q064a",0x20bb17, 0, 64 * 1024,  128, SECT_4K | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | 
SPI_NOR_QUAD_READ) },
+   { INFO6("n25q256a",0x20ba19, 0x104400, 64 * 1024,  512, SECT_4K | 
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+   { INFO6("n25q256ax1",  0x20bb19, 0x104400, 64 * 1024,  512, SECT_4K | 
SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | 
SPI_NOR_QUAD_READ) },
{ INFO6("mt25qu512a (n25q512a)",  0x20bb20, 0x104400, 64 * 1024, 1024,
 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("n25q512a",0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ) },
+   { INFO6("n25q512ax3",  0x20ba20, 0x104400, 64 * 1024, 1024, SECT_4K | 
USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ) },
{ INFO("n25q00",  0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-- 
2.23.0

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[U-Boot] [PATCH RFT 0/3] spi-nor: spi-nor-ids: Fix 4 Byte addressing for n25q256 and n25q512*

[Vignesh Raghavendra]

This series removes SPI_NOR_4B_OPCODES flags from legacy variants of
n25q256* and n25q512* and adds entries for newer variants of those
flashes that support 4 Byte opcodes.

I don't have the flash devices. So its only compile tested.

Ashish, Simon,

I would greatly appreciate if you could test these patches and make sure
4 Byte opcodes are being used. (Probably by enabling/adding prints to
cmd->opcode in spi_mem_exec_op() in drivers/spi/spi-mem.c

Euginey,

Could you test this series on top of latest u-boot master and confirm
that your test cases still work?

Regards
Vignesh

Vignesh Raghavendra (3):
  spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and
n25q256*
  spi-nor: spi-nor-ids: Rename mt25qu512a entry
  spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and
n25q512*

 drivers/mtd/spi/spi-nor-ids.c | 13 -
 1 file changed, 8 insertions(+), 5 deletions(-)

-- 
2.23.0

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[U-Boot] envtools with tools-only_defconfig fails to build after v2019.10-rc1

[Vagrant Cascadian]

I've been unable to successfully run "make envtools" on recent versions
of u-boot, and finally got a chance to git bisect it.

It looks like commit 9fb625ce05539fe6876a59ce1dcadb76b33c6f6e,
introduced after 2019.10-rc1, breaks building envtools:

#!/bin/sh
# test-bisect
set -e
set -x
make clean
make tools-only_defconfig
make NO_SDL=1 envtools


Bisecting: 8 revisions left to test after this (roughly 3 steps)
[9fb625ce05539fe6876a59ce1dcadb76b33c6f6e] env: Move env_set() to env.h
running ../test-bisect
+ make clean
  CLEAN   u-boot.cfg
+ make tools-only_defconfig
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/kconfig/conf.o
  YACCscripts/kconfig/zconf.tab.c
  LEX scripts/kconfig/zconf.lex.c
  HOSTCC  scripts/kconfig/zconf.tab.o
  HOSTLD  scripts/kconfig/conf
#
# configuration written to .config
#
+ make NO_SDL=1 envtools
scripts/kconfig/conf  --syncconfig Kconfig
  CHK include/config.h
  CFG u-boot.cfg
  GEN include/autoconf.mk
  GEN include/autoconf.mk.dep
  CHK include/config/uboot.release
  UPD include/config/uboot.release
  CHK include/generated/version_autogenerated.h
  UPD include/generated/version_autogenerated.h
  CHK include/generated/timestamp_autogenerated.h
  UPD include/generated/timestamp_autogenerated.h
  LD  tools/env/built-in.o
  HOSTCC  tools/env/crc32.o
  HOSTCC  tools/env/ctype.o
  HOSTCC  tools/env/env_attr.o
  HOSTCC  tools/env/env_flags.o
In file included from tools/env/../../env/flags.c:7,
 from tools/env/env_flags.c:1:
include/env.h:97:1: error: unknown type name 'ulong'; did you mean
'long'?
   97 | ulong env_get_ulong(const char *name, int base, ulong
   default_val);
  | ^
  | long
include/env.h:97:49: error: unknown type name 'ulong'; did you mean
'long'?
   97 | ulong env_get_ulong(const char *name, int base, ulong
   default_val);
  | ^
  | long
include/env.h:106:40: error: unknown type name 'ulong'; did you mean
'long'?
  106 | int env_set_ulong(const char *varname, ulong value);
  |^
  |long
include/env.h:118:1: error: unknown type name 'ulong'; did you mean
'long'?
  118 | ulong env_get_hex(const char *varname, ulong default_val);
  | ^
  | long
include/env.h:118:40: error: unknown type name 'ulong'; did you mean
'long'?
  118 | ulong env_get_hex(const char *varname, ulong default_val);
  |^
  |long
include/env.h:127:38: error: unknown type name 'ulong'; did you mean
'long'?
  127 | int env_set_hex(const char *varname, ulong value);
  |  ^
  |  long
include/env.h: In function 'env_set_addr':
include/env.h:138:31: error: 'ulong' undeclared (first use in this
function)
  138 |  return env_set_hex(varname, (ulong)addr);
  |   ^
include/env.h:138:31: note: each undeclared identifier is reported only
once for each function it appears in
include/env.h:138:37: error: expected ')' before 'addr'
  138 |  return env_set_hex(varname, (ulong)addr);
  | ^~~~
  | )
make[1]: *** [scripts/Makefile.host:114: tools/env/env_flags.o] Error 1
make: *** [Makefile:1778: envtools] Error 2
Bisecting: 3 revisions left to test after this (roughly 2 steps)
...
Bisecting: 0 revisions left to test after this (roughly 0 steps)
[cdbff9fc4002fdd47181088d5abe90e5f2fa1904] env: Move env_get_hex() to
...
9fb625ce05539fe6876a59ce1dcadb76b33c6f6e is the first bad commit
commit 9fb625ce05539fe6876a59ce1dcadb76b33c6f6e
Author: Simon Glass 
Date:   Thu Aug 1 09:46:51 2019 -0600

env: Move env_set() to env.h

Move env_set() over to the new header file.

Acked-by: Joe Hershberger 
Signed-off-by: Simon Glass 


Would be great to get this building again before 2019.10 release!


live well,
  vagrant


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Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx u-boot-imx-20190923

[Otavio Salvador]

Hello Tom,

On Mon, Sep 23, 2019 at 5:04 PM Otavio Salvador  wrote:
> On Mon, Sep 23, 2019 at 4:29 PM Tom Rini  wrote:
> > > We are now getting to move more things to DM model and we hope to do
> > > more changes for next release.
> >
> > OK.  But we're 2 weeks from v2019.10 release.  Will these platforms be
> > better or worse off holding most (all?) of these changes for the next
> > release so they can if not get more "polish" at least more testing
> > before a release and be included once the release happens and merge
> > window opens?  Thanks!
>
> PICO 7D changes are fixes. The PICO i.MX6 can wait.

I ended redoing the branch and removing Joris patches for this
release. Those were breaking the builds and prepared a branch which
builds fine.

The following changes since commit 31e086e460fb5de6dd42559babdc1e027ed2fe96:

  Prepare v2019.10-rc4 (2019-09-23 12:24:39 -0400)

are available in the Git repository at:

  https://github.com/OSSystems/u-boot imx-fixes-2019.10

for you to fetch changes up to b0902ed95d2a0fa6de15c3adacdcc2965ae6ddc3:

  Merge remote-tracking branch 'origin/master' into imx-fixes-2019.10
(2019-09-23 22:39:05 -0300)


Anatolij Gustschin (1):
  imx: sksimx6_defconfig: remove SPL misc option to fix build error

Bai Ping (2):
  i.MX7ULP: Fix system reset after a7 rtc alarm expired.
  i.MX7ULP: Correct the clock index

Breno Matheus Lima (4):
  Kconfig: Migrate CONFIG_CSF_SIZE to Kconfig
  imx6: spl: Reduce SPL limit size in case CONFIG_SECURE_BOOT is enabled
  imx: configs: Cleanup CONFIG_SECURE_BOOT comments
  habv4: tools: Avoid hardcoded CSF size for SPL targets

Fabio Berton (1):
  pico-imx7d: Sync pico-hobbit-imx7d_defconfig

Fabio Estevam (15):
  mx6sabresd: Reduce overall SPL size
  pico-imx6ul: Increase the CONFIG_ENV_OFFSET size
  pico-imx6ul: Add LCD support
  pico-imx6ul: Update the Falcon mode instructions
  pico-imx6ul: Provide a way to escape the Falcon mode
  pico-imx7d: Add instructions for booting in Falcon mode
  pico-imx7d: Provide a way to escape the Falcon mode
  logos: Add the TechNexion's logo
  pico: Convert to CONFIG_FSL_USDHC
  mx53loco: Fix U-Boot corruption after saving the environment
  mx6: clock: Allow enable_ipu_clock() to be built for SPL code
  pico-imx6: Add initial support
  pico-imx6: Add Ethernet support
  pico-imx6: Add splashscreen support
  pico-imx6: Add Falcon mode

Otavio Salvador (6):
  pico-imx6ul: Add DWARF baseboard support
  pico-imx7d: Add DWARF baseboard support
  pico-imx7d: Add NYMPH baseboard support
  configs: Sync all baseboard specific pico-imx7d
  pico-imx6: Fix bootmenu handling
  Merge remote-tracking branch 'origin/master' into imx-fixes-2019.10

Peng Fan (39):
  arm: dts: sync dts for i.MX6UL
  arm: dts: sync dts for i.MX6ULL
  arm: dts: import dts for i.MX6ULZ
  imx: add i.MX6ULZ cpu type
  imx: add i.MX6ULZ board
  imx: mx6ul_14x14_evk: Fix SPL boot
  imx: mx6ul_14x14_evk: convert to DM_VIDEO
  imx: mx6slevk: enable DM_SPI and DM_SPI_FLASH
  pinctrl: imx: use devfdt_get_addr_size_index
  tools: imx8mimage: fix HDMI/FIT parsing
  serial: Kconfig: make MXC_UART usable for MX7 and IMX8M
  spl: pass args to board_return_to_bootrom
  arm: dts: imx: fsl-imx8qm.dtsi: add gpio aliases to fix gpio command
  imx: i.MX7ULP: add get_boot_device
  i.MX7ULP: evk: Modify FDT file to disable SD3.0 for usb boot
  misc: Kconfig: make i.MX7ULP could use MXC_OCOTP
  i.MX7ULP: evk: Enable fuse comamnd
  i.MX7ULP: Add CPU revision check for B0
  imx: mx6sabresd: fix usb start when DM enabled
  imx: imx6qdl: dtsi: move U-Boot specific change to u-boot.dtsi
  imx: imx8qxp_mek: fix CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
  imx8: support parsing i.MX8 Container file
  spl: mmc: support loading i.MX container format file
  imx: add container target
  imx8qxp_mek: switch to use container image
  imx8qm_mek: switch to use container image
  doc: imx: mkimage: introduce i.MX8 image format
  imx: sys_proto: add is_imx8qm helper
  imx8qm: power up SMMU
  imx8qm: correct fdt_file
  imx8: disable node when the resource is not owned
  configs: imx8qm/qxp_mek: enable CONFIG_OF_SYSTEM_SETUP
  imx: scu_api: add sc_rm_set_master_sid
  imx8: fdt: configure sid for masters
  imx8: save args passed from ATF
  imx8: fdt: add optee node
  imx: scu_api: add sc_pm_is_partition_started
  imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c
  imx8: cpu: fix mac fuse word for i.MX8QM

Ricardo Salveti (4):
  apalis_imx6: add board_fit_config_name_match to support FIT in SPL
  apalis_imx6: fix broken fsl_esdhc_imx conversion
  imx: apalis_imx6: select MX6Q via Kconfig
  spl: imx: only use HAB if spl fit signature is not 

Re: [U-Boot] [PATCH] imx: mx6ul_14x14_evk: fix link issue

[Peng Fan]

> Subject: [PATCH] imx: mx6ul_14x14_evk: fix link issue
> 
> Since recent splash changes common code for splashscreen logo should be
> used instead of adding duplicated code under board directories.
> mx6ul_9x9_evk and mx6ul_14x14_evk configurations used old board specific
> logo code and do not link, fix them.
> 
> Signed-off-by: Anatolij Gustschin 

Acked-by: Peng Fan 

> ---
>  .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 19 ++-
>  configs/mx6ul_14x14_evk_defconfig |  1 +
>  configs/mx6ul_9x9_evk_defconfig   |  1 +
>  include/configs/mx6ul_14x14_evk.h |  1 +
>  4 files changed, 5 insertions(+), 17 deletions(-)
> 
> diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
> b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
> index 8e5f365d35..c98e98b485 100644
> --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
> +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
> @@ -28,10 +28,6 @@
>  #include "../common/pfuze.h"
>  #include 
>  #include 
> -#ifdef CONFIG_DM_VIDEO
> -#include 
> -#include 
> -#endif
> 
>  DECLARE_GLOBAL_DATA_PTR;
> 
> @@ -449,6 +445,8 @@ static int setup_lcd(void)
> 
>   return 0;
>  }
> +#else
> +static inline int setup_lcd(void) { return 0; }
>  #endif
> 
>  int board_early_init_f(void)
> @@ -505,21 +503,8 @@ int board_late_init(void)
>   env_set("board_rev", "14X14");
>  #endif
> 
> -#if defined(CONFIG_DM_VIDEO)
> - struct udevice *dev;
> - int ret;
> -
> - ret = uclass_get_device(UCLASS_VIDEO, 0, );
> - if (ret)
> - return ret;
> -
>   setup_lcd();
> 
> - ret = video_bmp_display(dev, (ulong)bmp_logo_bitmap, 0, 0, true);
> - if (ret)
> - return ret;
> -#endif
> -
>   return 0;
>  }
> 
> diff --git a/configs/mx6ul_14x14_evk_defconfig
> b/configs/mx6ul_14x14_evk_defconfig
> index 526ede34e9..429dff0d35 100644
> --- a/configs/mx6ul_14x14_evk_defconfig
> +++ b/configs/mx6ul_14x14_evk_defconfig
> @@ -68,3 +68,4 @@ CONFIG_USB=y
>  CONFIG_DM_USB=y
>  CONFIG_USB_STORAGE=y
>  CONFIG_DM_VIDEO=y
> +CONFIG_SYS_WHITE_ON_BLACK=y
> diff --git a/configs/mx6ul_9x9_evk_defconfig
> b/configs/mx6ul_9x9_evk_defconfig index 95c6697e62..4b517436c8 100644
> --- a/configs/mx6ul_9x9_evk_defconfig
> +++ b/configs/mx6ul_9x9_evk_defconfig
> @@ -71,3 +71,4 @@ CONFIG_USB=y
>  CONFIG_DM_USB=y
>  CONFIG_USB_STORAGE=y
>  CONFIG_DM_VIDEO=y
> +CONFIG_SYS_WHITE_ON_BLACK=y
> diff --git a/include/configs/mx6ul_14x14_evk.h
> b/include/configs/mx6ul_14x14_evk.h
> index f8a5fd30f3..87f88693c5 100644
> --- a/include/configs/mx6ul_14x14_evk.h
> +++ b/include/configs/mx6ul_14x14_evk.h
> @@ -60,6 +60,7 @@
>   "fdt_addr=0x8300\0" \
>   "boot_fdt=try\0" \
>   "ip_dyn=yes\0" \
> + "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
> 
>   "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,l
> o:4,hs:41,vs:10,sync:0,vmode:0\0" \
>   "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
>   "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
> --
> 2.17.1

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[U-Boot] [PATCH] Kconfig: fix a typo in the description of bmp command.

[Andrius Štikonas]

Signed-off-by: Andrius Štikonas 
---
 cmd/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 98647f58b7..c25fee721f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1468,7 +1468,7 @@ config CMD_BMP
bool "Enable 'bmp' command"
depends on LCD || DM_VIDEO || VIDEO
help
- This provides a way to obtain information about a BMP-format iamge
+ This provides a way to obtain information about a BMP-format image
  and to display it. BMP (which presumably stands for BitMaP) is a
  file format defined by Microsoft which supports images of various
  depths, formats and compression methods. Headers on the file
-- 
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[U-Boot] [PATCH 1/1] efi_loader: SetVariable() deleting variables

[Heinrich Schuchardt]

APPEND_WRITE with data length zero is allowable according to the UEFI
specification.

The EDK2 interpretation of no access attributes is attributes = 0. As
the UEFI specification is vague in this respect let's stick to EDK2 here.

Fixes: commit 6d2f27c5fd60 ("efi_loader: variable: support APPEND_WRITE")
Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_variable.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 22ad271bd8..4c554c546b 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -443,8 +443,6 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
if (ret)
goto out;

-#define ACCESS_ATTR (EFI_VARIABLE_RUNTIME_ACCESS | 
EFI_VARIABLE_BOOTSERVICE_ACCESS)
-
old_val = env_get(native_name);
if (old_val) {
old_val = parse_attr(old_val, );
@@ -455,7 +453,9 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
goto out;
}

-   if ((data_size == 0) || !(attributes & ACCESS_ATTR)) {
+   if ((data_size == 0 &&
+!(attributes & EFI_VARIABLE_APPEND_WRITE)) ||
+   !attributes) {
/* delete the variable: */
env_set(native_name, NULL);
ret = EFI_SUCCESS;
@@ -478,8 +478,9 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
old_size = 0;
}
} else {
-   if ((data_size == 0) || !(attributes & ACCESS_ATTR) ||
-   (attributes & EFI_VARIABLE_APPEND_WRITE)) {
+   if ((data_size == 0 &&
+!(attributes & EFI_VARIABLE_APPEND_WRITE)) ||
+   !attributes) {
/* delete, but nothing to do */
ret = EFI_NOT_FOUND;
goto out;
--
2.23.0

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[U-Boot] [PATCH 1/1] efi_loader: SetVariable() fix illegal return

[Heinrich Schuchardt]

We always have to return via EFI_EXIT() from EFIAPI functions.

Coverity reported an unreachable line and a resource leak.

Fixes: commit 6d2f27c5fd60 ("efi_loader: variable: support APPEND_WRITE")
Reported-by: Coverity Scan CID 253575, CID 184095
Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_variable.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 48ee255f87..22ad271bd8 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -470,7 +470,7 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name,

if (attributes & EFI_VARIABLE_APPEND_WRITE) {
if (!prefix(old_val, "(blob)")) {
-   return EFI_DEVICE_ERROR;
+   ret = EFI_DEVICE_ERROR;
goto out;
}
old_size = strlen(old_val);
--
2.23.0

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Re: [U-Boot] [Buildman] libmpfr.so.4 error when running buildman in Ubuntu 18.04

[Breno Matheus Lima]

Hi Tom,

Em seg, 23 de set de 2019 às 17:02, Tom Rini  escreveu:
>
> On Mon, Sep 23, 2019 at 04:47:55PM -0300, Breno Matheus Lima wrote:
>
> > Hi All,
> >
> > I'm trying to run buildman in Ubuntu 18.04 and I met the following
> > build issue in most of the archs:
> >
> > +/home/breno/.buildman-toolchains/gcc-7.3.0-nolibc/powerpc-linux/bin/../libexec/gcc/powerpc-linux/7.3.0/cc1:
> > error while loading shared libraries: libmpfr.so.4: cannot open shared
> > object file: No such file or directory
> > +make[2]: *** [u-boot.cfg] Error 1
> > +make[1]: *** No rule to make target 'include/config/auto.conf',
> > needed by 'include/config/uboot.release'.  Stop.
> > +make: *** [sub-make] Error 2
> >
> > According to link [1] libmpfr4 has been dropped in Ubuntu 18.04 It was
> > replaced by the package libmpfr6, seems that the toolchains being used
> > by buildman requires libmpfr4 package.
> >
> > Has anyone seen similar issue?
> >
> > I could solve this issue after following link [2] and creating a
> > symbolical link for libmpfr.so.4 as below:
> >
> > $ sudo ln -s /usr/lib/x86_64-linux-gnu/libmpfr.so.6
> > /usr/lib/x86_64-linux-gnu/libmpfr.so.4
> >
> > Just wondering if someone found a better workaround for this issue :)
>
> A better workaround for this is to grab the libmpfr4 deb from Ubuntu
> 16.04 and install that.  I suppose we might need to investigate moving
> to the Bootlin created toolchains, even if we can't also move to a newer
> toolchain version at the same time (for various reasons documented in
> other threads, we need gcc 8.3 or 9.x for all architectures to be
> happy).
>

That worked, thanks!

Just downloaded from link below and I'm not seeing this error anymore:
https://launchpad.net/ubuntu/bionic/amd64/libmpfr4/3.1.6-1

Best regards,
Breno Lima
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Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx u-boot-imx-20190923

[Otavio Salvador]

On Mon, Sep 23, 2019 at 4:29 PM Tom Rini  wrote:
> On Mon, Sep 23, 2019 at 03:48:29PM -0300, Otavio Salvador wrote:
> > On Mon, Sep 23, 2019 at 9:57 AM Joris Offouga  
> > wrote:
> > > Hi Tom and Stefano
> > >
> > > I send patch series for fix build for pico-imx7d
> >
> > Those changes are indeed important. Most were sent before and we
> > polished them more lately.
> >
> > Joris also been promptly on fixing issues, so I'd love to see it all merged.
> >
> > We are now getting to move more things to DM model and we hope to do
> > more changes for next release.
>
> OK.  But we're 2 weeks from v2019.10 release.  Will these platforms be
> better or worse off holding most (all?) of these changes for the next
> release so they can if not get more "polish" at least more testing
> before a release and be included once the release happens and merge
> window opens?  Thanks!

PICO 7D changes are fixes. The PICO i.MX6 can wait.

-- 
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Re: [U-Boot] [Buildman] libmpfr.so.4 error when running buildman in Ubuntu 18.04

[Tom Rini]

On Mon, Sep 23, 2019 at 04:47:55PM -0300, Breno Matheus Lima wrote:

> Hi All,
> 
> I'm trying to run buildman in Ubuntu 18.04 and I met the following
> build issue in most of the archs:
> 
> +/home/breno/.buildman-toolchains/gcc-7.3.0-nolibc/powerpc-linux/bin/../libexec/gcc/powerpc-linux/7.3.0/cc1:
> error while loading shared libraries: libmpfr.so.4: cannot open shared
> object file: No such file or directory
> +make[2]: *** [u-boot.cfg] Error 1
> +make[1]: *** No rule to make target 'include/config/auto.conf',
> needed by 'include/config/uboot.release'.  Stop.
> +make: *** [sub-make] Error 2
> 
> According to link [1] libmpfr4 has been dropped in Ubuntu 18.04 It was
> replaced by the package libmpfr6, seems that the toolchains being used
> by buildman requires libmpfr4 package.
> 
> Has anyone seen similar issue?
> 
> I could solve this issue after following link [2] and creating a
> symbolical link for libmpfr.so.4 as below:
> 
> $ sudo ln -s /usr/lib/x86_64-linux-gnu/libmpfr.so.6
> /usr/lib/x86_64-linux-gnu/libmpfr.so.4
> 
> Just wondering if someone found a better workaround for this issue :)

A better workaround for this is to grab the libmpfr4 deb from Ubuntu
16.04 and install that.  I suppose we might need to investigate moving
to the Bootlin created toolchains, even if we can't also move to a newer
toolchain version at the same time (for various reasons documented in
other threads, we need gcc 8.3 or 9.x for all architectures to be
happy).

-- 
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[U-Boot] [Buildman] libmpfr.so.4 error when running buildman in Ubuntu 18.04

[Breno Matheus Lima]

Hi All,

I'm trying to run buildman in Ubuntu 18.04 and I met the following
build issue in most of the archs:

+/home/breno/.buildman-toolchains/gcc-7.3.0-nolibc/powerpc-linux/bin/../libexec/gcc/powerpc-linux/7.3.0/cc1:
error while loading shared libraries: libmpfr.so.4: cannot open shared
object file: No such file or directory
+make[2]: *** [u-boot.cfg] Error 1
+make[1]: *** No rule to make target 'include/config/auto.conf',
needed by 'include/config/uboot.release'.  Stop.
+make: *** [sub-make] Error 2

According to link [1] libmpfr4 has been dropped in Ubuntu 18.04 It was
replaced by the package libmpfr6, seems that the toolchains being used
by buildman requires libmpfr4 package.

Has anyone seen similar issue?

I could solve this issue after following link [2] and creating a
symbolical link for libmpfr.so.4 as below:

$ sudo ln -s /usr/lib/x86_64-linux-gnu/libmpfr.so.6
/usr/lib/x86_64-linux-gnu/libmpfr.so.4

Just wondering if someone found a better workaround for this issue :)

Thanks,
Breno Lima

[1]: 
https://askubuntu.com/questions/1054236/cannot-open-libmpfr-so-4-after-update-on-ubuntu-18-04
[2]: https://github.com/GreenWaves-Technologies/gap_sdk/issues/4
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Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx u-boot-imx-20190923

[Tom Rini]

On Mon, Sep 23, 2019 at 03:48:29PM -0300, Otavio Salvador wrote:
> On Mon, Sep 23, 2019 at 9:57 AM Joris Offouga  wrote:
> > Hi Tom and Stefano
> >
> > I send patch series for fix build for pico-imx7d
> 
> Those changes are indeed important. Most were sent before and we
> polished them more lately.
> 
> Joris also been promptly on fixing issues, so I'd love to see it all merged.
> 
> We are now getting to move more things to DM model and we hope to do
> more changes for next release.

OK.  But we're 2 weeks from v2019.10 release.  Will these platforms be
better or worse off holding most (all?) of these changes for the next
release so they can if not get more "polish" at least more testing
before a release and be included once the release happens and merge
window opens?  Thanks!

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Re: [U-Boot] [PATCH v2] imx: wandboard: convert FEC support to DM_ETH

[Anatolij Gustschin]

Hi Fabio,

On Fri, 20 Sep 2019 19:18:45 -0300
Fabio Estevam feste...@gmail.com wrote:
...
> Could you also submit the dts change to the kernel?

I've sent a patch to arm kernel ML.

> This way we avoid getting the U-Boot and kernel dts out of sync.

Agreed.

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Re: [U-Boot] [PATCH v2] splash: fix splash banner output

[Anatolij Gustschin]

On Fri, 20 Sep 2019 20:05:48 +0200
Anatolij Gustschin ag...@denx.de wrote:
...
>  common/splash.c | 46 +-
>  1 file changed, 45 insertions(+), 1 deletion(-)

Applied to u-boot-video/master, thanks!

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Re: [U-Boot] [PATCH 0/7] Fix splash logo for imx6 boards

[Anatolij Gustschin]

On Thu, 19 Sep 2019 19:30:08 +0200
Anatolij Gustschin ag...@denx.de wrote:
...
>   splash: fix logo drawing if CONFIG_VIDEO_LOGO enabled
>   imx: wandboard: fix splash logo drawing
>   imx: mx6sabresd: fix splash logo drawing
>   imx: apalis_imx6: fix splash logo drawing
>   imx: icore: fix splash logo drawing
>   imx: colibri_imx6: fix splash logo drawing
>   imx: mx6sabreauto: fix splash logo drawing

Series applied to u-boot-video/master.

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Re: [U-Boot] [PATCH] sunxi: video: HDMI: Fix LCD clock divider

[Anatolij Gustschin]

On Fri,  9 Aug 2019 22:30:26 +0200
Mark Kettenis kette...@openbsd.org wrote:
...
> ---
>  drivers/video/sunxi/sunxi_dw_hdmi.c | 2 +-

Applied to u-boot-video/master, thanks!

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Re: [U-Boot] [ANN] U-Boot v2019.10-rc4 released

[Tom Rini]

On Mon, Sep 23, 2019 at 01:48:12PM -0500, Adam Ford wrote:
> On Mon, Sep 23, 2019 at 11:26 AM Tom Rini  wrote:
> >
> > Hey all,
> >
> > So, I had said I would do -rc4 on September 9th and -rc5 on September
> > 23rd, and now it's the 23rd and I'm doing -rc4.  Why?  My reminder for
> > -rc4 got lost in the shuffle that day and I didn't remember about it
> > until close to -rc5 time.  My fault, oops.
> >
> > At this point, I'd really like to see pull requests that are fixing bugs
> > or regressions.
> 
> There is still a pending patch where without it, my board does not
> boot.  Is there any way to integrate this so it can start again?
> 
> https://patchwork.ozlabs.org/patch/1143567/
> 
> I was really hoping we could get it into the next release.  I openly
> admit I forgot to include the file when i did the SPL conversion to
> OF_CONFIG.

This sounds like a regression fix so yes, I see no reason it shouldn't
come in.

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Re: [U-Boot] [PATCH 3/4] imx6: spl: Reduce SPL limit size in case CONFIG_SECURE_BOOT is enabled

[Breno Matheus Lima]

Hi Stefano and Jagan,


Em qui, 19 de set de 2019 às 05:27, Stefano Babic  escreveu:
>
> On 19/09/19 07:37, Jagan Teki wrote:
> > Hi Stefano,
> >
> > On Wed, Sep 18, 2019 at 1:29 PM Stefano Babic  wrote:
> >>
> >> Hi Jagan, Breno,
> >>
> >> On 17/09/19 09:13, Jagan Teki wrote:
> >>> Hi Breno,
> >>>
> >>> On Thu, Jul 18, 2019 at 6:06 PM Breno Matheus Lima  
> >>> wrote:
> 
>  In case CONFIG_SECURE_BOOT is enabled we need to limit the SPL size to
>  avoid a possible HAB failure event:
> 
>  - HAB Event 1 -
>  event data:
>  0xdb 0x00 0x14 0x42 0x33 0x22 0x33 0x00
>  0x00 0x00 0x00 0x0f 0x00 0x90 0x70 0x00
>  0x00 0x01 0x10 0x00
>  STS = HAB_FAILURE (0x33)
>  RSN = HAB_INV_ADDRESS (0x22)
>  CTX = HAB_CTX_TARGET (0x33)
>  ENG = HAB_ENG_ANY (0x00)
> 
>  As explained in Commit 23612534fe0f ("spl: imx6: Provide a SPL_SIZE_LIMIT
>  default") the i.MX6 SPL size limit is 68KB.
> 
>  The ROM code is copying the image size defined in boot data to its
>  respective load address, in case we exceed the OCRAM free region a
>  HAB invalid address failure event is generated.
> 
>  The maximum CSF size is defined in CONFIG_CSF_SIZE, reduce SPL size
>  limit based on this configuration.
> 
>  Signed-off-by: Breno Lima 
>  ---
>   tools/spl_size_limit.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
>  diff --git a/tools/spl_size_limit.c b/tools/spl_size_limit.c
>  index 98ff491867..8902e30129 100644
>  --- a/tools/spl_size_limit.c
>  +++ b/tools/spl_size_limit.c
>  @@ -14,6 +14,9 @@ int main(int argc, char *argv[])
> 
>   #ifdef CONFIG_SPL_SIZE_LIMIT
>  spl_size_limit = CONFIG_SPL_SIZE_LIMIT;
>  +#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_CSF_SIZE)
>  +   spl_size_limit -= CONFIG_CSF_SIZE;
>  +#endif
> >>>
> >>> But, if the target enable HAB on SPL the size would be part of SPL
> >>> limit, isn't ?
> >>
> >> Indeed - it is not clear to me, too, if it is correct, even if CSF is
> >> added later by the NXP signing tools. The patch reduces significantly
> >> the available space for SPL, I just wondering why just mamoj is
> >> affected. Jagan, does it work without this patch applied ?
> >
> > mamoj is affected since the board enables SPL_DM, SPL_OF_CONTROL. Yes,
> > the build look fine without this patch.
>
> Anyway, SPL size does not seem to much. But dropping 0x4000 to the
> available size is really a lot, and I hope we can reduce this.
>

Thanks for submitting a fix for mamoj board.

We should also reduce CSF_SIZE in default_image.c and image.c to avoid
a U-Boot proper authentication failure in HAB closed devices. The
current U-Boot tools code is hardcoding CSF_SIZE as 0x2000 and
mx6ul_14x14_defconfig target is failing to boot with error below:

Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x32 length=0x6131 version=0x38
bad length magic=0x32 length=0x6131 version=0x38
bad version magic=0x32 length=0x6131 version=0x38
spl: ERROR:  image authentication fail

The intent of "habv4: tools: Avoid hardcoded CSF size for SPL targets"
is to avoid such issue. I tried to apply this patch back but I'm
seeing gunzip related errors as reported by Igor Opaniuk. We may need
to understand better this dependency.

I have just submitted a patch reducing default CSF_SIZE to 0x2060,
this patch is also modifying default_image.c and image.c but CSF_SIZE
still hardcoded in U-Boot tools code.

Thanks,
Breno Lima
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Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx u-boot-imx-20190923

[Otavio Salvador]

On Mon, Sep 23, 2019 at 9:57 AM Joris Offouga  wrote:
> Hi Tom and Stefano
>
> I send patch series for fix build for pico-imx7d

Those changes are indeed important. Most were sent before and we
polished them more lately.

Joris also been promptly on fixing issues, so I'd love to see it all merged.

We are now getting to move more things to DM model and we hope to do
more changes for next release.

-- 
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Mobile: +55 (53) 9 9981-7854  Mobile: +1 (347) 903-9750
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Re: [U-Boot] [ANN] U-Boot v2019.10-rc4 released

[Adam Ford]

On Mon, Sep 23, 2019 at 11:26 AM Tom Rini  wrote:
>
> Hey all,
>
> So, I had said I would do -rc4 on September 9th and -rc5 on September
> 23rd, and now it's the 23rd and I'm doing -rc4.  Why?  My reminder for
> -rc4 got lost in the shuffle that day and I didn't remember about it
> until close to -rc5 time.  My fault, oops.
>
> At this point, I'd really like to see pull requests that are fixing bugs
> or regressions.

There is still a pending patch where without it, my board does not
boot.  Is there any way to integrate this so it can start again?

https://patchwork.ozlabs.org/patch/1143567/

I was really hoping we could get it into the next release.  I openly
admit I forgot to include the file when i did the SPL conversion to
OF_CONFIG.

adam
>
> I've also today clarified on the
> http://www.denx.de/wiki/U-Boot/CustodianGitTrees page that the "next"
> branch is expected to be rebased.  Why?  While I'm not sure if I want to
> apply things directly to the next branch and then give them some sort of
> automated testing, I do want to try and give changes some sort of build
> testing and similar sooner than I have, and that was at least a related
> problem.
>
> In terms of a changelog,
> git log --merges v2019.10-rc2..v2019.10-rc3
> and again, please make sure to use a tag with a changelog for your pull
> request or at least a changelog of sorts in the email itself.
>
> The v2019.10 release is currently scheduled for October 7th.  Thanks all!
>
> --
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[U-Boot] [PATCH] imx: Kconfig: Reduce default CONFIG_CSF_SIZE

[Breno Matheus Lima]

The default CSF_SIZE defined in Kconfig is too high and SPL cannot
fit into the OCRAM in certain cases.

The CSF cannot achieve 0x2000 length when using RSA 4K key which is
the largest key size supported by HABv4.

According to AN12056 "Encrypted Boot on HABv4 and CAAM Enabled Devices"
it's recommended to pad CSF binary to 0x2000 and append DEK blob to
deploy encrypted boot images.

As the maximum DEK blob size is 0x58 we can reduce CSF_SIZE to 0x2060
which should cover both CSF and DEK blob length.

Update default_image.c and image.c to align with this change and avoid
a U-Boot proper authentication failure in HAB closed devices:

Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x32 length=0x6131 version=0x38
bad length magic=0x32 length=0x6131 version=0x38
bad version magic=0x32 length=0x6131 version=0x38
spl: ERROR:  image authentication fail

Fixes: 96d27fb218 (Revert "habv4: tools: Avoid hardcoded CSF size for SPL 
targets")

Reported-by: Jagan Teki 
Signed-off-by: Breno Lima 
---
 arch/arm/mach-imx/Kconfig | 2 +-
 common/image.c| 7 ---
 tools/default_image.c | 5 -
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d44f74e474..f721eaf937 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -45,7 +45,7 @@ config SECURE_BOOT
 
 config CSF_SIZE
hex "Maximum size for Command Sequence File (CSF) binary"
-   default 0x4000
+   default 0x2060
help
  Define the maximum size for Command Sequence File (CSF) binary
  this information is used to define the image boot data.
diff --git a/common/image.c b/common/image.c
index 179eef0bd2..62ba6b3bfe 100644
--- a/common/image.c
+++ b/common/image.c
@@ -61,6 +61,7 @@ static const image_header_t *image_get_ramdisk(ulong rd_addr, 
uint8_t arch,
 #endif /* !USE_HOSTCC*/
 
 #include 
+#include 
 
 #ifndef CONFIG_SYS_BARGSIZE
 #define CONFIG_SYS_BARGSIZE 512
@@ -378,9 +379,9 @@ void image_print_contents(const void *ptr)
}
} else if (image_check_type(hdr, IH_TYPE_FIRMWARE_IVT)) {
printf("HAB Blocks:   0x%08x   0x   0x%08x\n",
-   image_get_load(hdr) - image_get_header_size(),
-   image_get_size(hdr) + image_get_header_size()
-   - 0x1FE0);
+   image_get_load(hdr) - image_get_header_size(),
+   (int)(image_get_size(hdr) + image_get_header_size()
+   + sizeof(flash_header_v2_t) - 0x2060));
}
 }
 
diff --git a/tools/default_image.c b/tools/default_image.c
index 4b7d1ed4a1..f7990e28c0 100644
--- a/tools/default_image.c
+++ b/tools/default_image.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static image_header_t header;
 
@@ -106,7 +107,9 @@ static void image_set_header(void *ptr, struct stat *sbuf, 
int ifd,
 
if (params->type == IH_TYPE_FIRMWARE_IVT)
/* Add size of CSF minus IVT */
-   imagesize = sbuf->st_size - sizeof(image_header_t) + 0x1FE0;
+   imagesize = sbuf->st_size - sizeof(image_header_t)
+   + 0x2060 - sizeof(flash_header_v2_t);
+
else
imagesize = sbuf->st_size - sizeof(image_header_t);
 
-- 
2.17.1

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Re: [U-Boot] [PATCH V2 3/4] cmd: aes: use map_sysmem when accessing memory

[Simon Glass]

On Mon, 23 Sep 2019 at 09:39, Philippe Reynes
 wrote:
>
> The aes command used to segfault when accessing memory in sandbox.
> The pointer accesses should be mapped.
>
> Signed-off-by: Philippe Reynes 
> ---
>  cmd/aes.c | 9 +
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/cmd/aes.c b/cmd/aes.c
> index 7ff4a71..3db110c 100644
> --- a/cmd/aes.c
> +++ b/cmd/aes.c
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  /**
>   * do_aes() - Handle the "aes" command-line command
> @@ -46,10 +47,10 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
> char *const argv[])
> dst_addr = simple_strtoul(argv[5], NULL, 16);
> len = simple_strtoul(argv[6], NULL, 16);
>
> -   key_ptr = (uint8_t *)key_addr;
> -   iv_ptr = (uint8_t *)iv_addr;
> -   src_ptr = (uint8_t *)src_addr;
> -   dst_ptr = (uint8_t *)dst_addr;
> +   key_ptr = (uint8_t *)map_sysmem(key_addr, 128 / 8);
> +   iv_ptr = (uint8_t *)map_sysmem(iv_addr, 128 / 8);
> +   src_ptr = (uint8_t *)map_sysmem(src_addr, len);
> +   dst_ptr = (uint8_t *)map_sysmem(dst_addr, len);
>
> /* First we expand the key. */
> aes_expand_key(key_ptr, key_exp);

Please can you unmap_sysmem() as well?

Regards,
SImon
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[U-Boot] [PATCH 2/4] aes: add support of aes192 and aes256

[Philippe Reynes]

Until now, we only support aes128. This commit add the support
of aes192 and aes256.

Signed-off-by: Philippe Reynes 
---
 cmd/aes.c   | 38 +-
 include/uboot_aes.h | 34 +++
 lib/aes.c   | 77 +
 3 files changed, 103 insertions(+), 46 deletions(-)

diff --git a/cmd/aes.c b/cmd/aes.c
index d0a45fa..e0e43cc 100644
--- a/cmd/aes.c
+++ b/cmd/aes.c
@@ -2,7 +2,7 @@
 /*
  * Copyright (C) 2014 Marek Vasut 
  *
- * Command for en/de-crypting block of memory with AES-128-CBC cipher.
+ * Command for en/de-crypting block of memory with AES-[128/192/256]-CBC 
cipher.
  */
 
 #include 
@@ -13,6 +13,18 @@
 #include 
 #include 
 
+u32 aes_get_key_len(char *command)
+{
+   u32 key_len = AES128_KEY_LENGTH;
+
+   if (!strcmp(command, "aes.192"))
+   key_len = AES192_KEY_LENGTH;
+   else if (!strcmp(command, "aes.256"))
+   key_len = AES256_KEY_LENGTH;
+
+   return key_len;
+}
+
 /**
  * do_aes() - Handle the "aes" command-line command
  * @cmdtp: Command data struct pointer
@@ -27,13 +39,15 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[])
 {
uint32_t key_addr, iv_addr, src_addr, dst_addr, len;
uint8_t *key_ptr, *iv_ptr, *src_ptr, *dst_ptr;
-   uint8_t key_exp[AES_EXPAND_KEY_LENGTH];
-   uint32_t aes_blocks;
+   u8 key_exp[AES256_EXPAND_KEY_LENGTH];
+   u32 aes_blocks, key_len;
int enc;
 
if (argc != 7)
return CMD_RET_USAGE;
 
+   key_len = aes_get_key_len(argv[0]);
+
if (!strncmp(argv[1], "enc", 3))
enc = 1;
else if (!strncmp(argv[1], "dec", 3))
@@ -47,23 +61,23 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[])
dst_addr = simple_strtoul(argv[5], NULL, 16);
len = simple_strtoul(argv[6], NULL, 16);
 
-   key_ptr = (uint8_t *)map_sysmem(key_addr, 128 / 8);
+   key_ptr = (uint8_t *)map_sysmem(key_addr, key_len);
iv_ptr = (uint8_t *)map_sysmem(iv_addr, 128 / 8);
src_ptr = (uint8_t *)map_sysmem(src_addr, len);
dst_ptr = (uint8_t *)map_sysmem(dst_addr, len);
 
/* First we expand the key. */
-   aes_expand_key(key_ptr, key_exp);
+   aes_expand_key(key_ptr, key_len, key_exp);
 
/* Calculate the number of AES blocks to encrypt. */
aes_blocks = DIV_ROUND_UP(len, AES_BLOCK_LENGTH);
 
if (enc)
-   aes_cbc_encrypt_blocks(key_exp, iv_ptr, src_ptr, dst_ptr,
-  aes_blocks);
+   aes_cbc_encrypt_blocks(key_len, key_exp, iv_ptr, src_ptr,
+  dst_ptr, aes_blocks);
else
-   aes_cbc_decrypt_blocks(key_exp, iv_ptr, src_ptr, dst_ptr,
-  aes_blocks);
+   aes_cbc_decrypt_blocks(key_len, key_exp, iv_ptr, src_ptr,
+  dst_ptr, aes_blocks);
 
return 0;
 }
@@ -71,13 +85,13 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[])
 /***/
 #ifdef CONFIG_SYS_LONGHELP
 static char aes_help_text[] =
-   "enc key iv src dst len - Encrypt block of data $len bytes long\n"
+   "[.128,.192,.256] enc key iv src dst len - Encrypt block of data $len 
bytes long\n"
" at address $src using a key at address\n"
" $key with initialization vector at 
address\n"
" $iv. Store the result at address $dst.\n"
" The $len size must be multiple of 16 
bytes.\n"
" The $key and $iv must be 16 bytes long.\n"
-   "aes dec key iv src dst len - Decrypt block of data $len bytes long\n"
+   "[.128,.192,.256] aes dec key iv src dst len - Decrypt block of data 
$len bytes long\n"
" at address $src using a key at address\n"
" $key with initialization vector at 
address\n"
" $iv. Store the result at address $dst.\n"
@@ -87,6 +101,6 @@ static char aes_help_text[] =
 
 U_BOOT_CMD(
aes, 7, 1, do_aes,
-   "AES 128 CBC encryption",
+   "AES 128/192/256 CBC encryption",
aes_help_text
 );
diff --git a/include/uboot_aes.h b/include/uboot_aes.h
index 1ae3ac9..d2583be 100644
--- a/include/uboot_aes.h
+++ b/include/uboot_aes.h
@@ -23,11 +23,18 @@ typedef unsigned int u32;
 
 enum {
AES_STATECOLS   = 4,/* columns in the state & expanded key */
-   AES_KEYCOLS = 4,/* columns in a key */
-   AES_ROUNDS  = 10,   /* rounds in encryption */
-
-   AES_KEY_LENGTH  = 128 / 8,
-   AES_EXPAND_KEY_LENGTH   = 4 * AES_STATECOLS * (AES_ROUNDS + 1),
+   AES128_KEYCOLS  = 4,/* columns 

[U-Boot] [PATCH 4/4] pytest: aes: add test for aes192 and aes256

[Philippe Reynes]

Signed-off-by: Philippe Reynes 
---
 test/py/tests/aes/key192.bin |  1 +
 test/py/tests/aes/key256.bin |  1 +
 test/py/tests/test_aes.py| 54 +++-
 3 files changed, 55 insertions(+), 1 deletion(-)
 create mode 100644 test/py/tests/aes/key192.bin
 create mode 100644 test/py/tests/aes/key256.bin

diff --git a/test/py/tests/aes/key192.bin b/test/py/tests/aes/key192.bin
new file mode 100644
index 000..9165c3f
--- /dev/null
+++ b/test/py/tests/aes/key192.bin
@@ -0,0 +1 @@
+T��a�3���2D8�aL��'(
\ No newline at end of file
diff --git a/test/py/tests/aes/key256.bin b/test/py/tests/aes/key256.bin
new file mode 100644
index 000..4d9c6ab
--- /dev/null
+++ b/test/py/tests/aes/key256.bin
@@ -0,0 +1 @@
+��x��QC֤o�n��h!�a/噧8�U
\ No newline at end of file
diff --git a/test/py/tests/test_aes.py b/test/py/tests/test_aes.py
index 408bd77..baf410e 100644
--- a/test/py/tests/test_aes.py
+++ b/test/py/tests/test_aes.py
@@ -21,7 +21,7 @@ def test_aes(u_boot_console):
 
 # Send a command with no argument ...
 output = cons.run_command('aes')
-assert('AES 128 CBC encryption' in ''.join(output))
+assert('AES 128/192/256 CBC encryption' in ''.join(output))
 
 # Load file from host
 output = cons.run_command('host load hostfs - 1000 %skey128.bin' % datadir)
@@ -46,3 +46,55 @@ def test_aes(u_boot_console):
 
 output = cons.run_command('cmp.b 3000 5000 0x20')
 assert('Total of 32 byte(s) were the same' in ''.join(output))
+
+#
+# Load file from host
+#
+output = cons.run_command('host load hostfs - 1000 %skey192.bin' % datadir)
+assert('24 bytes read' in ''.join(output))
+output = cons.run_command('host load hostfs - 2000 %siv128.bin' % datadir)
+assert('16 bytes read' in ''.join(output))
+output = cons.run_command('host load hostfs - 3000 %splaintext.bin' % 
datadir)
+assert('32 bytes read' in ''.join(output))
+
+output = cons.run_command('md.b 3000 0x20')
+
+output = cons.run_command('aes.192 enc 1000 2000 3000 4000 0x20')
+
+output = cons.run_command('cmp.b 3000 4000 0x20')
+assert('Total of 0 byte(s) were the same' in ''.join(output))
+
+output = cons.run_command('md.b 4000 0x20')
+
+output = cons.run_command('aes.192 dec 1000 2000 4000 5000 0x20')
+
+output = cons.run_command('md.b 5000 0x20')
+
+output = cons.run_command('cmp.b 3000 5000 0x20')
+assert('Total of 32 byte(s) were the same' in ''.join(output))
+
+#
+# Load file from host
+#
+output = cons.run_command('host load hostfs - 1000 %skey256.bin' % datadir)
+assert('32 bytes read' in ''.join(output))
+output = cons.run_command('host load hostfs - 2000 %siv128.bin' % datadir)
+assert('16 bytes read' in ''.join(output))
+output = cons.run_command('host load hostfs - 3000 %splaintext.bin' % 
datadir)
+assert('32 bytes read' in ''.join(output))
+
+output = cons.run_command('md.b 3000 0x20')
+
+output = cons.run_command('aes.256 enc 1000 2000 3000 4000 0x20')
+
+output = cons.run_command('cmp.b 3000 4000 0x20')
+assert('Total of 0 byte(s) were the same' in ''.join(output))
+
+output = cons.run_command('md.b 4000 0x20')
+
+output = cons.run_command('aes.256 dec 1000 2000 4000 5000 0x20')
+
+output = cons.run_command('md.b 5000 0x20')
+
+output = cons.run_command('cmp.b 3000 5000 0x20')
+assert('Total of 32 byte(s) were the same' in ''.join(output))
-- 
2.7.4

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[U-Boot] [PATCH 3/4] tegra20: crypto: update code to use new aes api

[Philippe Reynes]

Signed-off-by: Philippe Reynes 
---
 arch/arm/mach-tegra/tegra20/crypto.c | 41 +++-
 1 file changed, 22 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-tegra/tegra20/crypto.c 
b/arch/arm/mach-tegra/tegra20/crypto.c
index 66fbc3b..b91191e 100644
--- a/arch/arm/mach-tegra/tegra20/crypto.c
+++ b/arch/arm/mach-tegra/tegra20/crypto.c
@@ -39,34 +39,35 @@ static void left_shift_vector(u8 *in, u8 *out, int size)
 /**
  * Sign a block of data, putting the result into dst.
  *
- * \param key  Input AES key, length AES_KEY_LENGTH
+ * \param key  Input AES key, length AES128_KEY_LENGTH
  * \param key_schedule Expanded key to use
  * \param src  Source data of length 'num_aes_blocks' blocks
- * \param dst  Destination buffer, length AES_KEY_LENGTH
+ * \param dst  Destination buffer, length AES128_KEY_LENGTH
  * \param num_aes_blocks   Number of AES blocks to encrypt
  */
 static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst,
u32 num_aes_blocks)
 {
-   u8 tmp_data[AES_KEY_LENGTH];
-   u8 iv[AES_KEY_LENGTH] = {0};
-   u8 left[AES_KEY_LENGTH];
-   u8 k1[AES_KEY_LENGTH];
+   u8 tmp_data[AES128_KEY_LENGTH];
+   u8 iv[AES128_KEY_LENGTH] = {0};
+   u8 left[AES128_KEY_LENGTH];
+   u8 k1[AES128_KEY_LENGTH];
u8 *cbc_chain_data;
unsigned i;
 
cbc_chain_data = zero_key;  /* Convenient array of 0's for IV */
 
/* compute K1 constant needed by AES-CMAC calculation */
-   for (i = 0; i < AES_KEY_LENGTH; i++)
+   for (i = 0; i < AES128_KEY_LENGTH; i++)
tmp_data[i] = 0;
 
-   aes_cbc_encrypt_blocks(key_schedule, iv, tmp_data, left, 1);
+   aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv,
+  tmp_data, left, 1);
 
left_shift_vector(left, k1, sizeof(left));
 
if ((left[0] >> 7) != 0) /* get MSB of L */
-   k1[AES_KEY_LENGTH-1] ^= AES_CMAC_CONST_RB;
+   k1[AES128_KEY_LENGTH - 1] ^= AES_CMAC_CONST_RB;
 
/* compute the AES-CMAC value */
for (i = 0; i < num_aes_blocks; i++) {
@@ -78,31 +79,32 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, 
u8 *dst,
aes_apply_cbc_chain_data(tmp_data, k1, tmp_data);
 
/* encrypt the AES block */
-   aes_encrypt(tmp_data, key_schedule, dst);
+   aes_encrypt(AES128_KEY_LENGTH, tmp_data,
+   key_schedule, dst);
 
debug("sign_obj: block %d of %d\n", i, num_aes_blocks);
 
/* Update pointers for next loop. */
cbc_chain_data = dst;
-   src += AES_KEY_LENGTH;
+   src += AES128_KEY_LENGTH;
}
 }
 
 /**
  * Encrypt and sign a block of data (depending on security mode).
  *
- * \param key  Input AES key, length AES_KEY_LENGTH
+ * \param key  Input AES key, length AES128_KEY_LENGTH
  * \param oper Security operations mask to perform (enum security_op)
  * \param src  Source data
  * \param length   Size of source data
- * \param sig_dst  Destination address for signature, AES_KEY_LENGTH bytes
+ * \param sig_dst  Destination address for signature, AES128_KEY_LENGTH 
bytes
  */
 static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src,
u32 length, u8 *sig_dst)
 {
u32 num_aes_blocks;
-   u8 key_schedule[AES_EXPAND_KEY_LENGTH];
-   u8 iv[AES_KEY_LENGTH] = {0};
+   u8 key_schedule[AES128_EXPAND_KEY_LENGTH];
+   u8 iv[AES128_KEY_LENGTH] = {0};
 
debug("encrypt_and_sign: length = %d\n", length);
 
@@ -110,15 +112,16 @@ static int encrypt_and_sign(u8 *key, enum security_op 
oper, u8 *src,
 * The only need for a key is for signing/checksum purposes, so
 * if not encrypting, expand a key of 0s.
 */
-   aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key, key_schedule);
+   aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key,
+  AES128_KEY_LENGTH, key_schedule);
 
-   num_aes_blocks = (length + AES_KEY_LENGTH - 1) / AES_KEY_LENGTH;
+   num_aes_blocks = (length + AES128_KEY_LENGTH - 1) / AES128_KEY_LENGTH;
 
if (oper & SECURITY_ENCRYPT) {
/* Perform this in place, resulting in src being encrypted. */
debug("encrypt_and_sign: begin encryption\n");
-   aes_cbc_encrypt_blocks(key_schedule, iv, src, src,
-  num_aes_blocks);
+   aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src,
+  src, num_aes_blocks);
debug("encrypt_and_sign: end encryption\n");
}
 
-- 
2.7.4

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[U-Boot] [PATCH 0/4] aes: add support for aes192 and aes256

[Philippe Reynes]

This serie add the support of aes192 and aes256.
This first commit clean a bit the code, and introduce
a constant for the block (instead of using the key size).
The second commit add the support of aes192 and aes256
to the lib and the cmd. The third update the code of
crypto for tegra20, and the forth one add tests in 
pytest for aes192 and aes256.

Philippe Reynes (4):
  aes: add a define for the size of a block
  aes: add support of aes192 and aes256
  tegra20: crypto: update code to use new aes api
  pytest: aes: add test for aes192 and aes256

 arch/arm/mach-tegra/tegra20/crypto.c |  41 +++--
 cmd/aes.c|  40 +
 include/uboot_aes.h  |  39 
 lib/aes.c| 111 ++-
 test/py/tests/aes/key192.bin |   1 +
 test/py/tests/aes/key256.bin |   1 +
 test/py/tests/test_aes.py|  54 -
 7 files changed, 201 insertions(+), 86 deletions(-)
 create mode 100644 test/py/tests/aes/key192.bin
 create mode 100644 test/py/tests/aes/key256.bin

-- 
2.7.4

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[U-Boot] [PATCH 1/4] aes: add a define for the size of a block

[Philippe Reynes]

In the code, we use the size of the key for the
size of the block. It's true when the key is 128 bits,
but it become false for key of 192 bits and 256 bits.
So to prepare the support of aes192  and 256,
we introduce a constant for the iaes block size.

Signed-off-by: Philippe Reynes 
---
 cmd/aes.c   |  2 +-
 include/uboot_aes.h |  5 +++--
 lib/aes.c   | 34 +-
 3 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/cmd/aes.c b/cmd/aes.c
index 3db110c..d0a45fa 100644
--- a/cmd/aes.c
+++ b/cmd/aes.c
@@ -56,7 +56,7 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, char 
*const argv[])
aes_expand_key(key_ptr, key_exp);
 
/* Calculate the number of AES blocks to encrypt. */
-   aes_blocks = DIV_ROUND_UP(len, AES_KEY_LENGTH);
+   aes_blocks = DIV_ROUND_UP(len, AES_BLOCK_LENGTH);
 
if (enc)
aes_cbc_encrypt_blocks(key_exp, iv_ptr, src_ptr, dst_ptr,
diff --git a/include/uboot_aes.h b/include/uboot_aes.h
index 2fda384..1ae3ac9 100644
--- a/include/uboot_aes.h
+++ b/include/uboot_aes.h
@@ -18,7 +18,7 @@ typedef unsigned int u32;
  * AES encryption library, with small code size, supporting only 128-bit AES
  *
  * AES is a stream cipher which works a block at a time, with each block
- * in this case being AES_KEY_LENGTH bytes.
+ * in this case being AES_BLOCK_LENGTH bytes.
  */
 
 enum {
@@ -28,6 +28,7 @@ enum {
 
AES_KEY_LENGTH  = 128 / 8,
AES_EXPAND_KEY_LENGTH   = 4 * AES_STATECOLS * (AES_ROUNDS + 1),
+   AES_BLOCK_LENGTH= 128 / 8,
 };
 
 /**
@@ -62,7 +63,7 @@ void aes_decrypt(u8 *in, u8 *expkey, u8 *out);
 /**
  * Apply chain data to the destination using EOR
  *
- * Each array is of length AES_KEY_LENGTH.
+ * Each array is of length AES_BLOCK_LENGTH.
  *
  * @cbc_chain_data Chain data
  * @srcSource data
diff --git a/lib/aes.c b/lib/aes.c
index a12a192..cfa57b6 100644
--- a/lib/aes.c
+++ b/lib/aes.c
@@ -596,62 +596,62 @@ void aes_apply_cbc_chain_data(u8 *cbc_chain_data, u8 
*src, u8 *dst)
 {
int i;
 
-   for (i = 0; i < AES_KEY_LENGTH; i++)
+   for (i = 0; i < AES_BLOCK_LENGTH; i++)
*dst++ = *src++ ^ *cbc_chain_data++;
 }
 
 void aes_cbc_encrypt_blocks(u8 *key_exp, u8 *iv, u8 *src, u8 *dst,
u32 num_aes_blocks)
 {
-   u8 tmp_data[AES_KEY_LENGTH];
+   u8 tmp_data[AES_BLOCK_LENGTH];
u8 *cbc_chain_data = iv;
u32 i;
 
for (i = 0; i < num_aes_blocks; i++) {
debug("encrypt_object: block %d of %d\n", i, num_aes_blocks);
-   debug_print_vector("AES Src", AES_KEY_LENGTH, src);
+   debug_print_vector("AES Src", AES_BLOCK_LENGTH, src);
 
/* Apply the chain data */
aes_apply_cbc_chain_data(cbc_chain_data, src, tmp_data);
-   debug_print_vector("AES Xor", AES_KEY_LENGTH, tmp_data);
+   debug_print_vector("AES Xor", AES_BLOCK_LENGTH, tmp_data);
 
/* Encrypt the AES block */
aes_encrypt(tmp_data, key_exp, dst);
-   debug_print_vector("AES Dst", AES_KEY_LENGTH, dst);
+   debug_print_vector("AES Dst", AES_BLOCK_LENGTH, dst);
 
/* Update pointers for next loop. */
cbc_chain_data = dst;
-   src += AES_KEY_LENGTH;
-   dst += AES_KEY_LENGTH;
+   src += AES_BLOCK_LENGTH;
+   dst += AES_BLOCK_LENGTH;
}
 }
 
 void aes_cbc_decrypt_blocks(u8 *key_exp, u8 *iv, u8 *src, u8 *dst,
u32 num_aes_blocks)
 {
-   u8 tmp_data[AES_KEY_LENGTH], tmp_block[AES_KEY_LENGTH];
+   u8 tmp_data[AES_BLOCK_LENGTH], tmp_block[AES_BLOCK_LENGTH];
/* Convenient array of 0's for IV */
-   u8 cbc_chain_data[AES_KEY_LENGTH];
+   u8 cbc_chain_data[AES_BLOCK_LENGTH];
u32 i;
 
-   memcpy(cbc_chain_data, iv, AES_KEY_LENGTH);
+   memcpy(cbc_chain_data, iv, AES_BLOCK_LENGTH);
for (i = 0; i < num_aes_blocks; i++) {
debug("encrypt_object: block %d of %d\n", i, num_aes_blocks);
-   debug_print_vector("AES Src", AES_KEY_LENGTH, src);
+   debug_print_vector("AES Src", AES_BLOCK_LENGTH, src);
 
-   memcpy(tmp_block, src, AES_KEY_LENGTH);
+   memcpy(tmp_block, src, AES_BLOCK_LENGTH);
 
/* Decrypt the AES block */
aes_decrypt(src, key_exp, tmp_data);
-   debug_print_vector("AES Xor", AES_KEY_LENGTH, tmp_data);
+   debug_print_vector("AES Xor", AES_BLOCK_LENGTH, tmp_data);
 
/* Apply the chain data */
aes_apply_cbc_chain_data(cbc_chain_data, tmp_data, dst);
-   debug_print_vector("AES Dst", AES_KEY_LENGTH, dst);
+   debug_print_vector("AES Dst", AES_BLOCK_LENGTH, dst);
 
/* Update pointers for next loop. */
-   

[U-Boot] [PATCH V2 2/4] sandbox64: enable command aes

[Philippe Reynes]

This commit add the support of command aes.
Then, it may be used on pytest.

Signed-off-by: Philippe Reynes 
---
 configs/sandbox64_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index c177ff8..9332e34 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -59,6 +59,7 @@ CONFIG_CMD_QFW=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_AES=y
 CONFIG_CMD_TPM=y
 CONFIG_CMD_TPM_TEST=y
 CONFIG_CMD_BTRFS=y
-- 
2.7.4

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[U-Boot] [PATCH V2 4/4] pytest: add a new test for aes

[Philippe Reynes]

This commit add a simple test to check that
a text may be ciphered and unciphered. Each
step are checked with the known result.

Signed-off-by: Philippe Reynes 
---
 test/py/tests/aes/iv128.bin |  1 +
 test/py/tests/aes/key128.bin|  1 +
 test/py/tests/aes/plaintext.bin |  1 +
 test/py/tests/test_aes.py   | 48 +
 4 files changed, 51 insertions(+)
 create mode 100644 test/py/tests/aes/iv128.bin
 create mode 100644 test/py/tests/aes/key128.bin
 create mode 100644 test/py/tests/aes/plaintext.bin
 create mode 100644 test/py/tests/test_aes.py

diff --git a/test/py/tests/aes/iv128.bin b/test/py/tests/aes/iv128.bin
new file mode 100644
index 000..b7b5d5d
--- /dev/null
+++ b/test/py/tests/aes/iv128.bin
@@ -0,0 +1 @@
+�!�/���a�P���r
\ No newline at end of file
diff --git a/test/py/tests/aes/key128.bin b/test/py/tests/aes/key128.bin
new file mode 100644
index 000..9e3ce60
--- /dev/null
+++ b/test/py/tests/aes/key128.bin
@@ -0,0 +1 @@
+����Ć皳���6}
\ No newline at end of file
diff --git a/test/py/tests/aes/plaintext.bin b/test/py/tests/aes/plaintext.bin
new file mode 100644
index 000..8598fd9
--- /dev/null
+++ b/test/py/tests/aes/plaintext.bin
@@ -0,0 +1 @@
+AES128 is working, amazing !
\ No newline at end of file
diff --git a/test/py/tests/test_aes.py b/test/py/tests/test_aes.py
new file mode 100644
index 000..408bd77
--- /dev/null
+++ b/test/py/tests/test_aes.py
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2019, Softathome
+
+# Test U-Boot's "aes" command.
+
+import pytest
+
+def test_aes(u_boot_console):
+"""
+Test the aes command, and validate that it can
+cipher and uncipher a simple text
+"""
+
+cons = u_boot_console
+tmpdir = cons.config.result_dir + '/'
+datadir = cons.config.source_dir + '/test/py/tests/aes/'
+
+# Check that the option cmd_aes is enabled in the config
+if cons.config.buildconfig.get('config_cmd_aes', 'n') != 'y':
+pytest.skip('aes command not supported')
+
+# Send a command with no argument ...
+output = cons.run_command('aes')
+assert('AES 128 CBC encryption' in ''.join(output))
+
+# Load file from host
+output = cons.run_command('host load hostfs - 1000 %skey128.bin' % datadir)
+assert('16 bytes read' in ''.join(output))
+output = cons.run_command('host load hostfs - 2000 %siv128.bin' % datadir)
+assert('16 bytes read' in ''.join(output))
+output = cons.run_command('host load hostfs - 3000 %splaintext.bin' % 
datadir)
+assert('32 bytes read' in ''.join(output))
+
+output = cons.run_command('md.b 3000 0x20')
+
+output = cons.run_command('aes enc 1000 2000 3000 4000 0x20')
+
+output = cons.run_command('cmp.b 3000 4000 0x20')
+assert('Total of 0 byte(s) were the same' in ''.join(output))
+
+output = cons.run_command('md.b 4000 0x20')
+
+output = cons.run_command('aes dec 1000 2000 4000 5000 0x20')
+
+output = cons.run_command('md.b 5000 0x20')
+
+output = cons.run_command('cmp.b 3000 5000 0x20')
+assert('Total of 32 byte(s) were the same' in ''.join(output))
-- 
2.7.4

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[U-Boot] [PATCH V2 3/4] cmd: aes: use map_sysmem when accessing memory

[Philippe Reynes]

The aes command used to segfault when accessing memory in sandbox.
The pointer accesses should be mapped.

Signed-off-by: Philippe Reynes 
---
 cmd/aes.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/cmd/aes.c b/cmd/aes.c
index 7ff4a71..3db110c 100644
--- a/cmd/aes.c
+++ b/cmd/aes.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /**
  * do_aes() - Handle the "aes" command-line command
@@ -46,10 +47,10 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[])
dst_addr = simple_strtoul(argv[5], NULL, 16);
len = simple_strtoul(argv[6], NULL, 16);
 
-   key_ptr = (uint8_t *)key_addr;
-   iv_ptr = (uint8_t *)iv_addr;
-   src_ptr = (uint8_t *)src_addr;
-   dst_ptr = (uint8_t *)dst_addr;
+   key_ptr = (uint8_t *)map_sysmem(key_addr, 128 / 8);
+   iv_ptr = (uint8_t *)map_sysmem(iv_addr, 128 / 8);
+   src_ptr = (uint8_t *)map_sysmem(src_addr, len);
+   dst_ptr = (uint8_t *)map_sysmem(dst_addr, len);
 
/* First we expand the key. */
aes_expand_key(key_ptr, key_exp);
-- 
2.7.4

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[U-Boot] [PATCH V2 1/4] sandbox: enable command aes

[Philippe Reynes]

This commit enable the command aes on sandbox.
Then, it may be used on pytest.

Signed-off-by: Philippe Reynes 
---
 configs/sandbox_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 968ffda..d5872dd 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -67,6 +67,7 @@ CONFIG_CMD_QFW=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_AES=y
 CONFIG_CMD_TPM=y
 CONFIG_CMD_TPM_TEST=y
 CONFIG_CMD_BTRFS=y
-- 
2.7.4

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[U-Boot] [PATCH V2 0/4] pytest: add a simple test to check the command aes

[Philippe Reynes]

This serie fix the command aes on sandbox and add a simple pytest for aes.

The first and second patch enable the command aes on sandbox and sandbox64.
Thr third patch fix the command aes on sandbox (adding map_sysmem to avoid
a segfault), the forth patch add a simple pytest for the command aes.

Philippe Reynes (4):
  sandbox: enable command aes
  sandbox64: enable command aes
  cmd: aes: use map_sysmem when accessing memory
  pytest: add a new test for aes

Changelog:
v2:
- add binary file (key128.bin, iv128.bin and plaintext.bin)

 cmd/aes.c   |  9 
 configs/sandbox64_defconfig |  1 +
 configs/sandbox_defconfig   |  1 +
 test/py/tests/aes/iv128.bin |  1 +
 test/py/tests/aes/key128.bin|  1 +
 test/py/tests/aes/plaintext.bin |  1 +
 test/py/tests/test_aes.py   | 48 +
 7 files changed, 58 insertions(+), 4 deletions(-)
 create mode 100644 test/py/tests/aes/iv128.bin
 create mode 100644 test/py/tests/aes/key128.bin
 create mode 100644 test/py/tests/aes/plaintext.bin
 create mode 100644 test/py/tests/test_aes.py

-- 
2.7.4

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[U-Boot] [ANN] U-Boot v2019.10-rc4 released

[Tom Rini]

Hey all,

So, I had said I would do -rc4 on September 9th and -rc5 on September
23rd, and now it's the 23rd and I'm doing -rc4.  Why?  My reminder for
-rc4 got lost in the shuffle that day and I didn't remember about it
until close to -rc5 time.  My fault, oops.

At this point, I'd really like to see pull requests that are fixing bugs
or regressions.

I've also today clarified on the
http://www.denx.de/wiki/U-Boot/CustodianGitTrees page that the "next"
branch is expected to be rebased.  Why?  While I'm not sure if I want to
apply things directly to the next branch and then give them some sort of
automated testing, I do want to try and give changes some sort of build
testing and similar sooner than I have, and that was at least a related
problem.

In terms of a changelog, 
git log --merges v2019.10-rc2..v2019.10-rc3
and again, please make sure to use a tag with a changelog for your pull
request or at least a changelog of sorts in the email itself.

The v2019.10 release is currently scheduled for October 7th.  Thanks all!

-- 
Tom


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[U-Boot] [PATCH] imx: mx6ul_14x14_evk: fix link issue

[Anatolij Gustschin]

Since recent splash changes common code for splashscreen logo
should be used instead of adding duplicated code under board
directories. mx6ul_9x9_evk and mx6ul_14x14_evk configurations
used old board specific logo code and do not link, fix them.

Signed-off-by: Anatolij Gustschin 
---
 .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 19 ++-
 configs/mx6ul_14x14_evk_defconfig |  1 +
 configs/mx6ul_9x9_evk_defconfig   |  1 +
 include/configs/mx6ul_14x14_evk.h |  1 +
 4 files changed, 5 insertions(+), 17 deletions(-)

diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c 
b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 8e5f365d35..c98e98b485 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -28,10 +28,6 @@
 #include "../common/pfuze.h"
 #include 
 #include 
-#ifdef CONFIG_DM_VIDEO
-#include 
-#include 
-#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -449,6 +445,8 @@ static int setup_lcd(void)
 
return 0;
 }
+#else
+static inline int setup_lcd(void) { return 0; }
 #endif
 
 int board_early_init_f(void)
@@ -505,21 +503,8 @@ int board_late_init(void)
env_set("board_rev", "14X14");
 #endif
 
-#if defined(CONFIG_DM_VIDEO)
-   struct udevice *dev;
-   int ret;
-
-   ret = uclass_get_device(UCLASS_VIDEO, 0, );
-   if (ret)
-   return ret;
-
setup_lcd();
 
-   ret = video_bmp_display(dev, (ulong)bmp_logo_bitmap, 0, 0, true);
-   if (ret)
-   return ret;
-#endif
-
return 0;
 }
 
diff --git a/configs/mx6ul_14x14_evk_defconfig 
b/configs/mx6ul_14x14_evk_defconfig
index 526ede34e9..429dff0d35 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -68,3 +68,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index 95c6697e62..4b517436c8 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -71,3 +71,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/include/configs/mx6ul_14x14_evk.h 
b/include/configs/mx6ul_14x14_evk.h
index f8a5fd30f3..87f88693c5 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -60,6 +60,7 @@
"fdt_addr=0x8300\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
+   "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \

"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0"
 \
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
-- 
2.17.1

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Re: [U-Boot] [PATCH] nxp: fix NXP copyright

[Tom Rini]

On Mon, Sep 23, 2019 at 12:07:20PM +0800, Biwen Li wrote:

> Fix NXP copyright for NXP related code.
> 
> Signed-off-by: Biwen Li 
> ---
>  arch/arm/dts/fsl-ls1088a.dtsi   | 2 +-
>  arch/arm/dts/fsl-ls2080a-qds.dts| 1 +
>  arch/arm/dts/fsl-ls2080a.dtsi   | 1 +

These should come in via the next sync from the Linux Kernel, and not by
themselves.

>  board/freescale/common/emc2305.c| 2 +-
>  board/freescale/common/qixis.c  | 2 ++
>  board/freescale/common/sys_eeprom.c | 2 ++
>  board/freescale/common/vid.c| 1 +
>  board/freescale/ls2080aqds/eth.c| 1 +
>  board/freescale/ls2080aqds/ls2080aqds.c | 1 +
>  drivers/ddr/fsl/main.c  | 1 +

As the last change here was this year, the change is not wrong but I
strongly prefer these to be done as part of regular changes.  As, for
example,  drivers/ddr/fsl/main.c doesn't have 2015 nor 2016 listed but
do have changes from Freescale, then NXP, in those years.  And I do not
want the follow-up here to be a patch or series of patches adding older
copyright years.

-- 
Tom


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Re: [U-Boot] rk3288 (Tinkerboard) not booting【请注意，邮件由u-boot-boun...@lists.denx.de代发】

[Alexander von Gluck IV]

ACK! I'm on UART1. Mix that with video potentially not working
in u-boot and I think I have my answer.

I'll test this afternoon.

(PS, since the Tinker is supposed to be "Raspberry Pi like", why would
u-boot present on UART2 on it while the Raspberry Pi u-boot uses UART1?)


Thanks for the help!

 -- Alex


September 23, 2019 9:19 AM, "Jonathan Gray"  wrote:

> On Mon, Sep 23, 2019 at 01:55:32PM +, Alexander von Gluck IV wrote:
> 
>> Oh, a difference:
>> 
>> $ tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader.img && \
>> cat spl/u-boot-spl-dtb.bin >> idbloader.img
>> 
>> I'm using the idbloader.img that u-boot automatically spits out.
>> 
>> $ tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader-manual.img
>> Image Type: Rockchip RK32 (SD/MMC) boot image
>> Data Size: 20480 bytes
>> $ cat spl/u-boot-spl-dtb.bin >> idbloader-manual.img
>> 
>> However.. the generated idbloader-manual.img from the commands above is 
>> identical to idbloader.img
>> that u-boot produces compared with md5sum.
>> 
>> Are you writing the following?
>> 
>> sudo dd if=idbloader.img of=/dev/sdd seek=64
>> sudo dd if=u-boot-dtb.img of=/dev/sdd seek=16384
> 
> those files/offsets yes
> 
>> (where /dev/sdd is a MicroSD card)
>> 
>> These should be enough to get into u-boot at startup... correct?
> 
> yes
> 
> I am using uart2
> https://www.asus.com/us/Single-Board-Computer/Tinker-Board
> 32 UART2TX_PWM3
> 33 UART2RX_PWM2
> and 30 for ground
> 
>> I'm not missing some requirement of u-boot.bin on a FAT32 partition or 
>> something?
> 
> the tpl/spl and u-boot proper are at raw offsets in this case
> 
>> -- Alex
>> 
>> September 23, 2019 8:31 AM, "Jonathan Gray"  wrote:
>> 
>> On Mon, Sep 23, 2019 at 01:06:35PM +, Alexander von Gluck IV wrote:
>> 
>> Ok, looking for differences now..
>> 
>> * Older Tinker Board? (I'm not using the Tinker Board S)
>> 
>> yes, the original one
>> 
>> * Same steps?
>> 
>> along the lines of
>> 
>> gmake CROSS_COMPILE="arm-none-eabi-" tinker-rk3288_defconfig
>> gmake CROSS_COMPILE="arm-none-eabi-" all
>> tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader.img && \
>> cat spl/u-boot-spl-dtb.bin >> idbloader.img
>> 
>> * Same config? tinker-rk3288_defconfig?
>> 
>> yes
>> 
>> * Uart 115200?
>> 
>> yes
>> 
>> * Any HDMI Video output?
>> 
>> no hdmi connected only serial
>> 
>> * GCC version?
>> 
>> gcc-linaro-6.3.2017.02 binutils 2.27 arm-none-eabi target
>> 
>> September 23, 2019 12:34 AM, "Jonathan Gray"  wrote:
>> 
>> On Mon, Sep 23, 2019 at 01:17:40AM +, Alexander von Gluck IV wrote:
>> 
>> Hello!
>> 
>> There is no uart output and no video with u-boot master.
>> The board works as expected booting the Asus Armbian image on an SD.
>> 
>> At this point i'd be happy to get some u-boot uart output :-)
>> 
>> -- Alex
>> 
>> uart output works here with the latest master
>> (780a17e814503f71d1b51d578b32bc9c89933183)
>> 
>> U-Boot TPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20)
>> Trying to boot from BOOTROM
>> Returning to boot ROM...
>> 
>> U-Boot SPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
>> Trying to boot from MMC1
>> 
>> U-Boot 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
>> 
>> Model: Tinker-RK3288
>> DRAM: 2 GiB
>> MMC: dwmmc@ff0c: 1
>> Loading Environment from MMC... *** Warning - bad CRC, using default 
>> environment
>> 
>> In: serial
>> Out: serial
>> Err: serial
>> Model: Tinker-RK3288
>> rockchip_dnl_key_pressed: adc_channel_single_shot fail!
>> Net: eth0: ethernet@ff29
>> Hit any key to stop autoboot: 0
>> switch to partitions #0, OK
>> mmc1 is current device
>> Scanning mmc 1:1...
>> Found EFI removable media binary efi/boot/bootarm.efi
>> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
>> Scanning disk dw...@ff0c.blk...
>> Found 3 disks
>> BootOrder not defined
>> EFI boot manager: Cannot load any image
>> 88176 bytes read in 9 ms (9.3 MiB/s)
>> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
>> OpenBSD/armv7 BOOTARM 1.6
>> 
>> boot>
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Re: [U-Boot] rk3288 (Tinkerboard) not booting【请注意，邮件由u-boot-boun...@lists.denx.de代发】

[Jonathan Gray]

On Mon, Sep 23, 2019 at 01:55:32PM +, Alexander von Gluck IV wrote:
> Oh, a difference:
> 
> $ tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader.img && \
> cat spl/u-boot-spl-dtb.bin >> idbloader.img
> 
> I'm using the idbloader.img that u-boot automatically spits out.
> 
> $ tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader-manual.img
> Image Type:   Rockchip RK32 (SD/MMC) boot image
> Data Size:20480 bytes
> $ cat spl/u-boot-spl-dtb.bin >> idbloader-manual.img
> 
> However.. the generated idbloader-manual.img from the commands above is 
> identical to idbloader.img
> that u-boot produces compared with md5sum.
> 
> 
> Are you writing the following?
> 
>   sudo dd if=idbloader.img of=/dev/sdd seek=64
>   sudo dd if=u-boot-dtb.img of=/dev/sdd seek=16384

those files/offsets yes

> 
> (where /dev/sdd is a MicroSD card)
> 
> These should be enough to get into u-boot at startup... correct?

yes

I am using uart2
https://www.asus.com/us/Single-Board-Computer/Tinker-Board/
32 UART2TX_PWM3
33 UART2RX_PWM2
and 30 for ground

> 
> I'm not missing some requirement of u-boot.bin on a FAT32 partition or 
> something?

the tpl/spl and u-boot proper are at raw offsets in this case

> 
>  -- Alex
> 
> September 23, 2019 8:31 AM, "Jonathan Gray"  wrote:
> 
> > On Mon, Sep 23, 2019 at 01:06:35PM +, Alexander von Gluck IV wrote:
> > 
> >> Ok, looking for differences now..
> >> 
> >> * Older Tinker Board? (I'm not using the Tinker Board S)
> > 
> > yes, the original one
> > 
> >> * Same steps?
> > 
> > along the lines of
> > 
> > gmake CROSS_COMPILE="arm-none-eabi-" tinker-rk3288_defconfig
> > gmake CROSS_COMPILE="arm-none-eabi-" all
> > tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader.img && \
> > cat spl/u-boot-spl-dtb.bin >> idbloader.img
> > 
> >> * Same config? tinker-rk3288_defconfig?
> > 
> > yes
> > 
> >> * Uart 115200?
> > 
> > yes
> > 
> >> * Any HDMI Video output?
> > 
> > no hdmi connected only serial
> > 
> >> * GCC version?
> > 
> > gcc-linaro-6.3.2017.02 binutils 2.27 arm-none-eabi target
> > 
> >> September 23, 2019 12:34 AM, "Jonathan Gray"  wrote:
> >> 
> >> On Mon, Sep 23, 2019 at 01:17:40AM +, Alexander von Gluck IV wrote:
> >> 
> >> Hello!
> >> 
> >> There is no uart output and no video with u-boot master.
> >> The board works as expected booting the Asus Armbian image on an SD.
> >> 
> >> At this point i'd be happy to get some u-boot uart output :-)
> >> 
> >> -- Alex
> >> 
> >> uart output works here with the latest master
> >> (780a17e814503f71d1b51d578b32bc9c89933183)
> >> 
> >> U-Boot TPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20)
> >> Trying to boot from BOOTROM
> >> Returning to boot ROM...
> >> 
> >> U-Boot SPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
> >> Trying to boot from MMC1
> >> 
> >> U-Boot 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
> >> 
> >> Model: Tinker-RK3288
> >> DRAM: 2 GiB
> >> MMC: dwmmc@ff0c: 1
> >> Loading Environment from MMC... *** Warning - bad CRC, using default 
> >> environment
> >> 
> >> In: serial
> >> Out: serial
> >> Err: serial
> >> Model: Tinker-RK3288
> >> rockchip_dnl_key_pressed: adc_channel_single_shot fail!
> >> Net: eth0: ethernet@ff29
> >> Hit any key to stop autoboot: 0
> >> switch to partitions #0, OK
> >> mmc1 is current device
> >> Scanning mmc 1:1...
> >> Found EFI removable media binary efi/boot/bootarm.efi
> >> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
> >> Scanning disk dw...@ff0c.blk...
> >> Found 3 disks
> >> BootOrder not defined
> >> EFI boot manager: Cannot load any image
> >> 88176 bytes read in 9 ms (9.3 MiB/s)
> >> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
> >> OpenBSD/armv7 BOOTARM 1.6
> >> 
> >> boot>
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Re: [U-Boot] rk3288 (Tinkerboard) not booting【请注意，邮件由u-boot-boun...@lists.denx.de代发】

[Alexander von Gluck IV]

Oh, a difference:

$ tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader.img && \
cat spl/u-boot-spl-dtb.bin >> idbloader.img

I'm using the idbloader.img that u-boot automatically spits out.

$ tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader-manual.img
Image Type:   Rockchip RK32 (SD/MMC) boot image
Data Size:20480 bytes
$ cat spl/u-boot-spl-dtb.bin >> idbloader-manual.img

However.. the generated idbloader-manual.img from the commands above is 
identical to idbloader.img
that u-boot produces compared with md5sum.


Are you writing the following?

  sudo dd if=idbloader.img of=/dev/sdd seek=64
  sudo dd if=u-boot-dtb.img of=/dev/sdd seek=16384

(where /dev/sdd is a MicroSD card)

These should be enough to get into u-boot at startup... correct?

I'm not missing some requirement of u-boot.bin on a FAT32 partition or 
something?

 -- Alex

September 23, 2019 8:31 AM, "Jonathan Gray"  wrote:

> On Mon, Sep 23, 2019 at 01:06:35PM +, Alexander von Gluck IV wrote:
> 
>> Ok, looking for differences now..
>> 
>> * Older Tinker Board? (I'm not using the Tinker Board S)
> 
> yes, the original one
> 
>> * Same steps?
> 
> along the lines of
> 
> gmake CROSS_COMPILE="arm-none-eabi-" tinker-rk3288_defconfig
> gmake CROSS_COMPILE="arm-none-eabi-" all
> tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader.img && \
> cat spl/u-boot-spl-dtb.bin >> idbloader.img
> 
>> * Same config? tinker-rk3288_defconfig?
> 
> yes
> 
>> * Uart 115200?
> 
> yes
> 
>> * Any HDMI Video output?
> 
> no hdmi connected only serial
> 
>> * GCC version?
> 
> gcc-linaro-6.3.2017.02 binutils 2.27 arm-none-eabi target
> 
>> September 23, 2019 12:34 AM, "Jonathan Gray"  wrote:
>> 
>> On Mon, Sep 23, 2019 at 01:17:40AM +, Alexander von Gluck IV wrote:
>> 
>> Hello!
>> 
>> There is no uart output and no video with u-boot master.
>> The board works as expected booting the Asus Armbian image on an SD.
>> 
>> At this point i'd be happy to get some u-boot uart output :-)
>> 
>> -- Alex
>> 
>> uart output works here with the latest master
>> (780a17e814503f71d1b51d578b32bc9c89933183)
>> 
>> U-Boot TPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20)
>> Trying to boot from BOOTROM
>> Returning to boot ROM...
>> 
>> U-Boot SPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
>> Trying to boot from MMC1
>> 
>> U-Boot 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
>> 
>> Model: Tinker-RK3288
>> DRAM: 2 GiB
>> MMC: dwmmc@ff0c: 1
>> Loading Environment from MMC... *** Warning - bad CRC, using default 
>> environment
>> 
>> In: serial
>> Out: serial
>> Err: serial
>> Model: Tinker-RK3288
>> rockchip_dnl_key_pressed: adc_channel_single_shot fail!
>> Net: eth0: ethernet@ff29
>> Hit any key to stop autoboot: 0
>> switch to partitions #0, OK
>> mmc1 is current device
>> Scanning mmc 1:1...
>> Found EFI removable media binary efi/boot/bootarm.efi
>> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
>> Scanning disk dw...@ff0c.blk...
>> Found 3 disks
>> BootOrder not defined
>> EFI boot manager: Cannot load any image
>> 88176 bytes read in 9 ms (9.3 MiB/s)
>> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
>> OpenBSD/armv7 BOOTARM 1.6
>> 
>> boot>
>> ___
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>> U-Boot@lists.denx.de
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Re: [U-Boot] rk3288 (Tinkerboard) not booting【请注意，邮件由u-boot-boun...@lists.denx.de代发】

[Jonathan Gray]

On Mon, Sep 23, 2019 at 01:06:35PM +, Alexander von Gluck IV wrote:
> Ok, looking for differences now..
> 
> * Older Tinker Board?  (I'm not using the Tinker Board S)

yes, the original one

> * Same steps?

along the lines of

gmake CROSS_COMPILE="arm-none-eabi-" tinker-rk3288_defconfig
gmake CROSS_COMPILE="arm-none-eabi-" all
tools/mkimage -n rk3288 -T rksd -d tpl/u-boot-tpl.bin idbloader.img && \
cat spl/u-boot-spl-dtb.bin >> idbloader.img

> * Same config?  tinker-rk3288_defconfig?

yes

> * Uart 115200?

yes

> * Any HDMI Video output?

no hdmi connected only serial

> * GCC version?

gcc-linaro-6.3.2017.02 binutils 2.27 arm-none-eabi target

> 
> September 23, 2019 12:34 AM, "Jonathan Gray"  wrote:
> 
> > On Mon, Sep 23, 2019 at 01:17:40AM +, Alexander von Gluck IV wrote:
> > 
> >> Hello!
> >> 
> >> There is no uart output and no video with u-boot master.
> >> The board works as expected booting the Asus Armbian image on an SD.
> >> 
> >> At this point i'd be happy to get some u-boot uart output :-)
> >> 
> >> -- Alex
> > 
> > uart output works here with the latest master
> > (780a17e814503f71d1b51d578b32bc9c89933183)
> > 
> > U-Boot TPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20)
> > Trying to boot from BOOTROM
> > Returning to boot ROM...
> > 
> > U-Boot SPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
> > Trying to boot from MMC1
> > 
> > U-Boot 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
> > 
> > Model: Tinker-RK3288
> > DRAM: 2 GiB
> > MMC: dwmmc@ff0c: 1
> > Loading Environment from MMC... *** Warning - bad CRC, using default 
> > environment
> > 
> > In: serial
> > Out: serial
> > Err: serial
> > Model: Tinker-RK3288
> > rockchip_dnl_key_pressed: adc_channel_single_shot fail!
> > Net: eth0: ethernet@ff29
> > Hit any key to stop autoboot: 0
> > switch to partitions #0, OK
> > mmc1 is current device
> > Scanning mmc 1:1...
> > Found EFI removable media binary efi/boot/bootarm.efi
> > libfdt fdt_check_header(): FDT_ERR_BADMAGIC
> > Scanning disk dw...@ff0c.blk...
> > Found 3 disks
> > BootOrder not defined
> > EFI boot manager: Cannot load any image
> > 88176 bytes read in 9 ms (9.3 MiB/s)
> > libfdt fdt_check_header(): FDT_ERR_BADMAGIC
> >>> OpenBSD/armv7 BOOTARM 1.6
> > 
> > boot>
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Re: [U-Boot] rk3288 (Tinkerboard) not booting【请注意，邮件由u-boot-boun...@lists.denx.de代发】

[Alexander von Gluck IV]

Ok, looking for differences now..

* Older Tinker Board?  (I'm not using the Tinker Board S)
* Same steps?
* Same config?  tinker-rk3288_defconfig?
* Uart 115200?
* Any HDMI Video output?
* GCC version?

September 23, 2019 12:34 AM, "Jonathan Gray"  wrote:

> On Mon, Sep 23, 2019 at 01:17:40AM +, Alexander von Gluck IV wrote:
> 
>> Hello!
>> 
>> There is no uart output and no video with u-boot master.
>> The board works as expected booting the Asus Armbian image on an SD.
>> 
>> At this point i'd be happy to get some u-boot uart output :-)
>> 
>> -- Alex
> 
> uart output works here with the latest master
> (780a17e814503f71d1b51d578b32bc9c89933183)
> 
> U-Boot TPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20)
> Trying to boot from BOOTROM
> Returning to boot ROM...
> 
> U-Boot SPL 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
> Trying to boot from MMC1
> 
> U-Boot 2019.10-rc3-00401-ge23a6e5c43 (Sep 23 2019 - 15:13:20 +1000)
> 
> Model: Tinker-RK3288
> DRAM: 2 GiB
> MMC: dwmmc@ff0c: 1
> Loading Environment from MMC... *** Warning - bad CRC, using default 
> environment
> 
> In: serial
> Out: serial
> Err: serial
> Model: Tinker-RK3288
> rockchip_dnl_key_pressed: adc_channel_single_shot fail!
> Net: eth0: ethernet@ff29
> Hit any key to stop autoboot: 0
> switch to partitions #0, OK
> mmc1 is current device
> Scanning mmc 1:1...
> Found EFI removable media binary efi/boot/bootarm.efi
> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
> Scanning disk dw...@ff0c.blk...
> Found 3 disks
> BootOrder not defined
> EFI boot manager: Cannot load any image
> 88176 bytes read in 9 ms (9.3 MiB/s)
> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
>>> OpenBSD/armv7 BOOTARM 1.6
> 
> boot>
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Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx u-boot-imx-20190923

[Joris Offouga]

Hi Tom and Stefano

I send patch series for fix build for pico-imx7d

Best regards,

Joris Offouga

Le 23/09/2019 à 14:51, Tom Rini a écrit :

On Mon, Sep 23, 2019 at 11:05:31AM +0200, Stefano Babic wrote:


Hi Tom,

please pull from u-boot-imx, thanks !

The following changes since commit 87d5b225585f341ea8e926a2c26fb72585fc9d0c:

   MAINTAINERS: Change fsl-qoriq, mpc86xx, mpc85xx maintainers
(2019-09-13 10:14:45 -0400)

are available in the Git repository at:

   https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
tags/u-boot-imx-20190923

for you to fetch changes up to 322a967cdf470640cb8cb6b68b6721e63b8c3104:

   Merge branch 'for-imx' of https://github.com/OSSystems/u-boot
(2019-09-22 15:19:49 +0200)


Sorry, with the video PR from last night now pico-imx7d_bl33
pico-hobbit-imx7d pico-nymph-imx7d mx6ul_9x9_evk pico-imx7d
mx6ul_14x14_evk pico-dwarf-imx7d pico-pi-imx7d fail to link.

Also, at this point in the release cycle are all of these changes still
things we really want to bring in?  Thanks!


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[U-Boot] [PATCH V2 2/2] pico-imx7d: Remove dead code for dm_video

[Joris Offouga]

Since convert dm_video, unused code introduced, so remove this

Signed-off-by: Joris Offouga 
Reviewed-by: Otavio Salvador 
---
 Changes v2:
 Add missing remove port and imx_iomux_v3_setup_multiple_pads
 Add Reviewed-by 
 
 arch/arm/dts/imx7d-pico-u-boot.dtsi  | 37 
 board/technexion/pico-imx7d/pico-imx7d.c | 12 
 2 files changed, 49 deletions(-)

diff --git a/arch/arm/dts/imx7d-pico-u-boot.dtsi 
b/arch/arm/dts/imx7d-pico-u-boot.dtsi
index ef19de2b30..7307fbaf68 100644
--- a/arch/arm/dts/imx7d-pico-u-boot.dtsi
+++ b/arch/arm/dts/imx7d-pico-u-boot.dtsi
@@ -4,37 +4,6 @@
 usb0 = 
 display0 = 
 };
-
-   backlight: backlight {
-   compatible = "pwm-backlight";
-   pinctrl-names = "default";
-   pinctrl-0 = <_backlight>;
-   pwms = < 0 5 0>;
-   brightness-levels = <0 36 72 108 144 180 216 255>;
-   default-brightness-level = <6>;
-   status = "okay";
-   };
-
-   reg_lcd_3v3: regulator-lcd-3v3 {
-   compatible = "regulator-fixed";
-   regulator-name = "lcd-3v3";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   gpio = < 6 GPIO_ACTIVE_HIGH>;
-   enable-active-high;
-   };
-
-   panel {
-   compatible = "vxt,vl050-8048nt-c01";
-   backlight = <>;
-   power-supply = <_lcd_3v3>;
-
-   port {
-   panel_in: endpoint {
-   remote-endpoint = <_out>;
-   };
-   };
-   };
 };
 
  {
@@ -48,12 +17,6 @@
display = <>;
u-boot,dm-pre-reloc;
 
-   port {
-   display_out: endpoint {
-   remote-endpoint = <_in>;
-   };
-   };
-
display0: display {
bits-per-pixel = <16>;
bus-width = <24>;
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c 
b/board/technexion/pico-imx7d/pico-imx7d.c
index 32b04b8fd6..bfa3c3c87f 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -33,13 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define I2C_PAD_CTRL(PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
 
-
-#define LCD_PAD_CTRL(PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \
-PAD_CTL_DSE_3P3V_49OHM)
-
-#define LCD_SYNC_PAD_CTRL(PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \
- PAD_CTL_DSE_3P3V_196OHM)
-
 #ifdef CONFIG_SYS_I2C_MXC
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 
@@ -224,13 +217,8 @@ int board_early_init_f(void)
 }
 
 #ifdef CONFIG_DM_VIDEO
-static iomux_v3_cfg_t const lcd_pads[] = {
-   MX7D_PAD_GPIO1_IO11__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
 void setup_lcd(void)
 {
-   imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
gpio_request(IMX_GPIO_NR(1, 11), "lcd_brightness");
gpio_request(IMX_GPIO_NR(1, 6), "lcd_enable");
/* Set Brightness to high */
-- 
2.20.1

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[U-Boot] [PATCH V2 1/2] pico-imx7d: fix splash logo drawing

[Joris Offouga]

Signed-off-by: Joris Offouga 
Reviewed-by: Otavio Salvador 
---
 Changes v2:
 Add Reviewed by
 
 board/technexion/pico-imx7d/pico-imx7d.c | 13 -
 configs/pico-dwarf-imx7d_defconfig   |  2 ++
 configs/pico-hobbit-imx7d_defconfig  |  2 ++
 configs/pico-imx7d_bl33_defconfig|  2 ++
 configs/pico-imx7d_defconfig |  2 ++
 configs/pico-nymph-imx7d_defconfig   |  2 ++
 configs/pico-pi-imx7d_defconfig  |  2 ++
 include/configs/pico-imx7d.h |  1 +
 8 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/board/technexion/pico-imx7d/pico-imx7d.c 
b/board/technexion/pico-imx7d/pico-imx7d.c
index 916220516e..32b04b8fd6 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -19,10 +19,6 @@
 #include 
 #include 
 #include "../../freescale/common/pfuze.h"
-#ifdef CONFIG_DM_VIDEO
-#include 
-#include 
-#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -250,18 +246,9 @@ int board_init(void)
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
 #ifdef CONFIG_DM_VIDEO
-   struct udevice *dev;
-   int ret;
-
-   ret = uclass_get_device(UCLASS_VIDEO, 0, );
-   if (ret)
-   return ret;
 
setup_lcd();
 
-   ret = video_bmp_display(dev, (ulong)bmp_logo_bitmap, 0, 0, true);
-   if (ret)
-   return ret;
 #endif
 #ifdef CONFIG_FEC_MXC
setup_fec();
diff --git a/configs/pico-dwarf-imx7d_defconfig 
b/configs/pico-dwarf-imx7d_defconfig
index 97de873e7c..5ddf8d9001 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-hobbit-imx7d_defconfig 
b/configs/pico-hobbit-imx7d_defconfig
index f3ed298087..8628ba4275 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-imx7d_bl33_defconfig 
b/configs/pico-imx7d_bl33_defconfig
index ba347d2507..d7752446cd 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -20,6 +20,7 @@ CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_WRITE_SIZE=0x2
@@ -63,4 +64,5 @@ CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index bad34555fa..56c64e2604 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-nymph-imx7d_defconfig 
b/configs/pico-nymph-imx7d_defconfig
index 97de873e7c..5ddf8d9001 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index c44bc778ca..f9069d9b08 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ b/configs/pico-pi-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 956c383a31..5c4b90a8a1 100644
--- 

Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx u-boot-imx-20190923

[Tom Rini]

On Mon, Sep 23, 2019 at 11:05:31AM +0200, Stefano Babic wrote:

> Hi Tom,
> 
> please pull from u-boot-imx, thanks !
> 
> The following changes since commit 87d5b225585f341ea8e926a2c26fb72585fc9d0c:
> 
>   MAINTAINERS: Change fsl-qoriq, mpc86xx, mpc85xx maintainers
> (2019-09-13 10:14:45 -0400)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
> tags/u-boot-imx-20190923
> 
> for you to fetch changes up to 322a967cdf470640cb8cb6b68b6721e63b8c3104:
> 
>   Merge branch 'for-imx' of https://github.com/OSSystems/u-boot
> (2019-09-22 15:19:49 +0200)
> 

Sorry, with the video PR from last night now pico-imx7d_bl33
pico-hobbit-imx7d pico-nymph-imx7d mx6ul_9x9_evk pico-imx7d
mx6ul_14x14_evk pico-dwarf-imx7d pico-pi-imx7d fail to link.

Also, at this point in the release cycle are all of these changes still
things we really want to bring in?  Thanks!

-- 
Tom


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Re: [U-Boot] ROCK64 fails to boot using U-Boot TPL

[Simon South]

On 2019-09-19 4:56 a.m., Simon South wrote:
I've been unable so far to boot NetBSD on my PINE64 ROCK64 (v2.0, 
Rockchip RK3328) using U-Boot built with its own TPL...
This definitely seems memory-related: After enabling the "mtest" command 
(patch attached) and running the memory test at the U-Boot shell I see 
all kinds of errors:


Testing 0200 ... 03ff:
Iteration:  1
FAILURE (read/write) @ 0x020014c0: expected 0x0299, actual 
0x0219)


FAILURE (read/write) @ 0x02001580: expected 0x02b1, actual 
0x0231)


FAILURE (read/write) @ 0x02001680: expected 0x02d1, actual 
0x0251)


FAILURE (read/write) @ 0x02001e40: expected 0x03c9, actual 
0x0349)

...

Using the Rockchip TPL instead the memory test runs fine.

Is anyone else able to reproduce this?

My guess is the supplied configuration parameters (in 
arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi) for the RK3328's SDRAM 
controller aren't a match for the SpecTek LPDDR3 module on the 4GB 
ROCK64. (The Rockchip TPL seems to apply a different configuration, but 
also claims to drive the memory at only 333MHz.)


Assuming I'm on the right track here, what's the likelihood I'd be able 
to determine from the SpecTek datasheet how the SDRAM controller's 
configuration should be tweaked to get this working?


--
Simon South
si...@simonsouth.net
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index 3ab0af1158..90061498c9 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -28,6 +28,8 @@ CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 3ff3331c80..3c09fd94b9 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -29,6 +29,9 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff00
 
+#define CONFIG_SYS_MEMTEST_START	0x0200
+#define CONFIG_SYS_MEMTEST_END		0x03ff
+
 #ifndef CONFIG_SPL_BUILD
 
 #define ENV_MEM_LAYOUT_SETTINGS \
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Re: [U-Boot] baud rate of the rockchip uart

[Mark Kettenis]

> From: Sérgio de Almeida Lenzi 
> Date: Sun, 22 Sep 2019 00:51:52 -0300
> 
> Hello, I am trying to setup the baud rate of the rockchip uart from
> the file => arch/arm/mach-rockchip/rk3328-board-tpl.c line 59 -> 63,
> the baud rate is at insane 1,500,000 bps... that speed it too fast
> for small computers using serial port to communicate with the rock64
> SBC...  I would like to set the baud rate at more "sane" values like
> 9600, 19200... or even 115200 bps
> 
> Can some one point me what values must be written to the lcr and rbr
> of the chip to make it happen???

arch/arm/mach-rockchip/rk3328-board-tpl.c no longer exists in the
current u-boot master.  There is now a arch/arm/mach-rockchip/tpl.c
that is shared between various Rockchip SoCs.  That file calls
debug_uart_init() which end up calling _debug_uart_init() that will
set the baudrate acoording to the CONFIG_BAUDRATE variable.  So you
can simply set CONFIG_BAUDRATE to the desired value in
configs/rock64-rk3328_defconfig.  Note that you'll also need to build
TF-A with the appropriate baudrate setting, otherwise you will see
garbled output from TF-A (or no output at all)!

I agree that 1.5 Mbps isn't really usable as a serial console speed.
Many USB serial converters don't support that speed and it is way too
sensitive to line noise at those speeds.  Unfortunately it appears to
be the default on all the newer Rockchip SoCs.  For OpenBSD we always
build our firmwares with CONFIG_BAUDRATE=115200, which is the de-facto
standard form SBCs with ARM processors.

Cheers,

Mark

P.S. It appears that in arch/arm/mach-rockchip/rk3328/rk3328.c there
 is still code that initializes the baudrate.  But that code
 shouldn't be necessary anymore.
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Re: [U-Boot] [PATCH 1/2] pico-imx7d: fix splash logo drawing

[Otavio Salvador]

On Mon, Sep 23, 2019 at 5:59 AM Joris Offouga  wrote:
>
> Signed-off-by: Joris Offouga 

Reviewed-by: Otavio Salvador 


-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854  Mobile: +1 (347) 903-9750
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Re: [U-Boot] [PATCH 2/2] pico-imx7d: Remove dead code for dm_video

[Otavio Salvador]

On Mon, Sep 23, 2019 at 5:59 AM Joris Offouga  wrote:
>
> Since convert dm_video, unused code introduced, so remove this
>
> Signed-off-by: Joris Offouga 

Reviewed-by: Otavio Salvador 

-- 
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http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854  Mobile: +1 (347) 903-9750
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[U-Boot] baud rate of the rockchip uart

[Sérgio de Almeida Lenzi]

Hello, I am trying to setup the baud rate of the  rockchip uart from the file 
=> arch/arm/mach-rockchip/rk3328-board-tpl.c
line 59 -> 63,  the baud rate is at insane 1,500,000 bps... that speed  it too 
fast for small computers
using serial port to communicate with  the rock64 SBC...  I would like to set 
the baud rate at more "sane"  values
like 9600, 19200... or even 115200 bps

Can some one point me what values must be written to the lcr and rbr of the 
chip to make it happen???


Thanks in advance...

Sergio
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[U-Boot] Set up NAND UBIFS partitions

[JH]

Hi,

I have to start u-boot in initram ramdisk to create NAND partitions
and burn the Yocto image to NAND flash in iMX6, is there a simple way
to partition NAND and burn image to NAND without running the u-boot in
an intermediate initram stage?

The second issue is in the current method to run u-boot in initram, I
created two NAND UBIFS partitions, one was the rootfs, one is the data
storage, but when the system booted from NAND rootfs, the data storage
/dev/ubi1_0 was no longer visiable in rootfs partition. So I have to
create the /dev/ubi1_0 again, attach it and mount it in rootfs
partition every time in rootfs partition boot that is definitely a
wrong way. What is a proper way to fix it?

Thank you.

Kind regards,

- jh
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Re: [U-Boot] [PATCH v2 0/4] env: fix build error for envtools

[Tom Rini]

On Mon, Sep 23, 2019 at 11:09:08AM +0200, Joris Offouga wrote:
> Hi Tom,
> 
> Can you consider the series of Pierre-Jean that fixes the build of envtools
> 
> Gentle ping for this series:
>  - http://patchwork.ozlabs.org/patch/1153103/
>  - http://patchwork.ozlabs.org/patch/1153106/
>  - http://patchwork.ozlabs.org/patch/1153105/
>  - http://patchwork.ozlabs.org/patch/1153104/

Joe?  Thanks!

> 
> Best Regards,
> 
> Joris Offouga
> 
> Le 16/09/2019 à 21:09, Pierre-Jean Texier a écrit :
> >Hello Tom,
> >
> >Le 26/08/2019 à 13:06, Pierre-Jean Texier a écrit :
> >>Here is a set of patches that fixes envtools breakage
> >>introduced after v2019.10-rc2.
> >>
> >>This serie also adds envtools to travis CI and gitlab-ci.
> >>
> >>This was tested on WaRP7.
> >>
> >>Before this serie:
> >>  - https://travis-ci.com/texierp/u-boot/jobs/227669967
> >>After this serie:
> >>  - https://travis-ci.com/texierp/u-boot/jobs/227761236
> >>
> >>Pierre-Jean Texier (4):
> >>   fw_env: remove duplicated definitions
> >>   fw_env: fix build error
> >>   env: add missing  header file
> >>   ci: add envtools support
> >>
> >>  .gitlab-ci.yml |  7 +++
> >>  .travis.yml    |  4 
> >>  include/env.h  |  1 +
> >>  tools/env/fw_env.c | 10 ++
> >>  4 files changed, 14 insertions(+), 8 deletions(-)
> >>
> >
> >Gentle ping for this series:
> > - http://patchwork.ozlabs.org/patch/1153103/
> > - http://patchwork.ozlabs.org/patch/1153106/
> > - http://patchwork.ozlabs.org/patch/1153105/
> > - http://patchwork.ozlabs.org/patch/1153104/
> >
> >With this, envtools compiles again.
> >
> >Thanks,
> >Pierre-Jean
> >

-- 
Tom


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Re: [U-Boot] [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

[Simon Goldschmidt]

Hi ,

On Mon, Sep 23, 2019 at 11:38 AM  wrote:
>
> Hi, Simon,
>
> On 09/23/2019 12:30 PM, Simon Goldschmidt wrote:
> > How would I dump the SFDP tables?
>
> this should do it. Make sure SPI_FLASH_SFDP_SUPPORT is selected in menuconfig.
>
> Cheers,
> ta
>
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index 1acff745d1a2..7062f31226bf 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -1680,6 +1680,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
> for (i = 0; i < BFPT_DWORD_MAX; i++)
> bfpt.dwords[i] = le32_to_cpu(bfpt.dwords[i]);
>
> +   for (i = 0; i < BFPT_DWORD_MAX; i++)
> +   dev_err(nor->dev, "bfpt.dwords[%d] = %08x\n", i,
> +   bfpt.dwords[i]);
> +

Unfortunately, that didn't work. It exits early when parsing the signature:
I get 0xffdddfdf instead of 0x50444653...

Regards,
Simon
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Re: [U-Boot] [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

[Vignesh Raghavendra]

Hi Ashish,

On 23/09/19 2:37 PM, Ashish Kumar wrote:
> 
[...]
>> Lets see if something stands out.
> Hi Vignesh, Eugeniy,
> 
> Could you please provide me dump for n25q512a which consists of all 6 JEDEC 
> id bytes.
> I had initiated mail chain with MICRON FAE, and they suggest that extended id 
> may be different for
> n25q512a  from mt25qu512a.
> 
> I have dumped JEDEC ID from mt25qu512a "20, bb, 20, 10, 44, 00" , the second 
> last byte is supposed to be different as per FAE.
> 
> Bit 6 
> device
> Generation
> 1 = 2nd
> generation
> 

Thats great! Thanks for getting that information!

From Eugeniy's debug dumps in other mail chain, I see JEDEC ID of that flash is:
 " 20 ba 20 10 00 00" (does not support 4 byte addressing opcodes)

So these variants can be differentiated quite easily. I will send out a series 
fixing those entries.

Regards
Vignesh

> Regards
> Ashish 
>>
>> Regards
>> Vignesh
>>
>>> Still, so we have such an op-in possibility to enable 4 byte opcodes
>>> on these chips?
>>>
>>> Regards,
>>> Simon
>>>
>>>
>>> Regards
>>> Ashish
>>> >
>>> > Signed-off-by: Vignesh Raghavendra >> > For n25q512ax3:
>>> > Tested-by: Eugeniy Paltsev >> >
>>> > ---
>>> >  drivers/mtd/spi/spi-nor-ids.c | 6 +++---
>>> >  1 file changed, 3 insertions(+), 3 deletions(-)
>>> >
>>> > diff --git a/drivers/mtd/spi/spi-nor-ids.c
>>> b/drivers/mtd/spi/spi-nor-ids.c
>>> > index f32a6c7d464b..5a7fe07c8309 100644
>>> > --- a/drivers/mtd/spi/spi-nor-ids.c
>>> > +++ b/drivers/mtd/spi/spi-nor-ids.c
>>> > @@ -161,10 +161,10 @@ const struct flash_info spi_nor_ids[] = {
>>> > { INFO("n25q064a",0x20bb17, 0, 64 * 1024,  128, SECT_4K |
>>> > SPI_NOR_QUAD_READ) },
>>> > { INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K |
>>> > SPI_NOR_QUAD_READ) },
>>> > { INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K |
>>> > SPI_NOR_QUAD_READ) },
>>> > -   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K |
>>> > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
>> SPI_NOR_4B_OPCODES) },
>>> > +   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K |
>>> > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>>> > { INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K |
>>> > SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>>> > -   { INFO("mt25qu512a (n25q512a)",0x20bb20, 0, 64 * 1024,
>>> 1024,
>>> > SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
>> SPI_NOR_4B_OPCODES) },
>>> > -   { INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024,
>>> SECT_4K | USE_FSR |
>>> > SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>>> > +   { INFO("mt25qu512a (n25q512a)",0x20bb20, 0, 64 * 1024,
>>> 1024,
>>> > SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>>> > +   { INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K |
>>> > + USE_FSR | SPI_NOR_QUAD_READ) },
>>> > { INFO("n25q00",  0x20ba21, 0, 64 * 1024, 2048,
>>> SECT_4K | USE_FSR |
>>> > SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>>> > { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048,
>>> SECT_4K | USE_FSR |
>>> > SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>>> > { INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096,
>>> SECT_4K | USE_FSR |
>>> > SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>>> > --
>>> > 2.23.0
>>>
>>> ___
>>> U-Boot mailing list
>>> U-Boot@lists.denx.de 
>>>
>>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
>>> s.denx.de%2Flistinfo%2Fu-
>> bootdata=02%7C01%7Cashish.kumar%40nxp.co
>>>
>> m%7C5531cc6a339141ded6cc08d7369fbe9d%7C686ea1d3bc2b4c6fa92cd99c5c
>> 30163
>>>
>> 5%7C0%7C0%7C637037932040085697sdata=1%2BbqG6OBWOLedplM1
>> 19W7E%2Bgp
>>> XlN1wasXZR3AJgzYaM%3Dreserved=0
>>>
>>
>> --
>> Regards
>> Vignesh

-- 
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[U-Boot] [PATCH] armv7: ls102xa: not power down OCRAM1

[Biwen Li]

- Not power down OCRAM1 for FlexTimer to wakeup
  system with FlexTimer in deep sleep.

- Add errata ID A-008646 for workaround.

Signed-off-by: Biwen Li 
---
 arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c 
b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
index bb169aaaf4..acd74c3ba4 100644
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
@@ -68,12 +68,11 @@ static void __secure ls1_deepsleep_irq_cfg(void)
 
ippdexpcr0 = in_be32(>ippdexpcr0);
/*
-* Workaround: There is bug of register ippdexpcr1, when read it always
+* Workaround of errata A-008646: There is bug of register ippdexpcr1, 
when read it always
 * returns zero, so its value is saved to a scrachpad register to be
 * read, that is why we don't read it from register ippdexpcr1 itself.
 */
ippdexpcr1 = in_le32(>sparecr[7]);
-   out_be32(>ippdexpcr1, ippdexpcr1);
 
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 |
@@ -87,8 +86,11 @@ static void __secure ls1_deepsleep_irq_cfg(void)
if (ippdexpcr1 & RCPM_IPPDEXPCR1_LPUART)
pmcintecr |= SCFG_PMCINTECR_LPUART;
 
-   if (ippdexpcr1 & RCPM_IPPDEXPCR1_FLEXTIMER)
+   if (ippdexpcr1 & RCPM_IPPDEXPCR1_FLEXTIMER) {
pmcintecr |= SCFG_PMCINTECR_FTM;
+   /* Not power down OCRAM1 */
+   out_be32(>ippdexpcr1, ippdexpcr1 | 
RCPM_IPPDEXPCR1_OCRAM1);
+   }
 
/* Always set external IRQ pins as wakeup source */
pmcintecr |= SCFG_PMCINTECR_IRQ0 | SCFG_PMCINTECR_IRQ1;
-- 
2.17.1

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[U-Boot] [PATCH] misc: imx8: add more scfw api

[Peng Fan]

Add more scfw api for clk/partition/seco usage
The api will be used by ccf/partition/secure boot.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx8/sci/rpc.h  |  24 +
 arch/arm/include/asm/arch-imx8/sci/sci.h  |  42 +-
 arch/arm/include/asm/arch-imx8/sci/svc/seco/api.h |  37 ++
 drivers/misc/imx8/scu_api.c   | 520 +-
 4 files changed, 613 insertions(+), 10 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-imx8/sci/svc/seco/api.h

diff --git a/arch/arm/include/asm/arch-imx8/sci/rpc.h 
b/arch/arm/include/asm/arch-imx8/sci/rpc.h
index 0dfd89ad11..8e1e9bbf43 100644
--- a/arch/arm/include/asm/arch-imx8/sci/rpc.h
+++ b/arch/arm/include/asm/arch-imx8/sci/rpc.h
@@ -142,6 +142,7 @@ struct sc_rpc_msg_s {
 #define RM_FUNC_SET_MASTER_SID 11U
 #define RM_FUNC_SET_PERIPHERAL_PERMISSIONS 12U
 #define RM_FUNC_IS_RESOURCE_OWNED  13U
+#define RM_FUNC_GET_RESOURCE_OWNER 33U
 #define RM_FUNC_IS_RESOURCE_MASTER 14U
 #define RM_FUNC_IS_RESOURCE_PERIPHERAL 15U
 #define RM_FUNC_GET_RESOURCE_INFO  16U
@@ -158,4 +159,27 @@ struct sc_rpc_msg_s {
 #define RM_FUNC_IS_PAD_OWNED   25U
 #define RM_FUNC_DUMP   27U
 
+/* SECO RPC */
+#define SECO_FUNC_UNKNOWN  0
+#define SECO_FUNC_IMAGE_LOAD   1U
+#define SECO_FUNC_AUTHENTICATE 2U
+#define SECO_FUNC_FORWARD_LIFECYCLE3U
+#define SECO_FUNC_RETURN_LIFECYCLE 4U
+#define SECO_FUNC_COMMIT   5U
+#define SECO_FUNC_ATTEST_MODE  6U
+#define SECO_FUNC_ATTEST   7U
+#define SECO_FUNC_GET_ATTEST_PKEY  8U
+#define SECO_FUNC_GET_ATTEST_SIGN  9U
+#define SECO_FUNC_ATTEST_VERIFY10U
+#define SECO_FUNC_GEN_KEY_BLOB 11U
+#define SECO_FUNC_LOAD_KEY 12U
+#define SECO_FUNC_GET_MP_KEY   13U
+#define SECO_FUNC_UPDATE_MPMR  14U
+#define SECO_FUNC_GET_MP_SIGN  15U
+#define SECO_FUNC_BUILD_INFO   16U
+#define SECO_FUNC_CHIP_INFO17U
+#define SECO_FUNC_ENABLE_DEBUG 18U
+#define SECO_FUNC_GET_EVENT19U
+#define SECO_FUNC_FUSE_WRITE   20U
+
 #endif /* SC_RPC_H */
diff --git a/arch/arm/include/asm/arch-imx8/sci/sci.h 
b/arch/arm/include/asm/arch-imx8/sci/sci.h
index 55b392fde1..14ee6f999b 100644
--- a/arch/arm/include/asm/arch-imx8/sci/sci.h
+++ b/arch/arm/include/asm/arch-imx8/sci/sci.h
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -58,14 +59,23 @@ static inline int sc_err_to_linux(sc_err_t err)
 /* PM API*/
 int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
  sc_pm_power_mode_t mode);
+int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
+ sc_pm_power_mode_t *mode);
 int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
 sc_pm_clock_rate_t *rate);
 int sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
 sc_pm_clock_rate_t *rate);
 int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
   sc_bool_t enable, sc_bool_t autog);
+int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
+  sc_pm_clk_parent_t parent);
+int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
+   sc_faddr_t address);
+sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
 
 /* MISC API */
+int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
+   sc_ctrl_t ctrl, u32 val);
 int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl,
u32 *val);
 void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev);
@@ -77,12 +87,40 @@ int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, 
sc_misc_temp_t temp,
 
 /* RM API */
 sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr);
+int sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start,
+ sc_faddr_t addr_end);
+int sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr,
+sc_rm_pt_t pt, sc_rm_perm_t perm);
 int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start,
  sc_faddr_t *addr_end);
 sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource);
-int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid);
-sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
+int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure,
+ sc_bool_t isolated, sc_bool_t restricted,

Re: [U-Boot] [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

[Tudor.Ambarus]

Hi, Simon,

On 09/23/2019 12:30 PM, Simon Goldschmidt wrote:
> How would I dump the SFDP tables?

this should do it. Make sure SPI_FLASH_SFDP_SUPPORT is selected in menuconfig.

Cheers,
ta

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 1acff745d1a2..7062f31226bf 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -1680,6 +1680,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
for (i = 0; i < BFPT_DWORD_MAX; i++)
bfpt.dwords[i] = le32_to_cpu(bfpt.dwords[i]);

+   for (i = 0; i < BFPT_DWORD_MAX; i++)
+   dev_err(nor->dev, "bfpt.dwords[%d] = %08x\n", i,
+   bfpt.dwords[i]);
+
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Re: [U-Boot] [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

[Simon Goldschmidt]

On Wed, Sep 11, 2019 at 12:06 PM Vignesh Raghavendra  wrote:
>
> Hi Ashish, Simon,
>
> On 11/09/19 3:11 PM, Simon Goldschmidt wrote:
> >
> >
> > Ashish Kumar mailto:ashish.ku...@nxp.com>>
> > schrieb am Mi., 11. Sep. 2019, 10:49:
> >
> >
> >
> > > -Original Message-
> > > From: Vignesh Raghavendra mailto:vigne...@ti.com>>
> > > Sent: Tuesday, September 10, 2019 10:36 PM
> > > To: Jagan Teki mailto:ja...@openedev.com>>
> > > Cc: Vignesh Raghavendra  > >; u-boot@lists.denx.de
> > ; Tom
> > > Rini mailto:tr...@konsulko.com>>; Eugeniy Paltsev
> > >  > >; alexey.brod...@synopsys.com
> > ; Ashish
> > > Kumar mailto:ashish.ku...@nxp.com>>
> > > Subject: [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable
> > > SPI_NOR_4B_OPCODES for n25q512* and n25q256*
> > >
> > > Caution: EXT Email
> > >
> > > Not all variants of n25q256* and n25q512* support 4 Byte stateless
> > > addressing opcodes and there is no easy way to discover at runtime
> > whether
> > > the flash supports this feature or not.
> > > Therefore don't set SPI_NOR_4B_OPCODES for these flashes.
> > Hi Vignesh,
> >
> > I think it will be good to keep it here and disable this for boards
> > by using not set flag in config
> > Like
> > # SPI_NOR_4B_OPCODES is not set
> >
>
> SPI_NOR_4B_OPCODES is not a config option. Are you suggesting to add
> one? config options don't scale well especially when same defconfig is
> used for multiple boards that potentially have different flashes
>
> >
> > I'd prefer to take this patch, as this is what Linux does.
>
> No, this is not what Linux does. There is no opt-in or opt-out option.
> Decision to use 4 byte opcode is done at runtime based on flash that's
> detected. Either based on info->flags for that part or by parsing SFDP
> table. There is no config option of DT option to force 4 byte addressing
>
> > I think it's better to have an opt-in option. That way, all chips work with 
> > the
> > default settings (even if that means some chips don't use 4 baste
> > opcodes even if they could).
> >
>
> One solution would be to look at SFDP tables of two variants of flash
> and see if there are any differences that can be used as a clue.
>
> Simon,
> Could you provide dump of SFDP tables and all the 6 bytes READ ID of the
> flash that you have?

I have a n251256a with JEDEC ID 20, ba, 19, 10, 44, 00.
According to the docs, it should support 4-byte opcodes.

How would I dump the SFDP tables?

Regards,
Simon

>
> I have asked Eugeniy to provide dumps from his flash on the other
> thread. Lets see if something stands out.
>
> Regards
> Vignesh
>
> > Still, so we have such an op-in possibility to enable 4 byte opcodes on
> > these chips?
> >
> > Regards,
> > Simon
> >
> >
> > Regards
> > Ashish
> > >
> > > Signed-off-by: Vignesh Raghavendra  > > For n25q512ax3:
> > > Tested-by: Eugeniy Paltsev  > >
> > > ---
> > >  drivers/mtd/spi/spi-nor-ids.c | 6 +++---
> > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/mtd/spi/spi-nor-ids.c
> > b/drivers/mtd/spi/spi-nor-ids.c
> > > index f32a6c7d464b..5a7fe07c8309 100644
> > > --- a/drivers/mtd/spi/spi-nor-ids.c
> > > +++ b/drivers/mtd/spi/spi-nor-ids.c
> > > @@ -161,10 +161,10 @@ const struct flash_info spi_nor_ids[] = {
> > > { INFO("n25q064a",0x20bb17, 0, 64 * 1024,  128, SECT_4K |
> > > SPI_NOR_QUAD_READ) },
> > > { INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K |
> > > SPI_NOR_QUAD_READ) },
> > > { INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K |
> > > SPI_NOR_QUAD_READ) },
> > > -   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K |
> > > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > > +   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K |
> > > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > > { INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K |
> > > SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > > -   { INFO("mt25qu512a (n25q512a)",0x20bb20, 0, 64 * 1024,
> > 1024,
> > > SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > > -   { INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024,
> > SECT_4K | USE_FSR |
> > > SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > > +   { INFO("mt25qu512a (n25q512a)",0x20bb20, 0, 64 * 1024,
> > 1024,
> > > SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
> > > +   { INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K |
> > > + USE_FSR | SPI_NOR_QUAD_READ) },
> > > { INFO("n25q00",  0x20ba21, 0, 64 * 1024, 2048,
> 

Re: [U-Boot] [PATCH v2 0/4] env: fix build error for envtools

[Joris Offouga]

Hi Tom,

Can you consider the series of Pierre-Jean that fixes the build of envtools

Gentle ping for this series:
 - http://patchwork.ozlabs.org/patch/1153103/
 - http://patchwork.ozlabs.org/patch/1153106/
 - http://patchwork.ozlabs.org/patch/1153105/
 - http://patchwork.ozlabs.org/patch/1153104/

Best Regards,

Joris Offouga

Le 16/09/2019 à 21:09, Pierre-Jean Texier a écrit :

Hello Tom,

Le 26/08/2019 à 13:06, Pierre-Jean Texier a écrit :

Here is a set of patches that fixes envtools breakage
introduced after v2019.10-rc2.

This serie also adds envtools to travis CI and gitlab-ci.

This was tested on WaRP7.

Before this serie:
  - https://travis-ci.com/texierp/u-boot/jobs/227669967
After this serie:
  - https://travis-ci.com/texierp/u-boot/jobs/227761236

Pierre-Jean Texier (4):
   fw_env: remove duplicated definitions
   fw_env: fix build error
   env: add missing  header file
   ci: add envtools support

  .gitlab-ci.yml |  7 +++
  .travis.yml    |  4 
  include/env.h  |  1 +
  tools/env/fw_env.c | 10 ++
  4 files changed, 14 insertions(+), 8 deletions(-)



Gentle ping for this series:
 - http://patchwork.ozlabs.org/patch/1153103/
 - http://patchwork.ozlabs.org/patch/1153106/
 - http://patchwork.ozlabs.org/patch/1153105/
 - http://patchwork.ozlabs.org/patch/1153104/

With this, envtools compiles again.

Thanks,
Pierre-Jean


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Re: [U-Boot] [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

[Ashish Kumar]

> -Original Message-
> From: Vignesh Raghavendra 
> Sent: Wednesday, September 11, 2019 3:37 PM
> To: Simon Goldschmidt ; Ashish Kumar
> 
> Cc: Jagan Teki ; u-boot@lists.denx.de;
> alexey.brod...@synopsys.com; Eugeniy Paltsev
> ; Tom Rini 
> Subject: Re: [U-Boot] [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable
> SPI_NOR_4B_OPCODES for n25q512* and n25q256*
> 
> Caution: EXT Email
> 
> Hi Ashish, Simon,
> 
> On 11/09/19 3:11 PM, Simon Goldschmidt wrote:
> >
> >
> > Ashish Kumar mailto:ashish.ku...@nxp.com>>
> > schrieb am Mi., 11. Sep. 2019, 10:49:
> >
> >
> >
> > > -Original Message-
> > > From: Vignesh Raghavendra  >
> > > Sent: Tuesday, September 10, 2019 10:36 PM
> > > To: Jagan Teki  >
> > > Cc: Vignesh Raghavendra  > >; u-boot@lists.denx.de
> > ; Tom
> > > Rini mailto:tr...@konsulko.com>>; Eugeniy
> Paltsev
> > >  > >;
> alexey.brod...@synopsys.com
> > ; Ashish
> > > Kumar mailto:ashish.ku...@nxp.com>>
> > > Subject: [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable
> > > SPI_NOR_4B_OPCODES for n25q512* and n25q256*
> > >
> > > Caution: EXT Email
> > >
> > > Not all variants of n25q256* and n25q512* support 4 Byte stateless
> > > addressing opcodes and there is no easy way to discover at runtime
> > whether
> > > the flash supports this feature or not.
> > > Therefore don't set SPI_NOR_4B_OPCODES for these flashes.
> > Hi Vignesh,
> >
> > I think it will be good to keep it here and disable this for boards
> > by using not set flag in config
> > Like
> > # SPI_NOR_4B_OPCODES is not set
> >
> 
> SPI_NOR_4B_OPCODES is not a config option. Are you suggesting to add
> one? config options don't scale well especially when same defconfig is used
> for multiple boards that potentially have different flashes
> 
> >
> > I'd prefer to take this patch, as this is what Linux does.
> 
> No, this is not what Linux does. There is no opt-in or opt-out option.
> Decision to use 4 byte opcode is done at runtime based on flash that's
> detected. Either based on info->flags for that part or by parsing SFDP table.
> There is no config option of DT option to force 4 byte addressing
> 
> > I think it's better to have an opt-in option. That way, all chips work
> > with the default settings (even if that means some chips don't use 4
> > baste opcodes even if they could).
> >
> 
> One solution would be to look at SFDP tables of two variants of flash and see
> if there are any differences that can be used as a clue.
> 
> Simon,
> Could you provide dump of SFDP tables and all the 6 bytes READ ID of the
> flash that you have?
> 
> I have asked Eugeniy to provide dumps from his flash on the other thread.
> Lets see if something stands out.
Hi Vignesh, Eugeniy,

Could you please provide me dump for n25q512a which consists of all 6 JEDEC id 
bytes.
I had initiated mail chain with MICRON FAE, and they suggest that extended id 
may be different for
n25q512a  from mt25qu512a.

I have dumped JEDEC ID from mt25qu512a "20, bb, 20, 10, 44, 00" , the second 
last byte is supposed to be different as per FAE.

Bit 6 
device
Generation
1 = 2nd
generation

Regards
Ashish 
> 
> Regards
> Vignesh
> 
> > Still, so we have such an op-in possibility to enable 4 byte opcodes
> > on these chips?
> >
> > Regards,
> > Simon
> >
> >
> > Regards
> > Ashish
> > >
> > > Signed-off-by: Vignesh Raghavendra  > > For n25q512ax3:
> > > Tested-by: Eugeniy Paltsev  > >
> > > ---
> > >  drivers/mtd/spi/spi-nor-ids.c | 6 +++---
> > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/mtd/spi/spi-nor-ids.c
> > b/drivers/mtd/spi/spi-nor-ids.c
> > > index f32a6c7d464b..5a7fe07c8309 100644
> > > --- a/drivers/mtd/spi/spi-nor-ids.c
> > > +++ b/drivers/mtd/spi/spi-nor-ids.c
> > > @@ -161,10 +161,10 @@ const struct flash_info spi_nor_ids[] = {
> > > { INFO("n25q064a",0x20bb17, 0, 64 * 1024,  128, SECT_4K |
> > > SPI_NOR_QUAD_READ) },
> > > { INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K |
> > > SPI_NOR_QUAD_READ) },
> > > { INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K |
> > > SPI_NOR_QUAD_READ) },
> > > -   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K |
> > > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> SPI_NOR_4B_OPCODES) },
> > > +   { INFO("n25q256a",0x20ba19, 0, 64 * 1024,  512, SECT_4K |
> > > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > > { INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K |
> > > SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > > -   { INFO("mt25qu512a 

[U-Boot] [GIT PULL] Pull request: u-boot-imx u-boot-imx-20190923

[Stefano Babic]

Hi Tom,

please pull from u-boot-imx, thanks !

The following changes since commit 87d5b225585f341ea8e926a2c26fb72585fc9d0c:

  MAINTAINERS: Change fsl-qoriq, mpc86xx, mpc85xx maintainers
(2019-09-13 10:14:45 -0400)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
tags/u-boot-imx-20190923

for you to fetch changes up to 322a967cdf470640cb8cb6b68b6721e63b8c3104:

  Merge branch 'for-imx' of https://github.com/OSSystems/u-boot
(2019-09-22 15:19:49 +0200)


u-boot-imx-20190923
---

- Fixes i.MX7ULP
- No default CSF size in case of SECURE_BOOT
- Technexion boards
- Nitrogen boards ported to DM
- fix for mx53loco
- Sync DTS for i.MX6UL(L)
- Fuses for i.MX7ULP
- i.mx8 : container image, fixes
- Fixes for Toradex (apalis)
- SPL: allow bigger size for i.MX6Q/D

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/588095906


Anatolij Gustschin (1):
  imx: sksimx6_defconfig: remove SPL misc option to fix build error

Bai Ping (2):
  i.MX7ULP: Fix system reset after a7 rtc alarm expired.
  i.MX7ULP: Correct the clock index

Breno Matheus Lima (4):
  Kconfig: Migrate CONFIG_CSF_SIZE to Kconfig
  imx6: spl: Reduce SPL limit size in case CONFIG_SECURE_BOOT is enabled
  imx: configs: Cleanup CONFIG_SECURE_BOOT comments
  habv4: tools: Avoid hardcoded CSF size for SPL targets

Fabio Berton (1):
  pico-imx7d: Sync pico-hobbit-imx7d_defconfig

Fabio Estevam (15):
  mx6sabresd: Reduce overall SPL size
  pico-imx6ul: Increase the CONFIG_ENV_OFFSET size
  pico-imx6ul: Add LCD support
  pico-imx6ul: Update the Falcon mode instructions
  pico-imx6ul: Provide a way to escape the Falcon mode
  pico-imx7d: Add instructions for booting in Falcon mode
  pico-imx7d: Provide a way to escape the Falcon mode
  logos: Add the TechNexion's logo
  pico: Convert to CONFIG_FSL_USDHC
  mx53loco: Fix U-Boot corruption after saving the environment
  mx6: clock: Allow enable_ipu_clock() to be built for SPL code
  pico-imx6: Add initial support
  pico-imx6: Add Ethernet support
  pico-imx6: Add splashscreen support
  pico-imx6: Add Falcon mode

Joris Offouga (3):
  ARM: dts: pico-imx7d: Add u-boot.dtsi for uboot specific dts change
  ARM: dts: pico-imx7d: sync device tree with v5.3-rc6
  configs: pico-imx7d: Convert to DM_VIDEO

Otavio Salvador (5):
  pico-imx6ul: Add DWARF baseboard support
  pico-imx7d: Add DWARF baseboard support
  pico-imx7d: Add NYMPH baseboard support
  configs: Sync all baseboard specific pico-imx7d
  pico-imx6: Fix bootmenu handling

Peng Fan (39):
  arm: dts: sync dts for i.MX6UL
  arm: dts: sync dts for i.MX6ULL
  arm: dts: import dts for i.MX6ULZ
  imx: add i.MX6ULZ cpu type
  imx: add i.MX6ULZ board
  imx: mx6ul_14x14_evk: Fix SPL boot
  imx: mx6ul_14x14_evk: convert to DM_VIDEO
  imx: mx6slevk: enable DM_SPI and DM_SPI_FLASH
  pinctrl: imx: use devfdt_get_addr_size_index
  tools: imx8mimage: fix HDMI/FIT parsing
  serial: Kconfig: make MXC_UART usable for MX7 and IMX8M
  spl: pass args to board_return_to_bootrom
  arm: dts: imx: fsl-imx8qm.dtsi: add gpio aliases to fix gpio command
  imx: i.MX7ULP: add get_boot_device
  i.MX7ULP: evk: Modify FDT file to disable SD3.0 for usb boot
  misc: Kconfig: make i.MX7ULP could use MXC_OCOTP
  i.MX7ULP: evk: Enable fuse comamnd
  i.MX7ULP: Add CPU revision check for B0
  imx: mx6sabresd: fix usb start when DM enabled
  imx: imx6qdl: dtsi: move U-Boot specific change to u-boot.dtsi
  imx: imx8qxp_mek: fix CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
  imx8: support parsing i.MX8 Container file
  spl: mmc: support loading i.MX container format file
  imx: add container target
  imx8qxp_mek: switch to use container image
  imx8qm_mek: switch to use container image
  doc: imx: mkimage: introduce i.MX8 image format
  imx: sys_proto: add is_imx8qm helper
  imx8qm: power up SMMU
  imx8qm: correct fdt_file
  imx8: disable node when the resource is not owned
  configs: imx8qm/qxp_mek: enable CONFIG_OF_SYSTEM_SETUP
  imx: scu_api: add sc_rm_set_master_sid
  imx8: fdt: configure sid for masters
  imx8: save args passed from ATF
  imx8: fdt: add optee node
  imx: scu_api: add sc_pm_is_partition_started
  imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c
  imx8: cpu: fix mac fuse word for i.MX8QM

Ricardo Salveti (4):
  apalis_imx6: add board_fit_config_name_match to support FIT in SPL
  apalis_imx6: fix broken fsl_esdhc_imx conversion
  imx: apalis_imx6: select MX6Q via Kconfig
  spl: imx: only use HAB if spl fit signature

[U-Boot] [PATCH v2 04/12] board: atmel: Add sam9x60ek board

[Tudor.Ambarus]

From: Sandeep Sheriker Mallikarjun 

Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.

Signed-off-by: Sandeep Sheriker Mallikarjun 

[tudor.amba...@microchip.com:
- fix number of DRAM banks:
  One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h]
Signed-off-by: Tudor Ambarus 
---
 arch/arm/mach-at91/Kconfig|  7 +
 board/atmel/sam9x60ek/Kconfig | 12 
 board/atmel/sam9x60ek/MAINTAINERS |  7 +
 board/atmel/sam9x60ek/Makefile|  7 +
 board/atmel/sam9x60ek/sam9x60ek.c | 59 ++
 include/configs/sam9x60ek.h   | 60 +++
 6 files changed, 152 insertions(+)
 create mode 100644 board/atmel/sam9x60ek/Kconfig
 create mode 100644 board/atmel/sam9x60ek/MAINTAINERS
 create mode 100644 board/atmel/sam9x60ek/Makefile
 create mode 100644 board/atmel/sam9x60ek/sam9x60ek.c
 create mode 100644 include/configs/sam9x60ek.h

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 3cf13042b7b4..85524004f9e4 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -160,6 +160,12 @@ config TARGET_GARDENA_SMART_GATEWAY_AT91SAM
select BOARD_LATE_INIT
select SUPPORT_SPL
 
+config TARGET_SAM9X60EK
+   bool "SAM9X60-EK board"
+   select SAM9X60
+   select BOARD_EARLY_INIT_F
+   select BOARD_LATE_INIT
+
 config TARGET_SAMA5D2_PTC_EK
bool "SAMA5D2 PTC EK board"
select BOARD_EARLY_INIT_F
@@ -316,6 +322,7 @@ source "board/atmel/at91sam9m10g45ek/Kconfig"
 source "board/atmel/at91sam9n12ek/Kconfig"
 source "board/atmel/at91sam9rlek/Kconfig"
 source "board/atmel/at91sam9x5ek/Kconfig"
+source "board/atmel/sam9x60ek/Kconfig"
 source "board/atmel/sama5d2_ptc_ek/Kconfig"
 source "board/atmel/sama5d2_xplained/Kconfig"
 source "board/atmel/sama5d27_som1_ek/Kconfig"
diff --git a/board/atmel/sam9x60ek/Kconfig b/board/atmel/sam9x60ek/Kconfig
new file mode 100644
index ..32fae2108e6e
--- /dev/null
+++ b/board/atmel/sam9x60ek/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_SAM9X60EK
+
+config SYS_BOARD
+   default "sam9x60ek"
+
+config SYS_VENDOR
+   default "atmel"
+
+config SYS_CONFIG_NAME
+   default "sam9x60ek"
+
+endif
diff --git a/board/atmel/sam9x60ek/MAINTAINERS 
b/board/atmel/sam9x60ek/MAINTAINERS
new file mode 100644
index ..e8c1346863a3
--- /dev/null
+++ b/board/atmel/sam9x60ek/MAINTAINERS
@@ -0,0 +1,7 @@
+SAM9X60EK BOARD
+M: Sandeep Sheriker M 
+M: Eugen Hristev 
+S: Maintained
+F: board/atmel/sam9x60ek/
+F: include/configs/sam9x60ek.h
+F: configs/sam9x60ek_mmc_defconfig
diff --git a/board/atmel/sam9x60ek/Makefile b/board/atmel/sam9x60ek/Makefile
new file mode 100644
index ..12a406a3bb5c
--- /dev/null
+++ b/board/atmel/sam9x60ek/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
+#
+# Author: Sandeep Sheriker M 
+
+obj-y += sam9x60ek.o
diff --git a/board/atmel/sam9x60ek/sam9x60ek.c 
b/board/atmel/sam9x60ek/sam9x60ek.c
new file mode 100644
index ..62938741ddd6
--- /dev/null
+++ b/board/atmel/sam9x60ek/sam9x60ek.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sandeep Sheriker M 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void at91_prepare_cpu_var(void);
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   at91_prepare_cpu_var();
+   return 0;
+}
+#endif
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+   at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+   debug_uart_init();
+#endif
+   return 0;
+}
+#endif
+
+int board_init(void)
+{
+   /* address of boot parameters */
+   gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+   return 0;
+}
+
+int dram_init(void)
+{
+   gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+   CONFIG_SYS_SDRAM_SIZE);
+   return 0;
+}
diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h
new file mode 100644
index ..b778bd8e83eb
--- /dev/null
+++ b/include/configs/sam9x60ek.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuation settings for the SAM9X60EK board.
+ *
+ * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sandeep Sheriker M 
+ */
+
+#ifndef __CONFIG_H__
+#define __CONFIG_H__
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
+#define CONFIG_SYS_AT91_MAIN_CLOCK 2400/* 24 MHz crystal 

[U-Boot] [PATCH v2 09/12] configs: Add sam9x60ek_nandflash_defconfig

[Tudor.Ambarus]

From: Tudor Ambarus 

Boot from nand flash.

Signed-off-by: Tudor Ambarus 
---
 board/atmel/sam9x60ek/MAINTAINERS |  1 +
 configs/sam9x60ek_nandflash_defconfig | 51 +++
 2 files changed, 52 insertions(+)
 create mode 100644 configs/sam9x60ek_nandflash_defconfig

diff --git a/board/atmel/sam9x60ek/MAINTAINERS 
b/board/atmel/sam9x60ek/MAINTAINERS
index e8c1346863a3..ec5bed7479ba 100644
--- a/board/atmel/sam9x60ek/MAINTAINERS
+++ b/board/atmel/sam9x60ek/MAINTAINERS
@@ -5,3 +5,4 @@ S:  Maintained
 F: board/atmel/sam9x60ek/
 F: include/configs/sam9x60ek.h
 F: configs/sam9x60ek_mmc_defconfig
+F: configs/sam9x60ek_nandflash_defconfig
diff --git a/configs/sam9x60ek_nandflash_defconfig 
b/configs/sam9x60ek_nandflash_defconfig
new file mode 100644
index ..4858539edeec
--- /dev/null
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x23f0
+CONFIG_TARGET_SAM9X60EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=2
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_NAND_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk 
mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs)
 rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.9.5

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[U-Boot] [PATCH v2 11/12] ARM: dts: at91: sam9x60ek: Enable qspi node

[Tudor.Ambarus]

From: Tudor Ambarus 

The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.

Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.

Signed-off-by: Tudor Ambarus 
---
 arch/arm/dts/sam9x60.dtsi  | 29 +
 arch/arm/dts/sam9x60ek-u-boot.dtsi | 28 
 arch/arm/dts/sam9x60ek.dts | 31 +++
 3 files changed, 88 insertions(+)

diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index a66d0a278a87..9c16ba1e6a87 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -22,6 +22,7 @@
serial0 = 
gpio0 = 
gpio1 = 
+   spi0 = 
};
 
clocks {
@@ -60,6 +61,17 @@
#size-cells = <1>;
ranges;
 
+   qspi: spi@f0014000 {
+   compatible = "microchip,sam9x60-qspi";
+   reg = <0xf0014000 0x100>, <0x7000 
0x1000>;
+   reg-names = "qspi_base", "qspi_mmap";
+   clocks =  <_clk>, <>;
+   clock-names = "pclk", "qspick";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
macb0: ethernet@f802c000 {
compatible = "cdns,sam9x60-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
@@ -172,6 +184,18 @@
atmel,clk-divisors = <1 2 4 6>;
};
 
+   system: systemck {
+   compatible = 
"atmel,at91rm9200-clk-system";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   qspick: qspick {
+   #clock-cells = <0>;
+   reg = <19>;
+   clocks = <>;
+   };
+   };
+
periph: periphck {
compatible = 
"microchip,sam9x60-clk-peripheral";
#address-cells = <1>;
@@ -202,6 +226,11 @@
#clock-cells = <0>;
reg = <24>;
};
+
+   qspi_clk: qspi_clk {
+   #clock-cells = <0>;
+   reg = <35>;
+   };
};
 
generic: gck {
diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi 
b/arch/arm/dts/sam9x60ek-u-boot.dtsi
index 68e220926e5e..93cf1262f6fc 100644
--- a/arch/arm/dts/sam9x60ek-u-boot.dtsi
+++ b/arch/arm/dts/sam9x60ek-u-boot.dtsi
@@ -31,6 +31,10 @@
u-boot,dm-pre-reloc;
 };
 
+ {
+   u-boot,dm-pre-reloc;
+};
+
 _dbgu {
u-boot,dm-pre-reloc;
 };
@@ -39,10 +43,18 @@
u-boot,dm-pre-reloc;
 };
 
+_qspi {
+   u-boot,dm-pre-reloc;
+};
+
  {
u-boot,dm-pre-reloc;
 };
 
+ {
+   u-boot,dm-pre-reloc;
+};
+
  {
u-boot,dm-pre-reloc;
 };
@@ -59,6 +71,14 @@
u-boot,dm-pre-reloc;
 };
 
+ {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
  {
u-boot,dm-pre-reloc;
 };
@@ -67,6 +87,10 @@
u-boot,dm-pre-reloc;
 };
 
+_clk {
+   u-boot,dm-pre-reloc;
+};
+
 _clk {
u-boot,dm-pre-reloc;
 };
@@ -75,6 +99,10 @@
u-boot,dm-pre-reloc;
 };
 
+_clk {
+   u-boot,dm-pre-reloc;
+};
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 6fe9f19f0bc7..63904272f08f 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -16,6 +16,37 @@
chosen {
stdout-path = 
};
+
+   ahb {
+   apb {
+   qspi: spi@f0014000 {
+   pinctrl-names = "default";
+   pinctrl-0 = <_qspi>;
+   status = "okay";
+
+   nor_flash: sst26vf064@0 {
+   compatible = "spi-flash";
+   reg = <0>;
+   spi-max-frequency = <8000>;
+   spi-rx-bus-width = <4>;
+

[U-Boot] [PATCH v2 05/12] configs: Add sam9x60ek_mmc_defconfig

[Tudor.Ambarus]

From: Sandeep Sheriker Mallikarjun 

add sam9x60ek_mmc_defconfig and for now only supports booting from
sdcard.

Signed-off-by: Sandeep Sheriker Mallikarjun 

Signed-off-by: Nicolas Ferre 
[nicolas.fe...@microchip.com: split patch, add Ethernet controller,
phy and tools]
[claudiu.bez...@microchip.com: add CONFIG_OF_LIBFDT_OVERLAY]
Signed-off-by: Claudiu Beznea 
[tudor.amba...@microchip.com: Fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
Signed-off-by: Tudor Ambarus 
---
 configs/sam9x60ek_mmc_defconfig | 52 +
 1 file changed, 52 insertions(+)
 create mode 100644 configs/sam9x60ek_mmc_defconfig

diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
new file mode 100644
index ..6cdc819a6793
--- /dev/null
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -0,0 +1,52 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x23f0
+CONFIG_TARGET_SAM9X60EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ENV_SIZE=0x4000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=2
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rw 
rootfstype=ext4 rootwait"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_PHY_MICREL=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.9.5

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[U-Boot] [PATCH v2 06/12] ARM: at91: Rename sama5_sfr.h to at91_sfr.h

[Tudor.Ambarus]

From: Tudor Ambarus 

The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.

Signed-off-by: Tudor Ambarus 
---
 arch/arm/mach-at91/armv7/sama5d4_devices.c  | 2 +-
 arch/arm/mach-at91/atmel_sfr.c  | 2 +-
 arch/arm/mach-at91/include/mach/{sama5_sfr.h => at91_sfr.h} | 4 ++--
 board/laird/wb50n/wb50n.c   | 2 +-
 drivers/clk/at91/clk-utmi.c | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)
 rename arch/arm/mach-at91/include/mach/{sama5_sfr.h => at91_sfr.h} (97%)

diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c 
b/arch/arm/mach-at91/armv7/sama5d4_devices.c
index 5c693df2ecf0..e68ae9940788 100644
--- a/arch/arm/mach-at91/armv7/sama5d4_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c
@@ -8,7 +8,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 char *get_cpu_name()
diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c
index 13cfba0ba0c0..b14222460f3a 100644
--- a/arch/arm/mach-at91/atmel_sfr.c
+++ b/arch/arm/mach-at91/atmel_sfr.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #if defined(CONFIG_SAMA5D2) || defined(CONFIG_SAMA5D4)
 void redirect_int_from_saic_to_aic(void)
diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h 
b/arch/arm/mach-at91/include/mach/at91_sfr.h
similarity index 97%
rename from arch/arm/mach-at91/include/mach/sama5_sfr.h
rename to arch/arm/mach-at91/include/mach/at91_sfr.h
index f9c412f9989a..dc259055cff6 100644
--- a/arch/arm/mach-at91/include/mach/sama5_sfr.h
+++ b/arch/arm/mach-at91/include/mach/at91_sfr.h
@@ -6,8 +6,8 @@
  *   Bo Shen 
  */
 
-#ifndef __SAMA5_SFR_H
-#define __SAMA5_SFR_H
+#ifndef __AT91_SFR_H
+#define __AT91_SFR_H
 
 struct atmel_sfr {
u32 reserved1;  /* 0x00 */
diff --git a/board/laird/wb50n/wb50n.c b/board/laird/wb50n/wb50n.c
index ab1dbcd879ae..13563abb49ef 100644
--- a/board/laird/wb50n/wb50n.c
+++ b/board/laird/wb50n/wb50n.c
@@ -4,7 +4,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index e8506099fd32..18af0bfeaad1 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -10,7 +10,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include "pmc.h"
 
 /*
-- 
2.9.5

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[U-Boot] [PATCH 0/2] Fix pico-imx7d

[Joris Offouga]

After merge master imx and U-Boot master. Pico imx7d build break.

common/built-in.o:/home/jun/u-boot/include/bmp_logo_data.h:46 : définitions 
multiples de « bmp_logo_bitmap »
board/technexion/pico-imx7d/built-in.o:/home/jun/u-boot/include/bmp_logo_data.h:46
 : défini pour la première fois ici
common/built-in.o:/home/jun/u-boot/include/bmp_logo_data.h:12 : définitions 
multiples de « bmp_logo_palette »
board/technexion/pico-imx7d/built-in.o:/home/jun/u-boot/include/bmp_logo_data.h:12
 : défini pour la première fois ici
Makefile:1610: recipe for target 'u-boot' failed
make: *** [u-boot] Error 1

So fix with according Anatolij Gustschin U-Boot video merge.

See fix branch : https://github.com/jorisoffouga/u-boot/commits/fix/pico-imx7d

Joris Offouga (2):
  pico-imx7d: fix splash logo drawing
  pico-imx7d: Remove dead code for dm_video

 arch/arm/dts/imx7d-pico-u-boot.dtsi  | 31 
 board/technexion/pico-imx7d/pico-imx7d.c | 24 --
 configs/pico-dwarf-imx7d_defconfig   |  2 ++
 configs/pico-hobbit-imx7d_defconfig  |  2 ++
 configs/pico-imx7d_bl33_defconfig|  2 ++
 configs/pico-imx7d_defconfig |  2 ++
 configs/pico-nymph-imx7d_defconfig   |  2 ++
 configs/pico-pi-imx7d_defconfig  |  2 ++
 include/configs/pico-imx7d.h |  1 +
 9 files changed, 13 insertions(+), 55 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH 2/2] pico-imx7d: Remove dead code for dm_video

[Joris Offouga]

Since convert dm_video, unused code introduced, so remove this

Signed-off-by: Joris Offouga 
---
 arch/arm/dts/imx7d-pico-u-boot.dtsi  | 31 
 board/technexion/pico-imx7d/pico-imx7d.c | 11 -
 2 files changed, 42 deletions(-)

diff --git a/arch/arm/dts/imx7d-pico-u-boot.dtsi 
b/arch/arm/dts/imx7d-pico-u-boot.dtsi
index ef19de2b30..cc50f38fd6 100644
--- a/arch/arm/dts/imx7d-pico-u-boot.dtsi
+++ b/arch/arm/dts/imx7d-pico-u-boot.dtsi
@@ -4,37 +4,6 @@
 usb0 = 
 display0 = 
 };
-
-   backlight: backlight {
-   compatible = "pwm-backlight";
-   pinctrl-names = "default";
-   pinctrl-0 = <_backlight>;
-   pwms = < 0 5 0>;
-   brightness-levels = <0 36 72 108 144 180 216 255>;
-   default-brightness-level = <6>;
-   status = "okay";
-   };
-
-   reg_lcd_3v3: regulator-lcd-3v3 {
-   compatible = "regulator-fixed";
-   regulator-name = "lcd-3v3";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   gpio = < 6 GPIO_ACTIVE_HIGH>;
-   enable-active-high;
-   };
-
-   panel {
-   compatible = "vxt,vl050-8048nt-c01";
-   backlight = <>;
-   power-supply = <_lcd_3v3>;
-
-   port {
-   panel_in: endpoint {
-   remote-endpoint = <_out>;
-   };
-   };
-   };
 };
 
  {
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c 
b/board/technexion/pico-imx7d/pico-imx7d.c
index 32b04b8fd6..ebfe769547 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -33,13 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define I2C_PAD_CTRL(PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
 
-
-#define LCD_PAD_CTRL(PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \
-PAD_CTL_DSE_3P3V_49OHM)
-
-#define LCD_SYNC_PAD_CTRL(PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \
- PAD_CTL_DSE_3P3V_196OHM)
-
 #ifdef CONFIG_SYS_I2C_MXC
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 
@@ -224,10 +217,6 @@ int board_early_init_f(void)
 }
 
 #ifdef CONFIG_DM_VIDEO
-static iomux_v3_cfg_t const lcd_pads[] = {
-   MX7D_PAD_GPIO1_IO11__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
 void setup_lcd(void)
 {
imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
-- 
2.17.1

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[U-Boot] [PATCH 1/2] pico-imx7d: fix splash logo drawing

[Joris Offouga]

Signed-off-by: Joris Offouga 
---
 board/technexion/pico-imx7d/pico-imx7d.c | 13 -
 configs/pico-dwarf-imx7d_defconfig   |  2 ++
 configs/pico-hobbit-imx7d_defconfig  |  2 ++
 configs/pico-imx7d_bl33_defconfig|  2 ++
 configs/pico-imx7d_defconfig |  2 ++
 configs/pico-nymph-imx7d_defconfig   |  2 ++
 configs/pico-pi-imx7d_defconfig  |  2 ++
 include/configs/pico-imx7d.h |  1 +
 8 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/board/technexion/pico-imx7d/pico-imx7d.c 
b/board/technexion/pico-imx7d/pico-imx7d.c
index 916220516e..32b04b8fd6 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -19,10 +19,6 @@
 #include 
 #include 
 #include "../../freescale/common/pfuze.h"
-#ifdef CONFIG_DM_VIDEO
-#include 
-#include 
-#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -250,18 +246,9 @@ int board_init(void)
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
 #ifdef CONFIG_DM_VIDEO
-   struct udevice *dev;
-   int ret;
-
-   ret = uclass_get_device(UCLASS_VIDEO, 0, );
-   if (ret)
-   return ret;
 
setup_lcd();
 
-   ret = video_bmp_display(dev, (ulong)bmp_logo_bitmap, 0, 0, true);
-   if (ret)
-   return ret;
 #endif
 #ifdef CONFIG_FEC_MXC
setup_fec();
diff --git a/configs/pico-dwarf-imx7d_defconfig 
b/configs/pico-dwarf-imx7d_defconfig
index 97de873e7c..5ddf8d9001 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-hobbit-imx7d_defconfig 
b/configs/pico-hobbit-imx7d_defconfig
index f3ed298087..8628ba4275 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-imx7d_bl33_defconfig 
b/configs/pico-imx7d_bl33_defconfig
index ba347d2507..d7752446cd 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -20,6 +20,7 @@ CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_WRITE_SIZE=0x2
@@ -63,4 +64,5 @@ CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index bad34555fa..56c64e2604 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-nymph-imx7d_defconfig 
b/configs/pico-nymph-imx7d_defconfig
index 97de873e7c..5ddf8d9001 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index c44bc778ca..f9069d9b08 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ b/configs/pico-pi-imx7d_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MII is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
@@ -67,3 +68,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 956c383a31..5c4b90a8a1 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -85,6 +85,7 @@

[U-Boot] [PATCH v2 08/12] board: sam9x60ek: Add NAND flash support

[Tudor.Ambarus]

From: Tudor Ambarus 

- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.

Signed-off-by: Tudor Ambarus 
---
 board/atmel/sam9x60ek/sam9x60ek.c | 61 +++
 include/configs/sam9x60ek.h   | 28 ++
 2 files changed, 89 insertions(+)

diff --git a/board/atmel/sam9x60ek/sam9x60ek.c 
b/board/atmel/sam9x60ek/sam9x60ek.c
index 62938741ddd6..e352afc67ed3 100644
--- a/board/atmel/sam9x60ek/sam9x60ek.c
+++ b/board/atmel/sam9x60ek/sam9x60ek.c
@@ -7,8 +7,10 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -18,6 +20,62 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void at91_prepare_cpu_var(void);
 
+#ifdef CONFIG_CMD_NAND
+static void sam9x60ek_nand_hw_init(void)
+{
+   struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+   struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
+   unsigned int csa;
+
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 0, 1);   /* NAND OE */
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 1, 1);   /* NAND WE */
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 2, 0);   /* NAND ALE */
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 3, 0);   /* NAND CLE */
+   /* Enable NandFlash */
+   at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+   /* Configure RDY/BSY */
+   at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 6, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 7, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 8, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 9, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 10, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 11, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 12, 1);
+   at91_pio3_set_a_periph(AT91_PIO_PORTD, 13, 1);
+
+   at91_periph_clk_enable(ATMEL_ID_PIOD);
+
+   /* Enable CS3 */
+   csa = readl(>ebicsa);
+   csa |= AT91_SFR_CCFG_EBI_CSA(3, 1) | AT91_SFR_CCFG_NFD0_ON_D16;
+
+   /* Configure IO drive */
+   csa &= ~AT91_SFR_CCFG_EBI_DRIVE_SAM9X60;
+
+   writel(csa, >ebicsa);
+
+   /* Configure SMC CS3 for NAND/SmartMedia */
+   writel(AT91_SMC_SETUP_NWE(4), >cs[3].setup);
+
+   writel(AT91_SMC_PULSE_NWE(10) | AT91_SMC_PULSE_NCS_WR(20) |
+  AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(20),
+  >cs[3].pulse);
+
+   writel(AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20),
+  >cs[3].cycle);
+
+   writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+#ifdef CONFIG_SYS_NAND_DBW_16
+  AT91_SMC_MODE_DBW_16 |
+#else /* CONFIG_SYS_NAND_DBW_8 */
+  AT91_SMC_MODE_DBW_8 |
+#endif
+  AT91_SMC_MODE_TDF | AT91_SMC_MODE_TDF_CYCLE(15),
+  >cs[3].mode);
+}
+#endif
+
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
@@ -48,6 +106,9 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
+#ifdef CONFIG_CMD_NAND
+   sam9x60ek_nand_hw_init();
+#endif
return 0;
 }
 
diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h
index b778bd8e83eb..dbcbce3a2b80 100644
--- a/include/configs/sam9x60ek.h
+++ b/include/configs/sam9x60ek.h
@@ -42,6 +42,26 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
 
+/* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE   0x4000
+#define CONFIG_SYS_NAND_MASK_ALE   BIT(21)
+#define CONFIG_SYS_NAND_MASK_CLE   BIT(22)
+#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
+#define CONFIG_SYS_NAND_READY_PIN  AT91_PIN_PD5
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+#define CONFIG_MTD_DEVICE
+#endif
+
+/* PMECC & PMERRLOC */
+#define CONFIG_ATMEL_NAND_HWECC
+#define CONFIG_ATMEL_NAND_HW_PMECC
+#define CONFIG_PMECC_CAP   8
+#define CONFIG_PMECC_SECTOR_SIZE   512
+
 #define CONFIG_SYS_LOAD_ADDR   0x2200  /* load address */
 
 #ifdef CONFIG_SD_BOOT
@@ -50,6 +70,14 @@
"fatload mmc 0:1 0x2100 at91-sam9x60ek.dtb;" \
"fatload mmc 0:1 0x2200 zImage;" \
"bootz 0x2200 - 0x2100"
+
+#elif defined(CONFIG_NAND_BOOT)
+/* bootstrap + u-boot + env + linux in nandflash */
+#define CONFIG_ENV_OFFSET_REDUND   0x10
+#define CONFIG_BOOTCOMMAND "nand read " \
+   "0x2200 0x20 0x60; " \
+   "nand read 0x2100 0x18 0x2; " \
+   "bootz 0x2200 - 0x2100"
 #endif
 
 /*
-- 
2.9.5

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[U-Boot] [PATCH v2 10/12] configs: sam9x60ek: Add QSPI_BOOT defines

[Tudor.Ambarus]

From: Tudor Ambarus 

Cope with the offsets defined at:
https://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections/demo_nandflash_map_lnx4sam6x.png

The environment starts at 0x14 and it's of size 0x2.
The device tree starts at 0x18 and it's of size 0x8.
The zImage starts at 0x20 and it's of size 0x60.

Signed-off-by: Tudor Ambarus 
---
 include/configs/sam9x60ek.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h
index dbcbce3a2b80..5f89ae4a511a 100644
--- a/include/configs/sam9x60ek.h
+++ b/include/configs/sam9x60ek.h
@@ -78,6 +78,13 @@
"0x2200 0x20 0x60; " \
"nand read 0x2100 0x18 0x2; " \
"bootz 0x2200 - 0x2100"
+
+#elif defined(CONFIG_QSPI_BOOT)
+/* bootstrap + u-boot + env + linux in SPI NOR flash */
+#define CONFIG_BOOTCOMMAND "sf probe 0; "  
\
+   "sf read 0x2100 0x18 0x8; " 
\
+   "sf read 0x2200 0x20 0x60; "
\
+   "bootz 0x2200 - 0x2100"
 #endif
 
 /*
-- 
2.9.5

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[U-Boot] [PATCH v2 02/12] ARM: dts: Add dts files for sam9x60ek

[Tudor.Ambarus]

From: Sandeep Sheriker Mallikarjun 

add device tree files for sam9x60ek board with below changes.

- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
  are used by the board_init_f stage.

Signed-off-by: Sandeep Sheriker Mallikarjun 

[prasanthi.chellaku...@microchip.com: fix style/whitespace issues]
Signed-off-by: Prasanthi Chellakumar 
[nicolas.fe...@microchip.com:
- fix gclk,
- fix pio/pinctrl controller definition and allow to have more
  than only PIOA for this SoC,
- removing pinctrl address]
Signed-off-by: Nicolas Ferre 
[claudiu.bez...@microchip.com:
- use SAM9X60's compatible for pinctrl
- add drive strength and slew rate options for SDMMC0 pins.]
Signed-off-by: Claudiu Beznea 
[tudor.amba...@microchip.com:
- u-boot,dm-pre-reloc property in dedicated file,
- fix pit len, starts from 0xFE40 and it is of len 0x10]
Signed-off-by: Tudor Ambarus 
---
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/sam9x60.dtsi  | 225 +
 arch/arm/dts/sam9x60ek-u-boot.dtsi | 104 +
 arch/arm/dts/sam9x60ek.dts |  19 
 4 files changed, 350 insertions(+)
 create mode 100644 arch/arm/dts/sam9x60.dtsi
 create mode 100644 arch/arm/dts/sam9x60ek-u-boot.dtsi
 create mode 100644 arch/arm/dts/sam9x60ek.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 250b9ba505aa..52027786ef50 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -690,6 +690,8 @@ dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
at91sam9x25ek.dtb   \
at91sam9x35ek.dtb
 
+dtb-$(CONFIG_TARGET_SAM9X60EK) += sam9x60ek.dtb
+
 dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb
 
 dtb-$(CONFIG_TARGET_GARDENA_SMART_GATEWAY_AT91SAM) += \
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
new file mode 100644
index ..e880dc0068df
--- /dev/null
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * sam9x60.dtsi - Device Tree Include file for SAM9X60 SoC.
+ *
+ * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sandeep Sheriker M 
+ */
+
+#include "skeleton.dtsi"
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/{
+   model = "Microchip SAM9X60 SoC";
+   compatible = "microchip,sam9x60";
+
+   aliases {
+   serial0 = 
+   gpio0 = 
+   gpio1 = 
+   };
+
+   clocks {
+   slow_xtal: slow_xtal {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <0>;
+   };
+
+   main_xtal: main_xtal {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <0>;
+   };
+   };
+
+   ahb {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   sdhci0: sdhci-host@8000 {
+   compatible = "microchip,sam9x60-sdhci";
+   reg = <0x8000 0x300>;
+   clocks = <_clk>, <_gclk>, <>;
+   clock-names = "hclock", "multclk", "baseclk";
+   bus-width = <4>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_sdhci0>;
+   };
+
+   apb {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   dbgu: serial@f200 {
+   compatible = "atmel,at91sam9260-dbgu", 
"atmel,at91sam9260-usart";
+   reg = <0xf200 0x200>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_dbgu>;
+   clocks = <_clk>;
+   clock-names = "usart";
+   };
+
+   pinctrl {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "microchip,sam9x60-pinctrl", 
"simple-bus";
+   ranges = <0xf400 0xf400 0x800>;
+   reg = <0xf400 0x200 /* pioA */
+  0xf600 0x200 /* pioB */
+  0xf800 0x200 /* pioC */
+  0xfa00 0x200>;   /* pioD */
+
+   /* shared pinctrl settings */
+   dbgu {
+   pinctrl_dbgu: dbgu-0 {
+   

[U-Boot] [PATCH v2 12/12] configs: Add sam9x60ek_qspiflash_defconfig

[Tudor.Ambarus]

From: Tudor Ambarus 

Boot from QSPI nor flash.

The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.

Signed-off-by: Tudor Ambarus 
---
 board/atmel/sam9x60ek/MAINTAINERS |  1 +
 configs/sam9x60ek_qspiflash_defconfig | 73 +++
 2 files changed, 74 insertions(+)
 create mode 100644 configs/sam9x60ek_qspiflash_defconfig

diff --git a/board/atmel/sam9x60ek/MAINTAINERS 
b/board/atmel/sam9x60ek/MAINTAINERS
index ec5bed7479ba..d209249c2eff 100644
--- a/board/atmel/sam9x60ek/MAINTAINERS
+++ b/board/atmel/sam9x60ek/MAINTAINERS
@@ -6,3 +6,4 @@ F:  board/atmel/sam9x60ek/
 F: include/configs/sam9x60ek.h
 F: configs/sam9x60ek_mmc_defconfig
 F: configs/sam9x60ek_nandflash_defconfig
+F: configs/sam9x60ek_qspiflash_defconfig
diff --git a/configs/sam9x60ek_qspiflash_defconfig 
b/configs/sam9x60ek_qspiflash_defconfig
new file mode 100644
index ..8e3bf5e4ede6
--- /dev/null
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x23f0
+CONFIG_TARGET_SAM9X60EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=2
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_FIT=y
+CONFIG_QSPI_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk 
mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs)
 rootfstype=ubifs ubi.mtd=12 root=ubi0:rootfs rw"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=0
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=0
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=5000
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0x0
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_QSPI=y
+CONFIG_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.9.5

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[U-Boot] [PATCH v2 07/12] ARM: at91: Add SFR definitions

[Tudor.Ambarus]

From: Tudor Ambarus 

sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.

Signed-off-by: Tudor Ambarus 
---
 arch/arm/mach-at91/include/mach/at91_sfr.h | 48 --
 1 file changed, 45 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/at91_sfr.h 
b/arch/arm/mach-at91/include/mach/at91_sfr.h
index dc259055cff6..0300c336dd81 100644
--- a/arch/arm/mach-at91/include/mach/at91_sfr.h
+++ b/arch/arm/mach-at91/include/mach/at91_sfr.h
@@ -11,7 +11,10 @@
 
 struct atmel_sfr {
u32 reserved1;  /* 0x00 */
-   u32 ddrcfg; /* 0x04: DDR Configuration Register */
+   union {
+   u32 ddrcfg; /* 0x04: DDR Configuration Register */
+   u32 ebicsa; /* 0x04: EBI Chip Select Register */
+   };
u32 reserved2;  /* 0x08 */
u32 reserved3;  /* 0x0c */
u32 ohciicr;/* 0x10: OHCI Interrupt Configuration Register */
@@ -28,7 +31,16 @@ struct atmel_sfr {
 };
 
 /* Register Mapping*/
+#define AT91_SFR_DDRCFG0x04/* DDR Configuration Register */
+#define AT91_SFR_CCFG_EBICSA   0x04/* EBI Chip Select Register */
+/* 0x08 ~ 0x0c: Reserved */
+#define AT91_SFR_OHCIICR   0x10/* OHCI INT Configuration Register */
+#define AT91_SFR_OHCIISR   0x14/* OHCI INT Status Register */
 #define AT91_SFR_UTMICKTRIM0x30/* UTMI Clock Trimming Register */
+#define AT91_SFR_UTMISWAP  0x3c/* UTMI DP/DM Pin Swapping Register */
+#define AT91_SFR_LS0x7c/* Light Sleep Register */
+#define AT91_SFR_I2SCLKSEL 0x90/* I2SC Register */
+#define AT91_SFR_WPMR  0xe4/* Write Protection Mode Register */
 
 /* Bit field in DDRCFG */
 #define ATMEL_SFR_DDRCFG_FDQIEN0x0001
@@ -58,9 +70,39 @@ struct atmel_sfr {
 #define AT91_SFR_EBICFG_SCH1_OFF   (0x0 << 12)
 #define AT91_SFR_EBICFG_SCH1_ON(0x1 << 12)
 
-#define AT91_UTMICKTRIM_FREQ   GENMASK(1, 0)
-
 /* Bit field in AICREDIR */
 #define ATMEL_SFR_AICREDIR_NSAIC   0x0001
 
+/* Bit field in DDRCFG */
+#define ATMEL_SFR_DDRCFG_FDQIEN0x0001
+#define ATMEL_SFR_DDRCFG_FDQSIEN   0x0002
+
+#define AT91_SFR_CCFG_EBI_CSA(cs, val) ((val) << (cs))
+#define AT91_SFR_CCFG_EBI_DBPUCBIT(8)
+#define AT91_SFR_CCFG_EBI_DBPDCBIT(9)
+#define AT91_SFR_CCFG_EBI_DRIVE_SAM9X60BIT(16)
+#define AT91_SFR_CCFG_EBI_DRIVEBIT(17)
+#define AT91_SFR_CCFG_DQIEN_F  BIT(20)
+#define AT91_SFR_CCFG_NFD0_ON_D16  BIT(24)
+#define AT91_SFR_CCFG_DDR_MP_ENBIT(25)
+
+#define AT91_SFR_OHCIICR_RES(x)BIT(x)
+#define AT91_SFR_OHCIICR_ARIE  BIT(4)
+#define AT91_SFR_OHCIICR_APPSTART  BIT(5)
+#define AT91_SFR_OHCIICR_USB_SUSP(x)   BIT(8 + (x))
+#define AT91_SFR_OHCIICR_UDPPUDIS  BIT(23)
+#define AT91_OHCIICR_USB_SUSPEND   GENMASK(10, 8)
+
+#define AT91_SFR_OHCIISR_RIS(x)BIT(x)
+
+#define AT91_UTMICKTRIM_FREQ   GENMASK(1, 0)
+
+#define AT91_SFR_UTMISWAP_PORT(x)  BIT(x)
+
+#define AT91_SFR_LS_VALUE(x)   BIT(x)
+#define AT91_SFR_LS_MEM_POWER_GATING_ULP1_EN   BIT(16)
+
+#define AT91_SFR_WPMR_WPEN BIT(0)
+#define AT91_SFR_WPMR_WPKEY_MASK   GENMASK(31, 8)
+
 #endif
-- 
2.9.5

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[U-Boot] [PATCH v2 03/12] ARM: dts: at91: sam9x60: Add macb0 Ethernet controller

[Tudor.Ambarus]

From: Nicolas Ferre 

Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.

Signed-off-by: Nicolas Ferre 
---
 arch/arm/dts/sam9x60.dtsi  | 31 +++
 arch/arm/dts/sam9x60ek.dts |  5 +
 2 files changed, 36 insertions(+)

diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index e880dc0068df..a66d0a278a87 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -60,6 +60,16 @@
#size-cells = <1>;
ranges;
 
+   macb0: ethernet@f802c000 {
+   compatible = "cdns,sam9x60-macb", "cdns,macb";
+   reg = <0xf802c000 0x100>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_macb0_rmii>;
+   clock-names = "hclk", "pclk";
+   clocks = <_clk>, <_clk>;
+   status = "disabled";
+   };
+
dbgu: serial@f200 {
compatible = "atmel,at91sam9260-dbgu", 
"atmel,at91sam9260-usart";
reg = <0xf200 0x200>;
@@ -88,6 +98,22 @@
};
};
 
+   macb0 {
+   pinctrl_macb0_rmii: macb0_rmii-0 {
+   atmel,pins =
+   ; /* PB10 periph A */
+   };
+   };
+
sdhci0 {
pinctrl_sdhci0: sdhci0 {
atmel,pins =
@@ -171,6 +197,11 @@
#clock-cells = <0>;
reg = <47>;
};
+
+   macb0_clk: macb0_clk {
+   #clock-cells = <0>;
+   reg = <24>;
+   };
};
 
generic: gck {
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index e64566ec8e58..6fe9f19f0bc7 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -17,3 +17,8 @@
stdout-path = 
};
 };
+
+ {
+   phy-mode = "rmii";
+   status = "okay";
+};
-- 
2.9.5

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[U-Boot] [PATCH v2 01/12] ARM: at91: Add sam9x60 soc

[Tudor.Ambarus]

From: Sandeep Sheriker Mallikarjun 

Add new Microchip sam9x60 SoC based on an ARM926.

Signed-off-by: Sandeep Sheriker Mallikarjun 

[tudor.amba...@microchip.com: fix SFR definition]
Signed-off-by: Tudor Ambarus 
---
 arch/arm/mach-at91/Kconfig |   4 +
 arch/arm/mach-at91/arm926ejs/Makefile  |   1 +
 arch/arm/mach-at91/arm926ejs/sam9x60_devices.c | 125 ++
 arch/arm/mach-at91/include/mach/hardware.h |   2 +
 arch/arm/mach-at91/include/mach/sam9x60.h  | 169 +
 5 files changed, 301 insertions(+)
 create mode 100644 arch/arm/mach-at91/arm926ejs/sam9x60_devices.c
 create mode 100644 arch/arm/mach-at91/include/mach/sam9x60.h

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 14343280793b..3cf13042b7b4 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -43,6 +43,10 @@ config AT91SAM9X5
bool
select CPU_ARM926EJS
 
+config SAM9X60
+   bool
+   select CPU_ARM926EJS
+
 config SAMA5D2
bool
select CPU_V7A
diff --git a/arch/arm/mach-at91/arm926ejs/Makefile 
b/arch/arm/mach-at91/arm926ejs/Makefile
index 6b0b28957af5..8de6a2f9661e 100644
--- a/arch/arm/mach-at91/arm926ejs/Makefile
+++ b/arch/arm/mach-at91/arm926ejs/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_AT91SAM9M10G45)  += at91sam9m10g45_devices.o
 obj-$(CONFIG_AT91SAM9G45)  += at91sam9m10g45_devices.o
 obj-$(CONFIG_AT91SAM9N12)  += at91sam9n12_devices.o
 obj-$(CONFIG_AT91SAM9X5)   += at91sam9x5_devices.o
+obj-$(CONFIG_SAM9X60)  += sam9x60_devices.o
 obj-$(CONFIG_AT91_EFLASH)  += eflash.o
 obj-$(CONFIG_AT91_LED) += led.o
 obj-y += clock.o
diff --git a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c 
b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c
new file mode 100644
index ..d463bbc78863
--- /dev/null
+++ b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+unsigned int get_chip_id(void)
+{
+   /* The 0x40 is the offset of cidr in DBGU */
+   return readl(ATMEL_BASE_DBGU + 0x40) & ~ARCH_ID_VERSION_MASK;
+}
+
+unsigned int get_extension_chip_id(void)
+{
+   /* The 0x44 is the offset of exid in DBGU */
+   return readl(ATMEL_BASE_DBGU + 0x44);
+}
+
+unsigned int has_emac1(void)
+{
+   return cpu_is_sam9x60();
+}
+
+unsigned int has_emac0(void)
+{
+   return cpu_is_sam9x60();
+}
+
+unsigned int has_lcdc(void)
+{
+   return cpu_is_sam9x60();
+}
+
+char *get_cpu_name(void)
+{
+   unsigned int extension_id = get_extension_chip_id();
+
+   if (cpu_is_sam9x60()) {
+   switch (extension_id) {
+   case ARCH_EXID_SAM9X60:
+   return "SAM9X60";
+   default:
+   return "Unknown CPU type";
+   }
+   } else {
+   return "Unknown CPU type";
+   }
+}
+
+void at91_seriald_hw_init(void)
+{
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 9, 1);   /* DRXD */
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 1);  /* DTXD */
+
+   at91_periph_clk_enable(ATMEL_ID_DBGU);
+}
+
+void at91_mci_hw_init(void)
+{
+   /* Initialize the SDMMC0 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 17, 1);  /* CLK */
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 16, 1);  /* CMD */
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 1);  /* DAT0 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 1);  /* DAT1 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 1);  /* DAT2 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 1);  /* DAT3 */
+
+   at91_periph_clk_enable(ATMEL_ID_SDMMC0);
+}
+
+#ifdef CONFIG_MACB
+void at91_macb_hw_init(void)
+{
+   if (has_emac0()) {
+   /* Enable EMAC0 clock */
+   at91_periph_clk_enable(ATMEL_ID_EMAC0);
+   /* EMAC0 pins setup */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 4, 0);   /* ETXCK */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 3, 0);   /* ERXDV */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 0, 0);   /* ERX0 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 1, 0);   /* ERX1 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 2, 0);   /* ERXER */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 7, 0);   /* ETXEN */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 9, 0);   /* ETX0 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 10, 0);  /* ETX1 */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 5, 0);   /* EMDIO */
+   at91_pio3_set_a_periph(AT91_PIO_PORTB, 6, 0);   /* EMDC */
+   }
+
+   if (has_emac1()) {
+   /* Enable EMAC1 clock */
+   at91_periph_clk_enable(ATMEL_ID_EMAC1);
+   /* EMAC1 pins setup */
+   

[U-Boot] [PATCH v2 00/12] Add support for sam9x60ek board

[Tudor.Ambarus]

From: Tudor Ambarus 

Add support for sam9x60 SOC, sam9x60ek board, dts, NAND and QSPI.
Add defconfigs for MMC, NAND and QSPI.

v2: add maintainers for qspi & nand defconfigs

Nicolas Ferre (1):
  ARM: dts: at91: sam9x60: Add macb0 Ethernet controller

Sandeep Sheriker Mallikarjun (4):
  ARM: at91: Add sam9x60 soc
  ARM: dts: Add dts files for sam9x60ek
  board: atmel: Add sam9x60ek board
  configs: Add sam9x60ek_mmc_defconfig

Tudor Ambarus (7):
  ARM: at91: Rename sama5_sfr.h to at91_sfr.h
  ARM: at91: Add SFR definitions
  board: sam9x60ek: Add NAND flash support
  configs: Add sam9x60ek_nandflash_defconfig
  configs: sam9x60ek: Add QSPI_BOOT defines
  ARM: dts: at91: sam9x60ek: Enable qspi node
  configs: Add sam9x60ek_qspiflash_defconfig

 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/sam9x60.dtsi  | 285 +
 arch/arm/dts/sam9x60ek-u-boot.dtsi | 132 ++
 arch/arm/dts/sam9x60ek.dts |  55 
 arch/arm/mach-at91/Kconfig |  11 +
 arch/arm/mach-at91/arm926ejs/Makefile  |   1 +
 arch/arm/mach-at91/arm926ejs/sam9x60_devices.c | 125 +
 arch/arm/mach-at91/armv7/sama5d4_devices.c |   2 +-
 arch/arm/mach-at91/atmel_sfr.c |   2 +-
 .../include/mach/{sama5_sfr.h => at91_sfr.h}   |  52 +++-
 arch/arm/mach-at91/include/mach/hardware.h |   2 +
 arch/arm/mach-at91/include/mach/sam9x60.h  | 169 
 board/atmel/sam9x60ek/Kconfig  |  12 +
 board/atmel/sam9x60ek/MAINTAINERS  |   9 +
 board/atmel/sam9x60ek/Makefile |   7 +
 board/atmel/sam9x60ek/sam9x60ek.c  | 120 +
 board/laird/wb50n/wb50n.c  |   2 +-
 configs/sam9x60ek_mmc_defconfig|  52 
 configs/sam9x60ek_nandflash_defconfig  |  51 
 configs/sam9x60ek_qspiflash_defconfig  |  73 ++
 drivers/clk/at91/clk-utmi.c|   2 +-
 include/configs/sam9x60ek.h|  95 +++
 22 files changed, 1252 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/dts/sam9x60.dtsi
 create mode 100644 arch/arm/dts/sam9x60ek-u-boot.dtsi
 create mode 100644 arch/arm/dts/sam9x60ek.dts
 create mode 100644 arch/arm/mach-at91/arm926ejs/sam9x60_devices.c
 rename arch/arm/mach-at91/include/mach/{sama5_sfr.h => at91_sfr.h} (53%)
 create mode 100644 arch/arm/mach-at91/include/mach/sam9x60.h
 create mode 100644 board/atmel/sam9x60ek/Kconfig
 create mode 100644 board/atmel/sam9x60ek/MAINTAINERS
 create mode 100644 board/atmel/sam9x60ek/Makefile
 create mode 100644 board/atmel/sam9x60ek/sam9x60ek.c
 create mode 100644 configs/sam9x60ek_mmc_defconfig
 create mode 100644 configs/sam9x60ek_nandflash_defconfig
 create mode 100644 configs/sam9x60ek_qspiflash_defconfig
 create mode 100644 include/configs/sam9x60ek.h

-- 
2.9.5

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Re: [U-Boot] rk3328 clocks

[Matwey V. Kornilov]

пн, 23 сент. 2019, 4:09 Kever Yang :

> Hi Matwey,
>
> On 2019/9/21 下午9:04, Matwey V. Kornilov wrote:
> > Hi all,
> >
> > Is there a reason why do we have
> > include/dt-bindings/clock/rk3328-cru.h completely different from the
> > same file in the Linux kernel tree?
> > Many values (ACLK_*, DCLK_*, PCLK_*, HCLK_*) differs from the Linux
> > kernel version. I've checked that u-boot is still working with Linux
> > kernel version of this file. So, what is the correct version?
>
> I think the reason is that the u-boot version is not up to date, this
> file is used with DTS.
> I try to sync the rk3328 dtsi from latest Kernel, but some function is
> not work after sync,
> still have no time to debug and fix.
>

Hm, I've tried to use Linux kernel rk3328-cru.h and u-boot works for me
even bettet. Now it can boot the kernel without external dtb. However, I
didn't test all u-boot functions.


> Thanks,
> - Kever
> >
>
>
>
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[U-Boot] [v2] nxp: fix NXP copyright

[Biwen Li]

Fix NXP copyright for NXP related code.

Signed-off-by: Biwen Li 
---
Change in v2:
- Move new copyright next to
  the above copyright

 arch/arm/dts/fsl-ls1088a.dtsi   | 2 +-
 arch/arm/dts/fsl-ls2080a-qds.dts| 1 +
 arch/arm/dts/fsl-ls2080a.dtsi   | 1 +
 board/freescale/common/emc2305.c| 2 +-
 board/freescale/common/qixis.c  | 1 +
 board/freescale/common/sys_eeprom.c | 1 +
 board/freescale/common/vid.c| 1 +
 board/freescale/ls2080aqds/eth.c| 1 +
 board/freescale/ls2080aqds/ls2080aqds.c | 1 +
 drivers/ddr/fsl/main.c  | 1 +
 10 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 4be1ab87d2..e52e8a563d 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -2,7 +2,7 @@
 /*
  * NXP ls1088a SOC common device tree source
  *
- * Copyright 2017 NXP
+ * Copyright 2017, 2019 NXP
  */
 
 / {
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arch/arm/dts/fsl-ls2080a-qds.dts
index 13461b5c45..4d06b0546d 100644
--- a/arch/arm/dts/fsl-ls2080a-qds.dts
+++ b/arch/arm/dts/fsl-ls2080a-qds.dts
@@ -3,6 +3,7 @@
  * Freescale ls2080a QDS board device tree source
  *
  * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
  */
 
 /dts-v1/;
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 99ed33af95..9c994dce0e 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -3,6 +3,7 @@
  * Freescale ls2080a SOC common device tree source
  *
  * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
  */
 
 / {
diff --git a/board/freescale/common/emc2305.c b/board/freescale/common/emc2305.c
index b1ca051db2..16467cbf1b 100644
--- a/board/freescale/common/emc2305.c
+++ b/board/freescale/common/emc2305.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2018 NXP.
+ * Copyright 2018-2019 NXP
  *
  * SPDX-License-Identifier: GPL-2.0+
  */
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index 716c93b2c2..1b8243ef53 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2011 Freescale Semiconductor
+ * Copyright 2019 NXP
  * Author: Shengzhou Liu 
  *
  * This file provides support for the QIXIS of some Freescale reference boards.
diff --git a/board/freescale/common/sys_eeprom.c 
b/board/freescale/common/sys_eeprom.c
index bb655ca744..7d1f775d83 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2006, 2008-2009, 2011 Freescale Semiconductor
+ * Copyright 2019 NXP
  * York Sun (york...@freescale.com)
  * Haiying Wang (haiying.w...@freescale.com)
  * Timur Tabi (ti...@freescale.com)
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index b37f3bf4f8..a7918ae20c 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
  */
 
 #include 
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 6a8788c312..543971e551 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2015 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
  */
 
 #include 
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c 
b/board/freescale/ls2080aqds/ls2080aqds.c
index 91c80353ed..dd9cad547a 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2015 Freescale Semiconductor
+ * Copyright 2019 NXP
  */
 #include 
 #include 
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c
index 0aa6aedae7..cd64611423 100644
--- a/drivers/ddr/fsl/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright 2008-2014 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
  */
 
 /*
-- 
2.17.1

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