Re: [PATCH v3 0/7] x86: Improve support for chain-loading U-Boot

[Simon Glass]

Hi Bin,

On Sat, 7 Mar 2020 at 16:22, Simon Glass  wrote:
>
> This little series adds a few checks into the code to allow better
> operation when booting a build from a previous-state loader such as
> coreboot.
>
> At present we have a 'coreboot' target but this runs very different code
> from the bare-metal targets, such as coral. There is very little in common
> between them.
>
> It is useful to be able to boot the same U-Boot on a device, with or
> without a first-stage bootloader. For example, with chromebook_coral, it
> is helpful for testing to be able to boot the same U-Boot (complete with
> FSP) on bare metal and from coreboot. It allows checking of things like
> CPU speed, comparing registers, ACPI tables and the like.
>
> This series allows U-Boot to detect that it ran from coreboot and
> automatically do the right thing.
>
> This series makes the most important changes to allow the same u-boot.bin
> for coral to boot after coreboot (by itself) or bare metal (via TPL->SPL).
>
> Changes in v3:
> - Add a new patch with a gd flag for chain loading
> - Add new patch to detect running from coreboot
>
> Changes in v2:
> - Drop the other check in interrupt_init() which is not needed now
> - Drop patch 'dm: Avoid initing built-in devices when chain loading'
>
> Simon Glass (7):
>   x86: fsp: Allow skipping init code when chain loading
>   x86: apl: Skip init code when chain loading
>   x86: cpu: Skip init code when chain loading
>   pci: Avoid auto-config when chain loading
>   board: Add a gd flag for chain loading
>   x86: Add a way to detect running from coreboot
>   x86: Use the existing stack when chain-loading
>
>  arch/x86/cpu/apollolake/fsp_s.c   |  2 ++
>  arch/x86/cpu/cpu.c|  4 +++-
>  arch/x86/cpu/i386/cpu.c   | 15 +++
>  arch/x86/cpu/i386/interrupt.c |  6 --
>  arch/x86/cpu/start_from_spl.S | 16 ++--
>  arch/x86/include/asm/u-boot-x86.h |  7 +++
>  arch/x86/lib/fsp/fsp_dram.c   |  8 
>  arch/x86/lib/fsp/fsp_graphics.c   |  3 +++
>  arch/x86/lib/fsp2/fsp_dram.c  | 10 ++
>  arch/x86/lib/fsp2/fsp_init.c  |  2 +-
>  arch/x86/lib/init_helpers.c   |  3 +++
>  drivers/pci/pci-uclass.c  |  4 ++--
>  include/asm-generic/global_data.h |  1 +
>  include/init.h|  2 +-
>  14 files changed, 74 insertions(+), 9 deletions(-)
>
> --
> 2.25.1.481.gfbce0eb801-goog
>

Any comments on this series?

Regards,
Simon

Re: [PATCH] common/board_f: Make reserve_mmu generic

[Simon Glass]

Hi,

On Sat, 28 Mar 2020 at 12:25, Ovidiu Panait  wrote:
>
> Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu
> routines.
>
> For ARM, move the reserve_mmu definition from common/board_f.c to
> arch/arm/lib/cache.c.

Can you please do that bit in an initial patch before this one?

> Define arm_reserve_mmu and make it a weak define to allow
> machines to override it (in mach-versal/cpu.c and mach-zynqmp/cpu.c).
>
> Signed-off-by: Ovidiu Panait 
> ---
>  arch/arm/include/asm/cache.h |  2 ++
>  arch/arm/lib/cache.c | 33 +
>  arch/arm/mach-versal/cpu.c   |  6 +-
>  arch/arm/mach-zynqmp/cpu.c   |  6 +-
>  common/board_f.c | 32 ++--
>  include/init.h   |  2 +-
>  6 files changed, 52 insertions(+), 29 deletions(-)

Can you please try to use if() instead of #if as much as possible?

>
> diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
> index 950ec1e793..dbb9c554ae 100644
> --- a/arch/arm/include/asm/cache.h
> +++ b/arch/arm/include/asm/cache.h
> @@ -49,4 +49,6 @@ void dram_bank_mmu_setup(int bank);
>   */
>  #define ARCH_DMA_MINALIGN  CONFIG_SYS_CACHELINE_SIZE
>
> +int arm_reserve_mmu(void);

Function comment

> +
>  #endif /* _ASM_CACHE_H */
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 007d4ebc49..76c10a577b 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -10,6 +10,8 @@
>  #include 
>  #include 
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
>  /*
>   * Flush range from all levels of d-cache/unified-cache.
>   * Affects the range [start, start + size - 1].
> @@ -118,3 +120,34 @@ void invalidate_l2_cache(void)
> isb();
>  }
>  #endif
> +
> +int arch_reserve_mmu(void)
> +{
> +   return arm_reserve_mmu();
> +}
> +
> +__weak int arm_reserve_mmu(void)
> +{
> +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
> +   /* reserve TLB table */
> +   gd->arch.tlb_size = PGTABLE_SIZE;
> +   gd->relocaddr -= gd->arch.tlb_size;
> +
> +   /* round down to next 64 kB limit */
> +   gd->relocaddr &= ~(0x1 - 1);
> +
> +   gd->arch.tlb_addr = gd->relocaddr;
> +   debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
> + gd->arch.tlb_addr + gd->arch.tlb_size);
> +
> +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
> +   /*
> +* Record allocated tlb_addr in case gd->tlb_addr to be overwritten
> +* with location within secure ram.
> +*/
> +   gd->arch.tlb_allocated = gd->arch.tlb_addr;
> +#endif
> +#endif
> +
> +   return 0;
> +}
> diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
> index 6ee6cd43ec..6c5da8b29e 100644
> --- a/arch/arm/mach-versal/cpu.c
> +++ b/arch/arm/mach-versal/cpu.c
> @@ -10,6 +10,10 @@
>  #include 
>  #include 
>
> +#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)

Can you drop that #if?

> +#include 
> +#endif
> +
>  DECLARE_GLOBAL_DATA_PTR;
>
>  #define VERSAL_MEM_MAP_USED5
> @@ -98,7 +102,7 @@ u64 get_page_table_size(void)
>  }
>
>  #if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
> -int reserve_mmu(void)
> +int arm_reserve_mmu(void)
>  {
> tcm_init(TCM_LOCK);
> gd->arch.tlb_size = PGTABLE_SIZE;
> diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
> index 442427bc11..363a20b621 100644
> --- a/arch/arm/mach-zynqmp/cpu.c
> +++ b/arch/arm/mach-zynqmp/cpu.c
> @@ -12,6 +12,10 @@
>  #include 
>  #include 
>
> +#ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU

Can you drop this #ifdef?

> +#include 
> +#endif
> +
>  #define ZYNQ_SILICON_VER_MASK  0xF000
>  #define ZYNQ_SILICON_VER_SHIFT 12
>
> @@ -116,7 +120,7 @@ void tcm_init(u8 mode)
>  #endif
>
>  #ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
> -int reserve_mmu(void)
> +int arm_reserve_mmu(void)
>  {
> tcm_init(TCM_LOCK);
> gd->arch.tlb_size = PGTABLE_SIZE;
> diff --git a/common/board_f.c b/common/board_f.c
> index 82a164752a..2ab23cf239 100644
> --- a/common/board_f.c
> +++ b/common/board_f.c
> @@ -385,33 +385,15 @@ static int reserve_round_4k(void)
> return 0;
>  }
>
> -#ifdef CONFIG_ARM
> -__weak int reserve_mmu(void)
> +__weak int arch_reserve_mmu(void)
>  {
> -#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
> -   /* reserve TLB table */
> -   gd->arch.tlb_size = PGTABLE_SIZE;
> -   gd->relocaddr -= gd->arch.tlb_size;
> -
> -   /* round down to next 64 kB limit */
> -   gd->relocaddr &= ~(0x1 - 1);
> -
> -   gd->arch.tlb_addr = gd->relocaddr;
> -   debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
> - gd->arch.tlb_addr + gd->arch.tlb_size);
> -
> -#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
> -   /*
> -* Record allocated tlb_addr in case gd->tlb_addr to be overwritten
> -* with location within secure ram.
> -*/
> -   gd->arch.tlb_allocated = gd->arch.tlb_addr;
> -#endif
> -#endif
> -
> return 0;
>  }
> -#endif
> 

Re: [RFC PATCH v2] arch: x86: apl: Read FSP-M configuration from device-tree

[Simon Glass]

Hi Bernhard,

On Fri, 27 Mar 2020 at 06:30, Bernhard Messerklinger
 wrote:
>
> Move FSP-M configuration to the device-tree like it's already done for
> other SoCs (Baytaril).
>
> Signed-off-by: Bernhard Messerklinger 
> 
> ---
> With this patch I moved the fsp-m configuration to the device-tree based
> on the baytrail boards.
> I have tried to build it so that only entries that differ from the
> default configuration need to be added. As a minimum the ddr
> configuration must be present.
> If you like this way of configuration, I am also willing to do the same
> for the fsp-s.
> Can you please provide me some feedback?
>
> Changes in v2:
> Added commit notes
>
>  arch/x86/cpu/apollolake/fsp_m.c   | 337 +++---
>  arch/x86/dts/chromebook_coral.dts |  35 ++
>  .../asm/arch-apollolake/fsp/fsp_m_upd.h   | 162 +
>  3 files changed, 414 insertions(+), 120 deletions(-)

Reviewed-by: Simon Glass 
Tested on chromebook_coral:
Tested-by: Simon Glass 

Do you think we should add a binding file for this though?

Regards,
Simon

Re: [PATCH v3] arm: add acpi support for the arm

[Simon Glass]

+U-Boot Mailing List

Hi Steven,

On Thu, 19 Mar 2020 at 21:08, Steven Hao  wrote:
>
> Hi Simon:
>
> Most acpi table have no difference between x86 and arm.
> For example, RSDP,XSDT,DSDT,SSDT,SPCR,FADT,MADT,GTDT,MCFG is same.
> But FACS,IORT table may be different.
>
> I have a idea that the same apci tables should be defined in 
> /include/acpi_table folder,
> and the different tables may be defined in /include/acpi_table/x86 folder  or 
> /include/acpi_table/arm folder.

Yes I have added almost all the structs to the generic acpi_table.h,
except NHLT.

(please can you avoid top-posting?)

Regards,
Simon


>
> Regards
> Steven Hao
> 2020-03-20
>
>
>
> 
> 发件人: Simon Glass 
> 发送时间: 2020年3月20日 0:18
> 收件人: Steven Hao 
> 抄送: U-Boot Mailing List 
> 主题: Re: [PATCH v3] arm: add acpi support for the arm
>
> Hi Steven,
>
> On Wed, 18 Mar 2020 at 00:46, Steven Hao  wrote:
> >
> > Hi Simon:
> >
> > Nowdays I get that you are updating the acpi in uboot. I want to ask for 
> > that
> > could you support the arm platform or keep out a interface for adding 
> > arm-acpi.
> > For example, the acpi_table.h file may be put in include folder, instead of 
> > arch/x86/include/asm  folder.
> >
>
> It is hard for me to know what ACPI bits ARM uses. Do you know? It
> should be easy enough to move the code later if needed.
>
> Regards,
> Simon
>
>
> > Steven Hao
> > 2020-03-18
> > 
> > 发件人: Simon Glass 
> > 发送时间: 2019年12月28日 0:41
> > 收件人: Steven Hao 
> > 抄送: Bin Meng ; Heinrich Schuchardt 
> > ; liu...@phytium.com.cn ; 
> > ag...@csgraf.de ; ja...@amarulasolutions.com 
> > ; marek.va...@gmail.com 
> > ; s...@denx.de ; 
> > patrice.chot...@st.com ; a...@ti.com ; 
> > horatiu.vul...@microchip.com ; 
> > narmstr...@baylibre.com ; ryder@mediatek.com 
> > ; igor.opan...@gmail.com ; 
> > patrick.delau...@st.com ; 
> > eugen.hris...@microchip.com ; 
> > judge.pack...@gmail.com ; 
> > yamada.masah...@socionext.com ; 
> > swar...@nvidia.com ; michal.si...@xilinx.com 
> > ; u-boot@lists.denx.de ; 
> > Andy Shevchenko 
> > 主题: Re: [PATCH v3] arm: add acpi support for the arm
> >
> > Hi,
> >
> > On Sun, 15 Dec 2019 at 18:54, Steven Hao  wrote:
> > >
> > > This problem seems like lay aside.
> > >
> > > 
> > > 发件人: Bin Meng 
> > > 发送时间: 2019年11月27日 14:04
> > > 收件人: Simon Glass 
> > > 抄送: Heinrich Schuchardt ; Steven Hao 
> > > ; liu...@phytium.com.cn 
> > > ; ag...@csgraf.de ; 
> > > ja...@amarulasolutions.com ; 
> > > marek.va...@gmail.com ; s...@denx.de 
> > > ; patrice.chot...@st.com ; 
> > > a...@ti.com ; horatiu.vul...@microchip.com 
> > > ; narmstr...@baylibre.com 
> > > ; ryder@mediatek.com 
> > > ; igor.opan...@gmail.com 
> > > ; patrick.delau...@st.com 
> > > ; eugen.hris...@microchip.com 
> > > ; judge.pack...@gmail.com 
> > > ; yamada.masah...@socionext.com 
> > > ; swar...@nvidia.com ; 
> > > michal.si...@xilinx.com ; u-boot@lists.denx.de 
> > > ; Andy Shevchenko 
> > > 
> > > 主题: Re: [PATCH v3] arm: add acpi support for the arm
> > >
> > > Hi Simon,
> > >
> > > On Wed, Nov 27, 2019 at 11:42 AM Simon Glass  wrote:
> > > >
> > > > Hi Heinrich,
> > > >
> > > > On Mon, 25 Nov 2019 at 18:12, Heinrich Schuchardt  
> > > > wrote:
> > > > >
> > > > > On 11/26/19 12:40 AM, Simon Glass wrote:
> > > > > > Hi,
> > > > > >
> > > > > > On Mon, 25 Nov 2019 at 15:57, Heinrich Schuchardt 
> > > > > >  wrote:
> > > > > >>
> > > > > >> On 11/25/19 3:42 AM, Steven Hao wrote:> 获取 Outlook for iOS
> > > > > >> 
> > > > > >>> 
> > > > > >>> *主题:* Re: [PATCH v3] arm: add acpi support for the arm
> > > > > >>> Hi Steven,
> > > > > >>>
> > > > > >>> On Mon, Nov 25, 2019 at 10:09 AM Steven Hao 
> > > > > >>> 
> > > > > >>> wrote:
> > > > > 
> > > > >  Dear Bin：
> > > > > 
> > > > >  Firstly：
> > > > >  I know that acpi about x86 is existing. And it is usefull for x86
> > > > > >> platfporm. If it  is used to arm platform，some modification may 
> > > > > >> have to
> > > > > >> do. For example，facs table is useless for arm.
> > > > > 
> > > > >  In adition，The acpi table is writed statically and then modified
> > > > > >> dynamically in my patch. It is a new method.
> > > > > 
> > > > >  I want to consult that whether my method is helpful or not.
> > > > > 
> > > > >  Secondly：
> > > > >  If i want to reuse the x86-acpi. I will overwrite the
> > > > > >> write_acpi_tables function. But the definition about acpi 
> > > > > >> strcuture is
> > > > > >> placed in arch/x86/include/asm directory. It can not be used to arm
> > > > > >> plateform. If the acpi library need to surport for all platform，i  
> > > > > >> think
> > > > > >> it should move to /include directory.
> > > > > 
> > > > > >>>
> > > > > >>> Yes, we all are aware that modifications are needed to the 
> > > > > >>> existing
> > > > > >>> x86 ACPI 

Re: [PATCH v1] x86: acpi: Refactor XSDT handling in acpi_add_table()

[Simon Glass]

Hi Andy,

On Thu, 5 Mar 2020 at 05:17, Andy Shevchenko  wrote:
>
> On Tue, Mar 03, 2020 at 07:47:56PM -0700, Simon Glass wrote:
> > On Tue, 3 Mar 2020 at 02:23, Andy Shevchenko  
> > wrote:
> > > On Tue, Mar 3, 2020 at 1:36 AM Simon Glass  wrote:
> > > > On Mon, 2 Mar 2020 at 13:47, Andy Shevchenko 
> > > >  wrote:
> > > > > On Mon, Mar 2, 2020 at 9:47 PM Simon Glass  wrote:
> > > > > > On Fri, 28 Feb 2020 at 01:47, Andy Shevchenko 
> > > > > >  wrote:
> > > > > > > On Fri, Feb 28, 2020 at 1:41 AM Simon Glass  
> > > > > > > wrote:
> > > > > > > > On Thu, 27 Feb 2020 at 06:00, Andy Shevchenko
> > > > > > > >  wrote:
> > > > > > >
> > > > > > > > Could you take a look at the ACPI series?
> > > > > > > >
> > > > > > > > It was sent out about a month ago and has a refactor to this 
> > > > > > > > function.
> > > > > > > >
> > > > > > > > u-boot-dm/coral-working
> > > > > > >
> > > > > > > There are tons of changes. Care to point what changes are more
> > > > > > > important (generic to all x86)?
> > > > > >
> > > > > > I'm not quite sure about that...but x86 patches have an x86: tag, so
> > > > > > perhaps that helps?
> > > > >
> > > > > Okay, some like 50 of them or even more? I really don't want to spend
> > > > > time on the board related patches like "x86: apl:".
> > > >
> > > > Well that's why I add the tags, so you can see what they relate to.
> > > > This is probably a good one to review:
> > > >
> > > >  dm: core: Add basic ACPI support
> > >
> > > Okay, I will try to find a time to look at it first.
>
> I started looking at them from the above mentioned patch.
>
> 1/ Can we do include/acpi/ folder for ACPI related headers?

OK

> 2/ How this is supposed to be compiled?
> + table_compute_checksum((xsdt, xsdt->header.length);
>...means this series should go thru bisectability tests (something like
>aiaiai https://lwn.net/Articles/488992/ script provides)

I'm not sure what you mean by that?

> 3/ This one looks not 64-bit compatible.
> +  printf("RSDP %08lx %06x (v%02d %.6s)\n", 
> (ulong)map_to_sysmem(rsdp),
> + rsdp->length, rsdp->revision, rsdp->oem_id);
>   ...means that types for printing and all explicit casting should be 
> revisited.

I don't want to print 64-bit addresses if I can help it. I don't even
want to use them as they are a pain to look at! If we start using
64-bit U-Boot I still think we will put the ACPI tables below 2GB.

>
>
> Till this one "acpi: Add some tables required by the generation code" looks
> okay (in terms of approach).
>
> This one "acpi: Add generation code for devices" requires quite a good review.
> So, I would recommend to split the series (and this patch in particular) to
> smaller chunks. So does this "acpi: Add functions to generate ACPI code".
> They are unreviewable.

OK I can split that first part off as a series and then split the next patches.

>
> Perhaps first pile some generalization that ARM people may start their work...
>
> > > > > > > P.S. Briefly looking at the last ~30 patches I can say that the 
> > > > > > > idea
> > > > > > > looks good, implementation needs more work. For example, there is
> > > > > > > 'linux,name' property. Shouldn't be referred at all. Linux names 
> > > > > > > and
> > > > > > > other type of enumerations is utterly opaque to the outside world.
> > > > > >
> > > > > > How do we add the required linux,name ACPI property into the ACPI
> > > > > > tables for a device?
> > > > >
> > > > > There must not be Linux device names or anything Linux related (like
> > > > > hardcoded GPIO numbers) in the ACPI table.
> > > >
> > > > Apparently the Intel GPIO driver requires that name. See for example 
> > > > here:
> > > >
> > > > https://elixir.bootlin.com/linux/latest/source/drivers/pinctrl/intel/pinctrl-broxton.c#L999
> > > >
> > > > static const struct acpi_device_id bxt_pinctrl_acpi_match[] = {
> > > > { "INT3452", (kernel_ulong_t)apl_pinctrl_soc_data },
> > > > { "INT34D1", (kernel_ulong_t)bxt_pinctrl_soc_data },
> > > > { }
> > > > };
> > > >
> > > > So we have to put INT3452 in the ACPI table.
> > >
> > > Wait, this is not a *name*, this is ACPI _HID. ACPI _HID, of course,
> > > should be somewhere in board code.
> > >
> > > I was thinking myself about some U-Boot framework that actually takes
> > > ACPI _HID from the driver. So, when you define in U-Boot device tree a
> > > compatible string (for U-Boot use), in the driver it will have in the
> > > class structure the callback / field / stubstructure to use when ACPI
> > > generate tables is enabled. It will drop duplication of compatible
> > > with ACPI _HID in each DTS.
> >
> > Why are you so opposed to using device tree for this? The GPIO and
> > pinctrl drivers are intended to be genericwhat a pain to add all
> > this stuff into the tables in the driver!
>
> So, this is a trade off between C code and DTS. I'm okay to use DTS for
> the stuff that belongs to it. But then, if we enable DTS for ACPI tables
> generation, we have to 

Re: [PATCH] fdtdec: use full path in fdtdec_get_alias_seq comparison

[Simon Glass]

Hi Vladimir,

On Sat, 28 Mar 2020 at 15:12, Vladimir Oltean  wrote:
>
> On Sat, 28 Mar 2020 at 23:00, Simon Glass  wrote:
> >
> > Hi Vladimir,
> >
> > On Sat, 28 Mar 2020 at 14:25, Vladimir Oltean  wrote:
> > >
> > > Hi Simon,
> > >
> > > On Sat, 28 Mar 2020 at 22:06, Simon Glass  wrote:
> > > >
> > > > Hi Vladimir,
> > > >
> > > > On Fri, 27 Mar 2020 at 11:29, Vladimir Oltean  wrote:
> > > > >
> > > > > From: Vladimir Oltean 
> > > > >
> > > > > Currently fdtdec_get_alias_seq() calls fdt_get_name() which returns 
> > > > > only
> > > > > the name of the leaf node. So it needs to also trim the path of the
> > > > > alias to the leaf name only, leading to imperfect matches.
> > > > >
> > > > > This means that the following aliases:
> > > > >
> > > > > /aliases {
> > > > > eth0 = "/dspi@212/ethernet-switch@0/ports/port@0";
> > > > > eth1 = "/pcie@1f000/pci@0,5/ports/port@0";
> > > > > };
> > > > >
> > > > > will make fdtdec_get_alias_seq to return a seq of zero for both 
> > > > > aliases,
> > > > > as the match will only take place on the "port@0" portion.
> > > > >
> > > > > Fix this by calling fdt_get_path and comparing the full path of the
> > > > > alias.
> > > > >
> > > > > Fixes: 5c33c9fdbb3f ("fdt: Add a function to get the alias sequence 
> > > > > of a node")
> > > > > Signed-off-by: Vladimir Oltean 
> > > > > ---
> > > > >  lib/fdtdec.c | 15 +++
> > > > >  1 file changed, 7 insertions(+), 8 deletions(-)
> > > > >
> > > > > diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> > > > > index eb11fc898e30..55c1b36e823b 100644
> > > > > --- a/lib/fdtdec.c
> > > > > +++ b/lib/fdtdec.c
> > > > > @@ -455,13 +455,14 @@ int fdtdec_get_alias_seq(const void *blob, 
> > > > > const char *base, int offset,
> > > > >  int *seqp)
> > > > >  {
> > > > > int base_len = strlen(base);
> > > > > -   const char *find_name;
> > > > > -   int find_namelen;
> > > > > int prop_offset;
> > > > > +   char path[64];
> > > > > +   int path_len;
> > > > > int aliases;
> > > > >
> > > > > -   find_name = fdt_get_name(blob, offset, _namelen);
> > > > > -   debug("Looking for '%s' at %d, name %s\n", base, offset, 
> > > > > find_name);
> > > > > +   fdt_get_path(blob, offset, path, sizeof(path));
> > > >
> > > > This is really slow. I would prefer not to change this for what seems
> > > > like an odd case.
> > > >
> > > > Can you enable CONFIG_OF_LIVE instead?
> > > >
> > >
> > > No, why would I want to do that?
> >
> > Because it uses a different algorithm - see of_alias_get_id(). It
> > might already work.
> >
> > > Why is this an odd case? I thought aliases are supposed to match on
> > > full path, no?
> >
> > Because we've been using the current algorithm for 5+ years without any 
> > comment.
> >
> > Note that fdt_get_path() likely takes a long time in SPL and before 
> > relocation.
> >
> > Regards,
> > Simon
>
> So we have no disagreement about the fact that the function doesn't do
> what's written on the box, and that the implementation for
> CONFIG_OF_LIVE=y and CONFIG_OF_LIVE=n yields different results,
> however your argument is that we should leave it alone because nobody
> noticed thus far? Don't I count?

You are very special and count a lot :-)

Actually my argument is mostly that fdt_get_path() is a very slow
function and I would like to avoid calling it in SPL if at all
possible.

Does your board need to access this alias before relocation?

Regards,
Simon

Re: [PATCH] fdtdec: use full path in fdtdec_get_alias_seq comparison

[Vladimir Oltean]

On Sat, 28 Mar 2020 at 23:00, Simon Glass  wrote:
>
> Hi Vladimir,
>
> On Sat, 28 Mar 2020 at 14:25, Vladimir Oltean  wrote:
> >
> > Hi Simon,
> >
> > On Sat, 28 Mar 2020 at 22:06, Simon Glass  wrote:
> > >
> > > Hi Vladimir,
> > >
> > > On Fri, 27 Mar 2020 at 11:29, Vladimir Oltean  wrote:
> > > >
> > > > From: Vladimir Oltean 
> > > >
> > > > Currently fdtdec_get_alias_seq() calls fdt_get_name() which returns only
> > > > the name of the leaf node. So it needs to also trim the path of the
> > > > alias to the leaf name only, leading to imperfect matches.
> > > >
> > > > This means that the following aliases:
> > > >
> > > > /aliases {
> > > > eth0 = "/dspi@212/ethernet-switch@0/ports/port@0";
> > > > eth1 = "/pcie@1f000/pci@0,5/ports/port@0";
> > > > };
> > > >
> > > > will make fdtdec_get_alias_seq to return a seq of zero for both aliases,
> > > > as the match will only take place on the "port@0" portion.
> > > >
> > > > Fix this by calling fdt_get_path and comparing the full path of the
> > > > alias.
> > > >
> > > > Fixes: 5c33c9fdbb3f ("fdt: Add a function to get the alias sequence of 
> > > > a node")
> > > > Signed-off-by: Vladimir Oltean 
> > > > ---
> > > >  lib/fdtdec.c | 15 +++
> > > >  1 file changed, 7 insertions(+), 8 deletions(-)
> > > >
> > > > diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> > > > index eb11fc898e30..55c1b36e823b 100644
> > > > --- a/lib/fdtdec.c
> > > > +++ b/lib/fdtdec.c
> > > > @@ -455,13 +455,14 @@ int fdtdec_get_alias_seq(const void *blob, const 
> > > > char *base, int offset,
> > > >  int *seqp)
> > > >  {
> > > > int base_len = strlen(base);
> > > > -   const char *find_name;
> > > > -   int find_namelen;
> > > > int prop_offset;
> > > > +   char path[64];
> > > > +   int path_len;
> > > > int aliases;
> > > >
> > > > -   find_name = fdt_get_name(blob, offset, _namelen);
> > > > -   debug("Looking for '%s' at %d, name %s\n", base, offset, 
> > > > find_name);
> > > > +   fdt_get_path(blob, offset, path, sizeof(path));
> > >
> > > This is really slow. I would prefer not to change this for what seems
> > > like an odd case.
> > >
> > > Can you enable CONFIG_OF_LIVE instead?
> > >
> >
> > No, why would I want to do that?
>
> Because it uses a different algorithm - see of_alias_get_id(). It
> might already work.
>
> > Why is this an odd case? I thought aliases are supposed to match on
> > full path, no?
>
> Because we've been using the current algorithm for 5+ years without any 
> comment.
>
> Note that fdt_get_path() likely takes a long time in SPL and before 
> relocation.
>
> Regards,
> Simon

So we have no disagreement about the fact that the function doesn't do
what's written on the box, and that the implementation for
CONFIG_OF_LIVE=y and CONFIG_OF_LIVE=n yields different results,
however your argument is that we should leave it alone because nobody
noticed thus far? Don't I count?

Regards,
-Vladimir

Re: [U-Boot] [PATCH] rockchip: rk3399: Add Pinebook Pro laptop support

[Peter Robinson]

 Now that the device-tree is in linux-next (should land in linux 5.7),
> anyone have a chance to take a stab at a v2 of this patch series? I did
> a quick-and-dirty attempt, and the TPL/SPL layers worked, but failed to
> load the main u-boot/atf binaries (mmc issues, I think).

Yes, I got to that conclusion as well and my debug didn't get me far
but I've not had time to get back to it.

Re: [PATCH] fdtdec: use full path in fdtdec_get_alias_seq comparison

[Simon Glass]

Hi Vladimir,

On Sat, 28 Mar 2020 at 14:25, Vladimir Oltean  wrote:
>
> Hi Simon,
>
> On Sat, 28 Mar 2020 at 22:06, Simon Glass  wrote:
> >
> > Hi Vladimir,
> >
> > On Fri, 27 Mar 2020 at 11:29, Vladimir Oltean  wrote:
> > >
> > > From: Vladimir Oltean 
> > >
> > > Currently fdtdec_get_alias_seq() calls fdt_get_name() which returns only
> > > the name of the leaf node. So it needs to also trim the path of the
> > > alias to the leaf name only, leading to imperfect matches.
> > >
> > > This means that the following aliases:
> > >
> > > /aliases {
> > > eth0 = "/dspi@212/ethernet-switch@0/ports/port@0";
> > > eth1 = "/pcie@1f000/pci@0,5/ports/port@0";
> > > };
> > >
> > > will make fdtdec_get_alias_seq to return a seq of zero for both aliases,
> > > as the match will only take place on the "port@0" portion.
> > >
> > > Fix this by calling fdt_get_path and comparing the full path of the
> > > alias.
> > >
> > > Fixes: 5c33c9fdbb3f ("fdt: Add a function to get the alias sequence of a 
> > > node")
> > > Signed-off-by: Vladimir Oltean 
> > > ---
> > >  lib/fdtdec.c | 15 +++
> > >  1 file changed, 7 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> > > index eb11fc898e30..55c1b36e823b 100644
> > > --- a/lib/fdtdec.c
> > > +++ b/lib/fdtdec.c
> > > @@ -455,13 +455,14 @@ int fdtdec_get_alias_seq(const void *blob, const 
> > > char *base, int offset,
> > >  int *seqp)
> > >  {
> > > int base_len = strlen(base);
> > > -   const char *find_name;
> > > -   int find_namelen;
> > > int prop_offset;
> > > +   char path[64];
> > > +   int path_len;
> > > int aliases;
> > >
> > > -   find_name = fdt_get_name(blob, offset, _namelen);
> > > -   debug("Looking for '%s' at %d, name %s\n", base, offset, 
> > > find_name);
> > > +   fdt_get_path(blob, offset, path, sizeof(path));
> >
> > This is really slow. I would prefer not to change this for what seems
> > like an odd case.
> >
> > Can you enable CONFIG_OF_LIVE instead?
> >
>
> No, why would I want to do that?

Because it uses a different algorithm - see of_alias_get_id(). It
might already work.

> Why is this an odd case? I thought aliases are supposed to match on
> full path, no?

Because we've been using the current algorithm for 5+ years without any comment.

Note that fdt_get_path() likely takes a long time in SPL and before relocation.

Regards,
Simon

Re: [PATCH] x86: spi: Only use the fast SPI peripheral when support

[Simon Glass]

Hi Bin,

On Thu, 26 Mar 2020 at 10:38, Bin Meng  wrote:
>
> Hi Simon,
>
> On Fri, Mar 27, 2020 at 12:20 AM Simon Glass  wrote:
> >
> > HI Bin,
> >
> > On Wed, 25 Mar 2020 at 01:25, Bin Meng  wrote:
> > >
> > > Hi Simon,
> > >
> > > On Tue, Mar 24, 2020 at 9:45 PM Simon Glass  wrote:
> > > >
> > > > At present we query the memory map on boards which don't support it. Fix
> > > > this by only doing it on Apollo Lake.
> > > >
> > >
> > > I wonder isn't this check already covered in mrccache_get_region() below:
> > >
> > > ret = dm_spi_get_mmap(dev, _base, _size, );
> > > if (!ret) {
> > > entry->base = map_base;
> > > } else {
> > > ret = dev_read_u32_array(dev, "memory-map", reg, 2);
> > > if (ret)
> > > return log_msg_ret("Cannot find memory map\n", ret);
> > > entry->base = reg[0];
> > > }
> >
> > Yes it is, so long as dm_spi_get_mmap() returns an error, as it does
> > with my patch.
>
> So does ich_get_mmap_bus() returns 0 on chromebook_link?

Well on link the SPI peripheral is not a PCI device but a child of the
PCH. It is possible to read the registers but at present this only
works once you have the mmio_base (i.e. the PCH device is probed).
This function needs to work before probing (since FSP-S access needs
to happen without probing PCI).

I suspect it would be possible to read the PCH base without probing
it, but it does add quite a bit of special-case code. What do you
think?

Regards,
Simon

Re: [U-Boot] [PATCH] rockchip: rk3399: Add Pinebook Pro laptop support

[Vagrant Cascadian]

On 2019-12-18, Vagrant Cascadian wrote:
> On 2019-11-14, Peter Robinson wrote:
>> Add initial support for Pinebook Pro laptop.

Now that the device-tree is in linux-next (should land in linux 5.7),
anyone have a chance to take a stab at a v2 of this patch series? I did
a quick-and-dirty attempt, and the TPL/SPL layers worked, but failed to
load the main u-boot/atf binaries (mmc issues, I think).


live well,
  vagrant


signature.asc
Description: PGP signature

Re: [PATCH] fdtdec: use full path in fdtdec_get_alias_seq comparison

[Vladimir Oltean]

Hi Simon,

On Sat, 28 Mar 2020 at 22:06, Simon Glass  wrote:
>
> Hi Vladimir,
>
> On Fri, 27 Mar 2020 at 11:29, Vladimir Oltean  wrote:
> >
> > From: Vladimir Oltean 
> >
> > Currently fdtdec_get_alias_seq() calls fdt_get_name() which returns only
> > the name of the leaf node. So it needs to also trim the path of the
> > alias to the leaf name only, leading to imperfect matches.
> >
> > This means that the following aliases:
> >
> > /aliases {
> > eth0 = "/dspi@212/ethernet-switch@0/ports/port@0";
> > eth1 = "/pcie@1f000/pci@0,5/ports/port@0";
> > };
> >
> > will make fdtdec_get_alias_seq to return a seq of zero for both aliases,
> > as the match will only take place on the "port@0" portion.
> >
> > Fix this by calling fdt_get_path and comparing the full path of the
> > alias.
> >
> > Fixes: 5c33c9fdbb3f ("fdt: Add a function to get the alias sequence of a 
> > node")
> > Signed-off-by: Vladimir Oltean 
> > ---
> >  lib/fdtdec.c | 15 +++
> >  1 file changed, 7 insertions(+), 8 deletions(-)
> >
> > diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> > index eb11fc898e30..55c1b36e823b 100644
> > --- a/lib/fdtdec.c
> > +++ b/lib/fdtdec.c
> > @@ -455,13 +455,14 @@ int fdtdec_get_alias_seq(const void *blob, const char 
> > *base, int offset,
> >  int *seqp)
> >  {
> > int base_len = strlen(base);
> > -   const char *find_name;
> > -   int find_namelen;
> > int prop_offset;
> > +   char path[64];
> > +   int path_len;
> > int aliases;
> >
> > -   find_name = fdt_get_name(blob, offset, _namelen);
> > -   debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
> > +   fdt_get_path(blob, offset, path, sizeof(path));
>
> This is really slow. I would prefer not to change this for what seems
> like an odd case.
>
> Can you enable CONFIG_OF_LIVE instead?
>

No, why would I want to do that?
Why is this an odd case? I thought aliases are supposed to match on
full path, no?

> > +   path_len = strlen(path);
> > +   debug("Looking for '%s' at %d, path %s\n", base, offset, path);
> >
> > aliases = fdt_path_offset(blob, "/aliases");
> > for (prop_offset = fdt_first_property_offset(blob, aliases);
> > @@ -469,17 +470,15 @@ int fdtdec_get_alias_seq(const void *blob, const char 
> > *base, int offset,
> >  prop_offset = fdt_next_property_offset(blob, prop_offset)) {
> > const char *prop;
> > const char *name;
> > -   const char *slash;
> > int len, val;
> >
> > prop = fdt_getprop_by_offset(blob, prop_offset, , 
> > );
> > debug("   - %s, %s\n", name, prop);
> > -   if (len < find_namelen || *prop != '/' || prop[len - 1] ||
> > +   if (len < path_len || *prop != '/' || prop[len - 1] ||
> > strncmp(name, base, base_len))
> > continue;
> >
> > -   slash = strrchr(prop, '/');
> > -   if (strcmp(slash + 1, find_name))
> > +   if (strcmp(prop, path))
> > continue;
> > val = trailing_strtol(name);
> > if (val != -1) {
> > --
> > 2.17.1
> >
>
> Regards,
> Simon

Regards,
-Vladimir

Re: [PATCH v2 2/2] rockchip: video: Convert to use APIs which support live DT

[Simon Glass]

Hi Kever,

On Thu, 26 Mar 2020 at 07:37, Kever Yang  wrote:
>
> Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
> driver can support live DT.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2:
> - use dev_read_s32() instead of dev_read_s32_default();
>
>  drivers/video/rockchip/rk3288_mipi.c |  1 -
>  drivers/video/rockchip/rk3399_mipi.c |  1 -
>  drivers/video/rockchip/rk_edp.c  |  2 +-
>  drivers/video/rockchip/rk_lvds.c | 28 +---
>  drivers/video/rockchip/rk_mipi.c | 11 +--
>  5 files changed, 15 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/video/rockchip/rk3288_mipi.c 
> b/drivers/video/rockchip/rk3288_mipi.c
> index fb9c34..71d3faf169 100644
> --- a/drivers/video/rockchip/rk3288_mipi.c
> +++ b/drivers/video/rockchip/rk3288_mipi.c
> @@ -8,7 +8,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>  #include 
>  #include "rk_mipi.h"
> diff --git a/drivers/video/rockchip/rk3399_mipi.c 
> b/drivers/video/rockchip/rk3399_mipi.c
> index 74ebe770a9..cfaa37797e 100644
> --- a/drivers/video/rockchip/rk3399_mipi.c
> +++ b/drivers/video/rockchip/rk3399_mipi.c
> @@ -8,7 +8,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>  #include 
>  #include "rk_mipi.h"
> diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
> index 8703df0ec0..842034c77c 100644
> --- a/drivers/video/rockchip/rk_edp.c
> +++ b/drivers/video/rockchip/rk_edp.c
> @@ -996,7 +996,7 @@ static int rk_edp_ofdata_to_platdata(struct udevice *dev)
>  {
> struct rk_edp_priv *priv = dev_get_priv(dev);
>
> -   priv->regs = (struct rk3288_edp *)devfdt_get_addr(dev);
> +   priv->regs = dev_read_addr_ptr(dev);
> priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
>
> return 0;
> diff --git a/drivers/video/rockchip/rk_lvds.c 
> b/drivers/video/rockchip/rk_lvds.c
> index cae8bada32..a11d793135 100644
> --- a/drivers/video/rockchip/rk_lvds.c
> +++ b/drivers/video/rockchip/rk_lvds.c
> @@ -171,32 +171,22 @@ int rk_lvds_read_timing(struct udevice *dev, struct 
> display_timing *timing)
>  static int rk_lvds_ofdata_to_platdata(struct udevice *dev)
>  {
> struct rk_lvds_priv *priv = dev_get_priv(dev);
> -   const void *blob = gd->fdt_blob;
> -   int node = dev_of_offset(dev);
> int ret;
> -   priv->regs = (void *)devfdt_get_addr(dev);
> +
> +   priv->regs = dev_read_addr_ptr(dev);
> priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
>
> -   ret = fdtdec_get_int(blob, node, "rockchip,output", -1);
> -   if (ret != -1) {
> -   priv->output = ret;
> -   debug("LVDS output : %d\n", ret);
> -   } else {
> -   /* default set it as output rgb */
> +   if (!dev_read_s32(dev, "rockchip,output", >output))
> +   debug("LVDS output : %d\n", priv->output);
> +   else /* default set it as output rgb */
> priv->output = LVDS_OUTPUT_RGB;

Can you use dev_read_u32_default() ?

also below.

> -   }
>
> -   ret = fdtdec_get_int(blob, node, "rockchip,data-mapping", -1);
> -   if (ret != -1) {
> -   priv->format = ret;
> -   debug("LVDS data-mapping : %d\n", ret);
> -   } else {
> -   /* default set it as format jeida */
> +   if (!dev_read_s32(dev, "rockchip,data-mapping", >format))
> +   debug("LVDS data-mapping : %d\n", priv->format);
> +   else /* default set it as format jeida */
> priv->format = LVDS_FORMAT_JEIDA;
> -   }
>
> -   ret = fdtdec_get_int(blob, node, "rockchip,data-width", -1);
> -   if (ret != -1) {
> +   if (!dev_read_s32(dev, "rockchip,data-width", )) {
> debug("LVDS data-width : %d\n", ret);
> if (ret == 24) {
> priv->format |= LVDS_24BIT;
> diff --git a/drivers/video/rockchip/rk_mipi.c 
> b/drivers/video/rockchip/rk_mipi.c
> index a77bdfd24d..f1c21bb8d7 100644
> --- a/drivers/video/rockchip/rk_mipi.c
> +++ b/drivers/video/rockchip/rk_mipi.c
> @@ -8,7 +8,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>  #include 
>  #include "rk_mipi.h"
> @@ -76,7 +75,7 @@ static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 
> val)
>  int rk_mipi_dsi_enable(struct udevice *dev,
>const struct display_timing *timing)
>  {
> -   int node, timing_node;
> +   ofnode node, timing_node;
> int val;
> struct rk_mipi_priv *priv = dev_get_priv(dev);
> uintptr_t regs = priv->regs;
> @@ -119,10 +118,10 @@ int rk_mipi_dsi_enable(struct udevice *dev,
> rk_mipi_dsi_write(regs, VID_PKT_SIZE, 0x4b0);
>
> /* Set dpi color coding depth 24 bit */
> -   timing_node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(dev),
> -
> "display-timings");
> -   node = 

Re: [RFC PATCH 1/1] Makefile: Expand legacy (non-DM) driver warnings

[Simon Glass]

Hi Niel,

On Wed, 25 Mar 2020 at 07:47, Niel Fourie  wrote:
>
> Expand warnings printed by Makefile after compile when legacy
> drivers are in use. These include:
>
> - CONFIG_HAVE_BLOCK_DEVICE without CONFIG_BLK
> - CONFIG_BOOTCOUNT_LIMIT without CONFIG_DM_BOOTCOUNT
> - CONFIG_MTD without CONFIG_DM_MTD
> - CONFIG_PHYLIB without CONFIG_DM_MDIO
> - CONFIG_POWER, also without CONFIG_DM_PMIC
> - Absence of CONFIG_RAM and CONFIG_SPL_RAM
>
> Also replaced existing CONFIG_DM_SPI warning for consistency.
> Removed CONFIG_BLK requirement for CONFIG_DM_USB, as all USB
> devices not block devices.
>
> Signed-off-by: Niel Fourie 
> Cc: Simon Glass 
> ---
>  Makefile | 73 +++-
>  1 file changed, 67 insertions(+), 6 deletions(-)

Could we add instructions on what should be done? It seems a little
unclear to me.

Regards,
Simon

Re: [PATCH v2 1/2] rockchip: video: Use ofnode_decode_display_timing() to parse timing

[Simon Glass]

On Thu, 26 Mar 2020 at 07:37, Kever Yang  wrote:
>
> Use ofnode_decode_display_timing() instead of
> fdtdec_decode_display_timing() to parse display timing, so that we can
> support live DT.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2: None
>
>  drivers/video/rockchip/rk_lvds.c | 3 +--
>  drivers/video/rockchip/rk_mipi.c | 3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)
>

Reviewed-by: Simon Glass 

Re: [PATCH] fdtdec: use full path in fdtdec_get_alias_seq comparison

[Simon Glass]

Hi Vladimir,

On Fri, 27 Mar 2020 at 11:29, Vladimir Oltean  wrote:
>
> From: Vladimir Oltean 
>
> Currently fdtdec_get_alias_seq() calls fdt_get_name() which returns only
> the name of the leaf node. So it needs to also trim the path of the
> alias to the leaf name only, leading to imperfect matches.
>
> This means that the following aliases:
>
> /aliases {
> eth0 = "/dspi@212/ethernet-switch@0/ports/port@0";
> eth1 = "/pcie@1f000/pci@0,5/ports/port@0";
> };
>
> will make fdtdec_get_alias_seq to return a seq of zero for both aliases,
> as the match will only take place on the "port@0" portion.
>
> Fix this by calling fdt_get_path and comparing the full path of the
> alias.
>
> Fixes: 5c33c9fdbb3f ("fdt: Add a function to get the alias sequence of a 
> node")
> Signed-off-by: Vladimir Oltean 
> ---
>  lib/fdtdec.c | 15 +++
>  1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index eb11fc898e30..55c1b36e823b 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -455,13 +455,14 @@ int fdtdec_get_alias_seq(const void *blob, const char 
> *base, int offset,
>  int *seqp)
>  {
> int base_len = strlen(base);
> -   const char *find_name;
> -   int find_namelen;
> int prop_offset;
> +   char path[64];
> +   int path_len;
> int aliases;
>
> -   find_name = fdt_get_name(blob, offset, _namelen);
> -   debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
> +   fdt_get_path(blob, offset, path, sizeof(path));

This is really slow. I would prefer not to change this for what seems
like an odd case.

Can you enable CONFIG_OF_LIVE instead?

> +   path_len = strlen(path);
> +   debug("Looking for '%s' at %d, path %s\n", base, offset, path);
>
> aliases = fdt_path_offset(blob, "/aliases");
> for (prop_offset = fdt_first_property_offset(blob, aliases);
> @@ -469,17 +470,15 @@ int fdtdec_get_alias_seq(const void *blob, const char 
> *base, int offset,
>  prop_offset = fdt_next_property_offset(blob, prop_offset)) {
> const char *prop;
> const char *name;
> -   const char *slash;
> int len, val;
>
> prop = fdt_getprop_by_offset(blob, prop_offset, , );
> debug("   - %s, %s\n", name, prop);
> -   if (len < find_namelen || *prop != '/' || prop[len - 1] ||
> +   if (len < path_len || *prop != '/' || prop[len - 1] ||
> strncmp(name, base, base_len))
> continue;
>
> -   slash = strrchr(prop, '/');
> -   if (strcmp(slash + 1, find_name))
> +   if (strcmp(prop, path))
> continue;
> val = trailing_strtol(name);
> if (val != -1) {
> --
> 2.17.1
>

Regards,
Simon

Re: [PATCH] x86: spi: Only use the fast SPI peripheral when support

[Simon Glass]

Hi Bin,



On Thu, 26 Mar 2020 at 10:38, Bin Meng  wrote:
>
> Hi Simon,
>
> On Fri, Mar 27, 2020 at 12:20 AM Simon Glass  wrote:
> >
> > HI Bin,
> >
> > On Wed, 25 Mar 2020 at 01:25, Bin Meng  wrote:
> > >
> > > Hi Simon,
> > >
> > > On Tue, Mar 24, 2020 at 9:45 PM Simon Glass  wrote:
> > > >
> > > > At present we query the memory map on boards which don't support it. Fix
> > > > this by only doing it on Apollo Lake.
> > > >
> > >
> > > I wonder isn't this check already covered in mrccache_get_region() below:
> > >
> > > ret = dm_spi_get_mmap(dev, _base, _size, );
> > > if (!ret) {
> > > entry->base = map_base;
> > > } else {
> > > ret = dev_read_u32_array(dev, "memory-map", reg, 2);
> > > if (ret)
> > > return log_msg_ret("Cannot find memory map\n", ret);
> > > entry->base = reg[0];
> > > }
> >
> > Yes it is, so long as dm_spi_get_mmap() returns an error, as it does
> > with my patch.
>
> So does ich_get_mmap_bus() returns 0 on chromebook_link?

Regards,
Simon

Re: [PATCH v3 00/21] dm: add support of new binding in gpio and pincontrol

[Simon Glass]

Hi Tom and Patrick,

On Fri, 27 Mar 2020 at 13:44, Simon Glass  wrote:
>
> Hi Tom,
>
> On Fri, 27 Mar 2020 at 13:21, Tom Rini  wrote:
> >
> > On Mon, Jan 13, 2020 at 11:34:54AM +0100, Patrick Delaunay wrote:
> >
> > > Hi,
> > >
> > > it is the V3 of "dm: add support of new binding in gpio and pincontrol"
> > > http://patchwork.ozlabs.org/project/uboot/list/?series=145044
> > >
> > > I rebase on v2020.01 and made some minor update after Simon Glass review.
> > > And I also split the previous patch was part of v2 08/14 to help review
> > >   http://patchwork.ozlabs.org/patch/1200865/
> > >   "gpio: add ops for configuration with dir flags"
> > >
> > > I create this patchset to prepare alignment of stm32mp157c-ev1
> > > device-tree with the linux kernel v5.4.
> > >
> > > One node for touch screen support use the IRQ line configuration
> > > using the new kernel binding introduced by the linux kernel
> > > commit ede033e1e863c from v5.1 ('dt-bindings:
> > > gpio: document the new pull-up/pull-down flags')
> > > https://github.com/torvalds/linux/commit/ede033e1e863c
> > >
> > > gt9147: goodix_ts@5d {
> > >   compatible = "goodix,gt9147";
> > >   reg = <0x5d>;
> > >   status = "okay";
> > >   irq-gpios = <_pinctrl 14
> > >   (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
> > >   irq-flags = ;
> > > };
> > >
> > > In Linux Kernel, the GPIO configuration (pull down/up) are now
> > > managed by GPIO lib but they are not yet supported by U-boot in
> > > uclass GPIO or pincontrol (when used by gpio-hog).
> > >
> > > This serie adds the support of theses new defines (with ops
> > > get_config/set_config) added in kernel GPIO binding and adds
> > > the test in sandbox.
> > >
> > > NB: In a second phase, the removed set_open_drain/get_open_drain
> > > API could be replaced by the new ops get_config/set_config.
> > >
> > > I also align the gpio binding file with the version from the
> > > latest kernel v5.3 (I don't think I remove any U-Boot specific
> > > part with this patch)
> > > I move the added information on gpio hog code in a new file
> > > doc/README.gpio.
> > >
> > > To have functional test, I convert pinctrl-generic to
> > > livetree otherwise the pins are not correctly configured in
> > > sandbox, when CONFIG_OF_LIVE is activated.
> > >
> > > For the test on gpio I add information for pin configuration in
> > > output of the command "pinmux status" with a simple pincontrol
> > > driver associated to GPIO driver.
> > >
> > > NB: after rebase on master branch, the sandbox test "ut dm power_domain"
> > >is failing; it was not the case for v2019.10.
> > >
> > > -- Captured stdout 
> > > call ---
> > > => ut dm power_domain
> > > Test: dm_test_power_domain: power-domain.c
> > > ../test/dm/test-main.c:72, dm_test_destroy(): 0 == uclass_destroy(uc): 
> > > Expected 0x0 (0), got 0xffea (-22)
> > > ../test/dm/test-main.c:107, dm_do_test(): 0 == dm_test_destroy(uts): 
> > > Expected 0x0 (0), got 0x1 (1)
> > > ../test/dm/test-main.c:169, dm_test_main(): 0 == dm_do_test(uts, test, 
> > > 1): Expected 0x0 (0), got 0x1 (1)
> > > =>
> > >
> > > I think it is linked to commit 52edfed65de9 ("dm: core:
> > > device: switch off power domain after device removal")
> > >
> > > After some investigation :
> > >
> > > 1/ pincontrol is remove in uclass_destroy(0)
> > >
> > > 2/ power domain is removed in uclass_destroy(0)
> > >
> > > 3/ device_chld_unbind()
> > > dev_power_domain_off
> > > -> probe power domain (again)
> > > --> pinctrl_select_state() in device_probe()
> > > ---> pincontrol is probed (again)
> > >
> > > 4/ at the end of  dev_power_domain_off() function the power domain
> > >is unbind in dev_power_domain_off
> > >device_remove(pd.dev, DM_REMOVE_NORMAL);
> > >
> > > So power domain driver is correctly removed but it is not the
> > > case for the pincontrol driver and that cause the issue.
> > >
> > > The problem occurs after my serie only because I introduce
> > > a second pincontrol driver for sandbox, so the dynamic changes
> > > but my serie is not the root cause of the issue.
> > >
> > > Workaround to allow test execution:
> > >   "dm: core: device: don't probe pinctrl for power domain"
> >
> > Simon, any idea on how to fix the test failure above?  I don't think
> > excluding the test is the right path forward.  Thanks!
>
> Not really. I will see if I can figure it out when I get back to things.
>

I found a solution and send out two patches.

Regards,
Simon

Re: [PATCH v3 7/8] libfdt: Make fdtdec_get_child_count() available for HOST

[Simon Glass]

Hi Kever,

On Thu, 26 Mar 2020 at 04:09, Kever Yang  wrote:
>
> The tool need to use fdtdec_get_child_count(), make it available for
> HOST_CC.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>  include/fdt_support.h |  1 +
>  lib/fdtdec.c  | 11 ---
>  lib/fdtdec_common.c   | 11 +++
>  3 files changed, 12 insertions(+), 11 deletions(-)
>
> diff --git a/include/fdt_support.h b/include/fdt_support.h
> index 3f4bc643d4..9b88fd1723 100644
> --- a/include/fdt_support.h
> +++ b/include/fdt_support.h
> @@ -329,6 +329,7 @@ int fdt_get_cells_len(const void *blob, char 
> *nr_cells_name);
>  #ifdef USE_HOSTCC
>  int fdtdec_get_int(const void *blob, int node, const char *prop_name,
> int default_val);
> +int fdtdec_get_child_count(const void *blob, int node);

Please can you add a function comment for this?

>  #endif
>  #ifdef CONFIG_FMAN_ENET
>  int fdt_update_ethernet_dt(void *blob);
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index 61af3472e6..c55c77a31c 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -807,17 +807,6 @@ int fdtdec_parse_phandle_with_args(const void *blob, int 
> src_node,
> return rc;
>  }
>
> -int fdtdec_get_child_count(const void *blob, int node)
> -{
> -   int subnode;
> -   int num = 0;
> -
> -   fdt_for_each_subnode(subnode, blob, node)
> -   num++;
> -
> -   return num;
> -}
> -
>  int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
>   u8 *array, int count)
>  {
> diff --git a/lib/fdtdec_common.c b/lib/fdtdec_common.c
> index 088e9e9063..5775992ef3 100644
> --- a/lib/fdtdec_common.c
> +++ b/lib/fdtdec_common.c
> @@ -53,3 +53,14 @@ unsigned int fdtdec_get_uint(const void *blob, int node, 
> const char *prop_name,
> debug("(not found)\n");
> return default_val;
>  }
> +
> +int fdtdec_get_child_count(const void *blob, int node)
> +{
> +   int subnode;
> +   int num = 0;
> +
> +   fdt_for_each_subnode(subnode, blob, node)
> +   num++;
> +
> +   return num;
> +}
> --
> 2.17.1
>

Regards,
SImon

[PATCH 1/2] dm: core: Add logging on unbind failure

[Simon Glass]

This failure path is tricky to debug since it continues after failure and
there are a lot of error paths. Add logging to help.

Signed-off-by: Simon Glass 
---

 drivers/core/device-remove.c | 20 
 drivers/core/uclass.c|  4 ++--
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index ff5b28cb6a7..8736fd9821e 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -10,6 +10,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -30,11 +31,14 @@ int device_chld_unbind(struct udevice *dev, struct driver 
*drv)
continue;
 
ret = device_unbind(pos);
-   if (ret && !saved_ret)
+   if (ret && !saved_ret) {
+   log_warning("device '%s' failed to unbind\n",
+   pos->name);
saved_ret = ret;
+   }
}
 
-   return saved_ret;
+   return log_ret(saved_ret);
 }
 
 int device_chld_remove(struct udevice *dev, struct driver *drv,
@@ -63,13 +67,13 @@ int device_unbind(struct udevice *dev)
int ret;
 
if (!dev)
-   return -EINVAL;
+   return log_msg_ret("dev", -EINVAL);
 
if (dev->flags & DM_FLAG_ACTIVATED)
-   return -EINVAL;
+   return log_msg_ret("active", -EINVAL);
 
if (!(dev->flags & DM_FLAG_BOUND))
-   return -EINVAL;
+   return log_msg_ret("not-bound", -EINVAL);
 
drv = dev->driver;
assert(drv);
@@ -77,12 +81,12 @@ int device_unbind(struct udevice *dev)
if (drv->unbind) {
ret = drv->unbind(dev);
if (ret)
-   return ret;
+   return log_msg_ret("unbind", ret);
}
 
ret = device_chld_unbind(dev, NULL);
if (ret)
-   return ret;
+   return log_msg_ret("child unbind", ret);
 
if (dev->flags & DM_FLAG_ALLOC_PDATA) {
free(dev->platdata);
@@ -98,7 +102,7 @@ int device_unbind(struct udevice *dev)
}
ret = uclass_unbind_device(dev);
if (ret)
-   return ret;
+   return log_msg_ret("uc", ret);
 
if (dev->parent)
list_del(>sibling_node);
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 58b19a42109..b24b677c55d 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -120,10 +120,10 @@ int uclass_destroy(struct uclass *uc)
   uclass_node);
ret = device_remove(dev, DM_REMOVE_NORMAL);
if (ret)
-   return ret;
+   return log_msg_ret("remove", ret);
ret = device_unbind(dev);
if (ret)
-   return ret;
+   return log_msg_ret("unbind", ret);
}
 
uc_drv = uc->uc_drv;
-- 
2.26.0.rc2.310.g2932bb562d-goog

[PATCH 2/2] dm: core: Add a way to skip powering down power domains

[Simon Glass]

When removing a device the power domains it uses are generally powered
off. But when we are trying to unbind all devices (e.g. for running tests)
we don't want to probe a device in the 'remove' path.

Add a new flag to skip this power-down step.

Signed-off-by: Simon Glass 
---

 drivers/core/device-remove.c |  3 ++-
 drivers/core/uclass.c|  2 +-
 include/dm/device.h  | 11 +++
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index 8736fd9821e..efdb0f29058 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -198,7 +198,8 @@ int device_remove(struct udevice *dev, uint flags)
}
}
 
-   if (!(drv->flags &
+   if (!(flags & DM_REMOVE_NO_PD) &&
+   !(drv->flags &
  (DM_FLAG_DEFAULT_PD_CTRL_OFF | DM_FLAG_REMOVE_WITH_PD_ON)) &&
dev != gd->cur_serial_dev)
dev_power_domain_off(dev);
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index b24b677c55d..68493029364 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -118,7 +118,7 @@ int uclass_destroy(struct uclass *uc)
while (!list_empty(>dev_head)) {
dev = list_first_entry(>dev_head, struct udevice,
   uclass_node);
-   ret = device_remove(dev, DM_REMOVE_NORMAL);
+   ret = device_remove(dev, DM_REMOVE_NORMAL | DM_REMOVE_NO_PD);
if (ret)
return log_msg_ret("remove", ret);
ret = device_unbind(dev);
diff --git a/include/dm/device.h b/include/dm/device.h
index a56164b19bb..17e57bf829c 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -80,18 +80,21 @@ struct driver_info;
  */
 enum {
/* Normal remove, remove all devices */
-   DM_REMOVE_NORMAL = 1 << 0,
+   DM_REMOVE_NORMAL= 1 << 0,
 
/* Remove devices with active DMA */
-   DM_REMOVE_ACTIVE_DMA = DM_FLAG_ACTIVE_DMA,
+   DM_REMOVE_ACTIVE_DMA= DM_FLAG_ACTIVE_DMA,
 
/* Remove devices which need some final OS preparation steps */
-   DM_REMOVE_OS_PREPARE = DM_FLAG_OS_PREPARE,
+   DM_REMOVE_OS_PREPARE= DM_FLAG_OS_PREPARE,
 
/* Add more use cases here */
 
/* Remove devices with any active flag */
-   DM_REMOVE_ACTIVE_ALL = DM_REMOVE_ACTIVE_DMA | DM_REMOVE_OS_PREPARE,
+   DM_REMOVE_ACTIVE_ALL= DM_REMOVE_ACTIVE_DMA | DM_REMOVE_OS_PREPARE,
+
+   /* Don't power down any attached power domains */
+   DM_REMOVE_NO_PD = 1 << 1,
 };
 
 /**
-- 
2.26.0.rc2.310.g2932bb562d-goog

[PATCH] common/board_f: Make reserve_mmu generic

[Ovidiu Panait]

Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu
routines.

For ARM, move the reserve_mmu definition from common/board_f.c to
arch/arm/lib/cache.c. Define arm_reserve_mmu and make it a weak define to allow
machines to override it (in mach-versal/cpu.c and mach-zynqmp/cpu.c).

Signed-off-by: Ovidiu Panait 
---
 arch/arm/include/asm/cache.h |  2 ++
 arch/arm/lib/cache.c | 33 +
 arch/arm/mach-versal/cpu.c   |  6 +-
 arch/arm/mach-zynqmp/cpu.c   |  6 +-
 common/board_f.c | 32 ++--
 include/init.h   |  2 +-
 6 files changed, 52 insertions(+), 29 deletions(-)

diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 950ec1e793..dbb9c554ae 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -49,4 +49,6 @@ void dram_bank_mmu_setup(int bank);
  */
 #define ARCH_DMA_MINALIGN  CONFIG_SYS_CACHELINE_SIZE
 
+int arm_reserve_mmu(void);
+
 #endif /* _ASM_CACHE_H */
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 007d4ebc49..76c10a577b 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -10,6 +10,8 @@
 #include 
 #include 
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * Flush range from all levels of d-cache/unified-cache.
  * Affects the range [start, start + size - 1].
@@ -118,3 +120,34 @@ void invalidate_l2_cache(void)
isb();
 }
 #endif
+
+int arch_reserve_mmu(void)
+{
+   return arm_reserve_mmu();
+}
+
+__weak int arm_reserve_mmu(void)
+{
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+   /* reserve TLB table */
+   gd->arch.tlb_size = PGTABLE_SIZE;
+   gd->relocaddr -= gd->arch.tlb_size;
+
+   /* round down to next 64 kB limit */
+   gd->relocaddr &= ~(0x1 - 1);
+
+   gd->arch.tlb_addr = gd->relocaddr;
+   debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
+ gd->arch.tlb_addr + gd->arch.tlb_size);
+
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+   /*
+* Record allocated tlb_addr in case gd->tlb_addr to be overwritten
+* with location within secure ram.
+*/
+   gd->arch.tlb_allocated = gd->arch.tlb_addr;
+#endif
+#endif
+
+   return 0;
+}
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 6ee6cd43ec..6c5da8b29e 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -10,6 +10,10 @@
 #include 
 #include 
 
+#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
+#include 
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #define VERSAL_MEM_MAP_USED5
@@ -98,7 +102,7 @@ u64 get_page_table_size(void)
 }
 
 #if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
 {
tcm_init(TCM_LOCK);
gd->arch.tlb_size = PGTABLE_SIZE;
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index 442427bc11..363a20b621 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -12,6 +12,10 @@
 #include 
 #include 
 
+#ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
+#include 
+#endif
+
 #define ZYNQ_SILICON_VER_MASK  0xF000
 #define ZYNQ_SILICON_VER_SHIFT 12
 
@@ -116,7 +120,7 @@ void tcm_init(u8 mode)
 #endif
 
 #ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
 {
tcm_init(TCM_LOCK);
gd->arch.tlb_size = PGTABLE_SIZE;
diff --git a/common/board_f.c b/common/board_f.c
index 82a164752a..2ab23cf239 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -385,33 +385,15 @@ static int reserve_round_4k(void)
return 0;
 }
 
-#ifdef CONFIG_ARM
-__weak int reserve_mmu(void)
+__weak int arch_reserve_mmu(void)
 {
-#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
-   /* reserve TLB table */
-   gd->arch.tlb_size = PGTABLE_SIZE;
-   gd->relocaddr -= gd->arch.tlb_size;
-
-   /* round down to next 64 kB limit */
-   gd->relocaddr &= ~(0x1 - 1);
-
-   gd->arch.tlb_addr = gd->relocaddr;
-   debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
- gd->arch.tlb_addr + gd->arch.tlb_size);
-
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-   /*
-* Record allocated tlb_addr in case gd->tlb_addr to be overwritten
-* with location within secure ram.
-*/
-   gd->arch.tlb_allocated = gd->arch.tlb_addr;
-#endif
-#endif
-
return 0;
 }
-#endif
+
+static int reserve_mmu(void)
+{
+   return arch_reserve_mmu();
+}
 
 static int reserve_video(void)
 {
@@ -970,9 +952,7 @@ static const init_fnc_t init_sequence_f[] = {
reserve_pram,
 #endif
reserve_round_4k,
-#ifdef CONFIG_ARM
reserve_mmu,
-#endif
reserve_video,
reserve_trace,
reserve_uboot,
diff --git a/include/init.h b/include/init.h
index 2a33a3fd1e..5700dc7ecb 100644
--- a/include/init.h
+++ b/include/init.h
@@ -145,7 +145,7 @@ int init_cache_f_r(void);
 int print_cpuinfo(void);
 #endif
 int 

Re: [PATCH v3 1/2] sunxi: fix support board-specific CONFIG_PREBOOT

[Jagan Teki]

On Sat, Mar 28, 2020 at 9:38 PM André Przywara  wrote:
>
> On 28/03/2020 14:32, Jagan Teki wrote:
> > On Tue, Mar 3, 2020 at 8:37 PM Jonas Smedegaard  wrote:
> >>
> >> commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
> >> Kconfig") intended to support CONFIG_PREBOOT, but
> >> include/configs/sunxi-common.h hardcodes preboot as part of internally
> >> defined CONSOLE_STDIN_SETTINGS, silently ignoring any board-specific
> >> CONFIG_PREBOOT.
> >>
> >> This commit moves sunxi-specific CONFIG_PREBOOT to Kconfig,
> >> which supports board-specific override.
> >>
> >> Tested-by: Jonas Smedegaard 
> >> Signed-off-by: Jonas Smedegaard 
> >> Series-Cc: Jagan Teki 
> >> Series-Cc: Lukasz Majewski 
> >> Series-Cc: Andre Przywara 
> >>
> >> ---
> >>
> >>
> >> Changes in v3:
> >> - move default setting to KConfig, thanks to Andre Przywara and Lukasz 
> >> Majewski
> >>
> >> Changes in v2:
> >> - Rephrase commit message to clarify relationship with KConfig entries
> >>
> >> ---
> >>  arch/arm/mach-sunxi/Kconfig| 3 +++
> >>  include/configs/sunxi-common.h | 1 -
> >>  2 files changed, 3 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> >> index 3a3b673430..9f16d903a0 100644
> >> --- a/arch/arm/mach-sunxi/Kconfig
> >> +++ b/arch/arm/mach-sunxi/Kconfig
> >> @@ -48,6 +48,9 @@ config DRAM_SUN50I_H6
> >>   Select this dram controller driver for some sun50i platforms,
> >>   like H6.
> >>
> >> +config PREBOOT
> >> +   default "usb start" if USB_KEYBOARD
> >> +
> >
> > This is already available in common/Kconfig better select there with
> > proper depends.
>
> Well, it's defined in common/Kconfig, but we just set the value here.
> This scheme is used all over the place already, check SYS_CLK_FREQ,
> SYS_CONFIG_NAME,  SYS_BOARD, SYS_SOC and so on.
>
> So I don't think it's a good idea to define those platform specific
> default values at the place of their original definition.
> Yes, we are doing this alot at the moment (especially for sunxi, and
> mostly only for sunxi), but I think this is starting to get out of hands
> now. If this is setting an example, we would clutter those platform
> specific settings all over the various subsystems.
>
> Actually I started some patches to move those "default xxx if
> ARCH_SUNXI" lines to arch/arm/mach-sunxi, so they are all in one place.
>
> So I think Jonas' patch is the right thing to do - unless it's really
> generic, so if we would drop the "if ARCH_SUNXI" clause (which would
> make some sense for this particular setting).

Yes, my idea is to skip platform depends here keeping USB_KEYBOARD
depends as 'usb start' is used many defconfigs. On that note, the new
patch need to change all places, but if require any other depends,
those need to change carefully.

Jagan.

Re: [PATCH v3 1/2] sunxi: fix support board-specific CONFIG_PREBOOT

[André Przywara]

On 28/03/2020 14:32, Jagan Teki wrote:
> On Tue, Mar 3, 2020 at 8:37 PM Jonas Smedegaard  wrote:
>>
>> commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
>> Kconfig") intended to support CONFIG_PREBOOT, but
>> include/configs/sunxi-common.h hardcodes preboot as part of internally
>> defined CONSOLE_STDIN_SETTINGS, silently ignoring any board-specific
>> CONFIG_PREBOOT.
>>
>> This commit moves sunxi-specific CONFIG_PREBOOT to Kconfig,
>> which supports board-specific override.
>>
>> Tested-by: Jonas Smedegaard 
>> Signed-off-by: Jonas Smedegaard 
>> Series-Cc: Jagan Teki 
>> Series-Cc: Lukasz Majewski 
>> Series-Cc: Andre Przywara 
>>
>> ---
>>
>>
>> Changes in v3:
>> - move default setting to KConfig, thanks to Andre Przywara and Lukasz 
>> Majewski
>>
>> Changes in v2:
>> - Rephrase commit message to clarify relationship with KConfig entries
>>
>> ---
>>  arch/arm/mach-sunxi/Kconfig| 3 +++
>>  include/configs/sunxi-common.h | 1 -
>>  2 files changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
>> index 3a3b673430..9f16d903a0 100644
>> --- a/arch/arm/mach-sunxi/Kconfig
>> +++ b/arch/arm/mach-sunxi/Kconfig
>> @@ -48,6 +48,9 @@ config DRAM_SUN50I_H6
>>   Select this dram controller driver for some sun50i platforms,
>>   like H6.
>>
>> +config PREBOOT
>> +   default "usb start" if USB_KEYBOARD
>> +
> 
> This is already available in common/Kconfig better select there with
> proper depends.

Well, it's defined in common/Kconfig, but we just set the value here.
This scheme is used all over the place already, check SYS_CLK_FREQ,
SYS_CONFIG_NAME,  SYS_BOARD, SYS_SOC and so on.

So I don't think it's a good idea to define those platform specific
default values at the place of their original definition.
Yes, we are doing this alot at the moment (especially for sunxi, and
mostly only for sunxi), but I think this is starting to get out of hands
now. If this is setting an example, we would clutter those platform
specific settings all over the various subsystems.

Actually I started some patches to move those "default xxx if
ARCH_SUNXI" lines to arch/arm/mach-sunxi, so they are all in one place.

So I think Jonas' patch is the right thing to do - unless it's really
generic, so if we would drop the "if ARCH_SUNXI" clause (which would
make some sense for this particular setting).

Cheers,
Andre.

[PATCH v2 2/2] rsa: sig: fix config signature check for fit with padding

[Philippe Reynes]

The signature check on config node is broken on fit with padding.
To compute the signature for config node, U-Boot compute the
signature on all properties of requested node for this config,
except for the property "data". But, when padding is used for
binary in a fit, there isn't a property "data" but two properties:
"data-offset" and "data-size". So to fix the check of signature,
we also don't use the properties "data-offset" and "data-size"
when checking the signature on config node.

Reviewed-by: Simon Glass 
Signed-off-by: Philippe Reynes 
---
 common/image-sig.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Changelog:
v2:
- fix spelling in commit message (thanks Simon)

diff --git a/common/image-sig.c b/common/image-sig.c
index 639a112..8a0ea28 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -362,7 +362,7 @@ int fit_image_verify_required_sigs(const void *fit, int 
image_noffset,
 int fit_config_check_sig(const void *fit, int noffset, int required_keynode,
 char **err_msgp)
 {
-   char * const exc_prop[] = {"data"};
+   char * const exc_prop[] = {"data", "data-size", "data-position"};
const char *prop, *end, *name;
struct image_sign_info info;
const uint32_t *strings;
-- 
2.7.4

[PATCH v2 0/2] test/py: vboot: fix signature check on config node

[Philippe Reynes]

The signature check of config node is broken when used on fit with padding.
We didn't see it before because this case is not covered by vboot test.

When check the signature for a config nde, u-boot uses all the properties
of the node referenced in the config node, except the property data. When
padding is used on fit, the property data is replaced by two properties:
data-offset and data-size, and u-boot uses those properties when checking
the signature. To fix this signature check, we simply ignore the properties
data-offset and data_size.

The first commit add some vboot tests that check signature on fit with
padding. The second commit fixes the signature check on config node for
fit with padding.

Philippe Reynes (2):
  test/py: vboot: add a test to check fit signature on fit with padding
  rsa: sig: fix config signature check for fit with padding

Changelog:
v2:
- fix spelling in commit message (thanks Simon)

 common/image-sig.c  |  2 +-
 test/py/tests/test_vboot.py | 42 --
 2 files changed, 29 insertions(+), 15 deletions(-)

-- 
2.7.4

[PATCH v2 1/2] test/py: vboot: add a test to check fit signature on fit with padding

[Philippe Reynes]

The pytest vboot does all his tests on fit without padding.
We add the same tests on fit with padding.

Reviewed-by: Simon Glass 
Signed-off-by: Philippe Reynes 
---
 test/py/tests/test_vboot.py | 42 --
 1 file changed, 28 insertions(+), 14 deletions(-)

Changelog:
v2:
- no change

diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
index 9c41ee5..32299be 100644
--- a/test/py/tests/test_vboot.py
+++ b/test/py/tests/test_vboot.py
@@ -94,7 +94,7 @@ def test_vboot(u_boot_console):
 util.run_and_log(cons, [mkimage, '-D', dtc_args, '-f',
 '%s%s' % (datadir, its), fit])
 
-def sign_fit(sha_algo):
+def sign_fit(sha_algo, options):
 """Sign the FIT
 
 Signs the FIT and writes the signature into it. It also writes the
@@ -103,10 +103,13 @@ def test_vboot(u_boot_console):
 Args:
 sha_algo: Either 'sha1' or 'sha256', to select the algorithm to
 use.
+options: Options to provide to mkimage.
 """
+args = [mkimage, '-F', '-k', tmpdir, '-K', dtb, '-r', fit]
+if options:
+args += options.split(' ')
 cons.log.action('%s: Sign images' % sha_algo)
-util.run_and_log(cons, [mkimage, '-F', '-k', tmpdir, '-K', dtb,
-'-r', fit])
+util.run_and_log(cons, args)
 
 def sign_fit_norequire(sha_algo):
 """Sign the FIT
@@ -142,7 +145,7 @@ def test_vboot(u_boot_console):
 handle.write(struct.pack(">I", size))
 return struct.unpack(">I", total_size)[0]
 
-def test_with_algo(sha_algo, padding):
+def test_with_algo(sha_algo, padding, sign_options):
 """Test verified boot with the given hash algorithm.
 
 This is the main part of the test code. The same procedure is followed
@@ -151,6 +154,9 @@ def test_vboot(u_boot_console):
 Args:
 sha_algo: Either 'sha1' or 'sha256', to select the algorithm to
 use.
+padding: Either '' or '-pss', to select the padding to use for the
+rsa signature algorithm.
+sign_options: Options to mkimage when signing a fit image.
 """
 # Compile our device tree files for kernel and U-Boot. These are
 # regenerated here since mkimage will modify them (by adding a
@@ -164,7 +170,7 @@ def test_vboot(u_boot_console):
 run_bootm(sha_algo, 'unsigned images', 'dev-', True)
 
 # Sign images with our dev keys
-sign_fit(sha_algo)
+sign_fit(sha_algo, sign_options)
 run_bootm(sha_algo, 'signed images', 'dev+', True)
 
 # Create a fresh .dtb without the public keys
@@ -175,7 +181,7 @@ def test_vboot(u_boot_console):
 run_bootm(sha_algo, 'unsigned config', '%s+ OK' % sha_algo, True)
 
 # Sign images with our dev keys
-sign_fit(sha_algo)
+sign_fit(sha_algo, sign_options)
 run_bootm(sha_algo, 'signed config', 'dev+', True)
 
 cons.log.action('%s: Check signed config on the host' % sha_algo)
@@ -211,7 +217,7 @@ def test_vboot(u_boot_console):
 util.run_and_log_expect_exception(cons, [fit_check_sign, '-f', fit,
 '-k', dtb], 1, 'Failed to verify required signature')
 
-def test_required_key(sha_algo, padding):
+def test_required_key(sha_algo, padding, sign_options):
 """Test verified boot with the given hash algorithm.
 
 This function test if u-boot reject an image when a required
@@ -220,6 +226,9 @@ def test_vboot(u_boot_console):
 Args:
 sha_algo: Either 'sha1' or 'sha256', to select the algorithm to
 use.
+padding: Either '' or '-pss', to select the padding to use for the
+rsa signature algorithm.
+sign_options: Options to mkimage when signing a fit image.
 """
 # Compile our device tree files for kernel and U-Boot. These are
 # regenerated here since mkimage will modify them (by adding a
@@ -234,9 +243,9 @@ def test_vboot(u_boot_console):
 # This FIT should not be accepted by u-boot because the key prod is 
required
 cons.log.action('%s: Test FIT with configs images' % sha_algo)
 make_fit('sign-configs-%s%s-prod.its' % (sha_algo , padding))
-sign_fit(sha_algo)
+sign_fit(sha_algo, sign_options)
 make_fit('sign-configs-%s%s.its' % (sha_algo , padding))
-sign_fit(sha_algo)
+sign_fit(sha_algo, sign_options)
 
 run_bootm(sha_algo, 'signed configs', '', False)
 
@@ -282,11 +291,16 @@ def test_vboot(u_boot_console):
 # afterwards.
 old_dtb = cons.config.dtb
 cons.config.dtb = dtb
-test_with_algo('sha1','')
-test_with_algo('sha1','-pss')
-test_with_algo('sha256','')
-test_with_algo('sha256','-pss')
-test_required_key('sha256','-pss')
+  

Re: [PATCH v3 1/2] sunxi: fix support board-specific CONFIG_PREBOOT

[Jonas Smedegaard]

Quoting Jagan Teki (2020-03-28 15:32:46)
> On Tue, Mar 3, 2020 at 8:37 PM Jonas Smedegaard  wrote:
> >
> > commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
> > Kconfig") intended to support CONFIG_PREBOOT, but
> > include/configs/sunxi-common.h hardcodes preboot as part of internally
> > defined CONSOLE_STDIN_SETTINGS, silently ignoring any board-specific
> > CONFIG_PREBOOT.
> >
> > This commit moves sunxi-specific CONFIG_PREBOOT to Kconfig,
> > which supports board-specific override.
> >
> > Tested-by: Jonas Smedegaard 
> > Signed-off-by: Jonas Smedegaard 
> > Series-Cc: Jagan Teki 
> > Series-Cc: Lukasz Majewski 
> > Series-Cc: Andre Przywara 
> >
> > ---
> >
> >
> > Changes in v3:
> > - move default setting to KConfig, thanks to Andre Przywara and Lukasz 
> > Majewski
> >
> > Changes in v2:
> > - Rephrase commit message to clarify relationship with KConfig entries
> >
> > ---
> >  arch/arm/mach-sunxi/Kconfig| 3 +++
> >  include/configs/sunxi-common.h | 1 -
> >  2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> > index 3a3b673430..9f16d903a0 100644
> > --- a/arch/arm/mach-sunxi/Kconfig
> > +++ b/arch/arm/mach-sunxi/Kconfig
> > @@ -48,6 +48,9 @@ config DRAM_SUN50I_H6
> >   Select this dram controller driver for some sun50i platforms,
> >   like H6.
> >
> > +config PREBOOT
> > +   default "usb start" if USB_KEYBOARD
> > +
> 
> This is already available in common/Kconfig better select there with
> proper depends.

Makes sense, I will make another revision...

Thanks!

 - Jonas

-- 
 * Jonas Smedegaard - idealist & Internet-arkitekt
 * Tlf.: +45 40843136  Website: http://dr.jones.dk/

 [x] quote me freely  [ ] ask before reusing  [ ] keep private

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Description: signature

Re: [PATCH v3 1/2] sunxi: fix support board-specific CONFIG_PREBOOT

[Jagan Teki]

On Tue, Mar 3, 2020 at 8:37 PM Jonas Smedegaard  wrote:
>
> commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
> Kconfig") intended to support CONFIG_PREBOOT, but
> include/configs/sunxi-common.h hardcodes preboot as part of internally
> defined CONSOLE_STDIN_SETTINGS, silently ignoring any board-specific
> CONFIG_PREBOOT.
>
> This commit moves sunxi-specific CONFIG_PREBOOT to Kconfig,
> which supports board-specific override.
>
> Tested-by: Jonas Smedegaard 
> Signed-off-by: Jonas Smedegaard 
> Series-Cc: Jagan Teki 
> Series-Cc: Lukasz Majewski 
> Series-Cc: Andre Przywara 
>
> ---
>
>
> Changes in v3:
> - move default setting to KConfig, thanks to Andre Przywara and Lukasz 
> Majewski
>
> Changes in v2:
> - Rephrase commit message to clarify relationship with KConfig entries
>
> ---
>  arch/arm/mach-sunxi/Kconfig| 3 +++
>  include/configs/sunxi-common.h | 1 -
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> index 3a3b673430..9f16d903a0 100644
> --- a/arch/arm/mach-sunxi/Kconfig
> +++ b/arch/arm/mach-sunxi/Kconfig
> @@ -48,6 +48,9 @@ config DRAM_SUN50I_H6
>   Select this dram controller driver for some sun50i platforms,
>   like H6.
>
> +config PREBOOT
> +   default "usb start" if USB_KEYBOARD
> +

This is already available in common/Kconfig better select there with
proper depends.

[PATCH v2 3/5] azure/gitlab/travis: Add qemu-riscv32 testing

[Bin Meng]

This adds the qemu-riscv32_defconfig test configuration.

Signed-off-by: Bin Meng 

---

Changes in v2:
- Update travis to add qemu-riscv32 testing

 .azure-pipelines.yml | 5 +
 .gitlab-ci.yml   | 9 +
 .travis.yml  | 7 +++
 3 files changed, 21 insertions(+)

diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index f66d58a..99a93cc 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -215,6 +215,10 @@ jobs:
   TEST_PY_BD: "qemu-ppce500"
   TEST_PY_TEST_SPEC: "not sleep"
   BUILDMAN: "^qemu-ppce500$"
+qemu_riscv32:
+  TEST_PY_BD: "qemu-riscv32"
+  TEST_PY_TEST_SPEC: "not sleep"
+  BUILDMAN: "^qemu-riscv32$"
 qemu_riscv64:
   TEST_PY_BD: "qemu-riscv64"
   TEST_PY_TEST_SPEC: "not sleep"
@@ -263,6 +267,7 @@ jobs:
   grub-mkimage --prefix=\"\" -o ~/grub_x86.efi -O i386-efi normal  
echo lsefimmap lsefi lsefisystab efinet tftp minicmd
   grub-mkimage --prefix=\"\" -o ~/grub_x64.efi -O x86_64-efi normal  
echo lsefimmap lsefi lsefisystab efinet tftp minicmd
   cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi
+  cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
   cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
   cp /opt/grub/grubarm.efi ~/grub_arm.efi
   # the below corresponds to .gitlab-ci.yml "script"
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 55943bb..39437ce 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -21,6 +21,7 @@ stages:
 - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal  echo 
lsefimmap lsefi lsefisystab efinet tftp minicmd
 - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal  echo 
lsefimmap lsefi lsefisystab efinet tftp minicmd
 - cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi
+- cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
 - cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
 - cp /opt/grub/grubarm.efi ~/grub_arm.efi
 
@@ -296,6 +297,14 @@ qemu-ppce500 test.py:
 BUILDMAN: "^qemu-ppce500$"
   <<: *buildman_and_testpy_dfn
 
+qemu-riscv32 test.py:
+  tags: [ 'all' ]
+  variables:
+TEST_PY_BD: "qemu-riscv32"
+TEST_PY_TEST_SPEC: "not sleep"
+BUILDMAN: "^qemu-riscv32$"
+  <<: *buildman_and_testpy_dfn
+
 qemu-riscv64 test.py:
   tags: [ 'all' ]
   variables:
diff --git a/.travis.yml b/.travis.yml
index 10915b26..3226c0e 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -571,6 +571,13 @@ matrix:
   QEMU_TARGET="ppc-softmmu"
   BUILDMAN="^qemu-ppce500$"
   TOOLCHAIN="powerpc"
+- name: "test/py qemu-riscv32"
+  env:
+- TEST_PY_BD="qemu-riscv32"
+  TEST_PY_TEST_SPEC="not sleep"
+  QEMU_TARGET="riscv32-softmmu"
+  BUILDMAN="^qemu-riscv32$"
+  TOOLCHAIN="riscv"
 - name: "test/py qemu-riscv64"
   env:
 - TEST_PY_BD="qemu-riscv64"
-- 
2.7.4

[PATCH v2 4/5] test/py: Update u_boot_utils.find_ram_base to bypass the low 2MiB memory

[Bin Meng]

On some RISC-V targets the low memory is protected that prevents
S-mode U-Boot from access.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 test/py/u_boot_utils.py | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py
index bf2a0fc..939d82e 100644
--- a/test/py/u_boot_utils.py
+++ b/test/py/u_boot_utils.py
@@ -237,10 +237,11 @@ def find_ram_base(u_boot_console):
 raise Exception('Failed to find RAM bank start in `bdinfo`')
 
 # We don't want ram_base to be zero as some functions test if the given
-# address is NULL (0). Let's add 2MiB then (size of an ARM LPAE/v8 
section).
+# address is NULL (0). Besides, on some RISC-V targets the low memory
+# is protected that prevents S-mode U-Boot from access.
+# Let's add 2MiB then (size of an ARM LPAE/v8 section).
 
-if ram_base == 0:
-ram_base += 1024 * 1024 * 2
+ram_base += 1024 * 1024 * 2
 
 return ram_base
 
-- 
2.7.4

[PATCH v2 2/5] travis: Build GRUB image for RISC-V 32-bit and 64-bit

[Bin Meng]

This adds the GRUB image build for RISC-V 32-bit and 64-bit.

Signed-off-by: Bin Meng 

---

Changes in v2:
- new patch: "travis: Build GRUB image for RISC-V 32-bit and 64-bit"

 .travis.yml | 47 +++
 1 file changed, 47 insertions(+)

diff --git a/.travis.yml b/.travis.yml
index 7bdb56a..10915b26 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -97,6 +97,7 @@ before_script:
 fi
   - if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman 
--fetch-arch powerpc; fi
   - if [[ "${TOOLCHAIN}" == "riscv" ]]; then
+   ./tools/buildman/buildman --fetch-arch riscv32 &&
./tools/buildman/buildman --fetch-arch riscv64;
 fi
   - if [[ "${QEMU_TARGET}" != "" ]]; then
@@ -150,6 +151,46 @@ before_script:
true &&
popd;
 fi
+  - if [[ "${QEMU_TARGET}" == "riscv32-softmmu" ]]; then
+   git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
+   pushd /tmp/grub &&
+   git checkout grub-2.04 &&
+   ./bootstrap &&
+   ./configure --target=riscv32 --with-platform=efi
+   CC=gcc
+   
TARGET_CC=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv32-linux/bin/riscv32-linux-gcc
+   
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv32-linux/bin/riscv32-linux-objcopy
+   
TARGET_STRIP=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv32-linux/bin/riscv32-linux-strip
+   
TARGET_NM=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv32-linux/bin/riscv32-linux-nm
+   
TARGET_RANLIB=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv32-linux/bin/riscv32-linux-ranlib
 &&
+   make -j4 &&
+   ./grub-mkimage -O riscv32-efi -o ~/grub_riscv32.efi --prefix= -d
+   grub-core cat chain configfile echo efinet ext2 fat halt help linux
+   lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
+   search search_fs_file search_fs_uuid search_label serial sleep test
+   true &&
+   popd;
+fi
+  - if [[ "${QEMU_TARGET}" == "riscv64-softmmu" ]]; then
+   git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
+   pushd /tmp/grub &&
+   git checkout grub-2.04 &&
+   ./bootstrap &&
+   ./configure --target=riscv64 --with-platform=efi
+   CC=gcc
+   
TARGET_CC=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-gcc
+   
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-objcopy
+   
TARGET_STRIP=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-strip
+   
TARGET_NM=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-nm
+   
TARGET_RANLIB=~/.buildman-toolchains/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-ranlib
 &&
+   make -j4 &&
+   ./grub-mkimage -O riscv64-efi -o ~/grub_riscv64.efi --prefix= -d
+   grub-core cat chain configfile echo efinet ext2 fat halt help linux
+   lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
+   search search_fs_file search_fs_uuid search_label serial sleep test
+   true &&
+   popd;
+fi
 
 script:
  # Comments must be outside the command strings below, or the Travis parser
@@ -178,6 +219,12 @@ script:
if [[ -e ~/grub_arm64.efi ]]; then
  cp ~/grub_arm64.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
+   if [[ -e ~/grub_riscv32.efi ]]; then
+ cp ~/grub_riscv32.efi $UBOOT_TRAVIS_BUILD_DIR/;
+   fi;
+   if [[ -e ~/grub_riscv64.efi ]]; then
+ cp ~/grub_riscv64.efi $UBOOT_TRAVIS_BUILD_DIR/;
+   fi;
if [[ "${TEST_PY_BD}" != "" ]]; then
  virtualenv -p /usr/bin/python3 /tmp/venv;
  . /tmp/venv/bin/activate;
-- 
2.7.4

[PATCH v2 1/5] travis: Replace pre-built ARM/ARM64 GRUB images with the one built from source

[Bin Meng]

As of today travis uses the pre-built GRUB ARM/ARM64 images from
opensuse. But azure/gitlab are using images built from GRUB 2.04
source. This updates travis to build GRUB ARM/ARM64 UEFI targets
from source, to keep in sync with azure/gitlab.

Signed-off-by: Bin Meng 

---

Changes in v2:
- new patch: "travis: Replace pre-built ARM/ARM64 GRUB images with the one 
built from source"

 .travis.yml | 55 +--
 1 file changed, 49 insertions(+), 6 deletions(-)

diff --git a/.travis.yml b/.travis.yml
index c59bd77..7bdb56a 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -14,6 +14,7 @@ addons:
 - ubuntu-toolchain-r-test
 - llvm-toolchain-bionic-7
 packages:
+- autopoint
 - cppcheck
 - sloccount
 - sparse
@@ -55,10 +56,6 @@ install:
  - cat ~/.buildman
  - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal  echo 
lsefimmap lsefi lsefisystab efinet tftp minicmd
  - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal  echo 
lsefimmap lsefi lsefisystab efinet tftp minicmd
- - mkdir ~/grub2-arm
- - ( cd ~/grub2-arm; wget -O - 
http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm
 | rpm2cpio | cpio -di )
- - mkdir ~/grub2-arm64
- - ( cd ~/grub2-arm64; wget -O - 
http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm
 | rpm2cpio | cpio -di )
  - wget 
http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.deb 
&& sudo dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb
 
 env:
@@ -112,6 +109,48 @@ before_script:
popd;
 fi
 
+  # Build GRUB UEFI targets
+  - if [[ "${QEMU_TARGET}" == "arm-softmmu" ]]; then
+   git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
+   pushd /tmp/grub &&
+   git checkout grub-2.04 &&
+   ./bootstrap &&
+   ./configure --target=arm --with-platform=efi
+   CC=gcc
+   
TARGET_CC=~/.buildman-toolchains/gcc-7.3.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc
+   
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-7.3.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-objcopy
+   
TARGET_STRIP=~/.buildman-toolchains/gcc-7.3.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-strip
+   
TARGET_NM=~/.buildman-toolchains/gcc-7.3.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-nm
+   
TARGET_RANLIB=~/.buildman-toolchains/gcc-7.3.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ranlib
 &&
+   make -j4 &&
+   ./grub-mkimage -O arm-efi -o ~/grub_arm.efi --prefix= -d
+   grub-core cat chain configfile echo efinet ext2 fat halt help linux
+   lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
+   search search_fs_file search_fs_uuid search_label serial sleep test
+   true &&
+   popd;
+fi
+  - if [[ "${QEMU_TARGET}" == "aarch64-softmmu" ]]; then
+   git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
+   pushd /tmp/grub &&
+   git checkout grub-2.04 &&
+   ./bootstrap &&
+   ./configure --target=aarch64 --with-platform=efi
+   CC=gcc
+   
TARGET_CC=~/.buildman-toolchains/gcc-7.3.0-nolibc/aarch64-linux/bin/aarch64-linux-gcc
+   
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-7.3.0-nolibc/aarch64-linux/bin/aarch64-linux-objcopy
+   
TARGET_STRIP=~/.buildman-toolchains/gcc-7.3.0-nolibc/aarch64-linux/bin/aarch64-linux-strip
+   
TARGET_NM=~/.buildman-toolchains/gcc-7.3.0-nolibc/aarch64-linux/bin/aarch64-linux-nm
+   
TARGET_RANLIB=~/.buildman-toolchains/gcc-7.3.0-nolibc/aarch64-linux/bin/aarch64-linux-ranlib
 &&
+   make -j4 &&
+   ./grub-mkimage -O arm64-efi -o ~/grub_arm64.efi --prefix= -d
+   grub-core cat chain configfile echo efinet ext2 fat halt help linux
+   lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
+   search search_fs_file search_fs_uuid search_label serial sleep test
+   true &&
+   popd;
+fi
+
 script:
  # Comments must be outside the command strings below, or the Travis parser
  # will get confused.
@@ -133,8 +172,12 @@ script:
  - export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/;
-   cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi 
$UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi;
-   cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi 
$UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi;
+   if [[ -e ~/grub_arm.efi ]]; then
+ cp ~/grub_arm.efi $UBOOT_TRAVIS_BUILD_DIR/;
+   fi;
+   if [[ -e ~/grub_arm64.efi ]]; then
+ cp ~/grub_arm64.efi $UBOOT_TRAVIS_BUILD_DIR/;
+   fi;
if [[ "${TEST_PY_BD}" != "" ]]; then
  virtualenv -p /usr/bin/python3 /tmp/venv;
  . /tmp/venv/bin/activate;
-- 
2.7.4

[PATCH v2 0/5] azure/gitlab/travis: Add more RISC-V boards testing

[Bin Meng]

At presetn only qemu-riscv64 is tested in our CI pipeline.

This adds qemu-riscv32 and qemu-riscv{32,64}_spl testing.

For Azure/Gitlab, this depends on a new Docker image below:
http://patchwork.ozlabs.org/project/uboot/list/?series=166924
The following results are based on the new Docker image.

Azure results:
https://dev.azure.com/bmeng/GitHub/_build/results?buildId=195=results

gitlab results:
https://gitlab.denx.de/u-boot/custodians/u-boot-x86/pipelines/2548

travis results:
https://travis-ci.org/github/lbmeng/u-boot/builds/668014425

Changes in v2:
- new patch: "travis: Replace pre-built ARM/ARM64 GRUB images with the one 
built from source"
- new patch: "travis: Build GRUB image for RISC-V 32-bit and 64-bit"
- Update travis to add qemu-riscv32 testing
- Update travis to add RISC-V SPL testing

Bin Meng (5):
  travis: Replace pre-built ARM/ARM64 GRUB images with the one built
from source
  travis: Build GRUB image for RISC-V 32-bit and 64-bit
  azure/gitlab/travis: Add qemu-riscv32 testing
  test/py: Update u_boot_utils.find_ram_base to bypass the low 2MiB
memory
  azure/gitlab/travis: Add RISC-V SPL testing

 .azure-pipelines.yml|  21 
 .gitlab-ci.yml  |  33 
 .travis.yml | 131 +---
 test/py/u_boot_utils.py |   7 +--
 4 files changed, 183 insertions(+), 9 deletions(-)

-- 
2.7.4

[PATCH v2 5/5] azure/gitlab/travis: Add RISC-V SPL testing

[Bin Meng]

This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64,
we test SPL running in M-mode and U-Boot proper running in S-mode,
with a 4-core SMP configuration.

Signed-off-by: Bin Meng 

---

Changes in v2:
- Update travis to add RISC-V SPL testing

 .azure-pipelines.yml | 16 
 .gitlab-ci.yml   | 24 
 .travis.yml  | 22 ++
 3 files changed, 62 insertions(+)

diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 99a93cc..fc4836c 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -223,6 +223,14 @@ jobs:
   TEST_PY_BD: "qemu-riscv64"
   TEST_PY_TEST_SPEC: "not sleep"
   BUILDMAN: "^qemu-riscv64$"
+qemu_riscv32_spl:
+  TEST_PY_BD: "qemu-riscv32_spl"
+  TEST_PY_TEST_SPEC: "not sleep"
+  BUILDMAN: "^qemu-riscv32_spl$"
+qemu_riscv64_spl:
+  TEST_PY_BD: "qemu-riscv64_spl"
+  TEST_PY_TEST_SPEC: "not sleep"
+  BUILDMAN: "^qemu-riscv64_spl$"
 qemu_x86:
   TEST_PY_BD: "qemu-x86"
   TEST_PY_TEST_SPEC: "not sleep"
@@ -270,6 +278,14 @@ jobs:
   cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
   cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
   cp /opt/grub/grubarm.efi ~/grub_arm.efi
+  if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
+  wget -O - 
https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz
 | tar -C /tmp -xJ;
+  export 
OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+  fi
+  if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+  wget -O - 
https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz
 | tar -C /tmp -xJ;
+  export 
OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+  fi
   # the below corresponds to .gitlab-ci.yml "script"
   cd ${WORK_DIR}
   if [[ "${BUILDMAN}" != "" ]]; then
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 39437ce..6b7aa33 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -24,6 +24,14 @@ stages:
 - cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
 - cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
 - cp /opt/grub/grubarm.efi ~/grub_arm.efi
+- if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
+wget -O - 
https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz
 | tar -C /tmp -xJ;
+export 
OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+  fi
+- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+wget -O - 
https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz
 | tar -C /tmp -xJ;
+export 
OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+  fi
 
   after_script:
 - rm -rf /tmp/uboot-test-hooks /tmp/venv
@@ -313,6 +321,22 @@ qemu-riscv64 test.py:
 BUILDMAN: "^qemu-riscv64$"
   <<: *buildman_and_testpy_dfn
 
+qemu-riscv32_spl test.py:
+  tags: [ 'all' ]
+  variables:
+TEST_PY_BD: "qemu-riscv32_spl"
+TEST_PY_TEST_SPEC: "not sleep"
+BUILDMAN: "^qemu-riscv32_spl$"
+  <<: *buildman_and_testpy_dfn
+
+qemu-riscv64_spl test.py:
+  tags: [ 'all' ]
+  variables:
+TEST_PY_BD: "qemu-riscv64_spl"
+TEST_PY_TEST_SPEC: "not sleep"
+BUILDMAN: "^qemu-riscv64_spl$"
+  <<: *buildman_and_testpy_dfn
+
 qemu-x86 test.py:
   tags: [ 'all' ]
   variables:
diff --git a/.travis.yml b/.travis.yml
index 3226c0e..fddaee8 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -191,6 +191,14 @@ before_script:
true &&
popd;
 fi
+  - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
+   wget -O - 
https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz
 | tar -C /tmp -xJ;
+   export 
OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+fi
+  - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+   wget -O - 
https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz
 | tar -C /tmp -xJ;
+   export 
OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+fi
 
 script:
  # Comments must be outside the command strings below, or the Travis parser
@@ -585,6 +593,20 @@ matrix:
   QEMU_TARGET="riscv64-softmmu"
   BUILDMAN="^qemu-riscv64$"
   TOOLCHAIN="riscv"
+- name: "test/py qemu-riscv32_spl"
+  env:
+- TEST_PY_BD="qemu-riscv32_spl"
+  TEST_PY_TEST_SPEC="not sleep"
+  QEMU_TARGET="riscv32-softmmu"
+  BUILDMAN="^qemu-riscv32_spl$"
+  TOOLCHAIN="riscv"
+- name: "test/py qemu-riscv64_spl"
+  env:
+- TEST_PY_BD="qemu-riscv64_spl"
+  TEST_PY_TEST_SPEC="not sleep"
+  QEMU_TARGET="riscv64-softmmu"
+  

Re: [PATCH 1/1] vexpress_ca9x4: Enable use of correct DTB file and restore EFI loader.

[Heinrich Schuchardt]

On 3/28/20 10:36 AM, Heinrich Schuchardt wrote:

On 3/27/20 8:18 AM, Kristian Amlie wrote:

On 27/03/2020 06:44, Heinrich Schuchardt wrote:

On 3/27/20 2:39 AM, Tom Rini wrote:

On Tue, Feb 25, 2020 at 06:22:16PM +0100, Kristian Amlie wrote:


EFI was disabled in f95b8a4b5f64f because of the missing DTB file,
and indeed, the DTB file is required to load recent versions of GRUB
(2.04) correctly.

Signed-off-by: Kristian Amlie 


Applied to u-boot/master, thanks!



Since this patch is merged I get errors on Gitlab for vexpress_ca9x4:

https://gitlab.denx.de/u-boot/custodians/u-boot-efi/-/jobs/69269

Filename 'lib/efi_loader/helloworld.efi'.
Load address: 0x6000
Loading: *#
  1.8 MiB/s
done
Bytes transferred = 1840 (730 hex)
smc911x: MAC 52:54:00:12:34:56
=> => crc32 6000 $filesize
CRC32 for 6000 ... 672f ==> f5c77855
=> => bootefi 6000
78Scanning disks on mmc...
Card did not respond to voltage select!
MMC Device 1 not found
MMC Device 2 not found
MMC Device 3 not found
Found 0 disks
ERROR: need device tree


Is the "bootefi 6000" command correct? Doesn't "bootefi" need to be
called with both an EFI binary address and a device tree address?



bootefi uses $fdtcontroladdr as fallback for the device tree. But this
variable is only available if CONFIG_OF_CONTROL is set. We should adjust
the python test to check this.

CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
This line is incorrect. We never use a .dtb extension here.


I got that wrong. There are two variables which are somewhat related:

CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"

One uses the extension, the other doesn't.

So your patch seems to be correct. The error is in the Python test that
does not check if OF_CONTROL is set.

Best regards

Heinrich

[PATCH 1/1] test/py: UEFI helloworld requires OF_CONTROL

[Heinrich Schuchardt]

With CONFIG_OF_CONTROL environment variable $fdtcontroladdr is not defined
and test_efi_helloworld_net() fails.

Signed-off-by: Heinrich Schuchardt 
---
@Tom
This fixes the problem with vexpress_ca9x4 on Gitlab.
---
 test/py/tests/test_efi_loader.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/test/py/tests/test_efi_loader.py b/test/py/tests/test_efi_loader.py
index adf9d77452..e105645484 100644
--- a/test/py/tests/test_efi_loader.py
+++ b/test/py/tests/test_efi_loader.py
@@ -141,12 +141,13 @@ def fetch_tftp_file(u_boot_console, env_conf):

 return addr

+@pytest.mark.buildconfigspec('of_control')
 @pytest.mark.buildconfigspec('cmd_bootefi_hello_compile')
 def test_efi_helloworld_net(u_boot_console):
 """Run the helloworld.efi binary via TFTP.

-The helloworld.efi file is downloaded from the TFTP server and gets
-executed.
+The helloworld.efi file is downloaded from the TFTP server and is executed
+using the fallback device tree at $fdtcontroladdr.
 """

 addr = fetch_tftp_file(u_boot_console, 'env__efi_loader_helloworld_file')
--
2.25.1

[RFC PATCH v2 08/13] video: add nexell video driver (soc: mlc, mipi)

[Stefan Bosch]

Low level functions for MLC (Multi Layer Control) and MIPI (Mobile
Industry Processor Interface).

Signed-off-by: Stefan Bosch 
---

Changes in v2: None

 drivers/video/nexell/soc/s5pxx18_soc_mipi.c |  580 +
 drivers/video/nexell/soc/s5pxx18_soc_mipi.h |  291 +
 drivers/video/nexell/soc/s5pxx18_soc_mlc.c  | 1861 +++
 drivers/video/nexell/soc/s5pxx18_soc_mlc.h  |  429 ++
 4 files changed, 3161 insertions(+)
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mipi.c
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mipi.h
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mlc.c
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mlc.h

diff --git a/drivers/video/nexell/soc/s5pxx18_soc_mipi.c 
b/drivers/video/nexell/soc/s5pxx18_soc_mipi.c
new file mode 100644
index 000..1000ddb
--- /dev/null
+++ b/drivers/video/nexell/soc/s5pxx18_soc_mipi.c
@@ -0,0 +1,580 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016  Nexell Co., Ltd.
+ *
+ * Author: junghyun, kim 
+ */
+
+#include 
+#include 
+
+#include "s5pxx18_soc_disptop.h"
+#include "s5pxx18_soc_mipi.h"
+
+static struct nx_mipi_register_set *__g_pregister[NUMBER_OF_MIPI_MODULE];
+
+int nx_mipi_smoke_test(u32 module_index)
+{
+   register struct nx_mipi_register_set *pregister;
+
+   pregister = __g_pregister[module_index];
+
+   if (pregister->csis_config_ch0 != 0x00FC)
+   return false;
+
+   if (pregister->dsim_intmsk != 0xB337)
+   return false;
+
+   writel(0xDEADC0DE, >csis_dphyctrl);
+   writel(0x, >csis_ctrl2);
+   writel(0xDEADC0DE, >dsim_msync);
+
+   if (pregister->csis_dphyctrl != 0xDE80001E)
+   return false;
+
+   if ((pregister->csis_ctrl2 & (~1)) != 0xEEE00010)
+   return false;
+
+   if (pregister->dsim_msync != 0xDE80C0DE)
+   return false;
+
+   return true;
+}
+
+void nx_mipi_set_base_address(u32 module_index, void *base_address)
+{
+   __g_pregister[module_index] =
+   (struct nx_mipi_register_set *)base_address;
+}
+
+void *nx_mipi_get_base_address(u32 module_index)
+{
+   return (void *)__g_pregister[module_index];
+}
+
+u32 nx_mipi_get_physical_address(u32 module_index)
+{
+   const u32 physical_addr[] = PHY_BASEADDR_MIPI_LIST;
+
+   return physical_addr[module_index];
+}
+
+#define __nx_mipi_valid_dsi_intmask__  \
+   (~((1 << 26) | (1 << 23) | (1 << 22) | (1 << 19)))
+
+void nx_mipi_set_interrupt_enable(u32 module_index, u32 int_num, int enable)
+{
+   register struct nx_mipi_register_set *pregister;
+   register u32 regvalue;
+
+   pregister = __g_pregister[module_index];
+   if (int_num < 32) {
+   regvalue = pregister->csis_intmsk;
+   regvalue &= ~(1ul << int_num);
+   regvalue |= (u32)enable << int_num;
+   writel(regvalue, >csis_intmsk);
+   } else {
+   regvalue = pregister->dsim_intmsk;
+   regvalue &= ~(1ul << (int_num - 32));
+   regvalue |= (u32)enable << (int_num - 32);
+   writel(regvalue, >dsim_intmsk);
+   }
+}
+
+int nx_mipi_get_interrupt_enable(u32 module_index, u32 int_num)
+{
+   if (int_num < 32)
+   return (int)((__g_pregister[module_index]->csis_intmsk >>
+ int_num) & 0x01);
+   else
+   return (int)((__g_pregister[module_index]->dsim_intmsk >>
+ (int_num - 32)) & 0x01);
+}
+
+int nx_mipi_get_interrupt_pending(u32 module_index, u32 int_num)
+{
+   register struct nx_mipi_register_set *pregister;
+   register u32 regvalue;
+   int ret;
+
+   pregister = __g_pregister[module_index];
+   if (int_num < 32) {
+   regvalue = pregister->csis_intmsk;
+   regvalue &= pregister->csis_intsrc;
+   ret = (int)((regvalue >> int_num) & 0x01);
+   } else {
+   regvalue = pregister->dsim_intmsk;
+   regvalue &= pregister->dsim_intsrc;
+   ret = (int)((regvalue >> (int_num - 32)) & 0x01);
+   }
+
+   return ret;
+}
+
+void nx_mipi_clear_interrupt_pending(u32 module_index, u32 int_num)
+{
+   register struct nx_mipi_register_set *pregister;
+
+   pregister = __g_pregister[module_index];
+   if (int_num < 32)
+   writel(1ul << int_num, >csis_intsrc);
+   else
+   writel(1ul << (int_num - 32), >dsim_intsrc);
+}
+
+void nx_mipi_set_interrupt_enable_all(u32 module_index, int enable)
+{
+   register struct nx_mipi_register_set *pregister;
+
+   pregister = __g_pregister[module_index];
+   if (enable)
+   writel(__nx_mipi_valid_dsi_intmask__, >dsim_intmsk);
+   else
+   writel(0, >dsim_intmsk);
+}
+
+int nx_mipi_get_interrupt_enable_all(u32 module_index)
+{
+   if (__g_pregister[module_index]->csis_intmsk)
+   

[RFC PATCH v2 10/13] video: add nexell video driver (soc: dpc, makefile)

[Stefan Bosch]

Low level functions for DPC (Display Controller) and Makefile for all
nexell video low level functions.

Signed-off-by: Stefan Bosch 
---

Changes in v2: None

 drivers/video/nexell/soc/Makefile  |   11 +
 drivers/video/nexell/soc/s5pxx18_soc_dpc.c | 1569 
 drivers/video/nexell/soc/s5pxx18_soc_dpc.h |  444 
 3 files changed, 2024 insertions(+)
 create mode 100644 drivers/video/nexell/soc/Makefile
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_dpc.c
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_dpc.h

diff --git a/drivers/video/nexell/soc/Makefile 
b/drivers/video/nexell/soc/Makefile
new file mode 100644
index 000..a3036e5
--- /dev/null
+++ b/drivers/video/nexell/soc/Makefile
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2016 Nexell
+# Junghyun, kim
+
+obj-$(CONFIG_VIDEO_NX) += s5pxx18_soc_dpc.o s5pxx18_soc_mlc.o \
+ s5pxx18_soc_disptop.o s5pxx18_soc_disptop_clk.o
+
+obj-$(CONFIG_VIDEO_NX_LVDS) += s5pxx18_soc_lvds.o
+obj-$(CONFIG_VIDEO_NX_MIPI) += s5pxx18_soc_mipi.o
+obj-$(CONFIG_VIDEO_NX_HDMI) += s5pxx18_soc_hdmi.o
diff --git a/drivers/video/nexell/soc/s5pxx18_soc_dpc.c 
b/drivers/video/nexell/soc/s5pxx18_soc_dpc.c
new file mode 100644
index 000..fc15d6b
--- /dev/null
+++ b/drivers/video/nexell/soc/s5pxx18_soc_dpc.c
@@ -0,0 +1,1569 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016  Nexell Co., Ltd.
+ *
+ * Author: junghyun, kim 
+ */
+
+#include 
+#include 
+
+#include "s5pxx18_soc_dpc.h"
+
+static struct {
+   struct nx_dpc_register_set *pregister;
+} __g_module_variables[NUMBER_OF_DPC_MODULE] = { { NULL,},};
+
+int nx_dpc_initialize(void)
+{
+   static int binit;
+   u32 i;
+
+   if (binit == 0) {
+   for (i = 0; i < NUMBER_OF_DPC_MODULE; i++)
+   __g_module_variables[i].pregister = NULL;
+   binit = 1;
+   }
+   return 1;
+}
+
+u32 nx_dpc_get_number_of_module(void)
+{
+   return NUMBER_OF_DPC_MODULE;
+}
+
+u32 nx_dpc_get_physical_address(u32 module_index)
+{
+   const u32 physical_addr[] = PHY_BASEADDR_DPC_LIST;
+
+   return physical_addr[module_index];
+}
+
+void nx_dpc_set_base_address(u32 module_index, void *base_address)
+{
+   __g_module_variables[module_index].pregister =
+   (struct nx_dpc_register_set *)base_address;
+}
+
+void *nx_dpc_get_base_address(u32 module_index)
+{
+   return (void *)__g_module_variables[module_index].pregister;
+}
+
+void nx_dpc_set_interrupt_enable(u32 module_index, int32_t int_num, int enable)
+{
+   const u32 intenb_pos = 11;
+   const u32 intenb_mask = 1ul << intenb_pos;
+   const u32 intpend_pos = 10;
+   const u32 intpend_mask = 1ul << intpend_pos;
+
+   register u32 regvalue;
+   register struct nx_dpc_register_set *pregister;
+
+   pregister = __g_module_variables[module_index].pregister;
+   regvalue = pregister->dpcctrl0;
+   regvalue &= ~(intenb_mask | intpend_mask);
+   regvalue |= (u32)enable << intenb_pos;
+
+   writel(regvalue, >dpcctrl0);
+}
+
+int nx_dpc_get_interrupt_enable(u32 module_index, int32_t int_num)
+{
+   const u32 intenb_pos = 11;
+   const u32 intenb_mask = 1ul << intenb_pos;
+
+   return (int)((__g_module_variables[module_index].pregister->dpcctrl0 &
+ intenb_mask) >> intenb_pos);
+}
+
+void nx_dpc_set_interrupt_enable32(u32 module_index, u32 enable_flag)
+{
+   const u32 intenb_pos = 11;
+   const u32 intenb_mask = 1 << intenb_pos;
+   const u32 intpend_pos = 10;
+   const u32 intpend_mask = 1 << intpend_pos;
+
+   register struct nx_dpc_register_set *pregister;
+   register u32 read_value;
+
+   pregister = __g_module_variables[module_index].pregister;
+   read_value = pregister->dpcctrl0 & ~(intpend_mask | intenb_mask);
+
+   writel((u32)(read_value | (enable_flag & 0x01) << intenb_pos),
+  >dpcctrl0);
+}
+
+u32 nx_dpc_get_interrupt_enable32(u32 module_index)
+{
+   const u32 intenb_pos = 11;
+   const u32 intenb_mask = 1 << intenb_pos;
+
+   return (u32)((__g_module_variables[module_index].pregister->dpcctrl0 &
+  intenb_mask) >> intenb_pos);
+}
+
+int nx_dpc_get_interrupt_pending(u32 module_index, int32_t int_num)
+{
+   const u32 intpend_pos = 10;
+   const u32 intpend_mask = 1ul << intpend_pos;
+
+   return (int)((__g_module_variables[module_index].pregister->dpcctrl0 &
+ intpend_mask) >> intpend_pos);
+}
+
+u32 nx_dpc_get_interrupt_pending32(u32 module_index)
+{
+   const u32 intpend_pos = 10;
+   const u32 intpend_mask = 1 << intpend_pos;
+
+   return (u32)((__g_module_variables[module_index].pregister->dpcctrl0 &
+  intpend_mask) >> intpend_pos);
+}
+
+void nx_dpc_clear_interrupt_pending(u32 module_index, int32_t int_num)
+{
+   const u32 intpend_pos = 10;
+   register 

[RFC PATCH v2 13/13] arm: add (default) config for nanopi2 board

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Configuration changed, mainly several "CONFIG_..." moved from
  s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig and USB related
  configs removed because USB is not supported yet.
- s5p4418_nanopi2.h: "CONFIG_" removed from several s5p4418/nanopi2
  specific defines because the appropriate values do not need to be
  configurable.


Signed-off-by: Stefan Bosch 
---

Changes in v2:
- USB related configs removed because USB is not supported yet.
- CONFIG_CMD_MEMTEST moved from s5p4418_nanopi2.h to
  s5p4418_nanopi2_defconfig.
- MAINTAINERS: "F: drivers/pwm/pwm-nexell*" deleted because
  arch/arm/cpu/armv7/s5p-common/pwm.c is used now. Furthermore double
  line "F: drivers/video/nexell/" deleted.

 MAINTAINERS   |  16 +++
 configs/s5p4418_nanopi2_defconfig | 148 +
 doc/README.s5p4418|  63 +
 include/configs/s5p4418_nanopi2.h | 265 ++
 4 files changed, 492 insertions(+)
 create mode 100644 configs/s5p4418_nanopi2_defconfig
 create mode 100644 doc/README.s5p4418
 create mode 100644 include/configs/s5p4418_nanopi2.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 7d2729d..9d1acb7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -258,6 +258,22 @@ F: arch/arm/mach-at91/
 F: board/atmel/
 F: drivers/misc/microchip_flexcom.c
 
+ARM NEXELL S5P4418
+M: Stefan Bosch 
+S: Maintained
+F: arch/arm/cpu/armv7/s5p4418/
+F: arch/arm/dts/s5p4418*
+F: arch/arm/mach-nexell/
+F: board/friendlyarm/
+F: configs/s5p4418_nanopi2_defconfig
+F: doc/README.s5p4418
+F: drivers/gpio/nx_gpio.c
+F: drivers/i2c/nx_i2c.c
+F: drivers/mmc/nexell_dw_mmc_dm.c
+F: drivers/video/nexell/
+F: drivers/video/nexell_display.c
+F: include/configs/s5p4418_nanopi2.h
+
 ARM OWL
 M: Manivannan Sadhasivam 
 S: Maintained
diff --git a/configs/s5p4418_nanopi2_defconfig 
b/configs/s5p4418_nanopi2_defconfig
new file mode 100644
index 000..870a460
--- /dev/null
+++ b/configs/s5p4418_nanopi2_defconfig
@@ -0,0 +1,148 @@
+CONFIG_ARM=y
+CONFIG_ARCH_NEXELL=y
+CONFIG_ARCH_S5P4418=y
+CONFIG_TARGET_NANOPI2=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="s5p4418-nanopi2"
+CONFIG_FIT=y
+
+# Must be set to 'n' (apparently "CONFIG_EFI_LOADER=y" per default)
+# otherwise boot errors "efi_runtime_relocate: Unknown relocation type 0"
+CONFIG_EFI_LOADER=n
+
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+
+# Default is CONFIG_NET=y, in this case:
+#   Loading Environment from MMC... ## Warning: Unknown environment variable 
type 'm'
+#   OK
+# CONFIG_CMD_NET=y must be set to avoid this Warning. But then:
+#   Net:   Net Initialization Skipped
+#   No ethernet found.
+# If CONFIG_NET=n is set additionally warning at "make 
s5p4418_nanopi2_defconfig":
+#arch/../configs/s5p4418_nanopi2_defconfig:24:warning: override: 
reassigning to symbol CMD_NET
+#
+# --> CONFIG_NET=n set only
+CONFIG_NET=n
+
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_FDISK=y
+CONFIG_CMD_EXT4_IMG_WRITE=y
+CONFIG_CMD_SD_RECOVERY=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+
+CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_NEXELL=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_AXP228=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_AXP228=y
+CONFIG_DM_PWM=n
+
+CONFIG_DISPLAY=y
+CONFIG_DM_VIDEO=y
+CONFIG_SYS_CONSOLE_BG_COL=0xff
+CONFIG_SYS_CONSOLE_FG_COL=0x00
+CONFIG_VIDEO_NX=y
+CONFIG_VIDEO_NX_RGB=y
+CONFIG_VIDEO_NX_LVDS=y
+
+CONFIG_VIDEO_NX_HDMI=y
+
+CONFIG_REGEX=y
+CONFIG_ERRNO_STR=y
+
+CONFIG_SYS_TEXT_BASE=0x74C0
+CONFIG_SYS_RESERVE_MEM_SIZE=0x0040
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_CACHELINE_SIZE=64
+
+## System initialize options (board_init_f)
+# board_init_f->init_sequence, call board_early_init_f
+CONFIG_BOARD_LATE_INIT=y
+# board_init_f->init_sequence, call print_cpuinfo
+CONFIG_DISPLAY_CPUINFO=y
+# board_init_f->init_sequence, call show_board_info
+CONFIG_DISPLAY_BOARDINFO=y
+# board_init_f, CONFIG_SYS_ICACHE_OFF
+CONFIG_SYS_DCACHE_OFF=y
+# board_init_r, call arch_misc_init
+CONFIG_ARCH_MISC_INIT=y
+
+CONFIG_BOOTDELAY=1
+CONFIG_ZERO_BOOTDELAY_CHECK=y
+
+## U-Boot Environments
+## refer to common/env_common.c
+
+# CONFIG_ENV_IS_IN_MMC must be set here and not in s5p4418_nanopi2.h
+# otherwise CONFIG_ENV_IS_NOWHERE is set by env/Kconfig and environment
+# (bootargs) are not loaded
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_OFFSET=0x2E0200
+CONFIG_ENV_SIZE=0x4000
+CONFIG_CMD_SAVEENV=y
+
+## Etc Command definition
+# image info
+CONFIG_CMD_IMI=y
+# add command line history
+CONFIG_CMDLINE_EDITING=y
+CONFIG_INITRD_TAG=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_REVISION_TAG=y
+CONFIG_CMD_BOOTZ=y
+
+## serial console configuration
+CONFIG_CONS_INDEX=0
+CONFIG_BAUDRATE=115200
+
+## SD/MMC
+CONFIG_BOUNCE_BUFFER=y

[RFC PATCH v2 12/13] arm: add support for SoC s5p4418 (cpu) / nanopi2 board

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-dir in arch/arm/cpu/armv7/s5p4418/.
  Appropriate line in Makefile removed.
- cpu.c: '#include ' added.
- arch/arm/cpu/armv7/s5p4418/u-boot.lds removed, is not required
  anylonger.
- "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to
  arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used instead
  of drivers/pwm/pwm-nexell.c.
- s5p4418.dtsi: '#include "../../../include/generated/autoconf.h"'
  removed, is not necessary, error at out-of-tree building.
  '#ifdef CONFIG_CPU_NXP4330'-blocks (2x) removed. Some minor changes
  regarding mmc. 'u-boot,dm-pre-reloc' added to dp0 because of added
  DM_VIDEO support.
- board/s5p4418/ renamed to board/friendlyarm/
- All s5p4418-boards except nanopi2 removed because there is no
  possibility to test the other boards.
- Kconfig: Changes to have a structure like mach-bcm283x (RaspberryPi),
  e.g. "config ..." entries moved from/to other Kconfig.
- "CONFIG_" removed from several s5p4418/nanopi2 specific defines
  because the appropriate values do not need to be configurable.
- nanopi2/board.c: All getenv(), getenv_ulong(), setenv() and saveenv()
  renamed to env_get(), env_get_ulong(), env_set() and env_save(),
  respectively. MACH_TYPE_S5P4418 is not defined anymore, therefore
  appropriate code removed (not necessary for DT-kernels).
- nanopi2/onewire.c: All crc8() renamed to crc8_ow() because crc8() is
  already defined in lib/crc8.c (with different parameters).
- dts: "nexell,s5pxx18-i2c" used instead of "i2c-gpio", i2c0 and
  i2c1 added. s5p4418-pinctrl.dtsi not included because there is
  no pinctrl-driver available. gmac-, ehci- and dwc2otg-entries
  removed because the appropriate functionality is not supported yet.

Signed-off-by: Stefan Bosch 
---

Changes in v2:
- i2c: "nexell,s5pxx18-i2c"-driver is used now instead of "i2c-gpio".
  i2c0 and i2c1 added. I.e. dts files changed appropriately.
- dts: gmac-, ehci- and dwc2otg-entries removed because the appropriate
  functionality is not supported yet.
- s5p4418-pinctrl.dtsi removed because there is no pinctrl-driver
  available.
- "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to
  arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used now instead
  of drivers/pwm/pwm-nexell.c.
- cosmetic: additional GPL license text removed, SPDX-License-Identifier
  is enough. Furthermore file path removed (two files).

 arch/arm/cpu/armv7/Makefile   |   2 +
 arch/arm/cpu/armv7/s5p4418/Makefile   |   6 +
 arch/arm/cpu/armv7/s5p4418/cpu.c  | 120 ++
 arch/arm/dts/Makefile |   3 +
 arch/arm/dts/s5p4418-nanopi2.dts  | 108 ++
 arch/arm/dts/s5p4418.dtsi | 148 
 board/friendlyarm/Kconfig |  39 ++
 board/friendlyarm/nanopi2/Kconfig |  12 +
 board/friendlyarm/nanopi2/MAINTAINERS |   7 +
 board/friendlyarm/nanopi2/Makefile|   6 +
 board/friendlyarm/nanopi2/board.c | 567 +++
 board/friendlyarm/nanopi2/hwrev.c | 108 ++
 board/friendlyarm/nanopi2/hwrev.h |  15 +
 board/friendlyarm/nanopi2/lcds.c  | 697 ++
 board/friendlyarm/nanopi2/nxp-fb.h|  94 +
 board/friendlyarm/nanopi2/onewire.c   | 309 +++
 board/friendlyarm/nanopi2/onewire.h   |  15 +
 17 files changed, 2256 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/s5p4418/Makefile
 create mode 100644 arch/arm/cpu/armv7/s5p4418/cpu.c
 create mode 100644 arch/arm/dts/s5p4418-nanopi2.dts
 create mode 100644 arch/arm/dts/s5p4418.dtsi
 create mode 100644 board/friendlyarm/Kconfig
 create mode 100644 board/friendlyarm/nanopi2/Kconfig
 create mode 100644 board/friendlyarm/nanopi2/MAINTAINERS
 create mode 100644 board/friendlyarm/nanopi2/Makefile
 create mode 100644 board/friendlyarm/nanopi2/board.c
 create mode 100644 board/friendlyarm/nanopi2/hwrev.c
 create mode 100644 board/friendlyarm/nanopi2/hwrev.h
 create mode 100644 board/friendlyarm/nanopi2/lcds.c
 create mode 100644 board/friendlyarm/nanopi2/nxp-fb.h
 create mode 100644 board/friendlyarm/nanopi2/onewire.c
 create mode 100644 board/friendlyarm/nanopi2/onewire.h

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 8c955d0..0e83e39 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -42,3 +42,5 @@ obj-$(CONFIG_RMOBILE) += rmobile/
 obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/
 obj-$(CONFIG_ARCH_SUNXI) += sunxi/
 obj-$(CONFIG_VF610) += vf610/
+obj-$(CONFIG_ARCH_S5P4418) += s5p4418/
+obj-$(CONFIG_ARCH_NEXELL) += s5p-common/
diff --git a/arch/arm/cpu/armv7/s5p4418/Makefile 
b/arch/arm/cpu/armv7/s5p4418/Makefile
new file mode 100644
index 000..321b257
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p4418/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2016 Nexell
+# Hyunseok, Jung 
+
+obj-y += cpu.o
diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c 

[RFC PATCH v2 09/13] video: add nexell video driver (soc: lvds, hdmi)

[Stefan Bosch]

Low level functions for LVDS and HDMI display interfaces.

Signed-off-by: Stefan Bosch 
---

Changes in v2: None

 drivers/video/nexell/soc/s5pxx18_soc_hdmi.c |  50 +++
 drivers/video/nexell/soc/s5pxx18_soc_hdmi.h | 488 
 drivers/video/nexell/soc/s5pxx18_soc_lvds.c | 278 
 drivers/video/nexell/soc/s5pxx18_soc_lvds.h |  83 +
 4 files changed, 899 insertions(+)
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_hdmi.c
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_hdmi.h
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_lvds.c
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_lvds.h

diff --git a/drivers/video/nexell/soc/s5pxx18_soc_hdmi.c 
b/drivers/video/nexell/soc/s5pxx18_soc_hdmi.c
new file mode 100644
index 000..7b8be7e
--- /dev/null
+++ b/drivers/video/nexell/soc/s5pxx18_soc_hdmi.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016  Nexell Co., Ltd.
+ *
+ * Author: junghyun, kim 
+ */
+
+#include 
+#include 
+
+#include "s5pxx18_soc_hdmi.h"
+
+static u32 *hdmi_base_addr;
+
+u32 nx_hdmi_get_reg(u32 module_index, u32 offset)
+{
+   u32 *reg_addr;
+   u32 regvalue;
+
+   reg_addr = hdmi_base_addr + (offset / sizeof(u32));
+   regvalue = readl((u32 *)reg_addr);
+
+   return regvalue;
+}
+
+void nx_hdmi_set_reg(u32 module_index, u32 offset, u32 regvalue)
+{
+   s64 offset_new = (s64)((int32_t)offset);
+   u32 *reg_addr;
+
+   reg_addr = hdmi_base_addr + (offset_new / sizeof(u32));
+   writel(regvalue, (u32 *)reg_addr);
+}
+
+void nx_hdmi_set_base_address(u32 module_index, void *base_address)
+{
+   hdmi_base_addr = (u32 *)base_address;
+}
+
+void *nx_hdmi_get_base_address(u32 module_index)
+{
+   return (u32 *)hdmi_base_addr;
+}
+
+u32 nx_hdmi_get_physical_address(u32 module_index)
+{
+   const u32 physical_addr[] = PHY_BASEADDR_HDMI_LIST;
+
+   return physical_addr[module_index];
+}
diff --git a/drivers/video/nexell/soc/s5pxx18_soc_hdmi.h 
b/drivers/video/nexell/soc/s5pxx18_soc_hdmi.h
new file mode 100644
index 000..a4c5ab5
--- /dev/null
+++ b/drivers/video/nexell/soc/s5pxx18_soc_hdmi.h
@@ -0,0 +1,488 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * Copyright (C) 2016  Nexell Co., Ltd.
+ *
+ * Author: junghyun, kim 
+ */
+
+#ifndef _S5PXX18_SOC_HDMI_H_
+#define _S5PXX18_SOC_HDMI_H_
+
+#include "s5pxx18_soc_disptop.h"
+
+#define PHY_BASEADDR_HDMI_PHY_MODULE   0xc00f
+#define PHY_BASEADDR_HDMI_LIST \
+   { PHY_BASEADDR_HDMI_MODULE }
+
+#define HDMI_LINK_INTC_CON_0   (HDMI_ADDR_OFFSET + 0x)
+#define HDMI_LINK_INTC_FLAG_0  (HDMI_ADDR_OFFSET + 0x0004)
+#define HDMI_LINK_AESKEY_VALID (HDMI_ADDR_OFFSET + 0x0008)
+#define HDMI_LINK_HPD  (HDMI_ADDR_OFFSET + 0x000C)
+#define HDMI_LINK_INTC_CON_1   (HDMI_ADDR_OFFSET + 0x0010)
+#define HDMI_LINK_INTC_FLAG_1  (HDMI_ADDR_OFFSET + 0x0014)
+#define HDMI_LINK_PHY_STATUS_0 (HDMI_ADDR_OFFSET + 0x0020)
+#define HDMI_LINK_PHY_STATUS_CMU   (HDMI_ADDR_OFFSET + 0x0024)
+#define HDMI_LINK_PHY_STATUS_PLL   (HDMI_ADDR_OFFSET + 0x0028)
+#define HDMI_LINK_PHY_CON_0(HDMI_ADDR_OFFSET + 0x0030)
+#define HDMI_LINK_HPD_CTRL (HDMI_ADDR_OFFSET + 0x0040)
+#define HDMI_LINK_HPD_STATUS   (HDMI_ADDR_OFFSET + 0x0044)
+#define HDMI_LINK_HPD_TH_x (HDMI_ADDR_OFFSET + 0x0050)
+
+#define HDMI_LINK_HDMI_CON_0   (HDMI_ADDR_OFFSET + 0x0001)
+#define HDMI_LINK_HDMI_CON_1   (HDMI_ADDR_OFFSET + 0x00010004)
+#define HDMI_LINK_HDMI_CON_2   (HDMI_ADDR_OFFSET + 0x00010008)
+#define HDMI_LINK_STATUS   (HDMI_ADDR_OFFSET + 0x00010010)
+#define HDMI_LINK_STATUS_EN(HDMI_ADDR_OFFSET + 0x00010020)
+
+#define HDMI_LINK_HDCP_SHA1_REN0   (HDMI_ADDR_OFFSET + 0x00010024)
+#define HDMI_LINK_HDCP_SHA1_REN1   (HDMI_ADDR_OFFSET + 0x00010028)
+
+#define HDMI_LINK_MODE_SEL (HDMI_ADDR_OFFSET + 0x00010040)
+#define HDMI_LINK_ENC_EN   (HDMI_ADDR_OFFSET + 0x00010044)
+#define HDMI_LINK_HDMI_YMAX(HDMI_ADDR_OFFSET + 0x00010060)
+#define HDMI_LINK_HDMI_YMIN(HDMI_ADDR_OFFSET + 0x00010064)
+#define HDMI_LINK_HDMI_CMAX(HDMI_ADDR_OFFSET + 0x00010068)
+#define HDMI_LINK_HDMI_CMIN(HDMI_ADDR_OFFSET + 0x0001006C)
+#define HDMI_LINK_H_BLANK_0(HDMI_ADDR_OFFSET + 0x000100A0)
+#define HDMI_LINK_H_BLANK_1(HDMI_ADDR_OFFSET + 0x000100A4)
+#define HDMI_LINK_V2_BLANK_0   (HDMI_ADDR_OFFSET + 0x000100B0)
+#define HDMI_LINK_V2_BLANK_1   (HDMI_ADDR_OFFSET + 0x000100B4)
+#define HDMI_LINK_V1_BLANK_0   (HDMI_ADDR_OFFSET + 0x000100B8)
+#define HDMI_LINK_V1_BLANK_1   (HDMI_ADDR_OFFSET + 0x000100BC)
+#define 

[RFC PATCH v2 11/13] video: add nexell video driver (display/video driver)

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- nexell_display.c: Changed to DM, CONFIG_FB_ADDR can not be used
  anymore because framebuffer is allocated by video_reserve() in
  video-uclass.c. Therefore code changed appropriately.

Signed-off-by: Stefan Bosch 
---

Changes in v2: None

 drivers/video/Kconfig  |  10 +
 drivers/video/Makefile |   1 +
 drivers/video/nexell/Kconfig   |  27 ++
 drivers/video/nexell/Makefile  |  12 +
 drivers/video/nexell/s5pxx18_dp.c  | 338 
 drivers/video/nexell/s5pxx18_dp_hdmi.c | 543 ++
 drivers/video/nexell/s5pxx18_dp_lvds.c | 274 +
 drivers/video/nexell/s5pxx18_dp_mipi.c | 677 +
 drivers/video/nexell/s5pxx18_dp_rgb.c  |  69 
 drivers/video/nexell_display.c | 665 
 10 files changed, 2616 insertions(+)
 create mode 100644 drivers/video/nexell/Kconfig
 create mode 100644 drivers/video/nexell/Makefile
 create mode 100644 drivers/video/nexell/s5pxx18_dp.c
 create mode 100644 drivers/video/nexell/s5pxx18_dp_hdmi.c
 create mode 100644 drivers/video/nexell/s5pxx18_dp_lvds.c
 create mode 100644 drivers/video/nexell/s5pxx18_dp_mipi.c
 create mode 100644 drivers/video/nexell/s5pxx18_dp_rgb.c
 create mode 100644 drivers/video/nexell_display.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 50ab365..dd224ab 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -563,6 +563,16 @@ source "drivers/video/bridge/Kconfig"
 
 source "drivers/video/imx/Kconfig"
 
+config VIDEO_NX
+   bool "Enable video support on Nexell SoC"
+   depends on ARCH_S5P6818 || ARCH_S5P4418
+   help
+  Nexell SoC supports many video output options including eDP and
+  HDMI. This option enables this support which can be used on devices
+  which have an eDP display connected.
+
+source "drivers/video/nexell/Kconfig"
+
 config VIDEO
bool "Enable legacy video support"
depends on !DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index df7119d..3bacc64 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -61,6 +61,7 @@ obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o
 obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
 obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
 obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
+obj-$(CONFIG_VIDEO_NX) += nexell_display.o videomodes.o nexell/
 obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
 obj-$(CONFIG_VIDEO_DSI_HOST_SANDBOX) += sandbox_dsi_host.o
 obj-$(CONFIG_VIDEO_SANDBOX_SDL) += sandbox_sdl.o
diff --git a/drivers/video/nexell/Kconfig b/drivers/video/nexell/Kconfig
new file mode 100644
index 000..54b8ccb
--- /dev/null
+++ b/drivers/video/nexell/Kconfig
@@ -0,0 +1,27 @@
+if VIDEO_NX
+
+menu "LCD select"
+
+config VIDEO_NX_RGB
+   bool "RGB LCD"
+   help
+ Support for RGB lcd output.
+
+config VIDEO_NX_LVDS
+   bool "LVDS LCD"
+   help
+ Support for LVDS lcd output.
+
+config VIDEO_NX_MIPI
+   bool "MiPi"
+   help
+ Support for MiPi lcd output.
+
+config VIDEO_NX_HDMI
+   bool "HDMI"
+   help
+ Support for hdmi output.
+
+endmenu
+
+endif
diff --git a/drivers/video/nexell/Makefile b/drivers/video/nexell/Makefile
new file mode 100644
index 000..111ab45
--- /dev/null
+++ b/drivers/video/nexell/Makefile
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2016 Nexell
+# Junghyun, kim
+
+obj-$(CONFIG_VIDEO_NX) += s5pxx18_dp.o
+obj-$(CONFIG_VIDEO_NX) += soc/
+
+obj-$(CONFIG_VIDEO_NX_RGB)  += s5pxx18_dp_rgb.o
+obj-$(CONFIG_VIDEO_NX_LVDS) += s5pxx18_dp_lvds.o
+obj-$(CONFIG_VIDEO_NX_MIPI) += s5pxx18_dp_mipi.o
+obj-$(CONFIG_VIDEO_NX_HDMI) += s5pxx18_dp_hdmi.o
diff --git a/drivers/video/nexell/s5pxx18_dp.c 
b/drivers/video/nexell/s5pxx18_dp.c
new file mode 100644
index 000..c69b69c
--- /dev/null
+++ b/drivers/video/nexell/s5pxx18_dp.c
@@ -0,0 +1,338 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016  Nexell Co., Ltd.
+ *
+ * Author: junghyun, kim 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "soc/s5pxx18_soc_disptop.h"
+#include "soc/s5pxx18_soc_dpc.h"
+#include "soc/s5pxx18_soc_mlc.h"
+
+#defineMLC_LAYER_RGB_0 0   /* number of RGB layer 0 */
+#defineMLC_LAYER_RGB_1 1   /* number of RGB layer 1 */
+#defineMLC_LAYER_VIDEO 3   /* number of Video layer: 3 = 
VIDEO */
+
+#define__io_address(a) (void *)(uintptr_t)(a)
+
+void dp_control_init(int module)
+{
+   void *base;
+
+   /* top */
+   base = __io_address(nx_disp_top_get_physical_address());
+   nx_disp_top_set_base_address(base);
+
+   /* control */
+   base = __io_address(nx_dpc_get_physical_address(module));
+   nx_dpc_set_base_address(module, base);
+
+   /* top controller */
+   

[RFC PATCH v2 06/13] pwm: add driver for nexell

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Since drivers/pwm/pwm-nexell.c is an adapted version of
  s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c
  is used instead. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h
  copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile
  changed appropriately.

Signed-off-by: Stefan Bosch 
---

Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
  into separate commits for gpio, i2c, mmc, pwm.
- Since drivers/pwm/pwm-nexell.c is an adapted version of
  s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c
  is used now. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h
  copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile
  changed appropriately.

 arch/arm/cpu/armv7/s5p-common/Makefile  |  4 +++
 arch/arm/cpu/armv7/s5p-common/pwm.c | 56 +
 arch/arm/mach-nexell/include/mach/pwm.h | 54 +++
 3 files changed, 114 insertions(+)
 create mode 100644 arch/arm/mach-nexell/include/mach/pwm.h

diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile 
b/arch/arm/cpu/armv7/s5p-common/Makefile
index 12cf804..3d4649b 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -3,9 +3,13 @@
 # Copyright (C) 2009 Samsung Electronics
 # Minkyu Kang 
 
+ifdef CONFIG_ARCH_NEXELL
+obj-$(CONFIG_PWM_NX)   += pwm.o
+else
 obj-y  += cpu_info.o
 ifndef CONFIG_SPL_BUILD
 obj-y  += timer.o
 obj-y  += sromc.o
 obj-$(CONFIG_PWM)  += pwm.o
 endif
+endif
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c 
b/arch/arm/cpu/armv7/s5p-common/pwm.c
index 6b9e865..c4915af 100644
--- a/arch/arm/cpu/armv7/s5p-common/pwm.c
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -15,7 +15,11 @@
 int pwm_enable(int pwm_id)
 {
const struct s5p_timer *pwm =
+#if defined(CONFIG_ARCH_NEXELL)
+   (struct s5p_timer *)PHY_BASEADDR_PWM;
+#else
(struct s5p_timer *)samsung_get_base_timer();
+#endif
unsigned long tcon;
 
tcon = readl(>tcon);
@@ -29,7 +33,11 @@ int pwm_enable(int pwm_id)
 void pwm_disable(int pwm_id)
 {
const struct s5p_timer *pwm =
+#if defined(CONFIG_ARCH_NEXELL)
+   (struct s5p_timer *)PHY_BASEADDR_PWM;
+#else
(struct s5p_timer *)samsung_get_base_timer();
+#endif
unsigned long tcon;
 
tcon = readl(>tcon);
@@ -43,14 +51,43 @@ static unsigned long pwm_calc_tin(int pwm_id, unsigned long 
freq)
unsigned long tin_parent_rate;
unsigned int div;
 
+#if defined(CONFIG_ARCH_NEXELL)
+   unsigned int pre_div;
+   const struct s5p_timer *pwm =
+   (struct s5p_timer *)PHY_BASEADDR_PWM;
+   unsigned int val;
+   struct clk *clk = clk_get(CORECLK_NAME_PCLK);
+
+   tin_parent_rate = clk_get_rate(clk);
+#else
tin_parent_rate = get_pwm_clk();
+#endif
+
+#if defined(CONFIG_ARCH_NEXELL)
+   writel(0, >tcfg0);
+   val = readl(>tcfg0);
+
+   if (pwm_id < 2)
+   div = ((val >> 0) & 0xff) + 1;
+   else
+   div = ((val >> 8) & 0xff) + 1;
+
+   writel(0, >tcfg1);
+   val = readl(>tcfg1);
+   val = (val >> MUX_DIV_SHIFT(pwm_id)) & 0xF;
+   pre_div = (1UL << val);
 
+   freq = tin_parent_rate / div / pre_div;
+
+   return freq;
+#else
for (div = 2; div <= 16; div *= 2) {
if ((tin_parent_rate / (div << 16)) < freq)
return tin_parent_rate / div;
}
 
return tin_parent_rate / 16;
+#endif
 }
 
 #define NS_IN_SEC 10UL
@@ -58,7 +95,11 @@ static unsigned long pwm_calc_tin(int pwm_id, unsigned long 
freq)
 int pwm_config(int pwm_id, int duty_ns, int period_ns)
 {
const struct s5p_timer *pwm =
+#if defined(CONFIG_ARCH_NEXELL)
+   (struct s5p_timer *)PHY_BASEADDR_PWM;
+#else
(struct s5p_timer *)samsung_get_base_timer();
+#endif
unsigned int offset;
unsigned long tin_rate;
unsigned long tin_ns;
@@ -84,7 +125,13 @@ int pwm_config(int pwm_id, int duty_ns, int period_ns)
tin_rate = pwm_calc_tin(pwm_id, frequency);
 
tin_ns = NS_IN_SEC / tin_rate;
+
+#if defined(CONFIG_ARCH_NEXELL)
+   /* The counter starts at zero. */
+   tcnt = (period_ns / tin_ns) - 1;
+#else
tcnt = period_ns / tin_ns;
+#endif
 
/* Note, counters count down */
tcmp = duty_ns / tin_ns;
@@ -115,7 +162,11 @@ int pwm_init(int pwm_id, int div, int invert)
 {
u32 val;
const struct s5p_timer *pwm =
+#if defined(CONFIG_ARCH_NEXELL)
+   (struct s5p_timer *)PHY_BASEADDR_PWM;
+#else
(struct s5p_timer *)samsung_get_base_timer();
+#endif
unsigned long ticks_per_period;
unsigned int offset, prescaler;
 
@@ -148,7 +199,12 @@ int 

[RFC PATCH v2 02/13] arm: add mach-nexell (all files except header files)

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-directory in arch/arm/mach-nexell.
  Appropriate line in Makefile removed.
- clock.c: 'section(".data")' added to declaration of clk_periphs[] and
  core_hz.
- Kconfig: Changes to have a structure like in mach-bcm283x/Kconfig,
  e.g. "config ..." entries moved from other Kconfig.
- timer.c: 'section(".data")' added to declaration of timestamp and
  lastdec.
- arch/arm/mach-nexell/serial.c removed because this is for the UARTs
  of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are
  different, here the (existing) PL011-code is used.

Signed-off-by: Stefan Bosch 
---

Changes in v2:
- arch/arm/mach-nexell/serial.c removed because this is for the UARTs
  of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are
  different, here the (existing) PL011-code is used.
- line '... += spl/' in in arch/arm/mach-nexell/Makefile deleted, this
  change has already been stated in the commit message but was missing
  nethertheless.

 arch/arm/Kconfig  |   7 +
 arch/arm/Makefile |   1 +
 arch/arm/mach-nexell/Kconfig  |  67 +++
 arch/arm/mach-nexell/Makefile |  13 +
 arch/arm/mach-nexell/clock.c  | 869 ++
 arch/arm/mach-nexell/cmd_boot_linux.c | 145 ++
 arch/arm/mach-nexell/config.mk|  11 +
 arch/arm/mach-nexell/nx_gpio.c| 352 ++
 arch/arm/mach-nexell/nx_sec_reg.c |  82 
 arch/arm/mach-nexell/reg-call.S   |  23 +
 arch/arm/mach-nexell/reset.c  |  33 ++
 arch/arm/mach-nexell/tieoff.c | 109 +
 arch/arm/mach-nexell/timer.c  | 297 
 13 files changed, 2009 insertions(+)
 create mode 100644 arch/arm/mach-nexell/Kconfig
 create mode 100644 arch/arm/mach-nexell/Makefile
 create mode 100644 arch/arm/mach-nexell/clock.c
 create mode 100644 arch/arm/mach-nexell/cmd_boot_linux.c
 create mode 100644 arch/arm/mach-nexell/config.mk
 create mode 100644 arch/arm/mach-nexell/nx_gpio.c
 create mode 100644 arch/arm/mach-nexell/nx_sec_reg.c
 create mode 100644 arch/arm/mach-nexell/reg-call.S
 create mode 100644 arch/arm/mach-nexell/reset.c
 create mode 100644 arch/arm/mach-nexell/tieoff.c
 create mode 100644 arch/arm/mach-nexell/timer.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a623ef5..469aa65 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -875,6 +875,11 @@ config ARCH_MX5
select CPU_V7A
imply MXC_GPIO
 
+config ARCH_NEXELL
+   bool "Nexell S5P4418/S5P6818 SoC"
+   select ENABLE_ARM_SOC_BOOT0_HOOK
+   select DM
+
 config ARCH_OWL
bool "Actions Semi OWL SoCs"
select ARM64
@@ -1797,6 +1802,8 @@ source "arch/arm/cpu/armv8/Kconfig"
 
 source "arch/arm/mach-imx/Kconfig"
 
+source "arch/arm/mach-nexell/Kconfig"
+
 source "board/bosch/shc/Kconfig"
 source "board/bosch/guardian/Kconfig"
 source "board/CarMediaLab/flea3/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1e60a9f..5a390b8 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -67,6 +67,7 @@ machine-$(CONFIG_ARCH_MESON)  += meson
 machine-$(CONFIG_ARCH_MVEBU)   += mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
+machine-$(CONFIG_ARCH_NEXELL)  += nexell
 machine-$(CONFIG_ORION5X)  += orion5x
 machine-$(CONFIG_ARCH_OMAP2PLUS)   += omap2
 machine-$(CONFIG_ARCH_OWL) += owl
diff --git a/arch/arm/mach-nexell/Kconfig b/arch/arm/mach-nexell/Kconfig
new file mode 100644
index 000..5368909
--- /dev/null
+++ b/arch/arm/mach-nexell/Kconfig
@@ -0,0 +1,67 @@
+if ARCH_NEXELL
+
+config NEXELL_COMMON
+   bool "Nexell common options"
+
+config NEXELL_ARMV7_COMMON
+   bool "Nexell 32-bit common options"
+   select CPU_V7A
+   select NEXELL_COMMON
+   #select SUPPORT_SPL
+
+config NEXELL_ARMV8_COMMON
+   bool "Nexell 64-bit common options"
+   select ARM64
+   select ARMV8_MULTIENTRY
+   select NEXELL_COMMON
+
+config ARCH_S5P4418
+   bool "Nexell S5P4418 SoC"
+   select NEXELL_ARMV7_COMMON
+   select OF_CONTROL
+   select OF_SEPARATE
+   select NX_GPIO
+   select PL011_SERIAL
+   select PL011_SERIAL_FLUSH_ON_INIT
+
+config ARCH_S5P6818
+   bool "Nexell S5P6818 SoC"
+   select NEXELL_ARMV8_COMMON
+
+menu "Nexell S5P4418/S5P6818"
+   #depends on ARCH_S5P4418
+   depends on ARCH_NEXELL
+
+choice
+   prompt "Nexell S5P4418/S5P6818 board select"
+   optional
+
+config TARGET_NANOPI2
+   bool "FriendlyARM NanoPi2 Board"
+   select ARCH_S5P4418
+
+endchoice
+
+config SYS_BOARD
+   default "nanopi2"
+
+config SYS_VENDOR
+   default "friendlyarm"
+
+config SYS_SOC
+   default "nexell"
+
+config SYS_CONFIG_NAME
+   default "s5p4418_nanopi2"
+
+endmenu
+
+config SYS_PLLFIN
+   int
+
+config TIMER_SYS_TICK_CH
+ 

[RFC PATCH v2 05/13] mmc: add nexell driver

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- mmc: nexell_dw_mmc.c changed to nexell_dw_mmc_dm.c (switched to DM).

Signed-off-by: Stefan Bosch 
---

Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
  into separate commits for gpio, i2c, mmc, pwm.

 drivers/mmc/Kconfig|   6 +
 drivers/mmc/Makefile   |   1 +
 drivers/mmc/nexell_dw_mmc_dm.c | 350 +
 3 files changed, 357 insertions(+)
 create mode 100644 drivers/mmc/nexell_dw_mmc_dm.c

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 2f0eedc..bb8e7c0 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -253,6 +253,12 @@ config MMC_DW_SNPS
  This selects support for Synopsys DesignWare Memory Card Interface 
driver
  extensions used in various Synopsys ARC devboards.
 
+config NEXELL_DWMMC
+   bool "Nexell SD/MMC controller support"
+   depends on ARCH_NEXELL
+   depends on MMC_DW
+   default y
+
 config MMC_MESON_GX
bool "Meson GX EMMC controller support"
depends on DM_MMC && BLK && ARCH_MESON
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 9c1f8e5..a7b5a7b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
 obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
 obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
+obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc_dm.o
 
 # SDHCI
 obj-$(CONFIG_MMC_SDHCI)+= sdhci.o
diff --git a/drivers/mmc/nexell_dw_mmc_dm.c b/drivers/mmc/nexell_dw_mmc_dm.c
new file mode 100644
index 000..b06b60d
--- /dev/null
+++ b/drivers/mmc/nexell_dw_mmc_dm.c
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Nexell
+ * Youngbok, Park 
+ *
+ * (C) Copyright 2019 Stefan Bosch 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DWMCI_CLKSEL   0x09C
+#define DWMCI_SHIFT_0  0x0
+#define DWMCI_SHIFT_1  0x1
+#define DWMCI_SHIFT_2  0x2
+#define DWMCI_SHIFT_3  0x3
+#define DWMCI_SET_SAMPLE_CLK(x)(x)
+#define DWMCI_SET_DRV_CLK(x)   ((x) << 16)
+#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
+#define DWMCI_CLKCTRL  0x114
+#define NX_MMC_CLK_DELAY(x, y, a, b)   x) & 0xFF) << 0) |\
+   (((y) & 0x03) << 16) |\
+   (((a) & 0xFF) << 8)  |\
+   (((b) & 0x03) << 24))
+
+struct nexell_mmc_plat {
+   struct mmc_config cfg;
+   struct mmc mmc;
+};
+
+struct nexell_dwmmc_priv {
+   struct clk *clk;
+   struct dwmci_host host;
+   int fifo_size;
+   bool fifo_mode;
+   int frequency;
+   u32 min_freq;
+   u32 max_freq;
+   int d_delay;
+   int d_shift;
+   int s_delay;
+   int s_shift;
+
+};
+
+struct clk *clk_get(const char *id);
+
+static void set_pin_stat(int index, int bit, int value)
+{
+#if !defined(CONFIG_SPL_BUILD)
+   nx_gpio_set_pad_function(index, bit, value);
+#else
+#if defined(CONFIG_ARCH_S5P4418) ||\
+   defined(CONFIG_ARCH_S5P6818)
+
+   unsigned long base[5] = {
+   PHY_BASEADDR_GPIOA, PHY_BASEADDR_GPIOB,
+   PHY_BASEADDR_GPIOC, PHY_BASEADDR_GPIOD,
+   PHY_BASEADDR_GPIOE,
+   };
+
+   dw_mmc_set_pin(base[index], bit, value);
+#endif
+#endif
+}
+
+static void nx_dw_mmc_set_pin(struct dwmci_host *host)
+{
+   debug("  %s(): dev_index == %d", __func__, host->dev_index);
+
+   switch (host->dev_index) {
+   case 0:
+   set_pin_stat(0, 29, 1);
+   set_pin_stat(0, 31, 1);
+   set_pin_stat(1, 1, 1);
+   set_pin_stat(1, 3, 1);
+   set_pin_stat(1, 5, 1);
+   set_pin_stat(1, 7, 1);
+   break;
+   case 1:
+   set_pin_stat(3, 22, 1);
+   set_pin_stat(3, 23, 1);
+   set_pin_stat(3, 24, 1);
+   set_pin_stat(3, 25, 1);
+   set_pin_stat(3, 26, 1);
+   set_pin_stat(3, 27, 1);
+   break;
+   case 2:
+   set_pin_stat(2, 18, 2);
+   set_pin_stat(2, 19, 2);
+   set_pin_stat(2, 20, 2);
+   set_pin_stat(2, 21, 2);
+   set_pin_stat(2, 22, 2);
+   set_pin_stat(2, 23, 2);
+   if (host->buswidth == 8) {
+   set_pin_stat(4, 21, 2);
+   set_pin_stat(4, 22, 2);
+   set_pin_stat(4, 23, 2);
+   set_pin_stat(4, 24, 2);
+   }
+   break;
+   default:
+   debug(" is invalid!");
+   }
+   debug("\n");
+}
+
+static void nx_dw_mmc_clksel(struct dwmci_host *host)
+{
+   u32 val;
+

[RFC PATCH v2 07/13] video: add nexell video driver (soc: displaytop)

[Stefan Bosch]

Low level functions for DisplayTop (Display Topology).

Signed-off-by: Stefan Bosch 
---

Changes in v2: None

 drivers/video/nexell/soc/s5pxx18_soc_disptop.c | 185 ++
 drivers/video/nexell/soc/s5pxx18_soc_disptop.h | 385 +
 drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.c | 309 +
 drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.h |  59 
 drivers/video/nexell/soc/s5pxx18_soc_disptype.h|  23 ++
 5 files changed, 961 insertions(+)
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop.c
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop.h
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.c
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.h
 create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptype.h

diff --git a/drivers/video/nexell/soc/s5pxx18_soc_disptop.c 
b/drivers/video/nexell/soc/s5pxx18_soc_disptop.c
new file mode 100644
index 000..626e53a
--- /dev/null
+++ b/drivers/video/nexell/soc/s5pxx18_soc_disptop.c
@@ -0,0 +1,185 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016  Nexell Co., Ltd.
+ *
+ * Author: junghyun, kim 
+ */
+
+#include 
+#include 
+
+#include "s5pxx18_soc_disptop.h"
+
+static struct {
+   struct nx_disp_top_register_set *pregister;
+} __g_module_variables = { NULL, };
+
+int nx_disp_top_initialize(void)
+{
+   static int binit;
+   u32 i;
+
+   if (binit == 0) {
+   for (i = 0; i < NUMBER_OF_DISPTOP_MODULE; i++)
+   __g_module_variables.pregister = NULL;
+   binit = 1;
+   }
+   return 1;
+}
+
+u32 nx_disp_top_get_number_of_module(void)
+{
+   return NUMBER_OF_DISPTOP_MODULE;
+}
+
+u32 nx_disp_top_get_physical_address(void)
+{
+   static const u32 physical_addr[] = PHY_BASEADDR_DISPTOP_LIST;
+
+   return (u32)(physical_addr[0] + PHY_BASEADDR_DISPLAYTOP_MODULE_OFFSET);
+}
+
+u32 nx_disp_top_get_size_of_register_set(void)
+{
+   return sizeof(struct nx_disp_top_register_set);
+}
+
+void nx_disp_top_set_base_address(void *base_address)
+{
+   __g_module_variables.pregister =
+   (struct nx_disp_top_register_set *)base_address;
+}
+
+void *nx_disp_top_get_base_address(void)
+{
+   return (void *)__g_module_variables.pregister;
+}
+
+void nx_disp_top_set_resconvmux(int benb, u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+   u32 regvalue;
+
+   pregister = __g_module_variables.pregister;
+   regvalue = (benb << 31) | (sel << 0);
+   writel((u32)regvalue, >resconv_mux_ctrl);
+}
+
+void nx_disp_top_set_hdmimux(int benb, u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+   u32 regvalue;
+
+   pregister = __g_module_variables.pregister;
+   regvalue = (benb << 31) | (sel << 0);
+   writel((u32)regvalue, >interconv_mux_ctrl);
+}
+
+void nx_disp_top_set_mipimux(int benb, u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+   u32 regvalue;
+
+   pregister = __g_module_variables.pregister;
+   regvalue = (benb << 31) | (sel << 0);
+   writel((u32)regvalue, >mipi_mux_ctrl);
+}
+
+void nx_disp_top_set_lvdsmux(int benb, u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+   u32 regvalue;
+
+   pregister = __g_module_variables.pregister;
+   regvalue = (benb << 31) | (sel << 0);
+   writel((u32)regvalue, >lvds_mux_ctrl);
+}
+
+void nx_disp_top_set_primary_mux(u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+
+   pregister = __g_module_variables.pregister;
+   writel((u32)sel, >tftmpu_mux);
+}
+
+void nx_disp_top_hdmi_set_vsync_start(u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+
+   pregister = __g_module_variables.pregister;
+   writel((u32)sel, >hdmisyncctrl0);
+}
+
+void nx_disp_top_hdmi_set_vsync_hsstart_end(u32 start, u32 end)
+{
+   register struct nx_disp_top_register_set *pregister;
+
+   pregister = __g_module_variables.pregister;
+   writel((u32)(end << 16) | (start << 0), >hdmisyncctrl3);
+}
+
+void nx_disp_top_hdmi_set_hactive_start(u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+
+   pregister = __g_module_variables.pregister;
+   writel((u32)sel, >hdmisyncctrl1);
+}
+
+void nx_disp_top_hdmi_set_hactive_end(u32 sel)
+{
+   register struct nx_disp_top_register_set *pregister;
+
+   pregister = __g_module_variables.pregister;
+   writel((u32)sel, >hdmisyncctrl2);
+}
+
+void nx_disp_top_set_hdmifield(u32 enable, u32 init_val, u32 vsynctoggle,
+  u32 hsynctoggle, u32 vsyncclr, u32 hsyncclr,
+  u32 field_use, u32 muxsel)
+{
+   register struct nx_disp_top_register_set *pregister;
+   u32 regvalue;
+
+   pregister = __g_module_variables.pregister;
+   regvalue = ((enable & 0x01) << 0) | 

[RFC PATCH v2 01/13] arm: add mach-nexell (header files)

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- DM_VIDEO support (display_dev.h).
- boot0.h added, handles NSIH --> tools/nexell obsolete.
- gpio.h: Include-path to errno.h changed.

Signed-off-by: Stefan Bosch 
---

Changes in v2:
- cosmetic: additional GPL license text removed, SPDX-License-Identifier
  is enough.

 arch/arm/mach-nexell/include/mach/boot0.h|  40 +++
 arch/arm/mach-nexell/include/mach/clk.h  |  24 ++
 arch/arm/mach-nexell/include/mach/display.h  | 273 +++
 arch/arm/mach-nexell/include/mach/display_dev.h  |  37 ++
 arch/arm/mach-nexell/include/mach/ehci.h | 106 ++
 arch/arm/mach-nexell/include/mach/gpio.h |  17 +
 arch/arm/mach-nexell/include/mach/mipi_display.h | 215 
 arch/arm/mach-nexell/include/mach/nexell.h   | 352 +++
 arch/arm/mach-nexell/include/mach/nx_gpio.h  | 103 ++
 arch/arm/mach-nexell/include/mach/reset.h|  19 +
 arch/arm/mach-nexell/include/mach/sec_reg.h  |  15 +
 arch/arm/mach-nexell/include/mach/tieoff.h   | 423 +++
 12 files changed, 1624 insertions(+)
 create mode 100644 arch/arm/mach-nexell/include/mach/boot0.h
 create mode 100644 arch/arm/mach-nexell/include/mach/clk.h
 create mode 100644 arch/arm/mach-nexell/include/mach/display.h
 create mode 100644 arch/arm/mach-nexell/include/mach/display_dev.h
 create mode 100644 arch/arm/mach-nexell/include/mach/ehci.h
 create mode 100644 arch/arm/mach-nexell/include/mach/gpio.h
 create mode 100644 arch/arm/mach-nexell/include/mach/mipi_display.h
 create mode 100644 arch/arm/mach-nexell/include/mach/nexell.h
 create mode 100644 arch/arm/mach-nexell/include/mach/nx_gpio.h
 create mode 100644 arch/arm/mach-nexell/include/mach/reset.h
 create mode 100644 arch/arm/mach-nexell/include/mach/sec_reg.h
 create mode 100644 arch/arm/mach-nexell/include/mach/tieoff.h

diff --git a/arch/arm/mach-nexell/include/mach/boot0.h 
b/arch/arm/mach-nexell/include/mach/boot0.h
new file mode 100644
index 000..e05c07e
--- /dev/null
+++ b/arch/arm/mach-nexell/include/mach/boot0.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * NSIH (Nexell System Information Header) for FriendlyArm nanopi2 board
+ *
+ * The NSIH (first 512 Bytes of u-boot.bin) is necessary for the
+ * 2nd-Bootloader to get information like load address of U-Boot.
+ *
+ * 0x400 must be added to CONFIG_SYS_TEXT_BASE to have the actual load and
+ * start address because 2nd-Bootloader loads with an offset of 0x400
+ * (NSIH + 0x200 bytes are not loaded into RAM).
+ *
+ * It has been tested / is working with the following 2nd-Bootloader:
+ * "BL1 by Nexell V1.0.0-gd551e13 [Built on 2018-01-25 16:58:29]"
+ *
+ * (C) Copyright 2020 Stefan Bosch 
+ */
+
+#ifndef __BOOT0_H
+#define __BOOT0_H
+
+   ARM_VECTORS
+   .space  0x30
+   .word   (_end - _start) + 20 * 1024 /* 0x50: load size
+*   (bin + 20k for DTB) */
+   .space  0x4
+   .word   CONFIG_SYS_TEXT_BASE + 0x400/* 0x58: load address */
+   .word   0x
+   .word   CONFIG_SYS_TEXT_BASE + 0x400/* 0x60: start address */
+   .space  0x198
+   .byte   'N' /* 0x1FC: "NSIH" signature */
+   .byte   'S'
+   .byte   'I'
+   .byte   'H'
+
+   /* The NSIH + 0x200 bytes are omitted by the 2nd-Bootloader */
+   .space  0x200
+_start:
+   ARM_VECTORS
+
+#endif /* __BOOT0_H */
diff --git a/arch/arm/mach-nexell/include/mach/clk.h 
b/arch/arm/mach-nexell/include/mach/clk.h
new file mode 100644
index 000..cc5589a
--- /dev/null
+++ b/arch/arm/mach-nexell/include/mach/clk.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * (C) Copyright 2016 Nexell
+ * Hyunseok, Jung 
+ */
+
+#ifndef __ASM_ARM_ARCH_CLK_H_
+#define __ASM_ARM_ARCH_CLK_H_
+
+struct clk {
+   unsigned long rate;
+};
+
+void clk_init(void);
+
+struct clk *clk_get(const char *id);
+void clk_put(struct clk *clk);
+unsigned long clk_get_rate(struct clk *clk);
+long clk_round_rate(struct clk *clk, unsigned long rate);
+int clk_set_rate(struct clk *clk, unsigned long rate);
+int clk_enable(struct clk *clk);
+void clk_disable(struct clk *clk);
+
+#endif
diff --git a/arch/arm/mach-nexell/include/mach/display.h 
b/arch/arm/mach-nexell/include/mach/display.h
new file mode 100644
index 000..b167e63
--- /dev/null
+++ b/arch/arm/mach-nexell/include/mach/display.h
@@ -0,0 +1,273 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * Copyright (C) 2016  Nexell Co., Ltd.
+ *
+ * Author: junghyun, kim 
+ */
+
+#ifndef _NX__DISPLAY_H_
+#define _NX__DISPLAY_H_
+
+#defineDP_PLANS_NUM3
+
+/* the display output format. */
+#defineDPC_FORMAT_RGB555   0  /* RGB555 Format */
+#defineDPC_FORMAT_RGB565   1  /* RGB565 Format */
+#defineDPC_FORMAT_RGB666   2  /* RGB666 Format */
+#defineDPC_FORMAT_RGB888

[RFC PATCH v2 04/13] i2c: add nexell driver

[Stefan Bosch]

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
  "struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
  in order s5p4418 is also working.
- "probe_chip" added.

Signed-off-by: Stefan Bosch 
---

Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
  into separate commits for gpio, i2c, mmc, pwm.
- several Bugfixes in nx_i2c.c.
- the i2c-driver has been for s5p6818 only. Code extended approriately
  in order s5p4418 is also working.
- "probe_chip" added to the i2c-driver.
- doc/device-tree-bindings/i2c/nx_i2c.txt added.

 doc/device-tree-bindings/i2c/nx_i2c.txt |  28 ++
 drivers/i2c/Kconfig |   9 +
 drivers/i2c/Makefile|   1 +
 drivers/i2c/nx_i2c.c| 649 
 4 files changed, 687 insertions(+)
 create mode 100644 doc/device-tree-bindings/i2c/nx_i2c.txt
 create mode 100644 drivers/i2c/nx_i2c.c

diff --git a/doc/device-tree-bindings/i2c/nx_i2c.txt 
b/doc/device-tree-bindings/i2c/nx_i2c.txt
new file mode 100644
index 000..9f3abe7
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/nx_i2c.txt
@@ -0,0 +1,28 @@
+I2C controller embedded in Nexell's/Samsung's SoC S5P4418 and S5P6818
+
+Driver:
+- drivers/i2c/nx_i2c.c
+
+Required properties:
+- #address-cells = <1>;
+- #size-cells = <0>;
+- compatible = "nexell,s5pxx18-i2c";
+- reg = ;
+Where i2c_base has to be the base address of the i2c-register set.
+I2C0: 0xc00a4000
+I2C1: 0xc00a5000
+I2C2: 0xc00a6000
+
+Optional properties:
+- clock-frequency: Desired I2C bus frequency in Hz, default value is 10.
+- i2c-sda-delay-ns (S5P6818 only): SDA delay in ns, default value is 0.
+- Child nodes conforming to i2c bus binding.
+
+Example:
+   i2c0:i2c@c00a4000 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "nexell,s5pxx18-i2c";
+   reg = <0xc00a4000 0x100>;
+   clock-frequency = <40>;
+   };
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 03d2fed..2cd0ed3 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -317,6 +317,15 @@ config SYS_MXC_I2C8_SLAVE
 MXC I2C8 Slave
 endif
 
+config SYS_I2C_NEXELL
+   bool "Nexell I2C driver"
+   depends on DM_I2C
+   help
+ Add support for the Nexell I2C driver. This is used with various
+ Nexell parts such as S5Pxx18 series SoCs. All chips
+ have several I2C ports and all are provided, controlled by the
+ device tree.
+
 config SYS_I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
depends on ARCH_OMAP2PLUS || ARCH_K3
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index f5a471f..64b8ead 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
 obj-$(CONFIG_SYS_I2C_MESON) += meson_i2c.o
 obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
 obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
+obj-$(CONFIG_SYS_I2C_NEXELL) += nx_i2c.o
 obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
 obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o
 obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o
diff --git a/drivers/i2c/nx_i2c.c b/drivers/i2c/nx_i2c.c
new file mode 100644
index 000..9bcf1f2
--- /dev/null
+++ b/drivers/i2c/nx_i2c.c
@@ -0,0 +1,649 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define I2C_WRITE   0
+#define I2C_READ1
+
+#define I2CSTAT_MTM 0xC0/* Master Transmit Mode */
+#define I2CSTAT_MRM 0x80/* Master Receive Mode */
+#define I2CSTAT_BSY 0x20/* Read: Bus Busy */
+#define I2CSTAT_SS  0x20/* Write: START (1) / STOP (0) */
+#define I2CSTAT_RXTXEN  0x10/* Rx/Tx enable */
+#define I2CSTAT_ABT0x08/* Arbitration bit */
+#define I2CSTAT_NACK0x01/* Nack bit */
+#define I2CCON_IRCLR0x100   /* Interrupt Clear bit  */
+#define I2CCON_ACKGEN   0x80/* Acknowledge generation */
+#define I2CCON_IRENB   0x20/* Interrupt Enable bit  */
+#define I2CCON_IRPND0x10/* Interrupt pending bit */
+
+#ifdef CONFIG_ARCH_S5P6818
+#define I2CLC_FILTER   0x04/* SDA filter on */
+#else
+#define STOPCON_CLR0x01/* Clock Line Release */
+#define STOPCON_DLR0x02/* Data Line Release */
+#define STOPCON_NAG0x04/* not-ackn. generation and data shift cont. */
+#endif
+
+#define I2C_TIMEOUT_MS 10  /* 10 ms */
+
+#define I2C_M_NOSTOP   0x100
+
+#define MAX_I2C_NUM 3
+
+#define DEFAULT_SPEED   10  /* default I2C speed [Hz] */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct nx_i2c_regs {
+   uint iiccon;
+   uint iicstat;
+   uint iicadd;
+   uint iicds;
+#ifdef CONFIG_ARCH_S5P6818
+   /* S5P6818: Offset 0x10 is Line Control Register (SDA-delay, Filter) */
+   uint iiclc;

[RFC PATCH v2 00/13] arm: add support for SoC S5P4418

[Stefan Bosch]

This patch adds support for SAMSUNG's/NEXELL's ARM Cortex-A9 based
S5P4418 SoC, especially FriendlyARM's NanoPi2 and NanoPC-T2 boards.
It is based on the following FriendlyARM's U-Boot version:
https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01.

Main changes in relation to nanopi2-v2016.01:
- Cosmetic changes due to patman warnings/errors.
- MMC and Video drivers changed to DM.
- Configs reworked (e.g. "CONFIG_..." moved from s5p4418_nanopi2.h
  to s5p4418_nanopi2_defconfig)
- SPL related files are not included.
- MACH_TYPE_S5P4418 is not defined/used anymore.
- arch/arm/mach-nexell/include/mach/boot0.h added to generate the NSIH
  (Nexell System Information Header), substitudes tools/nexell.
- board/s5p4418/ renamed to board/friendlyarm/
- Only the NanoPi2 and NanoPC-T2 boards are supported yet because I
  do only have the NanoPC-T2 board to test the code (this board uses
  the NanoPi2 code).
- USB is not supported yet.

The patch-series has been checked by buildman (all arm boards and two
m68k boards = M5235EVB):
  buildman --step 0 -b master arm
  buildman --step 0 -b master M5235EVB
There have been no new warnings or errors.

Changes in v2:
- arch/arm/mach-nexell/serial.c removed because this is for the UARTs
  of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are
  different, here the (existing) PL011-code is used.
- line '... += spl/' in in arch/arm/mach-nexell/Makefile deleted, this
  change has already been stated in the commit message but was missing
  nethertheless.
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
  into separate commits for gpio, i2c, mmc, pwm.
- cosmetic: line "obj-$(CONFIG_NX_GPIO) += nx_gpio.o" in
  drivers/gpio/Makefile moved up.
- several Bugfixes in nx_i2c.c.
- the i2c-driver has been for s5p6818 only. Code extended approriately
  in order s5p4418 is also working.
- "probe_chip" added to the i2c-driver.
- doc/device-tree-bindings/i2c/nx_i2c.txt added.
- Since drivers/pwm/pwm-nexell.c is an adapted version of
  s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c
  is used now. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h
  copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile
  changed appropriately.
- i2c: "nexell,s5pxx18-i2c"-driver is used now instead of "i2c-gpio".
  i2c0 and i2c1 added. I.e. dts files changed appropriately.
- dts: gmac-, ehci- and dwc2otg-entries removed because the appropriate
  functionality is not supported yet.
- s5p4418-pinctrl.dtsi removed because there is no pinctrl-driver
  available.
- "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to
  arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used now instead
  of drivers/pwm/pwm-nexell.c.
- cosmetic: additional GPL license text removed, SPDX-License-Identifier
  is enough. Furthermore file path removed (two files).
- USB related configs removed because USB is not supported yet.
- CONFIG_CMD_MEMTEST moved from s5p4418_nanopi2.h to
  s5p4418_nanopi2_defconfig.
- MAINTAINERS: "F: drivers/pwm/pwm-nexell*" deleted because
  arch/arm/cpu/armv7/s5p-common/pwm.c is used now. Furthermore double
  line "F: drivers/video/nexell/" deleted.

Stefan Bosch (13):
  arm: add mach-nexell (header files)
  arm: add mach-nexell (all files except header files)
  gpio: add nexell driver
  i2c: add nexell driver
  mmc: add nexell driver
  pwm: add driver for nexell
  video: add nexell video driver (soc: displaytop)
  video: add nexell video driver (soc: mlc, mipi)
  video: add nexell video driver (soc: lvds, hdmi)
  video: add nexell video driver (soc: dpc, makefile)
  video: add nexell video driver (display/video driver)
  arm: add support for SoC s5p4418 (cpu) / nanopi2 board
  arm: add (default) config for nanopi2 board

 MAINTAINERS|   16 +
 arch/arm/Kconfig   |7 +
 arch/arm/Makefile  |1 +
 arch/arm/cpu/armv7/Makefile|2 +
 arch/arm/cpu/armv7/s5p-common/Makefile |4 +
 arch/arm/cpu/armv7/s5p-common/pwm.c|   56 +
 arch/arm/cpu/armv7/s5p4418/Makefile|6 +
 arch/arm/cpu/armv7/s5p4418/cpu.c   |  120 ++
 arch/arm/dts/Makefile  |3 +
 arch/arm/dts/s5p4418-nanopi2.dts   |  108 ++
 arch/arm/dts/s5p4418.dtsi  |  148 ++
 arch/arm/mach-nexell/Kconfig   |   67 +
 arch/arm/mach-nexell/Makefile  |   13 +
 arch/arm/mach-nexell/clock.c   |  869 +
 arch/arm/mach-nexell/cmd_boot_linux.c  |  145 ++
 arch/arm/mach-nexell/config.mk |   11 +
 arch/arm/mach-nexell/include/mach/boot0.h  |   40 +
 arch/arm/mach-nexell/include/mach/clk.h|   24 +
 arch/arm/mach-nexell/include/mach/display.h|  273 +++
 arch/arm/mach-nexell/include/mach/display_dev.h|   37 +
 

[RFC PATCH v2 03/13] gpio: add nexell driver

[Stefan Bosch]

Signed-off-by: Stefan Bosch 
---

Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
  into separate commits for gpio, i2c, mmc, pwm.
- cosmetic: line "obj-$(CONFIG_NX_GPIO) += nx_gpio.o" in
  drivers/gpio/Makefile moved up.

 drivers/gpio/Kconfig   |   9 ++
 drivers/gpio/Makefile  |   1 +
 drivers/gpio/nx_gpio.c | 252 +
 3 files changed, 262 insertions(+)
 create mode 100644 drivers/gpio/nx_gpio.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 1de6f52..febda89 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -421,4 +421,13 @@ config MT7621_GPIO
help
  Say yes here to support MediaTek MT7621 compatible GPIOs.
 
+config NX_GPIO
+   bool "Nexell GPIO driver"
+   depends on DM_GPIO
+   help
+ Support GPIO access on Nexell SoCs. The GPIOs are arranged into
+ a number of banks (different for each SoC type) each with 32 GPIOs.
+ The GPIOs for a device are defined in the device tree with one node
+ for each bank.
+
 endmenu
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 449046b..cb20478 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -64,4 +64,5 @@ obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o
 obj-$(CONFIG_PM8916_GPIO)  += pm8916_gpio.o
 obj-$(CONFIG_MT7621_GPIO)  += mt7621_gpio.o
 obj-$(CONFIG_MSCC_SGPIO)   += mscc_sgpio.o
+obj-$(CONFIG_NX_GPIO)  += nx_gpio.o
 obj-$(CONFIG_SIFIVE_GPIO)  += sifive-gpio.o
diff --git a/drivers/gpio/nx_gpio.c b/drivers/gpio/nx_gpio.c
new file mode 100644
index 000..86472f6
--- /dev/null
+++ b/drivers/gpio/nx_gpio.c
@@ -0,0 +1,252 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Nexell
+ * DeokJin, Lee 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct nx_gpio_regs {
+   u32 data;   /* Data register */
+   u32 outputenb;  /* Output Enable register */
+   u32 detmode[2]; /* Detect Mode Register */
+   u32 intenb; /* Interrupt Enable Register */
+   u32 det;/* Event Detect Register */
+   u32 pad;/* Pad Status Register */
+};
+
+struct nx_alive_gpio_regs {
+   u32 pwrgate;/* Power Gating Register */
+   u32 reserved0[28];  /* Reserved0 */
+   u32 outputenb_reset;/* Alive GPIO Output Enable Reset Register */
+   u32 outputenb;  /* Alive GPIO Output Enable Register */
+   u32 outputenb_read; /* Alive GPIO Output Read Register */
+   u32 reserved1[3];   /* Reserved1 */
+   u32 pad_reset;  /* Alive GPIO Output Reset Register */
+   u32 data;   /* Alive GPIO Output Register */
+   u32 pad_read;   /* Alive GPIO Pad Read Register */
+   u32 reserved2[33];  /* Reserved2 */
+   u32 pad;/* Alive GPIO Input Value Register */
+};
+
+struct nx_gpio_platdata {
+   void *regs;
+   int gpio_count;
+   const char *bank_name;
+};
+
+static int nx_alive_gpio_is_check(struct udevice *dev)
+{
+   struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+   const char *bank_name = plat->bank_name;
+
+   if (!strcmp(bank_name, "gpio_alv"))
+   return 1;
+
+   return 0;
+}
+
+static int nx_alive_gpio_direction_input(struct udevice *dev, unsigned int pin)
+{
+   struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+   struct nx_alive_gpio_regs *const regs = plat->regs;
+
+   setbits_le32(>outputenb_reset, 1 << pin);
+
+   return 0;
+}
+
+static int nx_alive_gpio_direction_output(struct udevice *dev, unsigned int 
pin,
+ int val)
+{
+   struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+   struct nx_alive_gpio_regs *const regs = plat->regs;
+
+   if (val)
+   setbits_le32(>data, 1 << pin);
+   else
+   setbits_le32(>pad_reset, 1 << pin);
+
+   setbits_le32(>outputenb, 1 << pin);
+
+   return 0;
+}
+
+static int nx_alive_gpio_get_value(struct udevice *dev, unsigned int pin)
+{
+   struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+   struct nx_alive_gpio_regs *const regs = plat->regs;
+   unsigned int mask = 1UL << pin;
+   unsigned int value;
+
+   value = (readl(>pad_read) & mask) >> pin;
+
+   return value;
+}
+
+static int nx_alive_gpio_set_value(struct udevice *dev, unsigned int pin,
+  int val)
+{
+   struct nx_gpio_platdata *plat = dev_get_platdata(dev);
+   struct nx_alive_gpio_regs *const regs = plat->regs;
+
+   if (val)
+   setbits_le32(>data, 1 << pin);
+   else
+   clrbits_le32(>pad_reset, 1 << pin);
+
+   return 0;
+}
+
+static int nx_alive_gpio_get_function(struct udevice *dev, unsigned int 

Re: [PATCH 1/1] vexpress_ca9x4: Enable use of correct DTB file and restore EFI loader.

[Heinrich Schuchardt]

On 3/27/20 8:18 AM, Kristian Amlie wrote:

On 27/03/2020 06:44, Heinrich Schuchardt wrote:

On 3/27/20 2:39 AM, Tom Rini wrote:

On Tue, Feb 25, 2020 at 06:22:16PM +0100, Kristian Amlie wrote:


EFI was disabled in f95b8a4b5f64f because of the missing DTB file,
and indeed, the DTB file is required to load recent versions of GRUB
(2.04) correctly.

Signed-off-by: Kristian Amlie 


Applied to u-boot/master, thanks!



Since this patch is merged I get errors on Gitlab for vexpress_ca9x4:

https://gitlab.denx.de/u-boot/custodians/u-boot-efi/-/jobs/69269

Filename 'lib/efi_loader/helloworld.efi'.
Load address: 0x6000
Loading: *#
  1.8 MiB/s
done
Bytes transferred = 1840 (730 hex)
smc911x: MAC 52:54:00:12:34:56
=> => crc32 6000 $filesize
CRC32 for 6000 ... 672f ==> f5c77855
=> => bootefi 6000
78Scanning disks on mmc...
Card did not respond to voltage select!
MMC Device 1 not found
MMC Device 2 not found
MMC Device 3 not found
Found 0 disks
ERROR: need device tree


Is the "bootefi 6000" command correct? Doesn't "bootefi" need to be
called with both an EFI binary address and a device tree address?



bootefi uses $fdtcontroladdr as fallback for the device tree. But this
variable is only available if CONFIG_OF_CONTROL is set. We should adjust
the python test to check this.

CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
This line is incorrect. We never use a .dtb extension here.

Best regards

Heinrich

Re: [PATCH 00/16] efi_loader: non-volatile and runtime variables

[Heinrich Schuchardt]

On 3/27/20 8:44 PM, Simon Glass wrote:

Hi Heinrich,

On Thu, 26 Mar 2020 at 23:28, Heinrich Schuchardt  wrote:


Up to UEFI variable where stored in U-Boot environment variables. Saving


That doesn't read right to me.


This should be:

Up to now UEFI variable were stored in U-Boot environment variables




UEFI variables was not possible without saving the U-Boot environment
variables.

With this patch series file ubootefi.var in the EFI system partition is
used for saving UEFI variables.

Furthermore the UEFI variables are exposed at runtime and are writable at
runtime.

The missing piece is transferring the variable changed at runtime back to
the firmware. I will evaluate the following options:

* using a fixed memory address: we could read the memory area after a
   reboot
* using a systemd service which is called before the system goes down

Many of the CCs are due to the changes in disk/part_efi.c. Here the logic
to detect the EFI system partition is introduced (patch 04/16).

Heinrich Schuchardt (16):
   cmd: efidebug: fix int to pointer cast
   efi_loader: only reserve memory if fdt node enabled
   efi_loader: eliminate EFI_CALL() for variable access
   part: detect EFI system partition
   efi_loader: identify EFI system partition
   efi_loader: keep attributes in efi_set_variable_int()
   efi_loader: export initialization state
   efi_loader: change setup sequence
   efi_loader: imply FAT, FAT_WRITE
   efi_loader: UEFI variable persistence
   efi_loader: export efi_convert_pointer()
   efi_loader: optional pointer for ConvertPointer
   efi_loader: memory buffer for variables
   efi_loader: use memory based variable storage
   efi_loader: enable UEFI variables at runtime
   efi_selftest: adjust runtime test for variables

  cmd/bootefi.c |   3 +-
  cmd/efidebug.c|  71 +-
  cmd/nvedit_efi.c  |  18 +-
  disk/part_dos.c   |  10 +-
  disk/part_efi.c   |  12 +-
  include/efi_api.h |   2 +
  include/efi_loader.h  |  22 +
  include/efi_variable.h|  52 ++
  include/part.h|  11 +-
  lib/efi_loader/Kconfig|  10 +
  lib/efi_loader/Makefile   |   2 +
  lib/efi_loader/efi_bootmgr.c  |  20 +-
  lib/efi_loader/efi_disk.c |  20 +
  lib/efi_loader/efi_runtime.c  |  20 +-
  lib/efi_loader/efi_setup.c|  54 +-
  lib/efi_loader/efi_variable.c | 635 ++
  lib/efi_loader/efi_variables_file.c   | 235 +++
  lib/efi_loader/efi_variables_mem.c| 324 +
  .../efi_selftest_variables_runtime.c  |  47 +-
  19 files changed, 1037 insertions(+), 531 deletions(-)
  create mode 100644 include/efi_variable.h
  create mode 100644 lib/efi_loader/efi_variables_file.c
  create mode 100644 lib/efi_loader/efi_variables_mem.c


Can you use 'vars' instead of variables as these filenames are too long.


Sure

Regards

Heinrich