Re: [PATCH] i2c: i2c-gpio: Support the named GPIO binding
Hello Samuel, On 22.08.21 02:25, Samuel Holland wrote: > To avoid confusion about the order of the GPIOs, the i2c-gpio binding > was updated to use a separate property for each GPIO instead of an > array. However, the driver only supports the old binding. Add support > for the new binding as well, so the driver continues to work as device > trees are updated. > > Signed-off-by: Samuel Holland > --- > > drivers/i2c/i2c-gpio.c | 9 + > 1 file changed, 9 insertions(+) Applied to u-boot-i2c.git master Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH v2 1/1] bootcount: add a new driver with syscon as backend
Hello Nandor, On 10.06.21 14:40, Nandor Han wrote: > The driver will use a syscon regmap as backend and supports both > 16 and 32 size value. The value will be stored in the CPU's endianness. > > Signed-off-by: Nandor Han > --- > > Notes: > Description > --- > Add a new driver for bootcount feature that supports `syscon` device as > backend. > > Testing > --- > UnitTests: > 1. Verify that unit-tests run successfully: PASS > ``` > ./test/py/test.py --bd sandbox --build -k ut_dm_bootcount -v > > test/py/tests/test_ut.py::test_ut[ut_dm_bootcount_rtc] PASSED >[ 33%] > test/py/tests/test_ut.py::test_ut[ut_dm_bootcount_syscon_four_bytes] > PASSED [ 66%] > test/py/tests/test_ut.py::test_ut[ut_dm_bootcount_syscon_two_bytes] > PASSED [100%] > ``` > > Using hardware: > Board: i.MX6sx based dev board > U-Boot version: 2020.01 > 1. Use `bootcount` command to verity that value is updated > correctly: PASS > > > Changes since v1: > - rebased > > arch/sandbox/dts/test.dts | 14 ++ > configs/sandbox_defconfig | 1 + > doc/device-tree-bindings/bootcount-syscon.txt | 25 +++ > drivers/bootcount/Kconfig | 12 ++ > drivers/bootcount/Makefile| 1 + > drivers/bootcount/bootcount_syscon.c | 159 ++ > test/dm/bootcount.c | 48 +- > 7 files changed, 257 insertions(+), 3 deletions(-) > create mode 100644 doc/device-tree-bindings/bootcount-syscon.txt > create mode 100644 drivers/bootcount/bootcount_syscon.c Applied to u-boot-i2c.git master Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCHv2 2/2] gpio: mcp230xx: Introduce new driver
Hello Sebstian, On 15.07.21 17:40, Sebastian Reichel wrote: > Introduce driver for I2C based MCP230xx GPIO chips, which are > quite common and already well supported by the Linux kernel. > > Reviewed-by: Simon Glass > Signed-off-by: Sebastian Reichel > --- > drivers/gpio/Kconfig | 10 ++ > drivers/gpio/Makefile| 1 + > drivers/gpio/mcp230xx_gpio.c | 235 +++ > 3 files changed, 246 insertions(+) > create mode 100644 drivers/gpio/mcp230xx_gpio.c Applied to u-boot-i2c.git master Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCHv2 1/2] i2c: add dm_i2c_reg_clrset
Hello Sebstian, On 15.07.21 17:39, Sebastian Reichel wrote: > Add function to apply a bitmask to an i2c register, so > that specific bits can be cleared and/or set. > > Suggested-by: Simon Glass > Signed-off-by: Sebastian Reichel > --- > drivers/i2c/i2c-uclass.c | 15 +++ > include/i2c.h| 14 ++ > test/dm/i2c.c| 29 + > 3 files changed, 58 insertions(+) Applied to u-boot-i2c.git master Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 01/11] i2c: Add a DM_I2C wrapper for the sun6i_p2wi controller
Hello Samuel, On 22.08.21 19:19, Samuel Holland wrote: > Hi Heiko, > > On 8/22/21 3:38 AM, Heiko Schocher wrote: >> Hello Samuel, >> >> On 22.08.21 01:05, Samuel Holland wrote: >>> This bus controller is used to communicate with an X-Powers AXP PMIC. >>> Currently, various drivers access PMIC registers through a platform- >>> specific non-DM "pmic_bus" interface, which depends on the legacy I2C >>> framework. In order to convert those drivers to use DM_PMIC, this bus >>> needs a DM_I2C driver. >>> >>> Since the non-DM bus controller driver is still needed in SPL, the quick >>> solution is to implement the DM_I2C ops using the existing functions. >>> >>> The register for switching between I2C/P2WI/RSB mode is the same across >>> all PMIC variants, so move that to the common header. >>> >>> Signed-off-by: Samuel Holland >>> --- >>> >>> arch/arm/mach-sunxi/Kconfig| 11 -- >>> arch/arm/mach-sunxi/pmic_bus.c | 7 ++-- >>> drivers/i2c/Kconfig| 8 + >>> drivers/i2c/Makefile | 1 + >>> drivers/i2c/sun6i_p2wi.c | 66 ++ >> >> I wonder, as this config symbol gets also removed, that there >> is no remove of driver code? > > I did not remove any config symbol, only moved it to a different file. Yes, and you add "drivers/i2c/sun6i_p2wi.c", and nowhere code is removed, which is enabled by this config symbol... was the config symbol not used before? Ah, I see, you use code from arch/arm/mach-sunxi/p2wi.c... Shouldn;t this be moved than to drivers/i2c too? Only i2c driver use this functions ... or? (Hope it is not to dummy question...) > It sounds like you want me to use a new symbol for the DM_I2C driver > (SYS_I2C_SUN6I_P2WI). So in that case, I would leave the old symbol > alone, and have SYS_I2C_SUN6I_P2WI select it. Hmm.. better to move the whole code to dirvers/i2c ? > >>> include/axp_pmic.h | 6 >>> 6 files changed, 84 insertions(+), 15 deletions(-) >>> create mode 100644 drivers/i2c/sun6i_p2wi.c >>> >>> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig >>> index 79c669a4813..37076c2dfb3 100644 >>> --- a/arch/arm/mach-sunxi/Kconfig >>> +++ b/arch/arm/mach-sunxi/Kconfig >>> @@ -88,17 +88,6 @@ config DRAM_SUN50I_H616_UNKNOWN_FEATURE >>> feature. >>> endif >>> >>> -config SUN6I_P2WI >>> - bool "Allwinner sun6i internal P2WI controller" >>> - help >>> - If you say yes to this option, support will be included for the >>> - P2WI (Push/Pull 2 Wire Interface) controller embedded in some sunxi >>> - SOCs. >>> - The P2WI looks like an SMBus controller (which supports only byte >>> - accesses), except that it only supports one slave device. >>> - This interface is used to connect to specific PMIC devices (like the >>> - AXP221). >>> - >>> config SUN6I_PRCM >>> bool >>> help >>> diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c >>> index 0394ce85644..673a05fdd16 100644 >>> --- a/arch/arm/mach-sunxi/pmic_bus.c >>> +++ b/arch/arm/mach-sunxi/pmic_bus.c >>> @@ -8,6 +8,7 @@ >>> * axp223 uses the rsb bus, these functions abstract this. >>> */ >>> >>> +#include >>> #include >>> #include >>> #include >>> @@ -21,8 +22,6 @@ >>> #define AXP305_I2C_ADDR0x36 >>> >>> #define AXP221_CHIP_ADDR 0x68 >>> -#define AXP221_CTRL_ADDR 0x3e >>> -#define AXP221_INIT_DATA 0x3e >>> >>> /* AXP818 device and runtime addresses are same as AXP223 */ >>> #define AXP223_DEVICE_ADDR 0x3a3 >>> @@ -40,8 +39,8 @@ int pmic_bus_init(void) >>> #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined >>> CONFIG_AXP818_POWER >>> # ifdef CONFIG_MACH_SUN6I >>> p2wi_init(); >>> - ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, >>> - AXP221_INIT_DATA); >>> + ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP_PMIC_MODE_REG, >>> + AXP_PMIC_MODE_P2WI); >>> # elif defined CONFIG_MACH_SUN8I_R40 >>> /* Nothing. R40 uses the AXP221s in I2C mode */ >>> ret = 0; >>> diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig >>> index 5d27f503bfc..d082676c4b2 100644 >>> --- a/drivers/i2c/Kconfig >>> +++ b/drivers/i2c/Kconfig >>> @@ -577,6 +577,14 @@ config SYS_I2C_STM32F7 >>>_ Optional clock stretching >>>_ Software reset >>> >>> +config SUN6I_P2WI >> >> Could you please use "SYS_I2C_" ? >> >>> + bool "Allwinner sun6i P2WI controller" >>> + depends on ARCH_SUNXI >>> + help >>> + Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded >>> + in the Allwinner A31 and A31s SOCs. This interface is used to connect >>> + to specific devices like the X-Powers AXP221 PMIC. >>> + >>> config SYNQUACER >>> bool "Socionext SynQuacer I2C controller" >>> depends on ARCH_SYNQUACER && DM_I2C >>> diff --git a/drivers/i2c/Makefile
Re: [PATCH 1/3] fs/erofs: new filesystem
On Mon, Aug 23, 2021 at 12:03 AM Huang Jianan wrote: > > From: Huang Jianan > > Add erofs filesystem support. > > The code is adapted from erofs-utils in order to reduce maintenance > burden and keep with the latest feature. > > This patch mainly deals with uncompressed files. > > Signed-off-by: Huang Jianan >From and SoB should be the same person. > --- > fs/Kconfig | 1 + > fs/Makefile | 1 + > fs/erofs/Kconfig| 12 ++ > fs/erofs/Makefile | 7 + > fs/erofs/data.c | 124 ++ > fs/erofs/erofs_fs.h | 384 > fs/erofs/fs.c | 230 ++ > fs/erofs/internal.h | 203 +++ > fs/erofs/namei.c| 238 +++ > fs/erofs/super.c| 65 > fs/fs.c | 22 +++ > include/erofs.h | 19 +++ > include/fs.h| 1 + > 13 files changed, 1307 insertions(+) > create mode 100644 fs/erofs/Kconfig > create mode 100644 fs/erofs/Makefile > create mode 100644 fs/erofs/data.c > create mode 100644 fs/erofs/erofs_fs.h > create mode 100644 fs/erofs/fs.c > create mode 100644 fs/erofs/internal.h > create mode 100644 fs/erofs/namei.c > create mode 100644 fs/erofs/super.c > create mode 100644 include/erofs.h > Regards, Bin
RE: [PATCH] configs: Layerscape: Remove the 'fdt_addr' env
> -Original Message- > From: Priyanka Jain (OSS) > Sent: 2021年8月18日 18:33 > To: Z.Q. Hou ; u-boot@lists.denx.de > Cc: ykau...@suse.de; feste...@gmail.com; tr...@konsulko.com; Z.Q. Hou > > Subject: RE: [PATCH] configs: Layerscape: Remove the 'fdt_addr' env > > > > >-Original Message- > >From: U-Boot On Behalf Of Zhiqiang Hou > >Sent: Thursday, August 12, 2021 12:59 PM > >To: u-boot@lists.denx.de; Priyanka Jain > >Cc: ykau...@suse.de; feste...@gmail.com; tr...@konsulko.com; Z.Q. > Hou > > > >Subject: [PATCH] configs: Layerscape: Remove the 'fdt_addr' env > > > >From: Hou Zhiqiang > > > >On Layerscape platforms, the DTB is loaded from boot filesystem, per > >the fdt_addr description in doc/README.distro, it must be removed. > > > > Below description is unrelated . > It is due to some other issue. Kindly remove it from this patch. OK > > > >And on many platforms, like ls1046a, ls1088a, ls2088a and lx216xa, the > 'fdt_addr' > >pointed address is not accessible. > >And with the current EFI boot process, since the EFI_LOADER and > >CMD_BOOTEFI_BOOTMGR are enabled by default, if the EFI boot > components > >are not deployed in the boot filesystem, it will try to get DTB at address > 'fdt_addr' > >and then result in "SError" or "Synchronous Abort": > > > >Error log on ls1046ardb: > > => run distro_bootcmd > > switch to partitions #0, OK > > mmc0 is current device > > Scanning mmc 0:1... > > libfdt fdt_check_header(): FDT_ERR_BADMAGIC > > Scanning disk es...@156.blk... > > Found 5 disks > > No EFI system partition > > "Error" handler, esr 0xbf00 > > elr: 820704f4 lr : 820080d4 (reloc) > > elr: fbd914f4 lr : fbd290d4 > > x0 : 64f0 x1 : edfe0dd0 > > x2 : x3 : > > x4 : fbc2ee1a x5 : 000f > > x6 : x7 : 0008 > > x8 : 0010 x9 : 0008 > > x10: 0044 x11: 00080220 > > x12: fbdaa748 x13: fbda70f8 > > x14: fbd21d20 x15: fbc194e8 > > x16: fbd70fc8 x17: > > x18: fbc1cdb0 x19: fbd21bf0 > > x20: 64f0 x21: fbda6fb8 > > x22: 0018 x23: 0018 > > x24: fbde6344 x25: > > x26: x27: > > x28: fbc53660 x29: fbc19220 > > > > Code: 7a419060 1a9f3000 a8c17bfd d65f03c0 (12800100) > > > > Resetting CPU ... > > > >Signed-off-by: Hou Zhiqiang > >--- > > include/configs/ls1012a2g5rdb.h | 1 - > > include/configs/ls1012afrdm.h| 2 +- > > include/configs/ls1012afrwy.h| 1 - > > include/configs/ls1012aqds.h | 1 - > > include/configs/ls1012ardb.h | 1 - > > include/configs/ls1021atsn.h | 3 +-- > > include/configs/ls1021atwr.h | 4 +--- > > include/configs/ls1028aqds.h | 3 +-- > > include/configs/ls1028ardb.h | 3 +-- > > include/configs/ls1043a_common.h | 1 - > >include/configs/ls1046a_common.h | 1 - > > include/configs/ls1088ardb.h | 2 -- > > include/configs/ls2080ardb.h | 2 -- > > include/configs/lx2160a_common.h | 1 - > > 14 files changed, 5 insertions(+), 21 deletions(-) > > > >diff --git a/include/configs/ls1012a2g5rdb.h > >b/include/configs/ls1012a2g5rdb.h index 44f9da7306..d9ff011bac 100644 > >--- a/include/configs/ls1012a2g5rdb.h > >+++ b/include/configs/ls1012a2g5rdb.h > >@@ -29,7 +29,6 @@ > > #define CONFIG_EXTRA_ENV_SETTINGS \ > > "verify=no\0" \ > > "initrd_high=0x\0" \ > >-"fdt_addr=0x00f0\0" \ > > Getting below checkpatch error: > ERROR: fdt or initrd relocation disabled at boot time > #76: FILE: include/configs/ls1012a2g5rdb.h:31: > "initrd_high=0x\0" \ > > Kindly remove unused 'initrd_high' variable as well in this patch in all > header > files. No, the 'initrd_high' is the context, but it's not changed in this patch. Thanks, Zhiqiang > > Regards > Priyanka
[PATCH 1/1] arm: imx8m: imx8mm-cl-iot-gate: Add support for detect memory size
From: "Ying-Chun Liu (PaulLiu)"
When purchasing imx8mm-cl-iot-gate it is able to customize the
memory size. It could be 1GB, 2GB and 4GB. We implement
board_phys_sdram_size() to detect the memory size for usage.
Signed-off-by: Ying-Chun Liu (PaulLiu)
Cc: Fabio Estevam
Cc: Frieder Schrempf
Cc: uboot-imx
---
.../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 25 +++
include/configs/imx8mm-cl-iot-gate.h | 2 +-
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
index eabcc842a4..01c6011b75 100644
--- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
+++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
@@ -14,8 +14,33 @@
#include
#include
+#include "ddr/ddr.h"
+
DECLARE_GLOBAL_DATA_PTR;
+int board_phys_sdram_size(phys_size_t *size)
+{
+ struct lpddr4_tcm_desc *lpddr4_tcm_desc =
+ (struct lpddr4_tcm_desc *)TCM_DATA_CFG;
+
+ switch (lpddr4_tcm_desc->size) {
+ case 4096:
+ case 2048:
+ case 1024:
+ *size = (1L << 20) * lpddr4_tcm_desc->size;
+ break;
+ default:
+ printf("%s: DRAM size %uM is not supported\n",
+ __func__,
+ lpddr4_tcm_desc->size);
+ while (1)
+ ;
+ break;
+ };
+
+ return 0;
+}
+
static int setup_fec(void)
{
if (IS_ENABLED(CONFIG_FEC_MXC)) {
diff --git a/include/configs/imx8mm-cl-iot-gate.h
b/include/configs/imx8mm-cl-iot-gate.h
index faeee2178c..1e835563d6 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -158,7 +158,7 @@
#define CONFIG_SYS_SDRAM_BASE 0x4000
#define PHYS_SDRAM 0x4000
-#define PHYS_SDRAM_SIZE0x8000 /* 2GB DDR */
+#define PHYS_SDRAM_SIZE0x4000 /* 1GB DDR */
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
--
2.32.0
[PATCH 0/1] arm: imx8m: imx8mm-cl-iot-gate: Add support for detect memory size
From: "Ying-Chun Liu (PaulLiu)" When purchasing imx8mm-cl-iot-gate it is able to customize the memory size. It could be 1GB, 2GB and 4GB. We implement board_phys_sdram_size() to detect the memory size for usage. This patch was trying to fix the regression on mainline U-boot for imx8mm-cl-iot-gate. However this is not related to the regression. But we should have this implemented anyway. Ying-Chun Liu (PaulLiu) (1): arm: imx8m: imx8mm-cl-iot-gate: Add support for detect memory size .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 25 +++ include/configs/imx8mm-cl-iot-gate.h | 2 +- 2 files changed, 26 insertions(+), 1 deletion(-) -- 2.32.0
[PATCH 1/1] imx8m: Restrict usable memory based on rom_pointer[0]
From: "Ying-Chun Liu (PaulLiu)"
When TEE is loaded, we need to restrict the memory usage based
on rom_pointer[0]
Signed-off-by: Ying-Chun Liu (PaulLiu)
Cc: Fabio Estevam
Cc: Frieder Schrempf
Cc: uboot-imx
---
arch/arm/mach-imx/imx8m/soc.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index f2ddc834d4..863508776d 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -298,16 +298,26 @@ phys_size_t get_effective_memsize(void)
ulong board_get_usable_ram_top(ulong total_size)
{
+ ulong top_addr = PHYS_SDRAM + gd->ram_size;
+
/*
* Some IPs have their accessible address space restricted by
* the interconnect. Let's make sure U-Boot only ever uses the
* space below the 4G address boundary (which is 3GiB big),
* even when the effective available memory is bigger.
*/
- if (PHYS_SDRAM + gd->ram_size > 0x8000)
- return 0x8000;
+ if (top_addr > 0x8000)
+ top_addr = 0x8000;
+
+ /*
+* rom_pointer[0] stores the TEE memory start address.
+* rom_pointer[1] stores the size TEE uses.
+* We need to reserve the memory region for TEE.
+*/
+ if (rom_pointer[0] && rom_pointer[1] && top_addr > rom_pointer[0])
+ top_addr = rom_pointer[0];
- return PHYS_SDRAM + gd->ram_size;
+ return top_addr;
}
static u32 get_cpu_variant_type(u32 type)
--
2.32.0
[PATCH 0/1] imx8m: Restrict usable memory based on rom_pointer[0]
From: "Ying-Chun Liu (PaulLiu)" When TEE is loaded, we need to restrict the memory usage based on rom_pointer[0] This patch fixes a regression on Compulab IoT gate imx8 hang when OPTEE runs. Ying-Chun Liu (PaulLiu) (1): imx8m: Restrict usable memory based on rom_pointer[0] arch/arm/mach-imx/imx8m/soc.c | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-) -- 2.32.0
Re: [PATCH 00/28] Initial implementation of bootmethod/bootflow
On Fri, Aug 20, 2021 at 12:22:17PM -0600, Simon Glass wrote: > Hi Takahiro, > > On Thu, 19 Aug 2021 at 21:15, AKASHI Takahiro > wrote: > > > > Hi Simon, > > > > On Thu, Aug 19, 2021 at 08:25:33AM -0600, Simon Glass wrote: > > > Hi Tom, > > > > > > On Thu, 19 Aug 2021 at 07:59, Tom Rini wrote: > > > > > > > > On Wed, Aug 18, 2021 at 09:45:33PM -0600, Simon Glass wrote: > > > > > > > > > Bootmethod and bootflow provide a built-in way for U-Boot to > > > > > automatically boot > > > > > an Operating System without custom scripting and other customisation: > > > > > > > > > > - bootmethod - a method to scan a device to find bootflows (owned > > > > > by U-Boot) > > > > > - bootflow - a description of how to boot (owned by the distro) > > > > > > > > > > This series provides an initial implementation of these, enable to > > > > > scan > > > > > for bootflows from MMC and Ethernet. The only bootflow supported is > > > > > distro boot, i.e. an extlinux.conf file included on a filesystem or > > > > > tftp server. It works similiarly to the existing script-based > > > > > approach, > > > > > but is native to U-Boot. > > > > > > > > > > With this we can boot on a Raspberry Pi 3 with just one command: > > > > > > > > > >bootflow scan -lb > > > > > > > > > > which means to scan, listing (-l) each bootflow and trying to boot > > > > > each > > > > > one (-b). The final patch shows this. > > > > > > > > > > It is intended that this approach be expanded to support mechanisms > > > > > other > > > > > than distro boot, including EFI-related ones. With a standard way to > > > > > identify boot devices, these features become easier. It also should > > > > > support U-Boot scripts, for backwards compatibility only. > > > > > > > > > > The first patch of this series moves boot-related code out of common/ > > > > > and > > > > > into a new boot/ directory. This helps to collect these related files > > > > > in one place, as common/ is quite large. > > > > > > > > > > Like sysboot, this feature makes use of the existing PXE > > > > > implementation. > > > > > Much of this series consists of cleaning up that code and refactoring > > > > > it > > > > > into something closer to a module that can be called, teasing apart > > > > > its > > > > > reliance on the command-line interpreter to access filesystems and the > > > > > like. Also it now uses function arguments and its own context struct > > > > > internally rather than environment variables, which is very hard to > > > > > follow. No core functional change is included in the included PXE > > > > > patches. > > > > > > > > > > For documentation, see the 'doc' patch. > > > > > > > > > > There is quite a long list of future work included in the > > > > > documentation. > > > > > One question is the choice of naming. Since this is a bootloader, > > > > > should > > > > > we just call this a 'method' and a 'flow' ? The 'boot' prefix is > > > > > already > > > > > shared by other commands like bootm, booti, etc. > > > > Regarding the naming, I'm still a bit confused with bootmethod vs. > > bootflow. Personally, I prefer a more intuitive name against bootmethod, > > say, bootmedia or bootdevice (as the original distro_bootcmd uses). > > I quite like bootmedia. Would just 'media' be OK? That would reduce > the use of the 'boot' prefix which I think is overused. If 'boot' prefix is removed, I'm afraid that the word, either media, method or flow, sounds quite generic and so ambiguous. As far as the commands are concerned, on the other hand, it might be one way to have sub-commands under 'boot', like "boot media ..." or "boot flow ..." although I'm not sure it is a preferred style on U-Boot. # I have no strong opinion here. > > > > > > > The design is described here: > > > > > > > > > > https://drive.google.com/file/d/1ggW0KJpUOR__vBkj3l61L2dav4ZkNC12/view?usp=sharing > > > > > > > > > > The series is available at u-boot-dm/bmea-working > > > > > > > > My question / concern is this. Would the next step here be to > > > > implement the generic UEFI boot path? Today, I can write Fedora 34 for > > > > AArch64 to a USB stick, boot U-Boot off of uSD card and the installer > > > > automatically boots. I'm sure I could do the same with the BSDs. > > > > Reading the documentation left me with the impression that every OSV > > > > would be expected to write something, so that their installer / OS boot. > > > > But there's already standards for that, which they do, and we should be > > > > implementing (and do, via the current distro_boot) or making easier to > > > > enable. Thanks! > > > > I had the same concern. > > OK see my reply to Tom on this point. The separate of concerns between > providing media and booting an OS is a key purpose of this series. > > I have Fedora 34 in my lab and will send an update for it next week. > > > > > > Here you are talking about scanning for a bootflow. It is not actually > > > OS-specific. If it were, there would be no
[PATCH 2/4] include: axp_pmic: Include headers for all variants
A single DM-based driver should be able to support some feature for
several PMIC variants where the interface is the same. For example,
all PMIC variants use the same register bit to trigger poweroff.
However, currently only definitions for a single PMIC are available at
a time. This requires drivers to use #ifdefs and different indentifiers
for each variant they support.
Let's simplify this by making register definitions for all variants
available from the header. Then no preprocessor conditions are needed;
the driver can use the register definition from any variant that
supports the relevant feature.
An exception is the GPIO-related definitions, which do not use unique
identifiers. So for now, keep them like before. They will be cleaned up
along with the GPIO driver.
Signed-off-by: Samuel Holland
---
include/axp152.h | 2 ++
include/axp209.h | 2 ++
include/axp221.h | 2 ++
include/axp809.h | 2 ++
include/axp818.h | 2 ++
include/axp_pmic.h | 12
6 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/include/axp152.h b/include/axp152.h
index c81f172502c..10d845fec42 100644
--- a/include/axp152.h
+++ b/include/axp152.h
@@ -15,6 +15,7 @@ enum axp152_reg {
#define AXP152_POWEROFF(1 << 7)
/* For axp_gpio.c */
+#ifdef CONFIG_AXP152_POWER
#define AXP_GPIO0_CTRL 0x90
#define AXP_GPIO1_CTRL 0x91
#define AXP_GPIO2_CTRL 0x92
@@ -24,3 +25,4 @@ enum axp152_reg {
#define AXP_GPIO_CTRL_INPUT0x02 /* Input */
#define AXP_GPIO_STATE 0x97
#define AXP_GPIO_STATE_OFFSET 0
+#endif
diff --git a/include/axp209.h b/include/axp209.h
index f4f1b2fe56d..30399a8d621 100644
--- a/include/axp209.h
+++ b/include/axp209.h
@@ -74,6 +74,7 @@ enum axp209_reg {
#define AXP209_POWEROFFBIT(7)
/* For axp_gpio.c */
+#ifdef CONFIG_AXP209_POWER
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5)
#define AXP_GPIO0_CTRL 0x90
@@ -84,3 +85,4 @@ enum axp209_reg {
#define AXP_GPIO_CTRL_INPUT0x02 /* Input */
#define AXP_GPIO_STATE 0x94
#define AXP_GPIO_STATE_OFFSET 4
+#endif
diff --git a/include/axp221.h b/include/axp221.h
index caffb910f4b..a02e9b4f645 100644
--- a/include/axp221.h
+++ b/include/axp221.h
@@ -50,6 +50,7 @@
#define AXP221_SID 0x20
/* For axp_gpio.c */
+#ifdef CONFIG_AXP221_POWER
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5)
#define AXP_VBUS_IPSOUT0x30
@@ -63,3 +64,4 @@
#define AXP_GPIO_CTRL_INPUT0x02 /* Input */
#define AXP_GPIO_STATE 0x94
#define AXP_GPIO_STATE_OFFSET 0
+#endif
diff --git a/include/axp809.h b/include/axp809.h
index 86b29253306..430dbef622b 100644
--- a/include/axp809.h
+++ b/include/axp809.h
@@ -44,6 +44,7 @@
#define AXP809_SHUTDOWN_POWEROFF (1 << 7)
/* For axp_gpio.c */
+#ifdef CONFIG_AXP809_POWER
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5)
#define AXP_VBUS_IPSOUT0x30
@@ -57,3 +58,4 @@
#define AXP_GPIO_CTRL_INPUT0x02 /* Input */
#define AXP_GPIO_STATE 0x94
#define AXP_GPIO_STATE_OFFSET 0
+#endif
diff --git a/include/axp818.h b/include/axp818.h
index b16fe0b1527..8bac6b67ca2 100644
--- a/include/axp818.h
+++ b/include/axp818.h
@@ -58,6 +58,7 @@
#define AXP818_SHUTDOWN_POWEROFF (1 << 7)
/* For axp_gpio.c */
+#ifdef CONFIG_AXP818_POWER
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5)
#define AXP_VBUS_IPSOUT0x30
@@ -71,3 +72,4 @@
#define AXP_GPIO_CTRL_INPUT0x02 /* Input */
#define AXP_GPIO_STATE 0x94
#define AXP_GPIO_STATE_OFFSET 0
+#endif
diff --git a/include/axp_pmic.h b/include/axp_pmic.h
index 2eab18937bc..01ebba63479 100644
--- a/include/axp_pmic.h
+++ b/include/axp_pmic.h
@@ -9,24 +9,12 @@
#include
-#ifdef CONFIG_AXP152_POWER
#include
-#endif
-#ifdef CONFIG_AXP209_POWER
#include
-#endif
-#ifdef CONFIG_AXP221_POWER
#include
-#endif
-#ifdef CONFIG_AXP305_POWER
#include
-#endif
-#ifdef CONFIG_AXP809_POWER
#include
-#endif
-#ifdef CONFIG_AXP818_POWER
#include
-#endif
#define AXP_PMIC_MODE_REG 0x3e
#define AXP_PMIC_MODE_I2C 0x00
--
2.31.1
[PATCH 3/4] power: axp: Avoid do_poweroff conflict with sysreset
The sysreset uclass has an option to provide the do_poweroff() function.
When that option is enabled, the AXP power drivers should not provide
their own definition.
For the AXP305, which is paired with 64-bit systems where TF-A provides
PSCI, there is another possible conflict with the PSCI firmware driver.
This driver can be enabled even if CONFIG_PSCI_RESET is disabled, so
make sure to use the right symbol in the condition.
Signed-off-by: Samuel Holland
---
drivers/power/axp152.c | 2 ++
drivers/power/axp209.c | 2 ++
drivers/power/axp221.c | 2 ++
drivers/power/axp305.c | 2 +-
drivers/power/axp809.c | 2 ++
drivers/power/axp818.c | 2 ++
6 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
index d6e36125c12..a93987c1538 100644
--- a/drivers/power/axp152.c
+++ b/drivers/power/axp152.c
@@ -79,6 +79,7 @@ int axp_init(void)
return 0;
}
+#if !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
pmic_bus_write(AXP152_SHUTDOWN, AXP152_POWEROFF);
@@ -89,3 +90,4 @@ int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
/* not reached */
return 0;
}
+#endif
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index ade531940b9..3447b9f0113 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -230,6 +230,7 @@ int axp_init(void)
return 0;
}
+#if !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
pmic_bus_write(AXP209_SHUTDOWN, AXP209_POWEROFF);
@@ -240,3 +241,4 @@ int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
/* not reached */
return 0;
}
+#endif
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
index 3446fe7365d..d251c314b98 100644
--- a/drivers/power/axp221.c
+++ b/drivers/power/axp221.c
@@ -264,6 +264,7 @@ int axp_get_sid(unsigned int *sid)
return 0;
}
+#if !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
pmic_bus_write(AXP221_SHUTDOWN, AXP221_SHUTDOWN_POWEROFF);
@@ -274,3 +275,4 @@ int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
/* not reached */
return 0;
}
+#endif
diff --git a/drivers/power/axp305.c b/drivers/power/axp305.c
index 0191e4d427e..049ef07f746 100644
--- a/drivers/power/axp305.c
+++ b/drivers/power/axp305.c
@@ -69,7 +69,7 @@ int axp_init(void)
return ret;
}
-#ifndef CONFIG_PSCI_RESET
+#if !CONFIG_IS_ENABLED(ARM_PSCI_FW) &&
!IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
pmic_bus_write(AXP305_SHUTDOWN, AXP305_POWEROFF);
diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c
index 6323492b66d..49584e502fe 100644
--- a/drivers/power/axp809.c
+++ b/drivers/power/axp809.c
@@ -220,6 +220,7 @@ int axp_init(void)
return pmic_bus_init();
}
+#if !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
pmic_bus_write(AXP809_SHUTDOWN, AXP809_SHUTDOWN_POWEROFF);
@@ -230,3 +231,4 @@ int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
/* not reached */
return 0;
}
+#endif
diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c
index 0531707c8aa..0960786f4a7 100644
--- a/drivers/power/axp818.c
+++ b/drivers/power/axp818.c
@@ -256,6 +256,7 @@ int axp_init(void)
return 0;
}
+#if !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
pmic_bus_write(AXP818_SHUTDOWN, AXP818_SHUTDOWN_POWEROFF);
@@ -266,3 +267,4 @@ int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
/* not reached */
return 0;
}
+#endif
--
2.31.1
[PATCH 4/4] power: pmic: axp: Implement poweroff via sysreset
The AXP PMICs have the ability to power off the system. The existing
code for this is duplicated for each PMIC variant, and uses the legacy
non-DM "pmic_bus" interface. When SYSRESET is enabled, this can all be
replaced with a sysreset device using the DM_PMIC interface.
Since the trigger bit is the same on all PMIC variants, use the register
definitions from the oldest supported PMIC.
Signed-off-by: Samuel Holland
---
drivers/power/pmic/Kconfig | 2 ++
drivers/power/pmic/axp.c | 36
2 files changed, 38 insertions(+)
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 6a3e82e1be7..983fe135157 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -60,6 +60,8 @@ config PMIC_ACT8846
config PMIC_AXP
bool "Enable Driver Model for X-Powers AXP PMICs"
depends on DM_I2C
+ select SYSRESET_CMD_POWEROFF if SYSRESET && CMD_POWEROFF
+ imply CMD_POWEROFF if SYSRESET
help
This config enables driver-model PMIC uclass features for
X-Powers AXP152, AXP2xx, and AXP8xx PMICs.
diff --git a/drivers/power/pmic/axp.c b/drivers/power/pmic/axp.c
index 7720e1afd9b..0f2b24a8b5f 100644
--- a/drivers/power/pmic/axp.c
+++ b/drivers/power/pmic/axp.c
@@ -1,8 +1,37 @@
// SPDX-License-Identifier: GPL-2.0+
+#include
#include
+#include
#include
#include
+#include
+
+#if CONFIG_IS_ENABLED(SYSRESET)
+static int axp_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ int ret;
+
+ if (type != SYSRESET_POWER_OFF)
+ return -EPROTONOSUPPORT;
+
+ ret = pmic_clrsetbits(dev->parent, AXP152_SHUTDOWN, 0, AXP152_POWEROFF);
+ if (ret < 0)
+ return ret;
+
+ return -EINPROGRESS;
+}
+
+static struct sysreset_ops axp_sysreset_ops = {
+ .request= axp_sysreset_request,
+};
+
+U_BOOT_DRIVER(axp_sysreset) = {
+ .name = "axp_sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops= _sysreset_ops,
+};
+#endif
static int axp_pmic_reg_count(struct udevice *dev)
{
@@ -24,6 +53,13 @@ static int axp_pmic_bind(struct udevice *dev)
if (ret)
return ret;
+ if (CONFIG_IS_ENABLED(SYSRESET)) {
+ ret = device_bind_driver_to_node(dev, "axp_sysreset",
"axp_sysreset",
+dev_ofnode(dev), NULL);
+ if (ret)
+ return ret;
+ }
+
return 0;
}
--
2.31.1
[PATCH 0/4] power: axp: Move poweroff to DM_PMIC/SYSRESET driver
This series replaces the do_poweroff() implementation from the non-DM AXP PMIC drivers with a sysreset uclass device, if sysreset is providing its own do_poweroff() definition. This depends on the following series, which adds the AXP DM_PMIC driver: https://patchwork.ozlabs.org/project/uboot/list/?series=259089 Congratulations for making it this far! :) If you apply this series, along with all of the other sysreset and watchdog series I sent this weekend, and further enable three Kconfig options: SYSRESET SYSRESET_WATCHDOG SYSRESET_WATCHDOG_AUTO you will have removed exactly one (1) call to pmic_bus_write() from U-Boot, hopefully without breaking anything else. Once all of these series land, I will send a patch enabling those options, and we will be one quarter of the way to removing pmic_bus from U-Boot proper. Note that because SYSRESET is disabled by default, each of the other series I sent can be applied independently. Samuel Holland (4): include: axp_pmic: Add missing header guard definition include: axp_pmic: Include headers for all variants power: axp: Avoid do_poweroff conflict with sysreset power: pmic: axp: Implement poweroff via sysreset drivers/power/axp152.c | 2 ++ drivers/power/axp209.c | 2 ++ drivers/power/axp221.c | 2 ++ drivers/power/axp305.c | 2 +- drivers/power/axp809.c | 2 ++ drivers/power/axp818.c | 2 ++ drivers/power/pmic/Kconfig | 2 ++ drivers/power/pmic/axp.c | 36 include/axp152.h | 2 ++ include/axp209.h | 2 ++ include/axp221.h | 2 ++ include/axp809.h | 2 ++ include/axp818.h | 2 ++ include/axp_pmic.h | 13 + 14 files changed, 60 insertions(+), 13 deletions(-) -- 2.31.1
[PATCH 1/4] include: axp_pmic: Add missing header guard definition
This header attempted to avoid multiple inclusion using a header guard. But the preprocessor symbol was never defined, so the guard had no effect. Fix this by defining the symbol. Signed-off-by: Samuel Holland --- include/axp_pmic.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/axp_pmic.h b/include/axp_pmic.h index 46a017d2efa..2eab18937bc 100644 --- a/include/axp_pmic.h +++ b/include/axp_pmic.h @@ -5,6 +5,7 @@ * X-Powers AX Power Management IC support header */ #ifndef _AXP_PMIC_H_ +#define _AXP_PMIC_H_ #include -- 2.31.1
Re: [PATCH 0/4] sunxi: TOC0 image type support
On 2021-08-22, Tom Rini wrote: > On Sat, Aug 21, 2021 at 09:19:56PM -0500, Samuel Holland wrote: >> On 6/21/21 6:56 PM, Andre Przywara wrote: >> > On Mon, 21 Jun 2021 16:35:37 -0400 >> > Tom Rini wrote: >> >> On Mon, Jun 21, 2021 at 04:43:00PM +0100, Andre Przywara wrote: >> >>> On Sun, 20 Jun 2021 21:55:51 -0500 >> >>> Samuel Holland wrote: >> >>> >> >>> (CC:ing Tom and Simon for the compatibility problem below) >> >>> >> >>> Hi, >> >>> >> This series adds support for the TOC0 image format used by the Allwinner >> secure boot ROM (SBROM). This series has been tested on the following >> SoCs/boards, with the eFuse burnt to enable secure mode: >> - A64: Pine A64 Plus >> - H5: Orange Pi Zero Plus >> - H6: Pine H64 Model B >> - H616: Orange Pi Zero 2 >> >>> >> >>> many thanks for sending this. In general this looks good (will do a >> >>> more thorough review soon), just one thing that bothered me: >> >>> >> >>> This requires OpenSLL 1.1.x. There is nothing really wrong about this, >> >>> but my (admittedly not the freshest) Slackware, but also long term >> >>> distros like RHEL/CentOS (<=7), still come with 1.0.x (headers) only. >> >>> >> >>> I was wondering how important this is? I have the impression that >> >>> embedded developers sometimes use old^Wstable systems, so some people >> >>> might be bitten by it. I think in this case it will affect all user >> >>> trying to build mkimage, regardless of the target platform? >> >>> >> >>> So I wanted to know what to do here? >> >>> - Can we provide some kind of compatibility support? OpenSSL seems >> >>> to provide something: >> >>> https://wiki.openssl.org/index.php/OpenSSL_1.1.0_Changes#Compatibility_Layer >> >>> Haven't tested that fully yet, just downloading that tarball >> >>> does not seem to cut it (or is missing files?). I guess one needs to >> >>> copy some code from the Wiki? >> >>> - Shall we detect missing v1.1.x support (via #if OPENSSL_VERSION_NUMBER >> >>> < 0x1010L) and disable just sunxi_toc0 support in this case? >> >> >> >> There's two things. First, the series should be on top of (sorry!) >> >> https://patchwork.ozlabs.org/project/uboot/patch/20210524202317.1492578-1-mr.nuke...@gmail.com/ >> >> which adds a similar Kconfig option to make building tools easier. >> > >> > So this is on top of Simon's large series? Poor Samuel! Is there a >> > branch somewhere? >> >> Now that all of these have landed, I'm rebasing this series. >> >> >> Second, while I think not supporting openssl 1.0.x is fine, >> > >> > Well, this was not what I was hoping for ;-) >> > I followed the advice on the OpenSSL wiki and now have a rather small >> > compatibility header file, which lets me compile mkimage even against >> > OpenSSL v1.0.2u. It seems like kwbimage.c has similar provisions in >> > place, I guess this could be merged into the external header? >> > Happy to send a patch on top, if this seems useful. >> >> Considering the note from the OpenSSL website: >> >> > Note: The latest stable version is the 1.1.1 series. This is also >> > our Long Term Support (LTS) version, supported until 11th September >> > 2023. All older versions (including 1.1.0, 1.0.2, 1.0.0 and 0.9.8) >> > are now out of support and should not be used. Users of these older >> > versions are encouraged to upgrade to 1.1.1 as soon as possible. >> and the fact that that I don't have access a system with an old OpenSSL, >> I'm not too interested in spending much effort on it. I will, though, >> happily test a patch if you do send one. > > Since this series came up we now also have: > https://patchwork.ozlabs.org/project/uboot/patch/20210729183121.3798261-1-mr.nuke...@gmail.com/ > > So I would rather not see more old openssl compatibility code added. > >> >> I would like >> >> to again ask for someone to spend the time looking at switching to one >> >> of the GPL-compatible libraries as I'm pretty sure it's been raised a >> >> few times that we can't link with openssl like we do. >> > >> > Why is that? Because Apache is not compatible with GPLv2? The OpenSSL >> > webpage says that: >> > "Can I use OpenSSL with GPL software? >> > On many systems including the major Linux and BSD distributions, yes >> > (the GPL does not place restrictions on using libraries that are part >> > of the normal operating system distribution)." >> > And for mkimage we just build a regular userspace tool, which is linked >> > against the system installed OpenSSL library. From my understanding >> > this is what this quote above means with being permitted? >> > >> > And what would be the alternatives? Take one of the smaller ones and >> > embed them into the code? >> > Otherwise we would probably need to pick something that is widely >> > available and shipped with distros, I guess? Like GnuTLS, >> > libgcrypt, nettle? Maybe LibreSSL? >> > >> > Samuel, do you have an insight what would be a good fit? >> >> My original code was written against
Re: [PATCH] display_options: Do not use %llu in print_size
On Fri, Aug 06, 2021 at 12:22:58AM +0300, Matwey V. Kornilov wrote: > tiny-printf variant doesn't know how to handle %llu format string, but both > tiny-printf and print_size can meet in SPL when TFTP is used to obtain main > u-boot image. This is known to lead to critical boot issue at AM335x platform > when printf is catched in infinite loop. > > To avoid such issues and make print_size function tiny-printf friendly, use %u > instead of %luu. Note, that the size value is guaranteed to be less than 1024 > in this conditional branch, so the cast to unsigned int is safe. > > Signed-off-by: Matwey V. Kornilov > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] tiny-printf: Handle %pM format when CONFIG_SPL_NET_SUPPORT is enabled
On Thu, Aug 05, 2021 at 10:06:05PM +0300, Matwey V. Kornilov wrote: > %pM format string is used to print MAC-address and this is required while SPL > network boot. > > This patch fixes the SPL boot issues like the following: > > Trying to boot from USB eth > ## Error: flags type check failure for "ethaddr" <= "40309614M" (type: m) > ## Error inserting "ethaddr" variable, errno=1 > eth0: eth_cpsw## Error: flags type check failure for "eth1addr" <= > "81f01114M" (type: m) > ## Error inserting "eth1addr" variable, errno=1 > , eth1: usb_ether > eth_cpsw Waiting for PHY auto negotiation to complete. TIMEOUT ! > Problem booting with BOOTP > SPL: failed to boot from all boot devices > ### ERROR ### Please RESET the board ### > > Signed-off-by: Matwey V. Kornilov > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH V4] clk: clk_versaclock: Add support for versaclock driver
On Fri, Jun 04, 2021 at 12:26:06PM -0500, Adam Ford wrote: > The driver is based on the Versaclock driver from the Linux code, but > due differences in the clock API between them, some pieces had to be > changed. > > This driver creates a mux, pfd, pll, and a series of fod ouputs. > Rate Usecnt Name Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4] Fix flashing of eMMC user area with Fastboot
On Wed, May 19, 2021 at 01:31:31PM +0300, Oleh Kravchenko wrote: > 'gpt' and 'mmc0' fastboot partitions have been treated as the same device, > but it is wrong. > > Fill disk_partition structure with eMMC user partition info > to properly flash data. > > Signed-off-by: Oleh Kravchenko > Cc: Pantelis Antoniou > Cc: Marek Vasut > Cc: Sean Anderson > Cc: Tom Rini > Reviewed-by: Sean Anderson Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] Fix flash and erase of eMMC Boot2 with Fastboot
On Sat, May 15, 2021 at 12:06:21AM +0300, Oleh Kravchenko wrote: > The current U-Boot version has the next matches for boot partitions: > > mmc0boot0 to EMMC_BOOT1 > > mmc0boot1 to EMMC_BOOT1 (should be EMMC_BOOT2) > This patch fixes a typo for the boot partition number. > > Signed-off-by: Oleh Kravchenko > Cc: Pantelis Antoniou > Cc: Marek Vasut > Reviewed-by: Sean Anderson Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH] sunxi: Avoid duplicate reset_cpu with SYSRESET enabled
The sysreset uclass unconditionally provides a definition of the
reset_cpu() function. So does the sunxi board code. Omit our definition
when SYSRESET is enabled. This allows the build to succeed, even though
sysreset may not yet be functional due to a lack of back-end drivers.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/board.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index d9b04f75fc4..f867a28c30c 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -347,6 +347,7 @@ void board_init_f(ulong dummy)
}
#endif
+#if !CONFIG_IS_ENABLED(SYSRESET)
void reset_cpu(void)
{
#if defined(CONFIG_SUNXI_GEN_SUN4I) || defined(CONFIG_MACH_SUN8I_R40)
@@ -377,6 +378,7 @@ void reset_cpu(void)
while (1) { }
#endif
}
+#endif
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
void enable_caches(void)
--
2.31.1
[PATCH 4/4] watchdog: Automatically register device with sysreset
Add an option to automatically register the first watchdog device with
the wdt_reboot driver for use with sysreset. This allows sysreset to be
a drop-in replacement for platform-specific watchdog reset code, without
needing any device tree changes.
Signed-off-by: Samuel Holland
---
drivers/sysreset/Kconfig | 7 +++
drivers/sysreset/sysreset_watchdog.c | 24
drivers/watchdog/wdt-uclass.c| 5 +
include/sysreset.h | 14 ++
4 files changed, 50 insertions(+)
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index fdc858ccbac..49354b1b27a 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -119,6 +119,13 @@ config SYSRESET_WATCHDOG
help
Reboot support for generic watchdog reset.
+config SYSRESET_WATCHDOG_AUTO
+ bool "Automatically register first watchdog with sysreset"
+ depends on SYSRESET_WATCHDOG
+ help
+ If enabled, the first watchdog (as selected by the watchdog uclass)
+ will automatically be registered with the watchdog reboot driver.
+
config SYSRESET_RESETCTL
bool "Enable support for reset controller reboot driver"
select DM_RESET
diff --git a/drivers/sysreset/sysreset_watchdog.c
b/drivers/sysreset/sysreset_watchdog.c
index b723f5647cd..35efcac59dd 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -5,7 +5,9 @@
#include
#include
+#include
#include
+#include
#include
#include
@@ -57,3 +59,25 @@ U_BOOT_DRIVER(wdt_reboot) = {
.plat_auto = sizeof(struct wdt_reboot_plat),
.ops = _reboot_ops,
};
+
+#if IS_ENABLED(CONFIG_SYSRESET_WATCHDOG_AUTO)
+int sysreset_register_wdt(struct udevice *dev)
+{
+ struct wdt_reboot_plat *plat = malloc(sizeof(*plat));
+ int ret;
+
+ if (!plat)
+ return -ENOMEM;
+
+ plat->wdt = dev;
+
+ ret = device_bind(dev, DM_DRIVER_GET(wdt_reboot),
+ dev->name, plat, ofnode_null(), NULL);
+ if (ret) {
+ free(plat);
+ return ret;
+ }
+
+ return 0;
+}
+#endif
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
index 17334dbda6c..3170ef9d945 100644
--- a/drivers/watchdog/wdt-uclass.c
+++ b/drivers/watchdog/wdt-uclass.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -53,6 +54,10 @@ int initr_watchdog(void)
4 * reset_period) / 4;
}
+ ret = sysreset_register_wdt(gd->watchdog_dev);
+ if (ret)
+ printf("WDT: Failed to register sysreset\n");
+
if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART)) {
printf("WDT: Not starting\n");
return 0;
diff --git a/include/sysreset.h b/include/sysreset.h
index 701e4f5c86e..ad45fe0db28 100644
--- a/include/sysreset.h
+++ b/include/sysreset.h
@@ -118,4 +118,18 @@ void sysreset_walk_halt(enum sysreset_t type);
*/
void reset_cpu(void);
+/**
+ * sysreset_register_wdt() - register a watchdog for use with sysreset
+ *
+ * This registers the given watchdog timer to be used to reset the system.
+ *
+ * @dev: WDT device
+ * @return:0 if OK, -errno if error
+ */
+#if IS_ENABLED(CONFIG_SYSRESET_WATCHDOG_AUTO)
+int sysreset_register_wdt(struct udevice *dev);
+#else
+static inline int sysreset_register_wdt(struct udevice *dev) { return 0; }
+#endif
+
#endif
--
2.31.1
[PATCH 3/4] sysreset: watchdog: Move watchdog reference to plat data
Currently, the wdt_reboot driver always gets its watchdog device
reference from an OF node. This prevents selecting a watchdog at
runtime. Move the watchdog device reference to the plat data, so
the driver can be bound with the reference pre-provided. The
reference will still be acquired from the OF node if it is not
already provided.
Signed-off-by: Samuel Holland
---
drivers/sysreset/sysreset_watchdog.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/sysreset/sysreset_watchdog.c
b/drivers/sysreset/sysreset_watchdog.c
index c7ae368d41a..b723f5647cd 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -9,16 +9,16 @@
#include
#include
-struct wdt_reboot_priv {
+struct wdt_reboot_plat {
struct udevice *wdt;
};
static int wdt_reboot_request(struct udevice *dev, enum sysreset_t type)
{
- struct wdt_reboot_priv *priv = dev_get_priv(dev);
+ struct wdt_reboot_plat *plat = dev_get_plat(dev);
int ret;
- ret = wdt_expire_now(priv->wdt, 0);
+ ret = wdt_expire_now(plat->wdt, 0);
if (ret)
return ret;
@@ -29,13 +29,13 @@ static struct sysreset_ops wdt_reboot_ops = {
.request = wdt_reboot_request,
};
-static int wdt_reboot_probe(struct udevice *dev)
+static int wdt_reboot_of_to_plat(struct udevice *dev)
{
- struct wdt_reboot_priv *priv = dev_get_priv(dev);
+ struct wdt_reboot_plat *plat = dev_get_plat(dev);
int err;
err = uclass_get_device_by_phandle(UCLASS_WDT, dev,
- "wdt", >wdt);
+ "wdt", >wdt);
if (err) {
pr_err("unable to find wdt device\n");
return err;
@@ -53,7 +53,7 @@ U_BOOT_DRIVER(wdt_reboot) = {
.name = "wdt_reboot",
.id = UCLASS_SYSRESET,
.of_match = wdt_reboot_ids,
+ .of_to_plat = wdt_reboot_of_to_plat,
+ .plat_auto = sizeof(struct wdt_reboot_plat),
.ops = _reboot_ops,
- .priv_auto = sizeof(struct wdt_reboot_priv),
- .probe = wdt_reboot_probe,
};
--
2.31.1
[PATCH 2/4] sysreset: Mark driver probe functions as static
These driver probe functions are not (and should not be) called from
outside the respective driver source files. Therefore, the functions
should be marked static.
Signed-off-by: Samuel Holland
---
drivers/sysreset/sysreset_resetctl.c | 2 +-
drivers/sysreset/sysreset_syscon.c | 2 +-
drivers/sysreset/sysreset_watchdog.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/sysreset/sysreset_resetctl.c
b/drivers/sysreset/sysreset_resetctl.c
index c039521eb43..25bd5c9a7ff 100644
--- a/drivers/sysreset/sysreset_resetctl.c
+++ b/drivers/sysreset/sysreset_resetctl.c
@@ -26,7 +26,7 @@ static struct sysreset_ops resetctl_reboot_ops = {
.request = resetctl_reboot_request,
};
-int resetctl_reboot_probe(struct udevice *dev)
+static int resetctl_reboot_probe(struct udevice *dev)
{
struct resetctl_reboot_priv *priv = dev_get_priv(dev);
diff --git a/drivers/sysreset/sysreset_syscon.c
b/drivers/sysreset/sysreset_syscon.c
index 28fdfb09781..525faf2f89e 100644
--- a/drivers/sysreset/sysreset_syscon.c
+++ b/drivers/sysreset/sysreset_syscon.c
@@ -39,7 +39,7 @@ static struct sysreset_ops syscon_reboot_ops = {
.request = syscon_reboot_request,
};
-int syscon_reboot_probe(struct udevice *dev)
+static int syscon_reboot_probe(struct udevice *dev)
{
struct syscon_reboot_priv *priv = dev_get_priv(dev);
int err;
diff --git a/drivers/sysreset/sysreset_watchdog.c
b/drivers/sysreset/sysreset_watchdog.c
index 0dc2d8b9b65..c7ae368d41a 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -29,7 +29,7 @@ static struct sysreset_ops wdt_reboot_ops = {
.request = wdt_reboot_request,
};
-int wdt_reboot_probe(struct udevice *dev)
+static int wdt_reboot_probe(struct udevice *dev)
{
struct wdt_reboot_priv *priv = dev_get_priv(dev);
int err;
--
2.31.1
[PATCH 1/4] sysreset: Add uclass Kconfig dependency to drivers
The drivers enabled by SYSRESET_SYSCON, SYSRESET_WATCHDOG, and SYSRESET_RESETCTL do nothing beyond providing sysreset uclass ops. Therefore, they should depend on the sysreset uclass. Signed-off-by: Samuel Holland --- drivers/sysreset/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index ac77ffbc8be..fdc858ccbac 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -106,8 +106,6 @@ config SYSRESET_TI_SCI This enables the system reset driver support over TI System Control Interface available on some new TI's SoCs. -endif - config SYSRESET_SYSCON bool "Enable support for mfd syscon reboot driver" select REGMAP @@ -127,6 +125,8 @@ config SYSRESET_RESETCTL help Reboot support using generic reset controller. +endif + config SYSRESET_X86 bool "Enable support for x86 processor reboot driver" depends on X86 -- 2.31.1
[PATCH 0/4] Improved sysreset/watchdog uclass integration
This series hooks up the watchdog uclass to automatically register the first watchdog device for use with sysreset, doing a bit of minor cleanup along the way. The goal is for this to replace the sunxi board-level non-DM reset_cpu() function. I was surprised to find that the wdt_reboot driver requires its own undocumented device tree node, which references the watchdog device by phandle. This is problematic for us, because sunxi-u-boot.dtsi file covers 20 different SoCs with varying watchdog node phandle names. So it would have required adding a -u-boot.dtsi file for each board. Hooking things up automatically makes sense to me; this is what Linux does. (In fact, Linux does this for every watchdog device.) However, I put the code behind a new option to avoid surprises for other platforms. Samuel Holland (4): sysreset: Add uclass Kconfig dependency to drivers sysreset: Mark driver probe functions as static sysreset: watchdog: Move watchdog reference to plat data watchdog: Automatically register device with sysreset drivers/sysreset/Kconfig | 11 ++-- drivers/sysreset/sysreset_resetctl.c | 2 +- drivers/sysreset/sysreset_syscon.c | 2 +- drivers/sysreset/sysreset_watchdog.c | 40 ++-- drivers/watchdog/wdt-uclass.c| 5 include/sysreset.h | 14 ++ 6 files changed, 62 insertions(+), 12 deletions(-) -- 2.31.1
[PATCH 2/3] sunxi: Enable watchdog timer support by default
A watchdog helps recover from hangs or failure to boot an OS. It can also be used by the sysreset framework to intentionally reset the system. Now that a driver is available, let's enable this functionality on sunxi boards. Signed-off-by: Samuel Holland --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d692139199c..35b059c3faa 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1036,6 +1036,7 @@ config ARCH_SUNXI imply SPL_POWER imply SPL_SERIAL_SUPPORT imply USB_GADGET + imply WDT config ARCH_U8500 bool "ST-Ericsson U8500 Series" -- 2.31.1
[PATCH 3/3] sunxi: dts: H616: Enable the watchdog
For some reason, the watchdog was disabled in the H616 device tree. Most
likely this is a copy-paste from the H6 device tree: the H6 watchdog is
disabled because it is broken in some chips. However, there is no
evidence of issues with the H616 watchdog.
Enable the watchdog node so it can be used by the driver.
Signed-off-by: Samuel Holland
---
arch/arm/dts/sun50i-h616.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
index dd4d2f3..2f71e853e96 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616.dtsi
@@ -122,7 +122,6 @@
reg = <0x030090a0 0x20>;
interrupts = ;
clocks = <>;
- status = "disabled";
};
pio: pinctrl@300b000 {
--
2.31.1
[PATCH 1/3] watchdog: Add a driver for the sunxi watchdog
This driver supports the sun4i/sun6i/sun20i watchdog timers.
They have a maximum timeout of 16 seconds.
Signed-off-by: Samuel Holland
---
drivers/watchdog/Kconfig | 8 ++
drivers/watchdog/Makefile| 1 +
drivers/watchdog/sunxi_wdt.c | 188 +++
3 files changed, 197 insertions(+)
create mode 100644 drivers/watchdog/sunxi_wdt.c
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index f0ff2612a6b..59112147343 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -27,6 +27,7 @@ config WATCHDOG_TIMEOUT_MSECS
default 128000 if ARCH_MX25 || ARCH_MX31 || ARCH_MX5 || ARCH_MX6
default 128000 if ARCH_MX7 || ARCH_VF610
default 3 if ARCH_SOCFPGA
+ default 16000 if ARCH_SUNXI
default 6
help
Watchdog timeout in msec
@@ -241,6 +242,13 @@ config WDT_STM32MP
Enable the STM32 watchdog (IWDG) driver. Enable support to
configure STM32's on-SoC watchdog.
+config WDT_SUNXI
+ bool "Allwinner sunxi watchdog timer support"
+ depends on WDT && ARCH_SUNXI
+ default y
+ help
+ Enable support for the watchdog timer in Allwinner sunxi SoCs.
+
config XILINX_TB_WATCHDOG
bool "Xilinx Axi watchdog timer support"
depends on WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 5c7ef593fe5..20cf4280db0 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -35,5 +35,6 @@ obj-$(CONFIG_WDT_SBSA) += sbsa_gwdt.o
obj-$(CONFIG_WDT_K3_RTI) += rti_wdt.o
obj-$(CONFIG_WDT_SP805) += sp805_wdt.o
obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt.o
+obj-$(CONFIG_WDT_SUNXI) += sunxi_wdt.o
obj-$(CONFIG_WDT_TANGIER) += tangier_wdt.o
obj-$(CONFIG_WDT_XILINX) += xilinx_wwdt.o
diff --git a/drivers/watchdog/sunxi_wdt.c b/drivers/watchdog/sunxi_wdt.c
new file mode 100644
index 000..b40a1d29caa
--- /dev/null
+++ b/drivers/watchdog/sunxi_wdt.c
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Derived from linux/drivers/watchdog/sunxi_wdt.c:
+ * Copyright (C) 2013 Carlo Caione
+ * Copyright (C) 2012 Henrik Nordstrom
+ */
+
+#include
+#include
+#include
+#include
+
+#define MSEC_PER_SEC 1000
+
+#define WDT_MAX_TIMEOUT16
+#define WDT_TIMEOUT_MASK 0xf
+
+#define WDT_CTRL_RELOAD((1 << 0) | (0x0a57 << 1))
+
+#define WDT_MODE_ENBIT(0)
+
+struct sunxi_wdt_reg {
+ u8 wdt_ctrl;
+ u8 wdt_cfg;
+ u8 wdt_mode;
+ u8 wdt_timeout_shift;
+ u8 wdt_reset_mask;
+ u8 wdt_reset_val;
+ u32 wdt_key_val;
+};
+
+struct sunxi_wdt_priv {
+ void __iomem*base;
+ const struct sunxi_wdt_reg *regs;
+};
+
+/* Map of timeout in seconds to register value */
+static const u8 wdt_timeout_map[1 + WDT_MAX_TIMEOUT] = {
+ [0] = 0x0,
+ [1] = 0x1,
+ [2] = 0x2,
+ [3] = 0x3,
+ [4] = 0x4,
+ [5] = 0x5,
+ [6] = 0x6,
+ [7] = 0x7,
+ [8] = 0x7,
+ [9] = 0x8,
+ [10]= 0x8,
+ [11]= 0x9,
+ [12]= 0x9,
+ [13]= 0xa,
+ [14]= 0xa,
+ [15]= 0xb,
+ [16]= 0xb,
+};
+
+static int sunxi_wdt_reset(struct udevice *dev)
+{
+ struct sunxi_wdt_priv *priv = dev_get_priv(dev);
+ const struct sunxi_wdt_reg *regs = priv->regs;
+ void __iomem *base = priv->base;
+
+ writel(WDT_CTRL_RELOAD, base + regs->wdt_ctrl);
+
+ return 0;
+}
+
+static int sunxi_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ struct sunxi_wdt_priv *priv = dev_get_priv(dev);
+ const struct sunxi_wdt_reg *regs = priv->regs;
+ void __iomem *base = priv->base;
+ u32 val;
+
+ timeout /= MSEC_PER_SEC;
+ if (timeout > WDT_MAX_TIMEOUT)
+ timeout = WDT_MAX_TIMEOUT;
+
+ /* Set system reset function */
+ val = readl(base + regs->wdt_cfg);
+ val &= ~regs->wdt_reset_mask;
+ val |= regs->wdt_reset_val;
+ val |= regs->wdt_key_val;
+ writel(val, base + regs->wdt_cfg);
+
+ /* Set timeout and enable watchdog */
+ val = readl(base + regs->wdt_mode);
+ val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
+ val |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
+ val |= WDT_MODE_EN;
+ val |= regs->wdt_key_val;
+ writel(val, base + regs->wdt_mode);
+
+ return sunxi_wdt_reset(dev);
+}
+
+static int sunxi_wdt_stop(struct udevice *dev)
+{
+ struct sunxi_wdt_priv *priv = dev_get_priv(dev);
+ const struct sunxi_wdt_reg *regs = priv->regs;
+ void __iomem *base = priv->base;
+
+ writel(regs->wdt_key_val, base + regs->wdt_mode);
+
+ return 0;
+}
+
+static int sunxi_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+ int ret;
+
+ ret = sunxi_wdt_start(dev, 0, flags);
+ if (ret)
+
[PATCH] sunxi: Select SPL_SEPARATE_BSS
sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will attempt to load its DTB from the wrong address (after BSS in DRAM). This change fixes booting with SPL_OF_CONTROL=y. Signed-off-by: Samuel Holland --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d692139199c..67011208a00 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1008,6 +1008,7 @@ config ARCH_SUNXI select OF_CONTROL select OF_SEPARATE select SPECIFY_CONSOLE_INDEX + select SPL_SEPARATE_BSS if SPL select SPL_STACK_R if SPL select SPL_SYS_MALLOC_SIMPLE if SPL select SPL_SYS_THUMB_BUILD if !ARM64 -- 2.31.1
Re: [PATCH v2 2/4] tools: mkimage: Add Allwinner TOC0 support
On Sunday 22 August 2021 12:44:05 Samuel Holland wrote:
> >> +struct toc0_main_info {
> >> + uint8_t name[8];
> >> + __le32 magic;
> >> + __le32 checksum;
> >> + __le32 serial;
> >> + __le32 status;
> >> + __le32 num_items;
> >> + __le32 length;
> >> + uint8_t platform[4];
> >> + uint8_t reserved[8];
> >> + uint8_t end[4];
> >> +};
> >> +
> >> +#define TOC0_MAIN_INFO_NAME "TOC0.GLH"
> >> +#define TOC0_MAIN_INFO_MAGIC 0x89119800
> >> +#define TOC0_MAIN_INFO_END"MIE;"
> >> +
> >> +struct toc0_item_info {
> >> + __le32 name;
> >> + __le32 offset;
> >> + __le32 length;
> >> + __le32 status;
> >> + __le32 type;
> >> + __le32 load_addr;
> >> + uint8_t reserved[4];
> >> + uint8_t end[4];
> >> +};
> >
> > These structures are raw image structures, right? Therefore they should
> > be marked as __packed?
>
> I'm not sure why I would want to do that? The structures do not have any
> padding to start with, and the layout of the image format implies that
> they will be naturally aligned (and in fact the boot ROM assumes this).
> Marking them as packed would only cause GCC to generate less efficient code.
Because this code is running on the build machine, not on target
hardware where is the boot ROM. It is compiled by host compiler and
build machine may have totally different padding / layout schematics and
C compiler is free in this case to put any padding between any two
members in that structure.
And if GCC generates different or less efficient code, it means that
__packed is really needed here.
Re: [PATCH v2 2/4] tools: mkimage: Add Allwinner TOC0 support
On 8/22/21 5:07 AM, Pali Rohár wrote:
> Hello!
>
> On Saturday 21 August 2021 23:46:46 Samuel Holland wrote:
>> Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and
>> secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the
>> existing sunxi_egon image type. The secure boot ROM (SBROM) uses a
>> completely different image type, known as TOC0.
>>
>> A TOC0 image is composed of a header and two or more items. One item
>> is the firmware binary. The others form a chain linking the firmware
>> signature to the root-of-trust public key (ROTPK), which has its hash
>> burned in the SoC's eFuses. Signatures are made using RSA-2048 + SHA256.
>>
>> The pseudo-ASN.1 structure is manually assembled; this is done to work
>> around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0
>> implementation has been verified to work with the A50, A64, H5, H6,
>> and H616 SBROMs, and it may work with other SoCs.
>>
>> Signed-off-by: Samuel Holland
>> ---
>>
>> Changes in v2:
>> - Moved certificate and key item structures out of sunxi_image.h
>> - Renamed "main" and "item" variables for clarity
>> - Improved error messages, and added a hint about key generation
>> - Added a comment explaining the purpose of the various key files
>> - Mentioned testing this code on A50 in the commit message
>>
>> arch/arm/Kconfig | 1 +
>> common/image.c| 1 +
>> include/image.h | 1 +
>> include/sunxi_image.h | 36 ++
>> tools/Makefile| 3 +-
>> tools/sunxi_toc0.c| 907 ++
>> 6 files changed, 948 insertions(+), 1 deletion(-)
>> create mode 100644 tools/sunxi_toc0.c
>>
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index d692139199c..799fe7d43af 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -1014,6 +1014,7 @@ config ARCH_SUNXI
>> select SUNXI_GPIO
>> select SYS_NS16550
>> select SYS_THUMB_BUILD if !ARM64
>> +select TOOLS_LIBCRYPTO
>> select USB if DISTRO_DEFAULTS
>> select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
>> select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
>> diff --git a/common/image.c b/common/image.c
>> index 59c52a1f9ad..8f1634c1206 100644
>> --- a/common/image.c
>> +++ b/common/image.c
>> @@ -191,6 +191,7 @@ static const table_entry_t uimage_type[] = {
>> { IH_TYPE_MTKIMAGE, "mtk_image", "MediaTek BootROM loadable
>> Image" },
>> { IH_TYPE_COPRO, "copro", "Coprocessor Image"},
>> { IH_TYPE_SUNXI_EGON, "sunxi_egon", "Allwinner eGON Boot Image"
>> },
>> +{ IH_TYPE_SUNXI_TOC0, "sunxi_toc0", "Allwinner TOC0 Boot Image"
>> },
>> { -1, "", "", },
>> };
>>
>> diff --git a/include/image.h b/include/image.h
>> index e20f0b69d58..a4efc090309 100644
>> --- a/include/image.h
>> +++ b/include/image.h
>> @@ -284,6 +284,7 @@ enum {
>> IH_TYPE_IMX8IMAGE, /* Freescale IMX8Boot Image */
>> IH_TYPE_COPRO, /* Coprocessor Image for remoteproc*/
>> IH_TYPE_SUNXI_EGON, /* Allwinner eGON Boot Image */
>> +IH_TYPE_SUNXI_TOC0, /* Allwinner TOC0 Boot Image */
>>
>> IH_TYPE_COUNT, /* Number of image types */
>> };
>> diff --git a/include/sunxi_image.h b/include/sunxi_image.h
>> index 5b2055c0af3..399ad0be999 100644
>> --- a/include/sunxi_image.h
>> +++ b/include/sunxi_image.h
>> @@ -9,9 +9,12 @@
>> *
>> * Shared between mkimage and the SPL.
>> */
>> +
>> #ifndef SUNXI_IMAGE_H
>> #define SUNXI_IMAGE_H
>>
>> +#include
>> +
>> #define BOOT0_MAGIC "eGON.BT0"
>> #define BROM_STAMP_VALUE0x5f0a6c39
>> #define SPL_SIGNATURE "SPL" /* marks "sunxi" SPL header */
>> @@ -79,4 +82,37 @@ struct boot_file_head {
>> /* Compile time check to assure proper alignment of structure */
>> typedef char boot_file_head_not_multiple_of_32[1 - 2*(sizeof(struct
>> boot_file_head) % 32)];
>
> (Just suggestion for future, not related to this patch series: above
> check could be rewritten/cleaned to use static assert)
I will send a separate patch once this is merged.
>>
>> +struct toc0_main_info {
>> +uint8_t name[8];
>> +__le32 magic;
>> +__le32 checksum;
>> +__le32 serial;
>> +__le32 status;
>> +__le32 num_items;
>> +__le32 length;
>> +uint8_t platform[4];
>> +uint8_t reserved[8];
>> +uint8_t end[4];
>> +};
>> +
>> +#define TOC0_MAIN_INFO_NAME "TOC0.GLH"
>> +#define TOC0_MAIN_INFO_MAGIC0x89119800
>> +#define TOC0_MAIN_INFO_END "MIE;"
>> +
>> +struct toc0_item_info {
>> +__le32 name;
>> +__le32 offset;
>> +__le32 length;
>> +__le32 status;
>> +__le32 type;
>> +__le32 load_addr;
>> +uint8_t reserved[4];
>> +uint8_t end[4];
>> +};
>
> These structures are raw image structures, right? Therefore they should
> be marked as
Re: [PATCH v2 1/4] tools: Separate image types which depend on OpenSSL
On 8/22/21 4:58 AM, Pali Rohár wrote:
> Hello!
>
> On Saturday 21 August 2021 23:46:45 Samuel Holland wrote:
>> Some image types always depend on OpenSSL, so they can only be included
>> in mkimage when TOOLS_LIBCRYPTO is selected. Instead of using arbitrary
>> preprocessor definitions, conditionally link the files.
>>
>> When building for platforms which use those image types, automatically
>> select TOOLS_LIBCRYPTO, it is required for the build to complete.
>>
>> Signed-off-by: Samuel Holland
>> ---
>>
>> Changes in v2:
>> - Refactored the first patch on top of TOOLS_LIBCRYPTO
>>
>> arch/arm/mach-imx/mxs/Kconfig | 2 ++
>> arch/arm/mach-mvebu/Kconfig | 1 +
>> scripts/config_whitelist.txt | 1 -
>> tools/Makefile| 19 +--
>> tools/mxsimage.c | 3 ---
>> 5 files changed, 8 insertions(+), 18 deletions(-)
>>
>> diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig
>> index 9f48ffda414..24d452942a5 100644
>> --- a/arch/arm/mach-imx/mxs/Kconfig
>> +++ b/arch/arm/mach-imx/mxs/Kconfig
>> @@ -3,6 +3,7 @@ if ARCH_MX23
>> config MX23
>> bool
>> default y
>> +select TOOLS_LIBCRYPTO
>>
>> choice
>> prompt "MX23 board select"
>> @@ -34,6 +35,7 @@ if ARCH_MX28
>> config MX28
>> bool
>> default y
>> +select TOOLS_LIBCRYPTO
>>
>> choice
>> prompt "MX28 board select"
>> diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
>> index 89737a37ad9..c02521c71bc 100644
>> --- a/arch/arm/mach-mvebu/Kconfig
>> +++ b/arch/arm/mach-mvebu/Kconfig
>> @@ -29,6 +29,7 @@ config ARMADA_38X
>> bool
>> select ARMADA_32BIT
>> select HAVE_MVEBU_EFUSE
>> +select TOOLS_LIBCRYPTO
>
> kwbimage format is used also by A375 and AXP platform. So rather put
> this select into ARMADA_32BIT section.
I can do this.
> Moreover kwbimage format is used also by orion and kirkwood platforms.
> So this dependency needs to be enabled on more places.
Since you know where they should go, would you be willing to send a
patch adding the additional "select"s?
Side note: TOOLS_LIBCRYPTO=y is the default, so nobody seems to have
noticed, but actually the build with TOOLS_LIBCRYPTO=n is broken since
commit b4f3cc2c42d9 ("tools: kwbimage: Do not hide usage of secure
header under CONFIG_ARMADA_38X"). So I will add a Fixes: tag in v3.
Regards,
Samuel
>> config ARMADA_38X_HS_IMPEDANCE_THRESH
>> hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
>> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
>> index 2d70bf5da7c..5caaad0c3dc 100644
>> --- a/scripts/config_whitelist.txt
>> +++ b/scripts/config_whitelist.txt
>> @@ -1000,7 +1000,6 @@ CONFIG_MXC_UART_BASE
>> CONFIG_MXC_USB_FLAGS
>> CONFIG_MXC_USB_PORT
>> CONFIG_MXC_USB_PORTSC
>> -CONFIG_MXS
>> CONFIG_MXS_AUART
>> CONFIG_MXS_AUART_BASE
>> CONFIG_MXS_OCOTP
>> diff --git a/tools/Makefile b/tools/Makefile
>> index 4a86321f646..ad0e9cf9490 100644
>> --- a/tools/Makefile
>> +++ b/tools/Makefile
>> @@ -94,9 +94,11 @@ ECDSA_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix
>> lib/ecdsa/, ecdsa-libcrypto.
>> AES_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix lib/aes/, \
>> aes-encrypt.o aes-decrypt.o)
>>
>> -# Cryptographic helpers that depend on openssl/libcrypto
>> -LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix lib/, \
>> -fdt-libcrypto.o)
>> +# Cryptographic helpers and image types that depend on openssl/libcrypto
>> +LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := \
>> +lib/fdt-libcrypto.o \
>> +kwbimage.o \
>> +mxsimage.o
>>
>> ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o
>>
>> @@ -117,10 +119,8 @@ dumpimage-mkimage-objs := aisimage.o \
>> imximage.o \
>> imx8image.o \
>> imx8mimage.o \
>> -kwbimage.o \
>> lib/md5.o \
>> lpc32xximage.o \
>> -mxsimage.o \
>> omapimage.o \
>> os_support.o \
>> pblimage.o \
>> @@ -155,22 +155,13 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o
>> fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o
>> file2include-objs := file2include.o
>>
>> -ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_TOOLS_LIBCRYPTO),)
>> -# Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
>> -# the mxsimage support within tools/mxsimage.c .
>> -HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS
>> -endif
>> -
>> ifdef CONFIG_TOOLS_LIBCRYPTO
>> # This affects include/image.h, but including the board config file
>> # is tricky, so manually define this options here.
>> HOST_EXTRACFLAGS+= -DCONFIG_FIT_SIGNATURE
>> HOST_EXTRACFLAGS+= -DCONFIG_FIT_SIGNATURE_MAX_SIZE=0x
>> HOST_EXTRACFLAGS
Re: [PATCH 01/11] i2c: Add a DM_I2C wrapper for the sun6i_p2wi controller
Hi Heiko, On 8/22/21 3:38 AM, Heiko Schocher wrote: > Hello Samuel, > > On 22.08.21 01:05, Samuel Holland wrote: >> This bus controller is used to communicate with an X-Powers AXP PMIC. >> Currently, various drivers access PMIC registers through a platform- >> specific non-DM "pmic_bus" interface, which depends on the legacy I2C >> framework. In order to convert those drivers to use DM_PMIC, this bus >> needs a DM_I2C driver. >> >> Since the non-DM bus controller driver is still needed in SPL, the quick >> solution is to implement the DM_I2C ops using the existing functions. >> >> The register for switching between I2C/P2WI/RSB mode is the same across >> all PMIC variants, so move that to the common header. >> >> Signed-off-by: Samuel Holland >> --- >> >> arch/arm/mach-sunxi/Kconfig| 11 -- >> arch/arm/mach-sunxi/pmic_bus.c | 7 ++-- >> drivers/i2c/Kconfig| 8 + >> drivers/i2c/Makefile | 1 + >> drivers/i2c/sun6i_p2wi.c | 66 ++ > > I wonder, as this config symbol gets also removed, that there > is no remove of driver code? I did not remove any config symbol, only moved it to a different file. It sounds like you want me to use a new symbol for the DM_I2C driver (SYS_I2C_SUN6I_P2WI). So in that case, I would leave the old symbol alone, and have SYS_I2C_SUN6I_P2WI select it. >> include/axp_pmic.h | 6 >> 6 files changed, 84 insertions(+), 15 deletions(-) >> create mode 100644 drivers/i2c/sun6i_p2wi.c >> >> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig >> index 79c669a4813..37076c2dfb3 100644 >> --- a/arch/arm/mach-sunxi/Kconfig >> +++ b/arch/arm/mach-sunxi/Kconfig >> @@ -88,17 +88,6 @@ config DRAM_SUN50I_H616_UNKNOWN_FEATURE >>feature. >> endif >> >> -config SUN6I_P2WI >> -bool "Allwinner sun6i internal P2WI controller" >> -help >> - If you say yes to this option, support will be included for the >> - P2WI (Push/Pull 2 Wire Interface) controller embedded in some sunxi >> - SOCs. >> - The P2WI looks like an SMBus controller (which supports only byte >> - accesses), except that it only supports one slave device. >> - This interface is used to connect to specific PMIC devices (like the >> - AXP221). >> - >> config SUN6I_PRCM >> bool >> help >> diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c >> index 0394ce85644..673a05fdd16 100644 >> --- a/arch/arm/mach-sunxi/pmic_bus.c >> +++ b/arch/arm/mach-sunxi/pmic_bus.c >> @@ -8,6 +8,7 @@ >> * axp223 uses the rsb bus, these functions abstract this. >> */ >> >> +#include >> #include >> #include >> #include >> @@ -21,8 +22,6 @@ >> #define AXP305_I2C_ADDR 0x36 >> >> #define AXP221_CHIP_ADDR0x68 >> -#define AXP221_CTRL_ADDR0x3e >> -#define AXP221_INIT_DATA0x3e >> >> /* AXP818 device and runtime addresses are same as AXP223 */ >> #define AXP223_DEVICE_ADDR 0x3a3 >> @@ -40,8 +39,8 @@ int pmic_bus_init(void) >> #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined >> CONFIG_AXP818_POWER >> # ifdef CONFIG_MACH_SUN6I >> p2wi_init(); >> -ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, >> - AXP221_INIT_DATA); >> +ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP_PMIC_MODE_REG, >> + AXP_PMIC_MODE_P2WI); >> # elif defined CONFIG_MACH_SUN8I_R40 >> /* Nothing. R40 uses the AXP221s in I2C mode */ >> ret = 0; >> diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig >> index 5d27f503bfc..d082676c4b2 100644 >> --- a/drivers/i2c/Kconfig >> +++ b/drivers/i2c/Kconfig >> @@ -577,6 +577,14 @@ config SYS_I2C_STM32F7 >> _ Optional clock stretching >> _ Software reset >> >> +config SUN6I_P2WI > > Could you please use "SYS_I2C_" ? > >> +bool "Allwinner sun6i P2WI controller" >> +depends on ARCH_SUNXI >> +help >> + Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded >> + in the Allwinner A31 and A31s SOCs. This interface is used to connect >> + to specific devices like the X-Powers AXP221 PMIC. >> + >> config SYNQUACER >> bool "Socionext SynQuacer I2C controller" >> depends on ARCH_SYNQUACER && DM_I2C >> diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile >> index 3a7ecd9274b..2461f0a2db8 100644 >> --- a/drivers/i2c/Makefile >> +++ b/drivers/i2c/Makefile >> @@ -43,6 +43,7 @@ obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o >> i2c-emul-uclass.o >> obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o >> obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o >> obj-$(CONFIG_SYS_I2C_STM32F7) += stm32f7_i2c.o >> +obj-$(CONFIG_SUN6I_P2WI) += sun6i_p2wi.o > > please sort alphabetical. I was sorting by file name -- this will be fixed by renaming the config symbol. Regards, Samuel >> obj-$(CONFIG_SYS_I2C_SYNQUACER)
[PATCH 3/3] fs/erofs: add lz4 decompression support
From: Huang Jianan
Support EROFS lz4 compressed files.
Signed-off-by: Huang Jianan
---
fs/erofs/Makefile | 4 +-
fs/erofs/data.c | 84 ++-
fs/erofs/decompress.c | 74 ++
fs/erofs/decompress.h | 29 +++
fs/erofs/namei.c | 2 +-
fs/erofs/zmap.c | 517 ++
6 files changed, 707 insertions(+), 3 deletions(-)
create mode 100644 fs/erofs/decompress.c
create mode 100644 fs/erofs/decompress.h
create mode 100644 fs/erofs/zmap.c
diff --git a/fs/erofs/Makefile b/fs/erofs/Makefile
index c4fc5b794e..8f1f99a096 100644
--- a/fs/erofs/Makefile
+++ b/fs/erofs/Makefile
@@ -5,4 +5,6 @@ obj-$(CONFIG_$(SPL_)FS_EROFS) = fs.o \
super.o \
namei.o \
data.o \
- lz4.o
+ lz4.o \
+ decompress.o \
+ zmap.o
diff --git a/fs/erofs/data.c b/fs/erofs/data.c
index a0f613264a..04ba9b5765 100644
--- a/fs/erofs/data.c
+++ b/fs/erofs/data.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
#include "internal.h"
+#include "decompress.h"
static int erofs_map_blocks_flatmode(struct erofs_inode *inode,
struct erofs_map_blocks *map,
@@ -107,6 +108,87 @@ static int erofs_read_raw_data(struct erofs_inode *inode,
char *buffer,
return 0;
}
+static int z_erofs_read_data(struct erofs_inode *inode, char *buffer,
+erofs_off_t size, erofs_off_t offset)
+{
+ erofs_off_t end, length, skip;
+ struct erofs_map_blocks map = {
+ .index = UINT_MAX,
+ };
+ bool partial;
+ unsigned int algorithmformat, bufsize;
+ char *raw = NULL;
+ int ret = 0;
+
+ end = offset + size;
+ bufsize = 0;
+ while (end > offset) {
+ map.m_la = end - 1;
+
+ ret = z_erofs_map_blocks_iter(inode, );
+ if (ret)
+ break;
+
+ /*
+* trim to the needed size if the returned extent is quite
+* larger than requested, and set up partial flag as well.
+*/
+ if (end < map.m_la + map.m_llen) {
+ length = end - map.m_la;
+ partial = true;
+ } else {
+ DBG_BUGON(end != map.m_la + map.m_llen);
+ length = map.m_llen;
+ partial = !(map.m_flags & EROFS_MAP_FULL_MAPPED);
+ }
+
+ if (map.m_la < offset) {
+ skip = offset - map.m_la;
+ end = offset;
+ } else {
+ skip = 0;
+ end = map.m_la;
+ }
+
+ if (!(map.m_flags & EROFS_MAP_MAPPED)) {
+ memset(buffer + end - offset, 0, length);
+ end = map.m_la;
+ continue;
+ }
+
+ if (map.m_plen > bufsize) {
+ bufsize = map.m_plen;
+ raw = realloc(raw, bufsize);
+ if (!raw) {
+ ret = -ENOMEM;
+ break;
+ }
+ }
+ ret = erofs_dev_read(raw, map.m_pa, map.m_plen);
+ if (ret < 0)
+ break;
+
+ algorithmformat = map.m_flags & EROFS_MAP_ZIPPED ?
+ Z_EROFS_COMPRESSION_LZ4 :
+ Z_EROFS_COMPRESSION_SHIFTED;
+
+ ret = z_erofs_decompress(&(struct z_erofs_decompress_req) {
+ .in = raw,
+ .out = buffer + end - offset,
+ .decodedskip = skip,
+ .inputsize = map.m_plen,
+ .decodedlength = length,
+ .alg = algorithmformat,
+ .partial_decoding = partial
+});
+ if (ret < 0)
+ break;
+ }
+ if (raw)
+ free(raw);
+ return ret < 0 ? ret : 0;
+}
+
int erofs_pread(struct erofs_inode *inode, char *buf,
erofs_off_t count, erofs_off_t offset)
{
@@ -116,7 +198,7 @@ int erofs_pread(struct erofs_inode *inode, char *buf,
return erofs_read_raw_data(inode, buf, count, offset);
case EROFS_INODE_FLAT_COMPRESSION_LEGACY:
case EROFS_INODE_FLAT_COMPRESSION:
- return -EOPNOTSUPP;
+ return z_erofs_read_data(inode, buf, count, offset);
default:
break;
}
diff --git
[PATCH 2/3] fs/erofs: add lz4 1.8.3 decompressor
From: Huang Jianan
In order to use the newest LZ4_decompress_safe_partial() which can
now decode exactly the nb of bytes requested.
Signed-off-by: Huang Jianan
---
fs/erofs/Makefile | 3 +-
fs/erofs/lz4.c| 534 ++
fs/erofs/lz4.h| 4 +
3 files changed, 540 insertions(+), 1 deletion(-)
create mode 100644 fs/erofs/lz4.c
create mode 100644 fs/erofs/lz4.h
diff --git a/fs/erofs/Makefile b/fs/erofs/Makefile
index 7398ab7a36..c4fc5b794e 100644
--- a/fs/erofs/Makefile
+++ b/fs/erofs/Makefile
@@ -4,4 +4,5 @@
obj-$(CONFIG_$(SPL_)FS_EROFS) = fs.o \
super.o \
namei.o \
- data.o
+ data.o \
+ lz4.o
diff --git a/fs/erofs/lz4.c b/fs/erofs/lz4.c
new file mode 100644
index 00..35f67c15eb
--- /dev/null
+++ b/fs/erofs/lz4.c
@@ -0,0 +1,534 @@
+// SPDX-License-Identifier: GPL 2.0+ OR BSD-2-Clause
+/*
+ * LZ4 - Fast LZ compression algorithm
+ * Copyright (C) 2011 - 2016, Yann Collet.
+ * BSD 2 - Clause License (http://www.opensource.org/licenses/bsd -
license.php)
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following disclaimer
+ * in the documentation and/or other materials provided with the
+ * distribution.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * You can contact the author at :
+ * - LZ4 homepage : http://www.lz4.org
+ * - LZ4 source repository : https://github.com/lz4/lz4
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define FORCE_INLINE inline __attribute__((always_inline))
+
+static FORCE_INLINE u16 LZ4_readLE16(const void *src)
+{
+ return get_unaligned_le16(src);
+}
+
+static FORCE_INLINE void LZ4_copy8(void *dst, const void *src)
+{
+ put_unaligned(get_unaligned((const u64 *)src), (u64 *)dst);
+}
+
+typedef uint8_t BYTE;
+typedef uint16_t U16;
+typedef uint32_t U32;
+typedef int32_t S32;
+typedef uint64_t U64;
+typedef uintptr_t uptrval;
+
+static FORCE_INLINE void LZ4_write32(void *memPtr, U32 value)
+{
+ put_unaligned(value, (U32 *)memPtr);
+}
+
+/**
+* Reading and writing into memory
+**/
+
+/* customized version of memcpy, which may overwrite up to 7 bytes beyond
dstEnd */
+static void LZ4_wildCopy(void* dstPtr, const void* srcPtr, void* dstEnd)
+{
+BYTE* d = (BYTE*)dstPtr;
+const BYTE* s = (const BYTE*)srcPtr;
+BYTE* e = (BYTE*)dstEnd;
+do { LZ4_copy8(d,s); d+=8; s+=8; } while (d>ML_BITS;
+
+ /* ip < iend before the increment */
+ assert(!endOnInput || ip <= iend);
+
+ /*
+* A two-stage shortcut for the most common case:
+* 1) If the literal length is 0..14, and there is enough
+* space, enter the shortcut and copy 16 bytes on behalf
+* of the literals (in the fast mode, only 8 bytes can be
+* safely copied this way).
+* 2) Further if the match length is 4..18, copy 18 bytes
+* in a similar manner; but we ensure that there's enough
+* space in the output for those 18 bytes earlier, upon
+* entering the shortcut (in other words, there is a
+* combined check for both stages).
+*
+* The & in the likely() below is intentionally not && so that
+* some compilers can produce better parallelized runtime code
+*/
+ if ((endOnInput ? length != RUN_MASK : length <= 8)
+ /*
+ * strictly "less than" on input, to re-enter
+ * the loop with at least one byte
+ */
+ &&
[PATCH 1/3] fs/erofs: new filesystem
From: Huang Jianan
Add erofs filesystem support.
The code is adapted from erofs-utils in order to reduce maintenance
burden and keep with the latest feature.
This patch mainly deals with uncompressed files.
Signed-off-by: Huang Jianan
---
fs/Kconfig | 1 +
fs/Makefile | 1 +
fs/erofs/Kconfig| 12 ++
fs/erofs/Makefile | 7 +
fs/erofs/data.c | 124 ++
fs/erofs/erofs_fs.h | 384
fs/erofs/fs.c | 230 ++
fs/erofs/internal.h | 203 +++
fs/erofs/namei.c| 238 +++
fs/erofs/super.c| 65
fs/fs.c | 22 +++
include/erofs.h | 19 +++
include/fs.h| 1 +
13 files changed, 1307 insertions(+)
create mode 100644 fs/erofs/Kconfig
create mode 100644 fs/erofs/Makefile
create mode 100644 fs/erofs/data.c
create mode 100644 fs/erofs/erofs_fs.h
create mode 100644 fs/erofs/fs.c
create mode 100644 fs/erofs/internal.h
create mode 100644 fs/erofs/namei.c
create mode 100644 fs/erofs/super.c
create mode 100644 include/erofs.h
diff --git a/fs/Kconfig b/fs/Kconfig
index 620af7f044..4d04c2c2ce 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -24,4 +24,5 @@ source "fs/yaffs2/Kconfig"
source "fs/squashfs/Kconfig"
+source "fs/erofs/Kconfig"
endmenu
diff --git a/fs/Makefile b/fs/Makefile
index 937cbcf6e8..f05a21c9e6 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -25,5 +25,6 @@ obj-$(CONFIG_CMD_UBIFS) += ubifs/
obj-$(CONFIG_YAFFS2) += yaffs2/
obj-$(CONFIG_CMD_ZFS) += zfs/
obj-$(CONFIG_FS_SQUASHFS) += squashfs/
+obj-$(CONFIG_FS_EROFS) += erofs/
endif
obj-y += fs_internal.o
diff --git a/fs/erofs/Kconfig b/fs/erofs/Kconfig
new file mode 100644
index 00..f4b2d51a23
--- /dev/null
+++ b/fs/erofs/Kconfig
@@ -0,0 +1,12 @@
+config FS_EROFS
+ bool "Enable EROFS filesystem support"
+ help
+ This provides support for reading images from EROFS filesystem.
+ EROFS (Enhanced Read-Only File System) is a lightweight read-only
+ file system for scenarios which need high-performance read-only
+ requirements.
+
+ It also provides fixed-sized output compression support, which
+ improves storage density, keeps relatively higher compression
+ ratios, which is more useful to achieve high performance for
+ embedded devices with limited memory.
diff --git a/fs/erofs/Makefile b/fs/erofs/Makefile
new file mode 100644
index 00..7398ab7a36
--- /dev/null
+++ b/fs/erofs/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_$(SPL_)FS_EROFS) = fs.o \
+ super.o \
+ namei.o \
+ data.o
diff --git a/fs/erofs/data.c b/fs/erofs/data.c
new file mode 100644
index 00..a0f613264a
--- /dev/null
+++ b/fs/erofs/data.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include "internal.h"
+
+static int erofs_map_blocks_flatmode(struct erofs_inode *inode,
+struct erofs_map_blocks *map,
+int flags)
+{
+ int err = 0;
+ erofs_blk_t nblocks, lastblk;
+ u64 offset = map->m_la;
+ struct erofs_inode *vi = inode;
+ bool tailendpacking = (vi->datalayout == EROFS_INODE_FLAT_INLINE);
+
+ nblocks = DIV_ROUND_UP(inode->i_size, EROFS_BLKSIZ);
+ lastblk = nblocks - tailendpacking;
+
+ if (offset >= inode->i_size) {
+ /* leave out-of-bound access unmapped */
+ map->m_flags = 0;
+ map->m_plen = 0;
+ goto out;
+ }
+
+ /* there is no hole in flatmode */
+ map->m_flags = EROFS_MAP_MAPPED;
+
+ if (offset < blknr_to_addr(lastblk)) {
+ map->m_pa = blknr_to_addr(vi->u.i_blkaddr) + map->m_la;
+ map->m_plen = blknr_to_addr(lastblk) - offset;
+ } else if (tailendpacking) {
+ /* 2 - inode inline B: inode, [xattrs], inline last blk... */
+ map->m_pa = iloc(vi->nid) + vi->inode_isize +
+ vi->xattr_isize + erofs_blkoff(map->m_la);
+ map->m_plen = inode->i_size - offset;
+
+ /* inline data should be located in one meta block */
+ if (erofs_blkoff(map->m_pa) + map->m_plen > PAGE_SIZE) {
+ erofs_err("inline data cross block boundary @ nid %"
PRIu64,
+ vi->nid);
+ DBG_BUGON(1);
+ err = -EFSCORRUPTED;
+ goto err_out;
+ }
+
+ map->m_flags |= EROFS_MAP_META;
+ } else {
+ erofs_err("internal error @ nid: %" PRIu64 " (size %llu), m_la
0x%" PRIx64,
+ vi->nid, (unsigned long long)inode->i_size,
map->m_la);
+ DBG_BUGON(1);
+ err = -EIO;
+
Re: SPL SPI boot problem after commit "spi: Update speed/mode on change"
On 8/22/21 4:47 PM, Oskari Lemmelä wrote:
On 22.8.2021 14.50, Marek Vasut wrote:
On 8/22/21 9:41 AM, Oskari Lemmelä wrote:
Hi Marek,
I was bisecting SPI flash boot problem in rockpro64 board and commit
e2e95e5e25421fb seems to broke it.
It seems that after speed and mode change SPL is unable to load BL31
anymore from SPI flash device.
There is no errors it just hangs forever.
If I change default mode to 0 (CONFIG_SF_DEFAULT_MODE=0), loading
BL31 seems to work. In that case spi_set_speed_mode is also called
but only speed is changed from 1Mhz to 10Mhz.
So changing mode from 0 to 3 in SPL stage seems to be the problem.
Any idea what could be the problem?
See 8c6d8c3219 ("configs: libretech: set SPI mode to 0")
Rockchip SPI supports both SCLK polarity and phase config and mode 3 is
working fine if uboot is booted from MMC.
However RK3399 documentation says SPI should be disabled while modifying
master settings (speed, mode and so on).
So this could be rk_spi.c driver issue.
Hmm, I don't have any rockchip device, so I cannot help you with that part.
Are you sure the SPI mode 3 (default) is the correct mode in the first
place ?
Re: SPL SPI boot problem after commit "spi: Update speed/mode on change"
On 22.8.2021 14.50, Marek Vasut wrote:
> On 8/22/21 9:41 AM, Oskari Lemmelä wrote:
>> Hi Marek,
>>
>> I was bisecting SPI flash boot problem in rockpro64 board and commit
>> e2e95e5e25421fb seems to broke it.
>>
>> It seems that after speed and mode change SPL is unable to load BL31
>> anymore from SPI flash device.
>> There is no errors it just hangs forever.
>>
>> If I change default mode to 0 (CONFIG_SF_DEFAULT_MODE=0), loading
>> BL31 seems to work. In that case spi_set_speed_mode is also called
>> but only speed is changed from 1Mhz to 10Mhz.
>>
>> So changing mode from 0 to 3 in SPL stage seems to be the problem.
>>
>> Any idea what could be the problem?
>
> See 8c6d8c3219 ("configs: libretech: set SPI mode to 0")
Rockchip SPI supports both SCLK polarity and phase config and mode 3 is
working fine if uboot is booted from MMC.
However RK3399 documentation says SPI should be disabled while modifying
master settings (speed, mode and so on).
So this could be rk_spi.c driver issue.
Oskari
[PATCH] rpi: Copy properties from firmware dtb to the loaded dtb
The RPI firmware adjusts several property values in the dtb it passes
to u-boot depending on the board/SoC revision. Inherit some of these
when u-boot loads a dtb itself. Specificaly copy:
* /model: The firmware provides a more specific string
* /memreserve: The firmware defines a reserved range, better keep it
* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as
present on rpi 400 and some rpi 4B boards) has different values for
these then the B0T revision. So these need to be adjusted to boot on
these boards
* blconfig: The firmware defines the memory area where the blconfig
stored. Copy those over so it can be enabled.
* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage
of that.
Signed-off-by: Sjoerd Simons
---
board/raspberrypi/rpi/rpi.c | 47 +
1 file changed, 47 insertions(+)
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index df52a4689f..d9467f4bda 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -495,8 +495,55 @@ void *board_fdt_blob_setup(void)
return (void *)fw_dtb_pointer;
}
+int copy_property(void *dst, void *src, char *path, char *property)
+{
+ int dst_offset, src_offset;
+ const fdt32_t *prop;
+ int len;
+
+ src_offset = fdt_path_offset(src, path);
+ dst_offset = fdt_path_offset(dst, path);
+
+ if (src_offset < 0 || dst_offset < 0)
+ return -1;
+
+ prop = fdt_getprop(src, src_offset, property, );
+ if (!prop)
+ return -1;
+
+ return fdt_setprop(dst, dst_offset, property, prop, len);
+}
+
+/* Copy tweaks from the firmware dtb to the loaded dtb */
+void update_fdt_from_fw(void *fdt, void *fw_fdt)
+{
+ /* Using dtb from firmware directly; leave it alone */
+ if (fdt == fw_fdt)
+ return;
+
+ /* The firmware provides a more precie model; so copy that */
+ copy_property(fdt, fw_fdt, "/", "model");
+
+ /* memory reserve as suggested by the firmware */
+ copy_property(fdt, fw_fdt, "/", "memreserve");
+
+ /* Adjust dma-ranges for the SD card and PCI bus as they can depend on
+* the SoC revision
+*/
+ copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges");
+ copy_property(fdt, fw_fdt, "pcie0", "dma-ranges");
+
+ /* Bootloader configuration template exposes as nvmem */
+ if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0)
+ copy_property(fdt, fw_fdt, "blconfig", "status");
+
+ /* kernel address randomisation seed as provided by the firmware */
+ copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed");
+}
+
int ft_board_setup(void *blob, struct bd_info *bd)
{
+ update_fdt_from_fw(blob, (void *)fw_dtb_pointer);
/*
* For now, we simply always add the simplefb DT node. Later, we
* should be more intelligent, and e.g. only do this if no enabled DT
--
2.33.0
Re: [PATCH 0/4] sunxi: TOC0 image type support
On Sat, Aug 21, 2021 at 09:19:56PM -0500, Samuel Holland wrote: > > Hi Andre, > > On 6/21/21 6:56 PM, Andre Przywara wrote: > > On Mon, 21 Jun 2021 16:35:37 -0400 > > Tom Rini wrote: > >> On Mon, Jun 21, 2021 at 04:43:00PM +0100, Andre Przywara wrote: > >>> On Sun, 20 Jun 2021 21:55:51 -0500 > >>> Samuel Holland wrote: > >>> > >>> (CC:ing Tom and Simon for the compatibility problem below) > >>> > >>> Hi, > >>> > This series adds support for the TOC0 image format used by the Allwinner > secure boot ROM (SBROM). This series has been tested on the following > SoCs/boards, with the eFuse burnt to enable secure mode: > - A64: Pine A64 Plus > - H5: Orange Pi Zero Plus > - H6: Pine H64 Model B > - H616: Orange Pi Zero 2 > >>> > >>> many thanks for sending this. In general this looks good (will do a > >>> more thorough review soon), just one thing that bothered me: > >>> > >>> This requires OpenSLL 1.1.x. There is nothing really wrong about this, > >>> but my (admittedly not the freshest) Slackware, but also long term > >>> distros like RHEL/CentOS (<=7), still come with 1.0.x (headers) only. > >>> > >>> I was wondering how important this is? I have the impression that > >>> embedded developers sometimes use old^Wstable systems, so some people > >>> might be bitten by it. I think in this case it will affect all user > >>> trying to build mkimage, regardless of the target platform? > >>> > >>> So I wanted to know what to do here? > >>> - Can we provide some kind of compatibility support? OpenSSL seems > >>> to provide something: > >>> https://wiki.openssl.org/index.php/OpenSSL_1.1.0_Changes#Compatibility_Layer > >>> Haven't tested that fully yet, just downloading that tarball > >>> does not seem to cut it (or is missing files?). I guess one needs to > >>> copy some code from the Wiki? > >>> - Shall we detect missing v1.1.x support (via #if OPENSSL_VERSION_NUMBER > >>> < 0x1010L) and disable just sunxi_toc0 support in this case? > >> > >> There's two things. First, the series should be on top of (sorry!) > >> https://patchwork.ozlabs.org/project/uboot/patch/20210524202317.1492578-1-mr.nuke...@gmail.com/ > >> which adds a similar Kconfig option to make building tools easier. > > > > So this is on top of Simon's large series? Poor Samuel! Is there a > > branch somewhere? > > Now that all of these have landed, I'm rebasing this series. > > >> Second, while I think not supporting openssl 1.0.x is fine, > > > > Well, this was not what I was hoping for ;-) > > I followed the advice on the OpenSSL wiki and now have a rather small > > compatibility header file, which lets me compile mkimage even against > > OpenSSL v1.0.2u. It seems like kwbimage.c has similar provisions in > > place, I guess this could be merged into the external header? > > Happy to send a patch on top, if this seems useful. > > Considering the note from the OpenSSL website: > > > Note: The latest stable version is the 1.1.1 series. This is also > > our Long Term Support (LTS) version, supported until 11th September > > 2023. All older versions (including 1.1.0, 1.0.2, 1.0.0 and 0.9.8) > > are now out of support and should not be used. Users of these older > > versions are encouraged to upgrade to 1.1.1 as soon as possible. > and the fact that that I don't have access a system with an old OpenSSL, > I'm not too interested in spending much effort on it. I will, though, > happily test a patch if you do send one. Since this series came up we now also have: https://patchwork.ozlabs.org/project/uboot/patch/20210729183121.3798261-1-mr.nuke...@gmail.com/ So I would rather not see more old openssl compatibility code added. > >> I would like > >> to again ask for someone to spend the time looking at switching to one > >> of the GPL-compatible libraries as I'm pretty sure it's been raised a > >> few times that we can't link with openssl like we do. > > > > Why is that? Because Apache is not compatible with GPLv2? The OpenSSL > > webpage says that: > > "Can I use OpenSSL with GPL software? > > On many systems including the major Linux and BSD distributions, yes > > (the GPL does not place restrictions on using libraries that are part > > of the normal operating system distribution)." > > And for mkimage we just build a regular userspace tool, which is linked > > against the system installed OpenSSL library. From my understanding > > this is what this quote above means with being permitted? > > > > And what would be the alternatives? Take one of the smaller ones and > > embed them into the code? > > Otherwise we would probably need to pick something that is widely > > available and shipped with distros, I guess? Like GnuTLS, > > libgcrypt, nettle? Maybe LibreSSL? > > > > Samuel, do you have an insight what would be a good fit? > > My original code was written against nettle. I switched to OpenSSL > because that was already integrated into U-Boot (oops!), and to use the > ASN.1
Re: SPL SPI boot problem after commit "spi: Update speed/mode on change"
On 8/22/21 9:41 AM, Oskari Lemmelä wrote:
Hi Marek,
I was bisecting SPI flash boot problem in rockpro64 board and commit
e2e95e5e25421fb seems to broke it.
It seems that after speed and mode change SPL is unable to load BL31
anymore from SPI flash device.
There is no errors it just hangs forever.
If I change default mode to 0 (CONFIG_SF_DEFAULT_MODE=0), loading BL31
seems to work. In that case spi_set_speed_mode is also called but only
speed is changed from 1Mhz to 10Mhz.
So changing mode from 0 to 3 in SPL stage seems to be the problem.
Any idea what could be the problem?
See 8c6d8c3219 ("configs: libretech: set SPI mode to 0")
Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
On Sunday 22 August 2021 13:35:54 Marek Behún wrote: > + pali, who can tell whether this won't break how the code is aligned > with upstream mv-ddr This one change touch only drivers/ddr/marvell/axp/ files which are for Armada XP. Upstream mv-ddr code does not contain Armada XP code. It contains code for new platforms: A38x, A37xx, A70xx, A80xx, CN913x. So only code which touches drivers/ddr/marvell/a38x/ needs care for upstream synchronization. > On Sat, 21 Aug 2021 13:50:14 -0400 > Tom Rini wrote: > > > We have a number of CONFIG symbols to express the fixed size of system > > memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE > > and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire > > size rather than MiB. > > > > Cc: Marek Behún > > Cc: Stefan Roese > > Signed-off-by: Tom Rini > > --- > > drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++-- > > include/configs/maxbcm.h | 4 +++- > > include/configs/theadorable.h | 4 +++- > > 3 files changed, 8 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h > > b/drivers/ddr/marvell/axp/ddr3_axp.h > > index 270691e9bcd3..970651f87029 100644 > > --- a/drivers/ddr/marvell/axp/ddr3_axp.h > > +++ b/drivers/ddr/marvell/axp/ddr3_axp.h > > @@ -19,10 +19,10 @@ > > #define FAR_END_DIMM_ADDR 0x50 > > #define MAX_DIMM_ADDR 0x60 > > > > -#ifndef CONFIG_DDR_FIXED_SIZE > > +#ifndef CONFIG_SYS_SDRAM_SIZE > > #define SDRAM_CS_SIZE 0xFFF > > #else > > -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1) > > +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) > > - 1) > > #endif > > #define SDRAM_CS_BASE 0x0 > > #define SDRAM_DIMM_SIZE0x8000 > > diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h > > index fc2393204bec..5098f12f5425 100644 > > --- a/include/configs/maxbcm.h > > +++ b/include/configs/maxbcm.h > > @@ -6,6 +6,8 @@ > > #ifndef _CONFIG_DB_MV7846MP_GP_H > > #define _CONFIG_DB_MV7846MP_GP_H > > > > +#include > > + > > /* > > * High Level Configuration Options (easy to change) > > */ > > @@ -65,7 +67,7 @@ > > /* SPL related SPI defines */ > > > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ > > -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ > > +#define CONFIG_SYS_SDRAM_SIZE SZ_1G > > #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ > > > > #endif /* _CONFIG_DB_MV7846MP_GP_H */ > > diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h > > index 760713d3ef87..abc48ff44ca5 100644 > > --- a/include/configs/theadorable.h > > +++ b/include/configs/theadorable.h > > @@ -6,6 +6,8 @@ > > #ifndef _CONFIG_THEADORABLE_H > > #define _CONFIG_THEADORABLE_H > > > > +#include > > + > > /* > > * High Level Configuration Options (easy to change) > > */ > > @@ -93,6 +95,6 @@ > > #define CONFIG_SPL_BOOTROM_SAVE(CONFIG_SPL_STACK + 4) > > > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ > > -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */ > > +#define CONFIG_SYS_SDRAM_SIZE SZ_2G > > > > #endif /* _CONFIG_THEADORABLE_H */ >
Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
+ pali, who can tell whether this won't break how the code is aligned with upstream mv-ddr On Sat, 21 Aug 2021 13:50:14 -0400 Tom Rini wrote: > We have a number of CONFIG symbols to express the fixed size of system > memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE > and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire > size rather than MiB. > > Cc: Marek Behún > Cc: Stefan Roese > Signed-off-by: Tom Rini > --- > drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++-- > include/configs/maxbcm.h | 4 +++- > include/configs/theadorable.h | 4 +++- > 3 files changed, 8 insertions(+), 4 deletions(-) > > diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h > b/drivers/ddr/marvell/axp/ddr3_axp.h > index 270691e9bcd3..970651f87029 100644 > --- a/drivers/ddr/marvell/axp/ddr3_axp.h > +++ b/drivers/ddr/marvell/axp/ddr3_axp.h > @@ -19,10 +19,10 @@ > #define FAR_END_DIMM_ADDR0x50 > #define MAX_DIMM_ADDR0x60 > > -#ifndef CONFIG_DDR_FIXED_SIZE > +#ifndef CONFIG_SYS_SDRAM_SIZE > #define SDRAM_CS_SIZE0xFFF > #else > -#define SDRAM_CS_SIZE(CONFIG_DDR_FIXED_SIZE - 1) > +#define SDRAM_CS_SIZE((CONFIG_SYS_SDRAM_SIZE >> 10) > - 1) > #endif > #define SDRAM_CS_BASE0x0 > #define SDRAM_DIMM_SIZE 0x8000 > diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h > index fc2393204bec..5098f12f5425 100644 > --- a/include/configs/maxbcm.h > +++ b/include/configs/maxbcm.h > @@ -6,6 +6,8 @@ > #ifndef _CONFIG_DB_MV7846MP_GP_H > #define _CONFIG_DB_MV7846MP_GP_H > > +#include > + > /* > * High Level Configuration Options (easy to change) > */ > @@ -65,7 +67,7 @@ > /* SPL related SPI defines */ > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ > -#define CONFIG_DDR_FIXED_SIZE(1 << 20) /* 1GiB */ > +#define CONFIG_SYS_SDRAM_SIZESZ_1G > #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ > > #endif /* _CONFIG_DB_MV7846MP_GP_H */ > diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h > index 760713d3ef87..abc48ff44ca5 100644 > --- a/include/configs/theadorable.h > +++ b/include/configs/theadorable.h > @@ -6,6 +6,8 @@ > #ifndef _CONFIG_THEADORABLE_H > #define _CONFIG_THEADORABLE_H > > +#include > + > /* > * High Level Configuration Options (easy to change) > */ > @@ -93,6 +95,6 @@ > #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ > -#define CONFIG_DDR_FIXED_SIZE(2 << 20) /* 2GiB */ > +#define CONFIG_SYS_SDRAM_SIZESZ_2G > > #endif /* _CONFIG_THEADORABLE_H */
[PATCH] tools: kwbimage: Remove comment about unimplemented register headers in v1 images
Support for register headers in v1 images was implemented in commit
02ba70ad6822 ("tools: kwbimage: Add support for DATA command also for v1
images"). So remove old comment.
Signed-off-by: Pali Rohár
Fixes: 02ba70ad6822 ("tools: kwbimage: Add support for DATA command also for v1
images")
---
tools/kwbimage.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index c1269fb6633a..0b5d0e735a27 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -5,8 +5,6 @@
*
* (C) Copyright 2013 Thomas Petazzoni
*
- *
- * Not implemented: support for the register headers in v1 images
*/
#include "imagetool.h"
--
2.20.1
RE: [PATCH v1 1/7] imx: mkimage_fit_atf: fix legacy image generation
Hello Marcel,
> -Original Message-
> From: U-Boot On Behalf Of Marcel Ziswiler
> Sent: Friday, August 20, 2021 10:52 PM
> To: u-boot@lists.denx.de
> Cc: Heiko Thiery ; Stefano Babic ;
> Fabio Estevam ; Frieder Schrempf
> ; Marcel Ziswiler
> ; NXP i.MX U-Boot Team i...@nxp.com>; Peng Fan
> Subject: [PATCH v1 1/7] imx: mkimage_fit_atf: fix legacy image generation
>
>
> From: Marcel Ziswiler
>
> While most boards meanwhile migrated to using binman a few like the verdin-
> imx8mm are still using the legacy image generation.
> Unfortunately, the legacy image generation is currently broken which is
> especially
> bad for any kind of bisection attempts.
> Anyway, this fixes it even though we will also migrate to using binman
> shortly.
This change has been already proposed in [1], but the discussion went into the
direction of monolithic "flash.bin" rather than a migration to use binman.
I guess if this change is really needed due to the fact that the migration of
some boards is really difficult - the original patch can be taken.
However, I've commented out in that thread that there is a warning regarding
the usage of scripts and migration notice, so maybe it does make sense to spend
extra effort to migrate away from this script at all?
>
> Fixes: commit cb9faa6f98ae
> ("tools: Use a single target-independent config to enable OpenSSL")
> Signed-off-by: Marcel Ziswiler
> ---
>
> arch/arm/mach-imx/mkimage_fit_atf.sh | 26 +-
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh b/arch/arm/mach-
> imx/mkimage_fit_atf.sh
> index 2a17968794c..2d6c46633c7 100755
> --- a/arch/arm/mach-imx/mkimage_fit_atf.sh
> +++ b/arch/arm/mach-imx/mkimage_fit_atf.sh
> @@ -53,7 +53,7 @@ cat << __HEADER_EOF
> description = "Configuration to load ATF before U-Boot";
>
> images {
> - uboot@1 {
> + uboot_1 {
> description = "U-Boot (64-bit)";
> os = "u-boot";
> data = /incbin/("$BL33"); @@ -68,7 +68,7 @@ cnt=1
> for dtname in $*
> do
> cat << __FDT_IMAGE_EOF
> - fdt@$cnt {
> + fdt_$cnt {
> description = "$(basename $dtname .dtb)";
> data = /incbin/("$dtname");
> type = "flat_dt"; @@ -79,7 +79,7 @@ cnt=$((cnt+1))
> done
>
> cat << __HEADER_EOF
> - atf@1 {
> + atf_1 {
> description = "ARM Trusted Firmware";
> os = "arm-trusted-firmware";
> data = /incbin/("$BL31"); @@ -93,7 +93,7 @@
> __HEADER_EOF
>
> if [ -f $BL32 ]; then
> cat << __HEADER_EOF
> - tee@1 {
> + tee_1 {
> description = "TEE firmware";
> data = /incbin/("$BL32");
> type = "firmware"; @@ -108,7 +108,7 @@ fi cat <<
> __CONF_HEADER_EOF
> };
> configurations {
> - default = "config@1";
> + default = "config_1";
>
> __CONF_HEADER_EOF
>
> @@ -117,20 +117,20 @@ for dtname in $*
> do
> if [ -f $BL32 ]; then
> cat << __CONF_SECTION_EOF
> - config@$cnt {
> + config_$cnt {
> description = "$(basename $dtname .dtb)";
> - firmware = "uboot@1";
> - loadables = "atf@1", "tee@1";
> - fdt = "fdt@$cnt";
> + firmware = "uboot_1";
> + loadables = "atf_1", "tee_1";
> + fdt = "fdt_$cnt";
> };
> __CONF_SECTION_EOF
> else
> cat << __CONF_SECTION1_EOF
> - config@$cnt {
> + config_$cnt {
> description = "$(basename $dtname .dtb)";
> - firmware = "uboot@1";
> - loadables = "atf@1";
> - fdt = "fdt@$cnt";
> + firmware = "uboot_1";
> + loadables = "atf_1";
> + fdt = "fdt_$cnt";
> };
> __CONF_SECTION1_EOF
> fi
> --
> 2.26.2
Link: [1]:
https://lore.kernel.org/u-boot/20210505120053.9466-1-oliver.gra...@kococonnector.com/
Regards,
Andrey
Re: [PATCH v2 2/4] tools: mkimage: Add Allwinner TOC0 support
Hello!
On Saturday 21 August 2021 23:46:46 Samuel Holland wrote:
> Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and
> secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the
> existing sunxi_egon image type. The secure boot ROM (SBROM) uses a
> completely different image type, known as TOC0.
>
> A TOC0 image is composed of a header and two or more items. One item
> is the firmware binary. The others form a chain linking the firmware
> signature to the root-of-trust public key (ROTPK), which has its hash
> burned in the SoC's eFuses. Signatures are made using RSA-2048 + SHA256.
>
> The pseudo-ASN.1 structure is manually assembled; this is done to work
> around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0
> implementation has been verified to work with the A50, A64, H5, H6,
> and H616 SBROMs, and it may work with other SoCs.
>
> Signed-off-by: Samuel Holland
> ---
>
> Changes in v2:
> - Moved certificate and key item structures out of sunxi_image.h
> - Renamed "main" and "item" variables for clarity
> - Improved error messages, and added a hint about key generation
> - Added a comment explaining the purpose of the various key files
> - Mentioned testing this code on A50 in the commit message
>
> arch/arm/Kconfig | 1 +
> common/image.c| 1 +
> include/image.h | 1 +
> include/sunxi_image.h | 36 ++
> tools/Makefile| 3 +-
> tools/sunxi_toc0.c| 907 ++
> 6 files changed, 948 insertions(+), 1 deletion(-)
> create mode 100644 tools/sunxi_toc0.c
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index d692139199c..799fe7d43af 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1014,6 +1014,7 @@ config ARCH_SUNXI
> select SUNXI_GPIO
> select SYS_NS16550
> select SYS_THUMB_BUILD if !ARM64
> + select TOOLS_LIBCRYPTO
> select USB if DISTRO_DEFAULTS
> select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
> select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
> diff --git a/common/image.c b/common/image.c
> index 59c52a1f9ad..8f1634c1206 100644
> --- a/common/image.c
> +++ b/common/image.c
> @@ -191,6 +191,7 @@ static const table_entry_t uimage_type[] = {
> { IH_TYPE_MTKIMAGE, "mtk_image", "MediaTek BootROM loadable
> Image" },
> { IH_TYPE_COPRO, "copro", "Coprocessor Image"},
> { IH_TYPE_SUNXI_EGON, "sunxi_egon", "Allwinner eGON Boot Image"
> },
> + { IH_TYPE_SUNXI_TOC0, "sunxi_toc0", "Allwinner TOC0 Boot Image"
> },
> { -1, "", "", },
> };
>
> diff --git a/include/image.h b/include/image.h
> index e20f0b69d58..a4efc090309 100644
> --- a/include/image.h
> +++ b/include/image.h
> @@ -284,6 +284,7 @@ enum {
> IH_TYPE_IMX8IMAGE, /* Freescale IMX8Boot Image */
> IH_TYPE_COPRO, /* Coprocessor Image for remoteproc*/
> IH_TYPE_SUNXI_EGON, /* Allwinner eGON Boot Image */
> + IH_TYPE_SUNXI_TOC0, /* Allwinner TOC0 Boot Image */
>
> IH_TYPE_COUNT, /* Number of image types */
> };
> diff --git a/include/sunxi_image.h b/include/sunxi_image.h
> index 5b2055c0af3..399ad0be999 100644
> --- a/include/sunxi_image.h
> +++ b/include/sunxi_image.h
> @@ -9,9 +9,12 @@
> *
> * Shared between mkimage and the SPL.
> */
> +
> #ifndef SUNXI_IMAGE_H
> #define SUNXI_IMAGE_H
>
> +#include
> +
> #define BOOT0_MAGIC "eGON.BT0"
> #define BROM_STAMP_VALUE 0x5f0a6c39
> #define SPL_SIGNATURE"SPL" /* marks "sunxi" SPL header */
> @@ -79,4 +82,37 @@ struct boot_file_head {
> /* Compile time check to assure proper alignment of structure */
> typedef char boot_file_head_not_multiple_of_32[1 - 2*(sizeof(struct
> boot_file_head) % 32)];
(Just suggestion for future, not related to this patch series: above
check could be rewritten/cleaned to use static assert)
>
> +struct toc0_main_info {
> + uint8_t name[8];
> + __le32 magic;
> + __le32 checksum;
> + __le32 serial;
> + __le32 status;
> + __le32 num_items;
> + __le32 length;
> + uint8_t platform[4];
> + uint8_t reserved[8];
> + uint8_t end[4];
> +};
> +
> +#define TOC0_MAIN_INFO_NAME "TOC0.GLH"
> +#define TOC0_MAIN_INFO_MAGIC 0x89119800
> +#define TOC0_MAIN_INFO_END "MIE;"
> +
> +struct toc0_item_info {
> + __le32 name;
> + __le32 offset;
> + __le32 length;
> + __le32 status;
> + __le32 type;
> + __le32 load_addr;
> + uint8_t reserved[4];
> + uint8_t end[4];
> +};
These structures are raw image structures, right? Therefore they should
be marked as __packed?
> +#define TOC0_ITEM_INFO_NAME_CERT 0x00010101
> +#define TOC0_ITEM_INFO_NAME_FIRMWARE 0x00010202
> +#define TOC0_ITEM_INFO_NAME_KEY 0x00010303
> +#define
Re: [PATCH v2 1/4] tools: Separate image types which depend on OpenSSL
Hello! On Saturday 21 August 2021 23:46:45 Samuel Holland wrote: > Some image types always depend on OpenSSL, so they can only be included > in mkimage when TOOLS_LIBCRYPTO is selected. Instead of using arbitrary > preprocessor definitions, conditionally link the files. > > When building for platforms which use those image types, automatically > select TOOLS_LIBCRYPTO, it is required for the build to complete. > > Signed-off-by: Samuel Holland > --- > > Changes in v2: > - Refactored the first patch on top of TOOLS_LIBCRYPTO > > arch/arm/mach-imx/mxs/Kconfig | 2 ++ > arch/arm/mach-mvebu/Kconfig | 1 + > scripts/config_whitelist.txt | 1 - > tools/Makefile| 19 +-- > tools/mxsimage.c | 3 --- > 5 files changed, 8 insertions(+), 18 deletions(-) > > diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig > index 9f48ffda414..24d452942a5 100644 > --- a/arch/arm/mach-imx/mxs/Kconfig > +++ b/arch/arm/mach-imx/mxs/Kconfig > @@ -3,6 +3,7 @@ if ARCH_MX23 > config MX23 > bool > default y > + select TOOLS_LIBCRYPTO > > choice > prompt "MX23 board select" > @@ -34,6 +35,7 @@ if ARCH_MX28 > config MX28 > bool > default y > + select TOOLS_LIBCRYPTO > > choice > prompt "MX28 board select" > diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig > index 89737a37ad9..c02521c71bc 100644 > --- a/arch/arm/mach-mvebu/Kconfig > +++ b/arch/arm/mach-mvebu/Kconfig > @@ -29,6 +29,7 @@ config ARMADA_38X > bool > select ARMADA_32BIT > select HAVE_MVEBU_EFUSE > + select TOOLS_LIBCRYPTO kwbimage format is used also by A375 and AXP platform. So rather put this select into ARMADA_32BIT section. Moreover kwbimage format is used also by orion and kirkwood platforms. So this dependency needs to be enabled on more places. > config ARMADA_38X_HS_IMPEDANCE_THRESH > hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)" > diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt > index 2d70bf5da7c..5caaad0c3dc 100644 > --- a/scripts/config_whitelist.txt > +++ b/scripts/config_whitelist.txt > @@ -1000,7 +1000,6 @@ CONFIG_MXC_UART_BASE > CONFIG_MXC_USB_FLAGS > CONFIG_MXC_USB_PORT > CONFIG_MXC_USB_PORTSC > -CONFIG_MXS > CONFIG_MXS_AUART > CONFIG_MXS_AUART_BASE > CONFIG_MXS_OCOTP > diff --git a/tools/Makefile b/tools/Makefile > index 4a86321f646..ad0e9cf9490 100644 > --- a/tools/Makefile > +++ b/tools/Makefile > @@ -94,9 +94,11 @@ ECDSA_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix > lib/ecdsa/, ecdsa-libcrypto. > AES_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix lib/aes/, \ > aes-encrypt.o aes-decrypt.o) > > -# Cryptographic helpers that depend on openssl/libcrypto > -LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix lib/, \ > - fdt-libcrypto.o) > +# Cryptographic helpers and image types that depend on openssl/libcrypto > +LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := \ > + lib/fdt-libcrypto.o \ > + kwbimage.o \ > + mxsimage.o > > ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o > > @@ -117,10 +119,8 @@ dumpimage-mkimage-objs := aisimage.o \ > imximage.o \ > imx8image.o \ > imx8mimage.o \ > - kwbimage.o \ > lib/md5.o \ > lpc32xximage.o \ > - mxsimage.o \ > omapimage.o \ > os_support.o \ > pblimage.o \ > @@ -155,22 +155,13 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o > fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o > file2include-objs := file2include.o > > -ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_TOOLS_LIBCRYPTO),) > -# Add CONFIG_MXS into host CFLAGS, so we can check whether or not register > -# the mxsimage support within tools/mxsimage.c . > -HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS > -endif > - > ifdef CONFIG_TOOLS_LIBCRYPTO > # This affects include/image.h, but including the board config file > # is tricky, so manually define this options here. > HOST_EXTRACFLAGS += -DCONFIG_FIT_SIGNATURE > HOST_EXTRACFLAGS += -DCONFIG_FIT_SIGNATURE_MAX_SIZE=0x > HOST_EXTRACFLAGS += -DCONFIG_FIT_CIPHER > -endif > > -# MXSImage needs LibSSL > -ifneq > ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_TOOLS_LIBCRYPTO),) > HOSTCFLAGS_kwbimage.o += \ > $(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "") > HOSTLDLIBS_mkimage += \ > diff --git a/tools/mxsimage.c b/tools/mxsimage.c > index 002f4b525aa..2bfbb421eb6 100644 > --- a/tools/mxsimage.c > +++ b/tools/mxsimage.c > @@ -5,8 +5,6 @@ > * Copyright (C) 2012-2013 Marek Vasut > */ > > -#ifdef CONFIG_MXS > - > #include >
Re: [PATCH] i2c: i2c-gpio: Support the named GPIO binding
Hello Samuel, On 22.08.21 02:25, Samuel Holland wrote: > To avoid confusion about the order of the GPIOs, the i2c-gpio binding > was updated to use a separate property for each GPIO instead of an > array. However, the driver only supports the old binding. Add support > for the new binding as well, so the driver continues to work as device > trees are updated. > > Signed-off-by: Samuel Holland > --- > > drivers/i2c/i2c-gpio.c | 9 + > 1 file changed, 9 insertions(+) Reviwed-by: Heiko Schocher bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 11/11] sunxi: Enable DM_I2C for all sunxi boards
Hello Samuel, On 22.08.21 01:05, Samuel Holland wrote: > Now that the last users of legacy I2C (outside of SPL) have been > resolved, we can enable DM_I2C at the sunxi architecture level. > > Signed-off-by: Samuel Holland > --- > > arch/arm/Kconfig| 1 + > arch/arm/mach-sunxi/Kconfig | 3 --- > 2 files changed, 1 insertion(+), 3 deletions(-) Reviewed-by: Heiko Schocher Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 10/11] sunxi: video: Convert panel I2C to use DM_I2C
Hello Samuel, On 22.08.21 01:05, Samuel Holland wrote: > Two displays supported by the sunxi display driver (each one used by a > single board) require initialization over I2C. Both previously used > i2c_soft; replace this with the i2c-gpio instance that already exists in > those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus). > > Since the i2c-gpio nodes are not referenced by any other node in the > device trees (the device trees have no panel node), the I2C bus is > selected by its node name. > > This panel initialization code was the only i2c_soft user, so the > i2c_soft GPIO setup code can be removed now as well. > > Signed-off-by: Samuel Holland > --- > > arch/arm/mach-sunxi/Kconfig | 22 ++ > board/sunxi/board.c | 44 +--- > configs/Colombus_defconfig | 6 -- > configs/UTOO_P66_defconfig | 3 - > drivers/video/anx9804.c | 107 ++-- > drivers/video/anx9804.h | 5 +- > drivers/video/sunxi/sunxi_display.c | 55 +- > include/configs/sunxi-common.h | 17 - > 8 files changed, 102 insertions(+), 157 deletions(-) Reviewed-by: Heiko Schocher bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 02/11] i2c: Add a DM_I2C wrapper for the sun8i_rsb controller
Hello Samuel, On 22.08.21 01:05, Samuel Holland wrote: > This bus controller is used to communicate with an X-Powers AXP PMIC. > Currently, various drivers access PMIC registers through a platform- > specific non-DM "pmic_bus" interface, which depends on the legacy I2C > framework. In order to convert those drivers to use DM_PMIC, this bus > needs a DM_I2C driver. > > Since the non-DM bus controller driver is still needed in SPL, the quick > solution is to implement the DM_I2C ops using the existing functions. > > The register for switching between I2C/P2WI/RSB mode is the same across > all PMIC variants, so move that to the common header. > > There are only a couple of pairs of hardware/runtime addresses used > across all PMIC variants. So far the code expected only the "primary" > pair, but some PMICs like the AXP305 and AXP805 use the secondary pair, > so add support for that to the DM driver as well. > > Signed-off-by: Samuel Holland > --- > > arch/arm/mach-sunxi/Kconfig| 8 > arch/arm/mach-sunxi/pmic_bus.c | 11 ++--- > drivers/i2c/Kconfig| 8 > drivers/i2c/Makefile | 1 + > drivers/i2c/sun8i_rsb.c| 86 ++ > include/axp_pmic.h | 6 +++ > 6 files changed, 105 insertions(+), 15 deletions(-) > create mode 100644 drivers/i2c/sun8i_rsb.c Same comments as for path 1 of this series, beside of this: Reviewed-by: Heiko Schocher bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 01/11] i2c: Add a DM_I2C wrapper for the sun6i_p2wi controller
Hello Samuel, On 22.08.21 01:05, Samuel Holland wrote: > This bus controller is used to communicate with an X-Powers AXP PMIC. > Currently, various drivers access PMIC registers through a platform- > specific non-DM "pmic_bus" interface, which depends on the legacy I2C > framework. In order to convert those drivers to use DM_PMIC, this bus > needs a DM_I2C driver. > > Since the non-DM bus controller driver is still needed in SPL, the quick > solution is to implement the DM_I2C ops using the existing functions. > > The register for switching between I2C/P2WI/RSB mode is the same across > all PMIC variants, so move that to the common header. > > Signed-off-by: Samuel Holland > --- > > arch/arm/mach-sunxi/Kconfig| 11 -- > arch/arm/mach-sunxi/pmic_bus.c | 7 ++-- > drivers/i2c/Kconfig| 8 + > drivers/i2c/Makefile | 1 + > drivers/i2c/sun6i_p2wi.c | 66 ++ I wonder, as this config symbol gets also removed, that there is no remove of driver code? > include/axp_pmic.h | 6 > 6 files changed, 84 insertions(+), 15 deletions(-) > create mode 100644 drivers/i2c/sun6i_p2wi.c > > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig > index 79c669a4813..37076c2dfb3 100644 > --- a/arch/arm/mach-sunxi/Kconfig > +++ b/arch/arm/mach-sunxi/Kconfig > @@ -88,17 +88,6 @@ config DRAM_SUN50I_H616_UNKNOWN_FEATURE > feature. > endif > > -config SUN6I_P2WI > - bool "Allwinner sun6i internal P2WI controller" > - help > - If you say yes to this option, support will be included for the > - P2WI (Push/Pull 2 Wire Interface) controller embedded in some sunxi > - SOCs. > - The P2WI looks like an SMBus controller (which supports only byte > - accesses), except that it only supports one slave device. > - This interface is used to connect to specific PMIC devices (like the > - AXP221). > - > config SUN6I_PRCM > bool > help > diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c > index 0394ce85644..673a05fdd16 100644 > --- a/arch/arm/mach-sunxi/pmic_bus.c > +++ b/arch/arm/mach-sunxi/pmic_bus.c > @@ -8,6 +8,7 @@ > * axp223 uses the rsb bus, these functions abstract this. > */ > > +#include > #include > #include > #include > @@ -21,8 +22,6 @@ > #define AXP305_I2C_ADDR 0x36 > > #define AXP221_CHIP_ADDR 0x68 > -#define AXP221_CTRL_ADDR 0x3e > -#define AXP221_INIT_DATA 0x3e > > /* AXP818 device and runtime addresses are same as AXP223 */ > #define AXP223_DEVICE_ADDR 0x3a3 > @@ -40,8 +39,8 @@ int pmic_bus_init(void) > #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined > CONFIG_AXP818_POWER > # ifdef CONFIG_MACH_SUN6I > p2wi_init(); > - ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, > -AXP221_INIT_DATA); > + ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP_PMIC_MODE_REG, > +AXP_PMIC_MODE_P2WI); > # elif defined CONFIG_MACH_SUN8I_R40 > /* Nothing. R40 uses the AXP221s in I2C mode */ > ret = 0; > diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig > index 5d27f503bfc..d082676c4b2 100644 > --- a/drivers/i2c/Kconfig > +++ b/drivers/i2c/Kconfig > @@ -577,6 +577,14 @@ config SYS_I2C_STM32F7 > _ Optional clock stretching > _ Software reset > > +config SUN6I_P2WI Could you please use "SYS_I2C_" ? > + bool "Allwinner sun6i P2WI controller" > + depends on ARCH_SUNXI > + help > + Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded > + in the Allwinner A31 and A31s SOCs. This interface is used to connect > + to specific devices like the X-Powers AXP221 PMIC. > + > config SYNQUACER > bool "Socionext SynQuacer I2C controller" > depends on ARCH_SYNQUACER && DM_I2C > diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile > index 3a7ecd9274b..2461f0a2db8 100644 > --- a/drivers/i2c/Makefile > +++ b/drivers/i2c/Makefile > @@ -43,6 +43,7 @@ obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o > i2c-emul-uclass.o > obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o > obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o > obj-$(CONFIG_SYS_I2C_STM32F7) += stm32f7_i2c.o > +obj-$(CONFIG_SUN6I_P2WI) += sun6i_p2wi.o please sort alphabetical. > obj-$(CONFIG_SYS_I2C_SYNQUACER) += synquacer_i2c.o > obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o > obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o > diff --git a/drivers/i2c/sun6i_p2wi.c b/drivers/i2c/sun6i_p2wi.c > new file mode 100644 > index 000..f1e8e5ed107 > --- /dev/null > +++ b/drivers/i2c/sun6i_p2wi.c > @@ -0,0 +1,66 @@ > +// SPDX-License-Identifier: GPL-2.0+ > + > +#include > +#include > +#include > +#include > + > +#if CONFIG_IS_ENABLED(DM_I2C) > + > +static int sun6i_p2wi_xfer(struct udevice *bus,
Re: [PATCH] cmd: ubi: add a command to swap volumes
Hello Ayoub,
Sorry for late reply, but I was not an cc ... so I missed this EMail...
On 09.07.21 17:57, Ayoub Zaki wrote:
> This commit adds the command ubi swap to swap an ubi volumes.
> The format of the command is: ubi swap .
> To enable this command, the option CMD_UBI_SWAPVOL must be selected.
>
> Signed-off-by: Ayoub Zaki
> ---
> cmd/Kconfig | 8
> cmd/ubi.c | 54 +
> 2 files changed, 62 insertions(+)
Reviewed-by: Heiko Schocher
Nitpick:
[...]
> diff --git a/cmd/ubi.c b/cmd/ubi.c
> index cb14e3e1e7..1b8197a4e3 100644
> --- a/cmd/ubi.c
> +++ b/cmd/ubi.c
> @@ -289,6 +289,54 @@ static int ubi_rename_vol(char *oldname, char *newname)
> return ubi_rename_volumes(ubi, );
> }
>
> +static int ubi_swap_vol(char *volume_a, char *volume_b)
> +{
> + struct ubi_volume *vol_a, *vol_b;
> + struct ubi_rename_entry a, b;
> + struct ubi_volume_desc desc_a, desc_b;
> + struct list_head list;
> +
> + vol_a = ubi_find_volume(volume_a);
> + if (!vol_a) {
> + printf("%s: volume %s doesn't exist\n", __func__, volume_a);
> + return ENODEV;
> + }
> +
> + vol_b = ubi_find_volume(volume_b);
> + if (!vol_b) {
> + printf("%s: volume %s doesn't exist\n", __func__, volume_a);
s/volume_a/volume_b
please fix and rebse to current mainle, thanks!
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
