Re: imx: imx8mm: imx8mm-kontron-n801x-s: does not start work
On 12.01.22 08:16, Heiko Thiery wrote: > Hi Adam, Hi Frieder, > > Am Di., 11. Jan. 2022 um 20:33 Uhr schrieb Adam Ford : >> >> On Tue, Jan 11, 2022 at 1:18 AM Heiko Thiery wrote: >>> >>> Hi all, >>> >>> I wanted to test the newly introduced kontron-sl-mx8mm_defconfig but >>> it does not work. >>> >>> I already found two converted config options that are missing in that >>> defconfig: >>> >>> +CONFIG_SPL_MMC=y >>> +CONFIG_SPL_SERIAL=y >>> >>> With that the output appears but the u-boot hangs when trying to find >>> the binman node in the dtb. >>> >>> --- >8 >>> U-Boot SPL 2022.01-00323-g56915a34d1 (Jan 11 2022 - 08:11:03 +0100) >>> Kontron SL i.MX8MM (N801X) module, 1 GB RAM detected >>> Touch controller detected, assuming LVDS panel... >>> Normal Boot >>> WDT: Not starting watchdog@3028 >>> Trying to boot from MMC2 >>> NOTICE: BL31: v2.4(release):v2.4 >>> NOTICE: BL31: Built : 09:46:16, Jan 10 2022 >>> >>> >>> U-Boot 2022.01-00323-g56915a34d1 (Jan 11 2022 - 08:11:03 +0100) >>> >>> CPU: Freescale i.MX8MMQ rev1.0 1600 MHz (running at 1200 MHz) >>> CPU: Industrial temperature grade (-40C to 105C) at 47C >>> Reset cause: POR >>> Model: Kontron i.MX8MM N801X S LVDS >>> DRAM: 1 GiB >>> binman_init failed:-2 >>> initcall sequence 7ffcef80 failed at call 4021f200 (err=-2) >>> ### ERROR ### Please RESET the board ### >>> --- >8 >>> >>> Does anyone have an idea what goes wrong? >> >> I did a diff on your defconfig and compared it to the imx8mm_beacon >> board, and there are few items that are different, but nothing >> obvious. I confirmed the Beacon board does boot. You might want to >> compare your defconfig files with other boards to see if you see >> something. >> >> One main difference is that I have only one DTB file integrated into >> the FIT file, but you have several. I wonder if that is causing >> issues. > > Thank you for the hint with the second dtb. It looks like a problem > with the imx8mm-kontron-n801x-s-u-boot.dtsi file. Since there is an > automatic detection in the board code what dtb to select in my case > the second one is selected. This is the > imx8mm-kontron-n801x-s-lvds.dtb. But for this one *-u-boot.dtsi is not > included. When doing a copy of the "base" -u-boot.dtsi file that > matches to the imx8mm-kontron-n801x-s-lvds.dtb name it works. Still > the question why this worked before. We have to figure out what the > difference is here compared to the version that was developed and > worked on 2021.10. Thanks for investigating this issue! I can't really tell what went wrong at the moment. Either something has changed recently or I missed that the second dtb is not working as I was mostly testing with the first one!? Adding a imx8mm-kontron-n801x-s-lvds-u-boot.dtsi with an include to imx8mm-kontron-n801x-s-u-boot.dtsi seems like a proper fix to me. In the long run it would probably be better to use only one dtb and apply overlays as needed, anyway. But I haven't looked into that yet.
How to use add-symbol-file in gdb after the program jumped to linux? (both when PC is physical and virtual)
Hello experts, I'm following linux boot-loading using u-boot (using SPL falcon mode, from RAM) on a qemu virtual machine (now linux started in real board too). The code jumped to linux kernel and because I have done `add-symbol-file vmlinux 0x80081000` I can follow the kernel code step by step using gdb connected to the virtual machine. Actually I loaded the kernel image to 0x8008 but I had to set the address to 0x80081000 to make the source code appear on the gdb correctly according to the PC value(I don't know why this difference of 0x1000 is needed). Later I found the kernel sets up the page table (identity mapping and swap table) and jumps to `__primary_switched` and this is where pure kernel virtual address is used first time for the PC. This is where the call is made at the end of the head.S file. ldr x8, =__primary_switched adrpx0, __PHYS_OFFSET br x8 In the symbol file (vmlinux, an elf file), the symbols before __primary_switched are all mapped at virtual addresses (starting with 0xffc0. high addresses) but the gdb could follow the source even when the PC value was using physical address. (The PC was initially loaded with physical address of the kernel start and PC relative jumps were being used until it jumps to `__primary_switched`, mmu disabled or using identity mapping) So does this mean, in doing `add-symbol-file` only the offset of the symbols from the start of text matters? Another question : I can follow the kernel source with gdb but after __primary_switched, I cannot see the source. The debugger doesn't show the correct source location according to the now kernel virtual PC value. Should I tell the debugger to use correct offset using add-symbol-file again? if so how? I would be happy to hear any comment or advice. Thank you! Chan Kim
Re: [PATCH u-boot-marvell 00/16] tools: kwbimage: Load address fixes
Hi Pali, while testing with this patchset (amongst others), I get this error while building for "theadorable_debug": $ make theadorable_debug_defconfig $ make -s -j20 Invalid LOAD_ADDRESS 0x40004030 for BINARY spl/u-boot-spl.bin with 0 args. Address must be 4-byte aligned and in range 0x4028-0x4424 .make: *** [Makefile:1448: u-boot-spl.kwb] Error 1 make: *** Deleting file 'u-boot-spl.kwb' Could you please take a look on whats going wrong here? Do I need to change CONFIG_SPL_TEXT_BASE now? And if yes, why? Thanks, Stefan On 12/21/21 16:54, Pali Rohár wrote: This patch series fixes generating images in kwbimage format, main fix is setting correct load address of U-Boot SPL. Also it adds support for generating kwbimage config file from existing kwbimage file via dumpimage tool. Pali Rohár (16): tools: kwbimage: Mark all local functions as static tools: kwbimage: Deduplicate v1 regtype header finishing tools: kwbimage: Fix generating image with multiple DATA_DELAY commands tools: kwbimage: Preserve order of BINARY, DATA and DATA_DELAY commands arm: mvebu: Generate kwbimage.cfg with $(call cmd,...) tools: kwbimage: Add support for specifying LOAD_ADDRESS for BINARY command tools: kwbimage: Check the return value of image_headersz_v1() arm: mvebu: Correctly set LOAD_ADDRESS for U-Boot SPL binary in kwbimage arm: mvebu: Enable BootROM output on A38x tools: kwbimage: Add missing check for maximal value for DATA_DELAY tools: kwbimage: Show binary image address in mkimage -l, in addition to size tools: kwbimage: Dump kwbimage config file on '-p -1' option tools: kwbimage: Do not cast const pointers to non-const pointers tools: kwbimage/kwboot: Check ext field for non-zero value tools: kwbimage: Extract main data image without -p arg for dumpimage tools: kwbimage: Fix mkimage/dumpimage -l argument arch/arm/mach-mvebu/Makefile| 17 +- arch/arm/mach-mvebu/kwbimage.cfg.in | 7 +- tools/kwbimage.c| 494 ++-- tools/kwbimage.h| 10 +- tools/kwboot.c | 4 +- 5 files changed, 421 insertions(+), 111 deletions(-) Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: imx: imx8mm: imx8mm-kontron-n801x-s: does not start work
Hi Adam, Hi Frieder, Am Di., 11. Jan. 2022 um 20:33 Uhr schrieb Adam Ford : > > On Tue, Jan 11, 2022 at 1:18 AM Heiko Thiery wrote: > > > > Hi all, > > > > I wanted to test the newly introduced kontron-sl-mx8mm_defconfig but > > it does not work. > > > > I already found two converted config options that are missing in that > > defconfig: > > > > +CONFIG_SPL_MMC=y > > +CONFIG_SPL_SERIAL=y > > > > With that the output appears but the u-boot hangs when trying to find > > the binman node in the dtb. > > > > --- >8 > > U-Boot SPL 2022.01-00323-g56915a34d1 (Jan 11 2022 - 08:11:03 +0100) > > Kontron SL i.MX8MM (N801X) module, 1 GB RAM detected > > Touch controller detected, assuming LVDS panel... > > Normal Boot > > WDT: Not starting watchdog@3028 > > Trying to boot from MMC2 > > NOTICE: BL31: v2.4(release):v2.4 > > NOTICE: BL31: Built : 09:46:16, Jan 10 2022 > > > > > > U-Boot 2022.01-00323-g56915a34d1 (Jan 11 2022 - 08:11:03 +0100) > > > > CPU: Freescale i.MX8MMQ rev1.0 1600 MHz (running at 1200 MHz) > > CPU: Industrial temperature grade (-40C to 105C) at 47C > > Reset cause: POR > > Model: Kontron i.MX8MM N801X S LVDS > > DRAM: 1 GiB > > binman_init failed:-2 > > initcall sequence 7ffcef80 failed at call 4021f200 (err=-2) > > ### ERROR ### Please RESET the board ### > > --- >8 > > > > Does anyone have an idea what goes wrong? > > I did a diff on your defconfig and compared it to the imx8mm_beacon > board, and there are few items that are different, but nothing > obvious. I confirmed the Beacon board does boot. You might want to > compare your defconfig files with other boards to see if you see > something. > > One main difference is that I have only one DTB file integrated into > the FIT file, but you have several. I wonder if that is causing > issues. Thank you for the hint with the second dtb. It looks like a problem with the imx8mm-kontron-n801x-s-u-boot.dtsi file. Since there is an automatic detection in the board code what dtb to select in my case the second one is selected. This is the imx8mm-kontron-n801x-s-lvds.dtb. But for this one *-u-boot.dtsi is not included. When doing a copy of the "base" -u-boot.dtsi file that matches to the imx8mm-kontron-n801x-s-lvds.dtb name it works. Still the question why this worked before. We have to figure out what the difference is here compared to the version that was developed and worked on 2021.10. -- Heiko
Re: [RESEND PATCH v3 01/12] mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC
Hi! On Wed, 12 Jan 2022 at 08:29, Jaehoon Chung wrote: > From: Sean Anderson > > U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already > support it, so let's force to use it. > > - Drop non-BLK support for DM_MMC introduced by below patch. >66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled > > - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). > > - Use DM_MMC instead of BLK for conditional compile. > > Signed-off-by: Yangbo Lu > Signed-off-by: Sean Anderson > Signed-off-by: Jaehoon Chung > --- > drivers/mmc/fsl_esdhc_imx.c | 33 + > 1 file changed, 1 insertion(+), 32 deletions(-) > > Reviewed-by: Minkyu Kang -- Thanks, Minkyu Kang.
[GIT PULL] Please pull u-boot-mmc master
Hi Tom, Please pull u-boot-mmc master into u-boot master branch. If there is a problem, let me know, plz. Best Regards, Jaehoon Chung CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/10571 The following changes since commit fe04d885fb540b614a2f989e16e808b300ccb52e: Merge branch 'next' (2022-01-10 14:01:57 -0500) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-mmc.git master for you to fetch changes up to a15b2e6bcf5ae605073a7db54bfb68b07f736ba4: mmc: unconditionally define mmc_deinit() (2022-01-12 09:56:40 +0900) Heinrich Schuchardt (1): mmc: unconditionally define mmc_deinit() John Keeping (1): mmc: dwmmc: return a proper error code when busy Sean Anderson (12): mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC mmc: fsl_esdhc_imx: remove redundant DM_MMC checking mmc: fsl_esdhc_imx: fix voltage validation mmc: fsl_esdhc_imx: clean up bus width configuration code mmc: fsl_esdhc_imx: drop redundant code for non-removable feature mmc: fsl_esdhc_imx: fix mmc->clock with actual clock mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfers mmc: fsl_esdhc_imx: use dma-mapping API mmc: fsl_esdhc_imx: simplify esdhc_setup_data() mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED() mmc: fsl_esdhc_imx: Replace more #ifdefs by if mmc: fsl_esdhc_imx: set sysctl register for clock initialization drivers/mmc/dw_mmc.c| 2 +- drivers/mmc/fsl_esdhc_imx.c | 635 ++-- include/fsl_esdhc_imx.h | 14 +- include/mmc.h | 5 - 4 files changed, 260 insertions(+), 396 deletions(-)
[PATCH 1/1] .readthedocs.yml: update the requirements
Fix an error: This project needs at least Sphinx v2.4.4. Signed-off-by: Heinrich Schuchardt --- .readthedocs.yml| 15 ++- doc/sphinx/requirements.txt | 6 +++--- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/.readthedocs.yml b/.readthedocs.yml index 44949ea239..7c6c25541a 100644 --- a/.readthedocs.yml +++ b/.readthedocs.yml @@ -5,6 +5,13 @@ # Required version: 2 +build: + os: "ubuntu-20.04" + apt_packages: +- python3-six + tools: +python: "3.9" + # Build documentation in the docs/ directory with Sphinx sphinx: configuration: doc/conf.py @@ -12,8 +19,6 @@ sphinx: # Optionally build your docs in additional formats such as PDF and ePub formats: [] -# Optionally set the version of Python and requirements required to build your docs -# python: -# version: 3.7 -# install: -# - requirements: docs/requirements.txt +python: + install: +- requirements: doc/sphinx/requirements.txt diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt index 4555a94d30..44c187880d 100644 --- a/doc/sphinx/requirements.txt +++ b/doc/sphinx/requirements.txt @@ -1,4 +1,4 @@ docutils==0.16 -Sphinx==3.4.3 -sphinx_rtd_theme -six +sphinx==3.4.3 +sphinx_rtd_theme==1.0.0 +six==1.16.0 -- 2.33.1
Re: [PATCH 4/4] .readthedocs.yml: Set our requirements file
On 1/12/22 01:14, Tom Rini wrote: We provide a requirements.txt file for doc building, but had not been configuring readthedocs to know where it is. Cc: Heinrich Schuchardt Signed-off-by: Tom Rini --- .readthedocs.yml | 9 - > 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/.readthedocs.yml b/.readthedocs.yml index 44949ea239d8..c6f47b3e07e9 100644 --- a/.readthedocs.yml +++ b/.readthedocs.yml @@ -12,8 +12,7 @@ sphinx: # Optionally build your docs in additional formats such as PDF and ePub formats: [] -# Optionally set the version of Python and requirements required to build your docs -# python: -# version: 3.7 -# install: -# - requirements: docs/requirements.txt +# Explicitly set the requirements file +python: + install: +- requirements: doc/sphinx/requirements.txt I could not get it running without install python3-six: # .readthedocs.yml # Read the Docs configuration file # See https://docs.readthedocs.io/en/stable/config-file/v2.html for details # Required version: 2 build: os: "ubuntu-20.04" apt_packages: - python3-six tools: python: "3.9" # Build documentation in the docs/ directory with Sphinx sphinx: configuration: doc/conf.py # Optionally build your docs in additional formats such as PDF and ePub formats: [] python: install: - requirements: doc/sphinx/requirements.txt Best regards Heinrich
Re: [PATCH v2 4/4] rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568
Hi Alper，
The Synopsys DWC MSHC for RK3568 and RK3588 need config
DWCMSHC_EMMC_CONTROL.bit0 = 1 （CARD_IS_EMMC）
to enable Data Strobe pin for HS400 and HS400ES.
reference code:
#define DWCMSHC_EMMC_CONTROL 0x52c
#define DWCMSHC_CARD_IS_EMMC BIT(0)
/* set CARD_IS_EMMC bit to enable Data Strobe for HS400 and HS400ES */
ctrl = sdhci_readw(host, DWCMSHC_EMMC_CONTROL);
ctrl |= DWCMSHC_CARD_IS_EMMC;
sdhci_writew(host, ctrl, DWCMSHC_EMMC_CONTROL);
>
On RK3568, a register bit must be set to enable Enhanced Strobe.
However, it appears that the address of this register may differ from
vendor to vendor and should be read from the underlying MMC IP.
Let the Rockchip SDHCI driver read this address and set the relevant bit
when Enhanced Strobe configuration is requested.
This is mostly ported from Linux's Synopsys DWC MSHC driver which
happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in
Linux tree).
Signed-off-by: Alper Nebi Yasak
---
Didn't add Reviewed-by tag due to changes. Only build-tested as I don't
have a RK3568 board.
Changes in v2:
- Rename rk3568_set_enhanced_strobe -> rk3568_sdhci_set_enhanced_strobe
- Let set_enhanced_strobe() unset the ES bit if mode is not HS400_ES
drivers/mmc/rockchip_sdhci.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f920c5141142..3030d746f890 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -45,6 +45,13 @@
#define ARASAN_VENDOR_REGISTER 0x78
#define ARASAN_VENDOR_ENHANCED_STROBE BIT(0)
+/* DWC IP vendor area 1 pointer */
+#define DWCMSHC_P_VENDOR_AREA1 0xe8
+#define DWCMSHC_AREA1_MASK GENMASK(11, 0)
+/* Offset inside the vendor area 1 */
+#define DWCMSHC_EMMC_CONTROL 0x2c
+#define DWCMSHC_ENHANCED_STROBE BIT(8)
+
/* Rockchip specific Registers */
#define DWCMSHC_EMMC_DLL_CTRL 0x800
#define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1)
@@ -311,6 +318,25 @@ static int rk3568_emmc_get_phy(struct udevice *dev)
return 0;
}
+static int rk3568_sdhci_set_enhanced_strobe(struct sdhci_host *host)
+{
+ struct mmc *mmc = host->mmc;
+ u32 vendor;
+ int reg;
+
+ reg = (sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK)
+ + DWCMSHC_EMMC_CONTROL;
+
+ vendor = sdhci_readl(host, reg);
+ if (mmc->selected_mode == MMC_HS_400_ES)
+ vendor |= DWCMSHC_ENHANCED_STROBE;
+ else
+ vendor &= ~DWCMSHC_ENHANCED_STROBE;
+ sdhci_writel(host, vendor, reg);
+
+ return 0;
+}
+
static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
@@ -519,6 +545,7 @@ static const struct sdhci_data rk3568_data = {
.get_phy = rk3568_emmc_get_phy,
.emmc_phy_init = rk3568_emmc_phy_init,
.set_ios_post = rk3568_sdhci_set_ios_post,
+ .set_enhanced_strobe = rk3568_sdhci_set_enhanced_strobe,
};
static const struct udevice_id sdhci_ids[] = {
--
2.34.1
Re: [PATCH 2/4] CI, Dockerfile: Update to latest "focal" tag
On Tue, Jan 11, 2022 at 10:55:08PM -0300, Fabio Estevam wrote: > On Tue, Jan 11, 2022 at 9:14 PM Tom Rini wrote: > > > > Bring us to the focial-20220105 tag and rebuild our images on top of > > s/focial/focal Whoops, thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/4] CI, Dockerfile: Update to latest "focal" tag
On Tue, Jan 11, 2022 at 9:14 PM Tom Rini wrote: > > Bring us to the focial-20220105 tag and rebuild our images on top of s/focial/focal
[PATCH 3/4] binman: Have faked binaries live in the output directory.
In general, and for Azure specifically, we need to have files created in
the output directory and cannot assume a writable source directory.
Rework the faked blob support to put the faked binary in to the output
directory and then stop the test from deleting the now non-existent
file.
Cc: Heiko Thiery
Cc: Simon Glass
Signed-off-by: Tom Rini
---
tools/binman/etype/blob.py | 4 +++-
tools/binman/ftest.py | 1 -
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/tools/binman/etype/blob.py b/tools/binman/etype/blob.py
index 65ebb2ecf4d8..ca8023b1a0b2 100644
--- a/tools/binman/etype/blob.py
+++ b/tools/binman/etype/blob.py
@@ -39,11 +39,13 @@ class Entry_blob(Entry):
def ObtainContents(self):
if self.allow_fake and not pathlib.Path(self._filename).is_file():
+self._filename = tools.GetOutputFilename(self._filename)
with open(self._filename, "wb") as out:
out.truncate(1024)
self.faked = True
+else:
+self._filename = self.GetDefaultFilename()
-self._filename = self.GetDefaultFilename()
self._pathname = tools.GetInputFilename(self._filename,
self.external and self.section.GetAllowMissing())
# Allow the file to be missing
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index a9b7880f362f..d03ce6f05f8d 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -4675,7 +4675,6 @@ class TestFunctional(unittest.TestCase):
err = stderr.getvalue()
self.assertRegex(err,
"Image '.*' has faked external blobs and is
non-functional: .*")
-os.remove('binman_faking_test_blob')
def testVersion(self):
"""Test we can get the binman version"""
--
2.25.1
[PATCH 4/4] .readthedocs.yml: Set our requirements file
We provide a requirements.txt file for doc building, but had not been configuring readthedocs to know where it is. Cc: Heinrich Schuchardt Signed-off-by: Tom Rini --- .readthedocs.yml | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/.readthedocs.yml b/.readthedocs.yml index 44949ea239d8..c6f47b3e07e9 100644 --- a/.readthedocs.yml +++ b/.readthedocs.yml @@ -12,8 +12,7 @@ sphinx: # Optionally build your docs in additional formats such as PDF and ePub formats: [] -# Optionally set the version of Python and requirements required to build your docs -# python: -# version: 3.7 -# install: -# - requirements: docs/requirements.txt +# Explicitly set the requirements file +python: + install: +- requirements: doc/sphinx/requirements.txt -- 2.25.1
[PATCH 2/4] CI, Dockerfile: Update to latest "focal" tag
Bring us to the focial-20220105 tag and rebuild our images on top of this. Signed-off-by: Tom Rini --- .azure-pipelines.yml| 2 +- .gitlab-ci.yml | 2 +- tools/docker/Dockerfile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index d97115668167..c0f72a811363 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -2,7 +2,7 @@ variables: windows_vm: windows-2019 ubuntu_vm: ubuntu-18.04 macos_vm: macOS-10.15 - ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20211006-14Nov2021 + ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20220105-10Jan2022 # Add '-u 0' options for Azure pipelines, otherwise we get "permission # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", # since our $(ci_runner_image) user is not root. diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index d06cca45fd04..4c44c01e7bf5 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,7 +2,7 @@ # Grab our configured image. The source for this is found at: # https://source.denx.de/u-boot/gitlab-ci-runner -image: trini/u-boot-gitlab-ci-runner:focal-20211006-14Nov2021 +image: trini/u-boot-gitlab-ci-runner:focal-20220105-10Jan2022 # We run some tests in different order, to catch some failures quicker. stages: diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile index fb422e758813..f19e618ffba3 100644 --- a/tools/docker/Dockerfile +++ b/tools/docker/Dockerfile @@ -2,7 +2,7 @@ # This Dockerfile is used to build an image containing basic stuff to be used # to build U-Boot and run our test suites. -FROM ubuntu:focal-20211006 +FROM ubuntu:focal-20220105 MAINTAINER Tom Rini LABEL Description=" This image is for building U-Boot inside a container" -- 2.25.1
[PATCH 1/4] ci: azure: Update to use stages
Follow what we do in GitLab CI where we break the jobs up in to stages such that if earlier and often quicker sanity tests fail we don't run everything else. Signed-off-by: Tom Rini --- .azure-pipelines.yml | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 670bbc0e1636..d97115668167 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -9,7 +9,9 @@ variables: container_option: -u 0 work_dir: /u -jobs: +stages: +- stage: testsuites + jobs: - job: tools_only_windows displayName: 'Ensure host tools build for Windows' pool: @@ -199,6 +201,8 @@ jobs: export PATH=/opt/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin:$PATH test/nokia_rx51_test.sh +- stage: test_py + jobs: - job: test_py displayName: 'test.py' pool: @@ -381,6 +385,8 @@ jobs: # Some tests using libguestfs-tools need the fuse device to run docker run "$@" --device /dev/fuse:/dev/fuse -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/test.sh +- stage: world_build + jobs: - job: build_the_world displayName: 'Build the World' pool: -- 2.25.1
Re: [PATCH] mmc: dwmmc: return a proper error code when busy
Hi John, On 1/12/22 7:12 AM, Jaehoon Chung wrote: > Hi John, > > On 1/12/22 1:15 AM, John Keeping wrote: >> When failing to send a command because the hardware is busy, return >> EBUSY to indicate the cause instead of just -1. Is this patch same? https://patchwork.ozlabs.org/project/uboot/patch/20211207160935.404395-1-j...@metanate.com/ >> >> Signed-off-by: John Keeping > > Reviewed-by: Jaehoon Chung > > Best Regards, > Jaehoon Chung > >> --- >> drivers/mmc/dw_mmc.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c >> index a949dad574..4232c5eb8c 100644 >> --- a/drivers/mmc/dw_mmc.c >> +++ b/drivers/mmc/dw_mmc.c >> @@ -301,7 +301,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct >> mmc_cmd *cmd, >> flags = dwmci_set_transfer_mode(host, data); >> >> if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY)) >> -return -1; >> +return -EBUSY; >> >> if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) >> flags |= DWMCI_CMD_ABORT_STOP; >> > >
Re: IMX8MM SD UHS support
On Mon, Jan 25, 2021 at 4:43 AM Bough Chen wrote:
>
> Hi Tim and Andrey,
>
> I find the root cause, it is because during the 1.8v voltage switch process,
> SD clock do not gate off/ on according to the SD spec.
> For i.MX usdhc, if want to gate off the sd card clock, need to clear the bit
> 8 of VEND_SPEC, and set this bit to gate on the sd card clock.
> For the bit[14:11] of VEND_SPEC, our IP do not implement the function, just
> mark as reserved bits.
> So for current logic, we'll see the second mmc_wait_dat0() in
> mmc_switch_voltage() always return timeout.
>
> Let me double confirm with our IC team, and will send a formal fix patch
> tomorrow.
Haibo,
Sorry to resurrect an old thread, but it's been almost a year since we
last discussed this, and from what I can tell, the MMC switching to
SDR104 is still broken.
I was hoping you might have a suggestion as to how to move forward.
>
>
> Haibo
>
> > -Original Message-
> > From: Bough Chen
> > Sent: 2021年1月22日 20:42
> > To: 'ZHIZHIKIN Andrey' ;
> > thar...@gateworks.com
> > Cc: Adam Ford ; Fabio Estevam
> > ; Peng Fan ; u-boot
> > ; Stefano Babic ; Jaehoon Chung
> >
> > Subject: RE: IMX8MM SD UHS support
> >
> > Hi Tim and Andrey
> >
> > I can reproduce this issue on my side, after revert my patch which you
> > point out,
> > SD can work on SDR104 mode.
> > Till now, I do not know why wait for data0 status will cause this issue.
> > Give me
> > more time, I will try to dig that out.
> >
> > Again, thanks for report this issue.
> >
> > Haibo
> >
> > > -Original Message-
> > > From: ZHIZHIKIN Andrey [mailto:andrey.zhizhi...@leica-geosystems.com]
> > > Sent: 2021年1月20日 4:48
> > > To: thar...@gateworks.com
> > > Cc: Bough Chen ; Adam Ford
> > ;
> > > Fabio Estevam ; Peng Fan ;
> > > u-boot ; Stefano Babic ; Jaehoon
> > > Chung
> > > Subject: RE: IMX8MM SD UHS support
> > >
> > > Hello Tim,
> > >
> > > > -Original Message-
> > > > From: Tim Harvey
> > > > Sent: Tuesday, January 19, 2021 6:32 PM
> > > > To: ZHIZHIKIN Andrey
> > > > Cc: haibo.c...@nxp.com; Adam Ford ; Fabio
> > > Estevam
> > > > ; Peng Fan ; u-boot > > > b...@lists.denx.de>; Stefano Babic ; Jaehoon Chung
> > > >
> > > > Subject: Re: IMX8MM SD UHS support
> > > >
> > > > On Mon, Jan 18, 2021 at 11:38 AM ZHIZHIKIN Andrey
> > > > wrote:
> > > > >
> > > > > Hello Tim,
> > > > >
> > > > > Sorry it took me quite some time to get this sorted out, but I
> > > > > believe I was able
> > > > to identify an offending commit that is preventing the USDHC to
> > > > switch to higher speed modes.
> > > > >
> > > > > It is in fact b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0()
> > > > > support"),
> > > > reverting it makes SD Card to properly report capabilities and
> > > > switch to high speed modes.
> > > > >
> > > > > Can you try to revert this on your end to see if the SD Card would
> > > > > start to
> > > > operate in high speed mode?
> > > > >
> > > > > I'm still investigating why this addition of wait_dat0() caused
> > > > > this, I believe this
> > > > is due to the fact that the same wait is already performed while
> > > > voltage switch to handle the errata, thus this addition wait might
> > > erroneously timeout.
> > > > >
> > > > > ++ Haibo Chen
> > > > >
> > > > > Haibo,
> > > > >
> > > > > Can you please explain the purpose of adding wait_dat0()
> > > > > Introduced with
> > > > commit b5874b552f? It is not clear from the commit message what was
> > > > the purpose of adding it. Have you tested the USDHC switch to higher
> > > > modes with this change?
> > > >
> > > > Andrey,
> > > >
> > > > Reverting b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0() support")
> > > > does not resolve the issue. That function waits for a specified
> > > > timeout for the card to assert DAT[0] either high or low depending
> > > > on arg and is used to check for command busy or failure. The patch
> > > > in question adds that function so that the common mmc code can
> > > > utilize it. If the function does not exist in the host controller
> > > > driver any call to mmc_wait_dat0 returns -ENOSYS so it must be there
> > > > to support UHS anyway.
> > >
> > > Perhaps, this is due to the fact that the same wait cycle is already
> > > executed during the invocation of mmc_send_cmd above the
> > > mmc_wait_dat0() in drivers/mmc/mmc.c.
> > >
> > > mmc_send_cmd calls esdhc_send_cmd_common in
> > > drivers/mmc/fsl_esdhc_imx.c, which already has a wait loop implemented
> > > to cover the "Workaround for ESDHC errata ENGcm03648"
> > > (as seen from the comment), which might explain why consecutive wait
> > > fails to return within timeout value.
> > >
> > > >
> > > > What is not clear to me is why the card would hold DAT[0] low on the
> > > > voltage switch indicating a failure as it does not in the Linux
> > > > driver which appears to me to be doing the same thing.
> > >
> > > This behavior might be explained by the implementation I traced above.
> > >
> > > > Again, if we ignore
[RESEND PATCH v3 01/12] mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC
From: Sean Anderson
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.
- Drop non-BLK support for DM_MMC introduced by below patch.
66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).
- Use DM_MMC instead of BLK for conditional compile.
Signed-off-by: Yangbo Lu
Signed-off-by: Sean Anderson
Signed-off-by: Jaehoon Chung
---
drivers/mmc/fsl_esdhc_imx.c | 33 +
1 file changed, 1 insertion(+), 32 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 4c06361beefd..85cd72a79698 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -39,10 +39,6 @@
#include
#include
-#if !CONFIG_IS_ENABLED(BLK)
-#include "mmc_private.h"
-#endif
-
#ifndef ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
#ifdef CONFIG_FSL_USDHC
#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1
@@ -58,7 +54,6 @@ DECLARE_GLOBAL_DATA_PTR;
IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR
| \
IRQSTATEN_DINT)
#define MAX_TUNING_LOOP 40
-#define ESDHC_DRIVER_STAGE_VALUE 0x
struct fsl_esdhc {
uintdsaddr; /* SDMA system address register */
@@ -157,7 +152,7 @@ struct fsl_esdhc_priv {
unsigned int clock;
unsigned int mode;
unsigned int bus_width;
-#if !CONFIG_IS_ENABLED(BLK)
+#if !CONFIG_IS_ENABLED(DM_MMC)
struct mmc *mmc;
#endif
struct udevice *dev;
@@ -1510,9 +1505,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
struct esdhc_soc_data *data =
(struct esdhc_soc_data *)dev_get_driver_data(dev);
struct mmc *mmc;
-#if !CONFIG_IS_ENABLED(BLK)
- struct blk_desc *bdesc;
-#endif
int ret;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1611,25 +1603,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
mmc = &plat->mmc;
mmc->cfg = &plat->cfg;
mmc->dev = dev;
-#if !CONFIG_IS_ENABLED(BLK)
- mmc->priv = priv;
-
- /* Setup dsr related values */
- mmc->dsr_imp = 0;
- mmc->dsr = ESDHC_DRIVER_STAGE_VALUE;
- /* Setup the universal parts of the block interface just once */
- bdesc = mmc_get_blk_desc(mmc);
- bdesc->if_type = IF_TYPE_MMC;
- bdesc->removable = 1;
- bdesc->devnum = mmc_get_next_devnum();
- bdesc->block_read = mmc_bread;
- bdesc->block_write = mmc_bwrite;
- bdesc->block_erase = mmc_berase;
-
- /* setup initial part type */
- bdesc->part_type = mmc->cfg->part_type;
- mmc_list_add(mmc);
-#endif
upriv->mmc = mmc;
@@ -1740,14 +1713,12 @@ static const struct udevice_id fsl_esdhc_ids[] = {
{ /* sentinel */ }
};
-#if CONFIG_IS_ENABLED(BLK)
static int fsl_esdhc_bind(struct udevice *dev)
{
struct fsl_esdhc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
-#endif
U_BOOT_DRIVER(fsl_esdhc) = {
.name = "fsl_esdhc",
@@ -1755,9 +1726,7 @@ U_BOOT_DRIVER(fsl_esdhc) = {
.of_match = fsl_esdhc_ids,
.of_to_plat = fsl_esdhc_of_to_plat,
.ops= &fsl_esdhc_ops,
-#if CONFIG_IS_ENABLED(BLK)
.bind = fsl_esdhc_bind,
-#endif
.probe = fsl_esdhc_probe,
.plat_auto = sizeof(struct fsl_esdhc_plat),
.priv_auto = sizeof(struct fsl_esdhc_priv),
--
2.29.0
Re: [PATCH v2 2/2] doc: board: avoid ambiguous names for axy17lte
On 1/12/22 3:06 AM, Henrik Grimler wrote:
> Model names are SM-A{3,5,7}20, just SM-{3,5,7}20 could also refer to
> SM-J{3,5,7}20 or SM-T{3,5,7}20.
>
> Also fix a5y17lte->a7y17lte for SM-A720.
>
> Fixes: 3e2095e960b4 ("board: samsung: add support for Galaxy A series
> of 2017 (a5y17lte)")
> Signed-off-by: Henrik Grimler
> Reviewed-by: Dzmitry Sankouski
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> Changes since v1: fix a5y17lte->a7y17lte, pointed out by Dzmitry, and
> add reviewed-by tag.
> ---
> doc/board/samsung/axy17lte.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/doc/board/samsung/axy17lte.rst b/doc/board/samsung/axy17lte.rst
> index 511cd57a22f5..b13a19af8a35 100644
> --- a/doc/board/samsung/axy17lte.rst
> +++ b/doc/board/samsung/axy17lte.rst
> @@ -14,7 +14,7 @@ It is loaded as an Android boot image through SBOOT.
>
> Phone specs
> ---
> -A3 (SM-320) (a3y17lte)
> +A3 (SM-A320) (a3y17lte)
> ^^
> - 4.7 AMOLED display
> - Exynos 7870 SoC
> @@ -23,7 +23,7 @@ A3 (SM-320) (a3y17lte)
>
> .. A3 2017 wiki page: https://en.wikipedia.org/wiki/Samsung_Galaxy_A3_(2017)
>
> -A5 (SM-520) (a5y17lte)
> +A5 (SM-A520) (a5y17lte)
> ^^
> - 5.2 AMOLED display
> - Exynos 7880 SoC
> @@ -32,7 +32,7 @@ A5 (SM-520) (a5y17lte)
>
> .. A5 2017 wiki page: https://en.wikipedia.org/wiki/Samsung_Galaxy_A5_(2017)
>
> -A7 (SM-720) (a5y17lte)
> +A7 (SM-A720) (a7y17lte)
> ^^
> - 5.7 AMOLED display
> - Exynos 7880 SoC
>
Re: [PATCH v2 1/2] board: samsung: fix menu entries for a{3,7}y17lte
On 1/12/22 3:06 AM, Henrik Grimler wrote:
> a7y17lte is called SM-A720F, and a3y17lte SM-A320F. a3y17lte also
> should select PINCTRL_EXYNOS78x0, not the (non-existent)
> PINCTRL_EXYNOS7880, and it has an Exynos 7870 SoC and not 7880.
>
> Fixes: 3e2095e960b4 ("board: samsung: add support for Galaxy A series
> of 2017 (a5y17lte)")
> Signed-off-by: Henrik Grimler
> Reviewed-by: Dzmitry Sankouski
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> Changes since v1: none, added Dzmitry's reviewed-by tag.
> ---
> arch/arm/mach-exynos/Kconfig | 6 +++---
> board/samsung/axy17lte/Kconfig | 4 ++--
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index 7f3aee571290..32b81728c389 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -161,7 +161,7 @@ config TARGET_A5Y17LTE
> select SUPPORT_SPL
>
> config TARGET_A7Y17LTE
> - bool "Samsung SM-A520F board"
> + bool "Samsung SM-A720F board"
> select ARM64
> select CLK_EXYNOS
> select OF_CONTROL
> @@ -170,12 +170,12 @@ config TARGET_A7Y17LTE
> select SUPPORT_SPL
>
> config TARGET_A3Y17LTE
> - bool "Samsung SM-A520F board"
> + bool "Samsung SM-A320F board"
> select ARM64
> select CLK_EXYNOS
> select OF_CONTROL
> select PINCTRL
> - select PINCTRL_EXYNOS7880
> + select PINCTRL_EXYNOS78x0
> select SUPPORT_SPL
>
> endchoice
> diff --git a/board/samsung/axy17lte/Kconfig b/board/samsung/axy17lte/Kconfig
> index 2abf8e7acfca..a018547ff5d4 100644
> --- a/board/samsung/axy17lte/Kconfig
> +++ b/board/samsung/axy17lte/Kconfig
> @@ -27,7 +27,7 @@ if TARGET_A7Y17LTE
> config SYS_BOARD
> default "axy17lte"
> help
> - a5y17lte is a production board for SM-A520F phone on Exynos7880 SoC.
> + a7y17lte is a production board for SM-A720F phone on Exynos7880 SoC.
>
> config SYS_VENDOR
> default "samsung"
> @@ -44,7 +44,7 @@ if TARGET_A3Y17LTE
> config SYS_BOARD
> default "axy17lte"
> help
> - a3y17lte is a production board for SM-A520F phone on Exynos7880 SoC.
> + a3y17lte is a production board for SM-A320F phone on Exynos7870 SoC.
>
> config SYS_VENDOR
> default "samsung"
>
> base-commit: a14af7216a220fe8f1b2a5308ed632abe6f9f97f
>
Re: [PATCH] mmc: dw_mmc: Fixes timeout issue for FIFO mode
On 1/11/22 8:05 PM, gtXfined H. wrote:
> Hi,
>
>> Which board did you test? When you do power-on, is it reproduced every
> time?
>
> I am using Rockchip RK3399 based board - NanoPi R4S for this test.
> It doesn't appear every time, but it should be encountered once about 20
> times.
> I have run "setenv bootcmd reset; saveenv; reset" for automated testing.
This patch doesn't clarify.
The below commit had been fixed that doesn't work when data read.
"mmc: dw_mmc: Fixes data read when receiving DTO interrupt in FIFO mode"
It seems that not clearing during reset card.
(power glitch or other problem..?)
Best Regards,
Jaehoon Chung
>
>
>> Could you change from your ID to your name?
>
> This is my first time sending a patch, sorry I didn't notice this, do I
> need to resend this patch?
>
>
> BR,
> Jensen, Huang
>
>
> On Tue, Jan 11, 2022 at 6:38 PM Jaehoon Chung
> wrote:
>
>> Hi,
>>
>> On 1/11/22 7:24 PM, hmz007 wrote:
>>> Clearing the DTO interrupt should be unnecessary, and it would
>>> potentially result in never receiving this interrupt again.
>>>
>>> Do power-on or reset from uboot for a while can reproduce the issue:
>>> dwmci_data_transfer: Timeout waiting for data!
>>> mmc_load_image_raw_sector: mmc block read error
>>
>> Which board did you test? When you do power-on, is it reproduced every
>> time?
>>
>>>
>>> Tested on NanoPi R4S with SanDisk Extreme PRO 32GB.
>>>
>>> Fixes: 8cb9d3ed3a ("mmc: dw_mmc: Fixes data read when receiving DTO
>> interrupt in FIFO mode")
>>> Signed-off-by: hmz007
>>
>> Could you change from your ID to your name?
>>
>> Best Regards,
>> Jaehoon Chung
>>
>>> ---
>>> drivers/mmc/dw_mmc.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
>>> index a949dad574..8fa26b340b 100644
>>> --- a/drivers/mmc/dw_mmc.c
>>> +++ b/drivers/mmc/dw_mmc.c
>>> @@ -168,7 +168,7 @@ static int dwmci_data_transfer(struct dwmci_host
>> *host, struct mmc_data *data)
>>> if (data->flags == MMC_DATA_READ &&
>>> (mask & (DWMCI_INTMSK_RXDR |
>> DWMCI_INTMSK_DTO))) {
>>> dwmci_writel(host, DWMCI_RINTSTS,
>>> - DWMCI_INTMSK_RXDR |
>> DWMCI_INTMSK_DTO);
>>> + DWMCI_INTMSK_RXDR);
>>> while (size) {
>>> ret = dwmci_fifo_ready(host,
>>> DWMCI_FIFO_EMPTY,
>>>
>>
>>
>
Re: [PATCH] mmc: dwmmc: return a proper error code when busy
Hi John, On 1/12/22 1:15 AM, John Keeping wrote: > When failing to send a command because the hardware is busy, return > EBUSY to indicate the cause instead of just -1. > > Signed-off-by: John Keeping Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > drivers/mmc/dw_mmc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c > index a949dad574..4232c5eb8c 100644 > --- a/drivers/mmc/dw_mmc.c > +++ b/drivers/mmc/dw_mmc.c > @@ -301,7 +301,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd > *cmd, > flags = dwmci_set_transfer_mode(host, data); > > if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY)) > - return -1; > + return -EBUSY; > > if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) > flags |= DWMCI_CMD_ABORT_STOP; >
[PATCH v7 18/19] rockchip: tools: add rk3066 support to rkcommon.c
Add rk3066 support to rkcommon.c
Signed-off-by: Johan Jonker
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 29f2676c..860785f8 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -123,6 +123,7 @@ struct spl_info {
static struct spl_info spl_infos[] = {
{ "px30", "RK33", 0x2800, false, RK_HEADER_V1 },
{ "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 },
+ { "rk3066", "RK30", 0x8000 - 0x800, true, RK_HEADER_V1 },
{ "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 },
{ "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1 },
{ "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
--
2.20.1
[PATCH v7 06/19] rockchip: clk: add SCLK_UART[0..3] to clk_rk3066.c
Add SCLK_UART[0..3] to clk_rk3066.c in use by the ns16550.c driver. Signed-off-by: Johan Jonker --- drivers/clk/rockchip/clk_rk3066.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c index 2fc4d5c9..804aa43b 100644 --- a/drivers/clk/rockchip/clk_rk3066.c +++ b/drivers/clk/rockchip/clk_rk3066.c @@ -530,6 +530,10 @@ static ulong rk3066_clk_get_rate(struct clk *clk) case SCLK_TIMER0: case SCLK_TIMER1: case SCLK_TIMER2: + case SCLK_UART0: + case SCLK_UART1: + case SCLK_UART2: + case SCLK_UART3: return OSC_HZ; default: return -ENOENT; -- 2.20.1
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On 1/11/22 22:14, Tom Rini wrote: The issues are: - How do we handle non-kwbimage platforms? Especially since the general expectation is that mkimage will work for pretty much anything. And not all distros / distro builders (OE) use tools-only_defconfig to configure their build of mkimage. The TOOLS_LIBCRYPTO is default y, I would keep it that way. If someone really needs to build without openssl, they can turn this to =n if they understand the implications. - How do we handle the case of kwbimage platforms on hosts that don't have openssl-dev? This I think should be a build time error. Failing to build over missing ssl headers should be a fairly easy to diagnose problem, and also should be documented as appropriate under doc/board/ mkimage -T kwbimage would fail if you don't have kwbimage built in (i.e. with TOOLS_LIBCRYPTO=n), so that's already handled. [...]
[PATCH v7 19/19] doc: rockchip: add rk3066 Rikomagic MK808
Add rk3066 Rikomagic MK808 to the list of mainline supported Rockchip boards. Signed-off-by: Johan Jonker --- doc/board/rockchip/rockchip.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 144cb98e..a4fca88b 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -24,6 +24,8 @@ List of mainline supported Rockchip boards: * rk3036 - Rockchip Evb-RK3036 (evb-rk3036) - Kylin (kylin_rk3036) +* rk3066 + - Rikomagic MK808 (mk808) * rk3128 - Rockchip Evb-RK3128 (evb-rk3128) * rk3188 -- 2.20.1
[PATCH v7 16/19] rockchip: rk3066: add Rikomagic MK808 board
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port, HDMI and a micro-SD card slot. It also includes on-board NAND and 1GB of SDRAM. Signed-off-by: Johan Jonker --- arch/arm/mach-rockchip/rk3066/Kconfig | 9 + board/rikomagic/mk808/Kconfig | 15 +++ board/rikomagic/mk808/MAINTAINERS | 6 ++ board/rikomagic/mk808/Makefile| 3 +++ board/rikomagic/mk808/mk808.c | 3 +++ 5 files changed, 36 insertions(+) create mode 100644 board/rikomagic/mk808/Kconfig create mode 100644 board/rikomagic/mk808/MAINTAINERS create mode 100644 board/rikomagic/mk808/Makefile create mode 100644 board/rikomagic/mk808/mk808.c diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig index 335f49bc..95d7fc8a 100644 --- a/arch/arm/mach-rockchip/rk3066/Kconfig +++ b/arch/arm/mach-rockchip/rk3066/Kconfig @@ -1,5 +1,12 @@ if ROCKCHIP_RK3066 +config TARGET_MK808 + bool "MK808" + help + MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port, + HDMI and a micro-SD card slot. It also includes on-board NAND + and 1GB of SDRAM. + config ROCKCHIP_BOOT_MODE_REG default 0x20004040 @@ -27,4 +34,6 @@ config TPL_LIBGENERIC_SUPPORT config TPL_SERIAL default y +source "board/rikomagic/mk808/Kconfig" + endif diff --git a/board/rikomagic/mk808/Kconfig b/board/rikomagic/mk808/Kconfig new file mode 100644 index ..4abad7e7 --- /dev/null +++ b/board/rikomagic/mk808/Kconfig @@ -0,0 +1,15 @@ +if TARGET_MK808 + +config SYS_BOARD + default "mk808" + +config SYS_VENDOR + default "rikomagic" + +config SYS_CONFIG_NAME + default "mk808" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/rikomagic/mk808/MAINTAINERS b/board/rikomagic/mk808/MAINTAINERS new file mode 100644 index ..b3ef6adb --- /dev/null +++ b/board/rikomagic/mk808/MAINTAINERS @@ -0,0 +1,6 @@ +MK808 +M: Johan Jonker +S: Maintained +F: board/rikomagic/mk808 +F: configs/mk808_defconfig +F: include/configs/mk808.h diff --git a/board/rikomagic/mk808/Makefile b/board/rikomagic/mk808/Makefile new file mode 100644 index ..a4d16884 --- /dev/null +++ b/board/rikomagic/mk808/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += mk808.o diff --git a/board/rikomagic/mk808/mk808.c b/board/rikomagic/mk808/mk808.c new file mode 100644 index ..e0bfc6f3 --- /dev/null +++ b/board/rikomagic/mk808/mk808.c @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include -- 2.20.1
[PATCH v7 15/19] rockchip: rk3066: add core support
Add the core architecture code for the rk3066.
Signed-off-by: Johan Jonker
---
arch/arm/mach-rockchip/Kconfig| 23
arch/arm/mach-rockchip/Makefile | 1 +
arch/arm/mach-rockchip/rk3066/Kconfig | 30 ++
arch/arm/mach-rockchip/rk3066/Makefile| 5 ++
arch/arm/mach-rockchip/rk3066/clk_rk3066.c| 33 +++
arch/arm/mach-rockchip/rk3066/rk3066.c| 49 +
arch/arm/mach-rockchip/rk3066/syscon_rk3066.c | 55 +++
7 files changed, 196 insertions(+)
create mode 100644 arch/arm/mach-rockchip/rk3066/Kconfig
create mode 100644 arch/arm/mach-rockchip/rk3066/Makefile
create mode 100644 arch/arm/mach-rockchip/rk3066/clk_rk3066.c
create mode 100644 arch/arm/mach-rockchip/rk3066/rk3066.c
create mode 100644 arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index a3733e2f..6535d8dd 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -36,6 +36,28 @@ config ROCKCHIP_RK3036
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+config ROCKCHIP_RK3066
+ bool "Support Rockchip RK3066"
+ select CPU_V7A
+ select SPL_BOARD_INIT if SPL
+ select SUPPORT_SPL
+ select SUPPORT_TPL
+ select SPL
+ select TPL
+ select TPL_ROCKCHIP_BACK_TO_BROM
+ select TPL_ROCKCHIP_EARLYRETURN_TO_BROM
+ imply ROCKCHIP_COMMON_BOARD
+ imply SPL_ROCKCHIP_COMMON_BOARD
+ imply SPL_SERIAL
+ imply TPL_ROCKCHIP_COMMON_BOARD
+ imply TPL_SERIAL
+ help
+ The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
+ including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
+ video interfaces, several memory options and video codec support.
+ Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
+ UART, SPI, I2C and PWMs.
+
config ROCKCHIP_RK3128
bool "Support Rockchip RK3128"
select CPU_V7A
@@ -420,6 +442,7 @@ config ROCKCHIP_SPI_IMAGE
source "arch/arm/mach-rockchip/px30/Kconfig"
source "arch/arm/mach-rockchip/rk3036/Kconfig"
+source "arch/arm/mach-rockchip/rk3066/Kconfig"
source "arch/arm/mach-rockchip/rk3128/Kconfig"
source "arch/arm/mach-rockchip/rk3188/Kconfig"
source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 00aef0ec..6c1c7b8a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram.o
obj-$(CONFIG_ROCKCHIP_PX30) += px30/
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x/
diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig
b/arch/arm/mach-rockchip/rk3066/Kconfig
new file mode 100644
index ..335f49bc
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/Kconfig
@@ -0,0 +1,30 @@
+if ROCKCHIP_RK3066
+
+config ROCKCHIP_BOOT_MODE_REG
+ default 0x20004040
+
+config SYS_SOC
+ default "rk3066"
+
+config SYS_MALLOC_F_LEN
+ default 0x0800
+
+config SPL_LIBCOMMON_SUPPORT
+ default y
+
+config SPL_LIBGENERIC_SUPPORT
+ default y
+
+config SPL_SERIAL
+ default y
+
+config TPL_LIBCOMMON_SUPPORT
+ default y
+
+config TPL_LIBGENERIC_SUPPORT
+ default y
+
+config TPL_SERIAL
+ default y
+
+endif
diff --git a/arch/arm/mach-rockchip/rk3066/Makefile
b/arch/arm/mach-rockchip/rk3066/Makefile
new file mode 100644
index ..9e2a9d4b
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += clk_rk3066.o
+obj-y += rk3066.o
+obj-y += syscon_rk3066.o
diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
new file mode 100644
index ..c47526dc
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2015 Google, Inc
+ * Written by Simon Glass
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int rockchip_get_clk(struct udevice **devp)
+{
+ return uclass_get_device_by_driver(UCLASS_CLK,
+ DM_DRIVER_GET(rockchip_rk3066a_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+ struct rk3066_clk_priv *priv;
+ struct udevice *dev;
+ int ret;
+
+ ret = rockchip_get_clk(&dev);
+ if (ret)
+ return ERR_PTR(ret);
+
+ priv = dev_get_priv(dev);
+
+ return priv->cru;
+}
diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c
b/arch/arm/mach-rockchip/rk3066/rk3066.c
new file mode 100644
index ..78c7d894
--- /dev/null
+++ b/arch/arm/mach-rock
[PATCH v7 17/19] rockchip: rk3066: add mk808_defconfig
This commit adds the default configuration file and relevant description for a MK808 board. Signed-off-by: Johan Jonker --- configs/mk808_defconfig | 101 1 file changed, 101 insertions(+) create mode 100644 configs/mk808_defconfig diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig new file mode 100644 index ..296f0bba --- /dev/null +++ b/configs/mk808_defconfig @@ -0,0 +1,101 @@ +CONFIG_ARM=y +# CONFIG_SPL_SYS_THUMB_BUILD is not set +# CONFIG_TPL_SYS_THUMB_BUILD is not set +# CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_SPL_USE_ARCH_MEMSET is not set +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x60408000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808" +CONFIG_SPL_TEXT_BASE=0x6000 +CONFIG_ROCKCHIP_RK3066=y +CONFIG_TPL_TEXT_BASE=0x10080C04 +CONFIG_TPL_MAX_SIZE=32764 +CONFIG_TPL_STACK=0x1008 +CONFIG_TARGET_MK808=y +CONFIG_SPL_STACK_R_ADDR=0x7000 +CONFIG_DEBUG_UART_BASE=0x20064000 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_PAYLOAD="u-boot.bin" +CONFIG_DEBUG_UART=y +CONFIG_SYS_LOAD_ADDR=0x70800800 +CONFIG_SD_BOOT=y +CONFIG_USE_PREBOOT=y +CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb" +CONFIG_LOGLEVEL=8 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20 +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_FS_EXT4=y +CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2 +CONFIG_TPL_NEEDS_SEPARATE_TEXT_BASE=y +CONFIG_TPL_NEEDS_SEPARATE_STACK=y +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_DTB_PROPS_REMOVE=y +CONFIG_SPL_OF_PLATDATA=y +CONFIG_TPL_OF_PLATDATA=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set +CONFIG_TPL_DM=y +# CONFIG_DM_WARN is not set +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y +# CONFIG_SIMPLE_BUS is not set +# CONFIG_SPL_SIMPLE_BUS is not set +# CONFIG_TPL_BLK is not set +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_TPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +# CONFIG_SPL_DM_I2C is not set +CONFIG_LED=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=2000 +CONFIG_PINCTRL=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_DM_RESET=y +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ROCKCHIP_SERIAL=y +CONFIG_SYSRESET=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_TPL_TIMER=y +CONFIG_DESIGNWARE_APB_TIMER=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y +# CONFIG_TPL_OF_LIBFDT is not set -- 2.20.1
[PATCH v7 14/19] rockchip: rk3066: add rk3066_common.h include
Add rk3066_common.h include. Signed-off-by: Johan Jonker --- include/configs/mk808.h | 9 ++ include/configs/rk3066_common.h | 56 + 2 files changed, 65 insertions(+) create mode 100644 include/configs/mk808.h create mode 100644 include/configs/rk3066_common.h diff --git a/include/configs/mk808.h b/include/configs/mk808.h new file mode 100644 index ..e2ab2b51 --- /dev/null +++ b/include/configs/mk808.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include + +#endif diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h new file mode 100644 index ..b8dc0242 --- /dev/null +++ b/include/configs/rk3066_common.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2015 Google, Inc + */ + +#ifndef __CONFIG_RK3066_COMMON_H +#define __CONFIG_RK3066_COMMON_H + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#include +#include "rockchip-common.h" + +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY +#define CONFIG_SYS_CBSIZE 256 + +#define CONFIG_SYS_INIT_SP_ADDR0x7800 + +#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x1 - 0xC00) + +#define CONFIG_IRAM_BASE 0x1008 + +/* spl size max 200k */ +#define CONFIG_SPL_MAX_SIZE0x32000 + +#define CONFIG_SPL_STACK 0x1008 + +#define CONFIG_SYS_SDRAM_BASE 0x6000 +#define CONFIG_NR_DRAM_BANKS 1 +#define SDRAM_BANK_SIZE(1024UL << 20UL) +#define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE + +#ifndef CONFIG_SPL_BUILD +/* usb otg */ + +/* usb host support */ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x6000\0" \ + "pxefile_addr_r=0x6010\0" \ + "fdt_addr_r=0x61f0\0" \ + "kernel_addr_r=0x6200\0" \ + "ramdisk_addr_r=0x6400\0" + +#include + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x6fff\0" \ + "initrd_high=0x6fff\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ + BOOTENV + +#endif /* CONFIG_SPL_BUILD */ + +#endif -- 2.20.1
[PATCH v7 13/19] rockchip: rk3066: add include
Add include for rk3066. Signed-off-by: Johan Jonker --- arch/arm/include/asm/arch-rk3066/boot0.h | 8 arch/arm/include/asm/arch-rk3066/gpio.h | 8 arch/arm/include/asm/arch-rk3066/timer.h | 6 ++ 3 files changed, 22 insertions(+) create mode 100644 arch/arm/include/asm/arch-rk3066/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3066/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3066/timer.h diff --git a/arch/arm/include/asm/arch-rk3066/boot0.h b/arch/arm/include/asm/arch-rk3066/boot0.h new file mode 100644 index ..28c0fb9a --- /dev/null +++ b/arch/arm/include/asm/arch-rk3066/boot0.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __ASM_ARCH_BOOT0_H__ +#define __ASM_ARCH_BOOT0_H__ + +#include + +#endif diff --git a/arch/arm/include/asm/arch-rk3066/gpio.h b/arch/arm/include/asm/arch-rk3066/gpio.h new file mode 100644 index ..a4a3b328 --- /dev/null +++ b/arch/arm/include/asm/arch-rk3066/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __ASM_ARCH_GPIO_H__ +#define __ASM_ARCH_GPIO_H__ + +#include + +#endif diff --git a/arch/arm/include/asm/arch-rk3066/timer.h b/arch/arm/include/asm/arch-rk3066/timer.h new file mode 100644 index ..3bb39428 --- /dev/null +++ b/arch/arm/include/asm/arch-rk3066/timer.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __ASM_ARCH_TIMER_H__ +#define __ASM_ARCH_TIMER_H__ + +#endif -- 2.20.1
[PATCH v7 09/19] rockchip: rk3066: add sdram driver
From: Paweł Jarosz
Add rockchip rk3066 sdram driver
Signed-off-by: Paweł Jarosz
Signed-off-by: Johan Jonker
---
Changed V7:
restyle
rename TEST_PATTERN
changed function prefix
changed #if where possible
restyle U_BOOT_DRIVER structure
remove rk3066_dmc_of_to_plat because dmc DT data
only used in TPL in combination with OF_PLATDATA
---
drivers/ram/rockchip/Makefile | 1 +
drivers/ram/rockchip/sdram_rk3066.c | 892
2 files changed, 893 insertions(+)
create mode 100644 drivers/ram/rockchip/sdram_rk3066.c
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index ca1c289b..6d530c29 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK3066) = sdram_rk3066.o
obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rk3066.c
b/drivers/ram/rockchip/sdram_rk3066.c
new file mode 100644
index ..832154ee
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3066.c
@@ -0,0 +1,892 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Copyright 2014 Rockchip Inc.
+ *
+ * Adapted from the very similar rk3188 ddr init.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct rk3066_dmc_chan_info {
+ struct rk3288_ddr_pctl *pctl;
+ struct rk3288_ddr_publ *publ;
+ struct rk3188_msch *msch;
+};
+
+struct rk3066_dmc_dram_info {
+ struct rk3066_dmc_chan_info chan[1];
+ struct ram_info info;
+ struct clk ddr_clk;
+ struct rk3066_cru *cru;
+ struct rk3066_grf *grf;
+ struct rk3066_sgrf *sgrf;
+ struct rk3188_pmu *pmu;
+};
+
+struct rk3066_dmc_sdram_params {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_rockchip_rk3066_dmc of_plat;
+#endif
+ struct rk3288_sdram_channel ch[2];
+ struct rk3288_sdram_pctl_timing pctl_timing;
+ struct rk3288_sdram_phy_timing phy_timing;
+ struct rk3288_base_params base;
+ int num_channels;
+ struct regmap *map;
+};
+
+const int rk3066_dmc_ddrconf_table[] = {
+ /*
+* [5:4] row(13+n)
+* [1:0] col(9+n), assume bw=2
+* row col,bw
+*/
+ 0,
+ (2 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+ (1 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+ (0 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+ (2 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+ (1 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+ (0 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+ (1 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT,
+ (0 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+};
+
+#define TEST_PATTERN 0x5aa5f00f
+#define DQS_GATE_TRAINING_ERROR_RANK0 BIT(4)
+#define DQS_GATE_TRAINING_ERROR_RANK1 BIT(5)
+
+static void rk3066_dmc_copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+ int i;
+
+ for (i = 0; i < n / sizeof(u32); i++) {
+ writel(*src, dest);
+ src++;
+ dest++;
+ }
+}
+
+static void rk3066_dmc_ddr_reset(struct rk3066_cru *cru, u32 ch, u32 ctl, u32
phy)
+{
+ u32 phy_ctl_srstn_shift = 13;
+ u32 ctl_psrstn_shift = 11;
+ u32 ctl_srstn_shift = 10;
+ u32 phy_psrstn_shift = 9;
+ u32 phy_srstn_shift = 8;
+
+ rk_clrsetreg(&cru->cru_softrst_con[5],
+1 << phy_ctl_srstn_shift | 1 << ctl_psrstn_shift |
+1 << ctl_srstn_shift | 1 << phy_psrstn_shift |
+1 << phy_srstn_shift,
+phy << phy_ctl_srstn_shift | ctl << ctl_psrstn_shift |
+ctl << ctl_srstn_shift | phy << phy_psrstn_shift |
+phy << phy_srstn_shift);
+}
+
+static void rk3066_dmc_ddr_phy_ctl_reset(struct rk3066_cru *cru, u32 ch, u32 n)
+{
+ u32 phy_ctl_srstn_shift = 13;
+
+ rk_clrsetreg(&cru->cru_softrst_con[5],
+1 << phy_ctl_srstn_shift, n << phy_ctl_srstn_shift);
+}
+
+static void rk3066_dmc_phy_pctrl_reset(struct rk3066_cru *cru,
+ struct rk3288_ddr_publ *publ,
+ int channel)
+{
+ int i;
+
+ rk3066_dmc_ddr_reset(cru, channel, 1, 1);
+ udelay(1);
+ clrbits_le32(&publ->acdllcr, ACDLLCR_DLLSRST);
+ for (i = 0; i < 4; i++)
+ clrbits_le32(&publ->datx8[i].dxdllcr, DXDLLCR_DLLSRST);
+
+
[PATCH v7 11/19] arm: dts: rockchip: add rk3066a.dtsi
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific
things in a rk3066a-u-boot.dtsi file.
Signed-off-by: Johan Jonker
---
arch/arm/dts/rk3066a-u-boot.dtsi | 3 +
arch/arm/dts/rk3066a.dtsi| 899 +++
2 files changed, 902 insertions(+)
create mode 100644 arch/arm/dts/rk3066a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3066a.dtsi
diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi
new file mode 100644
index ..fefef42b
--- /dev/null
+++ b/arch/arm/dts/rk3066a-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rockchip-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
new file mode 100644
index ..9e2c1d32
--- /dev/null
+++ b/arch/arm/dts/rk3066a.dtsi
@@ -0,0 +1,899 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2013 MundoReader S.L.
+ * Author: Heiko Stuebner
+ */
+
+#include
+#include
+#include
+#include
+#include "rk3xxx.dtsi"
+#include "rk3xxx-u-boot.dtsi"
+
+/ {
+ compatible = "rockchip,rk3066a";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "rockchip,rk3066-smp";
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
+ reg = <0x0>;
+ operating-points = <
+ /* kHzuV */
+ 1416000 130
+ 120 1175000
+ 1008000 1125000
+ 816000 1125000
+ 60 110
+ 504000 110
+ 312000 1075000
+ >;
+ clock-latency = <4>;
+ clocks = <&cru ARMCLK>;
+ };
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
+ reg = <0x1>;
+ };
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop0_out>, <&vop1_out>;
+ };
+
+ hdmi_sound: hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "HDMI";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ status = "disabled";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s0>;
+ };
+ };
+
+ sram: sram@1008 {
+ compatible = "mmio-sram";
+ reg = <0x1008 0x1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1008 0x1>;
+
+ smp-sram@0 {
+ compatible = "rockchip,rk3066-smp-sram";
+ reg = <0x0 0x50>;
+ };
+ };
+
+ vop0: vop@1010c000 {
+ compatible = "rockchip,rk3066-vop";
+ reg = <0x1010c000 0x19c>;
+ interrupts = ;
+ clocks = <&cru ACLK_LCDC0>,
+<&cru DCLK_LCDC0>,
+<&cru HCLK_LCDC0>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ power-domains = <&power RK3066_PD_VIO>;
+ resets = <&cru SRST_LCDC0_AXI>,
+<&cru SRST_LCDC0_AHB>,
+<&cru SRST_LCDC0_DCLK>;
+ reset-names = "axi", "ahb", "dclk";
+ status = "disabled";
+
+ vop0_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vop0_out_hdmi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmi_in_vop0>;
+ };
+ };
+ };
+
+ vop1: vop@1010e000 {
+ compatible = "rockchip,rk3066-vop";
+ reg = <0x1010e000 0x19c>;
+ interrupts = ;
+ clocks = <&cru ACLK_LCDC1>,
+<&cru DCLK_LCDC1>,
+<&cru HCLK_LCDC1>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ power-domains = <&power RK3066_PD_VIO>;
+ resets = <&cru SRST_LCDC1_AXI>,
+<&cru SRST_LCDC1_AHB>,
+<&cru SRST_LCDC1_DCLK>;
+ reset-names = "axi", "ahb", "dclk";
+
[PATCH v7 12/19] arm: dts: rockchip: add rk3066a-mk808.dts
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific
things in a rk3066a-mk808-u-boot.dtsi file.
Signed-off-by: Johan Jonker
---
arch/arm/dts/Makefile | 3 +
arch/arm/dts/rk3066a-mk808-u-boot.dtsi | 42 +
arch/arm/dts/rk3066a-mk808.dts | 224 +
3 files changed, 269 insertions(+)
create mode 100644 arch/arm/dts/rk3066a-mk808-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3066a-mk808.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b3e2a9c9..189f61bd 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -89,6 +89,9 @@ dtb-$(CONFIG_ROCKCHIP_RK3036) += \
dtb-$(CONFIG_ROCKCHIP_RK3128) += \
rk3128-evb.dtb
+dtb-$(CONFIG_ROCKCHIP_RK3066) += \
+ rk3066a-mk808.dtb
+
dtb-$(CONFIG_ROCKCHIP_RK3188) += \
rk3188-radxarock.dtb
diff --git a/arch/arm/dts/rk3066a-mk808-u-boot.dtsi
b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi
new file mode 100644
index ..6e5990f9
--- /dev/null
+++ b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3066a-u-boot.dtsi"
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ compatible = "rockchip,rk3066-dmc", "syscon";
+ rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
+ 0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
+ 0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
+ 0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
+ 0x4 0x0>;
+ rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
+ 0x220 0x40 0x0 0x0>;
+ rockchip,sdram-params = <0x24716310 0 2 3 3 9 0>;
+};
+
+&mmc0 {
+ fifo-mode;
+ max-frequency = <400>;
+ u-boot,dm-spl;
+};
+
+&mmc1 {
+ status = "disabled";
+};
+
+&noc {
+ compatible = "rockchip,rk3066-noc", "syscon";
+};
+
+&timer2 {
+ clock-frequency = <2400>;
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts
new file mode 100644
index ..98c0b7b4
--- /dev/null
+++ b/arch/arm/dts/rk3066a-mk808.dts
@@ -0,0 +1,224 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 Paweł Jarosz
+ */
+
+/dts-v1/;
+#include
+#include "rk3066a.dtsi"
+
+/ {
+ model = "Rikomagic MK808";
+ compatible = "rikomagic,mk808", "rockchip,rk3066a";
+
+ aliases {
+ mmc0 = &mmc0;
+ mmc1 = &mmc1;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@6000 {
+ reg = <0x6000 0x4000>;
+ device_type = "memory";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <250>;
+ poll-interval = <100>;
+
+ recovery {
+ label = "recovery";
+ linux,code = ;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ blue_led: led-0 {
+ label = "mk808:blue:power";
+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ hdmi_con {
+ compatible = "hdmi-connector";
+ type = "c";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ vcc_2v5: vcc-2v5 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_2v5";
+ regulator-min-microvolt = <250>;
+ regulator-max-microvolt = <250>;
+ };
+
+ vcc_io: vcc-io {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_io";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ vcc_host: usb-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&host_drv>;
+ pinctrl-names = "default";
+ regulator-always-on;
+ regulator-name = "host-pwr";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ startup-delay-us
[PATCH v7 10/19] arm: dts: rockchip: fix rk3xxx-u-boot.dtsi
The file rk3xxx-u-boot.dtsi was original only for rk3188 and SPL.
With rk3066 added some nodes are also needed in TPL,
so change them to u-boot,dm-pre-reloc
Signed-off-by: Johan Jonker
---
arch/arm/dts/rk3xxx-u-boot.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/rk3xxx-u-boot.dtsi b/arch/arm/dts/rk3xxx-u-boot.dtsi
index 581594c3..e67432fb 100644
--- a/arch/arm/dts/rk3xxx-u-boot.dtsi
+++ b/arch/arm/dts/rk3xxx-u-boot.dtsi
@@ -4,7 +4,7 @@
noc: syscon@10128000 {
compatible = "rockchip,rk3188-noc", "syscon";
reg = <0x10128000 0x2000>;
- u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
};
dmc: dmc@2002 {
@@ -18,16 +18,16 @@
rockchip,grf = <&grf>;
rockchip,pmu = <&pmu>;
rockchip,noc = <&noc>;
- u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
};
};
&grf {
- u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
};
&pmu {
- u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
};
&uart2 {
--
2.20.1
[PATCH v7 07/19] rockchip: rk3066: fix assigned-clocks rk3066_clk_set_rate
The rk3066 cru node has a number of assigned-clocks properties that call the .set_rate() function. Add them to the list so that they return a 0 instead of -ENOENT. Signed-off-by: Johan Jonker --- drivers/clk/rockchip/clk_rk3066.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c index 804aa43b..1a45 100644 --- a/drivers/clk/rockchip/clk_rk3066.c +++ b/drivers/clk/rockchip/clk_rk3066.c @@ -573,6 +573,15 @@ static ulong rk3066_clk_set_rate(struct clk *clk, ulong rate) case SCLK_TSADC: new_rate = rk3066_clk_saradc_set_clk(cru, rate, clk->id); break; + case PLL_CPLL: + case PLL_GPLL: + case ACLK_CPU: + case HCLK_CPU: + case PCLK_CPU: + case ACLK_PERI: + case HCLK_PERI: + case PCLK_PERI: + return 0; default: return -ENOENT; } -- 2.20.1
[PATCH v7 08/19] rockchip: rk3066: add rk3066 pinctrl driver
From: Paweł Jarosz
Add driver supporting pin multiplexing on rk3066 platform.
Signed-off-by: Paweł Jarosz
Signed-off-by: Johan Jonker
---
Changed V7:
restyle
changed function prefix.
restyle U_BOOT_DRIVER structure
use OF_REAL
use EOPNOTSUPP
---
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rk3066.c | 113 ++
2 files changed, 114 insertions(+)
create mode 100644 drivers/pinctrl/rockchip/pinctrl-rk3066.c
diff --git a/drivers/pinctrl/rockchip/Makefile
b/drivers/pinctrl/rockchip/Makefile
index fcf19f87..7d03f810 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -5,6 +5,7 @@
obj-y += pinctrl-rockchip-core.o
obj-$(CONFIG_ROCKCHIP_PX30) += pinctrl-px30.o
obj-$(CONFIG_ROCKCHIP_RK3036) += pinctrl-rk3036.o
+obj-$(CONFIG_ROCKCHIP_RK3066) += pinctrl-rk3066.o
obj-$(CONFIG_ROCKCHIP_RK3128) += pinctrl-rk3128.o
obj-$(CONFIG_ROCKCHIP_RK3188) += pinctrl-rk3188.o
obj-$(CONFIG_ROCKCHIP_RK322X) += pinctrl-rk322x.o
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3066.c
b/drivers/pinctrl/rockchip/pinctrl-rk3066.c
new file mode 100644
index ..c329dd45
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3066.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "pinctrl-rockchip.h"
+
+static int rk3066_pinctrl_set_mux(struct rockchip_pin_bank *bank, int pin, int
mux)
+{
+ struct rockchip_pinctrl_priv *priv = bank->priv;
+ int iomux_num = (pin / 8);
+ struct regmap *regmap;
+ int reg, ret, mask, mux_type;
+ u8 bit;
+ u32 data;
+
+ regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+ ? priv->regmap_pmu : priv->regmap_base;
+
+ /* get basic quadrupel of mux registers and the correct reg inside */
+ mux_type = bank->iomux[iomux_num].type;
+ reg = bank->iomux[iomux_num].offset;
+ reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+ data = (mask << (bit + 16));
+ data |= (mux & mask) << bit;
+ ret = regmap_write(regmap, reg, data);
+
+ return ret;
+}
+
+#define RK3066_PULL_OFFSET 0x118
+#define RK3066_PULL_PINS_PER_REG 16
+#define RK3066_PULL_BANK_STRIDE8
+
+static void rk3066_pinctrl_calc_pull_reg_and_bit(struct rockchip_pin_bank
*bank,
+int pin_num, struct regmap
**regmap,
+int *reg, u8 *bit)
+{
+ struct rockchip_pinctrl_priv *priv = bank->priv;
+
+ *regmap = priv->regmap_base;
+ *reg = RK3066_PULL_OFFSET;
+ *reg += bank->bank_num * RK3066_PULL_BANK_STRIDE;
+ *reg += (pin_num / RK3066_PULL_PINS_PER_REG) * 4;
+
+ *bit = pin_num % RK3066_PULL_PINS_PER_REG;
+};
+
+static int rk3066_pinctrl_set_pull(struct rockchip_pin_bank *bank,
+ int pin_num, int pull)
+{
+ struct regmap *regmap;
+ int reg, ret;
+ u8 bit;
+ u32 data;
+
+ if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
+ pull != PIN_CONFIG_BIAS_DISABLE)
+ return -EOPNOTSUPP;
+
+ rk3066_pinctrl_calc_pull_reg_and_bit(bank, pin_num, ®map, ®,
&bit);
+ data = BIT(bit + 16);
+ if (pull == PIN_CONFIG_BIAS_DISABLE)
+ data |= BIT(bit);
+ ret = regmap_write(regmap, reg, data);
+
+ return ret;
+}
+
+static struct rockchip_pin_bank rk3066_pin_banks[] = {
+ PIN_BANK(0, 32, "gpio0"),
+ PIN_BANK(1, 32, "gpio1"),
+ PIN_BANK(2, 32, "gpio2"),
+ PIN_BANK(3, 32, "gpio3"),
+ PIN_BANK(4, 32, "gpio4"),
+ PIN_BANK(6, 16, "gpio6"),
+};
+
+static struct rockchip_pin_ctrl rk3066_pin_ctrl = {
+ .pin_banks = rk3066_pin_banks,
+ .nr_banks = ARRAY_SIZE(rk3066_pin_banks),
+ .grf_mux_offset = 0xa8,
+ .set_mux= rk3066_pinctrl_set_mux,
+ .set_pull = rk3066_pinctrl_set_pull,
+};
+
+static const struct udevice_id rk3066_pinctrl_ids[] = {
+ {
+ .compatible = "rockchip,rk3066a-pinctrl",
+ .data = (ulong)&rk3066_pin_ctrl
+ },
+ {}
+};
+
+U_BOOT_DRIVER(rockchip_rk3066a_pinctrl) = {
+ .name = "rockchip_rk3066a_pinctrl",
+ .id = UCLASS_PINCTRL,
+ .ops= &rockchip_pinctrl_ops,
+ .probe = rockchip_pinctrl_probe,
+#if CONFIG_IS_ENABLED(OF_REAL)
+ .bind = dm_scan_fdt_dev,
+#endif
+ .of_match = rk3066_pinctrl_ids,
+ .priv_auto = sizeof(struct rockchip_pinctrl_priv),
+};
--
2.20.1
[PATCH v7 04/19] rockchip: rk3066: add clock driver for rk3066 soc
From: Paweł Jarosz
Add clock driver for rk3066 platform.
Signed-off-by: Paweł Jarosz
Signed-off-by: Johan Jonker
---
Changed V7:
changed function prefix
changed #if where possible
restyle U_BOOT_DRIVER structure
---
.../include/asm/arch-rockchip/cru_rk3066.h| 203 +
drivers/clk/rockchip/Makefile | 1 +
drivers/clk/rockchip/clk_rk3066.c | 700 ++
3 files changed, 904 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3066.h
create mode 100644 drivers/clk/rockchip/clk_rk3066.c
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
new file mode 100644
index ..711366d5
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
@@ -0,0 +1,203 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2021 Paweł Jarosz
+ */
+
+#ifndef _ASM_ARCH_CRU_RK3066_H
+#define _ASM_ARCH_CRU_RK3066_H
+
+#define OSC_HZ (24 * 1000 * 1000)
+
+#define APLL_HZ(1416 * 100)
+#define APLL_SAFE_HZ (600 * 100)
+#define GPLL_HZ(594 * 100)
+#define CPLL_HZ(384 * 100)
+
+/* The SRAM is clocked off aclk_cpu, so we want to max it out for boot speed */
+#define CPU_ACLK_HZ29700
+#define CPU_HCLK_HZ14850
+#define CPU_PCLK_HZ7425
+#define CPU_H2P_HZ 7425
+
+#define PERI_ACLK_HZ 14850
+#define PERI_HCLK_HZ 14850
+#define PERI_PCLK_HZ 7425
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3066_clk_priv {
+ struct rk3066_grf *grf;
+ struct rk3066_cru *cru;
+ ulong rate;
+ bool has_bwadj;
+};
+
+struct rk3066_cru {
+ struct rk3066_pll {
+ u32 con0;
+ u32 con1;
+ u32 con2;
+ u32 con3;
+ } pll[4];
+ u32 cru_mode_con;
+ u32 cru_clksel_con[35];
+ u32 cru_clkgate_con[10];
+ u32 reserved1[2];
+ u32 cru_glb_srst_fst_value;
+ u32 cru_glb_srst_snd_value;
+ u32 reserved2[2];
+ u32 cru_softrst_con[9];
+ u32 cru_misc_con;
+ u32 reserved3[2];
+ u32 cru_glb_cnt_th;
+};
+
+check_member(rk3066_cru, cru_glb_cnt_th, 0x0140);
+
+/* CRU_CLKSEL0_CON */
+enum {
+ /* a9_core_div: core = core_src / (a9_core_div + 1) */
+ A9_CORE_DIV_SHIFT = 9,
+ A9_CORE_DIV_MASK= 0x1f << A9_CORE_DIV_SHIFT,
+ CORE_PLL_SHIFT = 8,
+ CORE_PLL_MASK = 1 << CORE_PLL_SHIFT,
+ CORE_PLL_SELECT_APLL= 0,
+ CORE_PLL_SELECT_GPLL,
+
+ /* core peri div: core:core_peri = 2:1, 4:1, 8:1 or 16:1 */
+ CORE_PERI_DIV_SHIFT = 6,
+ CORE_PERI_DIV_MASK = 3 << CORE_PERI_DIV_SHIFT,
+
+ /* aclk_cpu pll selection */
+ CPU_ACLK_PLL_SHIFT = 5,
+ CPU_ACLK_PLL_MASK = 1 << CPU_ACLK_PLL_SHIFT,
+ CPU_ACLK_PLL_SELECT_APLL= 0,
+ CPU_ACLK_PLL_SELECT_GPLL,
+
+ /* a9_cpu_div: aclk_cpu = cpu_src / (a9_cpu_div + 1) */
+ A9_CPU_DIV_SHIFT= 0,
+ A9_CPU_DIV_MASK = 0x1f << A9_CPU_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL1_CON */
+enum {
+ /* ahb2apb_pclk_div: hclk_cpu:pclk_cpu = 1:1, 2:1 or 4:1 */
+ AHB2APB_DIV_SHIFT = 14,
+ AHB2APB_DIV_MASK= 3 << AHB2APB_DIV_SHIFT,
+
+ /* cpu_pclk_div: aclk_cpu:pclk_cpu = 1:1, 2:1, 4:1 or 8:1 */
+ CPU_PCLK_DIV_SHIFT = 12,
+ CPU_PCLK_DIV_MASK = 3 << CPU_PCLK_DIV_SHIFT,
+
+ /* cpu_hclk_div: aclk_cpu:hclk_cpu = 1:1, 2:1 or 4:1 */
+ CPU_HCLK_DIV_SHIFT = 8,
+ CPU_HCLK_DIV_MASK = 3 << CPU_HCLK_DIV_SHIFT,
+
+ /* core_aclk_div: cire:aclk_core = 1:1, 2:1, 3:1, 4:1 or 8:1 */
+ CORE_ACLK_DIV_SHIFT = 3,
+ CORE_ACLK_DIV_MASK = 7 << CORE_ACLK_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL10_CON */
+enum {
+ PERI_SEL_PLL_SHIFT = 15,
+ PERI_SEL_PLL_MASK = 1 << PERI_SEL_PLL_SHIFT,
+ PERI_SEL_CPLL = 0,
+ PERI_SEL_GPLL,
+
+ /* peri pclk div: aclk_bus:pclk_bus = 1:1, 2:1, 4:1 or 8:1 */
+ PERI_PCLK_DIV_SHIFT = 12,
+ PERI_PCLK_DIV_MASK = 3 << PERI_PCLK_DIV_SHIFT,
+
+ /* peripheral bus hclk div:aclk_bus: hclk_bus = 1:1, 2:1 or 4:1 */
+ PERI_HCLK_DIV_SHIFT = 8,
+ PERI_HCLK_DIV_MASK = 3 << PERI_HCLK_DIV_SHIFT,
+
+ /* peri aclk div: aclk_peri = periph_src / (peri_aclk_div + 1) */
+ PERI_ACLK_DIV_SHIFT = 0,
+ PERI_ACLK_DIV_MASK = 0x1f << PERI_ACLK_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL11_CON */
+enum {
+ MMC0_DIV_SHIFT = 0,
+ MMC0_DIV_MASK = 0x3f << MMC0_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL12_CON */
+enum {
+ UART_PLL_SHIFT = 15,
+ UART_PLL_MASK = 1 << UART_PLL_SHIFT,
+ UART_PLL_SELECT_GENERAL = 0,
+ UART_PLL_SELECT_CODEC,
+
+ EMMC_DIV_SHIFT = 8,
+ EMMC_DIV_MASK = 0x3f << EMMC_DIV_SHIFT,
[PATCH v7 05/19] rockchip: clk: add SCLK_TIMER[0..2] to clk_rk3066.c
Add SCLK_TIMER[0..2] to clk_rk3066 in use by the dw-apb-timer.c driver. Signed-off-by: Johan Jonker --- drivers/clk/rockchip/clk_rk3066.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c index 3b7de51c..2fc4d5c9 100644 --- a/drivers/clk/rockchip/clk_rk3066.c +++ b/drivers/clk/rockchip/clk_rk3066.c @@ -527,6 +527,10 @@ static ulong rk3066_clk_get_rate(struct clk *clk) case SCLK_TSADC: new_rate = rk3066_clk_saradc_get_clk(priv->cru, clk->id); break; + case SCLK_TIMER0: + case SCLK_TIMER1: + case SCLK_TIMER2: + return OSC_HZ; default: return -ENOENT; } -- 2.20.1
[PATCH v7 01/19] rockchip: rk3066-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3066 sync the power domain dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: Johan Jonker --- include/dt-bindings/power/rk3066-power.h | 22 ++ 1 file changed, 22 insertions(+) create mode 100644 include/dt-bindings/power/rk3066-power.h diff --git a/include/dt-bindings/power/rk3066-power.h b/include/dt-bindings/power/rk3066-power.h new file mode 100644 index ..acf9f310 --- /dev/null +++ b/include/dt-bindings/power/rk3066-power.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3066_POWER_H__ +#define __DT_BINDINGS_POWER_RK3066_POWER_H__ + +/* VD_CORE */ +#define RK3066_PD_A9_0 0 +#define RK3066_PD_A9_1 1 +#define RK3066_PD_DBG 4 +#define RK3066_PD_SCU 5 + +/* VD_LOGIC */ +#define RK3066_PD_VIDEO6 +#define RK3066_PD_VIO 7 +#define RK3066_PD_GPU 8 +#define RK3066_PD_PERI 9 +#define RK3066_PD_CPU 10 +#define RK3066_PD_ALIVE11 + +/* VD_PMU */ +#define RK3066_PD_RTC 12 + +#endif -- 2.20.1
[PATCH v7 03/19] rockchip: include: add GRF_GPIO3B_IOMUX to grf_rk3066.h
In order to use rk3066 sdmmc and SPL OF_PLATDATA the pinctrl
must be set without driver. Add the register defines for it
to grf_rk3066.h
Signed-off-by: Johan Jonker
---
.../include/asm/arch-rockchip/grf_rk3066.h| 38 +++
1 file changed, 38 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
index 71fdcd03..026ad1c1 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
@@ -83,6 +83,44 @@ enum {
GPIO1B0_UART2_SIN
};
+/* GRF_GPIO3B_IOMUX */
+enum {
+ GPIO3B6_SHIFT = 12,
+ GPIO3B6_MASK= 1 << GPIO3B6_SHIFT,
+ GPIO3B6_GPIO= 0,
+ GPIO3B6_SDMMC0_DECTN,
+
+ GPIO3B5_SHIFT = 10,
+ GPIO3B5_MASK= 1 << GPIO3B5_SHIFT,
+ GPIO3B5_GPIO= 0,
+ GPIO3B5_SDMMC0_DATA3,
+
+ GPIO3B4_SHIFT = 8,
+ GPIO3B4_MASK= 1 << GPIO3B4_SHIFT,
+ GPIO3B4_GPIO= 0,
+ GPIO3B4_SDMMC0_DATA2,
+
+ GPIO3B3_SHIFT = 6,
+ GPIO3B3_MASK= 1 << GPIO3B3_SHIFT,
+ GPIO3B3_GPIO= 0,
+ GPIO3B3_SDMMC0_DATA1,
+
+ GPIO3B2_SHIFT = 4,
+ GPIO3B2_MASK= 1 << GPIO3B2_SHIFT,
+ GPIO3B2_GPIO= 0,
+ GPIO3B2_SDMMC0_DATA0,
+
+ GPIO3B1_SHIFT = 2,
+ GPIO3B1_MASK= 1 << GPIO3B1_SHIFT,
+ GPIO3B1_GPIO= 0,
+ GPIO3B1_SDMMC0_CMD,
+
+ GPIO3B0_SHIFT = 0,
+ GPIO3B0_MASK= 1 << GPIO3B0_SHIFT,
+ GPIO3B0_GPIO= 0,
+ GPIO3B0_SDMMC0_CLKOUT,
+};
+
/* GRF_SOC_CON0 */
enum {
SMC_MUX_CON_SHIFT = 13,
--
2.20.1
[PATCH v7 02/19] rockchip: rk3066: add grf header file
From: Paweł Jarosz
grf is needed by various drivers for rk3066 soc.
Signed-off-by: Paweł Jarosz
Signed-off-by: Johan Jonker
---
.../include/asm/arch-rockchip/grf_rk3066.h| 211 ++
1 file changed, 211 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3066.h
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
new file mode 100644
index ..71fdcd03
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
@@ -0,0 +1,211 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2021 Paweł Jarosz
+ */
+
+#ifndef _ASM_ARCH_GRF_RK3066_H
+#define _ASM_ARCH_GRF_RK3066_H
+
+struct rk3066_grf_gpio_lh {
+ u32 l;
+ u32 h;
+};
+
+struct rk3066_grf {
+ struct rk3066_grf_gpio_lh gpio_dir[7];
+ struct rk3066_grf_gpio_lh gpio_do[7];
+ struct rk3066_grf_gpio_lh gpio_en[7];
+
+ u32 gpio0a_iomux;
+ u32 gpio0b_iomux;
+ u32 gpio0c_iomux;
+ u32 gpio0d_iomux;
+
+ u32 gpio1a_iomux;
+ u32 gpio1b_iomux;
+ u32 gpio1c_iomux;
+ u32 gpio1d_iomux;
+
+ u32 gpio2a_iomux;
+ u32 gpio2b_iomux;
+ u32 gpio2c_iomux;
+ u32 gpio2d_iomux;
+
+ u32 gpio3a_iomux;
+ u32 gpio3b_iomux;
+ u32 gpio3c_iomux;
+ u32 gpio3d_iomux;
+
+ u32 gpio4a_iomux;
+ u32 gpio4b_iomux;
+ u32 gpio4c_iomux;
+ u32 gpio4d_iomux;
+
+ u32 reserved0[5];
+
+ u32 gpio6b_iomux;
+
+ u32 reserved1[2];
+
+ struct rk3066_grf_gpio_lh gpio_pull[7];
+
+ u32 soc_con0;
+ u32 soc_con1;
+ u32 soc_con2;
+
+ u32 soc_status0;
+
+ u32 dmac1_con[3];
+ u32 dmac2_con[4];
+
+ u32 uoc0_con[3];
+ u32 uoc1_con[4];
+ u32 ddrc_con;
+ u32 ddrc_stat;
+
+ u32 reserved2[10];
+
+ u32 os_reg[4];
+};
+
+check_member(rk3066_grf, os_reg[3], 0x01d4);
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+ GPIO1B1_SHIFT = 2,
+ GPIO1B1_MASK= 1 << GPIO1B1_SHIFT,
+ GPIO1B1_GPIO= 0,
+ GPIO1B1_UART2_SOUT,
+
+ GPIO1B0_SHIFT = 0,
+ GPIO1B0_MASK= 1 << GPIO1B0_SHIFT,
+ GPIO1B0_GPIO= 0,
+ GPIO1B0_UART2_SIN
+};
+
+/* GRF_SOC_CON0 */
+enum {
+ SMC_MUX_CON_SHIFT = 13,
+ SMC_MUX_CON_MASK= 1 << SMC_MUX_CON_SHIFT,
+
+ NOC_REMAP_SHIFT = 12,
+ NOC_REMAP_MASK = 1 << NOC_REMAP_SHIFT,
+
+ EMMC_FLASH_SEL_SHIFT= 11,
+ EMMC_FLASH_SEL_MASK = 1 << EMMC_FLASH_SEL_SHIFT,
+
+ TZPC_REVISION_SHIFT = 7,
+ TZPC_REVISION_MASK = 0xf << TZPC_REVISION_SHIFT,
+
+ L2CACHE_ACC_SHIFT = 5,
+ L2CACHE_ACC_MASK= 3 << L2CACHE_ACC_SHIFT,
+
+ L2RD_WAIT_SHIFT = 3,
+ L2RD_WAIT_MASK = 3 << L2RD_WAIT_SHIFT,
+
+ IMEMRD_WAIT_SHIFT = 1,
+ IMEMRD_WAIT_MASK= 3 << IMEMRD_WAIT_SHIFT,
+
+ SOC_REMAP_SHIFT = 0,
+ SOC_REMAP_MASK = 1 << SOC_REMAP_SHIFT,
+};
+
+/* GRF_SOC_CON1 */
+enum {
+ RKI2C4_SEL_SHIFT= 15,
+ RKI2C4_SEL_MASK = 1 << RKI2C4_SEL_SHIFT,
+
+ RKI2C3_SEL_SHIFT= 14,
+ RKI2C3_SEL_MASK = 1 << RKI2C3_SEL_SHIFT,
+
+ RKI2C2_SEL_SHIFT= 13,
+ RKI2C2_SEL_MASK = 1 << RKI2C2_SEL_SHIFT,
+
+ RKI2C1_SEL_SHIFT= 12,
+ RKI2C1_SEL_MASK = 1 << RKI2C1_SEL_SHIFT,
+
+ RKI2C0_SEL_SHIFT= 11,
+ RKI2C0_SEL_MASK = 1 << RKI2C0_SEL_SHIFT,
+
+ VCODEC_SEL_SHIFT= 10,
+ VCODEC_SEL_MASK = 1 << VCODEC_SEL_SHIFT,
+
+ PERI_EMEM_PAUSE_SHIFT = 9,
+ PERI_EMEM_PAUSE_MASK= 1 << PERI_EMEM_PAUSE_SHIFT,
+
+ PERI_USB_PAUSE_SHIFT= 8,
+ PERI_USB_PAUSE_MASK = 1 << PERI_USB_PAUSE_SHIFT,
+
+ SMC_MUX_MODE_0_SHIFT= 6,
+ SMC_MUX_MODE_0_MASK = 1 << SMC_MUX_MODE_0_SHIFT,
+
+ SMC_SRAM_MW_0_SHIFT = 4,
+ SMC_SRAM_MW_0_MASK = 3 << SMC_SRAM_MW_0_SHIFT,
+
+ SMC_REMAP_0_SHIFT = 3,
+ SMC_REMAP_0_MASK= 1 << SMC_REMAP_0_SHIFT,
+
+ SMC_A_GT_M0_SYNC_SHIFT = 2,
+ SMC_A_GT_M0_SYNC_MASK = 1 << SMC_A_GT_M0_SYNC_SHIFT,
+
+ EMAC_SPEED_SHIFT= 1,
+ EMAC_SPEEC_MASK = 1 << EMAC_SPEED_SHIFT,
+
+ EMAC_MODE_SHIFT = 0,
+ EMAC_MODE_MASK = 1 << EMAC_MODE_SHIFT,
+};
+
+/* GRF_SOC_CON2 */
+enum {
+ MSCH4_MAINDDR3_SHIFT= 7,
+ MSCH4_MAINDDR3_MASK = 1 << MSCH4_MAINDDR3_SHIFT,
+ MSCH4_MAINDDR3_DDR3 = 1,
+
+ EMAC_NEWRCV_EN_SHIFT= 6,
+ EMAC_NEWRCV_EN_MASK = 1 << EMAC_NEWRCV_EN_SHIFT,
+
+ SW_ADDR15_EN_SHIFT = 5,
+ SW_ADDR15_EN_MASK = 1 << SW_ADDR15_EN_SHIFT,
+
+ SW_ADDR16_EN_SHIFT = 4,
+ SW_ADDR16_EN_MASK = 1 << SW_ADDR16_EN_SHIFT,
+
+ SW_ADDR17_EN_
[PATCH v7 00/19] Add Rikomagic MK808 board
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port, HDMI and a micro-SD card slot. It also includes on-board NAND and 1GB of SDRAM. === Boot procedure flow for a Rockchip rk3066 SoC: 1.Read 2K SDRAM initialization image code to internal SRAM 2.Run image code to do SDRAM initialization 3.Transfer boot image code to SDRAM 4.Run boot image code Supported system boot from the following devices: Nand Flash SPI nor Flash eMMC device UART interface If all boot options fail then enter into BootROM mode on the USB OTG port. Unlike later SoC models the rk3066 BootROM doesn't have SDMMC support. The size of a full U-boot binary is too large for the internal SDRAM memory. Of that 64k size only 32kb sram - 2kb bootrom is available for the first stage. Similar to the already supported rk3188, the BootROM will attempt to load up the first stage image in two steps: first 1KB to offset 0x800 in the SRAM and then the remainder to offset 0xc00 in the SRAM. It always enters at offset 0x804 after a 4 ASCII character "RK30" header. With CONFIG_TPL_ROCKCHIP_EARLYRETURN_TO_BROM=y this first stage is combined with the U-boot TPL binary (u-boot-tpl.bin). For rk3066 with NAND flash and U-boot this gives the following stages: - TPL: init external SDRAM - SPL: init SDMMC and read U-boot from SD CARD. - U-boot: read Linux kernel from SD CARD. - Kernel Additionally the rk3066 requires everything the BootROM loads to be RC4-encrypted. === Boot solution with full U-boot stored on SD CARD: Compile commands(U-boot): ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make mk808_defconfig ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make menuconfig ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make all === Size of SPL and TPL must be aligned to 2kb. If bricked and no BootROM mode shows up then connect pin 8 and 9 of the NAND flash with a needle while reconnecting to the USB OTG port to a PC. === Show connected devices with: lsusb Bus 001 Device 004: ID 2207:300a Fuzhou Rockchip Electronics Company RK3066 in Mask ROM mode === Program commands with ./flash.sh: #!/bin/sh printf "RK30" > tplspl.bin dd if=u-boot-tpl.bin >> tplspl.bin truncate -s %2048 tplspl.bin truncate -s %2048 u-boot-spl.bin ../tools/boot_merger --verbose config-flash.ini ../tools/upgrade_tool ul ./RK30xxLoader_uboot.bin === config-flash.ini: [CHIP_NAME] NAME=RK30 [VERSION] MAJOR=2 MINOR=21 [CODE471_OPTION] NUM=1 Path1=30_LPDDR2_300MHz_DD.bin [CODE472_OPTION] NUM=1 Path1=rk30usbplug.bin [LOADER_OPTION] NUM=2 LOADER1=FlashData LOADER2=FlashBoot FlashData=tplspl.bin FlashBoot=u-boot-spl.bin [OUTPUT] PATH=RK30xxLoader_uboot.bin === Partition Map for MMC device 0 -- Partition Type: EFI PartStart LBA End LBA Name Attributes Type GUID Partition GUID 1 0x0040 0x1f7f "loader1" 2 0x4000 0x5fff "loader2" 3 0x6000 0x7fff "trust" 4 0x8000 0x0003 "boot" 5 0x0004 0x00ed7fde "rootfs" Make sure boot and esp flag are set for boot partition. Loader1 not used by === Boot partition: extlinux -- extlinux.conf zImage rk3066a-mk808.dtb === extlinux.conf: label kernel kernel /zImage fdt /rk3066a-mk808.dtb append root=LABEL=linuxroot init=/sbin/init rootfstype=ext4 rootwait === Program commands (SD CARD with GPT partition): sudo dd if=u-boot-dtb.img of=/dev/sda seek=16384 === TODO: Get rid of message: set_state_simple op missing Better program flow/tools USB NAND etc etc === Johan Jonker (15): rockchip: rk3066-power: sync power domain dt-binding header from Linux rockchip: include: add GRF_GPIO3B_IOMUX to grf_rk3066.h rockchip: clk: add SCLK_TIMER[0..2] to clk_rk3066.c rockchip: clk: add SCLK_UART[0..3] to clk_rk3066.c rockchip: rk3066: fix assigned-clocks rk3066_clk_set_rate arm: dts: rockchip: fix rk3xxx-u-boot.dtsi arm: dts: rockchip: add rk3066a.dtsi arm: dts: rockchip: add rk3066a-mk808.dts rockchip: rk3066: add include rockchip: rk3066: add rk3066_common.h include rockchip: rk3066: add core support rockchip: rk3066: add Rikomagic MK808 board rockchip: rk3066: add mk808_defconfig rockchip: tools: add rk3066 support to rkcommon.c doc: rockchip: add rk3066 Rikomagic MK808 Paweł Jarosz (4): rockchip: rk3066: add grf header file rockchip: rk3066: add clock driver for rk3066 soc rockchip: rk3066: add rk3066 pinctrl driver rockchip: rk3066: add sdram driver arch/arm/dts/Makefile | 3 + arch/arm/dts/rk3066a-mk808-u-boot.dtsi| 42 + arch/arm/dts/rk3066a-mk808.dts| 224 + arch/arm/dts/rk3066a-u-boot.dtsi | 3 + arch/arm/dts/rk3066a.dtsi | 899 ++ arch/arm/dts/rk3xxx-u-boot.dtsi | 8 +- arch/arm/include/asm/arch-rk3066/boot0.h | 8 + arch/arm/include/asm/arch-rk3066/gpio.h | 8 + arch/arm/include/asm/a
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On Tue, Jan 11, 2022 at 09:44:10PM +0100, Pali Rohár wrote: > On Tuesday 11 January 2022 14:22:43 Alex G. wrote: > > On 1/11/22 13:09, Tom Rini wrote: > > > On Tue, Jan 11, 2022 at 07:58:05PM +0100, Marek Vasut wrote: > > > > On 1/11/22 17:16, Tom Rini wrote: > > > > > On Tue, Jan 11, 2022 at 04:36:34PM +0100, Pali Rohár wrote: > > > > > > On Tuesday 11 January 2022 16:31:20 Marek Vasut wrote: > > > > > > > The kwbimage has hard dependency on OpenSSL, do not build it > > > > > > > in case TOOLS_LIBCRYPTO is disabled. > > > > > > > > > > > > This patch does not work as kwbimage is required for 32-bit Armada > > > > > > platforms. So kwbimage.o cannot be disabled on these platforms. > > > > > > > > > > > > There is already proposal for fixing this issue: > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20211021093304.25399-1-p...@kernel.org/ > > > > > > > > > > And needs to be respun to not have Kconfig issues. To answer > > > > > something > > > > > noted in that thread, yes, it would be good if Kconfig did, or had an > > > > > option to make WARNING like that fatal. Or is the problem really that > > > > > no, it's non-optional, really, to have OpenSSL installed? > > > > > > > > OpenSSL should be optional, I got this bug report where someone tried to > > > > build u-boot on ancient debian oldoldstable with openssl 1.1.0 (without > > > > ecdsa support), for a platform which doesn't need any of this crypto > > > > stuff. > > > > So, disabling TOOLS_LIBCRYPTO was a sufficient for that platform to > > > > build in > > > > that setup (with this patch). And there are plenty of such platforms in > > > > the > > > > U-Boot tree (all that are not marvell I think). > > > > > > Right. So your patch is a step in the right direction, but we also need > > > to have the appropriate platforms depend'ing on TOOLS_LIBCRYPTO and > > > updating the help to note that some platforms require it as well, to > > > build their images. > > > > I did not intend for TOOLS_LIBCRYPTO to be used beyond an on/off toggle for > > the user. > > > > My suggestion is to allow platforms to build irrespective of > > TOOLS_LIBCRYPTO, and print a warning if for some reason we can't generate a > > bootable image. I see quite a few ARMv8 platforms throw such warnings on > > gitlab-ci. We can compile an elf, right? Any good reason why kwbimage should > > be different? > > > > Alex > > For me: > > build = generate a bootable image > > or at least I do not see a reason why an end user should be able to > generate e.g. cmd/common.o object file without having working full > toolchain for successful generation of final executable. > > Some platforms (e.g. that Marvell) are not ELF-based, so compiling ELF > means nothing. Almost nothing is ELF based. So yes, Alex's point is right, in many respects this is no different than the common ARMv8 case of needing something we can't / don't provide to make a functional image. Just building u-boot (and spl/u-boot and/or tpl/u-boot) isn't enough and isn't what's booted on the platform as-is. > kwbimage for these Marvell platforms is what generates final > "executable" image and it does also other checks and tests. It is > possible that build process generates SPL ELF binary but kwbimage refuse > it. In most cases it means that user chose .config options unusable for > booting, but it could mean also other issues. And this is something > which CI tests can detect... if some patch is doing to break U-Boot on > Marvell platforms. On mailing list are pending other patches which > extends those kwbimage checks to prevent generating broken images > (e.g. chosen SPL load address cannot be set into kwbimage). > > So printing a warning does not solve anything because warnings are > ignored. Lot of packaging tools and also CI tests pass successfully if > build process throw a warning. > > And if some platforms are throwing warnings on CI, is not this an issue > which somebody should care about? What makes kwbimage different from the ARMv8 case is that in this case we're talking about building the tool to make the image and in the other case we're talking about using our tooling to generate (or be unable to generate) a functional image. We cannot ship TF-A or other assorted external projects and their build outputs, so we throw a non-fatal but obvious to anyone reading warning message out. CI isn't even the issue for kwbimage as we just include openssl-dev in the base. The issues are: - How do we handle non-kwbimage platforms? Especially since the general expectation is that mkimage will work for pretty much anything. And not all distros / distro builders (OE) use tools-only_defconfig to configure their build of mkimage. - How do we handle the case of kwbimage platforms on hosts that don't have openssl-dev? This I think should be a build time error. Failing to build over missing ssl headers should be a fairly easy to diagnose problem, and also should be documented as appro
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On Tuesday 11 January 2022 14:22:43 Alex G. wrote: > On 1/11/22 13:09, Tom Rini wrote: > > On Tue, Jan 11, 2022 at 07:58:05PM +0100, Marek Vasut wrote: > > > On 1/11/22 17:16, Tom Rini wrote: > > > > On Tue, Jan 11, 2022 at 04:36:34PM +0100, Pali Rohár wrote: > > > > > On Tuesday 11 January 2022 16:31:20 Marek Vasut wrote: > > > > > > The kwbimage has hard dependency on OpenSSL, do not build it > > > > > > in case TOOLS_LIBCRYPTO is disabled. > > > > > > > > > > This patch does not work as kwbimage is required for 32-bit Armada > > > > > platforms. So kwbimage.o cannot be disabled on these platforms. > > > > > > > > > > There is already proposal for fixing this issue: > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20211021093304.25399-1-p...@kernel.org/ > > > > > > > > And needs to be respun to not have Kconfig issues. To answer something > > > > noted in that thread, yes, it would be good if Kconfig did, or had an > > > > option to make WARNING like that fatal. Or is the problem really that > > > > no, it's non-optional, really, to have OpenSSL installed? > > > > > > OpenSSL should be optional, I got this bug report where someone tried to > > > build u-boot on ancient debian oldoldstable with openssl 1.1.0 (without > > > ecdsa support), for a platform which doesn't need any of this crypto > > > stuff. > > > So, disabling TOOLS_LIBCRYPTO was a sufficient for that platform to build > > > in > > > that setup (with this patch). And there are plenty of such platforms in > > > the > > > U-Boot tree (all that are not marvell I think). > > > > Right. So your patch is a step in the right direction, but we also need > > to have the appropriate platforms depend'ing on TOOLS_LIBCRYPTO and > > updating the help to note that some platforms require it as well, to > > build their images. > > I did not intend for TOOLS_LIBCRYPTO to be used beyond an on/off toggle for > the user. > > My suggestion is to allow platforms to build irrespective of > TOOLS_LIBCRYPTO, and print a warning if for some reason we can't generate a > bootable image. I see quite a few ARMv8 platforms throw such warnings on > gitlab-ci. We can compile an elf, right? Any good reason why kwbimage should > be different? > > Alex For me: build = generate a bootable image or at least I do not see a reason why an end user should be able to generate e.g. cmd/common.o object file without having working full toolchain for successful generation of final executable. Some platforms (e.g. that Marvell) are not ELF-based, so compiling ELF means nothing. kwbimage for these Marvell platforms is what generates final "executable" image and it does also other checks and tests. It is possible that build process generates SPL ELF binary but kwbimage refuse it. In most cases it means that user chose .config options unusable for booting, but it could mean also other issues. And this is something which CI tests can detect... if some patch is doing to break U-Boot on Marvell platforms. On mailing list are pending other patches which extends those kwbimage checks to prevent generating broken images (e.g. chosen SPL load address cannot be set into kwbimage). So printing a warning does not solve anything because warnings are ignored. Lot of packaging tools and also CI tests pass successfully if build process throw a warning. And if some platforms are throwing warnings on CI, is not this an issue which somebody should care about?
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On 1/11/22 13:09, Tom Rini wrote: On Tue, Jan 11, 2022 at 07:58:05PM +0100, Marek Vasut wrote: On 1/11/22 17:16, Tom Rini wrote: On Tue, Jan 11, 2022 at 04:36:34PM +0100, Pali Rohár wrote: On Tuesday 11 January 2022 16:31:20 Marek Vasut wrote: The kwbimage has hard dependency on OpenSSL, do not build it in case TOOLS_LIBCRYPTO is disabled. This patch does not work as kwbimage is required for 32-bit Armada platforms. So kwbimage.o cannot be disabled on these platforms. There is already proposal for fixing this issue: https://patchwork.ozlabs.org/project/uboot/patch/20211021093304.25399-1-p...@kernel.org/ And needs to be respun to not have Kconfig issues. To answer something noted in that thread, yes, it would be good if Kconfig did, or had an option to make WARNING like that fatal. Or is the problem really that no, it's non-optional, really, to have OpenSSL installed? OpenSSL should be optional, I got this bug report where someone tried to build u-boot on ancient debian oldoldstable with openssl 1.1.0 (without ecdsa support), for a platform which doesn't need any of this crypto stuff. So, disabling TOOLS_LIBCRYPTO was a sufficient for that platform to build in that setup (with this patch). And there are plenty of such platforms in the U-Boot tree (all that are not marvell I think). Right. So your patch is a step in the right direction, but we also need to have the appropriate platforms depend'ing on TOOLS_LIBCRYPTO and updating the help to note that some platforms require it as well, to build their images. I did not intend for TOOLS_LIBCRYPTO to be used beyond an on/off toggle for the user. My suggestion is to allow platforms to build irrespective of TOOLS_LIBCRYPTO, and print a warning if for some reason we can't generate a bootable image. I see quite a few ARMv8 platforms throw such warnings on gitlab-ci. We can compile an elf, right? Any good reason why kwbimage should be different? Alex
Re: [RFC PATCH v3 1/5] imx8m: drop env_get_location for imx8mn and imx8mp
On Tue, Jan 11, 2022 at 09:35:54AM +, Teresa Remmet wrote:
> Hello Tommaso,
>
> Am Samstag, dem 08.01.2022 um 20:08 +0100 schrieb Tommaso Merciai:
> > On Tue, Jan 04, 2022 at 11:04:10AM +, Teresa Remmet wrote:
> > > Hello Tommaso,
> > >
> > > Am Samstag, dem 25.12.2021 um 21:25 +0100 schrieb Tommaso Merciai:
> > > > This function defined for two architecture is not really generic
> > > > and can generate problem when people add a new board.
> > > >
> > > > Signed-off-by: Tommaso Merciai
> > > > ---
> > > > arch/arm/mach-imx/imx8m/soc.c | 39 ---
> > > >
> > > >
> > > > 1 file changed, 39 deletions(-)
> > > >
> > > > diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-
> > > > imx/imx8m/soc.c
> > > > index 863508776d..f0030a557a 100644
> > > > --- a/arch/arm/mach-imx/imx8m/soc.c
> > > > +++ b/arch/arm/mach-imx/imx8m/soc.c
> > > > @@ -1313,45 +1313,6 @@ void do_error(struct pt_regs *pt_regs,
> > > > unsigned int esr)
> > > > #endif
> > > >
> > > > #if defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP)
> > > > -enum env_location env_get_location(enum env_operation op, int
> > > > prio)
> > > > -{
> > > > - enum boot_device dev = get_boot_device();
> > > > - enum env_location env_loc = ENVL_UNKNOWN;
> > > > -
> > > > - if (prio)
> > > > - return env_loc;
> > > > -
> > > > - switch (dev) {
> > > > -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> > > > - case QSPI_BOOT:
> > > > - env_loc = ENVL_SPI_FLASH;
> > > > - break;
> > > > -#endif
> > > > -#ifdef CONFIG_ENV_IS_IN_NAND
> > > > - case NAND_BOOT:
> > > > - env_loc = ENVL_NAND;
> > > > - break;
> > > > -#endif
> > > > -#ifdef CONFIG_ENV_IS_IN_MMC
> > > > - case SD1_BOOT:
> > > > - case SD2_BOOT:
> > > > - case SD3_BOOT:
> > > > - case MMC1_BOOT:
> > > > - case MMC2_BOOT:
> > > > - case MMC3_BOOT:
> > > > - env_loc = ENVL_MMC;
> > > > - break;
> > > > -#endif
> > > > - default:
> > > > -#if defined(CONFIG_ENV_IS_NOWHERE)
> > > > - env_loc = ENVL_NOWHERE;
> > > > -#endif
> > > > - break;
> > > > - }
> > > > -
> > > > - return env_loc;
> > > > -}
> > > > -
> > > > #ifndef ENV_IS_EMBEDDED
> > > > long long env_get_offset(long long defautl_offset)
> > >
> > > would it not make sense to move also env_get_offset() to board
> > > level?
> >
> > Hi Teresa,
> > I think is better to put this function at board level. In this way
> > others boards that use i.MX8MN/i.MX8MM SOC can customize
> > env_get_location
> > function. For example: maybe one user want store U-Boot env on a
> > device
> > other than the boot device.
>
> Michael send a patch to remove the function. Which I missed. See:
> https://lore.kernel.org/u-boot/2027143456.34441-1-mich...@amarulasolutions.com/
>
> So everything is fine then.
>
> Thanks,
> Teresa
Hi Teresa,
Perfect.
Thanks,
Tommaso
>
> >
> > Tommaso
> > > Regards,
> > > Teresa
> > >
> > >
> > > > {
> > > --
> > > PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz,
> > > Germany
> > >
> > > Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber
> > > |
> > > Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr.
> > > 266500608, DE
> > > 149059855
> --
> PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz, Germany
>
> Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber |
> Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE
> 149059855
Re: [PATCH] mkimage: fix segfault on MacOS arm64
On 2 Dec 2021, at 22:16, Sergey V. Lobanov wrote:
>
> mkimage segfaults due ASLR mechasim on MacOS arm64
>
> It is required to use _dyld_get_image_vmaddr_slide()
> to prevent segfault on MacOS arm64
>
> This patch ased on the discussion
> https://github.com/u-boot/u-boot/commit/3b142045e8a7f0ab17b6099e9226296af45967d0
>
> Thanks to Ronny Kotzschmar and ptpt52 github user
>
> Signed-off-by: Sergey V. Lobanov
> ---
> tools/imagetool.h | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/tools/imagetool.h b/tools/imagetool.h
> index e229a34ffc..13775ff9b3 100644
> --- a/tools/imagetool.h
> +++ b/tools/imagetool.h
> @@ -271,11 +271,16 @@ int rockchip_copy_image(int fd, struct
> image_tool_params *mparams);
> * b) we need a API call to get the respective section symbols */
> #if defined(__MACH__)
> #include
> +#include
>
> -#define INIT_SECTION(name) do { \
> +#define INIT_SECTION(name) struct image_type_params\
> + **__cat(__start_, name), **__cat(__stop_, name);\
This change alters the interface of INIT_SECTION. Previously it was
just required that something had called it before you referenced the
start/stop symbols. Now there are two things going on:
1. Any references have to be in a scope that can see the INIT_SECTION
call.
2. This is no longer a single statement, so
if (foo)
INIT_SECTION(name);
breaks.
I don’t see why this change is needed, either. It should still be
idempotent to set the global multiple times even after your change to
add the base address, since that is done to the temporary local
variable.
> + do {\
> unsigned long name ## _len; \
> char *__cat(pstart_, name) = getsectdata("__DATA", \
> #name, &__cat(name, _len)); \
> + __cat(pstart_, name) += \
> + _dyld_get_image_vmaddr_slide(0);\
Your formatting here is broken, you have an extra tab on both lines.
Jess
> char *__cat(pstop_, name) = __cat(pstart_, name) + \
> __cat(name, _len); \
> __cat(__start_, name) = (void *)__cat(pstart_, name); \
> @@ -283,7 +288,6 @@ int rockchip_copy_image(int fd, struct image_tool_params
> *mparams);
> } while (0)
> #define SECTION(name) __attribute__((section("__DATA, " #name)))
>
> -struct image_type_params **__start_image_type, **__stop_image_type;
> #else
> #define INIT_SECTION(name) /* no-op for ELF */
> #define SECTION(name) __attribute__((section(#name)))
> --
> 2.30.1 (Apple Git-130)
Re: [PATCH 1/1] sandbox: compatibility of os_get_filesize()
On Tue, 2022-01-11 at 01:50, Heinrich Schuchardt wrote:
> U-Boot define loff_t as long long. But the header
> /usr/include/linux/types.h may not define it.
> This has lead to a build error on Alpine Linux.
>
> So let's use long long instead of loff_t for
> the size parameter of function os_get_filesize().
>
> Reported-by: Milan P. Stanić
> Signed-off-by: Heinrich Schuchardt
Tested-by: Milan P. Stanić
> ---
> arch/sandbox/cpu/os.c | 10 --
> include/os.h | 2 +-
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c
> index 6837bfceaf..40ebe322ae 100644
> --- a/arch/sandbox/cpu/os.c
> +++ b/arch/sandbox/cpu/os.c
> @@ -624,7 +624,13 @@ const char *os_dirent_get_typename(enum os_dirent_t type)
> return os_dirent_typename[OS_FILET_UNKNOWN];
> }
>
> -int os_get_filesize(const char *fname, loff_t *size)
> +/*
> + * For compatibility reasons avoid loff_t here.
> + * U-Boot defines loff_t as long long.
> + * But /usr/include/linux/types.h may not define it at all.
> + * Alpine Linux being one example.
> + */
> +int os_get_filesize(const char *fname, long long *size)
> {
> struct stat buf;
> int ret;
> @@ -667,7 +673,7 @@ int os_read_ram_buf(const char *fname)
> {
> struct sandbox_state *state = state_get_current();
> int fd, ret;
> - loff_t size;
> + long long size;
>
> ret = os_get_filesize(fname, &size);
> if (ret < 0)
> diff --git a/include/os.h b/include/os.h
> index 4cbcbd93a7..10e198cf50 100644
> --- a/include/os.h
> +++ b/include/os.h
> @@ -266,7 +266,7 @@ const char *os_dirent_get_typename(enum os_dirent_t type);
> * @size:size of file is returned if no error
> * Return: 0 on success or -1 if an error ocurred
> */
> -int os_get_filesize(const char *fname, loff_t *size);
> +int os_get_filesize(const char *fname, long long *size);
>
> /**
> * os_putc() - write a character to the controlling OS terminal
> --
> 2.33.1
>
Re: imx: imx8mm: imx8mm-kontron-n801x-s: does not start work
On Tue, Jan 11, 2022 at 1:18 AM Heiko Thiery wrote:
>
> Hi all,
>
> I wanted to test the newly introduced kontron-sl-mx8mm_defconfig but
> it does not work.
>
> I already found two converted config options that are missing in that
> defconfig:
>
> +CONFIG_SPL_MMC=y
> +CONFIG_SPL_SERIAL=y
>
> With that the output appears but the u-boot hangs when trying to find
> the binman node in the dtb.
>
> --- >8
> U-Boot SPL 2022.01-00323-g56915a34d1 (Jan 11 2022 - 08:11:03 +0100)
> Kontron SL i.MX8MM (N801X) module, 1 GB RAM detected
> Touch controller detected, assuming LVDS panel...
> Normal Boot
> WDT: Not starting watchdog@3028
> Trying to boot from MMC2
> NOTICE: BL31: v2.4(release):v2.4
> NOTICE: BL31: Built : 09:46:16, Jan 10 2022
>
>
> U-Boot 2022.01-00323-g56915a34d1 (Jan 11 2022 - 08:11:03 +0100)
>
> CPU: Freescale i.MX8MMQ rev1.0 1600 MHz (running at 1200 MHz)
> CPU: Industrial temperature grade (-40C to 105C) at 47C
> Reset cause: POR
> Model: Kontron i.MX8MM N801X S LVDS
> DRAM: 1 GiB
> binman_init failed:-2
> initcall sequence 7ffcef80 failed at call 4021f200 (err=-2)
> ### ERROR ### Please RESET the board ###
> --- >8
>
> Does anyone have an idea what goes wrong?
I did a diff on your defconfig and compared it to the imx8mm_beacon
board, and there are few items that are different, but nothing
obvious. I confirmed the Beacon board does boot. You might want to
compare your defconfig files with other boards to see if you see
something.
One main difference is that I have only one DTB file integrated into
the FIT file, but you have several. I wonder if that is causing
issues.
adam
>
> I already disabled BINMAN_FDT an the u-boot start but when printing
> the fdt node I do not see the binman node:
>
> >8
>
> => fdt addr $fdtcontroladdr
> => fdt list
> / {
> interrupt-parent = <0x0001>;
> #address-cells = <0x0002>;
> #size-cells = <0x0002>;
> model = "Kontron i.MX8MM N801X S LVDS";
> compatible = "kontron,imx8mm-n801x-s-lvds", "fsl,imx8mm";
> fit-images {
> };
> aliases {
> };
> cpus {
> };
> opp-table {
> };
> clock-osc-32k {
> };
> clock-osc-24m {
> };
> clock-ext1 {
> };
> clock-ext2 {
> };
> clock-ext3 {
> };
> clock-ext4 {
> };
> psci {
> };
> pmu {
> };
> timer {
> };
> thermal-zones {
> };
> usbphynop1 {
> };
> usbphynop2 {
> };
> soc@0 {
> };
> memory@4000 {
> };
> chosen {
> };
> clock-osc-can {
> };
> leds {
> };
> pwm-beeper {
> };
> regulator-rst-eth2 {
> };
> regulator-5v {
> };
> backlight {
> };
> regpanel-pwr {
> };
> regpanel-rst {
> };
> regpanel-stby {
> };
> regpanel-hinv {
> };
> regpanel-vinv {
> };
> regulator-24v {
> };
> };
> =>
>
> >8
>
> Thanks
> --
> Heiko
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On Tue, Jan 11, 2022 at 07:58:05PM +0100, Marek Vasut wrote: > On 1/11/22 17:16, Tom Rini wrote: > > On Tue, Jan 11, 2022 at 04:36:34PM +0100, Pali Rohár wrote: > > > On Tuesday 11 January 2022 16:31:20 Marek Vasut wrote: > > > > The kwbimage has hard dependency on OpenSSL, do not build it > > > > in case TOOLS_LIBCRYPTO is disabled. > > > > > > This patch does not work as kwbimage is required for 32-bit Armada > > > platforms. So kwbimage.o cannot be disabled on these platforms. > > > > > > There is already proposal for fixing this issue: > > > https://patchwork.ozlabs.org/project/uboot/patch/20211021093304.25399-1-p...@kernel.org/ > > > > And needs to be respun to not have Kconfig issues. To answer something > > noted in that thread, yes, it would be good if Kconfig did, or had an > > option to make WARNING like that fatal. Or is the problem really that > > no, it's non-optional, really, to have OpenSSL installed? > > OpenSSL should be optional, I got this bug report where someone tried to > build u-boot on ancient debian oldoldstable with openssl 1.1.0 (without > ecdsa support), for a platform which doesn't need any of this crypto stuff. > So, disabling TOOLS_LIBCRYPTO was a sufficient for that platform to build in > that setup (with this patch). And there are plenty of such platforms in the > U-Boot tree (all that are not marvell I think). Right. So your patch is a step in the right direction, but we also need to have the appropriate platforms depend'ing on TOOLS_LIBCRYPTO and updating the help to note that some platforms require it as well, to build their images. -- Tom signature.asc Description: PGP signature
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On 1/11/22 17:16, Tom Rini wrote: On Tue, Jan 11, 2022 at 04:36:34PM +0100, Pali Rohár wrote: On Tuesday 11 January 2022 16:31:20 Marek Vasut wrote: The kwbimage has hard dependency on OpenSSL, do not build it in case TOOLS_LIBCRYPTO is disabled. This patch does not work as kwbimage is required for 32-bit Armada platforms. So kwbimage.o cannot be disabled on these platforms. There is already proposal for fixing this issue: https://patchwork.ozlabs.org/project/uboot/patch/20211021093304.25399-1-p...@kernel.org/ And needs to be respun to not have Kconfig issues. To answer something noted in that thread, yes, it would be good if Kconfig did, or had an option to make WARNING like that fatal. Or is the problem really that no, it's non-optional, really, to have OpenSSL installed? OpenSSL should be optional, I got this bug report where someone tried to build u-boot on ancient debian oldoldstable with openssl 1.1.0 (without ecdsa support), for a platform which doesn't need any of this crypto stuff. So, disabling TOOLS_LIBCRYPTO was a sufficient for that platform to build in that setup (with this patch). And there are plenty of such platforms in the U-Boot tree (all that are not marvell I think).
Re: [PATCH v2 3/3] misc: atsha204a: fix i2c address readout from DTS
On Tue, 11 Jan 2022 19:05:31 +0100 Adrian Fiergolski wrote: > This patch replaces use fdtdec_get_addr with simpler dev_read_addr(). > fdtdec_get_addr doesn't work properly on ZynqMP-based (64bit) system. Although > not confirmed, it could be related to the fact, that quoting the > documentation, > "This variant hard-codes the number of cells used to represent the address and > size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)". > > Signed-off-by: Adrian Fiergolski Reviewed-by: Marek Behún
Re: [PATCH v2 2/3] misc: atsha204a: add delay after sending the message
On Tue, 11 Jan 2022 19:05:30 +0100 Adrian Fiergolski wrote: > Once request is sent, and before receiving a response, the delay is required. > This patch fixes missing delay for before first response try. > > Signed-off-by: Adrian Fiergolski Reviewed-by: Marek Behún
Re: [PATCH v2 1/3] misc: atsha204a: return timeout from wakeup function
On Tue, 11 Jan 2022 19:05:29 +0100 Adrian Fiergolski wrote: > If the maximum number of wake-up attempts is exceeded, return -ETIMEDOUT. > > Signed-off-by: Adrian Fiergolski Reviewed-by: Marek Behún
[PATCH v3] net: fsl: Fix busy flag polling register
NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
Interface usage", specifies to poll the BSY (0) bit in the CFG/STAT
register to wait until a transaction has finished, not bit 31 in the
data register.
In the Linux kernel, this has already been fixed in commit 26eee0210ad7
("net/fsl: fix a bug in xgmac_mdio").
This patch changes the register in the fman_mdio and fsl_ls_mdio
drivers.
As the MDIO_DATA_BSY define is no longer in use, this patch also removes
its definition from the fsl_memac header.
Signed-off-by: Markus Koch
---
v1->v2:
* Fix register
v2->v3:
* Also apply fix to fsl_ls_mdio
* Add note about define-removal in commit message
Thanks, Camelia!
drivers/net/fm/memac_phy.c | 2 +-
drivers/net/fsl_ls_mdio.c | 4 ++--
include/fsl_memac.h| 1 -
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index 72b500a6d1..3ddae97e09 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -64,7 +64,7 @@ static int memac_wait_until_done(struct memac_mdio_controller
*regs)
{
unsigned int timeout = MAX_NUM_RETRIES;
- while ((memac_in_32(®s->mdio_data) & MDIO_DATA_BSY) && timeout--)
+ while ((memac_in_32(®s->mdio_stat) & MDIO_STAT_BSY) && timeout--)
;
if (!timeout) {
diff --git a/drivers/net/fsl_ls_mdio.c b/drivers/net/fsl_ls_mdio.c
index 6d4e682fdf..f213e0dd85 100644
--- a/drivers/net/fsl_ls_mdio.c
+++ b/drivers/net/fsl_ls_mdio.c
@@ -84,7 +84,7 @@ static int dm_fsl_ls_mdio_read(struct udevice *dev, int addr,
memac_out_32(®s->mdio_ctl, mdio_ctl);
/* Wait till the MDIO write is complete */
- while ((memac_in_32(®s->mdio_data)) & MDIO_DATA_BSY)
+ while ((memac_in_32(®s->mdio_stat)) & MDIO_STAT_BSY)
;
/* Return all Fs if nothing was there */
@@ -107,7 +107,7 @@ static int dm_fsl_ls_mdio_write(struct udevice *dev, int
addr, int devad,
memac_out_32(®s->mdio_data, MDIO_DATA(val));
/* Wait till the MDIO write is complete */
- while ((memac_in_32(®s->mdio_data)) & MDIO_DATA_BSY)
+ while ((memac_in_32(®s->mdio_stat)) & MDIO_STAT_BSY)
;
return 0;
diff --git a/include/fsl_memac.h b/include/fsl_memac.h
index d067f1511c..6ac1e558b9 100644
--- a/include/fsl_memac.h
+++ b/include/fsl_memac.h
@@ -254,7 +254,6 @@ struct memac_mdio_controller {
#define MDIO_CTL_READ (1 << 15)
#define MDIO_DATA(x) (x & 0x)
-#define MDIO_DATA_BSY (1 << 31)
struct fsl_enet_mac;
--
2.34.1
Re: [PATCH 1/1] sandbox: compatibility of os_get_filesize()
On Mon, 10 Jan 2022 at 17:50, Heinrich Schuchardt wrote: > > U-Boot define loff_t as long long. But the header > /usr/include/linux/types.h may not define it. > This has lead to a build error on Alpine Linux. > > So let's use long long instead of loff_t for > the size parameter of function os_get_filesize(). > > Reported-by: Milan P. Stanić > Signed-off-by: Heinrich Schuchardt > --- > arch/sandbox/cpu/os.c | 10 -- > include/os.h | 2 +- > 2 files changed, 9 insertions(+), 3 deletions(-) Reviewed-by: Simon Glass
[PATCH v2 2/2] doc: board: avoid ambiguous names for axy17lte
Model names are SM-A{3,5,7}20, just SM-{3,5,7}20 could also refer to
SM-J{3,5,7}20 or SM-T{3,5,7}20.
Also fix a5y17lte->a7y17lte for SM-A720.
Fixes: 3e2095e960b4 ("board: samsung: add support for Galaxy A series
of 2017 (a5y17lte)")
Signed-off-by: Henrik Grimler
Reviewed-by: Dzmitry Sankouski
---
Changes since v1: fix a5y17lte->a7y17lte, pointed out by Dzmitry, and
add reviewed-by tag.
---
doc/board/samsung/axy17lte.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/doc/board/samsung/axy17lte.rst b/doc/board/samsung/axy17lte.rst
index 511cd57a22f5..b13a19af8a35 100644
--- a/doc/board/samsung/axy17lte.rst
+++ b/doc/board/samsung/axy17lte.rst
@@ -14,7 +14,7 @@ It is loaded as an Android boot image through SBOOT.
Phone specs
---
-A3 (SM-320) (a3y17lte)
+A3 (SM-A320) (a3y17lte)
^^
- 4.7 AMOLED display
- Exynos 7870 SoC
@@ -23,7 +23,7 @@ A3 (SM-320) (a3y17lte)
.. A3 2017 wiki page: https://en.wikipedia.org/wiki/Samsung_Galaxy_A3_(2017)
-A5 (SM-520) (a5y17lte)
+A5 (SM-A520) (a5y17lte)
^^
- 5.2 AMOLED display
- Exynos 7880 SoC
@@ -32,7 +32,7 @@ A5 (SM-520) (a5y17lte)
.. A5 2017 wiki page: https://en.wikipedia.org/wiki/Samsung_Galaxy_A5_(2017)
-A7 (SM-720) (a5y17lte)
+A7 (SM-A720) (a7y17lte)
^^
- 5.7 AMOLED display
- Exynos 7880 SoC
--
2.34.1
[PATCH v2 1/2] board: samsung: fix menu entries for a{3,7}y17lte
a7y17lte is called SM-A720F, and a3y17lte SM-A320F. a3y17lte also
should select PINCTRL_EXYNOS78x0, not the (non-existent)
PINCTRL_EXYNOS7880, and it has an Exynos 7870 SoC and not 7880.
Fixes: 3e2095e960b4 ("board: samsung: add support for Galaxy A series
of 2017 (a5y17lte)")
Signed-off-by: Henrik Grimler
Reviewed-by: Dzmitry Sankouski
---
Changes since v1: none, added Dzmitry's reviewed-by tag.
---
arch/arm/mach-exynos/Kconfig | 6 +++---
board/samsung/axy17lte/Kconfig | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 7f3aee571290..32b81728c389 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -161,7 +161,7 @@ config TARGET_A5Y17LTE
select SUPPORT_SPL
config TARGET_A7Y17LTE
- bool "Samsung SM-A520F board"
+ bool "Samsung SM-A720F board"
select ARM64
select CLK_EXYNOS
select OF_CONTROL
@@ -170,12 +170,12 @@ config TARGET_A7Y17LTE
select SUPPORT_SPL
config TARGET_A3Y17LTE
- bool "Samsung SM-A520F board"
+ bool "Samsung SM-A320F board"
select ARM64
select CLK_EXYNOS
select OF_CONTROL
select PINCTRL
- select PINCTRL_EXYNOS7880
+ select PINCTRL_EXYNOS78x0
select SUPPORT_SPL
endchoice
diff --git a/board/samsung/axy17lte/Kconfig b/board/samsung/axy17lte/Kconfig
index 2abf8e7acfca..a018547ff5d4 100644
--- a/board/samsung/axy17lte/Kconfig
+++ b/board/samsung/axy17lte/Kconfig
@@ -27,7 +27,7 @@ if TARGET_A7Y17LTE
config SYS_BOARD
default "axy17lte"
help
- a5y17lte is a production board for SM-A520F phone on Exynos7880 SoC.
+ a7y17lte is a production board for SM-A720F phone on Exynos7880 SoC.
config SYS_VENDOR
default "samsung"
@@ -44,7 +44,7 @@ if TARGET_A3Y17LTE
config SYS_BOARD
default "axy17lte"
help
- a3y17lte is a production board for SM-A520F phone on Exynos7880 SoC.
+ a3y17lte is a production board for SM-A320F phone on Exynos7870 SoC.
config SYS_VENDOR
default "samsung"
base-commit: a14af7216a220fe8f1b2a5308ed632abe6f9f97f
--
2.34.1
[PATCH v2 3/3] misc: atsha204a: fix i2c address readout from DTS
This patch replaces use fdtdec_get_addr with simpler dev_read_addr().
fdtdec_get_addr doesn't work properly on ZynqMP-based (64bit) system. Although
not confirmed, it could be related to the fact, that quoting the documentation,
"This variant hard-codes the number of cells used to represent the address and
size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)".
Signed-off-by: Adrian Fiergolski
---
drivers/misc/atsha204a-i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c
index d264477927..b89463babb 100644
--- a/drivers/misc/atsha204a-i2c.c
+++ b/drivers/misc/atsha204a-i2c.c
@@ -388,7 +388,7 @@ static int atsha204a_of_to_plat(struct udevice *dev)
fdt_addr_t *priv = dev_get_priv(dev);
fdt_addr_t addr;
- addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
+ addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE) {
debug("Can't get ATSHA204A I2C base address\n");
return -ENXIO;
--
2.34.1
[PATCH v2 2/3] misc: atsha204a: add delay after sending the message
Once request is sent, and before receiving a response, the delay is required.
This patch fixes missing delay for before first response try.
Signed-off-by: Adrian Fiergolski
---
drivers/misc/atsha204a-i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c
index 9d069fb33c..d264477927 100644
--- a/drivers/misc/atsha204a-i2c.c
+++ b/drivers/misc/atsha204a-i2c.c
@@ -280,6 +280,7 @@ static int atsha204a_transaction(struct udevice *dev,
struct atsha204a_req *req,
}
do {
+ udelay(ATSHA204A_EXECTIME);
res = atsha204a_recv_resp(dev, resp);
if (!res || res == -EMSGSIZE || res == -EBADMSG)
break;
@@ -287,7 +288,6 @@ static int atsha204a_transaction(struct udevice *dev,
struct atsha204a_req *req,
debug("ATSHA204A transaction polling for response "
"(timeout = %d)\n", timeout);
- udelay(ATSHA204A_EXECTIME);
timeout -= ATSHA204A_EXECTIME;
} while (timeout > 0);
--
2.34.1
[PATCH v2 1/3] misc: atsha204a: return timeout from wakeup function
If the maximum number of wake-up attempts is exceeded, return -ETIMEDOUT.
Signed-off-by: Adrian Fiergolski
---
drivers/misc/atsha204a-i2c.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c
index 715dabb279..9d069fb33c 100644
--- a/drivers/misc/atsha204a-i2c.c
+++ b/drivers/misc/atsha204a-i2c.c
@@ -240,10 +240,10 @@ int atsha204a_wakeup(struct udevice *dev)
}
debug("success\n");
- break;
+ return 0;
}
- return 0;
+ return -ETIMEDOUT;
}
int atsha204a_idle(struct udevice *dev)
--
2.34.1
[PATCH v2 0/3] misc: atsha204a: bug fixes
Series of patches fixing atsha204a driver. Partially inspired by Enclustra's repo [1]. [1] https://github.com/enclustra-bsp/xilinx-uboot Adrian Fiergolski (3): misc: atsha204a: return timeout from wakeup function misc: atsha204a: add delay after sending the message misc: atsha204a: fix i2c address readout from DTS drivers/misc/atsha204a-i2c.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.34.1
[PATCH 2/2 v2] board: starqltechn: get board usable - fix defconfig and strip config options
- add FIT image support - increase LMB_MAX_REGIONS, to store all linux dtb reserved memory regions - add linux kernel image header Uart driver causes hang, when u-boot is used in android boot image instead of linux. Temporary disable console driver, until investigated and fixed. Signed-off-by: Dzmitry Sankouski Cc: Ramon Fried Cc: Tom Rini --- Changes for v2: - replace 'n' options with 'is not set' - remove comment from defconfig file configs/starqltechn_defconfig | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index f57bb859cc..fa2eebecd7 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -2,13 +2,14 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_SNAPDRAGON=y -CONFIG_SYS_TEXT_BASE=0x8000 -CONFIG_SYS_MALLOC_LEN=0x81f000 CONFIG_DEFAULT_DEVICE_TREE="starqltechn" +CONFIG_BOOTDELAY=0 +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_TARGET_STARQLTECHN=y CONFIG_IDENT_STRING="\nSamsung S9 SM-G9600" CONFIG_SYS_LOAD_ADDR=0x8000 -CONFIG_USE_PREBOOT=y +CONFIG_LMB_MAX_REGIONS=64 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y @@ -20,5 +21,7 @@ CONFIG_PM8916_GPIO=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_PM8916=y -CONFIG_MSM_GENI_SERIAL=y +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +# CONFIG_MSM_GENI_SERIAL is not set CONFIG_SPMI_MSM=y +CONFIG_LINUX_KERNEL_IMAGE_HEADER=y -- 2.20.1
[PATCH 1/2 v2] soc: sdm845: implement ABL info collecting, add bootcommand and usage doc
U-boot is intended to replace linux kernel in android boot image, and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `abl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `abl_initrd_start_addr`
In this way, u-boot bootcmd relies on `abl_initrd_start_addr` env variable,
and boils down to `bootm $abl_initrd_start_addr`. If more control on
boot process is desired, pack a boot script in FIT image, and put it to
default configuration
Signed-off-by: Dzmitry Sankouski
Cc: Ramon Fried
Cc: Tom Rini
---
Changes for v2:
- Fix compilation warnings
arch/arm/mach-snapdragon/init_sdm845.c | 60
doc/board/qualcomm/sdm845.rst | 63 +-
include/configs/sdm845.h | 5 ++
3 files changed, 116 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-snapdragon/init_sdm845.c
b/arch/arm/mach-snapdragon/init_sdm845.c
index 5f53c21947..417a928b50 100644
--- a/arch/arm/mach-snapdragon/init_sdm845.c
+++ b/arch/arm/mach-snapdragon/init_sdm845.c
@@ -7,6 +7,7 @@
#include
#include
+#include
#include
#include
#include
@@ -14,6 +15,14 @@
DECLARE_GLOBAL_DATA_PTR;
+static ulong fdt_addr __section(".data");
+
+void save_boot_params(ulong r0)
+{
+ fdt_addr = r0;
+ save_boot_params_ret();
+}
+
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
@@ -29,8 +38,33 @@ __weak int board_init(void)
return 0;
}
-/* Check for vol- and power buttons */
-__weak int misc_init_r(void)
+void set_abl_env(void)
+{
+ const void *fdt_blob;
+ int node, ret;
+ ulong initrd_start_prop;
+
+ ret = env_set_addr("abl_fdt_addr", (void *)fdt_addr);
+ if (ret < 0) {
+ printf("Failed to set abl device tree address\n");
+ return;
+ }
+
+ fdt_blob = (void *)fdt_addr;
+ node = fdt_path_offset(fdt_blob, "/chosen");
+ if (!node) {
+ printf("Chosen node not found in device tree at addr: 0x%lx\n",
fdt_addr);
+ return;
+ }
+ initrd_start_prop = fdtdec_get_addr(fdt_blob, node,
"linux,initrd-start");
+ if (!initrd_start_prop) {
+ printf("linux,initrd-start property is not set\n");
+ return;
+ }
+ env_set_addr("abl_initrd_start_addr", (void *)initrd_start_prop);
+}
+
+void read_pressed_keys(void)
{
struct udevice *pon;
struct gpio_desc resin;
@@ -39,19 +73,19 @@ __weak int misc_init_r(void)
ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8998_pon@800", &pon);
if (ret < 0) {
printf("Failed to find PMIC pon node. Check device tree\n");
- return 0;
+ return;
}
node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
- "key_vol_down");
+ "key_vol_down");
if (node < 0) {
printf("Failed to find key_vol_down node. Check device tree\n");
- return 0;
+ return;
}
if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
+ &resin, 0)) {
printf("Failed to request key_vol_down button.\n");
- return 0;
+ return;
}
if (dm_gpio_get_value(&resin)) {
env_set("key_vol_down", "1");
@@ -64,12 +98,12 @@ __weak int misc_init_r(void)
"key_power");
if (node < 0) {
printf("Failed to find key_power node. Check device tree\n");
- return 0;
+ return;
}
if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
+ &resin, 0)) {
printf("Failed to request key_power button.\n");
- return 0;
+ return;
}
if (dm_gpio_get_value(&resin)) {
env_set("key_power", "1");
@@ -77,6 +111,12 @@ __weak int misc_init_r(void)
} else {
env_set("key_power", "0");
}
+}
+
+__weak int misc_init_r(void)
+{
+ set_abl_env();
+ read_pressed_keys();
return 0;
}
diff --git a/doc/board/qualcomm/sdm845.rst b/doc/board/qualcomm/sdm845.rst
index cd46cbe9cf..e14fd05118 100644
--- a/doc/board/qualcomm/sdm845.rst
+++ b/doc/board/qualcomm/sdm845.rst
@@ -13,11 +13,27 @@ SDM845 - hi-end qualcomm chip, introduced in late 2017.
Mostly used in flagship phones and tablets of 2018.
U-Boot c
[PATCH 0/2] get sdm845 boards u-boot usable as a secondary bootloader
U-boot is intended to replace linux kernel in android boot image(ABL), and it's FIT payload to replace initramfs file. The boot process is similar to boot image with linux: - android bootloader (ABL) unpacks android boot image - ABL sets `linux,initrd-start property` in chosen node in unpacked FDT - ABL sets x0 register to FDT address, and passes control to u-boot - u-boot reads x0 register, and stores it in `abl_fdt_addr` env variable - u-boot reads `linux,initrd-start` property, and stores it in `abl_initrd_start_addr` In this way, u-boot bootcmd relies on `abl_initrd_start_addr` env variable, and boils down to `bootm $abl_initrd_start_addr`. If more control on boot process is desired, pack a boot script in FIT image, and put it to default configuration Dzmitry Sankouski (2): soc: sdm845: implement ABL info collecting, add bootcommand and usage doc board: starqltechn: get board usable - fix defconfig and strip config options arch/arm/mach-snapdragon/init_sdm845.c | 60 configs/starqltechn_defconfig | 12 +++-- doc/board/qualcomm/sdm845.rst | 63 +- include/configs/sdm845.h | 5 ++ 4 files changed, 124 insertions(+), 16 deletions(-) -- 2.20.1
Re: [PATCH 3/3] misc: atsha204a: fix i2c address readout from DTS
Hi Marek, Thank you for your review. On 21.12.2021 18:52, Marek Behún wrote: On Tue, 21 Dec 2021 17:17:22 +0100 Adrian Fiergolski wrote: This patch replaces use fdtdec_get_addr with recommended fdtdec_get_addr_size_auto_parent. And why is that required? I didn't debug why exactly, but it didn't work with my embedded system based on ZynqMP (64bit). I might guess it's related to the fact that, quoting documentation, "This variant hard-codes the number of cells used to represent the address and size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)". If at all, I would rather change it to simple dev_read_addr(). Good idea, it's much cleaner. I have just confirmed it works as well. I will share the new version of the patches. Adrian
Re: [PATCH 1/2] board: samsung: fix menu entries for a{3,7}y17lte
Reviewed-by: Dzmitry Sankouski
пт, 7 янв. 2022 г. в 22:14, Henrik Grimler :
> a7y17lte is called SM-A720F, and a3y17lte SM-A320F. a3y17lte also
> should select PINCTRL_EXYNOS78x0, not the (non-existent)
> PINCTRL_EXYNOS7880, and it has an Exynos 7870 SoC and not 7880.
>
> Fixes: 3e2095e960b4 ("board: samsung: add support for Galaxy A series
> of 2017 (a5y17lte)")
> Signed-off-by: Henrik Grimler
> ---
> arch/arm/mach-exynos/Kconfig | 6 +++---
> board/samsung/axy17lte/Kconfig | 4 ++--
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index 7f3aee571290..32b81728c389 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -161,7 +161,7 @@ config TARGET_A5Y17LTE
> select SUPPORT_SPL
>
> config TARGET_A7Y17LTE
> - bool "Samsung SM-A520F board"
> + bool "Samsung SM-A720F board"
> select ARM64
> select CLK_EXYNOS
> select OF_CONTROL
> @@ -170,12 +170,12 @@ config TARGET_A7Y17LTE
> select SUPPORT_SPL
>
> config TARGET_A3Y17LTE
> - bool "Samsung SM-A520F board"
> + bool "Samsung SM-A320F board"
> select ARM64
> select CLK_EXYNOS
> select OF_CONTROL
> select PINCTRL
> - select PINCTRL_EXYNOS7880
> + select PINCTRL_EXYNOS78x0
> select SUPPORT_SPL
>
> endchoice
> diff --git a/board/samsung/axy17lte/Kconfig
> b/board/samsung/axy17lte/Kconfig
> index 2abf8e7acfca..a018547ff5d4 100644
> --- a/board/samsung/axy17lte/Kconfig
> +++ b/board/samsung/axy17lte/Kconfig
> @@ -27,7 +27,7 @@ if TARGET_A7Y17LTE
> config SYS_BOARD
> default "axy17lte"
> help
> - a5y17lte is a production board for SM-A520F phone on Exynos7880
> SoC.
> + a7y17lte is a production board for SM-A720F phone on Exynos7880
> SoC.
>
> config SYS_VENDOR
> default "samsung"
> @@ -44,7 +44,7 @@ if TARGET_A3Y17LTE
> config SYS_BOARD
> default "axy17lte"
> help
> - a3y17lte is a production board for SM-A520F phone on Exynos7880
> SoC.
> + a3y17lte is a production board for SM-A320F phone on Exynos7870
> SoC.
>
> config SYS_VENDOR
> default "samsung"
>
> base-commit: a14af7216a220fe8f1b2a5308ed632abe6f9f97f
> --
> 2.34.1
>
>
[PATCH] cmd: bcb: fix bcb struct alignment issue
Without this patch the bcb struct could be located at an odd address
which resulted in data not being copied to the buffer.
Here was the repro steps (from Mattijs):
=> mmc dev 1
=> bcb load 1 misc
=> bcb dump command
: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=> part start mmc 1 misc misc_start
=> mmc read ${loadaddr} ${misc_start} 4
=> bcb load 1 misc
=> bcb dump command
: 62 6f 6f 74 6f 6e 63 65 2d 62 6f 6f 74 6c 6f 61
0010: 64 65 72 00 00 00 00 00 00 00 00 00 00 00 00 00
This behavior was observed on an Amlogic A311D (ARM64) platform with a
recent GCC toolchain (11.2.0) but is most likely affecting other
platforms.
To avoid issues the structure is aligned on DMA minimum alignment value
as it is passed directly to the read function.
Signed-off-by: Gary Bisson
---
cmd/bcb.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/cmd/bcb.c b/cmd/bcb.c
index 6b6f1e9a2f1..92f4d27990d 100644
--- a/cmd/bcb.c
+++ b/cmd/bcb.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
enum bcb_cmd {
BCB_CMD_LOAD,
@@ -24,7 +25,7 @@ enum bcb_cmd {
static int bcb_dev = -1;
static int bcb_part = -1;
-static struct bootloader_message bcb = { { 0 } };
+static struct bootloader_message bcb __aligned(ARCH_DMA_MINALIGN) = { { 0 } };
static int bcb_cmd_get(char *cmd)
{
--
2.34.1
[PATCH] misc: mark write buffer const
The write operation in misc_ops already takes a "const void *" buffer,
but misc_write() takes a mutable "void *". There's no reason for this,
so make misc_write() consistent with the standard write() prototype.
Signed-off-by: John Keeping
---
drivers/misc/misc-uclass.c | 2 +-
include/misc.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
index cbfacc3801..cfe9d562fa 100644
--- a/drivers/misc/misc-uclass.c
+++ b/drivers/misc/misc-uclass.c
@@ -26,7 +26,7 @@ int misc_read(struct udevice *dev, int offset, void *buf, int
size)
return ops->read(dev, offset, buf, size);
}
-int misc_write(struct udevice *dev, int offset, void *buf, int size)
+int misc_write(struct udevice *dev, int offset, const void *buf, int size)
{
const struct misc_ops *ops = device_get_ops(dev);
diff --git a/include/misc.h b/include/misc.h
index 82ec2ce793..6f042625c9 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -28,7 +28,7 @@ int misc_read(struct udevice *dev, int offset, void *buf, int
size);
*
* Return: number of bytes written if OK (may be < @size), -ve on error
*/
-int misc_write(struct udevice *dev, int offset, void *buf, int size);
+int misc_write(struct udevice *dev, int offset, const void *buf, int size);
/**
* misc_ioctl() - Assert command to the device, optional.
--
2.34.1
Re: [PATCH V2] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn
On Tue, Jan 11, 2022 at 9:31 AM Michael Walle wrote:
>
> Hi,
>
> Am 2022-01-11 15:20, schrieb Adam Ford:
> > On Tue, Jan 4, 2022 at 2:32 AM Michael Walle wrote:
> >> > The imx8mm and imx8mn appear compatible with imx7d-usb
> >> > flags in the OTG driver. If the dr_mode is defined as
> >> > host or peripheral, the device appears to operate correctly,
> >> > however the auto host/peripheral detection results in an error.
> >> >
> >> > The solution isn't just adding checks for imx8mm and imx8mn to
> >> > the check for imx7, because the USB clock needs to be running
> >> > to read from the USBNC_PHY_STATUS_OFFSET register or it will hang.
> >> >
> >> > The init_type in both priv and plat data are the same, so it doesn't
> >> > make sense to configure the data in the plat data and copy the
> >> > data to priv when priv can be configured directly. Instead, rename
> >> > ehci_usb_of_to_plat to ehci_usb_dr_mode and call it from the
> >> > probe functions after the clocks are enabled, but before the data
> >> > is required.
> >> >
> >> > With that added, the additional checks for imx8mm and imx8mn will
> >> > allow reading the register to automatically determine the state
> >> > (host or device) of the OTG controller.
> >> >
> >> > Signed-off-by: Adam Ford
> >> > ---
> >> > V2: Rename ehci_usb_of_to_plat to ehci_usb_dr_mode and call it
> >> > from the probe after the clocks are enabled, but before
> >> > the data is needed.
> >> >
> >> > diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> >> > index 1bd6147c76..f2a34b7f06 100644
> >> > --- a/drivers/usb/host/ehci-mx6.c
> >> > +++ b/drivers/usb/host/ehci-mx6.c
> >>
> >> ..
> >>
> >> > @@ -639,10 +639,8 @@ static int mx6_parse_dt_addrs(struct udevice *dev)
> >> >
> >> > static int ehci_usb_probe(struct udevice *dev)
> >> > {
> >> > - struct usb_plat *plat = dev_get_plat(dev);
> >> > struct usb_ehci *ehci = dev_read_addr_ptr(dev);
> >> > struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
> >> > - enum usb_init_type type = plat->init_type;
> >> > struct ehci_hccr *hccr;
> >> > struct ehci_hcor *hcor;
> >> > int ret;
> >> > @@ -660,8 +658,6 @@ static int ehci_usb_probe(struct udevice *dev)
> >> > return ret;
> >> >
> >> > priv->ehci = ehci;
> >> > - priv->init_type = type;
> >>
> >
> > Michael,
> >
> >> I'm not sure this is correct. There is also this:
> >> https://elixir.bootlin.com/u-boot/v2022.01-rc4/source/drivers/usb/host/usb-uclass.c#L407
> >>
> >
> > Further down in the code, you should see:
> > priv->phy_type = usb_get_phy_mode(dev_ofnode(dev));
>
> But that is just fetching the mode from the device tree, the
> usb_setup_ehci_gadget() referenced above, change the mode during
> runtime by writing the plat->init_type and reprobing the device.
>
> >> Which won't work anymore. usb_setup_ehci_gadget() is called from
> >> usb_gadget_register_driver() in ci_udc.c. The latter is the one used
> >> on the imx, right? But I might be wrong. I'm still trying to figure
> >> out how this all works together, because I also try to get OTG
> >> running on the dwc3 driver. It looks like the ci_udc.c is special
> >> here, and I wonder how a transition to UCLASS_USB_GADGET_GENERIC
> >> might look like for this driver.
> >
> > This driver really isn't changing anything, it's just an order of
> > operations.
>
> It doesn't use the plat->init_type at all anymore, no?
>From what I could tell, the only thing that plat->init_type did was to
set priv->init_type.
The priv structure appears to do most of the work.
>
> > Previously there was a separate that was being called to
> > determine the init_type as being either a peripheral or host. If it
> > wasn't explicitly set in the device tree, the helper function would
> > query a register, however, on the imx8mm and imx8mn platforms, the
> > clocks were not running which resulted in a hang. What I've done is
> > simply move the helper function into the probe and have it run after
> > the clocks start. In theory the register values will be the same as
> > they would be with the help function still in place.
> >
> > Both Tim Harvey and I have tested on an imx8mm and Fabio tested it on
> > an imx7. For me, the peripheral mode worked when the ID pin of the
> > USB-OTG was not grounded. When it was grounded, the system corrected
> > identified it as a host and I was able to mount a USB drive.
>
> Again, I'm missing something here, but the only user of
> usb_setup_ehci_gadget() is usb/gadget/ci_udc.c.
I can't speak to what those functions do. What are you suggesting
that I do differently?
adam
>
> -michael
Re: [PATCH 1/1] configs: imx8mm-cl-iot-gate: update dfu_alt_info for single flash.bin
On Tue, Jan 11, 2022 at 1:38 PM Ying-Chun Liu wrote: > > From: "Ying-Chun Liu (PaulLiu)" > > We changed to single flash.bin now. So dfu_alt_info should be modified > to reflect this change. > > Signed-off-by: Ying-Chun Liu (PaulLiu) Reviewed-by: Fabio Estevam
[PATCH 1/1] configs: imx8mm-cl-iot-gate: update dfu_alt_info for single flash.bin
From: "Ying-Chun Liu (PaulLiu)" We changed to single flash.bin now. So dfu_alt_info should be modified to reflect this change. Signed-off-by: Ying-Chun Liu (PaulLiu) --- include/configs/imx8mm-cl-iot-gate.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 6868b80484..4ff7920981 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -74,8 +74,7 @@ "fdt_addr=0x4300\0" \ "fdt_addr_r=0x4300\0" \ "boot_fit=no\0" \ - "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x250 mmcpart 1;" \ - "u-boot-itb raw 0x300 0x1B00 mmcpart 1\0"\ + "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \ "fdt_file=sb-iotgimx8.dtb\0" \ "fdtfile=sb-iotgimx8.dtb\0" \ "initrd_addr=0x4380\0" \ -- 2.34.1
[PATCH 0/1] configs: imx8mm-cl-iot-gate: update dfu_alt_info for single flash.bin
From: "Ying-Chun Liu (PaulLiu)" imx8mm generate a single bootable flash.bin again. Previous it is flash.bin and u-boot.itb. So we need to modify dfu_alt_info for single flash.bin. Ying-Chun Liu (PaulLiu) (1): configs: imx8mm-cl-iot-gate: update dfu_alt_info for single flash.bin include/configs/imx8mm-cl-iot-gate.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.34.1
Re: [PATCH 1/1] doc: Building on Alpine Linux
On 1/10/22 7:46 PM, Heinrich Schuchardt wrote: Describe the required packages for building U-Boot on Alpine Linux Signed-off-by: Heinrich Schuchardt --- doc/build/gcc.rst | 10 ++ 1 file changed, 10 insertions(+) diff --git a/doc/build/gcc.rst b/doc/build/gcc.rst index cdd7970032..5299b8a18a 100644 --- a/doc/build/gcc.rst +++ b/doc/build/gcc.rst @@ -51,6 +51,16 @@ Depending on the build targets further packages maybe needed. zypper install bc bison flex gcc libopenssl-devel libSDL2-devel make \ ncurses-devel python3-devel python3-pytest swig +Alpine Linux + + +For building U-Boot on Alpine Linx at least the following packages are needed: nit: Linux + +.. code-block:: bash + +apk add alpine-sdk bc bison dtc flex linux-headers ncurses-dev \ + openssl-dev python3 py3-setuptools python3-dev sdl2 + Prerequisites - -- 2.33.1
[PATCH 3/3] sandox: test: activate tests for the command LOG
Activate the CONFIG_CMD_LOG in sandbox to execute the LOG tests
by default and correct the test log format after 72fa1ad8d9 ("log: Allow
padding of the function name").
Signed-off-by: Patrick Delaunay
---
configs/sandbox_defconfig | 2 +-
test/py/tests/test_log.py | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 4f413582fb..a4aeee062f 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -30,7 +30,6 @@
CONFIG_AUTOBOOT_STOP_STR_CRYPT="$5$rounds=64$HrpE65IkB8CM5nCL$BKT3QdF98Bo8fJ
CONFIG_CONSOLE_RECORD=y
CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
CONFIG_PRE_CONSOLE_BUFFER=y
-CONFIG_LOG=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_F=y
CONFIG_STACKPROTECTOR=y
@@ -108,6 +107,7 @@ CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_LOG=y
CONFIG_CMD_STACKPROTECTOR_TEST=y
CONFIG_MAC_PARTITION=y
CONFIG_AMIGA_PARTITION=y
diff --git a/test/py/tests/test_log.py b/test/py/tests/test_log.py
index 140dcb9aa2..20a3e56301 100644
--- a/test/py/tests/test_log.py
+++ b/test/py/tests/test_log.py
@@ -27,13 +27,13 @@ def test_log_format(u_boot_console):
cons = u_boot_console
with cons.log.section('format'):
-run_with_format('all', 'NOTICE.arch,file.c:123-func() msg')
+run_with_format('all', 'NOTICE.arch,file.c:123-func()
msg')
output = cons.run_command('log format')
assert output == 'Log format: clFLfm'
-run_with_format('fm', 'func() msg')
-run_with_format('clfm', 'NOTICE.arch,func() msg')
-run_with_format('FLfm', 'file.c:123-func() msg')
+run_with_format('fm', 'func() msg')
+run_with_format('clfm', 'NOTICE.arch,func() msg')
+run_with_format('FLfm', 'file.c:123-func() msg')
run_with_format('lm', 'NOTICE. msg')
run_with_format('m', 'msg')
--
2.25.1
[PATCH 2/3] dm: compare full name in uclass_get_by_name
Change uclass_get_by_name to use a strict string compare function
"strcmp" with the parameter 'name'.
This patch avoids issues when strlen(name)name) as
the function uclass_get_by_name() no more use uclass_get_by_name_len(),
which limit the check with "strncmp" and length of name.
This problem is detected by the sandbox test for log filter:
in log_get_cat_by_name(), uclass_get_by_name("spi") = UCLASS_SPI_EMUL
for "spi_emul", it is not the expected result = UCLASS_SPI
for a search by name.
But it is the expected result for search with partial name
uclass_get_by_name_len("spi", 3).
Signed-off-by: Patrick Delaunay
---
drivers/core/uclass.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 336ea8d243..32b6cef167 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -196,7 +196,16 @@ enum uclass_id uclass_get_by_name_len(const char *name,
int len)
enum uclass_id uclass_get_by_name(const char *name)
{
- return uclass_get_by_name_len(name, strlen(name));
+ int i;
+
+ for (i = 0; i < UCLASS_COUNT; i++) {
+ struct uclass_driver *uc_drv = lists_uclass_lookup(i);
+
+ if (uc_drv && !strcmp(uc_drv->name, name))
+ return i;
+ }
+
+ return UCLASS_INVALID;
}
int dev_get_uclass_index(struct udevice *dev, struct uclass **ucp)
--
2.25.1
[PATCH 1/3] dm: fix up documentation for uclass_get_by_name_len
Fix up the comment for uclass_get_by_name_len() to avoid confusion.
Fixes: 4b030177b660 ("dm: core: Allow finding children / uclasses by partial
name")
Signed-off-by: Patrick Delaunay
---
include/dm/uclass.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index f1fd2ba246..a606b6a20b 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -173,10 +173,10 @@ int uclass_get(enum uclass_id key, struct uclass **ucp);
const char *uclass_get_name(enum uclass_id id);
/**
- * uclass_get_by_name() - Look up a uclass by its driver name
+ * uclass_get_by_name_len() - Look up a uclass by its partial driver name
*
* @name: Name to look up
- * @len: Length of name
+ * @len: Length of the partial name
* @returns the associated uclass ID, or UCLASS_INVALID if not found
*/
enum uclass_id uclass_get_by_name_len(const char *name, int len);
--
2.25.1
[PATCH 0/3] sandox: test: activate tests for the command LOG
This patches activate the command LOG and the associated tests in sandbox with CONFIG_CMD_LOG=y and solve the associated issues when these tests are executed. Patrick Patrick Delaunay (3): dm: fix up documentation for uclass_get_by_name_len dm: compare full name in uclass_get_by_name sandox: test: activate tests for the command LOG configs/sandbox_defconfig | 2 +- drivers/core/uclass.c | 11 ++- include/dm/uclass.h | 4 ++-- test/py/tests/test_log.py | 8 4 files changed, 17 insertions(+), 8 deletions(-) -- 2.25.1
Re: [PATCH 2/2] board: starqltechn: get board usable - fix defconfig and strip config options
On Tue, Jan 11, 2022 at 07:01:59PM +0300, Dzmitry Sankouski wrote: > - add FIT image support > - increase LMB_MAX_REGIONS, to store all linux dtb reserved memory regions > - add linux kernel image header > > Uart driver causes hang, when u-boot is used in android boot image instead > of linux. Temporary disable console driver, until investigated and fixed. > > Signed-off-by: Dzmitry Sankouski > Cc: Ramon Fried > Cc: Tom Rini > --- > configs/starqltechn_defconfig | 12 > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig > index f57bb859cc..987ce93a36 100644 > --- a/configs/starqltechn_defconfig > +++ b/configs/starqltechn_defconfig > @@ -2,13 +2,14 @@ CONFIG_ARM=y > CONFIG_SKIP_LOWLEVEL_INIT=y > CONFIG_POSITION_INDEPENDENT=y > CONFIG_ARCH_SNAPDRAGON=y > -CONFIG_SYS_TEXT_BASE=0x8000 > -CONFIG_SYS_MALLOC_LEN=0x81f000 > CONFIG_DEFAULT_DEVICE_TREE="starqltechn" > +CONFIG_BOOTDELAY=0 > +CONFIG_FIT=y > +CONFIG_FIT_VERBOSE=y > CONFIG_TARGET_STARQLTECHN=y > CONFIG_IDENT_STRING="\nSamsung S9 SM-G9600" > CONFIG_SYS_LOAD_ADDR=0x8000 > -CONFIG_USE_PREBOOT=y > +CONFIG_LMB_MAX_REGIONS=64 > # CONFIG_DISPLAY_CPUINFO is not set > CONFIG_HUSH_PARSER=y > CONFIG_CMD_GPIO=y > @@ -20,5 +21,8 @@ CONFIG_PM8916_GPIO=y > CONFIG_PINCTRL=y > CONFIG_DM_PMIC=y > CONFIG_PMIC_PM8916=y > -CONFIG_MSM_GENI_SERIAL=y > +# todo: fix serial initialization hang, when assembled in android boot image. > +CONFIG_REQUIRE_SERIAL_CONSOLE=n > +CONFIG_MSM_GENI_SERIAL=n > CONFIG_SPMI_MSM=y > +CONFIG_LINUX_KERNEL_IMAGE_HEADER=y As the defconfig files are (re)generated by 'savedefconfig' that comment will be lost quickly. And it needs to be "# CONFIG_FOO is not set" as well. -- Tom signature.asc Description: PGP signature
Re: CONFIG_SYS_SPL_ARGS_ADDR
On Sat, Jan 01, 2022 at 08:00:45PM +0100, Sven Schwermer wrote: > Hi, > > I'm looking into booting Linux FIT images from SPL. In board_init_r > (common/spl/spl.c), the boot argument is set to CONFIG_SYS_SPL_ARGS_ADDR if > defined. When booting a FIT image including a DTB, shouldn't this > automatically be set to fdt_addr (struct spl_image_info)? This would ensure > a single point of truth for the DTB address (load address as encoded in the > FIT image or DTB data start location within the FIT blob if no load address > is defined) instead of having to set CONFIG_SYS_SPL_ARGS_ADDR to the DTB > load address. > > I'm not sure whether I'm interpreting this correctly. It would be nice if > somebody could give some advice. So, the issue is that we don't enforce environment variables existing (typically). The falcon mode code also predates the distro boot stuff that brought us more consistency in fdt related variable naming and usage. Cleanups to the falcon code to make use of this newer code would be appreciated. -- Tom signature.asc Description: PGP signature
Re: [RFC] nvme: Split out PCI support
On Fri, Dec 31, 2021 at 09:00:20PM +0100, Mark Kettenis wrote: > Apple SoCs have an integrated NVMe controller that isn't connected > over a PCIe bus. In preparation for adding support for this NVMe > controller, split out the PCI support into its own file. This file > is selected through a new CONFIG_NVME_PCI Kconfig option, so do > a wholesale replacement of CONFIG_NVME with CONFIG_NVME_PCI. > > Signed-off-by: Mark Kettenis > --- > > I only did the s/CONFIG_NVME/CONFIG_NVME_PCI/ change for > firefly-rk3399_defconfig for now. If folks agree this is a reasonable > approach I'll do the wholesale replacement mentioned in the commit > message and integrate this in a series that actually adds support for > the Apple SoC NVMe controller. This seems a reasonable approach. -- Tom signature.asc Description: PGP signature
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On Tue, Jan 11, 2022 at 04:36:34PM +0100, Pali Rohár wrote: > On Tuesday 11 January 2022 16:31:20 Marek Vasut wrote: > > The kwbimage has hard dependency on OpenSSL, do not build it > > in case TOOLS_LIBCRYPTO is disabled. > > This patch does not work as kwbimage is required for 32-bit Armada > platforms. So kwbimage.o cannot be disabled on these platforms. > > There is already proposal for fixing this issue: > https://patchwork.ozlabs.org/project/uboot/patch/20211021093304.25399-1-p...@kernel.org/ And needs to be respun to not have Kconfig issues. To answer something noted in that thread, yes, it would be good if Kconfig did, or had an option to make WARNING like that fatal. Or is the problem really that no, it's non-optional, really, to have OpenSSL installed? -- Tom signature.asc Description: PGP signature
[PATCH] mmc: dwmmc: return a proper error code when busy
When failing to send a command because the hardware is busy, return EBUSY to indicate the cause instead of just -1. Signed-off-by: John Keeping --- drivers/mmc/dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index a949dad574..4232c5eb8c 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -301,7 +301,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, flags = dwmci_set_transfer_mode(host, data); if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY)) - return -1; + return -EBUSY; if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) flags |= DWMCI_CMD_ABORT_STOP; -- 2.34.1
Re: [RESEND PATCH v3 01/12] mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC
On 1/10/22 8:14 PM, Jaehoon Chung wrote:
Dear Sean,
On 1/5/22 1:16 AM, Sean Anderson wrote:
[ fsl_esdhc commit 41dec2fe99512e941261594f522b2e7d485c314b ]
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.
- Drop non-BLK support for DM_MMC introduced by below patch.
66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).
- Use DM_MMC instead of BLK for conditional compile.
Thanks for resend this. But it can't apply your patch from patchwork directly.
https://patchwork.ozlabs.org/project/uboot/patch/17862939-c7b1-310e-d98e-ce68f776e...@seco.com/
If you're ok, I will apply after modified your patch.
That's fine; looks like it got mangled a bit by my mail client.
--Sean
Signed-off-by: Yangbo Lu
Signed-off-by: Sean Anderson
---
Changes in v3:
- Drop Kconfig BLK dependency
drivers/mmc/fsl_esdhc_imx.c | 33 +
1 file changed, 1 insertion(+), 32 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 4c06361bee..85cd72a796 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -39,10 +39,6 @@
#include
#include
-#if !CONFIG_IS_ENABLED(BLK)
-#include "mmc_private.h"
-#endif
-
#ifndef ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
#ifdef CONFIG_FSL_USDHC
#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1
@@ -58,7 +54,6 @@ DECLARE_GLOBAL_DATA_PTR;
IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \
IRQSTATEN_DINT)
#define MAX_TUNING_LOOP 40
-#define ESDHC_DRIVER_STAGE_VALUE 0x
struct fsl_esdhc {
uint dsaddr; /* SDMA system address register */
@@ -157,7 +152,7 @@ struct fsl_esdhc_priv {
unsigned int clock;
unsigned int mode;
unsigned int bus_width;
-#if !CONFIG_IS_ENABLED(BLK)
+#if !CONFIG_IS_ENABLED(DM_MMC)
struct mmc *mmc;
#endif
struct udevice *dev;
@@ -1510,9 +1505,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
struct esdhc_soc_data *data =
(struct esdhc_soc_data *)dev_get_driver_data(dev);
struct mmc *mmc;
-#if !CONFIG_IS_ENABLED(BLK)
- struct blk_desc *bdesc;
-#endif
int ret;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1611,25 +1603,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
mmc = &plat->mmc;
mmc->cfg = &plat->cfg;
mmc->dev = dev;
-#if !CONFIG_IS_ENABLED(BLK)
- mmc->priv = priv;
-
- /* Setup dsr related values */
- mmc->dsr_imp = 0;
- mmc->dsr = ESDHC_DRIVER_STAGE_VALUE;
- /* Setup the universal parts of the block interface just once */
- bdesc = mmc_get_blk_desc(mmc);
- bdesc->if_type = IF_TYPE_MMC;
- bdesc->removable = 1;
- bdesc->devnum = mmc_get_next_devnum();
- bdesc->block_read = mmc_bread;
- bdesc->block_write = mmc_bwrite;
- bdesc->block_erase = mmc_berase;
-
- /* setup initial part type */
- bdesc->part_type = mmc->cfg->part_type;
- mmc_list_add(mmc);
-#endif
upriv->mmc = mmc;
@@ -1740,14 +1713,12 @@ static const struct udevice_id fsl_esdhc_ids[] = {
{ /* sentinel */ }
};
-#if CONFIG_IS_ENABLED(BLK)
static int fsl_esdhc_bind(struct udevice *dev)
{
struct fsl_esdhc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
-#endif
U_BOOT_DRIVER(fsl_esdhc) = {
.name = "fsl_esdhc",
@@ -1755,9 +1726,7 @@ U_BOOT_DRIVER(fsl_esdhc) = {
.of_match = fsl_esdhc_ids,
.of_to_plat = fsl_esdhc_of_to_plat,
.ops = &fsl_esdhc_ops,
-#if CONFIG_IS_ENABLED(BLK)
.bind = fsl_esdhc_bind,
-#endif
.probe = fsl_esdhc_probe,
.plat_auto = sizeof(struct fsl_esdhc_plat),
.priv_auto = sizeof(struct fsl_esdhc_priv),
[PATCH 2/2] board: starqltechn: get board usable - fix defconfig and strip config options
- add FIT image support - increase LMB_MAX_REGIONS, to store all linux dtb reserved memory regions - add linux kernel image header Uart driver causes hang, when u-boot is used in android boot image instead of linux. Temporary disable console driver, until investigated and fixed. Signed-off-by: Dzmitry Sankouski Cc: Ramon Fried Cc: Tom Rini --- configs/starqltechn_defconfig | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index f57bb859cc..987ce93a36 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -2,13 +2,14 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_SNAPDRAGON=y -CONFIG_SYS_TEXT_BASE=0x8000 -CONFIG_SYS_MALLOC_LEN=0x81f000 CONFIG_DEFAULT_DEVICE_TREE="starqltechn" +CONFIG_BOOTDELAY=0 +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_TARGET_STARQLTECHN=y CONFIG_IDENT_STRING="\nSamsung S9 SM-G9600" CONFIG_SYS_LOAD_ADDR=0x8000 -CONFIG_USE_PREBOOT=y +CONFIG_LMB_MAX_REGIONS=64 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y @@ -20,5 +21,8 @@ CONFIG_PM8916_GPIO=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_PM8916=y -CONFIG_MSM_GENI_SERIAL=y +# todo: fix serial initialization hang, when assembled in android boot image. +CONFIG_REQUIRE_SERIAL_CONSOLE=n +CONFIG_MSM_GENI_SERIAL=n CONFIG_SPMI_MSM=y +CONFIG_LINUX_KERNEL_IMAGE_HEADER=y -- 2.20.1
[PATCH 1/2] soc: sdm845: implement ABL info collecting, add bootcommand and usage doc
U-boot is intended to replace linux kernel in android boot image, and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `abl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `abl_initrd_start_addr`
In this way, u-boot bootcmd relies on `abl_initrd_start_addr` env variable,
and boils down to `bootm $abl_initrd_start_addr`. If more control on
boot process is desired, pack a boot script in FIT image, and put it to
default configuration
Signed-off-by: Dzmitry Sankouski
Cc: Ramon Fried
Cc: Tom Rini
---
arch/arm/mach-snapdragon/init_sdm845.c | 60
doc/board/qualcomm/sdm845.rst | 63 +-
include/configs/sdm845.h | 5 ++
3 files changed, 116 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-snapdragon/init_sdm845.c
b/arch/arm/mach-snapdragon/init_sdm845.c
index 5f53c21947..6aeaeeb53a 100644
--- a/arch/arm/mach-snapdragon/init_sdm845.c
+++ b/arch/arm/mach-snapdragon/init_sdm845.c
@@ -7,6 +7,7 @@
#include
#include
+#include
#include
#include
#include
@@ -14,6 +15,14 @@
DECLARE_GLOBAL_DATA_PTR;
+static ulong fdt_addr __section(".data");
+
+void save_boot_params(ulong r0)
+{
+ fdt_addr = r0;
+ save_boot_params_ret();
+}
+
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
@@ -29,8 +38,33 @@ __weak int board_init(void)
return 0;
}
-/* Check for vol- and power buttons */
-__weak int misc_init_r(void)
+void set_abl_env(void)
+{
+ const void *fdt_blob;
+ int node, ret;
+ ulong initrd_start_prop;
+
+ ret = env_set_addr("abl_fdt_addr", fdt_addr);
+ if (ret < 0) {
+ printf("Failed to set abl device tree address\n");
+ return;
+ }
+
+ fdt_blob = (void *)fdt_addr;
+ node = fdt_path_offset(fdt_blob, "/chosen");
+ if (!node) {
+ printf("Chosen node not found in device tree at addr: 0x%ll\n",
fdt_addr);
+ return;
+ }
+ initrd_start_prop = fdtdec_get_addr(fdt_blob, node,
"linux,initrd-start");
+ if (!initrd_start_prop) {
+ printf("linux,initrd-start property is not set\n");
+ return;
+ }
+ env_set_addr("abl_initrd_start_addr", initrd_start_prop);
+}
+
+void read_pressed_keys(void)
{
struct udevice *pon;
struct gpio_desc resin;
@@ -39,19 +73,19 @@ __weak int misc_init_r(void)
ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8998_pon@800", &pon);
if (ret < 0) {
printf("Failed to find PMIC pon node. Check device tree\n");
- return 0;
+ return;
}
node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
- "key_vol_down");
+ "key_vol_down");
if (node < 0) {
printf("Failed to find key_vol_down node. Check device tree\n");
- return 0;
+ return;
}
if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
+ &resin, 0)) {
printf("Failed to request key_vol_down button.\n");
- return 0;
+ return;
}
if (dm_gpio_get_value(&resin)) {
env_set("key_vol_down", "1");
@@ -64,12 +98,12 @@ __weak int misc_init_r(void)
"key_power");
if (node < 0) {
printf("Failed to find key_power node. Check device tree\n");
- return 0;
+ return;
}
if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
+ &resin, 0)) {
printf("Failed to request key_power button.\n");
- return 0;
+ return;
}
if (dm_gpio_get_value(&resin)) {
env_set("key_power", "1");
@@ -77,6 +111,12 @@ __weak int misc_init_r(void)
} else {
env_set("key_power", "0");
}
+}
+
+__weak int misc_init_r(void)
+{
+ set_abl_env();
+ read_pressed_keys();
return 0;
}
diff --git a/doc/board/qualcomm/sdm845.rst b/doc/board/qualcomm/sdm845.rst
index cd46cbe9cf..e14fd05118 100644
--- a/doc/board/qualcomm/sdm845.rst
+++ b/doc/board/qualcomm/sdm845.rst
@@ -13,11 +13,27 @@ SDM845 - hi-end qualcomm chip, introduced in late 2017.
Mostly used in flagship phones and tablets of 2018.
U-Boot can be used as a replacement for Qualcomm's original ABL (UEFI)
[PATCH 0/2] get sdm845 boards u-boot usable as a secondary bootloader
U-boot is intended to replace linux kernel in android boot image(ABL), and it's FIT payload to replace initramfs file. The boot process is similar to boot image with linux: - android bootloader (ABL) unpacks android boot image - ABL sets `linux,initrd-start property` in chosen node in unpacked FDT - ABL sets x0 register to FDT address, and passes control to u-boot - u-boot reads x0 register, and stores it in `abl_fdt_addr` env variable - u-boot reads `linux,initrd-start` property, and stores it in `abl_initrd_start_addr` In this way, u-boot bootcmd relies on `abl_initrd_start_addr` env variable, and boils down to `bootm $abl_initrd_start_addr`. If more control on boot process is desired, pack a boot script in FIT image, and put it to default configuration Dzmitry Sankouski (2): soc: sdm845: implement ABL info collecting, add bootcommand and usage doc board: starqltechn: get board usable - fix defconfig and strip config options arch/arm/mach-snapdragon/init_sdm845.c | 60 configs/starqltechn_defconfig | 12 +++-- doc/board/qualcomm/sdm845.rst | 63 +- include/configs/sdm845.h | 5 ++ 4 files changed, 124 insertions(+), 16 deletions(-) -- 2.20.1
Re: [PATCH] genboardscfg: limit to 240 jobs
On 1/11/22 16:34, Andre Przywara wrote:
When genboardscfg.py is run on machines with 255 or more cores, the
process will consume more than 1024 file descriptors, which is a common
standard ulimit for user processes. As a consequence it will fail with a
lenghty Python trace, with the almost hidden message:
OSError: [Errno 24] Too many open files
It's somewhat questionable whether that level of parallelity is actually
useful for genboardscfg, so we limit the *default* number of jobs to the
safe number of 240, to avoid the problem.
If a user persists, she can still force a higher number via the -j
Nits:
%s/persists/insists/
%s/she/they/ if you don't specifically mean a female user.
Otherwise
Reviewed-by: Heinrich Schuchardt
parameter - hopefully having raised the ulimit accordingly beforehand.
Signed-off-by: Andre Przywara
---
tools/genboardscfg.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py
index 4ee7aa1f89..07bf681d1d 100755
--- a/tools/genboardscfg.py
+++ b/tools/genboardscfg.py
@@ -430,7 +430,7 @@ def main():
# Add options here
parser.add_option('-f', '--force', action="store_true", default=False,
help='regenerate the output even if it is new')
-parser.add_option('-j', '--jobs', type='int', default=cpu_count,
+parser.add_option('-j', '--jobs', type='int', default=min(cpu_count, 240),
help='the number of jobs to run simultaneously')
parser.add_option('-o', '--output', default=OUTPUT_FILE,
help='output file [default=%s]' % OUTPUT_FILE)
[PATCH] board: stm32mp1: solve compilation issue when ENV_IS_IN_MMC is deactivated
Solve compilation issue on undefined CONFIG_SYS_MMC_ENV_DEV when
CONFIG_ENV_IS_IN_MMC is deactivated on STMicroelectronics boards
defconfig
Fixes: 9f97193616f1 ("board: stm32mp1: use CONFIG_SYS_MMC_ENV_DEV when
available")
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 45f2ca81a6..fff1880e5b 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -890,8 +890,10 @@ const char *env_ext4_get_dev_part(void)
int mmc_get_env_dev(void)
{
- if (CONFIG_SYS_MMC_ENV_DEV >= 0)
- return CONFIG_SYS_MMC_ENV_DEV;
+ const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC,
(CONFIG_SYS_MMC_ENV_DEV), (-1));
+
+ if (mmc_env_dev >= 0)
+ return mmc_env_dev;
/* use boot instance to select the correct mmc device identifier */
return mmc_get_boot();
--
2.25.1
Re: [PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
On Tuesday 11 January 2022 16:31:20 Marek Vasut wrote: > The kwbimage has hard dependency on OpenSSL, do not build it > in case TOOLS_LIBCRYPTO is disabled. This patch does not work as kwbimage is required for 32-bit Armada platforms. So kwbimage.o cannot be disabled on these platforms. There is already proposal for fixing this issue: https://patchwork.ozlabs.org/project/uboot/patch/20211021093304.25399-1-p...@kernel.org/ > Signed-off-by: Marek Vasut > Cc: Heinrich Schuchardt > Cc: Marek Behún > Cc: Pali Rohár > Cc: Stefan Roese > Cc: Tom Rini > --- > tools/Makefile | 5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/tools/Makefile b/tools/Makefile > index 1763f44cac4..72488315d9d 100644 > --- a/tools/Makefile > +++ b/tools/Makefile > @@ -101,6 +101,9 @@ LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix > lib/, \ > ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o > > # common objs for dumpimage and mkimage > +ifdef CONFIG_TOOLS_LIBCRYPTO > +KWB_IMAGE_OBJS-y := kwbimage.o > +endif > dumpimage-mkimage-objs := aisimage.o \ > atmelimage.o \ > $(FIT_OBJS-y) \ > @@ -118,7 +121,7 @@ dumpimage-mkimage-objs := aisimage.o \ > imximage.o \ > imx8image.o \ > imx8mimage.o \ > - kwbimage.o \ > + $(KWB_IMAGE_OBJS-y) \ > lib/md5.o \ > lpc32xximage.o \ > mxsimage.o \ > -- > 2.34.1 >
[PATCH] genboardscfg: limit to 240 jobs
When genboardscfg.py is run on machines with 255 or more cores, the
process will consume more than 1024 file descriptors, which is a common
standard ulimit for user processes. As a consequence it will fail with a
lenghty Python trace, with the almost hidden message:
OSError: [Errno 24] Too many open files
It's somewhat questionable whether that level of parallelity is actually
useful for genboardscfg, so we limit the *default* number of jobs to the
safe number of 240, to avoid the problem.
If a user persists, she can still force a higher number via the -j
parameter - hopefully having raised the ulimit accordingly beforehand.
Signed-off-by: Andre Przywara
---
tools/genboardscfg.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py
index 4ee7aa1f89..07bf681d1d 100755
--- a/tools/genboardscfg.py
+++ b/tools/genboardscfg.py
@@ -430,7 +430,7 @@ def main():
# Add options here
parser.add_option('-f', '--force', action="store_true", default=False,
help='regenerate the output even if it is new')
-parser.add_option('-j', '--jobs', type='int', default=cpu_count,
+parser.add_option('-j', '--jobs', type='int', default=min(cpu_count, 240),
help='the number of jobs to run simultaneously')
parser.add_option('-o', '--output', default=OUTPUT_FILE,
help='output file [default=%s]' % OUTPUT_FILE)
--
2.25.1
[PATCH] tools: Do not build kwbimage if CONFIG_TOOLS_LIBCRYPTO=n
The kwbimage has hard dependency on OpenSSL, do not build it in case TOOLS_LIBCRYPTO is disabled. Signed-off-by: Marek Vasut Cc: Heinrich Schuchardt Cc: Marek Behún Cc: Pali Rohár Cc: Stefan Roese Cc: Tom Rini --- tools/Makefile | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tools/Makefile b/tools/Makefile index 1763f44cac4..72488315d9d 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -101,6 +101,9 @@ LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix lib/, \ ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o # common objs for dumpimage and mkimage +ifdef CONFIG_TOOLS_LIBCRYPTO +KWB_IMAGE_OBJS-y := kwbimage.o +endif dumpimage-mkimage-objs := aisimage.o \ atmelimage.o \ $(FIT_OBJS-y) \ @@ -118,7 +121,7 @@ dumpimage-mkimage-objs := aisimage.o \ imximage.o \ imx8image.o \ imx8mimage.o \ - kwbimage.o \ + $(KWB_IMAGE_OBJS-y) \ lib/md5.o \ lpc32xximage.o \ mxsimage.o \ -- 2.34.1
Re: [PATCH V2] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn
Hi,
Am 2022-01-11 15:20, schrieb Adam Ford:
On Tue, Jan 4, 2022 at 2:32 AM Michael Walle wrote:
> The imx8mm and imx8mn appear compatible with imx7d-usb
> flags in the OTG driver. If the dr_mode is defined as
> host or peripheral, the device appears to operate correctly,
> however the auto host/peripheral detection results in an error.
>
> The solution isn't just adding checks for imx8mm and imx8mn to
> the check for imx7, because the USB clock needs to be running
> to read from the USBNC_PHY_STATUS_OFFSET register or it will hang.
>
> The init_type in both priv and plat data are the same, so it doesn't
> make sense to configure the data in the plat data and copy the
> data to priv when priv can be configured directly. Instead, rename
> ehci_usb_of_to_plat to ehci_usb_dr_mode and call it from the
> probe functions after the clocks are enabled, but before the data
> is required.
>
> With that added, the additional checks for imx8mm and imx8mn will
> allow reading the register to automatically determine the state
> (host or device) of the OTG controller.
>
> Signed-off-by: Adam Ford
> ---
> V2: Rename ehci_usb_of_to_plat to ehci_usb_dr_mode and call it
> from the probe after the clocks are enabled, but before
> the data is needed.
>
> diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> index 1bd6147c76..f2a34b7f06 100644
> --- a/drivers/usb/host/ehci-mx6.c
> +++ b/drivers/usb/host/ehci-mx6.c
..
> @@ -639,10 +639,8 @@ static int mx6_parse_dt_addrs(struct udevice *dev)
>
> static int ehci_usb_probe(struct udevice *dev)
> {
> - struct usb_plat *plat = dev_get_plat(dev);
> struct usb_ehci *ehci = dev_read_addr_ptr(dev);
> struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
> - enum usb_init_type type = plat->init_type;
> struct ehci_hccr *hccr;
> struct ehci_hcor *hcor;
> int ret;
> @@ -660,8 +658,6 @@ static int ehci_usb_probe(struct udevice *dev)
> return ret;
>
> priv->ehci = ehci;
> - priv->init_type = type;
Michael,
I'm not sure this is correct. There is also this:
https://elixir.bootlin.com/u-boot/v2022.01-rc4/source/drivers/usb/host/usb-uclass.c#L407
Further down in the code, you should see:
priv->phy_type = usb_get_phy_mode(dev_ofnode(dev));
But that is just fetching the mode from the device tree, the
usb_setup_ehci_gadget() referenced above, change the mode during
runtime by writing the plat->init_type and reprobing the device.
Which won't work anymore. usb_setup_ehci_gadget() is called from
usb_gadget_register_driver() in ci_udc.c. The latter is the one used
on the imx, right? But I might be wrong. I'm still trying to figure
out how this all works together, because I also try to get OTG
running on the dwc3 driver. It looks like the ci_udc.c is special
here, and I wonder how a transition to UCLASS_USB_GADGET_GENERIC
might look like for this driver.
This driver really isn't changing anything, it's just an order of
operations.
It doesn't use the plat->init_type at all anymore, no?
Previously there was a separate that was being called to
determine the init_type as being either a peripheral or host. If it
wasn't explicitly set in the device tree, the helper function would
query a register, however, on the imx8mm and imx8mn platforms, the
clocks were not running which resulted in a hang. What I've done is
simply move the helper function into the probe and have it run after
the clocks start. In theory the register values will be the same as
they would be with the help function still in place.
Both Tim Harvey and I have tested on an imx8mm and Fabio tested it on
an imx7. For me, the peripheral mode worked when the ID pin of the
USB-OTG was not grounded. When it was grounded, the system corrected
identified it as a host and I was able to mount a USB drive.
Again, I'm missing something here, but the only user of
usb_setup_ehci_gadget() is usb/gadget/ci_udc.c.
-michael
[PATCH 1/1] cmd: part: list all 128 GPT partitions
A GPT partition table typically has 128 entries. If a partition table
contains a partition 128 'part list' should be able to list it.
Signed-off-by: Heinrich Schuchardt
---
cmd/part.c | 4 ++--
include/part.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/cmd/part.c b/cmd/part.c
index e0463b5a54..9d419c967c 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -89,10 +89,10 @@ static int do_part_list(int argc, char *const argv[])
if (var != NULL) {
int p;
- char str[512] = { '\0', };
+ char str[3 * MAX_SEARCH_PARTITIONS] = { '\0', };
struct disk_partition info;
- for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
+ for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
char t[5];
int r = part_get_info(desc, p, &info);
diff --git a/include/part.h b/include/part.h
index b66b07a1f0..b8d8e1ff0d 100644
--- a/include/part.h
+++ b/include/part.h
@@ -50,7 +50,7 @@ struct block_drvr {
#define PART_NAME_LEN 32
#define PART_TYPE_LEN 32
-#define MAX_SEARCH_PARTITIONS 64
+#define MAX_SEARCH_PARTITIONS 128
#define PART_BOOTABLE ((int)BIT(0))
#define PART_EFI_SYSTEM_PARTITION ((int)BIT(1))
--
2.33.1
[PATCH 1/1] stm32mp: fix board_get_alt_info_mmc()
MAX_SEARCH_PARTITIONS is the highest possible partition number.
Do not skip the last partition in board_get_alt_info_mmc().
Signed-off-by: Heinrich Schuchardt
---
board/st/common/stm32mp_dfu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index a3f0da5b5b..fa48b2a35e 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -57,7 +57,7 @@ static void board_get_alt_info_mmc(struct udevice *dev, char
*buf)
first = false;
}
- for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
+ for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
if (part_get_info(desc, p, &info))
continue;
if (!first)
--
2.33.1
[PATCH 1/1] disk: gpt: print all partitions
For GPT partition tables the 'part list' command stops at the first invalid
partition number. But Ubuntu has images with partitions number
1, 12, 13, 14, 15
In this case only partition 1 was listed by 'part list'.
Fixes: 38a3021edc54 ("disk: part_efi: remove indent level from loop")
Reported-by: Alexandre Ghiti
Signed-off-by: Heinrich Schuchardt
---
disk/part_efi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 0ca7effc32..3809333078 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -236,9 +236,9 @@ void part_print_efi(struct blk_desc *dev_desc)
printf("\tPartition GUID\n");
for (i = 0; i < le32_to_cpu(gpt_head->num_partition_entries); i++) {
- /* Stop at the first non valid PTE */
+ /* Skip invalid PTE */
if (!is_pte_valid(&gpt_pte[i]))
- break;
+ continue;
printf("%3d\t0x%08llx\t0x%08llx\t\"%s\"\n", (i + 1),
le64_to_cpu(gpt_pte[i].starting_lba),
--
2.33.1
RE: [PATCH] imx8mm_beacon/imx8mn_beacon: Update build instructions
Hello Adam, > -Original Message- > From: U-Boot On Behalf Of Adam Ford > Sent: Tuesday, January 11, 2022 2:51 PM > To: u-boot@lists.denx.de > Cc: sba...@denx.de; tr...@konsulko.com; af...@beaconembedded.com; Adam Ford > > Subject: [PATCH] imx8mm_beacon/imx8mn_beacon: Update build instructions > > With binman generating flash.bin, it's not longer necessary to > specify either the location of ATF nor is it necessary to > specify building flash.bin, so let's update the build instructions > to remove those. While in here, update the revision of ATF and > DDR firmware so both Mini and Nano reference the same revision. > > Signed-off-by: Adam Ford > > diff --git a/board/beacon/imx8mm/README b/board/beacon/imx8mm/README > index 03d9412f0d..200549d924 100644 > --- a/board/beacon/imx8mm/README > +++ b/board/beacon/imx8mm/README > @@ -12,21 +12,21 @@ Get and Build the ARM Trusted firmware > Note: $(srctree) is U-Boot source directory > > $ git clone https://source.codeaurora.org/external/imx/imx-atf > -$ git checkout imx_5.4.70_2.3.0 > +$ git checkout lf_v2.4 Perhaps, it's better to advise the [lf-5.10.72-2.2.0] tag here instead of branch? > $ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu- > $ cp build/imx8mm/release/bl31.bin $(srctree) > > Get the DDR firmware > > -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.5.bin > -$ chmod +x firmware-imx-8.5.bin > -$ ./firmware-imx-8.5 > -$ cp firmware-imx-8.5/firmware/ddr/synopsys/lpddr4*.bin $(srctree) > +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin There is a newer version of DDR firmware available from NXP (8.14), perhaps you can recommend it here instead of 8.9. Link: https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.14.bin > +$ chmod +x firmware-imx-8.9.bin > +$ ./firmware-imx-8.9 > +$ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(srctree) > > Build U-Boot > > $ make imx8mm_beacon_defconfig > -$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- > +$ make CROSS_COMPILE=aarch64-linux-gnu- > > Burn U-Boot to microSD Card > === > diff --git a/board/beacon/imx8mn/README b/board/beacon/imx8mn/README > index a9eddd4e64..7e5d1545e6 100644 > --- a/board/beacon/imx8mn/README > +++ b/board/beacon/imx8mn/README > @@ -12,7 +12,7 @@ Get and Build the ARM Trusted firmware > Note: $(srctree) is U-Boot source directory > > $ git clone https://source.codeaurora.org/external/imx/imx-atf > -$ git checkout imx_5.4.47_2.2.0 > +$ git checkout lf_v2.4 Same as for Mini above. > $ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu- > $ cp build/imx8mm/release/bl31.bin $(srctree) > > @@ -26,7 +26,7 @@ $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin > $(srctree) > Build U-Boot > > $ make imx8mn_beacon_defconfig > -$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x96 > +$ make CROSS_COMPILE=aarch64-linux-gnu- > > Burn U-Boot to microSD Card > === > -- > 2.32.0 -- andrey
Re: [PATCH] arm: rmobile: rzg2_beacon: Migrate reset to SYSRESET_PSCI
On Fri, Dec 17, 2021 at 1:48 PM Adam Ford wrote:
>
> Instead of a custom cpu_reset function, use the sysreset_psci
> instead to reduce redundant code clutter.
>
> Signed-off-by: Adam Ford
Marek,
Gentle ping on this one.
>
> diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> index df6044a429..4b41c6fdaa 100644
> --- a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> +++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> @@ -6,7 +6,6 @@
> #include
> #include
> #include
> -#include
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -18,15 +17,6 @@ int board_init(void)
> return 0;
> }
>
> -#define RST_BASE 0xE616
> -#define RST_CA57RESCNT (RST_BASE + 0x40)
> -#define RST_CODE 0xA5A5000F
> -
> -void reset_cpu(void)
> -{
> - writel(RST_CODE, RST_CA57RESCNT);
> -}
> -
> #if IS_ENABLED(CONFIG_MULTI_DTB_FIT)
> int board_fit_config_name_match(const char *name)
> {
> diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig
> index 6c48c3b8c9..55d4982721 100644
> --- a/configs/rzg2_beacon_defconfig
> +++ b/configs/rzg2_beacon_defconfig
> @@ -70,6 +70,8 @@ CONFIG_SCIF_CONSOLE=y
> CONFIG_SPI=y
> CONFIG_DM_SPI=y
> CONFIG_RENESAS_RPC_SPI=y
> +CONFIG_SYSRESET=y
> +CONFIG_SYSRESET_PSCI=y
> CONFIG_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_EHCI_HCD=y
> --
> 2.32.0
>
Re: [PATCH V2] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn
On Tue, Jan 4, 2022 at 2:32 AM Michael Walle wrote:
>
> Hi,
>
> > The imx8mm and imx8mn appear compatible with imx7d-usb
> > flags in the OTG driver. If the dr_mode is defined as
> > host or peripheral, the device appears to operate correctly,
> > however the auto host/peripheral detection results in an error.
> >
> > The solution isn't just adding checks for imx8mm and imx8mn to
> > the check for imx7, because the USB clock needs to be running
> > to read from the USBNC_PHY_STATUS_OFFSET register or it will hang.
> >
> > The init_type in both priv and plat data are the same, so it doesn't
> > make sense to configure the data in the plat data and copy the
> > data to priv when priv can be configured directly. Instead, rename
> > ehci_usb_of_to_plat to ehci_usb_dr_mode and call it from the
> > probe functions after the clocks are enabled, but before the data
> > is required.
> >
> > With that added, the additional checks for imx8mm and imx8mn will
> > allow reading the register to automatically determine the state
> > (host or device) of the OTG controller.
> >
> > Signed-off-by: Adam Ford
> > ---
> > V2: Rename ehci_usb_of_to_plat to ehci_usb_dr_mode and call it
> > from the probe after the clocks are enabled, but before
> > the data is needed.
> >
> > diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> > index 1bd6147c76..f2a34b7f06 100644
> > --- a/drivers/usb/host/ehci-mx6.c
> > +++ b/drivers/usb/host/ehci-mx6.c
>
> ..
>
> > @@ -639,10 +639,8 @@ static int mx6_parse_dt_addrs(struct udevice *dev)
> >
> > static int ehci_usb_probe(struct udevice *dev)
> > {
> > - struct usb_plat *plat = dev_get_plat(dev);
> > struct usb_ehci *ehci = dev_read_addr_ptr(dev);
> > struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
> > - enum usb_init_type type = plat->init_type;
> > struct ehci_hccr *hccr;
> > struct ehci_hcor *hcor;
> > int ret;
> > @@ -660,8 +658,6 @@ static int ehci_usb_probe(struct udevice *dev)
> > return ret;
> >
> > priv->ehci = ehci;
> > - priv->init_type = type;
>
Michael,
> I'm not sure this is correct. There is also this:
> https://elixir.bootlin.com/u-boot/v2022.01-rc4/source/drivers/usb/host/usb-uclass.c#L407
>
Further down in the code, you should see:
priv->phy_type = usb_get_phy_mode(dev_ofnode(dev));
>
> Which won't work anymore. usb_setup_ehci_gadget() is called from
> usb_gadget_register_driver() in ci_udc.c. The latter is the one used
> on the imx, right? But I might be wrong. I'm still trying to figure
> out how this all works together, because I also try to get OTG
> running on the dwc3 driver. It looks like the ci_udc.c is special
> here, and I wonder how a transition to UCLASS_USB_GADGET_GENERIC
> might look like for this driver.
This driver really isn't changing anything, it's just an order of
operations. Previously there was a separate that was being called to
determine the init_type as being either a peripheral or host. If it
wasn't explicitly set in the device tree, the helper function would
query a register, however, on the imx8mm and imx8mn platforms, the
clocks were not running which resulted in a hang. What I've done is
simply move the helper function into the probe and have it run after
the clocks start. In theory the register values will be the same as
they would be with the help function still in place.
Both Tim Harvey and I have tested on an imx8mm and Fabio tested it on
an imx7. For me, the peripheral mode worked when the ID pin of the
USB-OTG was not grounded. When it was grounded, the system corrected
identified it as a host and I was able to mount a USB drive.
>
> -michael
