date:20220502


On 02.05.22 18:41, Pali Rohár wrote:

MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.

Signed-off-by: Pali Rohár 
---
  drivers/watchdog/Kconfig   |   7 ++
  drivers/watchdog/Makefile  |   1 +
  drivers/watchdog/max6370_wdt.c | 119 +
  3 files changed, 127 insertions(+)
  create mode 100644 drivers/watchdog/max6370_wdt.c

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index f90f0ca02bce..1801698ac512 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -167,6 +167,13 @@ config WDT_GPIO
  doc/device-tree-bindings/watchdog/gpio-wdt.txt for
  information on how to describe the watchdog in device tree.
  
+config WDT_MAX6370

+   bool "MAX6370 watchdog timer support"
+   depends on WDT
+   select DM_GPIO
+   help
+ Select this to enable max6370 watchdog timer.
+
  config WDT_MPC8xx
bool "MPC8xx watchdog timer support"
depends on WDT && MPC8xx
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index a35bd559f51b..f999e4126b4f 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
  obj-$(CONFIG_WDT_ORION) += orion_wdt.o
  obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
  obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
+obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
  obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
  obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
  obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
diff --git a/drivers/watchdog/max6370_wdt.c b/drivers/watchdog/max6370_wdt.c
new file mode 100644
index ..556c6a4b6d6b
--- /dev/null
+++ b/drivers/watchdog/max6370_wdt.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+// (C) 2022 Pali Rohár 
+
+#include 


AFAIK, it's not recommended any more to include "common.h" in general.

Looks good, other than this:

Reviewed-by: Stefan Roese 

Thanks,
Stefan


+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MAX6370_SET_MASK   0x7
+#define MAX6370_SET_1MS0x0
+#define MAX6370_SET_10MS   0x1
+#define MAX6370_SET_30MS   0x2
+#define MAX6370_SET_DISABLE0x3
+#define MAX6370_SET_100MS  0x4
+#define MAX6370_SET_1S 0x5
+#define MAX6370_SET_10S0x6
+#define MAX6370_SET_60S0x7
+
+#define MAX6370_WDI0x8
+
+struct max6370_wdt {
+   void __iomem *reg;
+   struct gpio_desc gpio_wdi;
+};
+
+static int max6370_wdt_start(struct udevice *dev, u64 ms, ulong flags)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   val = readb(wdt->reg);
+   val &= ~MAX6370_SET_MASK;
+
+   if (ms <= 1)
+   val |= MAX6370_SET_1MS;
+   else if (ms <= 10)
+   val |= MAX6370_SET_10MS;
+   else if (ms <= 30)
+   val |= MAX6370_SET_30MS;
+   else if (ms <= 100)
+   val |= MAX6370_SET_100MS;
+   else if (ms <= 1000)
+   val |= MAX6370_SET_1S;
+   else if (ms <= 1)
+   val |= MAX6370_SET_10S;
+   else
+   val |= MAX6370_SET_60S;
+
+   writeb(val, wdt->reg);
+
+   return 0;
+}
+
+static int max6370_wdt_stop(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   val = readb(wdt->reg);
+   val &= ~MAX6370_SET_MASK;
+   val |= MAX6370_SET_DISABLE;
+   writeb(val, wdt->reg);
+
+   return 0;
+}
+
+static int max6370_wdt_reset(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   if (dm_gpio_is_valid(>gpio_wdi)) {
+   dm_gpio_set_value(>gpio_wdi, 1);
+   udelay(1);
+   dm_gpio_set_value(>gpio_wdi, 0);
+   } else {
+   val = readb(wdt->reg);
+   writeb(val | MAX6370_WDI, wdt->reg);
+   writeb(val & ~MAX6370_WDI, wdt->reg);
+   }
+
+   return 0;
+}
+
+static int max6370_wdt_probe(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+
+   wdt->reg = dev_read_addr_ptr(dev);
+   if (!wdt->reg)
+   return -EINVAL;
+
+   /* WDI gpio is optional */
+   gpio_request_by_name(dev, "gpios", 0, >gpio_wdi, GPIOD_IS_OUT);
+
+   return 0;
+}
+
+static const struct wdt_ops max6370_wdt_ops = {
+   .start = max6370_wdt_start,
+   .stop = max6370_wdt_stop,
+   .reset = max6370_wdt_reset,
+};
+
+static const struct udevice_id max6370_wdt_ids[] = {
+   { .compatible = "maxim,max6370" },
+   {}
+};
+
+U_BOOT_DRIVER(max6370_wdt) = {
+   .name = "max6370_wdt",
+   .id = UCLASS_WDT,
+   .of_match = max6370_wdt_ids,
+   .probe = max6370_wdt_probe,
+   .priv_auto = sizeof(struct max6370_wdt),
+   .ops = _wdt_ops,
+};


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194

Re: [PATCH V2 2/4] mtd: nand: mxs_nand_spl: Fix bad block skipping

2022-05-02 Thread Michael Nazzareno Trimarchi

Hi Han

On Mon, May 2, 2022 at 11:32 PM Han Xu  wrote:
>
> On 22/05/01 08:36AM, Michael Nazzareno Trimarchi wrote:
> > Dear Han and Fabio
> >
> > On Thu, Apr 28, 2022 at 7:01 AM Michael Nazzareno Trimarchi
> >  wrote:
> > >
> > > Hi
> > >
> > > On Thu, Apr 28, 2022 at 2:27 AM Han Xu  wrote:
> > > >
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: Michael Trimarchi 
> > > > > Sent: Wednesday, April 27, 2022 12:50 AM
> > > > > To: Han Xu ; U-Boot-Denx 
> > > > > Cc: Ye Li ; Stefano Babic ; Miquel 
> > > > > Raynal
> > > > > ; Fabio Estevam ; Dario
> > > > > Binacchi ; Sean Anderson
> > > > > ; linux-ker...@amarulasolutions.com; Jagan 
> > > > > Teki
> > > > > ; Ariel D'Alessandro
> > > > > ; Fabio Estevam 
> > > > > Subject: [PATCH V2 2/4] mtd: nand: mxs_nand_spl: Fix bad block 
> > > > > skipping
> > > > >
> > > > > The specific implementation was having bug. Those bugs are since the 
> > > > > beginning
> > > > > of the implementation. Some manufactures can receive this bug in 
> > > > > their SPL code.
> > > > > This bug start to be more visible on architecture that has 
> > > > > complicated boot
> > > > > process like imx8mn. Older version of uboot has the same problem only 
> > > > > if the
> > > > > bad block appear in correspoding of befine of u-boot image. In order 
> > > > > to adjust
> > > > > the function we scan from the first block. The logic is not changed 
> > > > > to have a
> > > > > simple way to fix without get regression.
> > > > >
> > > > > The problematic part of old code was in this part:
> > > > >
> > > > > while (is_badblock(mtd, offs, 1)) {
> > > > >page = page + nand_page_per_block;
> > > > >   /* Check i we've reached the end of flash. */
> > > > >   if (page >= mtd->size >> chip->page_shift) {
> > > > >   free(page_buf);
> > > > >   return -ENOMEM;
> > > > >  }
> > > > > }
> > > > >
> > > > > Even we fix it adding increment of the offset of one erase block size 
> > > > > we don't fix
> > > > > the problem, because the first erase block where the image start is 
> > > > > not checked.
> > > >
> > > > Could you please describe more details about your test? Thanks.
> > >
> > > Suppose you have a badblock on 5 or 6. Let's start to have only 6
> > > and you write uboot from 5 and let's the uboot be enough big to cover 5, 
> > > 6, 7, 8
> > >
> > >
> > > Case 1)
> > > When you write the block 6 the code will skip it as bad during
> > > programming. THe image of uboot (or flash.bin) will
> > > be on 5 7 8 9, because the 6 is skipped. The while loop on spl will
> > > read (from raw offset the 5) and then he will found the
> > > bad block on next erase block in the while loop and will exists at the
> > > end of the flash because the test
> > > is done on the offset and not on the page that is not incremented
> > >
> > > Case 2)
> > >
> > > Now same example but let's suppose to have block 5 bad. So you write
> > > your image and it will start
> > > from a raw offset 5 but it will be written starting from 6. The spl
> > > loader will fail because it will not skip
> > > the first block and then will fail anyway to read the image. The patch
> > > try to fix the above behavior
> > >
> > > Case 3) can be any combination
> > >
> >
> > Do I need to resend v3?
> >
> > Michael
>
> It's not about the v3. I need to discuss some details with ROM team but
> unfortunately they are all in vacation till May 5th. I will respond after the
> discussion.
>

No problem I will wait, but the code is used by other nxp
architectures that don't use the
rom api.

Michael

Definit
> >
> > > Michael
> > >
> > >
> > >
> > > >
> > > > > The code was tested on an imx8mn where the boot rom api was not able 
> > > > > to skip
> > > > > it. Apart of that other architecure are using this code and all 
> > > > > boards that has
> > > > > nand as boot device can be affected
> > > > >
> > > > > Cc: Han Xu 
> > > > > Cc: Fabio Estevam 
> > > > > Signed-off-by: Michael Trimarchi 
> > > > > ---
> > > > > V1->V2:
> > > > >   - Adjust the commit message
> > > > >   - Add Cc Han Xu and Fabio
> > > > >   - fix size >= 0 to > 0
> > > > > ---
> > > > >  drivers/mtd/nand/raw/mxs_nand_spl.c | 90 
> > > > > -
> > > > >  1 file changed, 49 insertions(+), 41 deletions(-)
> > > > >
> > > > > diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > > b/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > > index 59a67ee414..2bfb181007 100644
> > > > > --- a/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > > +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > > @@ -218,14 +218,14 @@ void nand_init(void)
> > > > >   mxs_nand_setup_ecc(mtd);
> > > > >  }
> > > > >
> > > > > -int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
> > > > > +int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
> > > > >  {
> > > > > - struct nand_chip *chip;
> > > > > - unsigned int page;
> > > > > +

Re: [PATCH] efi_loader: Select EVENT as well

2022-05-02 Thread Jan Kiszka

On 28.04.22 13:04, Heinrich Schuchardt wrote:
> On 4/28/22 12:03, Jan Kiszka wrote:
>> On 27.04.22 07:55, AKASHI Takahiro wrote:
>>> On Wed, Apr 27, 2022 at 07:47:15AM +0200, Jan Kiszka wrote:
 From: Jan Kiszka 

 Fixes

 WARNING: unmet direct dependencies detected for EVENT_DYNAMIC
    Depends on [n]: EVENT [=n]
    Selected by [y]:
    - EFI_LOADER [=y] && OF_LIBFDT [=y] && ...

 and the succeeding build breakage.

 Signed-off-by: Jan Kiszka 
 ---
   lib/efi_loader/Kconfig | 1 +
   1 file changed, 1 insertion(+)

 diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
 index 6b245f50a72..1bfb9ddbda9 100644
 --- a/lib/efi_loader/Kconfig
 +++ b/lib/efi_loader/Kconfig
 @@ -15,6 +15,7 @@ config EFI_LOADER
   depends on !EFI_APP
   default y if !ARM || SYS_CPU = armv7 || SYS_CPU = armv8
   select DM_EVENT
 +    select EVENT
> 
> event_notify_null() used for the DM_EVENT implementation is not
> available without EVENT.

It is a static inline stub in that case.

> 
> Please, let DM_EVENT select on EVENT (drivers/core/Kconfig).
> 

Just tested with a qemu target, and there is no generic build dependency
of DM_EVENT on EVENT.

The problem here is that EFI_LOADER selects EVENT_DYNAMIC but not EVENT,
and that cannot work because the former depends on the latter.

Jan

-- 
Siemens AG, Technology
Competence Center Embedded Linux

Re: [PATCH 11/15] imx: imx8mn_bsh_smm_s2: drop CONFIG_MXC_UART_BASE


Hi Stefano,

On 2022/4/30 20:43, Peng Fan (OSS) wrote:

From: Peng Fan 

CONFIG_DM_SERIAL is enabled, this macro not needed.


I squashed this patch to

"[PATCH V2] imx: drop CONFIG_MXC_UART_BASE"

Thanks,
Peng.



Signed-off-by: Peng Fan 
---
  include/configs/imx8mn_bsh_smm_s2_common.h | 2 --
  1 file changed, 2 deletions(-)

diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h 
b/include/configs/imx8mn_bsh_smm_s2_common.h
index 6387576c2da..57be38d9433 100644
--- a/include/configs/imx8mn_bsh_smm_s2_common.h
+++ b/include/configs/imx8mn_bsh_smm_s2_common.h
@@ -45,8 +45,6 @@
  #define CONFIG_SYS_SDRAM_BASE 0x4000
  #define PHYS_SDRAM0x4000
  
-#define CONFIG_MXC_UART_BASE		UART4_BASE_ADDR

-
  /* Monitor Command Prompt */
  #define CONFIG_SYS_CBSIZE SZ_2K
  #define CONFIG_SYS_MAXARGS64

Re: [PATCH 02/15] imx: imx8m[m/n/p]_venice: Enable SPL_DM_SERIAL





On 2022/5/3 0:59, Tim Harvey wrote:

On Sat, Apr 30, 2022 at 5:01 AM Peng Fan (OSS)  wrote:


From: Peng Fan 

Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan 
---
  board/gateworks/venice/spl.c| 22 ++
  configs/imx8mm_venice_defconfig |  1 -
  configs/imx8mn_venice_defconfig |  1 -
  configs/imx8mp_venice_defconfig |  1 -
  include/configs/imx8mm_venice.h |  3 ---
  include/configs/imx8mn_venice.h |  3 ---
  include/configs/imx8mp_venice.h |  3 ---
  7 files changed, 2 insertions(+), 32 deletions(-)

diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index 223f22d3463..af196e5b87c 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -87,33 +87,17 @@ static void spl_dram_init(int size)
 ddr_init(dram_timing);
  }

-#define UART_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
  #define WDOG_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)

  #ifdef CONFIG_IMX8MM
-static iomux_v3_cfg_t const uart_pads[] = {
-   IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-   IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
  static iomux_v3_cfg_t const wdog_pads[] = {
 IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
  };
  #elif CONFIG_IMX8MN
-static const iomux_v3_cfg_t uart_pads[] = {
-   IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-   IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
  static const iomux_v3_cfg_t wdog_pads[] = {
 IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
  };
  #elif CONFIG_IMX8MP
-static const iomux_v3_cfg_t uart_pads[] = {
-   MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-   MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
  static const iomux_v3_cfg_t wdog_pads[] = {
 MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
  };
@@ -128,8 +112,6 @@ int board_early_init_f(void)

 set_wdog_reset(wdog);

-   imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 return 0;
  }

@@ -276,8 +258,6 @@ void board_init_f(ulong dummy)

 timer_init();

-   preloader_console_init();
-
 /* Clear the BSS. */
 memset(__bss_start, 0, __bss_end - __bss_start);

@@ -287,6 +267,8 @@ void board_init_f(ulong dummy)
 hang();
 }

+   preloader_console_init();
+
 enable_tzc380();

 /* need to hold PCIe switch in reset otherwise it can lock i2c bus 
EEPROM is on */
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 490de193181..0165a4e5df0 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -113,7 +113,6 @@ CONFIG_DM_REGULATOR=y
  CONFIG_DM_REGULATOR_FIXED=y
  CONFIG_DM_REGULATOR_GPIO=y
  CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
  CONFIG_MXC_UART=y
  CONFIG_SYSRESET=y
  CONFIG_SPL_SYSRESET=y
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index 639fee7e5f1..63a65497371 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -112,7 +112,6 @@ CONFIG_DM_REGULATOR=y
  CONFIG_DM_REGULATOR_FIXED=y
  CONFIG_DM_REGULATOR_GPIO=y
  CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
  CONFIG_MXC_UART=y
  CONFIG_SYSRESET=y
  CONFIG_SPL_SYSRESET=y
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 97c8bb59211..626ac247881 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -112,7 +112,6 @@ CONFIG_DM_REGULATOR=y
  CONFIG_DM_REGULATOR_FIXED=y
  CONFIG_DM_REGULATOR_GPIO=y
  CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
  CONFIG_MXC_UART=y
  CONFIG_SYSRESET=y
  CONFIG_SPL_SYSRESET=y
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index 1b26e0280e1..c3e92b76141 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -101,9 +101,6 @@
  #define PHYS_SDRAM_SIZESZ_4G
  #define CONFIG_SYS_BOOTM_LEN   SZ_256M

-/* UART */
-#define CONFIG_MXC_UART_BASE   UART2_BASE_ADDR
-
  /* Monitor Command Prompt */
  #define CONFIG_SYS_CBSIZE  SZ_2K
  #define CONFIG_SYS_MAXARGS 64
diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
index a4826779022..41062b139f8 100644
--- a/include/configs/imx8mn_venice.h
+++ b/include/configs/imx8mn_venice.h
@@ -97,9 +97,6 @@
  #define PHYS_SDRAM_SIZESZ_4G
  #define CONFIG_SYS_BOOTM_LEN   SZ_256M

-/* UART */
-#define CONFIG_MXC_UART_BASE   UART2_BASE_ADDR
-
  /* Monitor Command Prompt */
  #define CONFIG_SYS_CBSIZE  SZ_2K
  #define

[PATCH V2] imx: drop CONFIG_MXC_UART_BASE

From: Peng Fan 

Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL,
the legacy macro no need to be defined.

Reviewed-by: Heiko Schocher 
Reviewed-by: Fabio Estevam 
Signed-off-by: Peng Fan 
---

V2:
 Add R-b
 Drop comments
 add imx8mn_bsh_smm_s2_common.h

 include/configs/aristainetos2.h| 2 --
 include/configs/imx8mm_evk.h   | 1 -
 include/configs/imx8mn_bsh_smm_s2_common.h | 2 --
 include/configs/imx8mn_evk.h   | 1 -
 include/configs/imx8mp_evk.h   | 1 -
 include/configs/mx7dsabresd.h  | 1 -
 include/configs/somlabs_visionsom_6ull.h   | 1 -
 include/configs/tbs2910.h  | 3 ---
 include/configs/verdin-imx8mm.h| 3 ---
 include/configs/verdin-imx8mp.h| 3 ---
 10 files changed, 18 deletions(-)

diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 8ee97f1d4e3..27adae5d6bf 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -14,10 +14,8 @@
 #define CONFIG_HOSTNAME"aristainetos2"
 
 #if (CONFIG_SYS_BOARD_VERSION == 5)
-#define CONFIG_MXC_UART_BASE   UART2_BASE
 #define CONSOLE_DEV"ttymxc1"
 #elif (CONFIG_SYS_BOARD_VERSION == 6)
-#define CONFIG_MXC_UART_BASE   UART1_BASE
 #define CONSOLE_DEV"ttymxc0"
 #endif
 
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 42b78485cfc..7dd66527c3d 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -68,7 +68,6 @@
 #define PHYS_SDRAM  0x4000
 #define PHYS_SDRAM_SIZE0x8000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE   UART2_BASE_ADDR
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  2048
diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h 
b/include/configs/imx8mn_bsh_smm_s2_common.h
index 6387576c2da..57be38d9433 100644
--- a/include/configs/imx8mn_bsh_smm_s2_common.h
+++ b/include/configs/imx8mn_bsh_smm_s2_common.h
@@ -45,8 +45,6 @@
 #define CONFIG_SYS_SDRAM_BASE  0x4000
 #define PHYS_SDRAM 0x4000
 
-#define CONFIG_MXC_UART_BASE   UART4_BASE_ADDR
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  SZ_2K
 #define CONFIG_SYS_MAXARGS 64
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 034132225c6..b20e0a5553d 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -75,7 +75,6 @@
 #define PHYS_SDRAM  0x4000
 #define PHYS_SDRAM_SIZE0x8000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE   UART2_BASE_ADDR
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  2048
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index cc8d65cb54e..cbdd490a300 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -80,7 +80,6 @@
 #define PHYS_SDRAM_2   0x1
 #define PHYS_SDRAM_2_SIZE  0xC000  /* 3 GB */
 
-#define CONFIG_MXC_UART_BASE   UART2_BASE_ADDR
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  2048
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index aaad232f0e4..62e62c6701f 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -12,7 +12,6 @@
 
 #define PHYS_SDRAM_SIZESZ_1G
 
-#define CONFIG_MXC_UART_BASEUART1_IPS_BASE_ADDR
 
 #ifdef CONFIG_IMX_BOOTAUX
 /* Set to QSPI1 A flash at default */
diff --git a/include/configs/somlabs_visionsom_6ull.h 
b/include/configs/somlabs_visionsom_6ull.h
index d4761296c75..e6aad386efe 100644
--- a/include/configs/somlabs_visionsom_6ull.h
+++ b/include/configs/somlabs_visionsom_6ull.h
@@ -16,7 +16,6 @@
 /* SPL options */
 #include "imx6_spl.h"
 
-#define CONFIG_MXC_UART_BASE   UART1_BASE
 
 /* MMC Configs */
 #ifdef CONFIG_FSL_USDHC
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index b7a94812f35..5d8cb34ad9a 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -24,9 +24,6 @@
 
 #define CONFIG_SYS_BOOTMAPSZ   0x1000
 
-/* Serial console */
-#define CONFIG_MXC_UART_BASE   UART1_BASE /* select UART1/UART2 */
-
 /* Framebuffer */
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index da3dc95f9ee..e0f0347fcf4 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -83,9 +83,6 @@
 #define PHYS_SDRAM  0x4000
 #define PHYS_SDRAM_SIZESZ_2G /* 2GB DDR */
 
-/* UART */
-#define CONFIG_MXC_UART_BASE   UART1_BASE_ADDR
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  SZ_2K
 #define CONFIG_SYS_MAXARGS 64
diff --git

RE: [PATCH] pwm: aspeed: Select SYSCON to get parent detail.

2022-05-02 Thread ChiaWei Wang

> From: Billy Tsai 
> Sent: Friday, April 29, 2022 11:51 AM
> 
> To work correctly, this driver depends on SYSCON to get the base address from
> the parent dts node.
> 
> Signed-off-by: Billy Tsai 
> ---
>  drivers/pwm/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index
> cb54e67fae..cf66293eeb 100644
> --- a/drivers/pwm/Kconfig
> +++ b/drivers/pwm/Kconfig
> @@ -12,6 +12,7 @@ config DM_PWM
>  config PWM_ASPEED
>   bool "Enable support for the Aspeed PWM"
>   depends on DM_PWM
> + select SYSCON
>   help
> This PWM is found on Ast2600 SoCs. It supports a programmable period
> and duty cycle. It provides 16 channels which can be independently
> --
> 2.25.1

Reviewed-by: Chia-Wei Wang

Re: [PATCH 00/12] sunxi: Devicetree sync from Linux v5.18-rc1

2022-05-02 Thread Samuel Holland

On 4/30/22 7:59 PM, Andre Przywara wrote:
>>> So those DT updates are really only important for mobile devices like 
>>> the
>>> Pinephone, which probably don't use UEFI booting.  
>>
>> We would really like to use UEFI booting on the PinePhone, and the 
>> out-of-date
>> devicetree is one thing blocking that. We need to use $fdtcontroladdr to 
>> pick up
>> the CPU idle states that are added at runtime by TF-A.
> 
> Yes, I was wondering about that. I could imagine that suspend/resume is
> a killer feature for the PinePhone. It probably sounds useful to fully
> update just the Pinephone .dts, giving up compatibility for older
> kernels. IIUC the PinePhone doesn't run normal "desktop" distros, but
> relies more on custom OSes, tailored to a Phone use case in general?

There is a mix of desktop distros, mobile spins of desktop distros (the
largest/most popular category), and mobile-specific OSes[1].

[1]: https://wiki.pine64.org/wiki/PinePhone_Software_Releases

> What kernels are those OSes using?

Most are using Ondrej's fork[2]. Some (at least Mobian) maintain their own patch
set.

[2]: https://github.com/megous/linux/tags

> The only caveat would be that this adds to the mess and increases the
> diff to mainline, but maybe this could be solved by a
> sun50i-a64-pinephone-u-boot.dtsi?

Devicetree changes are still needed for camera and USB Type C support, so the
r_intc changes could go in with those. I don't think we need to do anything
special from the U-Boot side at this point.

 So, does that mean the plan is to keep the r_intc changes out of U-Boot
 for now, but we can sync the rest, and come up with a plan to fully
 update in time?  
>>>
>>> That's one possible solution, yes, and so far the easiest, it provides
>>> a good balance between features and compatibility.  
>>
>> This was my understanding of the plan as well.
>>
>>> Theoretically we can never fully sync, unless we decide to no longer
>>> support those older OSes (older Linux kernels and (current) *BSD).  
>>
>> Do we have any guidance for when this could be? After the n+1 LTS kernel/BSD
>> release? After the distro/BSD installers update their kernels?
> 
> More the latter, I'd say when major distros stop shipping those
> old kernels in relevant releases. Especially Debian is one to keep an
> eye on I guess, since they are on 5.10 *currently*, and their installer
> properly stays there for a while. Ubuntu 20.04 shipped with 5.4, and I'd
> like to support that say at least one more year still. Don't really
> keep track of the kernels in other distros, but I think these two are
> among the more conservative ones.

OK, that makes sense.

> Samuel, since I have you here: With your new hat Linux hat on, can you
> say whether incompatible DT changes won't happen in the future anymore?

No, I really cannot.

As for major breaking changes, there is some push from the Linux clock
maintainers toward finishing the conversion from legacy to sunxi-ng clock
drivers. This affects A31, A23/A33, and A80. (In fact, this unfinished
conversion is causing me quite some trouble trying to expand the DM clock
drivers in U-Boot.)

And then there are always little easy-to-miss things (like adding references to
new ASoC widgets) that prevent drivers from loading on old kernels.

> From experience I'd say there are ways to avoid them, though possibly at
> some cost (less clean DT, or deviating from some DT rules).

and, as I'm sure you're painfully aware of, delays in adding support for new
hardware, until we can get the binding perfect, because we know we will be stuck
with it.

>>> One thing we could explore is patching the DT at runtime, but U-Boot
>>> cannot know if the OS supports the new style or not, so it has to be
>>> manually triggered.  
>>
>> Right, automatically handling this is not really feasible. Users that need 
>> the
>> r_intc changes for suspend/resume will have to load a DTB or overlay from 
>> disk.
>> (We could possibly build in such an overlay, and load it based on some
>> environment variable, but this seems like little benefit when most users 
>> load a
>> DTB from disk anyway.)
> 
> But loading from disk would lose any manipulation that previous
> firmware did, for instance TF-A. Plus I think reserved memory is not
> properly propagated, at least last time I checked. Also the DT would
> really need to be loaded by U-Boot, loading it via grub would lose even
> more manipulations like the DRAM size and MAC address.
> 
> So I believe an overlay is the way to go. I have a patch sitting here
> that applies all .dtbo files found in a directory on some block device
> (e.g. "fdt apply_all mmc 0:1 overlays/"), would that help?

Possibly? I will defer to others on how devicetree overlays could/should be
integrated into the distro boot process.

Regards,
Samuel

Re: [RFC PATCH] efi_loader: add sha384/512 on certificate revocation

2022-05-02 Thread Stuart Yoder





On 4/11/22 3:40 AM, Ilias Apalodimas wrote:

Hi Akashi-san,


On Mon, Apr 11, 2022 at 05:31:08PM +0900, AKASHI Takahiro wrote:
On Mon, Apr 11, 2022 at 10:56:22AM +0300, Ilias Apalodimas wrote:

Currently we don't support sha384/512 for the X.509
certificate To-Be-Signed contents.  Moreover if we come across such a
hash we skip the check and approve the image,  although the image
might needs to be rejected.


Are you sure? You seem to be talking about efi_signature_check_revocation() 
here.
Please be more specific.


Arm has a security ACS testsuite [1].  The whole checking fails exactly on
this bug.


[cut]



[1] https://github.com/ARM-software/arm-systemready/tree/security-extension-acs

Thanks
/Ilias


Note, the above link is from the alpha release.  Please use the EAC
release branch:

https://github.com/ARM-software/arm-systemready/tree/security-interface-extension-acs

Thanks,
Stuart

Re: [PATCH V2 2/4] mtd: nand: mxs_nand_spl: Fix bad block skipping

2022-05-02 Thread Han Xu

On 22/05/01 08:36AM, Michael Nazzareno Trimarchi wrote:
> Dear Han and Fabio
> 
> On Thu, Apr 28, 2022 at 7:01 AM Michael Nazzareno Trimarchi
>  wrote:
> >
> > Hi
> >
> > On Thu, Apr 28, 2022 at 2:27 AM Han Xu  wrote:
> > >
> > >
> > >
> > > > -Original Message-
> > > > From: Michael Trimarchi 
> > > > Sent: Wednesday, April 27, 2022 12:50 AM
> > > > To: Han Xu ; U-Boot-Denx 
> > > > Cc: Ye Li ; Stefano Babic ; Miquel Raynal
> > > > ; Fabio Estevam ; Dario
> > > > Binacchi ; Sean Anderson
> > > > ; linux-ker...@amarulasolutions.com; Jagan Teki
> > > > ; Ariel D'Alessandro
> > > > ; Fabio Estevam 
> > > > Subject: [PATCH V2 2/4] mtd: nand: mxs_nand_spl: Fix bad block skipping
> > > >
> > > > The specific implementation was having bug. Those bugs are since the 
> > > > beginning
> > > > of the implementation. Some manufactures can receive this bug in their 
> > > > SPL code.
> > > > This bug start to be more visible on architecture that has complicated 
> > > > boot
> > > > process like imx8mn. Older version of uboot has the same problem only 
> > > > if the
> > > > bad block appear in correspoding of befine of u-boot image. In order to 
> > > > adjust
> > > > the function we scan from the first block. The logic is not changed to 
> > > > have a
> > > > simple way to fix without get regression.
> > > >
> > > > The problematic part of old code was in this part:
> > > >
> > > > while (is_badblock(mtd, offs, 1)) {
> > > >page = page + nand_page_per_block;
> > > >   /* Check i we've reached the end of flash. */
> > > >   if (page >= mtd->size >> chip->page_shift) {
> > > >   free(page_buf);
> > > >   return -ENOMEM;
> > > >  }
> > > > }
> > > >
> > > > Even we fix it adding increment of the offset of one erase block size 
> > > > we don't fix
> > > > the problem, because the first erase block where the image start is not 
> > > > checked.
> > >
> > > Could you please describe more details about your test? Thanks.
> >
> > Suppose you have a badblock on 5 or 6. Let's start to have only 6
> > and you write uboot from 5 and let's the uboot be enough big to cover 5, 6, 
> > 7, 8
> >
> >
> > Case 1)
> > When you write the block 6 the code will skip it as bad during
> > programming. THe image of uboot (or flash.bin) will
> > be on 5 7 8 9, because the 6 is skipped. The while loop on spl will
> > read (from raw offset the 5) and then he will found the
> > bad block on next erase block in the while loop and will exists at the
> > end of the flash because the test
> > is done on the offset and not on the page that is not incremented
> >
> > Case 2)
> >
> > Now same example but let's suppose to have block 5 bad. So you write
> > your image and it will start
> > from a raw offset 5 but it will be written starting from 6. The spl
> > loader will fail because it will not skip
> > the first block and then will fail anyway to read the image. The patch
> > try to fix the above behavior
> >
> > Case 3) can be any combination
> >
> 
> Do I need to resend v3?
> 
> Michael

It's not about the v3. I need to discuss some details with ROM team but
unfortunately they are all in vacation till May 5th. I will respond after the
discussion.

> 
> > Michael
> >
> >
> >
> > >
> > > > The code was tested on an imx8mn where the boot rom api was not able to 
> > > > skip
> > > > it. Apart of that other architecure are using this code and all boards 
> > > > that has
> > > > nand as boot device can be affected
> > > >
> > > > Cc: Han Xu 
> > > > Cc: Fabio Estevam 
> > > > Signed-off-by: Michael Trimarchi 
> > > > ---
> > > > V1->V2:
> > > >   - Adjust the commit message
> > > >   - Add Cc Han Xu and Fabio
> > > >   - fix size >= 0 to > 0
> > > > ---
> > > >  drivers/mtd/nand/raw/mxs_nand_spl.c | 90 -
> > > >  1 file changed, 49 insertions(+), 41 deletions(-)
> > > >
> > > > diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > b/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > index 59a67ee414..2bfb181007 100644
> > > > --- a/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
> > > > @@ -218,14 +218,14 @@ void nand_init(void)
> > > >   mxs_nand_setup_ecc(mtd);
> > > >  }
> > > >
> > > > -int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
> > > > +int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
> > > >  {
> > > > - struct nand_chip *chip;
> > > > - unsigned int page;
> > > > + unsigned int sz;
> > > > + unsigned int block, lastblock;
> > > > + unsigned int page, page_offset;
> > > >   unsigned int nand_page_per_block;
> > > > - unsigned int sz = 0;
> > > > + struct nand_chip *chip;
> > > >   u8 *page_buf = NULL;
> > > > - u32 page_off;
> > > >
> > > >   chip = mtd_to_nand(mtd);
> > > >   if (!chip->numchips)
> > > > @@ -235,47 +235,42 @@ int nand_spl_load_image(uint32_t offs, unsigned 
> > > > int
> > >

Re: [PATCH 08/15] imx: imx8mn_var_som: enable DM_SERIAL

2022-05-02 Thread Ariel D'Alessandro

Hi Peng,

On 4/30/22 09:43, Peng Fan (OSS) wrote:
> From: Peng Fan 
> 
> Enable CONFIG_DM_SERIAL. uart and its pinmux was already
> marked with u-boot,dm-spl.
> Move preloader_console_init after spl_init to make sure driver
> model work.
> 
> Signed-off-by: Peng Fan 
> ---
>  board/variscite/imx8mn_var_som/spl.c | 11 ++-
>  configs/imx8mn_var_som_defconfig |  1 +
>  include/configs/imx8mn_var_som.h |  2 --
>  3 files changed, 3 insertions(+), 11 deletions(-)

Reviewed-by: Ariel D'Alessandro 

Thanks!

Re: [PATCH v2 00/52] mips: octeon: Add ethernet support

2022-05-02 Thread Daniel Schwierzeck

Hi Stefan,

Am 02.05.22 um 18:00 schrieb Stefan Roese:

Hi Daniel,

On 07.04.22 09:11, Stefan Roese wrote:

This patchset adds the networking files and drivers including device
helper headers and C files. Please excuse the massive amount of files
in this patch series. Also the sometimes huge files (mostly headers
with register definitions) that I needed to include.

The infrastructure code with all the headers is ported mistly without
any intended functional changes from the 2013 Cavium / Marvell U-Boot
version. It has undergone many hours of extensive code cleanup and
reformatting. Some of it done by using tools (checkpatch, Lindent, clang
format etc) and also some of it done manually, as I couldn't find some
tools that could do the needed work in a reliable and functional way.
The result is that checkpatch now only throws a "few" warnings that are
left. Some of those can't be removed without an even more extensive
cleanup / rewrite of the code, like the addition of typedefs.

The added header, helper and infrastructure files in the first part of
the patch-series (patches 1-43) are the foundation, that is used by the
main Octeon U-Boot ethernet driver (patch 50/52). Patches 47-49 add the
DT nodes and properties to the corresponding dtsi / dts files. Patches
51 & 52 finally enable the ethernet support both MIPS Octeon boards,
EBB7304 & NIC23.

All this is tested on the 2 Cavium / Marvell MIPS Octeon boards:
EBB7304 & NIC23

This patchset including the small Marvell PHY patches is available in
this gitlab branch:

https://source.denx.de/u-boot/custodians/u-boot-marvell/-/tree/mips-octeon-ethernet-v2-2022-04-07

Changes in v2:
- As suggested by Daniel, remove all unreferenced functions from the
source

code by manually inspecting u-boot.map [1]
- Rebased on latest TOT

[1] Here the diffstat comarison between v1 and v2:
v1: 77 files changed, 42315 insertions(+), 586 deletions(-)
v2: 78 files changed, 33672 insertions(+), 2524 deletions(-)

Thanks,
Stefan

Daniel, do you have any comments on this patchset? Tom has assigned it
to me in patchwork and I would really like to get it merged into
mainline, if possible. So if you don't have any obejctions, then I
would pull it via the Marvell tree soon.

for the parts that I can reasonably review, I don't have any objections.
I'd be happy if you pull it yourself as I'm currently really busy ;)

--
- Daniel

Re: [PATCH 02/15] imx: imx8m[m/n/p]_venice: Enable SPL_DM_SERIAL

2022-05-02 Thread Tim Harvey

On Sat, Apr 30, 2022 at 5:01 AM Peng Fan (OSS)  wrote:
>
> From: Peng Fan 
>
> Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
> marked with u-boot,dm-spl.
> Move preloader_console_init after spl_early_init to make sure driver
> model work.
>
> Signed-off-by: Peng Fan 
> ---
>  board/gateworks/venice/spl.c| 22 ++
>  configs/imx8mm_venice_defconfig |  1 -
>  configs/imx8mn_venice_defconfig |  1 -
>  configs/imx8mp_venice_defconfig |  1 -
>  include/configs/imx8mm_venice.h |  3 ---
>  include/configs/imx8mn_venice.h |  3 ---
>  include/configs/imx8mp_venice.h |  3 ---
>  7 files changed, 2 insertions(+), 32 deletions(-)
>
> diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
> index 223f22d3463..af196e5b87c 100644
> --- a/board/gateworks/venice/spl.c
> +++ b/board/gateworks/venice/spl.c
> @@ -87,33 +87,17 @@ static void spl_dram_init(int size)
> ddr_init(dram_timing);
>  }
>
> -#define UART_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
>  #define WDOG_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | 
> PAD_CTL_PE)
>
>  #ifdef CONFIG_IMX8MM
> -static iomux_v3_cfg_t const uart_pads[] = {
> -   IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -   IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -};
> -
>  static iomux_v3_cfg_t const wdog_pads[] = {
> IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
>  };
>  #elif CONFIG_IMX8MN
> -static const iomux_v3_cfg_t uart_pads[] = {
> -   IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -   IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -};
> -
>  static const iomux_v3_cfg_t wdog_pads[] = {
> IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
>  };
>  #elif CONFIG_IMX8MP
> -static const iomux_v3_cfg_t uart_pads[] = {
> -   MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -   MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -};
> -
>  static const iomux_v3_cfg_t wdog_pads[] = {
> MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
>  };
> @@ -128,8 +112,6 @@ int board_early_init_f(void)
>
> set_wdog_reset(wdog);
>
> -   imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
> -
> return 0;
>  }
>
> @@ -276,8 +258,6 @@ void board_init_f(ulong dummy)
>
> timer_init();
>
> -   preloader_console_init();
> -
> /* Clear the BSS. */
> memset(__bss_start, 0, __bss_end - __bss_start);
>
> @@ -287,6 +267,8 @@ void board_init_f(ulong dummy)
> hang();
> }
>
> +   preloader_console_init();
> +
> enable_tzc380();
>
> /* need to hold PCIe switch in reset otherwise it can lock i2c bus 
> EEPROM is on */
> diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
> index 490de193181..0165a4e5df0 100644
> --- a/configs/imx8mm_venice_defconfig
> +++ b/configs/imx8mm_venice_defconfig
> @@ -113,7 +113,6 @@ CONFIG_DM_REGULATOR=y
>  CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
>  CONFIG_DM_SERIAL=y
> -# CONFIG_SPL_DM_SERIAL is not set
>  CONFIG_MXC_UART=y
>  CONFIG_SYSRESET=y
>  CONFIG_SPL_SYSRESET=y
> diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
> index 639fee7e5f1..63a65497371 100644
> --- a/configs/imx8mn_venice_defconfig
> +++ b/configs/imx8mn_venice_defconfig
> @@ -112,7 +112,6 @@ CONFIG_DM_REGULATOR=y
>  CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
>  CONFIG_DM_SERIAL=y
> -# CONFIG_SPL_DM_SERIAL is not set
>  CONFIG_MXC_UART=y
>  CONFIG_SYSRESET=y
>  CONFIG_SPL_SYSRESET=y
> diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
> index 97c8bb59211..626ac247881 100644
> --- a/configs/imx8mp_venice_defconfig
> +++ b/configs/imx8mp_venice_defconfig
> @@ -112,7 +112,6 @@ CONFIG_DM_REGULATOR=y
>  CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
>  CONFIG_DM_SERIAL=y
> -# CONFIG_SPL_DM_SERIAL is not set
>  CONFIG_MXC_UART=y
>  CONFIG_SYSRESET=y
>  CONFIG_SPL_SYSRESET=y
> diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
> index 1b26e0280e1..c3e92b76141 100644
> --- a/include/configs/imx8mm_venice.h
> +++ b/include/configs/imx8mm_venice.h
> @@ -101,9 +101,6 @@
>  #define PHYS_SDRAM_SIZESZ_4G
>  #define CONFIG_SYS_BOOTM_LEN   SZ_256M
>
> -/* UART */
> -#define CONFIG_MXC_UART_BASE   UART2_BASE_ADDR
> -
>  /* Monitor Command Prompt */
>  #define CONFIG_SYS_CBSIZE  SZ_2K
>  #define CONFIG_SYS_MAXARGS 64
> diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
> index a4826779022..41062b139f8 100644
> --- a/include/configs/imx8mn_venice.h
> +++ b/include/configs/imx8mn_venice.h
> @@ -97,9 +97,6 @@
>  #define PHYS_SDRAM_SIZESZ_4G
>  #define CONFIG_SYS_BOOTM_LEN   SZ_256M
>
>

[PATCH] watchdog: Add MAX6370 watchdog timer driver

MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.

Signed-off-by: Pali Rohár 
---
 drivers/watchdog/Kconfig   |   7 ++
 drivers/watchdog/Makefile  |   1 +
 drivers/watchdog/max6370_wdt.c | 119 +
 3 files changed, 127 insertions(+)
 create mode 100644 drivers/watchdog/max6370_wdt.c

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index f90f0ca02bce..1801698ac512 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -167,6 +167,13 @@ config WDT_GPIO
  doc/device-tree-bindings/watchdog/gpio-wdt.txt for
  information on how to describe the watchdog in device tree.
 
+config WDT_MAX6370
+   bool "MAX6370 watchdog timer support"
+   depends on WDT
+   select DM_GPIO
+   help
+ Select this to enable max6370 watchdog timer.
+
 config WDT_MPC8xx
bool "MPC8xx watchdog timer support"
depends on WDT && MPC8xx
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index a35bd559f51b..f999e4126b4f 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
 obj-$(CONFIG_WDT_ORION) += orion_wdt.o
 obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
+obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
 obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
 obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
 obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
diff --git a/drivers/watchdog/max6370_wdt.c b/drivers/watchdog/max6370_wdt.c
new file mode 100644
index ..556c6a4b6d6b
--- /dev/null
+++ b/drivers/watchdog/max6370_wdt.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+// (C) 2022 Pali Rohár 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MAX6370_SET_MASK   0x7
+#define MAX6370_SET_1MS0x0
+#define MAX6370_SET_10MS   0x1
+#define MAX6370_SET_30MS   0x2
+#define MAX6370_SET_DISABLE0x3
+#define MAX6370_SET_100MS  0x4
+#define MAX6370_SET_1S 0x5
+#define MAX6370_SET_10S0x6
+#define MAX6370_SET_60S0x7
+
+#define MAX6370_WDI0x8
+
+struct max6370_wdt {
+   void __iomem *reg;
+   struct gpio_desc gpio_wdi;
+};
+
+static int max6370_wdt_start(struct udevice *dev, u64 ms, ulong flags)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   val = readb(wdt->reg);
+   val &= ~MAX6370_SET_MASK;
+
+   if (ms <= 1)
+   val |= MAX6370_SET_1MS;
+   else if (ms <= 10)
+   val |= MAX6370_SET_10MS;
+   else if (ms <= 30)
+   val |= MAX6370_SET_30MS;
+   else if (ms <= 100)
+   val |= MAX6370_SET_100MS;
+   else if (ms <= 1000)
+   val |= MAX6370_SET_1S;
+   else if (ms <= 1)
+   val |= MAX6370_SET_10S;
+   else
+   val |= MAX6370_SET_60S;
+
+   writeb(val, wdt->reg);
+
+   return 0;
+}
+
+static int max6370_wdt_stop(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   val = readb(wdt->reg);
+   val &= ~MAX6370_SET_MASK;
+   val |= MAX6370_SET_DISABLE;
+   writeb(val, wdt->reg);
+
+   return 0;
+}
+
+static int max6370_wdt_reset(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   if (dm_gpio_is_valid(>gpio_wdi)) {
+   dm_gpio_set_value(>gpio_wdi, 1);
+   udelay(1);
+   dm_gpio_set_value(>gpio_wdi, 0);
+   } else {
+   val = readb(wdt->reg);
+   writeb(val | MAX6370_WDI, wdt->reg);
+   writeb(val & ~MAX6370_WDI, wdt->reg);
+   }
+
+   return 0;
+}
+
+static int max6370_wdt_probe(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+
+   wdt->reg = dev_read_addr_ptr(dev);
+   if (!wdt->reg)
+   return -EINVAL;
+
+   /* WDI gpio is optional */
+   gpio_request_by_name(dev, "gpios", 0, >gpio_wdi, GPIOD_IS_OUT);
+
+   return 0;
+}
+
+static const struct wdt_ops max6370_wdt_ops = {
+   .start = max6370_wdt_start,
+   .stop = max6370_wdt_stop,
+   .reset = max6370_wdt_reset,
+};
+
+static const struct udevice_id max6370_wdt_ids[] = {
+   { .compatible = "maxim,max6370" },
+   {}
+};
+
+U_BOOT_DRIVER(max6370_wdt) = {
+   .name = "max6370_wdt",
+   .id = UCLASS_WDT,
+   .of_match = max6370_wdt_ids,
+   .probe = max6370_wdt_probe,
+   .priv_auto = sizeof(struct max6370_wdt),
+   .ops = _wdt_ops,
+};
-- 
2.20.1

[PATCH 1/2] powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting

Commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
fixed SD card booting on mpc85xx boards but broke NOR booting on these
boards. Reason is that U-Boot build system for NOR images uses binman and
this binman ignores alignment defined in linker script. Instead it has own
config file where is alignment defined.

Fix binman alignment for mpc85xx boards to match what is _now_ defined in
linker script.

This change fixes building of U-Boot for NOR booting on P2020 board.

Fixes: e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
Signed-off-by: Pali Rohár 
---
 arch/powerpc/dts/u-boot.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi
index 9661f4dc88d3..67de476a45ed 100644
--- a/arch/powerpc/dts/u-boot.dtsi
+++ b/arch/powerpc/dts/u-boot.dtsi
@@ -20,7 +20,7 @@
 
u-boot-dtb-with-ucode {
 #ifdef CONFIG_MPC85xx
-   align = <256>;
+   align = <4>;
 #endif
};
 #ifdef CONFIG_MPC85XX_HAVE_RESET_VECTOR
-- 
2.20.1

[PATCH 2/2] powerpc: mpc85xx: Fix CONFIG_OF_EMBED support for NOR booting

mpc85xx NOR binary contains also reset vector and therefore option
CONFIG_MPC85XX_HAVE_RESET_VECTOR must be defined.

When build system uses binman, it takes care of constructing final image
which consist of u-boot-without-reset-vector, DTB and reset-vector.

CONFIG_OF_EMBED does not use binman, there is no external DTB and Makefile
produce directly final u-boot.bin binary.

So in this case mpc85xx reset vector must not be stripped from the final
u-boot.bin binary. Fix it.

Signed-off-by: Pali Rohár 
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index ad83d60dc39d..631de02b55f2 100644
--- a/Makefile
+++ b/Makefile
@@ -1249,7 +1249,7 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE
 
 OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
-   $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R 
.resetvec)
+   $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if 
$(CONFIG_OF_EMBED),,-R .bootpg -R .resetvec))
 
 binary_size_check: u-boot-nodtb.bin FORCE
@file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
-- 
2.20.1

[PATCH 0/2] powerpc: mpc85xx: Fix NOR booting

NOR version of U-Boot for mpc85xx is currently broken.

NOR booting with CONFIG_OF_SEPARATE is broken since my commit
e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support") which
was merged into master few days ago and was fixing SD card booting.

NOR booting with CONFIG_OF_EMBED seems to be broken for a longer time.

This patch series fix it. Tested on P2020 board, both SD and NOR booting
with CONFIG_OF_SEPARATE and also with CONFIG_OF_EMBED.

Pali Rohár (2):
  powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting
  powerpc: mpc85xx: Fix CONFIG_OF_EMBED support for NOR booting

 Makefile | 2 +-
 arch/powerpc/dts/u-boot.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

-- 
2.20.1

[PATCH] powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs

This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár 
---
 arch/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/Kconfig b/arch/Kconfig
index 7ecb375b6b5a..920dadea5dcc 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -369,6 +369,9 @@ config SYS_IMMR
default 0xF000 if ARCH_MPC8313
default 0xE000 if MPC83xx && !ARCH_MPC8313
default 0x0100 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
+   default 0xFFE0 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
+ ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
+ ARCH_P2020
default SYS_CCSRBAR_DEFAULT
help
  Address for the Internal Memory-Mapped Registers (IMMR) window used
-- 
2.20.1

[PATCH] mtd: rawnand: fsl_elbc: Fix DM support in DTS code path

For proper DM support it is required to fill also mtd->dev member.
Otherwise DM would not see nand device at all.

Signed-off-by: Pali Rohár 
---
 drivers/mtd/nand/raw/fsl_elbc_nand.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c 
b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index e734139b5ea5..b0e3eb607ed4 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -668,7 +668,7 @@ static void fsl_elbc_ctrl_init(void)
elbc_ctrl->addr = NULL;
 }
 
-static int fsl_elbc_chip_init(int devnum, u8 *addr, ofnode flash_node)
+static int fsl_elbc_chip_init(int devnum, u8 *addr, struct udevice *dev)
 {
struct mtd_info *mtd;
struct nand_chip *nand;
@@ -716,7 +716,8 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, ofnode 
flash_node)
elbc_ctrl->chips[priv->bank] = priv;
 
/* fill in nand_chip structure */
-   nand->flash_node = flash_node;
+   mtd->dev = dev;
+   nand->flash_node = dev ? dev_ofnode(dev) : ofnode_null();
 
/* set up function call table */
nand->read_byte = fsl_elbc_read_byte;
@@ -827,14 +828,14 @@ void board_nand_init(void)
int i;
 
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-   fsl_elbc_chip_init(i, (u8 *)base_address[i], ofnode_null());
+   fsl_elbc_chip_init(i, (u8 *)base_address[i], NULL);
 }
 
 #else
 
 static int fsl_elbc_nand_probe(struct udevice *dev)
 {
-   return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), 
dev_ofnode(dev));
+   return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev);
 }
 
 static const struct udevice_id fsl_elbc_nand_dt_ids[] = {
-- 
2.20.1

Re: [PATCH v2 03/12] sandbox: Migrate getopt section to linker list

2022-05-02 Thread Tom Rini

On Mon, May 02, 2022 at 09:24:52AM -0700, Andrew Scull wrote:
> On Fri, 29 Apr 2022 at 08:11, Tom Rini  wrote:
> >
> > On Thu, Apr 14, 2022 at 01:59:32PM +, Andrew Scull wrote:
> >
> > > Use the common infrastructure to create a linker list of the sandbox
> > > command line flags rather than using a custom method.
> > >
> > > The list is changed from containing pointers to containing structs and
> > > the uses are updated accordingly.
> > >
> > > Signed-off-by: Andrew Scull 
> > > Reviewed-by: Simon Glass 
> > > ---
> > >  arch/sandbox/cpu/os.c   | 21 ++---
> > >  arch/sandbox/cpu/start.c| 10 +-
> > >  arch/sandbox/cpu/u-boot-spl.lds |  6 --
> > >  arch/sandbox/cpu/u-boot.lds |  6 --
> > >  arch/sandbox/include/asm/getopt.h   | 19 ---
> > >  arch/sandbox/include/asm/sections.h | 25 -
> > >  6 files changed, 27 insertions(+), 60 deletions(-)
> >
> > This particular test causes all of the pytest infrastructure to fail.  I
> > believe "make qcheck" will show this, even, for a possibly easier
> > reproducer.
> 
> I didn't run this series through the CI so I hadn't been running the
> pytest suite. `make qcheck` does run the pytest suite and shows a
> bunch more ASAN failures. Some are simple but others are less obvious
> and are going to need some time to dig into.
> 
> The issues being found by ASAN here are in the main u-boot code, not
> just the test code, and a couple of them are in crypto components so
> there might be some more interesting bugs to discover.

OK, yeah, ASAN failures within the test suite are less important.  I
forgot to mention maybe I disabled ASAN in sandbox and still got the
basic CI failure I mentioned above, bisect'd down to here.  Please make
sure CI does pass on this for the next iteration and it's OK to go with
documenting how to enable ASAN afterwards and that tests need further
clean-up.

-- 
Tom


signature.asc
Description: PGP signature

[PATCH] board: freescale: p1_p2_rdb_pc: Allow to compile without CONFIG_BOARDNAME

Signed-off-by: Pali Rohár 
---
 board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c 
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 53ff121d3b3d..0b10701f4d48 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -205,7 +205,11 @@ int checkboard(void)
u8 in, out, invert, io_config, val;
int bus_num = CONFIG_SYS_SPD_BUS_NUM;
 
-   printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME,
+#ifdef CONFIG_BOARDNAME
+   printf("Board: %s ", CONFIG_BOARDNAME);
+#endif
+
+   printf("CPLD: V%d.%d PCBA: V%d.0\n",
in_8(_data->cpld_rev_major) & 0x0F,
in_8(_data->cpld_rev_minor) & 0x0F,
in_8(_data->pcba_rev) & 0x0F);
-- 
2.20.1

Re: [PATCH v2 03/12] sandbox: Migrate getopt section to linker list

2022-05-02 Thread Andrew Scull

On Fri, 29 Apr 2022 at 08:11, Tom Rini  wrote:
>
> On Thu, Apr 14, 2022 at 01:59:32PM +, Andrew Scull wrote:
>
> > Use the common infrastructure to create a linker list of the sandbox
> > command line flags rather than using a custom method.
> >
> > The list is changed from containing pointers to containing structs and
> > the uses are updated accordingly.
> >
> > Signed-off-by: Andrew Scull 
> > Reviewed-by: Simon Glass 
> > ---
> >  arch/sandbox/cpu/os.c   | 21 ++---
> >  arch/sandbox/cpu/start.c| 10 +-
> >  arch/sandbox/cpu/u-boot-spl.lds |  6 --
> >  arch/sandbox/cpu/u-boot.lds |  6 --
> >  arch/sandbox/include/asm/getopt.h   | 19 ---
> >  arch/sandbox/include/asm/sections.h | 25 -
> >  6 files changed, 27 insertions(+), 60 deletions(-)
>
> This particular test causes all of the pytest infrastructure to fail.  I
> believe "make qcheck" will show this, even, for a possibly easier
> reproducer.

I didn't run this series through the CI so I hadn't been running the
pytest suite. `make qcheck` does run the pytest suite and shows a
bunch more ASAN failures. Some are simple but others are less obvious
and are going to need some time to dig into.

The issues being found by ASAN here are in the main u-boot code, not
just the test code, and a couple of them are in crypto components so
there might be some more interesting bugs to discover.

Re: [PATCH v2 00/52] mips: octeon: Add ethernet support

Hi Daniel,

On 07.04.22 09:11, Stefan Roese wrote:

All this is tested on the 2 Cavium / Marvell MIPS Octeon boards:
EBB7304 & NIC23

This patchset including the small Marvell PHY patches is available in
this gitlab branch:

https://source.denx.de/u-boot/custodians/u-boot-marvell/-/tree/mips-octeon-ethernet-v2-2022-04-07

Changes in v2:
- As suggested by Daniel, remove all unreferenced functions from the source
code by manually inspecting u-boot.map [1]
- Rebased on latest TOT

[1] Here the diffstat comarison between v1 and v2:
v1: 77 files changed, 42315 insertions(+), 586 deletions(-)
v2: 78 files changed, 33672 insertions(+), 2524 deletions(-)

Thanks,
Stefan

Please pull u-boot-marvell/master


Hi Tom,

please pull this next batch of Marvell related patches:


- Misc turris_omnia/mox related Fixes and impovements (Pali)
- Turris Omnia: Add support for configuring mSATA and WWAN slots
  via env variables (Pali)
- net: mvgbe: Set PHY page 0 before phy_connect (Tony)
- kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver (Tony)
- mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names (Pali)
- mvebu: clearfog_defconfig: enable setexpr command (Josef)
- mvebu: x530: set MPP55 to gpio (Chris)


Here the Azure build, without any issues:

https://dev.azure.com/sr0718/u-boot/_build/results?buildId=179=results

Thanks,
Stefan


The following changes since commit c70c0102af5413cadde6bf90044cb75aefef0584:

  Merge tag 'efi-2022-07-rc2' of 
https://source.denx.de/u-boot/custodians/u-boot-efi (2022-04-29 14:04:08 
-0400)


are available in the Git repository at:

  g...@source.denx.de:u-boot/custodians/u-boot-marvell.git

for you to fetch changes up to 08dc62c1527ec7401cc98719cde50ca47533a7c2:

  ARM: mvebu: x530: set MPP55 to gpio (2022-05-02 07:47:26 +0200)


Chris Packham (1):
  ARM: mvebu: x530: set MPP55 to gpio

Josef Schlehofer (1):
  arm: mvebu: clearfog_defconfig: enable setexpr command

Pali Rohár (14):
  env: sf: Allow to use env_sf_init_addr() at any stage
  arm: mvebu: turris_omnia: Provide env_sf_get_env_addr() function
  arm: mvebu: turris_omnia: Enable ENV support in SPL
  arm: mvebu: turris_omnia: Define only one serdes map variable
  arm: mvebu: turris_omnia: Allow to configure mSATA slot via env 
variable

  arm: mvebu: turris_omnia: Extract code for disabling sata/pcie
  arm: mvebu: turris_omnia: Signal error when sata/pcie DT mode
  arm: mvebu: turris_omnia: Add support for USB3.0 mode in WWAN 
MiniPCIe slot

  arm: mvebu: turris_omnia: Fix RESET button message
  arm: mvebu: turris_omnia: Define CONFIG_ETHPRIME instead of 
ethact= ENV
  arm: mvebu: turris_omnia: Always enable MMC, SCSI and USB boot 
targets

  arm: mvebu: turris_omnia: Add NVMe to boot targets
  arm: mvebu: turris_mox: Add NVMe and SCSI to boot targets
  arm: mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names

Tony Dinh (2):
  net: marvell: mvgbe: Set PHY page 0 before phy_connect
  arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver 
for DM Ethernet


 arch/arm/dts/kirkwood-nsa310s.dts|   1 +
 board/CZ.NIC/turris_omnia/turris_omnia.c | 215 
++-

 board/alliedtelesis/x530/x530.c  |   2 +-
 board/zyxel/nsa310s/nsa310s.c| 119 +
 board/zyxel/nsa310s/nsa310s.h|  46 ---
 configs/clearfog_defconfig   |   1 -
 configs/nsa310s_defconfig|   6 +-
 configs/turris_omnia_defconfig   |   3 +
 drivers/net/mvgbe.c  |   4 +
 env/sf.c |  22 ++--
 include/configs/nsa310s.h|  11 +-
 include/configs/turris_mox.h |   2 +
 include/configs/turris_omnia.h   |  26 +---
 13 files changed, 221 insertions(+), 237 deletions(-)
 delete mode 100644 board/zyxel/nsa310s/nsa310s.h

Re: [PATCH] ARM: mvebu: x530: set MPP55 to gpio


On 02.05.22 05:16, Chris Packham wrote:

MPP55 is used as a reset connected to the L3 switch chip. This doesn't
matter for u-boot as it doesn't use the L3 switch but it is useful to
be able to toggle the switch in/out of reset for the OS.

Signed-off-by: Chris Packham 
---
I sent this out a while back but it was part of a series that has been dropped
for the time being. There's not reason to hold this change up behind the other
so I'm sending it as a standalong change.


Applied to u-boot-marvell/master

Thanks,
Stefan



  board/alliedtelesis/x530/x530.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index c0ec2afa3011..cbf4533e78de 100644
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -93,7 +93,7 @@ int board_early_init_f(void)
writel(0x0550, MVEBU_MPP_BASE + 0x0c);
writel(0x, MVEBU_MPP_BASE + 0x10);
writel(0x00100565, MVEBU_MPP_BASE + 0x14);
-   writel(0x4000, MVEBU_MPP_BASE + 0x18);
+   writel(0x, MVEBU_MPP_BASE + 0x18);
writel(0x, MVEBU_MPP_BASE + 0x1c);
  
  	return 0;


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH] arm: mvebu: clearfog_defconfig: enable setexpr command


On 29.04.22 17:49, Josef Schlehofer wrote:

This command is useful in U-boot scripts and it is being used by
OpenWrt bootscript for this board [1]. Otherwise shell scripting
commands are enabled by default in cmd/Kconfig.

[1] 
https://github.com/openwrt/openwrt/blob/852126680e21edc71c0c66561ae5a6d7479dcc67/target/linux/mvebu/image/clearfog.bootscript#L7

[2] 
https://source.denx.de/u-boot/u-boot/-/blob/e95afa56753cebcd20a5114b6d121f281b789006/cmd/Kconfig#L1504

Fixes: 0299c90f396c5b2971a4bac596339f4b03661c27 ("arm: mvebu: Add
SolidRun ClearFog Armada 38x initial support")

Signed-off-by: Josef Schlehofer 


Applied to u-boot-marvell/master

Thanks,
Stefan


---
  configs/clearfog_defconfig | 1 -
  1 file changed, 1 deletion(-)

diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 880f16a6e0..1e9c389deb 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -34,7 +34,6 @@ CONFIG_CMD_MMC=y
  CONFIG_CMD_PCI=y
  CONFIG_CMD_SPI=y
  CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_TFTPPUT=y
  CONFIG_CMD_CACHE=y
  CONFIG_CMD_TIME=y


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH] arm: mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names


On 29.04.22 13:53, Pali Rohár wrote:

This is A385 register.

Signed-off-by: Pali Rohár 


Applied to u-boot-marvell/master

Thanks,
Stefan


---
  board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c 
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 97292456f148..6132c8f94369 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -43,8 +43,8 @@ DECLARE_GLOBAL_DATA_PTR;
  #define OMNIA_I2C_EEPROM_CHIP_LEN 2
  #define OMNIA_I2C_EEPROM_MAGIC0x0341a034
  
-#define SYS_RSTOUT_MASK			MVEBU_REGISTER(0x18260)

-#define   SYS_RSTOUT_MASK_WD   BIT(10)
+#define A385_SYS_RSTOUT_MASK   MVEBU_REGISTER(0x18260)
+#define   A385_SYS_RSTOUT_MASK_WD  BIT(10)
  
  #define A385_WDT_GLOBAL_CTRL		MVEBU_REGISTER(0x20300)

  #define   A385_WDT_GLOBAL_RATIO_MASK  GENMASK(18, 16)
@@ -187,7 +187,7 @@ static void enable_a385_watchdog(unsigned int 
timeout_minutes)
setbits_32(A385_WD_RSTOUT_UNMASK, A385_WD_RSTOUT_UNMASK_GLOBAL);
  
  	/* Unmask reset for watchdog */

-   clrbits_32(SYS_RSTOUT_MASK, SYS_RSTOUT_MASK_WD);
+   clrbits_32(A385_SYS_RSTOUT_MASK, A385_SYS_RSTOUT_MASK_WD);
  }
  
  static bool disable_mcu_watchdog(void)


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet


On 17.04.22 22:42, Tony Dinh wrote:

The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S.
Use uclass mvgbe and the compatible driver M88E1310 driver to bring
up Ethernet.

- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Remove CONFIG_RESET_PHY_R.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add phy mode RGMII to kirkwood-nsa310s.dts
- Miscellaneous changes: Move constants to .c file and remove header file
board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs,
use BIT macro, add/cleanup comments, and cosmetic changes.

Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibo...@gmail.com/

Signed-off-by: Tony Dinh 


Applied to u-boot-marvell/master

Thanks,
Stefan


---

  arch/arm/dts/kirkwood-nsa310s.dts |   1 +
  board/zyxel/nsa310s/nsa310s.c | 119 +-
  board/zyxel/nsa310s/nsa310s.h |  46 
  configs/nsa310s_defconfig |   6 +-
  include/configs/nsa310s.h |  11 +--
  5 files changed, 41 insertions(+), 142 deletions(-)
  delete mode 100644 board/zyxel/nsa310s/nsa310s.h

diff --git a/arch/arm/dts/kirkwood-nsa310s.dts 
b/arch/arm/dts/kirkwood-nsa310s.dts
index e1c9c9080c..09ee76c2a2 100644
--- a/arch/arm/dts/kirkwood-nsa310s.dts
+++ b/arch/arm/dts/kirkwood-nsa310s.dts
@@ -306,6 +306,7 @@
status = "okay";
ethernet0-port@0 {
phy-handle = <>;
+   phy-mode = "rgmii";
};
  };
  
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c

index b71de4e11f..b3ea660891 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -1,22 +1,49 @@
  // SPDX-License-Identifier: GPL-2.0+
  /*
- * Copyright (C) 2015, 2021 Tony Dinh 
+ * Copyright (C) 2015, 2021-2022 Tony Dinh 
   * Copyright (C) 2015 Gerald Kerma 
   */
  
  #include 

  #include 
-#include 
-#include 
+#include 
  #include 
  #include 
  #include 
  #include 
  #include 
-#include "nsa310s.h"
+#include 
  
  DECLARE_GLOBAL_DATA_PTR;
  
+/*

+ * low GPIO's
+ */
+#define HDD1_GREEN_LED BIT(16)
+#define HDD1_RED_LED   BIT(13)
+#define USB_GREEN_LED  BIT(15)
+#define USB_POWER  BIT(21)
+#define SYS_GREEN_LED  BIT(28)
+#define SYS_ORANGE_LED BIT(29)
+
+#define COPY_GREEN_LED BIT(22)
+#define COPY_RED_LED   BIT(23)
+
+#define PIN_USB_GREEN_LED  15
+#define PIN_USB_POWER  21
+
+#define NSA310S_OE_LOW (~(0))
+#define NSA310S_VAL_LOW(SYS_GREEN_LED | USB_POWER)
+
+/*
+ * high GPIO's
+ */
+#define HDD2_GREEN_LED BIT(2)
+#define HDD2_POWER BIT(1)
+
+#define NSA310S_OE_HIGH(~(0))
+#define NSA310S_VAL_HIGH   (HDD2_POWER)
+
  int board_early_init_f(void)
  {
/*
@@ -80,87 +107,7 @@ int board_init(void)
return 0;
  }
  
-static int fdt_get_phy_addr(const char *path)

-{
-   const void *fdt = gd->fdt_blob;
-   const u32 *reg;
-   const u32 *val;
-   int node, phandle, addr;
-
-   /* Find the node by its full path */
-   node = fdt_path_offset(fdt, path);
-   if (node >= 0) {
-   /* Look up phy-handle */
-   val = fdt_getprop(fdt, node, "phy-handle", NULL);
-   if (val) {
-   phandle = fdt32_to_cpu(*val);
-   if (!phandle)
-   return -1;
-   /* Follow it to its node */
-   node = fdt_node_offset_by_phandle(fdt, phandle);
-   if (node) {
-   /* Look up reg */
-   reg = fdt_getprop(fdt, node, "reg", NULL);
-   if (reg) {
-   addr = fdt32_to_cpu(*reg);
-   return addr;
-   }
-   }
-   }
-   }
-   return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
+int board_eth_init(struct bd_info *bis)
  {
-   u16 reg;
-   u16 phyaddr;
-   char *name = "ethernet-controller@72000";
-   char *eth0_path = 
"/ocp@f100/ethernet-controller@72000/ethernet0-port@0";
-
-   if (miiphy_set_current_dev(name))
-   return;
-
-   phyaddr = fdt_get_phy_addr(eth0_path);
-   if (phyaddr < 0)
-   return;
-
-   /* set RGMII delay */
-   miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
-   miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, );
-   reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
-   miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
-   miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
-
-   /* reset PHY */
-   if (miiphy_reset(name, phyaddr))
-   return;
-
-   /*
-

Re: [PATCH] net: marvell: mvgbe: Set PHY page 0 before phy_connect


Applied to u-boot-marvell/master

Thanks,
Stefan


On 26.04.22 00:01, Tony Dinh wrote:

Hi Stefan,
On Mon, Apr 25, 2022 at 4:18 AM Stefan Roese  wrote:


Hi Tony,

On 4/25/22 11:33, Tony Dinh wrote:

Hi Stefan,

On Sun, Apr 24, 2022 at 11:00 PM Stefan Roese  wrote:


Hi Tony,

On 4/23/22 04:15, Tony Dinh wrote:

Hi Stefan,

Please see my various comments below. And my thoughts at the end.

On Thu, Apr 21, 2022 at 11:15 PM Stefan Roese  wrote:


Hi Tony,

On 4/21/22 23:21, Tony Dinh wrote:




What really puzzles me is, why the page address is set to a non-zero
value at all at this early boot stage? Could you perhaps add some
debugging code, to check, if and where the page address gets set?
I find it hard to belief, that this starts with non-zero after
powering up the device / PHY.

Or did I miss something?


Other Kirkwood boards behave correctly (such as the Sheevaplug,
Dreamplug, and Dell Kace M300). The Page Select register (22) contains
0 in these boards, and all have PHY id 1410e90.  The NSA310s also has
PHY id 1410e90.


Yes. I'm pretty sure that the page select register is set to 0 upon
PHY startup. Even though there might be some strapping possibilities
to configure some PHY registers, the page select is most likely always
0 after power-up. So if nobody writes to this reg, then is should be 0.


Agree. All other Kirkwood boards execute the same code so I think we
would see if somebody writes to this register.


But I could not find in the uclass MVGBE where the Page Select
register is set before phy_connect is called. So my guess is that
memory location just happens to be zero in other boards but not in
this NSA310S board. Perhaps the memory location needs to be set to
zero, to make sure all registers point to page 0 in the beginning.


Please see above.


Possibly, it is here that the Page Select register should be zero out
after the priv data is copied:  dev_get_priv(). mvgbe_of_to_plat() is
called very early on (during the uclass MVGBE creation).

static int mvgbe_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct mvgbe_device *dmvgbe = dev_get_priv(dev);


Possibly. Again my suggestion is to add some debug code to check at
different boot times, which value is currently set in the page select
register. By just reading is out and printing it's value. You might need
to add some "special code" at the early code paths, as the MDIO driver
is not started there.

Another idea is, if it's possible to issue a HW-reset to the PHY on the
NSA310 board. Do you know if some GPIO is connected to the PHY's reset
pin which could be toggled by the SoC?


I don't think there is a GPIO that does. I looked at the GPL source
code for this board from way back, and created the DTS for this based
on info in that GPL source. I don't recall that it was available.


Note: We could of course just add the reset to 0 as you have done in the
MAC driver or some board specific code. But I really would like to
understand why the page select reg is non-zero in this case.


My conclusion is the register was polluted by something in the board
hardware. This is the comments (paraphrase)  we got from this board
GPL source:
   /* The ZyXEL NSA310S uses the 88E1310S Alaska (interface
identical to 88E1318) */
   /* and has an MCU attached to the LED[2] via tristate interrupt */

I've rebuilt and rerun the tests for both the Sheevaplug and NSA310S.
Please see the debug log from mvgbe_probe. This is as early as we can
see the uclass initializing.

 NSA310S boot log
U-Boot 2022.04-00569-gca51a8dc04-dirty (Apr 22 2022 - 16:49:50 -0700)
ZyXEL NSA310S/320S 1/2-Bay Power Media Server

SoC:   Kirkwood 88F6281_A1
DRAM:  256 MiB
Core:  7 devices, 5 uclasses, devicetree: separate
NAND:  128 MiB
Loading Environment from NAND... OK
In:serial
Out:   serial
Err:   serial

Net:   mvgbe_of_to_plat called
mvgbe_of_to_plat phy-mode 7
mvgbe_of_to_plat phy addr 1
mvgbe_probe called
smi_reg_read: phy_addr 1 reg_ofs 22 devad  -1
__mvgbe_mdio_read:(adr 1, off 22) value= 0011
eth0: ethernet-controller@72000
Hit any key to stop autoboot:  0

= Sheevaplug boot log

U-Boot 2022.04-00569-gca51a8dc04-dirty (Apr 22 2022 - 18:16:25 -0700)
Marvell-Sheevaplug

SoC:   Kirkwood 88F6281_A1
DRAM:  512 MiB
Core:  9 devices, 7 uclasses, devicetree: separate
NAND:  512 MiB
MMC:   mvsdio@9: 0
Loading Environment from NAND... OK
In:serial
Out:   serial
Err:   serial

Net:   mvgbe_of_to_plat called
mvgbe_of_to_plat phy-mode 1
mvgbe_of_to_plat phy addr 0
mvgbe_probe called
smi_reg_read: phy_addr 0 reg_ofs 22 devad  -1
__mvgbe_mdio_read:(adr 0, off 22) value= 
eth0: ethernet-controller@72000
Hit any key to stop autoboot:  0


Still very strange. Perhaps really some HW pin strapping responsible
for this difference?


It could be. The Zyxel Kirkwood NAS series NSA310s, 320, and 325 all
behave like this. The Sheevaplug and Dreamplug don't have this
behavior, while using the same network chip (I've confirmed

Re: [PATCH 5/5] arm: mvebu: turris_mox: Add NVMe and SCSI to boot targets


On 06.04.22 11:39, Pali Rohár wrote:

U-Boot for Turris Mox has already enabled NVMe and SCSI support. So add
NVMe and SCSI to boot targets.

Signed-off-by: Pali Rohár 
---
  include/configs/turris_mox.h | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h
index 3cfad7cca985..69f295b5cefe 100644
--- a/include/configs/turris_mox.h
+++ b/include/configs/turris_mox.h
@@ -28,6 +28,8 @@
  
  #define BOOT_TARGET_DEVICES(func) \

func(MMC, mmc, 0) \
+   func(NVME, nvme, 0) \
+   func(SCSI, scsi, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)


Applied to u-boot-marvell/master

Thanks,
Stefan

Re: [PATCH 4/5] arm: mvebu: turris_omnia: Add NVMe to boot targets


On 06.04.22 11:39, Pali Rohár wrote:

U-Boot for Turris Omnia has already enabled NVMe support. So add NVMe to
boot targets.

Signed-off-by: Pali Rohár 
---
  include/configs/turris_omnia.h | 1 +
  1 file changed, 1 insertion(+)

diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index 25aa0d0f9075..99e39531509f 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -56,6 +56,7 @@
  
  #define BOOT_TARGET_DEVICES(func) \

func(MMC, mmc, 0) \
+   func(NVME, nvme, 0) \
func(SCSI, scsi, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na) \


Applied to u-boot-marvell/master

Thanks,
Stefan

Re: [PATCH 3/5] arm: mvebu: turris_omnia: Always enable MMC, SCSI and USB boot targets


On 06.04.22 11:39, Pali Rohár wrote:

U-Boot for Turris Omnia is always compiled with MMC, SCSI and USB support,
so always enable macros for booting from these devices.

Signed-off-by: Pali Rohár 
---
  include/configs/turris_omnia.h | 24 +++-
  1 file changed, 3 insertions(+), 21 deletions(-)

diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index 15f874ea22e1..25aa0d0f9075 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -54,28 +54,10 @@
  /* Include the common distro boot environment */
  #ifndef CONFIG_SPL_BUILD
  
-#ifdef CONFIG_MMC

-#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
-#else
-#define BOOT_TARGET_DEVICES_MMC(func)
-#endif
-
-#ifdef CONFIG_USB_STORAGE
-#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
-#else
-#define BOOT_TARGET_DEVICES_USB(func)
-#endif
-
-#ifdef CONFIG_SCSI
-#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
-#else
-#define BOOT_TARGET_DEVICES_SCSI(func)
-#endif
-
  #define BOOT_TARGET_DEVICES(func) \
-   BOOT_TARGET_DEVICES_MMC(func) \
-   BOOT_TARGET_DEVICES_SCSI(func) \
-   BOOT_TARGET_DEVICES_USB(func) \
+   func(MMC, mmc, 0) \
+   func(SCSI, scsi, 0) \
+   func(USB, usb, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
  


Applied to u-boot-marvell/master

Thanks,
Stefan

Re: [PATCH 2/5] arm: mvebu: turris_omnia: Define CONFIG_ETHPRIME instead of ethact= ENV


On 06.04.22 11:39, Pali Rohár wrote:

CONFIG_ETHPRIME defines primary ethernet device and env variable $ethact
stores currently active ethernet device.

So there is no point to set ethact= in default environment. Instead set
CONFIG_ETHPRIME properly.

Signed-off-by: Pali Rohár 
---
  include/configs/turris_omnia.h | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index b35299b2fbb3..15f874ea22e1 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -26,6 +26,8 @@
"fdt_high=0x1000\0"   \
"initrd_high=0x1000\0"
  
+#define CONFIG_ETHPRIME		"ethernet@34000"

+
  /* Defines for SPL */
  #define CONFIG_SPL_SIZE   (140 << 10)
  #define CONFIG_SPL_MAX_SIZE   (CONFIG_SPL_SIZE - 
(CONFIG_SPL_TEXT_BASE - 0x4000))
@@ -119,7 +121,6 @@
LOAD_ADDRESS_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"console=ttyS0,115200\0" \
-   "ethact=ethernet@34000\0" \
"bootcmd_rescue=" TURRIS_OMNIA_BOOTCMD_RESCUE "\0" \
BOOTENV
  


Applied to u-boot-marvell/master

Thanks,
Stefan

Re: [PATCH 1/5] arm: mvebu: turris_omnia: Fix RESET button message


On 06.04.22 11:39, Pali Rohár wrote:

Signed-off-by: Pali Rohár 
---
  board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c 
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 83cfc80d1930..97292456f148 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -488,7 +488,7 @@ static void handle_reset_button(void)
/* Ensure bootcmd_rescue is used by distroboot */
env_set("boot_targets", "rescue");
  
-		printf("RESET button was pressed, overwriting bootcmd!\n");

+   printf("RESET button was pressed, overwriting boot_targets!\n");
} else {
/*
 * In case the user somehow managed to save environment with


Applied to u-boot-marvell/master

Thanks,
Stefan

Re: [PATCH u-boot-marvell 0/8] Turris Omnia: Add support for configuring mSATA and WWAN slots via env variables


On 02.03.22 12:47, Pali Rohár wrote:

Some mPCIe cards are broken and their PIN 43 incorrectly that card is
mSATA. U-Boot SPL on Turris Omnia is using PIN 43 for configuring PCIe
vs SATA functionality on SerDes. Allow to configure functionality via
additional env variable "omnia_msata_slot" which may override PIN 43.

To force PCIe mode for broken MiniPCIe cards, call U-Boot commands:

   => setenv omnia_msata_slot pcie
   => saveenv
   => reset


PCI-SIG in PCIe Mini CEM 2.1 spec added support for USB3.0 mode to mPCIe
cards. PCIe and USB3.0 functions share same pins (like SATA pins on mSATA
with PCIe on mPCIe) and therefore only one function may be active at the
same time. This mode was introduced by PCI-SIG specially for LTE/5G modems.

One mPCIe slot on Turris Omnia is connected to A385 CPU SerDes which
can be configured for PCIe or USB3.0 function. It is the slot with SIM
card suitable for cellular modems. As PCIe Mini CEM 2.1 spec say that
detection of PCIe vs USB3.0 functionality is platform specific, add a
new U-Boot variable "omnia_wwan_slot" for configuring functionality in
this slot. By default PCIe is used like before.

To set this WWAN slot to USB3.0 mode, call U-Boot commands:

   => setenv omnia_wwan_slot usb3
   => saveenv
   => reset


Pali Rohár (8):
   env: sf: Allow to use env_sf_init_addr() at any stage
   arm: mvebu: turris_omnia: Provide env_sf_get_env_addr() function
   arm: mvebu: turris_omnia: Enable ENV support in SPL
   arm: mvebu: turris_omnia: Define only one serdes map variable
   arm: mvebu: turris_omnia: Allow to configure mSATA slot via env
 variable
   arm: mvebu: turris_omnia: Extract code for disabling sata/pcie
   arm: mvebu: turris_omnia: Signal error when sata/pcie DT mode
   arm: mvebu: turris_omnia: Add support for USB3.0 mode in WWAN MiniPCIe
 slot

  board/CZ.NIC/turris_omnia/turris_omnia.c | 207 +--
  configs/turris_omnia_defconfig   |   1 +
  env/sf.c |  22 +--
  3 files changed, 163 insertions(+), 67 deletions(-)



Applied to u-boot-marvell/master

Thanks,
Stefan

[PATCH] board_r: use IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) in board_init_r()

2022-05-02 Thread Ovidiu Panait

Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use
IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the
initcall pointers.

Signed-off-by: Ovidiu Panait 
---

 common/board_r.c | 13 +
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 93c9c2e50d..6f4aca2077 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -61,6 +61,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -810,19 +811,15 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP))
arch_setup_gd(new_gd);
 
-#ifdef CONFIG_NEEDS_MANUAL_RELOC
-   int i;
-#endif
-
 #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
gd = new_gd;
 #endif
gd->flags &= ~GD_FLG_LOG_READY;
 
-#ifdef CONFIG_NEEDS_MANUAL_RELOC
-   for (i = 0; i < ARRAY_SIZE(init_sequence_r); i++)
-   init_sequence_r[i] += gd->reloc_off;
-#endif
+   if (IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC)) {
+   for (int i = 0; i < ARRAY_SIZE(init_sequence_r); i++)
+   MANUAL_RELOC(init_sequence_r[i]);
+   }
 
if (initcall_run_list(init_sequence_r))
hang();
-- 
2.36.0

Re: SquashFS not compiling due to missing __udivmoddi4 (x86)

2022-05-02 Thread Tom Rini

On Mon, May 02, 2022 at 12:39:32PM +0200, Sean Nyekjaer wrote:

> Hi,
> 
> I'm trying to build Squashfs for u-boot for x86.
> 
> Looks like we are missing some libgcc helper function.
> 
> ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read':
> /home/sean/development/siemens/u-boot/fs/squashfs/sqfs.c:1443: undefined 
> reference to `__udivmoddi4'
> ld.bfd: /home/sean/development/siemens/u-boot/fs/squashfs/sqfs.c:1521: 
> undefined reference to `__udivmoddi4'
> 
> I can fix this by adding the function from arch/arc/lib/libgcc2.c to
> arch/x86/lib/div64.c, but I'm not sure it's the right way to do it :)
> 
> Any hints?

That likely means there's some 64 bit math going on which should be
using lldiv or do_div or something like that, instead.

-- 
Tom


signature.asc
Description: PGP signature

[PATCH 10/12] cmd: tlv_eeprom: split off tlv library from command

The eeprom command includes functions for reading and writing
tlv-formatted data from an eeprom, as well as an implementation of the
cli command tlv_eeprom.

Split off the parsing, read and write into a standalone tlv library.

Signed-off-by: Josua Mayer 
---
 cmd/Kconfig  |   2 +
 cmd/tlv_eeprom.c | 742 +-
 lib/Kconfig  |   2 +
 lib/Makefile |   2 +
 lib/tlv/Kconfig  |  15 +
 lib/tlv/Makefile |   5 +
 lib/tlv/tlv_eeprom.c | 750 +++
 7 files changed, 786 insertions(+), 732 deletions(-)
 create mode 100644 lib/tlv/Kconfig
 create mode 100644 lib/tlv/Makefile
 create mode 100644 lib/tlv/tlv_eeprom.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 2b575a2b42..821b5e9d6b 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -166,6 +166,7 @@ config CMD_REGINFO
 
 config CMD_TLV_EEPROM
bool "tlv_eeprom"
+   select EEPROM_TLV_LIB
depends on I2C_EEPROM
help
  Display and program the system EEPROM data block in ONIE Tlvinfo
@@ -173,6 +174,7 @@ config CMD_TLV_EEPROM
 
 config SPL_CMD_TLV_EEPROM
bool "tlv_eeprom for SPL"
+   select SPL_EEPROM_TLV_LIB
depends on SPL_I2C_EEPROM
select SPL_DRIVERS_MISC
help
diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index c66116b2c4..99b79cad8b 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -10,131 +10,26 @@
  * Copyright (C) 2022 Josua Mayer 
  */
 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "tlv_eeprom.h"
-
-DECLARE_GLOBAL_DATA_PTR;
+#include 
+#include 
+#include 
+#include 
 
 /* File scope function prototypes */
-static int read_eeprom(int devnum, u8 *eeprom);
 static void show_eeprom(int devnum, u8 *eeprom);
-static void decode_tlv(struct tlvinfo_tlv *tlv);
-static int set_mac(char *buf, const char *string);
-static int set_date(char *buf, const char *string);
-static int set_bytes(char *buf, const char *string, int *converted_accum);
 static void show_tlv_devices(int current_dev);
+static inline const char *tlv_type2name(u8 type);
+static void decode_tlv(struct tlvinfo_tlv *tlv);
+static int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int argc, char 
*const argv[]);
+static void show_tlv_code_list(void);
 
 /* The EERPOM contents after being read into memory */
 static u8 eeprom[TLV_INFO_MAX_LEN];
 
-static struct udevice *tlv_devices[TLV_MAX_DEVICES];
-
 #define to_header(p) ((struct tlvinfo_header *)p)
 #define to_entry(p) ((struct tlvinfo_tlv *)p)
 
-/**
- * Check whether eeprom device exists.
- */
-bool exists_tlv_eeprom(int dev)
-{
-   return dev < TLV_MAX_DEVICES && tlv_devices[dev] != 0;
-}
-
-static inline bool is_digit(char c)
-{
-   return (c >= '0' && c <= '9');
-}
-
-/**
- *  is_hex
- *
- *  Tests if character is an ASCII hex digit
- */
-static inline u8 is_hex(char p)
-{
-   return (((p >= '0') && (p <= '9')) ||
-   ((p >= 'A') && (p <= 'F')) ||
-   ((p >= 'a') && (p <= 'f')));
-}
-
-/**
- *  Validate the checksum in the provided TlvInfo EEPROM data. First,
- *  verify that the TlvInfo header is valid, then make sure the last
- *  TLV is a CRC-32 TLV. Then calculate the CRC over the EEPROM data
- *  and compare it to the value stored in the EEPROM CRC-32 TLV.
- */
-bool tlvinfo_check_crc(u8 *eeprom)
-{
-   struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
-   struct tlvinfo_tlv*eeprom_crc;
-   unsigned int   calc_crc;
-   unsigned int   stored_crc;
-
-   // Is the eeprom header valid?
-   if (!is_valid_tlvinfo_header(eeprom_hdr))
-   return false;
-
-   // Is the last TLV a CRC?
-   eeprom_crc = to_entry([TLV_INFO_HEADER_SIZE +
-   be16_to_cpu(eeprom_hdr->totallen) - (TLV_INFO_ENTRY_SIZE + 4)]);
-   if (eeprom_crc->type != TLV_CODE_CRC_32 || eeprom_crc->length != 4)
-   return false;
-
-   // Calculate the checksum
-   calc_crc = crc32(0, (void *)eeprom,
-TLV_INFO_HEADER_SIZE + 
be16_to_cpu(eeprom_hdr->totallen) - 4);
-   stored_crc = (eeprom_crc->value[0] << 24) |
-   (eeprom_crc->value[1] << 16) |
-   (eeprom_crc->value[2] <<  8) |
-   eeprom_crc->value[3];
-   return calc_crc == stored_crc;
-}
-
-/**
- *  read_eeprom
- *
- *  Read the EEPROM into memory, if it hasn't already been read.
- */
-static int read_eeprom(int devnum, u8 *eeprom)
-{
-   int ret;
-   struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
-   struct tlvinfo_tlv *eeprom_tlv = 
to_entry([TLV_INFO_HEADER_SIZE]);
-
-   /* Read the header */
-   ret = read_tlv_eeprom((void *)eeprom_hdr, 0, TLV_INFO_HEADER_SIZE, 
devnum);
-   /* If the header was successfully read, read the TLVs */
-   if (ret == 0 && is_valid_tlvinfo_header(eeprom_hdr))
-   ret = read_tlv_eeprom((void

[PATCH 12/12] lib: tlv_eeprom: add function for reading one entry into a C string

This solves the potentially common problem of getting a specific tlv
entry from an eeprom in board-files, without having to introduce several
variables, error handling, memcpy and 0-terminating the string.

Signed-off-by: Josua Mayer 
---
 include/tlv_eeprom.h | 12 
 lib/tlv/tlv_eeprom.c | 25 +
 2 files changed, 37 insertions(+)

diff --git a/include/tlv_eeprom.h b/include/tlv_eeprom.h
index c81c58837d..5989c611f5 100644
--- a/include/tlv_eeprom.h
+++ b/include/tlv_eeprom.h
@@ -166,6 +166,18 @@ bool tlvinfo_add_tlv(u8 *eeprom, int code, char *strval);
  */
 bool tlvinfo_delete_tlv(u8 *eeprom, u8 code);
 
+/**
+ * Read the TLV entry with specified code to a buffer as terminated C string.
+ * @eeprom: Pointer to buffer holding the TLV EEPROM binary data.
+ * @code:   The TLV Code of the entry to read.
+ * @buffer: Pointer to buffer where the value will be stored. Must have 
capacity
+ *  for the string representation of the data including null 
terminator.
+ * @length: size of the buffer where the value will be stored.
+ *
+ * Return length of string on success, -1 on error.
+ */
+ssize_t tlvinfo_read_tlv(u8 *eeprom, u8 code, u8 *buffer, size_t length);
+
 /**
  *  tlvinfo_update_crc
  *
diff --git a/lib/tlv/tlv_eeprom.c b/lib/tlv/tlv_eeprom.c
index 464f0aa1fa..205960e8f2 100644
--- a/lib/tlv/tlv_eeprom.c
+++ b/lib/tlv/tlv_eeprom.c
@@ -350,6 +350,31 @@ bool tlvinfo_add_tlv(u8 *eeprom, int tcode, char *strval)
return true;
 }
 
+/**
+ * Read the TLV entry with specified code to a buffer as terminated C string.
+ */
+ssize_t tlvinfo_read_tlv(u8 *eeprom, u8 code, u8 *buffer, size_t length)
+{
+   int index;
+   struct tlvinfo_tlv *tlv;
+
+   // read sku from part-number field
+   if (tlvinfo_find_tlv(eeprom, code, )) {
+   tlv = (struct tlvinfo_tlv *)[index];
+   if (tlv->length > length) {
+   pr_err("%s: tlv value (%d) larger than buffer (%zu)!\n",
+  __func__, tlv->length + 1, length);
+   return -1;
+   }
+   memcpy(buffer, tlv->value, tlv->length);
+   buffer[tlv->length] = 0;
+
+   return tlv->length;
+   }
+
+   return -1;
+}
+
 /**
  *  set_mac
  *
-- 
2.34.1

[PATCH 09/12] cmd: tlv_eeprom: add my copyright

While each of the previous individual changes is small, accumulated they
amount to a substantial effort. Explicitly add a Copyright declaration.

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index c110927cb5..c66116b2c4 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -7,6 +7,7 @@
  * Copyright (C) 2014 Srideep 
  * Copyright (C) 2013 Miles Tseng 
  * Copyright (C) 2014,2016 david_yang 
+ * Copyright (C) 2022 Josua Mayer 
  */
 
 #include 
-- 
2.34.1

[PATCH 11/12] arm: mvebu: clearfog: enable tlv library for spl in favour of eeprom cmd

The board file used CONFIG_SPL_CMD_TLV_EEPROM as a library to facilitate
reading tlv data with the memory size from eeprom.
Since the tlv library has been split off, only CONFIG_SPL_EEPROM_TLV_LIB
is required now.

Signed-off-by: Josua Mayer 
---
 configs/clearfog_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 880f16a6e0..87ba6f29a7 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -12,6 +12,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
 CONFIG_SPL_TEXT_BASE=0x4030
 CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=25000
@@ -26,7 +27,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C=y
 CONFIG_CMD_TLV_EEPROM=y
-CONFIG_SPL_CMD_TLV_EEPROM=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
@@ -71,3 +71,4 @@ CONFIG_SYS_NS16550=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_SPL_EEPROM_TLV_LIB=y
-- 
2.34.1

[PATCH 07/12] cmd: tlv_eeprom: hide access to static tlv_devices array behind accessor

The tlv_eeprom command logic checks the static tlv_devices array to
validate the eeprom number. This array will be move to a separate tlv
library.
Hide this access behind a new function exists_tlv_eeprom.

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 12 ++--
 include/tlv_eeprom.h |  7 +++
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index 57468edb1c..f51a9666bf 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -44,6 +44,14 @@ static struct udevice *tlv_devices[MAX_TLV_DEVICES];
 #define to_header(p) ((struct tlvinfo_header *)p)
 #define to_entry(p) ((struct tlvinfo_tlv *)p)
 
+/**
+ * Check whether eeprom device exists.
+ */
+bool exists_tlv_eeprom(int dev)
+{
+   return dev < TLV_MAX_DEVICES && tlv_devices[dev] != 0;
+}
+
 static inline bool is_digit(char c)
 {
return (c >= '0' && c <= '9');
@@ -481,7 +489,7 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
unsigned int devnum;
 
devnum = simple_strtoul(argv[2], NULL, 0);
-   if (devnum > MAX_TLV_DEVICES || !tlv_devices[devnum]) {
+   if (!exists_tlv_eeprom(devnum)) {
printf("Invalid device number\n");
return 0;
}
@@ -866,7 +874,7 @@ static void show_tlv_devices(int current_dev)
unsigned int dev;
 
for (dev = 0; dev < MAX_TLV_DEVICES; dev++)
-   if (tlv_devices[dev])
+   if (exists_tlv_eeprom(dev))
printf("TLV: %u%s\n", dev,
   (dev == current_dev) ? " (*)" : "");
 }
diff --git a/include/tlv_eeprom.h b/include/tlv_eeprom.h
index dc7952da6b..c81c58837d 100644
--- a/include/tlv_eeprom.h
+++ b/include/tlv_eeprom.h
@@ -69,6 +69,13 @@ struct __attribute__ ((__packed__)) tlvinfo_tlv {
 /* how many EEPROMs can be used */
 #define TLV_MAX_DEVICES2
 
+/**
+ * Check whether eeprom device exists.
+ *
+ * @dev: EEPROM device to check.
+ */
+bool exists_tlv_eeprom(int dev);
+
 /**
  * read_tlv_eeprom - Read the EEPROM binary data from the hardware
  * @eeprom: Pointer to buffer to hold the binary data
-- 
2.34.1

[PATCH 08/12] cmd: tlv_eeprom: clean up two defines for one thing

MAX_TLV_DEVICES defined in C, and TLV_MAX_DEVICES defined in the header
serve the same purpose. Replace all occurences of the former by the
latter.

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index f51a9666bf..c110927cb5 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -25,8 +25,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define MAX_TLV_DEVICES2
-
 /* File scope function prototypes */
 static int read_eeprom(int devnum, u8 *eeprom);
 static void show_eeprom(int devnum, u8 *eeprom);
@@ -39,7 +37,7 @@ static void show_tlv_devices(int current_dev);
 /* The EERPOM contents after being read into memory */
 static u8 eeprom[TLV_INFO_MAX_LEN];
 
-static struct udevice *tlv_devices[MAX_TLV_DEVICES];
+static struct udevice *tlv_devices[TLV_MAX_DEVICES];
 
 #define to_header(p) ((struct tlvinfo_header *)p)
 #define to_entry(p) ((struct tlvinfo_tlv *)p)
@@ -873,7 +871,7 @@ static void show_tlv_devices(int current_dev)
 {
unsigned int dev;
 
-   for (dev = 0; dev < MAX_TLV_DEVICES; dev++)
+   for (dev = 0; dev < TLV_MAX_DEVICES; dev++)
if (exists_tlv_eeprom(dev))
printf("TLV: %u%s\n", dev,
   (dev == current_dev) ? " (*)" : "");
@@ -890,7 +888,7 @@ static int find_tlv_devices(struct udevice **tlv_devices_p)
ret = uclass_next_device_check()) {
if (ret == 0)
tlv_devices_p[count_dev++] = dev;
-   if (count_dev >= MAX_TLV_DEVICES)
+   if (count_dev >= TLV_MAX_DEVICES)
break;
}
 
@@ -899,7 +897,7 @@ static int find_tlv_devices(struct udevice **tlv_devices_p)
 
 static struct udevice *find_tlv_device_by_index(int dev_num)
 {
-   struct udevice *local_tlv_devices[MAX_TLV_DEVICES] = {};
+   struct udevice *local_tlv_devices[TLV_MAX_DEVICES] = {};
struct udevice **tlv_devices_p;
int ret;
 
@@ -926,7 +924,7 @@ int read_tlv_eeprom(void *eeprom, int offset, int len, int 
dev_num)
 {
struct udevice *dev;
 
-   if (dev_num >= MAX_TLV_DEVICES)
+   if (dev_num >= TLV_MAX_DEVICES)
return -EINVAL;
 
dev = find_tlv_device_by_index(dev_num);
-- 
2.34.1

[PATCH 06/12] cmd: tlv_eeprom: move missing declarations and defines to header

In preparation of splitting the tlv_eeprom command into a separate
library, add function declarations and defines used by the command logic
to the tlv_eeprom header file.

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 59 
 include/tlv_eeprom.h | 29 --
 2 files changed, 54 insertions(+), 34 deletions(-)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index 1b4f2537f6..57468edb1c 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -31,8 +31,6 @@ DECLARE_GLOBAL_DATA_PTR;
 static int read_eeprom(int devnum, u8 *eeprom);
 static void show_eeprom(int devnum, u8 *eeprom);
 static void decode_tlv(struct tlvinfo_tlv *tlv);
-static bool tlvinfo_delete_tlv(u8 *eeprom, u8 code);
-static bool tlvinfo_add_tlv(u8 *eeprom, int tcode, char *strval);
 static int set_mac(char *buf, const char *string);
 static int set_date(char *buf, const char *string);
 static int set_bytes(char *buf, const char *string, int *converted_accum);
@@ -46,9 +44,6 @@ static struct udevice *tlv_devices[MAX_TLV_DEVICES];
 #define to_header(p) ((struct tlvinfo_header *)p)
 #define to_entry(p) ((struct tlvinfo_tlv *)p)
 
-#define HDR_SIZE sizeof(struct tlvinfo_header)
-#define ENT_SIZE sizeof(struct tlvinfo_tlv)
-
 static inline bool is_digit(char c)
 {
return (c >= '0' && c <= '9');
@@ -84,14 +79,14 @@ bool tlvinfo_check_crc(u8 *eeprom)
return false;
 
// Is the last TLV a CRC?
-   eeprom_crc = to_entry([HDR_SIZE +
-   be16_to_cpu(eeprom_hdr->totallen) - (ENT_SIZE + 4)]);
+   eeprom_crc = to_entry([TLV_INFO_HEADER_SIZE +
+   be16_to_cpu(eeprom_hdr->totallen) - (TLV_INFO_ENTRY_SIZE + 4)]);
if (eeprom_crc->type != TLV_CODE_CRC_32 || eeprom_crc->length != 4)
return false;
 
// Calculate the checksum
calc_crc = crc32(0, (void *)eeprom,
-HDR_SIZE + be16_to_cpu(eeprom_hdr->totallen) - 4);
+TLV_INFO_HEADER_SIZE + 
be16_to_cpu(eeprom_hdr->totallen) - 4);
stored_crc = (eeprom_crc->value[0] << 24) |
(eeprom_crc->value[1] << 16) |
(eeprom_crc->value[2] <<  8) |
@@ -108,13 +103,13 @@ static int read_eeprom(int devnum, u8 *eeprom)
 {
int ret;
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
-   struct tlvinfo_tlv *eeprom_tlv = to_entry([HDR_SIZE]);
+   struct tlvinfo_tlv *eeprom_tlv = 
to_entry([TLV_INFO_HEADER_SIZE]);
 
/* Read the header */
-   ret = read_tlv_eeprom((void *)eeprom_hdr, 0, HDR_SIZE, devnum);
+   ret = read_tlv_eeprom((void *)eeprom_hdr, 0, TLV_INFO_HEADER_SIZE, 
devnum);
/* If the header was successfully read, read the TLVs */
if (ret == 0 && is_valid_tlvinfo_header(eeprom_hdr))
-   ret = read_tlv_eeprom((void *)eeprom_tlv, HDR_SIZE,
+   ret = read_tlv_eeprom((void *)eeprom_tlv, TLV_INFO_HEADER_SIZE,
  be16_to_cpu(eeprom_hdr->totallen), 
devnum);
 
// If the contents are invalid, start over with default contents
@@ -161,8 +156,8 @@ static void show_eeprom(int devnum, u8 *eeprom)
 
printf("TLV Name Code Len Value\n");
printf("  --- -\n");
-   curr_tlv = HDR_SIZE;
-   tlv_end  = HDR_SIZE + be16_to_cpu(eeprom_hdr->totallen);
+   curr_tlv = TLV_INFO_HEADER_SIZE;
+   tlv_end  = TLV_INFO_HEADER_SIZE + be16_to_cpu(eeprom_hdr->totallen);
while (curr_tlv < tlv_end) {
eeprom_tlv = to_entry([curr_tlv]);
if (!is_valid_tlvinfo_entry(eeprom_tlv)) {
@@ -171,7 +166,7 @@ static void show_eeprom(int devnum, u8 *eeprom)
return;
}
decode_tlv(eeprom_tlv);
-   curr_tlv += ENT_SIZE + eeprom_tlv->length;
+   curr_tlv += TLV_INFO_ENTRY_SIZE + eeprom_tlv->length;
}
 
printf("Checksum is %s.\n",
@@ -339,10 +334,10 @@ void tlvinfo_update_crc(u8 *eeprom)
if (!tlvinfo_find_tlv(eeprom, TLV_CODE_CRC_32, _index)) {
unsigned int totallen = be16_to_cpu(eeprom_hdr->totallen);
 
-   if ((totallen + ENT_SIZE + 4) > TLV_TOTAL_LEN_MAX)
+   if ((totallen + TLV_INFO_ENTRY_SIZE + 4) > TLV_TOTAL_LEN_MAX)
return;
-   eeprom_index = HDR_SIZE + totallen;
-   eeprom_hdr->totallen = cpu_to_be16(totallen + ENT_SIZE + 4);
+   eeprom_index = TLV_INFO_HEADER_SIZE + totallen;
+   eeprom_hdr->totallen = cpu_to_be16(totallen + 
TLV_INFO_ENTRY_SIZE + 4);
}
eeprom_crc = to_entry([eeprom_index]);
eeprom_crc->type = TLV_CODE_CRC_32;
@@ -350,7 +345,7 @@ void tlvinfo_update_crc(u8 *eeprom)
 
// Calculate the checksum
calc_crc = crc32(0, (void *)eeprom,
-HDR_SIZE + be16_to_cpu(eeprom_hdr->totallen) - 4);
+

[PATCH 04/12] cmd: tlv_eeprom: convert functions used by command to api functions

- prog_eeprom: write_tlvinfo_tlv_eeprom
- update_crc: tlvinfo_update_crc
- is_valid_tlv: is_valid_tlvinfo_entry
- is_checksum_valid: tlvinfo_check_crc

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 56 +++
 include/tlv_eeprom.h | 57 
 2 files changed, 76 insertions(+), 37 deletions(-)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index 00c5b5f840..1b4f2537f6 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -28,13 +28,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MAX_TLV_DEVICES2
 
 /* File scope function prototypes */
-static bool is_checksum_valid(u8 *eeprom);
 static int read_eeprom(int devnum, u8 *eeprom);
 static void show_eeprom(int devnum, u8 *eeprom);
 static void decode_tlv(struct tlvinfo_tlv *tlv);
-static void update_crc(u8 *eeprom);
-static int prog_eeprom(int devnum, u8 *eeprom);
-static bool tlvinfo_find_tlv(u8 *eeprom, u8 tcode, int *eeprom_index);
 static bool tlvinfo_delete_tlv(u8 *eeprom, u8 code);
 static bool tlvinfo_add_tlv(u8 *eeprom, int tcode, char *strval);
 static int set_mac(char *buf, const char *string);
@@ -58,18 +54,6 @@ static inline bool is_digit(char c)
return (c >= '0' && c <= '9');
 }
 
-/**
- *  is_valid_tlv
- *
- *  Perform basic sanity checks on a TLV field. The TLV is pointed to
- *  by the parameter provided.
- *  1. The type code is not reserved (0x00 or 0xFF)
- */
-static inline bool is_valid_tlv(struct tlvinfo_tlv *tlv)
-{
-   return((tlv->type != 0x00) && (tlv->type != 0xFF));
-}
-
 /**
  *  is_hex
  *
@@ -83,14 +67,12 @@ static inline u8 is_hex(char p)
 }
 
 /**
- *  is_checksum_valid
- *
  *  Validate the checksum in the provided TlvInfo EEPROM data. First,
  *  verify that the TlvInfo header is valid, then make sure the last
  *  TLV is a CRC-32 TLV. Then calculate the CRC over the EEPROM data
  *  and compare it to the value stored in the EEPROM CRC-32 TLV.
  */
-static bool is_checksum_valid(u8 *eeprom)
+bool tlvinfo_check_crc(u8 *eeprom)
 {
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
struct tlvinfo_tlv*eeprom_crc;
@@ -137,11 +119,11 @@ static int read_eeprom(int devnum, u8 *eeprom)
 
// If the contents are invalid, start over with default contents
if (!is_valid_tlvinfo_header(eeprom_hdr) ||
-   !is_checksum_valid(eeprom)) {
+   !tlvinfo_check_crc(eeprom)) {
strcpy(eeprom_hdr->signature, TLV_INFO_ID_STRING);
eeprom_hdr->version = TLV_INFO_VERSION;
eeprom_hdr->totallen = cpu_to_be16(0);
-   update_crc(eeprom);
+   tlvinfo_update_crc(eeprom);
}
 
 #ifdef DEBUG
@@ -183,7 +165,7 @@ static void show_eeprom(int devnum, u8 *eeprom)
tlv_end  = HDR_SIZE + be16_to_cpu(eeprom_hdr->totallen);
while (curr_tlv < tlv_end) {
eeprom_tlv = to_entry([curr_tlv]);
-   if (!is_valid_tlv(eeprom_tlv)) {
+   if (!is_valid_tlvinfo_entry(eeprom_tlv)) {
printf("Invalid TLV field starting at EEPROM offset 
%d\n",
   curr_tlv);
return;
@@ -193,7 +175,7 @@ static void show_eeprom(int devnum, u8 *eeprom)
}
 
printf("Checksum is %s.\n",
-  is_checksum_valid(eeprom) ? "valid" : "invalid");
+  tlvinfo_check_crc(eeprom) ? "valid" : "invalid");
 
 #ifdef DEBUG
printf("EEPROM dump: (0x%x bytes)", TLV_INFO_MAX_LEN);
@@ -340,13 +322,13 @@ static void decode_tlv(struct tlvinfo_tlv *tlv)
 }
 
 /**
- *  update_crc
+ *  tlvinfo_update_crc
  *
  *  This function updates the CRC-32 TLV. If there is no CRC-32 TLV, then
  *  one is added. This function should be called after each update to the
  *  EEPROM structure, to make sure the CRC is always correct.
  */
-static void update_crc(u8 *eeprom)
+void tlvinfo_update_crc(u8 *eeprom)
 {
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
struct tlvinfo_tlv*eeprom_crc;
@@ -376,20 +358,20 @@ static void update_crc(u8 *eeprom)
 }
 
 /**
- *  prog_eeprom
+ *  write_tlvinfo_tlv_eeprom
  *
- *  Write the EEPROM data from CPU memory to the hardware.
+ *  Write the TLV data from CPU memory to the hardware.
  */
-static int prog_eeprom(int devnum, u8 *eeprom)
+int write_tlvinfo_tlv_eeprom(void *eeprom, int dev)
 {
int ret = 0;
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
int eeprom_len;
 
-   update_crc(eeprom);
+   tlvinfo_update_crc(eeprom);
 
eeprom_len = HDR_SIZE + be16_to_cpu(eeprom_hdr->totallen);
-   ret = write_tlv_eeprom(eeprom, eeprom_len, devnum);
+   ret = write_tlv_eeprom(eeprom, eeprom_len, dev);
if (ret) {
printf("Programming failed.\n");
return -1;
@@ -462,13 +444,13 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
if (argc == 2) {

[PATCH 05/12] cmd: tlv_eeprom: remove empty function implementations from header

tlv_eeprom exposed functions are independent from platforms, hence no
stubs are required.

Signed-off-by: Josua Mayer 
---
 include/tlv_eeprom.h | 24 ++--
 1 file changed, 2 insertions(+), 22 deletions(-)

diff --git a/include/tlv_eeprom.h b/include/tlv_eeprom.h
index 30626a1067..55fd72d6d2 100644
--- a/include/tlv_eeprom.h
+++ b/include/tlv_eeprom.h
@@ -65,7 +65,8 @@ struct __attribute__ ((__packed__)) tlvinfo_tlv {
 #define TLV_CODE_VENDOR_EXT 0xFD
 #define TLV_CODE_CRC_32 0xFE
 
-#if CONFIG_IS_ENABLED(CMD_TLV_EEPROM)
+/* how many EEPROMs can be used */
+#define TLV_MAX_DEVICES2
 
 /**
  * read_tlv_eeprom - Read the EEPROM binary data from the hardware
@@ -156,27 +157,6 @@ void tlvinfo_update_crc(u8 *eeprom);
  */
 bool tlvinfo_check_crc(u8 *eeprom);
 
-#else /* !CONFIG_IS_ENABLED(CMD_TLV_EEPROM) */
-
-static inline int read_tlv_eeprom(void *eeprom, int offset, int len, int dev)
-{
-   return -ENOSYS;
-}
-
-static inline int write_tlv_eeprom(void *eeprom, int len)
-{
-   return -ENOSYS;
-}
-
-static inline int
-read_tlvinfo_tlv_eeprom(void *eeprom, struct tlvinfo_header **hdr,
-   struct tlvinfo_tlv **first_entry, int dev)
-{
-   return -ENOSYS;
-}
-
-#endif /* CONFIG_IS_ENABLED(CMD_TLV_EEPROM) */
-
 /**
  *  is_valid_tlvinfo_header
  *
-- 
2.34.1

[PATCH 02/12] cmd: tlv_eeprom: remove use of global variable has_been_read

has_been_read is only used as an optimization for do_tlv_eeprom.
Explicitly use and set inside this function, thus making read_eeprom
stateless.

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 25 -
 1 file changed, 12 insertions(+), 13 deletions(-)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index f91c11b304..bfd4882e0d 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -42,8 +42,6 @@ static int set_date(char *buf, const char *string);
 static int set_bytes(char *buf, const char *string, int *converted_accum);
 static void show_tlv_devices(int current_dev);
 
-/* Set to 1 if we've read EEPROM into memory */
-static int has_been_read;
 /* The EERPOM contents after being read into memory */
 static u8 eeprom[TLV_INFO_MAX_LEN];
 
@@ -130,9 +128,6 @@ static int read_eeprom(int devnum, u8 *eeprom)
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
struct tlvinfo_tlv *eeprom_tlv = to_entry([HDR_SIZE]);
 
-   if (has_been_read)
-   return 0;
-
/* Read the header */
ret = read_tlv_eeprom((void *)eeprom_hdr, 0, HDR_SIZE, devnum);
/* If the header was successfully read, read the TLVs */
@@ -149,10 +144,8 @@ static int read_eeprom(int devnum, u8 *eeprom)
update_crc(eeprom);
}
 
-   has_been_read = 1;
-
 #ifdef DEBUG
-   show_eeprom(eeprom);
+   show_eeprom(devnum, eeprom);
 #endif
 
return ret;
@@ -432,10 +425,15 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
char cmd;
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
static unsigned int current_dev;
+   /* Set to devnum if we've read EEPROM into memory */
+   static int has_been_read = -1;
 
// If no arguments, read the EERPOM and display its contents
if (argc == 1) {
-   read_eeprom(current_dev, eeprom);
+   if (has_been_read != current_dev) {
+   if (read_eeprom(current_dev, eeprom) == 0)
+   has_been_read = current_dev;
+   }
show_eeprom(current_dev, eeprom);
return 0;
}
@@ -446,14 +444,16 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
 
// Read the EEPROM contents
if (cmd == 'r') {
-   has_been_read = 0;
-   if (!read_eeprom(current_dev, eeprom))
+   has_been_read = -1;
+   if (read_eeprom(current_dev, eeprom) == 0) {
printf("EEPROM data loaded from device to memory.\n");
+   has_been_read = current_dev;
+   }
return 0;
}
 
// Subsequent commands require that the EEPROM has already been read.
-   if (!has_been_read) {
+   if (has_been_read != current_dev) {
printf("Please read the EEPROM data first, using the 
'tlv_eeprom read' command.\n");
return 0;
}
@@ -509,7 +509,6 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
return 0;
}
current_dev = devnum;
-   has_been_read = 0;
} else {
cmd_usage(cmdtp);
}
-- 
2.34.1

[PATCH 03/12] cmd: tlv_eeprom: do_tlv_eeprom: stop using non-api read_eeprom function

IN the scope of do_tlv_eeprom, the error-checking provided by the
read_eeprom function is not required.
Instead use the API function read_tlv_eeprom.

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index bfd4882e0d..00c5b5f840 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -431,7 +431,7 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
// If no arguments, read the EERPOM and display its contents
if (argc == 1) {
if (has_been_read != current_dev) {
-   if (read_eeprom(current_dev, eeprom) == 0)
+   if (read_tlv_eeprom(eeprom, 0, TLV_INFO_MAX_LEN, 
current_dev) == 0)
has_been_read = current_dev;
}
show_eeprom(current_dev, eeprom);
@@ -445,7 +445,7 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
// Read the EEPROM contents
if (cmd == 'r') {
has_been_read = -1;
-   if (read_eeprom(current_dev, eeprom) == 0) {
+   if (read_tlv_eeprom(eeprom, 0, TLV_INFO_MAX_LEN, current_dev) 
== 0) {
printf("EEPROM data loaded from device to memory.\n");
has_been_read = current_dev;
}
-- 
2.34.1

[PATCH 01/12] cmd: tlv_eeprom: remove use of global variable current_dev

Make tlv_eeprom command device selection an explicit parameter of all
function calls.

Signed-off-by: Josua Mayer 
---
 cmd/tlv_eeprom.c | 50 ++--
 include/tlv_eeprom.h |  3 ++-
 2 files changed, 27 insertions(+), 26 deletions(-)

diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index bf8d453dc5..f91c11b304 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -29,18 +29,18 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /* File scope function prototypes */
 static bool is_checksum_valid(u8 *eeprom);
-static int read_eeprom(u8 *eeprom);
-static void show_eeprom(u8 *eeprom);
+static int read_eeprom(int devnum, u8 *eeprom);
+static void show_eeprom(int devnum, u8 *eeprom);
 static void decode_tlv(struct tlvinfo_tlv *tlv);
 static void update_crc(u8 *eeprom);
-static int prog_eeprom(u8 *eeprom);
+static int prog_eeprom(int devnum, u8 *eeprom);
 static bool tlvinfo_find_tlv(u8 *eeprom, u8 tcode, int *eeprom_index);
 static bool tlvinfo_delete_tlv(u8 *eeprom, u8 code);
 static bool tlvinfo_add_tlv(u8 *eeprom, int tcode, char *strval);
 static int set_mac(char *buf, const char *string);
 static int set_date(char *buf, const char *string);
 static int set_bytes(char *buf, const char *string, int *converted_accum);
-static void show_tlv_devices(void);
+static void show_tlv_devices(int current_dev);
 
 /* Set to 1 if we've read EEPROM into memory */
 static int has_been_read;
@@ -48,7 +48,6 @@ static int has_been_read;
 static u8 eeprom[TLV_INFO_MAX_LEN];
 
 static struct udevice *tlv_devices[MAX_TLV_DEVICES];
-static unsigned int current_dev;
 
 #define to_header(p) ((struct tlvinfo_header *)p)
 #define to_entry(p) ((struct tlvinfo_tlv *)p)
@@ -125,7 +124,7 @@ static bool is_checksum_valid(u8 *eeprom)
  *
  *  Read the EEPROM into memory, if it hasn't already been read.
  */
-static int read_eeprom(u8 *eeprom)
+static int read_eeprom(int devnum, u8 *eeprom)
 {
int ret;
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
@@ -135,12 +134,11 @@ static int read_eeprom(u8 *eeprom)
return 0;
 
/* Read the header */
-   ret = read_tlv_eeprom((void *)eeprom_hdr, 0, HDR_SIZE, current_dev);
+   ret = read_tlv_eeprom((void *)eeprom_hdr, 0, HDR_SIZE, devnum);
/* If the header was successfully read, read the TLVs */
if (ret == 0 && is_valid_tlvinfo_header(eeprom_hdr))
ret = read_tlv_eeprom((void *)eeprom_tlv, HDR_SIZE,
- be16_to_cpu(eeprom_hdr->totallen),
- current_dev);
+ be16_to_cpu(eeprom_hdr->totallen), 
devnum);
 
// If the contents are invalid, start over with default contents
if (!is_valid_tlvinfo_header(eeprom_hdr) ||
@@ -165,7 +163,7 @@ static int read_eeprom(u8 *eeprom)
  *
  *  Display the contents of the EEPROM
  */
-static void show_eeprom(u8 *eeprom)
+static void show_eeprom(int devnum, u8 *eeprom)
 {
int tlv_end;
int curr_tlv;
@@ -180,7 +178,7 @@ static void show_eeprom(u8 *eeprom)
return;
}
 
-   printf("TLV: %u\n", current_dev);
+   printf("TLV: %u\n", devnum);
printf("TlvInfo Header:\n");
printf("   Id String:%s\n", eeprom_hdr->signature);
printf("   Version:  %d\n", eeprom_hdr->version);
@@ -389,7 +387,7 @@ static void update_crc(u8 *eeprom)
  *
  *  Write the EEPROM data from CPU memory to the hardware.
  */
-static int prog_eeprom(u8 *eeprom)
+static int prog_eeprom(int devnum, u8 *eeprom)
 {
int ret = 0;
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
@@ -398,7 +396,7 @@ static int prog_eeprom(u8 *eeprom)
update_crc(eeprom);
 
eeprom_len = HDR_SIZE + be16_to_cpu(eeprom_hdr->totallen);
-   ret = write_tlv_eeprom(eeprom, eeprom_len);
+   ret = write_tlv_eeprom(eeprom, eeprom_len, devnum);
if (ret) {
printf("Programming failed.\n");
return -1;
@@ -433,11 +431,12 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
 {
char cmd;
struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
+   static unsigned int current_dev;
 
// If no arguments, read the EERPOM and display its contents
if (argc == 1) {
-   read_eeprom(eeprom);
-   show_eeprom(eeprom);
+   read_eeprom(current_dev, eeprom);
+   show_eeprom(current_dev, eeprom);
return 0;
}
 
@@ -448,7 +447,7 @@ int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
// Read the EEPROM contents
if (cmd == 'r') {
has_been_read = 0;
-   if (!read_eeprom(eeprom))
+   if (!read_eeprom(current_dev, eeprom))
printf("EEPROM data loaded from device to memory.\n");
return 0;
}
@@ -463,7 +462,7 @@ int

[PATCH 00/12] split tlv_eeprom command into a separate library

The tlv_eeprom command provides much more than just a cli command:
- de- and encoding tlv format
- for reading and writing eeprom
- setting the eth?addr environment variable
- setting the serial# environment variable

One device (Clearfog) is already using the decoding functionality to
choose the correct memory size based on eeprom data.

This patchset massages the implementation in many places removing
stateful behaviour and global variables as much as possible and changing
some functions to be usable as a library.
Then finally everything but the handling of the cli command is split off
into a separate tlv library that can be used independently from the command.

SolidRun is starting to flash more devices with tlv data at the factory,
and we plan to use this information for device identification purposes
in future board files. This refactoring will make those implementations
easier and reduce the amount of duplicate code to carry around.

Josua Mayer (12):
  cmd: tlv_eeprom: remove use of global variable current_dev
  cmd: tlv_eeprom: remove use of global variable has_been_read
  cmd: tlv_eeprom: do_tlv_eeprom: stop using non-api read_eeprom
function
  cmd: tlv_eeprom: convert functions used by command to api functions
  cmd: tlv_eeprom: remove empty function implementations from header
  cmd: tlv_eeprom: move missing declarations and defines to header
  cmd: tlv_eeprom: hide access to static tlv_devices array behind
accessor
  cmd: tlv_eeprom: clean up two defines for one thing
  cmd: tlv_eeprom: add my copyright
  cmd: tlv_eeprom: split off tlv library from command
  arm: mvebu: clearfog: enable tlv library for spl in favour of eeprom
cmd
  lib: tlv_eeprom: add function for reading one entry into a C string

 cmd/Kconfig|   2 +
 cmd/tlv_eeprom.c   | 817 ++---
 configs/clearfog_defconfig |   3 +-
 include/tlv_eeprom.h   | 122 +-
 lib/Kconfig|   2 +
 lib/Makefile   |   2 +
 lib/tlv/Kconfig|  15 +
 lib/tlv/Makefile   |   5 +
 lib/tlv/tlv_eeprom.c   | 775 +++
 9 files changed, 944 insertions(+), 799 deletions(-)
 create mode 100644 lib/tlv/Kconfig
 create mode 100644 lib/tlv/Makefile
 create mode 100644 lib/tlv/tlv_eeprom.c

Cc: Jon Nettleton 
-- 
2.34.1

Re: [PATCH 1/5] phy: adin: remove broken support for adi,phy-mode-override

2022-05-02 Thread Nate Drude

Hi Josua,

On Sun, 2022-05-01 at 15:41 +0300, Josua Mayer wrote:
> The adin_get_phy_mode_override function does not compile, because it
> is
> missing both declaration and implementation of
> phy_get_interface_by_name.
> 
> Remove the whole function for now, since the missing implementation
> is
> not included in mainline Linux - and thus can not be copied.
> 
> Signed-off-by: Josua Mayer 
> ---
>  drivers/net/phy/adin.c | 34 --
>  1 file changed, 34 deletions(-)
> 
> diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
> index cff841ab3d..2433e76fea 100644
> --- a/drivers/net/phy/adin.c
> +++ b/drivers/net/phy/adin.c
> @@ -94,35 +94,6 @@ static u32 adin_get_reg_value(struct phy_device
> *phydev,
> return rc;
>  }
>  
> -/**
> - * adin_get_phy_mode_override - Get phy-mode override for adin PHY
> - *
> - * The function gets phy-mode string from property 'adi,phy-mode-
> override'
> - * and return its index in phy_interface_strings table, or -1 in
> error case.
> - */
> -int adin_get_phy_mode_override(struct phy_device *phydev)
> -{
> -   ofnode node = phy_get_ofnode(phydev);
> -   const char *phy_mode_override;
> -   const char *prop_phy_mode_override = "adi,phy-mode-override";
> -   int override_interface;
> -
> -   phy_mode_override = ofnode_read_string(node,
> prop_phy_mode_override);
> -   if (!phy_mode_override)
> -   return -ENODEV;
> -
> -   debug("%s: %s = '%s'\n",
> - __func__, prop_phy_mode_override, phy_mode_override);
> -
> -   override_interface =
> phy_get_interface_by_name(phy_mode_override);
> -
> -   if (override_interface < 0)
> -   printf("%s: %s = '%s' is not valid\n",
> -  __func__, prop_phy_mode_override,
> phy_mode_override);
> -
> -   return override_interface;
> -}
> -
>  static u16 adin_ext_read(struct phy_device *phydev, const u32
> regnum)
>  {
> u16 val;
> @@ -148,11 +119,6 @@ static int adin_config_rgmii_mode(struct
> phy_device *phydev)
>  {
> u16 reg_val;
> u32 val;
> -   int phy_mode_override = adin_get_phy_mode_override(phydev);
> -
> -   if (phy_mode_override >= 0) {
> -   phydev->interface = (phy_interface_t)
> phy_mode_override;
> -   }
>  
> reg_val = adin_ext_read(phydev, ADIN1300_GE_RGMII_CFG);
>  

The patch that introduced adin_get_phy_mode_override was tested against
the U-Boot master branch. Unfortunately, phy_get_interface_by_name was
removed just a few days before by:
https://github.com/u-boot/u-boot/commit/123ca114e07ecf28aa2538748d733e2b22d8b8b5

Can we fix adin_get_phy_mode_override instead of removing it? We can
implement part of ofnode_read_phy_mode. This needs to be tested, but
for example:

diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
index cff841ab3d..6a05b9fd05 100644
--- a/drivers/net/phy/adin.c
+++ b/drivers/net/phy/adin.c
@@ -100,27 +100,28 @@ static u32 adin_get_reg_value(struct phy_device
*phydev,
  * The function gets phy-mode string from property 'adi,phy-mode-
override'
  * and return its index in phy_interface_strings table, or -1 in error
case.
  */
-int adin_get_phy_mode_override(struct phy_device *phydev)
+phy_interface_t adin_get_phy_mode_override(struct phy_device *phydev)
 {
ofnode node = phy_get_ofnode(phydev);
const char *phy_mode_override;
const char *prop_phy_mode_override = "adi,phy-mode-override";
-   int override_interface;
+   int i;
 
phy_mode_override = ofnode_read_string(node,
prop_phy_mode_override);
+
if (!phy_mode_override)
-   return -ENODEV;
+   return PHY_INTERFACE_MODE_NA;
 
debug("%s: %s = '%s'\n",
  __func__, prop_phy_mode_override, phy_mode_override);
 
-   override_interface =
phy_get_interface_by_name(phy_mode_override);
+   for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++)
+   if (!strcmp(phy_mode_override,
phy_interface_strings[i]))
+   return i;
 
-   if (override_interface < 0)
-   printf("%s: %s = '%s' is not valid\n",
-  __func__, prop_phy_mode_override,
phy_mode_override);
+   debug("%s: Invalid PHY interface '%s'\n", __func__,
phy_mode_override);
 
-   return override_interface;
+   return PHY_INTERFACE_MODE_NA;
 }
 
 static u16 adin_ext_read(struct phy_device *phydev, const u32 regnum)
@@ -148,10 +149,10 @@ static int adin_config_rgmii_mode(struct
phy_device *phydev)
 {
u16 reg_val;
u32 val;
-   int phy_mode_override = adin_get_phy_mode_override(phydev);
+   phy_interface_t phy_mode_override =
adin_get_phy_mode_override(phydev);
 
-   if (phy_mode_override >= 0) {
-   phydev->interface = (phy_interface_t)
phy_mode_override;
+   if (phy_mode_override != PHY_INTERFACE_MODE_NA) {
+   phydev->interface = phy_mode_override;
}
 
reg_val =

[PATCH V2] configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGE

From: Peng Fan 

CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace
CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop
CONFIG_SPL_ABORT_ON_RAW_IMAGE.

Signed-off-by: Peng Fan 
---

V2:
 Drop comments

 include/configs/capricorn-common.h  | 1 -
 include/configs/cgtqmx8.h   | 1 -
 include/configs/imx8mm-cl-iot-gate.h| 1 -
 include/configs/imx8mm_beacon.h | 1 -
 include/configs/imx8mm_data_modul_edm_sbc.h | 1 -
 include/configs/imx8mm_evk.h| 1 -
 include/configs/imx8mm_icore_mx8mm.h| 1 -
 include/configs/imx8mm_venice.h | 1 -
 include/configs/imx8mn_beacon.h | 1 -
 include/configs/imx8mn_evk.h| 1 -
 include/configs/imx8mn_venice.h | 1 -
 include/configs/imx8mp_evk.h| 1 -
 include/configs/imx8mp_rsb3720.h| 1 -
 include/configs/imx8mp_venice.h | 1 -
 include/configs/imx8mq_cm.h | 1 -
 include/configs/imx8mq_evk.h| 1 -
 include/configs/imx8mq_phanbell.h   | 1 -
 include/configs/imx8qm_mek.h| 1 -
 include/configs/imx8qxp_mek.h   | 1 -
 include/configs/imx8ulp_evk.h   | 1 -
 include/configs/kontron_pitx_imx8m.h| 1 -
 include/configs/phycore_imx8mm.h| 1 -
 include/configs/phycore_imx8mp.h| 1 -
 include/configs/pico-imx8mq.h   | 1 -
 include/configs/verdin-imx8mm.h | 1 -
 include/configs/verdin-imx8mp.h | 1 -
 26 files changed, 26 deletions(-)

diff --git a/include/configs/capricorn-common.h 
b/include/configs/capricorn-common.h
index 364bd50b591..aa4c9818638 100644
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -26,7 +26,6 @@
 #define CONFIG_MALLOC_F_ADDR   0x0012
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif /* CONFIG_SPL_BUILD */
 
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index 6da0483ef09..183170e833c 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -25,7 +25,6 @@
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 /* Flat Device Tree Definitions */
diff --git a/include/configs/imx8mm-cl-iot-gate.h 
b/include/configs/imx8mm-cl-iot-gate.h
index fcb46c16605..e6c220bf0a8 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -27,7 +27,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x912000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index 4c9b5491f78..a9ca13a9da4 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x93
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h 
b/include/configs/imx8mm_data_modul_edm_sbc.h
index ff98095d27d..b5c445df9ce 100644
--- a/include/configs/imx8mm_data_modul_edm_sbc.h
+++ b/include/configs/imx8mm_data_modul_edm_sbc.h
@@ -25,7 +25,6 @@
 #define CONFIG_MALLOC_F_ADDR   0x93
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 7dd66527c3d..98be481fce7 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -26,7 +26,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x93
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_icore_mx8mm.h 
b/include/configs/imx8mm_icore_mx8mm.h
index 1a439370c09..34993cafdaf 100644
--- a/include/configs/imx8mm_icore_mx8mm.h
+++ b/include/configs/imx8mm_icore_mx8mm.h
@@ -25,7 +25,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 # define CONFIG_MALLOC_F_ADDR  0x93
 /* For RAW image gives a error info not panic */
-# define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif /* CONFIG_SPL_BUILD */
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index c3e92b76141..ba8379db784 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x93
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index c16dda5e22c..57b99d5a110

[PATCH] configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGE

From: Peng Fan 

CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace
CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop
CONFIG_SPL_ABORT_ON_RAW_IMAGE.

Signed-off-by: Peng Fan 
---
 include/configs/capricorn-common.h  | 1 -
 include/configs/cgtqmx8.h   | 1 -
 include/configs/imx8mm-cl-iot-gate.h| 1 -
 include/configs/imx8mm_beacon.h | 1 -
 include/configs/imx8mm_data_modul_edm_sbc.h | 1 -
 include/configs/imx8mm_evk.h| 1 -
 include/configs/imx8mm_icore_mx8mm.h| 1 -
 include/configs/imx8mm_venice.h | 1 -
 include/configs/imx8mn_beacon.h | 1 -
 include/configs/imx8mn_evk.h| 1 -
 include/configs/imx8mn_venice.h | 1 -
 include/configs/imx8mp_evk.h| 1 -
 include/configs/imx8mp_rsb3720.h| 1 -
 include/configs/imx8mp_venice.h | 1 -
 include/configs/imx8mq_cm.h | 1 -
 include/configs/imx8mq_evk.h| 1 -
 include/configs/imx8mq_phanbell.h   | 1 -
 include/configs/imx8qm_mek.h| 1 -
 include/configs/imx8qxp_mek.h   | 1 -
 include/configs/imx8ulp_evk.h   | 1 -
 include/configs/kontron_pitx_imx8m.h| 1 -
 include/configs/phycore_imx8mm.h| 1 -
 include/configs/phycore_imx8mp.h| 1 -
 include/configs/pico-imx8mq.h   | 1 -
 include/configs/verdin-imx8mm.h | 1 -
 include/configs/verdin-imx8mp.h | 1 -
 26 files changed, 26 deletions(-)

diff --git a/include/configs/capricorn-common.h 
b/include/configs/capricorn-common.h
index 364bd50b591..aa4c9818638 100644
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -26,7 +26,6 @@
 #define CONFIG_MALLOC_F_ADDR   0x0012
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif /* CONFIG_SPL_BUILD */
 
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index 6da0483ef09..183170e833c 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -25,7 +25,6 @@
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 /* Flat Device Tree Definitions */
diff --git a/include/configs/imx8mm-cl-iot-gate.h 
b/include/configs/imx8mm-cl-iot-gate.h
index fcb46c16605..e6c220bf0a8 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -27,7 +27,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x912000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index 4c9b5491f78..a9ca13a9da4 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x93
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h 
b/include/configs/imx8mm_data_modul_edm_sbc.h
index ff98095d27d..b5c445df9ce 100644
--- a/include/configs/imx8mm_data_modul_edm_sbc.h
+++ b/include/configs/imx8mm_data_modul_edm_sbc.h
@@ -25,7 +25,6 @@
 #define CONFIG_MALLOC_F_ADDR   0x93
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 7dd66527c3d..98be481fce7 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -26,7 +26,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x93
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_icore_mx8mm.h 
b/include/configs/imx8mm_icore_mx8mm.h
index 1a439370c09..34993cafdaf 100644
--- a/include/configs/imx8mm_icore_mx8mm.h
+++ b/include/configs/imx8mm_icore_mx8mm.h
@@ -25,7 +25,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 # define CONFIG_MALLOC_F_ADDR  0x93
 /* For RAW image gives a error info not panic */
-# define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif /* CONFIG_SPL_BUILD */
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index c3e92b76141..ba8379db784 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR   0x93
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index c16dda5e22c..57b99d5a110 100644
---

[PATCH v1] arm: dts: rockchip: rk3288: move dma-controller nodes

In order to better compare the Linux rk3288.dtsi version
with the u-boot version move the dma-controller nodes
to the DT root.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288.dtsi | 76 ++--
 1 file changed, 35 insertions(+), 41 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 469df94e..53ee760b 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -86,47 +86,6 @@
};
};
 
-   amba {
-   compatible = "arm,amba-bus";
-   #address-cells = <1>;
-   #size-cells = <1>;
-   ranges;
-
-   dmac_peri: dma-controller@ff25 {
-   compatible = "arm,pl330", "arm,primecell";
-   broken-no-flushp;
-   reg = <0xff25 0x4000>;
-   interrupts = ,
-;
-   #dma-cells = <1>;
-   clocks = < ACLK_DMAC2>;
-   clock-names = "apb_pclk";
-   };
-
-   dmac_bus_ns: dma-controller@ff60 {
-   compatible = "arm,pl330", "arm,primecell";
-   broken-no-flushp;
-   reg = <0xff60 0x4000>;
-   interrupts = ,
-;
-   #dma-cells = <1>;
-   clocks = < ACLK_DMAC1>;
-   clock-names = "apb_pclk";
-   status = "disabled";
-   };
-
-   dmac_bus_s: dma-controller@ffb2 {
-   compatible = "arm,pl330", "arm,primecell";
-   broken-no-flushp;
-   reg = <0xffb2 0x4000>;
-   interrupts = ,
-;
-   #dma-cells = <1>;
-   clocks = < ACLK_DMAC1>;
-   clock-names = "apb_pclk";
-   };
-   };
-
xin24m: oscillator {
compatible = "fixed-clock";
clock-frequency = <2400>;
@@ -367,6 +326,18 @@
pinctrl-0 = <_xfer>;
status = "disabled";
};
+
+   dmac_peri: dma-controller@ff25 {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0xff25 0x4000>;
+   interrupts = ,
+;
+   #dma-cells = <1>;
+   broken-no-flushp;
+   clocks = < ACLK_DMAC2>;
+   clock-names = "apb_pclk";
+   };
+
thermal: thermal-zones {
#include "rk3288-thermal.dtsi"
};
@@ -458,6 +429,18 @@
status = "disabled";
};
 
+   dmac_bus_ns: dma-controller@ff60 {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0xff60 0x4000>;
+   interrupts = ,
+;
+   #dma-cells = <1>;
+   broken-no-flushp;
+   clocks = < ACLK_DMAC1>;
+   clock-names = "apb_pclk";
+   status = "disabled";
+   };
+
i2c0: i2c@ff65 {
compatible = "rockchip,rk3288-i2c";
reg = <0xff65 0x1000>;
@@ -870,6 +853,17 @@
status = "disabled";
};
 
+   dmac_bus_s: dma-controller@ffb2 {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0xffb2 0x4000>;
+   interrupts = ,
+;
+   #dma-cells = <1>;
+   broken-no-flushp;
+   clocks = < ACLK_DMAC1>;
+   clock-names = "apb_pclk";
+   };
+
efuse: efuse@ffb4 {
compatible = "rockchip,rk3288-efuse";
reg = <0xffb4 0x1>;
-- 
2.20.1

SquashFS not compiling due to missing __udivmoddi4 (x86)

2022-05-02 Thread Sean Nyekjaer

Hi,

I'm trying to build Squashfs for u-boot for x86.

Looks like we are missing some libgcc helper function.

ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read':
/home/sean/development/siemens/u-boot/fs/squashfs/sqfs.c:1443: undefined 
reference to `__udivmoddi4'
ld.bfd: /home/sean/development/siemens/u-boot/fs/squashfs/sqfs.c:1521: 
undefined reference to `__udivmoddi4'

I can fix this by adding the function from arch/arc/lib/libgcc2.c to
arch/x86/lib/div64.c, but I'm not sure it's the right way to do it :)

Any hints?

/Sean

[PATCH v1] arm: dts: rockchip: rk3288: sort mipi hdmi lvds and dp nodes

In order to better compare the Linux rk3288.dtsi version
with the u-boot version sort the mipi,hdmi,lvds and dp nodes.

Changed:
  Rename mipi_dsi label.
  Rename dp nodename.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288-evb.dtsi |   2 +-
 arch/arm/dts/rk3288.dtsi | 110 +--
 2 files changed, 56 insertions(+), 56 deletions(-)

diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index 04902c0b..72da8847 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -448,7 +448,7 @@
status = "okay";
 };
 
-_dsi0 {
+_dsi {
status = "disabled";
rockchip,panel = <>;
display-timings {
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 0bfa4c39..469df94e 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -709,54 +709,29 @@
status = "disabled";
};
 
-   edp: edp@ff97 {
-   compatible = "rockchip,rk3288-edp";
-   reg = <0xff97 0x4000>;
-   interrupts = ;
-   clocks = < SCLK_EDP>, < SCLK_EDP_24M>, < 
PCLK_EDP_CTRL>;
-   rockchip,grf = <>;
-   clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
-   resets = < 111>;
-   reset-names = "edp";
-   power-domains = < RK3288_PD_VIO>;
-   status = "disabled";
-   ports {
-   edp_in: port {
-   #address-cells = <1>;
-   #size-cells = <0>;
-   edp_in_vopb: endpoint@0 {
-   reg = <0>;
-   remote-endpoint = <_out_edp>;
-   };
-   edp_in_vopl: endpoint@1 {
-   reg = <1>;
-   remote-endpoint = <_out_edp>;
-   };
-   };
-   };
-   };
-
-   hdmi: hdmi@ff98 {
-   compatible = "rockchip,rk3288-dw-hdmi";
-   reg = <0xff98 0x2>;
-   reg-io-width = <4>;
-   ddc-i2c-bus = <>;
+   mipi_dsi: mipi@ff96 {
+   compatible = "rockchip,rk3288_mipi_dsi";
+   reg = <0xff96 0x4000>;
+   clocks = < PCLK_MIPI_DSI0>;
+   clock-names = "pclk_mipi";
+   /*pinctrl-names = "default";
+   pinctrl-0 = <_ctl>;*/
rockchip,grf = <>;
-   interrupts = ;
-   clocks = <  PCLK_HDMI_CTRL>, < SCLK_HDMI_HDCP>;
-   clock-names = "iahb", "isfr";
+   #address-cells = <1>;
+   #size-cells = <0>;
status = "disabled";
ports {
-   hdmi_in: port {
+   reg = <1>;
+   mipi_in: port {
#address-cells = <1>;
#size-cells = <0>;
-   hdmi_in_vopb: endpoint@0 {
+   mipi_in_vopb: endpoint@0 {
reg = <0>;
-   remote-endpoint = <_out_hdmi>;
+   remote-endpoint = <_out_mipi>;
};
-   hdmi_in_vopl: endpoint@1 {
+   mipi_in_vopl: endpoint@1 {
reg = <1>;
-   remote-endpoint = <_out_hdmi>;
+   remote-endpoint = <_out_mipi>;
};
};
};
@@ -790,29 +765,54 @@
};
};
 
-   mipi_dsi0: mipi@ff96 {
-   compatible = "rockchip,rk3288_mipi_dsi";
-   reg = <0xff96 0x4000>;
-   clocks = < PCLK_MIPI_DSI0>;
-   clock-names = "pclk_mipi";
-   /*pinctrl-names = "default";
-   pinctrl-0 = <_ctl>;*/
+   edp: dp@ff97 {
+   compatible = "rockchip,rk3288-edp";
+   reg = <0xff97 0x4000>;
+   interrupts = ;
+   clocks = < SCLK_EDP>, < SCLK_EDP_24M>, < 
PCLK_EDP_CTRL>;
rockchip,grf = <>;
-   #address-cells = <1>;
-   #size-cells = <0>;
+   clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
+   resets = < 111>;
+   reset-names = "edp";
+   power-domains = < RK3288_PD_VIO>;
status = "disabled";
ports {
-   reg = <1>;
-   mipi_in: port {
+   edp_in: port {
#address-cells = <1>;

[PATCH v1] arm: dts: rockchip: rk3288: rename mmc nodenames

The boot_devices constants for rk3288 were changed to match the
binding, but the dtsi file was not synced.
Fix by renaming the rk3288 mmc node names.
Also correct the clock name for "ciu-drive".

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288.dtsi | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 5e40e741..0bfa4c39 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -150,48 +150,48 @@
ports = <_out>, <_out>;
};
 
-   sdmmc: dwmmc@ff0c {
+   sdmmc: mmc@ff0c {
compatible = "rockchip,rk3288-dw-mshc";
max-frequency = <15000>;
clocks = < HCLK_SDMMC>, < SCLK_SDMMC>,
 < SCLK_SDMMC_DRV>, < SCLK_SDMMC_SAMPLE>;
-   clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+   clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = ;
reg = <0xff0c 0x4000>;
status = "disabled";
};
 
-   sdio0: dwmmc@ff0d {
+   sdio0: mmc@ff0d {
compatible = "rockchip,rk3288-dw-mshc";
max-frequency = <15000>;
clocks = < HCLK_SDIO0>, < SCLK_SDIO0>,
 < SCLK_SDIO0_DRV>, < SCLK_SDIO0_SAMPLE>;
-   clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+   clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = ;
reg = <0xff0d 0x4000>;
status = "disabled";
};
 
-   sdio1: dwmmc@ff0e {
+   sdio1: mmc@ff0e {
compatible = "rockchip,rk3288-dw-mshc";
max-frequency = <15000>;
clocks = < HCLK_SDIO1>, < SCLK_SDIO1>,
 < SCLK_SDIO1_DRV>, < SCLK_SDIO1_SAMPLE>;
-   clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+   clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = ;
reg = <0xff0e 0x4000>;
status = "disabled";
};
 
-   emmc: dwmmc@ff0f {
+   emmc: mmc@ff0f {
compatible = "rockchip,rk3288-dw-mshc";
max-frequency = <15000>;
clocks = < HCLK_EMMC>, < SCLK_EMMC>,
 < SCLK_EMMC_DRV>, < SCLK_EMMC_SAMPLE>;
-   clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+   clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = ;
reg = <0xff0f 0x4000>;
-- 
2.20.1

Re: [PATCH 1/2] misc: i2c_eeprom: add support for microchip 24aa025e48

2022-05-02 Thread Michael Walle

> 24aa025e48 is a variant of 24aa02e48 that has a page size of 16 bytes.
> 
> Signed-off-by: Eugen Hristev 
> ---
>  drivers/misc/i2c_eeprom.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
> index 89a450d0f8..265c1d0591 100644
> --- a/drivers/misc/i2c_eeprom.c
> +++ b/drivers/misc/i2c_eeprom.c
> @@ -176,6 +176,13 @@ static const struct i2c_eeprom_drv_data mc24aa02e48_data 
> = {
>   .offset_len = 1,
>  };
>  
> +static const struct i2c_eeprom_drv_data mc24aa025e48_data = {
> + .size = 256,
> + .pagesize = 16,
> + .addr_offset_mask = 0,
> + .offset_len = 1,
> +};
> +
>  static const struct i2c_eeprom_drv_data atmel24c01a_data = {
>   .size = 128,
>   .pagesize = 8,
> @@ -264,6 +271,7 @@ static const struct i2c_eeprom_drv_data atmel24c512_data 
> = {
>  static const struct udevice_id i2c_eeprom_std_ids[] = {
>   { .compatible = "i2c-eeprom", (ulong)_data },
>   { .compatible = "microchip,24aa02e48", (ulong)_data },
> + { .compatible = "microchip,24aa025e48", (ulong)_data },

As far as I can see, this is not a documented compatible string in the
device tree bindings, which means u-boot is diverting again from its linux
counterpart. (The same goes for the 24aa02e48).

-michael

>   { .compatible = "atmel,24c01", (ulong)_data },
>   { .compatible = "atmel,24c01a", (ulong)_data },
>   { .compatible = "atmel,24c02", (ulong)_data },

[PATCH v1] arm: dts: rockchip: rk3288: bulk convert gpios to their constant counterparts

Bulk convert rk3288 DT gpios to their constant counterparts.

Partial Linux sync for the rk3288.dtsi file.

ARM: dts: rockchip: bulk convert gpios to their constant counterparts
https://lore.kernel.org/all/20190402121852.14442-1-he...@sntech.de/

sed -i -f script.sed rk3288.dtsi



/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/
---
 arch/arm/dts/rk3288.dtsi | 274 +++
 1 file changed, 137 insertions(+), 137 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index c4abfa37..5e40e741 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1072,411 +1072,411 @@
 
sleep {
global_pwroff: global-pwroff {
-   rockchip,pins = <0 0 RK_FUNC_1 _pull_none>;
+   rockchip,pins = <0 RK_PA0 1 _pull_none>;
};
 
ddrio_pwroff: ddrio-pwroff {
-   rockchip,pins = <0 1 RK_FUNC_1 _pull_none>;
+   rockchip,pins = <0 RK_PA1 1 _pull_none>;
};
 
ddr0_retention: ddr0-retention {
-   rockchip,pins = <0 2 RK_FUNC_1 _pull_up>;
+   rockchip,pins = <0 RK_PA2 1 _pull_up>;
};
 
ddr1_retention: ddr1-retention {
-   rockchip,pins = <0 3 RK_FUNC_1 _pull_up>;
+   rockchip,pins = <0 RK_PA3 1 _pull_up>;
};
};
 
i2c0 {
i2c0_xfer: i2c0-xfer {
-   rockchip,pins = <0 15 RK_FUNC_1 
_pull_none>,
-   <0 16 RK_FUNC_1 
_pull_none>;
+   rockchip,pins = <0 RK_PB7 1 _pull_none>,
+   <0 RK_PC0 1 _pull_none>;
};
};
 
i2c1 {
i2c1_xfer: i2c1-xfer {
-   rockchip,pins = <8 4 RK_FUNC_1 _pull_none>,
-   <8 5 RK_FUNC_1 _pull_none>;
+   rockchip,pins = <8 RK_PA4 1 _pull_none>,
+   <8 RK_PA5 1 _pull_none>;
};
};
 
i2c2 {
i2c2_xfer: i2c2-xfer {
-   rockchip,pins = <6 9 RK_FUNC_1 _pull_none>,
-   <6 10 RK_FUNC_1 
_pull_none>;
+   rockchip,pins = <6 RK_PB1 1 _pull_none>,
+   <6 RK_PB2 1 _pull_none>;
};
};
 
i2c3 {
i2c3_xfer: i2c3-xfer {
-   rockchip,pins = <2 16 RK_FUNC_1 
_pull_none>,
-   <2 17 RK_FUNC_1 
_pull_none>;
+   rockchip,pins = <2 RK_PC0 1 _pull_none>,
+   <2 RK_PC1 1 _pull_none>;
};
};
 
i2c4 {
i2c4_xfer: i2c4-xfer {
-   rockchip,pins = <7 17 RK_FUNC_1 
_pull_none>,
-   <7 18 RK_FUNC_1 
_pull_none>;
+   rockchip,pins = <7 RK_PC1 1 _pull_none>,
+   <7 RK_PC2 1 _pull_none>;
};
};
 
i2c5 {
i2c5_xfer: i2c5-xfer {
-   rockchip,pins = <7 19 RK_FUNC_1 
_pull_none>,
-   <7 20 RK_FUNC_1 
_pull_none>;
+   rockchip,pins = <7 RK_PC3 1 _pull_none>,
+   <7 RK_PC4 1 _pull_none>;
};
};
 
i2s0 {
i2s0_bus: i2s0-bus {
-   rockchip,pins = <6 0 RK_FUNC_1 _pull_none>,
-   <6 1 RK_FUNC_1 _pull_none>,
-   <6 2 RK_FUNC_1 _pull_none>,
-   <6 3 RK_FUNC_1 _pull_none>,
-   <6 4 RK_FUNC_1 _pull_none>,
-   <6 8 RK_FUNC_1 _pull_none>;
+   rockchip,pins = <6 RK_PA0 1 _pull_none>,
+   <6 RK_PA1 1 _pull_none>,
+   <6 RK_PA2 1 _pull_none>,
+

Re: [PATCH 2/2] ARM: stm32: Use CONFIG_TFTP_TSIZE on DHSOM

2022-05-02 Thread Patrick DELAUNAY


Hi,

On 5/1/22 18:43, Marek Vasut wrote:

Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.

Signed-off-by: Marek Vasut 
Cc: Patrick Delaunay 
Cc: Patrice Chotard 
Cc: Ramon Fried 
---
  configs/stm32mp15_dhcom_basic_defconfig | 1 +
  configs/stm32mp15_dhcor_basic_defconfig | 1 +
  2 files changed, 2 insertions(+)

diff --git a/configs/stm32mp15_dhcom_basic_defconfig 
b/configs/stm32mp15_dhcom_basic_defconfig
index 0ff015cae49..7f7aecf2510 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -80,6 +80,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_SPL_ENV_IS_NOWHERE=y
  CONFIG_NET_RANDOM_ETHADDR=y
  CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_TSIZE=y
  CONFIG_STM32_ADC=y
  CONFIG_SPL_BLOCK_CACHE=y
  CONFIG_DFU_MMC=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig 
b/configs/stm32mp15_dhcor_basic_defconfig
index 83614b9fc8e..35e43a9a2fc 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -77,6 +77,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_SPL_ENV_IS_NOWHERE=y
  CONFIG_NET_RANDOM_ETHADDR=y
  CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_TSIZE=y
  CONFIG_STM32_ADC=y
  CONFIG_SPL_BLOCK_CACHE=y
  CONFIG_DFU_MMC=y



Reviewed-by: Patrick Delaunay 

Thanks
Patrick

Re: [PATCH 1/2] ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM

2022-05-02 Thread Patrick DELAUNAY


Hi Marek,

On 5/1/22 18:43, Marek Vasut wrote:

The DHCOM does ship with KS8851 with 1.5 kiB packet buffer. The DHSOM
may be extended with other MAC options connected to FMC2 bus, like the
DM9000, wih similar limitations. Use default CONFIG_TFTP_BLOCKSIZE of
1468 Bytes instead of 1536 Bytes, which always avoids overflowing the
packet buffers of such limited MACs, which leads to e.g. TFTP timeouts.
This also avoids receiving a short packet fragment at the end of each
TFTP block, which led to reduced performance.

Signed-off-by: Marek Vasut 
Cc: Patrick Delaunay 
Cc: Patrice Chotard 
Cc: Ramon Fried 
---
  configs/stm32mp15_dhcom_basic_defconfig | 1 -
  configs/stm32mp15_dhcor_basic_defconfig | 1 -
  2 files changed, 2 deletions(-)

diff --git a/configs/stm32mp15_dhcom_basic_defconfig 
b/configs/stm32mp15_dhcom_basic_defconfig
index ec955eae200..0ff015cae49 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -80,7 +80,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_SPL_ENV_IS_NOWHERE=y
  CONFIG_NET_RANDOM_ETHADDR=y
  CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=1536
  CONFIG_STM32_ADC=y
  CONFIG_SPL_BLOCK_CACHE=y
  CONFIG_DFU_MMC=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig 
b/configs/stm32mp15_dhcor_basic_defconfig
index 387e068155e..83614b9fc8e 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -77,7 +77,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_SPL_ENV_IS_NOWHERE=y
  CONFIG_NET_RANDOM_ETHADDR=y
  CONFIG_IP_DEFRAG=y
-CONFIG_TFTP_BLOCKSIZE=1536
  CONFIG_STM32_ADC=y
  CONFIG_SPL_BLOCK_CACHE=y
  CONFIG_DFU_MMC=y




Reviewed-by: Patrick Delaunay 

Thanks
Patrick

Re: [PATCH u-boot-marvell 13/19] net: mvneta: Don't check for CONFIG_PHYLIB


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Drop checking for CONFIG_PHYLIB in mvneta, this is already done in
Kconfig.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 4 
  1 file changed, 4 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 5c3f7125b5..0ec9d2957c 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -40,10 +40,6 @@
  
  DECLARE_GLOBAL_DATA_PTR;
  
-#if !defined(CONFIG_PHYLIB)

-# error Marvell mvneta requires PHYLIB
-#endif
-
  #define CONFIG_NR_CPUS1
  #define ETH_HLEN  14  /* Total octets in header */
  


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 19/19] net: mvneta: Drop unneeded macro


On 27.04.22 12:42, Marek Behún wrote:

From: Marek Behún 

Macro MVNETA_GMAC_FORCE_LINK_UP can be dropped from value assignment in
fixed link case, since it's value is written into the register later in
the function for link-down-to-link-up case. The value is written as
MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS, and so the
macro definition can also be dropped.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 292c364e5e..d2c42c4396 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -188,7 +188,6 @@ DECLARE_GLOBAL_DATA_PTR;
  #define MVNETA_GMAC_AUTONEG_CONFIG   0x2c0c
  #define  MVNETA_GMAC_FORCE_LINK_DOWN BIT(0)
  #define  MVNETA_GMAC_FORCE_LINK_PASS BIT(1)
-#define  MVNETA_GMAC_FORCE_LINK_UP   (BIT(0) | BIT(1))
  #define  MVNETA_GMAC_IB_BYPASS_AN_EN BIT(3)
  #define  MVNETA_GMAC_CONFIG_MII_SPEEDBIT(5)
  #define  MVNETA_GMAC_CONFIG_GMII_SPEED   BIT(6)
@@ -1175,8 +1174,7 @@ static void mvneta_adjust_link(struct udevice *dev)
 */
if (CONFIG_IS_ENABLED(PHY_FIXED) &&
pp->phydev->phy_id == PHY_FIXED_ID)
-   val = MVNETA_GMAC_FORCE_LINK_UP |
- MVNETA_GMAC_IB_BYPASS_AN_EN |
+   val = MVNETA_GMAC_IB_BYPASS_AN_EN |
  MVNETA_GMAC_SET_FC_EN |
  MVNETA_GMAC_ADVERT_FC_EN |
  MVNETA_GMAC_SAMPLE_TX_CFG_EN;


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 18/19] net: mvneta: Disable fixed PHY code if PHY_FIXED is not compiled in


On 27.04.22 12:42, Marek Behún wrote:

From: Marek Behún 

Guard the code handling the fixed PHY case by
CONFIG_IS_ENABLED(PHY_FIXED).

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 6 --
  1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 378789b632..292c364e5e 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -812,7 +812,8 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
mvreg_write(pp, MVNETA_SDMA_CONFIG, val);
  
  	/* Enable PHY polling in hardware if not in fixed-link mode */

-   if (pp->phydev->phy_id != PHY_FIXED_ID) {
+   if (!CONFIG_IS_ENABLED(PHY_FIXED) ||
+   pp->phydev->phy_id != PHY_FIXED_ID) {
mvreg_write(pp, MVNETA_PHY_ADDR, pp->phydev->addr);
  
  		val = mvreg_read(pp, MVNETA_UNIT_CONTROL);

@@ -1172,7 +1173,8 @@ static void mvneta_adjust_link(struct udevice *dev)
 * be added). Also, why is ADVERT_FC enabled if we don't enable
 * inband AN at all?
 */
-   if (pp->phydev->phy_id == PHY_FIXED_ID)
+   if (CONFIG_IS_ENABLED(PHY_FIXED) &&
+   pp->phydev->phy_id == PHY_FIXED_ID)
val = MVNETA_GMAC_FORCE_LINK_UP |
  MVNETA_GMAC_IB_BYPASS_AN_EN |
  MVNETA_GMAC_SET_FC_EN |


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 16/19] net: mvneta: Write PHY address just before enabling HW polling


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Write PHY address just before enabling HW polling of the PHY.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 6 ++
  1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 5b1c4fe5fc..4917857681 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -814,6 +814,8 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
  
  	/* Enable PHY polling in hardware if not in fixed-link mode */

if (!pp->fixed_link) {
+   mvreg_write(pp, MVNETA_PHY_ADDR, pp->phydev->addr);
+
val = mvreg_read(pp, MVNETA_UNIT_CONTROL);
val |= MVNETA_PHY_POLLING_ENABLE;
mvreg_write(pp, MVNETA_UNIT_CONTROL, val);
@@ -1431,10 +1433,6 @@ static int mvneta_start(struct udevice *dev)
  
  		pp->fixed_link = phydev->phy_id == PHY_FIXED_ID;
  
-		/* Set PHY address in case we will enable HW polling */

-   if (!pp->fixed_link)
-   mvreg_write(pp, MVNETA_PHY_ADDR, phydev->addr);
-
pp->phydev = phydev;
phy_config(phydev);
phy_startup(phydev);


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 17/19] net: mvneta: Drop fixed_link member from private struct


On 27.04.22 12:42, Marek Behún wrote:

From: Marek Behún 

Since this member is checked only at two places drop it and inline it's
usage.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 7 ++-
  1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 4917857681..378789b632 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -273,7 +273,6 @@ struct mvneta_port {
u16 rx_ring_size;
  
  	phy_interface_t phy_interface;

-   bool fixed_link;
unsigned int link;
unsigned int duplex;
unsigned int speed;
@@ -813,7 +812,7 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
mvreg_write(pp, MVNETA_SDMA_CONFIG, val);
  
  	/* Enable PHY polling in hardware if not in fixed-link mode */

-   if (!pp->fixed_link) {
+   if (pp->phydev->phy_id != PHY_FIXED_ID) {
mvreg_write(pp, MVNETA_PHY_ADDR, pp->phydev->addr);
  
  		val = mvreg_read(pp, MVNETA_UNIT_CONTROL);

@@ -1173,7 +1172,7 @@ static void mvneta_adjust_link(struct udevice *dev)
 * be added). Also, why is ADVERT_FC enabled if we don't enable
 * inband AN at all?
 */
-   if (pp->fixed_link)
+   if (pp->phydev->phy_id == PHY_FIXED_ID)
val = MVNETA_GMAC_FORCE_LINK_UP |
  MVNETA_GMAC_IB_BYPASS_AN_EN |
  MVNETA_GMAC_SET_FC_EN |
@@ -1431,8 +1430,6 @@ static int mvneta_start(struct udevice *dev)
return -ENODEV;
}
  
-		pp->fixed_link = phydev->phy_id == PHY_FIXED_ID;

-
pp->phydev = phydev;
phy_config(phydev);
phy_startup(phydev);


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 15/19] net: mvneta: Convert to use PHY_FIXED for fixed-link


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Stop parsing fixed-link in the MAC driver. Instead support only PHY mode
and let the fixed PHY driver handle the fixed-link case.

Enable CONFIG_PHY_FIXED for mvneta boards that need it: Turris Omnia and
ESPRESSObin.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  configs/mvebu_espressobin-88f3720_defconfig |  1 +
  configs/turris_omnia_defconfig  |  1 +
  drivers/net/mvneta.c| 98 -
  3 files changed, 39 insertions(+), 61 deletions(-)

diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
b/configs/mvebu_espressobin-88f3720_defconfig
index 37e4fdc41e..8d7d57ff1b 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -74,6 +74,7 @@ CONFIG_SPI_FLASH_STMICRO=y
  CONFIG_SPI_FLASH_WINBOND=y
  CONFIG_SPI_FLASH_MTD=y
  CONFIG_PHY_MARVELL=y
+CONFIG_PHY_FIXED=y
  CONFIG_PHY_GIGE=y
  CONFIG_E1000=y
  CONFIG_MVNETA=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 6b218bd7a7..bdd70f2ba7 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -79,6 +79,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
  CONFIG_SPI_FLASH_SPANSION=y
  CONFIG_SPI_FLASH_MTD=y
  CONFIG_PHY_MARVELL=y
+CONFIG_PHY_FIXED=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 519e06ff01..5b1c4fe5fc 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -1152,11 +1152,6 @@ static void mvneta_adjust_link(struct udevice *dev)
struct phy_device *phydev = pp->phydev;
bool status_change = false;
  
-	if (pp->fixed_link) {

-   debug("Using fixed link, skip link adjust\n");
-   return;
-   }
-
if (phydev->link &&
(pp->speed != phydev->speed || pp->duplex != phydev->duplex)) {
u32 val;
@@ -1168,6 +1163,21 @@ static void mvneta_adjust_link(struct udevice *dev)
 MVNETA_GMAC_AN_SPEED_EN |
 MVNETA_GMAC_AN_DUPLEX_EN);
  
+		/* FIXME: For fixed-link case, these were the initial settings

+* used before the code was converted to use PHY_FIXED. Some of
+* these may look nonsensical (for example BYPASS_AN makes sense
+* for 1000base-x and 2500base-x modes, AFAIK), and in fact this
+* may be changed in the future (when support for inband AN will
+* be added). Also, why is ADVERT_FC enabled if we don't enable
+* inband AN at all?
+*/
+   if (pp->fixed_link)
+   val = MVNETA_GMAC_FORCE_LINK_UP |
+ MVNETA_GMAC_IB_BYPASS_AN_EN |
+ MVNETA_GMAC_SET_FC_EN |
+ MVNETA_GMAC_ADVERT_FC_EN |
+ MVNETA_GMAC_SAMPLE_TX_CFG_EN;
+
if (phydev->duplex)
val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
  
@@ -1413,56 +1423,34 @@ static int mvneta_start(struct udevice *dev)

mvneta_port_power_up(pp, pp->phy_interface);
  
  	if (!pp->init || pp->link == 0) {

-   if (pp->fixed_link) {
-   u32 val;
-
-   pp->init = 1;
-   pp->link = 1;
-   mvneta_init(dev);
-
-   val = MVNETA_GMAC_FORCE_LINK_UP |
- MVNETA_GMAC_IB_BYPASS_AN_EN |
- MVNETA_GMAC_SET_FC_EN |
- MVNETA_GMAC_ADVERT_FC_EN |
- MVNETA_GMAC_SAMPLE_TX_CFG_EN;
-
-   if (pp->duplex)
-   val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
-
-   if (pp->speed == SPEED_1000)
-   val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
-   else if (pp->speed == SPEED_100)
-   val |= MVNETA_GMAC_CONFIG_MII_SPEED;
+   phydev = dm_eth_phy_connect(dev);
+   if (!phydev) {
+   printf("dm_eth_phy_connect failed\n");
+   return -ENODEV;
+   }
  
-			mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);

-   } else {
-   phydev = dm_eth_phy_connect(dev);
-   if (!phydev) {
-   printf("dm_eth_phy_connect failed\n");
-   return -ENODEV;
-   }
+   pp->fixed_link = phydev->phy_id == PHY_FIXED_ID;
  
-			/* Set PHY address in case we will enable HW polling */

+   /* Set PHY address in case we will enable HW polling */
+   if (!pp->fixed_link)
mvreg_write(pp, MVNETA_PHY_ADDR, phydev->addr);
  
-			pp->phydev = phydev;

-

Re: [PATCH u-boot-marvell 14/19] net: mvneta: Rename CONFIG_NR_CPUS to MVNETA_NR_CPUS


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

The CONFIG_* macros are reserved for Kconfig. This was probably done
when this driver was being imported from Linux. Rename the macro.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 0ec9d2957c..519e06ff01 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -40,7 +40,7 @@
  
  DECLARE_GLOBAL_DATA_PTR;
  
-#define CONFIG_NR_CPUS		1

+#define MVNETA_NR_CPUS 1
  #define ETH_HLEN  14  /* Total octets in header */
  
  /* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */

@@ -770,7 +770,7 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
/* Set CPU queue access map - all CPUs have access to all RX
 * queues and to all TX queues
 */
-   for (cpu = 0; cpu < CONFIG_NR_CPUS; cpu++)
+   for (cpu = 0; cpu < MVNETA_NR_CPUS; cpu++)
mvreg_write(pp, MVNETA_CPU_MAP(cpu),
(MVNETA_CPU_RXQ_ACCESS_ALL_MASK |
 MVNETA_CPU_TXQ_ACCESS_ALL_MASK));


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 12/19] net: mvneta: Drop unnecessary space


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Drop unnecessary space in mvneta_adjust_link().

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 7d582c1206..5c3f7125b5 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -1183,7 +1183,7 @@ static void mvneta_adjust_link(struct udevice *dev)
mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
  
  		pp->duplex = phydev->duplex;

-   pp->speed  = phydev->speed;
+   pp->speed = phydev->speed;
}
  
  	if (phydev->link != pp->link) {


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 11/19] net: mvneta: Use bool instead of int for boolean variable


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Use the bool type instead of int for status_change variable.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 66d5e10174..7d582c1206 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -1154,7 +1154,7 @@ static void mvneta_adjust_link(struct udevice *dev)
  {
struct mvneta_port *pp = dev_get_priv(dev);
struct phy_device *phydev = pp->phydev;
-   int status_change = 0;
+   bool status_change = false;
  
  	if (pp->fixed_link) {

debug("Using fixed link, skip link adjust\n");
@@ -1193,7 +1193,7 @@ static void mvneta_adjust_link(struct udevice *dev)
}
  
  		pp->link = phydev->link;

-   status_change = 1;
+   status_change = true;
}
  
  	if (status_change) {


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 10/19] net: mvneta: Drop one indentation level in mvneta_adjust_link()


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Drop one indentation level in the mvneta_adjust_link() function.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 38 ++
  1 file changed, 18 insertions(+), 20 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 72789fc5c6..66d5e10174 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -1161,31 +1161,29 @@ static void mvneta_adjust_link(struct udevice *dev)
return;
}
  
-	if (phydev->link) {

-   if ((pp->speed != phydev->speed) ||
-   (pp->duplex != phydev->duplex)) {
-   u32 val;
+   if (phydev->link &&
+   (pp->speed != phydev->speed || pp->duplex != phydev->duplex)) {
+   u32 val;
  
-			val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);

-   val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED |
-MVNETA_GMAC_CONFIG_GMII_SPEED |
-MVNETA_GMAC_CONFIG_FULL_DUPLEX |
-MVNETA_GMAC_AN_SPEED_EN |
-MVNETA_GMAC_AN_DUPLEX_EN);
+   val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
+   val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED |
+MVNETA_GMAC_CONFIG_GMII_SPEED |
+MVNETA_GMAC_CONFIG_FULL_DUPLEX |
+MVNETA_GMAC_AN_SPEED_EN |
+MVNETA_GMAC_AN_DUPLEX_EN);
  
-			if (phydev->duplex)

-   val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
+   if (phydev->duplex)
+   val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
  
-			if (phydev->speed == SPEED_1000)

-   val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
-   else if (pp->speed == SPEED_100)
-   val |= MVNETA_GMAC_CONFIG_MII_SPEED;
+   if (phydev->speed == SPEED_1000)
+   val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
+   else if (pp->speed == SPEED_100)
+   val |= MVNETA_GMAC_CONFIG_MII_SPEED;
  
-			mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);

+   mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
  
-			pp->duplex = phydev->duplex;

-   pp->speed  = phydev->speed;
-   }
+   pp->duplex = phydev->duplex;
+   pp->speed  = phydev->speed;
}
  
  	if (phydev->link != pp->link) {


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 09/19] net: mvneta: Fix unused variable warning if DM_GPIO is disabled


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

The `ret` variable in mvneta_probe() is unused if DM_GPIO is disabled.

Since the variable is used only once after assigning value, we can
inline the usage and drop the variable.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 5 ++---
  1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 19f8145fc0..72789fc5c6 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -1570,7 +1570,6 @@ static int mvneta_probe(struct udevice *dev)
int node = dev_of_offset(dev);
void *bd_space;
int fl_node;
-   int ret;
  
  	/*

 * Allocate buffer area for descs and rx_buffers. This is only
@@ -1617,8 +1616,8 @@ static int mvneta_probe(struct udevice *dev)
}
  
  #if CONFIG_IS_ENABLED(DM_GPIO)

-   ret = dev_read_phandle_with_args(dev, "sfp", NULL, 0, 0, _args);
-   if (!ret && ofnode_is_enabled(sfp_args.node))
+   if (!dev_read_phandle_with_args(dev, "sfp", NULL, 0, 0, _args) &&
+   ofnode_is_enabled(sfp_args.node))
gpio_request_by_name_nodev(sfp_args.node, "tx-disable-gpio", 0,
   >sfp_tx_disable_gpio, 
GPIOD_IS_OUT);
  


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 08/19] net: mvneta: Don't register MDIO bus


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

This MDIO bus is now handled by a proper mvmdio DM driver. Remove it
from mvneta.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 143 +--
  1 file changed, 2 insertions(+), 141 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 83e9629138..19f8145fc0 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -288,7 +288,6 @@ struct mvneta_port {
struct gpio_desc phy_reset_gpio;
struct gpio_desc sfp_tx_disable_gpio;
  #endif
-   struct mii_dev *bus;
  };
  
  /* The mvneta_tx_desc and mvneta_rx_desc structures describe the

@@ -414,15 +413,6 @@ static struct buffer_location buffer_loc;
   */
  #define BD_SPACE  (1 << 20)
  
-/*

- * Dummy implementation that can be overwritten by a board
- * specific function
- */
-__weak int board_network_enable(struct mii_dev *bus)
-{
-   return 0;
-}
-
  /* Utility/helper methods */
  
  /* Write helper method */

@@ -1421,118 +1411,6 @@ static int mvneta_init(struct udevice *dev)
  
  /* U-Boot only functions follow here */
  
-/* SMI / MDIO functions */

-
-static int smi_wait_ready(struct mvneta_port *pp)
-{
-   u32 timeout = MVNETA_SMI_TIMEOUT;
-   u32 smi_reg;
-
-   /* wait till the SMI is not busy */
-   do {
-   /* read smi register */
-   smi_reg = mvreg_read(pp, MVNETA_SMI);
-   if (timeout-- == 0) {
-   printf("Error: SMI busy timeout\n");
-   return -EFAULT;
-   }
-   } while (smi_reg & MVNETA_SMI_BUSY);
-
-   return 0;
-}
-
-/*
- * mvneta_mdio_read - miiphy_read callback function.
- *
- * Returns 16bit phy register value, or 0x on error
- */
-static int mvneta_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
-{
-   struct mvneta_port *pp = bus->priv;
-   u32 smi_reg;
-   u32 timeout;
-
-   /* check parameters */
-   if (addr > MVNETA_PHY_ADDR_MASK) {
-   printf("Error: Invalid PHY address %d\n", addr);
-   return -EFAULT;
-   }
-
-   if (reg > MVNETA_PHY_REG_MASK) {
-   printf("Err: Invalid register offset %d\n", reg);
-   return -EFAULT;
-   }
-
-   /* wait till the SMI is not busy */
-   if (smi_wait_ready(pp) < 0)
-   return -EFAULT;
-
-   /* fill the phy address and regiser offset and read opcode */
-   smi_reg = (addr << MVNETA_SMI_DEV_ADDR_OFFS)
-   | (reg << MVNETA_SMI_REG_ADDR_OFFS)
-   | MVNETA_SMI_OPCODE_READ;
-
-   /* write the smi register */
-   mvreg_write(pp, MVNETA_SMI, smi_reg);
-
-   /* wait till read value is ready */
-   timeout = MVNETA_SMI_TIMEOUT;
-
-   do {
-   /* read smi register */
-   smi_reg = mvreg_read(pp, MVNETA_SMI);
-   if (timeout-- == 0) {
-   printf("Err: SMI read ready timeout\n");
-   return -EFAULT;
-   }
-   } while (!(smi_reg & MVNETA_SMI_READ_VALID));
-
-   /* Wait for the data to update in the SMI register */
-   for (timeout = 0; timeout < MVNETA_SMI_TIMEOUT; timeout++)
-   ;
-
-   return mvreg_read(pp, MVNETA_SMI) & MVNETA_SMI_DATA_MASK;
-}
-
-/*
- * mvneta_mdio_write - miiphy_write callback function.
- *
- * Returns 0 if write succeed, -EINVAL on bad parameters
- * -ETIME on timeout
- */
-static int mvneta_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
-u16 value)
-{
-   struct mvneta_port *pp = bus->priv;
-   u32 smi_reg;
-
-   /* check parameters */
-   if (addr > MVNETA_PHY_ADDR_MASK) {
-   printf("Error: Invalid PHY address %d\n", addr);
-   return -EFAULT;
-   }
-
-   if (reg > MVNETA_PHY_REG_MASK) {
-   printf("Err: Invalid register offset %d\n", reg);
-   return -EFAULT;
-   }
-
-   /* wait till the SMI is not busy */
-   if (smi_wait_ready(pp) < 0)
-   return -EFAULT;
-
-   /* fill the phy addr and reg offset and write opcode and data */
-   smi_reg = value << MVNETA_SMI_DATA_OFFS;
-   smi_reg |= (addr << MVNETA_SMI_DEV_ADDR_OFFS)
-   | (reg << MVNETA_SMI_REG_ADDR_OFFS);
-   smi_reg &= ~MVNETA_SMI_OPCODE_READ;
-
-   /* write the smi register */
-   mvreg_write(pp, MVNETA_SMI, smi_reg);
-
-   return 0;
-}
-
  static int mvneta_start(struct udevice *dev)
  {
struct mvneta_port *pp = dev_get_priv(dev);
@@ -1690,10 +1568,9 @@ static int mvneta_probe(struct udevice *dev)
  #endif
void *blob = (void *)gd->fdt_blob;
int node = dev_of_offset(dev);
-   struct mii_dev *bus;
void *bd_space;
-   int ret;
int fl_node;
+   int ret;
  
  	/*

 * Allocate buffer area for descs and

Re: [PATCH u-boot-marvell 06/19] net: mdio-uclass: add dm_phy_find_by_ofnode() helper


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Add helper to resolve PHY node from it's ofnode via DM MDIO subsystem.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  include/miiphy.h  |  9 +
  net/mdio-uclass.c | 22 ++
  2 files changed, 31 insertions(+)

diff --git a/include/miiphy.h b/include/miiphy.h
index 110921f20d..c66a1845b5 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -188,6 +188,15 @@ int dm_mdio_write(struct udevice *mdio_dev, int addr, int 
devad, int reg, u16 va
   */
  int dm_mdio_reset(struct udevice *mdio_dev);
  
+/**

+ * dm_phy_find_by_ofnode - Find PHY device by ofnode
+ *
+ * @phynode: PHY's ofnode
+ *
+ * Return: pointer to phy_device, or NULL on error
+ */
+struct phy_device *dm_phy_find_by_ofnode(ofnode phynode);
+
  /**
   * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
   *
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 7593618d9a..4401492ca0 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -129,6 +129,28 @@ static int dm_mdio_pre_remove(struct udevice *dev)
return 0;
  }
  
+struct phy_device *dm_phy_find_by_ofnode(ofnode phynode)

+{
+   struct mdio_perdev_priv *pdata;
+   struct udevice *mdiodev;
+   u32 phy_addr;
+
+   if (ofnode_read_u32(phynode, "reg", _addr))
+   return NULL;
+
+   if (uclass_get_device_by_ofnode(UCLASS_MDIO,
+   ofnode_get_parent(phynode),
+   ))
+   return NULL;
+
+   if (device_probe(mdiodev))
+   return NULL;
+
+   pdata = dev_get_uclass_priv(mdiodev);
+
+   return phy_find_by_mask(pdata->mii_bus, BIT(phy_addr));
+}
+
  struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface)


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 07/19] arm: mvebu: turris_mox: Use DM registered MDIO


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, start using the DM registered one in Turris MOX board
code.

This also allows us to drop the hack introduced in MOX' -u-boot.dtsi
file.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  .../dts/armada-3720-turris-mox-u-boot.dtsi| 19 
  board/CZ.NIC/turris_mox/turris_mox.c  | 88 +--
  2 files changed, 44 insertions(+), 63 deletions(-)

diff --git a/arch/arm/dts/armada-3720-turris-mox-u-boot.dtsi 
b/arch/arm/dts/armada-3720-turris-mox-u-boot.dtsi
index 28a36a6103..71d5e70ca4 100644
--- a/arch/arm/dts/armada-3720-turris-mox-u-boot.dtsi
+++ b/arch/arm/dts/armada-3720-turris-mox-u-boot.dtsi
@@ -3,25 +3,6 @@
   * 2022 by Marek Behún 
   */
  
-/ {

-   mdio {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   old_binding_phy1: ethernet-phy@1 {
-   reg = <1>;
-   };
-   };
-};
-
- {
-   pinctrl-0 = <_pins>, <_pins>;
-   /delete-property/ phy-handle;
-   phy = <_binding_phy1>;
-};
-
-/delete-node/ 
-
   {
vbus-supply = <_usb3_vbus>;
  };
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c 
b/board/CZ.NIC/turris_mox/turris_mox.c
index 9702d1fc78..a4738b3a3c 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -13,6 +13,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -216,35 +217,35 @@ static int mox_get_topology(const u8 **ptopology, int 
*psize, int *pis_sd)
  #define SW_SMI_CMD_R(d, r)(0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
  #define SW_SMI_CMD_W(d, r)(0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
  
-static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)

+static int sw_multi_read(struct udevice *bus, int sw, int dev, int reg)
  {
-   bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
+   dm_mdio_write(bus, sw, MDIO_DEVAD_NONE, 0, SW_SMI_CMD_R(dev, reg));
mdelay(5);
-   return bus->read(bus, sw, 0, 1);
+   return dm_mdio_read(bus, sw, MDIO_DEVAD_NONE, 1);
  }
  
-static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,

+static void sw_multi_write(struct udevice *bus, int sw, int dev, int reg,
   u16 val)
  {
-   bus->write(bus, sw, 0, 1, val);
-   bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
+   dm_mdio_write(bus, sw, MDIO_DEVAD_NONE, 1, val);
+   dm_mdio_write(bus, sw, MDIO_DEVAD_NONE, 0, SW_SMI_CMD_W(dev, reg));
mdelay(5);
  }
  
-static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)

+static int sw_scratch_read(struct udevice *bus, int sw, int reg)
  {
sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
  }
  
-static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,

+static void sw_led_write(struct udevice *bus, int sw, int port, int reg,
 u16 val)
  {
sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
| (val & 0x7ff));
  }
  
-static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)

+static void sw_blink_leds(struct udevice *bus, int peridot, int topaz)
  {
int i, p;
struct {
@@ -275,7 +276,7 @@ static void sw_blink_leds(struct mii_dev *bus, int peridot, 
int topaz)
}
  }
  
-static void check_switch_address(struct mii_dev *bus, int addr)

+static void check_switch_address(struct udevice *bus, int addr)
  {
if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
printf("Check of switch MDIO address failed for 0x%02x\n",
@@ -374,36 +375,22 @@ static void mox_phy_modify(struct phy_device *phydev, int 
page, int reg,
  static void mox_phy_leds_start_blinking(void)
  {
struct phy_device *phydev;
-   struct mii_dev *bus;
-   const char *node_name;
-   int node;
+   ofnode phy_node;
  
-	node = fdt_path_offset(gd->fdt_blob, "ethernet0");

-   if (node < 0) {
-   printf("Cannot get eth0!\n");
-   return;
-   }
+   phy_node = ofnode_get_phy_node(ofnode_path("ethernet0"));
+   if (!ofnode_valid(phy_node))
+   goto err;
  
-	node_name = fdt_get_name(gd->fdt_blob, node, NULL);

-   if (!node_name) {
-   printf("Cannot get eth0 node name!\n");
-   return;
-   }
-
-   bus = miiphy_get_dev_by_name(node_name);
-   if (!bus) {
-   printf("Cannot get MDIO bus device!\n");
-   return;
-   }
-
-   phydev = phy_find_by_mask(bus, BIT(1));
-   if (!phydev) {
-   printf("Cannot get ethernet PHY!\n");
-   return;
-   }
+   phydev = dm_phy_find_by_ofnode(phy_node);
+   if (!phydev)
+

Re: [PATCH u-boot-marvell 05/19] arm: mvebu: Espressobin: Use DM registered MDIO to configure switch


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, we need to stop using board_network_enable() and instead
use the DM registered MDIO device to configure switch in
last_stage_init().

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  board/Marvell/mvebu_armada-37xx/board.c | 26 -
  configs/mvebu_espressobin-88f3720_defconfig |  1 +
  2 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/board/Marvell/mvebu_armada-37xx/board.c 
b/board/Marvell/mvebu_armada-37xx/board.c
index 98e1b36d11..3e5e0a0b5c 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -11,6 +11,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -254,14 +255,15 @@ int board_xhci_enable(fdt_addr_t base)
return 0;
  }
  
+#ifdef CONFIG_LAST_STAGE_INIT

  /* Helper function for accessing switch devices in multi-chip connection mode 
*/
-static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
+static int mii_multi_chip_mode_write(struct udevice *bus, int dev_smi_addr,
 int smi_addr, int reg, u16 value)
  {
u16 smi_cmd = 0;
  
-	if (bus->write(bus, dev_smi_addr, 0,

-  MVEBU_SW_SMI_DATA_REG, value) != 0) {
+   if (dm_mdio_write(bus, dev_smi_addr, MDIO_DEVAD_NONE,
+ MVEBU_SW_SMI_DATA_REG, value) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
   smi_addr, reg);
return -EFAULT;
@@ -272,8 +274,8 @@ static int mii_multi_chip_mode_write(struct mii_dev *bus, 
int dev_smi_addr,
  (1 << SW_SMI_CMD_SMI_OP_OFF) |
  (smi_addr << SW_SMI_CMD_DEV_ADDR_OFF) |
  (reg << SW_SMI_CMD_REG_ADDR_OFF);
-   if (bus->write(bus, dev_smi_addr, 0,
-  MVEBU_SW_SMI_CMD_REG, smi_cmd) != 0) {
+   if (dm_mdio_write(bus, dev_smi_addr, MDIO_DEVAD_NONE,
+ MVEBU_SW_SMI_CMD_REG, smi_cmd) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
   smi_addr, reg);
return -EFAULT;
@@ -283,11 +285,22 @@ static int mii_multi_chip_mode_write(struct mii_dev *bus, 
int dev_smi_addr,
  }
  
  /* Bring-up board-specific network stuff */

-int board_network_enable(struct mii_dev *bus)
+int last_stage_init(void)
  {
+   struct udevice *bus;
+   ofnode node;
+
if (!of_machine_is_compatible("globalscale,espressobin"))
return 0;
  
+	node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");

+   if (!ofnode_valid(node) ||
+   uclass_get_device_by_ofnode(UCLASS_MDIO, node, ) ||
+   device_probe(bus)) {
+   printf("Cannot find MDIO bus\n");
+   return 0;
+   }
+
/*
 * FIXME: remove this code once Topaz driver gets available
 * A3720 Community Board Only
@@ -327,6 +340,7 @@ int board_network_enable(struct mii_dev *bus)
  
  	return 0;

  }
+#endif
  
  #ifdef CONFIG_OF_BOARD_SETUP

  int ft_board_setup(void *blob, struct bd_info *bd)
diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
b/configs/mvebu_espressobin-88f3720_defconfig
index af30f1b363..37e4fdc41e 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -25,6 +25,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_ARCH_EARLY_INIT_R=y
  CONFIG_BOARD_EARLY_INIT_F=y
  CONFIG_BOARD_LATE_INIT=y
+CONFIG_LAST_STAGE_INIT=y
  # CONFIG_CMD_FLASH is not set
  CONFIG_CMD_FUSE=y
  CONFIG_CMD_GPIO=y


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 04/19] net: mvneta: Remember fixed link instead of PHY address in priv data


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

We don't need to remember PHY address anymore, because since using DM
MDIO for connecting PHY, the address is parsed by mdio-uclass from
the ofnode.

But the driver uses a special value of the address to signal fixed link
usage.

Drop phyaddr add fixed_link in driver private structure. This simplifies
code a little.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 23 +--
  1 file changed, 5 insertions(+), 18 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 24a491dcde..83e9629138 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -277,12 +277,12 @@ struct mvneta_port {
u16 rx_ring_size;
  
  	phy_interface_t phy_interface;

+   bool fixed_link;
unsigned int link;
unsigned int duplex;
unsigned int speed;
  
  	int init;

-   int phyaddr;
struct phy_device *phydev;
  #if CONFIG_IS_ENABLED(DM_GPIO)
struct gpio_desc phy_reset_gpio;
@@ -576,13 +576,6 @@ static void mvneta_rxq_buf_size_set(struct mvneta_port *pp,
mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), val);
  }
  
-static int mvneta_port_is_fixed_link(struct mvneta_port *pp)

-{
-   /* phy_addr is set to invalid value for fixed link */
-   return pp->phyaddr > PHY_MAX_ADDR;
-}
-
-
  /* Start the Ethernet port RX and TX activity */
  static void mvneta_port_up(struct mvneta_port *pp)
  {
@@ -834,7 +827,7 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
mvreg_write(pp, MVNETA_SDMA_CONFIG, val);
  
  	/* Enable PHY polling in hardware if not in fixed-link mode */

-   if (!mvneta_port_is_fixed_link(pp)) {
+   if (!pp->fixed_link) {
val = mvreg_read(pp, MVNETA_UNIT_CONTROL);
val |= MVNETA_PHY_POLLING_ENABLE;
mvreg_write(pp, MVNETA_UNIT_CONTROL, val);
@@ -1173,7 +1166,7 @@ static void mvneta_adjust_link(struct udevice *dev)
struct phy_device *phydev = pp->phydev;
int status_change = 0;
  
-	if (mvneta_port_is_fixed_link(pp)) {

+   if (pp->fixed_link) {
debug("Using fixed link, skip link adjust\n");
return;
}
@@ -1548,7 +1541,7 @@ static int mvneta_start(struct udevice *dev)
mvneta_port_power_up(pp, pp->phy_interface);
  
  	if (!pp->init || pp->link == 0) {

-   if (mvneta_port_is_fixed_link(pp)) {
+   if (pp->fixed_link) {
u32 val;
  
  			pp->init = 1;

@@ -1698,7 +1691,6 @@ static int mvneta_probe(struct udevice *dev)
void *blob = (void *)gd->fdt_blob;
int node = dev_of_offset(dev);
struct mii_dev *bus;
-   unsigned long addr;
void *bd_space;
int ret;
int fl_node;
@@ -1742,14 +1734,9 @@ static int mvneta_probe(struct udevice *dev)
fl_node = fdt_subnode_offset(blob, node, "fixed-link");
if (fl_node != -FDT_ERR_NOTFOUND) {
/* set phy_addr to invalid value for fixed link */
-   pp->phyaddr = PHY_MAX_ADDR + 1;
pp->duplex = fdtdec_get_bool(blob, fl_node, "full-duplex");
pp->speed = fdtdec_get_int(blob, fl_node, "speed", 0);
-   } else {
-   /* Now read phyaddr from DT */
-   addr = fdtdec_get_int(blob, node, "phy", 0);
-   addr = fdt_node_offset_by_phandle(blob, addr);
-   pp->phyaddr = fdtdec_get_int(blob, addr, "reg", 0);
+   pp->fixed_link = true;
}
  
  	bus = mdio_alloc();


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 03/19] net: mvneta: Use DM MDIO API for connecting PHY


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

Use the modern DM MDIO API for connecting PHY in the mvneta driver.

This requires enabling MVMDIO driver in several config files.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  configs/clearfog_defconfig  |  1 +
  configs/controlcenterdc_defconfig   |  1 +
  configs/db-88f6820-amc_defconfig|  1 +
  configs/db-88f6820-gp_defconfig |  1 +
  configs/db-mv784mp-gp_defconfig |  1 +
  configs/ds414_defconfig |  1 +
  configs/helios4_defconfig   |  1 +
  configs/maxbcm_defconfig|  1 +
  configs/mvebu_espressobin-88f3720_defconfig |  1 +
  configs/theadorable_debug_defconfig |  1 +
  configs/turris_mox_defconfig|  1 +
  configs/turris_omnia_defconfig  |  1 +
  configs/uDPU_defconfig  |  1 +
  drivers/net/Kconfig |  1 +
  drivers/net/mvneta.c| 11 +--
  15 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 880f16a6e0..b8f59d2962 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -63,6 +63,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_PCI_MVEBU=y
  CONFIG_SCSI=y
diff --git a/configs/controlcenterdc_defconfig 
b/configs/controlcenterdc_defconfig
index d4b966b93f..df38b2c54f 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -77,6 +77,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_DM_PCI_COMPAT=y
  CONFIG_PCI_MVEBU=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index 46c822fccd..9b77b4a5f0 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -67,6 +67,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_PCI_MVEBU=y
  CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 2dcbc2f29a..f56d1fbf25 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -62,6 +62,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_PCI_MVEBU=y
  CONFIG_SCSI=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index f19cc54975..5683f11836 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -65,6 +65,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_PCI_MVEBU=y
  CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index a3279c15c5..a83fe079b3 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -65,6 +65,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_PCI_MVEBU=y
  CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index 7d812e8fab..c2130bacb4 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -63,6 +63,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_PCI_MVEBU=y
  CONFIG_SCSI=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 8dd6adf247..40f79d47ea 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -47,6 +47,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_DEBUG_UART_SHIFT=2
  CONFIG_SYS_NS16550=y
  CONFIG_KIRKWOOD_SPI=y
diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
b/configs/mvebu_espressobin-88f3720_defconfig
index ff05630d20..af30f1b363 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -76,6 +76,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_E1000=y
  CONFIG_MVNETA=y
+CONFIG_MVMDIO=y
  CONFIG_NVME_PCI=y
  CONFIG_PCI=y
  CONFIG_PCI_AARDVARK=y
diff --git a/configs/theadorable_debug_defconfig 
b/configs/theadorable_debug_defconfig
index 86129e7d2d..9a03a0a7a3 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -70,6 +70,7 @@ CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y
  CONFIG_MII=y
+CONFIG_MVMDIO=y
  CONFIG_PCI=y
  CONFIG_DM_PCI_COMPAT=y
  CONFIG_PCI_MVEBU=y
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index 9a76a118c2..bcd3699a4f 100644
--- a/configs/turris_mox_defconfig
+++ b/configs/turris_mox_defconfig
@@ -82,6 +82,7 @@ CONFIG_SPI_FLASH_MTD=y
  CONFIG_PHY_MARVELL=y
  CONFIG_PHY_GIGE=y
  CONFIG_MVNETA=y

Re: [PATCH 07/15] imx: imx8m[m/p]_phycore: Enable DM_SERIAL

2022-05-02 Thread Teresa Remmet

Hello Peng,

Am Samstag, dem 30.04.2022 um 20:43 +0800 schrieb Peng Fan (OSS):
> From: Peng Fan 
> 
> Enable CONFIG_DM_SERIAL. uart and its pinmux was already
> marked with u-boot,dm-spl.
> Move preloader_console_init after spl_early_init to make sure driver
> model work.

thank you for the patch.
Works for phyCORE-i.MX8MM and phyCORE-i.MX8MP.

Tested-by: Teresa Remmet 

Regards,
Teresa



> 
> Signed-off-by: Peng Fan 
> ---
>  board/phytec/phycore_imx8mm/spl.c | 12 ++--
>  board/phytec/phycore_imx8mp/spl.c |  8 
>  configs/phycore-imx8mm_defconfig  |  1 +
>  configs/phycore-imx8mp_defconfig  |  1 +
>  include/configs/phycore_imx8mm.h  |  3 ---
>  include/configs/phycore_imx8mp.h  |  3 ---
>  6 files changed, 4 insertions(+), 24 deletions(-)
> 
> diff --git a/board/phytec/phycore_imx8mm/spl.c
> b/board/phytec/phycore_imx8mm/spl.c
> index d54145ef995..7f24a3affc8 100644
> --- a/board/phytec/phycore_imx8mm/spl.c
> +++ b/board/phytec/phycore_imx8mm/spl.c
> @@ -57,14 +57,8 @@ int board_fit_config_name_match(const char *name)
>   return 0;
>  }
>  
> -#define UART_PAD_CTRL(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
>  #define WDOG_PAD_CTRL(PAD_CTL_DSE6 | PAD_CTL_ODE)
>  
> -static iomux_v3_cfg_t const uart_pads[] = {
> - IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
> - IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -};
> -
>  static iomux_v3_cfg_t const wdog_pads[] = {
>   IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  |
> MUX_PAD_CTRL(WDOG_PAD_CTRL),
>  };
> @@ -77,8 +71,6 @@ int board_early_init_f(void)
>  
>   set_wdog_reset(wdog);
>  
> - imx_iomux_v3_setup_multiple_pads(uart_pads,
> ARRAY_SIZE(uart_pads));
> -
>   return 0;
>  }
>  
> @@ -92,8 +84,6 @@ void board_init_f(ulong dummy)
>  
>   board_early_init_f();
>  
> - preloader_console_init();
> -
>   /* Clear the BSS. */
>   memset(__bss_start, 0, __bss_end - __bss_start);
>  
> @@ -103,6 +93,8 @@ void board_init_f(ulong dummy)
>   hang();
>   }
>  
> + preloader_console_init();
> +
>   enable_tzc380();
>  
>   /* DDR initialization */
> diff --git a/board/phytec/phycore_imx8mp/spl.c
> b/board/phytec/phycore_imx8mp/spl.c
> index 19c486e5517..38a581bef57 100644
> --- a/board/phytec/phycore_imx8mp/spl.c
> +++ b/board/phytec/phycore_imx8mp/spl.c
> @@ -89,14 +89,8 @@ int board_fit_config_name_match(const char *name)
>   return 0;
>  }
>  
> -#define UART_PAD_CTRL   (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
>  #define WDOG_PAD_CTRL   (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE |
> PAD_CTL_PE)
>  
> -static iomux_v3_cfg_t const uart_pads[] = {
> - MX8MP_PAD_UART1_RXD__UART1_DCE_RX |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> - MX8MP_PAD_UART1_TXD__UART1_DCE_TX |
> MUX_PAD_CTRL(UART_PAD_CTRL),
> -};
> -
>  static iomux_v3_cfg_t const wdog_pads[] = {
>   MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  |
> MUX_PAD_CTRL(WDOG_PAD_CTRL),
>  };
> @@ -109,8 +103,6 @@ int board_early_init_f(void)
>  
>   set_wdog_reset(wdog);
>  
> - imx_iomux_v3_setup_multiple_pads(uart_pads,
> ARRAY_SIZE(uart_pads));
> -
>   return 0;
>  }
>  
> diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-
> imx8mm_defconfig
> index ba5833f7060..9da222afc54 100644
> --- a/configs/phycore-imx8mm_defconfig
> +++ b/configs/phycore-imx8mm_defconfig
> @@ -107,6 +107,7 @@ CONFIG_PINCTRL_IMX8M=y
>  CONFIG_DM_REGULATOR=y
>  CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_DM_SERIAL=y
>  CONFIG_MXC_UART=y
>  CONFIG_SPI=y
>  CONFIG_DM_SPI=y
> diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-
> imx8mp_defconfig
> index 86d0f4df7f6..a851b1bdccb 100644
> --- a/configs/phycore-imx8mp_defconfig
> +++ b/configs/phycore-imx8mp_defconfig
> @@ -98,6 +98,7 @@ CONFIG_DM_REGULATOR=y
>  CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
>  CONFIG_SPL_POWER_I2C=y
> +CONFIG_DM_SERIAL=y
>  CONFIG_MXC_UART=y
>  CONFIG_SYSRESET=y
>  CONFIG_SPL_SYSRESET=y
> diff --git a/include/configs/phycore_imx8mm.h
> b/include/configs/phycore_imx8mm.h
> index 71f0c42ec0c..564b8125ba3 100644
> --- a/include/configs/phycore_imx8mm.h
> +++ b/include/configs/phycore_imx8mm.h
> @@ -83,9 +83,6 @@
>  #define PHYS_SDRAM   0x4000
>  #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
>  
> -/* UART */
> -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
> -
>  /* Monitor Command Prompt */
>  #define CONFIG_SYS_CBSIZESZ_2K
>  #define CONFIG_SYS_MAXARGS   64
> diff --git a/include/configs/phycore_imx8mp.h
> b/include/configs/phycore_imx8mp.h
> index 0c963b62b3b..3e4315f2b81 100644
> --- a/include/configs/phycore_imx8mp.h
> +++ b/include/configs/phycore_imx8mp.h
> @@ -83,9 +83,6 @@
>  #define PHYS_SDRAM   0x4000
>  #define PHYS_SDRAM_SIZE  0x8000
>  
> -/* UART */
> -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
> -
>  /* Monitor Command Prompt */
>  #define CONFIG_SYS_CBSIZE

Re: [PATCH u-boot-marvell 02/19] net: mvneta: Fix 10Mbps speed


On 27.04.22 12:41, Marek Behún wrote:

From: Marek Behún 

In mvneta_adjust_link() we need to set MII_SPEED bit only if PHY reports
the speed at 100Mbps.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan



---
  drivers/net/mvneta.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index d1c5f7930d..79cdb93341 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -1195,7 +1195,7 @@ static void mvneta_adjust_link(struct udevice *dev)
  
  			if (phydev->speed == SPEED_1000)

val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
-   else
+   else if (pp->speed == SPEED_100)
val |= MVNETA_GMAC_CONFIG_MII_SPEED;
  
  			mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH u-boot-marvell 01/19] net: mvneta: Get rid of platdata