RE: [PATCH] spi: cadence_ospi_versal: Reset ospi controller using reset driver api's

2022-07-20 Thread Soma, Ashok Reddy
Hi,

Please ignore this patch. I will send this as part of another patch series.

Thanks,
Ashok

-Original Message-
From: Ashok Reddy Soma  
Sent: Wednesday, July 20, 2022 3:36 PM
To: u-boot@lists.denx.de
Cc: ja...@amarulasolutions.com; Simek, Michal ; 
g...@xilinx.com; git (AMD-Xilinx) ; Reddy, T Karthik 
; Ashok Reddy Soma 
Subject: [PATCH] spi: cadence_ospi_versal: Reset ospi controller using reset 
driver api's

From: T Karthik Reddy 

Add a new function to reset the ospi controller. Use reset_assert, 
reset_deassert api's to reset the ospi controller. In mini U-Boot case as 
ZYNQMP_FIRMWARE config is disabled, reset the controller directly using 
register writes.

Signed-off-by: T Karthik Reddy 
Signed-off-by: Ashok Reddy Soma 
---

 arch/arm/mach-versal/include/mach/hardware.h |  1 +
 drivers/spi/cadence_ospi_versal.c| 29 
 drivers/spi/cadence_qspi.h   |  1 +
 3 files changed, 31 insertions(+)

diff --git a/arch/arm/mach-versal/include/mach/hardware.h 
b/arch/arm/mach-versal/include/mach/hardware.h
index 000af974e8..429765234f 100644
--- a/arch/arm/mach-versal/include/mach/hardware.h
+++ b/arch/arm/mach-versal/include/mach/hardware.h
@@ -61,6 +61,7 @@ struct rpu_regs {
 #define VERSAL_SLCR_BASEADDR   0xF106
 #define VERSAL_AXI_MUX_SEL (VERSAL_SLCR_BASEADDR + 0x504)
 #define VERSAL_OSPI_LINEAR_MODEBIT(1)
+#define VERSAL_OSPI_CTRL_RST   (VERSAL_CRP_BASEADDR + 0x304)
 
 struct crp_regs {
u32 reserved0[128];
diff --git a/drivers/spi/cadence_ospi_versal.c 
b/drivers/spi/cadence_ospi_versal.c
index 52bcad053f..a9c5daff20 100644
--- a/drivers/spi/cadence_ospi_versal.c
+++ b/drivers/spi/cadence_ospi_versal.c
@@ -127,6 +127,35 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct 
cadence_spi_plat *plat)
return 0;
 }
 
+int cadence_spi_versal_ctrl_reset(struct cadence_spi_priv *priv) {
+   int ret;
+
+   if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) {
+   /* Assert ospi controller */
+   ret = reset_assert(priv->resets->resets);
+   if (ret)
+   return ret;
+
+   udelay(10);
+
+   /* Deassert ospi controller */
+   ret = reset_deassert(priv->resets->resets);
+   if (ret)
+   return ret;
+   } else {
+   /* Assert ospi controller */
+   setbits_le32((u32 *)VERSAL_OSPI_CTRL_RST, 1);
+
+   udelay(10);
+
+   /* Deassert ospi controller */
+   clrbits_le32((u32 *)VERSAL_OSPI_CTRL_RST, 1);
+   }
+
+   return 0;
+}
+
 #if defined(CONFIG_DM_GPIO)
 int cadence_spi_versal_flash_reset(struct udevice *dev)  { diff --git 
a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 
c8d16bb0e4..3f5f45282d 100644
--- a/drivers/spi/cadence_qspi.h
+++ b/drivers/spi/cadence_qspi.h
@@ -285,5 +285,6 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct 
cadence_spi_plat *plat);  int cadence_qspi_apb_exec_flash_cmd(void *reg_base, 
unsigned int reg);  int cadence_qspi_versal_flash_reset(struct udevice *dev);  
void cadence_qspi_apb_enable_linear_mode(bool enable);
+int cadence_spi_versal_ctrl_reset(struct cadence_spi_priv *priv);
 
 #endif /* __CADENCE_QSPI_H__ */
--
2.17.1



[RFCv1] CI: Move to Ubuntu 2022.04 "Jammy" for CI base

2022-07-20 Thread Tom Rini
- We now have a new enough sbsigntools in the distro, stop building.
- Use the 20220531 tag for Jammy.
- Move to pygit2 1.9.2 (current version) as the old one doesn't build on
 "Jammy".
- Add the working directory to the list of safe directories for git.
- Adjust where we have "exit on error" set in some scripts due to
  pylibfdt needing to be updated for python distutils deprecation.
- Move to pytest 6.2.5 to address other issues.
- Cleanup Azure logic a little bit.

Signed-off-by: Tom Rini 
---
Note that in both CI cases, pylint and binman, etc, test jobs both fail
and need further investigation.
---
 .azure-pipelines.yml | 12 ++--
 .gitlab-ci.yml   | 10 --
 test/py/requirements.txt |  4 ++--
 tools/docker/Dockerfile  | 14 ++
 4 files changed, 18 insertions(+), 22 deletions(-)

diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index bc2b437bd999..f57ae92a200d 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -2,7 +2,7 @@ variables:
   windows_vm: windows-2019
   ubuntu_vm: ubuntu-18.04
   macos_vm: macOS-10.15
-  ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20220302-15Mar2022
+  ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20220531-13Jul2022
   # Add '-u 0' options for Azure pipelines, otherwise we get "permission
   # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
   # since our $(ci_runner_image) user is not root.
@@ -171,12 +171,10 @@ stages:
 steps:
   - script: |
   cat << EOF > build.sh
-  set -ex
-  cd ${WORK_DIR}
-  EOF
-  cat << "EOF" >> build.sh
+  cd $(work_dir)
   git config --global user.name "Azure Pipelines"
   git config --global user.email bmeng...@gmail.com
+  git config --global --add safe.directory $(work_dir)
   export USER=azure
   virtualenv -p /usr/bin/python3 /tmp/venv
   . /tmp/venv/bin/activate
@@ -185,6 +183,7 @@ stages:
   export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
   export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}
   ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w 
--board sandbox_spl
+  set -ex
   ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test
   ./tools/buildman/buildman -t
   ./tools/dtoc/dtoc -t
@@ -217,7 +216,7 @@ stages:
   options: $(container_option)
 steps:
   - script: |
-  cd ${WORK_DIR}
+  git config --global --add safe.directory $(work_dir)
   export USER=azure
   pip install -r test/py/requirements.txt
   pip install asteval pylint==2.12.2 pyopenssl
@@ -226,6 +225,7 @@ stages:
   echo "load-plugins=pylint.extensions.docparams" >> .pylintrc
   export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl
   ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w 
--board sandbox_spl
+  set -ex
   pylint --version
   export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
   make pylint_err
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f9cd41750791..5082ad7599c8 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -2,7 +2,7 @@
 
 # Grab our configured image.  The source for this is found at:
 # https://source.denx.de/u-boot/gitlab-ci-runner
-image: trini/u-boot-gitlab-ci-runner:focal-20220302-15Mar2022
+image: trini/u-boot-gitlab-ci-runner:jammy-20220531-13Jul2022
 
 # We run some tests in different order, to catch some failures quicker.
 stages:
@@ -199,15 +199,18 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
   script:
 - git config --global user.name "GitLab CI Runner";
   git config --global user.email tr...@konsulko.com;
+  git config --global --add safe.directory "${CI_PROJECT_DIR}";
   export USER=gitlab;
   virtualenv -p /usr/bin/python3 /tmp/venv;
   . /tmp/venv/bin/activate;
   pip install -r test/py/requirements.txt;
+  set +e
   export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl;
   export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
   export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
   ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w
 --board sandbox_spl;
+  set -e
   ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test;
   ./tools/buildman/buildman -t;
   ./tools/dtoc/dtoc -t;
@@ -224,14 +227,17 @@ Run tests for Nokia RX-51 (aka N900):
 Run pylint:
   stage: testsuites
   script:
+- git config --global --add safe.directory "${CI_PROJECT_DIR}"
 - pip install -r test/py/requirements.txt
 - pip install asteval pylint==2.12.2 pyopenssl
 - export PATH=${PATH}:~/.local/bin
 - echo "[MASTER]" >> .pylintrc
 - echo "load-plugins=pylint.extensions.docparams" >> .pylintrc
 - export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl
-- ./tools/buildman/buildman -T0 

Re: [PATCH 3/4] ARM: imx8: DH: Use common mac address functions

2022-07-20 Thread Marek Vasut

On 7/4/22 13:11, Philip Oberfichtner wrote:

To reduce code duplication, let the imx8 based DH boards use the common
code for setting up their mac addresses.

Signed-off-by: Philip Oberfichtner 


Tested-by: Marek Vasut 


Re: [PATCH 1/4] board: dhelectronics: Implement common mac address functions

2022-07-20 Thread Marek Vasut

On 7/4/22 13:11, Philip Oberfichtner wrote:

[...]


+++ b/board/dhelectronics/common/dh_common.c
@@ -0,0 +1,64 @@


[...]


+int dh_get_mac_from_eeprom(unsigned char *enetaddr, const char *alias)
+{
+   struct udevice *dev;
+   int ret, offset;
+
+   offset = fdt_path_offset(gd->fdt_blob, alias);
+   if (offset < 0) {
+   printf("%s: Path offset for %s not found! Error %d\n", 
__func__, alias, offset);


Use "ret = %d" instead of "Error %d" consistently with the rest of this 
function.



+   return offset;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, offset, );
+   if (ret) {
+   printf("%s: Cannot find EEPROM! ret =  %d\n", __func__, ret);


Two spaces between "ret =" and "%d"

[...]


Re: [PATCH 4/4] ARM: stm32: DH: Use common mac address functions

2022-07-20 Thread Marek Vasut

On 7/4/22 13:11, Philip Oberfichtner wrote:

To reduce code duplication, let the stm32 based DH boards use the common
code for setting up their mac addresses.

Signed-off-by: Philip Oberfichtner 


"MAC address" is written in capitals , please fix the lowercase 'mac' 
all over the place  and make it uppercase (except for function names, 
there is should stay lowercase).


Tested-by: Marek Vasut 


Re: [PATCH 2/4] ARM: imx6: DH: Use common mac address functions

2022-07-20 Thread Marek Vasut

On 7/4/22 13:11, Philip Oberfichtner wrote:

To reduce code duplication, let the imx6 based DH boards use the common
code for setting up their mac addresses.

Signed-off-by: Philip Oberfichtner 


Tested-by: Marek Vasut 


Re: [PATCH 01/19] video: Renname vbe.h to vesa.h

2022-07-20 Thread Bin Meng
Hi Simon,

On Thu, Jul 21, 2022 at 1:00 AM Simon Glass  wrote:
>
> We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename

typo: Verified

Is there a doc link to describe the Verified Boot for Embedded ? Just
want to make sure if this acronym is the correct one to replace
another existing and old VBE.

> the existing VBE (Vesa BIOS extensions) to allow this.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/lib/bios.c | 2 +-
>  arch/x86/lib/coreboot_table.c   | 2 +-
>  arch/x86/lib/fsp/fsp_graphics.c | 2 +-
>  cmd/elf.c   | 2 +-
>  drivers/bios_emulator/atibios.c | 2 +-
>  drivers/pci/pci_rom.c   | 2 +-
>  drivers/video/broadwell_igd.c   | 2 +-
>  drivers/video/coreboot.c| 2 +-
>  drivers/video/efi.c | 2 +-
>  drivers/video/ivybridge_igd.c   | 2 +-
>  drivers/video/vesa.c| 2 +-
>  include/{vbe.h => vesa.h}   | 4 ++--
>  lib/elf.c   | 2 +-
>  13 files changed, 14 insertions(+), 14 deletions(-)
>  rename include/{vbe.h => vesa.h} (98%)
>

Regards,
Bin


Re: [PATCH v2] Improve Windows build documentation

2022-07-20 Thread Bin Meng
On Wed, Jul 20, 2022 at 11:00 PM Martin Bonner
 wrote:
>
> I have recently build the u-boot tools on Windows and ran into
> difficulties.  This patch to the documentation would have avoided
> those difficulties.  Contentious points:
>
> * While I have run the document through a rst previewer, I haven't run
> the full test suite.  I know, I know, everyone thinks _they_ don't
> need to run the tests because reasons, but I think it's true this
> time.
> * I have removed the version numbers from the list of packages.  I
> don't think they are helpful, and are just maintenance overhead.  (I
> don't think I got those versions for example).
>
> I'd be grateful if @Bin Meng could review this, because `git blame`
> says the file I am changing is all his.
>
> No actual changes, but hopefully closer to the required formalities:
>

The above commit message should be completely rewritten. It should be
considered to formally describe what has changed in this commit,
something like:

Add missing dependencies to build U-Boot host tools on Windows. The
version number of the dependent packages are removed too as they may
not reflect their current version in the upstream MSYS2 distribution.

> Signed-off-by: Martin Bonner 
>

This patch format is not correct. It should contain a valid ---
followed by changes statistics.

You should use 'git format-patch' which should do this automatically for you.


> commit e3615603d919ab19fddbee4a68e8a37b91a75f3e (HEAD ->
> better-windows-build-doc)
> Author: Martin Bonner 
> Date:   Tue Jul 5 09:10:59 2022 +0100
>
> Tweak docs for building tools on Windows
>
> * Add three more modules that are required.
> * Remove the version numbers (because they are hard to keep in sync)
> * Add a pacman command line to install everything.
>
> diff --git a/doc/build/tools.rst b/doc/build/tools.rst
> index c06f915274..95f1246617 100644
> --- a/doc/build/tools.rst
> +++ b/doc/build/tools.rst
> @@ -24,14 +24,20 @@ you can use MSYS2, a software distro and building
> platform for Windows.
>  Download the MSYS2 installer from https://www.msys2.org. Make sure you have
>  installed all required packages below in order to build these host tools::
>
> -   * gcc (9.1.0)
> -   * make (4.2.1)
> -   * bison (3.4.2)
> -   * diffutils (3.7)
> -   * openssl-devel (1.1.1.d)
> -
> -Note the version numbers in these parentheses above are the package versions
> -at the time being when writing this document. The MSYS2 installer tested is
> +   * gcc
> +   * make
> +   * bison
> +   * diffutils
> +   * openssl-devel
> +   * flex
> +   * libgnutls-devel
> +   * libuuid-devel
> +
> +You probably want ``git`` as well.  You can install all these with::
> +
> +$ pacman -S gcc make bison diffutils openssl=devel flex

This one is missing. s/=/-

> libgnutls-devel libuuid-devel git
> +
> +The MSYS2 installer tested is
>  http://repo.msys2.org/distrib/x86_64/msys2-x86_64-20190524.exe.
>
>  There are 3 MSYS subsystems installed: MSYS2, MinGW32 and MinGW64. Each
>
> --

Regards,
Bin


How to create a bootable SPL for USB booting for the i.MX8M Mini

2022-07-20 Thread Patrick Boettcher
Hi list,

We are having some difficulties getting USB-boot (for a starter with
SPL) to work on a imx8mm.

Doing this is part of a debug-session for another problem, which is
worth mentioning, as it has been discussed on this list in
January/February 2022.

The original problem: we have a "complete" yocto-environment (kirkstone)
using meta-imx (and thus u-boot-imx 2022.04) where we are building a
booloader image without FIT. 

We patched the atf to assign the UART4 to the Cortex A53 because it is
this UART which is used as serial console.

The binary produced by imx-boot in this environment starts booting SPL
and when jumping to the ATF it hangs. 

Similar to what is seen here (some people from that thread are on CC,
sorry for the noise).

  
https://lore.kernel.org/all/20220203164637.GV7515@bill-the-cat/t/#r9071b8b65566bd68bd39ada6d5b6db6e78e034e5

We tried several things to understand what's happening, without
success. 

A next step is now to build a SPL with upstream u-boot 2022.07 using an
existing board (our board/dts-files are really not in good shape yet).
We started using the imx8mm-beacon and then tried imx8mm-cl-iot-gate,
when loading their SPL with uuu nothing is printed on the
serial-console.

Here are the steps we did to build and flash it:

- patch imx-atf-2.6 to liberate UART4 into the Cortex A53-domain
- build it and place the bl31.bin in uboot's source-tree
- download ddr-firmwares and put them to uboot's source-tree
- modify board/beacon/../spl.c to UART4 (pads and init_uart_clk(3))
- add FASTBOOT and USB_FUNCTION_FASTBOOT to its defconfig.
- make deconfig && make 
- run "uuu SDP: boot -f flash.bin"

uuu finds the devices and then says "Okay" but nothing happens on the
console and we think the board is not running anything.

The same uuu-command using the imx-boot-file from our yocto-env boots
the SPL and the console is showing something sane.


What did we miss? What are the steps in upstream u-boot to create a
board which can boot over SPL?

Thanks in advance for any help.

best regards,
--
Patrick.










u-boot 2022.04 for MCIMX6S7 board (TS-7970)

2022-07-20 Thread DataSelfService Srl
Hi,

while trying to port OEM u-boot (https://github.com/embeddedTS/u-boot) for
TS-7970 (https://www.embeddedts.com/products/TS-7970) to latest 2022.04, I
cannot get the init.S running.

Connecting GDB+JLink it appears at certain point the processor does not
execute:
```
0x17802200 : push{r3, lr}
```
properly and hang there. See attached gdb.txt: sp does not increments, not
`x/x $sp` shows any change in memory. Note: `mon memu32 0x93fe38=1` allows
you to write memory (and restore it: `mon memu32 0x93fe38=0`).

Also I traced all instructions executed by "orig" OEM delivered u-boot.imx
(based on v2015), and "new" one (attached). There is some diffs in IMX
ERRATAS (no impact: removing code from orig works fine); I noted new codes
`bl s_init` (from start.S) as `blx s_init`, while orig keeps the same. Not
sure why and what is the impact.

Any idea what the reason is and how to get this working?

Regards,
Andrea
Breakpoint 1, s_init () at arch/arm/mach-imx/mx6/soc.c:615
615 if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sll())
1: x/i $pc
=> 0x17802200 : push{r3, lr}
Dump of assembler code for function s_init:
=> 0x17802200 <+0>: push{r3, lr}
   0x17802202 <+2>: bl  0x17801e88 
   0x17802206 <+6>: ubfxr0, r0, #12, #9
   0x1780220a <+10>:cmp r0, #98 ; 0x62
   0x1780220c <+12>:beq.n   0x1780228e 
   0x1780220e <+14>:bl  0x17801e88 
   0x17802212 <+18>:ubfxr0, r0, #12, #9
   0x17802216 <+22>:cmp r0, #100; 0x64
   0x17802218 <+24>:beq.n   0x1780228e 
   0x1780221a <+26>:bl  0x17801e88 
   0x1780221e <+30>:ubfxr0, r0, #12, #9
   0x1780 <+34>:cmp r0, #101; 0x65
   0x17802224 <+36>:beq.n   0x1780228e 
   0x17802226 <+38>:bl  0x17801e88 
   0x1780222a <+42>:ubfxr0, r0, #12, #9
   0x1780222e <+46>:cmp r0, #107; 0x6b
   0x17802230 <+48>:beq.n   0x1780228e 
   0x17802232 <+50>:bl  0x17801e88 
   0x17802236 <+54>:ubfxr0, r0, #12, #9
   0x1780223a <+58>:cmp r0, #103; 0x67
   0x1780223c <+60>:beq.n   0x1780228e 
   0x1780223e <+62>:ldr r3, [pc, #120]  ; (0x178022b8 )
   0x17802240 <+64>:ldr r2, [r3, #24]
   0x17802242 <+66>:dmb sy
   0x17802246 <+70>:ubfxr3, r2, #21, #2
   0x1780224a <+74>:cmp r3, #2
   0x1780224c <+76>:ubfxr2, r2, #18, #2
   0x17802250 <+80>:beq.n   0x1780229a 
   0x17802252 <+82>:cmp r2, #2
   0x17802254 <+84>:beq.n   0x178022a4 
   0x17802256 <+86>:cmp r3, #1
   0x17802258 <+88>:beq.n   0x17802296 
   0x1780225a <+90>:cmp r2, #1
   0x1780225c <+92>:beq.n   0x17802296 
   0x1780225e <+94>:cmp r3, #3
   0x17802260 <+96>:ldr r3, [pc, #88]   ; (0x178022bc )
   0x17802262 <+98>:beq.n   0x17802268 
   0x17802264 <+100>:   cmp r2, #3
   0x17802266 <+102>:   bne.n   0x178022b0 
   0x17802268 <+104>:   dmb sy
   0x1780226c <+108>:   mov.w   r1, #2155905152 ; 0x80808080
   0x17802270 <+112>:   ldr r2, [pc, #76]   ; (0x178022c0 )
   0x17802272 <+114>:   str.w   r1, [r2, #244]  ; 0xf4
   0x17802276 <+118>:   dmb sy
   0x1780227a <+122>:   str.w   r3, [r2, #260]  ; 0x104
   0x1780227e <+126>:   dmb sy
   0x17802282 <+130>:   str.w   r1, [r2, #248]  ; 0xf8
   0x17802286 <+134>:   dmb sy
   0x1780228a <+138>:   str.w   r3, [r2, #264]  ; 0x108
   0x1780228e <+142>:   pop {r3, pc}
   0x17802290 <+144>:   mov.w   r3, #2147516416 ; 0x80008000
   0x17802294 <+148>:   b.n 0x17802264 
   0x17802296 <+150>:   ldr r3, [pc, #36]   ; (0x178022bc )
   0x17802298 <+152>:   b.n 0x17802268 
   0x1780229a <+154>:   cmp r2, #1
   0x1780229c <+156>:   bne.n   0x17802290 
   0x1780229e <+158>:   mov.w   r3, #2147516416 ; 0x80008000
   0x178022a2 <+162>:   b.n 0x17802268 
   0x178022a4 <+164>:   cmp r3, #1
   0x178022a6 <+166>:   beq.n   0x1780229e 
   0x178022a8 <+168>:   cmp r3, #3
   0x178022aa <+170>:   beq.n   0x1780229e 
   0x178022ac <+172>:   mov.w   r3, #2147516416 ; 0x80008000
   0x178022b0 <+176>:   orr.w   r3, r3, #8388608; 0x80
   0x178022b4 <+180>:   b.n 0x17802268 
   0x178022b6 <+182>:   nop
   0x178022b8 <+184>:   andeq   r4, r12, #0
   0x178022bc <+188>:   andhi   r8, r0, r0, lsl #1
   0x178022c0 <+192>:   andeq   r8, r12, #0
End of assembler dump.
r0 0x93ff209699104
r1 0x412fc09a  1093648538
r2 0x2a42
r3 0x2 2
r4 0xa 10
r5 0x17800320  394265376
r6 0x20d8000   34439168
r7 0x94148
r8 0x0 0
r9 0x93fe409698880
r100x0 0
r110x0 0
r120x0 0
sp 0x93fe380x93fe38
lr 0x17800668  

MVEBU A38x Regulator

2022-07-20 Thread Tony Dinh
Hi Pali/Marek,

I'm writing u-boot for the Synology DS116 (Armada 385, dual core, 1.8
Ghz). I could not seem to get the DM Regulator to power up the SATA
port on this board. I'm using Stefan ./board/Marvell/db-88f6820-gp as
the starting point, and using the latest DTS

https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/armada-385-synology-ds116.dts

I noticed that the Linux kernel boot log (booted with stock Marvell
u-boot) shows "supply ahci not found" error. But I can power up the
SATA drive in stock u-boot by poking GPIO 15 (SATA power enable). And
it works fine with this combination: stock u-boot, kernel 5.18.6.

[2.861061] usb_phy_generic usb3_0_phy: dummy supplies not allowed
for exclusive requests
[2.870173] usb_phy_generic usb3_1_phy: dummy supplies not allowed
for exclusive requests
[2.879296] ahci-mvebu f10a8000.sata: supply ahci not found, using
dummy regulator
[2.887704] ahci-mvebu f10a8000.sata: supply phy not found, using
dummy regulator
[2.896101] ahci-mvebu f10a8000.sata: masking port_map 0x3 -> 0x1
[2.902951] ahci-mvebu f10a8000.sata: AHCI 0001. 32 slots 2
ports 6 Gbps 0x1 impl platform mode
[2.912750] ahci-mvebu f10a8000.sata: flags: 64bit ncq sntf led
only pmp fbs pio slum part sxs
[2.923184] scsi host0: ahci-mvebu
[2.927693] scsi host1: ahci-mvebu
[2.931935] ata1: SATA max UDMA/133 mmio [mem
0xf10a8000-0xf10a9fff] port 0x100 irq 50
[2.940610] ata2: DUMMY

My questions: does DM regulator +  DM GPIO work for Armada 38x u-boot?
and is the error "ahci-mvebu f10a8000.sata: supply ahci, using dummy
regulator" a real error? I've googled this and came across some past
related posts from you (Pali and Marek), but it is not apparent what
was the solution.

If you are interested in seeing more info while I'm at my new u-boot
prompt (kwboot with the SPL kwb), I can post that followup.

Thanks,
Tony


Re: [PATCH] drivers: xen: events: fix build issues with disabled Xen HVC

2022-07-20 Thread Nastya Vicodin
Reviewed-by: Anastasiia Lukianenko 

On Mon, Jul 4, 2022 at 3:05 PM Dmytro Firsov  wrote:

> Some setups do not use Xen hypervisor console for logging, e.g. they
> use emulated PL011 hardware or shared peripherals (real UART). In such
> cases Xen HVC will be disabled on a build time and will cause issues in
> current driver implementation.
>
> This commit fixes build issues in Xen event channel driver, caused
> by absense of console event channel, that is not available when console
> config is disabled. Now console related code will be removed when
> Xen HVC is turned off.
>
> Signed-off-by: Dmytro Firsov 
> ---
>  drivers/xen/events.c | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/xen/events.c b/drivers/xen/events.c
> index 5e90a65846..532216fece 100644
> --- a/drivers/xen/events.c
> +++ b/drivers/xen/events.c
> @@ -23,7 +23,9 @@
>  #include 
>  #include 
>
> +#if CONFIG_IS_ENABLED(XEN_SERIAL)
>  extern u32 console_evtchn;
> +#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */
>
>  #define NR_EVS 1024
>
> @@ -51,8 +53,11 @@ void unbind_all_ports(void)
> struct vcpu_info *vcpu_info = >vcpu_info[cpu];
>
> for (i = 0; i < NR_EVS; i++) {
> +#if CONFIG_IS_ENABLED(XEN_SERIAL)
> if (i == console_evtchn)
> continue;
> +#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */
> +
> if (test_and_clear_bit(i, bound_ports)) {
> printf("port %d still bound!\n", i);
> unbind_evtchn(i);
> --
> 2.25.1
>


Re: Please pull u-boot-ubi

2022-07-20 Thread Tom Rini
On Wed, Jul 20, 2022 at 09:02:41AM +0200, Heiko Schocher wrote:

> Hello Tom,
> 
> please pull from:
> 
> The following changes since commit fc97ff2695d6d7fbea7d5fda7b080f405d6ee744:
> 
>   Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi (2022-07-19 
> 10:52:15 -0400)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-ubi.git for-v2022.10
> 
> for you to fetch changes up to e2e6caa01ba97bcdb82100c6b928b5743e3aae6c:
> 
>   ubifs: Use U-Boot assert() from  in UBI/UBIFS code (2022-07-20 
> 05:50:13 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 10/19] buildman: Incorporate the genboardscfg.py tool

2022-07-20 Thread Tom Rini
On Wed, Jul 20, 2022 at 09:01:04AM -0600, Simon Glass wrote:
> Hi Tom,
> 
> On Mon, 18 Jul 2022 at 06:11, Tom Rini  wrote:
> >
> > On Thu, Jul 14, 2022 at 04:21:57AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 13 Jul 2022 at 12:21, Tom Rini  wrote:
> > > >
> > > > On Wed, Jul 13, 2022 at 09:28:06AM -0600, Simon Glass wrote:
> > > > > Hi Tom,
> > > > >
> > > > > On Tue, 12 Jul 2022 at 15:38, Tom Rini  wrote:
> > > > > >
> > > > > > On Mon, Jul 11, 2022 at 07:04:04PM -0600, Simon Glass wrote:
> > > > > > > Bring this tool into buildman, so we don't have to run it 
> > > > > > > separately. The
> > > > > > > board.cfg file is still produced as part of the build, to save 
> > > > > > > time when
> > > > > > > doing another build in the same working directory. If it is out 
> > > > > > > of date
> > > > > > > with respect to the Kconfig, it is updated.
> > > > > > >
> > > > > > > Time to regenerate on a recent single-thread machine is 4.6s 
> > > > > > > (1.3s on a
> > > > > > > 32-thread machine), so we do need some sort of cache if we want 
> > > > > > > buildman
> > > > > > > to be useful on incremental builds. We could use Python's pickle 
> > > > > > > format
> > > > > > > but:
> > > > > > >
> > > > > > > - it seems useful to allow boards.cfg to be regenerated, at least 
> > > > > > > for a
> > > > > > >   while, in case other tools use it
> > > > > > > - it is possible to grep the file easily, e.g. to find boards 
> > > > > > > which use
> > > > > > >   a particular SoC (similar to 'buildman -nv '
> > > > > >
> > > > > > While I don't think other tools still use boards.cfg, this will 
> > > > > > make it
> > > > > > easier to find out that I'm wrong.  Perhaps once the CONFIG to 
> > > > > > Kconfig
> > > > > > migration is done we can move to just pickle'ing the data or similar
> > > > > > since I find the main use of what was in boards.cfg can be figured 
> > > > > > out
> > > > > > with some other git grep'ing, and in turn that's mainly for me when
> > > > > > trying to convert stuff.  Thanks for doing this.
> > > > >
> > > > > Yes. I'm excited to hear that Kconfig migration might be done - any
> > > > > forecast as to when?
> > > >
> > > > Not yet.  I'm auditing CONFIG_SYS_* now, with a notion to move
> > > > everything that's not really configurable just out of CONFIG namespace
> > > > as the starting point.  That'll drop us down to ~500 to migrate, which
> > > > feels a bit less daunting.
> > > >
> > > > > One thing we could to is provide an option for buildman to spit out
> > > > > the various fields that go into boards.cfg
> > > >
> > > > Right.  So I might not have said this before, but one reason I wanted
> > > > buildman to natively know kconfiglib and have everything was that while
> > > > we can do a lot of good matching on what to build, it would be amazingly
> > > > good to be able to say "build every platform with NVME_PCI set" (and if
> > > > it's not too hard hex/int options with a specific value).
> > >
> > > Ah OK. At present moveconfig has the functionality to list the boards
> > > that have particular options (-b and -f). It is expensive to build the
> > > database though - over a minute on a 32-thread machine. So we would
> > > have to cache it. Also just about any change would invalidate the
> > > cache and I'm not sure if it possible to detect which changes have no
> > > effect on which cache entries...
> >
> > Ah, maybe it will take some more thinking about then.  Maybe an
> > "advanced" match option, and also seeing how to have Azure generate the db
> > in one job and pass it as an artifact to every other job in the world
> > build stage.  Not an immediate need.
> 
> Well I suppose having that logic in moveconfig doesn't make a lot of
> sense. So we could move it to buildman and have a way of creating the
> database, as you say. But bear in mind that every commit being built
> has the potential to change the Kconfig. It may be possible to hash
> the files or detect changes using timestamps.

Yeah, we can revisit this later on down the line.  I don't think (and we
don't do it today either, fwiw) we need to ensure the list of boards to
build is right for each step of the commit, and might even be
counter-productive, at least for my use case.  Build the list of boards
on top of tree, tell me how it changed over N commits (which commit
caused the size change) is how I use things.  Then the CI case is only
for top of tree anyhow.

-- 
Tom


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Re: [PATCH v2] drivers: xen: unmap Enlighten page before jumping to Linux

2022-07-20 Thread Nastya Vicodin
Reviewed-by: Anastasiia Lukianenko 

On Tue, Jul 19, 2022 at 5:55 PM Dmytro Firsov 
wrote:

> This commit fixes issue with usage of Xen hypervisor shared info page.
> Previously U-boot did not unmap it at the end of OS boot process. Xen
> did not prevent guest from this. So, it worked, but caused wierd
> issues - one memory page, that was returned by memalign in U-boot
> for Enlighten mapping was not unmaped by Xen (shared_info values was
> not removed from there) and returned to allocator. During the Linux
> boot, it uses shared_info page as regular RAM page, which leads to
> hypervisor shared info corruption.
>
> So, to fix this issue, as discussed on the xen-devel mailing list, the
> code should:
>1) Unmap the page
>2) Populate the area with memory using XENMEM_populate_physmap
>
> This patch adds page unmapping via XENMEM_remove_from_physmap, fills
> hole in address space where page was mapped via XENMEM_populate_physmap
> and return this address to memory allocator for freeing.
>
> Signed-off-by: Dmytro Firsov 
> ---
>
> Changes in v2:
> - Reword commit message to be more clear with purpose of the patch
> - Change BUG() helper to panic() and add error messages
> - Add struct zeroing during initialization
> - Fix typo in comment
> ---
>  drivers/xen/hypervisor.c | 31 +++
>  1 file changed, 31 insertions(+)
>
> diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c
> index 2560894832..16c7c96c94 100644
> --- a/drivers/xen/hypervisor.c
> +++ b/drivers/xen/hypervisor.c
> @@ -144,6 +144,36 @@ struct shared_info *map_shared_info(void *p)
> return HYPERVISOR_shared_info;
>  }
>
> +void unmap_shared_info(void)
> +{
> +   xen_pfn_t shared_info_pfn = virt_to_pfn(HYPERVISOR_shared_info);
> +   struct xen_remove_from_physmap xrfp = {0};
> +   struct xen_memory_reservation reservation = {0};
> +   xen_ulong_t nr_exts = 1;
> +
> +   xrfp.domid = DOMID_SELF;
> +   xrfp.gpfn = shared_info_pfn;
> +   if (HYPERVISOR_memory_op(XENMEM_remove_from_physmap, ) != 0)
> +   panic("Failed to unmap HYPERVISOR_shared_info\n");
> +
> +   /*
> +* After removing from physmap there will be a hole in address
> space on
> +* HYPERVISOR_shared_info address, so to free memory allocated with
> +* memalign and prevent exceptions during access to this page we
> need to
> +* fill this 4KB hole with XENMEM_populate_physmap before jumping
> to Linux.
> +*/
> +   reservation.domid = DOMID_SELF;
> +   reservation.extent_order = 0;
> +   reservation.address_bits = 0;
> +   set_xen_guest_handle(reservation.extent_start, _info_pfn);
> +   reservation.nr_extents = nr_exts;
> +   if (HYPERVISOR_memory_op(XENMEM_populate_physmap, ) !=
> nr_exts)
> +   panic("Failed to populate memory on HYPERVISOR_shared_info
> addr\n");
> +
> +   /* Now we can return this to memory allocator */
> +   free(HYPERVISOR_shared_info);
> +}
> +
>  void do_hypervisor_callback(struct pt_regs *regs)
>  {
> unsigned long l1, l2, l1i, l2i;
> @@ -251,4 +281,5 @@ void xen_fini(void)
> fini_gnttab();
> fini_xenbus();
> fini_events();
> +   unmap_shared_info();
>  }
> --
> 2.25.1
>


[PATCH 19/19] vbe: Add a new vbe command

2022-07-20 Thread Simon Glass
Add a command to look at VBE methods and their status. Provide a test for
all of this as well.

Signed-off-by: Simon Glass 
---

 arch/sandbox/dts/sandbox.dtsi |  13 
 arch/sandbox/dts/test.dts |  15 +
 cmd/Kconfig   |  10 +++
 cmd/Makefile  |   1 +
 cmd/vbe.c |  87 +
 test/boot/Makefile|   4 ++
 test/boot/bootflow.c  |  53 ++--
 test/boot/bootmeth.c  |  11 ++--
 test/boot/vbe_simple.c| 115 ++
 9 files changed, 285 insertions(+), 24 deletions(-)
 create mode 100644 cmd/vbe.c
 create mode 100644 test/boot/vbe_simple.c

diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index aa22b8765c8..56e6b38bfa7 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -12,6 +12,19 @@
 
chosen {
stdout-path = "/serial";
+
+   fwupd {
+   compatible = "simple-bus";
+   firmware {
+   compatible = "fwupd,vbe-simple";
+   cur-version = "1.2.3";
+   bootloader-version = "2022.01";
+   storage = "mmc1";
+   area-start = <0x0>;
+   area-size = <0x100>;
+   skip-offset = <0x8000>;
+   };
+   };
};
 
audio: audio-codec {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 0194b9b30ef..2cd5abbcfe2 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1378,6 +1378,21 @@
compatible = "denx,u-boot-fdt-test";
reg = <9 1>;
};
+
+   fwupd {
+   compatible = "simple-bus";
+   firmware0 {
+   compatible = "fwupd,vbe-simple";
+   storage = "mmc1";
+   area-start = <0x400>;
+   area-size = <0x1000>;
+   skip-offset = <0x200>;
+   state-offset = <0x400>;
+   state-size = <0x40>;
+   version-offset = <0x800>;
+   version-size = <0x100>;
+   };
+   };
};
 
translation-test@8000 {
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d5f842136cf..321a612c54c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -328,6 +328,16 @@ config BOOTM_RTEMS
help
  Support booting RTEMS images via the bootm command.
 
+config CMD_VBE
+   bool "vbe - Verified Boot for Embedded"
+   depends on BOOTMETH_VBE
+   default y
+   help
+ Provides various subcommands related to VBE, such as listing the
+ available methods, looking at the state and changing which method
+ is used to boot. Updating the parameters is not currently
+ supported.
+
 config BOOTM_VXWORKS
bool "Support booting VxWorks OS images"
depends on CMD_BOOTM
diff --git a/cmd/Makefile b/cmd/Makefile
index 5e43a1e022e..6e87522b62e 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -179,6 +179,7 @@ obj-$(CONFIG_CMD_FS_UUID) += fs_uuid.o
 obj-$(CONFIG_CMD_USB_MASS_STORAGE) += usb_mass_storage.o
 obj-$(CONFIG_CMD_USB_SDP) += usb_gadget_sdp.o
 obj-$(CONFIG_CMD_THOR_DOWNLOAD) += thordown.o
+obj-$(CONFIG_CMD_VBE) += vbe.o
 obj-$(CONFIG_CMD_XIMG) += ximg.o
 obj-$(CONFIG_CMD_YAFFS2) += yaffs2.o
 obj-$(CONFIG_CMD_SPL) += spl.o
diff --git a/cmd/vbe.c b/cmd/vbe.c
new file mode 100644
index 000..a5737edc047
--- /dev/null
+++ b/cmd/vbe.c
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Verified Boot for Embedded (VBE) command
+ *
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int do_vbe_list(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   vbe_list();
+
+   return 0;
+}
+
+static int do_vbe_select(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+   struct bootstd_priv *std;
+   struct udevice *dev;
+   int ret;
+
+   ret = bootstd_get_priv();
+   if (ret)
+   return CMD_RET_FAILURE;
+   if (argc < 2) {
+   std->vbe_bootmeth = NULL;
+   return 0;
+   }
+   if (vbe_find_by_any(argv[1], ))
+   return CMD_RET_FAILURE;
+
+   std->vbe_bootmeth = dev;
+
+   return 0;
+}
+
+static int do_vbe_info(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   struct bootstd_priv *std;
+   char buf[256];
+   int ret, len;
+
+   ret = bootstd_get_priv();
+ 

[PATCH 18/19] vbe: Support VBE simple

2022-07-20 Thread Simon Glass
Add support for VBE simple, which permits firmware update of a single
image stored in MMC or another block device.

Signed-off-by: Simon Glass 
---

 boot/Kconfig |  12 ++
 boot/Makefile|   1 +
 boot/vbe_simple.c| 304 +++
 test/py/tests/test_event_dump.py |   2 +-
 4 files changed, 318 insertions(+), 1 deletion(-)
 create mode 100644 boot/vbe_simple.c

diff --git a/boot/Kconfig b/boot/Kconfig
index 2bda221a68e..4a42b1b410a 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -394,6 +394,18 @@ config BOOTMETH_VBE
  supports selection of various firmware components, seleciton of an OS 
to
  boot as well as updating these using fwupd.
 
+if BOOTMETH_VBE
+
+config BOOTMETH_VBE_SIMPLE
+   bool "Bootdev support for VBE 'simple' method"
+   default y
+   help
+ Enables support for VBE 'simple' boot. This allows updating a single
+ firmware image in boot media such as MMC. It does not support any sort
+ of rollback, recovery or A/B boot.
+
+endif # BOOTMETH_VBE
+
 config BOOTMETH_SANDBOX
def_bool y
depends on SANDBOX
diff --git a/boot/Makefile b/boot/Makefile
index dd74bf5bc93..eef3ae223c0 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -49,3 +49,4 @@ obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE) += vbe.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE_SIMPLE) += vbe_simple.o
diff --git a/boot/vbe_simple.c b/boot/vbe_simple.c
new file mode 100644
index 000..7ba8778f2b2
--- /dev/null
+++ b/boot/vbe_simple.c
@@ -0,0 +1,304 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Verified Boot for Embedded (VBE) 'simple' method
+ *
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+enum {
+   MAX_VERSION_LEN = 256,
+
+   NVD_HDR_VER_SHIFT   = 0,
+   NVD_HDR_VER_MASK= 0xf,
+   NVD_HDR_SIZE_SHIFT  = 4,
+   NVD_HDR_SIZE_MASK   = 0xf << NVD_HDR_SIZE_SHIFT,
+
+   /* Firmware key-version is in the top 16 bits of fw_ver */
+   FWVER_KEY_SHIFT = 16,
+   FWVER_FW_MASK   = 0x,
+
+   NVD_HDR_VER_CUR = 1,/* current version */
+};
+
+/** struct simple_priv - information read from the device tree */
+struct simple_priv {
+   u32 area_start;
+   u32 area_size;
+   u32 skip_offset;
+   u32 state_offset;
+   u32 state_size;
+   u32 version_offset;
+   u32 version_size;
+   const char *storage;
+};
+
+/** struct simple_state - state information read from media
+ *
+ * @fw_version: Firmware version string
+ * @fw_vernum: Firmware version number
+ */
+struct simple_state {
+   char fw_version[MAX_VERSION_LEN];
+   u32 fw_vernum;
+};
+
+/** struct simple_nvdata - storage format for non-volatile data */
+struct simple_nvdata {
+   u8 crc8;
+   u8 hdr;
+   u16 spare1;
+   u32 fw_vernum;
+   u8 spare2[0x38];
+};
+
+static int simple_read_version(struct udevice *dev, struct blk_desc *desc,
+  u8 *buf, struct simple_state *state)
+{
+   struct simple_priv *priv = dev_get_priv(dev);
+   int start;
+
+   if (priv->version_size > MMC_MAX_BLOCK_LEN)
+   return log_msg_ret("ver", -E2BIG);
+
+   start = priv->area_start + priv->version_offset;
+   if (start & (MMC_MAX_BLOCK_LEN - 1))
+   return log_msg_ret("get", -EBADF);
+   start /= MMC_MAX_BLOCK_LEN;
+
+   if (blk_dread(desc, start, 1, buf) != 1)
+   return log_msg_ret("read", -EIO);
+   strlcpy(state->fw_version, buf, MAX_VERSION_LEN);
+   log_debug("version=%s\n", state->fw_version);
+
+   return 0;
+}
+
+static int simple_read_nvdata(struct udevice *dev, struct blk_desc *desc,
+ u8 *buf, struct simple_state *state)
+{
+   struct simple_priv *priv = dev_get_priv(dev);
+   uint hdr_ver, hdr_size, size, crc;
+   const struct simple_nvdata *nvd;
+   int start;
+
+   if (priv->state_size > MMC_MAX_BLOCK_LEN)
+   return log_msg_ret("state", -E2BIG);
+
+   start = priv->area_start + priv->state_offset;
+   if (start & (MMC_MAX_BLOCK_LEN - 1))
+   return log_msg_ret("get", -EBADF);
+   start /= MMC_MAX_BLOCK_LEN;
+
+   if (blk_dread(desc, start, 1, buf) != 1)
+   return log_msg_ret("read", -EIO);
+   nvd = (struct simple_nvdata *)buf;
+   hdr_ver = (nvd->hdr & NVD_HDR_VER_MASK) >> NVD_HDR_VER_SHIFT;
+   hdr_size = (nvd->hdr & NVD_HDR_SIZE_MASK) >> NVD_HDR_SIZE_SHIFT;
+   if (hdr_ver != NVD_HDR_VER_CUR)
+   return log_msg_ret("hdr", -EPERM);
+   size = 1 << hdr_size;
+   if (size > sizeof(*nvd))
+   return log_msg_ret("sz", -ENOEXEC);
+
+   crc = crc8(0, buf + 1, size - 

[PATCH 17/19] vbe: Add initial support for VBE

2022-07-20 Thread Simon Glass
Create a new bootmeth for VBE along with a library to handle finding the
VBE methods.

Signed-off-by: Simon Glass 
---

 boot/Kconfig  |   9 
 boot/Makefile |   2 +
 boot/vbe.c| 119 ++
 include/bootstd.h |   2 +
 include/vbe.h |  47 ++
 5 files changed, 179 insertions(+)
 create mode 100644 boot/vbe.c
 create mode 100644 include/vbe.h

diff --git a/boot/Kconfig b/boot/Kconfig
index 37880af5519..2bda221a68e 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -385,6 +385,15 @@ config BOOTMETH_EFILOADER
 
  This provides a way to try out standard boot on an existing boot flow.
 
+config BOOTMETH_VBE
+   bool "Bootdev support for Verified Boot for Embedded"
+   depends on FIT
+   default y
+   help
+ Enables support for VBE boot. This is a standard boot method which
+ supports selection of various firmware components, seleciton of an OS 
to
+ boot as well as updating these using fwupd.
+
 config BOOTMETH_SANDBOX
def_bool y
depends on SANDBOX
diff --git a/boot/Makefile b/boot/Makefile
index a70674259c1..dd74bf5bc93 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -47,3 +47,5 @@ obj-$(CONFIG_CMD_ADTIMG) += image-android-dt.o
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
 endif
+
+obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_VBE) += vbe.o
diff --git a/boot/vbe.c b/boot/vbe.c
new file mode 100644
index 000..e6ee087dc24
--- /dev/null
+++ b/boot/vbe.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Verified Boot for Embedded (VBE) access functions
+ *
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * is_vbe() - Check if a device is a VBE method
+ *
+ * @dev: Device to check
+ * @return true if this is a VBE bootmth device, else false
+ */
+static bool is_vbe(struct udevice *dev)
+{
+   return !strncmp("vbe", dev->driver->name, 3);
+}
+
+int vbe_find_next_device(struct udevice **devp)
+{
+   for (uclass_find_next_device(devp);
+*devp;
+uclass_find_next_device(devp)) {
+   if (is_vbe(*devp))
+   return 0;
+   }
+
+   return 0;
+}
+
+int vbe_find_first_device(struct udevice **devp)
+{
+   uclass_find_first_device(UCLASS_BOOTMETH, devp);
+   if (*devp && is_vbe(*devp))
+   return 0;
+
+   return vbe_find_next_device(devp);
+}
+
+int vbe_list(void)
+{
+   struct bootstd_priv *std;
+   struct udevice *dev;
+   int ret;
+
+   ret = bootstd_get_priv();
+   if (ret)
+   return ret;
+
+   printf("%3s  %-3s  %-15s  %-15s %s\n", "#", "Sel", "Device", "Driver",
+  "Description");
+   printf("%3s  %-3s  %-15s  %-15s %s\n", "---", "---", "--",
+  "--", "---");
+   for (ret = vbe_find_first_device(); dev;
+ret = vbe_find_next_device()) {
+   const struct bootmeth_uc_plat *plat = dev_get_uclass_plat(dev);
+
+   printf("%3d  %-3s  %-15s  %-15s %s\n", dev_seq(dev),
+  std->vbe_bootmeth == dev ? "*" : "", dev->name,
+  dev->driver->name, plat->desc);
+   }
+   printf("%3s  %-3s  %-15s  %-15s %s\n", "---", "---", "--",
+  "--", "---");
+
+   return 0;
+}
+
+int vbe_select(struct udevice *dev)
+{
+   struct bootstd_priv *std;
+   int ret;
+
+   ret = bootstd_get_priv();
+   if (ret)
+   return ret;
+   std->vbe_bootmeth = dev;
+
+   return 0;
+}
+
+int vbe_find_by_any(const char *name, struct udevice **devp)
+{
+   struct udevice *dev;
+   int ret, seq;
+   char *endp;
+
+   seq = simple_strtol(name, , 16);
+
+   /* Select by name */
+   if (*endp) {
+   ret = uclass_get_device_by_name(UCLASS_BOOTMETH, name, );
+   if (ret) {
+   printf("Cannot probe VBE bootmeth '%s' (err=%d)\n", 
name,
+  ret);
+   return ret;
+   }
+
+   /* select by number */
+   } else {
+   ret = uclass_get_device_by_seq(UCLASS_BOOTMETH, seq, );
+   if (ret) {
+   printf("Cannot find '%s' (err=%d)\n", name, ret);
+   return ret;
+   }
+   }
+
+   *devp = dev;
+
+   return 0;
+}
diff --git a/include/bootstd.h b/include/bootstd.h
index b002365f4f0..01be249d16e 100644
--- a/include/bootstd.h
+++ b/include/bootstd.h
@@ -26,6 +26,7 @@ struct udevice;
  * @glob_head: Head for the global list of all bootflows across all bootdevs
  * @bootmeth_count: Number of bootmeth devices in @bootmeth_order
  * @bootmeth_order: List of bootmeth devices to use, in order, NULL-terminated
+ * @vbe_bootmeth: Currently selected VBE 

[PATCH 14/19] bootstd: Fix comment in bootmeth test

2022-07-20 Thread Simon Glass
Correct the comment at the top of this file.

Signed-off-by: Simon Glass 
---

 test/boot/bootmeth.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/boot/bootmeth.c b/test/boot/bootmeth.c
index 07776c5368d..81421f550b5 100644
--- a/test/boot/bootmeth.c
+++ b/test/boot/bootmeth.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Test for bootdev functions. All start with 'bootdev'
+ * Test for bootdev functions. All start with 'bootmeth'
  *
  * Copyright 2021 Google LLC
  * Written by Simon Glass 
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 16/19] bootstd: Provide a bootmeth method to obtain state info

2022-07-20 Thread Simon Glass
Some bootmeths can provide information about what is available to boot.
For example, VBE simple provides access to the firmware state.

Add a new method for this, along with a sandbox test.

Signed-off-by: Simon Glass 
---

 boot/bootmeth-uclass.c | 10 ++
 boot/bootmeth_distro.c | 14 ++
 include/bootmeth.h | 38 +-
 test/boot/bootmeth.c   | 18 ++
 4 files changed, 79 insertions(+), 1 deletion(-)

diff --git a/boot/bootmeth-uclass.c b/boot/bootmeth-uclass.c
index b8ba4eca7ab..1e276c0f26b 100644
--- a/boot/bootmeth-uclass.c
+++ b/boot/bootmeth-uclass.c
@@ -20,6 +20,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int bootmeth_get_state_desc(struct udevice *dev, char *buf, int maxsize)
+{
+   const struct bootmeth_ops *ops = bootmeth_get_ops(dev);
+
+   if (!ops->get_state_desc)
+   return -ENOSYS;
+
+   return ops->get_state_desc(dev, buf, maxsize);
+}
+
 int bootmeth_check(struct udevice *dev, struct bootflow_iter *iter)
 {
const struct bootmeth_ops *ops = bootmeth_get_ops(dev);
diff --git a/boot/bootmeth_distro.c b/boot/bootmeth_distro.c
index 2b41e654ade..fea09b2c2fb 100644
--- a/boot/bootmeth_distro.c
+++ b/boot/bootmeth_distro.c
@@ -22,6 +22,19 @@
 #include 
 #include 
 
+static int distro_get_state_desc(struct udevice *dev, char *buf, int maxsize)
+{
+   if (IS_ENABLED(CONFIG_SANDBOX)) {
+   int len;
+
+   len = snprintf(buf, maxsize, "OK");
+
+   return len + 1 < maxsize ? 0 : -ENOSPC;
+   }
+
+   return 0;
+}
+
 static int disto_getfile(struct pxe_context *ctx, const char *file_path,
 char *file_addr, ulong *sizep)
 {
@@ -123,6 +136,7 @@ static int distro_bootmeth_bind(struct udevice *dev)
 }
 
 static struct bootmeth_ops distro_bootmeth_ops = {
+   .get_state_desc = distro_get_state_desc,
.check  = distro_check,
.read_bootflow  = distro_read_bootflow,
.read_file  = bootmeth_common_read_file,
diff --git a/include/bootmeth.h b/include/bootmeth.h
index 484e503e338..4967031a0a8 100644
--- a/include/bootmeth.h
+++ b/include/bootmeth.h
@@ -24,7 +24,25 @@ struct bootmeth_uc_plat {
 /** struct bootmeth_ops - Operations for boot methods */
 struct bootmeth_ops {
/**
-* check_supported() - check if a bootmeth supports this bootflow
+* get_state_desc() - get detailed state information
+*
+* Prodecues a textual description of the state of the bootmeth. This
+* can include newline characters if it extends to multiple lines. It
+* must be a nul-terminated string.
+*
+* This may involve reading state from the system, e.g. some data in
+* the firmware area.
+*
+* @dev:Bootmethod device to check
+* @buf:Buffer to place the info in (terminator must fit)
+* @maxsize:Size of buffer
+* Returns: 0 if OK, -ENOSPC is buffer is too small, other -ve error if
+* something else went wrong
+*/
+   int (*get_state_desc)(struct udevice *dev, char *buf, int maxsize);
+
+   /**
+* check_supported() - check if a bootmeth supports this bootdev
 *
 * This is optional. If not provided, the bootdev is assumed to be
 * supported
@@ -91,6 +109,24 @@ struct bootmeth_ops {
 
 #define bootmeth_get_ops(dev)  ((struct bootmeth_ops *)(dev)->driver->ops)
 
+/**
+ * bootmeth_get_state_desc() - get detailed state information
+ *
+ * Prodecues a textual description of the state of the bootmeth. This
+ * can include newline characters if it extends to multiple lines. It
+ * must be a nul-terminated string.
+ *
+ * This may involve reading state from the system, e.g. some data in
+ * the firmware area.
+ *
+ * @dev:   Bootmethod device to check
+ * @buf:   Buffer to place the info in (terminator must fit)
+ * @maxsize:   Size of buffer
+ * Returns: 0 if OK, -ENOSPC is buffer is too small, other -ve error if
+ * something else went wrong
+ */
+int bootmeth_get_state_desc(struct udevice *dev, char *buf, int maxsize);
+
 /**
  * bootmeth_check() - check if a bootmeth supports this bootflow
  *
diff --git a/test/boot/bootmeth.c b/test/boot/bootmeth.c
index 81421f550b5..5d2e87b1c95 100644
--- a/test/boot/bootmeth.c
+++ b/test/boot/bootmeth.c
@@ -7,7 +7,9 @@
  */
 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include "bootstd_common.h"
@@ -120,3 +122,19 @@ static int bootmeth_env(struct unit_test_state *uts)
return 0;
 }
 BOOTSTD_TEST(bootmeth_env, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+
+/* Check the get_state_desc() method */
+static int bootmeth_state(struct unit_test_state *uts)
+{
+   struct udevice *dev;
+   char buf[50];
+
+   ut_assertok(uclass_first_device(UCLASS_BOOTMETH, ));
+   ut_assertnonnull(dev);
+
+   ut_assertok(bootmeth_get_state_desc(dev, buf, sizeof(buf)));
+   

[PATCH 15/19] bootstd: Detect empty bootmeth ordering

2022-07-20 Thread Simon Glass
If the ordering produces no entries, this is an error. Report it, so that
the caller doesn't try to continue with a NULL bootmeth.

This fixes a crash in the bootflow_iter test when running with the sandbox
'default' device tree, instead of the required 'test' one.

Signed-off-by: Simon Glass 
---

 boot/bootmeth-uclass.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/boot/bootmeth-uclass.c b/boot/bootmeth-uclass.c
index c040d5f92b2..b8ba4eca7ab 100644
--- a/boot/bootmeth-uclass.c
+++ b/boot/bootmeth-uclass.c
@@ -114,6 +114,8 @@ int bootmeth_setup_iter_order(struct bootflow_iter *iter)
}
count = upto;
}
+   if (!count)
+   return log_msg_ret("count2", -ENOENT);
 
iter->method_order = order;
iter->num_methods = count;
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 11/19] dm: core: Add support for writing u32 with ofnode

2022-07-20 Thread Simon Glass
Add a new function to write an integer to an ofnode (live tree or
flat tree).

Signed-off-by: Simon Glass 
---

 drivers/core/ofnode.c | 15 +++
 include/dm/ofnode.h   | 10 ++
 test/dm/ofnode.c  | 16 
 3 files changed, 41 insertions(+)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index b7a55589a1c..45ea84e9fb8 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1126,6 +1126,21 @@ int ofnode_write_string(ofnode node, const char 
*propname, const char *value)
return ofnode_write_prop(node, propname, value, strlen(value) + 1);
 }
 
+int ofnode_write_u32(ofnode node, const char *propname, u32 value)
+{
+   fdt32_t *val;
+
+   assert(ofnode_valid(node));
+
+   log_debug("%s = %x", propname, value);
+   val = malloc(sizeof(*val));
+   if (!val)
+   return -ENOMEM;
+   *val = cpu_to_fdt32(value);
+
+   return ofnode_write_prop(node, propname, val, sizeof(value));
+}
+
 int ofnode_set_enabled(ofnode node, bool value)
 {
assert(ofnode_valid(node));
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 16c8890b097..7ce1e4c6d91 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1154,6 +1154,16 @@ int ofnode_write_prop(ofnode node, const char *propname, 
const void *value,
  */
 int ofnode_write_string(ofnode node, const char *propname, const char *value);
 
+/**
+ * ofnode_write_u32() - Set an integer property of an ofnode
+ *
+ * @node:  The node for whose string property should be set
+ * @propname:  The name of the string property to set
+ * @value: The new value of the 32-bit integer property
+ * Return: 0 if successful, -ve on error
+ */
+int ofnode_write_u32(ofnode node, const char *propname, u32 value);
+
 /**
  * ofnode_set_enabled() - Enable or disable a device tree node given by its
  *   ofnode
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index bd598d23e44..f80993f8927 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -585,3 +585,19 @@ static int dm_test_ofnode_livetree_writing(struct 
unit_test_state *uts)
 }
 DM_TEST(dm_test_ofnode_livetree_writing,
UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_LIVE_OR_FLAT);
+
+static int dm_test_ofnode_u32(struct unit_test_state *uts)
+{
+   ofnode node;
+
+   node = ofnode_path("/lcd");
+   ut_assert(ofnode_valid(node));
+   ut_asserteq(1366, ofnode_read_u32_default(node, "xres", 123));
+   ut_assertok(ofnode_write_u32(node, "xres", 1367));
+   ut_asserteq(1367, ofnode_read_u32_default(node, "xres", 123));
+   ut_assertok(ofnode_write_u32(node, "xres", 1366));
+
+   return 0;
+}
+DM_TEST(dm_test_ofnode_u32,
+   UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_LIVE_OR_FLAT);
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 12/19] event: Add an event for device tree fixups

2022-07-20 Thread Simon Glass
At present there is a confusing array of functions that handle the
device tree fix-ups needed for booting an OS. We should be able to switch
to using events to clean this up.

As a first step, create a new event type and call it from the standard
place.

Note that this event uses the ofnode interface only, since this can
support live tree which is more efficient when making lots of updates.

Signed-off-by: Simon Glass 
---

 boot/image-fdt.c | 11 +++
 common/event.c   |  3 +++
 include/event.h  | 14 ++
 test/py/tests/test_event_dump.py |  1 +
 4 files changed, 29 insertions(+)

diff --git a/boot/image-fdt.c b/boot/image-fdt.c
index 9db2cee9942..5e5b24674d3 100644
--- a/boot/image-fdt.c
+++ b/boot/image-fdt.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #ifndef CONFIG_SYS_FDT_PAD
@@ -668,6 +669,16 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
goto err;
}
}
+   if (CONFIG_IS_ENABLED(EVENT)) {
+   struct event_ft_fixup fixup;
+
+   fixup.tree = oftree_default();
+   ret = event_notify(EVT_FT_FIXUP, , sizeof(fixup));
+   if (ret) {
+   printf("ERROR: fdt fixup event failed: %d\n", ret);
+   goto err;
+   }
+   }
 
/* Delete the old LMB reservation */
if (lmb)
diff --git a/common/event.c b/common/event.c
index af1ed4121d8..3e345509783 100644
--- a/common/event.c
+++ b/common/event.c
@@ -35,6 +35,9 @@ const char *const type_name[] = {
 
/* init hooks */
"misc_init_f",
+
+   /* fdt hooks */
+   "ft_fixup",
 };
 
 _Static_assert(ARRAY_SIZE(type_name) == EVT_COUNT, "event type_name size");
diff --git a/include/event.h b/include/event.h
index c00c4fb68dc..05802019820 100644
--- a/include/event.h
+++ b/include/event.h
@@ -10,6 +10,8 @@
 #ifndef __event_h
 #define __event_h
 
+#include 
+
 /**
  * enum event_t - Types of events supported by U-Boot
  *
@@ -29,6 +31,9 @@ enum event_t {
/* Init hooks */
EVT_MISC_INIT_F,
 
+   /* Device tree fixups before booting */
+   EVT_FT_FIXUP,
+
EVT_COUNT
 };
 
@@ -50,6 +55,15 @@ union event_data {
struct event_dm {
struct udevice *dev;
} dm;
+
+   /**
+* struct event_ft_fixup - FDT fixup before booting
+*
+* @tree: tree to update
+*/
+   struct event_ft_fixup {
+   oftree tree;
+   } ft_fixup;
 };
 
 /**
diff --git a/test/py/tests/test_event_dump.py b/test/py/tests/test_event_dump.py
index b753e804ac3..17001777247 100644
--- a/test/py/tests/test_event_dump.py
+++ b/test/py/tests/test_event_dump.py
@@ -16,5 +16,6 @@ def test_event_dump(u_boot_console):
 out = util.run_and_log(cons, ['scripts/event_dump.py', sandbox])
 expect = '''.*Event typeId  Source 
location
   --  
--
+EVT_FT_FIXUP  bootmeth_vbe_simple_ft_fixupboot/vbe_simple.c:.*
 EVT_MISC_INIT_F   sandbox_misc_init_f 
.*arch/sandbox/cpu/start.c:'''
 assert re.match(expect, out, re.MULTILINE) is not None
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 13/19] read: Support sandbox

2022-07-20 Thread Simon Glass
Update the 'read' command to work correctly with sandbox.

Signed-off-by: Simon Glass 
---

 cmd/read.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/cmd/read.c b/cmd/read.c
index 99c7e3854e1..fecfadaa1fa 100644
--- a/cmd/read.c
+++ b/cmd/read.c
@@ -10,6 +10,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 int do_read(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
@@ -45,7 +46,7 @@ int do_read(struct cmd_tbl *cmdtp, int flag, int argc, char 
*const argv[])
return 1;
}
 
-   addr = (void *)hextoul(argv[3], NULL);
+   addr = map_sysmem(hextoul(argv[3], NULL), 0);
blk = hextoul(argv[4], NULL);
cnt = hextoul(argv[5], NULL);
 
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 10/19] ofnode: Allow writing to a flat tree

2022-07-20 Thread Simon Glass
In generally it is not permitted to implement an ofnode function only for
flat tree or live tree. Both must be supported. Also the code for
live tree access should be in of_access.c rather than ofnode.c which is
really just for holding the API-conversion code.

Update ofnode_write_prop() accordingly and fix the test so it can work
with flat tree too.

Signed-off-by: Simon Glass 
---

 drivers/core/of_access.c | 43 +
 drivers/core/ofnode.c| 51 
 include/dm/of_access.h   | 12 ++
 include/dm/ofnode.h  | 18 ++
 test/dm/ofnode.c | 14 +--
 5 files changed, 85 insertions(+), 53 deletions(-)

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 0e5915a43e6..a52f5a6b18b 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -887,3 +887,46 @@ struct device_node *of_get_stdout(void)
 {
return of_stdout;
 }
+
+int of_write_prop(struct device_node *np, const char *propname, int len,
+ const void *value)
+{
+   struct property *pp;
+   struct property *pp_last = NULL;
+   struct property *new;
+
+   if (!np)
+   return -EINVAL;
+
+   for (pp = np->properties; pp; pp = pp->next) {
+   if (strcmp(pp->name, propname) == 0) {
+   /* Property exists -> change value */
+   pp->value = (void *)value;
+   pp->length = len;
+   return 0;
+   }
+   pp_last = pp;
+   }
+
+   if (!pp_last)
+   return -ENOENT;
+
+   /* Property does not exist -> append new property */
+   new = malloc(sizeof(struct property));
+   if (!new)
+   return -ENOMEM;
+
+   new->name = strdup(propname);
+   if (!new->name) {
+   free(new);
+   return -ENOMEM;
+   }
+
+   new->value = (void *)value;
+   new->length = len;
+   new->next = NULL;
+
+   pp_last->next = new;
+
+   return 0;
+}
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 1c9542a3567..b7a55589a1c 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1108,55 +1108,17 @@ ofnode ofnode_by_prop_value(ofnode from, const char 
*propname,
 int ofnode_write_prop(ofnode node, const char *propname, const void *value,
  int len)
 {
-   const struct device_node *np = ofnode_to_np(node);
-   struct property *pp;
-   struct property *pp_last = NULL;
-   struct property *new;
-
-   if (!of_live_active())
-   return -ENOSYS;
-
-   if (!np)
-   return -EINVAL;
-
-   for (pp = np->properties; pp; pp = pp->next) {
-   if (strcmp(pp->name, propname) == 0) {
-   /* Property exists -> change value */
-   pp->value = (void *)value;
-   pp->length = len;
-   return 0;
-   }
-   pp_last = pp;
-   }
-
-   if (!pp_last)
-   return -ENOENT;
-
-   /* Property does not exist -> append new property */
-   new = malloc(sizeof(struct property));
-   if (!new)
-   return -ENOMEM;
-
-   new->name = strdup(propname);
-   if (!new->name) {
-   free(new);
-   return -ENOMEM;
-   }
-
-   new->value = (void *)value;
-   new->length = len;
-   new->next = NULL;
-
-   pp_last->next = new;
+   if (of_live_active())
+   return of_write_prop(ofnode_to_npw(node), propname, len, value);
+   else
+   return fdt_setprop((void *)gd->fdt_blob, ofnode_to_offset(node),
+  propname, value, len);
 
return 0;
 }
 
 int ofnode_write_string(ofnode node, const char *propname, const char *value)
 {
-   if (!of_live_active())
-   return -ENOSYS;
-
assert(ofnode_valid(node));
 
debug("%s: %s = %s", __func__, propname, value);
@@ -1166,9 +1128,6 @@ int ofnode_write_string(ofnode node, const char 
*propname, const char *value)
 
 int ofnode_set_enabled(ofnode node, bool value)
 {
-   if (!of_live_active())
-   return -ENOSYS;
-
assert(ofnode_valid(node));
 
if (value)
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 078f2ea06cd..5b7821d0a1b 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -519,4 +519,16 @@ int of_alias_get_highest_id(const char *stem);
  */
 struct device_node *of_get_stdout(void);
 
+/**
+ * of_write_prop() - Write a property to the device tree
+ *
+ * @np:device node to which the property value is to be written
+ * @propname:  name of the property to write
+ * @value: value of the property
+ * @len:   length of the property in bytes
+ * Returns: 0 if OK, -ve on error
+ */
+int of_write_prop(struct device_node *np, const 

[PATCH 09/19] dm: core: Prepare for updating the device tree with ofnode

2022-07-20 Thread Simon Glass
Add some documentation and a new flag so that we can safely enabled using
the ofnode interface to write to the device tree.

Signed-off-by: Simon Glass 
---

 doc/develop/driver-model/livetree.rst | 26 ++
 include/test/test.h   |  2 ++
 test/test-main.c  |  3 ++-
 3 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/doc/develop/driver-model/livetree.rst 
b/doc/develop/driver-model/livetree.rst
index c29f29b205b..faf3eb5b5f0 100644
--- a/doc/develop/driver-model/livetree.rst
+++ b/doc/develop/driver-model/livetree.rst
@@ -224,6 +224,32 @@ support is provided for adding those) that indicates that 
they should be
 freed. Then the tree can be scanned for these 'separately allocated' nodes and
 properties before freeing the memory block.
 
+The ofnode_write\_...() functions also support writing to the flat tree. Care
+should be taken however, since this can change the position of node names and
+properties in the flat tree, thus affecting the live tree. Generally this does
+not matter, since when we fire up the live tree we don't ever use the flat tree
+again. But in the case of tests, this can cause a problem.
+
+The sandbox tests typically run with OF_LIVE enabled but with the actual live
+tree either present or absent. This is to make sure that the flat tree 
functions
+work correctly even with OF_LIVE is enabled. But if a test modifies the flat
+device tree, then the live tree can become invalid. Any live tree tests that 
run
+after that point will use a corrupted tree, e.g. with an incorrect property 
name
+or worse. To deal with this we use a flag UT_TESTF_LIVE_OR_FLAT then ensures
+that tests which write to the flat tree are not run if OF_LIVE is enabled. Only
+the live tree version of the test is run, when OF_LIVE is enabled, with
+sandbox_flattree running the flat tree version.
+
+This is of course a work-around, even if a reasonable one. One solution to this
+problem would be to make a copy of the flat tree before the test and restore it
+afterwards, in the same memory location, so that the live tree pointers work
+again. Another would be to regenerate the live tree if a test modified the flat
+tree.
+
+Neither of these solutions is currently implemented, since the situation that
+causes the problem can only occur in sandbox tests, is somewhat esoteric and
+the UT_TESTF_LIVE_OR_FLAT flag deals with it in a reasonable way.
+
 
 Multiple livetrees
 --
diff --git a/include/test/test.h b/include/test/test.h
index 0104e189f63..c888d68b1ed 100644
--- a/include/test/test.h
+++ b/include/test/test.h
@@ -46,6 +46,8 @@ enum {
UT_TESTF_CONSOLE_REC= BIT(5),   /* needs console recording */
/* do extra driver model init and uninit */
UT_TESTF_DM = BIT(6),
+   /* live or flat device tree, but not both in the same executable */
+   UT_TESTF_LIVE_OR_FLAT   = BIT(4),
 };
 
 /**
diff --git a/test/test-main.c b/test/test-main.c
index ee38d1faea8..c0d0378c5d8 100644
--- a/test/test-main.c
+++ b/test/test-main.c
@@ -338,7 +338,8 @@ static int ut_run_test_live_flat(struct unit_test_state 
*uts,
/* Run with the live tree if possible */
runs = 0;
if (CONFIG_IS_ENABLED(OF_LIVE)) {
-   if (!(test->flags & UT_TESTF_FLAT_TREE)) {
+   if (!(test->flags &
+   (UT_TESTF_FLAT_TREE | UT_TESTF_LIVE_OR_FLAT))) {
uts->of_live = true;
ut_assertok(ut_run_test(uts, test, test->name));
runs++;
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 08/19] dm: core: Tidy up ofnode-writing test

2022-07-20 Thread Simon Glass
Update this test to use the livetree flag so that special check can be
avoided. Also drop a few blank lines.

Signed-off-by: Simon Glass 
---

 test/dm/ofnode.c | 11 ++-
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 0aeaaeb7f8c..ce96f9d1ee2 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -546,13 +546,7 @@ static int dm_test_ofnode_livetree_writing(struct 
unit_test_state *uts)
struct udevice *dev;
ofnode node;
 
-   if (!of_live_active()) {
-   printf("Live tree not active; ignore test\n");
-   return 0;
-   }
-
/* Test enabling devices */
-
node = ofnode_path("/usb@2");
 
ut_assert(!of_device_is_available(ofnode_to_np(node)));
@@ -564,7 +558,6 @@ static int dm_test_ofnode_livetree_writing(struct 
unit_test_state *uts)
ut_assertok(uclass_find_device_by_seq(UCLASS_USB, 2, ));
 
/* Test string property setting */
-
ut_assert(device_is_compatible(dev, "sandbox,usb"));
ofnode_write_string(node, "compatible", "gdsys,super-usb");
ut_assert(device_is_compatible(dev, "gdsys,super-usb"));
@@ -581,7 +574,6 @@ static int dm_test_ofnode_livetree_writing(struct 
unit_test_state *uts)
ut_asserteq(0x42, dev_read_addr(dev));
 
/* Test disabling devices */
-
device_remove(dev, DM_REMOVE_NORMAL);
device_unbind(dev);
 
@@ -591,4 +583,5 @@ static int dm_test_ofnode_livetree_writing(struct 
unit_test_state *uts)
 
return 0;
 }
-DM_TEST(dm_test_ofnode_livetree_writing, UT_TESTF_SCAN_PDATA | 
UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_livetree_writing,
+   UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_LIVE_TREE);
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 06/19] dm: core: Move ofnode-writing test to ofnode

2022-07-20 Thread Simon Glass
This fits better in the ofnode tests, so move it.

Signed-off-by: Simon Glass 
---

 test/dm/ofnode.c   | 56 ++
 test/dm/test-fdt.c | 53 ---
 2 files changed, 56 insertions(+), 53 deletions(-)

diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 6a252f3f504..b8d8e440dbc 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -4,8 +4,12 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 
@@ -536,3 +540,55 @@ static int dm_test_ofnode_root(struct unit_test_state *uts)
return 0;
 }
 DM_TEST(dm_test_ofnode_root, UT_TESTF_SCAN_FDT);
+
+static int dm_test_ofnode_livetree_writing(struct unit_test_state *uts)
+{
+   struct udevice *dev;
+   ofnode node;
+
+   if (!of_live_active()) {
+   printf("Live tree not active; ignore test\n");
+   return 0;
+   }
+
+   /* Test enabling devices */
+
+   node = ofnode_path("/usb@2");
+
+   ut_assert(!of_device_is_available(ofnode_to_np(node)));
+   ofnode_set_enabled(node, true);
+   ut_assert(of_device_is_available(ofnode_to_np(node)));
+
+   device_bind_driver_to_node(dm_root(), "usb_sandbox", "usb@2", node,
+  );
+   ut_assertok(uclass_find_device_by_seq(UCLASS_USB, 2, ));
+
+   /* Test string property setting */
+
+   ut_assert(device_is_compatible(dev, "sandbox,usb"));
+   ofnode_write_string(node, "compatible", "gdsys,super-usb");
+   ut_assert(device_is_compatible(dev, "gdsys,super-usb"));
+   ofnode_write_string(node, "compatible", "sandbox,usb");
+   ut_assert(device_is_compatible(dev, "sandbox,usb"));
+
+   /* Test setting generic properties */
+
+   /* Non-existent in DTB */
+   ut_asserteq_64(FDT_ADDR_T_NONE, dev_read_addr(dev));
+   /* reg = 0x42, size = 0x100 */
+   ut_assertok(ofnode_write_prop(node, "reg", 8,
+ "\x00\x00\x00\x42\x00\x00\x01\x00"));
+   ut_asserteq(0x42, dev_read_addr(dev));
+
+   /* Test disabling devices */
+
+   device_remove(dev, DM_REMOVE_NORMAL);
+   device_unbind(dev);
+
+   ut_assert(of_device_is_available(ofnode_to_np(node)));
+   ofnode_set_enabled(node, false);
+   ut_assert(!of_device_is_available(ofnode_to_np(node)));
+
+   return 0;
+}
+DM_TEST(dm_test_ofnode_livetree_writing, UT_TESTF_SCAN_PDATA | 
UT_TESTF_SCAN_FDT);
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index f9e81747595..6118ad42ca8 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -17,7 +17,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -735,58 +734,6 @@ static int dm_test_fdt_remap_addr_name_live(struct 
unit_test_state *uts)
 DM_TEST(dm_test_fdt_remap_addr_name_live,
UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
 
-static int dm_test_fdt_livetree_writing(struct unit_test_state *uts)
-{
-   struct udevice *dev;
-   ofnode node;
-
-   if (!of_live_active()) {
-   printf("Live tree not active; ignore test\n");
-   return 0;
-   }
-
-   /* Test enabling devices */
-
-   node = ofnode_path("/usb@2");
-
-   ut_assert(!of_device_is_available(ofnode_to_np(node)));
-   ofnode_set_enabled(node, true);
-   ut_assert(of_device_is_available(ofnode_to_np(node)));
-
-   device_bind_driver_to_node(dm_root(), "usb_sandbox", "usb@2", node,
-  );
-   ut_assertok(uclass_find_device_by_seq(UCLASS_USB, 2, ));
-
-   /* Test string property setting */
-
-   ut_assert(device_is_compatible(dev, "sandbox,usb"));
-   ofnode_write_string(node, "compatible", "gdsys,super-usb");
-   ut_assert(device_is_compatible(dev, "gdsys,super-usb"));
-   ofnode_write_string(node, "compatible", "sandbox,usb");
-   ut_assert(device_is_compatible(dev, "sandbox,usb"));
-
-   /* Test setting generic properties */
-
-   /* Non-existent in DTB */
-   ut_asserteq_64(FDT_ADDR_T_NONE, dev_read_addr(dev));
-   /* reg = 0x42, size = 0x100 */
-   ut_assertok(ofnode_write_prop(node, "reg", 8,
- "\x00\x00\x00\x42\x00\x00\x01\x00"));
-   ut_asserteq(0x42, dev_read_addr(dev));
-
-   /* Test disabling devices */
-
-   device_remove(dev, DM_REMOVE_NORMAL);
-   device_unbind(dev);
-
-   ut_assert(of_device_is_available(ofnode_to_np(node)));
-   ofnode_set_enabled(node, false);
-   ut_assert(!of_device_is_available(ofnode_to_np(node)));
-
-   return 0;
-}
-DM_TEST(dm_test_fdt_livetree_writing, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
-
 static int dm_test_fdt_disable_enable_by_path(struct unit_test_state *uts)
 {
ofnode node;
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 07/19] dm: core: Swap parameters of ofnode_write_prop()

2022-07-20 Thread Simon Glass
It is normal for the length to come after the value in libfdt. Follow this
same convention with ofnode.

Signed-off-by: Simon Glass 
---

 drivers/core/ofnode.c | 6 +++---
 include/dm/ofnode.h   | 6 +++---
 test/dm/ofnode.c  | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index bd41ef503c2..1c9542a3567 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1105,8 +1105,8 @@ ofnode ofnode_by_prop_value(ofnode from, const char 
*propname,
}
 }
 
-int ofnode_write_prop(ofnode node, const char *propname, int len,
- const void *value)
+int ofnode_write_prop(ofnode node, const char *propname, const void *value,
+ int len)
 {
const struct device_node *np = ofnode_to_np(node);
struct property *pp;
@@ -1161,7 +1161,7 @@ int ofnode_write_string(ofnode node, const char 
*propname, const char *value)
 
debug("%s: %s = %s", __func__, propname, value);
 
-   return ofnode_write_prop(node, propname, strlen(value) + 1, value);
+   return ofnode_write_prop(node, propname, value, strlen(value) + 1);
 }
 
 int ofnode_set_enabled(ofnode node, bool value)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index d7ad5dccc14..071a9d63f67 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1114,13 +1114,13 @@ int ofnode_device_is_compatible(ofnode node, const char 
*compat);
  *
  * @node:  The node for whose property should be set
  * @propname:  The name of the property to set
- * @len:   The length of the new value of the property
  * @value: The new value of the property (must be valid prior to calling
  * the function)
+ * @len:   The length of the new value of the property
  * Return: 0 if successful, -ve on error
  */
-int ofnode_write_prop(ofnode node, const char *propname, int len,
- const void *value);
+int ofnode_write_prop(ofnode node, const char *propname, const void *value,
+ int len);
 
 /**
  * ofnode_write_string() - Set a string property of a ofnode
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index b8d8e440dbc..0aeaaeb7f8c 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -576,8 +576,8 @@ static int dm_test_ofnode_livetree_writing(struct 
unit_test_state *uts)
/* Non-existent in DTB */
ut_asserteq_64(FDT_ADDR_T_NONE, dev_read_addr(dev));
/* reg = 0x42, size = 0x100 */
-   ut_assertok(ofnode_write_prop(node, "reg", 8,
- "\x00\x00\x00\x42\x00\x00\x01\x00"));
+   ut_assertok(ofnode_write_prop(node, "reg",
+ "\x00\x00\x00\x42\x00\x00\x01\x00", 8));
ut_asserteq(0x42, dev_read_addr(dev));
 
/* Test disabling devices */
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 05/19] ofnode: Introduce support for multiple trees

2022-07-20 Thread Simon Glass
At present ofnode only works with a single device tree, for the most part.
This is the control FDT used by U-Boot.

When booting an OS we may obtain a different device tree and want to
modify it. Add some initial support for this into the ofnode API.

Note that we don't permit aliases in this other device tree, since the
of_access implementation maintains a list of aliases collected at
start-up. Also, we don't need aliases to do fixups in the other FDT. So
make sure that flat tree and live tree processing are consistent in this
area.

Signed-off-by: Simon Glass 
---

 doc/develop/driver-model/livetree.rst | 17 +++
 drivers/core/of_access.c  | 14 --
 drivers/core/ofnode.c | 11 +
 include/dm/of_access.h| 10 +++-
 include/dm/ofnode.h   | 28 +++
 include/dm/ofnode_decl.h  | 13 ++
 include/of_live.h | 16 +++
 lib/of_live.c | 14 +-
 test/dm/ofnode.c  | 67 +++
 9 files changed, 171 insertions(+), 19 deletions(-)

diff --git a/doc/develop/driver-model/livetree.rst 
b/doc/develop/driver-model/livetree.rst
index fb2969259d0..c29f29b205b 100644
--- a/doc/develop/driver-model/livetree.rst
+++ b/doc/develop/driver-model/livetree.rst
@@ -225,6 +225,23 @@ freed. Then the tree can be scanned for these 'separately 
allocated' nodes and
 properties before freeing the memory block.
 
 
+Multiple livetrees
+--
+
+The livetree implementation was originally designed for use with the control
+FDT. This means that the FDT fix-ups (ft_board_setup() and the like, must use
+a flat tree.
+
+It would be helpful to use livetree for fixups, since adding a lot of nodes and
+properties would involve less memory copying and be more efficient. As a step
+towards this, an `oftree` type has been introduced. It is normally set to
+oftree_default() but can be set to other values. Eventually this should allow
+the use of FDT fixups using the ofnode interface, instead of the low-level
+libfdt one.
+
+See dm_test_ofnode_root() for some examples.
+
+
 Internal implementation
 ---
 
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index c20b19cb50f..0e5915a43e6 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -343,24 +343,30 @@ static struct device_node *__of_find_node_by_path(struct 
device_node *parent,
 #define for_each_property_of_node(dn, pp) \
for (pp = dn->properties; pp != NULL; pp = pp->next)
 
-struct device_node *of_find_node_opts_by_path(const char *path,
+struct device_node *of_find_node_opts_by_path(struct device_node *root,
+ const char *path,
  const char **opts)
 {
struct device_node *np = NULL;
struct property *pp;
const char *separator = strchr(path, ':');
 
+   if (!root)
+   root = gd->of_root;
if (opts)
*opts = separator ? separator + 1 : NULL;
 
if (strcmp(path, "/") == 0)
-   return of_node_get(gd->of_root);
+   return of_node_get(root);
 
/* The path could begin with an alias */
if (*path != '/') {
int len;
const char *p = separator;
 
+   /* Only allow alias processing on the control FDT */
+   if (root != gd->of_root)
+   return NULL;
if (!p)
p = strchrnul(path, '/');
len = p - path;
@@ -383,7 +389,7 @@ struct device_node *of_find_node_opts_by_path(const char 
*path,
 
/* Step down the tree matching path components */
if (!np)
-   np = of_node_get(gd->of_root);
+   np = of_node_get(root);
while (np && *path == '/') {
struct device_node *tmp = np;
 
@@ -791,7 +797,7 @@ int of_alias_scan(void)
 
name = of_get_property(of_chosen, "stdout-path", NULL);
if (name)
-   of_stdout = of_find_node_opts_by_path(name,
+   of_stdout = of_find_node_opts_by_path(NULL, name,
_stdout_options);
}
 
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index a59832ebbfb..bd41ef503c2 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -552,6 +552,17 @@ ofnode ofnode_path(const char *path)
return offset_to_ofnode(fdt_path_offset(gd->fdt_blob, path));
 }
 
+ofnode ofnode_path_root(oftree tree, const char *path)
+{
+   if (of_live_active())
+   return np_to_ofnode(of_find_node_opts_by_path(tree.np, path,
+ NULL));
+   else if (*path != '/' && tree.fdt != gd->fdt_blob)
+   return ofnode_null();  /* Aliases only on control FDT */
+ 

[PATCH 04/19] ofnode: Add a note about how livetree updates work

2022-07-20 Thread Simon Glass
The unflattening algorithm results in a single block of memory being
allocated for the whole tree. When writing new properties, these are
allocated new memory outside that block. When the block is freed, the
allocated properties remain.

Document how this works and the potential memory leak, as well as
mentioning that updating the livetree is actually supported now.

Signed-off-by: Simon Glass 
---

 doc/develop/driver-model/livetree.rst | 17 +
 include/dm/ofnode.h   |  3 ++-
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/doc/develop/driver-model/livetree.rst 
b/doc/develop/driver-model/livetree.rst
index 9f654f3b894..fb2969259d0 100644
--- a/doc/develop/driver-model/livetree.rst
+++ b/doc/develop/driver-model/livetree.rst
@@ -211,9 +211,18 @@ using it in new code.
 Modifying the livetree
 --
 
-This is not currently supported. Once implemented it should provide a much
-more efficient implementation for modification of the device tree than using
-the flat tree.
+This is supported in a limited way, with ofnode_write_prop() and related
+functions.
+
+The unflattening algorithm results in a single block of memory being
+allocated for the whole tree. When writing new properties, these are
+allocated new memory outside that block. When the block is freed, the
+allocated properties remain. This can result in a memory leak.
+
+The solution to this leak would be to add a flag for properties (and nodes when
+support is provided for adding those) that indicates that they should be
+freed. Then the tree can be scanned for these 'separately allocated' nodes and
+properties before freeing the memory block.
 
 
 Internal implementation
@@ -281,6 +290,6 @@ Live tree support was introduced in U-Boot 2017.07. There 
is still quite a bit
 of work to do to flesh this out:
 
 - tests for all access functions
-- support for livetree modification
+- more support for livetree modification
 - addition of more access functions as needed
 - support for livetree in SPL and before relocation (if desired)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 346b09c7d96..5a5309d79a7 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1081,7 +1081,8 @@ int ofnode_device_is_compatible(ofnode node, const char 
*compat);
  * ofnode_write_prop() - Set a property of a ofnode
  *
  * Note that the value passed to the function is *not* allocated by the
- * function itself, but must be allocated by the caller if necessary.
+ * function itself, but must be allocated by the caller if necessary. However
+ * it does allocate memory for the property struct and name.
  *
  * @node:  The node for whose property should be set
  * @propname:  The name of the property to set
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 02/19] video: Rename structs and functions to avoid VBE

2022-07-20 Thread Simon Glass
Rename these to VESA, itself an abbreviation, to avoid a conflict with
Verified Boot for Embedded.

Rename this to avoid referencing VBE.

Signed-off-by: Simon Glass 
---

 arch/x86/lib/bios.c | 10 +-
 arch/x86/lib/fsp/fsp_graphics.c |  2 +-
 drivers/bios_emulator/atibios.c | 16 
 drivers/pci/pci_rom.c   | 12 ++--
 drivers/video/broadwell_igd.c   |  2 +-
 drivers/video/coreboot.c|  2 +-
 drivers/video/efi.c |  2 +-
 drivers/video/ivybridge_igd.c   |  2 +-
 drivers/video/vesa.c|  2 +-
 include/bios_emul.h |  6 +++---
 include/vesa.h  | 25 ++---
 11 files changed, 42 insertions(+), 39 deletions(-)

diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
index 087539ba7db..94349ba8073 100644
--- a/arch/x86/lib/bios.c
+++ b/arch/x86/lib/bios.c
@@ -190,7 +190,7 @@ static void setup_realmode_idt(void)
 }
 
 #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
-static u8 vbe_get_mode_info(struct vbe_mode_info *mi)
+static u8 vbe_get_mode_info(struct vesa_state *mi)
 {
u16 buffer_seg;
u16 buffer_adr;
@@ -204,13 +204,13 @@ static u8 vbe_get_mode_info(struct vbe_mode_info *mi)
 
realmode_interrupt(0x10, VESA_GET_MODE_INFO, 0x, mi->video_mode,
   0x, buffer_seg, buffer_adr);
-   memcpy(mi->mode_info_block, buffer, sizeof(struct vbe_mode_info));
+   memcpy(mi->mode_info_block, buffer, sizeof(struct vesa_state));
mi->valid = true;
 
return 0;
 }
 
-static u8 vbe_set_mode(struct vbe_mode_info *mi)
+static u8 vbe_set_mode(struct vesa_state *mi)
 {
int video_mode = mi->video_mode;
 
@@ -225,7 +225,7 @@ static u8 vbe_set_mode(struct vbe_mode_info *mi)
return 0;
 }
 
-static void vbe_set_graphics(int vesa_mode, struct vbe_mode_info *mode_info)
+static void vbe_set_graphics(int vesa_mode, struct vesa_state *mode_info)
 {
unsigned char *framebuffer;
 
@@ -249,7 +249,7 @@ static void vbe_set_graphics(int vesa_mode, struct 
vbe_mode_info *mode_info)
 #endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
 
 void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode,
-struct vbe_mode_info *mode_info)
+struct vesa_state *mode_info)
 {
pci_dev_t pcidev = dm_pci_get_bdf(dev);
u32 num_dev;
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index 6a7552e6956..b07c666caf7 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -106,7 +106,7 @@ static int fsp_video_probe(struct udevice *dev)
vesa->phys_base_ptr = dm_pci_read_bar32(dev, 2);
gd->fb_base = vesa->phys_base_ptr;
 
-   ret = vbe_setup_video_priv(vesa, uc_priv, plat);
+   ret = vesa_setup_video_priv(vesa, uc_priv, plat);
if (ret)
goto err;
 
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index 09da76bc5d9..7ebead6bfad 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -83,13 +83,13 @@ static const void *bios_ptr(const void *buf, BE_VGAInfo 
*vga_info,
 }
 
 static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
- int vesa_mode, struct vbe_mode_info *mode_info)
+ int vesa_mode, struct vesa_state *mode_info)
 {
void *buffer = (void *)(M.mem_base + vbe_offset);
u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
u16 buffer_adr = ((unsigned long)vbe_offset) & 0x;
struct vesa_mode_info *vm;
-   struct vbe_info *info;
+   struct vesa_bios_ext_info *info;
const u16 *modes_bios, *ptr;
u16 *modes;
int size;
@@ -140,7 +140,7 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS 
*regs,
int attr;
 
debug("Mode %x: ", mode);
-   memset(buffer, '\0', sizeof(struct vbe_mode_info));
+   memset(buffer, '\0', sizeof(struct vesa_state));
regs->e.eax = VESA_GET_MODE_INFO;
regs->e.ebx = 0;
regs->e.ecx = mode;
@@ -174,7 +174,7 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS 
*regs,
 }
 
 static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
-struct vbe_mode_info *mode_info)
+struct vesa_state *mode_info)
 {
void *buffer = (void *)(M.mem_base + vbe_offset);
u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
@@ -192,7 +192,7 @@ static int atibios_set_vesa_mode(RMREGS *regs, int 
vesa_mode,
return -ENOSYS;
}
 
-   memset(buffer, '\0', sizeof(struct vbe_mode_info));
+   memset(buffer, '\0', sizeof(struct vesa_state));
debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
regs->e.eax = VESA_GET_MODE_INFO;
regs->e.ecx = 

[PATCH 03/19] dm: core: Split out the declaration of ofnode

2022-07-20 Thread Simon Glass
This is used by a lot of files, but ofnode.h needs to include a lot of
header files. This can create dependency cycles, particularly with
global_data.h which must include various declarations.

Split the core delcarations into a separate file to fix this.

Signed-off-by: Simon Glass 
---

 include/dm/ofnode.h  | 61 +-
 include/dm/ofnode_decl.h | 72 
 2 files changed, 73 insertions(+), 60 deletions(-)
 create mode 100644 include/dm/ofnode_decl.h

diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index bb60433124b..346b09c7d96 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -19,41 +19,7 @@
 
 struct resource;
 
-/**
- * typedef union ofnode_union ofnode - reference to a device tree node
- *
- * This union can hold either a straightforward pointer to a struct device_node
- * in the live device tree, or an offset within the flat device tree. In the
- * latter case, the pointer value is just the integer offset within the flat 
DT.
- *
- * Thus we can reference nodes in both the live tree (once available) and the
- * flat tree (until then). Functions are available to translate between an
- * ofnode and either an offset or a `struct device_node *`.
- *
- * The reference can also hold a null offset, in which case the pointer value
- * here is NULL. This corresponds to a struct device_node * value of
- * NULL, or an offset of -1.
- *
- * There is no ambiguity as to whether ofnode holds an offset or a node
- * pointer: when the live tree is active it holds a node pointer, otherwise it
- * holds an offset. The value itself does not need to be unique and in theory
- * the same value could point to a valid device node or a valid offset. We
- * could arrange for a unique value to be used (e.g. by making the pointer
- * point to an offset within the flat device tree in the case of an offset) but
- * this increases code size slightly due to the subtraction. Since it offers no
- * real benefit, the approach described here seems best.
- *
- * For now these points use constant types, since we don't allow writing
- * the DT.
- *
- * @np: Pointer to device node, used for live tree
- * @of_offset: Pointer into flat device tree, used for flat tree. Note that 
this
- * is not a really a pointer to a node: it is an offset value. See above.
- */
-typedef union ofnode_union {
-   const struct device_node *np;
-   long of_offset;
-} ofnode;
+#include 
 
 struct ofnode_phandle_args {
ofnode node;
@@ -61,31 +27,6 @@ struct ofnode_phandle_args {
uint32_t args[OF_MAX_PHANDLE_ARGS];
 };
 
-/**
- * struct ofprop - reference to a property of a device tree node
- *
- * This struct hold the reference on one property of one node,
- * using struct ofnode and an offset within the flat device tree or either
- * a pointer to a struct property in the live device tree.
- *
- * Thus we can reference arguments in both the live tree and the flat tree.
- *
- * The property reference can also hold a null reference. This corresponds to
- * a struct property NULL pointer or an offset of -1.
- *
- * @node: Pointer to device node
- * @offset: Pointer into flat device tree, used for flat tree.
- * @prop: Pointer to property, used for live treee.
- */
-
-struct ofprop {
-   ofnode node;
-   union {
-   int offset;
-   const struct property *prop;
-   };
-};
-
 /**
  * ofnode_to_np() - convert an ofnode to a live DT node pointer
  *
diff --git a/include/dm/ofnode_decl.h b/include/dm/ofnode_decl.h
new file mode 100644
index 000..7c9e43e4ad8
--- /dev/null
+++ b/include/dm/ofnode_decl.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ */
+
+#ifndef _DM_OFNODE_DECL_H
+#define _DM_OFNODE_DECL_H
+
+/**
+ * typedef union ofnode_union ofnode - reference to a device tree node
+ *
+ * This union can hold either a straightforward pointer to a struct device_node
+ * in the live device tree, or an offset within the flat device tree. In the
+ * latter case, the pointer value is just the integer offset within the flat 
DT.
+ *
+ * Thus we can reference nodes in both the live tree (once available) and the
+ * flat tree (until then). Functions are available to translate between an
+ * ofnode and either an offset or a `struct device_node *`.
+ *
+ * The reference can also hold a null offset, in which case the pointer value
+ * here is NULL. This corresponds to a struct device_node * value of
+ * NULL, or an offset of -1.
+ *
+ * There is no ambiguity as to whether ofnode holds an offset or a node
+ * pointer: when the live tree is active it holds a node pointer, otherwise it
+ * holds an offset. The value itself does not need to be unique and in theory
+ * the same value could point to a valid device node or a valid offset. We
+ * could arrange for a unique value to be used (e.g. by making the pointer
+ * point to an offset within the flat 

[PATCH 01/19] video: Renname vbe.h to vesa.h

2022-07-20 Thread Simon Glass
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename
the existing VBE (Vesa BIOS extensions) to allow this.

Signed-off-by: Simon Glass 
---

 arch/x86/lib/bios.c | 2 +-
 arch/x86/lib/coreboot_table.c   | 2 +-
 arch/x86/lib/fsp/fsp_graphics.c | 2 +-
 cmd/elf.c   | 2 +-
 drivers/bios_emulator/atibios.c | 2 +-
 drivers/pci/pci_rom.c   | 2 +-
 drivers/video/broadwell_igd.c   | 2 +-
 drivers/video/coreboot.c| 2 +-
 drivers/video/efi.c | 2 +-
 drivers/video/ivybridge_igd.c   | 2 +-
 drivers/video/vesa.c| 2 +-
 include/{vbe.h => vesa.h}   | 4 ++--
 lib/elf.c   | 2 +-
 13 files changed, 14 insertions(+), 14 deletions(-)
 rename include/{vbe.h => vesa.h} (98%)

diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
index 98cc05de2eb..087539ba7db 100644
--- a/arch/x86/lib/bios.c
+++ b/arch/x86/lib/bios.c
@@ -10,7 +10,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index 6eab0452fda..05519d851a9 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -6,7 +6,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index 02fd05c9faf..6a7552e6956 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -9,7 +9,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/cmd/elf.c b/cmd/elf.c
index 2b33c50bd02..ce40d3f72a7 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -14,7 +14,7 @@
 #include 
 #include 
 #ifdef CONFIG_X86
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index cdc5ba6ad90..09da76bc5d9 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -51,7 +51,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include "biosemui.h"
 
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 73d15e797fc..ceeb59d1fe4 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -34,7 +34,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/video/broadwell_igd.c b/drivers/video/broadwell_igd.c
index 2551f162e8f..81f0fd8c019 100644
--- a/drivers/video/broadwell_igd.c
+++ b/drivers/video/broadwell_igd.c
@@ -11,7 +11,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/video/coreboot.c b/drivers/video/coreboot.c
index 7237542c076..3efc65daa2b 100644
--- a/drivers/video/coreboot.c
+++ b/drivers/video/coreboot.c
@@ -6,7 +6,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/drivers/video/efi.c b/drivers/video/efi.c
index 5f9031f2ec5..d60b6e27569 100644
--- a/drivers/video/efi.c
+++ b/drivers/video/efi.c
@@ -9,7 +9,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 struct pixel {
diff --git a/drivers/video/ivybridge_igd.c b/drivers/video/ivybridge_igd.c
index 1aa5317dd5f..18672a18973 100644
--- a/drivers/video/ivybridge_igd.c
+++ b/drivers/video/ivybridge_igd.c
@@ -10,7 +10,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/video/vesa.c b/drivers/video/vesa.c
index 869e5469732..91da939e59b 100644
--- a/drivers/video/vesa.c
+++ b/drivers/video/vesa.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/include/vbe.h b/include/vesa.h
similarity index 98%
rename from include/vbe.h
rename to include/vesa.h
index 1631260eb73..30df58a9f1b 100644
--- a/include/vbe.h
+++ b/include/vesa.h
@@ -7,8 +7,8 @@
  * Contributors:
  * IBM Corporation - initial implementation
  */
-#ifndef _VBE_H
-#define _VBE_H
+#ifndef _VESA_H
+#define _VESA_H
 
 /* these structs are for input from and output to OF */
 struct __packed vbe_screen_info {
diff --git a/lib/elf.c b/lib/elf.c
index d074e4e0a7d..0476b2614c3 100644
--- a/lib/elf.c
+++ b/lib/elf.c
@@ -11,7 +11,7 @@
 #include 
 #include 
 #ifdef CONFIG_X86
-#include 
+#include 
 #include 
 #include 
 #endif
-- 
2.37.0.170.g444d1eabd0-goog



[PATCH 00/19] vbe: Verified Boot for Embedded initial support

2022-07-20 Thread Simon Glass
This adds the concept of a VBE method to U-Boot, along with an
implementation of the 'VBE simple' method, basically a simple way of
updating firmware in MMC from userspace and monitoring it from U-Boot.

VBE simple is implemented in fwupd. U-Boot's role is to set up the
device tree with the required firmware-update properties and provide the
developer with information about the current VBE state. To that end this
series includes a new 'vbe' command that allows VBE methods to be listed
and examined.

As part of this work, support for doing FDT fixups via the event interface
is provided, along with the ability to write to the device tree via the
ofnode interface.

Further work is needed to pull everything together, but this is a step
along the way.


Simon Glass (19):
  video: Renname vbe.h to vesa.h
  video: Rename structs and functions to avoid VBE
  dm: core: Split out the declaration of ofnode
  ofnode: Add a note about how livetree updates work
  ofnode: Introduce support for multiple trees
  dm: core: Move ofnode-writing test to ofnode
  dm: core: Swap parameters of ofnode_write_prop()
  dm: core: Tidy up ofnode-writing test
  dm: core: Prepare for updating the device tree with ofnode
  ofnode: Allow writing to a flat tree
  dm: core: Add support for writing u32 with ofnode
  event: Add an event for device tree fixups
  read: Support sandbox
  bootstd: Fix comment in bootmeth test
  bootstd: Detect empty bootmeth ordering
  bootstd: Provide a bootmeth method to obtain state info
  vbe: Add initial support for VBE
  vbe: Support VBE simple
  vbe: Add a new vbe command

 arch/sandbox/dts/sandbox.dtsi |  13 ++
 arch/sandbox/dts/test.dts |  15 ++
 arch/x86/lib/bios.c   |  12 +-
 arch/x86/lib/coreboot_table.c |   2 +-
 arch/x86/lib/fsp/fsp_graphics.c   |   4 +-
 boot/Kconfig  |  21 ++
 boot/Makefile |   3 +
 boot/bootmeth-uclass.c|  12 +
 boot/bootmeth_distro.c|  14 ++
 boot/image-fdt.c  |  11 +
 boot/vbe.c| 119 ++
 boot/vbe_simple.c | 304 ++
 cmd/Kconfig   |  10 +
 cmd/Makefile  |   1 +
 cmd/elf.c |   2 +-
 cmd/read.c|   3 +-
 cmd/vbe.c |  87 
 common/event.c|   3 +
 doc/develop/driver-model/livetree.rst |  60 -
 drivers/bios_emulator/atibios.c   |  18 +-
 drivers/core/of_access.c  |  57 -
 drivers/core/ofnode.c |  81 +++
 drivers/pci/pci_rom.c |  14 +-
 drivers/video/broadwell_igd.c |   4 +-
 drivers/video/coreboot.c  |   4 +-
 drivers/video/efi.c   |   4 +-
 drivers/video/ivybridge_igd.c |   4 +-
 drivers/video/vesa.c  |   4 +-
 include/bios_emul.h   |   6 +-
 include/bootmeth.h|  38 +++-
 include/bootstd.h |   2 +
 include/dm/of_access.h|  22 +-
 include/dm/ofnode.h   | 122 +--
 include/dm/ofnode_decl.h  |  85 +++
 include/event.h   |  14 ++
 include/of_live.h |  16 ++
 include/test/test.h   |   2 +
 include/vbe.h | 146 -
 include/vesa.h| 116 ++
 lib/elf.c |   2 +-
 lib/of_live.c |  14 +-
 test/boot/Makefile|   4 +
 test/boot/bootflow.c  |  53 +++--
 test/boot/bootmeth.c  |  31 ++-
 test/boot/vbe_simple.c| 115 ++
 test/dm/ofnode.c  | 132 +++
 test/dm/test-fdt.c|  53 -
 test/py/tests/test_event_dump.py  |   1 +
 test/test-main.c  |   3 +-
 49 files changed, 1503 insertions(+), 360 deletions(-)
 create mode 100644 boot/vbe.c
 create mode 100644 boot/vbe_simple.c
 create mode 100644 cmd/vbe.c
 create mode 100644 include/dm/ofnode_decl.h
 create mode 100644 include/vesa.h
 create mode 100644 test/boot/vbe_simple.c

-- 
2.37.0.170.g444d1eabd0-goog



[PATCH v3 01/13] mtd: nand: Get rid of busw parameter

2022-07-20 Thread Dario Binacchi
From: Michael Trimarchi 

Upstream linux commit 29a198a1592d83.

Auto-detection functions are passed a busw parameter to retrieve the actual
NAND bus width and eventually set the correct value in chip->options.
Rework the nand_get_flash_type() function to get rid of this extra
parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in
chip->options if needed.

Signed-off-by: Michael Trimarchi 
Signed-off-by: Dario Binacchi 
---

Changes in v3:
- Use commit sha1 with 13 digits.

Changes in v2:
- Use short-commit form.
- Remove linux info. Uboot seems that backport without add this
  extra information.

 drivers/mtd/nand/raw/nand_base.c | 59 +---
 1 file changed, 32 insertions(+), 27 deletions(-)

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index e8ece0a4a0dd..9a2194ebd3f8 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -3898,8 +3898,7 @@ static void nand_onfi_detect_micron(struct nand_chip 
*chip,
 /*
  * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
  */
-static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
-   int *busw)
+static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip)
 {
struct nand_onfi_params *p = >onfi_params;
char id[4];
@@ -3971,9 +3970,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
chip->bits_per_cell = p->bits_per_cell;
 
if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)
-   *busw = NAND_BUSWIDTH_16;
-   else
-   *busw = 0;
+   chip->options |= NAND_BUSWIDTH_16;
 
if (p->ecc_bits != 0xff) {
chip->ecc_strength_ds = p->ecc_bits;
@@ -4003,8 +4000,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
return 1;
 }
 #else
-static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
-   int *busw)
+static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip)
 {
return 0;
 }
@@ -4013,8 +4009,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
 /*
  * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.
  */
-static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip 
*chip,
-   int *busw)
+static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip 
*chip)
 {
struct nand_jedec_params *p = >jedec_params;
struct jedec_ecc_info *ecc;
@@ -4076,9 +4071,7 @@ static int nand_flash_detect_jedec(struct mtd_info *mtd, 
struct nand_chip *chip,
chip->bits_per_cell = p->bits_per_cell;
 
if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS)
-   *busw = NAND_BUSWIDTH_16;
-   else
-   *busw = 0;
+   chip->options |= NAND_BUSWIDTH_16;
 
/* ECC info */
ecc = >ecc_info[0];
@@ -4168,7 +4161,7 @@ static int nand_get_bits_per_cell(u8 cellinfo)
  * manufacturer-specific "extended ID" decoding patterns.
  */
 static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
-   u8 id_data[8], int *busw)
+   u8 id_data[8])
 {
int extid, id_len;
/* The 3rd id byte holds MLC / multichip data */
@@ -4221,7 +4214,6 @@ static void nand_decode_ext_id(struct mtd_info *mtd, 
struct nand_chip *chip,
/* Calc blocksize */
mtd->erasesize = (128 * 1024) <<
(((extid >> 1) & 0x04) | (extid & 0x03));
-   *busw = 0;
} else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
!nand_is_slc(chip)) {
unsigned int tmp;
@@ -4262,7 +4254,6 @@ static void nand_decode_ext_id(struct mtd_info *mtd, 
struct nand_chip *chip,
mtd->erasesize = 768 * 1024;
else
mtd->erasesize = (64 * 1024) << tmp;
-   *busw = 0;
} else {
/* Calc pagesize */
mtd->writesize = 1024 << (extid & 0x03);
@@ -4275,7 +4266,9 @@ static void nand_decode_ext_id(struct mtd_info *mtd, 
struct nand_chip *chip,
mtd->erasesize = (64 * 1024) << (extid & 0x03);
extid >>= 2;
/* Get buswidth information */
-   *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
+   /* Get buswidth information */
+   if (extid & 0x1)
+   chip->options |= NAND_BUSWIDTH_16;
 
/*
 * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
@@ -4301,15 +4294,13 @@ static void nand_decode_ext_id(struct mtd_info *mtd, 
struct nand_chip *chip,
  * the chip.
  */
 static void 

Re: [PATCH 2/5] firmware: zynqmp: Load config overlay for core0 to pmufw

2022-07-20 Thread Stefan Herbrechtsmeier

Hi,

Am 19.07.22 um 06:44 schrieb Soma, Ashok Reddy:

Hi Stefan,


-Original Message-
From: Stefan Herbrechtsmeier 
Sent: Saturday, July 16, 2022 4:48 PM
To: Simek, Michal ; Ashok Reddy Soma 
; u-boot@lists.denx.de
Cc: adrian.fiergol...@fastree3d.com; jh80.ch...@samsung.com; s...@svenpeter.dev; 
kette...@openbsd.org; s...@chromium.org; g...@xilinx.com; git (AMD-Xilinx) 

Subject: Re: [PATCH 2/5] firmware: zynqmp: Load config overlay for core0 to 
pmufw

CAUTION: This message has originated from an External Source. Please use proper 
judgment and caution when opening attachments, clicking links, or responding to 
this email.


Am 15.07.2022 um 18:34 schrieb Michal Simek:



On 7/15/22 18:13, Stefan Herbrechtsmeier wrote:

Am 15.07.2022 um 11:39 schrieb Ashok Reddy Soma:

Try loading pmufw config overlay for core0, if it doesn't return any
error it means pmufw is accepting nodes for other IP's. Otherwise
dont try to load config object for any other IP, just return from
zynqmp_pmufw_node function.

Signed-off-by: Ashok Reddy Soma 
---

   drivers/firmware/firmware-zynqmp.c | 14 ++
   1 file changed, 14 insertions(+)

diff --git a/drivers/firmware/firmware-zynqmp.c
b/drivers/firmware/firmware-zynqmp.c
index 34d9b47003..288151533e 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -68,8 +68,13 @@ int zynqmp_pmufw_config_close(void)
   return 0;
   }
+static bool config_enabled;
+


Please move the variable inside the function.


How can this work? When you move it to zynqmp_pmufw_node() then won't
be visible in zynqmp_power_probe() and vice-versa.



If you reuse the zynqmp_pmufw_node function in zynqmp_power_probe function you 
can check the id parameter to update the config_enabled variable in 
zynqmp_pmufw_node.


are you suggesting to change like this ?  this works fine for me. Shall i send V2 
with this >
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -29,6 +29,7 @@ struct zynqmp_power {
  } zynqmp_power;
  
  #define NODE_ID_LOCATION   5

+#define APU0_IDNODE_APU_0


Why don't you use the NODE_APU_0 define direct?


  static unsigned int xpm_configobject[] = {
 
/**/
@@ -68,18 +69,22 @@ int zynqmp_pmufw_config_close(void)
 return 0;
  }
  
-static bool config_enabled;
  
  int zynqmp_pmufw_node(u32 id)

  {
-   if (!config_enabled)
+   static bool config_enabled;


I would invert the meaning from enabled to skip ...


+   int ret;
+
+   if (!config_enabled && id != APU0_ID)


to simplify the check.

if (skip)


 return 0;
  
 /* Record power domain id */

 xpm_configobject[NODE_ID_LOCATION] = id;
  
-   zynqmp_pmufw_load_config_object(xpm_configobject,

-   sizeof(xpm_configobject));
+   ret = zynqmp_pmufw_load_config_object(xpm_configobject,
+ sizeof(xpm_configobject));
+   if(!ret && id == APU0_ID)
+   config_enabled = true;


if(ret && id == APU0_ID)
skip = true;

  
 return 0;

  }
@@ -272,14 +277,8 @@ static int zynqmp_power_probe(struct udevice *dev)
ret >> ZYNQMP_PM_VERSION_MAJOR_SHIFT,
ret & ZYNQMP_PM_VERSION_MINOR_MASK);
  
-   if (IS_ENABLED(CONFIG_ARCH_ZYNQMP)) {

-   xpm_configobject[NODE_ID_LOCATION] = NODE_APU_0;
-
-   ret = zynqmp_pmufw_load_config_object(xpm_configobject,
- sizeof(xpm_configobject));
-   if (!ret)
-   config_enabled = true;
-   }
+   if (IS_ENABLED(CONFIG_ARCH_ZYNQMP))
+   zynqmp_pmufw_node(APU0_ID);
  
 return 0;



Regards
  Stefan


[PATCH v3 4/4] spi: spi-mem: Allow address 0 for SPI mem operations

2022-07-20 Thread Xavier Drudis Ferran
Trying to boot my Rock Pi 4B from its XTX SPI NOR Flash failed when my
custom compiled TF-A had a load address of 0.

The same TF-A booted correctly from MMC.

Add a local variable to spi_mem_exec_op() to determine operation
direction, instead of testing rx_buf or tx_buf for null value, so that
a buffer at RAM address 0 is accepted.

This commit also cuts short a debug dump of the image loaded to show
only the first 0x1000 and the last 0x100 bytes, and not swamping the
serial log. When adding the #define DEBUG to the .c file one can
change these limits at the same time if they don't fit.

Changed since v2: 

- no changes

Changed since v1: 

- no changes

Signed-off-by: Xavier Drudis Ferran 

Cc: Jagan Teki 

---
 drivers/spi/spi-mem.c | 34 ++
 1 file changed, 26 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 9c1ede1b61..4dc90addb3 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -21,6 +21,8 @@
 #include 
 #include 
 #include 
+#define DEBUG_DUMP_START_LENGTH0x1000
+#define DEBUG_DUMP_END_LENGTH  0x100
 #endif
 
 #ifndef __UBOOT__
@@ -373,12 +375,21 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct 
spi_mem_op *op)
if (msg.actual_length != totalxferlen)
return -EIO;
 #else
+   enum spi_mem_data_dir dir = SPI_MEM_NO_DATA;
 
if (op->data.nbytes) {
-   if (op->data.dir == SPI_MEM_DATA_IN)
+   dir = op->data.dir;
+   if (dir == SPI_MEM_DATA_IN) {
rx_buf = op->data.buf.in;
-   else
+   } else {
tx_buf = op->data.buf.out;
+   /**
+* keep old behaviour, to assume SPI_MEM_DATA_OUT
+* if ever data.nbytes!=0 but data.dir==SPI_MEM_NO_DATA
+* (hopefully never)
+*/
+   dir = SPI_MEM_DATA_OUT;
+   }
}
 
op_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
@@ -410,7 +421,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct 
spi_mem_op *op)
/* 1st transfer: opcode + address + dummy cycles */
flag = SPI_XFER_BEGIN;
/* Make sure to set END bit if no tx or rx data messages follow */
-   if (!tx_buf && !rx_buf)
+   if (dir == SPI_MEM_NO_DATA)
flag |= SPI_XFER_END;
 
ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
@@ -418,7 +429,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct 
spi_mem_op *op)
return ret;
 
/* 2nd transfer: rx or tx data path */
-   if (tx_buf || rx_buf) {
+   if (dir != SPI_MEM_NO_DATA) {
ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
   rx_buf, SPI_XFER_END);
if (ret)
@@ -430,10 +441,17 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct 
spi_mem_op *op)
for (i = 0; i < pos; i++)
debug("%02x ", op_buf[i]);
debug("| [%dB %s] ",
- tx_buf || rx_buf ? op->data.nbytes : 0,
- tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
-   for (i = 0; i < op->data.nbytes; i++)
-   debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
+ op->data.nbytes,
+ dir == SPI_MEM_DATA_IN ? "in" : (dir == SPI_MEM_DATA_OUT ? "out" 
: "-"));
+   for (i = 0; i < op->data.nbytes && i < DEBUG_DUMP_START_LENGTH ; i++)
+   debug("%02x ", dir == SPI_MEM_DATA_OUT ? tx_buf[i] : rx_buf[i]);
+   if (op->data.nbytes > DEBUG_DUMP_END_LENGTH && op->data.nbytes > 
DEBUG_DUMP_START_LENGTH &&
+   i < op->data.nbytes - DEBUG_DUMP_END_LENGTH) {
+   debug(" ... ");
+   i = op->data.nbytes - DEBUG_DUMP_END_LENGTH;
+   }
+   for (; i < op->data.nbytes  ; i++)
+   debug("%02x ", dir == SPI_MEM_DATA_OUT ? tx_buf[i] : rx_buf[i]);
debug("[ret %d]\n", ret);
 
if (ret < 0)
-- 
2.20.1



[PATCH v3 3/4] spi-nor: Adapt soft reset to XTX25F32B in Rock Pi 4 rev 1.4

2022-07-20 Thread Xavier Drudis Ferran
XTX25F32B does not use octal mode and accepts soft reset, despite its
SFDP tables. Soft reset at U-Boot exit seems to be required to write
to /dev/mtd0 from flashrom in linux. Soft reset at U-Boot start seems
to help booting from SPI (at least with the dts properties I'm using).

The first soft reset is done before the flash id is read and the
fixups can be called, and v1 of this patch would now fail in Rock Pi 4
because of unsupported operation if tried with
SNOR_PROTO_8_8_8_DTR. This was since commit 5752d6ae8daa ("spi:
spi-mem: add spi_mem_dtr_supports_op()") by Pratyush Yadav.

So try a few modes until SNOR_PROTO_1_1_1 works and then remember the
reset_proto.  This tries to be useful for other boards, but I still
don't know any other that needs it and what would work there.

Changed since v2: 

   - none (rebase)

Changed since v1:

   - Generalization. First soft reset with SNOR_PROTO_8_8_8_DTR stopped
 working since the improvement by Pratyush Yadav.
 Instead of trying 8_8_8_DTR always at first reset, and force
 1_1_1 once XTX25F32B is detected (so, for last reset) do
 a generic loop for any chip trying protocols until one is
 supported and starting by the 8_8_8_DTR protocol (the one previously
 used). This leverages the fixed supports_op() to take into account
 controller and device.

fixups can be called, and it would now fail in Rock Pi 4 because of
unsupported operation if tried with SNOR_PROTO_8_8_8_DTR. So try a few
modes until SNOR_PROTO_1_1_1 works and then remember the reset_proto.
This tries to be useful for other boards, but I still don't know any
other that needs it and what would work there.

Signed-off-by: Xavier Drudis Ferran 

Cc: Jagan Teki 
Cc: Vignesh R 

---
 drivers/mtd/spi/spi-nor-core.c | 98 ++
 include/linux/mtd/spi-nor.h|  5 ++
 2 files changed, 92 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 8a226a7af5..17f0cb51fb 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3575,6 +3575,18 @@ static struct spi_nor_fixups mt35xu512aba_fixups = {
 };
 #endif /* CONFIG_SPI_FLASH_MT35XU */
 
+#ifdef CONFIG_SPI_FLASH_XTX
+static void xtx25f32b_post_sfdp_fixup(struct spi_nor *nor,
+ struct spi_nor_flash_parameter *params)
+{
+   nor->flags |= SNOR_F_SOFT_RESET;
+}
+
+static struct spi_nor_fixups xtx25f32b_fixups = {
+   .post_sfdp = xtx25f32b_post_sfdp_fixup,
+};
+#endif
+
 #if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX)
 /**
  * spi_nor_macronix_octal_dtr_enable() - Enable octal DTR on Macronix flashes.
@@ -3733,6 +3745,53 @@ static int spi_nor_init(struct spi_nor *nor)
 }
 
 #ifdef CONFIG_SPI_FLASH_SOFT_RESET
+/**
+ * spi_nor_soft_reset_setup_op() - Initial setup of op for soft
+ * reset. Initializes nor->reset_proto iff needed.
+ *
+ * @nor:   the spi_nor structure nor->reset_proto will be used or if
+ * null, it'll be assigned the used protocol, from a few
+ * protocols that get tried for device and controller
+ * support.
+ *
+ * @opcode operation code for soft reset (or soft reset enable,
+ * we currently assume they work the same in all systems)
+ *
+ * @op:pointer to operation struct to set up for reset or reset
+ * enable.
+ */
+static void spi_nor_soft_reset_setup_op(struct spi_nor *nor, u16 opcode, 
struct spi_mem_op *op)
+{
+   enum spi_nor_protocol reset_proto;
+   /**
+*  admitedly arbitrary list, to be improved if there's
+*  new knowledge of what works in different systems
+*/
+   enum spi_nor_protocol reset_proto_candidates[] = {
+   SNOR_PROTO_8_8_8_DTR, SNOR_PROTO_1_1_1_DTR, SNOR_PROTO_8_8_8,
+   SNOR_PROTO_4_4_4,  SNOR_PROTO_2_2_2, SNOR_PROTO_1_1_1
+   };
+
+   if (nor->reset_proto) {
+   *op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),
+   SPI_MEM_OP_NO_DUMMY,
+   SPI_MEM_OP_NO_ADDR,
+   SPI_MEM_OP_NO_DATA);
+   spi_nor_setup_op(nor, op, nor->reset_proto);
+   } else {
+   for (int i = 0; i < ARRAY_SIZE(reset_proto_candidates) && 
!nor->reset_proto ; i++) {
+   reset_proto = reset_proto_candidates[i];
+   *op = (struct 
spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),
+   SPI_MEM_OP_NO_DUMMY,
+   SPI_MEM_OP_NO_ADDR,
+   SPI_MEM_OP_NO_DATA);
+   spi_nor_setup_op(nor, op, reset_proto);
+   if (spi_mem_supports_op(nor->spi, op))
+   nor->reset_proto = reset_proto;

[PATCH v3 2/4] rockchip: rk-3399: rock-pi-4: dts: Add XTX SPI NOR 4MiB Flash chip in Rock Pi 4 boards from rev 1.4 on.

2022-07-20 Thread Xavier Drudis Ferran
Configure Rock Pi 4 to boot from SPI NOR Flash.

Based on flash chip, board documentation and tests, this is the
fastest I could use it.

This seems to be the minimum necessary configuration for Rock Pi 4 to
be able to boot from SPI NOR Flash.

With the next patch, it works to sf probe 1:0, sf read, sf erase, sf
write, sf read and then boot linux and flashrom can write to
it. Sometimes flashrom seems to fail to write when at U-Boot stage
there was no sf read or write, not sure why. Might work better after
a little while off power.

Note: It seems to work with or without CONFIG_SPL_SPI_FLASH_TINY If I
  disable it, and enable CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT I have
  to increase CONFIG_SPL_MAX_SIZE (I set it to 0x2e800) because
  the SPL grew over 1200 bytes bigger. It might work better, or
  just be chance, but it boots from SPI 0.3s slower. So I leave
  this out of this patch.

Changed since v2:

- added CONFIG_SPL_DM_SEQ_ALIAS to keep spi1 numeration consistent
  between SPL and U-Boot

Changed since v1: 

- include CONFIG_SF_DEFAULT_BUS=1 now that numeration
  will be unified between U-Boot and SPL (at patch 5/5)
 
Cc: Simon Glass 
Cc: Philipp Tomsich 
Cc: Kever Yang 

Signed-off-by: Xavier Drudis Ferran 
---
 arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 18 ++
 configs/rock-pi-4-rk3399_defconfig| 22 ++
 2 files changed, 40 insertions(+)

diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi 
b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
index c17e769f64..4c2fe8f6bc 100644
--- a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
@@ -15,3 +15,21 @@
 _log {
regulator-init-microvolt = <95>;
 };
+
+ {
+   status = "okay";
+   spi-max-frequency = <4000>;
+   spi-activate-delay = <12000>; /* 12 ms */
+
+   norflash: flash@0 {
+   compatible = "rockchip,spidev", "jedec,spi-nor";
+   reg = <0>;
+
+   spi-max-frequency = <4000>;
+   spi-cpha;
+   spi-cpol;
+
+   status = "okay";
+   u-boot,dm-pre-reloc;
+   };
+};
diff --git a/configs/rock-pi-4-rk3399_defconfig 
b/configs/rock-pi-4-rk3399_defconfig
index cf2e9fbde3..d5fadcb64f 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -10,6 +10,8 @@ CONFIG_ROCKCHIP_RK3399=y
 CONFIG_TARGET_EVB_RK3399=y
 CONFIG_DEBUG_UART_BASE=0xFF1A
 CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
@@ -28,6 +30,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK=0x40
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xb
 CONFIG_TPL=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
@@ -40,6 +46,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
@@ -48,21 +55,36 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_MODE=0x3
+CONFIG_SF_DEFAULT_SPEED=4000
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_NVME_PCI=y
 CONFIG_PCI=y
+CONFIG_SPL_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_DM_PMIC_FAN53555=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM_RK3399_LPDDR4=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=150
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
-- 
2.20.1



[PATCH v3 1/4] mtd: spi: spi-nor: Add Rock pi 4b new flash chip

2022-07-20 Thread Xavier Drudis Ferran
Radxa Rock Pi 4B from version 1.4 on carries a 4MiB XTX Technology Inc
25F32B SPI NOR Flash.  (previous versions had pads where users could
solder different chips).

Add its parameters to spi-nor-ids.c so U-Boot can discover it and
(after further changes) we can boot from SPI.

Note that the Flash is declared to be dual and quad capable because
the datasheet [4] says so but I couldn't try it because in Rock Pi 4
it is not wired for QuadSPI, and rk3399 does not seem to support dual
SPI either (or I couldn't find any register to configure spi1tx and
spi1rx as bidirectional).

But the same Flash part could be used as in quad or dual model in some
other board.

Likewise locks are in the datasheet but untested.

The part has been added to downstream U-Boot [1] and linux [2] [3]:

Changed from v2:

 - no change

Changed from v1:

 - no change

Link: [1] 
https://github.com/armbian/build/commit/c41cb4c454570127ad3238f6b901fbf3aa773c
Link: [2] 
https://github.com/radxa/kernel/blob/release-4.4-rockpi4/drivers/mtd/spi-nor/spi-nor.c
Link: [3] 
https://github.com/radxa/kernel/commit/8216f17965de7bc7ced7092aab0e2bfe16838a4
Link: [4] https://www.xtxtech.com/download/?AId=157


Signed-off-by: Xavier Drudis Ferran 

Cc: Jagan Teki 
Cc: Vignesh R 

---
 drivers/mtd/spi/spi-nor-ids.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 4fe8b0d92c..b09df00bab 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -452,6 +452,9 @@ const struct flash_info spi_nor_ids[] = {
 #ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology (Shenzhen) Limited */
{ INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | 
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+   { INFO("xt25f32b", 0x0b4016, 0, 64 * 1024, 64,
+  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ
+  | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_SST26LOCK) },
 #endif
{ },
 };
-- 
2.20.1



[PATCH v3 0/4] mtd: spi: spi-nor: rk3399: rock-pi-4: u-boot/next Support SPI NOR Flash in Rock Pi 4 (XTX xt25f32b)

2022-07-20 Thread Xavier Drudis Ferran
The Radxa Rock Pi 4 board is sold from revision 1.4 with a soldered
4Mb SPI NOR Flash. This series allows to use it from U-Boot and boot
from it.

This series applies to u-boot/master.

Changes since v2:

   - rebased on master
 
   - droped 5th path, and enabled CONFIG_SPL_DM_SEQ_ALIAS instead
 to have the flash on spi1 both on SPL and U-Boot proper.

Changes since v1:

   - Changed bus number to 1 in SPL to match U-Boot proper (before it
 was bus 0 in SPL and bus 1 in U-Boot).

   - Generalization. v1 did a first soft_reset in 8_8_8_DTR but that
 wouldn't work since Pratyush Yadav fixed supports_op() in commit
 5752d6ae8daacbd ("spi: spi-mem: add spi_mem_dtr_supports_op()").
 So now we try a few protocols until 1_1_1 is supported by
 controller and device. Might work for more systems.



[PATCH v3 0/4] mtd: spi: spi-nor: rk3399: rock-pi-4: u-boot/next Support SPI NOR Flash in Rock Pi 4 (XTX xt25f32b)

2022-07-20 Thread Xavier Drudis Ferran
The Radxa Rock Pi 4 board is sold from revision 1.4 with a soldered
4Mb SPI NOR Flash. This series allows to use it from U-Boot and boot
from it.

This series applies to u-boot/master.

Changes since v2:

   - rebased on master
 
   - droped 5th path, and enabled CONFIG_SPL_DM_SEQ_ALIAS instead
 to have the flash on spi1 both on SPL and U-Boot proper.

Changes since v1:

   - Changed bus number to 1 in SPL to match U-Boot proper (before it
 was bus 0 in SPL and bus 1 in U-Boot).

   - Generalization. v1 did a first soft_reset in 8_8_8_DTR but that
 wouldn't work since Pratyush Yadav fixed supports_op() in commit
 5752d6ae8daacbd ("spi: spi-mem: add spi_mem_dtr_supports_op()").
 So now we try a few protocols until 1_1_1 is supported by
 controller and device. Might work for more systems.



Re: [PATCH v4] patman: By default don't pass "--no-tree" to checkpatch for linux

2022-07-20 Thread Simon Glass
On Tue, 19 Jul 2022 at 16:00, Douglas Anderson  wrote:
>
> When you pass "--no-tree" to checkpatch it disables some extra checks
> that are important for Linux. Specifically I want checks like:
>
>   warning: DT compatible string "boogie,woogie" appears un-documented
>   check ./Documentation/devicetree/bindings/
>
> Let's make the default for Linux to _not_ pass --no-tree. We'll have a
> config option and command line flag to override.
>
> Signed-off-by: Douglas Anderson 
> ---
> Without BooleanOptionalAction (python 3.9), it's a little odd to make
> the help text understandable while having the help text account for
> the project settings when printing the default (which it can only
> print as "True" or "False". It feels like no matter how you swing it
> you've got to use a double-negative or use weird syntax like I did.
>
> I removed previous review/testing tags since at least parts of this
> patch changed in non-trivial ways.
>
> This patch is now a singleton since the other patches in the series
> landed or became irrelevant.
>
> Changes in v4:
> - Don't use BooleanOptionalAction
>
>  tools/patman/checkpatch.py | 11 +++
>  tools/patman/control.py|  7 ---
>  tools/patman/main.py   |  6 ++
>  tools/patman/settings.py   |  3 ++-
>  4 files changed, 19 insertions(+), 8 deletions(-)

Reviewed-by: Simon Glass 


Re: binman issue on ubuntu 20.04

2022-07-20 Thread Simon Glass
Hi Belisko,

On Tue, 19 Jul 2022 at 03:21, Belisko Marek  wrote:
>
> Hi,
>
> I'm trying to compile an older u-boot (2017.03) with Ubuntu 20.04.
> Machine is sunxi. COmpilation went fine but when binman assembles
> u-boot-sunxi-with-spl.bin it stuck somewhere. I've enabled python
> traces and it loops in forever:
>
> subprocess.py(1668): if errpipe_data:
> cros_subprocess.py(94): if stdout_pty is not None:
> cros_subprocess.py(96): if stderr_pty is not None:
> cros_subprocess.py(100): if kwargs:
> command.py(73): while pipeline:
> command.py(95): if capture:
> command.py(97): last_pipe.CommunicateFilter(None))
>  --- modulename: cros_subprocess, funcname: CommunicateFilter
> cros_subprocess.py(144): read_set = []
> cros_subprocess.py(145): write_set = []
> cros_subprocess.py(146): stdout = None # Return
> cros_subprocess.py(147): stderr = None # Return
> cros_subprocess.py(149): if self.stdin:
> cros_subprocess.py(157): if self.stdout:
> cros_subprocess.py(158): read_set.append(self.stdout)
> cros_subprocess.py(159): stdout = []
> cros_subprocess.py(160): if self.stderr and self.stderr != 
> self.stdout:
> cros_subprocess.py(163): combined = []
> cros_subprocess.py(165): input_offset = 0
> cros_subprocess.py(166): while read_set or write_set:
> cros_subprocess.py(167): try:
> cros_subprocess.py(168): rlist, wlist, _ =
> select.select(read_set, write_set, [], 0.2)
> cros_subprocess.py(174): if not stay_alive:
> cros_subprocess.py(177): if self.stdin in wlist:
> cros_subprocess.py(188): if self.stdout in rlist:
> cros_subprocess.py(189): data = ""
> cros_subprocess.py(191): try:
> cros_subprocess.py(192): data =
> os.read(self.stdout.fileno(), 1024)
> cros_subprocess.py(195): if data == "":
> cros_subprocess.py(199): stdout.append(data)
> cros_subprocess.py(200): combined.append(data)
> cros_subprocess.py(201): if output:
> cros_subprocess.py(203): if self.stderr in rlist:
>
>
> Any idea if there is some fix for that or idea where to look?

That code is processing output from a subprocess. It might be that the
subprocess has hung. You can use -v5 to see what is being run,
perhaps. Also -D might provide a traceback when you quit.


>
> Thanks and BR,
>
> marek
> --
> as simple and primitive as possible
> -
> Marek Belisko - OPEN-NANDRA
> Freelance Developer
>
> Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
> Tel: +421 915 052 184
> skype: marekwhite
> twitter: #opennandra
> web: http://open-nandra.com


Re: [PATCH 10/19] buildman: Incorporate the genboardscfg.py tool

2022-07-20 Thread Simon Glass
Hi Tom,

On Mon, 18 Jul 2022 at 06:11, Tom Rini  wrote:
>
> On Thu, Jul 14, 2022 at 04:21:57AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 13 Jul 2022 at 12:21, Tom Rini  wrote:
> > >
> > > On Wed, Jul 13, 2022 at 09:28:06AM -0600, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Tue, 12 Jul 2022 at 15:38, Tom Rini  wrote:
> > > > >
> > > > > On Mon, Jul 11, 2022 at 07:04:04PM -0600, Simon Glass wrote:
> > > > > > Bring this tool into buildman, so we don't have to run it 
> > > > > > separately. The
> > > > > > board.cfg file is still produced as part of the build, to save time 
> > > > > > when
> > > > > > doing another build in the same working directory. If it is out of 
> > > > > > date
> > > > > > with respect to the Kconfig, it is updated.
> > > > > >
> > > > > > Time to regenerate on a recent single-thread machine is 4.6s (1.3s 
> > > > > > on a
> > > > > > 32-thread machine), so we do need some sort of cache if we want 
> > > > > > buildman
> > > > > > to be useful on incremental builds. We could use Python's pickle 
> > > > > > format
> > > > > > but:
> > > > > >
> > > > > > - it seems useful to allow boards.cfg to be regenerated, at least 
> > > > > > for a
> > > > > >   while, in case other tools use it
> > > > > > - it is possible to grep the file easily, e.g. to find boards which 
> > > > > > use
> > > > > >   a particular SoC (similar to 'buildman -nv '
> > > > >
> > > > > While I don't think other tools still use boards.cfg, this will make 
> > > > > it
> > > > > easier to find out that I'm wrong.  Perhaps once the CONFIG to Kconfig
> > > > > migration is done we can move to just pickle'ing the data or similar
> > > > > since I find the main use of what was in boards.cfg can be figured out
> > > > > with some other git grep'ing, and in turn that's mainly for me when
> > > > > trying to convert stuff.  Thanks for doing this.
> > > >
> > > > Yes. I'm excited to hear that Kconfig migration might be done - any
> > > > forecast as to when?
> > >
> > > Not yet.  I'm auditing CONFIG_SYS_* now, with a notion to move
> > > everything that's not really configurable just out of CONFIG namespace
> > > as the starting point.  That'll drop us down to ~500 to migrate, which
> > > feels a bit less daunting.
> > >
> > > > One thing we could to is provide an option for buildman to spit out
> > > > the various fields that go into boards.cfg
> > >
> > > Right.  So I might not have said this before, but one reason I wanted
> > > buildman to natively know kconfiglib and have everything was that while
> > > we can do a lot of good matching on what to build, it would be amazingly
> > > good to be able to say "build every platform with NVME_PCI set" (and if
> > > it's not too hard hex/int options with a specific value).
> >
> > Ah OK. At present moveconfig has the functionality to list the boards
> > that have particular options (-b and -f). It is expensive to build the
> > database though - over a minute on a 32-thread machine. So we would
> > have to cache it. Also just about any change would invalidate the
> > cache and I'm not sure if it possible to detect which changes have no
> > effect on which cache entries...
>
> Ah, maybe it will take some more thinking about then.  Maybe an
> "advanced" match option, and also seeing how to have Azure generate the db
> in one job and pass it as an artifact to every other job in the world
> build stage.  Not an immediate need.

Well I suppose having that logic in moveconfig doesn't make a lot of
sense. So we could move it to buildman and have a way of creating the
database, as you say. But bear in mind that every commit being built
has the potential to change the Kconfig. It may be possible to hash
the files or detect changes using timestamps.

Regards,
Simon


Re: [RFC PATCH 7/8] binman: add support for skipping file concatenation for mkimage

2022-07-20 Thread Simon Glass
Hi Quentin,

On Mon, 18 Jul 2022 at 03:39, Quentin Schulz
 wrote:
>
> Hi Simon,
>
> On 7/16/22 13:58, Simon Glass wrote:
> > On Fri, 15 Jul 2022 at 09:37, Quentin Schulz  wrote:
> >>
> >> From: Quentin Schulz 
> >>
> >> Some image types handled by mkimage require the datafiles to be passed
> >> independently (-d data1:data2) for specific handling of each. A
> >> concatenation of datafiles prior to passing them to mkimage wouldn't
> >> work.
> >>
> >> That is the case for rksd and rkspi for example, which require page
> >> alignment (plus some weird hack for rkspi) plus size data of each stage
> >> to be embedded in the mkimage header.
> >>
>
> I forgot to rephrase the commit log. As seen in patch 1/8, there
> actually doesn't seem to be a need for rksd for passing multiple data
> files to mkimage, only the TPL could be passed to mkimage and SPL
> appended right after that blob generated by mkimage. Maybe it's luck but
> it seems to work for me the few tries I did on SD card and eMMC.

OK I see.

>
> >> This adds the ability to tell binman to pass the datafiles without
> >> prior concatenation to mkimage, by adding the multiple-data-files
> >> boolean property to the mkimage node.
> >>
> >> Cc: Quentin Schulz 
> >> Signed-off-by: Quentin Schulz 
> >> ---
> >>   tools/binman/entries.rst  | 22 +++
> >>   tools/binman/etype/mkimage.py | 41 +++
> >>   2 files changed, 59 insertions(+), 4 deletions(-)
> >
> > Reviewed-by: Simon Glass 
> >
> > I wonder if we should move this logic to binman (from mkimage) when
> > all the boards are converted to binman?
>
> Not sure this fits the "Relationship to mkimage" section in binman.rst?
> What part of the logic exactly would you like to move from mkimage to
> binman?

The concatenation of the files and the strange SPI processing, for
example. It's just an idea and it is OK to keep it in mkimage.

Regards,
Simon


Re: [PATCH] console: Add option to keep it silent until env is loaded

2022-07-20 Thread Simon Glass
Hi Harald,

On Mon, 18 Jul 2022 at 09:08, Harald Seiler  wrote:
>
> Hi Simon,
>
> On Wed, 2022-07-13 at 09:28 -0600, Simon Glass wrote:
> > Hi Harald,
> >
> > On Tue, 12 Jul 2022 at 05:58, Harald Seiler  wrote:
> > >
> > > Hi Simon,
> > >
> > > On Tue, 2022-07-12 at 04:58 -0600, Simon Glass wrote:
> > > > Hi Harald,
> > > >
> > > > On Wed, 6 Jul 2022 at 05:19, Harald Seiler  wrote:
> > > > >
> > > > > Add a config-option which forces the console to stay silent until the
> > > > > proper environment is loaded from flash.
> > > > >
> > > > > This is important when the default environment does not silence the
> > > > > console but no output must be printed when 'silent' is set in the 
> > > > > flash
> > > > > environment.
> > > > >
> > > > > After the environment from flash is loaded, the console will be
> > > > > silenced/unsilenced depending on it.  If PRE_CONSOLE_BUFFER is also
> > > > > used, the buffer will now be flushed if the console should not be
> > > > > silenced.
> > > > >
> > > > > Signed-off-by: Harald Seiler 
> > > > > ---
> > > > >  common/Kconfig   | 10 ++
> > > > >  common/console.c |  5 +
> > > > >  2 files changed, 15 insertions(+)
> > > >
> > > > This seems OK to me. You might want to implement the silent-console
> > > > device tree property in console_update_silent() too, which was dropped
> > > > in the conversion to driver model.
> > >
> > > This looks interesting, I'll have to look into it.
> > >
> > > Do you know if there's any effort towards supporting such a flag in the
> > > kernel as well?  I had to remove the serial console property from my DT
> > > and instead pass console info via cmdline to make the silent console
> > > work.  A "pure DT" solution of any sort would have been nicer of
> > > course...
> >
> > The console's 'silent' flag is propagated to Linux by dropping the
> > 'console=' text from the bootargs. See fixup_silent_linux().
>
> Right, this is what I am relying on right now.  The problem is that this
> does not have any effect when `console=` is not used and the console is
> instead passed using the `/chosen/stdout-path` DT property.

OK.

>
> I was wondering whether U-Boot should maybe delete this property from
> the DT passed to Linux when going silent...

Yes it probably should!

>
> (But of course this is unrelated to the original patch here)

Regards,
Simon


Re: [PATCH] Provide more details of exactly how configuration signatures are calculated

2022-07-20 Thread Simon Glass
Hi Martin,

On Wed, 20 Jul 2022 at 02:46, Martin Bonner  wrote:
>
> OK.  I've just realized there is an important warning missing from
> this (if you verify a configuration signature outside u-boot, you
> _must_ verify the hashes for the kernel, fdt, and ramdisk images match
> too).  What is the protocol for handling that?  Submit a new patch
> with title "[Patch v2] ..."?

Yes when the images are loaded, the hash for each is verified. If that
is not done then you can change the images.

Yes you can do a v2 patch. See patman.

>
> I will hold off submitting that in case there are other comments that
> need to be addressed.
>
> Martin
>
> On Wed, 20 Jul 2022 at 08:23, Martin Bonner  wrote:
> >
> > There are a couple of uncertainties still remaining:
> > - The "hashed-nodes" property is created by mkimage in image order.
> > What happens if somebody manipulates a signed image to change the
> > order?  Does it make any difference?  Do u-boot and fit_check_sign

If the wrong nodes are hashed then the signature will not match. If
you change it deliberately, then you still need to get the signature
right, which you cannot do without the private key.

For the order, it should not matter as I believe the fdt_region code
works through the DT in sequential order.

> > handle it in the same way?  (My preference would be that both fail the
> > signature on the grounds that there is no good reason for the nodes to
> > be out of order, and it suggests an attacker is trying to be clever.)

You could perhaps get the offsets of the paths and check that they are
in increasing order of offset.

> > - What happens if the image contains a DTB_NOP tag?  Is it included or
> > not?  (Again, I would fail the signature if it does.)

It should be included if the properties of that node are included by default.

> >
> > Martin
> >
> > On Wed, 20 Jul 2022 at 08:14, Martin Bonner  
> > wrote:
> > >
> > > I have just spent a week reverse-engineering this, so I thought I'd
> > > contribute the work back to the community
> > >
> > > diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
> > > index 61a72db3c7..61cdd55e40 100644
> > > --- a/doc/uImage.FIT/signature.txt
> > > +++ b/doc/uImage.FIT/signature.txt
> > > @@ -382,6 +382,25 @@ verified later even if the FIT has been signed
> > > with other keys in the
> > >  meantime.
> > >
> > >
> > > +Details
> > > +---
> > > +The signature node contains a property ('hashed-nodes') which lists all 
> > > the
> > > +nodes that the signature was made over.  The image is walked in order 
> > > and each
> > > +tag processed as follows:
> > > +- DTB_BEGIN_NODE: The tag and the following name are added to the 
> > > signature if
> > > +  the node or its parent are present in 'hashed-nodes'
> > > +- DTB_END_NODE: The tag is added to the signature if the node or its 
> > > parent are
> > > +  present in 'hashed-nodes'
> > > +- DTB_PROPERTY: The tag, the length word, the offset in the string 
> > > table, and
> > > +  the data are all included if the node is present in 'hashed-nodes' and 
> > > the
> > > +  property name is not 'data'.
> > > +- DTB_END: The tag is always included.
> > > +
> > > +In addition, the signature contains a property 'hashed-strings' which 
> > > contains
> > > +the offset and length in the string table of the strings that are to be 
> > > added
> > > +to the signature (this is always done at the end).

There is an fdtgrep tool which actually shows you what is going on.
You can use the -A and -a options, for example, along with the same
settings that the signature code is using.

See also here:

https://static.googleusercontent.com/media/research.google.com/en//pubs/archive/42038.pdf

(the slide on signing configurations, there is a video too)

> > > +
> > > +
> > >  Verification
> > >  
> > >  FITs are verified when loaded. After the configuration is selected a list
> > >

Regards,
Simon


Re: Reading GPIOs with DM_GPIO before device tree is loaded

2022-07-20 Thread Simon Glass
Hi Hugo,

On Wed, 20 Jul 2022 at 04:54, Hugo Villeneuve  wrote:
>
> Hi,
> in board_early_init_f(), i call a custom function get_som_revision() to read 
> some GPIOs that are used to determine the SOM revision. This function 
> basically sets the iomux, and then uses 
> gpio_request/gpio_direction_input/gpio_get_value functions to read the GPIOs. 
> Then, this SOM revision information is used in  board_fit_config_name_match() 
> to decide which device tree to load.
>
> This works perfectly fine without CONFIG_DM_GPIO. However, if I enable 
> CONFIG_DM_GPIO, it doesn't work anymore. There is an error when calling 
> gpio_request().
>
> What is the correct way to read GPIOs BEFORE any device tree is loaded?
>
> My board uses an MX6Q SOM.
>
> Here is part of the code I am using:
>
> 
> static iomux_v3_cfg_t const boardcfg_pads[] = {
> MX6_PAD_DISP0_DAT15__GPIO5_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
> MX6_PAD_DISP0_DAT8__GPIO4_IO29  | MUX_PAD_CTRL(NO_PAD_CTRL),
> MX6_PAD_DISP0_DAT0__GPIO4_IO21  | MUX_PAD_CTRL(NO_PAD_CTRL),
> MX6_PAD_ENET_RXD0__GPIO1_IO27   | MUX_PAD_CTRL(NO_PAD_CTRL),
> MX6_PAD_ENET_RXD1__GPIO1_IO26   | MUX_PAD_CTRL(NO_PAD_CTRL),
> };
>
> static int som_revision = -1;
>
> static const int boardcfg_gpio[] = {
> IMX_GPIO_NR(5, 9),
> IMX_GPIO_NR(4, 29),
> IMX_GPIO_NR(4, 21),
> IMX_GPIO_NR(1, 27),
> IMX_GPIO_NR(1, 26),
> };
>
> static void get_som_revision(void)
> {
> int i;
> int rc;
>
> som_revision = 0;
>
> SETUP_IOMUX_PADS(boardcfg_pads);
>
> for (i = 0; i < ARRAY_SIZE(boardcfg_gpio); ++i) {
> int v;
>
> rc = gpio_request(boardcfg_gpio[i], "som-revision-gpio");
> if (rc) {
> printf("%s(): gpio request %d failed\n", __func__, i);
> som_revision = -1;
> return;
> }
>
> gpio_direction_input(boardcfg_gpio[i]);
> v = gpio_get_value(boardcfg_gpio[i]);
>
> if ((v == 0) || (v == 1))
> som_revision |= v << i;
> else {
> som_revision = -1;
> return;
> }
> }
> }
>
> int board_early_init_f(void)
> {
> setup_iomux_uart();
> get_som_revision();
>
> return 0;
> }
>
> 

Well driver model needs the device tree to init, for example DM_GPIO
cannot operate without one unless you are hacking around with
platdata, which is a bit of a pain.

One option you might have is to use a general DT before relocation,
then figure out which one you really want to use and select that for
post relocation. That works better with driver model.

Regards,
Simon


[PATCH v3 3/3] cmd: avb: remove mmc naming from generic block code

2022-07-20 Thread Andrii Chepurnyi
From: Andrii Chepurnyi 

From: Andrii Chepurnyi 

Part of avb code uses mmc notation, but in fact
it uses generic block functions.

Signed-off-by: Andrii Chepurnyi 
---
 common/avb_verify.c  | 52 ++--
 include/avb_verify.h | 13 +--
 2 files changed, 32 insertions(+), 33 deletions(-)

diff --git a/common/avb_verify.c b/common/avb_verify.c
index e086dc6760..3c9594d6d7 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -253,10 +253,10 @@ char *avb_set_enforce_verity(const char *cmdline)
 
 /**
  * 
- * IO(mmc) auxiliary functions
+ * IO auxiliary functions
  * 
  */
-static unsigned long mmc_read_and_flush(struct mmc_part *part,
+static unsigned long blk_read_and_flush(struct blk_part *part,
lbaint_t start,
lbaint_t sectors,
void *buffer)
@@ -291,7 +291,7 @@ static unsigned long mmc_read_and_flush(struct mmc_part 
*part,
tmp_buf = buffer;
}
 
-   blks = blk_dread(part->mmc_blk,
+   blks = blk_dread(part->blk,
 start, sectors, tmp_buf);
/* flush cache after read */
flush_cache((ulong)tmp_buf, sectors * part->info.blksz);
@@ -302,7 +302,7 @@ static unsigned long mmc_read_and_flush(struct mmc_part 
*part,
return blks;
 }
 
-static unsigned long mmc_write(struct mmc_part *part, lbaint_t start,
+static unsigned long blk_write(struct blk_part *part, lbaint_t start,
   lbaint_t sectors, void *buffer)
 {
void *tmp_buf;
@@ -330,37 +330,37 @@ static unsigned long mmc_write(struct mmc_part *part, 
lbaint_t start,
tmp_buf = buffer;
}
 
-   return blk_dwrite(part->mmc_blk,
+   return blk_dwrite(part->blk,
  start, sectors, tmp_buf);
 }
 
-static struct mmc_part *get_partition(AvbOps *ops, const char *partition)
+static struct blk_part *get_partition(AvbOps *ops, const char *partition)
 {
int ret;
u8 dev_num;
-   struct mmc_part *part;
-   struct blk_desc *mmc_blk;
+   struct blk_part *part;
+   struct blk_desc *blk;
 
-   part = malloc(sizeof(struct mmc_part));
+   part = malloc(sizeof(struct blk_part));
if (!part)
return NULL;
 
dev_num = get_boot_device(ops);
-   mmc_blk = get_blk(ops);
+   blk = get_blk(ops);
 
-   if (!mmc_blk) {
+   if (!blk) {
printf("Error - failed to obtain block descriptor\n");
goto err;
}
 
-   ret = part_get_info_by_name(mmc_blk, partition, >info);
+   ret = part_get_info_by_name(blk, partition, >info);
if (ret < 0) {
printf("Can't find partition '%s'\n", partition);
goto err;
}
 
part->dev_num = dev_num;
-   part->mmc_blk = mmc_blk;
+   part->blk = blk;
 
return part;
 err:
@@ -368,16 +368,16 @@ err:
return NULL;
 }
 
-static AvbIOResult mmc_byte_io(AvbOps *ops,
+static AvbIOResult blk_byte_io(AvbOps *ops,
   const char *partition,
   s64 offset,
   size_t num_bytes,
   void *buffer,
   size_t *out_num_read,
-  enum mmc_io_type io_type)
+  enum io_type io_type)
 {
ulong ret;
-   struct mmc_part *part;
+   struct blk_part *part;
u64 start_offset, start_sector, sectors, residue;
u8 *tmp_buf;
size_t io_cnt = 0;
@@ -410,7 +410,7 @@ static AvbIOResult mmc_byte_io(AvbOps *ops,
}
 
if (io_type == IO_READ) {
-   ret = mmc_read_and_flush(part,
+   ret = blk_read_and_flush(part,
 part->info.start +
 start_sector,
 1, tmp_buf);
@@ -427,7 +427,7 @@ static AvbIOResult mmc_byte_io(AvbOps *ops,
tmp_buf += (start_offset % part->info.blksz);
memcpy(buffer, (void *)tmp_buf, residue);
} else {
-   ret = mmc_read_and_flush(part,
+   ret = blk_read_and_flush(part,
 part->info.start +
 start_sector,
 1, tmp_buf);
@@ -441,7 +441,7 @@ static AvbIOResult mmc_byte_io(AvbOps *ops,
  

[PATCH v3 2/3] cmd: avb: introduce optional interface parameter to avb init

2022-07-20 Thread Andrii Chepurnyi
From: Andrii Chepurnyi 

From: Andrii Chepurnyi 

Originally, avb implementation relay on mmc block devices.
The interface parameter will give the ability to use avb with
various block devices by choosing the exact interface type.
By default (if no interface parameter is provided) mmc interface
will be used.

Acked-by: Igor Opaniuk 
Signed-off-by: Andrii Chepurnyi 
---
 cmd/avb.c| 13 +
 common/avb_verify.c  | 28 ++--
 doc/android/avb2.rst |  2 +-
 include/avb_verify.h | 11 ++-
 4 files changed, 26 insertions(+), 28 deletions(-)

diff --git a/cmd/avb.c b/cmd/avb.c
index 783f51b816..6fdbdc708f 100644
--- a/cmd/avb.c
+++ b/cmd/avb.c
@@ -17,17 +17,14 @@ static struct AvbOps *avb_ops;
 
 int do_avb_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-   unsigned long mmc_dev;
-
-   if (argc != 2)
+   if (argc != 2 && argc != 3)
return CMD_RET_USAGE;
 
-   mmc_dev = hextoul(argv[1], NULL);
-
if (avb_ops)
avb_ops_free(avb_ops);
 
-   avb_ops = avb_ops_alloc(mmc_dev);
+   avb_ops = avb_ops_alloc(argv[1], (argc == 3) ? argv[2] : "mmc");
+
if (avb_ops)
return CMD_RET_SUCCESS;
 
@@ -419,7 +416,7 @@ int do_avb_write_pvalue(struct cmd_tbl *cmdtp, int flag, 
int argc,
 }
 
 static struct cmd_tbl cmd_avb[] = {
-   U_BOOT_CMD_MKENT(init, 2, 0, do_avb_init, "", ""),
+   U_BOOT_CMD_MKENT(init, 3, 0, do_avb_init, "", ""),
U_BOOT_CMD_MKENT(read_rb, 2, 0, do_avb_read_rb, "", ""),
U_BOOT_CMD_MKENT(write_rb, 3, 0, do_avb_write_rb, "", ""),
U_BOOT_CMD_MKENT(is_unlocked, 1, 0, do_avb_is_unlocked, "", ""),
@@ -455,7 +452,7 @@ static int do_avb(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
 U_BOOT_CMD(
avb, 29, 0, do_avb,
"Provides commands for testing Android Verified Boot 2.0 functionality",
-   "init  - initialize avb2 for \n"
+   "init  [] - initialize avb2 for  []\n"
"avb read_rb  - read rollback index at location \n"
"avb write_rb   - write rollback index  to \n"
"avb is_unlocked - returns unlock status of the device\n"
diff --git a/common/avb_verify.c b/common/avb_verify.c
index 0520a71455..e086dc6760 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -338,7 +338,6 @@ static struct mmc_part *get_partition(AvbOps *ops, const 
char *partition)
 {
int ret;
u8 dev_num;
-   int part_num = 0;
struct mmc_part *part;
struct blk_desc *mmc_blk;
 
@@ -347,22 +346,8 @@ static struct mmc_part *get_partition(AvbOps *ops, const 
char *partition)
return NULL;
 
dev_num = get_boot_device(ops);
-   part->mmc = find_mmc_device(dev_num);
-   if (!part->mmc) {
-   printf("No MMC device at slot %x\n", dev_num);
-   goto err;
-   }
-
-   if (mmc_init(part->mmc)) {
-   printf("MMC initialization failed\n");
-   goto err;
-   }
+   mmc_blk = get_blk(ops);
 
-   ret = mmc_switch_part(part->mmc, part_num);
-   if (ret)
-   goto err;
-
-   mmc_blk = mmc_get_blk_desc(part->mmc);
if (!mmc_blk) {
printf("Error - failed to obtain block descriptor\n");
goto err;
@@ -976,7 +961,8 @@ free_name:
  * AVB2.0 AvbOps alloc/initialisation/free
  * 
  */
-AvbOps *avb_ops_alloc(int boot_device)
+
+AvbOps *avb_ops_alloc(const char *boot_device, const char *interface)
 {
struct AvbOpsData *ops_data;
 
@@ -999,7 +985,13 @@ AvbOps *avb_ops_alloc(int boot_device)
ops_data->ops.read_persistent_value = read_persistent_value;
 #endif
ops_data->ops.get_size_of_partition = get_size_of_partition;
-   ops_data->mmc_dev = boot_device;
+   ops_data->mmc_dev = simple_strtoul(boot_device, NULL, 16);
+   ops_data->blk = NULL;
+   if (interface && (blk_get_device_by_str(interface, boot_device, 
_data->blk) < 0)) {
+   printf("Error - failed to obtain block descriptor for devce=%s 
if=%s\n",
+  boot_device, interface);
+   return NULL;
+   }
 
return _data->ops;
 }
diff --git a/doc/android/avb2.rst b/doc/android/avb2.rst
index a072119574..8fa54338fd 100644
--- a/doc/android/avb2.rst
+++ b/doc/android/avb2.rst
@@ -38,7 +38,7 @@ AVB 2.0 U-Boot shell commands
 Provides CLI interface to invoke AVB 2.0 verification + misc. commands for
 different testing purposes::
 
-avb init  - initialize avb 2.0 for 
+avb init  [] - initialize avb2 for  []
 avb verify - run verification process using hash data from vbmeta structure
 avb read_rb  - read rollback index at location 
 avb write_rb   - write rollback index  to 
diff --git a/include/avb_verify.h b/include/avb_verify.h
index 1e787ba666..ff70cb26f8 100644
--- a/include/avb_verify.h
+++ 

[PATCH v2] Improve Windows build documentation

2022-07-20 Thread Martin Bonner
I have recently build the u-boot tools on Windows and ran into
difficulties.  This patch to the documentation would have avoided
those difficulties.  Contentious points:

* While I have run the document through a rst previewer, I haven't run
the full test suite.  I know, I know, everyone thinks _they_ don't
need to run the tests because reasons, but I think it's true this
time.
* I have removed the version numbers from the list of packages.  I
don't think they are helpful, and are just maintenance overhead.  (I
don't think I got those versions for example).

I'd be grateful if @Bin Meng could review this, because `git blame`
says the file I am changing is all his.

No actual changes, but hopefully closer to the required formalities:

Signed-off-by: Martin Bonner 

commit e3615603d919ab19fddbee4a68e8a37b91a75f3e (HEAD ->
better-windows-build-doc)
Author: Martin Bonner 
Date:   Tue Jul 5 09:10:59 2022 +0100

Tweak docs for building tools on Windows

* Add three more modules that are required.
* Remove the version numbers (because they are hard to keep in sync)
* Add a pacman command line to install everything.

diff --git a/doc/build/tools.rst b/doc/build/tools.rst
index c06f915274..95f1246617 100644
--- a/doc/build/tools.rst
+++ b/doc/build/tools.rst
@@ -24,14 +24,20 @@ you can use MSYS2, a software distro and building
platform for Windows.
 Download the MSYS2 installer from https://www.msys2.org. Make sure you have
 installed all required packages below in order to build these host tools::

-   * gcc (9.1.0)
-   * make (4.2.1)
-   * bison (3.4.2)
-   * diffutils (3.7)
-   * openssl-devel (1.1.1.d)
-
-Note the version numbers in these parentheses above are the package versions
-at the time being when writing this document. The MSYS2 installer tested is
+   * gcc
+   * make
+   * bison
+   * diffutils
+   * openssl-devel
+   * flex
+   * libgnutls-devel
+   * libuuid-devel
+
+You probably want ``git`` as well.  You can install all these with::
+
+$ pacman -S gcc make bison diffutils openssl=devel flex
libgnutls-devel libuuid-devel git
+
+The MSYS2 installer tested is
 http://repo.msys2.org/distrib/x86_64/msys2-x86_64-20190524.exe.

 There are 3 MSYS subsystems installed: MSYS2, MinGW32 and MinGW64. Each

-- 

Martin


[PATCH v3 1/3] cmd: bcb: introduce optional interface parameter to bcb

2022-07-20 Thread Andrii Chepurnyi
From: Andrii Chepurnyi 

From: Andrii Chepurnyi 

Originally, bcb implementation relay on mmc block devices.
The interface parameter will give the ability to use bcb with
various block devices by choosing the exact interface type.
By default (if no interface parameter is provided) mmc interface
will be used.

Reviewed-by: Igor Opaniuk 
Signed-off-by: Andrii Chepurnyi 
---
 cmd/bcb.c   | 65 +++--
 doc/android/bcb.rst | 33 ---
 2 files changed, 51 insertions(+), 47 deletions(-)

diff --git a/cmd/bcb.c b/cmd/bcb.c
index 92f4d27990..bfe395558e 100644
--- a/cmd/bcb.c
+++ b/cmd/bcb.c
@@ -26,6 +26,7 @@ enum bcb_cmd {
 static int bcb_dev = -1;
 static int bcb_part = -1;
 static struct bootloader_message bcb __aligned(ARCH_DMA_MINALIGN) = { { 0 } };
+static struct blk_desc *bcb_blk_desc;
 
 static int bcb_cmd_get(char *cmd)
 {
@@ -51,6 +52,9 @@ static int bcb_is_misused(int argc, char *const argv[])
 
switch (cmd) {
case BCB_CMD_LOAD:
+   if (argc != 3 && argc != 4)
+   goto err;
+   break;
case BCB_CMD_FIELD_SET:
if (argc != 3)
goto err;
@@ -115,25 +119,23 @@ static int bcb_field_get(char *name, char **fieldp, int 
*sizep)
 
 static int __bcb_load(int devnum, const char *partp)
 {
-   struct blk_desc *desc;
struct disk_partition info;
u64 cnt;
char *endp;
int part, ret;
 
-   desc = blk_get_devnum_by_type(IF_TYPE_MMC, devnum);
-   if (!desc) {
+   if (!bcb_blk_desc) {
ret = -ENODEV;
goto err_read_fail;
}
 
part = simple_strtoul(partp, , 0);
if (*endp == '\0') {
-   ret = part_get_info(desc, part, );
+   ret = part_get_info(bcb_blk_desc, part, );
if (ret)
goto err_read_fail;
} else {
-   part = part_get_info_by_name(desc, partp, );
+   part = part_get_info_by_name(bcb_blk_desc, partp, );
if (part < 0) {
ret = part;
goto err_read_fail;
@@ -144,12 +146,12 @@ static int __bcb_load(int devnum, const char *partp)
if (cnt > info.size)
goto err_too_small;
 
-   if (blk_dread(desc, info.start, cnt, ) != cnt) {
+   if (blk_dread(bcb_blk_desc, info.start, cnt, ) != cnt) {
ret = -EIO;
goto err_read_fail;
}
 
-   bcb_dev = desc->devnum;
+   bcb_dev = bcb_blk_desc->devnum;
bcb_part = part;
debug("%s: Loaded from mmc %d:%d\n", __func__, bcb_dev, bcb_part);
 
@@ -170,15 +172,15 @@ err:
 static int do_bcb_load(struct cmd_tbl *cmdtp, int flag, int argc,
   char * const argv[])
 {
-   char *endp;
-   int devnum = simple_strtoul(argv[1], , 0);
+   int ret = blk_get_device_by_str((argv[3]) ? argv[3] : "mmc", argv[1], 
_blk_desc);
 
-   if (*endp != '\0') {
-   printf("Error: Device id '%s' not a number\n", argv[1]);
+   if (ret < 0) {
+   printf("Error: Device id '%s' or interface '%s' is not 
valid\n", argv[1],
+  (argv[3]) ? argv[3] : "mmc");
return CMD_RET_FAILURE;
}
 
-   return __bcb_load(devnum, argv[2]);
+   return __bcb_load(bcb_blk_desc->devnum, argv[2]);
 }
 
 static int __bcb_set(char *fieldp, const char *valp)
@@ -281,24 +283,22 @@ static int do_bcb_dump(struct cmd_tbl *cmdtp, int flag, 
int argc,
 
 static int __bcb_store(void)
 {
-   struct blk_desc *desc;
struct disk_partition info;
u64 cnt;
int ret;
 
-   desc = blk_get_devnum_by_type(IF_TYPE_MMC, bcb_dev);
-   if (!desc) {
+   if (!bcb_blk_desc) {
ret = -ENODEV;
goto err;
}
 
-   ret = part_get_info(desc, bcb_part, );
+   ret = part_get_info(bcb_blk_desc, bcb_part, );
if (ret)
goto err;
 
cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), info.blksz);
 
-   if (blk_dwrite(desc, info.start, cnt, ) != cnt) {
+   if (blk_dwrite(bcb_blk_desc, info.start, cnt, ) != cnt) {
ret = -EIO;
goto err;
}
@@ -373,21 +373,22 @@ static int do_bcb(struct cmd_tbl *cmdtp, int flag, int 
argc, char *const argv[])
 U_BOOT_CMD(
bcb, CONFIG_SYS_MAXARGS, 1, do_bcb,
"Load/set/clear/test/dump/store Android BCB fields",
-   "load  - load  BCB from mmc :\n"
-   "bcb set  - set   BCB  to \n"
-   "bcb clear []  - clear BCB  or all fields\n"
-   "bcb test - test  BCB  against \n"
-   "bcb dump  - dump  BCB \n"
-   "bcb store- store BCB back to mmc\n"
+   "load[]   - load  BCB from 
:[]\n"
+   "bcb set- set   BCB  to \n"
+   "bcb clear []- clear 

[PATCH v3 0/3] Support various block interfaces for avb and bcb

2022-07-20 Thread Andrii Chepurnyi
Hello.

Originally bcb and avb utilities implementation relay on mmc block devices.
This patch series adds an optional interface parameter to those utilities,
which gives the ability to use bcb and avb on various block devices.
The patch set was tested using xenguest_arm64 based board and pvblock interface.

Changes for v3:
  - Added RB and ACK
  - Added patch #3 by the request

Changes for v2:
  - Removed patch #3 as not actual for mainline

Andrii Chepurnyi (3):
  cmd: bcb: introduce optional interface parameter to bcb
  cmd: avb: introduce optional interface parameter to avb init
  cmd: avb: remove mmc naming from generic block code

 cmd/avb.c| 13 +++-
 cmd/bcb.c| 65 ++---
 common/avb_verify.c  | 76 
 doc/android/avb2.rst |  2 +-
 doc/android/bcb.rst  | 33 ++-
 include/avb_verify.h | 24 +-
 6 files changed, 107 insertions(+), 106 deletions(-)

-- 
2.25.1



Error: unrecognized opcode on riscv64

2022-07-20 Thread Alex
Attempting to compile the latest master code for qemu (virt) and the unmatched 
shows the following error:

  arch/riscv/cpu/cpu.c: Assembler messages:
  arch/riscv/cpu/cpu.c:96: Error: unrecognized opcode `csrs sstatus,a5'
  arch/riscv/cpu/cpu.c:97: Error: unrecognized opcode `csrw 0x003,0'


Any ideas on what's going on?

Toolchain:

  riscv64-linux-gnu-gcc   -  gcc version 12.1.0 (GCC) 
  riscv64-linux-gnu-as -  GNU assembler (GNU Binutils) 2.36.1

Compiling on ArchLinux


 -- Alex


Re: [PATCH v5 19/23] FWU: synquacer: Add FWU Multi bank update support for DeveloperBox

2022-07-20 Thread Jassi Brar
On Wed, Jul 20, 2022 at 2:54 AM Ilias Apalodimas
 wrote:
>
> Hi Jassi,
>
> On Tue, 19 Jul 2022 at 18:27, Jassi Brar  wrote:
> >
> > On Mon, 18 Jul 2022 at 16:00, Tom Rini  wrote:
> > > On Mon, Jul 18, 2022 at 10:31:56AM -0500, Jassi Brar wrote:
> >
> > > > > > > >
> > > > > > > > > > +
> > > > > > > > > > +#define PLAT_METADATA_OFFSET 0x51
> > > > > > > > > > +#define PLAT_METADATA_SIZE   (sizeof(struct 
> > > > > > > > > > devbox_metadata))
> > > > > > > > > > +
> > > > > > > > > > +struct __packed devbox_metadata {
> > > > > > > > > > + u32 boot_index;
> > > > > > > > > > + u32 boot_count;
> > > > > > > > >
> > > > > > > > > There is the whole bootcount infrastructure for this. I think 
> > > > > > > > > it would be much
> > > > > > > > > better to use that framework instead of creating parallel one.
> > > > > > > > >
> > > > > > > > Yes, this goes too.
> > > > > > >
> > > > > > > Is bootcount really suited for this case?
> > > > > > > AFAIK bootcount either requires device specific registers (which 
> > > > > > > won't
> > > > > > > reset on reboots), or an environment you can write data to.
> > > > > > > But what if a user wants to disable writing the env variables and 
> > > > > > > the
> > > > > > > device doesn't have a set of registers we can use?
> > > > > > >
> > > > > > Maybe it should be moved in 'struct fwu_mdata' ?
> > > > >
> > > > > I was mostly thinking on moving this count as another 'bootcount'
> > > > > method.  So in case the user has disabled writing evn variables but he
> > > > > is booting with EFI he can use that.
> > > >
> > > > Sorry, not sure I understand IIUIC there has to be some persistent 
> > > > storage.
> > >
> > > No, there just has to be "somewhere" to do the counting.  We've got a
> > > DDR backed driver, for example.  So yes, I think we should try and use
> > > the bootcount framework here.
> > >
> > OK, for platforms that can preserve ram across reboot, using
> > non-persistent storage can work.
> > My platform neither preserves ram, nor has any warmreset-proof
> > registers. So I have to choose between saving the bootcount in efi-env
> > or in vendor specific structure next to the metadata. I prefer
> > metadata because it is common to all stages of boot. Any corrections
> > to this approach?
>
> The metadata is defined by a spec and they don't have a field for
> bootcounting.  Once Sughosh resends his patches he'll include a
> bootcount backend that reuses EFI variables.  Can't we just use that?
>
Yes, I am aware metadata spec has no provision of vendor data. But
there is nothing illegal in appending vendor-data to metadata and that
is trivial to implement ... basically use   sizeof(struct fwu_mdata) +
sizeof(struct sni_vendor_mdata)  while read/write meta-data. That will
also be zero extra-overhead.

fwu-mdata {
   compatible = "u-boot,fwu-mdata-mtd";
   fwu-mdata-store = <_flash>;
   mdata-offsets = <0x50 0x53>;
   vendor-data-size = <0x100>;   // optional
};

Sure we can use an efi variable, but I see more uses of vendor-data
:- shared among BL1/BL2/BL3x/OS so we can emulate reset-syndrome,
crash-logging, per-image bootcount etc when the h/w doesn't support
these features.

Ofcourse, please feel free to implement efi-variables still.

thanks.


Re: [RESEND v9 7/9] bootmenu: add removable media entries

2022-07-20 Thread Ilias Apalodimas
Hi Kojima-san

[...]

> +
> +   /* add non-existent boot option */
> +   for (i = 0; i < count; i++) {
> +   u32 boot_index;
> +   u16 var_name[9];
> +
> +   if (!opt[i].exist) {
> +   ret = eficonfig_get_unused_bootoption(var_name, 
> sizeof(var_name),
> + _index);
> +   if (ret != EFI_SUCCESS)
> +   goto out;
> +
> +   ret = efi_set_variable_int(var_name, 
> _global_variable_guid,
> +  EFI_VARIABLE_NON_VOLATILE |
> +  
> EFI_VARIABLE_BOOTSERVICE_ACCESS |
> +  
> EFI_VARIABLE_RUNTIME_ACCESS,
> +  opt[i].size, opt[i].lo, 
> false);
> +   if (ret != EFI_SUCCESS)
> +   goto out;
> +
> +   ret = eficonfig_append_bootorder(boot_index);
> +   if (ret != EFI_SUCCESS)
> +   goto out;
> +   }

Should we got through the trouble on removing the variable we just added?

[...]

>
> diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
> index 51d4e36a54..564ddd02c1 100644
> --- a/cmd/eficonfig.c
> +++ b/cmd/eficonfig.c
> @@ -1786,6 +1786,131 @@ static efi_status_t 
> eficonfig_process_delete_boot_option(void *data)
> return ret;
>  }
>
> +efi_status_t eficonfig_enumerate_boot_option(struct 
> eficonfig_media_boot_option *opt,
> +efi_handle_t *volume_handles, 
> efi_status_t count)
> +{
> +   u32 i;
> +   struct efi_handler *handler;
> +   efi_status_t ret = EFI_SUCCESS;
> +
> +   for (i = 0; i < count; i++) {
> +   char *optional_data;
> +   u16 *dev_name, *p;
> +   struct efi_load_option lo;
> +   char buf[BOOTMENU_DEVICE_NAME_MAX];
> +   struct efi_device_path *device_path;
> +
> +   ret = efi_search_protocol(volume_handles[i], 
> _guid_device_path, );
> +   if (ret != EFI_SUCCESS)
> +   continue;
> +   ret = efi_protocol_open(handler, (void **)_path,
> +   efi_root, NULL, 
> EFI_OPEN_PROTOCOL_GET_PROTOCOL);
> +   if (ret != EFI_SUCCESS)
> +   continue;
> +
> +   ret = efi_disk_get_device_name(volume_handles[i], buf, 
> BOOTMENU_DEVICE_NAME_MAX);
> +   if (ret != EFI_SUCCESS)
> +   continue;
> +
> +   dev_name = calloc(1, (strlen(buf) + 1) * sizeof(u16));
> +   if (!dev_name) {
> +   ret = EFI_OUT_OF_RESOURCES;
> +   goto out;
> +   }

Just allocate an array in the stack

> +   p = dev_name;
> +   utf8_utf16_strncpy(, buf, strlen(buf));
> +
> +   lo.label = dev_name;
> +   lo.attributes = LOAD_OPTION_ACTIVE;
> +   lo.file_path = device_path;
> +   lo.file_path_length = efi_dp_size(device_path) + sizeof(END);
> +   /*
> +* Set the dedicated guid to optional_data, it is used to 
> identify
> +* the boot option that automatically generated by the 
> bootmenu.
> +* efi_serialize_load_option() expects optional_data is 
> null-terminated
> +* utf8 string, so set the "1234567" string to allocate 
> enough space

[...]

Thanks
/Ilias


[PATCH 40/53] imx: imx93_evk: Add basic board support

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add basic board codes and defconfig for i.MX93 11x11 EVK board.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/dts/Makefile  |3 +
 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi   |  157 +++
 arch/arm/dts/imx93-11x11-evk.dts   |  527 +++
 arch/arm/mach-imx/imx9/Kconfig |   12 +
 board/freescale/common/Makefile|2 +-
 board/freescale/imx93_evk/Kconfig  |   19 +
 board/freescale/imx93_evk/MAINTAINERS  |6 +
 board/freescale/imx93_evk/Makefile |   12 +
 board/freescale/imx93_evk/imx93_evk.c  |   58 +
 board/freescale/imx93_evk/lpddr4x_timing.c | 1486 
 board/freescale/imx93_evk/spl.c|  126 ++
 configs/imx93_11x11_evk_defconfig  |  108 ++
 include/configs/imx93_evk.h|  145 ++
 13 files changed, 2660 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx93-11x11-evk.dts
 create mode 100644 board/freescale/imx93_evk/Kconfig
 create mode 100644 board/freescale/imx93_evk/MAINTAINERS
 create mode 100644 board/freescale/imx93_evk/Makefile
 create mode 100644 board/freescale/imx93_evk/imx93_evk.c
 create mode 100644 board/freescale/imx93_evk/lpddr4x_timing.c
 create mode 100644 board/freescale/imx93_evk/spl.c
 create mode 100644 configs/imx93_11x11_evk_defconfig
 create mode 100644 include/configs/imx93_evk.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 66c719908cd..1f0bb221d88 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -971,6 +971,9 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-pico-pi.dtb \
imx8mq-kontron-pitx-imx8m.dtb
 
+dtb-$(CONFIG_ARCH_IMX9) += \
+   imx93-11x11-evk.dtb
+
 dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
imxrt1020-evk.dtb
 
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi 
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
new file mode 100644
index 000..6f02b389893
--- /dev/null
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ */
+
+/ {
+   wdt-reboot {
+   compatible = "wdt-reboot";
+   wdt = <>;
+   u-boot,dm-spl;
+   };
+
+   aliases {
+   usbgadget0 = 
+   usbgadget1 = 
+   };
+
+   usbg1: usbg1 {
+   compatible = "fsl,imx27-usb-gadget";
+   dr_mode = "peripheral";
+   chipidea,usb = <>;
+   status = "okay";
+   };
+
+   usbg2: usbg2 {
+   compatible = "fsl,imx27-usb-gadget";
+   dr_mode = "peripheral";
+   chipidea,usb = <>;
+   status = "okay";
+   };
+
+   firmware {
+   optee {
+   compatible = "linaro,optee-tz";
+   method = "smc";
+   };
+   };
+};
+
+&{/soc@0} {
+   u-boot,dm-pre-reloc;
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+_usdhc2_vmmc {
+   u-boot,off-on-delay-us = <2>;
+   u-boot,dm-spl;
+};
+
+_reg_usdhc2_vmmc {
+   u-boot,dm-spl;
+};
+
+_uart1 {
+   u-boot,dm-spl;
+};
+
+_usdhc2_gpio {
+   u-boot,dm-spl;
+};
+
+_usdhc2 {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+   fsl,signal-voltage-switch-extra-delay-ms = <8>;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+&{/soc@0/bus@4400/i2c@4435/pmic@25} {
+   u-boot,dm-spl;
+};
+
+&{/soc@0/bus@4400/i2c@4435/pmic@25/regulators} {
+   u-boot,dm-spl;
+};
+
+_lpi2c2 {
+   u-boot,dm-spl;
+};
+
+ {
+   phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
+   phy-reset-duration = <15>;
+   phy-reset-post-delay = <100>;
+};
+
+ {
+   compatible = "fsl,imx-eqos";
+};
+
+ {
+   reset-gpios = < 15 GPIO_ACTIVE_LOW>;
+   reset-assert-us = <15000>;
+   reset-deassert-us = <10>;
+};
+
+ {
+   status = "okay";
+   extcon = <>;
+};
+
+ {
+   status = "okay";
+   extcon = <_2>;
+};
+
+ {
+   u-boot,dm-spl;
+   status = "okay";
+};
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
new file mode 100644
index 000..b3a5a3d71e2
--- /dev/null
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -0,0 +1,527 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 NXP
+ */
+
+/dts-v1/;
+
+#include "imx93.dtsi"
+
+/{
+   chosen {
+   stdout-path = 
+   };
+
+   reserved-memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   

[PATCH 53/53] imx: imx8mm-icore: migrate to use BINMAN

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Use BINMAN instead of imx specific packing method.

Signed-off-by: Peng Fan 
Reviewed-by: Alper Nebi Yasak 
---
 arch/arm/mach-imx/imx8m/Kconfig |  1 +
 arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg | 10 +-
 configs/imx8mm-icore-mx8mm-ctouch2_defconfig|  2 +-
 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig   |  2 +-
 4 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 09b9d5603d0..979b30ae39c 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -69,6 +69,7 @@ config TARGET_IMX8MM_EVK
 
 config TARGET_IMX8MM_ICORE_MX8MM
bool "Engicam i.Core MX8M Mini SOM"
+   select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
diff --git a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg 
b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg
index e06d53ef417..5dcb8ae72f0 100644
--- a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg
+++ b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg
@@ -3,13 +3,5 @@
  * Copyright 2019 NXP
  */
 
-
-FIT
 BOOT_FROM  sd
-LOADER spl/u-boot-spl-ddr.bin  0x7E1000
-SECOND_LOADER  u-boot.itb  0x4020 0x6
-
-DDR_FW lpddr4_pmu_train_1d_imem.bin
-DDR_FW lpddr4_pmu_train_1d_dmem.bin
-DDR_FW lpddr4_pmu_train_2d_imem.bin
-DDR_FW lpddr4_pmu_train_2d_dmem.bin
+LOADER u-boot-spl-ddr.bin  0x7E1000
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig 
b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index b9fb3c69cb7..cb1a8d45da5 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -20,7 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x3000
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb"
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig 
b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index 1149bb68c04..a6482b65a6e 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -20,7 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x3000
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb"
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-- 
2.36.0



[PATCH 08/53] imx: add USB2_BOOT type

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add USB2_BOOT type for i.MX8ULP and i.MX9

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/boot_mode.h | 1 +
 arch/arm/mach-imx/imx_romapi.c| 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/mach-imx/boot_mode.h 
b/arch/arm/include/asm/mach-imx/boot_mode.h
index 6dc58559680..a568c443722 100644
--- a/arch/arm/include/asm/mach-imx/boot_mode.h
+++ b/arch/arm/include/asm/mach-imx/boot_mode.h
@@ -29,6 +29,7 @@ enum boot_device {
QSPI_BOOT,
FLEXSPI_BOOT,
USB_BOOT,
+   USB2_BOOT,
UNKNOWN_BOOT,
BOOT_DEV_NUM = UNKNOWN_BOOT,
 };
diff --git a/arch/arm/mach-imx/imx_romapi.c b/arch/arm/mach-imx/imx_romapi.c
index 3b2cc6935dc..0f94091fc53 100644
--- a/arch/arm/mach-imx/imx_romapi.c
+++ b/arch/arm/mach-imx/imx_romapi.c
@@ -50,7 +50,7 @@ enum boot_device get_boot_device(void)
boot_dev = QSPI_BOOT;
break;
case BT_DEV_TYPE_USB:
-   boot_dev = USB_BOOT;
+   boot_dev = boot_instance + USB_BOOT;
break;
default:
break;
-- 
2.36.0



[PATCH 13/53] imx: imx9: Add CCM and clock API support

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add clock API to support CCM root clock and LPCG setting
Set the CCM AUTHEN register to allow non-secure world to set
root clock and lpcg.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/ccm_regs.h | 266 
 arch/arm/include/asm/arch-imx9/clock.h| 239 +++
 arch/arm/include/asm/arch-imx9/imx-regs.h |   6 +-
 arch/arm/mach-imx/imx9/Makefile   |   2 +-
 arch/arm/mach-imx/imx9/clock.c| 769 +-
 arch/arm/mach-imx/imx9/clock_root.c   | 438 
 arch/arm/mach-imx/imx9/soc.c  |   3 +
 7 files changed, 1720 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-imx9/ccm_regs.h
 create mode 100644 arch/arm/mach-imx/imx9/clock_root.c

diff --git a/arch/arm/include/asm/arch-imx9/ccm_regs.h 
b/arch/arm/include/asm/arch-imx9/ccm_regs.h
new file mode 100644
index 000..d326a6ea516
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx9/ccm_regs.h
@@ -0,0 +1,266 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __ASM_ARCH_IMX9_CCM_REGS_H__
+#define __ASM_ARCH_IMX9_CCM_REGS_H__
+#define IMX93_CLK_ROOT_MAX 95
+#define IMX93_CLK_CCGR_MAX 127
+
+#define ARM_A55_PERIPH_CLK_ROOT0
+#define ARM_A55_MTR_BUS_CLK_ROOT   1
+#define ARM_A55_CLK_ROOT   2
+#define M33_CLK_ROOT   3
+#define SENTINEL_CLK_ROOT  4
+#define BUS_WAKEUP_CLK_ROOT5
+#define BUS_AON_CLK_ROOT   6
+#define WAKEUP_AXI_CLK_ROOT7
+#define SWO_TRACE_CLK_ROOT 8
+#define M33_SYSTICK_CLK_ROOT   9
+#define FLEXIO1_CLK_ROOT   10
+#define FLEXIO2_CLK_ROOT   11
+#define LPIT1_CLK_ROOT 12
+#define LPIT2_CLK_ROOT 13
+#define LPTMR1_CLK_ROOT14
+#define LPTMR2_CLK_ROOT15
+#define TPM1_CLK_ROOT  16
+#define TPM2_CLK_ROOT  17
+#define TPM3_CLK_ROOT  18
+#define TPM4_CLK_ROOT  19
+#define TPM5_CLK_ROOT  20
+#define TPM6_CLK_ROOT  21
+#define FLEXSPI1_CLK_ROOT  22
+#define CAN1_CLK_ROOT  23
+#define CAN2_CLK_ROOT  24
+#define LPUART1_CLK_ROOT   25
+#define LPUART2_CLK_ROOT   26
+#define LPUART3_CLK_ROOT   27
+#define LPUART4_CLK_ROOT   28
+#define LPUART5_CLK_ROOT   29
+#define LPUART6_CLK_ROOT   30
+#define LPUART7_CLK_ROOT   31
+#define LPUART8_CLK_ROOT   32
+#define LPI2C1_CLK_ROOT33
+#define LPI2C2_CLK_ROOT34
+#define LPI2C3_CLK_ROOT35
+#define LPI2C4_CLK_ROOT36
+#define LPI2C5_CLK_ROOT37
+#define LPI2C6_CLK_ROOT38
+#define LPI2C7_CLK_ROOT39
+#define LPI2C8_CLK_ROOT40
+#define LPSPI1_CLK_ROOT41
+#define LPSPI2_CLK_ROOT42
+#define LPSPI3_CLK_ROOT43
+#define LPSPI4_CLK_ROOT44
+#define LPSPI5_CLK_ROOT45
+#define LPSPI6_CLK_ROOT46
+#define LPSPI7_CLK_ROOT47
+#define LPSPI8_CLK_ROOT48
+#define I3C1_CLK_ROOT  49
+#define I3C2_CLK_ROOT  50
+#define USDHC1_CLK_ROOT51
+#define USDHC2_CLK_ROOT52
+#define USDHC3_CLK_ROOT53
+#define SAI1_CLK_ROOT  54
+#define SAI2_CLK_ROOT  55
+#define SAI3_CLK_ROOT  56
+#define CCM_CKO1_CLK_ROOT  57
+#define CCM_CKO2_CLK_ROOT  58
+#define CCM_CKO3_CLK_ROOT  59
+#define CCM_CKO4_CLK_ROOT  60
+#define HSIO_CLK_ROOT  61
+#define HSIO_USB_TEST_60M_CLK_ROOT 62
+#define HSIO_ACSCAN_80M_CLK_ROOT   63
+#define HSIO_ACSCAN_480M_CLK_ROOT  64
+#define NIC_CLK_ROOT   65
+#define NIC_APB_CLK_ROOT   66
+#define ML_APB_CLK_ROOT67
+#define ML_CLK_ROOT68
+#define MEDIA_AXI_CLK_ROOT 69
+#define MEDIA_APB_CLK_ROOT 70
+#define MEDIA_LDB_CLK_ROOT 71
+#define MEDIA_DISP_PIX_CLK_ROOT72
+#define CAM_PIX_CLK_ROOT   73
+#define MIPI_TEST_BYTE_CLK_ROOT74
+#define MIPI_PHY_CFG_CLK_ROOT  75
+#define DRAM_ALT_CLK_ROOT  76
+#define DRAM_APB_CLK_ROOT  77
+#define ADC_CLK_ROOT   78
+#define PDM_CLK_ROOT   79
+#define TSTMR1_CLK_ROOT80
+#define TSTMR2_CLK_ROOT81
+#define MQS1_CLK_ROOT 

[PATCH 52/53] arm: dts: imx8m: shrink ddr firmware size to actual file size

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.

Tested-by: Tim Harvey  #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan 
Reviewed-by: Alper Nebi Yasak 
---
 arch/arm/dts/imx8mm-u-boot.dtsi   | 8 
 arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi| 8 
 arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 4 ++--
 arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi  | 8 
 arch/arm/dts/imx8mn-evk-u-boot.dtsi   | 8 
 arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi  | 8 
 arch/arm/dts/imx8mn-venice-u-boot.dtsi| 8 
 arch/arm/dts/imx8mp-u-boot.dtsi   | 8 
 arch/arm/dts/imx8mq-cm-u-boot.dtsi| 8 
 arch/arm/dts/imx8mq-u-boot.dtsi   | 8 
 10 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 86f8e1a284b..8c48678625d 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -41,25 +41,25 @@
 
ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
-   size = <0x8000>;
+   align-end = <4>;
type = "blob-ext";
};
 
ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
-   size = <0x4000>;
+   align-end = <4>;
type = "blob-ext";
};
 
ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
-   size = <0x8000>;
+   align-end = <4>;
type = "blob-ext";
};
 
ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
-   size = <0x4000>;
+   align-end = <4>;
type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi 
b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index d28bb2b2ffe..5f839524028 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -149,26 +149,26 @@
 
ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
-   size = <0x8000>;
type = "blob-ext";
+   align-end = <4>;
};
 
ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
-   size = <0x4000>;
type = "blob-ext";
+   align-end = <4>;
};
 
ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
-   size = <0x8000>;
type = "blob-ext";
+   align-end = <4>;
};
 
ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
-   size = <0x4000>;
type = "blob-ext";
+   align-end = <4>;
};
};
 
diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi 
b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
index dc4cec250ef..c4ae7ca4f31 100644
--- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
@@ -113,13 +113,13 @@
 
ddr-1d-imem-fw {
filename = "ddr3_imem_1d.bin";
-   size = <0x8000>;
+   align-end = <4>;
type = "blob-ext";
};
 
ddr-1d-dmem-fw {
filename = "ddr3_dmem_1d.bin";
-   size = <0x4000>;
+   align-end = <4>;
type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi 
b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 30ef8bc47d9..78773c198e4 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -157,26 +157,26 @@
 
ddr-1d-imem-fw {
filename = "ddr4_imem_1d_201810.bin";
-   size = <0x8000>;
type = "blob-ext";
+   align-end = <4>;
};
 
ddr-1d-dmem-fw {
filename = "ddr4_dmem_1d_201810.bin";
-   size = <0x4000>;
type = "blob-ext";
+   align-end = <4>;
};
 
ddr-2d-imem-fw 

[PATCH 18/53] imx: imx9: support romapi

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.

Also include mmc env functions that use ROM API.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx8ulp/sys_proto.h |  4 --
 arch/arm/include/asm/mach-imx/sys_proto.h |  4 ++
 arch/arm/mach-imx/imx9/soc.c  | 37 +++
 3 files changed, 41 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h 
b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
index 05859dfc2aa..a7869fbb573 100644
--- a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
@@ -8,10 +8,6 @@
 
 #include 
 
-extern unsigned long rom_pointer[];
-
-ulong spl_romapi_raw_seekable_read(u32 offset, u32 size, void *buf);
-ulong spl_romapi_get_uboot_base(u32 image_offset, u32 rom_bt_dev);
 enum bt_mode get_boot_mode(void);
 int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 perm);
 int xrdc_config_pdac_openacc(u32 bridge, u32 index);
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h 
b/arch/arm/include/asm/mach-imx/sys_proto.h
index 05532ebea89..17c5f44b208 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -180,6 +180,10 @@ enum boot_dev_type_e {
 #define ROM_API_OKAY   0xF0
 
 extern struct rom_api *g_rom_api;
+extern unsigned long rom_pointer[];
+
+ulong spl_romapi_raw_seekable_read(u32 offset, u32 size, void *buf);
+ulong spl_romapi_get_uboot_base(u32 image_offset, u32 rom_bt_dev);
 
 /* For i.MX ULP */
 #define BT0CFG_LPBOOT_MASK 0x1
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 8b620832b5d..9ea2d51495b 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -29,6 +29,43 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct rom_api *g_rom_api = (struct rom_api *)0x1980;
+
+#ifdef CONFIG_ENV_IS_IN_MMC
+__weak int board_mmc_get_env_dev(int devno)
+{
+   return devno; }
+
+int mmc_get_env_dev(void)
+{
+   volatile gd_t *pgd = gd;
+   int ret;
+   u32 boot;
+   u16 boot_type;
+   u8 boot_instance;
+
+   ret = g_rom_api->query_boot_infor(QUERY_BT_DEV, ,
+ ((uintptr_t)) ^ QUERY_BT_DEV);
+   set_gd(pgd);
+
+   if (ret != ROM_API_OKAY) {
+   puts("ROMAPI: failure at query_boot_info\n");
+   return CONFIG_SYS_MMC_ENV_DEV;
+   }
+
+   boot_type = boot >> 16;
+   boot_instance = (boot >> 8) & 0xff;
+
+   debug("boot_type %d, instance %d\n", boot_type, boot_instance);
+
+   /* If not boot from sd/mmc, use default value */
+   if (boot_type != BOOT_TYPE_SD && boot_type != BOOT_TYPE_MMC)
+   return env_get_ulong("mmcdev", 10, CONFIG_SYS_MMC_ENV_DEV);
+
+   return board_mmc_get_env_dev(boot_instance);
+}
+#endif
+
 u32 get_cpu_rev(void)
 {
return (MXC_CPU_IMX93 << 12) | CHIP_REV_1_0;
-- 
2.36.0



[PATCH 46/53] net: eqos: add function to get phy node and address

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Since new atheros PHY driver needs to access its PHY node through
phy device, we have to assign the phy node in ethernet controller
driver. Otherwise the PHY driver will fail to get some nodes
and properties.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 drivers/net/dwc_eth_qos.c | 23 ---
 drivers/net/dwc_eth_qos.h |  1 +
 2 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 1f24f5cb0cf..a4380d17d9c 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -719,6 +719,24 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
return !is_valid_ethaddr(pdata->enetaddr);
 }
 
+static int eqos_get_phy_addr(struct eqos_priv *priv, struct udevice *dev)
+{
+   struct ofnode_phandle_args phandle_args;
+   int reg;
+
+   if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+  _args)) {
+   debug("Failed to find phy-handle");
+   return -ENODEV;
+   }
+
+   priv->phy_of_node = phandle_args.node;
+
+   reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
+
+   return reg;
+}
+
 static int eqos_start(struct udevice *dev)
 {
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -767,9 +785,7 @@ static int eqos_start(struct udevice *dev)
 */
if (!eqos->phy) {
int addr = -1;
-#ifdef CONFIG_DM_ETH_PHY
-   addr = eth_phy_get_addr(dev);
-#endif
+   addr = eqos_get_phy_addr(eqos, dev);
 #ifdef DWC_NET_PHYADDR
addr = DWC_NET_PHYADDR;
 #endif
@@ -788,6 +804,7 @@ static int eqos_start(struct udevice *dev)
}
}
 
+   eqos->phy->node = eqos->phy_of_node;
ret = phy_config(eqos->phy);
if (ret < 0) {
pr_err("phy_config() failed: %d", ret);
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index ce90e1f1ce1..f470189e8d4 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -261,6 +261,7 @@ struct eqos_priv {
struct clk clk_slave_bus;
struct mii_dev *mii;
struct phy_device *phy;
+   ofnode phy_of_node;
u32 max_speed;
void *descs;
int tx_desc_idx, rx_desc_idx;
-- 
2.36.0



[PATCH 49/53] tools: image: support i.MX93

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Support build i.MX93 container image with mkimage

Signed-off-by: Peng Fan 
---
 include/imx8image.h | 15 +++--
 tools/imx8image.c   | 79 +
 2 files changed, 78 insertions(+), 16 deletions(-)

diff --git a/include/imx8image.h b/include/imx8image.h
index 00c614ab6cc..32064bfeeb8 100644
--- a/include/imx8image.h
+++ b/include/imx8image.h
@@ -165,6 +165,7 @@ enum imx8image_core_type {
CFG_M40,
CFG_M41,
CFG_A35,
+   CFG_A55,
CFG_A53,
CFG_A72
 };
@@ -180,7 +181,9 @@ enum imx8image_fld_types {
 typedef enum SOC_TYPE {
NONE = 0,
QX,
-   QM
+   QM,
+   ULP,
+   IMX9
 } soc_type_t;
 
 typedef enum option_type {
@@ -201,7 +204,9 @@ typedef enum option_type {
DATA,
PARTITION,
FILEOFF,
-   MSG_BLOCK
+   MSG_BLOCK,
+   SENTINEL,
+   UPOWER
 } option_type_t;
 
 typedef struct {
@@ -221,6 +226,11 @@ typedef struct {
 #define CORE_CA72   5
 #define CORE_SECO   6
 
+#define CORE_ULP_CM33  0x1
+#define CORE_ULP_CA35  0x2
+#define CORE_ULP_UPOWER0x4
+#define CORE_ULP_SENTINEL  0x6
+
 #define SC_R_OTP   357U
 #define SC_R_DEBUG 354U
 #define SC_R_ROM_0 236U
@@ -235,6 +245,7 @@ typedef struct {
 #define IMG_TYPE_DATA0x04   /* Data image type */
 #define IMG_TYPE_DCD_DDR 0x05   /* DCD/DDR image type */
 #define IMG_TYPE_SECO0x06   /* SECO image type */
+#define IMG_TYPE_SENTINEL 0x06 /* SENTINEL image type */
 #define IMG_TYPE_PROV0x07   /* Provisioning image type */
 #define IMG_TYPE_DEK 0x08   /* DEK validation type */
 
diff --git a/tools/imx8image.c b/tools/imx8image.c
index fa8f2274876..01e14869114 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -60,6 +60,7 @@ static table_entry_t imx8image_core_entries[] = {
{CFG_M40,   "M40",  "M4 core 0",},
{CFG_M41,   "M41",  "M4 core 1",},
{CFG_A35,   "A35",  "A35 core", },
+   {CFG_A55,   "A55",  "A55 core", },
{CFG_A53,   "A53",  "A53 core", },
{CFG_A72,   "A72",  "A72 core", },
{-1,"", "", },
@@ -117,6 +118,10 @@ static void parse_cfg_cmd(image_t *param_stack, int32_t 
cmd, char *token,
soc = QX;
} else if (!strncmp(token, "IMX8QM", 6)) {
soc = QM;
+   } else if (!strncmp(token, "ULP", 3)) {
+   soc = IMX9;
+   } else if (!strncmp(token, "IMX9", 4)) {
+   soc = IMX9;
} else {
fprintf(stderr, "Unknown CMD_SOC_TYPE");
exit(EXIT_FAILURE);
@@ -187,6 +192,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t 
*cmd, char *token,
param_stack[p_idx].filename = token;
break;
case CFG_A35:
+   case CFG_A55:
param_stack[p_idx].ext = CORE_CA35;
param_stack[p_idx].option =
(*cmd == CMD_DATA) ? DATA : AP;
@@ -219,6 +225,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t 
*cmd, char *token,
case CFG_M41:
case CFG_A35:
case CFG_A53:
+   case CFG_A55:
case CFG_A72:
param_stack[p_idx++].entry =
(uint32_t)strtoll(token, NULL, 0);
@@ -548,6 +555,18 @@ static void set_image_array_entry(flash_header_v3_t 
*container,
img->dst = 0x20C0;
img->entry = 0x2000;
break;
+   case SENTINEL:
+   if (container->num_images > 0) {
+   fprintf(stderr, "Error: SENTINEL container only allows 
1 image\n");
+   return;
+   }
+
+   img->hab_flags |= IMG_TYPE_SENTINEL;
+   img->hab_flags |= CORE_ULP_SENTINEL << 
BOOT_IMG_FLAGS_CORE_SHIFT;
+   tmp_name = "SENTINEL";
+   img->dst = 0xe400; /* S400 IRAM base */
+   img->entry = 0xe400;
+   break;
case AP:
if (soc == QX && core == CORE_CA35) {
meta = IMAGE_A35_DEFAULT_META(custom_partition);
@@ -555,6 +574,8 @@ static void set_image_array_entry(flash_header_v3_t 
*container,
meta = IMAGE_A53_DEFAULT_META(custom_partition);
} else if (soc == QM && core == CORE_CA72) {
meta = IMAGE_A72_DEFAULT_META(custom_partition);
+   } else if (((soc == ULP) || (soc == IMX9)) && core == 
CORE_CA35) {
+   meta = 0;
} else {

[PATCH 44/53] net: dwc_eth_qos: public some functions

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Move macros and structures to header file and make some functions
public, so that could used by other files, this is to
prepare split platform specific config to one file.

Signed-off-by: Peng Fan 
---
 drivers/net/dwc_eth_qos.c | 280 +-
 drivers/net/dwc_eth_qos.h | 280 ++
 2 files changed, 287 insertions(+), 273 deletions(-)
 create mode 100644 drivers/net/dwc_eth_qos.h

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 6048d56ff8c..b69a9feb824 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -51,275 +51,9 @@
 #include 
 #include 
 #endif
-#include 
 #include 
 
-/* Core registers */
-
-#define EQOS_MAC_REGS_BASE 0x000
-struct eqos_mac_regs {
-   uint32_t configuration; /* 0x000 */
-   uint32_t unused_004[(0x070 - 0x004) / 4];   /* 0x004 */
-   uint32_t q0_tx_flow_ctrl;   /* 0x070 */
-   uint32_t unused_070[(0x090 - 0x074) / 4];   /* 0x074 */
-   uint32_t rx_flow_ctrl;  /* 0x090 */
-   uint32_t unused_094;/* 0x094 */
-   uint32_t txq_prty_map0; /* 0x098 */
-   uint32_t unused_09c;/* 0x09c */
-   uint32_t rxq_ctrl0; /* 0x0a0 */
-   uint32_t unused_0a4;/* 0x0a4 */
-   uint32_t rxq_ctrl2; /* 0x0a8 */
-   uint32_t unused_0ac[(0x0dc - 0x0ac) / 4];   /* 0x0ac */
-   uint32_t us_tic_counter;/* 0x0dc */
-   uint32_t unused_0e0[(0x11c - 0x0e0) / 4];   /* 0x0e0 */
-   uint32_t hw_feature0;   /* 0x11c */
-   uint32_t hw_feature1;   /* 0x120 */
-   uint32_t hw_feature2;   /* 0x124 */
-   uint32_t unused_128[(0x200 - 0x128) / 4];   /* 0x128 */
-   uint32_t mdio_address;  /* 0x200 */
-   uint32_t mdio_data; /* 0x204 */
-   uint32_t unused_208[(0x300 - 0x208) / 4];   /* 0x208 */
-   uint32_t address0_high; /* 0x300 */
-   uint32_t address0_low;  /* 0x304 */
-};
-
-#define EQOS_MAC_CONFIGURATION_GPSLCE  BIT(23)
-#define EQOS_MAC_CONFIGURATION_CST BIT(21)
-#define EQOS_MAC_CONFIGURATION_ACS BIT(20)
-#define EQOS_MAC_CONFIGURATION_WD  BIT(19)
-#define EQOS_MAC_CONFIGURATION_JD  BIT(17)
-#define EQOS_MAC_CONFIGURATION_JE  BIT(16)
-#define EQOS_MAC_CONFIGURATION_PS  BIT(15)
-#define EQOS_MAC_CONFIGURATION_FES BIT(14)
-#define EQOS_MAC_CONFIGURATION_DM  BIT(13)
-#define EQOS_MAC_CONFIGURATION_LM  BIT(12)
-#define EQOS_MAC_CONFIGURATION_TE  BIT(1)
-#define EQOS_MAC_CONFIGURATION_RE  BIT(0)
-
-#define EQOS_MAC_Q0_TX_FLOW_CTRL_PT_SHIFT  16
-#define EQOS_MAC_Q0_TX_FLOW_CTRL_PT_MASK   0x
-#define EQOS_MAC_Q0_TX_FLOW_CTRL_TFE   BIT(1)
-
-#define EQOS_MAC_RX_FLOW_CTRL_RFE  BIT(0)
-
-#define EQOS_MAC_TXQ_PRTY_MAP0_PSTQ0_SHIFT 0
-#define EQOS_MAC_TXQ_PRTY_MAP0_PSTQ0_MASK  0xff
-
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT0
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK 3
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED  0
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB  2
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV   1
-
-#define EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT 0
-#define EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK  0xff
-
-#define EQOS_MAC_HW_FEATURE0_MMCSEL_SHIFT  8
-#define EQOS_MAC_HW_FEATURE0_HDSEL_SHIFT   2
-#define EQOS_MAC_HW_FEATURE0_GMIISEL_SHIFT 1
-#define EQOS_MAC_HW_FEATURE0_MIISEL_SHIFT  0
-
-#define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_SHIFT  6
-#define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_MASK   0x1f
-#define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT  0
-#define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_MASK   0x1f
-
-#define EQOS_MAC_HW_FEATURE3_ASP_SHIFT 28
-#define EQOS_MAC_HW_FEATURE3_ASP_MASK  0x3
-
-#define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT 21
-#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT16
-#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT 8
-#define EQOS_MAC_MDIO_ADDRESS_CR_20_35 2
-#define EQOS_MAC_MDIO_ADDRESS_CR_250_300   5
-#define EQOS_MAC_MDIO_ADDRESS_SKAP BIT(4)
-#define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT2
-#define EQOS_MAC_MDIO_ADDRESS_GOC_READ   

[PATCH 41/53] imx: imx93_evk: Set ARM clock to 1.7Ghz

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/clock.h | 4 +++-
 arch/arm/mach-imx/imx9/clock.c | 9 +
 board/freescale/imx93_evk/spl.c| 3 +++
 3 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-imx9/clock.h 
b/arch/arm/include/asm/arch-imx9/clock.h
index d96f126a1d1..336d8613181 100644
--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -217,6 +217,8 @@ void dram_pll_init(ulong pll_val);
 void dram_enable_bypass(ulong clk_val);
 void dram_disable_bypass(void);
 
+int configure_intpll(enum ccm_clk_src pll, u32 freq);
+
 int ccm_clk_src_on(enum ccm_clk_src oscpll, bool enable);
 int ccm_clk_src_auto(enum ccm_clk_src oscpll, bool enable);
 int ccm_clk_src_lpm(enum ccm_clk_src oscpll, bool enable);
@@ -238,5 +240,5 @@ int ccm_shared_gpr_tz_access(u32 gpr, bool non_secure, bool 
user_mode, bool lock
 void enable_usboh3_clk(unsigned char enable);
 int set_clk_enet(enum enet_freq type);
 int set_clk_eqos(enum enet_freq type);
-
+void set_arm_clk(ulong freq);
 #endif
diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index 5d2bc0d2f8f..8240afc6172 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -665,6 +665,15 @@ void dram_disable_bypass(void)
/* Switch from DRAM  clock root from CCM to PLL */
ccm_shared_gpr_set(SHARED_GPR_DRAM_CLK, SHARED_GPR_DRAM_CLK_SEL_PLL);
 }
+
+void set_arm_clk(ulong freq)
+{
+   /* Increase ARM clock to 1.7Ghz */
+   ccm_shared_gpr_set(SHARED_GPR_A55_CLK, SHARED_GPR_A55_CLK_SEL_CCM);
+   configure_intpll(ARM_PLL_CLK, 17);
+   ccm_shared_gpr_set(SHARED_GPR_A55_CLK, SHARED_GPR_A55_CLK_SEL_PLL);
+}
+
 #endif
 
 int clock_init(void)
diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c
index ca33f943424..38cfbac6ea6 100644
--- a/board/freescale/imx93_evk/spl.c
+++ b/board/freescale/imx93_evk/spl.c
@@ -108,6 +108,9 @@ void board_init_f(ulong dummy)
}
power_init_board();
 
+   /* 1.7GHz */
+   set_arm_clk(17);
+
/* Init power of mix */
soc_power_init();
 
-- 
2.36.0



[PATCH 43/53] net: dwc_eth_qos: fix build break when CLK not enabled

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

When CONFIG_CLK is not enabled, there will be buil break:
"error: ‘eqos’ undeclared (first use in this function)"

Take eqos definition out the CONFIG_CLK ifdef.

Signed-off-by: Peng Fan 
---
 drivers/net/dwc_eth_qos.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 9d255cf95ff..6048d56ff8c 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1774,11 +1774,11 @@ static int eqos_remove_resources_tegra186(struct 
udevice *dev)
 
 static int eqos_remove_resources_stm32(struct udevice *dev)
 {
-#ifdef CONFIG_CLK
struct eqos_priv *eqos = dev_get_priv(dev);
 
debug("%s(dev=%p):\n", __func__, dev);
 
+#ifdef CONFIG_CLK
clk_free(>clk_tx);
clk_free(>clk_rx);
clk_free(>clk_master_bus);
-- 
2.36.0



[PATCH 35/53] imx: imx9: Support multiple env storages at runtime

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Select env storages according to boot device at runtime

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/mach-imx/imx9/soc.c | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index ca88271564c..797d7a802ba 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -288,6 +288,40 @@ int timer_init(void)
return 0;
 }
 
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+   enum boot_device dev = get_boot_device();
+   enum env_location env_loc = ENVL_UNKNOWN;
+
+   if (prio)
+   return env_loc;
+
+   switch (dev) {
+#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+   case QSPI_BOOT:
+   env_loc = ENVL_SPI_FLASH;
+   break;
+#endif
+#if defined(CONFIG_ENV_IS_IN_MMC)
+   case SD1_BOOT:
+   case SD2_BOOT:
+   case SD3_BOOT:
+   case MMC1_BOOT:
+   case MMC2_BOOT:
+   case MMC3_BOOT:
+   env_loc =  ENVL_MMC;
+   break;
+#endif
+   default:
+#if defined(CONFIG_ENV_IS_NOWHERE)
+   env_loc = ENVL_NOWHERE;
+#endif
+   break;
+   }
+
+   return env_loc;
+}
+
 static int mix_power_init(enum mix_power_domain pd)
 {
enum src_mix_slice_id mix_id;
-- 
2.36.0



[PATCH 51/53] ddr: imx8m: helper: load ddr firmware according to binman symbols

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.

And that could save binary size for many KBs.

Tested-by: Tim Harvey  #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan 
Reviewed-by: Alper Nebi Yasak 
[Alper: Check BINMAN_SYMS_OK instead]
Signed-off-by: Alper Nebi Yasak 
---
 drivers/ddr/imx/phy/helper.c | 47 +++-
 1 file changed, 41 insertions(+), 6 deletions(-)

diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c
index 60d650e3089..e9e0294f87d 100644
--- a/drivers/ddr/imx/phy/helper.c
+++ b/drivers/ddr/imx/phy/helper.c
@@ -4,6 +4,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -24,15 +25,30 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DMEM_OFFSET_ADDR 0x00054000
 #define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0)
 
+binman_sym_declare(ulong, ddr_1d_imem_fw, image_pos);
+binman_sym_declare(ulong, ddr_1d_imem_fw, size);
+
+binman_sym_declare(ulong, ddr_1d_dmem_fw, image_pos);
+binman_sym_declare(ulong, ddr_1d_dmem_fw, size);
+
+#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
+binman_sym_declare(ulong, ddr_2d_imem_fw, image_pos);
+binman_sym_declare(ulong, ddr_2d_imem_fw, size);
+
+binman_sym_declare(ulong, ddr_2d_dmem_fw, image_pos);
+binman_sym_declare(ulong, ddr_2d_dmem_fw, size);
+#endif
+
 /* We need PHY iMEM PHY is 32KB padded */
 void ddr_load_train_firmware(enum fw_type type)
 {
u32 tmp32, i;
u32 error = 0;
unsigned long pr_to32, pr_from32;
-   unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0;
+   uint32_t fw_offset = type ? IMEM_2D_OFFSET : 0;
unsigned long imem_start = (unsigned long)&_end + fw_offset;
unsigned long dmem_start;
+   unsigned long imem_len = IMEM_LEN, dmem_len = DMEM_LEN;
 
 #ifdef CONFIG_SPL_OF_CONTROL
if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) {
@@ -42,11 +58,30 @@ void ddr_load_train_firmware(enum fw_type type)
}
 #endif
 
-   dmem_start = imem_start + IMEM_LEN;
+   dmem_start = imem_start + imem_len;
+
+   if (BINMAN_SYMS_OK) {
+   switch (type) {
+   case FW_1D_IMAGE:
+   imem_start = binman_sym(ulong, ddr_1d_imem_fw, 
image_pos);
+   imem_len = binman_sym(ulong, ddr_1d_imem_fw, size);
+   dmem_start = binman_sym(ulong, ddr_1d_dmem_fw, 
image_pos);
+   dmem_len = binman_sym(ulong, ddr_1d_dmem_fw, size);
+   break;
+   case FW_2D_IMAGE:
+#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
+   imem_start = binman_sym(ulong, ddr_2d_imem_fw, 
image_pos);
+   imem_len = binman_sym(ulong, ddr_2d_imem_fw, size);
+   dmem_start = binman_sym(ulong, ddr_2d_dmem_fw, 
image_pos);
+   dmem_len = binman_sym(ulong, ddr_2d_dmem_fw, size);
+#endif
+   break;
+   }
+   }
 
pr_from32 = imem_start;
pr_to32 = IMEM_OFFSET_ADDR;
-   for (i = 0x0; i < IMEM_LEN; ) {
+   for (i = 0x0; i < imem_len; ) {
tmp32 = readl(pr_from32);
writew(tmp32 & 0x, DDR_TRAIN_CODE_BASE_ADDR + 
ddrphy_addr_remap(pr_to32));
pr_to32 += 1;
@@ -59,7 +94,7 @@ void ddr_load_train_firmware(enum fw_type type)
 
pr_from32 = dmem_start;
pr_to32 = DMEM_OFFSET_ADDR;
-   for (i = 0x0; i < DMEM_LEN; ) {
+   for (i = 0x0; i < dmem_len; ) {
tmp32 = readl(pr_from32);
writew(tmp32 & 0x, DDR_TRAIN_CODE_BASE_ADDR + 
ddrphy_addr_remap(pr_to32));
pr_to32 += 1;
@@ -73,7 +108,7 @@ void ddr_load_train_firmware(enum fw_type type)
debug("check ddr_pmu_train_imem code\n");
pr_from32 = imem_start;
pr_to32 = IMEM_OFFSET_ADDR;
-   for (i = 0x0; i < IMEM_LEN; ) {
+   for (i = 0x0; i < imem_len; ) {
tmp32 = (readw(DDR_TRAIN_CODE_BASE_ADDR + 
ddrphy_addr_remap(pr_to32)) & 0x);
pr_to32 += 1;
tmp32 += ((readw(DDR_TRAIN_CODE_BASE_ADDR +
@@ -95,7 +130,7 @@ void ddr_load_train_firmware(enum fw_type type)
debug("check ddr4_pmu_train_dmem code\n");
pr_from32 = dmem_start;
pr_to32 = DMEM_OFFSET_ADDR;
-   for (i = 0x0; i < DMEM_LEN;) {
+   for (i = 0x0; i < dmem_len;) {
tmp32 = (readw(DDR_TRAIN_CODE_BASE_ADDR + 
ddrphy_addr_remap(pr_to32)) & 0x);
pr_to32 += 1;
tmp32 += ((readw(DDR_TRAIN_CODE_BASE_ADDR +
-- 
2.36.0



[PATCH 48/53] board: freescale: imx93_evk: support ethernet

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add ethernet support

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/imx-regs.h |  7 +
 board/freescale/imx93_evk/imx93_evk.c | 32 +++
 configs/imx93_11x11_evk_defconfig |  9 +++
 3 files changed, 48 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h 
b/arch/arm/include/asm/arch-imx9/imx-regs.h
index 049eca4f3a7..f575805c7da 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -7,6 +7,7 @@
 #define __ASM_ARCH_IMX9_REGS_H__
 
 #define ARCH_MXC
+#define FEC_QUIRK_ENET_MAC
 
 #define IOMUXC_BASE_ADDR   0x443CUL
 #define CCM_BASE_ADDR  0x4445UL
@@ -39,6 +40,12 @@
 #define SRC_MIX_SLICE_FUNC_STAT_ISO_STAT BIT(4)
 #define SRC_MIX_SLICE_FUNC_STAT_MEM_STAT BIT(12)
 
+#define BCTRL_GPR_ENET_QOS_INTF_MODE_MASKGENMASK(3, 1)
+#define BCTRL_GPR_ENET_QOS_INTF_SEL_MII  (0x0 << 1)
+#define BCTRL_GPR_ENET_QOS_INTF_SEL_RMII (0x4 << 1)
+#define BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII(0x1 << 1)
+#define BCTRL_GPR_ENET_QOS_CLK_GEN_EN(0x1 << 0)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include 
 #include 
diff --git a/board/freescale/imx93_evk/imx93_evk.c 
b/board/freescale/imx93_evk/imx93_evk.c
index 77b92b35db4..f111b99fc2e 100644
--- a/board/freescale/imx93_evk/imx93_evk.c
+++ b/board/freescale/imx93_evk/imx93_evk.c
@@ -38,8 +38,40 @@ int board_early_init_f(void)
return 0;
 }
 
+static int setup_fec(void)
+{
+   return set_clk_enet(ENET_125MHZ);
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+   if (phydev->drv->config)
+   phydev->drv->config(phydev);
+
+   return 0;
+}
+
+static int setup_eqos(void)
+{
+   struct blk_ctrl_wakeupmix_regs *bctrl =
+   (struct blk_ctrl_wakeupmix_regs *)BLK_CTRL_WAKEUPMIX_BASE_ADDR;
+
+   /* set INTF as RGMII, enable RGMII TXC clock */
+   clrsetbits_le32(>eqos_gpr,
+   BCTRL_GPR_ENET_QOS_INTF_MODE_MASK,
+   BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII | 
BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
+
+   return set_clk_eqos(ENET_125MHZ);
+}
+
 int board_init(void)
 {
+   if (CONFIG_IS_ENABLED(FEC_MXC))
+   setup_fec();
+
+   if (CONFIG_IS_ENABLED(DWC_ETH_QOS))
+   setup_eqos();
+
return 0;
 }
 
diff --git a/configs/imx93_11x11_evk_defconfig 
b/configs/imx93_11x11_evk_defconfig
index 8a396ed1c13..1f59f7e365d 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -75,6 +75,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -89,6 +90,14 @@ CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_FSL_USDHC=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_IMX=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX93=y
-- 
2.36.0



[PATCH 38/53] ddr: imx9: enable Performance monitor counter

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Add Kconfig for enabling reference events counter in DDRC performance
monitor by default

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 drivers/ddr/imx/imx9/Kconfig| 6 ++
 drivers/ddr/imx/imx9/ddr_init.c | 4 
 2 files changed, 10 insertions(+)

diff --git a/drivers/ddr/imx/imx9/Kconfig b/drivers/ddr/imx/imx9/Kconfig
index a16ddc65e01..123ad173cfc 100644
--- a/drivers/ddr/imx/imx9/Kconfig
+++ b/drivers/ddr/imx/imx9/Kconfig
@@ -11,6 +11,12 @@ config IMX9_LPDDR4X
help
  Select the i.MX9 LPDDR4/4X driver support on i.MX9 SOC.
 
+config IMX9_DRAM_PM_COUNTER
+   bool "imx9 DDRC performance monitor counter"
+   default y
+   help
+ Enable DDR controller performance monitor counter for reference 
events.
+
 config SAVED_DRAM_TIMING_BASE
hex "Define the base address for saved dram timing"
help
diff --git a/drivers/ddr/imx/imx9/ddr_init.c b/drivers/ddr/imx/imx9/ddr_init.c
index 16eac65105f..8b8ec7f8de3 100644
--- a/drivers/ddr/imx/imx9/ddr_init.c
+++ b/drivers/ddr/imx/imx9/ddr_init.c
@@ -112,6 +112,10 @@ int ddr_init(struct dram_timing_info *dram_timing)
ddrc_config(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num);
debug("DDRINFO: ddrc config done\n");
 
+#ifdef CONFIG_IMX9_DRAM_PM_COUNTER
+   writel(0x20, REG_DDR_DEBUG_19);
+#endif
+
check_dfi_init_complete();
 
regval = readl(REG_DDR_SDRAM_CFG);
-- 
2.36.0



[PATCH 39/53] arm: dts: Add i.MX93 SoC DTSi file

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add the DTSi file and DT header files for i.MX93 SoC

Signed-off-by: Ye Li 
Signed-off-by: Alice Guo 
Signed-off-by: Peng Fan 
---
 arch/arm/dts/imx93.dtsi | 688 
 include/dt-bindings/clock/imx93-clock.h | 203 +++
 include/dt-bindings/power/imx93-power.h |  12 +
 3 files changed, 903 insertions(+)
 create mode 100644 arch/arm/dts/imx93.dtsi
 create mode 100644 include/dt-bindings/clock/imx93-clock.h
 create mode 100644 include/dt-bindings/power/imx93-power.h

diff --git a/arch/arm/dts/imx93.dtsi b/arch/arm/dts/imx93.dtsi
new file mode 100644
index 000..28026ccecc8
--- /dev/null
+++ b/arch/arm/dts/imx93.dtsi
@@ -0,0 +1,688 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "imx93-pinfunc.h"
+
+/ {
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   gpio0 = 
+   gpio1 = 
+   gpio2 = 
+   gpio3 = 
+   mmc0 = 
+   mmc1 = 
+   mmc2 = 
+   ethernet0 = 
+   ethernet1 = 
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   serial4 = 
+   serial5 = 
+   serial6 = 
+   serial7 = 
+   i2c0 = 
+   i2c1 = 
+   i2c2 = 
+   i2c3 = 
+   i2c4 = 
+   i2c5 = 
+   usb0 = 
+   usb1 = 
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   A55_0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a55";
+   reg = <0x0>;
+   enable-method = "psci";
+   #cooling-cells = <2>;
+   };
+
+   A55_1: cpu@100 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a55";
+   reg = <0x100>;
+   enable-method = "psci";
+   #cooling-cells = <2>;
+   };
+
+   };
+
+   osc_32k: clock-osc-32k {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <32768>;
+   clock-output-names = "osc_32k";
+   };
+
+   osc_24m: clock-osc-24m {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   clock-output-names = "osc_24m";
+   };
+
+   clk_ext1: clock-ext1 {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <13300>;
+   clock-output-names = "clk_ext1";
+   };
+
+   psci {
+   compatible = "arm,psci-1.0";
+   method = "smc";
+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
+   clock-frequency = <2400>;
+   arm,no-tick-in-suspend;
+   interrupt-parent = <>;
+   };
+
+   gic: interrupt-controller@4800 {
+   compatible = "arm,gic-v3";
+   reg = <0 0x4800 0 0x1>,
+ <0 0x4804 0 0xc>;
+   #interrupt-cells = <3>;
+   interrupt-controller;
+   interrupts = ;
+   interrupt-parent = <>;
+   };
+
+   soc@0 {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0x0 0x0 0x0 0x8000>,
+<0x2800 0x0 0x2800 0x1000>;
+
+   aips1: bus@4400 {
+   compatible = "fsl,aips-bus", "simple-bus";
+   reg = <0x4400 0x80>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   mu1: mailbox@4423 {
+   compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
+   reg = <0x4423 0x1>;
+   interrupts = ;
+   #mbox-cells = <2>;
+   status = "disabled";
+   };
+
+   anomix_ns_gpr: blk-ctrl-anomix@4242 {
+   compatible = "syscon";
+   reg = <0x4421 0x1000>;
+   };
+
+   system_counter: timer@4429 {
+   compatible = "nxp,sysctr-timer";
+   

[PATCH 45/53] net: dwc_eth_qos: move i.MX code out

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Move i.MX code to a standalone file to make it easy for adding new
platform support

Reviewed-by: Ramon Fried 
Signed-off-by: Peng Fan 
---
 drivers/net/Makefile  |   1 +
 drivers/net/dwc_eth_qos.c |  92 --
 drivers/net/dwc_eth_qos.h |   2 +
 drivers/net/dwc_eth_qos_imx.c | 121 ++
 4 files changed, 124 insertions(+), 92 deletions(-)
 create mode 100644 drivers/net/dwc_eth_qos_imx.c

diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 69fb3bbbf7c..9536af11946 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o
 obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
 obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
 obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o
+obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o
 obj-$(CONFIG_E1000) += e1000.o
 obj-$(CONFIG_E1000_SPI) += e1000_spi.o
 obj-$(CONFIG_EEPRO100) += eepro100.o
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index b69a9feb824..1f24f5cb0cf 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -506,20 +506,6 @@ static ulong eqos_get_tick_clk_rate_stm32(struct udevice 
*dev)
 #endif
 }
 
-__weak u32 imx_get_eqos_csr_clk(void)
-{
-   return 100 * 100;
-}
-__weak int imx_eqos_txclk_set_rate(unsigned long rate)
-{
-   return 0;
-}
-
-static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev)
-{
-   return imx_get_eqos_csr_clk();
-}
-
 static int eqos_set_full_duplex(struct udevice *dev)
 {
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -616,38 +602,6 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice 
*dev)
return 0;
 }
 
-static int eqos_set_tx_clk_speed_imx(struct udevice *dev)
-{
-   struct eqos_priv *eqos = dev_get_priv(dev);
-   ulong rate;
-   int ret;
-
-   debug("%s(dev=%p):\n", __func__, dev);
-
-   switch (eqos->phy->speed) {
-   case SPEED_1000:
-   rate = 125 * 1000 * 1000;
-   break;
-   case SPEED_100:
-   rate = 25 * 1000 * 1000;
-   break;
-   case SPEED_10:
-   rate = 2.5 * 1000 * 1000;
-   break;
-   default:
-   pr_err("invalid speed %d", eqos->phy->speed);
-   return -EINVAL;
-   }
-
-   ret = imx_eqos_txclk_set_rate(rate);
-   if (ret < 0) {
-   pr_err("imx (tx_clk, %lu) failed: %d", rate, ret);
-   return ret;
-   }
-
-   return 0;
-}
-
 static int eqos_adjust_link(struct udevice *dev)
 {
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1468,24 +1422,6 @@ static phy_interface_t eqos_get_interface_tegra186(const 
struct udevice *dev)
return PHY_INTERFACE_MODE_MII;
 }
 
-static int eqos_probe_resources_imx(struct udevice *dev)
-{
-   struct eqos_priv *eqos = dev_get_priv(dev);
-   phy_interface_t interface;
-
-   debug("%s(dev=%p):\n", __func__, dev);
-
-   interface = eqos->config->interface(dev);
-
-   if (interface == PHY_INTERFACE_MODE_NA) {
-   pr_err("Invalid PHY interface\n");
-   return -EINVAL;
-   }
-
-   debug("%s: OK\n", __func__);
-   return 0;
-}
-
 static int eqos_remove_resources_tegra186(struct udevice *dev)
 {
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1695,34 +1631,6 @@ static const struct eqos_config __maybe_unused 
eqos_stm32_config = {
.ops = _stm32_ops
 };
 
-static struct eqos_ops eqos_imx_ops = {
-   .eqos_inval_desc = eqos_inval_desc_generic,
-   .eqos_flush_desc = eqos_flush_desc_generic,
-   .eqos_inval_buffer = eqos_inval_buffer_generic,
-   .eqos_flush_buffer = eqos_flush_buffer_generic,
-   .eqos_probe_resources = eqos_probe_resources_imx,
-   .eqos_remove_resources = eqos_null_ops,
-   .eqos_stop_resets = eqos_null_ops,
-   .eqos_start_resets = eqos_null_ops,
-   .eqos_stop_clks = eqos_null_ops,
-   .eqos_start_clks = eqos_null_ops,
-   .eqos_calibrate_pads = eqos_null_ops,
-   .eqos_disable_calibration = eqos_null_ops,
-   .eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_imx,
-   .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx
-};
-
-struct eqos_config __maybe_unused eqos_imx_config = {
-   .reg_access_always_ok = false,
-   .mdio_wait = 10,
-   .swr_wait = 50,
-   .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
-   .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
-   .axi_bus_width = EQOS_AXI_WIDTH_64,
-   .interface = dev_read_phy_mode,
-   .ops = _imx_ops
-};
-
 static const struct udevice_id eqos_ids[] = {
 #if IS_ENABLED(CONFIG_DWC_ETH_QOS_TEGRA186)
{
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 68b367b068a..ce90e1f1ce1 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -278,3 +278,5 @@ void eqos_flush_desc_generic(void *desc);
 void 

[PATCH 34/53] imx: imx9: Support booting m33 from Acore

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add bootaux command to support on-demand booting M33 from u-boot.
It kicks M33 via ATF by "bootaux 0x201e 0"

Signed-off-by: Peng Fan 
---
 arch/arm/mach-imx/imx9/Makefile  |   4 +
 arch/arm/mach-imx/imx9/imx_bootaux.c | 133 +++
 arch/arm/mach-imx/imx9/soc.c |  10 +-
 include/imx_sip.h|   1 +
 4 files changed, 147 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-imx/imx9/imx_bootaux.c

diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile
index 41a22500c95..6d038a60c67 100644
--- a/arch/arm/mach-imx/imx9/Makefile
+++ b/arch/arm/mach-imx/imx9/Makefile
@@ -5,3 +5,7 @@
 obj-y += lowlevel_init.o
 obj-y += soc.o clock.o clock_root.o trdc.o
 obj-$(CONFIG_AHAB_BOOT) += ahab.o
+
+#ifndef CONFIG_SPL_BUILD
+obj-y += imx_bootaux.o
+#endif
diff --git a/arch/arm/mach-imx/imx9/imx_bootaux.c 
b/arch/arm/mach-imx/imx9/imx_bootaux.c
new file mode 100644
index 000..3b6662aeb81
--- /dev/null
+++ b/arch/arm/mach-imx/imx9/imx_bootaux.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+int arch_auxiliary_core_check_up(u32 core_id)
+{
+   struct arm_smccc_res res;
+
+   arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0,
+ 0, 0, 0, 0, );
+
+   return res.a0;
+}
+
+int arch_auxiliary_core_down(u32 core_id)
+{
+   struct arm_smccc_res res;
+
+   printf("## Stopping auxiliary core\n");
+
+   arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STOP, 0, 0,
+ 0, 0, 0, 0, );
+
+   return 0;
+}
+
+int arch_auxiliary_core_up(u32 core_id, ulong addr)
+{
+   struct arm_smccc_res res;
+   u32 stack, pc;
+
+   if (!addr)
+   return -EINVAL;
+
+   stack = *(u32 *)addr;
+   pc = *(u32 *)(addr + 4);
+
+   printf("## Starting auxiliary core stack = 0x%08X, pc = 0x%08X...\n", 
stack, pc);
+
+   arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0,
+ 0, 0, 0, 0, );
+
+   return 0;
+}
+
+/*
+ * To i.MX6SX and i.MX7D, the image supported by bootaux needs
+ * the reset vector at the head for the image, with SP and PC
+ * as the first two words.
+ *
+ * Per the cortex-M reference manual, the reset vector of M4/M7 needs
+ * to exist at 0x0 (TCMUL/IDTCM). The PC and SP are the first two addresses
+ * of that vector.  So to boot M4/M7, the A core must build the M4/M7's reset
+ * vector with getting the PC and SP from image and filling them to
+ * TCMUL/IDTCM. When M4/M7 is kicked, it will load the PC and SP by itself.
+ * The TCMUL/IDTCM is mapped to (MCU_BOOTROM_BASE_ADDR) at A core side for
+ * accessing the M4/M7 TCMUL/IDTCM.
+ */
+static int do_bootaux(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+   ulong addr;
+   int ret, up;
+   u32 core = 0;
+   u32 stop = 0;
+
+   if (argc < 2)
+   return CMD_RET_USAGE;
+
+   if (argc > 2)
+   core = simple_strtoul(argv[2], NULL, 10);
+
+   if (argc > 3)
+   stop = simple_strtoul(argv[3], NULL, 10);
+
+   up = arch_auxiliary_core_check_up(core);
+   if (up) {
+   printf("## Auxiliary core is already up\n");
+   return CMD_RET_SUCCESS;
+   }
+
+   addr = simple_strtoul(argv[1], NULL, 16);
+
+   if (!addr)
+   return CMD_RET_FAILURE;
+
+   ret = arch_auxiliary_core_up(core, addr);
+   if (ret)
+   return CMD_RET_FAILURE;
+
+   return CMD_RET_SUCCESS;
+}
+
+static int do_stopaux(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+   int ret, up;
+
+   up = arch_auxiliary_core_check_up(0);
+   if (!up) {
+   printf("## Auxiliary core is already down\n");
+   return CMD_RET_SUCCESS;
+   }
+
+   ret = arch_auxiliary_core_down(0);
+   if (ret)
+   return CMD_RET_FAILURE;
+
+   return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+   stopaux, CONFIG_SYS_MAXARGS, 1, do_stopaux,
+   "Stop auxiliary core",
+   " []\n"
+   "   - start auxiliary core [] (default 0),\n"
+   " at address \n"
+);
+
+U_BOOT_CMD(
+   bootaux, CONFIG_SYS_MAXARGS, 1, do_bootaux,
+   "Start auxiliary core",
+   " []\n"
+   "   - start auxiliary core [] (default 0),\n"
+   " at address \n"
+);
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 2a29454d1eb..ca88271564c 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -131,6 +131,14 @@ static struct mm_region imx93_mem_map[] = {
.size = 0x10UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 PTE_BLOCK_OUTER_SHARE
+   }, {
+   /* TCM */
+   .virt = 0x201cUL,
+   .phys = 0x201cUL,
+  

[PATCH 37/53] ddr: imx: Add i.MX9 DDR controller driver

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Since i.MX9 uses same DDR PHY with i.MX8M, split the DDRPHY to a common
directory under imx, then use dedicated ddr controller driver for each
iMX9 and iMX8M.

The DDRPHY registers are space compressed, so it needs conversion to
access the DDRPHY address. Introduce a common PHY address remap function
for both iMX8M and iMX9 for all PHY registers accessing.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx8m/ddr.h |   6 +-
 arch/arm/include/asm/arch-imx9/ddr.h  | 126 +
 drivers/Makefile  |   1 +
 drivers/ddr/imx/Kconfig   |   2 +
 drivers/ddr/imx/imx8m/Kconfig |   1 +
 drivers/ddr/imx/imx8m/Makefile|   3 +-
 drivers/ddr/imx/imx8m/ddr_init.c  | 219 
 drivers/ddr/imx/imx9/Kconfig  |  21 +
 drivers/ddr/imx/imx9/Makefile |  10 +
 drivers/ddr/imx/imx9/ddr_init.c   | 485 ++
 drivers/ddr/imx/phy/Kconfig   |   4 +
 drivers/ddr/imx/phy/Makefile  |   9 +
 drivers/ddr/imx/{imx8m => phy}/ddrphy_csr.c   |   0
 drivers/ddr/imx/{imx8m => phy}/ddrphy_train.c |   1 -
 drivers/ddr/imx/phy/ddrphy_utils.c| 169 ++
 drivers/ddr/imx/{imx8m => phy}/helper.c   |  45 +-
 16 files changed, 1077 insertions(+), 25 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-imx9/ddr.h
 create mode 100644 drivers/ddr/imx/imx9/Kconfig
 create mode 100644 drivers/ddr/imx/imx9/Makefile
 create mode 100644 drivers/ddr/imx/imx9/ddr_init.c
 create mode 100644 drivers/ddr/imx/phy/Kconfig
 create mode 100644 drivers/ddr/imx/phy/Makefile
 rename drivers/ddr/imx/{imx8m => phy}/ddrphy_csr.c (100%)
 rename drivers/ddr/imx/{imx8m => phy}/ddrphy_train.c (98%)
 create mode 100644 drivers/ddr/imx/phy/ddrphy_utils.c
 rename drivers/ddr/imx/{imx8m => phy}/helper.c (79%)

diff --git a/arch/arm/include/asm/arch-imx8m/ddr.h 
b/arch/arm/include/asm/arch-imx8m/ddr.h
index 2ce8a8f2d41..2f76e7d69b9 100644
--- a/arch/arm/include/asm/arch-imx8m/ddr.h
+++ b/arch/arm/include/asm/arch-imx8m/ddr.h
@@ -725,6 +725,8 @@ void update_umctl2_rank_space_setting(unsigned int 
pstat_num);
 void get_trained_CDD(unsigned int fsp);
 unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr);
 
+ulong ddrphy_addr_remap(uint32_t paddr_apb_from_ctlr);
+
 static inline void reg32_write(unsigned long addr, u32 val)
 {
writel(val, addr);
@@ -741,9 +743,9 @@ static inline void reg32setbit(unsigned long addr, u32 bit)
 }
 
 #define dwc_ddrphy_apb_wr(addr, data) \
-   reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * (addr), data)
+   reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + ddrphy_addr_remap(addr), 
data)
 #define dwc_ddrphy_apb_rd(addr) \
-   reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * (addr))
+   reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + ddrphy_addr_remap(addr))
 
 extern struct dram_cfg_param ddrphy_trained_csr[];
 extern uint32_t ddrphy_trained_csr_num;
diff --git a/arch/arm/include/asm/arch-imx9/ddr.h 
b/arch/arm/include/asm/arch-imx9/ddr.h
new file mode 100644
index 000..62e6f7dda53
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx9/ddr.h
@@ -0,0 +1,126 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __ASM_ARCH_IMX8M_DDR_H
+#define __ASM_ARCH_IMX8M_DDR_H
+
+#include 
+#include 
+
+#define DDR_CTL_BASE   0x4E30
+#define DDR_PHY_BASE   0x4E10
+#define DDRMIX_BLK_CTRL_BASE   0x4E01
+
+#define REG_DDRDSR_2   (DDR_CTL_BASE + 0xB24)
+#define REG_DDR_SDRAM_CFG  (DDR_CTL_BASE + 0x110)
+#define REG_DDR_DEBUG_19   (DDR_CTL_BASE + 0xF48)
+
+#define SRC_BASE_ADDR  (0x4446)
+#define SRC_DPHY_BASE_ADDR (SRC_BASE_ADDR + 0x1400)
+#define REG_SRC_DPHY_SW_CTRL   (SRC_DPHY_BASE_ADDR + 0x20)
+#define REG_SRC_DPHY_SINGLE_RESET_SW_CTRL  (SRC_DPHY_BASE_ADDR + 0x24)
+
+#define IP2APB_DDRPHY_IPS_BASE_ADDR(X) (DDR_PHY_BASE + ((X) * 0x200))
+#define DDRPHY_MEM(X)  (DDR_PHY_BASE + ((X) * 0x200) + 
0x5)
+
+/* PHY State */
+enum pstate {
+   PS0,
+   PS1,
+   PS2,
+   PS3,
+};
+
+enum msg_response {
+   TRAIN_SUCCESS = 0x7,
+   TRAIN_STREAM_START = 0x8,
+   TRAIN_FAIL = 0xff,
+};
+
+/* user data type */
+enum fw_type {
+   FW_1D_IMAGE,
+   FW_2D_IMAGE,
+};
+
+struct dram_cfg_param {
+   unsigned int reg;
+   unsigned int val;
+};
+
+struct dram_fsp_msg {
+   unsigned int drate;
+   enum fw_type fw_type;
+   struct dram_cfg_param *fsp_cfg;
+   unsigned int fsp_cfg_num;
+};
+
+struct dram_timing_info {
+   /* umctl2 config */
+   struct dram_cfg_param *ddrc_cfg;
+   unsigned int ddrc_cfg_num;
+   /* ddrphy config */
+   struct dram_cfg_param *ddrphy_cfg;
+   unsigned int ddrphy_cfg_num;
+   /* ddr fsp 

[PATCH 36/53] imx: imx9: clock: Add DDR clock support

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Implement the DDR driver clock interfaces for set DDR rate and
bypass DDR PLL

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/clock.h |  3 ++
 arch/arm/mach-imx/imx9/clock.c | 41 ++
 2 files changed, 44 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx9/clock.h 
b/arch/arm/include/asm/arch-imx9/clock.h
index fcf04d66f05..d96f126a1d1 100644
--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -213,6 +213,9 @@ void init_clk_usdhc(u32 index);
 int enable_i2c_clk(unsigned char enable, u32 i2c_num);
 u32 imx_get_i2cclk(u32 i2c_num);
 u32 mxc_get_clock(enum mxc_clock clk);
+void dram_pll_init(ulong pll_val);
+void dram_enable_bypass(ulong clk_val);
+void dram_disable_bypass(void);
 
 int ccm_clk_src_on(enum ccm_clk_src oscpll, bool enable);
 int ccm_clk_src_auto(enum ccm_clk_src oscpll, bool enable);
diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index 55cbb40f328..5d2bc0d2f8f 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -626,6 +626,47 @@ void enable_usboh3_clk(unsigned char enable)
}
 }
 
+#ifdef CONFIG_SPL_BUILD
+void dram_pll_init(ulong pll_val)
+{
+   configure_fracpll(DRAM_PLL_CLK, pll_val);
+}
+
+void dram_enable_bypass(ulong clk_val)
+{
+   switch (clk_val) {
+   case MHZ(400):
+   ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD1, 2);
+   break;
+   case MHZ(333):
+   ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD0, 3);
+   break;
+   case MHZ(200):
+   ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD1, 4);
+   break;
+   case MHZ(100):
+   ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD1, 8);
+   break;
+   default:
+   printf("No matched freq table %lu\n", clk_val);
+   return;
+   }
+
+   /* Set DRAM APB to 133Mhz */
+   ccm_clk_root_cfg(DRAM_APB_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3);
+   /* Switch from DRAM  clock root from PLL to CCM */
+   ccm_shared_gpr_set(SHARED_GPR_DRAM_CLK, SHARED_GPR_DRAM_CLK_SEL_CCM);
+}
+
+void dram_disable_bypass(void)
+{
+   /* Set DRAM APB to 133Mhz */
+   ccm_clk_root_cfg(DRAM_APB_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3);
+   /* Switch from DRAM  clock root from CCM to PLL */
+   ccm_shared_gpr_set(SHARED_GPR_DRAM_CLK, SHARED_GPR_DRAM_CLK_SEL_PLL);
+}
+#endif
+
 int clock_init(void)
 {
int i;
-- 
2.36.0



[PATCH 33/53] imx: imx9: Add M33 release prepare function

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

To support on-demand booting M33 image from A core. SPL needs
to follow M33 kick up sequence to release M33 firstly,
then set M33 CPUWAIT signal. ATF will clear CPUWAIT to kick
M33 to run.

The prepare function also works around the M33 TCM ECC issue by
clean the TCM. Also enable sentinel handshake and WDOG1 clock
for M33 stop and reset.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/sys_proto.h |  2 +
 arch/arm/mach-imx/imx9/soc.c   | 51 ++
 2 files changed, 53 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx9/sys_proto.h 
b/arch/arm/include/asm/arch-imx9/sys_proto.h
index 5ae7a043398..ba97f92f5ae 100644
--- a/arch/arm/include/asm/arch-imx9/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx9/sys_proto.h
@@ -9,4 +9,6 @@
 #include 
 
 void soc_power_init(void);
+bool m33_is_rom_kicked(void);
+int m33_prepare(void);
 #endif
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 68f3ddd4287..2a29454d1eb 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -378,3 +379,53 @@ void soc_power_init(void)
 
disable_isolation();
 }
+
+static bool m33_is_rom_kicked(void)
+{
+   struct blk_ctrl_s_aonmix_regs *s_regs =
+   (struct blk_ctrl_s_aonmix_regs 
*)BLK_CTRL_S_ANOMIX_BASE_ADDR;
+
+   if (!(readl(_regs->m33_cfg) & BIT(2)))
+   return true;
+
+   return false;
+}
+
+int m33_prepare(void)
+{
+   struct src_mix_slice_regs *mix_regs =
+   (struct src_mix_slice_regs *)(ulong)(SRC_IPS_BASE_ADDR + 0x400 
* (SRC_MIX_CM33 + 1));
+   struct src_general_regs *global_regs =
+   (struct src_general_regs *)(ulong)SRC_GLOBAL_RBASE;
+   struct blk_ctrl_s_aonmix_regs *s_regs =
+   (struct blk_ctrl_s_aonmix_regs 
*)BLK_CTRL_S_ANOMIX_BASE_ADDR;
+   u32 val;
+
+   if (m33_is_rom_kicked())
+   return -EPERM;
+
+   /* Release reset of M33 */
+   setbits_le32(_regs->scr, BIT(0));
+
+   /* Check the reset released in M33 MIX func stat */
+   val = readl(_regs->func_stat);
+   while (!(val & SRC_MIX_SLICE_FUNC_STAT_RST_STAT))
+   val = readl(_regs->func_stat);
+
+   /* Release Sentinel TROUT */
+   ahab_release_m33_trout();
+
+   /* Mask WDOG1 IRQ from A55, we use it for M33 reset */
+   setbits_le32(_regs->ca55_irq_mask[1], BIT(6));
+
+   /* Turn on WDOG1 clock */
+   ccm_lpcg_on(CCGR_WDG1, 1);
+
+   /* Set sentinel LP handshake for M33 reset */
+   setbits_le32(_regs->lp_handshake[0], BIT(6));
+
+   /* Clear M33 TCM for ECC */
+   memset((void *)(ulong)0x201e, 0, 0x4);
+
+   return 0;
+}
-- 
2.36.0



[PATCH 28/53] misc: imx8ulp: move fuse.c from imx8ulp to sentinel

2022-07-20 Thread Peng Fan (OSS)
From: Alice Guo 

The i.MX93 platform wants to reuse drivers/misc/imx8ulp/fuse.c. Moving
fuse.c from the folder imx8ulp to sentinel makes it can be used by other
platforms.

Signed-off-by: Alice Guo 
Signed-off-by: Peng Fan 
---
 drivers/misc/Makefile | 2 --
 drivers/misc/imx8ulp/Makefile | 3 ---
 drivers/misc/sentinel/Makefile| 1 +
 drivers/misc/{imx8ulp => sentinel}/fuse.c | 0
 4 files changed, 1 insertion(+), 5 deletions(-)
 delete mode 100644 drivers/misc/imx8ulp/Makefile
 rename drivers/misc/{imx8ulp => sentinel}/fuse.c (100%)

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 31d639b837c..d494639cd95 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -49,8 +49,6 @@ obj-$(CONFIG_SANDBOX) += irq_sandbox.o irq_sandbox_test.o
 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
 obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
 obj-$(CONFIG_IMX8) += imx8/
-obj-$(CONFIG_IMX8ULP) += imx8ulp/
-obj-$(CONFIG_IMX8ULP) += imx8ulp/
 obj-$(CONFIG_IMX_SENTINEL) += sentinel/
 obj-$(CONFIG_LED_STATUS) += status_led.o
 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
diff --git a/drivers/misc/imx8ulp/Makefile b/drivers/misc/imx8ulp/Makefile
deleted file mode 100644
index 450e615e645..000
--- a/drivers/misc/imx8ulp/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-$(CONFIG_CMD_FUSE) += fuse.o
diff --git a/drivers/misc/sentinel/Makefile b/drivers/misc/sentinel/Makefile
index 3e2f623b278..446154cb201 100644
--- a/drivers/misc/sentinel/Makefile
+++ b/drivers/misc/sentinel/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 
 obj-y += s400_api.o s4mu.o
+obj-$(CONFIG_CMD_FUSE) += fuse.o
diff --git a/drivers/misc/imx8ulp/fuse.c b/drivers/misc/sentinel/fuse.c
similarity index 100%
rename from drivers/misc/imx8ulp/fuse.c
rename to drivers/misc/sentinel/fuse.c
-- 
2.36.0



[PATCH 25/53] imx: imx9: Add AHAB boot support

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Add AHAB driver for iMX9 to do authentication by calling sentinel API

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/mach-imx/imx9/Kconfig  |   5 +
 arch/arm/mach-imx/imx9/Makefile |   1 +
 arch/arm/mach-imx/imx9/ahab.c   | 346 
 3 files changed, 352 insertions(+)
 create mode 100644 arch/arm/mach-imx/imx9/ahab.c

diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index ce58e41428f..dae9f658e65 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -1,5 +1,10 @@
 if ARCH_IMX9
 
+config AHAB_BOOT
+bool "Support i.MX9 AHAB features"
+help
+This option enables the support for AHAB secure boot.
+
 config IMX9
bool
select HAS_CAAM
diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile
index 0124212f266..41a22500c95 100644
--- a/arch/arm/mach-imx/imx9/Makefile
+++ b/arch/arm/mach-imx/imx9/Makefile
@@ -4,3 +4,4 @@
 
 obj-y += lowlevel_init.o
 obj-y += soc.o clock.o clock_root.o trdc.o
+obj-$(CONFIG_AHAB_BOOT) += ahab.o
diff --git a/arch/arm/mach-imx/imx9/ahab.c b/arch/arm/mach-imx/imx9/ahab.c
new file mode 100644
index 000..6aa949619b5
--- /dev/null
+++ b/arch/arm/mach-imx/imx9/ahab.c
@@ -0,0 +1,346 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define IMG_CONTAINER_BASE (0x8000UL)
+#define IMG_CONTAINER_END_BASE (IMG_CONTAINER_BASE + 0xUL)
+
+#define AHAB_NO_AUTHENTICATION_IND 0xee
+#define AHAB_BAD_KEY_HASH_IND 0xfa
+#define AHAB_INVALID_KEY_IND 0xf9
+#define AHAB_BAD_SIGNATURE_IND 0xf0
+#define AHAB_BAD_HASH_IND 0xf1
+
+static void display_ahab_auth_ind(u32 event)
+{
+   u8 resp_ind = (event >> 8) & 0xff;
+
+   switch (resp_ind) {
+   case AHAB_NO_AUTHENTICATION_IND:
+   printf("AHAB_NO_AUTHENTICATION_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_BAD_KEY_HASH_IND:
+   printf("AHAB_BAD_KEY_HASH_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_INVALID_KEY_IND:
+   printf("AHAB_INVALID_KEY_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_BAD_SIGNATURE_IND:
+   printf("AHAB_BAD_SIGNATURE_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_BAD_HASH_IND:
+   printf("AHAB_BAD_HASH_IND (0x%02X)\n\n", resp_ind);
+   break;
+   default:
+   printf("Unknown Indicator (0x%02X)\n\n", resp_ind);
+   break;
+   }
+}
+
+int ahab_auth_cntr_hdr(struct container_hdr *container, u16 length)
+{
+   int err;
+   u32 resp;
+
+   memcpy((void *)IMG_CONTAINER_BASE, (const void *)container,
+  ALIGN(length, CONFIG_SYS_CACHELINE_SIZE));
+
+   flush_dcache_range(IMG_CONTAINER_BASE,
+  IMG_CONTAINER_BASE + ALIGN(length, 
CONFIG_SYS_CACHELINE_SIZE) - 1);
+
+   err = ahab_auth_oem_ctnr(IMG_CONTAINER_BASE, );
+   if (err) {
+   printf("Authenticate container hdr failed, return %d, resp 
0x%x\n",
+  err, resp);
+   display_ahab_auth_ind(resp);
+   }
+
+   return err;
+}
+
+int ahab_auth_release(void)
+{
+   int err;
+   u32 resp;
+
+   err = ahab_release_container();
+   if (err) {
+   printf("Error: release container failed, resp 0x%x!\n", resp);
+   display_ahab_auth_ind(resp);
+   }
+
+   return err;
+}
+
+int ahab_verify_cntr_image(struct boot_img_t *img, int image_index)
+{
+   int err;
+   u32 resp;
+
+   err = ahab_verify_image(image_index, );
+   if (err) {
+   printf("Authenticate img %d failed, return %d, resp 0x%x\n",
+  image_index, err, resp);
+   display_ahab_auth_ind(resp);
+
+   return -EIO;
+   }
+
+   return 0;
+}
+
+static inline bool check_in_dram(ulong addr)
+{
+   int i;
+   struct bd_info *bd = gd->bd;
+
+   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
+   if (bd->bi_dram[i].size) {
+   if (addr >= bd->bi_dram[i].start &&
+   addr < (bd->bi_dram[i].start + bd->bi_dram[i].size))
+   return true;
+   }
+   }
+
+   return false;
+}
+
+int authenticate_os_container(ulong addr)
+{
+   struct container_hdr *phdr;
+   int i, ret = 0;
+   int err;
+   u16 length;
+   struct boot_img_t *img;
+   unsigned long s, e;
+
+   if (addr % 4) {
+   puts("Error: Image's address is not 4 byte aligned\n");
+   return -EINVAL;
+   }
+
+   if (!check_in_dram(addr)) {
+   puts("Error: Image's address is invalid\n");
+  

[PATCH 22/53] misc: S400_API: New API for FW status and chip info

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add new API to get sentinel FW status and SoC chip info

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/s400_api.h | 13 +
 drivers/misc/sentinel/s400_api.c | 61 
 2 files changed, 74 insertions(+)

diff --git a/arch/arm/include/asm/mach-imx/s400_api.h 
b/arch/arm/include/asm/mach-imx/s400_api.h
index d09c078df01..d95f8227b29 100644
--- a/arch/arm/include/asm/mach-imx/s400_api.h
+++ b/arch/arm/include/asm/mach-imx/s400_api.h
@@ -19,8 +19,10 @@
 #define AHAB_READ_FUSE_REQ_CID 0x97
 #define AHAB_GET_FW_VERSION_CID0x9D
 #define AHAB_RELEASE_RDC_REQ_CID   0xC4
+#define AHAB_GET_FW_STATUS_CID   0xC5
 #define AHAB_WRITE_FUSE_REQ_CID0xD6
 #define AHAB_CAAM_RELEASE_CID 0xD7
+#define AHAB_GET_INFO_CID 0xDA
 
 #define S400_MAX_MSG  255U
 
@@ -32,6 +34,15 @@ struct imx8ulp_s400_msg {
u32 data[(S400_MAX_MSG - 1U)];
 };
 
+struct sentinel_get_info_data {
+   u32 hdr;
+   u32 soc;
+   u32 lc;
+   u32 uid[4];
+   u32 sha256_rom_patch[8];
+   u32 sha_fw[8];
+};
+
 int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response);
 int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response);
 int ahab_release_container(u32 *response);
@@ -42,5 +53,7 @@ int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 
fuse_num, u32 *respo
 int ahab_release_caam(u32 core_did, u32 *response);
 int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response);
 int ahab_dump_buffer(u32 *buffer, u32 buffer_length);
+int ahab_get_info(struct sentinel_get_info_data *info, u32 *response);
+int ahab_get_fw_status(u32 *status, u32 *response);
 
 #endif
diff --git a/drivers/misc/sentinel/s400_api.c b/drivers/misc/sentinel/s400_api.c
index 4e90171420f..ca7903670ed 100644
--- a/drivers/misc/sentinel/s400_api.c
+++ b/drivers/misc/sentinel/s400_api.c
@@ -359,3 +359,64 @@ int ahab_dump_buffer(u32 *buffer, u32 buffer_length)
 
return i;
 }
+
+int ahab_get_info(struct sentinel_get_info_data *info, u32 *response)
+{
+   struct udevice *dev = gd->arch.s400_dev;
+   int size = sizeof(struct imx8ulp_s400_msg);
+   struct imx8ulp_s400_msg msg;
+   int ret;
+
+   if (!dev) {
+   printf("s400 dev is not initialized\n");
+   return -ENODEV;
+   }
+
+   msg.version = AHAB_VERSION;
+   msg.tag = AHAB_CMD_TAG;
+   msg.size = 4;
+   msg.command = AHAB_GET_INFO_CID;
+   msg.data[0] = upper_32_bits((ulong)info);
+   msg.data[1] = lower_32_bits((ulong)info);
+   msg.data[2] = sizeof(struct sentinel_get_info_data);
+
+   ret = misc_call(dev, false, , size, , size);
+   if (ret)
+   printf("Error: %s: ret %d, response 0x%x\n",
+  __func__, ret, msg.data[0]);
+
+   if (response)
+   *response = msg.data[0];
+
+   return ret;
+}
+
+int ahab_get_fw_status(u32 *status, u32 *response)
+{
+   struct udevice *dev = gd->arch.s400_dev;
+   int size = sizeof(struct imx8ulp_s400_msg);
+   struct imx8ulp_s400_msg msg;
+   int ret;
+
+   if (!dev) {
+   printf("s400 dev is not initialized\n");
+   return -ENODEV;
+   }
+
+   msg.version = AHAB_VERSION;
+   msg.tag = AHAB_CMD_TAG;
+   msg.size = 1;
+   msg.command = AHAB_GET_FW_STATUS_CID;
+
+   ret = misc_call(dev, false, , size, , size);
+   if (ret)
+   printf("Error: %s: ret %d, response 0x%x\n",
+  __func__, ret, msg.data[0]);
+
+   if (response)
+   *response = msg.data[0];
+
+   *status = msg.data[1] & 0xF;
+
+   return ret;
+}
-- 
2.36.0



[PATCH 27/53] misc: S400_API: Rename imx8ulp_s400_msg to sentinel_msg

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Use more generic name for S40x msg structure

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/s400_api.h |  2 +-
 arch/arm/mach-imx/imx8ulp/rdc.c  |  2 +-
 arch/arm/mach-imx/imx9/trdc.c|  2 +-
 drivers/misc/sentinel/s400_api.c | 44 
 drivers/misc/sentinel/s4mu.c |  6 ++--
 5 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/arch/arm/include/asm/mach-imx/s400_api.h 
b/arch/arm/include/asm/mach-imx/s400_api.h
index dc176e1f619..89fa373d06f 100644
--- a/arch/arm/include/asm/mach-imx/s400_api.h
+++ b/arch/arm/include/asm/mach-imx/s400_api.h
@@ -26,7 +26,7 @@
 
 #define S400_MAX_MSG  255U
 
-struct imx8ulp_s400_msg {
+struct sentinel_msg {
u8 version;
u8 size;
u8 command;
diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c
index cc47079d8f5..e24eeff8a20 100644
--- a/arch/arm/mach-imx/imx8ulp/rdc.c
+++ b/arch/arm/mach-imx/imx8ulp/rdc.c
@@ -184,7 +184,7 @@ int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 
perm)
 int release_rdc(enum rdc_type type)
 {
ulong s_mu_base = 0x2702UL;
-   struct imx8ulp_s400_msg msg;
+   struct sentinel_msg msg;
int ret;
u32 rdc_id = (type == RDC_XRDC) ? 0x78 : 0x74;
 
diff --git a/arch/arm/mach-imx/imx9/trdc.c b/arch/arm/mach-imx/imx9/trdc.c
index b0881697a10..3f37ce712c0 100644
--- a/arch/arm/mach-imx/imx9/trdc.c
+++ b/arch/arm/mach-imx/imx9/trdc.c
@@ -315,7 +315,7 @@ bool trdc_mbc_enabled(ulong trdc_base)
 int release_rdc(u8 xrdc)
 {
ulong s_mu_base = 0x4752UL;
-   struct imx8ulp_s400_msg msg;
+   struct sentinel_msg msg;
int ret;
u32 rdc_id;
 
diff --git a/drivers/misc/sentinel/s400_api.c b/drivers/misc/sentinel/s400_api.c
index 01a673e5e13..65032f77362 100644
--- a/drivers/misc/sentinel/s400_api.c
+++ b/drivers/misc/sentinel/s400_api.c
@@ -17,8 +17,8 @@ DECLARE_GLOBAL_DATA_PTR;
 int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
int ret;
 
if (!dev) {
@@ -62,8 +62,8 @@ int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response)
 int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
int ret;
 
if (!dev) {
@@ -92,8 +92,8 @@ int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response)
 int ahab_release_container(u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
int ret;
 
if (!dev) {
@@ -120,8 +120,8 @@ int ahab_release_container(u32 *response)
 int ahab_verify_image(u32 img_id, u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
int ret;
 
if (!dev) {
@@ -149,8 +149,8 @@ int ahab_verify_image(u32 img_id, u32 *response)
 int ahab_forward_lifecycle(u16 life_cycle, u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
int ret;
 
if (!dev) {
@@ -178,8 +178,8 @@ int ahab_forward_lifecycle(u16 life_cycle, u32 *response)
 int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 
*response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
int ret;
 
if (!dev) {
@@ -226,8 +226,8 @@ int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 
fuse_num, u32 *respo
 int ahab_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
int ret;
 
if (!dev) {
@@ -259,8 +259,8 @@ int ahab_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, 
u32 *response)
 int ahab_release_caam(u32 core_did, u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
-   int size = sizeof(struct imx8ulp_s400_msg);
-   struct imx8ulp_s400_msg msg;
+  

[PATCH 32/53] imx: imx9: Add MIX power init

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add power init of MEDIAMIX, MLMIX and DDRMIX. And clear isolation
of MIPI DSI/CSI, USBPHY after the power up.

SPL should call the power init in its boot sequence before accessing
above three MIX and USB.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/imx-regs.h  | 173 +
 arch/arm/include/asm/arch-imx9/sys_proto.h |   1 +
 arch/arm/mach-imx/imx9/soc.c   | 101 
 3 files changed, 275 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h 
b/arch/arm/include/asm/arch-imx9/imx-regs.h
index fa6951ebbe8..049eca4f3a7 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -21,6 +21,24 @@
 
 #define FSB_BASE_ADDR   0x4751UL
 
+#define ANATOP_BASE_ADDR0x4448UL
+
+#define BLK_CTRL_WAKEUPMIX_BASE_ADDR 0x4242
+#define BLK_CTRL_S_ANOMIX_BASE_ADDR  0x444f
+
+#define SRC_IPS_BASE_ADDR  (0x4446)
+#define SRC_GLOBAL_RBASE   (SRC_IPS_BASE_ADDR + 0x)
+
+#define SRC_DDR_RBASE  (SRC_IPS_BASE_ADDR + 0x1000)
+#define SRC_ML_RBASE   (SRC_IPS_BASE_ADDR + 0x1800)
+#define SRC_MEDIA_RBASE(SRC_IPS_BASE_ADDR + 0x2400)
+#define SRC_M33P_RBASE (SRC_IPS_BASE_ADDR + 0x2800)
+
+#define SRC_MIX_SLICE_FUNC_STAT_PSW_STAT BIT(0)
+#define SRC_MIX_SLICE_FUNC_STAT_RST_STAT BIT(2)
+#define SRC_MIX_SLICE_FUNC_STAT_ISO_STAT BIT(4)
+#define SRC_MIX_SLICE_FUNC_STAT_MEM_STAT BIT(12)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include 
 #include 
@@ -49,6 +67,161 @@ struct mu_type {
u32 reserved5[14];
u32 mu_attr;
 };
+
+enum mix_power_domain {
+   MIX_PD_MEDIAMIX,
+   MIX_PD_MLMIX,
+   MIX_PD_DDRMIX,
+};
+
+enum src_mix_slice_id {
+   SRC_MIX_EDGELOCK = 0,
+   SRC_MIX_AONMIX = 1,
+   SRC_MIX_WAKEUPMIX = 2,
+   SRC_MIX_DDRMIX = 3,
+   SRC_MIX_DDRPHY = 4,
+   SRC_MIX_ML = 5,
+   SRC_MIX_NIC = 6,
+   SRC_MIX_HSIO = 7,
+   SRC_MIX_MEDIA = 8,
+   SRC_MIX_CM33 = 9,
+   SRC_MIX_CA55C0 = 10,
+   SRC_MIX_CA55C1 = 11,
+   SRC_MIX_CA55CLUSTER = 12,
+};
+
+enum src_mem_slice_id {
+   SRC_MEM_AONMIX = 0,
+   SRC_MEM_WAKEUPMIX = 1,
+   SRC_MEM_DDRMIX = 2,
+   SRC_MEM_DDRPHY = 3,
+   SRC_MEM_ML = 4,
+   SRC_MEM_NIC = 5,
+   SRC_MEM_OCRAM = 6,
+   SRC_MEM_HSIO = 7,
+   SRC_MEM_MEDIA = 8,
+   SRC_MEM_CA55C0 = 9,
+   SRC_MEM_CA55C1 = 10,
+   SRC_MEM_CA55CLUSTER = 11,
+   SRC_MEM_L3 = 12,
+};
+
+struct blk_ctrl_s_aonmix_regs {
+   u32 cm33_irq_mask[7];
+   u32 initnsvtor;
+   u32 reserved1[8];
+   u32 ca55_irq_mask[7];
+   u32 initsvtor;
+   u32 m33_cfg;
+   u32 reserved2[11];
+   u32 axbs_aon_ctrl;
+   u32 reserved3[27];
+   u32 dap_access_stkybit;
+   u32 reserved4[3];
+   u32 lp_handshake[2];
+   u32 ca55_cpuwait;
+   u32 ca55_rvbaraddr0_l;
+   u32 ca55_rvbaraddr0_h;
+   u32 ca55_rvbaraddr1_l;
+   u32 ca55_rvbaraddr1_h;
+   u32 s401_irq_mask;
+   u32 s401_reset_req_mask;
+   u32 s401_halt_st;
+   u32 ca55_mode;
+   u32 nmi_mask;
+   u32 nmi_clr;
+   u32 wdog_any_mask;
+   u32 s4v1_ipi_noclk_ref1;
+};
+
+struct blk_ctrl_wakeupmix_regs {
+   u32 upper_addr;
+   u32 ipg_debug_cm33;
+   u32 reserved[2];
+   u32 qch_dis;
+   u32 ssi;
+   u32 reserved1[1];
+   u32 dexsc_err;
+   u32 mqs_setting;
+   u32 sai_clk_sel;
+   u32 eqos_gpr;
+   u32 enet_clk_sel;
+   u32 reserved2[1];
+   u32 volt_detect;
+   u32 i3c2_wakeup;
+   u32 ipg_debug_ca55c0;
+   u32 ipg_debug_ca55c1;
+   u32 axi_attr_cfg;
+   u32 i3c2_sda_irq;
+};
+
+struct src_general_regs {
+   u32 reserved[1];
+   u32 authen_ctrl;
+   u32 reserved1[2];
+   u32 scr;
+   u32 srtmr;
+   u32 srmask;
+   u32 reserved2[1];
+   u32 srmr[6];
+   u32 reserved3[2];
+   u32 sbmr[2];
+   u32 reserved4[2];
+   u32 srsr;
+   u32 gpr[19];
+   u32 reserved5[24];
+   u32 gpr20;
+   u32 cm_quiesce;
+   u32 cold_reset_ssar_ack_ctrl;
+   u32 sp_iso_ctrl;
+   u32 rom_lp_ctrl;
+   u32 a55_deny_stat;
+};
+
+struct src_mem_slice_regs {
+   u32 reserved[1];
+   u32 mem_ctrl;
+   u32 memlp_ctrl_0;
+   u32 reserved1[1];
+   u32 memlp_ctrl_1;
+   u32 memlp_ctrl_2;
+   u32 mem_stat;
+};
+
+struct src_mix_slice_regs {
+   u32 reserved[1];
+   u32 authen_ctrl;
+   u32 reserved1[2];
+   u32 lpm_setting[3];
+   u32 reserved2[1];
+   u32 slice_sw_ctrl;
+   u32 single_reset_sw_ctrl;
+   u32 reserved3[6];
+   u32 a55_hdsk_ack_ctrl;
+   u32 a55_hdsk_ack_stat;
+   u32 reserved4[2];
+   u32 ssar_ack_ctrl;
+   u32 ssar_ack_stat;
+   u32 reserved5[1];
+   u32 iso_off_dly_por;
+   u32 iso_on_dly;
+   u32 iso_off_dly;
+   u32 psw_off_lf_dly;
+   

[PATCH 31/53] imx: imx9: Add gpio registers structure

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Add GPIO registers structure for iMX93, so that we can enable lpgpio
driver

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/Kconfig  |  1 +
 arch/arm/include/asm/arch-imx9/gpio.h | 20 
 2 files changed, 21 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d290194f900..e48054ab385 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -916,6 +916,7 @@ config ARCH_IMX9
select DM
select MACH_IMX
select SUPPORT_SPL
+   select GPIO_EXTRA_HEADER
select MISC
select IMX_SENTINEL
imply CMD_DM
diff --git a/arch/arm/include/asm/arch-imx9/gpio.h 
b/arch/arm/include/asm/arch-imx9/gpio.h
index e69de29bb2d..40732022e7e 100644
--- a/arch/arm/include/asm/arch-imx9/gpio.h
+++ b/arch/arm/include/asm/arch-imx9/gpio.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __ASM_ARCH_IMX9_GPIO_H
+#define __ASM_ARCH_IMX9_GPIO_H
+
+struct gpio_regs {
+   u32 gpio_pdor;
+   u32 gpio_psor;
+   u32 gpio_pcor;
+   u32 gpio_ptor;
+   u32 gpio_pdir;
+   u32 gpio_pddr;
+   u32 gpio_pidr;
+   u8 gpio_pxdr[32];
+};
+
+#endif
-- 
2.36.0



[PATCH 30/53] misc: fuse: update the code for accessing fuse of i.MX93

2022-07-20 Thread Peng Fan (OSS)
From: Alice Guo 

Sentinel have read access of OTP shadow register 0-511, and fsb have
read access of shadow 0-51/312-511.

Reviewed-by: Ye Li 
Signed-off-by: Alice Guo 
Signed-off-by: Peng Fan 
---
 drivers/misc/sentinel/fuse.c | 86 +++-
 1 file changed, 74 insertions(+), 12 deletions(-)

diff --git a/drivers/misc/sentinel/fuse.c b/drivers/misc/sentinel/fuse.c
index abb4c072f9b..e2b68757664 100644
--- a/drivers/misc/sentinel/fuse.c
+++ b/drivers/misc/sentinel/fuse.c
@@ -75,22 +75,44 @@ struct fsb_map_entry fsb_mapping_table[] = {
{ 0, 8 },
{ 1, 8 },
{ 2, 8 },
-   { -1, 8 },
+   { 3, 8 },
{ 4, 8 },
{ 5, 8 },
-   { 6, 8 }, /* UID */
-   { -1, 8 },
-   { 8, 8 },
-   { 9, 8 },
-   { 10, 8 },
+   { 6, 4 },
+   { -1, 260 },
+   { 39, 8 },
+   { 40, 8 },
+   { 41, 8 },
+   { 42, 8 },
+   { 43, 8 },
+   { 44, 8 },
+   { 45, 8 },
+   { 46, 8 },
+   { 47, 8 },
+   { 48, 8 },
+   { 49, 8 },
+   { 50, 8 },
+   { 51, 8 },
+   { 52, 8 },
+   { 53, 8 },
+   { 54, 8 },
+   { 55, 8 },
+   { 56, 8 },
+   { 57, 8 },
+   { 58, 8 },
+   { 59, 8 },
+   { 60, 8 },
+   { 61, 8 },
+   { 62, 8 },
+   { 63, 8 },
 };
 
 struct s400_map_entry s400_api_mapping_table[] = {
-   { 3, 11 }, /* 24 .. 34 */
-   { 7, 8 },
-   { 16, 11 }, /* 128 .. 143 */
-   { 22, 8 },
-   { 23, 8 },
+   { 7, 1, 7, 63 },
+   { 16, 8, },
+   { 17, 8, },
+   { 22, 1, 6 },
+   { 23, 1, 4 },
 };
 #endif
 
@@ -102,7 +124,8 @@ static s32 map_fsb_fuse_index(u32 bank, u32 word, bool 
*redundancy)
/* map the fuse from ocotp fuse map to FSB*/
for (i = 0; i < size; i++) {
if (fsb_mapping_table[i].fuse_bank != -1 &&
-   fsb_mapping_table[i].fuse_bank == bank) {
+   fsb_mapping_table[i].fuse_bank == bank &&
+   fsb_mapping_table[i].fuse_words > word) {
break;
}
 
@@ -146,6 +169,7 @@ static s32 map_s400_fuse_index(u32 bank, u32 word)
return s400_api_mapping_table[i].fuse_bank * 8 + word;
 }
 
+#if defined(CONFIG_IMX8ULP)
 int fuse_sense(u32 bank, u32 word, u32 *val)
 {
s32 word_index;
@@ -198,6 +222,44 @@ int fuse_sense(u32 bank, u32 word, u32 *val)
 
return -ENOENT;
 }
+#elif defined(CONFIG_ARCH_IMX9)
+int fuse_sense(u32 bank, u32 word, u32 *val)
+{
+   s32 word_index;
+   bool redundancy;
+
+   if (bank >= FUSE_BANKS || word >= WORDS_PER_BANKS || !val)
+   return -EINVAL;
+
+   word_index = map_fsb_fuse_index(bank, word, );
+   if (word_index >= 0) {
+   *val = readl((ulong)FSB_BASE_ADDR + FSB_OTP_SHADOW + 
(word_index << 2));
+   if (redundancy)
+   *val = (*val >> ((word % 2) * 16)) & 0x;
+
+   return 0;
+   }
+
+   word_index = map_s400_fuse_index(bank, word);
+   if (word_index >= 0) {
+   u32 data;
+   u32 res, size = 1;
+   int ret;
+
+   ret = ahab_read_common_fuse(word_index, , size, );
+   if (ret) {
+   printf("ahab read fuse failed %d, 0x%x\n", ret, res);
+   return ret;
+   }
+
+   *val = data;
+
+   return 0;
+   }
+
+   return -ENOENT;
+}
+#endif
 
 int fuse_read(u32 bank, u32 word, u32 *val)
 {
-- 
2.36.0



[PATCH 26/53] imx: imx9: Get the chip revision through S400 API

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/global_data.h |  3 ++
 arch/arm/mach-imx/imx9/soc.c   | 49 +-
 2 files changed, 51 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/global_data.h 
b/arch/arm/include/asm/global_data.h
index 09f352269e5..6ee2a767615 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -92,6 +92,9 @@ struct arch_global_data {
 
 #ifdef CONFIG_IMX_SENTINEL
struct udevice *s400_dev;
+   u32 soc_rev;
+   u32 lifecycle;
+   u32 uid[4];
 #endif
 
 };
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 7c71cbdd55a..c71a5a92504 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -67,9 +68,18 @@ int mmc_get_env_dev(void)
 }
 #endif
 
+static void set_cpu_info(struct sentinel_get_info_data *info)
+{
+   gd->arch.soc_rev = info->soc;
+   gd->arch.lifecycle = info->lc;
+   memcpy((void *)>arch.uid, >uid, 4 * sizeof(u32));
+}
+
 u32 get_cpu_rev(void)
 {
-   return (MXC_CPU_IMX93 << 12) | CHIP_REV_1_0;
+   u32 rev = (gd->arch.soc_rev >> 24) - 0xa0;
+
+   return (MXC_CPU_IMX93 << 12) | (CHIP_REV_1_0 + rev);
 }
 
 #define UNLOCK_WORD 0xD928C520 /* unlock word */
@@ -198,6 +208,17 @@ int ft_system_setup(void *blob, struct bd_info *bd)
return 0;
 }
 
+#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+   printf("UID: 0x%x 0x%x 0x%x 0x%x\n",
+  gd->arch.uid[0], gd->arch.uid[1], gd->arch.uid[2], 
gd->arch.uid[3]);
+
+   serialnr->low = gd->arch.uid[0];
+   serialnr->high = gd->arch.uid[3];
+}
+#endif
+
 int arch_cpu_init(void)
 {
if (IS_ENABLED(CONFIG_SPL_BUILD)) {
@@ -212,6 +233,32 @@ int arch_cpu_init(void)
return 0;
 }
 
+int imx9_probe_mu(void *ctx, struct event *event)
+{
+   struct udevice *devp;
+   int node, ret;
+   u32 res;
+   struct sentinel_get_info_data info;
+
+   node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, 
"fsl,imx93-mu-s4");
+
+   ret = uclass_get_device_by_of_offset(UCLASS_MISC, node, );
+   if (ret)
+   return ret;
+
+   if (gd->flags & GD_FLG_RELOC)
+   return 0;
+
+   ret = ahab_get_info(, );
+   if (ret)
+   return ret;
+
+   set_cpu_info();
+
+   return 0;
+}
+EVENT_SPY(EVT_DM_POST_INIT, imx9_probe_mu);
+
 int timer_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
-- 
2.36.0



[PATCH 23/53] misc: s400_api: introduce ahab_release_m33_trout

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/s400_api.h |  1 +
 drivers/misc/sentinel/s400_api.c | 25 
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/include/asm/mach-imx/s400_api.h 
b/arch/arm/include/asm/mach-imx/s400_api.h
index d95f8227b29..dc176e1f619 100644
--- a/arch/arm/include/asm/mach-imx/s400_api.h
+++ b/arch/arm/include/asm/mach-imx/s400_api.h
@@ -55,5 +55,6 @@ int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 
*response);
 int ahab_dump_buffer(u32 *buffer, u32 buffer_length);
 int ahab_get_info(struct sentinel_get_info_data *info, u32 *response);
 int ahab_get_fw_status(u32 *status, u32 *response);
+int ahab_release_m33_trout(void);
 
 #endif
diff --git a/drivers/misc/sentinel/s400_api.c b/drivers/misc/sentinel/s400_api.c
index ca7903670ed..01a673e5e13 100644
--- a/drivers/misc/sentinel/s400_api.c
+++ b/drivers/misc/sentinel/s400_api.c
@@ -420,3 +420,28 @@ int ahab_get_fw_status(u32 *status, u32 *response)
 
return ret;
 }
+
+int ahab_release_m33_trout(void)
+{
+   struct udevice *dev = gd->arch.s400_dev;
+   int size = sizeof(struct sentinel_msg);
+   struct sentinel_msg msg;
+   int ret;
+
+   if (!dev) {
+   printf("s400 dev is not initialized\n");
+   return -ENODEV;
+   }
+
+   msg.version = AHAB_VERSION;
+   msg.tag = AHAB_CMD_TAG;
+   msg.size = 1;
+   msg.command = 0xd3;
+
+   ret = misc_call(dev, false, , size, , size);
+   if (ret)
+   printf("Error: %s: ret %d, response 0x%x\n",
+  __func__, ret, msg.data[0]);
+
+   return ret;
+}
-- 
2.36.0



[PATCH 24/53] imx: imx9: Add TRDC driver for TRDC init

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Add TRDC driver to iMX9. The TRDC init splits to two phases:
1. Early init phase will release TRDC from Sentinel and open write
   permission to the memory where SPL image runs. Sentinel will set
   the memory to RX only after ROM authentication for the OEM
   closed part.
2. Init phase will configure TRDC to allow non-secure master to
   access DDR. So the peripherals can work in u-boot.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/trdc.h |  19 +
 arch/arm/mach-imx/imx9/Makefile   |   2 +-
 arch/arm/mach-imx/imx9/soc.c  |   3 +
 arch/arm/mach-imx/imx9/trdc.c | 581 ++
 4 files changed, 604 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-imx9/trdc.h
 create mode 100644 arch/arm/mach-imx/imx9/trdc.c

diff --git a/arch/arm/include/asm/arch-imx9/trdc.h 
b/arch/arm/include/asm/arch-imx9/trdc.h
new file mode 100644
index 000..1481ee375b7
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx9/trdc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __ASM_ARCH_IMX9_TRDC_H
+#define __ASM_ARCH_IMX9_TRDC_H
+
+int trdc_mbc_set_control(ulong trdc_reg, u32 mbc_x, u32 glbac_id, u32 
glbac_val);
+int trdc_mbc_blk_config(ulong trdc_reg, u32 mbc_x, u32 dom_x, u32 mem_x, u32 
blk_x,
+   bool sec_access, u32 glbac_id);
+int trdc_mrc_set_control(ulong trdc_reg, u32 mrc_x, u32 glbac_id, u32 
glbac_val);
+int trdc_mrc_region_config(ulong trdc_reg, u32 mrc_x, u32 dom_x, u32 
addr_start,
+  u32 addr_end, bool sec_access, u32 glbac_id);
+
+void trdc_early_init(void);
+void trdc_init(void);
+
+#endif
diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile
index 7be0343d52e..0124212f266 100644
--- a/arch/arm/mach-imx/imx9/Makefile
+++ b/arch/arm/mach-imx/imx9/Makefile
@@ -3,4 +3,4 @@
 # Copyright 2022 NXP
 
 obj-y += lowlevel_init.o
-obj-y += soc.o clock.o clock_root.o
+obj-y += soc.o clock.o clock_root.o trdc.o
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 9ea2d51495b..7c71cbdd55a 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -204,6 +205,8 @@ int arch_cpu_init(void)
init_wdog();
 
clock_init();
+
+   trdc_early_init();
}
 
return 0;
diff --git a/arch/arm/mach-imx/imx9/trdc.c b/arch/arm/mach-imx/imx9/trdc.c
new file mode 100644
index 000..b0881697a10
--- /dev/null
+++ b/arch/arm/mach-imx/imx9/trdc.c
@@ -0,0 +1,581 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DID_NUM 16
+#define MBC_MAX_NUM 4
+#define MRC_MAX_NUM 2
+#define MBC_NUM(HWCFG) (((HWCFG) >> 16) & 0xF)
+#define MRC_NUM(HWCFG) (((HWCFG) >> 24) & 0x1F)
+
+struct mbc_mem_dom {
+   u32 mem_glbcfg[4];
+   u32 nse_blk_index;
+   u32 nse_blk_set;
+   u32 nse_blk_clr;
+   u32 nsr_blk_clr_all;
+   u32 memn_glbac[8];
+   /* The upper only existed in the beginning of each MBC */
+   u32 mem0_blk_cfg_w[64];
+   u32 mem0_blk_nse_w[16];
+   u32 mem1_blk_cfg_w[8];
+   u32 mem1_blk_nse_w[2];
+   u32 mem2_blk_cfg_w[8];
+   u32 mem2_blk_nse_w[2];
+   u32 mem3_blk_cfg_w[8];
+   u32 mem3_blk_nse_w[2];/*0x1F0, 0x1F4 */
+   u32 reserved[2];
+};
+
+struct mrc_rgn_dom {
+   u32 mrc_glbcfg[4];
+   u32 nse_rgn_indirect;
+   u32 nse_rgn_set;
+   u32 nse_rgn_clr;
+   u32 nse_rgn_clr_all;
+   u32 memn_glbac[8];
+   /* The upper only existed in the beginning of each MRC */
+   u32 rgn_desc_words[16][2]; /* 16  regions at max, 2 words per region */
+   u32 rgn_nse;
+   u32 reserved2[15];
+};
+
+struct mda_inst {
+   u32 mda_w[8];
+};
+
+struct trdc_mgr {
+   u32 trdc_cr;
+   u32 res0[59];
+   u32 trdc_hwcfg0;
+   u32 trdc_hwcfg1;
+   u32 res1[450];
+   struct mda_inst mda[8];
+   u32 res2[15808];
+};
+
+struct trdc_mbc {
+   struct mbc_mem_dom mem_dom[DID_NUM];
+};
+
+struct trdc_mrc {
+   struct mrc_rgn_dom mrc_dom[DID_NUM];
+};
+
+int trdc_mda_set_cpu(ulong trdc_reg, u32 mda_inst, u32 mda_reg, u8 sa, u8 dids,
+u8 did, u8 pe, u8 pidm, u8 pid)
+{
+   struct trdc_mgr *trdc_base = (struct trdc_mgr *)trdc_reg;
+   u32 *mda_w = _base->mda[mda_inst].mda_w[mda_reg];
+   u32 val = readl(mda_w);
+
+   if (val & BIT(29)) /* non-cpu */
+   return -EINVAL;
+
+   val = BIT(31) | ((pid & 0x3f) << 16) | ((pidm & 0x3f) << 8) |
+   ((pe & 0x3) << 6) | ((sa & 0x3) << 14) | ((dids & 0x3) << 4) |
+   (did & 0xf);
+
+   writel(val, mda_w);
+
+   return 0;
+}
+
+int trdc_mda_set_noncpu(ulong 

[PATCH 29/53] misc: fuse: support to access fuse on i.MX93

2022-07-20 Thread Peng Fan (OSS)
From: Alice Guo 

i.MX93 fuse can be accessed through FSB and s400-api. Add mapping tables
for i.MX93. The offset address of FSB accessing OTP shadow registers is
different between i.MX8ULP and i.MX93, so use macro to define the offset
address instead of hardcode.

Signed-off-by: Alice Guo 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/imx-regs.h |  2 ++
 drivers/misc/sentinel/fuse.c  | 30 ++-
 2 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h 
b/arch/arm/include/asm/arch-imx9/imx-regs.h
index 7b84b970b75..fa6951ebbe8 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -19,6 +19,8 @@
 #define WDG4_BASE_ADDR  0x424aUL
 #define WDG5_BASE_ADDR  0x424bUL
 
+#define FSB_BASE_ADDR   0x4751UL
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include 
 #include 
diff --git a/drivers/misc/sentinel/fuse.c b/drivers/misc/sentinel/fuse.c
index 83d2c25731f..abb4c072f9b 100644
--- a/drivers/misc/sentinel/fuse.c
+++ b/drivers/misc/sentinel/fuse.c
@@ -31,6 +31,9 @@ struct s400_map_entry {
u32 s400_index;
 };
 
+#if defined(CONFIG_IMX8ULP)
+#define FSB_OTP_SHADOW 0x800
+
 struct fsb_map_entry fsb_mapping_table[] = {
{ 3, 8 },
{ 4, 8 },
@@ -65,6 +68,31 @@ struct s400_map_entry s400_api_mapping_table[] = {
{ 23, 1, 4, 2 }, /* OTFAD */
{ 25, 8 }, /* Test config2 */
 };
+#elif defined(CONFIG_ARCH_IMX9)
+#define FSB_OTP_SHADOW 0x8000
+
+struct fsb_map_entry fsb_mapping_table[] = {
+   { 0, 8 },
+   { 1, 8 },
+   { 2, 8 },
+   { -1, 8 },
+   { 4, 8 },
+   { 5, 8 },
+   { 6, 8 }, /* UID */
+   { -1, 8 },
+   { 8, 8 },
+   { 9, 8 },
+   { 10, 8 },
+};
+
+struct s400_map_entry s400_api_mapping_table[] = {
+   { 3, 11 }, /* 24 .. 34 */
+   { 7, 8 },
+   { 16, 11 }, /* 128 .. 143 */
+   { 22, 8 },
+   { 23, 8 },
+};
+#endif
 
 static s32 map_fsb_fuse_index(u32 bank, u32 word, bool *redundancy)
 {
@@ -128,7 +156,7 @@ int fuse_sense(u32 bank, u32 word, u32 *val)
 
word_index = map_fsb_fuse_index(bank, word, );
if (word_index >= 0) {
-   *val = readl((ulong)FSB_BASE_ADDR + 0x800 + (word_index << 2));
+   *val = readl((ulong)FSB_BASE_ADDR + FSB_OTP_SHADOW + 
(word_index << 2));
if (redundancy)
*val = (*val >> ((word % 2) * 16)) & 0x;
 
-- 
2.36.0



[PATCH 21/53] misc: S400_API: Update release RDC API

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

To support more RDC instances on i.MX93, update API to latest
definition.

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/mach-imx/s400_api.h |  2 +-
 drivers/misc/sentinel/s400_api.c | 21 +
 2 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/mach-imx/s400_api.h 
b/arch/arm/include/asm/mach-imx/s400_api.h
index b3e6b3fa45d..d09c078df01 100644
--- a/arch/arm/include/asm/mach-imx/s400_api.h
+++ b/arch/arm/include/asm/mach-imx/s400_api.h
@@ -32,7 +32,7 @@ struct imx8ulp_s400_msg {
u32 data[(S400_MAX_MSG - 1U)];
 };
 
-int ahab_release_rdc(u8 core_id, bool xrdc, u32 *response);
+int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response);
 int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response);
 int ahab_release_container(u32 *response);
 int ahab_verify_image(u32 img_id, u32 *response);
diff --git a/drivers/misc/sentinel/s400_api.c b/drivers/misc/sentinel/s400_api.c
index 3d791bc868e..4e90171420f 100644
--- a/drivers/misc/sentinel/s400_api.c
+++ b/drivers/misc/sentinel/s400_api.c
@@ -14,7 +14,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int ahab_release_rdc(u8 core_id, bool xrdc, u32 *response)
+int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response)
 {
struct udevice *dev = gd->arch.s400_dev;
int size = sizeof(struct imx8ulp_s400_msg);
@@ -30,10 +30,23 @@ int ahab_release_rdc(u8 core_id, bool xrdc, u32 *response)
msg.tag = AHAB_CMD_TAG;
msg.size = 2;
msg.command = AHAB_RELEASE_RDC_REQ_CID;
-   if (xrdc)
-   msg.data[0] = (0x78 << 8) | core_id;
-   else
+   switch (xrdc) {
+   case 0:
msg.data[0] = (0x74 << 8) | core_id;
+   break;
+   case 1:
+   msg.data[0] = (0x78 << 8) | core_id;
+   break;
+   case 2:
+   msg.data[0] = (0x82 << 8) | core_id;
+   break;
+   case 3:
+   msg.data[0] = (0x86 << 8) | core_id;
+   break;
+   default:
+   printf("Error: wrong xrdc index %u\n", xrdc);
+   return -EINVAL;
+   }
 
ret = misc_call(dev, false, , size, , size);
if (ret)
-- 
2.36.0



[PATCH 19/53] misc: imx: S400_API: Move S400 MU and API to a common place

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/Kconfig  |   4 +
 arch/arm/include/asm/global_data.h|   2 +-
 .../asm/{arch-imx8ulp => mach-imx}/mu_hal.h   |   4 +-
 .../asm/{arch-imx8ulp => mach-imx}/s400_api.h |   0
 arch/arm/mach-imx/imx8ulp/ahab.c  | 345 ++
 arch/arm/mach-imx/imx8ulp/rdc.c   |   4 +-
 arch/arm/mach-imx/imx8ulp/soc.c   |   4 +-
 board/freescale/imx8ulp_evk/spl.c |   2 +-
 drivers/misc/Kconfig  |   7 +
 drivers/misc/Makefile |   2 +
 drivers/misc/imx8ulp/Makefile |   1 -
 drivers/misc/imx8ulp/fuse.c   |   2 +-
 drivers/misc/sentinel/Makefile|   3 +
 drivers/misc/{imx8ulp => sentinel}/s400_api.c |   6 +-
 .../{imx8ulp/imx8ulp_mu.c => sentinel/s4mu.c} |   4 +-
 15 files changed, 375 insertions(+), 15 deletions(-)
 rename arch/arm/include/asm/{arch-imx8ulp => mach-imx}/mu_hal.h (79%)
 rename arch/arm/include/asm/{arch-imx8ulp => mach-imx}/s400_api.h (100%)
 create mode 100644 arch/arm/mach-imx/imx8ulp/ahab.c
 create mode 100644 drivers/misc/sentinel/Makefile
 rename drivers/misc/{imx8ulp => sentinel}/s400_api.c (98%)
 rename drivers/misc/{imx8ulp/imx8ulp_mu.c => sentinel/s4mu.c} (98%)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2802b9b3fa5..d290194f900 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -905,6 +905,8 @@ config ARCH_IMX8ULP
select OF_CONTROL
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
+   select MISC
+   select IMX_SENTINEL
imply CMD_DM
imply DM_EVENT
 
@@ -914,6 +916,8 @@ config ARCH_IMX9
select DM
select MACH_IMX
select SUPPORT_SPL
+   select MISC
+   select IMX_SENTINEL
imply CMD_DM
imply DM_EVENT
 
diff --git a/arch/arm/include/asm/global_data.h 
b/arch/arm/include/asm/global_data.h
index 085e12b5d4d..09f352269e5 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -90,7 +90,7 @@ struct arch_global_data {
struct udevice *scu_dev;
 #endif
 
-#ifdef CONFIG_ARCH_IMX8ULP
+#ifdef CONFIG_IMX_SENTINEL
struct udevice *s400_dev;
 #endif
 
diff --git a/arch/arm/include/asm/arch-imx8ulp/mu_hal.h 
b/arch/arm/include/asm/mach-imx/mu_hal.h
similarity index 79%
rename from arch/arm/include/asm/arch-imx8ulp/mu_hal.h
rename to arch/arm/include/asm/mach-imx/mu_hal.h
index 10d966d5d43..5db559c1ac5 100644
--- a/arch/arm/include/asm/arch-imx8ulp/mu_hal.h
+++ b/arch/arm/include/asm/mach-imx/mu_hal.h
@@ -3,8 +3,8 @@
  * Copyright 2021 NXP
  */
 
-#ifndef __IMX8ULP_MU_HAL_H__
-#define __IMX8ULP_MU_HAL_H__
+#ifndef __SNT_MU_HAL_H__
+#define __SNT_MU_HAL_H__
 
 void mu_hal_init(ulong base);
 int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg);
diff --git a/arch/arm/include/asm/arch-imx8ulp/s400_api.h 
b/arch/arm/include/asm/mach-imx/s400_api.h
similarity index 100%
rename from arch/arm/include/asm/arch-imx8ulp/s400_api.h
rename to arch/arm/include/asm/mach-imx/s400_api.h
diff --git a/arch/arm/mach-imx/imx8ulp/ahab.c b/arch/arm/mach-imx/imx8ulp/ahab.c
new file mode 100644
index 000..87c4c66a087
--- /dev/null
+++ b/arch/arm/mach-imx/imx8ulp/ahab.c
@@ -0,0 +1,345 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define IMG_CONTAINER_BASE (0x2201UL)
+#define IMG_CONTAINER_END_BASE (IMG_CONTAINER_BASE + 0xUL)
+
+#define AHAB_NO_AUTHENTICATION_IND 0xee
+#define AHAB_BAD_KEY_HASH_IND 0xfa
+#define AHAB_INVALID_KEY_IND 0xf9
+#define AHAB_BAD_SIGNATURE_IND 0xf0
+#define AHAB_BAD_HASH_IND 0xf1
+
+static void display_ahab_auth_ind(u32 event)
+{
+   u8 resp_ind = (event >> 8) & 0xff;
+
+   switch (resp_ind) {
+   case AHAB_NO_AUTHENTICATION_IND:
+   printf("AHAB_NO_AUTHENTICATION_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_BAD_KEY_HASH_IND:
+   printf("AHAB_BAD_KEY_HASH_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_INVALID_KEY_IND:
+   printf("AHAB_INVALID_KEY_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_BAD_SIGNATURE_IND:
+   printf("AHAB_BAD_SIGNATURE_IND (0x%02X)\n\n", resp_ind);
+   break;
+   case AHAB_BAD_HASH_IND:
+   printf("AHAB_BAD_HASH_IND (0x%02X)\n\n", resp_ind);
+   break;
+   default:
+   printf("Unknown Indicator (0x%02X)\n\n", resp_ind);
+   break;
+   }
+}
+
+int ahab_auth_cntr_hdr(struct container_hdr *container, u16 

[PATCH 14/53] mmc: fsl_esdhc_imx: Support i.MX9

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Support i.MX9 for fsl_esdhc_imx driver

Signed-off-by: Peng Fan 
---
 drivers/mmc/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 6ff00a7cbd3..6276593b3e7 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -853,7 +853,7 @@ config FSL_ESDHC_IMX
 
 config FSL_USDHC
bool "Freescale/NXP i.MX uSDHC controller support"
-   depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMX8ULP || IMXRT
+   depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMX8ULP || IMX9 
|| IMXRT
select FSL_ESDHC_IMX
help
  This enables the Ultra Secured Digital Host Controller enhancements
-- 
2.36.0



[PATCH 20/53] misc: s4mu: Support iMX93 with Sentinel MU

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Support iMX93 communicate with Sentinel

Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/imx-regs.h | 30 +++
 drivers/misc/sentinel/s4mu.c  |  1 +
 2 files changed, 31 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h 
b/arch/arm/include/asm/arch-imx9/imx-regs.h
index e4babed40fc..7b84b970b75 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -19,4 +19,34 @@
 #define WDG4_BASE_ADDR  0x424aUL
 #define WDG5_BASE_ADDR  0x424bUL
 
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+#include 
+#include 
+
+struct mu_type {
+   u32 ver;
+   u32 par;
+   u32 cr;
+   u32 sr;
+   u32 reserved0[60];
+   u32 fcr;
+   u32 fsr;
+   u32 reserved1[2];
+   u32 gier;
+   u32 gcr;
+   u32 gsr;
+   u32 reserved2;
+   u32 tcr;
+   u32 tsr;
+   u32 rcr;
+   u32 rsr;
+   u32 reserved3[52];
+   u32 tr[16];
+   u32 reserved4[16];
+   u32 rr[16];
+   u32 reserved5[14];
+   u32 mu_attr;
+};
+#endif
+
 #endif
diff --git a/drivers/misc/sentinel/s4mu.c b/drivers/misc/sentinel/s4mu.c
index 121a81060a6..18aea27105e 100644
--- a/drivers/misc/sentinel/s4mu.c
+++ b/drivers/misc/sentinel/s4mu.c
@@ -219,6 +219,7 @@ static struct misc_ops imx8ulp_mu_ops = {
 
 static const struct udevice_id imx8ulp_mu_ids[] = {
{ .compatible = "fsl,imx8ulp-mu" },
+   { .compatible = "fsl,imx93-mu-s4" },
{ }
 };
 
-- 
2.36.0



[PATCH 17/53] imx: imx9: disable watchdog

2022-07-20 Thread Peng Fan (OSS)
From: Ye Li 

Disable all 3 wdogs on AIPS2 and unmask SRC reset trigger for WDOG3-5

Signed-off-by: Ye Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/imx-regs.h |  4 ++
 arch/arm/mach-imx/imx9/soc.c  | 45 ++-
 2 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h 
b/arch/arm/include/asm/arch-imx9/imx-regs.h
index 32c76ce9c3b..e4babed40fc 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -15,4 +15,8 @@
 
 #define ANATOP_BASE_ADDR0x4448UL
 
+#define WDG3_BASE_ADDR  0x4249UL
+#define WDG4_BASE_ADDR  0x424aUL
+#define WDG5_BASE_ADDR  0x424bUL
+
 #endif
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 4b8f1ca30d5..8b620832b5d 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -34,6 +34,45 @@ u32 get_cpu_rev(void)
return (MXC_CPU_IMX93 << 12) | CHIP_REV_1_0;
 }
 
+#define UNLOCK_WORD 0xD928C520 /* unlock word */
+#define REFRESH_WORD 0xB480A602 /* refresh word */
+
+static void disable_wdog(void __iomem *wdog_base)
+{
+   u32 val_cs = readl(wdog_base + 0x00);
+
+   if (!(val_cs & 0x80))
+   return;
+
+   /* default is 32bits cmd */
+   writel(REFRESH_WORD, (wdog_base + 0x04)); /* Refresh the CNT */
+
+   if (!(val_cs & 0x800)) {
+   writel(UNLOCK_WORD, (wdog_base + 0x04));
+   while (!(readl(wdog_base + 0x00) & 0x800))
+   ;
+   }
+   writel(0x0, (wdog_base + 0x0C)); /* Set WIN to 0 */
+   writel(0x400, (wdog_base + 0x08)); /* Set timeout to default 0x400 */
+   writel(0x2120, (wdog_base + 0x00)); /* Disable it and set update */
+
+   while (!(readl(wdog_base + 0x00) & 0x400))
+   ;
+}
+
+void init_wdog(void)
+{
+   u32 src_val;
+
+   disable_wdog((void __iomem *)WDG3_BASE_ADDR);
+   disable_wdog((void __iomem *)WDG4_BASE_ADDR);
+   disable_wdog((void __iomem *)WDG5_BASE_ADDR);
+
+   src_val = readl(0x54460018); /* reset mask */
+   src_val &= ~0x1c;
+   writel(src_val, 0x54460018);
+}
+
 static struct mm_region imx93_mem_map[] = {
{
/* ROM */
@@ -123,8 +162,12 @@ int ft_system_setup(void *blob, struct bd_info *bd)
 
 int arch_cpu_init(void)
 {
-   if (IS_ENABLED(CONFIG_SPL_BUILD))
+   if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+   /* Disable wdog */
+   init_wdog();
+
clock_init();
+   }
 
return 0;
 }
-- 
2.36.0



[PATCH 12/53] imx: pinctrl: add pinctrl and pinfunc file for i.MX93

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add the pinctrl driver and pinfunc header file to support iMX93

Signed-off-by: Peng Fan 
---
 arch/arm/dts/imx93-pinfunc.h| 625 
 drivers/pinctrl/nxp/Kconfig |  13 +
 drivers/pinctrl/nxp/Makefile|   1 +
 drivers/pinctrl/nxp/pinctrl-imx93.c |  37 ++
 4 files changed, 676 insertions(+)
 create mode 100644 arch/arm/dts/imx93-pinfunc.h
 create mode 100644 drivers/pinctrl/nxp/pinctrl-imx93.c

diff --git a/arch/arm/dts/imx93-pinfunc.h b/arch/arm/dts/imx93-pinfunc.h
new file mode 100644
index 000..7f0136c70b6
--- /dev/null
+++ b/arch/arm/dts/imx93-pinfunc.h
@@ -0,0 +1,625 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __DTS_IMX93_PINFUNC_H
+#define __DTS_IMX93_PINFUNC_H
+
+/*
+ * The pin function ID is a tuple of
+ * 
+ */
+#define MX93_PAD_DAP_TDI__JTAG_MUX_TDI0x 
0x01B0 0x03E0 0x0 0x0
+#define MX93_PAD_DAP_TDI__MQS2_LEFT   0x 
0x01B0 0x 0x1 0x0
+#define MX93_PAD_DAP_TDI__CAN2_TX 0x 
0x01B0 0x 0x3 0x0
+#define MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO300x 
0x01B0 0x 0x4 0x0
+#define MX93_PAD_DAP_TDI__GPIO3_IO28  0x 
0x01B0 0x03CC 0x5 0x0
+#define MX93_PAD_DAP_TDI__LPUART5_RX  0x 
0x01B0 0x0438 0x6 0x0
+#define MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS  0x0004 
0x01B4 0x03E4 0x0 0x0
+#define MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31  0x0004 
0x01B4 0x 0x4 0x0
+#define MX93_PAD_DAP_TMS_SWDIO__GPIO3_IO290x0004 
0x01B4 0x03D0 0x5 0x0
+#define MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x0004 
0x01B4 0x 0x6 0x0
+#define MX93_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK 0x0008 
0x01B8 0x03DC 0x0 0x0
+#define MX93_PAD_DAP_TCLK_SWCLK__FLEXIO1_FLEXIO30 0x0008 
0x01B8 0x 0x4 0x0
+#define MX93_PAD_DAP_TCLK_SWCLK__GPIO3_IO30   0x0008 
0x01B8 0x 0x5 0x0
+#define MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B0x0008 
0x01B8 0x0434 0x6 0x0
+#define MX93_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO   0x000C 
0x01BC 0x 0x0 0x0
+#define MX93_PAD_DAP_TDO_TRACESWO__MQS2_RIGHT 0x000C 
0x01BC 0x 0x1 0x0
+#define MX93_PAD_DAP_TDO_TRACESWO__CAN2_RX0x000C 
0x01BC 0x0364 0x3 0x0
+#define MX93_PAD_DAP_TDO_TRACESWO__FLEXIO1_FLEXIO31   0x000C 
0x01BC 0x 0x4 0x0
+#define MX93_PAD_DAP_TDO_TRACESWO__GPIO3_IO31 0x000C 
0x01BC 0x 0x5 0x0
+#define MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x000C 
0x01BC 0x043C 0x6 0x0
+#define MX93_PAD_GPIO_IO00__GPIO2_IO000x0010 
0x01C0 0x 0x0 0x0
+#define MX93_PAD_GPIO_IO00__LPI2C3_SDA0x0010 
0x01C0 0x03EC 0x1 0x0
+#define MX93_PAD_GPIO_IO00__MEDIAMIX_CAM_CLK  0x0010 
0x01C0 0x 0x2 0x0
+#define MX93_PAD_GPIO_IO00__MEDIAMIX_DISP_CLK 0x0010 
0x01C0 0x 0x3 0x0
+#define MX93_PAD_GPIO_IO00__LPSPI6_PCS0   0x0010 
0x01C0 0x 0x4 0x0
+#define MX93_PAD_GPIO_IO00__LPUART5_TX0x0010 
0x01C0 0x043C 0x5 0x1
+#define MX93_PAD_GPIO_IO00__LPI2C5_SDA0x0010 
0x01C0 0x03F4 0x6 0x0
+#define MX93_PAD_GPIO_IO00__FLEXIO1_FLEXIO00  0x0010 
0x01C0 0x036C 0x7 0x0
+#define MX93_PAD_GPIO_IO01__GPIO2_IO010x0014 
0x01C4 0x 0x0 0x0
+#define MX93_PAD_GPIO_IO01__LPI2C3_SCL0x0014 
0x01C4 0x03E8 0x1 0x0
+#define MX93_PAD_GPIO_IO01__MEDIAMIX_CAM_DATA00   0x0014 
0x01C4 0x 0x2 0x0
+#define MX93_PAD_GPIO_IO01__MEDIAMIX_DISP_DE  0x0014 
0x01C4 0x 0x3 0x0
+#define MX93_PAD_GPIO_IO01__LPSPI6_SIN0x0014 
0x01C4 0x 0x4 0x0
+#define MX93_PAD_GPIO_IO01__LPUART5_RX0x0014 
0x01C4 0x0438 0x5 0x1
+#define MX93_PAD_GPIO_IO01__LPI2C5_SCL0x0014 
0x01C4 0x03F0 0x6 0x0
+#define MX93_PAD_GPIO_IO01__FLEXIO1_FLEXIO01  0x0014 
0x01C4 0x0370 0x7 0x0
+#define MX93_PAD_GPIO_IO02__GPIO2_IO020x0018 
0x01C8 0x 0x0 0x0
+#define MX93_PAD_GPIO_IO02__LPI2C4_SDA0x0018 
0x01C8 0x 0x1 0x0
+#define MX93_PAD_GPIO_IO02__MEDIAMIX_CAM_VSYNC0x0018 
0x01C8 0x 0x2 0x0
+#define MX93_PAD_GPIO_IO02__MEDIAMIX_DISP_VSYNC   0x0018 
0x01C8 0x 0x3 0x0
+#define MX93_PAD_GPIO_IO02__LPSPI6_SOUT   0x0018 
0x01C8 0x 0x4 0x0
+#define MX93_PAD_GPIO_IO02__LPUART5_CTS_B 0x0018 
0x01C8 0x0434 0x5 0x1
+#define MX93_PAD_GPIO_IO02__LPI2C6_SDA0x0018 

[PATCH 16/53] imx: imx9: Add function to initialize timer

2022-07-20 Thread Peng Fan (OSS)
From: Jian Li 

Add timer_init to update ARM arch timer with correct frequency
from system counter and enable system counter.

Signed-off-by: Jian Li 
Signed-off-by: Peng Fan 
---
 arch/arm/include/asm/arch-imx9/imx-regs.h |  1 +
 arch/arm/mach-imx/imx9/soc.c  | 19 +++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h 
b/arch/arm/include/asm/arch-imx9/imx-regs.h
index 50ec902987d..32c76ce9c3b 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -11,6 +11,7 @@
 #define IOMUXC_BASE_ADDR   0x443CUL
 #define CCM_BASE_ADDR  0x4445UL
 #define CCM_CCGR_BASE_ADDR 0x44458000UL
+#define SYSCNT_CTRL_BASE_ADDR  0x4429
 
 #define ANATOP_BASE_ADDR0x4448UL
 
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index d4a97729c67..4b8f1ca30d5 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -128,3 +128,22 @@ int arch_cpu_init(void)
 
return 0;
 }
+
+int timer_init(void)
+{
+#ifdef CONFIG_SPL_BUILD
+   struct sctr_regs *sctr = (struct sctr_regs *)SYSCNT_CTRL_BASE_ADDR;
+   unsigned long freq = readl(>cntfid0);
+
+   /* Update with accurate clock frequency */
+   asm volatile("msr cntfrq_el0, %0" : : "r" (freq) : "memory");
+
+   clrsetbits_le32(>cntcr, SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1,
+   SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG);
+#endif
+
+   gd->arch.tbl = 0;
+   gd->arch.tbu = 0;
+
+   return 0;
+}
-- 
2.36.0



[PATCH 09/53] imx: add basic i.MX9 support

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Add i.MX9 Kconfig and basic files for the new SoC

Signed-off-by: Peng Fan 
---
 arch/arm/Kconfig|  11 +
 arch/arm/include/asm/arch-imx/cpu.h |   2 +
 arch/arm/include/asm/arch-imx9/clock.h  |   0
 arch/arm/include/asm/arch-imx9/gpio.h   |   0
 arch/arm/include/asm/arch-imx9/imx-regs.h   |  13 +
 arch/arm/include/asm/arch-imx9/imx93_pins.h | 729 
 arch/arm/include/asm/arch-imx9/sys_proto.h  |  11 +
 arch/arm/include/asm/mach-imx/iomux-v3.h|  11 +-
 arch/arm/include/asm/mach-imx/sys_proto.h   |   3 +
 arch/arm/mach-imx/Makefile  |  11 +-
 arch/arm/mach-imx/imx9/Kconfig  |  17 +
 arch/arm/mach-imx/imx9/Makefile |   6 +
 arch/arm/mach-imx/imx9/clock.c  |  27 +
 arch/arm/mach-imx/imx9/lowlevel_init.S  |  26 +
 arch/arm/mach-imx/imx9/soc.c| 127 
 arch/arm/mach-imx/spl.c |   2 +-
 16 files changed, 991 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-imx9/clock.h
 create mode 100644 arch/arm/include/asm/arch-imx9/gpio.h
 create mode 100644 arch/arm/include/asm/arch-imx9/imx-regs.h
 create mode 100644 arch/arm/include/asm/arch-imx9/imx93_pins.h
 create mode 100644 arch/arm/include/asm/arch-imx9/sys_proto.h
 create mode 100644 arch/arm/mach-imx/imx9/Kconfig
 create mode 100644 arch/arm/mach-imx/imx9/Makefile
 create mode 100644 arch/arm/mach-imx/imx9/clock.c
 create mode 100644 arch/arm/mach-imx/imx9/lowlevel_init.S
 create mode 100644 arch/arm/mach-imx/imx9/soc.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d4fc83318a6..2802b9b3fa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -908,6 +908,15 @@ config ARCH_IMX8ULP
imply CMD_DM
imply DM_EVENT
 
+config ARCH_IMX9
+   bool "NXP i.MX9 platform"
+   select ARM64
+   select DM
+   select MACH_IMX
+   select SUPPORT_SPL
+   imply CMD_DM
+   imply DM_EVENT
+
 config ARCH_IMXRT
bool "NXP i.MXRT platform"
select CPU_V7M
@@ -2228,6 +2237,8 @@ source "arch/arm/mach-imx/imx8m/Kconfig"
 
 source "arch/arm/mach-imx/imx8ulp/Kconfig"
 
+source "arch/arm/mach-imx/imx9/Kconfig"
+
 source "arch/arm/mach-imx/imxrt/Kconfig"
 
 source "arch/arm/mach-imx/mxs/Kconfig"
diff --git a/arch/arm/include/asm/arch-imx/cpu.h 
b/arch/arm/include/asm/arch-imx/cpu.h
index 4f63803765e..d54e6e63352 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -59,6 +59,7 @@
 
 #define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */
 #define MXC_CPU_VF610  0xF6 /* dummy ID */
+#define MXC_CPU_IMX93  0xC1 /* dummy ID */
 
 #define MXC_SOC_MX60x60
 #define MXC_SOC_MX70x70
@@ -66,6 +67,7 @@
 #define MXC_SOC_IMX8   0x90 /* dummy */
 #define MXC_SOC_IMXRT  0xB0 /* dummy */
 #define MXC_SOC_MX7ULP 0xE0 /* dummy */
+#define MXC_SOC_IMX9   0xC0 /* dummy */
 
 #define CHIP_REV_1_00x10
 #define CHIP_REV_1_10x11
diff --git a/arch/arm/include/asm/arch-imx9/clock.h 
b/arch/arm/include/asm/arch-imx9/clock.h
new file mode 100644
index 000..e69de29bb2d
diff --git a/arch/arm/include/asm/arch-imx9/gpio.h 
b/arch/arm/include/asm/arch-imx9/gpio.h
new file mode 100644
index 000..e69de29bb2d
diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h 
b/arch/arm/include/asm/arch-imx9/imx-regs.h
new file mode 100644
index 000..2adbdadf03c
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __ASM_ARCH_IMX9_REGS_H__
+#define __ASM_ARCH_IMX9_REGS_H__
+
+#define ARCH_MXC
+
+#define IOMUXC_BASE_ADDR 0x443CUL
+
+#endif
diff --git a/arch/arm/include/asm/arch-imx9/imx93_pins.h 
b/arch/arm/include/asm/arch-imx9/imx93_pins.h
new file mode 100644
index 000..f13aef5619c
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx9/imx93_pins.h
@@ -0,0 +1,729 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __ASM_ARCH_IMX93_PINS_H__
+#define __ASM_ARCH_IMX93_PINS_H__
+
+#include 
+
+enum {
+   MX93_PAD_DAP_TDI__JTAG_MUX_TDI  = IOMUX_PAD(0x1B0, 
0x, 0, 0x3D8, 0, 0),
+   MX93_PAD_DAP_TDI__MQS2_LEFT = IOMUX_PAD(0x1B0, 
0x, 1, 0x, 0, 0),
+   MX93_PAD_DAP_TDI__CAN2_TX   = IOMUX_PAD(0x1B0, 
0x, 3, 0x, 0, 0),
+   MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO30  = IOMUX_PAD(0x1B0, 
0x, 4, 0x, 0, 0),
+   MX93_PAD_DAP_TDI__GPIO3_IO28= IOMUX_PAD(0x1B0, 
0x, 5, 0x, 0, 0),
+   MX93_PAD_DAP_TDI__LPUART5_RX= IOMUX_PAD(0x1B0, 
0x, 6, 0x430, 0, 0),
+
+   MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS= IOMUX_PAD(0x1B4, 
0x0004, 0, 0x3DC, 0, 0),
+   MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31= 

[PATCH 15/53] spl: Use SPL_FIT_IMAGE_TINY for iMX9

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Select SPL_FIT_IMAGE_TINY for i.MX9

Signed-off-by: Peng Fan 
---
 common/spl/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0867d18f290..8f7715f403c 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -563,7 +563,7 @@ config SPL_FIT_IMAGE_TINY
bool "Remove functionality from SPL FIT loading to reduce size"
depends on SPL_FIT
default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6
-   default y if ARCH_IMX8M
+   default y if ARCH_IMX8M || ARCH_IMX9
help
  Enable this to reduce the size of the FIT image loading code
  in SPL, if space for the SPL binary is very tight.
-- 
2.36.0



[PATCH 11/53] gpio: pca953x: support pcal6524

2022-07-20 Thread Peng Fan (OSS)
From: Peng Fan 

Support pcal6524 IO expander driver

Signed-off-by: Peng Fan 
---
 drivers/gpio/pca953x_gpio.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c
index e98e1e56dbc..4654f9e0989 100644
--- a/drivers/gpio/pca953x_gpio.c
+++ b/drivers/gpio/pca953x_gpio.c
@@ -43,6 +43,8 @@
 
 #define PCA_GPIO_MASK   0x00FF
 #define PCA_INT 0x0100
+#define PCA_PCAL   BIT(9)
+#define PCA_LATCH_INT  (PCA_PCAL | PCA_INT)
 #define PCA953X_TYPE0x1000
 #define PCA957X_TYPE0x2000
 #define PCA_TYPE_MASK   0xF000
@@ -393,6 +395,8 @@ static const struct udevice_id pca953x_ids[] = {
{ .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
{ .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
 
+   { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
+
{ .compatible = "maxim,max7310", .data = OF_953X(8, 0), },
{ .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
{ .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
-- 
2.36.0



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