Re: [PATCH v2 7/7] CI: Add Aspeed AST2600
Hi Joel, On 29.06.22 09:05, Joel Stanley wrote: The AST2600 has a Qemu model that allows testing. Create a SPI NOR image containing the combined SPL and u-boot FIT image. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- .azure-pipelines.yml | 3 +++ .gitlab-ci.yml | 6 ++ 2 files changed, 9 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 915d5115b12d..bc2b437bd999 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -261,6 +261,9 @@ stages: evb_ast2500: TEST_PY_BD: "evb-ast2500" TEST_PY_ID: "--id qemu" +evb_ast2600: + TEST_PY_BD: "evb-ast2600" + TEST_PY_ID: "--id qemu" vexpress_ca9x4: TEST_PY_BD: "vexpress_ca9x4" TEST_PY_ID: "--id qemu" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index c6a608f7e2a7..f9cd41750791 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -272,6 +272,12 @@ evb-ast2500 test.py: TEST_PY_ID: "--id qemu" <<: *buildman_and_testpy_dfn +evb-ast2600 test.py: + variables: +TEST_PY_BD: "evb-ast2600" +TEST_PY_ID: "--id qemu" + <<: *buildman_and_testpy_dfn + sandbox_flattree test.py: variables: TEST_PY_BD: "sandbox_flattree" Lately I'm seeing often timeout errors while Azure CI runs this evb-ast2600 target "test.py evb_ast2600". Do you have any idea, why this might be the case? Or how to debug / test what might go wrong here? Thanks, Stefan
[PATCH] gitlab-ci: Update comment about the Dockerfile
It's found in the u-boot tree now. Signed-off-by: Joel Stanley --- .gitlab-ci.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 5592862f74b8..cebd76d050b6 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ -# Grab our configured image. The source for this is found at: -# https://source.denx.de/u-boot/gitlab-ci-runner +# Grab our configured image. The source for this is found +# in the u-boot tree at tools/docker/Dockerfile image: trini/u-boot-gitlab-ci-runner:jammy-20220801-09Aug2022 # We run some tests in different order, to catch some failures quicker. -- 2.35.1
Re: [PATCH] imx8m: ddrphy_utils: Remove unused file
On 8/19/2022 7:02 PM, Marek Vasut wrote:
The ddrphy_utils.c is now deduplicated in drivers/ddr/imx/phy/ddrphy_utils.c ,
this drivers/ddr/imx/imx8m/ddrphy_utils.c is a remnant from when the
deduplication was implemented and was not removed. Remove it as it is
unused.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
Cc: Ye Li
Cc: uboot-imx
Reviewed-by: Peng Fan
---
drivers/ddr/imx/imx8m/ddrphy_utils.c | 369 ---
1 file changed, 369 deletions(-)
delete mode 100644 drivers/ddr/imx/imx8m/ddrphy_utils.c
diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c
b/drivers/ddr/imx/imx8m/ddrphy_utils.c
deleted file mode 100644
index 975d553674a..000
--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
+++ /dev/null
@@ -1,369 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2018 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-static unsigned int g_cdd_rr_max[4];
-static unsigned int g_cdd_rw_max[4];
-static unsigned int g_cdd_wr_max[4];
-static unsigned int g_cdd_ww_max[4];
-
-static inline void poll_pmu_message_ready(void)
-{
- unsigned int reg;
-
- do {
- reg = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0004);
- } while (reg & 0x1);
-}
-
-static inline void ack_pmu_message_receive(void)
-{
- unsigned int reg;
-
- reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0031, 0x0);
-
- do {
- reg = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0004);
- } while (!(reg & 0x1));
-
- reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0031, 0x1);
-}
-
-static inline unsigned int get_mail(void)
-{
- unsigned int reg;
-
- poll_pmu_message_ready();
-
- reg = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0032);
-
- ack_pmu_message_receive();
-
- return reg;
-}
-
-static inline unsigned int get_stream_message(void)
-{
- unsigned int reg, reg2;
-
- poll_pmu_message_ready();
-
- reg = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0032);
-
- reg2 = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0034);
-
- reg2 = (reg2 << 16) | reg;
-
- ack_pmu_message_receive();
-
- return reg2;
-}
-
-static inline void decode_major_message(unsigned int mail)
-{
- debug("[PMU Major message = 0x%08x]\n", mail);
-}
-
-static inline void decode_streaming_message(void)
-{
- unsigned int string_index, arg __maybe_unused;
- int i = 0;
-
- string_index = get_stream_message();
- debug("PMU String index = 0x%08x\n", string_index);
- while (i < (string_index & 0x)) {
- arg = get_stream_message();
- debug("arg[%d] = 0x%08x\n", i, arg);
- i++;
- }
-
- debug("\n");
-}
-
-int wait_ddrphy_training_complete(void)
-{
- unsigned int mail;
-
- while (1) {
- mail = get_mail();
- decode_major_message(mail);
- if (mail == 0x08) {
- decode_streaming_message();
- } else if (mail == 0x07) {
- debug("Training PASS\n");
- return 0;
- } else if (mail == 0xff) {
- debug("Training FAILED\n");
- return -1;
- }
- }
-}
-
-void ddrphy_init_set_dfi_clk(unsigned int drate)
-{
- switch (drate) {
- case 4000:
- dram_pll_init(MHZ(1000));
- dram_disable_bypass();
- break;
- case 3732:
- dram_pll_init(MHZ(933));
- dram_disable_bypass();
- break;
- case 3200:
- dram_pll_init(MHZ(800));
- dram_disable_bypass();
- break;
- case 3000:
- dram_pll_init(MHZ(750));
- dram_disable_bypass();
- break;
- case 2400:
- dram_pll_init(MHZ(600));
- dram_disable_bypass();
- break;
- case 1600:
- dram_pll_init(MHZ(400));
- dram_disable_bypass();
- break;
- case 1066:
- dram_pll_init(MHZ(266));
- dram_disable_bypass();
- break;
- case 667:
- dram_pll_init(MHZ(167));
- dram_disable_bypass();
- break;
- case 400:
- dram_enable_bypass(MHZ(400));
- break;
- case 100:
- dram_enable_bypass(MHZ(100));
- break;
- default:
- return;
- }
-}
-
-void ddrphy_init_read_msg_block(enum fw_type type)
-{
-}
-
-void lpddr4_mr_write(unsigned int mr_rank, unsigned int mr_addr,
-unsigned int mr_data)
-{
- unsigned int tmp;
- /*
-* 1. Poll MRSTAT.mr_wr_busy until it is 0.
-* This checks that ther
[PATCH] image: Ensure image header name is null terminated
When building with GCC 12:
../include/image.h:779:9: warning: ‘strncpy’ specified bound 32 equals
destination size [-Wstringop-truncation]
779 | strncpy(image_get_name(hdr), name, IH_NMLEN);
| ^~~~
Ensure the copied string is null terminated by always setting the final
byte to 0. Shorten the strncpy to IH_NMLEN-1 as we will always overwrite
the last byte.
We can't use strlcpy as this is code is built on the host as well as the
target.
Fixes: b97a2a0a21f2 ("[new uImage] Define a API for image handling operations")
Signed-off-by: Joel Stanley
---
include/image.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/image.h b/include/image.h
index e4c6a50b885f..665b2278b7fb 100644
--- a/include/image.h
+++ b/include/image.h
@@ -776,7 +776,10 @@ image_set_hdr_b(comp) /* image_set_comp */
static inline void image_set_name(image_header_t *hdr, const char *name)
{
- strncpy(image_get_name(hdr), name, IH_NMLEN);
+ char *hdr_name = image_get_name(hdr);
+
+ strncpy(hdr_name, name, IH_NMLEN - 1);
+ hdr_name[IH_NMLEN - 1] = '\0';
}
int image_check_hcrc(const image_header_t *hdr);
--
2.35.1
Re: [BISECTED] BeagleBone Black doesn't boot after a58147c2dbbf
вт, 23 авг. 2022 г., 06:54 Nishanth Menon : > On 08:56-20220819, Robert Nelson wrote: > > On Fri, Aug 19, 2022 at 4:30 AM Nishanth Menon wrote: > > > > > > On 11:28-20220818, Matwey V. Kornilov wrote: > [..] > > > > > > Tom, Robert, folks: what do you folks think? > > > > > > I'm okay with the delay. if we only had 'one' production run it would > > be a different story.. But with 10 years of manufacturing, parts will > > EOL and vary. Let's go with the safe slower route.. > > Matwey, would you post your fix formally? > Ok. I'll do. -- > Regards, > Nishanth Menon > Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 > DDB5 849D 1736 249D >
[PATCH] lib/rsa: Sanity check db_len
When building with GCC 12:
../tools/../lib/rsa/rsa-verify.c:275:11: warning: ‘*db’ may be used
uninitialized [-Wmaybe-uninitialized]
275 | db[0] &= 0xff >> leftmost_bits;
| ~~^~~
If msg_len or hash_len were nonsense values, db_len would end up invalid
and the rest of the function wil not work, so detect this case and
return early. If this was host code we could assert, but as this is
target code print an error and return.
Fixes: 061daa0b61f0 ("rsa: add support of padding pss")
Signed-off-by: Joel Stanley
---
lib/rsa/rsa-verify.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 1d95cfbdee0c..a7c87e40afa2 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -234,6 +234,11 @@ int padding_pss_verify(struct image_sign_info *info,
uint8_t leftmost_mask;
struct checksum_algo *checksum = info->checksum;
+ if (db_len <= 0) {
+ printf("%s: invalid db length\n", __func__);
+ return -EINVAL;
+ }
+
/* first, allocate everything */
db_mask = malloc(db_len);
db = malloc(db_len);
--
2.35.1
Re: [PATCH v2 2/2] cmd: mvebu/bubt: Check for A38x/A37xx OTP secure bits and secure boot
Hi Pali,
On 09.08.22 21:42, Pali Rohár wrote:
For obvious reasons BootROMS rejects unsigned images when secure boot is
enabled in OTP secure bits. So check for OPT secure bits and do not allow
flashing unsigned images when secure boot is enabled. Access to OTP via
U-Boot fuse API is currently implemented only for A38x and A37xx SoCs.
Additionally Armada 3700 BootROM rejects signed trusted image when secure
boot is not enabled in OTP. So add also check for this case. On the other
hand Armada 38x BootROM acceps images with secure boot header when secure
boot is not enabled in OTP.
OTP secure bits may have burned also boot device source. Check it also and
reject flashing images to target storage which does not match OTP.
Signed-off-by: Pali Rohár
---
Changes in v2:
* Add missing dependency on MVEBU_EFUSE
* Use only for A38x and A37xx
Running a world CI build leads to these errors:
$ make clearfog_gt_8k_defconfig
...
$ make -sj
cmd/mvebu/bubt.c:809:12: warning: 'fuse_read_u64' defined but not used
[-Wunused-function]
809 | static u64 fuse_read_u64(u32 bank)
|^
Could you please please take a look and fix this issue?
Thanks,
Stefan
---
cmd/mvebu/Kconfig | 1 +
cmd/mvebu/bubt.c | 127 +++---
2 files changed, 120 insertions(+), 8 deletions(-)
diff --git a/cmd/mvebu/Kconfig b/cmd/mvebu/Kconfig
index 120397d6d4d0..9ec3aa983a51 100644
--- a/cmd/mvebu/Kconfig
+++ b/cmd/mvebu/Kconfig
@@ -5,6 +5,7 @@ config CMD_MVEBU_BUBT
bool "bubt"
select SHA256 if ARMADA_3700
select SHA512 if ARMADA_3700
+ select MVEBU_EFUSE if ARMADA_38X || ARMADA_3700
help
bubt - Burn a u-boot image to flash
For details about bubt command please see the documentation
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index 3b6ffb7ffd1f..feb1e778a98c 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
#include
#include
@@ -121,6 +123,17 @@ struct a38x_main_hdr_v1 {
u8 checksum; /* 0x1F */
};
+/*
+ * Header for the optional headers, version 1 (Armada 370/XP/375/38x/39x)
+ */
+struct a38x_opt_hdr_v1 {
+ u8 headertype;
+ u8 headersz_msb;
+ u16 headersz_lsb;
+ u8 data[0];
+};
+#define A38X_OPT_HDR_V1_SECURE_TYPE0x1
+
struct a38x_boot_mode {
unsigned int id;
const char *name;
@@ -706,6 +719,7 @@ static int check_image_header(void)
{
u8 checksum;
u32 checksum32, exp_checksum32;
+ u32 offset, size;
const struct a38x_main_hdr_v1 *hdr =
(struct a38x_main_hdr_v1 *)get_load_addr();
const size_t image_size = a38x_header_size(hdr);
@@ -752,6 +766,38 @@ static int check_image_header(void)
printf("Image checksum...OK!\n");
return 0;
}
+
+#if defined(CONFIG_ARMADA_38X)
+static int a38x_image_is_secure(const struct a38x_main_hdr_v1 *hdr)
+{
+ u32 image_size = a38x_header_size(hdr);
+ struct a38x_opt_hdr_v1 *ohdr;
+ u32 ohdr_size;
+
+ if (hdr->version != 1)
+ return 0;
+
+ if (!hdr->ext)
+ return 0;
+
+ ohdr = (struct a38x_opt_hdr_v1 *)(hdr + 1);
+ do {
+ if (ohdr->headertype == A38X_OPT_HDR_V1_SECURE_TYPE)
+ return 1;
+
+ ohdr_size = (ohdr->headersz_msb << 16) |
le16_to_cpu(ohdr->headersz_lsb);
+
+ if (!*((u8 *)ohdr + ohdr_size - 4))
+ break;
+
+ ohdr = (struct a38x_opt_hdr_v1 *)((u8 *)ohdr + ohdr_size);
+ if ((u8 *)ohdr >= (u8 *)hdr + image_size)
+ break;
+ } while (1);
+
+ return 0;
+}
+#endif
#else /* Not ARMADA? */
static int check_image_header(void)
{
@@ -760,20 +806,58 @@ static int check_image_header(void)
}
#endif
+static u64 fuse_read_u64(u32 bank)
+{
+ u32 val[2];
+ int ret;
+
+ ret = fuse_read(bank, 0, &val[0]);
+ if (ret < 0)
+ return -1;
+
+ ret = fuse_read(bank, 1, &val[1]);
+ if (ret < 0)
+ return -1;
+
+ return ((u64)val[1] << 32) | val[0];
+}
+
+#if defined(CONFIG_ARMADA_3700)
+static inline u8 maj3(u8 val)
+{
+ /* return majority vote of 3 bits */
+ return ((val & 0x7) == 3 || (val & 0x7) > 4) ? 1 : 0;
+}
+#endif
+
static int bubt_check_boot_mode(const struct bubt_dev *dst)
{
#if defined(CONFIG_ARMADA_3700) || defined(CONFIG_ARMADA_32BIT)
- int mode;
+ int mode, secure_mode;
#if defined(CONFIG_ARMADA_3700)
const struct tim_boot_flash_sign *boot_modes = tim_boot_flash_signs;
const struct common_tim_data *hdr =
(struct common_tim_data *)get_load_addr();
u32 id = hdr->boot_flash_sign;
+ int is_secure = hdr->trusted != 0;
+ u64 otp_secure_bits = fuse_read_u64(1);
+
Re: [PATCH 02/22] arm: kirkwood: 88f6281: Detect CONFIG_SYS_TCLK from SAR register
Hi Michael,
On 17.08.22 21:37, Michael Walle wrote:
From: Pali Rohár
Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200 MHz.
This information is undocumented in public Marvell Kirkwood Functional
Specifications [2], but is available in Linux v3.15 kirkwood code [1].
Commit 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK")
broke support for Marvell 88F6281 SoCs because it was expected that all
those SoCs have TCLK running at 200 MHz as specified in Marvell 88F6281
Hardware Specifications [3].
Fix broken support for 88F6281 by detecting CONFIG_SYS_TCLK from SAR
register, like it was doing Linux v3.15.
[1] -
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542
[2] -
https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
[3] -
https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
Fixes: 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK")
Signed-off-by: Pali Rohár
I've applied your patch series on master (from yesterday) and see
these error(s):
$ make ds109_defconfig
$ make -sj
...
In file included from ./arch/arm/include/asm/arch/config.h:18,
from include/configs/mv-common.h:58,
from include/configs/ds109.h:14,
from include/config.h:4,
from include/common.h:16,
from board/Synology/ds109/ds109.c:8:
board/Synology/ds109/ds109.c: In function 'reset_misc':
./arch/arm/include/asm/arch/kw88f6281.h:18:43: warning: implicit
declaration of function 'readl' [-Wimplicit-function-declaration]
18 | #define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG)
& BIT(21)) ? \
| ^
include/configs/mv-common.h:36:41: note: in expansion of macro
'CONFIG_SYS_TCLK'
36 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
| ^~~
board/Synology/ds109/ds109.c:111:36: note: in expansion of macro
'CONFIG_SYS_NS16550_CLK'
111 |CONFIG_SYS_NS16550_CLK, 9600);
|^~
/opt/kernel.org/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ld.bfd:
board/Synology/ds109/ds109.o: in function `reset_misc':
/home/stefan/git/u-boot/u-boot-marvell/board/Synology/ds109/ds109.c:111:
undefined reference to `readl'
make: *** [Makefile:1823: u-boot] Error 1
Could you please take a look and fix this?
Thanks,
Stefan
---
arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 3 ++-
arch/arm/mach-kirkwood/include/mach/soc.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
index 87406081cf..f86cd0bb60 100644
--- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
+++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
@@ -15,6 +15,7 @@
#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
/* TCLK Core Clock definition */
-#define CONFIG_SYS_TCLK2 /* 200MHz */
+#define CONFIG_SYS_TCLK((readl(CONFIG_SAR_REG) &
BIT(21)) ? \
+ 16667 : 2)
#endif /* _ASM_ARCH_KW88F6281_H */
diff --git a/arch/arm/mach-kirkwood/include/mach/soc.h
b/arch/arm/mach-kirkwood/include/mach/soc.h
index 1d7f2828cd..5f545c6f43 100644
--- a/arch/arm/mach-kirkwood/include/mach/soc.h
+++ b/arch/arm/mach-kirkwood/include/mach/soc.h
@@ -62,6 +62,8 @@
#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
+#define CONFIG_SAR_REG (KW_MPP_BASE + 0x0030)
+
#if defined (CONFIG_KW88F6281)
#include
#elif defined (CONFIG_KW88F6192)
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH v4 0/4] net: Enable NC-SI support
On Mon, 8 Aug 2022 at 12:16, Joel Stanley wrote: > > Back in 2019 Sam submitted NC-SI support. The NC-SI PHY driver was > merged (patches 1 and 2), but we never got around to merging patches 3 > and 4: > > https://lore.kernel.org/u-boot/20190618013720.2823-1-...@mendozajonas.com/ > > Sam as long since moved on from working on the Aspeed BMCs, but the code > has been in use in the vendor fork for some time. > > This refreshes his patches and enables support in the Aspeed defconfigs, > giving compile coverage to the NC-SI phy. > > v4 splits the ncsi integration and cmd code into separate patches, and > adds r-b from Ramon and Cédric to patches 3 and 4. We have review on these patches now. Can we get them merged? > > Joel Stanley (1): > config/aspeed: Enable NC-SI support > > Samuel Mendoza-Jonas (3): > net: NC-SI setup and handling > cmd: Add ncsi command > net/ftgmac100: Add NC-SI mode support > > include/net.h | 2 +- > include/phy.h | 2 ++ > cmd/net.c | 22 ++ > drivers/net/ftgmac100.c | 14 ++ > drivers/net/phy/ncsi.c| 1 + > drivers/net/phy/phy.c | 9 - > net/net.c | 27 ++- > cmd/Kconfig | 8 > configs/evb-ast2500_defconfig | 2 ++ > configs/evb-ast2600_defconfig | 2 ++ > 10 files changed, 82 insertions(+), 7 deletions(-) > > -- > 2.35.1 >
Re: [RFC PATCH 1/1] spl: introduce SPL_XIP to config
On 8/15/22 3:27 AM, Nikita Shubin wrote:
Hello Sean!
On Sat, 13 Aug 2022 00:35:59 -0400
Sean Anderson wrote:
Hi Nikita,
On 8/11/22 5:37 AM, Nikita Shubin wrote:
From: Nikita Shubin
U-Boot and SPL don't necessary share the same location, so we might
end with XIP SPL and U-Boot in "normal" memory.
This adds an option special for SPL to behave it in XIP manner and
don't use hart_lottery and available_harts_lock.
Signed-off-by: Nikita Shubin
---
On a stylistic note, typically cover letters are not used for single
patches (but feel free to use them for larger series).
arch/riscv/cpu/cpu.c | 2 +-
arch/riscv/cpu/start.S | 4 ++--
arch/riscv/include/asm/global_data.h | 2 +-
arch/riscv/lib/asm-offsets.c | 2 +-
arch/riscv/lib/smp.c | 2 +-
common/spl/Kconfig | 5 +
include/configs/scr7_vcu118.h| 2 ++
7 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 9f5fa0bcb3..89528748d7 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -19,7 +19,7 @@
* The variables here must be stored in the data section since
they are used
* before the bss section is available.
*/
-#ifndef CONFIG_XIP
+#if !defined(CONFIG_XIP) && !defined(CONFIG_SPL_XIP)
Shouldn't this be
#if CONFIG_IS_ENABLED(XIP)
?
ditto for the rest of these
I think you are right, i am a bit confused with CONFIG vs
CONFIG_IS_ENABLED.
If you have something like
CONFIG_XIP
CONFIG_SPL_XIP
CONFIG_TPL_XIP
then if(CONFIG_IS_ENABLED(XIP)) works out to roughly
if ((defined(TPL_BUILD) && IS_ENABLED(CONFIG_TPL_XIP)) ||
(defined(SPL_BUILD) && IS_ENABLED(CONFIG_SPL_XIP)) ||
(!defined(TPL_BUILD) && !define(SPL_BUILD) && IS_ENABLED(CONFIG_XIP)))
That is, the appropriate config is enabled only when building that stage.
There's some other magic as well to make it work in #if as well, but that's
the gist.
u32 hart_lottery __section(".data") = 0;
/*
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 26cb877ed1..d824990778 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -122,7 +122,7 @@ call_board_init_f_0:
call_harts_early_init:
jal harts_early_init
-#ifndef CONFIG_XIP
+#if !defined(CONFIG_XIP) && !defined(CONFIG_SPL_XIP)
/*
* Pick hart to initialize global data and run U-Boot.
The other harts
* wait for initialization to complete.
@@ -155,7 +155,7 @@ call_harts_early_init:
/* save the boot hart id to global_data */
SREGtp, GD_BOOT_HART(gp)
-#ifndef CONFIG_XIP
+#if !defined(CONFIG_XIP) && !defined(CONFIG_SPL_XIP)
la t0, available_harts_lock
amoswap.w.rl zero, zero, 0(t0)
diff --git a/arch/riscv/include/asm/global_data.h
b/arch/riscv/include/asm/global_data.h index 9a146d1d49..d71e09c5ab
100644 --- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -30,7 +30,7 @@ int iccm[CONFIG_NR_CPUS];
#if CONFIG_IS_ENABLED(SMP)
struct ipi_data ipi[CONFIG_NR_CPUS];
#endif
-#ifndef CONFIG_XIP
+#if !defined(CONFIG_XIP) && !defined(CONFIG_SPL_XIP)
ulong available_harts;
#endif
};
diff --git a/arch/riscv/lib/asm-offsets.c
b/arch/riscv/lib/asm-offsets.c index f1fe089b3d..bcb3c78654 100644
--- a/arch/riscv/lib/asm-offsets.c
+++ b/arch/riscv/lib/asm-offsets.c
@@ -16,7 +16,7 @@ int main(void)
{
DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t,
arch.firmware_fdt_addr)); -#ifndef CONFIG_XIP
+#if !defined(CONFIG_XIP) && !defined(CONFIG_SPL_XIP)
DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t,
arch.available_harts)); #endif
diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index ba992100ad..cef324954c 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -45,7 +45,7 @@ static int send_ipi_many(struct ipi_data *ipi,
int wait) continue;
}
-#ifndef CONFIG_XIP
+#if !defined(CONFIG_XIP) && !defined(CONFIG_SPL_XIP)
/* skip if hart is not available */
if (!(gd->arch.available_harts & (1 << reg)))
continue;
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 07c03d611d..f24e423fc0 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -27,6 +27,11 @@ config SPL_FRAMEWORK
supports MMC, NAND and YMODEM and other methods loading
of U-Boot and the Linux Kernel. If unsure, say Y.
+config SPL_XIP
+ bool "Support SPL in XIP"
+ help
+ Enable this if SPL is in XIP memory.
Can you add another sentence or two? What is "XIP memory"? How does
it differ from the standard boot process?
In this case i treat "XIP memory" as RO memory, if CONFIG_XIP is enabled
(at least for riscv start.S) we don't use such variables as
hart_lottery or available_harts_lock, both are locks. The problem is
that CONFIG
Re: [RFC PATCH v1 3/9] clk: renesas: add R906G032 driver
On 8/14/22 10:48 PM, Ralph Siemsen wrote:
On Sat, Aug 13, 2022 at 01:30:19AM -0400, Sean Anderson wrote:
+
+ u16 gate, reset, ready, midle,
+ scon, mirack, mistat;
What are the scon/mirack/mistat fields for? You define them for a lot
of clocks, but I don't see them used in the driver.
These came from the Linux driver of the same name. I can only speculate that in
turn, the Linux driver definitions were auto-generated from vendor provided XML
or similar documentation.
I figured that it would be best to match the Linux kernel clock driver. That
way fixes can easily be shared. In fact while doing this work, I found an error
in the clock table [1] and I also made some simplifications [2].
Regarding the unused fields (scon, mirack, mistat): I am not really sure what
their purpose is. Maybe there is some value in having them. I'll try to find
out more information about them. If we do decide to drop them, I would like to
keep it synchronised with the Linux driver.
OK, well if you don't use them then perhaps you can just leave them in
the macro but remove them from the struct. That way you can add support
for them later if you need to, but they don't take up space in the mean
time. A comment summarizing your explanation above would be helpful.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2dee50ab9e72a3cae75b65e5934c8dd3e9bf01bc
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f46efcc4746f5c1a539df9db625c04321f75e494
+};
+
+/* This is used to describe a clock for instantiation */
+struct r9a06g032_clkdesc {
+ const char *name;
+ uint32_t managed: 1;
+ uint32_t type: 3;
I wonder if we could define the enum here?
This is still part of the code which I've intentionally kept identical to the
Linux driver. I do agree that moving the enum seems reasonable, I'll put
together a patch for this (and test it) and see if I can get it accepted on the
kernel side.
+ uint32_t index: 8;
+ uint32_t source : 8; /* source index + 1 (0 == none) */
+ /* these are used to populate the bitsel struct */
+ union {
+ struct r9a06g032_gate gate;
+ /* for dividers */
+ struct {
+ unsigned int div_min : 10, div_max : 10, reg: 10;
+ u16 div_table[4];
+ };
+ /* For fixed-factor ones */
+ struct {
+ u16 div, mul;
+ };
+ /* for dual gate */
+ struct {
+ uint16_t group : 1;
+ u16 sel, g1, r1, g2, r2;
+ } dual;
+ };
+};
+
+#define I_GATE(_clk, _rst, _rdy, _midle, _scon, _mirack, _mistat) \
+ { .gate = _clk, .reset = _rst, \
If these fields have bitfield inside them, then those bitfields should
be assigned/constructed separately. That is, if .reset is actually a combined
offset/bit, then you need to expose those in the macro. Since you have a lot of
these, you might want to do something like
#define BIT_OFFSET GENMASK(15, 5)
#define BIT_SHIFT GENMASK(4, 0)
#define PACK_BIT(offset, shift) (FIELD_PREP(BIT_OFFSET, offset) |
FIELD_PREP(BIT_SHIFT, shift))
I think it happened before I started working on RZ/N1, but there seemed to be
quite a few iterations on how to represent the clock tree. At one point there
were macros to assign/construct the bitfield values. And then a different way,
and eventually the direct hex values you now see in the clock tables.
At the risk of re-opening old wounds (luckily not mine) I decided to just leave
this part exactly as-is in the Linux driver.
Can you link to that discussion? The earliest discussion of that
series I could find was [1], and there's no mention of the encoding.
This encoding scheme seems to be used only for this SoC, and not for
any of the other renesas drivers. I suspect that this just wasn't
reviewed in detail the first time around...
[1]
https://lore.kernel.org/all/1527154169-32380-6-git-send-email-michel.pol...@bp.renesas.com/
+
+/* Internal clock IDs */
+#define R9A06G032_CLKOUT 0
+#define R9A06G032_CLKOUT_D10 2
+#define R9A06G032_CLKOUT_D16 3
+#define R9A06G032_CLKOUT_D160 4
[...]
+#define R9A06G032_UART_GROUP_012 154
+#define R9A06G032_UART_GROUP_34567 155
Can you put these in your dt-bindings header? I think that would make it
much clearer why there are gaps, and would avoid someone accidentally
duplicating a clock id (although I suppose your array initializer below
might complain?)
In fact quite a few of them are in the dt-bindings already, see
include/dt-bindings/clock/r9a06g032-sysctrl.h
I'm not really sure why some of these are defined in the .C file while others
are in the dt-bindings header. Like much of the other bits, this was something
I just carried over as-is from the Linux driver.
I think these are "internal" clocks (that is, clocks which don't really
exist like intermediate dividers) whereas the others are public-facing
clocks. It's up to you, but may
Re: [BISECTED] BeagleBone Black doesn't boot after a58147c2dbbf
On 08:56-20220819, Robert Nelson wrote: > On Fri, Aug 19, 2022 at 4:30 AM Nishanth Menon wrote: > > > > On 11:28-20220818, Matwey V. Kornilov wrote: [..] > > > > Tom, Robert, folks: what do you folks think? > > > I'm okay with the delay. if we only had 'one' production run it would > be a different story.. But with 10 years of manufacturing, parts will > EOL and vary. Let's go with the safe slower route.. Matwey, would you post your fix formally? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Re: [RFC PATCH v2 9/9] tools: spkgimage: add Renesas SPKG format
On 8/16/22 10:33 AM, Ralph Siemsen wrote:
Hi Sean,
I've implemented most of the suggestions. I will post an updated
series, since it seems that sending v2 of just one patch has confused
patchwork.
However so as not to entirely remove confusion, the updated series
will be v3, since I already used v2 for the one patch. :-P
On Sat, Aug 13, 2022 at 9:45 PM Ralph Siemsen wrote:
I wonder if you could just fill in the header directly. This is
for a userspace tool, and this struct will be created at most
once. It's OK to use 10 bytes :)
I could fill the header directly, but I figured it would be cleaner to
keep the config file parsing separate from header generation.
Does it seem reasonable to keep these structures separated?
Yes, that is fine.
+static int spkgimage_verify_header(unsigned char *ptr, int size,
+struct image_tool_params *param)
+{
+ struct spkg_file *file = (struct spkg_file *)ptr;
+ struct spkg_hdr *header = (struct spkg_hdr *)ptr;
+ char signature[4] = SPKG_HEADER_SIGNATURE;
If this naming does not come from documentation, I would suggest
something like SPKG_HEADER_MAGIC, since this is not a signature,
or even a CRC.
The name does in fact come from the RZ/N1 documentation. However I
agree that SPKG_HEADER_MAGIC would better reflect what these bytes
actually are.
Upon checking the documentation, it turns out they use the term
"marker" rather than "signature" for these bytes. So I have switched
the code to match.
That sounds good.
+static int spkgimage_check_image_types(uint8_t type)
+{
+ return type == IH_TYPE_RENESAS_SPKG ? 0 : 1;
This function is not necessary if you only support one type.
Without this function, mkimage kept telling me that my format
(spkgimage) was not supported, and none of my callbacks got invoked.
It only complained when trying to generate a header. When listing the
supported formats, spkgimage showed up correctly.
I'll take another look on Monday, maybe I missed something obvious.
I have re-checked this:
- without the function, mkimage complains that spkgimage is unknown
- with a function that unconditionally returns 0, it works fine
If it really is meant to work without the function, then a bug must
have crept in elsewhere...
Huh. I did a quick grep so maybe I missed something. IMO this *should*
work without a function, because we have tons of drivers which just
have an equality check. In any case, you can just do
return type == IH_TYPE_RENESAS_SPKG ? 0 : -EINVAL;
--Sean
Re: [PATCH] arm: mvebu: mbus: Fix mbus driver to work also after U-Boot relocation
Hi Pali,
On Mon, Aug 22, 2022 at 4:00 PM Pali Rohár wrote:
>
> On Wednesday 17 August 2022 08:17:36 Stefan Roese wrote:
> > On 10.08.22 14:46, Pali Rohár wrote:
> > > mbus driver is initialized from arch_cpu_init() callback which is called
> > > before relocation. This driver stores lot of functions and structure
> > > pointers into global variables, so it is data position dependent.
> > >
> > > Therefore after relocations all pointers are invalid and driver does not
> > > work anymore as all pointers referes to the old memory, which overlaps
> > > with
> > > CONFIG_SYS_LOAD_ADDR and ${loadaddr}.
> > >
> > > For example U-Boot fuse command crashes if loadaddr memory is cleared or
> > > rewritten by some image loaded by U-Boot load command.
> > >
> > >mw.w ${loadaddr} 0x0 1
> > >fuse read 0 1 2
> > >
> > > Fix this issue by removing of all mbus global variables in which are
> > > stored
> > > pointers to structures or functions which changes during relocation. And
> > > replace it by direct function calls (not via pointers). With this change
> > > fuse command finally works.
> > >
> > > Signed-off-by: Pali Rohár
> >
> > Reviewed-by: Stefan Roese
> >
> > Thanks,
> > Stefan
>
> Stefan, this is something which is needed to have fixed. Could you test
> this change on your boards and prepare for merging to master branch?
>
> Chris, could you also test this change for possible regressions?
>
> I have tested it on A385 Turris Omnia.
I did a couple regression tests and both are running fine!
Cloud Engines Pogo V4 (88F6192 SoC)
Zyxel NSA310S (88F6702 SoC)
All the best,
Tony
>
> > > ---
> > > arch/arm/mach-kirkwood/include/mach/cpu.h | 3 -
> > > arch/arm/mach-mvebu/include/mach/cpu.h| 3 -
> > > arch/arm/mach-mvebu/mbus.c| 167 +-
> > > board/alliedtelesis/x530/x530.c | 2 +-
> > > board/maxbcm/maxbcm.c | 8 +-
> > > board/theadorable/theadorable.c | 4 +-
> > > include/linux/mbus.h | 13 +-
> > > 7 files changed, 75 insertions(+), 125 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-kirkwood/include/mach/cpu.h
> > > b/arch/arm/mach-kirkwood/include/mach/cpu.h
> > > index 71c546f9acf6..d8639c60352b 100644
> > > --- a/arch/arm/mach-kirkwood/include/mach/cpu.h
> > > +++ b/arch/arm/mach-kirkwood/include/mach/cpu.h
> > > @@ -144,9 +144,6 @@ struct kwgpio_registers {
> > > u32 irq_level;
> > > };
> > > -/* Needed for dynamic (board-specific) mbus configuration */
> > > -extern struct mvebu_mbus_state mbus_state;
> > > -
> > > /*
> > >* functions
> > >*/
> > > diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h
> > > b/arch/arm/mach-mvebu/include/mach/cpu.h
> > > index 689c96bd4eac..d9fa1f32aa52 100644
> > > --- a/arch/arm/mach-mvebu/include/mach/cpu.h
> > > +++ b/arch/arm/mach-mvebu/include/mach/cpu.h
> > > @@ -122,9 +122,6 @@ struct sar_freq_modes {
> > > u32 d_clk;
> > > };
> > > -/* Needed for dynamic (board-specific) mbus configuration */
> > > -extern struct mvebu_mbus_state mbus_state;
> > > -
> > > /*
> > >* functions
> > >*/
> > > diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c
> > > index 3b1b9f73ebf6..7092f6cc10c2 100644
> > > --- a/arch/arm/mach-mvebu/mbus.c
> > > +++ b/arch/arm/mach-mvebu/mbus.c
> > > @@ -88,31 +88,34 @@
> > > #define DOVE_DDR_BASE_CS_OFF(n) ((n) << 4)
> > > -struct mvebu_mbus_state;
> > > -
> > > -struct mvebu_mbus_soc_data {
> > > - unsigned int num_wins;
> > > - unsigned int num_remappable_wins;
> > > - unsigned int (*win_cfg_offset)(const int win);
> > > - void (*setup_cpu_target)(struct mvebu_mbus_state *s);
> > > -};
> > > -
> > > -struct mvebu_mbus_state mbus_state
> > > - __section(".data");
> > > static struct mbus_dram_target_info mbus_dram_info
> > > __section(".data");
> > > +#if defined(CONFIG_ARCH_MVEBU)
> > > + #define MVEBU_MBUS_NUM_WINS 20
> > > + #define MVEBU_MBUS_NUM_REMAPPABLE_WINS 8
> > > + #define MVEBU_MBUS_WIN_CFG_OFFSET(win)
> > > armada_370_xp_mbus_win_offset(win)
> > > +#elif defined(CONFIG_ARCH_KIRKWOOD)
> > > + #define MVEBU_MBUS_NUM_WINS 8
> > > + #define MVEBU_MBUS_NUM_REMAPPABLE_WINS 4
> > > + #define MVEBU_MBUS_WIN_CFG_OFFSET(win) orion5x_mbus_win_offset(win)
> > > +#else
> > > + #error "No supported architecture"
> > > +#endif
> > > +
> > > +static unsigned int armada_370_xp_mbus_win_offset(int win);
> > > +static unsigned int orion5x_mbus_win_offset(int win);
> > > +
> > > /*
> > >* Functions to manipulate the address decoding windows
> > >*/
> > > -static void mvebu_mbus_read_window(struct mvebu_mbus_state *mbus,
> > > - int win, int *enabled, u64 *base,
> > > +static void mvebu_mbus_read_window(int win, int *enabled, u64 *base,
> > >u32 *size, u8 *target, u8 *attr,
> > >u64 *remap)
> > > {
> > > - void __iomem *addr = mb
Re: [PATCH v2 0/5] board: sl28: various updates
On 7/14/2022 9:05 PM, Michael Walle wrote: This is a resend of the original v1 series. It was just rebased. Apparently not all patches made it into u-boot. Unfortunately, there was no feedback at all. This is an update for the sl28 board which adds support for - 8 GiB memory variant - different boot sources, like eMMC, SD-card - dynamic prompts - various cleanups changes since v1: - rebased onto the latest master Michael Walle (5): armv8: layerscape: spl: mark OCRAM as non-secure board: sl28: implement additional bootsources board: sl28: add user friendly names for the boot sources board: sl28: support dynamic prompts board: sl28: remove COUNTER_FREQUENCY_REAL arch/arm/cpu/armv8/fsl-layerscape/spl.c | 11 + board/kontron/sl28/common.c | 22 ++ board/kontron/sl28/sl28.c | 43 board/kontron/sl28/sl28.h | 16 board/kontron/sl28/spl.c| 54 - configs/kontron_sl28_defconfig | 6 ++- include/configs/kontron_sl28.h | 2 - 7 files changed, 150 insertions(+), 4 deletions(-) create mode 100644 board/kontron/sl28/sl28.h Build failure. +arch/arm/cpu/armv8/fsl-layerscape/spl.c: In function 'tzpc_init': +arch/arm/cpu/armv8/fsl-layerscape/spl.c:76:18: error: 'TZPCR0SIZE_BASE' undeclared (first use in this function) + 76 | out_le32(TZPCR0SIZE_BASE, 0); + | ^~~ +arch/arm/include/asm/io.h:31:69: note: in definition of macro '__arch_putl' + 31 | #define __arch_putl(v,a)(*(volatile unsigned int *)(a) = (v)) + | ^ +arch/arm/include/asm/io.h:153:41: note: in expansion of macro '__raw_writel' + 153 | #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) + | ^~~ +arch/arm/include/asm/io.h:157:25: note: in expansion of macro 'out_arch' + 157 | #define out_le32(a,v) out_arch(l,le32,a,v) + | ^~~~ +arch/arm/cpu/armv8/fsl-layerscape/spl.c:76:9: note: in expansion of macro 'out_le32' + | ^~~~ +arch/arm/cpu/armv8/fsl-layerscape/spl.c:76:18: note: each undeclared identifier is reported only once for each function it appears in Please give a look. Thanks, Peng.
Re: [PATCH] arm: mvebu: mbus: Fix mbus driver to work also after U-Boot relocation
On Wednesday 17 August 2022 08:17:36 Stefan Roese wrote:
> On 10.08.22 14:46, Pali Rohár wrote:
> > mbus driver is initialized from arch_cpu_init() callback which is called
> > before relocation. This driver stores lot of functions and structure
> > pointers into global variables, so it is data position dependent.
> >
> > Therefore after relocations all pointers are invalid and driver does not
> > work anymore as all pointers referes to the old memory, which overlaps with
> > CONFIG_SYS_LOAD_ADDR and ${loadaddr}.
> >
> > For example U-Boot fuse command crashes if loadaddr memory is cleared or
> > rewritten by some image loaded by U-Boot load command.
> >
> >mw.w ${loadaddr} 0x0 1
> >fuse read 0 1 2
> >
> > Fix this issue by removing of all mbus global variables in which are stored
> > pointers to structures or functions which changes during relocation. And
> > replace it by direct function calls (not via pointers). With this change
> > fuse command finally works.
> >
> > Signed-off-by: Pali Rohár
>
> Reviewed-by: Stefan Roese
>
> Thanks,
> Stefan
Stefan, this is something which is needed to have fixed. Could you test
this change on your boards and prepare for merging to master branch?
Chris, could you also test this change for possible regressions?
I have tested it on A385 Turris Omnia.
> > ---
> > arch/arm/mach-kirkwood/include/mach/cpu.h | 3 -
> > arch/arm/mach-mvebu/include/mach/cpu.h| 3 -
> > arch/arm/mach-mvebu/mbus.c| 167 +-
> > board/alliedtelesis/x530/x530.c | 2 +-
> > board/maxbcm/maxbcm.c | 8 +-
> > board/theadorable/theadorable.c | 4 +-
> > include/linux/mbus.h | 13 +-
> > 7 files changed, 75 insertions(+), 125 deletions(-)
> >
> > diff --git a/arch/arm/mach-kirkwood/include/mach/cpu.h
> > b/arch/arm/mach-kirkwood/include/mach/cpu.h
> > index 71c546f9acf6..d8639c60352b 100644
> > --- a/arch/arm/mach-kirkwood/include/mach/cpu.h
> > +++ b/arch/arm/mach-kirkwood/include/mach/cpu.h
> > @@ -144,9 +144,6 @@ struct kwgpio_registers {
> > u32 irq_level;
> > };
> > -/* Needed for dynamic (board-specific) mbus configuration */
> > -extern struct mvebu_mbus_state mbus_state;
> > -
> > /*
> >* functions
> >*/
> > diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h
> > b/arch/arm/mach-mvebu/include/mach/cpu.h
> > index 689c96bd4eac..d9fa1f32aa52 100644
> > --- a/arch/arm/mach-mvebu/include/mach/cpu.h
> > +++ b/arch/arm/mach-mvebu/include/mach/cpu.h
> > @@ -122,9 +122,6 @@ struct sar_freq_modes {
> > u32 d_clk;
> > };
> > -/* Needed for dynamic (board-specific) mbus configuration */
> > -extern struct mvebu_mbus_state mbus_state;
> > -
> > /*
> >* functions
> >*/
> > diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c
> > index 3b1b9f73ebf6..7092f6cc10c2 100644
> > --- a/arch/arm/mach-mvebu/mbus.c
> > +++ b/arch/arm/mach-mvebu/mbus.c
> > @@ -88,31 +88,34 @@
> > #define DOVE_DDR_BASE_CS_OFF(n) ((n) << 4)
> > -struct mvebu_mbus_state;
> > -
> > -struct mvebu_mbus_soc_data {
> > - unsigned int num_wins;
> > - unsigned int num_remappable_wins;
> > - unsigned int (*win_cfg_offset)(const int win);
> > - void (*setup_cpu_target)(struct mvebu_mbus_state *s);
> > -};
> > -
> > -struct mvebu_mbus_state mbus_state
> > - __section(".data");
> > static struct mbus_dram_target_info mbus_dram_info
> > __section(".data");
> > +#if defined(CONFIG_ARCH_MVEBU)
> > + #define MVEBU_MBUS_NUM_WINS 20
> > + #define MVEBU_MBUS_NUM_REMAPPABLE_WINS 8
> > + #define MVEBU_MBUS_WIN_CFG_OFFSET(win)
> > armada_370_xp_mbus_win_offset(win)
> > +#elif defined(CONFIG_ARCH_KIRKWOOD)
> > + #define MVEBU_MBUS_NUM_WINS 8
> > + #define MVEBU_MBUS_NUM_REMAPPABLE_WINS 4
> > + #define MVEBU_MBUS_WIN_CFG_OFFSET(win) orion5x_mbus_win_offset(win)
> > +#else
> > + #error "No supported architecture"
> > +#endif
> > +
> > +static unsigned int armada_370_xp_mbus_win_offset(int win);
> > +static unsigned int orion5x_mbus_win_offset(int win);
> > +
> > /*
> >* Functions to manipulate the address decoding windows
> >*/
> > -static void mvebu_mbus_read_window(struct mvebu_mbus_state *mbus,
> > - int win, int *enabled, u64 *base,
> > +static void mvebu_mbus_read_window(int win, int *enabled, u64 *base,
> >u32 *size, u8 *target, u8 *attr,
> >u64 *remap)
> > {
> > - void __iomem *addr = mbus->mbuswins_base +
> > - mbus->soc->win_cfg_offset(win);
> > + void __iomem *addr = (void __iomem *)MVEBU_CPU_WIN_BASE +
> > + MVEBU_MBUS_WIN_CFG_OFFSET(win);
> > u32 basereg = readl(addr + WIN_BASE_OFF);
> > u32 ctrlreg = readl(addr + WIN_CTRL_OFF);
> > @@ -133,7 +136,7 @@ static void mvebu_mbus_read_window(struct
> > mvebu_mbus_state *mbus,
> > *attr = (ctrlreg & WIN_CTRL_ATTR_MASK) >> WIN_CTRL_ATT
[ANN] U-Boot v2022.10-rc3 released
Hey all, It's release day and so here's v2022.10-rc3. Overall I think things are going well, and I'm opening up the next branch now. In terms of a changelog, git log --merges v2022.10-rc2..v2022.10-rc3 contains what I've pulled but as always, better PR messages and tags will provide better results here. So we're now looking at regular releases every other Monday, and with final release on October 3rd, 2022. Thanks all! -- Tom signature.asc Description: PGP signature
Re: Please pull u-boot-dm
On Sat, Aug 20, 2022 at 07:02:43PM -0600, Simon Glass wrote: > Hi Tom, > > https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/13186 > > > The following changes since commit 3212be5e24c5861c4209785fd5f654f43fe9d409: > > Merge branch '2022-08-20-assorted-updates' (2022-08-20 19:00:10 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-dm.git tags/dm-pull-20aug22 > > for you to fetch changes up to cd15b640b0b8d5a7ba5f1c0587e4f9c767e2d8fb: > > binman: Add zstd bintool (2022-08-20 18:07:33 -0600) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH v2 3/3] arm: bcmbca: replace ARCH_BCM6753 symbols in Kconfig with BCM6855
As CONFIG_ARCH_BCM6753 is replaced with CONFIG_BCM6855, update the driver Kconfig to use the new config symbol. Signed-off-by: William Zhang --- Changes in v2: - Update subject line to be more clear for patch 3 drivers/gpio/Kconfig | 2 +- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 929f3fb9eacb..d8020de969ef 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -111,7 +111,7 @@ config BCM2835_GPIO config BCM6345_GPIO bool "BCM6345 GPIO driver" depends on DM_GPIO && (ARCH_BMIPS || BCM6856 || \ - BCM6858 || BCM63158 || ARCH_BCM6753) + BCM6858 || BCM63158 || BCM6855) help This driver supports the GPIO banks on BCM6345 SoCs. diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index 98f015a07f97..996b757e6d00 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -30,7 +30,7 @@ config LED_BCM6358 config LED_BCM6753 bool "LED Support for BCM6753" - depends on LED && ARCH_BCM6753 + depends on LED && BCM6855 help This option enables support for LEDs connected to the BCM6753 HW has blinking and fading capabilities and up to 32 LEDs can be controlled. diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index f8445e09633c..d6e3eeb3c093 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -97,7 +97,7 @@ config NAND_BRCMNAND_6368 config NAND_BRCMNAND_6753 bool "Support Broadcom NAND controller on bcm6753" - depends on NAND_BRCMNAND && ARCH_BCM6753 + depends on NAND_BRCMNAND && BCM6855 help Enable support for broadcom nand driver on bcm6753. diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 84a4034fe87c..65f2d0821c60 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -129,7 +129,7 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" depends on WDT && (ARCH_BMIPS || BCM6856 || \ - BCM6858 || BCM63158 || ARCH_BCM6753) + BCM6858 || BCM63158 || BCM6855) help Select this to enable watchdog timer for BCM6345 SoCs. The watchdog timer is stopped when initialized. -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v2 2/3] arm: bcmbca: remove bcm6753 support under CONFIG_ARCH_BCM6753
BCM6753 is essentially same as the main chip BCM6855 but with different
SKU number. Now that BCM6855 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM6855, remove the original ARCH_BCM6753 support and migrate its
configuration and dts settings. This includes:
- Remove the bcm96753ref board folder. It is replaced by the
generic bcmbca board folder.
- Merge the 6753.dtsi setting to the new 6855.dtsi file. Update
96753ref board dts with the new compatible string.
- Delete broadcom_bcm96763ref.h and merge its setting to the new
bcm96855.h file.
- Delete bcm96753ref_ram_defconfig and use a basic config version of
bcm96855_defconfig
Signed-off-by: William Zhang
---
(no changes since v1)
arch/arm/Kconfig | 8 -
arch/arm/dts/Makefile| 6 +-
arch/arm/dts/bcm6753.dtsi| 208 ---
arch/arm/dts/bcm6855.dtsi| 137 +++
arch/arm/dts/bcm96753ref.dts | 6 +-
board/broadcom/bcm96753ref/Kconfig | 16 --
board/broadcom/bcm96753ref/MAINTAINERS | 6 -
board/broadcom/bcm96753ref/Makefile | 3 -
board/broadcom/bcm96753ref/bcm96753ref.c | 40 -
configs/bcm96753ref_ram_defconfig| 87 --
include/configs/bcm96855.h | 4 +
include/configs/broadcom_bcm96753ref.h | 32
12 files changed, 146 insertions(+), 407 deletions(-)
delete mode 100644 arch/arm/dts/bcm6753.dtsi
delete mode 100644 board/broadcom/bcm96753ref/Kconfig
delete mode 100644 board/broadcom/bcm96753ref/MAINTAINERS
delete mode 100644 board/broadcom/bcm96753ref/Makefile
delete mode 100644 board/broadcom/bcm96753ref/bcm96753ref.c
delete mode 100644 configs/bcm96753ref_ram_defconfig
delete mode 100644 include/configs/broadcom_bcm96753ref.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 063616ff8d0b..c1f195e9d106 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -665,13 +665,6 @@ config ARCH_BCM283X
imply CMD_DM
imply FAT_WRITE
-config ARCH_BCM6753
- bool "Broadcom BCM6753 family"
- select CPU_V7A
- select DM
- select OF_CONTROL
- imply CMD_DM
-
config ARCH_BCMSTB
bool "Broadcom BCM7XXX family"
select CPU_V7A
@@ -2267,7 +2260,6 @@ source "board/Marvell/octeontx2/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
-source "board/broadcom/bcm96753ref/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/eets/pdu001/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5fd38cc63b63..8fba735cc8ab 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1147,9 +1147,6 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
bcm2837-rpi-cm3-io3.dtb \
bcm2711-rpi-4-b.dtb
-dtb-$(CONFIG_ARCH_BCM6753) += \
- bcm96753ref.dtb
-
dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
@@ -1177,7 +1174,8 @@ dtb-$(CONFIG_BCM6813) += \
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
dtb-$(CONFIG_BCM6855) += \
- bcm96855.dtb
+ bcm96855.dtb \
+ bcm96753ref.dtb
dtb-$(CONFIG_BCM6856) += \
bcm96856.dtb \
bcm968360bg.dtb
diff --git a/arch/arm/dts/bcm6753.dtsi b/arch/arm/dts/bcm6753.dtsi
deleted file mode 100644
index e88ab095c290..
--- a/arch/arm/dts/bcm6753.dtsi
+++ /dev/null
@@ -1,208 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2022 Philippe Reynes
- */
-
-#include "skeleton.dtsi"
-
-/ {
- compatible = "brcm,bcm6753";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- u-boot,dm-pre-reloc;
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <0x0>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- cpu1: cpu@1 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <0x1>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- cpu2: cpu@2 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <0x2>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- u-boot,dm-pre-reloc;
- };
- };
-
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
[PATCH v2 1/3] arm: bcmbca: add bcm6855 SoC support under CONFIG_ARCH_BCMBCA
BCM6855 is a Broadcom ARM A7 based PON Gateway SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family. Like other
broadband SoC, this patch adds it under CONFIG_BCM6855 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and ARM PL101 uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang
---
Changes in v2:
- Add help in BCM6855 Kconfig option to include the list of the
supported chips.
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm6855.dtsi | 120 ++
arch/arm/dts/bcm96855.dts | 30 +++
arch/arm/mach-bcmbca/Kconfig | 11 +++
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm6855/Kconfig | 17
arch/arm/mach-bcmbca/bcm6855/Makefile | 5 ++
board/broadcom/bcmbca/Kconfig | 7 ++
configs/bcm96855_defconfig| 23 +
include/configs/bcm96855.h| 11 +++
11 files changed, 228 insertions(+)
create mode 100644 arch/arm/dts/bcm6855.dtsi
create mode 100644 arch/arm/dts/bcm96855.dts
create mode 100644 arch/arm/mach-bcmbca/bcm6855/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm6855/Makefile
create mode 100644 configs/bcm96855_defconfig
create mode 100644 include/configs/bcm96855.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 819fa5b87824..371e84de1bc1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -230,6 +230,7 @@ N: bcm[9]?63178
N: bcm[9]?6756
N: bcm[9]?6813
N: bcm[9]?6846
+N: bcm[9]?6855
N: bcm[9]?6856
N: bcm[9]?6858
N: bcm[9]?6878
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 07e6130042f5..5fd38cc63b63 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1176,6 +1176,8 @@ dtb-$(CONFIG_BCM6813) += \
bcm96813.dtb
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
+dtb-$(CONFIG_BCM6855) += \
+ bcm96855.dtb
dtb-$(CONFIG_BCM6856) += \
bcm96856.dtb \
bcm968360bg.dtb
diff --git a/arch/arm/dts/bcm6855.dtsi b/arch/arm/dts/bcm6855.dtsi
new file mode 100644
index ..620f51aee1a2
--- /dev/null
+++ b/arch/arm/dts/bcm6855.dtsi
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include
+#include
+
+/ {
+ compatible = "brcm,bcm6855", "brcm,bcmbca";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CA7_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ CA7_1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ CA7_2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = ,
+ ,
+ ,
+ ;
+ arm,cpu-registers-not-fw-configured;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = ,
+ ,
+ ;
+ interrupt-affinity = <&CA7_0>, <&CA7_1>, <&CA7_2>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ };
+
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@8100 {
+ compatible
[PATCH v2 0/3] arm: bcmbca: move bcm6753 support under CONFIG_ARCH_BCMBCA
Sorry for another version of patch series with some minor updates. Please see the change log and specific patch for details. BCM6753 is essentially same as the main chip BCM6855 with different SKU number. It is part of the Broadcom BCA (Broadband Carrier Access origin) chipset family. BCM6753 was originally added by Philippe before Broadcom started to upstream the support for BCMBCA SoCs. The ARM based broadband SoC family is now supported under the unified ARCH_BCMBCA config. This patch series migrate the BCM6753 support under the config of ARCH_BCMBCA and BCM6855. This patch series need to apply on top of my previous patch series [1]. This concludes the addition of BCA SoC support to u-boot at least for now. [1]: https://lists.denx.de/pipermail/u-boot/2022-August/492474.html Changes in v2: - Add help in BCM6855 Kconfig option to include the list of the supported chips. - Update subject line to be more clear for patch 3 William Zhang (3): arm: bcmbca: add bcm6855 SoC support under CONFIG_ARCH_BCMBCA arm: bcmbca: remove bcm6753 support under CONFIG_ARCH_BCM6753 arm: bcmbca: replace ARCH_BCM6753 symbols in Kconfig with BCM6855 MAINTAINERS | 1 + arch/arm/Kconfig | 8 - arch/arm/dts/Makefile| 6 +- arch/arm/dts/bcm6753.dtsi| 208 -- arch/arm/dts/bcm6855.dtsi| 257 +++ arch/arm/dts/bcm96753ref.dts | 6 +- arch/arm/dts/bcm96855.dts| 30 +++ arch/arm/mach-bcmbca/Kconfig | 11 + arch/arm/mach-bcmbca/Makefile| 1 + arch/arm/mach-bcmbca/bcm6855/Kconfig | 17 ++ arch/arm/mach-bcmbca/bcm6855/Makefile| 5 + board/broadcom/bcm96753ref/Kconfig | 16 -- board/broadcom/bcm96753ref/MAINTAINERS | 6 - board/broadcom/bcm96753ref/Makefile | 3 - board/broadcom/bcm96753ref/bcm96753ref.c | 40 board/broadcom/bcmbca/Kconfig| 7 + configs/bcm96753ref_ram_defconfig| 87 configs/bcm96855_defconfig | 23 ++ drivers/gpio/Kconfig | 2 +- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- include/configs/bcm96855.h | 15 ++ include/configs/broadcom_bcm96753ref.h | 32 --- 24 files changed, 377 insertions(+), 410 deletions(-) delete mode 100644 arch/arm/dts/bcm6753.dtsi create mode 100644 arch/arm/dts/bcm6855.dtsi create mode 100644 arch/arm/dts/bcm96855.dts create mode 100644 arch/arm/mach-bcmbca/bcm6855/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm6855/Makefile delete mode 100644 board/broadcom/bcm96753ref/Kconfig delete mode 100644 board/broadcom/bcm96753ref/MAINTAINERS delete mode 100644 board/broadcom/bcm96753ref/Makefile delete mode 100644 board/broadcom/bcm96753ref/bcm96753ref.c delete mode 100644 configs/bcm96753ref_ram_defconfig create mode 100644 configs/bcm96855_defconfig create mode 100644 include/configs/bcm96855.h delete mode 100644 include/configs/broadcom_bcm96753ref.h -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v2 3/3] arm: bcmbca: replace ARCH_BCM6858 symbols in Kconfig with BCM6858
As CONFIG_ARCH_BCM6858 is replaced with CONFIG_BCM6858, update the driver Kconfig to use the new config symbol. Signed-off-by: William Zhang --- Changes in v2: -Update subject line to be more clear for patch 3 drivers/gpio/Kconfig | 3 +-- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/spi/Kconfig | 3 +-- drivers/watchdog/Kconfig | 3 +-- 5 files changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 9e00b48234ab..929f3fb9eacb 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -111,8 +111,7 @@ config BCM2835_GPIO config BCM6345_GPIO bool "BCM6345 GPIO driver" depends on DM_GPIO && (ARCH_BMIPS || BCM6856 || \ - ARCH_BCM6858 || BCM63158 || \ - ARCH_BCM6753) + BCM6858 || BCM63158 || ARCH_BCM6753) help This driver supports the GPIO banks on BCM6345 SoCs. diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index bd8f23fd9631..98f015a07f97 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -37,7 +37,7 @@ config LED_BCM6753 config LED_BCM6858 bool "LED Support for BCM6858" - depends on LED && (BCM6856 || ARCH_BCM6858 || BCM63158) + depends on LED && (BCM6856 || BCM6858 || BCM63158) help This option enables support for LEDs connected to the BCM6858 HW has blinking capabilities and up to 32 LEDs can be controlled. diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 5d006ca1ea07..f8445e09633c 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -115,7 +115,7 @@ config NAND_BRCMNAND_6838 config NAND_BRCMNAND_6858 bool "Support Broadcom NAND controller on bcm6858" - depends on NAND_BRCMNAND && ARCH_BCM6858 + depends on NAND_BRCMNAND && BCM6858 help Enable support for broadcom nand driver on bcm6858. diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 978e5c86a420..e815a715f9b2 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -91,8 +91,7 @@ config ATMEL_SPI config BCM63XX_HSSPI bool "BCM63XX HSSPI driver" - depends on (ARCH_BMIPS || BCM6856 || \ - ARCH_BCM6858 || BCM63158) + depends on (ARCH_BMIPS || BCM6856 || BCM6858 || BCM63158) help Enable the BCM6328 HSSPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Broadcom diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 6d559515b78b..84a4034fe87c 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -129,8 +129,7 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" depends on WDT && (ARCH_BMIPS || BCM6856 || \ - ARCH_BCM6858 || BCM63158 || \ - ARCH_BCM6753) + BCM6858 || BCM63158 || ARCH_BCM6753) help Select this to enable watchdog timer for BCM6345 SoCs. The watchdog timer is stopped when initialized. -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v2 2/3] arm: bcmbca: remove bcm6858 support under CONFIG_ARCH_BCM6858
Now that BCM6858 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM6858, remove the original ARCH_BCM6858 support and migrate its
configuration and dts settings. This includes:
- Remove the bcm968580xref board folder. It is replaced by the generic
bcmbca board folder.
- Update bcm968580xref board dts with the new compatible string.
- Delete broadcom_bcm968580xref.h and merge its setting to the new
bcm96858.h file.
- Remove bcm968580xref_ram_defconfig as a basic config version of
bcm96858_defconfig is now added.
Signed-off-by: William Zhang
---
(no changes since v1)
arch/arm/Kconfig | 7 ---
arch/arm/dts/Makefile| 6 +-
arch/arm/dts/bcm968580xref.dts | 4 +-
board/broadcom/bcm968580xref/Kconfig | 17 --
board/broadcom/bcm968580xref/MAINTAINERS | 6 --
board/broadcom/bcm968580xref/Makefile| 3 -
board/broadcom/bcm968580xref/bcm968580xref.c | 62 ---
configs/bcm968580xref_ram_defconfig | 64
include/configs/bcm96858.h | 4 ++
include/configs/broadcom_bcm968580xref.h | 32 --
10 files changed, 8 insertions(+), 197 deletions(-)
delete mode 100644 board/broadcom/bcm968580xref/Kconfig
delete mode 100644 board/broadcom/bcm968580xref/MAINTAINERS
delete mode 100644 board/broadcom/bcm968580xref/Makefile
delete mode 100644 board/broadcom/bcm968580xref/bcm968580xref.c
delete mode 100644 configs/bcm968580xref_ram_defconfig
delete mode 100644 include/configs/broadcom_bcm968580xref.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3f124ab0ce85..063616ff8d0b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -672,12 +672,6 @@ config ARCH_BCM6753
select OF_CONTROL
imply CMD_DM
-config ARCH_BCM6858
- bool "Broadcom BCM6858 family"
- select DM
- select OF_CONTROL
- imply CMD_DM
-
config ARCH_BCMSTB
bool "Broadcom BCM7XXX family"
select CPU_V7A
@@ -2274,7 +2268,6 @@ source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
source "board/broadcom/bcm96753ref/Kconfig"
-source "board/broadcom/bcm968580xref/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/eets/pdu001/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ee3475b97a40..07e6130042f5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1150,9 +1150,6 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
dtb-$(CONFIG_ARCH_BCM6753) += \
bcm96753ref.dtb
-dtb-$(CONFIG_ARCH_BCM6858) += \
- bcm968580xref.dtb
-
dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
@@ -1183,7 +1180,8 @@ dtb-$(CONFIG_BCM6856) += \
bcm96856.dtb \
bcm968360bg.dtb
dtb-$(CONFIG_BCM6858) += \
- bcm96858.dtb
+ bcm96858.dtb \
+ bcm968580xref.dtb
dtb-$(CONFIG_BCM6878) += \
bcm96878.dtb
diff --git a/arch/arm/dts/bcm968580xref.dts b/arch/arm/dts/bcm968580xref.dts
index a034e38318bd..6d787bd011b8 100644
--- a/arch/arm/dts/bcm968580xref.dts
+++ b/arch/arm/dts/bcm968580xref.dts
@@ -8,8 +8,8 @@
#include "bcm6858.dtsi"
/ {
- model = "Broadcom bcm68580xref";
- compatible = "broadcom,bcm68580xref", "brcm,bcm6858";
+ model = "Broadcom BCM968580xref Reference Board";
+ compatible = "brcm,bcm968580xref", "brcm,bcm6858", "brcm,bcmbca";
aliases {
serial0 = &uart0;
diff --git a/board/broadcom/bcm968580xref/Kconfig
b/board/broadcom/bcm968580xref/Kconfig
deleted file mode 100644
index b5730367a2d2..
--- a/board/broadcom/bcm968580xref/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-if ARCH_BCM6858
-
-config SYS_VENDOR
- default "broadcom"
-
-config SYS_BOARD
- default "bcm968580xref"
-
-config SYS_CONFIG_NAME
- default "broadcom_bcm968580xref"
-
-endif
-
-config TARGET_BCM968580XREF
- bool "Support Broadcom bcm968580xref"
- depends on ARCH_BCM6858
- select ARM64
diff --git a/board/broadcom/bcm968580xref/MAINTAINERS
b/board/broadcom/bcm968580xref/MAINTAINERS
deleted file mode 100644
index 5ee0c4dd4e42..
--- a/board/broadcom/bcm968580xref/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-BCM968580XREF BOARD
-M: Philippe Reynes
-S: Maintained
-F: board/broadcom/bcm968580xref/
-F: include/configs/broadcom_bcm968580xref.h
-F: configs/bcm968580xref_ram_defconfig
diff --git a/board/broadcom/bcm968580xref/Makefile
b/board/broadcom/bcm968580xref/Makefile
deleted file mode 100644
index 5cd393b19629..
--- a/board/broadcom/bcm968580xref/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y += bcm968580xref.o
diff --git a/board/broadcom/bcm968580xref/bcm968580xref.c
b/board/broadcom/bcm968580xref/bcm968580xref.c
deleted file mode 100644
index 1bd723d49edd..
--- a/board
[PATCH v2 1/3] arm: bcmbca: add bcm6858 SoC support under CONFIG_ARCH_BCMBCA
BCM6858 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other broadband
SoC, this patch adds it under CONFIG_BCM6858 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and the
original dts is updated with the one from linux next git repository.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang
---
Changes in v2:
-Add help in BCM6858 Kconfig option to include the list of the supported
chips.
MAINTAINERS | 1 +
arch/arm/dts/Makefile| 2 +
arch/arm/dts/bcm6858.dtsi| 197 ++-
arch/arm/dts/bcm96858.dts| 30
arch/arm/mach-bcmbca/Kconfig | 11 ++
arch/arm/mach-bcmbca/Makefile| 1 +
arch/arm/mach-bcmbca/bcm6858/Kconfig | 17 ++
arch/arm/mach-bcmbca/bcm6858/Makefile| 5 +
arch/arm/mach-bcmbca/bcm6858/mmu_table.c | 32
board/broadcom/bcmbca/Kconfig| 7 +
configs/bcm96858_defconfig | 23 +++
include/configs/bcm96858.h | 11 ++
12 files changed, 258 insertions(+), 79 deletions(-)
create mode 100644 arch/arm/dts/bcm96858.dts
create mode 100644 arch/arm/mach-bcmbca/bcm6858/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm6858/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm6858/mmu_table.c
create mode 100644 configs/bcm96858_defconfig
create mode 100644 include/configs/bcm96858.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 1f50dad583ce..819fa5b87824 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -231,6 +231,7 @@ N: bcm[9]?6756
N: bcm[9]?6813
N: bcm[9]?6846
N: bcm[9]?6856
+N: bcm[9]?6858
N: bcm[9]?6878
ARM BROADCOM BCMSTB
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a0ea9fa6029d..ee3475b97a40 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1182,6 +1182,8 @@ dtb-$(CONFIG_BCM6846) += \
dtb-$(CONFIG_BCM6856) += \
bcm96856.dtb \
bcm968360bg.dtb
+dtb-$(CONFIG_BCM6858) += \
+ bcm96858.dtb
dtb-$(CONFIG_BCM6878) += \
bcm96878.dtb
diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi
index 02225621710b..19c4dd6fa7e4 100644
--- a/arch/arm/dts/bcm6858.dtsi
+++ b/arch/arm/dts/bcm6858.dtsi
@@ -1,122 +1,161 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Philippe Reynes
+ * Copyright 2022 Broadcom Ltd.
*/
-#include "skeleton64.dtsi"
+#include
+#include
/ {
- compatible = "brcm,bcm6858";
+ compatible = "brcm,bcm6858", "brcm,bcmbca";
#address-cells = <2>;
#size-cells = <2>;
- aliases {
- spi0 = &hsspi;
- };
+ interrupt-parent = <&gic>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
- u-boot,dm-pre-reloc;
- cpu0: cpu@0 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x0>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
};
- cpu1: cpu@1 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x1>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
};
- cpu2: cpu@2 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x2>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
};
- cpu3: cpu@3 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x3>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
};
-
[PATCH v2 0/3] arm: bcmbca: move bcm6858 support under CONFIG_ARCH_BCMBCA
Sorry for another version of patch series with some minor updates. Please see the change log and specific patch for details. BCM6858 is part of the Broadcom BCA (Broadband Carrier Access origin) chipset family. BCM6858 was originally added by Philippe before Broadcom started to upstream the support for BCMBCA SoCs. The ARM based Broadband SoC family is now supported under the unified ARCH_BCMBCA config. This patch series migrate the BCM6858 support under the config of ARCH_BCMBCA and BCM6858. This patch series need to apply on top of my previous patch series [1]. [1]: https://lists.denx.de/pipermail/u-boot/2022-August/492470.html Changes in v2: -Add help in BCM6858 Kconfig option to include the list of the supported chips. -Update subject line to be more clear for patch 3 William Zhang (3): arm: bcmbca: add bcm6858 SoC support under CONFIG_ARCH_BCMBCA arm: bcmbca: remove bcm6858 support under CONFIG_ARCH_BCM6858 arm: bcmbca: replace ARCH_BCM6858 symbols in Kconfig with BCM6858 MAINTAINERS | 1 + arch/arm/Kconfig | 7 - arch/arm/dts/Makefile| 6 +- arch/arm/dts/bcm6858.dtsi| 197 +++ arch/arm/dts/bcm96858.dts| 30 +++ arch/arm/dts/bcm968580xref.dts | 4 +- arch/arm/mach-bcmbca/Kconfig | 11 ++ arch/arm/mach-bcmbca/Makefile| 1 + arch/arm/mach-bcmbca/bcm6858/Kconfig | 17 ++ arch/arm/mach-bcmbca/bcm6858/Makefile| 5 + arch/arm/mach-bcmbca/bcm6858/mmu_table.c | 32 +++ board/broadcom/bcm968580xref/Kconfig | 17 -- board/broadcom/bcm968580xref/MAINTAINERS | 6 - board/broadcom/bcm968580xref/Makefile| 3 - board/broadcom/bcm968580xref/bcm968580xref.c | 62 -- board/broadcom/bcmbca/Kconfig| 7 + configs/bcm968580xref_ram_defconfig | 64 -- configs/bcm96858_defconfig | 23 +++ drivers/gpio/Kconfig | 3 +- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/spi/Kconfig | 3 +- drivers/watchdog/Kconfig | 3 +- include/configs/bcm96858.h | 15 ++ include/configs/broadcom_bcm968580xref.h | 32 --- 25 files changed, 270 insertions(+), 283 deletions(-) create mode 100644 arch/arm/dts/bcm96858.dts create mode 100644 arch/arm/mach-bcmbca/bcm6858/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm6858/Makefile create mode 100644 arch/arm/mach-bcmbca/bcm6858/mmu_table.c delete mode 100644 board/broadcom/bcm968580xref/Kconfig delete mode 100644 board/broadcom/bcm968580xref/MAINTAINERS delete mode 100644 board/broadcom/bcm968580xref/Makefile delete mode 100644 board/broadcom/bcm968580xref/bcm968580xref.c delete mode 100644 configs/bcm968580xref_ram_defconfig create mode 100644 configs/bcm96858_defconfig create mode 100644 include/configs/bcm96858.h delete mode 100644 include/configs/broadcom_bcm968580xref.h -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v4 3/3] arm: bcmbca: replace ARCH_BCM68360 symbols in Kconfig with BCM6856
As CONFIG_ARCH_BCM68360 is replaced with CONFIG_BCM6856, update the driver Kconfig to use the new config symbol. Signed-off-by: William Zhang --- Changes in v4: -Update subject line to be more clear for patch 3 drivers/gpio/Kconfig | 2 +- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/spi/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 83f4f5089992..9e00b48234ab 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -110,7 +110,7 @@ config BCM2835_GPIO config BCM6345_GPIO bool "BCM6345 GPIO driver" - depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM68360 || \ + depends on DM_GPIO && (ARCH_BMIPS || BCM6856 || \ ARCH_BCM6858 || BCM63158 || \ ARCH_BCM6753) help diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index d777414dda8d..bd8f23fd9631 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -37,7 +37,7 @@ config LED_BCM6753 config LED_BCM6858 bool "LED Support for BCM6858" - depends on LED && (ARCH_BCM68360 || ARCH_BCM6858 || BCM63158) + depends on LED && (BCM6856 || ARCH_BCM6858 || BCM63158) help This option enables support for LEDs connected to the BCM6858 HW has blinking capabilities and up to 32 LEDs can be controlled. diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 24c27b6ecf7f..5d006ca1ea07 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -103,7 +103,7 @@ config NAND_BRCMNAND_6753 config NAND_BRCMNAND_68360 bool "Support Broadcom NAND controller on bcm68360" - depends on NAND_BRCMNAND && ARCH_BCM68360 + depends on NAND_BRCMNAND && BCM6856 help Enable support for broadcom nand driver on bcm68360. diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 0a666eee80e7..978e5c86a420 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -91,7 +91,7 @@ config ATMEL_SPI config BCM63XX_HSSPI bool "BCM63XX HSSPI driver" - depends on (ARCH_BMIPS || ARCH_BCM68360 || \ + depends on (ARCH_BMIPS || BCM6856 || \ ARCH_BCM6858 || BCM63158) help Enable the BCM6328 HSSPI driver. This driver can be used to diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index ff4d1ee530d2..6d559515b78b 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -128,7 +128,7 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" - depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ + depends on WDT && (ARCH_BMIPS || BCM6856 || \ ARCH_BCM6858 || BCM63158 || \ ARCH_BCM6753) help -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v4 2/3] arm: bcmbca: remove bcm68360 support under CONFIG_ARCH_BCM68360
BCM68360 is a variant within the BCM6856 chip family. Now that BCM6856
is supported under CONFIG_ARCH_BCMBCA and CONFIG_BCM6856, remove the
original ARCH_BCM68360 support and migrate its configuration and dts
settings. This includes:
- Remove the bcm968360bg board folder. It is replaced by the generic
bcmbca board folder.
- Merge the 68360.dtsi setting to the new 6856.dtsi file. Update board
dts with the new compatible string.
- Merge broadcom_bcm968360bg.h setting to the new bcm96856.h file.
- Remove bcm968360bg_ram_defconfig as a basic config version of
bcm96856_defconfig is now added.
Signed-off-by: William Zhang
---
(no changes since v3)
Changes in v3:
- Remove bcm968360bg_ram_defconfig per discussion with Philippe as a
basic config version of bcm96856_defconfig is now added.
- Update commit message
Changes in v2:
- Bring Philippe Reynes copyright tag from 68360 dts to 6856 dts
arch/arm/Kconfig | 7 -
arch/arm/dts/Makefile| 6 +-
arch/arm/dts/bcm68360.dtsi | 217 ---
arch/arm/dts/bcm6856.dtsi| 150
arch/arm/dts/bcm968360bg.dts | 6 +-
board/broadcom/bcm968360bg/Kconfig | 17 --
board/broadcom/bcm968360bg/MAINTAINERS | 6 -
board/broadcom/bcm968360bg/Makefile | 3 -
board/broadcom/bcm968360bg/bcm968360bg.c | 62 ---
configs/bcm968360bg_ram_defconfig| 63 ---
include/configs/bcm96856.h | 4 +
include/configs/broadcom_bcm968360bg.h | 32
12 files changed, 159 insertions(+), 414 deletions(-)
delete mode 100644 arch/arm/dts/bcm68360.dtsi
delete mode 100644 board/broadcom/bcm968360bg/Kconfig
delete mode 100644 board/broadcom/bcm968360bg/MAINTAINERS
delete mode 100644 board/broadcom/bcm968360bg/Makefile
delete mode 100644 board/broadcom/bcm968360bg/bcm968360bg.c
delete mode 100644 configs/bcm968360bg_ram_defconfig
delete mode 100644 include/configs/broadcom_bcm968360bg.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index da4defa08466..3f124ab0ce85 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -672,12 +672,6 @@ config ARCH_BCM6753
select OF_CONTROL
imply CMD_DM
-config ARCH_BCM68360
- bool "Broadcom BCM68360 family"
- select DM
- select OF_CONTROL
- imply CMD_DM
-
config ARCH_BCM6858
bool "Broadcom BCM6858 family"
select DM
@@ -2280,7 +2274,6 @@ source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
source "board/broadcom/bcm96753ref/Kconfig"
-source "board/broadcom/bcm968360bg/Kconfig"
source "board/broadcom/bcm968580xref/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
source "board/cavium/thunderx/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a32bdf8c9f17..a0ea9fa6029d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1147,9 +1147,6 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
bcm2837-rpi-cm3-io3.dtb \
bcm2711-rpi-4-b.dtb
-dtb-$(CONFIG_ARCH_BCM68360) += \
- bcm968360bg.dtb
-
dtb-$(CONFIG_ARCH_BCM6753) += \
bcm96753ref.dtb
@@ -1183,7 +1180,8 @@ dtb-$(CONFIG_BCM6813) += \
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
dtb-$(CONFIG_BCM6856) += \
- bcm96856.dtb
+ bcm96856.dtb \
+ bcm968360bg.dtb
dtb-$(CONFIG_BCM6878) += \
bcm96878.dtb
diff --git a/arch/arm/dts/bcm68360.dtsi b/arch/arm/dts/bcm68360.dtsi
deleted file mode 100644
index 7bbe207794eb..
--- a/arch/arm/dts/bcm68360.dtsi
+++ /dev/null
@@ -1,217 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2020 Philippe Reynes
- */
-
-#include "skeleton64.dtsi"
-
-/ {
- compatible = "brcm,bcm68360";
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- spi0 = &hsspi;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
- u-boot,dm-pre-reloc;
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a53", "arm,armv8";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- cpu1: cpu@1 {
- compatible = "arm,cortex-a53", "arm,armv8";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- u-boot,dm-pre-reloc;
- };
- };
-
- clocks {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- u-boot,dm-
[PATCH v4 1/3] arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA
BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other Broadband
SoC, this patch adds it under CONFIG_BCM6856 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and Broadcom uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang
---
Changes in v4:
-Add help in BCM6856 Kconfig option to include the list of the supported
chips.
MAINTAINERS | 1 +
arch/arm/dts/Makefile| 2 +
arch/arm/dts/bcm6856.dtsi| 103 +++
arch/arm/dts/bcm96856.dts| 30 +++
arch/arm/mach-bcmbca/Kconfig | 11 +++
arch/arm/mach-bcmbca/Makefile| 1 +
arch/arm/mach-bcmbca/bcm6856/Kconfig | 17
arch/arm/mach-bcmbca/bcm6856/Makefile| 5 ++
arch/arm/mach-bcmbca/bcm6856/mmu_table.c | 32 +++
board/broadcom/bcmbca/Kconfig| 7 ++
configs/bcm96856_defconfig | 23 +
include/configs/bcm96856.h | 11 +++
12 files changed, 243 insertions(+)
create mode 100644 arch/arm/dts/bcm6856.dtsi
create mode 100644 arch/arm/dts/bcm96856.dts
create mode 100644 arch/arm/mach-bcmbca/bcm6856/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm6856/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm6856/mmu_table.c
create mode 100644 configs/bcm96856_defconfig
create mode 100644 include/configs/bcm96856.h
diff --git a/MAINTAINERS b/MAINTAINERS
index d0a5b2352cc8..1f50dad583ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -230,6 +230,7 @@ N: bcm[9]?63178
N: bcm[9]?6756
N: bcm[9]?6813
N: bcm[9]?6846
+N: bcm[9]?6856
N: bcm[9]?6878
ARM BROADCOM BCMSTB
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c55bc3569662..a32bdf8c9f17 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1182,6 +1182,8 @@ dtb-$(CONFIG_BCM6813) += \
bcm96813.dtb
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
+dtb-$(CONFIG_BCM6856) += \
+ bcm96856.dtb
dtb-$(CONFIG_BCM6878) += \
bcm96878.dtb
diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi
new file mode 100644
index ..0bce6497219f
--- /dev/null
+++ b/arch/arm/dts/bcm6856.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include
+#include
+
+/ {
+ compatible = "brcm,bcm6856", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = ,
+ ,
+ ,
+ ;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = ,
+ ;
+ interrupt-affinity = <&B53_0>, <&B53_1>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@8100 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x8100 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x60
[PATCH v4 0/3] arm: bcmbca: move bcm68360 support under CONFIG_ARCH_BCMBCA
Sorry for another version of patch series with some minor updates. Please see the change log and specific patch for details. BCM68360 is a variant for the main PON chip BCM6856 which is part of the Broadcom BCA (Broadband Carrier Access origin) chipset family. BCM68360 was originally added by Philippe before Broadcom started to upstream the support for BCMBCA SoCs. The ARM based Broadband SoC family is now supported under the unified ARCH_BCMBCA config. This patch series migrate the BCM68360 support under the config of ARCH_BCMBCA and BCM6856. This patch series need to apply on top of my previous patch series [1]. [1]: https://lists.denx.de/pipermail/u-boot/2022-August/492464.html Changes in v4: -Add help in BCM6856 Kconfig option to include the list of the supported chips. -Update subject line to be more clear for patch 3 Changes in v3: - Remove bcm968360bg_ram_defconfig per discussion with Philippe as a basic config version of bcm96856_defconfig is now added. - Update commit message Changes in v2: - Bring Philippe Reynes copyright tag from 68360 dts to 6856 dts William Zhang (3): arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA arm: bcmbca: remove bcm68360 support under CONFIG_ARCH_BCM68360 arm: bcmbca: replace ARCH_BCM68360 symbols in Kconfig with BCM6856 MAINTAINERS | 1 + arch/arm/Kconfig | 7 - arch/arm/dts/Makefile| 6 +- arch/arm/dts/bcm68360.dtsi | 217 --- arch/arm/dts/bcm6856.dtsi| 253 +++ arch/arm/dts/bcm968360bg.dts | 6 +- arch/arm/dts/bcm96856.dts| 30 +++ arch/arm/mach-bcmbca/Kconfig | 11 + arch/arm/mach-bcmbca/Makefile| 1 + arch/arm/mach-bcmbca/bcm6856/Kconfig | 17 ++ arch/arm/mach-bcmbca/bcm6856/Makefile| 5 + arch/arm/mach-bcmbca/bcm6856/mmu_table.c | 32 +++ board/broadcom/bcm968360bg/Kconfig | 17 -- board/broadcom/bcm968360bg/MAINTAINERS | 6 - board/broadcom/bcm968360bg/Makefile | 3 - board/broadcom/bcm968360bg/bcm968360bg.c | 62 -- board/broadcom/bcmbca/Kconfig| 7 + configs/bcm968360bg_ram_defconfig| 63 -- configs/bcm96856_defconfig | 23 +++ drivers/gpio/Kconfig | 2 +- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/spi/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- include/configs/bcm96856.h | 15 ++ include/configs/broadcom_bcm968360bg.h | 32 --- 26 files changed, 406 insertions(+), 418 deletions(-) delete mode 100644 arch/arm/dts/bcm68360.dtsi create mode 100644 arch/arm/dts/bcm6856.dtsi create mode 100644 arch/arm/dts/bcm96856.dts create mode 100644 arch/arm/mach-bcmbca/bcm6856/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm6856/Makefile create mode 100644 arch/arm/mach-bcmbca/bcm6856/mmu_table.c delete mode 100644 board/broadcom/bcm968360bg/Kconfig delete mode 100644 board/broadcom/bcm968360bg/MAINTAINERS delete mode 100644 board/broadcom/bcm968360bg/Makefile delete mode 100644 board/broadcom/bcm968360bg/bcm968360bg.c delete mode 100644 configs/bcm968360bg_ram_defconfig create mode 100644 configs/bcm96856_defconfig create mode 100644 include/configs/bcm96856.h delete mode 100644 include/configs/broadcom_bcm968360bg.h -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v3 5/5] arm: bcmbca: make reset_cpu function weak
BCM63158 carries the CONFIG_SYSRESET from the original configuration. It
provide reset_cpu function already so need to define weak version of the
dummy reset_cpu for other BCMBCA SoCs to avoid linking error.
Signed-off-by: William Zhang
---
Changes in v3:
-Fix reset_cpu function prototype.
board/broadcom/bcmbca/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/broadcom/bcmbca/board.c b/board/broadcom/bcmbca/board.c
index 4aa1d659d5c7..bcecb4d78392 100644
--- a/board/broadcom/bcmbca/board.c
+++ b/board/broadcom/bcmbca/board.c
@@ -30,6 +30,6 @@ int print_cpuinfo(void)
return 0;
}
-void reset_cpu(ulong addr)
+__weak void reset_cpu(void)
{
}
--
2.37.1
smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH v3 4/5] MAINTAINERS: Add BCM63158 maintainer to BCMBCA entry
Since ARCH_BCM63158 SoC support is merged into ARCH_BCMBCA, add BCM63158 maintainer Philippe to bcmbca maintainer list. Signed-off-by: William Zhang --- (no changes since v1) MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5b219d62f6bf..d0a5b2352cc8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -213,6 +213,7 @@ M: Anand Gore M: William Zhang M: Kursad Oney M: Joel Peshkin +M: Philippe Reynes S: Maintained F: arch/arm/mach-bcmbca/ F: board/broadcom/bcmbca/ -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v3 3/5] arm: bcmbca: replace ARCH_BCM63158 symbols in Kconfig with BCM63158
As CONFIG_ARCH_BCM63158 is replaced with CONFIG_BCM63158, update the Kconfig to use the new config symbol. Signed-off-by: William Zhang --- Changes in v3: -Update subject line to be more clear drivers/gpio/Kconfig | 2 +- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/spi/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index aaa152fae73b..83f4f5089992 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -111,7 +111,7 @@ config BCM2835_GPIO config BCM6345_GPIO bool "BCM6345 GPIO driver" depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158 || \ + ARCH_BCM6858 || BCM63158 || \ ARCH_BCM6753) help This driver supports the GPIO banks on BCM6345 SoCs. diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index ccdd7d7395c8..d777414dda8d 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -37,7 +37,7 @@ config LED_BCM6753 config LED_BCM6858 bool "LED Support for BCM6858" - depends on LED && (ARCH_BCM68360 || ARCH_BCM6858 || ARCH_BCM63158) + depends on LED && (ARCH_BCM68360 || ARCH_BCM6858 || BCM63158) help This option enables support for LEDs connected to the BCM6858 HW has blinking capabilities and up to 32 LEDs can be controlled. diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index ce67d1abde25..24c27b6ecf7f 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -121,7 +121,7 @@ config NAND_BRCMNAND_6858 config NAND_BRCMNAND_63158 bool "Support Broadcom NAND controller on bcm63158" - depends on NAND_BRCMNAND && ARCH_BCM63158 + depends on NAND_BRCMNAND && BCM63158 help Enable support for broadcom nand driver on bcm63158. diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 75b794548b22..0a666eee80e7 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -92,7 +92,7 @@ config ATMEL_SPI config BCM63XX_HSSPI bool "BCM63XX HSSPI driver" depends on (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158) + ARCH_BCM6858 || BCM63158) help Enable the BCM6328 HSSPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Broadcom diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 50e6a1efba51..ff4d1ee530d2 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -129,7 +129,7 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158 || \ + ARCH_BCM6858 || BCM63158 || \ ARCH_BCM6753) help Select this to enable watchdog timer for BCM6345 SoCs. -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v3 2/5] arm: bcmbca: remove bcm63158 support under CONFIG_ARCH_BCM63158
Now that BCM63158 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM63158, remove the original ARCH_BCM63158 support and migrate
configuration settings.
Signed-off-by: William Zhang
---
(no changes since v2)
Changes in v2:
- Remove bcm963158_ram_defconfig per discussion with Philippe as a
basic config version of bcm963158_defconfig is now added.
arch/arm/Kconfig | 8 +---
arch/arm/dts/Makefile| 3 --
board/broadcom/bcm963158/Kconfig | 17 ---
board/broadcom/bcm963158/MAINTAINERS | 6 ---
board/broadcom/bcm963158/Makefile| 3 --
board/broadcom/bcm963158/bcm963158.c | 62 -
configs/bcm963158_ram_defconfig | 67
include/configs/bcm963158.h | 4 ++
include/configs/broadcom_bcm963158.h | 32 -
9 files changed, 5 insertions(+), 197 deletions(-)
delete mode 100644 board/broadcom/bcm963158/Kconfig
delete mode 100644 board/broadcom/bcm963158/MAINTAINERS
delete mode 100644 board/broadcom/bcm963158/Makefile
delete mode 100644 board/broadcom/bcm963158/bcm963158.c
delete mode 100644 configs/bcm963158_ram_defconfig
delete mode 100644 include/configs/broadcom_bcm963158.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0d4903a2eb5b..da4defa08466 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -665,12 +665,6 @@ config ARCH_BCM283X
imply CMD_DM
imply FAT_WRITE
-config ARCH_BCM63158
- bool "Broadcom BCM63158 family"
- select DM
- select OF_CONTROL
- imply CMD_DM
-
config ARCH_BCM6753
bool "Broadcom BCM6753 family"
select CPU_V7A
@@ -706,6 +700,7 @@ config ARCH_BCMBCA
bool "Broadcom broadband chip family"
select DM
select OF_CONTROL
+ imply CMD_DM
config TARGET_VEXPRESS_CA9X4
bool "Support vexpress_ca9x4"
@@ -2284,7 +2279,6 @@ source "board/Marvell/octeontx2/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
-source "board/broadcom/bcm963158/Kconfig"
source "board/broadcom/bcm96753ref/Kconfig"
source "board/broadcom/bcm968360bg/Kconfig"
source "board/broadcom/bcm968580xref/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a7fc3d7d7021..c55bc3569662 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1147,9 +1147,6 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
bcm2837-rpi-cm3-io3.dtb \
bcm2711-rpi-4-b.dtb
-dtb-$(CONFIG_ARCH_BCM63158) += \
- bcm963158.dtb
-
dtb-$(CONFIG_ARCH_BCM68360) += \
bcm968360bg.dtb
diff --git a/board/broadcom/bcm963158/Kconfig b/board/broadcom/bcm963158/Kconfig
deleted file mode 100644
index 08a8bc1c14d3..
--- a/board/broadcom/bcm963158/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-if TARGET_BCM963158
-
-config SYS_VENDOR
- default "broadcom"
-
-config SYS_BOARD
- default "bcm963158"
-
-config SYS_CONFIG_NAME
- default "broadcom_bcm963158"
-
-endif
-
-config TARGET_BCM963158
- bool "Support Broadcom bcm963158"
- depends on ARCH_BCM63158
- select ARM64
diff --git a/board/broadcom/bcm963158/MAINTAINERS
b/board/broadcom/bcm963158/MAINTAINERS
deleted file mode 100644
index d28d971f9d36..
--- a/board/broadcom/bcm963158/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-BROADCOM BCM963158
-M: Philippe Reynes
-S: Maintained
-F: board/broadcom/bcm963158/
-F: include/configs/broadcom_bcm963158.h
-F: configs/bcm963158_ram_defconfig
diff --git a/board/broadcom/bcm963158/Makefile
b/board/broadcom/bcm963158/Makefile
deleted file mode 100644
index 0a902c9cf618..
--- a/board/broadcom/bcm963158/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y += bcm963158.o
diff --git a/board/broadcom/bcm963158/bcm963158.c
b/board/broadcom/bcm963158/bcm963158.c
deleted file mode 100644
index 9feaee3c0fc4..
--- a/board/broadcom/bcm963158/bcm963158.c
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2019 Philippe Reynes
- */
-
-#include
-#include
-#include
-#include
-
-#ifdef CONFIG_ARM64
-#include
-
-static struct mm_region broadcom_bcm963158_mem_map[] = {
- {
- /* RAM */
- .virt = 0xUL,
- .phys = 0xUL,
- .size = 8UL * SZ_1G,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-PTE_BLOCK_INNER_SHARE
- }, {
- /* SoC */
- .virt = 0x8000UL,
- .phys = 0x8000UL,
- .size = 0xff8000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-PTE_BLOCK_NON_SHARE |
-PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = broadcom_bcm963158_mem_map
[PATCH v3 1/5] arm: bcmbca: add bcm63158 SoC support under CONFIG_ARCH_BCMBCA
BCM63158 is a Broadcom B53 based DSL Gateway SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family. Like other
Broadband SoC, this patch adds it under CONFIG_BCM63158 chip
config and CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and ARM PL011 uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there to the console.
Signed-off-by: William Zhang
---
(no changes since v2)
Changes in v2:
- Remove extra nodes from bcm963158.dts and keep it as a generic minimun
board support dts following other BCA chip convention.
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm63158.dtsi| 207 +-
arch/arm/dts/bcm963158.dts| 121 +
arch/arm/mach-bcmbca/Kconfig | 8 +
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm63158/Kconfig | 17 ++
arch/arm/mach-bcmbca/bcm63158/Makefile| 5 +
arch/arm/mach-bcmbca/bcm63158/mmu_table.c | 32
board/broadcom/bcmbca/Kconfig | 7 +
configs/bcm963158_defconfig | 23 +++
include/configs/bcm963158.h | 11 ++
12 files changed, 239 insertions(+), 196 deletions(-)
create mode 100644 arch/arm/mach-bcmbca/bcm63158/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm63158/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm63158/mmu_table.c
create mode 100644 configs/bcm963158_defconfig
create mode 100644 include/configs/bcm963158.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 3f250942ced1..5b219d62f6bf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -224,6 +224,7 @@ N: bcm[9]?4912
N: bcm[9]?63138
N: bcm[9]?63146
N: bcm[9]?63148
+N: bcm[9]?63158
N: bcm[9]?63178
N: bcm[9]?6756
N: bcm[9]?6813
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9a6582d9c1c8..a7fc3d7d7021 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1175,6 +1175,8 @@ dtb-$(CONFIG_BCM63146) += \
bcm963146.dtb
dtb-$(CONFIG_BCM63148) += \
bcm963148.dtb
+dtb-$(CONFIG_BCM63158) += \
+ bcm963158.dtb
dtb-$(CONFIG_BCM63178) += \
bcm963178.dtb
dtb-$(CONFIG_BCM6756) += \
diff --git a/arch/arm/dts/bcm63158.dtsi b/arch/arm/dts/bcm63158.dtsi
index 7dd285843849..8b179ba0fca8 100644
--- a/arch/arm/dts/bcm63158.dtsi
+++ b/arch/arm/dts/bcm63158.dtsi
@@ -1,122 +1,167 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Philippe Reynes
+ * Copyright 2022 Broadcom Ltd.
*/
-#include "skeleton64.dtsi"
+#include
+#include
/ {
- compatible = "brcm,bcm63158";
+ compatible = "brcm,bcm63158", "brcm,bcmbca";
#address-cells = <2>;
#size-cells = <2>;
- aliases {
- spi0 = &hsspi;
- };
+ interrupt-parent = <&gic>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
- u-boot,dm-pre-reloc;
- cpu0: cpu@0 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x0>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
};
- cpu1: cpu@1 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x1>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
};
- cpu2: cpu@2 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x2>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
};
- cpu3: cpu@3 {
- compatible = "arm,cortex-a53", "arm,armv8";
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
device_type = "cpu";
reg = <0x0 0x3>;
- next-level-cach
[PATCH v3 0/5] arm: bcmbca: move bcm63158 support under CONFIG_ARCH_BCMBCA
Sorry for another version of patch series with some minor updates. Please see the change log and specific patch for details. BCM63158 is one of the Broadcom Broadband origin DSL Gateway router SoC. It was originally added by Philippe before Broadcom started to upstream the support for broadband SoCs. The ARM based Broadcom Broadband SoC family is now supported under the same ARCH_BCMBCA config. This patch series migrate the BCM63158 support to ARCH_BCMBCA. This patch series need to apply on top of my previous patch series [1]. [1]: https://lists.denx.de/pipermail/u-boot/2022-August/491061.html Changes in v3: -Update subject line to be more clear for patch 3 -Fix reset_cpu function prototype. Changes in v2: - Remove extra nodes from bcm963158.dts and keep it as a generic minimun board support dts following other BCA chip convention. - Remove bcm963158_ram_defconfig per discussion with Philippe as a basic config version of bcm963158_defconfig is now added. William Zhang (5): arm: bcmbca: add bcm63158 SoC support under CONFIG_ARCH_BCMBCA arm: bcmbca: remove bcm63158 support under CONFIG_ARCH_BCM63158 arm: bcmbca: replace ARCH_BCM63158 symbols in Kconfig with BCM63158 MAINTAINERS: Add BCM63158 maintainer to BCMBCA entry arm: bcmbca: make reset_cpu function weak MAINTAINERS | 2 + arch/arm/Kconfig | 8 +- arch/arm/dts/Makefile | 5 +- arch/arm/dts/bcm63158.dtsi| 207 +- arch/arm/dts/bcm963158.dts| 121 + arch/arm/mach-bcmbca/Kconfig | 8 + arch/arm/mach-bcmbca/Makefile | 1 + arch/arm/mach-bcmbca/bcm63158/Kconfig | 17 ++ arch/arm/mach-bcmbca/bcm63158/Makefile| 5 + arch/arm/mach-bcmbca/bcm63158/mmu_table.c | 32 board/broadcom/bcm963158/Kconfig | 17 -- board/broadcom/bcm963158/MAINTAINERS | 6 - board/broadcom/bcm963158/Makefile | 3 - board/broadcom/bcm963158/bcm963158.c | 62 --- board/broadcom/bcmbca/Kconfig | 7 + board/broadcom/bcmbca/board.c | 2 +- configs/bcm963158_defconfig | 23 +++ configs/bcm963158_ram_defconfig | 67 --- drivers/gpio/Kconfig | 2 +- drivers/led/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/spi/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- include/configs/bcm963158.h | 15 ++ include/configs/broadcom_bcm963158.h | 32 25 files changed, 251 insertions(+), 399 deletions(-) create mode 100644 arch/arm/mach-bcmbca/bcm63158/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm63158/Makefile create mode 100644 arch/arm/mach-bcmbca/bcm63158/mmu_table.c delete mode 100644 board/broadcom/bcm963158/Kconfig delete mode 100644 board/broadcom/bcm963158/MAINTAINERS delete mode 100644 board/broadcom/bcm963158/Makefile delete mode 100644 board/broadcom/bcm963158/bcm963158.c create mode 100644 configs/bcm963158_defconfig delete mode 100644 configs/bcm963158_ram_defconfig create mode 100644 include/configs/bcm963158.h delete mode 100644 include/configs/broadcom_bcm963158.h -- 2.37.1 smime.p7s Description: S/MIME Cryptographic Signature
Re: [PATCH v2 6/7] tpm: Implement state command for Cr50
Hi Ilias,
On Mon, 22 Aug 2022 at 00:00, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> On Fri, 19 Aug 2022 at 16:47, Simon Glass wrote:
> >
> > Hi Ilias,
> >
> > On Thu, 18 Aug 2022 at 01:29, Ilias Apalodimas
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > On Wed, 17 Aug 2022 at 21:54, Simon Glass wrote:
> > > >
> > > > Hi Ilias,
> > > >
> > > > On Tue, 16 Aug 2022 at 06:43, Ilias Apalodimas
> > > > wrote:
> > > > >
> > > > > Hi Simon,
> > > > >
> > > > > I know little of this device and the whole patch seems fine apart from
> > > > > the definitions and declarations of the state functions.
> > > > >
> > > > >
> > > > > On Sat, 13 Aug 2022 at 22:56, Simon Glass wrote:
> > > > > >
> > > > >
> > > > > >
> > > > > > drivers/tpm/cr50_i2c.c | 117
> > > > > > +
> > > > > > include/tpm-v2.h | 54 +++
> > > > > > lib/tpm-v2.c | 24 +
> > > > >
> > > > > [...]
> > > > >
> > > > > > diff --git a/include/tpm-v2.h b/include/tpm-v2.h
> > > > > > index e79c90b9395..8e90a616220 100644
> > > > > > --- a/include/tpm-v2.h
> > > > > > +++ b/include/tpm-v2.h
> > > > > > @@ -419,6 +419,50 @@ enum {
> > > > > > HR_NV_INDEX = TPM_HT_NV_INDEX << HR_SHIFT,
> > > > > > };
> > > > > >
> > > > > > +/*
> > > > > > + * Operations specific to the Cr50 TPM used on Chromium OS and
> > > > > > Android devices
> > > > > > + *
> > > > > > + * FIXME: below is not enough to differentiate between vendors
> > > > > > commands
> > > > > > + * of numerous devices. However, the current tpm2 APIs aren't very
> > > > > > amenable
> > > > > > + * to extending generically because the marshaling code is
> > > > > > assuming all
> > > > > > + * knowledge of all commands.
> > > > > > + */
> > > > > > +#define TPM2_CC_VENDOR_BIT_MASK0x2000
> > > > > > +
> > > > > > +#define TPM2_CR50_VENDOR_COMMAND
> > > > > > (TPM2_CC_VENDOR_BIT_MASK | 0)
> > > > > > +#define TPM2_CR50_SUB_CMD_IMMEDIATE_RESET 19
> > > > > > +#define TPM2_CR50_SUB_CMD_NVMEM_ENABLE_COMMITS 21
> > > > > > +#define TPM2_CR50_SUB_CMD_REPORT_TPM_STATE 23
> > > > > > +#define TPM2_CR50_SUB_CMD_TURN_UPDATE_ON 24
> > > > > > +#define TPM2_CR50_SUB_CMD_GET_REC_BTN 29
> > > > > > +#define TPM2_CR50_SUB_CMD_TPM_MODE 40
> > > > > > +#define TPM2_CR50_SUB_CMD_GET_BOOT_MODE52
> > > > > > +#define TPM2_CR50_SUB_CMD_RESET_EC 53
> > > > > > +
> > > > > > +/* Cr50 vendor-specific error codes. */
> > > > > > +#define VENDOR_RC_ERR 0x0500
> > > > > > +enum cr50_vendor_rc {
> > > > > > + VENDOR_RC_INTERNAL_ERROR= (VENDOR_RC_ERR | 6),
> > > > > > + VENDOR_RC_NO_SUCH_SUBCOMMAND= (VENDOR_RC_ERR | 8),
> > > > > > + VENDOR_RC_NO_SUCH_COMMAND = (VENDOR_RC_ERR | 127),
> > > > > > +};
> > > > > > +
> > > > > > +enum cr50_tpm_mode {
> > > > > > + /*
> > > > > > +* Default state: TPM is enabled, and may be set to either
> > > > > > +* TPM_MODE_ENABLED or TPM_MODE_DISABLED.
> > > > > > +*/
> > > > > > + TPM_MODE_ENABLED_TENTATIVE = 0,
> > > > > > +
> > > > > > + /* TPM is enabled, and mode may not be changed. */
> > > > > > + TPM_MODE_ENABLED = 1,
> > > > > > +
> > > > > > + /* TPM is disabled, and mode may not be changed. */
> > > > > > + TPM_MODE_DISABLED = 2,
> > > > > > +
> > > > > > + TPM_MODE_INVALID,
> > > > > > +};
> > > > > > +
> > > > > > /**
> > > > > > * Issue a TPM2_Startup command.
> > > > > > *
> > > > > > @@ -658,4 +702,14 @@ u32 tpm2_disable_platform_hierarchy(struct
> > > > > > udevice *dev);
> > > > > > u32 tpm2_submit_command(struct udevice *dev, const u8 *sendbuf,
> > > > > > u8 *recvbuf, size_t *recv_size);
> > > > > >
> > > > > > +/**
> > > > > > + * tpm_cr50_report_state() - Report the Cr50 internal state
> > > > > > + *
> > > > > > + * @dev: TPM device
> > > > > > + * @recvbuf: Buffer to save the response to
> > > > > > + * @recv_size: Pointer to the size of the response buffer
> > > > > > + * Return: result of the operation
> > > > > > + */
> > > > > > +u32 tpm2_cr50_report_state(struct udevice *dev, u8 *recvbuf,
> > > > > > size_t *recv_size);
> > > > > > +
> > > > >
> > > > > I think we should keep the generic include files clean for hardware
> > > > > specific details.
> > > > >
> > > > > > #endif /* __TPM_V2_H */
> > > > > > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> > > > > > index 3e240bb4c67..3de4841974a 100644
> > > > > > --- a/lib/tpm-v2.c
> > > > > > +++ b/lib/tpm-v2.c
> > > > > > @@ -679,3 +679,27 @@ u32 tpm2_submit_command(struct udevice *dev,
> > > > > > const u8 *sendbuf,
> > > > > > {
> > > > > > return tpm_sendrecv_command(dev, sendbuf, recvbuf,
> > > > > > recv_size);
> > > > > > }
> > > > > > +
> > > > > > +u32 tpm2_cr50_report_state(struct udevice *dev, u8 *recvbuf,
> > > > > > size_t *recv_size)
Re: [PATCH v3 7/7] tpm: Allow committing non-volatile data
Hi Ilias,
On Mon, 22 Aug 2022 at 00:05, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> On Fri, 19 Aug 2022 at 16:47, Simon Glass wrote:
> >
> > Add an option to tell the TPM to commit non-volatile data immediately it
> > is changed, rather than waiting until later. This is needed in some
> > situations, since if the device reboots it may not write the data.
> >
> > Add definitions for the rest of the Cr50 commands while we are here.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > (no changes since v1)
> >
> > include/tpm-v2.h | 14 ++
> > lib/tpm-v2.c | 20
> > 2 files changed, 34 insertions(+)
> >
> > diff --git a/include/tpm-v2.h b/include/tpm-v2.h
> > index 8e90a616220..0a03994740d 100644
> > --- a/include/tpm-v2.h
> > +++ b/include/tpm-v2.h
> > @@ -712,4 +712,18 @@ u32 tpm2_submit_command(struct udevice *dev, const u8
> > *sendbuf,
> > */
> > u32 tpm2_cr50_report_state(struct udevice *dev, u8 *recvbuf, size_t
> > *recv_size);
> >
> > +/*
> > + * tpm2_cr50_enable_nvcommits() - Tell Cr50 to commit NV data immediately
> > + *
> > + * For Chromium OS verified boot, we may reboot or reset at different
> > times,
> > + * possibly leaving non-volatile data unwritten by the TPM.
> > + *
> > + * This vendor command is used to indicate that non-volatile data should be
> > + * written to its store immediately.
> > + *
> > + * @devTPM device
> > + * Return: result of the operation
> > + */
> > +u32 tpm2_cr50_enable_nvcommits(struct udevice *dev);
> > +
> > #endif /* __TPM_V2_H */
> > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> > index 3de4841974a..d68c311651b 100644
> > --- a/lib/tpm-v2.c
> > +++ b/lib/tpm-v2.c
> > @@ -703,3 +703,23 @@ u32 tpm2_cr50_report_state(struct udevice *dev, u8
> > *recvbuf, size_t *recv_size)
> >
> > return 0;
> > }
> > +
> > +u32 tpm2_cr50_enable_nvcommits(struct udevice *dev)
> > +{
> > + u8 command_v2[COMMAND_BUFFER_SIZE] = {
> > + /* header 10 bytes */
> > + tpm_u16(TPM2_ST_NO_SESSIONS), /* TAG */
> > + tpm_u32(10 + 2),/* Length */
> > + tpm_u32(TPM2_CR50_VENDOR_COMMAND), /* Command code */
> > +
> > + tpm_u16(TPM2_CR50_SUB_CMD_NVMEM_ENABLE_COMMITS),
> > + };
> > + int ret;
> > +
> > + ret = tpm_sendrecv_command(dev, command_v2, NULL, NULL);
> > + log_debug("ret=%s, %x\n", dev->name, ret);
> > + if (ret)
> > + return ret;
> > +
> > + return 0;
> > +}
> > --
> > 2.37.1.595.g718a3a8f04-goog
> >
>
> Are those functions used anywhere? If not it's better to post them
> along with the changes that eventually require it
They are used by the Chromium OS verified boot code, which is
out-of-tree at present. I'm not sure if it makes sense to bring it in,
or not.
Regards,
SImon
Re: [PATCH v8 10/13] FWU: cmd: Add a command to read FWU metadata
Hi Sughosh, On Sun, 21 Aug 2022 at 22:59, Sughosh Ganu wrote: > > hi Simon, > > On Fri, 19 Aug 2022 at 20:55, Simon Glass wrote: > > > > Hi Sughosh, > > > > On Fri, 19 Aug 2022 at 01:41, Sughosh Ganu wrote: > > > > > > hi Simon, > > > > > > On Thu, 18 Aug 2022 at 23:19, Simon Glass wrote: > > > > > > > > Hi Sughosh, > > > > > > > > On Thu, 18 Aug 2022 at 05:53, Sughosh Ganu > > > > wrote: > > > > > > > > > > hi Simon, > > > > > > > > > > On Thu, 18 Aug 2022 at 08:51, Simon Glass wrote: > > > > > > > > > > > > Hi Sugosh, > > > > > > > > > > > > On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu > > > > > > wrote: > > > > > > > > > > > > > > Add a command to read the metadata as specified in the FWU > > > > > > > specification and print the fields of the metadata. > > > > > > > > > > > > > > Signed-off-by: Sughosh Ganu > > > > > > > Reviewed-by: Ilias Apalodimas > > > > > > > --- > > > > > > > Changes since V7: None > > > > > > > > > > > > > > cmd/Kconfig | 7 + > > > > > > > cmd/Makefile| 1 + > > > > > > > cmd/fwu_mdata.c | 80 > > > > > > > + > > > > > > > 3 files changed, 88 insertions(+) > > > > > > > create mode 100644 cmd/fwu_mdata.c > > > > > > > > > > > > This needs docs and a test. > > > > > > > > > > > > BTW I forgot to mention that the uclass needs a simple test of some > > > > > > sort. > > > > > > > > > > > > https://u-boot.readthedocs.io/en/latest/develop/tests_writing.html > > > > > > > > > > Okay. I will check how this can be done. Btw, there are plans to add a > > > > > test for the feature once support for the feature has been added on > > > > > the Synquacer platform. That test will exercise the above command as > > > > > well as the driver code. Do we still need a standalone test for the > > > > > uclass? > > > > > > > > Yes, testing on real hardware has nothing to do with the uclass test, > > > > which runs on sandbox. It should be a small unit test like others in > > > > test/dm/... > > > > > > I am not talking about testing on real hardware, but a test to be run > > > on sandbox. I had posted the relevant patch [1] in an earlier version > > > of the patch series. But this test relies on support being added for > > > the feature on the Synquacer platform. Once those patches get in, I > > > will be adding the test for the feature as well. And this test > > > exercises both the fwu_mdata_read command as well as the driver code. > > > Which is why I was asking if it is necessary to add additional tests > > > for the command and dm code. > > > > It looks like that 'functional' test should be split into several unit > > tests that check particular things. See how this works with bootstd, > > in test/boot - the Python sets things up and the unit tests cover > > particular areas. The test seems to rely on things happening at > > reboot, so create a command to do those things, to provide for > > testability. > > The testing of the feature is being done on similar lines to how the > capsule update feature is being tested -- in fact, the FWU feature > relies on the capsule update for the underlying update functionality. > I think it would be good to have a script to test the feature. If you > want, I can see how I can add a test for the command, although I think > it would be superfluous given that the command will be tested as part > of the feature testing. The uclass needs a sandbox test. The capsule-update thing seems to rely on restarting the executable which is not a good thing for debugging a test in gdb, as you can imagine. Please read through the testing docs if you haven't already. We need a simple test that checks that the uclass and sandbox driver does what it should. Regards, Simon > > -sughosh > > > > > So for example 'ut boot fwu_prepare_update' could set up the update > > and 'ut boot fwu_apply_update' could apply it. > > > > Regards, > > Simon > > > > > > > > > > -sughosh > > > > > > [1] - https://lists.denx.de/pipermail/u-boot/2022-June/485992.html > > > > > > > > > > > Regards, > > > > Simon
Re: [PATCH v3 6/7] tpm: Implement state command for Cr50
Hi Ilias,
On Mon, 22 Aug 2022 at 00:04, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> This produces some build warnings e.g
> drivers/tpm/cr50_i2c.c: In function ‘cr50_i2c_report_state’:
> drivers/tpm/cr50_i2c.c:680:48: warning: passing argument 3 of
> ‘tpm2_cr50_report_state’ from incompatible pointer type
> [-Wincompatible-pointer-types]
> 680 | ret = tpm2_cr50_report_state(dev, buf, &buf_size);
> |^
> ||
> |int *
>
> On Fri, 19 Aug 2022 at 16:47, Simon Glass wrote:
> >
> > Add a vendor-specific TPM2 command for this and implement it for Cr50.
> > Note: This is not part of the TPM spec, but is a Cr50 extension.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > (no changes since v1)
> >
> > drivers/tpm/cr50_i2c.c | 117 +
> > include/tpm-v2.h | 54 +++
> > lib/tpm-v2.c | 24 +
> > 3 files changed, 195 insertions(+)
> >
> > diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
> > index f8c30878947..dabf617be0e 100644
> > --- a/drivers/tpm/cr50_i2c.c
> > +++ b/drivers/tpm/cr50_i2c.c
> > @@ -13,11 +13,13 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> >
> > @@ -54,6 +56,41 @@ struct cr50_priv {
> > bool use_irq;
> > };
> >
> > +/*
> > + * The below structure represents the body of the response to the 'report
> > tpm
> > + * state' vendor command.
> > + *
> > + * It is transferred over the wire, so it needs to be
> > serialized/deserialized,
> > + * and it is likely to change, so its contents must be versioned.
> > + */
> > +#define TPM_STATE_VERSION 1
> > +struct tpm_vendor_state {
> > + u32 version;
> > + /*
> > +* The following three fields are set by the TPM in case of an
> > assert.
> > +* There is no other processing than setting the source code line
> > +* number, error code and the first 4 characters of the function
> > name.
> > +*
> > +* We don't expect this happening, but it is included in the report
> > +* just in case.
> > +*/
> > + u32 fail_line; /* s_failLIne */
> > + u32 fail_code; /* s_failCode */
> > + char func_name[4]; /* s_failFunction, limited to 4 chars */
> > +
> > + /*
> > +* The following two fields are the current time filtered value of
> > the
> > +* 'failed tries' TPM counter, and the maximum allowed value of the
> > +* counter.
> > +*
> > +* failed_tries == max_tries is the definition of the TPM lockout
> > +* condition.
> > +*/
> > + u32 failed_tries; /* gp.failedTries */
> > + u32 max_tries; /* gp.maxTries */
> > + /* The below fields are present in version 2 and above */
> > +};
> > +
> > /* Wait for interrupt to indicate TPM is ready */
> > static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
> > {
> > @@ -573,6 +610,85 @@ static int cr50_i2c_get_desc(struct udevice *dev, char
> > *buf, int size)
> > return len;
> > }
> >
> > +static int stringify_state(char *buf, int len, char *str, size_t max_size)
> > +{
> > + struct tpm_vendor_state state;
> > + size_t text_size = 0;
> > +
> > + state.version = get_unaligned_be32(buf +
> > + offsetof(struct tpm_vendor_state, version));
> > + state.fail_line = get_unaligned_be32(buf +
> > + offsetof(struct tpm_vendor_state, fail_line));
> > + state.fail_code = get_unaligned_be32(buf +
> > + offsetof(struct tpm_vendor_state, fail_code));
> > + memcpy(state.func_name,
> > + buf + offsetof(struct tpm_vendor_state, func_name),
> > + sizeof(state.func_name));
> > + state.failed_tries = get_unaligned_be32(buf +
> > + offsetof(struct tpm_vendor_state, failed_tries));
> > + state.max_tries = get_unaligned_be32(buf +
> > + offsetof(struct tpm_vendor_state, max_tries));
> > +
> > + text_size += snprintf(str + text_size, max_size - text_size,
> > + "v=%d", state.version);
> > + if (text_size >= max_size)
> > + return -ENOSPC;
> > +
> > + if (state.version > TPM_STATE_VERSION)
> > + text_size += snprintf(str + text_size,
> > + max_size - text_size,
> > + " not fully supported\n");
> > + if (text_size >= max_size)
> > + return -ENOSPC;
> > +
> > + if (state.version == 0)
> > + return -EINVAL; /* This should never happen */
> > +
> > + text_size += snprintf(str + text_size,
> > + max_
Re: [RESEND PATCH 1/2] rpi: Copy properties from firmware dtb to the loaded dtb
Hi Antoine, On Fri, 19 Aug 2022 at 08:08, Antoine Mazeas wrote: > > The RPI firmware adjusts several property values in the dtb it passes > to u-boot depending on the board/SoC revision. Inherit some of these > when u-boot loads a dtb itself. Specificaly copy: > > * /model: The firmware provides a more specific string > * /memreserve: The firmware defines a reserved range, better keep it > * emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as > present on rpi 400 and some rpi 4B boards) has different values for > these then the B0T revision. So these need to be adjusted to boot on > these boards > * blconfig: The firmware defines the memory area where the blconfig > stored. Copy those over so it can be enabled. > * /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage > of that. > > Signed-off-by: Sjoerd Simons > Signed-off-by: Antoine Mazeas > --- > > board/raspberrypi/rpi/rpi.c | 48 + > 1 file changed, 48 insertions(+) Reviewed-by: Simon Glass I wonder if anyone has tried to drop the private firmware on the boards? At some point copy_property() should move to fdt_support.c if others use it
Re: [PATCH] fs: fix comment typo
On Sun, 21 Aug 2022 at 16:31, Roger Knecht wrote: > > Fix typo in include/fs.h > > Signed-off-by: Roger Knecht > --- > include/fs.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Simon Glass
Re: [PATCH v6 18/21] binman: Add gzip bintool
Hi Stefan, On Mon, 22 Aug 2022 at 01:07, Stefan Herbrechtsmeier wrote: > > Hi Simon, > > Am 21.08.2022 um 02:10 schrieb Simon Glass: > > Hi Stefan, > > > > On Sat, 20 Aug 2022 at 15:33, Simon Glass wrote: > >> > >> On Fri, 19 Aug 2022 at 08:26, Stefan Herbrechtsmeier > >> wrote: > >>> > >>> From: Stefan Herbrechtsmeier > >>> > >>> Add gzip bintool to binman to support on-the-fly compression of Linux > >>> kernel images and FPGA bitstreams. The SPL basic fitImage implementation > >>> supports only gzip decompression. > >>> > >>> Signed-off-by: Stefan Herbrechtsmeier > >>> > >>> > >>> --- > >>> > >>> (no changes since v5) > >>> > >>> Changes in v5: > >>> - Add algorithm name to entry.py > >>> - Add tool name to ftest.py > >>> > >>> Changes in v2: > >>> - Add commit to add gzip bintool > >>> > >>> tools/binman/btool/gzip.py | 31 +++ > >>> tools/binman/entry.py | 2 +- > >>> tools/binman/ftest.py | 2 +- > >>> 3 files changed, 33 insertions(+), 2 deletions(-) > >>> create mode 100644 tools/binman/btool/gzip.py > >>> > >> > >> Reviewed-by: Simon Glass > > > > Unfortunately this conflicts with the system gzip.py module so I have > > had to rework this a little. > > Should we use bz2, gzip and lzma modules instead of the bintools? We could, but it is harder for people to replicate the behaviour in that case. Also some of those may not be installed. There is no actual ambiguity with the module names, except that pylint gets confused. I don't have strong opinions about this, but however it works needs to be easy for people to fetch tools. Regards, Simon
Re: Please pull u-boot-dm
Hi Stefan, On Mon, 22 Aug 2022 at 00:23, Stefan Herbrechtsmeier wrote: > > Hi Simon, > > Am 21.08.2022 um 03:02 schrieb Simon Glass: > > [snip] > > > create mode 100644 tools/binman/test/235_compress_dtb_prepend_invalid.dts > > create mode 100644 tools/binman/test/235_mkimage_name.dts > > create mode 100644 tools/binman/test/236_compress_dtb_prepend_length.dts > > create mode 100644 tools/binman/test/236_mkimage_image.dts > > create mode 100644 tools/binman/test/237_compress_dtb_invalid.dts > > create mode 100644 tools/binman/test/237_mkimage_image_no_content.dts > > create mode 100644 tools/binman/test/238_compress_dtb_zstd.dts > > create mode 100644 tools/binman/test/238_mkimage_image_bad.dts > > create mode 100644 tools/binman/test/239_collection_other.dts > > create mode 100644 tools/binman/test/240_mkimage_coll.dts > > Should we update the file names to avoid duplicate numbers? Ah yes I forgot to do that. Would you mind sending a patch? It isn't urgent. Regards, Simon
Re: [PATCH] powerpc: remove support for kmtergr1 and MPC8309
On Fri, Aug 19, 2022 at 04:55:06PM +0200, Holger Brunck wrote: > The kmtegr1 board is out of maintenance and can be removed. As it is the > only board in the tree using MPC8309 the support for this CPU is dropped > completely. > > Signed-off-by: Holger Brunck Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] CI: Move to Ubuntu 2022.04 "Jammy" for CI base
On Tue, Aug 09, 2022 at 09:08:54PM -0400, Tom Rini wrote: > - We now have a new enough sbsigntools in the distro, stop building. > - Use the 20220801 tag for Jammy. > - Move to pygit2 1.9.2 (current version) as the old one doesn't build on > "Jammy". > - Add the working directory to the list of safe directories for git. > - Move to pytest 6.2.5 to address other issues. > - This move exposed a number of minor issues in the existing scripts we > used within CI to perform the jobs themselves. The most notable changes > here involve using 'set +e / set -e' to enforce when we should or should > not make non-zero buildman status be a fatal error. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] CI: Azure: Merge PowerPC jobs in to one
On Tue, Aug 09, 2022 at 09:08:52PM -0400, Tom Rini wrote: > At this point given the number of PowerPC platforms we have, a single > job to build them all fits within the time limit we have in Azure. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] arm: Remove warp board
On Wed, Aug 03, 2022 at 12:11:00PM -0400, Tom Rini wrote: > This board is missing migration to CONFIG_DM, which had a deadline of > v2020.01, which is now more than 2 years passed due. Remove it. > > Cc: Otavio Salvador > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] CI: Azure: Further condense jobs
On Tue, Aug 09, 2022 at 09:08:53PM -0400, Tom Rini wrote: > We have a maximum of 10 parallel build jobs, and each job must complete > in less than 60 minutes. The overall run time must also be less than 6 > hours. Condense a number of jobs so that we have less potential > bottlenecks in terms of waiting for a parallel slot to open up for a job > to be run. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Further testing of this patch under different Azure load lead to a lot more jobs taking too long. It's possible that a v2 of this that omits the layerscape parts and the sunxi parts would still work. -- Tom signature.asc Description: PGP signature
[PATCH v2 4/5] verdin-imx8mm: various config additions and improvements
From: Marcel Ziswiler
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Signed-off-by: Marcel Ziswiler
---
(no changes since v1)
configs/verdin-imx8mm_defconfig | 35 +++--
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 336d3245988..9e19c4f063b 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -14,10 +14,14 @@ CONFIG_TARGET_VERDIN_IMX8MM=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_SYS_LOAD_ADDR=0x4828
CONFIG_SYS_MEMTEST_START=0x4000
CONFIG_SYS_MEMTEST_END=0x8000
+CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
@@ -25,7 +29,7 @@ CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile
imx8mm-verdin-${variant}-${fdt_board}.dtb"
CONFIG_LOG=y
@@ -54,20 +58,26 @@ CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_CRC32 is not set
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_READ=y
CONFIG_CMD_USB=y
+CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
+CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
@@ -76,11 +86,13 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USE_ETHPRIME=y
-CONFIG_ETHPRIME="FEC"
+CONFIG_ETHPRIME="eth0"
CONFIG_VERSION_VARIABLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4
CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MM=y
@@ -91,12 +103,21 @@ CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_SPL_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
@@ -106,7 +127,6 @@ CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_DM_PMIC=y
CONFIG_SPL_DM_PMIC_PCA9450=y
-CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
@@ -117,8 +137,11 @@ CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
+CONFIG_IMX_TMU=y
CONFIG_USB=y
-# CONFIG_SPL_DM_USB is not set
CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
CONFIG_IMX_WATCHDOG=y
+CONFIG_HEXDUMP=y
CONFIG_OF_LIBFDT_OVERLAY=y
--
2.35.1
[PATCH v2 1/5] verdin-imx8mm: verdin-imx8mp: update env memory layout
From: Marcel Ziswiler
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus:
- loadaddr=0x4828 allows for 128.5MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 127.5MB : allows for 127.5MB kernel
- scriptaddr = fdt_addr_r + 512KB : allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB : allows for 512KB script
Memory layout taken from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout") but moved loadaddr by an
additional 0.5MB to avoid "Moving Image from 0x4820 to 0x4828"
during booti plus actually defining kernel_comp_size to make booti work.
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Signed-off-by: Marcel Ziswiler
---
Changes in v2:
- Moved loadaddr by an additional 0.5MB to avoid
"Moving Image from 0x4820 to 0x4828" during booti plus
increasing kernel_comp_size by same 0.5MB.
configs/verdin-imx8mm_defconfig | 2 +-
configs/verdin-imx8mp_defconfig | 2 +-
include/configs/verdin-imx8mm.h | 10 ++
include/configs/verdin-imx8mp.h | 10 ++
4 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 275a29bf4f9..336d3245988 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -15,7 +15,7 @@ CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
-CONFIG_SYS_LOAD_ADDR=0x4048
+CONFIG_SYS_LOAD_ADDR=0x4828
CONFIG_SYS_MEMTEST_START=0x4000
CONFIG_SYS_MEMTEST_END=0x8000
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index 0804fbff915..993153267a6 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -21,7 +21,7 @@ CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
-CONFIG_SYS_LOAD_ADDR=0x4350
+CONFIG_SYS_LOAD_ADDR=0x4828
CONFIG_SYS_MEMTEST_START=0x4000
CONFIG_SYS_MEMTEST_END=0x8000
CONFIG_DISTRO_DEFAULTS=y
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 5b5fce9bda1..4d20b86591f 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -20,10 +20,12 @@
#endif
#define MEM_LAYOUT_ENV_SETTINGS \
- "fdt_addr_r=0x4400\0" \
- "kernel_addr_r=0x4200\0" \
- "ramdisk_addr_r=0x4640\0" \
- "scriptaddr=0x4600\0"
+ "fdt_addr_r=0x5020\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_comp_addr_r=0x4020\0" \
+ "kernel_comp_size=0x0808\0" \
+ "ramdisk_addr_r=0x5030\0" \
+ "scriptaddr=0x5028\0"
/* Enable Distro Boot */
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index fca40beba18..9b8db223bb2 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -34,10 +34,12 @@
#endif /* CONFIG_CMD_NET */
#define MEM_LAYOUT_ENV_SETTINGS \
- "fdt_addr_r=0x4300\0" \
- "kernel_addr_r=0x4000\0" \
- "ramdisk_addr_r=0x4640\0" \
- "scriptaddr=0x4600\0"
+ "fdt_addr_r=0x5020\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_comp_addr_r=0x4020\0" \
+ "kernel_comp_size=0x0808\0" \
+ "ramdisk_addr_r=0x5030\0" \
+ "scriptaddr=0x5028\0"
/* Enable Distro Boot */
#define BOOT_TARGET_DEVICES(func) \
--
2.35.1
[PATCH v2 5/5] verdin-imx8mp: various config additions and improvements
From: Marcel Ziswiler - integrate bootcount using SNVS_LP general purpose register LPGPR0 - enable CRC32 and MD5 - enable time commands - enable GPIO LED support - enable further eMMC HS400 functionality - enable fixed PHY and MDIO driver model - enable USB host functionality - enable thermal management unit driver - enable hexdump Signed-off-by: Marcel Ziswiler --- (no changes since v1) configs/verdin-imx8mp_defconfig | 33 + 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 993153267a6..171d6a4c42b 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -18,7 +18,10 @@ CONFIG_TARGET_VERDIN_IMX8MP=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 CONFIG_SPL=y +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800 CONFIG_SYS_LOAD_ADDR=0x4828 @@ -65,7 +68,9 @@ CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set -# CONFIG_CMD_CRC32 is not set +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MD5SUM=y +CONFIG_MD5SUM_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y CONFIG_CMD_FUSE=y @@ -74,12 +79,14 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y CONFIG_CMD_USB=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set -# CONFIG_EFI_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y @@ -97,7 +104,7 @@ CONFIG_SPL_DM=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_ENV=y +CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4 CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y CONFIG_GPIO_HOG=y @@ -106,30 +113,39 @@ CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_DM_ETH_PHY=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PHY_IMX8MQ_USB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y CONFIG_SPL_POWER_LEGACY=y CONFIG_POWER_DOMAIN=y CONFIG_IMX8M_POWER_DOMAIN=y +CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y @@ -141,8 +157,17 @@ CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y CONFIG_USB=y -# CONFIG_SPL_DM_USB is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y CONFIG_IMX_WATCHDOG=y +CONFIG_HEXDUMP=y CONFIG_OF_LIBFDT_OVERLAY=y -- 2.35.1
[PATCH v2 3/5] verdin-imx8mm: improve and extend boot devices
From: Marcel Ziswiler
- Annotate boot devices available in spl_board_boot_device().
- Drop SD3_BOOT/MMC3_BOOT not available for boot on Verdin iMX8M Mini.
Signed-off-by: Marcel Ziswiler
---
(no changes since v1)
board/toradex/verdin-imx8mm/spl.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/board/toradex/verdin-imx8mm/spl.c
b/board/toradex/verdin-imx8mm/spl.c
index 685ac94f4ca..fb9aae6c9c8 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -34,14 +34,11 @@ DECLARE_GLOBAL_DATA_PTR;
int spl_board_boot_device(enum boot_device boot_dev_spl)
{
switch (boot_dev_spl) {
- case MMC1_BOOT:
+ case MMC1_BOOT: /* eMMC */
return BOOT_DEVICE_MMC1;
- case SD2_BOOT:
+ case SD2_BOOT: /* SD card */
case MMC2_BOOT:
return BOOT_DEVICE_MMC2;
- case SD3_BOOT:
- case MMC3_BOOT:
- return BOOT_DEVICE_MMC1;
case USB_BOOT:
return BOOT_DEVICE_BOARD;
default:
@@ -83,7 +80,6 @@ int board_fit_config_name_match(const char *name)
}
#endif
-
__weak void board_early_init(void)
{
init_uart_clk(0);
--
2.35.1
[PATCH v2 2/5] verdin-imx8mm: prepare for optional job ring driver model
From: Marcel Ziswiler
Prepare for optional job ring driver model. Sec may be initialized based
on the job ring information processed from the device tree.
Signed-off-by: Marcel Ziswiler
---
(no changes since v1)
board/toradex/verdin-imx8mm/spl.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/board/toradex/verdin-imx8mm/spl.c
b/board/toradex/verdin-imx8mm/spl.c
index 243c97e0ba0..685ac94f4ca 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -56,6 +56,15 @@ void spl_dram_init(void)
void spl_board_init(void)
{
+ if (IS_ENABLED(CONFIG_FSL_CAAM)) {
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(caam_jr), &dev);
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+ }
+
/* Serial download mode */
if (is_usb_boot()) {
puts("Back to ROM, SDP\n");
--
2.35.1
[PATCH v2 0/5] verdin-imx8mm: verdin-imx8mp: various additions and improvements
From: Marcel Ziswiler Various additions and improvements for the Verdin iMX8M Mini and Verdin iMX8M Plus: - updated env memory layout - verdin-imx8mm: prepare for optional job ring driver model - verdin-imx8mm: improve and extend boot devices - various config additions and improvements Changes in v2: - Moved loadaddr by an additional 0.5MB to avoid "Moving Image from 0x4820 to 0x4828" during booti plus increasing kernel_comp_size by same 0.5MB. Marcel Ziswiler (5): verdin-imx8mm: verdin-imx8mp: update env memory layout verdin-imx8mm: prepare for optional job ring driver model verdin-imx8mm: improve and extend boot devices verdin-imx8mm: various config additions and improvements verdin-imx8mp: various config additions and improvements board/toradex/verdin-imx8mm/spl.c | 17 +- configs/verdin-imx8mm_defconfig | 37 +-- configs/verdin-imx8mp_defconfig | 35 - include/configs/verdin-imx8mm.h | 10 + include/configs/verdin-imx8mp.h | 10 + 5 files changed, 83 insertions(+), 26 deletions(-) -- 2.35.1
[PATCH v1 3/3] board: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki
Signed-off-by: Manoj Sai
Signed-off-by: Matteo Lisi
---
.../imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi | 148 ++
arch/arm/mach-imx/imx8m/Kconfig | 15 +
board/engicam/imx8mp/Kconfig | 15 +
board/engicam/imx8mp/MAINTAINERS |7 +
board/engicam/imx8mp/Makefile | 12 +
board/engicam/imx8mp/icore_mx8mp.c| 73 +
board/engicam/imx8mp/imximage-lpddr4.cfg |8 +
board/engicam/imx8mp/lpddr4_timing.c | 1850 +
board/engicam/imx8mp/spl.c| 152 ++
configs/imx8mp-icore-mx8mp-edimm2.2_defconfig | 112 +
include/configs/imx8mp_evk.h |6 +-
include/configs/imx8mp_icore_mx8mp.h | 64 +
12 files changed, 2458 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi
create mode 100644 board/engicam/imx8mp/Kconfig
create mode 100644 board/engicam/imx8mp/MAINTAINERS
create mode 100644 board/engicam/imx8mp/Makefile
create mode 100644 board/engicam/imx8mp/icore_mx8mp.c
create mode 100644 board/engicam/imx8mp/imximage-lpddr4.cfg
create mode 100644 board/engicam/imx8mp/lpddr4_timing.c
create mode 100644 board/engicam/imx8mp/spl.c
create mode 100644 configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
create mode 100644 include/configs/imx8mp_icore_mx8mp.h
diff --git a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi
b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi
new file mode 100644
index 00..ac4873a21d
--- /dev/null
+++ b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog1>;
+ u-boot,dm-spl;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+®_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <2>;
+};
+
+®_usdhc2_vmmc {
+ u-boot,dm-spl;
+};
+
+&pinctrl_uart2 {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2_gpio {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+ u-boot,dm-spl;
+};
+
+&gpio1 {
+ u-boot,dm-spl;
+};
+
+&gpio2 {
+ u-boot,dm-spl;
+};
+
+&gpio3 {
+ u-boot,dm-spl;
+};
+
+&gpio4 {
+ u-boot,dm-spl;
+};
+
+&gpio5 {
+ u-boot,dm-spl;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+};
+
+&crypto {
+ u-boot,dm-spl;
+};
+
+&sec_jr0 {
+ u-boot,dm-spl;
+};
+
+&sec_jr1 {
+ u-boot,dm-spl;
+};
+
+&sec_jr2 {
+ u-boot,dm-spl;
+};
+
+&i2c1 {
+ u-boot,dm-spl;
+};
+
+&i2c2 {
+ u-boot,dm-spl;
+};
+
+&i2c3 {
+ u-boot,dm-spl;
+};
+
+&i2c4 {
+ u-boot,dm-spl;
+};
+
+&i2c5 {
+ u-boot,dm-spl;
+};
+
+&i2c6 {
+ u-boot,dm-spl;
+};
+
+&usdhc1 {
+ u-boot,dm-spl;
+};
+
+&usdhc2 {
+ u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
+
+&usdhc3 {
+ u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+};
+
+&wdog1 {
+ u-boot,dm-spl;
+};
+
+&eqos {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ðphy0 {
+ reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <15000>;
+ reset-post-delay-us = <10>;
+};
+
+&fec {
+ phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 979b30ae39..3054248ca5 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -160,6 +160,20 @@ config TARGET_IMX8MP_DH_DHCOM_PDK2
select IMX8M_LPDDR4
select SUPPORT_SPL
+config TARGET_IMX8MP_ICORE_MX8MP
+ bool "Engicam i.Core MX8M Plus SOM"
+ select BINMAN
+ select IMX8MP
+ select IMX8M_LPDDR4
+ select SUPPORT_SPL
+ help
+ i.Core MX8M Plus is an EDIMM SOM based on NXP i.MX8MP.
+
+ i.Core MX8M Plus EDIMM2.2:
+ * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
+ * i.Core MX8M Plus needs to mount on top of EDIMM2.2 for
+ creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
+
config TARGET_IMX8MP_EVK
bool "imx8mp LPDDR4 EVK board"
select BINMAN
@@ -279,6 +293,7 @@ source "board/compulab/imx8mm-cl-iot-gate/Kconfig"
source "board/data_modul/imx8mm_edm_sbc/Kconfig"
sou
[PATCH v1 2/3] arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Plus PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP
devicetree file from linux-next tree.
commit (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus
EDIMM2.2 Starter Kit)
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
Signed-off-by: Matteo Lisi
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts | 176 +++
2 files changed, 177 insertions(+)
create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7330121dba..18b2d36ab3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -969,6 +969,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-phanbell.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
+ imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
imx8mp-venice.dtb \
imx8mp-venice-gw74xx.dtb \
diff --git a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts
b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts
new file mode 100644
index 00..8d81b2b986
--- /dev/null
+++ b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+/dts-v1/;
+
+#include "imx8mp.dtsi"
+#include "imx8mp-icore-mx8mp.dtsi"
+#include
+
+/ {
+ model = "Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit";
+ compatible = "engicam,icore-mx8mp-edimm2.2", "engicam,icore-mx8mp",
+"fsl,imx8mp";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ reg_usb1_vbus: regulator-usb1 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usb1>;
+ regulator-max-microvolt = <500>;
+ regulator-min-microvolt = <500>;
+ regulator-name = "usb1_host_vbus";
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+ regulator-max-microvolt = <330>;
+ regulator-min-microvolt = <330>;
+ regulator-name = "VSD_3V3";
+ };
+};
+
+/* Ethernet */
+&eqos {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eqos>;
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ micrel,led-mode = <0>;
+ reg = <7>;
+ };
+ };
+};
+
+/* console */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&usb3_phy0 {
+ status = "okay";
+};
+
+&usb3_0 {
+ status = "okay";
+};
+
+&usb_dwc3_0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb3_phy1 {
+ status = "okay";
+};
+
+&usb3_1 {
+ status = "okay";
+};
+
+&usb_dwc3_1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+/* SDCARD */
+&usdhc2 {
+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+ bus-width = <4>;
+ no-1-8-v;
+ pinctrl-names = "default" ;
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ vmmc-supply = <®_usdhc2_vmmc>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC
0x2
+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO
0x2
+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0
0x90
+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1
0x90
+ MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2
0x90
+ MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3
0x90
+
MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
+ MX8MP_IO
[PATCH v1 1/3] arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam.
General features:
- NXP i.MX8M Plus
- Up to 4GB LDDR4
- 8 eMMC
- Gigabit Ethernet
- USB 3.0, 2.0 Host/OTG
- PCIe 3.0 interface
- I2S
- LVDS
- rest of i.MX8M Plus features
i.Core MX8M Plus needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam devicetree file from linux-next tree.
commit (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM)
Signed-off-by: Manoj Sai
Signed-off-by: Signed-off-by: Jagan Teki
Signed-off-by: Matteo Lisi
---
arch/arm/dts/imx8mp-icore-mx8mp.dtsi | 186 +++
1 file changed, 186 insertions(+)
create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp.dtsi
diff --git a/arch/arm/dts/imx8mp-icore-mx8mp.dtsi
b/arch/arm/dts/imx8mp-icore-mx8mp.dtsi
new file mode 100644
index 00..5116079cce
--- /dev/null
+++ b/arch/arm/dts/imx8mp-icore-mx8mp.dtsi
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+/ {
+ compatible = "engicam,icore-mx8mp", "fsl,imx8mp";
+};
+
+&A53_0 {
+ cpu-supply = <&buck2>;
+};
+
+&A53_1 {
+ cpu-supply = <&buck2>;
+};
+
+&A53_2 {
+ cpu-supply = <&buck2>;
+};
+
+&A53_3 {
+ cpu-supply = <&buck2>;
+};
+
+&i2c1 {
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ pca9450: pmic@25 {
+ compatible = "nxp,pca9450c";
+ interrupt-parent = <&gpio3>;
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pmic>;
+ reg = <0x25>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <72>;
+ regulator-max-microvolt = <100>;
+ regulator-name = "BUCK1";
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ nxp,dvs-run-voltage = <95>;
+ nxp,dvs-standby-voltage = <85>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1025000>;
+ regulator-min-microvolt = <72>;
+ regulator-name = "BUCK2";
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <360>;
+ regulator-min-microvolt = <300>;
+ regulator-name = "BUCK4";
+ };
+
+ buck5: BUCK5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <195>;
+ regulator-min-microvolt = <165>;
+ regulator-name = "BUCK5";
+ };
+
+ buck6: BUCK6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1155000>;
+ regulator-min-microvolt = <1045000>;
+ regulator-name = "BUCK6";
+ };
+
+ ldo1: LDO1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <195>;
+ regulator-min-microvolt = <165>;
+ regulator-name = "LDO1";
+ };
+
+ ldo3: LDO3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <189>;
+ regulator-min-microvolt = <171>;
+ regulator-name = "LDO3";
+ };
+
+ ldo5: LDO5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <330>;
+ regulator-m
[PATCH v1 0/3] This series adds U-boot bootloader support for
Patch 1/3 adds dts support for Engicam i.Core MX8M Plus SoM Patch 2/3 adds dts support for Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit Patch 3/3 adds board and configs related support for Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit Manoj Sai (3): arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit board: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit arch/arm/dts/Makefile |1 + .../imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi | 148 ++ arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts | 176 ++ arch/arm/dts/imx8mp-icore-mx8mp.dtsi | 186 ++ arch/arm/mach-imx/imx8m/Kconfig | 15 + board/engicam/imx8mp/Kconfig | 15 + board/engicam/imx8mp/MAINTAINERS |7 + board/engicam/imx8mp/Makefile | 12 + board/engicam/imx8mp/icore_mx8mp.c| 73 + board/engicam/imx8mp/imximage-lpddr4.cfg |8 + board/engicam/imx8mp/lpddr4_timing.c | 1850 + board/engicam/imx8mp/spl.c| 152 ++ configs/imx8mp-icore-mx8mp-edimm2.2_defconfig | 112 + include/configs/imx8mp_evk.h |6 +- include/configs/imx8mp_icore_mx8mp.h | 64 + 15 files changed, 2821 insertions(+), 4 deletions(-) create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2.dts create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp.dtsi create mode 100644 board/engicam/imx8mp/Kconfig create mode 100644 board/engicam/imx8mp/MAINTAINERS create mode 100644 board/engicam/imx8mp/Makefile create mode 100644 board/engicam/imx8mp/icore_mx8mp.c create mode 100644 board/engicam/imx8mp/imximage-lpddr4.cfg create mode 100644 board/engicam/imx8mp/lpddr4_timing.c create mode 100644 board/engicam/imx8mp/spl.c create mode 100644 configs/imx8mp-icore-mx8mp-edimm2.2_defconfig create mode 100644 include/configs/imx8mp_icore_mx8mp.h -- 2.25.1
Re: [PATCH 3/5] net: tftp: add IPv6 support for tftpboot
On Fri, 2022-08-19 at 21:01 +0300, Ramon Fried wrote: > > On Fri, Aug 19, 2022 at 2:30 PM Vyacheslav Mitrofanov V > wrote: > > On Fri, 2022-08-19 at 14:00 +0300, Ramon Fried wrote: > > > On Fri, Aug 19, 2022 at 11:10 AM Viacheslav Mitrofanov > > > wrote: > > > > The command tftpboot uses IPv4 by default, to use IPv6 instead > > > > add > > > > -ipv6 > > > > as the last argument. All other tftpboot features and > > > > parameters > > > > are left > > > > the same. > > > > > > > In my opinion, we should be able to detect if a user has provided > > > or > > > set an IPv6 server IP address and only use IPv6 then. > > I tried to save tftboot semantics. I mean if we set -ipv6 option > > the > > command will check server address in args if it is empty check > > environmental variable and if it is not set then terminate it. It > > works > > the same way as it works now. If I didn't get you, please, clarify > > it a > > little bit more. > > Thanks! > What I meant is that if you can distinguish IPv6 address from just > parsing the address itself. > Perhaps the -ipv6 is redundant. It is not a problem to add a parser, I'll do that. I thought that suffix can be useful if we use short command notation as an example just 'tftpboot'. In that case it uses IPv4 but if add suffix it will use IPv6. Or I can remove suffix at all and use an environment variable for example 'use_ip6' to determine protocol. What do you think?! Thanks!
Re: [PATCH v4] imx: add i.MX8MN DDR3L evk board support
Hi Heiko
Did you solve it after your patch on regulator?
Michael
On Sun, Jun 19, 2022 at 4:54 PM Heiko Thiery wrote:
>
> Hi,
>
> Am So., 19. Juni 2022 um 16:51 Uhr schrieb Michael Nazzareno Trimarchi
> :
> >
> > Hi
> >
> > Il dom 19 giu 2022, 16:47 Heiko Thiery ha scritto:
> >>
> >> Hi,
> >>
> >> Am So., 19. Juni 2022 um 16:40 Uhr schrieb Michael Nazzareno Trimarchi
> >> :
> >> >
> >> > Hi Heiko
> >> >
> >> > On Sun, Jun 19, 2022 at 8:12 AM Heiko Thiery
> >> > wrote:
> >> > >
> >> > > Hi,
> >> > >
> >> > > Am So., 19. Juni 2022 um 07:59 Uhr schrieb Michael Nazzareno Trimarchi
> >> > > :
> >> > > >
> >> > > > Hi
> >> > > >
> >> > > > Il sab 18 giu 2022, 23:56 Heiko Thiery ha
> >> > > > scritto:
> >> > > >>
> >> > > >> Hi Michael, Hi Marek,
> >> > > >>
> >> > > >> Am Mi., 15. Juni 2022 um 08:43 Uhr schrieb Michael Nazzareno
> >> > > >> Trimarchi
> >> > > >> :
> >> > > >> >
> >> > > >> > Hi Heiko
> >> > > >> >
> >> > > >> > On Wed, Jun 15, 2022 at 8:23 AM Heiko Thiery
> >> > > >> > wrote:
> >> > > >> > >
> >> > > >> > > Hi Marek,
> >> > > >> > >
> >> > > >> > > [SNIP]
> >> > > >> > >
> >> > > >> > > > > diff --git a/board/freescale/imx8mn_evk/spl.c
> >> > > >> > > > > b/board/freescale/imx8mn_evk/spl.c
> >> > > >> > > > > index 14cb51368f..0d9909a662 100644
> >> > > >> > > > > --- a/board/freescale/imx8mn_evk/spl.c
> >> > > >> > > > > +++ b/board/freescale/imx8mn_evk/spl.c
> >> > > >> > > > > @@ -83,6 +83,15 @@ int power_init_board(void)
> >> > > >> > > > > #ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
> >> > > >> > > > > /* Set VDD_SOC/VDD_DRAM to 0.8v for low drive mode
> >> > > >> > > > > */
> >> > > >> > > > > pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10);
> >> > > >> > > > > +#elif defined(CONFIG_TARGET_IMX8MN_DDR3L_EVK)
> >> > > >> > > > > + /* Set VDD_SOC to 0.85v for DDR3L at 1600MTS */
> >> > > >> > > > > + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
> >> > > >> > > > > +
> >> > > >> > > > > + /* Disable the BUCK2 */
> >> > > >> > > > > + pmic_reg_write(dev, PCA9450_BUCK2CTRL, 0x48);
> >> > > >> > > > > +
> >> > > >> > > > > + /* Set NVCC_DRAM to 1.35v */
> >> > > >> > > > > + pmic_reg_write(dev, PCA9450_BUCK6OUT, 0x1E);
> >> > > >> > > > > #else
> >> > > >> > > >
> >> > > >> > > > All this part is not done by the spl pmic driver?
> >> > > >> > >
> >> > > >> > > I saw that you added the PCA9450 driver. Do you know if this
> >> > > >> > > initialization can be done by the driver when
> >> > > >> > > CONFIG_SPL_DM_REGULATOR
> >> > > >> > > is enabled? If I see this correctly, it can't be done. Is that
> >> > > >> > > correct?
> >> > > >> >
> >> > > >> > +&i2c1 {
> >> > > >> > + u-boot,dm-spl;
> >> > > >> > +};
> >> > > >> > +
> >> > > >> > +&{/soc@0/bus@3080/i2c@30a2/pmic@4b} {
> >> > > >> > + u-boot,dm-spl;
> >> > > >> > +};
> >> > > >> > +
> >> > > >> > +&{/soc@0/bus@3080/i2c@30a2/pmic@4b/regulators} {
> >> > > >> > + u-boot,dm-spl;
> >> > > >> > +};
> >> > > >> > +
> >> > > >> > +&pinctrl_i2c1 {
> >> > > >> > + u-boot,dm-spl;
> >> > > >> > +};
> >> > > >> > +
> >> > > >> > +&pinctrl_pmic {
> >> > > >> > + u-boot,dm-spl;
> >> > > >> > +};
> >> > > >> > +
> >> > > >> >
> >> > > >> > Maybe something like this should work. Now question is about
> >> > > >> > should be
> >> > > >> > done in pre-reloc or not
> >> > > >>
> >> > > >> It took me a little while to understand what was meant by this. In
> >> > > >> the
> >> > > >> meantime I could
> >> > > >> change the PMIC/Regulator initialization to DT/DM and can make the
> >> > > >> setting so.
> >> > > >> What is not clear to me yet is at which point this should be done
> >> > > >> (regulators_enable_boot_on()). Currently I do it in the board/spl
> >> > > >> specific board_init_f().
> >> > > >>
> >> > > >> Do any of you have any advice here?
> >> > > >
> >> > > >
> >> > > > After having a discussion with you, i found that maybe i have some
> >> > > > problem and some of the setting should be done before ddr
> >> > > > inizialization. I will take a look on it on afternoon. I know marek
> >> > > > was working on some way to probe driver during binding and we need
> >> > > > even to be sure that this can happen before memory training.
> >> > > >
> >> > >
> >> > > Currently I added it in board_init_f() right before spl_dram_init()
> >> > > [1] and it works. I also tried to put it in power_init_board() [2] but
> >> > > this does not work.
> >> > >
> >> > > [1]
> >> > > https://elixir.bootlin.com/u-boot/v2022.04/source/board/freescale/imx8mn_evk/spl.c#L162
> >> > > [2]
> >> > > https://elixir.bootlin.com/u-boot/v2022.04/source/board/freescale/imx8mn_evk/spl.c#L62
> >> >
> >> > Does it work if you mark pre-reoloc, pmic, i2c, and pinctrl?
> >>
> >> I added on all nodes the u-boot,dm-pre-reloc but this does not help
> >> when trying to do the init in power_init_board().
> >
> >
> > From code I navigate spl_early_init should bind the driver in
Re: [PATCH] pmic: pca9450: permit config on all bucks and LDOs
Hi Heiko
On Tue, Jul 26, 2022 at 10:20 AM Jaehoon Chung wrote:
>
> On 6/20/22 12:49, Heiko Thiery wrote:
> > In order to have the possibility to configure the regulators at system
> > startup through DM support, all LDOs and bucks must be able to be
> > changeable. Currently there is a limitation to change the values when
> > the output is enabled. Since the driver is based on the ROHM BD71837 and a
> > comment that describes a limitation about switching while the output is
> > enabled can also be found there, the limitation probably comes from this
> > type.
> >
> > Signed-off-by: Heiko Thiery
> > Reviewed-by: Fabio Estevam
>
> Reviewed-by: Jaehoon Chung
>
I think that this can be valid even for bd71837. Are you agree?
Michael
> Best Regards,
> Jaehoon Chung
>
> > ---
> > drivers/power/regulator/pca9450.c | 42 ++-
> > 1 file changed, 13 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/power/regulator/pca9450.c
> > b/drivers/power/regulator/pca9450.c
> > index 23badaa332..fe1869397c 100644
> > --- a/drivers/power/regulator/pca9450.c
> > +++ b/drivers/power/regulator/pca9450.c
> > @@ -44,7 +44,6 @@ struct pca9450_vrange {
> > * @ranges: pointer to ranges of regulator voltages and matching register
> > * values
> > * @numranges: number of voltage ranges pointed by ranges
> > - * @dvs: whether the voltage can be changed when regulator is enabled
> > */
> > struct pca9450_plat {
> > const char *name;
> > @@ -54,7 +53,6 @@ struct pca9450_plat {
> > u8 volt_mask;
> > struct pca9450_vrange *ranges;
> > unsigned intnumranges;
> > - booldvs;
> > };
> >
> > #define PCA_RANGE(_min, _vstep, _sel_low, _sel_hi) \
> > @@ -63,11 +61,11 @@ struct pca9450_plat {
> > .min_sel = (_sel_low), .max_sel = (_sel_hi), \
> > }
> >
> > -#define PCA_DATA(_name, enreg, enmask, vreg, vmask, _range, _dvs) \
> > +#define PCA_DATA(_name, enreg, enmask, vreg, vmask, _range) \
> > { \
> > .name = (_name), .enable_reg = (enreg), .enablemask = (enmask), \
> > .volt_reg = (vreg), .volt_mask = (vmask), .ranges = (_range), \
> > - .numranges = ARRAY_SIZE(_range), .dvs = (_dvs), \
> > + .numranges = ARRAY_SIZE(_range) \
> > }
> >
> > static struct pca9450_vrange pca9450_buck123_vranges[] = {
> > @@ -107,39 +105,39 @@ static struct pca9450_plat pca9450_reg_data[] = {
> > /* Bucks 1-3 which support dynamic voltage scaling */
> > PCA_DATA("BUCK1", PCA9450_BUCK1CTRL, HW_STATE_CONTROL,
> >PCA9450_BUCK1OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
> > - pca9450_buck123_vranges, true),
> > + pca9450_buck123_vranges),
> > PCA_DATA("BUCK2", PCA9450_BUCK2CTRL, HW_STATE_CONTROL,
> >PCA9450_BUCK2OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
> > - pca9450_buck123_vranges, true),
> > + pca9450_buck123_vranges),
> > PCA_DATA("BUCK3", PCA9450_BUCK3CTRL, HW_STATE_CONTROL,
> >PCA9450_BUCK3OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
> > - pca9450_buck123_vranges, true),
> > + pca9450_buck123_vranges),
> > /* Bucks 4-6 which do not support dynamic voltage scaling */
> > PCA_DATA("BUCK4", PCA9450_BUCK4CTRL, HW_STATE_CONTROL,
> >PCA9450_BUCK4OUT, PCA9450_DVS_BUCK_RUN_MASK,
> > - pca9450_buck456_vranges, false),
> > + pca9450_buck456_vranges),
> > PCA_DATA("BUCK5", PCA9450_BUCK5CTRL, HW_STATE_CONTROL,
> >PCA9450_BUCK5OUT, PCA9450_DVS_BUCK_RUN_MASK,
> > - pca9450_buck456_vranges, false),
> > + pca9450_buck456_vranges),
> > PCA_DATA("BUCK6", PCA9450_BUCK6CTRL, HW_STATE_CONTROL,
> >PCA9450_BUCK6OUT, PCA9450_DVS_BUCK_RUN_MASK,
> > - pca9450_buck456_vranges, false),
> > + pca9450_buck456_vranges),
> > /* LDOs */
> > PCA_DATA("LDO1", PCA9450_LDO1CTRL, HW_STATE_CONTROL,
> >PCA9450_LDO1CTRL, PCA9450_LDO12_MASK,
> > - pca9450_ldo1_vranges, false),
> > + pca9450_ldo1_vranges),
> > PCA_DATA("LDO2", PCA9450_LDO2CTRL, HW_STATE_CONTROL,
> >PCA9450_LDO2CTRL, PCA9450_LDO12_MASK,
> > - pca9450_ldo2_vranges, false),
> > + pca9450_ldo2_vranges),
> > PCA_DATA("LDO3", PCA9450_LDO3CTRL, HW_STATE_CONTROL,
> >PCA9450_LDO3CTRL, PCA9450_LDO34_MASK,
> > - pca9450_ldo34_vranges, false),
> > + pca9450_ldo34_vranges),
> > PCA_DATA("LDO4", PCA9450_LDO4CTRL, HW_STATE_CONTROL,
> >PCA9450_LDO4CTRL, PCA9450_LDO34_MASK,
> > - pca9450_ldo34_vranges, false),
> > + pca9450_ldo34_vranges),
> > PCA_DATA("LDO5", PCA9450_LDO5CTRL_H, HW_STATE_CONTROL,
> >PCA9450_LDO5CTRL_H, PCA9450_LDO5_MASK,
> > - pca9450_ldo
[PATCH] board: bsh: Update imx8mn ddr3l timing according to BSH hw team
Signed-off-by: Michael Trimarchi
---
board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c | 23 -
board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c | 23 -
2 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
b/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
index 0da641834d..33452d2ad5 100644
--- a/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
+++ b/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
@@ -18,15 +18,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d40, 0xa1040001 },
- { 0x3d400064, 0x610040 },
+ { 0x3d400064, 0x300040 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d74 },
- { 0x3d4000e0, 0x18 },
+ { 0x3d4000e0, 0x58 },
{ 0x3d4000e4, 0x9 },
- { 0x3d4000f0, 0x0 },
+ { 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
- { 0x3d400100, 0xc101b0e },
+ { 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@@ -67,10 +67,10 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400498, 0x7ff },
{ 0x3d40049c, 0xe00 },
{ 0x3d4004a0, 0x7ff },
- { 0x3d402064, 0x28001b },
+ { 0x3d402064, 0x14001b },
{ 0x3d4020dc, 0x1224 },
- { 0x3d4020e0, 0x0 },
- { 0x3d402100, 0x7090b07 },
+ { 0x3d4020e0, 0x40 },
+ { 0x3d402100, 0x7090507 },
{ 0x3d402104, 0x20209 },
{ 0x3d402108, 0x3030407 },
{ 0x3d40210c, 0x2006 },
@@ -680,12 +680,13 @@ struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x31f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1d70 },
{ 0x54030, 0x4 },
- { 0x54031, 0x18 },
+ { 0x54031, 0x58 },
{ 0x5403a, 0x1323 },
{ 0xd, 0x1 },
};
@@ -700,11 +701,13 @@ struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1220 },
{ 0x54030, 0x4 },
+ { 0x54031, 0x40 },
{ 0x5403a, 0x1323 },
{ 0xd, 0x1 },
};
@@ -886,11 +889,11 @@ struct dram_cfg_param ddr_phy_pie[] = {
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
{ 0x90026, 0x2b },
- { 0x2000b, 0x32 },
+ { 0x2000b, 0x1c2 },
{ 0x2000c, 0x64 },
{ 0x2000d, 0x3e8 },
{ 0x2000e, 0x2c },
- { 0x12000b, 0x14 },
+ { 0x12000b, 0xbb },
{ 0x12000c, 0x26 },
{ 0x12000d, 0x1a1 },
{ 0x12000e, 0x10 },
diff --git a/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
b/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
index f845395ad9..6f3e49ff9c 100644
--- a/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
+++ b/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
@@ -18,15 +18,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d40, 0xa1040001 },
- { 0x3d400064, 0x610068 },
+ { 0x3d400064, 0x300068 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d74 },
- { 0x3d4000e0, 0x18 },
+ { 0x3d4000e0, 0x58 },
{ 0x3d4000e4, 0x9 },
- { 0x3d4000f0, 0x0 },
+ { 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
- { 0x3d400100, 0xc101b0e },
+ { 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@@ -67,10 +67,10 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400498, 0x7ff },
{ 0x3d40049c, 0xe00 },
{ 0x3d4004a0, 0x7ff },
- { 0x3d402064, 0x28003c },
+ { 0x3d402064, 0x14002c },
{ 0x3d4020dc, 0x1224 },
- { 0x3d4020e0, 0x0 },
- { 0x3d402100, 0x7090b07 },
+ { 0x3d4020e0, 0x40 },
+ { 0x3d402100, 0x7090507 },
{ 0x3d402104, 0x20209 },
{ 0x3d402108, 0x3030407 },
{ 0x3d40210c, 0x2006 },
@@ -680,12 +680,13 @@ struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x31f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1d70 },
{ 0x54030, 0x4 },
- { 0x54031, 0x18 },
+ { 0x54031, 0x58 },
{ 0x5403a, 0x1323 },
{ 0xd, 0x1 },
};
@@ -700,11 +701,13 @@ struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 }
Re: [PATCH] drivers: usb: fastboot: Fix full-speed usb descriptor
On Mon, Aug 22, 2022 at 09:18:31AM +0800, qianfangui...@163.com wrote:
> From: qianfan Zhao
>
> The host will report such error message if the fastboot device work in
> full-speed mode: "Duplicate descriptor for config 1 interface 0
> altsetting 0, skipping"
>
> Fastboot device ack both full and high speed interface descriptors when
> work in full-speed mode, that's will cause this issue.
>
> Fix it.
>
> Signed-off-by: qianfan Zhao
Reviewed-by: John Keeping
> ---
> drivers/usb/gadget/f_fastboot.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
> index 8ba55aab9f..d0e92c7a07 100644
> --- a/drivers/usb/gadget/f_fastboot.c
> +++ b/drivers/usb/gadget/f_fastboot.c
> @@ -119,6 +119,7 @@ static struct usb_descriptor_header *fb_fs_function[] = {
> (struct usb_descriptor_header *)&interface_desc,
> (struct usb_descriptor_header *)&fs_ep_in,
> (struct usb_descriptor_header *)&fs_ep_out,
> + NULL,
> };
>
> static struct usb_descriptor_header *fb_hs_function[] = {
> --
> 2.25.1
>
Re: [PATCH 0/5] Another smaller update to the nand stack
On Thu, Jul 28, 2022 at 7:17 PM Michael Trimarchi wrote: > > Update the stack to move it slowly to linux with some improvements. > We want to support more samsung variant and clean up a bit the code. > This will be the last upstream changes for now until a quick review > of spl code will be done to reduce duplication. I decided to move the > imx8mn_bsh_smm_s2 board to use the full nand detect because onfi can > easily fail on no-onfi, no-jedec nand. I take care to move the mt7621 > to use nand_detect and ask gently to test it again > > Series successfully tested on imx8mn bsh smm s2 with NAND: > - Macronix MX30LF4G18AC > 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 > > Michael Trimarchi (5): > mtd: nand: Rename the nand_manufacturers struct > mtd: nand: change return type of nand_get_flash_type() to int > mtd: nand: Rename nand_get_flash_type() into nand_detect() > mtd: nand: samsung: Retrieve ECC requirements from extended > configs: imx8mn_bsh_smm_s2: Use nand_base ident for nand > identification > > configs/imx8mn_bsh_smm_s2_defconfig | 2 ++ > drivers/mtd/nand/raw/mt7621_nand.c | 9 --- > drivers/mtd/nand/raw/mxs_nand_spl.c | 8 +++ > drivers/mtd/nand/raw/nand_base.c| 37 + > drivers/mtd/nand/raw/nand_ids.c | 2 +- > drivers/mtd/nand/raw/nand_samsung.c | 20 > include/linux/mtd/rawnand.h | 13 +- > 7 files changed, 54 insertions(+), 37 deletions(-) > > -- > 2.34.1 > Applied thanks -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 mich...@amarulasolutions.com __ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 i...@amarulasolutions.com www.amarulasolutions.com
Re: [PATCH] mtd: rawnand: fsl_elbc: Remove NAND_NO_SUBPAGE_WRITE flag
On Tue, Aug 16, 2022 at 10:33 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> Il lun 15 ago 2022, 23:55 Pali Rohár ha scritto:
>>
>> On Monday 15 August 2022 23:49:17 Michael Nazzareno Trimarchi wrote:
>> > Hi
>> >
>> > Il lun 15 ago 2022, 10:01 Pali Rohár ha scritto:
>> >
>> > > Subpage write support for freescale eLBC NAND controller driver is
>> > > implemented in U-Boot and was fixes in the commit d3963721d93f ("nand:
>> > > Sync
>> > > with Linux v4.1").
>> > >
>> > > So remove NAND_NO_SUBPAGE_WRITE flag from the fsl_elbc_nand.c driver.
>> > > This
>> > > partially revert commit cb04c7723429 ("nand/fsl: add
>> > > NAND_NO_SUBPAGE_WRITE
>> > > to eLBC and IFC drivers"), only eLBC driver part.
>> > >
>> > > With this change U-Boot with default settings can read from NAND UBIFS
>> > > image created on Linux with Linux default settings. Prior this change
>> > > U-Boot was unable to read from NAND UBIFS images created with Linux
>> > > default
>> > > settings due to differnet UBI geometry.
>> > >
>> > > Linux kernel fsl_elbc_nand.c driver also does not set
>> > > NAND_NO_SUBPAGE_WRITE
>> > > flag and has implemented subpage write support.
>> > >
>> > > Fixes: cb04c7723429 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC
>> > > drivers")
>> > > Fixes: d3963721d93f ("nand: Sync with Linux v4.1")
>> > > Signed-off-by: Pali Rohár
>> > > ---
>> > > See also email thread:
>> > > https://lore.kernel.org/u-boot/20220807120027.2zz43afbqtqljhul@pali/t/#u
>> > > ---
>> > > drivers/mtd/nand/raw/fsl_elbc_nand.c | 1 -
>> > > 1 file changed, 1 deletion(-)
>> > >
>> > > diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c
>> > > b/drivers/mtd/nand/raw/fsl_elbc_nand.c
>> > > index 48a3687f2728..e28670a4724a 100644
>> > > --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
>> > > +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
>> > > @@ -732,7 +732,6 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr,
>> > > struct udevice *dev)
>> > > nand->bbt_md = &bbt_mirror_descr;
>> > >
>> > > /* set up nand options */
>> > > - nand->options = NAND_NO_SUBPAGE_WRITE;
>> > > nand->bbt_options = NAND_BBT_USE_FLASH;
>> > >
>> > > nand->controller = &elbc_ctrl->controller;
>> > >
>> >
>> > Reviewed-by: Michael Trimarchi
>> >
>> > I was following the thread. Please confirm that you was able to test
>>
>> Yes, I have tested this change on P2020 based board Turris 1.1. And
>> finally U-Boot by default was able to access UBI created by mainline
>> Linux with default parameters, just by calling 'ubi part rootfs'.
>> UBI created by sub-page of size 2048 can be still also read by U-Boot by
>> calling 'ubi part rootfs 2048'. For this purpose I already provided
>> distroboot patch to easily specify UBI header offset (which is by
>> default sub-page size):
>> https://lore.kernel.org/u-boot/20220807190422.20157-1-p...@kernel.org/
>
>
>
> Acked-By: Michael Trimarchi
>
> I will send pull request tomorrow to Tom
>
Applied thanks
> Michael
>>
>>
>>
>> > Michael
>> >
>> > > --
>> > > 2.20.1
>> > >
>> > >
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH] mtd: rawnand: fsl_elbc: Fix reading address pointer from DT
On Mon, Aug 22, 2022 at 11:06 AM Dario Binacchi
wrote:
>
> Hi Pali
>
> On Fri, Aug 19, 2022 at 11:20 AM Pali Rohár wrote:
> >
> > During compilation gcc throws warning:
> >
> > drivers/mtd/nand/raw/fsl_elbc_nand.c: In function ‘fsl_elbc_nand_probe’:
> > drivers/mtd/nand/raw/fsl_elbc_nand.c:841:31: warning: cast to pointer
> > from integer of different size [-Wint-to-pointer-cast]
> > return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev);
> >^
> >
> > Fix it by using dev_read_addr_ptr() function which returns pointer instead
> > of dev_read_addr() which returns integer type.
> >
> > Signed-off-by: Pali Rohár
> > ---
> > drivers/mtd/nand/raw/fsl_elbc_nand.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c
> > b/drivers/mtd/nand/raw/fsl_elbc_nand.c
> > index 48a3687f2728..4a07cf854fff 100644
> > --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
> > +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
> > @@ -839,7 +839,7 @@ void board_nand_init(void)
> >
> > static int fsl_elbc_nand_probe(struct udevice *dev)
> > {
> > - return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev);
> > + return fsl_elbc_chip_init(0, dev_read_addr_ptr(dev), dev);
> > }
> >
> > static const struct udevice_id fsl_elbc_nand_dt_ids[] = {
> > --
> > 2.20.1
> >
>
> Reviewed-by: Dario Binacchi
>
Applied thanks
> Thanks and regards,
> Dario
> --
>
> Dario Binacchi
>
> Embedded Linux Developer
>
> dario.binac...@amarulasolutions.com
>
> __
>
>
> Amarula Solutions SRL
>
> Via Le Canevare 30, 31100 Treviso, Veneto, IT
>
> T. +39 042 243 5310
> i...@amarulasolutions.com
>
> www.amarulasolutions.com
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
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Re: [PATCH v1 1/3] arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM
On Mon, Aug 22, 2022 at 2:40 PM Michael Nazzareno Trimarchi wrote: > > Hi > > On Mon, Aug 22, 2022 at 11:07 AM Manoj Sai > wrote: > > > > i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus > > from Engicam. > > > > General features: > > - NXP i.MX8M Plus > > - Up to 4GB LDDR4 > > - 8 eMMC > > - Gigabit Ethernet > > - USB 3.0, 2.0 Host/OTG > > - PCIe 3.0 interface > > - I2S > > - LVDS > > - rest of i.MX8M Plus features > > > > i.Core MX8M Plus needs to mount on top of Engicam baseboards > > for creating complete platform solutions. > > > > Add support for it. > > > > Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus > > from Engicam devicetree file from linux-next tree. > > commit (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus > > SoM) > > > > Signed-off-by: Manoj Sai > > Signed-off-by: Signed-off-by: Jagan Teki > > Please double check before send > > > Signed-off-by: Matteo Lisi > > --- > > arch/arm/dts/imx8mp-icore-mx8mp.dtsi | 186 +++ > > 1 file changed, 186 insertions(+) > > create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp.dtsi > > > > diff --git a/arch/arm/dts/imx8mp-icore-mx8mp.dtsi > > b/arch/arm/dts/imx8mp-icore-mx8mp.dtsi > > new file mode 100644 > > index 00..5116079cce > > --- /dev/null > > +++ b/arch/arm/dts/imx8mp-icore-mx8mp.dtsi > > @@ -0,0 +1,186 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > +/* > > + * Copyright (c) 2018 NXP > > + * Copyright (c) 2019 Engicam srl > > + * Copyright (c) 2020 Amarula Solutons(India) > > Again Look like it's my bad. Will fix it on Linux. Thanks, Jagan
Re: [PATCH v1 1/3] arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM
Hi
On Mon, Aug 22, 2022 at 11:07 AM Manoj Sai
wrote:
>
> i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
> from Engicam.
>
> General features:
> - NXP i.MX8M Plus
> - Up to 4GB LDDR4
> - 8 eMMC
> - Gigabit Ethernet
> - USB 3.0, 2.0 Host/OTG
> - PCIe 3.0 interface
> - I2S
> - LVDS
> - rest of i.MX8M Plus features
>
> i.Core MX8M Plus needs to mount on top of Engicam baseboards
> for creating complete platform solutions.
>
> Add support for it.
>
> Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
> from Engicam devicetree file from linux-next tree.
> commit (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM)
>
> Signed-off-by: Manoj Sai
> Signed-off-by: Signed-off-by: Jagan Teki
Please double check before send
> Signed-off-by: Matteo Lisi
> ---
> arch/arm/dts/imx8mp-icore-mx8mp.dtsi | 186 +++
> 1 file changed, 186 insertions(+)
> create mode 100644 arch/arm/dts/imx8mp-icore-mx8mp.dtsi
>
> diff --git a/arch/arm/dts/imx8mp-icore-mx8mp.dtsi
> b/arch/arm/dts/imx8mp-icore-mx8mp.dtsi
> new file mode 100644
> index 00..5116079cce
> --- /dev/null
> +++ b/arch/arm/dts/imx8mp-icore-mx8mp.dtsi
> @@ -0,0 +1,186 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2018 NXP
> + * Copyright (c) 2019 Engicam srl
> + * Copyright (c) 2020 Amarula Solutons(India)
Again
> + */
> +
> +/ {
> + compatible = "engicam,icore-mx8mp", "fsl,imx8mp";
> +};
> +
> +&A53_0 {
> + cpu-supply = <&buck2>;
> +};
> +
> +&A53_1 {
> + cpu-supply = <&buck2>;
> +};
> +
> +&A53_2 {
> + cpu-supply = <&buck2>;
> +};
> +
> +&A53_3 {
> + cpu-supply = <&buck2>;
> +};
> +
> +&i2c1 {
> + clock-frequency = <10>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +
> + pca9450: pmic@25 {
> + compatible = "nxp,pca9450c";
> + interrupt-parent = <&gpio3>;
> + interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pmic>;
> + reg = <0x25>;
> +
> + regulators {
> + buck1: BUCK1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <72>;
> + regulator-max-microvolt = <100>;
> + regulator-name = "BUCK1";
> + regulator-ramp-delay = <3125>;
> + };
> +
> + buck2: BUCK2 {
> + nxp,dvs-run-voltage = <95>;
> + nxp,dvs-standby-voltage = <85>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1025000>;
> + regulator-min-microvolt = <72>;
> + regulator-name = "BUCK2";
> + regulator-ramp-delay = <3125>;
> + };
> +
> + buck4: BUCK4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <360>;
> + regulator-min-microvolt = <300>;
> + regulator-name = "BUCK4";
> + };
> +
> + buck5: BUCK5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <195>;
> + regulator-min-microvolt = <165>;
> + regulator-name = "BUCK5";
> + };
> +
> + buck6: BUCK6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1155000>;
> + regulator-min-microvolt = <1045000>;
> + regulator-name = "BUCK6";
> + };
> +
> + ldo1: LDO1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <195>;
> + regulator-min-microvolt = <165>;
> + regulator-name = "LDO1";
> + };
> +
> + ldo3: LDO3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <189>;
> + regulator
Re: [PATCH] mtd: rawnand: fsl_elbc: Fix reading address pointer from DT
Hi Pali
On Fri, Aug 19, 2022 at 11:20 AM Pali Rohár wrote:
>
> During compilation gcc throws warning:
>
> drivers/mtd/nand/raw/fsl_elbc_nand.c: In function ‘fsl_elbc_nand_probe’:
> drivers/mtd/nand/raw/fsl_elbc_nand.c:841:31: warning: cast to pointer
> from integer of different size [-Wint-to-pointer-cast]
> return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev);
>^
>
> Fix it by using dev_read_addr_ptr() function which returns pointer instead
> of dev_read_addr() which returns integer type.
>
> Signed-off-by: Pali Rohár
> ---
> drivers/mtd/nand/raw/fsl_elbc_nand.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c
> b/drivers/mtd/nand/raw/fsl_elbc_nand.c
> index 48a3687f2728..4a07cf854fff 100644
> --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
> +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
> @@ -839,7 +839,7 @@ void board_nand_init(void)
>
> static int fsl_elbc_nand_probe(struct udevice *dev)
> {
> - return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev);
> + return fsl_elbc_chip_init(0, dev_read_addr_ptr(dev), dev);
> }
>
> static const struct udevice_id fsl_elbc_nand_dt_ids[] = {
> --
> 2.20.1
>
Reviewed-by: Dario Binacchi
Thanks and regards,
Dario
--
Dario Binacchi
Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH v2 0/5] board: sl28: various updates
On 7/14/2022 9:05 PM, Michael Walle wrote: This is a resend of the original v1 series. It was just rebased. Apparently not all patches made it into u-boot. Unfortunately, there was no feedback at all. This is an update for the sl28 board which adds support for - 8 GiB memory variant - different boot sources, like eMMC, SD-card - dynamic prompts - various cleanups changes since v1: - rebased onto the latest master Michael Walle (5): armv8: layerscape: spl: mark OCRAM as non-secure board: sl28: implement additional bootsources board: sl28: add user friendly names for the boot sources board: sl28: support dynamic prompts board: sl28: remove COUNTER_FREQUENCY_REAL arch/arm/cpu/armv8/fsl-layerscape/spl.c | 11 + board/kontron/sl28/common.c | 22 ++ board/kontron/sl28/sl28.c | 43 board/kontron/sl28/sl28.h | 16 board/kontron/sl28/spl.c| 54 - configs/kontron_sl28_defconfig | 6 ++- include/configs/kontron_sl28.h | 2 - 7 files changed, 150 insertions(+), 4 deletions(-) create mode 100644 board/kontron/sl28/sl28.h Applied to fsl-qoriq, thanks! -Peng.
Re: [PATCH 1/2] dm: core: Add functions to read 8/16-bit integers
Hi Heinrich, Am 14.07.2022 um 14:58 schrieb Heinrich Schuchardt: On 7/14/22 12:37, Stefan Herbrechtsmeier wrote: Hi Simon, Am 14.07.2022 um 12:22 schrieb Simon Glass: Hi Stefan, On Wed, 13 Jul 2022 at 10:08, Stefan Herbrechtsmeier wrote: Hi Simon, Am 13.07.2022 um 17:28 schrieb Simon Glass: Hi Stefan, On Tue, 12 Jul 2022 at 12:31, Stefan Herbrechtsmeier wrote: Hi Simon, Am 12.07.2022 um 12:58 schrieb Simon Glass: Hi Stefan, On Tue, 14 Jun 2022 at 07:22, Stefan Herbrechtsmeier wrote: From: Stefan Herbrechtsmeier Add functions to read 8/16-bit integers like the existing functions for 32/64-bit to simplify read of 8/16-bit integers from device tree properties. Signed-off-by: Stefan Herbrechtsmeier --- arch/sandbox/dts/test.dts | 2 ++ drivers/core/of_access.c | 38 +++ drivers/core/ofnode.c | 62 + drivers/core/read.c | 21 + include/dm/of_access.h | 32 +++ include/dm/ofnode.h | 40 include/dm/read.h | 65 +++ test/dm/test-fdt.c | 19 8 files changed, 279 insertions(+) This looks good but is very expensive in terms of code size. Can you update your u8 and u16 functions to reuse the existing u32 function and just convert the value? The u32 function requires a 32 bit value inside the device tree because it checks the size and maybe swap the bytes. The u8 and u16 function requires only a 8 and 16 bit value inside the device tree. Yes that's true. What is the use case for these functions? The usb251xb driver requires this functions [1]. The usb251xb device tree binding [2] defines the ids as 16 bit values and the Linux driver use 8 bit for an unspecified property. Without this changes the driver doesn't satisfy the specification and is incompatible to the Linux driver. I wonder if that binding is a bit ambiguous. From what I have seen we normally use a single cell for int values, partly so that fdtdump works and partly because the format doesn't allow using any less space anyway. IMO that binding should use a whole cell for the byte and u16 values. How should we go on? The specification is 5 years old. I can ignore the specification and remove the "/bits/ 16" from my device tree source. We will not change the binding due to a deficiency of U-Boot. For the 8 bit field: The length field is set to 1 byte. 3 zero bytes are following for alignment. We tend to check the length field. We could reduce the number functions if on most levels of function indirection we would pass a size field. E.g. replace of_read_u*_array() by macros all invoking the same function with different values (1, 2, 4, 8) of the element size parameter. This doesn't help because you have to adapt the byte order and on most levels the functions are simple wrappers. The rework isn't easy because we have a combination of wrappers and duplicate implementations. Thereby the ofnode functions are wrappers and implementations at the same time: dev_read_u32 -> ofnode_read_u32 -> ofnode_read_u32_index - if ofnode_is_np -> of_read_u32_index -> of_find_property_value_of_size -> be32_to_cpup - else -> fdt_getprop -> fdt32_to_cpu We need to remove the second implementations (of_read_) to reduce the size. Regards Stefan
[PATCH] fdt_support: add optional board_rng_seed() hook
A recurring theme on LKML is the boot process deadlocking due to some process blocking waiting for random numbers, while the kernel's Cryptographic Random Number Generator (crng) is not initalized yet, but that very blocking means no activity happens that would generate the entropy necessary to finalize seeding the crng. This is not a problem on boards that have a good hwrng (when the kernel is configured to trust it), whether in the CPU or in a TPM or elsewhere. However, that's far from all boards out there. Moreover, there are consumers in the kernel that try to obtain random numbers very early, before the kernel has had any chance to initialize any hwrng or other peripherals. Allow a board to provide a board_rng_seed() function, which is responsible for providing a value to be put into the rng-seed property under the /chosen node. The board code is responsible for how to actually obtain those bytes. - One possibility is for the board to load a seed "file" from somewhere (it need not be a file in a filesystem of course), and then ensure that that the same seed file does not get used on subsequent boots. * One way to do that is to delete the file, or otherwise mark it as invalid, then rely on userspace to create a new one, and living with the possibility of not finding a seed file during some boots. * Another is to use the scheme used by systemd-boot and create a new seed file immediately, but in a way that the seed passed to the kernel and the new (i.e. next) seed cannot be deduced from each other, see the explanation at https://lore.kernel.org/lkml/20190929090512.GB13049@gardel-login/ and the current code at https://github.com/systemd/systemd/blob/main/src/boot/efi/random-seed.c - The board may have an hwrng from which some bytes can be read; while the kernel can also do that, doing it in U-Boot and providing a seed ensures that even very early users in the kernel get good random numbers. - If the board has a sensor of some sort (temperature, humidity, GPS, RTC, whatever), mixing in a reading of that doesn't hurt. - etc. etc. These can of course be combined. The rng-seed property is mixed into the pool used by the linux kernel's CRNG very early during boot. Whether it then actually contributes towards the kernel considering the CRNG initialized depends on whether the kernel has been configured with CONFIG_RANDOM_TRUST_BOOTLOADER (nowadays overridable via the random.trust_bootloader command line option). But that's for the BSP developer to ultimately decide. So, if the board needs to have all that logic, why not also just have it do the actual population of /chosen/rng-seed in ft_board_setup(), which is not that many extra lines of code? I considered that, but decided handling this logically belongs in fdt_chosen(). Also, apart from saving the board code from the few lines of boilerplate, doing it in ft_board_setup() is too late for at least some use cases. For example, I want to allow the board logic to decide ok, let's pass back this buffer and use that as seed, but also let's set random.trust_bootloader=n so no entropy is credited. This requires the rng-seed handling to happen before bootargs handling. For example, during the very first boot, the board might not have a proper seed file, but the board could still return (a hash of) some CPU serial# or whatnot, so that at least no two boards ever get the same seed - the kernel always mixes in the value passed in rng-seed, but if it is not "trusted", the kernel would still go through the same motions as it would if no rng-seed was passed before considering its CRNG initialized. I.e., by returning that unique-to-this-board value and setting random.trust_bootloader=n, the board would be no worse off than if board_rng_seed() returned nothing at all. Signed-off-by: Rasmus Villemoes --- common/Kconfig| 14 ++ common/fdt_support.c | 13 + include/fdt_support.h | 13 + 3 files changed, 40 insertions(+) diff --git a/common/Kconfig b/common/Kconfig index e7914ca750..ebee856e56 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -768,6 +768,20 @@ config TPL_STACKPROTECTOR bool "Stack Protector buffer overflow detection for TPL" depends on STACKPROTECTOR && TPL +config BOARD_RNG_SEED + bool "Provide /chosen/rng-seed property to the linux kernel" + help + Selecting this option requires the board to define a + board_rng_seed() function, which should return a buffer + which will be used to populate the /chosen/rng-seed property + in the device tree for the OS being booted. + + It is up to the board code (and more generally the whole + BSP) where and how to store (or generate) such a seed, how + to ensure a given seed is only used once, how to create a + new seed for use on subsequent boots, and whether or not the + kernel should account any entropy fro
Re: [PATCH] arm: kirkwood: Add CONFIG_SUPPORT_PASSING_ATAGS
On 17.08.22 23:59, Tony Dinh wrote: Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy image method of booting. Debian and OpenWrt installer use uImage with appended DTB for these Kirkwood boards. Signed-off-by: Tony Dinh Reviewed-by: Stefan Roese Thanks, Stefan --- configs/dockstar_defconfig | 3 +++ configs/dreamplug_defconfig | 3 +++ configs/goflexhome_defconfig | 3 +++ configs/iconnect_defconfig | 3 +++ configs/pogo_e02_defconfig | 3 +++ configs/sheevaplug_defconfig | 3 +++ 6 files changed, 18 insertions(+) diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 6f99cdd44b..82eb81e4de 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Seagate/dockstar/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x60 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index d6b55636ba..ccc9ee38de 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -3,6 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/dreamplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x60 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 1ef4d6c881..3cfbe7d558 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Seagate/goflexhome/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x60 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 7adf76d777..fc5928b9df 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/iomega/iconnect/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x60 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index e1a2517eb6..0b647e8af9 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_e02/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x60 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index fa1e7bd2c0..cc9cd7d9c9 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/sheevaplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x60 CONFIG_NR_DRAM_BANKS=2 Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 00/22] board: lsxl: major update and DM conversion
On 17.08.22 21:37, Michael Walle wrote: Convert the Buffalo Linkstation LS-CHLv2 and XHL boards to DM_GPIO, DM_ETH, DM_SERIAL and CONFIG_TIMER. Patches 01-02 fix TCLK handling on the kirkwood SoC if the clock is 166MHz. Patches 03-04 add CONFIG_TIMER support for kirkwood/mvebu. Patches 05-21 will then update the lsxl board Michael Walle (21): time: move the CONFIG_SYS_TIMER_RATE handling to the compiler arm: kirkwood: make it CONFIG_TIMER aware timer: add orion-timer support button: gpio: add DM_GPIO dependency board: lsxl: limit size to 384kiB board: lsxl: remove unused features board: lsxl: remove eraseenv script board: lsxl: remove CONFIG_ENV_OVERWRITE board: lsxl: remove unused header files board: lsxl: automatically select CONFIG_MISC_INIT_R board: lsxl: use CONFIG_DEFAULT_FDT_FILE board: lsxl: reorder image loading and remove ramdisk_len board: lsxl: use proper *_r variables board: lsxl: enable ATAGS support board: lsxl: make last resort recovery more reliable board: lsxl: convert to DM_GPIO board: lsxl: convert to DM_ETH board: lsxl: convert to DM_SERIAL board: lsxl: convert to CONFIG_TIMER board: lsxl: disable eth0 board: lsxl: update the README Pali Rohár (1): arm: kirkwood: 88f6281: Detect CONFIG_SYS_TCLK from SAR register arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi | 13 ++ arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi | 13 ++ arch/arm/mach-kirkwood/Kconfig| 2 + arch/arm/mach-kirkwood/include/mach/config.h | 2 + .../mach-kirkwood/include/mach/kw88f6281.h| 3 +- arch/arm/mach-kirkwood/include/mach/soc.h | 2 + arch/arm/mach-mvebu/Makefile | 3 + board/buffalo/lsxl/README | 32 ++-- board/buffalo/lsxl/lsxl.c | 165 +++--- configs/lschlv2_defconfig | 31 +++- configs/lsxhl_defconfig | 31 +++- drivers/button/Kconfig| 1 + drivers/timer/Kconfig | 6 + drivers/timer/Makefile| 1 + drivers/timer/orion-timer.c | 63 +++ include/configs/lsxl.h| 76 +++- lib/time.c| 15 +- 17 files changed, 300 insertions(+), 159 deletions(-) create mode 100644 arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi create mode 100644 arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi create mode 100644 drivers/timer/orion-timer.c Nice updates and conversion, thanks: Reviewed-by: Stefan Roese Thanks, Stefan
Re: [RESEND PATCH] arm: kirkwood: nsa310s: Add Distro boot capability
On 12.08.22 01:40, Tony Dinh wrote:
- Add distro boot to board include file and deconfig file
- Miscellaneous changes:
- Remove Gerald from maintainer list (email bounced)
- Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
kernel method of booting (e.g. OpenWrt) with appended DTB.
- Add CONFIG_UBIFS_SILENCE_MSG to reduce binary size.
Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220807192709.21717-1-p...@kernel.org/
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
board/zyxel/nsa310s/MAINTAINERS | 1 -
configs/nsa310s_defconfig | 17 +
include/configs/nsa310s.h | 31 +--
3 files changed, 34 insertions(+), 15 deletions(-)
diff --git a/board/zyxel/nsa310s/MAINTAINERS b/board/zyxel/nsa310s/MAINTAINERS
index d153758c21..11106acf3e 100644
--- a/board/zyxel/nsa310s/MAINTAINERS
+++ b/board/zyxel/nsa310s/MAINTAINERS
@@ -1,5 +1,4 @@
NSA310S BOARD
-M: Gerald Kerma
M:Tony Dinh
M:Luka Perkov
S:Maintained
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 2b39ae74b3..a5f01ef88e 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_KIRKWOOD=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+CONFIG_CMDLINE_TAG=y
+CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg"
CONFIG_SYS_TEXT_BASE=0x60
CONFIG_SYS_MALLOC_F_LEN=0x400
@@ -14,35 +17,25 @@ CONFIG_ENV_OFFSET=0xE
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s"
CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server"
CONFIG_SYS_LOAD_ADDR=0x80
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_BOOTDELAY=3
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi
part root; ubifsmount ubi:rootfs; ubifsload 0x80 ${kernel}; ubifsload 0x70
${fdt}; ubifsumount; fdt addr 0x70; fdt resize; fdt chosen; bootz 0x80 -
0x70"
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="NSA310s> "
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=1050
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe@0x0(uboot),0x2@0xe(uboot_env),0x10@0x10(second_stage_uboot),-@0x20(root)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -65,6 +58,6 @@ CONFIG_MII=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
+CONFIG_UBIFS_SILENCE_MSG=y
CONFIG_LZMA=y
CONFIG_BZIP2=y
diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h
index 027a47b5a3..62f0701180 100644
--- a/include/configs/nsa310s.h
+++ b/include/configs/nsa310s.h
@@ -9,15 +9,42 @@
#ifndef _CONFIG_NSA310S_H
#define _CONFIG_NSA310S_H
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
#include "mv-common.h"
-/* default environment variables */
+/* Include the common distro boot environment */
+#ifndef CONFIG_SPL_BUILD
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(USB, usb, 0) \
+ func(SATA, sata, 0) \
+ func(DHCP, dhcp, na)
+
+#define KERNEL_ADDR_R __stringify(0x80)
+#define FDT_ADDR_R __stringify(0x2c0)
+#define RAMDISK_ADDR_R __stringify(0x0110)
+#define SCRIPT_ADDR_R __stringify(0x20)
+
+#define LOAD_ADDRESS_ENV_SETTINGS \
+ "kernel_addr_r=" KERNEL_ADDR_R "\0" \
+ "fdt_addr_r=" FDT_ADDR_R "\0" \
+ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
+ "scriptaddr=" SCRIPT_ADDR_R "\0"
+
+#include
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=console=ttyS0,115200\0" \
"kernel=/boot/zImage\0" \
"fdt=/boot/nsa310s.dtb\0" \
- "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0"
+ "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" \
+ LOAD_ADDRESS_ENV_SETTINGS \
+ BOOTENV
+
+#endif /* CONFIG_SPL_BUILD */
/* Ethernet driver configuration */
#define CONFIG_MVGBE_PORTS{1, 0} /* enable port 0 only */
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 1/2] dm: core: Add functions to read 8/16-bit integers
Hi, Am 14.07.2022 um 16:51 schrieb Simon Glass: Hi Stefan, On Thu, 14 Jul 2022 at 04:37, Stefan Herbrechtsmeier wrote: Hi Simon, Am 14.07.2022 um 12:22 schrieb Simon Glass: Hi Stefan, On Wed, 13 Jul 2022 at 10:08, Stefan Herbrechtsmeier wrote: Hi Simon, Am 13.07.2022 um 17:28 schrieb Simon Glass: Hi Stefan, On Tue, 12 Jul 2022 at 12:31, Stefan Herbrechtsmeier wrote: Hi Simon, Am 12.07.2022 um 12:58 schrieb Simon Glass: Hi Stefan, On Tue, 14 Jun 2022 at 07:22, Stefan Herbrechtsmeier wrote: From: Stefan Herbrechtsmeier Add functions to read 8/16-bit integers like the existing functions for 32/64-bit to simplify read of 8/16-bit integers from device tree properties. Signed-off-by: Stefan Herbrechtsmeier --- arch/sandbox/dts/test.dts | 2 ++ drivers/core/of_access.c | 38 +++ drivers/core/ofnode.c | 62 + drivers/core/read.c | 21 + include/dm/of_access.h| 32 +++ include/dm/ofnode.h | 40 include/dm/read.h | 65 +++ test/dm/test-fdt.c| 19 8 files changed, 279 insertions(+) This looks good but is very expensive in terms of code size. Can you update your u8 and u16 functions to reuse the existing u32 function and just convert the value? The u32 function requires a 32 bit value inside the device tree because it checks the size and maybe swap the bytes. The u8 and u16 function requires only a 8 and 16 bit value inside the device tree. Yes that's true. What is the use case for these functions? The usb251xb driver requires this functions [1]. The usb251xb device tree binding [2] defines the ids as 16 bit values and the Linux driver use 8 bit for an unspecified property. Without this changes the driver doesn't satisfy the specification and is incompatible to the Linux driver. I wonder if that binding is a bit ambiguous. From what I have seen we normally use a single cell for int values, partly so that fdtdump works and partly because the format doesn't allow using any less space anyway. IMO that binding should use a whole cell for the byte and u16 values. How should we go on? The specification is 5 years old. I can ignore the specification and remove the "/bits/ 16" from my device tree source. I believe either would work, since reading a u32 from the device tree and masking it would achieve the same result. The problem with the current u32 function is that it requires 4 bytes. IMO the binding is odd, but I don't think you can just change it. Then we can use the u32() function and do a mask. The driver cast away the unseeded bits. OK. Anyway as Heinrich says below, most boards won't use these functions. I hope that other drivers don't start using u8 and u16 values when a u32 will do. Reviewed-by: Simon Glass [1] https://lists.denx.de/pipermail/u-boot/2022-June/486424.html [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/usb/usb251xb.txt Stefan Regards, Simon Does this series need a rework to be applied? Regards Stefan
Re: [PATCH] arm: kirkwood: pogo_v4: Add Distro boot capability
On 09.08.22 05:01, Tony Dinh wrote:
- Add distro boot to board include file and deconfig file
- Miscellaneous changes:
- Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
kernel method of booting (e.g. OpenWrt) with appended DTB.
- Add CONFIG_LTO and CONFIG_UBIFS_SILENCE_MSG, and disable some
unused configs to reduce binary size.
Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220807192709.21717-1-p...@kernel.org/
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
configs/pogo_v4_defconfig | 25 --
include/configs/pogo_v4.h | 54 +--
2 files changed, 57 insertions(+), 22 deletions(-)
diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
index c62c88f1b5..748842100e 100644
--- a/configs/pogo_v4_defconfig
+++ b/configs/pogo_v4_defconfig
@@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_KIRKWOOD=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+CONFIG_CMDLINE_TAG=y
+CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_v4/kwbimage.cfg"
CONFIG_SYS_TEXT_BASE=0x60
CONFIG_SYS_MALLOC_F_LEN=0x400
@@ -13,23 +16,24 @@ CONFIG_ENV_OFFSET=0xC
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
CONFIG_IDENT_STRING="\nPogoplug V4"
CONFIG_SYS_LOAD_ADDR=0x80
+CONFIG_LTO=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_BOOTSTAGE=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="setenv bootargs ${bootargs_console}; run bootcmd_usb; bootm
0x0080 0x0110 0x2c0"
CONFIG_USE_PREBOOT=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Pogo_V4> "
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=1050
-CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
@@ -37,22 +41,14 @@ CONFIG_CMD_NAND=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_BLOCK_CACHE is not set
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:2M(u-boot),3M(uImage),3M(uImage2),8M(failsafe),112M(root)"
CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
@@ -62,6 +58,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_DM=y
+# CONFIG_DM_WARN is not set
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
@@ -84,6 +81,6 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_NAND=y
+CONFIG_UBIFS_SILENCE_MSG=y
diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h
index 7fff78b7b5..b5ce2dd13d 100644
--- a/include/configs/pogo_v4.h
+++ b/include/configs/pogo_v4.h
@@ -21,15 +21,53 @@
*/
#include "mv-common.h"
-/*
- * Default environment variables
- */
+/* Include the common distro boot environment */
+#ifndef CONFIG_SPL_BUILD
+
+#ifdef CONFIG_MMC
+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
+#else
+#define BOOT_TARGET_DEVICES_MMC(func)
+#endif
+
+#ifdef CONFIG_SATA
+#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0)
+#else
+#define BOOT_TARGET_DEVICES_SATA(func)
+#endif
+
+#ifdef CONFIG_USB_STORAGE
+#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
+#else
+#define BOOT_TARGET_DEVICES_USB(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_DEVICES_MMC(func) \
+ BOOT_TARGET_DEVICES_USB(func) \
+ BOOT_TARGET_DEVICES_SATA(func) \
+ func(DHCP, dhcp, na)
+
+#define KERNEL_ADDR_R __stringify(0x80)
+#define FDT_ADDR_R __stringify(0x2c0)
+#define RAMDISK_ADDR_R __stringify(0x0110)
+#define SCRIPT_ADDR_R __stringify(0x20)
+
+#define LOAD_ADDRESS_ENV_SETTINGS \
+ "kernel_addr_r=" KERNEL_ADDR_R "\0" \
+ "fdt_addr_r=" FDT_ADDR_R "\0" \
+ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
+ "scriptaddr=" SCRIPT_ADDR_R "\0"
+
+#include
+
#define CONFIG_EXTRA_ENV_SETTINGS \
- "dtb_file=/boot/dts/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
- "bootargs_console=console=ttyS0,115200\0" \
- "bootcmd_usb=usb start; load usb 0:1 0x0080 /boot/uImage; " \
- "load usb 0:1 0x0110 /boot/uInitrd; " \
- "load usb 0:1 0x2c0 $dtb_file\0"
+ LOAD_ADDRESS_ENV_SETTINGS
Re: [PATCH v6 18/21] binman: Add gzip bintool
Hi Simon, Am 21.08.2022 um 02:10 schrieb Simon Glass: Hi Stefan, On Sat, 20 Aug 2022 at 15:33, Simon Glass wrote: On Fri, 19 Aug 2022 at 08:26, Stefan Herbrechtsmeier wrote: From: Stefan Herbrechtsmeier Add gzip bintool to binman to support on-the-fly compression of Linux kernel images and FPGA bitstreams. The SPL basic fitImage implementation supports only gzip decompression. Signed-off-by: Stefan Herbrechtsmeier --- (no changes since v5) Changes in v5: - Add algorithm name to entry.py - Add tool name to ftest.py Changes in v2: - Add commit to add gzip bintool tools/binman/btool/gzip.py | 31 +++ tools/binman/entry.py | 2 +- tools/binman/ftest.py | 2 +- 3 files changed, 33 insertions(+), 2 deletions(-) create mode 100644 tools/binman/btool/gzip.py Reviewed-by: Simon Glass Unfortunately this conflicts with the system gzip.py module so I have had to rework this a little. Should we use bz2, gzip and lzma modules instead of the bintools? Regards Stefan
