Re: [PATCH v1] net: nuvoton: fix build broken for use phy_get_interface_by_name
Hi Ramon
My upstream topic status is Awaiting Upstream.
What could I do to make it merge fast?
Best regards,
Jim
On Sun, Sep 18, 2022 at 2:07 PM Ramon Fried wrote:
>
> On Tue, Sep 13, 2022 at 9:25 AM Jim Liu wrote:
> >
> > The original patch is use phy_get_interface_by_name to set interface.
> > The new patch is use dev_read_phy_mode to replace it.
> >
> > Signed-off-by: Jim Liu
> > ---
> > drivers/net/npcm750_eth.c | 8
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/npcm750_eth.c b/drivers/net/npcm750_eth.c
> > index 409d5cce4a..bd29a10def 100644
> > --- a/drivers/net/npcm750_eth.c
> > +++ b/drivers/net/npcm750_eth.c
> > @@ -710,12 +710,12 @@ static int npcm750_eth_ofdata_to_platdata(struct
> > udevice *dev)
> >
> > pdata->phy_interface = -1;
> > phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
> > "phy-mode", NULL);
> > +
> > if (phy_mode)
> > - pdata->phy_interface = phy_get_interface_by_name(phy_mode);
> > - if (pdata->phy_interface == -1) {
> > - printf("%s: Invalid PHY interface '%s'\n", __func__,
> > phy_mode);
> > + pdata->phy_interface = dev_read_phy_mode(dev);
> > +
> > + if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
> > return -EINVAL;
> > - }
> >
> > pdata->max_speed = 0;
> > cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed",
> > NULL);
> > --
> > 2.17.1
> >
> Reviewed-by: Ramon Fried
Re: [PATCH 1/1] disk: fix blk_get_device_part_str()
Hello Heinrich,
On 20.11.22 13:13, Heinrich Schuchardt wrote:
> blk_get_device_part_str() should always initialize all info fields
> including sys_ind. As a side effect the code is simplified.
>
> Replace '(0 ==' by '(!' to conform with Linux coding style.
>
> Fixes: 4d907025d6a5 ("sandbox: restore ability to access host fs through
> standard commands")
> Signed-off-by: Heinrich Schuchardt
> ---
> disk/part.c | 23 +--
> 1 file changed, 5 insertions(+), 18 deletions(-)
Looks good to me, thanks!
Reviewed-by: Heiko Schocher
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH] riscv: use imply instead of select for SPL_SEPARATE_BSS
On 11/16/22 02:08, Zong Li wrote: Use imply instead of select, then it can still be disabled by board-specific defconfig, or be set to n manually. Signed-off-by: Zong Li --- arch/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/Kconfig b/arch/Kconfig index ae39716697..102956d24c 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -111,7 +111,7 @@ config RISCV select SUPPORT_OF_CONTROL select OF_CONTROL select DM - select SPL_SEPARATE_BSS if SPL + imply SPL_SEPARATE_BSS if SPL imply DM_SERIAL imply DM_ETH imply DM_EVENT Do you have an example of a board which does this? --Sean
Re: [PATCH] riscv: use imply instead of select for SPL_SEPARATE_BSS
On Wed, Nov 16, 2022 at 3:09 PM Zong Li wrote: > > Use imply instead of select, then it can still be disabled by > board-specific defconfig, or be set to n manually. > > Signed-off-by: Zong Li > --- > arch/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH] riscv: use imply instead of select for SPL_SEPARATE_BSS
> From: Zong Li > Sent: Wednesday, November 16, 2022 3:09 PM > To: s...@chromium.org; michal.si...@amd.com; sean.ander...@seco.com; Leo > Yu-Chi Liang(梁育齊) ; Rick Jian-Zhi Chen(陳建志) > ; u-boot@lists.denx.de > Cc: Zong Li > Subject: [PATCH] riscv: use imply instead of select for SPL_SEPARATE_BSS > > Use imply instead of select, then it can still be disabled by board-specific > defconfig, or be set to n manually. > > Signed-off-by: Zong Li > --- > arch/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen
Re: [PATCH 1/1] cli: always show cursor
On Saturday 22 October 2022 11:20:58 Heinrich Schuchardt wrote:
> We may enter the command line interface in a state where on the remote
> console the cursor is not shown. Send an escape sequence to enable it.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> common/main.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/common/main.c b/common/main.c
> index 682f3359ea..4e7e7b17d6 100644
> --- a/common/main.c
> +++ b/common/main.c
> @@ -7,6 +7,7 @@
> /* #define DEBUG */
>
> #include
> +#include
> #include
> #include
> #include
> @@ -66,6 +67,9 @@ void main_loop(void)
>
> autoboot_command(s);
>
> + if (!CONFIG_IS_ENABLED(DM_VIDEO) || CONFIG_IS_ENABLED(VIDEO_ANSI))
> + printf(ANSI_CURSOR_SHOW "\n");
I think that this does not work anymore. Support for "h"/"l" ansi escape
sequences to show and hide cursor was removed from U-Boot together with
cfg_console.c driver done by Simon for v2022.07 version.
Now I verified that cursor is really permanently turned off (meaning
unsupported) on Nokia N900 even when CONFIG_VIDEO_ANSI is enabled.
So prior adding ANSI_CURSOR_SHOW on new places, I would suggest to first
revert and implement functions for showing and hiding cursor.
> +
> cli_loop();
> panic("No CLI available");
> }
> --
> 2.37.2
>
Re: [PATCH] Prevent buffer overflow on USB control endpoint
On 20/11/2022 18:25, Marek Vasut wrote:
> On 11/20/22 16:29, Szymon Heidrich wrote:
>> On 20/11/2022 15:43, Marek Vasut wrote:
>>> On 11/17/22 12:50, Fabio Estevam wrote:
[Adding Lukasz and Marek]
On Thu, Nov 17, 2022 at 6:50 AM Szymon Heidrich
wrote:
>
> Assure that the control endpoint buffer of size USB_BUFSIZ (4096)
> can not be overflown during handling of USB control transfer
> requests with wLength greater than USB_BUFSIZ.
>
> Signed-off-by: Szymon Heidrich
> ---
> drivers/usb/gadget/composite.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/usb/gadget/composite.c
> b/drivers/usb/gadget/composite.c
> index 2a309e624e..cb89f6dca9 100644
> --- a/drivers/usb/gadget/composite.c
> +++ b/drivers/usb/gadget/composite.c
> @@ -1019,6 +1019,17 @@ composite_setup(struct usb_gadget *gadget, const
> struct usb_ctrlrequest *ctrl)
> u8 endp;
> struct usb_configuration *c;
>
> + if (w_length > USB_BUFSIZ) {
> + if (ctrl->bRequestType & USB_DIR_IN) {
> + /* Cast away the const, we are going to overwrite
> on purpose. */
> + __le16 *temp = (__le16 *)&ctrl->wLength;
> + *temp = cpu_to_le16(USB_BUFSIZ);
> + w_length = USB_BUFSIZ;
>>>
>>> Won't this end up sending corrupted packets in case they are longer than
>>> USB_BUFSIZ ?
>>>
>>> Where do such long packets come from ?
>>>
>>> What is the test-case ?
>>
>> The USB host will not attempt to retrieve more than wLenght bytes during
>> transfer phase.
>> If the device would erroneously attempt to provide more data it would result
>> in an unexpected state.
>> In case of most implementations the buffer for endpoint 0 along with max
>> control transfer is limited to 4096 bytes (USB_BUFSIZ for U-Boot and Linux
>> kernel).
>> Still according to the USB specification wLength is two bytes an the device
>> may receive requests with wLength larger than 4096 bytes e.g. in case of a
>> custom/malicious USB host.
>> For example one may build libusb with MAX_CTRL_BUFFER_LENGTH altered to
>> 0x and this will allow the host to send requests with wLength up to
>> 0x.
>> In this case the original implementation may result in buffer overflows as
>> in multiple locations a value directly derived from wLength is set as the
>> transfer phase length.
>> With the change applied IN requests with wLength larger than USB_BUFSIZ will
>> be trimmed to USB_BUFSIZ, otherwise the host would read wLength-USB_BUFSIZ
>> past cdev->req->buf.
>> I am not aware of any cases where more than USB_BUFSIZ would be provided
>> from a buffer other than cdev->req->buf. In case I missed such case please
>> let me know.
>
> Why shouldn't the patch do simple
>
> w_length = min(w_length, USB_BUFSIZ);
>
> ?
The composite_setup function in composite.c uses w_length but function specific
setup functions are passed the struct usb_ctrlrequest *ctrl so both must be
updated.
If only w_length is updated using min(w_length, USB_BUFSIZ) than function
specific setup will still receive the original request including unaltered
wLength so it
may again return a number of bytes greater than buffer size resulting in an
overflow.
Re: [PATCH] Prevent buffer overflow on USB control endpoint
On 20/11/2022 15:43, Marek Vasut wrote:
> On 11/17/22 12:50, Fabio Estevam wrote:
>> [Adding Lukasz and Marek]
>>
>> On Thu, Nov 17, 2022 at 6:50 AM Szymon Heidrich
>> wrote:
>>>
>>> Assure that the control endpoint buffer of size USB_BUFSIZ (4096)
>>> can not be overflown during handling of USB control transfer
>>> requests with wLength greater than USB_BUFSIZ.
>>>
>>> Signed-off-by: Szymon Heidrich
>>> ---
>>> drivers/usb/gadget/composite.c | 11 +++
>>> 1 file changed, 11 insertions(+)
>>>
>>> diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
>>> index 2a309e624e..cb89f6dca9 100644
>>> --- a/drivers/usb/gadget/composite.c
>>> +++ b/drivers/usb/gadget/composite.c
>>> @@ -1019,6 +1019,17 @@ composite_setup(struct usb_gadget *gadget, const
>>> struct usb_ctrlrequest *ctrl)
>>> u8 endp;
>>> struct usb_configuration *c;
>>>
>>> + if (w_length > USB_BUFSIZ) {
>>> + if (ctrl->bRequestType & USB_DIR_IN) {
>>> + /* Cast away the const, we are going to overwrite
>>> on purpose. */
>>> + __le16 *temp = (__le16 *)&ctrl->wLength;
>>> + *temp = cpu_to_le16(USB_BUFSIZ);
>>> + w_length = USB_BUFSIZ;
>
> Won't this end up sending corrupted packets in case they are longer than
> USB_BUFSIZ ?
>
> Where do such long packets come from ?
>
> What is the test-case ?
The USB host will not attempt to retrieve more than wLenght bytes during
transfer phase.
If the device would erroneously attempt to provide more data it would result in
an unexpected state.
In case of most implementations the buffer for endpoint 0 along with max
control transfer is limited to 4096 bytes (USB_BUFSIZ for U-Boot and Linux
kernel).
Still according to the USB specification wLength is two bytes an the device may
receive requests with wLength larger than 4096 bytes e.g. in case of a
custom/malicious USB host.
For example one may build libusb with MAX_CTRL_BUFFER_LENGTH altered to 0x
and this will allow the host to send requests with wLength up to 0x.
In this case the original implementation may result in buffer overflows as in
multiple locations a value directly derived from wLength is set as the transfer
phase length.
With the change applied IN requests with wLength larger than USB_BUFSIZ will be
trimmed to USB_BUFSIZ, otherwise the host would read wLength-USB_BUFSIZ past
cdev->req->buf.
I am not aware of any cases where more than USB_BUFSIZ would be provided from a
buffer other than cdev->req->buf. In case I missed such case please let me know.
Re: [PATCH] Prevent buffer overflow on USB control endpoint
On 11/20/22 16:29, Szymon Heidrich wrote:
On 20/11/2022 15:43, Marek Vasut wrote:
On 11/17/22 12:50, Fabio Estevam wrote:
[Adding Lukasz and Marek]
On Thu, Nov 17, 2022 at 6:50 AM Szymon Heidrich
wrote:
Assure that the control endpoint buffer of size USB_BUFSIZ (4096)
can not be overflown during handling of USB control transfer
requests with wLength greater than USB_BUFSIZ.
Signed-off-by: Szymon Heidrich
---
drivers/usb/gadget/composite.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 2a309e624e..cb89f6dca9 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1019,6 +1019,17 @@ composite_setup(struct usb_gadget *gadget, const struct
usb_ctrlrequest *ctrl)
u8 endp;
struct usb_configuration *c;
+ if (w_length > USB_BUFSIZ) {
+ if (ctrl->bRequestType & USB_DIR_IN) {
+ /* Cast away the const, we are going to overwrite on
purpose. */
+ __le16 *temp = (__le16 *)&ctrl->wLength;
+ *temp = cpu_to_le16(USB_BUFSIZ);
+ w_length = USB_BUFSIZ;
Won't this end up sending corrupted packets in case they are longer than
USB_BUFSIZ ?
Where do such long packets come from ?
What is the test-case ?
The USB host will not attempt to retrieve more than wLenght bytes during
transfer phase.
If the device would erroneously attempt to provide more data it would result in
an unexpected state.
In case of most implementations the buffer for endpoint 0 along with max
control transfer is limited to 4096 bytes (USB_BUFSIZ for U-Boot and Linux
kernel).
Still according to the USB specification wLength is two bytes an the device may
receive requests with wLength larger than 4096 bytes e.g. in case of a
custom/malicious USB host.
For example one may build libusb with MAX_CTRL_BUFFER_LENGTH altered to 0x
and this will allow the host to send requests with wLength up to 0x.
In this case the original implementation may result in buffer overflows as in
multiple locations a value directly derived from wLength is set as the transfer
phase length.
With the change applied IN requests with wLength larger than USB_BUFSIZ will be
trimmed to USB_BUFSIZ, otherwise the host would read wLength-USB_BUFSIZ past
cdev->req->buf.
I am not aware of any cases where more than USB_BUFSIZ would be provided from a
buffer other than cdev->req->buf. In case I missed such case please let me know.
Why shouldn't the patch do simple
w_length = min(w_length, USB_BUFSIZ);
?
Re: [PATCH] Revert "cli_readline: Only insert printable chars"
On Tuesday 01 November 2022 21:07:24 Simon Glass wrote: > On Tue, 1 Nov 2022 at 17:42, Pali Rohár wrote: > > > > This reverts commit d2e64d29c44dee6d455f7705dd1cf1af8674ad9a. > > > > This commit broke support for pound sign (£) and euro sign (€) keys on > > Nokia N900 keypad. > > > > Signed-off-by: Pali Rohár > > --- > > common/cli_readline.c | 6 ++ > > 1 file changed, 2 insertions(+), 4 deletions(-) > > Reviewed-by: Simon Glass Hello! Any objection? If not, could you take this patch?
Re: [PATCH 1/3] arm32: Fix relocation of env_addr if POSITION_INDEPENDENT=y
On Sun, Nov 20, 2022 at 1:57 PM Pali Rohár wrote:
>
> Apply commit 534f0fbd6520 ("arm64: Fix relocation of env_addr if
> POSITION_INDEPENDENT=y") also for 32-bit ARM.
>
> This change fixes crashing of U-Boot on ARMv7 (Omap3 / Cortex-A8) Nokia N900
> phone (real HW). Note that qemu emulator of this board with same u-boot.bin
> binary has not triggered this crash.
>
> Crash happened after U-Boot printed following debug lines to serial console:
>
> initcall: 0001ea8c (relocated to 8fe0aa8c)
> Loading Environment from ... Using default environment
> Destroy Hash Table: 8fe25a98 table =
> Create Hash Table: N=387
>
> Signed-off-by: Pali Rohár
It would be nice to add:
Suggested-by: Tom Rini
[PATCH 1/3] arm32: Fix relocation of env_addr if POSITION_INDEPENDENT=y
Apply commit 534f0fbd6520 ("arm64: Fix relocation of env_addr if
POSITION_INDEPENDENT=y") also for 32-bit ARM.
This change fixes crashing of U-Boot on ARMv7 (Omap3 / Cortex-A8) Nokia N900
phone (real HW). Note that qemu emulator of this board with same u-boot.bin
binary has not triggered this crash.
Crash happened after U-Boot printed following debug lines to serial console:
initcall: 0001ea8c (relocated to 8fe0aa8c)
Loading Environment from ... Using default environment
Destroy Hash Table: 8fe25a98 table =
Create Hash Table: N=387
Signed-off-by: Pali Rohár
---
arch/arm/lib/crt0.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 6d566dca5c81..a0311438b458 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -147,6 +147,11 @@ ENTRY(_main)
ldr r1, =CONFIG_TEXT_BASE
sub r1, r0
add lr, r1
+#if defined(CONFIG_SYS_RELOC_GD_ENV_ADDR)
+ ldr r0, [r9, #GD_ENV_ADDR] /* r0 = gd->env_addr */
+ add r0, r0, r1
+ str r0, [r9, #GD_ENV_ADDR]
+#endif
#endif
ldr r0, [r9, #GD_RELOC_OFF] /* r0 = gd->reloc_off */
add lr, lr, r0
--
2.20.1
[PATCH 2/3] Nokia RX-51: Document debugging options and compile command
Add example command how to compile U-Boot and add new documentation section describing how to enable early debug UART and verbose log output for N900. Signed-off-by: Pali Rohár --- doc/board/nokia/rx51.rst | 32 1 file changed, 32 insertions(+) diff --git a/doc/board/nokia/rx51.rst b/doc/board/nokia/rx51.rst index 7c6647bce22e..93502e2dfc05 100644 --- a/doc/board/nokia/rx51.rst +++ b/doc/board/nokia/rx51.rst @@ -9,6 +9,10 @@ on a real N900. It does very little hardware configuration because NOLO has already configured the board. It is only needed to enable the internal eMMC memory via the twl4030 regulator which is not enabled by NOLO. +.. code-block:: bash + + make CROSS_COMPILE=arm-linux-gnueabi- nokia_rx51_defconfig u-boot.bin + NOLO is expecting a kernel image and will treat any image it finds in OneNAND as such. This u-boot is intended to be flashed to the N900 like a kernel. In order to transparently boot the original kernel, it will be @@ -160,6 +164,34 @@ UBIFS support add following lines into file ``configs/nokia_rx51_defconfig``:: CONFIG_CMD_UBIFS=y CONFIG_MTD_UBI_BEB_LIMIT=10 +Early output + + +Early U-Boot output can be enabled on serial console by adding following lines +into file ``configs/nokia_rx51_defconfig``:: + +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_OMAP=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_BASE=0x4902 +CONFIG_DEBUG_UART_CLOCK=4800 + +Note that early output is not available on USB tty console. + +Verbose debug output + + +Verbose debug output with maximal log level can be enabled by adding following +lines into file ``configs/nokia_rx51_defconfig``:: + +CONFIG_DM_DEBUG=y +CONFIG_LOG=y +CONFIG_LOGLEVEL=9 +CONFIG_LOG_MAX_LEVEL=9 +CONFIG_LOG_DEFAULT_LEVEL=9 + +And compiling U-Boot by additional make parameter ``KCPPFLAGS=-DLOG_DEBUG``. + Run in QEMU --- -- 2.20.1
[PATCH 3/3] Nokia RX-51: Do not overwrite standard $loadaddr variable
Instead of overwriting $loadaddr variable, use custom temporary
$fileloadaddr variable. So scripts can access default/original address
stored in $loadaddr at build time.
Signed-off-by: Pali Rohár
---
include/configs/nokia_rx51.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index a88cfe77d50c..99a020c3c71d 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -78,15 +78,16 @@
"kernaddr=0x82008000\0" \
"initrdaddr=0x84008000\0" \
"scriptaddr=0x86008000\0" \
+ "fileloadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
- "${loadaddr} ${mmcfile}\0" \
- "kernload=setenv loadaddr ${kernaddr};" \
+ "${fileloadaddr} ${mmcfile}\0" \
+ "kernload=setenv fileloadaddr ${kernaddr};" \
"setenv mmcfile ${mmckernfile};" \
"run fileload\0" \
- "initrdload=setenv loadaddr ${initrdaddr};" \
+ "initrdload=setenv fileloadaddr ${initrdaddr};" \
"setenv mmcfile ${mmcinitrdfile};" \
"run fileload\0" \
- "scriptload=setenv loadaddr ${scriptaddr};" \
+ "scriptload=setenv fileloadaddr ${scriptaddr};" \
"setenv mmcfile ${mmcscriptfile};" \
"run fileload\0" \
"scriptboot=echo Running ${mmcscriptfile} from mmc " \
--
2.20.1
[PATCH 0/3] Nokia RX-51: Fixes for U-Boot v2023.01-rc1
This patch series fixes U-Boot v2023.01-rc1 on Nokia N900 and extend documentation for debugging purposes. The main issue is broken POSITION_INDEPENDENT=y for (probably all) 32-bit ARM boards. Pali Rohár (3): arm32: Fix relocation of env_addr if POSITION_INDEPENDENT=y Nokia RX-51: Document debugging options and compile command Nokia RX-51: Do not overwrite standard $loadaddr variable arch/arm/lib/crt0.S | 5 + doc/board/nokia/rx51.rst | 32 include/configs/nokia_rx51.h | 9 + 3 files changed, 42 insertions(+), 4 deletions(-) -- 2.20.1
Re: [PATCH 2/2] Nokia RX-51: Remove CONFIG_PREBOOT from defconfig
On Tuesday 01 November 2022 19:29:01 Tom Rini wrote: > On Tue, Nov 01, 2022 at 11:58:48PM +0100, Pali Rohár wrote: > > On Sunday 09 October 2022 15:03:03 Pali Rohár wrote: > > > On Wednesday 27 July 2022 15:08:05 Tom Rini wrote: > > > > On Wed, Jul 27, 2022 at 09:01:15PM +0200, Pali Rohár wrote: > > > > > On Wednesday 27 July 2022 14:58:20 Tom Rini wrote: > > > > > > On Wed, Jul 27, 2022 at 08:52:01PM +0200, Pali Rohár wrote: > > > > > > > On Wednesday 27 July 2022 14:48:23 Tom Rini wrote: > > > > > > > > On Wed, Jul 27, 2022 at 08:34:41PM +0200, Pali Rohár wrote: > > > > > > > > > On Monday 25 July 2022 17:21:00 Tom Rini wrote: > > > > > > > > > > On Sun, Jul 10, 2022 at 01:42:56PM +0200, Pali Rohár wrote: > > > > > > > > > > > > > > > > > > > > > CONFIG_PREBOOT just cause putting > > > > > > > > > > > "preboot=CONFIG_PREBOOT" into env list. > > > > > > > > > > > Value CONFIG_PREBOOT="run preboot" in defconfig is just > > > > > > > > > > > nonsense and does > > > > > > > > > > > not do anything useful (it is infinite recursion). Config > > > > > > > > > > > file for this > > > > > > > > > > > board already contains default preboot= env variable with > > > > > > > > > > > correct value, > > > > > > > > > > > which has higher priority than CONFIG_PREBOOT and this is > > > > > > > > > > > reason why > > > > > > > > > > > nonsense CONFIG_PREBOOT is ignored. > > > > > > > > > > > > > > > > > > > > > > Remove nonsense and unused CONFIG_PREBOOT from > > > > > > > > > > > nokia_rx51_defconfig file. > > > > > > > > > > > > > > > > > > > > > > Signed-off-by: Pali Rohár > > > > > > > > > > > > > > > > > > > > Applied to u-boot/master, thanks! > > > > > > > > > > > > > > > > > > Patch 1/2 is missing. > > > > > > > > > > > > > > > > Sorry if I was unclear enough in the rest of the emails, I'm not > > > > > > > > applying 1/2. The empty string is fine enough (again, other > > > > > > > > variables > > > > > > > > have this issue). Unless I missed something and there's a > > > > > > > > run-time > > > > > > > > failure that 1/2 resolves? > > > > > > > > > > > > > > The issue is that preboot= variable is defined in ENV array two > > > > > > > times. > > > > > > > Once in Kconfig and second time in regular environment define. > > > > > > > > > > > > > > It is just coincidence that the definition from Kconfig is ignored > > > > > > > because currently it is put _after_ the regular preboot= > > > > > > > definition. But > > > > > > > this is fragile and probably some unrelated change/patch could > > > > > > > change > > > > > > > this behavior. > > > > > > > > > > > > > > We really do not want two preboot= definitions in ENV array and > > > > > > > pray > > > > > > > that the correct one would be used by U-Boot at runtime. > > > > > > > > > > > > It's not coincidence, it's down to link order. So it's not going to > > > > > > break anytime soon. And it's not just preboot that's in this > > > > > > situation. > > > > > > > > > > It is not linker order, but rather order in which are specified > > > > > preprocessor macros... > > > > > > > > Ah right, sorry, I was thinking of something else I found when doing > > > > CONFIG_EXTRA_ENV_TEXT / CONFIG_EXTRA_ENV_SETTINGS stuff. > > > > > > > > > And what else is in the same situation as preboot? I just do not see > > > > > other variable which is defined two times. > > > > > > > > Right so it's all from include/env_default.h yes? CONFIG_EXTRA_ENV_TEXT > > > > and then CONFIG_EXTRA_ENV_SETTINGS win. And pretty much everything else > > > > in that file that has a CONFIG knob to it either has a different bit of > > > > Kconfig "fun" to avoid the situation PREBOOT has or is already in the > > > > same boat. > > > > > > > > > > A more generic approach to deal with this would be appreciated. > > > > > > > > Which is why I said this. How we're doing this right now isn't great > > > > and isn't super user friendly. I don't want to have to repeat the logic > > > > you do in 1/2 for all of the CONFIG options in env_default.h that aren't > > > > already converted to Kconfig. > > > > > > But this is how it is expressed in Kconfig (for string options). For > > > example in kernel there was recently fixes for specifying -mcpu powerpc > > > gcc option via Kconfig CONFIG_TARGET_CPU string option and there is also > > > corresponding Kconfig CONFIG_TARGET_CPU_BOOL option which has same > > > meaning as my *_DEFINED option. If you do not want to do it then do not > > > use Kconfig for those options. Generic better approach is to move these > > > settings out of the Kconfig, but this is something which you do not want > > > to do it. It is pretty simple, if you are going to use tool which is not > > > ideal or designed for some purpose then you need to deal with it. I just > > > described one example which I saw recently used in kernel. > > > > > > In my opinion, options which use, call or contains parts of u-boot > > > script should _not_ be in Kconfig; but rat
Re: [maemo-leste] Broken u-boot on n900 hw (possibly CONFIG_POSITION_INDEPENDENT)
On Sunday 20 November 2022 10:33:35 Tom Rini wrote: > On Sat, Nov 19, 2022 at 10:13:01PM +0100, Pali Rohár wrote: > > On Wednesday 09 November 2022 21:33:28 Pali Rohár wrote: > > > On Wednesday 02 November 2022 01:08:26 Pali Rohár wrote: > > > > On Friday 21 October 2022 21:09:55 Pali Rohár wrote: > > > > > On Thursday 20 October 2022 22:06:58 Pali Rohár wrote: > > > > > > On Monday 10 October 2022 23:30:21 Sicelo wrote: > > > > > > > On Sun, Oct 09, 2022 at 09:33:17PM +0200, Pali Rohár wrote: > > > > > > > > Hello! > > > > > > > > > > > > > > > > Current u-boot from master branch does not work on n900 hw. It > > > > > > > > does not > > > > > > > > show anything on display, there just nokia logo. > > > > > > > > > > > > > > > > In qemu it is working fine and all tests are passing. Also in > > > > > > > > qemu is > > > > > > > > display working without any problem. > > > > > > > > > > > > > > > > Could you help me to debug it? Maybe something is printed to > > > > > > > > serial > > > > > > > > console? Or maybe serial console could be used for > > > > > > > > printf-debugging? > > > > > > > > > > > > > > > > I just figured out that disabling CONFIG_POSITION_INDEPENDENT > > > > > > > > u-boot > > > > > > > > option make it working again. But it requires to restoring > > > > > > > > older version > > > > > > > > of lowlevel_init.S file which does not depend on > > > > > > > > POSITION_INDEPENDENT: > > > > > > > > > > > > > > > > git checkout 7c4ad9821758f98db127e9d6864671c906c02d3b -- > > > > > > > > board/nokia/rx51/lowlevel_init.S > > > > > > > > > > > > > > > > And also setting CONFIG_SYS_TEXT_BASE=0x80008000 (to some value > > > > > > > > in RAM). > > > > > > > > > > > > > > Hi > > > > > > > > > > > > > > I have a really crude serial console setup in place now, but very > > > > > > > little > > > > > > > time, and even less experience with u-boot. I should be able to > > > > > > > do the > > > > > > > tests for you on Saturday night (UTC+2). Perhaps over IRC might > > > > > > > be a > > > > > > > good idea, in case I need some hand-holding, and if you still > > > > > > > need the > > > > > > > help by then. > > > > > > > > > > > > > > Regards > > > > > > > Sicelo > > > > > > > > > > > > Well, I do not know where to start or how to instruct somebody who > > > > > > is > > > > > > not experienced with u-boot debugging. I think that the first step > > > > > > should be to look if U-Boot prints something on the serial console > > > > > > or > > > > > > not. If it prints then try to find via printf-driven-debugging place > > > > > > where it stuck. If it does not print anything on the console then > > > > > > try to > > > > > > setup debug early console, check if it prints something now and do > > > > > > same > > > > > > type of debugging. And if even early debug console does not work > > > > > > then > > > > > > probably initialize serial console directly in lowlevel_init.S file, > > > > > > prints something to serial, then move code for printing to later > > > > > > stage > > > > > > and try to figure out what is broken... > > > > > > > > > > Early debug uart console can be enabled by > > > > > configs/nokia_rx51_defconfig options: > > > > > > > > > > CONFIG_DEBUG_UART=y > > > > > CONFIG_DEBUG_UART_OMAP=y > > > > > CONFIG_DEBUG_UART_SHIFT=2 > > > > > CONFIG_DEBUG_UART_BASE=0x4902 > > > > > CONFIG_DEBUG_UART_CLOCK=4800 > > > > > > > > > > And all debug verbose logs can be enabled by > > > > > configs/nokia_rx51_defconfig options: > > > > > > > > > > CONFIG_DM_DEBUG=y > > > > > CONFIG_LOG=y > > > > > CONFIG_LOGLEVEL=9 > > > > > CONFIG_LOG_MAX_LEVEL=9 > > > > > CONFIG_LOG_DEFAULT_LEVEL=9 > > > > > > > > > > By compiling via 'make u-boot.bin KCPPFLAGS=-DLOG_DEBUG' > > > > > > > > Can somebody with serial console provide this debug output if there is > > > > something useful? > > > > > > Can somebody help me with this? > > > > Merlijn Wajer now sent me output from serial console: > > > > ... > > initcall: 0001ebd4 (relocated to 8fe0abd4) > > MMC: 0 > > - 0 'omap_hsmmc' > > - found > > 1 > > - 0 'omap_hsmmc' > > - 1 'omap_hsmmc' > > - found > > 2 > > - 0 'omap_hsmmc' > > - 1 'omap_hsmmc' > > - not found > > OMAP SD/MMC: 0, OMAP SD/MMC: 1 > > initcall: 0001ea8c (relocated to 8fe0aa8c) > > Loading Environment from ... Using default environment > > Destroy Hash Table: 8fe25a98 table = > > Create Hash Table: N=387 > > > > After the "Create Hash Table: N=387" line there is nothing more. > > Repeated tests have same result, always stop at that line. > > > > In qemu after that line I see following output: > > > > INSERT: table 8fe25a98, filled 1/389 rv 8fd0e2f4 ==> name="bootcmd" > > value="run sdboot;run emmcboot;run attachboot;echo" > > INSERT: table 8fe25a98, filled 2/389 rv 8fd0e344 ==> name="bootdelay" > > value="30" > > INSERT: table 8fe25a98, filled 3/389 rv 8fd0f960 ==> name="ba
Re: [PATCH v3 1/2] x86: fsp: Depend on DM_RTC
Hi Sean,
On Fri, Nov 18, 2022 at 5:16 AM Sean Anderson wrote:
>
> On 10/26/22 12:01, Sean Anderson wrote:
> > On 10/26/22 11:58, Sean Anderson wrote:
> >> On 10/25/22 20:52, Bin Meng wrote:
> >>> Hi Sean,
> >>>
> >>> On Wed, Oct 26, 2022 at 7:35 AM Simon Glass wrote:
>
> Hi,
>
> On Mon, 24 Oct 2022 at 22:57, Stefan Roese wrote:
> >
> > On 24.10.22 18:49, Bin Meng wrote:
> > > On Mon, Oct 24, 2022 at 11:42 PM Sean Anderson
> > > wrote:
> > >>
> > >> FSP support requires DM_RTC for rtc_write32. Select it.
> > >>
> > >> Fixes: ba65808e7d0 ("x86: fsp: Save stack address to CMOS for next
> > >> S3 boot")
> >>>
> >>> Please drop this "Fixes" tag.
> >>
> >> IMO the existing driver is buggy. I still have not gotten an answer
> >> about where the bug lies, but either
> >>
> >> - fsp_save_s3_stack is not called by SPL, in which case it should not be
> >> compiled in. this indicates a bug in ba65808e7d0 ("x86: fsp: save
> >> stack address to cmos for next s3 boot").
fsp_save_s3_stack() was originally introduced on the BayTrail
platform, and is not called by SPL. DM_RTC is implied by the x86 cpu
Kconfig so there is no build error.
> >> - fsp_save_s3_stack *is* called by SPL, but it is missing support for
> >> non-DM RTC. This indicates a bug in ba65808e7d0 ("x86: fsp: save stack
> >> address to cmos for next s3 boot"). If this is the case, this patch
> >> will break things.
There is no need to support non-DM RTC on x86. Lots of x86 U-Boot
codes were born to support DM on day 1.
> >
> > err, it won't break anything, because the existing code doesn't work, but
> > this patch doesn't address the problem.
> >
> >> - fsp_save_s3_stack *is* called by SPL, but it is expected that
> >> SPL_DM_RTC is selected by the defconfig. This indicates a bug in
> >> a1d6dc3f840 ("x86: Add chromebook_coral").
fsp_save_s3_stack() is not called by SPL, even on chromebook_coral.
Simon can you confirm?
>
> ping?
>
> Bin, do you know which of the above scenarios is correct?
>
So I don't think there is a bug anyway, either from build perspective
or runtime perspective.
Your fix of adding the explicit DM_RTC dependency to HAVE_FSP makes
sense. I was concerned about the use of the "Fixes" tag. I would
restrict the 'Fixes:' tag to real bug regressions, as it might help
downstream distributions to filter commits to cherry-pick.
In this particular use-case I would use an example like:
When adding the ACPI S3 support in commit ba65808e7d0 ("x86: fsp:
Save stack address to CMOS for next S3 boot"),
the dependency to RTC was expressed by x86 in arch/Kconfig. It
might be better to declare the dependency explicitly in HAVE_FSP.
Do it now.
Regards,
Bin
Re: [maemo-leste] Broken u-boot on n900 hw (possibly CONFIG_POSITION_INDEPENDENT)
On Sat, Nov 19, 2022 at 10:13:01PM +0100, Pali Rohár wrote: > On Wednesday 09 November 2022 21:33:28 Pali Rohár wrote: > > On Wednesday 02 November 2022 01:08:26 Pali Rohár wrote: > > > On Friday 21 October 2022 21:09:55 Pali Rohár wrote: > > > > On Thursday 20 October 2022 22:06:58 Pali Rohár wrote: > > > > > On Monday 10 October 2022 23:30:21 Sicelo wrote: > > > > > > On Sun, Oct 09, 2022 at 09:33:17PM +0200, Pali Rohár wrote: > > > > > > > Hello! > > > > > > > > > > > > > > Current u-boot from master branch does not work on n900 hw. It > > > > > > > does not > > > > > > > show anything on display, there just nokia logo. > > > > > > > > > > > > > > In qemu it is working fine and all tests are passing. Also in > > > > > > > qemu is > > > > > > > display working without any problem. > > > > > > > > > > > > > > Could you help me to debug it? Maybe something is printed to > > > > > > > serial > > > > > > > console? Or maybe serial console could be used for > > > > > > > printf-debugging? > > > > > > > > > > > > > > I just figured out that disabling CONFIG_POSITION_INDEPENDENT > > > > > > > u-boot > > > > > > > option make it working again. But it requires to restoring older > > > > > > > version > > > > > > > of lowlevel_init.S file which does not depend on > > > > > > > POSITION_INDEPENDENT: > > > > > > > > > > > > > > git checkout 7c4ad9821758f98db127e9d6864671c906c02d3b -- > > > > > > > board/nokia/rx51/lowlevel_init.S > > > > > > > > > > > > > > And also setting CONFIG_SYS_TEXT_BASE=0x80008000 (to some value > > > > > > > in RAM). > > > > > > > > > > > > Hi > > > > > > > > > > > > I have a really crude serial console setup in place now, but very > > > > > > little > > > > > > time, and even less experience with u-boot. I should be able to do > > > > > > the > > > > > > tests for you on Saturday night (UTC+2). Perhaps over IRC might be a > > > > > > good idea, in case I need some hand-holding, and if you still need > > > > > > the > > > > > > help by then. > > > > > > > > > > > > Regards > > > > > > Sicelo > > > > > > > > > > Well, I do not know where to start or how to instruct somebody who is > > > > > not experienced with u-boot debugging. I think that the first step > > > > > should be to look if U-Boot prints something on the serial console or > > > > > not. If it prints then try to find via printf-driven-debugging place > > > > > where it stuck. If it does not print anything on the console then try > > > > > to > > > > > setup debug early console, check if it prints something now and do > > > > > same > > > > > type of debugging. And if even early debug console does not work then > > > > > probably initialize serial console directly in lowlevel_init.S file, > > > > > prints something to serial, then move code for printing to later stage > > > > > and try to figure out what is broken... > > > > > > > > Early debug uart console can be enabled by configs/nokia_rx51_defconfig > > > > options: > > > > > > > > CONFIG_DEBUG_UART=y > > > > CONFIG_DEBUG_UART_OMAP=y > > > > CONFIG_DEBUG_UART_SHIFT=2 > > > > CONFIG_DEBUG_UART_BASE=0x4902 > > > > CONFIG_DEBUG_UART_CLOCK=4800 > > > > > > > > And all debug verbose logs can be enabled by > > > > configs/nokia_rx51_defconfig options: > > > > > > > > CONFIG_DM_DEBUG=y > > > > CONFIG_LOG=y > > > > CONFIG_LOGLEVEL=9 > > > > CONFIG_LOG_MAX_LEVEL=9 > > > > CONFIG_LOG_DEFAULT_LEVEL=9 > > > > > > > > By compiling via 'make u-boot.bin KCPPFLAGS=-DLOG_DEBUG' > > > > > > Can somebody with serial console provide this debug output if there is > > > something useful? > > > > Can somebody help me with this? > > Merlijn Wajer now sent me output from serial console: > > ... > initcall: 0001ebd4 (relocated to 8fe0abd4) > MMC: 0 > - 0 'omap_hsmmc' > - found > 1 > - 0 'omap_hsmmc' > - 1 'omap_hsmmc' > - found > 2 > - 0 'omap_hsmmc' > - 1 'omap_hsmmc' > - not found > OMAP SD/MMC: 0, OMAP SD/MMC: 1 > initcall: 0001ea8c (relocated to 8fe0aa8c) > Loading Environment from ... Using default environment > Destroy Hash Table: 8fe25a98 table = > Create Hash Table: N=387 > > After the "Create Hash Table: N=387" line there is nothing more. > Repeated tests have same result, always stop at that line. > > In qemu after that line I see following output: > > INSERT: table 8fe25a98, filled 1/389 rv 8fd0e2f4 ==> name="bootcmd" > value="run sdboot;run emmcboot;run attachboot;echo" > INSERT: table 8fe25a98, filled 2/389 rv 8fd0e344 ==> name="bootdelay" > value="30" > INSERT: table 8fe25a98, filled 3/389 rv 8fd0f960 ==> name="baudrate" > value="115200" > DELETE CANDIDATE: "preboot" > hdelete: DELETE key "preboot" > DELETE ERROR ## > INSERT: table 8fe25a98, filled 4/389 rv 8fd0e574 ==> name="loadaddr" > value="0x80008000" > ... > > In qemu is u-boot working fine. > > So it looks like that there is u-boot crash in environment code and on
Re: [PATCH] Enforce buffer boundaries on RNDIS USB Gadget
Szymon,
On Thu, Nov 17, 2022 at 4:46 PM Szymon Heidrich
wrote:
>
> Prevent access to arbitrary memory locations in gen_ndis_set_resp
> via manipulation of buf->InformationBufferOffset. Lack of validation
> of BufOffset could be exploited to dump arbitrary memory contents
> via NDIS packet filter.
>
> Signed-off-by: Szymon Heidrich
Please run ./scripts/get_maintainer.pl on your patch and copy the maintainers.
> ---
> drivers/usb/gadget/rndis.c | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c
> index 13c327ea38..3948f2cc9a 100644
> --- a/drivers/usb/gadget/rndis.c
> +++ b/drivers/usb/gadget/rndis.c
> @@ -855,14 +855,17 @@ static int rndis_set_response(int configNr,
> rndis_set_msg_type *buf)
> rndis_set_cmplt_type*resp;
> rndis_resp_t*r;
>
> + BufLength = get_unaligned_le32(&buf->InformationBufferLength);
> + BufOffset = get_unaligned_le32(&buf->InformationBufferOffset);
> + if ((BufOffset > RNDIS_MAX_TOTAL_SIZE - 8) ||
> + (BufLength > RNDIS_MAX_TOTAL_SIZE - 8 - BufOffset))
> + return -EINVAL;
> +
> r = rndis_add_response(configNr, sizeof(rndis_set_cmplt_type));
> if (!r)
> return -ENOMEM;
> resp = (rndis_set_cmplt_type *) r->buf;
>
> - BufLength = get_unaligned_le32(&buf->InformationBufferLength);
> - BufOffset = get_unaligned_le32(&buf->InformationBufferOffset);
> -
> #ifdef VERBOSE
> debug("%s: Length: %d\n", __func__, BufLength);
> debug("%s: Offset: %d\n", __func__, BufOffset);
> --
> 2.38.1
>
Re: [PATCH] Prevent buffer overflow on USB control endpoint
On 11/17/22 12:50, Fabio Estevam wrote:
[Adding Lukasz and Marek]
On Thu, Nov 17, 2022 at 6:50 AM Szymon Heidrich
wrote:
Assure that the control endpoint buffer of size USB_BUFSIZ (4096)
can not be overflown during handling of USB control transfer
requests with wLength greater than USB_BUFSIZ.
Signed-off-by: Szymon Heidrich
---
drivers/usb/gadget/composite.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 2a309e624e..cb89f6dca9 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1019,6 +1019,17 @@ composite_setup(struct usb_gadget *gadget, const struct
usb_ctrlrequest *ctrl)
u8 endp;
struct usb_configuration*c;
+ if (w_length > USB_BUFSIZ) {
+ if (ctrl->bRequestType & USB_DIR_IN) {
+ /* Cast away the const, we are going to overwrite on
purpose. */
+ __le16 *temp = (__le16 *)&ctrl->wLength;
+ *temp = cpu_to_le16(USB_BUFSIZ);
+ w_length = USB_BUFSIZ;
Won't this end up sending corrupted packets in case they are longer than
USB_BUFSIZ ?
Where do such long packets come from ?
What is the test-case ?
[PoC 156/241] global: Migrate CONFIG_PPC_SPINTABLE_COMPATIBLE to CFG
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++--
arch/powerpc/cpu/mpc85xx/release.S| 6 +++---
arch/powerpc/include/asm/config_mpc85xx.h | 2 +-
scripts/config_whitelist.txt | 2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 562d7074ed75..e5e00c5eade9 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -659,7 +659,7 @@ int cpu_init_r(void)
#ifdef CFG_SYS_LBC_LCRR
fsl_lbc_t *lbc = (void __iomem *)LBC_BASE_ADDR;
#endif
-#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
+#if defined(CFG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
extern int spin_table_compat;
const char *spin;
#endif
@@ -725,7 +725,7 @@ int cpu_init_r(void)
mtspr(SPRN_HDBCR0, (mfspr(SPRN_HDBCR0) | 0x8000));
#endif
-#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
+#if defined(CFG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
spin = env_get("spin_table_compat");
if (spin && (*spin == 'n'))
spin_table_compat = 0;
diff --git a/arch/powerpc/cpu/mpc85xx/release.S
b/arch/powerpc/cpu/mpc85xx/release.S
index 391751ce1e71..57cc4fda816c 100644
--- a/arch/powerpc/cpu/mpc85xx/release.S
+++ b/arch/powerpc/cpu/mpc85xx/release.S
@@ -356,7 +356,7 @@ __secondary_reset_vector:
.align L1_CACHE_SHIFT
.global __second_half_boot_page
__second_half_boot_page:
-#ifdef CONFIG_PPC_SPINTABLE_COMPATIBLE
+#ifdef CFG_PPC_SPINTABLE_COMPATIBLE
lis r3,(spin_table_compat - __second_half_boot_page)@h
ori r3,r3,(spin_table_compat - __second_half_boot_page)@l
add r3,r3,r11 /* r11 has the address of __second_half_boot_page */
@@ -404,7 +404,7 @@ __second_half_boot_page:
* "spin_table_compat=no". After Linux is fixed, we can remove this macro
* and related code. For now, it is enabled by default.
*/
-#ifdef CONFIG_PPC_SPINTABLE_COMPATIBLE
+#ifdef CFG_PPC_SPINTABLE_COMPATIBLE
cmpwi r14,0
beq 4f
dcbf0, r10
@@ -486,7 +486,7 @@ __second_half_boot_page:
__spin_table:
.space CONFIG_MAX_CPUS*ENTRY_SIZE
-#ifdef CONFIG_PPC_SPINTABLE_COMPATIBLE
+#ifdef CFG_PPC_SPINTABLE_COMPATIBLE
.align L1_CACHE_SHIFT
.global spin_table_compat
spin_table_compat:
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 4c19c50bda04..5491a1af2813 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -12,7 +12,7 @@
* This macro should be removed when we no longer care about backwards
* compatibility with older operating systems.
*/
-#define CONFIG_PPC_SPINTABLE_COMPATIBLE
+#define CFG_PPC_SPINTABLE_COMPATIBLE
#include
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 6b824bb14f39..0e792dfbec9c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -165,7 +165,7 @@ CFG_POSTBOOTMENU
CFG_POWER_LTC3676_I2C_ADDR
CFG_POWER_PFUZE100_I2C_ADDR
CFG_POWER_PFUZE3000_I2C_ADDR
-CONFIG_PPC_SPINTABLE_COMPATIBLE
+CFG_PPC_SPINTABLE_COMPATIBLE
CONFIG_PRAM
CONFIG_PSRAM_SCFG
CONFIG_QBMAN_CLK_DIV
--
2.25.1
[PoC 180/241] global: Migrate CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG
Signed-off-by: Tom Rini
---
drivers/net/sh_eth.c | 2 +-
include/configs/alt.h| 2 +-
include/configs/condor.h | 2 +-
include/configs/gose.h | 2 +-
include/configs/grpeach.h| 2 +-
include/configs/koelsch.h| 2 +-
include/configs/lager.h | 2 +-
include/configs/porter.h | 2 +-
include/configs/silk.h | 2 +-
include/configs/stout.h | 2 +-
scripts/config_whitelist.txt | 2 +-
11 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 0f91ad4128cd..38049b380d7c 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -48,7 +48,7 @@
#define flush_cache_wback(...)
#endif
-#if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
+#if defined(CFG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
#define invalidate_cache(addr, len)\
{ \
unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE; \
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 846e755f1b62..940169b42043 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -28,7 +28,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/condor.h b/include/configs/condor.h
index 6d7c788163d3..fa3edef9b300 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -18,7 +18,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 93157de470bd..e54f4b24e048 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 5b91e6ff039b..5ae17f70e909 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -21,7 +21,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
#endif /* __GRPEACH_H */
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index ff02a875013c..1d8aa6def88f 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 83e8705dfe76..bb8cc5fecb7a 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/porter.h b/include/configs/porter.h
index ec70c76f46b0..907cf29d0318 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -29,7 +29,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 4da7e7141336..7361daa27c49 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -29,7 +29,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/stout.h b/include/configs/stout.h
index a071d1425bb3..b60e363b2c7c 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -33,7 +33,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_M
[PoC 151/241] global: Migrate CONFIG_PME_PLAT_CLK_DIV to CFG
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/speed.c | 6 +++---
arch/powerpc/include/asm/config_mpc85xx.h | 8
scripts/config_whitelist.txt | 2 +-
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index eec071022e59..c2e3e00f7ba8 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -67,7 +67,7 @@ void get_sys_info(sys_info_t *sys_info)
[14] = 4, /* CC4 PPL / 4 */
};
uint i, freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
-#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
+#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CFG_PME_PLAT_CLK_DIV)
uint rcw_tmp;
#endif
uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
@@ -206,7 +206,7 @@ void get_sys_info(sys_info_t *sys_info)
#define FM1_CLK_SEL0x1c00
#define FM1_CLK_SHIFT 26
#endif
-#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
+#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CFG_PME_PLAT_CLK_DIV)
#if defined(CONFIG_ARCH_T1024)
rcw_tmp = in_be32(&gur->rcwsr[15]) - 4;
#else
@@ -215,7 +215,7 @@ void get_sys_info(sys_info_t *sys_info)
#endif
#ifdef CONFIG_SYS_DPAA_PME
-#ifndef CONFIG_PME_PLAT_CLK_DIV
+#ifndef CFG_PME_PLAT_CLK_DIV
switch ((rcw_tmp & PME_CLK_SEL) >> PME_CLK_SHIFT) {
case 1:
sys_info->freq_pme = freq_c_pll[CFG_SYS_PME_CLK];
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 24259f6470ae..4c19c50bda04 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -172,8 +172,8 @@
#define CONFIG_SYS_FSL_SRDS_1
#define CFG_SYS_NUM_FMAN 1
#define CFG_SYS_NUM_FM1_DTSEC 5
-#define CONFIG_PME_PLAT_CLK_DIV2
-#define CFG_SYS_PME_CLKCONFIG_PME_PLAT_CLK_DIV
+#define CFG_PME_PLAT_CLK_DIV 2
+#define CFG_SYS_PME_CLKCFG_PME_PLAT_CLK_DIV
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CFG_FM_PLAT_CLK_DIV1
#define CFG_SYS_FM1_CLKCFG_FM_PLAT_CLK_DIV
@@ -211,8 +211,8 @@
#define CFG_SYS_FSL_SRIO_OB_WIN_NUM9
#define CFG_SYS_FSL_SRIO_IB_WIN_NUM5
#endif
-#define CONFIG_PME_PLAT_CLK_DIV1
-#define CFG_SYS_PME_CLKCONFIG_PME_PLAT_CLK_DIV
+#define CFG_PME_PLAT_CLK_DIV 1
+#define CFG_SYS_PME_CLKCFG_PME_PLAT_CLK_DIV
#define CFG_SYS_FM1_CLK0
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CFG_SYS_FM_MURAM_SIZE 0x28000
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 390299fa0a8f..2b3e4a79a00c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -160,7 +160,7 @@ CFG_PHY_INTERFACE_MODE
CFG_PHY_IRAM_BASE
CFG_PL011_CLOCK
CFG_PL01x_PORTS
-CONFIG_PME_PLAT_CLK_DIV
+CFG_PME_PLAT_CLK_DIV
CONFIG_POST
CONFIG_POSTBOOTMENU
CONFIG_POST_EXTERNAL_WORD_FUNCS
--
2.25.1
[PoC 159/241] global: Migrate CONFIG_QBMAN_CLK_DIV to CFG
Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/speed.c | 6 +++--- arch/powerpc/include/asm/config_mpc85xx.h | 2 +- scripts/config_whitelist.txt | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index c2e3e00f7ba8..9af40310b46f 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -249,10 +249,10 @@ void get_sys_info(sys_info_t *sys_info) #endif #ifdef CONFIG_SYS_DPAA_QBMAN -#ifndef CONFIG_QBMAN_CLK_DIV -#define CONFIG_QBMAN_CLK_DIV 2 +#ifndef CFG_QBMAN_CLK_DIV +#define CFG_QBMAN_CLK_DIV 2 #endif - sys_info->freq_qman = sys_info->freq_systembus / CONFIG_QBMAN_CLK_DIV; + sys_info->freq_qman = sys_info->freq_systembus / CFG_QBMAN_CLK_DIV; #endif #if defined(CONFIG_SYS_MAPLE) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 5491a1af2813..0a67c76b61d6 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -192,7 +192,7 @@ #define CFG_FSL_FM_10GEC_REGULAR_NOTATION #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FM1_CLK0 -#define CONFIG_QBMAN_CLK_DIV 1 +#define CFG_QBMAN_CLK_DIV 1 #define CFG_SYS_FM_MURAM_SIZE 0x3 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define QE_MURAM_SIZE 0x6000UL diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 3ee3720b8876..2a06cc5d3041 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -168,7 +168,7 @@ CFG_POWER_PFUZE3000_I2C_ADDR CFG_PPC_SPINTABLE_COMPATIBLE CFG_PRAM CFG_PSRAM_SCFG -CONFIG_QBMAN_CLK_DIV +CFG_QBMAN_CLK_DIV CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE CONFIG_RAMDISK_ADDR -- 2.25.1
[PoC 153/241] global: Migrate CONFIG_POWER_LTC3676_I2C_ADDR to CFG
Signed-off-by: Tom Rini
---
board/gateworks/gw_ventana/gw_ventana_spl.c | 4 ++--
drivers/power/pmic/pmic_ltc3676.c | 2 +-
include/configs/gw_ventana.h| 2 +-
scripts/config_whitelist.txt| 6 ++
4 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c
b/board/gateworks/gw_ventana/gw_ventana_spl.c
index e85a00954cee..6ad994af1c64 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -851,8 +851,8 @@ void setup_pmic(void)
}
/* configure LTC3676 PMIC */
- else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) {
- debug("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR);
+ else if (!i2c_probe(CFG_POWER_LTC3676_I2C_ADDR)) {
+ debug("probed LTC3676@0x%x\n", CFG_POWER_LTC3676_I2C_ADDR);
power_ltc3676_init(i2c_pmic);
p = pmic_get("LTC3676_PMIC");
if (!p || pmic_probe(p))
diff --git a/drivers/power/pmic/pmic_ltc3676.c
b/drivers/power/pmic/pmic_ltc3676.c
index 00c3e201cd56..af94f37b0f10 100644
--- a/drivers/power/pmic/pmic_ltc3676.c
+++ b/drivers/power/pmic/pmic_ltc3676.c
@@ -23,7 +23,7 @@ int power_ltc3676_init(unsigned char bus)
p->name = name;
p->interface = PMIC_I2C;
p->number_of_regs = LTC3676_NUM_OF_REGS;
- p->hw.i2c.addr = CONFIG_POWER_LTC3676_I2C_ADDR;
+ p->hw.i2c.addr = CFG_POWER_LTC3676_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = bus;
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 4741d399590c..577322a5987d 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -31,7 +31,7 @@
* PMIC
*/
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
-#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
+#define CFG_POWER_LTC3676_I2C_ADDR 0x3c
/* Various command support */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2b3e4a79a00c..52a78f10cd52 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -161,10 +161,8 @@ CFG_PHY_IRAM_BASE
CFG_PL011_CLOCK
CFG_PL01x_PORTS
CFG_PME_PLAT_CLK_DIV
-CONFIG_POST
-CONFIG_POSTBOOTMENU
-CONFIG_POST_EXTERNAL_WORD_FUNCS
-CONFIG_POWER_LTC3676_I2C_ADDR
+CFG_POSTBOOTMENU
+CFG_POWER_LTC3676_I2C_ADDR
CONFIG_POWER_PFUZE100_I2C_ADDR
CONFIG_POWER_PFUZE3000_I2C_ADDR
CONFIG_PPC_SPINTABLE_COMPATIBLE
--
2.25.1
[PoC 152/241] global: Migrate CONFIG_POSTBOOTMENU to CFG
Signed-off-by: Tom Rini --- cmd/bootmenu.c | 4 ++-- include/configs/nokia_rx51.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c index 3340be16325b..e5a10f5d5c4d 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c @@ -577,8 +577,8 @@ cleanup: free(command); } -#ifdef CONFIG_POSTBOOTMENU - run_command(CONFIG_POSTBOOTMENU, 0); +#ifdef CFG_POSTBOOTMENU + run_command(CFG_POSTBOOTMENU, 0); #endif if (efi_ret != EFI_SUCCESS || cmd_ret != CMD_RET_SUCCESS) diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 96c23b5b5af7..5f4378f4c86f 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -127,7 +127,7 @@ "bootmenu_delay=30\0" \ "" -#define CONFIG_POSTBOOTMENU \ +#define CFG_POSTBOOTMENU \ "echo;" \ "echo Extra commands:;" \ "echo run sdboot - Boot from SD card slot.;" \ -- 2.25.1
[PoC 179/241] global: Migrate CONFIG_SH_ETHER_ALIGNE_SIZE to CFG
Signed-off-by: Tom Rini
---
drivers/net/sh_eth.c | 4 ++--
drivers/net/sh_eth.h | 16
include/configs/alt.h| 2 +-
include/configs/condor.h | 2 +-
include/configs/gose.h | 2 +-
include/configs/grpeach.h| 2 +-
include/configs/koelsch.h| 2 +-
include/configs/lager.h | 2 +-
include/configs/porter.h | 2 +-
include/configs/silk.h | 2 +-
include/configs/stout.h | 2 +-
scripts/config_whitelist.txt | 2 +-
12 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 1de3ff8add2c..0f91ad4128cd 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -43,7 +43,7 @@
!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
#define flush_cache_wback(addr, len)\
flush_dcache_range((unsigned long)addr, \
- (unsigned long)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE)))
+ (unsigned long)(addr + ALIGN(len, CFG_SH_ETHER_ALIGNE_SIZE)))
#else
#define flush_cache_wback(...)
#endif
@@ -51,7 +51,7 @@
#if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
#define invalidate_cache(addr, len)\
{ \
- unsigned long line_size = CONFIG_SH_ETHER_ALIGNE_SIZE; \
+ unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE; \
unsigned long start, end; \
\
start = (unsigned long)addr;\
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 520f7f732574..1c07610e1ac7 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -29,8 +29,8 @@
#endif /* defined(CONFIG_SH) */
/* base padding size is 16 */
-#ifndef CONFIG_SH_ETHER_ALIGNE_SIZE
-#define CONFIG_SH_ETHER_ALIGNE_SIZE 16
+#ifndef CFG_SH_ETHER_ALIGNE_SIZE
+#define CFG_SH_ETHER_ALIGNE_SIZE 16
#endif
/* Number of supported ports */
@@ -47,7 +47,7 @@
/* The size of the tx descriptor is determined by how much padding is used.
4, 20, or 52 bytes of padding can be used */
-#define TX_DESC_PADDING(CONFIG_SH_ETHER_ALIGNE_SIZE - 12)
+#define TX_DESC_PADDING(CFG_SH_ETHER_ALIGNE_SIZE - 12)
/* Tx descriptor. We always use 3 bytes of padding */
struct tx_desc_s {
@@ -62,9 +62,9 @@ struct tx_desc_s {
/* The size of the rx descriptor is determined by how much padding is used.
4, 20, or 52 bytes of padding can be used */
-#define RX_DESC_PADDING(CONFIG_SH_ETHER_ALIGNE_SIZE - 12)
+#define RX_DESC_PADDING(CFG_SH_ETHER_ALIGNE_SIZE - 12)
/* aligned cache line size */
-#define RX_BUF_ALIGNE_SIZE (CONFIG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32)
+#define RX_BUF_ALIGNE_SIZE (CFG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32)
/* Rx descriptor. We always use 4 bytes of padding */
struct rx_desc_s {
@@ -388,11 +388,11 @@ enum DMAC_M_BIT {
#endif
};
-#if CONFIG_SH_ETHER_ALIGNE_SIZE == 64
+#if CFG_SH_ETHER_ALIGNE_SIZE == 64
# define EMDR_DESC EDMR_DL1
-#elif CONFIG_SH_ETHER_ALIGNE_SIZE == 32
+#elif CFG_SH_ETHER_ALIGNE_SIZE == 32
# define EMDR_DESC EDMR_DL0
-#elif CONFIG_SH_ETHER_ALIGNE_SIZE == 16 /* Default */
+#elif CFG_SH_ETHER_ALIGNE_SIZE == 16 /* Default */
# define EMDR_DESC 0
#endif
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 6d530f6d24bc..846e755f1b62 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -29,7 +29,7 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_SH_ETHER_ALIGNE_SIZE64
+#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/condor.h b/include/configs/condor.h
index 819184996e69..6d7c788163d3 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -19,7 +19,7 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_SH_ETHER_ALIGNE_SIZE64
+#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 45f0ec6f6a0e..93157de470bd 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_SH_ETHER_ALIGNE_SIZE64
+#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index dd6b22de7bac..5b91e6ff039b 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -22,6 +22,6 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_SH_ETHER_ALIGNE_SIZE64
+#define CFG_SH_ETHER_ALIGNE_SIZE 64
#endif /* __GRPEACH_H */
diff --git
[PoC 171/241] global: Migrate CONFIG_SAR_REG to CFG
Signed-off-by: Tom Rini
---
arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 +-
arch/arm/mach-kirkwood/include/mach/soc.h | 2 +-
arch/arm/mach-mvebu/cpu.c | 4 ++--
arch/arm/mach-mvebu/include/mach/soc.h | 12 ++--
scripts/config_whitelist.txt| 2 +-
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
index 7f8e156a6bdc..67f0b3ec6772 100644
--- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
+++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
@@ -15,7 +15,7 @@
#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
/* TCLK Core Clock definition */
-#define CFG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(21)) ? \
+#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(21)) ? \
16667 : 2)
#endif /* _ASM_ARCH_KW88F6281_H */
diff --git a/arch/arm/mach-kirkwood/include/mach/soc.h
b/arch/arm/mach-kirkwood/include/mach/soc.h
index 5f545c6f4349..4a7efc50f67a 100644
--- a/arch/arm/mach-kirkwood/include/mach/soc.h
+++ b/arch/arm/mach-kirkwood/include/mach/soc.h
@@ -62,7 +62,7 @@
#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
-#define CONFIG_SAR_REG (KW_MPP_BASE + 0x0030)
+#define CFG_SAR_REG(KW_MPP_BASE + 0x0030)
#if defined (CONFIG_KW88F6281)
#include
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 9139df1ae248..329d13691f0e 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -83,7 +83,7 @@ u32 get_boot_device(void)
/*
* Now check the SAR register for the strapped boot-device
*/
- val = readl(CONFIG_SAR_REG);/* SAR - Sample At Reset */
+ val = readl(CFG_SAR_REG); /* SAR - Sample At Reset */
boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
switch (boot_device) {
@@ -197,7 +197,7 @@ void get_sar_freq(struct sar_freq_modes *sar_freq)
#if defined(CONFIG_ARMADA_375) || defined(CONFIG_ARMADA_MSYS)
val = readl(CFG_SAR2_REG); /* SAR - Sample At Reset */
#else
- val = readl(CONFIG_SAR_REG);/* SAR - Sample At Reset */
+ val = readl(CFG_SAR_REG); /* SAR - Sample At Reset */
#endif
freq = (val & SAR_CPU_FREQ_MASK) >> SAR_CPU_FREQ_OFFS;
#if defined(SAR2_CPU_FREQ_MASK)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h
b/arch/arm/mach-mvebu/include/mach/soc.h
index 1210d26c7461..6edd2e2d79c7 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -134,7 +134,7 @@
#if defined(CONFIG_ARMADA_375)
/* SAR values for Armada 375 */
-#define CONFIG_SAR_REG (MVEBU_REGISTER(0xe8200))
+#define CFG_SAR_REG(MVEBU_REGISTER(0xe8200))
#define CFG_SAR2_REG (MVEBU_REGISTER(0xe8204))
#define SAR_CPU_FREQ_OFFS 17
@@ -146,11 +146,11 @@
#define BOOT_FROM_UART 0x30
#define BOOT_FROM_SPI 0x38
-#define CFG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \
+#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(20)) ? \
2 : 16600)
#elif defined(CONFIG_ARMADA_38X)
/* SAR values for Armada 38x */
-#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600))
+#define CFG_SAR_REG(MVEBU_REGISTER(0x18600))
#define SAR_CPU_FREQ_OFFS 10
#define SAR_CPU_FREQ_MASK (0x1f << SAR_CPU_FREQ_OFFS)
@@ -169,11 +169,11 @@
#define BOOT_FROM_MMC 0x30
#define BOOT_FROM_MMC_ALT 0x31
-#define CFG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \
+#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(15)) ? \
2 : 25000)
#elif defined(CONFIG_ARMADA_MSYS)
/* SAR values for MSYS */
-#define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200)
+#define CFG_SAR_REG(MBUS_DFX_BASE + 0xf8200)
#define CFG_SAR2_REG (MBUS_DFX_BASE + 0xf8204)
#define SAR_CPU_FREQ_OFFS 18
@@ -191,7 +191,7 @@
#define CFG_SYS_TCLK 2 /* 200MHz */
#elif defined(CONFIG_ARMADA_XP)
/* SAR values for Armada XP */
-#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230))
+#define CFG_SAR_REG(MVEBU_REGISTER(0x18230))
#define CFG_SAR2_REG (MVEBU_REGISTER(0x18234))
#define SAR_CPU_FREQ_OFFS 21
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index ed50a507f270..bdb3b68f8c80 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -180,7 +180,7 @@ CFG_SANDBOX_ARCH
CFG_SANDBOX_SPI_MAX_BUS
CFG_SANDBOX_SPI_MAX_CS
CFG_SAR2_REG
-CONFIG_SAR_REG
+CFG_SAR_REG
CONFIG_SCIF_A
CONFIG_SCSI_DEV_LIST
CONFIG_SC_TIMER_CLK
--
2.25.1
[PoC 232/241] global: Migrate CONFIG_VAR_SIZE_SPL to CFG
Signed-off-by: Tom Rini --- include/configs/exynos5420-common.h | 2 +- scripts/config_whitelist.txt| 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 791ad154242e..0eefa1867a3b 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_EXYNOS5420_H #define __CONFIG_EXYNOS5420_H -#define CONFIG_VAR_SIZE_SPL +#define CFG_VAR_SIZE_SPL #define CFG_IRAM_TOP 0x02074000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c5c22db16c1c..00973c35313c 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -246,7 +246,7 @@ CFG_USB_EXT2_BOOT CFG_USB_FAT_BOOT CFG_USB_ISP1301_I2C_ADDR CFG_U_BOOT_HDR_SIZE -CONFIG_VAR_SIZE_SPL +CFG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM CONFIG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE -- 2.25.1
[PoC 228/241] global: Migrate CONFIG_USB_EXT2_BOOT to CFG
Signed-off-by: Tom Rini --- include/configs/p1_p2_rdb_pc.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 2dc271771615..19e20de248a2 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -472,7 +472,7 @@ RST_DEF_CMD(defboot) \ "fatload usb 0:2 $ramdiskaddr $ramdiskfile;" \ "bootm $loadaddr $ramdiskaddr $fdtaddr" -#define CONFIG_USB_EXT2_BOOT \ +#define CFG_USB_EXT2_BOOT \ "setenv bootargs root=/dev/ram rw "\ "console=$consoledev,$baudrate $othbootargs " \ "ramdisk_size=$ramdisk_size;" \ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 16d64d1cd3c3..1fc2e1cc51d1 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -242,7 +242,7 @@ CFG_USART_BASE CFG_USART_ID CFG_USBD_HS CFG_USB_BOOTING -CONFIG_USB_EXT2_BOOT +CFG_USB_EXT2_BOOT CONFIG_USB_FAT_BOOT CONFIG_USB_ISP1301_I2C_ADDR CONFIG_U_BOOT_HDR_SIZE -- 2.25.1
[PoC 240/241] global: Migrate CONFIG_X86_REFCODE_RUN_ADDR to CFG
Signed-off-by: Tom Rini
---
arch/x86/cpu/broadwell/refcode.c | 4 ++--
include/configs/x86-chromebook.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c
index 3b7ec2b74e8e..df2df7972e98 100644
--- a/arch/x86/cpu/broadwell/refcode.c
+++ b/arch/x86/cpu/broadwell/refcode.c
@@ -99,7 +99,7 @@ static int cpu_run_reference_code(void)
pei_data->saved_data = (void *)&dummy;
src = (char *)hdr + hdr->payload_begin_offset;
- dest = (char *)CONFIG_X86_REFCODE_RUN_ADDR;
+ dest = (char *)CFG_X86_REFCODE_RUN_ADDR;
size = hdr->payload_end_offset - hdr->payload_begin_offset;
debug("Copying refcode from %p to %p, size %x\n", src, dest, size);
@@ -112,7 +112,7 @@ static int cpu_run_reference_code(void)
func = (asmlinkage int (*)(void *))dest;
debug("Running reference code at %p\n", func);
#ifdef DEBUG
- print_buffer(CONFIG_X86_REFCODE_RUN_ADDR, (void *)func, 1, 0x40, 0);
+ print_buffer(CFG_X86_REFCODE_RUN_ADDR, (void *)func, 1, 0x40, 0);
#endif
ret = func(pei_data);
if (ret != 0) {
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index fa45bf809700..98a537141deb 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -8,7 +8,7 @@
#define CFG_X86_MRC_ADDR 0xfffa
#define CFG_X86_REFCODE_ADDR 0xffea
-#define CONFIG_X86_REFCODE_RUN_ADDR0
+#define CFG_X86_REFCODE_RUN_ADDR 0
#define VIDEO_IO_OFFSET0
#define CFG_X86EMU_RAW_IO
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2895dd09bfcf..1a57607fccf7 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -255,4 +255,4 @@ CFG_WATCHDOG_RC
CFG_X86EMU_RAW_IO
CFG_X86_MRC_ADDR
CFG_X86_REFCODE_ADDR
-CONFIG_X86_REFCODE_RUN_ADDR
+CFG_X86_REFCODE_RUN_ADDR
--
2.25.1
[PoC 236/241] global: Migrate CONFIG_WATCHDOG_RC to CFG
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/cpu.c | 2 +-
include/configs/kmcent2.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 68c3b1f98b8c..e8a3e82765fc 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -357,7 +357,7 @@ void
init_85xx_watchdog(void)
{
mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WATCHDOG_MASK) |
- TCR_WP(CFG_WATCHDOG_PRESC) | TCR_WRC(CONFIG_WATCHDOG_RC));
+ TCR_WP(CFG_WATCHDOG_PRESC) | TCR_WRC(CFG_WATCHDOG_RC));
}
void
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 191ef7bb2870..8e76924e8f0d 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -378,7 +378,7 @@ int get_scl(void);
* Hardware Watchdog
*/
#define CFG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) ~10min */
-#define CONFIG_WATCHDOG_RC WRC_CHIP/* reset chip on watchdog event */
+#define CFG_WATCHDOG_RC WRC_CHIP /* reset chip on watchdog event */
/*
* For booting Linux, the board info and command line data
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 29c5ad21d3ef..c0bfa41ab9d8 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -251,7 +251,7 @@ CFG_VERY_BIG_RAM
CFG_VSC7385_IMAGE
CFG_VSC7385_IMAGE_SIZE
CFG_WATCHDOG_PRESC
-CONFIG_WATCHDOG_RC
+CFG_WATCHDOG_RC
CONFIG_WATCHDOG_TIMEOUT
CONFIG_X86EMU_RAW_IO
CONFIG_X86_MRC_ADDR
--
2.25.1
[PoC 234/241] global: Migrate CONFIG_VSC7385_IMAGE to CFG
Signed-off-by: Tom Rini
---
board/freescale/mpc837xerdb/mpc837xerdb.c | 6 +++---
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
include/configs/MPC837XERDB.h | 4 ++--
include/configs/p1_p2_rdb_pc.h | 2 +-
scripts/config_whitelist.txt| 4 ++--
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c
b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 8b1bfe0a9f91..97884a397964 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -206,9 +206,9 @@ int misc_init_r(void)
{
int rc = 0;
-#ifdef CONFIG_VSC7385_IMAGE
- if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
- CONFIG_VSC7385_IMAGE_SIZE)) {
+#ifdef CFG_VSC7385_IMAGE
+ if (vsc7385_upload_firmware((void *) CFG_VSC7385_IMAGE,
+ CFG_VSC7385_IMAGE_SIZE)) {
puts("Failure uploading VSC7385 microcode.\n");
rc = 1;
}
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index f9eea1ad9c58..ecdf731ddf83 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -355,7 +355,7 @@ int board_early_init_r(void)
vscfw_addr = hextoul(tmp, NULL);
printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
if (vsc7385_upload_firmware((void *)vscfw_addr,
- CONFIG_VSC7385_IMAGE_SIZE))
+ CFG_VSC7385_IMAGE_SIZE))
puts("Failure uploading VSC7385 microcode.\n");
} else {
puts("No address specified for VSC7385 microcode.\n");
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 13406cfa547b..1b24d7983b3d 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -44,8 +44,8 @@
#define CFG_TSEC2
/* The flash address and size of the VSC7385 firmware image */
-#define CONFIG_VSC7385_IMAGE 0xFE7FE000
-#define CONFIG_VSC7385_IMAGE_SIZE 8192
+#define CFG_VSC7385_IMAGE 0xFE7FE000
+#define CFG_VSC7385_IMAGE_SIZE 8192
#endif
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 9790b0ac896c..14d8f6c1c6d7 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -276,7 +276,7 @@
#endif
/* The size of the VSC7385 firmware image */
-#define CONFIG_VSC7385_IMAGE_SIZE 8192
+#define CFG_VSC7385_IMAGE_SIZE 8192
#endif
#ifndef __VSCFW_ADDR
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 9b67ea892eb1..2e217a15b300 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -248,8 +248,8 @@ CFG_USB_ISP1301_I2C_ADDR
CFG_U_BOOT_HDR_SIZE
CFG_VAR_SIZE_SPL
CFG_VERY_BIG_RAM
-CONFIG_VSC7385_IMAGE
-CONFIG_VSC7385_IMAGE_SIZE
+CFG_VSC7385_IMAGE
+CFG_VSC7385_IMAGE_SIZE
CONFIG_WATCHDOG_PRESC
CONFIG_WATCHDOG_RC
CONFIG_WATCHDOG_TIMEOUT
--
2.25.1
[PoC 231/241] global: Migrate CONFIG_U_BOOT_HDR_SIZE to CFG
Signed-off-by: Tom Rini --- board/freescale/common/fsl_chain_of_trust.c | 2 +- drivers/mtd/nand/raw/fsl_ifc_spl.c | 2 +- include/configs/T104xRDB.h | 4 ++-- include/configs/ls1021atsn.h| 6 +++--- include/configs/ls1021atwr.h| 6 +++--- include/configs/ls1043a_common.h| 8 include/configs/ls1046a_common.h| 2 +- include/configs/ls1088a_common.h| 2 +- scripts/config_whitelist.txt| 2 +- 9 files changed, 17 insertions(+), 17 deletions(-) diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index 9ca350ed4689..9e0e61e0bac7 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -143,7 +143,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) (image_entry_noargs_t)(unsigned long)spl_image->entry_point; hdr_addr = (spl_image->entry_point + spl_image->size - - CONFIG_U_BOOT_HDR_SIZE); + CFG_U_BOOT_HDR_SIZE); spl_validate_uboot(hdr_addr, (uintptr_t)spl_image->entry_point); /* * In case of failure in validation, spl_validate_uboot would diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c index 3b464ce10ce9..2df63c5fc3ee 100644 --- a/drivers/mtd/nand/raw/fsl_ifc_spl.c +++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c @@ -281,7 +281,7 @@ void nand_boot(void) #define CONFIG_U_BOOT_HDR_ADDR \ ((CFG_SYS_NAND_U_BOOT_START + \ CFG_SYS_NAND_U_BOOT_SIZE) - \ -CONFIG_U_BOOT_HDR_SIZE) +CFG_U_BOOT_HDR_SIZE) spl_validate_uboot(CONFIG_U_BOOT_HDR_ADDR, CFG_SYS_NAND_U_BOOT_START); /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 7b9669a6eb98..4691e99c8b82 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -20,13 +20,13 @@ #ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +#define CFG_U_BOOT_HDR_SIZE(16 << 10) /* * HDR would be appended at end of image and copied to DDR along * with U-Boot image. */ #define CFG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + \ -CONFIG_U_BOOT_HDR_SIZE) +CFG_U_BOOT_HDR_SIZE) #else #define CFG_SYS_NAND_U_BOOT_SIZE (768 << 10) #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index d4855819bd7f..728b1a08fafd 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -40,17 +40,17 @@ #ifdef CONFIG_SD_BOOT #ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +#define CFG_U_BOOT_HDR_SIZE(16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#ifdef CONFIG_U_BOOT_HDR_SIZE +#ifdef CFG_U_BOOT_HDR_SIZE /* * HDR would be appended at end of image and copied to DDR along * with U-Boot image. Here u-boot max. size is 512K. So if binary * size increases then increase this size in case of secure boot as * it uses raw U-Boot image instead of FIT image. */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ +#endif /* ifdef CFG_U_BOOT_HDR_SIZE */ #endif #define PHYS_SDRAM 0x8000 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 128d80f48062..506f5ff1d10b 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -43,17 +43,17 @@ * HDR would be appended at end of image and copied to DDR along * with U-Boot image. */ -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +#define CFG_U_BOOT_HDR_SIZE(16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#ifdef CONFIG_U_BOOT_HDR_SIZE +#ifdef CFG_U_BOOT_HDR_SIZE /* * HDR would be appended at end of image and copied to DDR along * with U-Boot image. Here u-boot max. size is 512K. So if binary * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ +#endif /* ifdef CFG_U_BOOT_HDR_SIZE */ #endif #define PHYS_SDRAM 0x8000 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index c79e113db4e4..674aa7e7cf40 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -45,7 +45,7 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT #ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +#define CFG_U_BOOT_HDR_SIZE(16 << 10) /* * HDR would be appended at end of image and copied to DDR along * with U-Boot image. Here u-boot max. size is 512K. So if binary @@ -61,17 +61,17 @@ #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #ifde
[PoC 230/241] global: Migrate CONFIG_USB_ISP1301_I2C_ADDR to CFG
Signed-off-by: Tom Rini
---
drivers/usb/host/ohci-lpc32xx.c | 2 +-
include/configs/devkit3250.h| 2 +-
scripts/config_whitelist.txt| 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c
index 3be0b311a36e..a04b2961b961 100644
--- a/drivers/usb/host/ohci-lpc32xx.c
+++ b/drivers/usb/host/ohci-lpc32xx.c
@@ -69,7 +69,7 @@ struct otg_regs {
#define OTG1_DM_PULLDOWN (1 << 3)
#define OTG1_VBUS_DRV (1 << 5)
-#define ISP1301_I2C_ADDR CONFIG_USB_ISP1301_I2C_ADDR
+#define ISP1301_I2C_ADDR CFG_USB_ISP1301_I2C_ADDR
#define ISP1301_I2C_MODE_CONTROL_1_SET 0x04
#define ISP1301_I2C_MODE_CONTROL_1_CLR 0x05
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 9cfee381d4ac..d85aeaafe519 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -53,7 +53,7 @@
/*
* USB
*/
-#define CONFIG_USB_ISP1301_I2C_ADDR0x2d
+#define CFG_USB_ISP1301_I2C_ADDR 0x2d
/*
* U-Boot General Configurations
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 21ab949e0d20..ea722d3e2798 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -244,7 +244,7 @@ CFG_USBD_HS
CFG_USB_BOOTING
CFG_USB_EXT2_BOOT
CFG_USB_FAT_BOOT
-CONFIG_USB_ISP1301_I2C_ADDR
+CFG_USB_ISP1301_I2C_ADDR
CONFIG_U_BOOT_HDR_SIZE
CONFIG_VAR_SIZE_SPL
CONFIG_VERY_BIG_RAM
--
2.25.1
[PoC 241/241] Empty config_whitelist.txt
Signed-off-by: Tom Rini --- scripts/config_whitelist.txt | 258 --- 1 file changed, 258 deletions(-) diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 1a57607fccf7..e69de29bb2d1 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1,258 +0,0 @@ -CFG_ARM_GIC_BASE_ADDRESS -CFG_BOARDDIR -CFG_DFU_ALT -CFG_DFU_ALT_BOOT_EMMC -CFG_DFU_ALT_BOOT_SD -CFG_DFU_ALT_SYSTEM -CFG_DFU_ENV_SETTINGS -CFG_DM9000_BASE -CFG_DM9000_BYTE_SWAPPED -CFG_DM9000_NO_SROM -CFG_DM9000_USE_16BIT -CFG_DW_WDT_CLOCK_KHZ -CFG_ENV_FLAGS_LIST_STATIC -CFG_ENV_IS_EMBEDDED -CFG_ENV_SETTINGS_BUTTONS_AND_LEDS -CFG_ENV_SETTINGS_NAND_V1 -CFG_ENV_SETTINGS_NAND_V2 -CFG_ENV_SETTINGS_V1 -CFG_ENV_SETTINGS_V2 -CFG_ENV_SROM_BANK -CFG_ENV_TOTAL_SIZE -CFG_ET1100_BASE -CFG_ETHBASE -CFG_EXTRA_ENV_SETTINGS -CFG_FB_ADDR -CFG_FDTADDR -CFG_FDTFILE -CFG_FEC_ENET_DEV -CFG_FEC_FIXED_SPEED -CFG_FEC_MXC_PHYADDR -CFG_FLASH_BR_PRELIM -CFG_FLASH_OR_PRELIM -CFG_FLASH_SECTOR_SIZE -CFG_FLASH_SHOW_PROGRESS -CFG_FLASH_SPANSION_S29WS_N -CFG_FLASH_VERIFY -CFG_FM_PLAT_CLK_DIV -CFG_FSL_CPLD -CFG_FSL_ESDHC_PIN_MUX -CFG_FSL_FM_10GEC_REGULAR_NOTATION -CFG_FSL_ISBC_KEY_EXT -CFG_FSL_PMIC_BITLEN -CFG_FSL_PMIC_BUS -CFG_FSL_PMIC_CLK -CFG_FSL_PMIC_CS -CFG_FSL_PMIC_MODE -CFG_FSL_SDHC_V2_3 -CFG_FSL_SERDES1 -CFG_FSL_SERDES2 -CFG_GATEWAYIP -CFG_GMII -CFG_G_DNL_THOR_PRODUCT_NUM -CFG_G_DNL_THOR_VENDOR_NUM -CFG_G_DNL_UMS_PRODUCT_NUM -CFG_G_DNL_UMS_VENDOR_NUM -CFG_HDMI_ENCODER_I2C_ADDR -CFG_HOSTNAME -CFG_HSMMC2_8BIT -CFG_HW_ENV_SETTINGS -CFG_I2C_ENV_EEPROM_BUS -CFG_I2C_MULTI_BUS -CFG_I2C_MVTWSI -CFG_I2C_MVTWSI_BASE0 -CFG_I2C_MVTWSI_BASE1 -CFG_I2C_RTC_ADDR -CFG_ICS307_REFCLK_HZ -CFG_IMX6_PWM_PER_CLK -CFG_IPADDR -CFG_IRAM_BASE -CFG_IRAM_END -CFG_IRAM_SIZE -CFG_IRAM_TOP -CFG_KM_DEF_ARCH -CFG_KM_DEF_BOOT_ARGS_CPU -CFG_KM_DEF_ENV -CFG_KM_DEF_ENV_BOOTARGS -CFG_KM_DEF_ENV_BOOTPARAMS -CFG_KM_DEF_ENV_BOOTTARGETS -CFG_KM_DEF_ENV_CONSTANTS -CFG_KM_DEF_ENV_CPU -CFG_KM_DEF_ENV_FLASH_BOOT -CFG_KM_DEV_ENV_FLASH_BOOT_UBI -CFG_KM_ECC_MODE -CFG_KM_NEW_ENV -CFG_KM_UBI_LINUX_MTD -CFG_KM_UBI_PARTITION_NAME_APP -CFG_KM_UBI_PARTITION_NAME_BOOT -CFG_KM_UBI_PART_BOOT_OPTS -CFG_KM_UIMAGE_NAME -CFG_KSNET_CPSW_NUM_PORTS -CFG_KSNET_MAC_ID_BASE -CFG_KSNET_MDIO_PHY_CONFIG_ENABLE -CFG_KSNET_NETCP_BASE -CFG_KSNET_NETCP_V1_0 -CFG_KSNET_NETCP_V1_5 -CFG_KSNET_SERDES_LANES_PER_SGMII -CFG_KSNET_SERDES_SGMII2_BASE -CFG_KSNET_SERDES_SGMII_BASE -CFG_L1_INIT_RAM -CFG_L2_CACHE -CFG_LEGACY_BOOTCMD_ENV -CFG_LOWPOWER_ADDR -CFG_LOWPOWER_FLAG -CFG_LPC32XX_NAND_MLC_BUSY_DELAY -CFG_LPC32XX_NAND_MLC_NAND_TA -CFG_LPC32XX_NAND_MLC_RD_HIGH -CFG_LPC32XX_NAND_MLC_RD_LOW -CFG_LPC32XX_NAND_MLC_TCEA_DELAY -CFG_LPC32XX_NAND_MLC_WR_HIGH -CFG_LPC32XX_NAND_MLC_WR_LOW -CFG_LPC32XX_NAND_SLC_RDR_CLKS -CFG_LPC32XX_NAND_SLC_RHOLD -CFG_LPC32XX_NAND_SLC_RSETUP -CFG_LPC32XX_NAND_SLC_RWIDTH -CFG_LPC32XX_NAND_SLC_WDR_CLKS -CFG_LPC32XX_NAND_SLC_WHOLD -CFG_LPC32XX_NAND_SLC_WSETUP -CFG_LPC32XX_NAND_SLC_WWIDTH -CFG_MACB_SEARCH_PHY -CFG_MALLOC_F_ADDR -CFG_MALTA -CFG_MAX_DSP_CPUS -CFG_MAX_MEM_MAPPED -CFG_MAX_RAM_BANK_SIZE -CFG_MEMSIZE_IN_BYTES -CFG_MEM_INIT_VALUE -CFG_MFG_ENV_SETTINGS -CFG_MII_DEFAULT_TSEC -CFG_MIU_2BIT_21_7_INTERLEAVED -CFG_MIU_2BIT_INTERLEAVED -CFG_MMC_DEFAULT_DEV -CFG_MMC_SUNXI_SLOT -CFG_MONITOR_IS_IN_RAM -CFG_MTD_NAND_VERIFY_WRITE -CFG_MVGBE_PORTS -CFG_MXC_GPT_HCLK -CFG_MXC_NAND_HWECC -CFG_MXC_NAND_IP_REGS_BASE -CFG_MXC_NAND_REGS_BASE -CFG_MXC_UART_BASE -CFG_MXC_USB_FLAGS -CFG_MXC_USB_PORT -CFG_MXC_USB_PORTSC -CFG_NAND_6BYTES_OOB_FREE_10BYTES_ECC -CFG_NAND_CS_INIT -CFG_NETDEV -CFG_NETMASK -CFG_NORBOOT -CFG_NUM_DSP_CPUS -CFG_ODROID_REV_AIN -CFG_OTHBOOTARGS -CFG_OVERWRITE_ETHADDR_ONCE -CFG_PCIE_IMX_PERST_GPIO -CFG_PCIE_IMX_POWER_GPIO -CFG_PEN_ADDR_BIG_ENDIAN -CFG_PHY_BASE_ADR -CFG_PHY_ET1011C_TX_CLK_FIX -CFG_PHY_ID -CFG_PHY_INTERFACE_MODE -CFG_PHY_IRAM_BASE -CFG_PL011_CLOCK -CFG_PL01x_PORTS -CFG_PME_PLAT_CLK_DIV -CFG_POSTBOOTMENU -CFG_POWER_LTC3676_I2C_ADDR -CFG_POWER_PFUZE100_I2C_ADDR -CFG_POWER_PFUZE3000_I2C_ADDR -CFG_PPC_SPINTABLE_COMPATIBLE -CFG_PRAM -CFG_PSRAM_SCFG -CFG_QBMAN_CLK_DIV -CFG_RAMBOOT_SPIFLASH -CFG_RAMBOOT_TEXT_BASE -CFG_RAMDISK_ADDR -CFG_RD_LVL -CFG_RESET_VECTOR_ADDRESS -CFG_ROCKCHIP_SDHCI_MAX_FREQ -CFG_ROOTPATH -CFG_SANDBOX_ARCH -CFG_SANDBOX_SPI_MAX_BUS -CFG_SANDBOX_SPI_MAX_CS -CFG_SAR2_REG -CFG_SAR_REG -CFG_SCIF_A -CFG_SCSI_DEV_LIST -CFG_SC_TIMER_CLK -CFG_SERIAL_BOOT -CFG_SERVERIP -CFG_SETUP_INITRD_TAG -CFG_SET_DFU_ALT_BUF_LEN -CFG_SH_ETHER_ALIGNE_SIZE -CFG_SH_ETHER_CACHE_INVALIDATE -CFG_SH_ETHER_CACHE_WRITEBACK -CFG_SH_ETHER_PHY_ADDR -CFG_SH_ETHER_PHY_MODE -CFG_SH_ETHER_USE_PORT -CFG_SH_QSPI_BASE -CFG_SLIC -CFG_SMDK5420 -CFG_SMP_PEN_ADDR -CFG_SOCRATES -CFG_SPI_ADDR -CFG_SPI_BOOTING -CFG_SPI_FLASH_QUAD -CFG_SPI_FLASH_SIZE -CFG_SPI_HALF_DUPLEX -CFG_SPI_N25Q256A_RESET -CFG_STACKBASE -CFG_STANDALONE_LOAD_ADDR -CFG_STD_DEVICES_SETTINGS -CFG_TEGRA_BOARD_STRING -CFG_TEGRA_ENABLE_UARTA -CFG_TEGRA_ENABLE_UARTD -CFG_TEGRA_SLINK_CTRLS -CFG_TEGRA_SPI -CFG_TEG
[PoC 227/241] global: Migrate CONFIG_USB_BOOTING to CFG
Signed-off-by: Tom Rini --- arch/arm/mach-exynos/spl_boot.c | 6 +++--- include/configs/exynos5-common.h | 2 +- scripts/config_whitelist.txt | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c index 83bdee9f8579..d3eabef0e801 100644 --- a/arch/arm/mach-exynos/spl_boot.c +++ b/arch/arm/mach-exynos/spl_boot.c @@ -78,7 +78,7 @@ void *get_irom_func(int index) return (void *)*(u32 *)irom_ptr_table[index]; } -#ifdef CONFIG_USB_BOOTING +#ifdef CFG_USB_BOOTING /* * Set/clear program flow prediction and return the previous state. */ @@ -227,7 +227,7 @@ void copy_uboot_to_ram(void) u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst); void (*end_bootop_from_emmc)(void); #endif -#ifdef CONFIG_USB_BOOTING +#ifdef CFG_USB_BOOTING int is_cr_z_set; unsigned int sec_boot_check; @@ -271,7 +271,7 @@ void copy_uboot_to_ram(void) end_bootop_from_emmc(); break; #endif -#ifdef CONFIG_USB_BOOTING +#ifdef CFG_USB_BOOTING case BOOT_MODE_USB: /* * iROM needs program flow prediction to be disabled diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index e8236a9ec418..b91e2614e8d5 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -58,7 +58,7 @@ /* USB */ /* USB boot mode */ -#define CONFIG_USB_BOOTING +#define CFG_USB_BOOTING #define EXYNOS_COPY_USB_FNPTR_ADDR 0x02020070 #define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002 #define EXYNOS_IRAM_SECONDARY_BASE 0x02020018 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2c7beda9248d..16d64d1cd3c3 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -241,7 +241,7 @@ CFG_UEC_ETH CFG_USART_BASE CFG_USART_ID CFG_USBD_HS -CONFIG_USB_BOOTING +CFG_USB_BOOTING CONFIG_USB_EXT2_BOOT CONFIG_USB_FAT_BOOT CONFIG_USB_ISP1301_I2C_ADDR -- 2.25.1
[PoC 239/241] global: Migrate CONFIG_X86_REFCODE_ADDR to CFG
Signed-off-by: Tom Rini
---
arch/x86/cpu/broadwell/refcode.c | 2 +-
arch/x86/dts/u-boot.dtsi | 2 +-
include/configs/x86-chromebook.h | 2 +-
scripts/config_whitelist.txt | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c
index 94c2e05346a6..3b7ec2b74e8e 100644
--- a/arch/x86/cpu/broadwell/refcode.c
+++ b/arch/x86/cpu/broadwell/refcode.c
@@ -78,7 +78,7 @@ static int cpu_run_reference_code(void)
int ret, dummy;
int size;
- hdr = (struct rmodule_header *)CONFIG_X86_REFCODE_ADDR;
+ hdr = (struct rmodule_header *)CFG_X86_REFCODE_ADDR;
debug("Extracting code from rmodule at %p\n", hdr);
if (hdr->magic != RMODULE_MAGIC) {
debug("Invalid rmodule magic\n");
diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
index 454efc17614e..e0de33180910 100644
--- a/arch/x86/dts/u-boot.dtsi
+++ b/arch/x86/dts/u-boot.dtsi
@@ -149,7 +149,7 @@
#endif
#ifdef CONFIG_HAVE_REFCODE
intel-refcode {
- offset = ;
+ offset = ;
};
#endif
#ifdef CONFIG_TPL
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index 7d93dcbfc2e5..fa45bf809700 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -7,7 +7,7 @@
#define _X86_CHROMEBOOK_H
#define CFG_X86_MRC_ADDR 0xfffa
-#define CONFIG_X86_REFCODE_ADDR0xffea
+#define CFG_X86_REFCODE_ADDR 0xffea
#define CONFIG_X86_REFCODE_RUN_ADDR0
#define VIDEO_IO_OFFSET0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 66173404901d..2895dd09bfcf 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -254,5 +254,5 @@ CFG_WATCHDOG_PRESC
CFG_WATCHDOG_RC
CFG_X86EMU_RAW_IO
CFG_X86_MRC_ADDR
-CONFIG_X86_REFCODE_ADDR
+CFG_X86_REFCODE_ADDR
CONFIG_X86_REFCODE_RUN_ADDR
--
2.25.1
[PoC 238/241] global: Migrate CONFIG_X86_MRC_ADDR to CFG
Signed-off-by: Tom Rini
---
arch/x86/cpu/intel_common/mrc.c | 2 +-
arch/x86/dts/u-boot.dtsi | 2 +-
include/configs/x86-chromebook.h | 2 +-
scripts/config_whitelist.txt | 3 ++-
tools/binman/binman.rst | 2 +-
5 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c
index a4918fbad61a..69405d740b47 100644
--- a/arch/x86/cpu/intel_common/mrc.c
+++ b/arch/x86/cpu/intel_common/mrc.c
@@ -200,7 +200,7 @@ static int sdram_initialise(struct udevice *dev, struct
udevice *me_dev,
debug("PEI data at %p:\n", pei_data);
- data = (char *)CONFIG_X86_MRC_ADDR;
+ data = (char *)CFG_X86_MRC_ADDR;
if (data) {
int rv;
ulong start;
diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
index 24e692f988d8..454efc17614e 100644
--- a/arch/x86/dts/u-boot.dtsi
+++ b/arch/x86/dts/u-boot.dtsi
@@ -86,7 +86,7 @@
#endif
#ifdef CONFIG_HAVE_MRC
intel-mrc {
- offset = ;
+ offset = ;
};
#endif
#ifdef CONFIG_FSP_VERSION1
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index ccd37abe2611..7d93dcbfc2e5 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -6,7 +6,7 @@
#ifndef _X86_CHROMEBOOK_H
#define _X86_CHROMEBOOK_H
-#define CONFIG_X86_MRC_ADDR0xfffa
+#define CFG_X86_MRC_ADDR 0xfffa
#define CONFIG_X86_REFCODE_ADDR0xffea
#define CONFIG_X86_REFCODE_RUN_ADDR0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index e9ca514f3cdb..66173404901d 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -252,6 +252,7 @@ CFG_VSC7385_IMAGE
CFG_VSC7385_IMAGE_SIZE
CFG_WATCHDOG_PRESC
CFG_WATCHDOG_RC
-CONFIG_X86_MRC_ADDR
+CFG_X86EMU_RAW_IO
+CFG_X86_MRC_ADDR
CONFIG_X86_REFCODE_ADDR
CONFIG_X86_REFCODE_RUN_ADDR
diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index fda16f1992d7..f50949aa37dd 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -298,7 +298,7 @@ C preprocessor::
#ifdef CONFIG_HAVE_MRC
intel-mrc {
-offset = ;
+offset = ;
};
#endif
--
2.25.1
[PoC 235/241] global: Migrate CONFIG_WATCHDOG_PRESC to CFG
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/cpu.c | 2 +-
include/configs/kmcent2.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 0abcc01b8574..68c3b1f98b8c 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -357,7 +357,7 @@ void
init_85xx_watchdog(void)
{
mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WATCHDOG_MASK) |
- TCR_WP(CONFIG_WATCHDOG_PRESC) | TCR_WRC(CONFIG_WATCHDOG_RC));
+ TCR_WP(CFG_WATCHDOG_PRESC) | TCR_WRC(CONFIG_WATCHDOG_RC));
}
void
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index a7cc42c526c5..191ef7bb2870 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -377,7 +377,7 @@ int get_scl(void);
/*
* Hardware Watchdog
*/
-#define CONFIG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) ~10min */
+#define CFG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) ~10min */
#define CONFIG_WATCHDOG_RC WRC_CHIP/* reset chip on watchdog event */
/*
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2e217a15b300..29c5ad21d3ef 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -250,7 +250,7 @@ CFG_VAR_SIZE_SPL
CFG_VERY_BIG_RAM
CFG_VSC7385_IMAGE
CFG_VSC7385_IMAGE_SIZE
-CONFIG_WATCHDOG_PRESC
+CFG_WATCHDOG_PRESC
CONFIG_WATCHDOG_RC
CONFIG_WATCHDOG_TIMEOUT
CONFIG_X86EMU_RAW_IO
--
2.25.1
[PoC 237/241] global: Migrate CONFIG_X86EMU_RAW_IO to CFG
Signed-off-by: Tom Rini
---
drivers/bios_emulator/besys.c | 18 +-
include/configs/conga-qeval20-qa3-e3845.h | 2 +-
include/configs/dfi-bt700.h | 2 +-
include/configs/minnowmax.h | 2 +-
include/configs/som-db5800-som-6867.h | 2 +-
include/configs/theadorable-x86-common.h | 2 +-
include/configs/x86-chromebook.h | 2 +-
scripts/config_whitelist.txt | 2 --
8 files changed, 15 insertions(+), 17 deletions(-)
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c
index 02c4286a854c..28c41e70a226 100644
--- a/drivers/bios_emulator/besys.c
+++ b/drivers/bios_emulator/besys.c
@@ -54,7 +54,7 @@
/*- Global Variables --*/
-#ifndef CONFIG_X86EMU_RAW_IO
+#ifndef CFG_X86EMU_RAW_IO
static char *BE_biosDate = "08/14/99";
static u8 BE_model = 0xFC;
static u8 BE_submodel = 0x00;
@@ -94,7 +94,7 @@ static u8 *BE_memaddr(u32 addr)
} else if (addr >= 0xA && addr <= 0xB) {
return (u8*)(_BE_env.busmem_base + addr - 0xA);
}
-#ifdef CONFIG_X86EMU_RAW_IO
+#ifdef CFG_X86EMU_RAW_IO
else if (addr >= 0xD && addr <= 0xF) {
/* We map the real System BIOS directly on real PC's */
DB(printf("BE_memaddr: System BIOS address %#lx\n",
@@ -240,7 +240,7 @@ void X86API BE_wrl(u32 addr, u32 val)
}
}
-#if !defined(CONFIG_X86EMU_RAW_IO)
+#if !defined(CFG_X86EMU_RAW_IO)
/* For Non-Intel machines we may need to emulate some I/O port accesses that
* the BIOS may try to access, such as the PCI config registers.
@@ -571,7 +571,7 @@ u8 X86API BE_inb(X86EMU_pioAddr port)
{
u8 val = 0;
-#if !defined(CONFIG_X86EMU_RAW_IO)
+#if !defined(CFG_X86EMU_RAW_IO)
if (IS_VGA_PORT(port)){
/*seems reading port 0x3c3 return the high 16 bit of io port*/
if(port == 0x3c3)
@@ -617,7 +617,7 @@ u16 X86API BE_inw(X86EMU_pioAddr port)
{
u16 val = 0;
-#if !defined(CONFIG_X86EMU_RAW_IO)
+#if !defined(CFG_X86EMU_RAW_IO)
if (IS_PCI_PORT(port))
val = PCI_inp(port, REG_READ_WORD);
else if (port < 0x100) {
@@ -650,7 +650,7 @@ u32 X86API BE_inl(X86EMU_pioAddr port)
{
u32 val = 0;
-#if !defined(CONFIG_X86EMU_RAW_IO)
+#if !defined(CFG_X86EMU_RAW_IO)
if (IS_PCI_PORT(port))
val = PCI_inp(port, REG_READ_DWORD);
else if (port < 0x100) {
@@ -678,7 +678,7 @@ through to the real hardware if we don't need to special
case it.
/
void X86API BE_outb(X86EMU_pioAddr port, u8 val)
{
-#if !defined(CONFIG_X86EMU_RAW_IO)
+#if !defined(CFG_X86EMU_RAW_IO)
if (IS_VGA_PORT(port))
VGA_outpb(port, val);
else if (IS_TIMER_PORT(port))
@@ -713,7 +713,7 @@ through to the real hardware if we don't need to special
case it.
/
void X86API BE_outw(X86EMU_pioAddr port, u16 val)
{
-#if !defined(CONFIG_X86EMU_RAW_IO)
+#if !defined(CFG_X86EMU_RAW_IO)
if (IS_VGA_PORT(port)) {
VGA_outpb(port, val);
VGA_outpb(port + 1, val >> 8);
@@ -744,7 +744,7 @@ through to the real hardware if we don't need to special
case it.
/
void X86API BE_outl(X86EMU_pioAddr port, u32 val)
{
-#if !defined(CONFIG_X86EMU_RAW_IO)
+#if !defined(CFG_X86EMU_RAW_IO)
if (IS_PCI_PORT(port)) {
PCI_outp(port, val, REG_WRITE_DWORD);
} else if (port < 0x100) {
diff --git a/include/configs/conga-qeval20-qa3-e3845.h
b/include/configs/conga-qeval20-qa3-e3845.h
index 1066da3f8326..5cc6e06ddc2d 100644
--- a/include/configs/conga-qeval20-qa3-e3845.h
+++ b/include/configs/conga-qeval20-qa3-e3845.h
@@ -17,7 +17,7 @@
"stderr=serial\0"
#define VIDEO_IO_OFFSET0
-#define CONFIG_X86EMU_RAW_IO
+#define CFG_X86EMU_RAW_IO
#undef CFG_EXTRA_ENV_SETTINGS
#define CFG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h
index 36c2510628fc..0ffc0c7d4f0b 100644
--- a/include/configs/dfi-bt700.h
+++ b/include/configs/dfi-bt700.h
@@ -21,7 +21,7 @@
"stderr=serial\0"
#define VIDEO_IO_OFFSET0
-#define CONFIG_X86EMU_RAW_IO
+#define CFG_X86EMU_RAW_IO
#undef CFG_EXTRA_ENV_SETTINGS
#define CFG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index f3f645f9d699..e31c6b54652a 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -18,6 +18,6 @@
"usb_pgood_delay=40\0"
#define VIDEO_IO_OFFSET
[PoC 223/241] global: Migrate CONFIG_UEC_ETH to CFG
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc83xx/cpu.c | 2 +-
arch/powerpc/cpu/mpc8xxx/cpu.c | 2 +-
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
drivers/qe/uec.c| 16
include/configs/km/km-mpc83xx.h | 2 +-
scripts/config_whitelist.txt| 2 +-
6 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 8d531898bd89..52d804cce19d 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -187,7 +187,7 @@ void watchdog_reset (void)
*/
int cpu_eth_init(struct bd_info *bis)
{
-#if defined(CONFIG_UEC_ETH)
+#if defined(CFG_UEC_ETH)
uec_standard_init(bis);
#endif
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 7f2019092296..3ee6908f436b 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -351,7 +351,7 @@ int fixup_cpu(void)
*/
int cpu_eth_init(struct bd_info *bis)
{
-#if defined(CONFIG_UEC_ETH)
+#if defined(CFG_UEC_ETH)
uec_standard_init(bis);
#endif
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index b9f519aba6e9..f9eea1ad9c58 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -402,7 +402,7 @@ int board_eth_init(struct bd_info *bis)
tsec_eth_init(bis, tsec_info, num);
-#if defined(CONFIG_UEC_ETH)
+#if defined(CFG_UEC_ETH)
/* QE0 and QE3 need to be exposed for UCC1 and UCC5 Eth mode */
setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE0);
setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE3);
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index 310887964352..feac4f701e60 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -27,28 +27,28 @@
#endif
static struct uec_inf uec_info[] = {
-#ifdef CONFIG_UEC_ETH1
+#ifdef CFG_UEC_ETH1
STD_UEC_INFO(1),/* UEC1 */
#endif
-#ifdef CONFIG_UEC_ETH2
+#ifdef CFG_UEC_ETH2
STD_UEC_INFO(2),/* UEC2 */
#endif
-#ifdef CONFIG_UEC_ETH3
+#ifdef CFG_UEC_ETH3
STD_UEC_INFO(3),/* UEC3 */
#endif
-#ifdef CONFIG_UEC_ETH4
+#ifdef CFG_UEC_ETH4
STD_UEC_INFO(4),/* UEC4 */
#endif
-#ifdef CONFIG_UEC_ETH5
+#ifdef CFG_UEC_ETH5
STD_UEC_INFO(5),/* UEC5 */
#endif
-#ifdef CONFIG_UEC_ETH6
+#ifdef CFG_UEC_ETH6
STD_UEC_INFO(6),/* UEC6 */
#endif
-#ifdef CONFIG_UEC_ETH7
+#ifdef CFG_UEC_ETH7
STD_UEC_INFO(7),/* UEC7 */
#endif
-#ifdef CONFIG_UEC_ETH8
+#ifdef CFG_UEC_ETH8
STD_UEC_INFO(8),/* UEC8 */
#endif
};
diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index 3192ca7742a7..8e4d40dd7683 100644
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -94,4 +94,4 @@
/*
* QE UEC ethernet configuration
*/
-#define CONFIG_UEC_ETH
+#define CFG_UEC_ETH
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index ba5d1be700a3..83c7abfab261 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -237,7 +237,7 @@ CFG_UBI_PART
CFG_UBOOTPATH
CFG_UBOOT_SECTOR_COUNT
CFG_UBOOT_SECTOR_START
-CONFIG_UEC_ETH
+CFG_UEC_ETH
CONFIG_USART_BASE
CONFIG_USART_ID
CONFIG_USBD_HS
--
2.25.1
[PoC 222/241] global: Migrate CONFIG_UBOOT_SECTOR_START to CFG
Signed-off-by: Tom Rini
---
include/configs/xpress.h | 4 ++--
scripts/config_whitelist.txt | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index 2b57ba34be9c..fc1b08360ce5 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -34,7 +34,7 @@
#define CFG_FEC_ENET_DEV 0
#define CFG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_UBOOT_SECTOR_START 0x2
+#define CFG_UBOOT_SECTOR_START 0x2
#define CFG_UBOOT_SECTOR_COUNT 0x3fe
#define CFG_EXTRA_ENV_SETTINGS \
@@ -75,7 +75,7 @@
"bootz; " \
"fi;\0" \
"uboot=ccv/u-boot.imx\0"\
- "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0"\
+ "uboot_start="__stringify(CFG_UBOOT_SECTOR_START)"\0" \
"uboot_size="__stringify(CFG_UBOOT_SECTOR_COUNT)"\0"\
"update_uboot=if tftp ${uboot}; then " \
"if itest ${filesize} > 0; then " \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index a520c70a2baf..ba5d1be700a3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -236,7 +236,7 @@ CFG_UBIFS_VOLUME
CFG_UBI_PART
CFG_UBOOTPATH
CFG_UBOOT_SECTOR_COUNT
-CONFIG_UBOOT_SECTOR_START
+CFG_UBOOT_SECTOR_START
CONFIG_UEC_ETH
CONFIG_USART_BASE
CONFIG_USART_ID
--
2.25.1
[PoC 233/241] global: Migrate CONFIG_VERY_BIG_RAM to CFG
Signed-off-by: Tom Rini
---
arch/arm/include/asm/arch-ls102xa/config.h | 2 +-
arch/xtensa/include/asm/config.h | 2 +-
drivers/ram/mpc83xx_sdram.c| 2 +-
include/configs/P2041RDB.h | 2 +-
include/configs/T102xRDB.h | 2 +-
include/configs/T104xRDB.h | 2 +-
include/configs/T208xQDS.h | 2 +-
include/configs/T208xRDB.h | 2 +-
include/configs/T4240RDB.h | 2 +-
include/configs/dra7xx_evm.h | 2 +-
include/configs/kmcent2.h | 2 +-
include/configs/kontron_sl28.h | 2 +-
include/configs/ls1028a_common.h | 2 +-
include/configs/ls1043a_common.h | 2 +-
include/configs/ls1046a_common.h | 2 +-
include/configs/ls1088a_common.h | 2 +-
include/configs/ls2080a_common.h | 2 +-
include/configs/lx2160a_common.h | 2 +-
include/configs/mt7621.h | 2 +-
include/configs/qemu-ppce500.h | 2 +-
include/configs/rcar-gen3-common.h | 2 +-
include/configs/socrates.h | 2 +-
include/configs/synquacer.h| 2 +-
scripts/config_whitelist.txt | 2 +-
24 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h
b/arch/arm/include/asm/arch-ls102xa/config.h
index 86bea960f1d1..581d4b3f9a60 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -75,7 +75,7 @@
/* SATA */
#define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x0220)
#ifdef CONFIG_DDR_SPD
-#define CONFIG_VERY_BIG_RAM
+#define CFG_VERY_BIG_RAM
#define CFG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
#endif
diff --git a/arch/xtensa/include/asm/config.h b/arch/xtensa/include/asm/config.h
index aad06118cdbd..07107c936481 100644
--- a/arch/xtensa/include/asm/config.h
+++ b/arch/xtensa/include/asm/config.h
@@ -14,7 +14,7 @@
* restricting used physical memory to the first 128MB.
*/
#if XCHAL_HAVE_PTP_MMU
-#define CONFIG_VERY_BIG_RAM
+#define CFG_VERY_BIG_RAM
#define CFG_MAX_MEM_MAPPED (128 << 20)
#endif
diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c
index 5d022d4993bc..ca207441b3fc 100644
--- a/drivers/ram/mpc83xx_sdram.c
+++ b/drivers/ram/mpc83xx_sdram.c
@@ -118,7 +118,7 @@ int dram_init(void)
phys_size_t get_effective_memsize(void)
{
- if (!IS_ENABLED(CONFIG_VERY_BIG_RAM))
+ if (!IS_ENABLED(CFG_VERY_BIG_RAM))
return gd->ram_size;
/* Limit stack to what we can reasonable map */
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 2fa9d777b926..89018fc3b38f 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -62,7 +62,7 @@
/*
* DDR Setup
*/
-#define CONFIG_VERY_BIG_RAM
+#define CFG_VERY_BIG_RAM
#define CFG_SYS_DDR_SDRAM_BASE 0x
#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index dff468d93bf1..8241bba92b36 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -112,7 +112,7 @@
/*
* DDR Setup
*/
-#define CONFIG_VERY_BIG_RAM
+#define CFG_VERY_BIG_RAM
#define CFG_SYS_DDR_SDRAM_BASE 0x
#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
#if defined(CONFIG_TARGET_T1024RDB)
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 4691e99c8b82..446b40a0c93d 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -86,7 +86,7 @@
/*
* DDR Setup
*/
-#define CONFIG_VERY_BIG_RAM
+#define CFG_VERY_BIG_RAM
#define CFG_SYS_DDR_SDRAM_BASE 0x
#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index ac1a7614b6a2..dc88b4e80938 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -78,7 +78,7 @@
/*
* DDR Setup
*/
-#define CONFIG_VERY_BIG_RAM
+#define CFG_VERY_BIG_RAM
#define CFG_SYS_DDR_SDRAM_BASE 0x
#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
#define CFG_SYS_SDRAM_SIZE 2048/* for fixed parameter use */
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 3f51554d2322..515ee7c85982 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -78,7 +78,7 @@
/*
* DDR Setup
*/
-#define CONFIG_VERY_BIG_RAM
+#define CFG_VERY_BIG_RAM
#define CFG_SYS_DDR_SDRAM_BASE 0x
#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
#define CFG_SYS_SDRAM_SIZE 2048/* for fixed parameter use */
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 9081bd03749d..5a00853c9fa2 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -60,7 +60,7 @@
/*
* DDR Setup
*/
-#define CONFIG_VERY_BIG_RAM
+#define CFG_V
[PoC 226/241] global: Migrate CONFIG_USBD_HS to CFG
Signed-off-by: Tom Rini
---
README | 2 +-
drivers/serial/usbtty.c| 12 ++--
drivers/serial/usbtty.h| 2 +-
drivers/usb/gadget/ep0.c | 2 +-
include/configs/apalis_imx6.h | 2 +-
include/configs/colibri-imx6ull.h | 2 +-
include/configs/colibri_imx6.h | 2 +-
include/configs/colibri_imx7.h | 2 +-
include/configs/ge_b1x5v2.h| 2 +-
include/configs/gw_ventana.h | 2 +-
include/configs/imx7-cm.h | 2 +-
include/configs/librem5.h | 2 +-
include/configs/mx6sabre_common.h | 2 +-
include/configs/mx7dsabresd.h | 2 +-
include/configs/nitrogen6x.h | 2 +-
include/configs/novena.h | 2 +-
include/configs/pico-imx6ul.h | 2 +-
include/configs/siemens-am33x-common.h | 2 +-
include/configs/tbs2910.h | 2 +-
include/configs/warp7.h| 2 +-
include/usbdescriptors.h | 2 +-
include/usbdevice.h| 8
scripts/config_whitelist.txt | 2 +-
23 files changed, 31 insertions(+), 31 deletions(-)
diff --git a/README b/README
index aeb94d003f6a..43b34f4118c4 100644
--- a/README
+++ b/README
@@ -629,7 +629,7 @@ The following options need to be configured:
variable usbtty to be cdc_acm should suffice. The following
might be defined in YourBoardName.h
- CONFIG_USBD_HS
+ CFG_USBD_HS
Define this to enable the high speed support for usb
device and usbtty. If this feature is enabled, a routine
int is_usbd_high_speed(void)
diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index 4f4eb02de083..984a6c93f313 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -121,7 +121,7 @@ static struct usb_device_descriptor device_descriptor = {
};
-#if defined(CONFIG_USBD_HS)
+#if defined(CFG_USBD_HS)
static struct usb_qualifier_descriptor qualifier_descriptor = {
.bLength = sizeof(struct usb_qualifier_descriptor),
.bDescriptorType = USB_DT_QUAL,
@@ -639,7 +639,7 @@ static void usbtty_init_instances (void)
memset (device_instance, 0, sizeof (struct usb_device_instance));
device_instance->device_state = STATE_INIT;
device_instance->device_descriptor = &device_descriptor;
-#if defined(CONFIG_USBD_HS)
+#if defined(CFG_USBD_HS)
device_instance->qualifier_descriptor = &qualifier_descriptor;
#endif
device_instance->event = usbtty_event_handler;
@@ -755,7 +755,7 @@ static void usbtty_init_terminal_type(short type)
device_descriptor.idProduct =
cpu_to_le16(CONFIG_USBD_PRODUCTID_CDCACM);
-#if defined(CONFIG_USBD_HS)
+#if defined(CFG_USBD_HS)
qualifier_descriptor.bDeviceClass =
COMMUNICATIONS_DEVICE_CLASS;
#endif
@@ -787,7 +787,7 @@ static void usbtty_init_terminal_type(short type)
device_descriptor.bDeviceClass = 0xFF;
device_descriptor.idProduct =
cpu_to_le16(CONFIG_USBD_PRODUCTID_GSERIAL);
-#if defined(CONFIG_USBD_HS)
+#if defined(CFG_USBD_HS)
qualifier_descriptor.bDeviceClass = 0xFF;
#endif
/* Assign endpoint indices */
@@ -937,7 +937,7 @@ static int usbtty_configured (void)
static void usbtty_event_handler (struct usb_device_instance *device,
usb_device_event_t event, int data)
{
-#if defined(CONFIG_USBD_HS)
+#if defined(CFG_USBD_HS)
int i;
#endif
switch (event) {
@@ -950,7 +950,7 @@ static void usbtty_event_handler (struct
usb_device_instance *device,
break;
case DEVICE_ADDRESS_ASSIGNED:
-#if defined(CONFIG_USBD_HS)
+#if defined(CFG_USBD_HS)
/*
* is_usbd_high_speed routine needs to be defined by
* specific gadget driver
diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h
index e27aa368c9af..002d69a40f1d 100644
--- a/drivers/serial/usbtty.h
+++ b/drivers/serial/usbtty.h
@@ -51,7 +51,7 @@
#define CONFIG_USBD_SERIAL_INT_PKTSIZE UDC_INT_PACKET_SIZE
#define CONFIG_USBD_SERIAL_BULK_PKTSIZEUDC_BULK_PACKET_SIZE
-#if defined(CONFIG_USBD_HS)
+#if defined(CFG_USBD_HS)
#define CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE UDC_BULK_HS_PACKET_SIZE
#endif
diff --git a/drivers/usb/gadget/ep0.c b/drivers/usb/gadget/ep0.c
index 6624f61b763c..84ef8abfe52e 100644
--- a/drivers/usb/gadget/ep0.c
+++ b/drivers/usb/gadget/ep0.c
@@ -371,7 +371,7 @@ static int ep0_get_descriptor (struct usb_device_instance
*device,
}
break;
case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER:
-#if defined(CONFIG_USBD_HS)
+#if de
[PoC 229/241] global: Migrate CONFIG_USB_FAT_BOOT to CFG
Signed-off-by: Tom Rini --- include/configs/p1_p2_rdb_pc.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 19e20de248a2..9790b0ac896c 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -462,7 +462,7 @@ RST_PCIE_CMD(pciboot) \ RST_DEF_CMD(defboot) \ "" -#define CONFIG_USB_FAT_BOOT\ +#define CFG_USB_FAT_BOOT \ "setenv bootargs root=/dev/ram rw "\ "console=$consoledev,$baudrate $othbootargs " \ "ramdisk_size=$ramdisk_size;" \ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 1fc2e1cc51d1..21ab949e0d20 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -243,7 +243,7 @@ CFG_USART_ID CFG_USBD_HS CFG_USB_BOOTING CFG_USB_EXT2_BOOT -CONFIG_USB_FAT_BOOT +CFG_USB_FAT_BOOT CONFIG_USB_ISP1301_I2C_ADDR CONFIG_U_BOOT_HDR_SIZE CONFIG_VAR_SIZE_SPL -- 2.25.1
[PoC 225/241] global: Migrate CONFIG_USART_ID to CFG
Signed-off-by: Tom Rini
---
drivers/serial/atmel_usart.c| 2 +-
include/configs/corvus.h| 2 +-
include/configs/sam9x60_curiosity.h | 2 +-
include/configs/sam9x60ek.h | 2 +-
include/configs/smartweb.h | 2 +-
include/configs/taurus.h| 2 +-
include/configs/vinco.h | 2 +-
scripts/config_whitelist.txt| 2 +-
8 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index 56655427b06b..9d97bc865445 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -73,7 +73,7 @@ static void atmel_serial_activate(atmel_usart3_t *usart)
static void atmel_serial_setbrg(void)
{
atmel_serial_setbrg_internal((atmel_usart3_t *)CFG_USART_BASE,
-CONFIG_USART_ID, gd->baudrate);
+CFG_USART_ID, gd->baudrate);
}
static int atmel_serial_init(void)
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index c9eb75d93088..f2675e0ec864 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -29,7 +29,7 @@
/* serial console */
#define CFG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_IDATMEL_ID_SYS
+#define CFG_USART_ID ATMEL_ID_SYS
/* SDRAM */
#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6
diff --git a/include/configs/sam9x60_curiosity.h
b/include/configs/sam9x60_curiosity.h
index 204020d5ee74..e79f80f17f61 100644
--- a/include/configs/sam9x60_curiosity.h
+++ b/include/configs/sam9x60_curiosity.h
@@ -14,7 +14,7 @@
#define CFG_SYS_AT91_MAIN_CLOCK2400/* 24 MHz crystal */
#define CFG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID 0 /* ignored in arm */
+#define CFG_USART_ID 0 /* ignored in arm */
/* SDRAM */
#define CFG_SYS_SDRAM_BASE 0x2000
diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h
index 800b98ff98af..2c761821efb1 100644
--- a/include/configs/sam9x60ek.h
+++ b/include/configs/sam9x60ek.h
@@ -15,7 +15,7 @@
#define CFG_SYS_AT91_MAIN_CLOCK2400/* 24 MHz crystal */
#define CFG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID 0 /* ignored in arm */
+#define CFG_USART_ID 0 /* ignored in arm */
/*
* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index f9a5aa9e32d0..75a1670e3317 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -62,7 +62,7 @@
/* serial console */
#define CFG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_IDATMEL_ID_SYS
+#define CFG_USART_ID ATMEL_ID_SYS
/* DFU class support */
#define DFU_MANIFEST_POLL_TIMEOUT 25000
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 88870d6fdf69..174b848e2595 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -35,7 +35,7 @@
/* Misc CPU related */
#define CFG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_IDATMEL_ID_SYS
+#define CFG_USART_ID ATMEL_ID_SYS
/*
* SDRAM: 1 bank, min 32, max 128 MB
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 9d6abbf7b342..1d7a3a1562a0 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -18,7 +18,7 @@
/* serial console */
#define CFG_USART_BASE 0xfc00c000
-#define CONFIG_USART_ID30
+#define CFG_USART_ID 30
/* Timer */
#define CFG_SYS_TIMER_COUNTER 0xfc06863c
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1b89145261ce..96532633226f 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -239,7 +239,7 @@ CFG_UBOOT_SECTOR_COUNT
CFG_UBOOT_SECTOR_START
CFG_UEC_ETH
CFG_USART_BASE
-CONFIG_USART_ID
+CFG_USART_ID
CONFIG_USBD_HS
CONFIG_USB_BOOTING
CONFIG_USB_EXT2_BOOT
--
2.25.1
[PoC 224/241] global: Migrate CONFIG_USART_BASE to CFG
Signed-off-by: Tom Rini
---
drivers/serial/atmel_usart.c| 10 +-
include/configs/corvus.h| 2 +-
include/configs/sam9x60_curiosity.h | 2 +-
include/configs/sam9x60ek.h | 2 +-
include/configs/smartweb.h | 2 +-
include/configs/taurus.h| 2 +-
include/configs/vinco.h | 2 +-
scripts/config_whitelist.txt| 2 +-
8 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index 90ccdf6b2945..56655427b06b 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -72,13 +72,13 @@ static void atmel_serial_activate(atmel_usart3_t *usart)
static void atmel_serial_setbrg(void)
{
- atmel_serial_setbrg_internal((atmel_usart3_t *)CONFIG_USART_BASE,
+ atmel_serial_setbrg_internal((atmel_usart3_t *)CFG_USART_BASE,
CONFIG_USART_ID, gd->baudrate);
}
static int atmel_serial_init(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE;
atmel_serial_init_internal(usart);
serial_setbrg();
@@ -89,7 +89,7 @@ static int atmel_serial_init(void)
static void atmel_serial_putc(char c)
{
- atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE;
if (c == '\n')
serial_putc('\r');
@@ -100,7 +100,7 @@ static void atmel_serial_putc(char c)
static int atmel_serial_getc(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE;
while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
schedule();
@@ -109,7 +109,7 @@ static int atmel_serial_getc(void)
static int atmel_serial_tstc(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE;
return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
}
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 8a61086ecc15..c9eb75d93088 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -28,7 +28,7 @@
#define CFG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */
/* serial console */
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CFG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_IDATMEL_ID_SYS
/* SDRAM */
diff --git a/include/configs/sam9x60_curiosity.h
b/include/configs/sam9x60_curiosity.h
index f44ce909b918..204020d5ee74 100644
--- a/include/configs/sam9x60_curiosity.h
+++ b/include/configs/sam9x60_curiosity.h
@@ -13,7 +13,7 @@
#define CFG_SYS_AT91_SLOW_CLOCK32768
#define CFG_SYS_AT91_MAIN_CLOCK2400/* 24 MHz crystal */
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CFG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID 0 /* ignored in arm */
/* SDRAM */
diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h
index 27b39ebf4174..800b98ff98af 100644
--- a/include/configs/sam9x60ek.h
+++ b/include/configs/sam9x60ek.h
@@ -14,7 +14,7 @@
#define CFG_SYS_AT91_SLOW_CLOCK32768
#define CFG_SYS_AT91_MAIN_CLOCK2400/* 24 MHz crystal */
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CFG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID 0 /* ignored in arm */
/*
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 762f61470b15..f9a5aa9e32d0 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -61,7 +61,7 @@
#define CFG_SYS_NAND_READY_PIN AT91_PIN_PC13
/* serial console */
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CFG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_IDATMEL_ID_SYS
/* DFU class support */
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 855218a8901e..88870d6fdf69 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -34,7 +34,7 @@
/* Misc CPU related */
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CFG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_IDATMEL_ID_SYS
/*
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 1e1175f00689..9d6abbf7b342 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -17,7 +17,7 @@
/* The value in the common file is too far away for the VInCo platform */
/* serial console */
-#define CONFIG_USART_BASE 0xfc00c000
+#define CFG_USART_BASE 0xfc00c000
#define CONFIG_USART_ID30
/* Timer */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 83c7abfab261..1b89145261ce 100644
--- a/scripts/config_whitelist.txt
+++
[PoC 218/241] global: Migrate CONFIG_UBIFS_VOLUME to CFG
Signed-off-by: Tom Rini --- include/configs/x530.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/x530.h b/include/configs/x530.h index f20a85cfa19a..6f8a393d0782 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -54,6 +54,6 @@ "initrd_high=0x1000\0" #define CONFIG_UBI_PARTuser -#define CONFIG_UBIFS_VOLUMEuser +#define CFG_UBIFS_VOLUME user #endif /* _CONFIG_X530_H */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index bd8a5af65985..d2872d406039 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -232,7 +232,7 @@ CFG_TSEC4_NAME CFG_TSECV2 CFG_TSECV2_1 CFG_TSEC_TBICR_SETTINGS -CONFIG_UBIFS_VOLUME +CFG_UBIFS_VOLUME CONFIG_UBI_PART CONFIG_UBOOTPATH CONFIG_UBOOT_SECTOR_COUNT -- 2.25.1
[PoC 217/241] global: Migrate CONFIG_TSEC_TBICR_SETTINGS to CFG
Signed-off-by: Tom Rini
---
drivers/net/tsec.c | 8
include/configs/P1010RDB.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 734e10c563e0..7ad690a1c875 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -57,14 +57,14 @@ static struct tsec_info_struct tsec_info[] = {
)
/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
-#ifndef CONFIG_TSEC_TBICR_SETTINGS
-#define CONFIG_TSEC_TBICR_SETTINGS ( \
+#ifndef CFG_TSEC_TBICR_SETTINGS
+#define CFG_TSEC_TBICR_SETTINGS ( \
TBICR_PHY_RESET \
| TBICR_ANEG_ENABLE \
| TBICR_FULL_DUPLEX \
| TBICR_SPEED1_SET \
)
-#endif /* CONFIG_TSEC_TBICR_SETTINGS */
+#endif /* CFG_TSEC_TBICR_SETTINGS */
/* Configure the TBI for SGMII operation */
static void tsec_configure_serdes(struct tsec_private *priv)
@@ -78,7 +78,7 @@ static void tsec_configure_serdes(struct tsec_private *priv)
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
0, TBI_TBICON, TBICON_CLK_SELECT);
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
- 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
+ 0, TBI_CR, CFG_TSEC_TBICR_SETTINGS);
}
/* the 'way' for ethernet-CRC-32. Spliced in from Linux lib/crc32.c
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index dd8dd42b54d5..91e5c544f616 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -371,7 +371,7 @@ extern unsigned long get_sdram_size(void);
#define TSEC3_PHYIDX 0
/* TBI PHY configuration for SGMII mode */
-#define CONFIG_TSEC_TBICR_SETTINGS ( \
+#define CFG_TSEC_TBICR_SETTINGS ( \
TBICR_PHY_RESET \
| TBICR_ANEG_ENABLE \
| TBICR_FULL_DUPLEX \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1d60965b520c..bd8a5af65985 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -231,7 +231,7 @@ CFG_TSEC4
CFG_TSEC4_NAME
CFG_TSECV2
CFG_TSECV2_1
-CONFIG_TSEC_TBICR_SETTINGS
+CFG_TSEC_TBICR_SETTINGS
CONFIG_UBIFS_VOLUME
CONFIG_UBI_PART
CONFIG_UBOOTPATH
--
2.25.1
[PoC 220/241] global: Migrate CONFIG_UBOOTPATH to CFG
Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 4 ++-- include/configs/MPC8548CDS.h | 4 ++-- include/configs/P1010RDB.h | 4 ++-- include/configs/P2041RDB.h | 4 ++-- include/configs/T102xRDB.h | 4 ++-- include/configs/T104xRDB.h | 4 ++-- include/configs/T208xQDS.h | 4 ++-- include/configs/T208xRDB.h | 4 ++-- include/configs/T4240RDB.h | 4 ++-- include/configs/p1_p2_rdb_pc.h | 4 ++-- include/configs/qemu-ppce500.h | 2 +- scripts/config_whitelist.txt | 2 +- 12 files changed, 22 insertions(+), 22 deletions(-) diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index b9ac67fae0be..13406cfa547b 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -228,12 +228,12 @@ #define CFG_HOSTNAME "mpc837x_rdb" #define CFG_ROOTPATH "/nfsroot" /* U-Boot image on TFTP server */ -#define CONFIG_UBOOTPATH "u-boot.bin" +#define CFG_UBOOTPATH "u-boot.bin" #define CFG_FDTFILE"mpc8379_rdb.dtb" #define CFG_EXTRA_ENV_SETTINGS \ "netdev=" CFG_NETDEV "\0" \ - "uboot=" CONFIG_UBOOTPATH "\0" \ + "uboot=" CFG_UBOOTPATH "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ "protect off " __stringify(CONFIG_TEXT_BASE)\ " +$filesize; " \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index a493d73a4a82..ef3f8f4b2b0e 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -329,7 +329,7 @@ #define CFG_HOSTNAME"unknown" #define CFG_ROOTPATH"/nfsroot" -#define CONFIG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */ +#define CFG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */ #define CFG_SERVERIP192.168.1.1 #define CFG_GATEWAYIP 192.168.1.1 @@ -338,7 +338,7 @@ #defineCFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ecc=off\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" __stringify(CFG_UBOOTPATH) "\0"\ "tftpflash=tftpboot $loadaddr $uboot; " \ "protect off " __stringify(CONFIG_TEXT_BASE)\ " +$filesize; " \ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 91e5c544f616..15700b390b66 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -413,12 +413,12 @@ extern unsigned long get_sdram_size(void); */ #define CFG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ +#define CFG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ #defineCFG_EXTRA_ENV_SETTINGS \ "hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" __stringify(CFG_UBOOTPATH) "\0"\ "loadaddr=100\0"\ "consoledev=ttyS0\0"\ "ramdiskaddr=200\0" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 5432ad9e3950..2fa9d777b926 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -309,7 +309,7 @@ * Environment Configuration */ #define CFG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin +#define CFG_UBOOTPATH u-boot.bin #define __USB_PHY_TYPE utmi @@ -317,7 +317,7 @@ "hwconfig=fsl_ddr:ctlr_intlv=cacheline,"\ "bank_intlv=cs0_cs1\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" __stringify(CFG_UBOOTPATH) "\0"\ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 36db5a5ad0bf..dff468d93bf1 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -424,7 +424,7 @@ * Environment Configuration */ #define CFG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ +#define CFG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi #ifdef CONFIG_ARCH_T1024 @@ -443,7 +443,7 @@ ARCH_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline,"\ "usb1:dr_mode=host,phy_type=" __string
[PoC 221/241] global: Migrate CONFIG_UBOOT_SECTOR_COUNT to CFG
Signed-off-by: Tom Rini
---
include/configs/xpress.h | 4 ++--
scripts/config_whitelist.txt | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index f8ee40a9543b..2b57ba34be9c 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -35,7 +35,7 @@
#define CFG_FEC_MXC_PHYADDR 0x0
#define CONFIG_UBOOT_SECTOR_START 0x2
-#define CONFIG_UBOOT_SECTOR_COUNT 0x3fe
+#define CFG_UBOOT_SECTOR_COUNT 0x3fe
#define CFG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
@@ -76,7 +76,7 @@
"fi;\0" \
"uboot=ccv/u-boot.imx\0"\
"uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0"\
- "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \
+ "uboot_size="__stringify(CFG_UBOOT_SECTOR_COUNT)"\0"\
"update_uboot=if tftp ${uboot}; then " \
"if itest ${filesize} > 0; then " \
"mmc dev 0 1;" \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index cd44d281e0ec..a520c70a2baf 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -235,7 +235,7 @@ CFG_TSEC_TBICR_SETTINGS
CFG_UBIFS_VOLUME
CFG_UBI_PART
CFG_UBOOTPATH
-CONFIG_UBOOT_SECTOR_COUNT
+CFG_UBOOT_SECTOR_COUNT
CONFIG_UBOOT_SECTOR_START
CONFIG_UEC_ETH
CONFIG_USART_BASE
--
2.25.1
[PoC 215/241] global: Migrate CONFIG_TSEC4 to CFG
Signed-off-by: Tom Rini
---
board/freescale/common/pixis.c | 2 +-
board/freescale/mpc8548cds/mpc8548cds.c | 2 +-
drivers/net/tsec.c | 2 +-
include/configs/MPC8548CDS.h| 4 ++--
scripts/config_whitelist.txt| 4 ++--
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index ce60ec2c10f6..ad4d52a36e25 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -314,7 +314,7 @@ static int pixis_set_sgmii(struct cmd_tbl *cmdtp, int flag,
int argc,
switch_mask = PIXIS_VCFGEN1_TSEC3SER;
break;
#endif
-#ifdef CONFIG_TSEC4
+#ifdef CFG_TSEC4
case 4:
mask = PIXIS_VSPEED2_TSEC4SER;
switch_mask = PIXIS_VCFGEN1_TSEC4SER;
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board/freescale/mpc8548cds/mpc8548cds.c
index cbe8e0ddca99..e7e271ee2d53 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -224,7 +224,7 @@ int board_eth_init(struct bd_info *bis)
num++;
}
#endif
-#ifdef CONFIG_TSEC4
+#ifdef CFG_TSEC4
/* initialize TSEC4 only if Carrier is 1.3 or above on CDS */
if (get_board_version() >= 0x13) {
SET_STD_TSEC_INFO(tsec_info[num], 4);
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 985cde092bca..734e10c563e0 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -44,7 +44,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CFG_TSEC3
STD_TSEC_INFO(3), /* TSEC3 */
#endif
-#ifdef CONFIG_TSEC4
+#ifdef CFG_TSEC4
STD_TSEC_INFO(4), /* TSEC4 */
#endif
};
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 7bc8f238e05b..a493d73a4a82 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -291,8 +291,8 @@
#define CFG_TSEC2_NAME "eTSEC1"
#define CFG_TSEC3 1
#define CFG_TSEC3_NAME "eTSEC2"
-#define CONFIG_TSEC4
-#define CONFIG_TSEC4_NAME "eTSEC3"
+#define CFG_TSEC4
+#define CFG_TSEC4_NAME "eTSEC3"
#undef CONFIG_MPC85XX_FEC
#define TSEC1_PHY_ADDR 0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index a44112ccd25e..fa67d6fe3468 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -227,8 +227,8 @@ CFG_TSEC2
CFG_TSEC2_NAME
CFG_TSEC3
CFG_TSEC3_NAME
-CONFIG_TSEC4
-CONFIG_TSEC4_NAME
+CFG_TSEC4
+CFG_TSEC4_NAME
CONFIG_TSECV2
CONFIG_TSECV2_1
CONFIG_TSEC_TBICR_SETTINGS
--
2.25.1
[PoC 219/241] global: Migrate CONFIG_UBI_PART to CFG
Signed-off-by: Tom Rini --- include/configs/x530.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/x530.h b/include/configs/x530.h index 6f8a393d0782..777b757babee 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -53,7 +53,7 @@ "fdt_high=0x1000\0" \ "initrd_high=0x1000\0" -#define CONFIG_UBI_PARTuser +#define CFG_UBI_PART user #define CFG_UBIFS_VOLUME user #endif /* _CONFIG_X530_H */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index d2872d406039..c2bc53a582f0 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -233,7 +233,7 @@ CFG_TSECV2 CFG_TSECV2_1 CFG_TSEC_TBICR_SETTINGS CFG_UBIFS_VOLUME -CONFIG_UBI_PART +CFG_UBI_PART CONFIG_UBOOTPATH CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START -- 2.25.1
[PoC 216/241] global: Migrate CONFIG_TSECV2 to CFG
Signed-off-by: Tom Rini
---
arch/powerpc/include/asm/config_mpc85xx.h | 18 +-
arch/powerpc/include/asm/immap_85xx.h | 4 ++--
scripts/config_whitelist.txt | 4 ++--
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 0a67c76b61d6..b81ce1f98ba2 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -24,18 +24,18 @@
#elif defined(CONFIG_ARCH_P1010)
#define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2
+#define CFG_TSECV2
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
/* P1011 is single core version of P1020 */
#elif defined(CONFIG_ARCH_P1011)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
#elif defined(CONFIG_ARCH_P1020)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
#elif defined(CONFIG_ARCH_P1021)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
#define QE_MURAM_SIZE 0x6000UL
#define MAX_QE_RISC1
#define QE_NUM_OF_SNUM 28
@@ -49,11 +49,11 @@
/* P1024 is lower end variant of P1020 */
#elif defined(CONFIG_ARCH_P1024)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
/* P1025 is lower end variant of P1021 */
#elif defined(CONFIG_ARCH_P1025)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
#define QE_MURAM_SIZE 0x6000UL
#define MAX_QE_RISC1
#define QE_NUM_OF_SNUM 28
@@ -108,12 +108,12 @@
#elif defined(CONFIG_ARCH_BSC9131)
#define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2
+#define CFG_TSECV2
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
#elif defined(CONFIG_ARCH_BSC9132)
#define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2
+#define CFG_TSECV2
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
#elif defined(CONFIG_ARCH_T4240)
@@ -221,7 +221,7 @@
#elif defined(CONFIG_ARCH_C29X)
#define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2_1
+#define CFG_TSECV2_1
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CFG_SYS_FSL_SEC_IDX_OFFSET 0x2
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 05b83952f231..7fdbf8504f32 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2541,9 +2541,9 @@ struct ccsr_pman {
#define CFG_SYS_MPC85xx_USB2_OFFSET0x23000
#define CFG_SYS_MPC85xx_USB1_PHY_OFFSET0xE5000
#define CFG_SYS_MPC85xx_USB2_PHY_OFFSET0xE5100
-#ifdef CONFIG_TSECV2
+#ifdef CFG_TSECV2
#define CFG_SYS_TSEC1_OFFSET 0xB
-#elif defined(CONFIG_TSECV2_1)
+#elif defined(CFG_TSECV2_1)
#define CFG_SYS_TSEC1_OFFSET 0x1
#else
#define CFG_SYS_TSEC1_OFFSET 0x24000
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fa67d6fe3468..1d60965b520c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -229,8 +229,8 @@ CFG_TSEC3
CFG_TSEC3_NAME
CFG_TSEC4
CFG_TSEC4_NAME
-CONFIG_TSECV2
-CONFIG_TSECV2_1
+CFG_TSECV2
+CFG_TSECV2_1
CONFIG_TSEC_TBICR_SETTINGS
CONFIG_UBIFS_VOLUME
CONFIG_UBI_PART
--
2.25.1
[PoC 214/241] global: Migrate CONFIG_TSEC3 to CFG
Signed-off-by: Tom Rini
---
board/freescale/common/pixis.c | 2 +-
board/freescale/mpc8548cds/mpc8548cds.c | 2 +-
board/freescale/p1010rdb/p1010rdb.c | 2 +-
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
drivers/net/tsec.c | 2 +-
include/configs/MPC8548CDS.h| 4 ++--
include/configs/P1010RDB.h | 4 ++--
include/configs/ls1021aqds.h| 4 ++--
include/configs/p1_p2_rdb_pc.h | 4 ++--
include/configs/socrates.h | 4 ++--
scripts/config_whitelist.txt| 4 ++--
11 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index 87deb4538a22..ce60ec2c10f6 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -308,7 +308,7 @@ static int pixis_set_sgmii(struct cmd_tbl *cmdtp, int flag,
int argc,
switch_mask = PIXIS_VCFGEN1_TSEC2SER;
break;
#endif
-#ifdef CONFIG_TSEC3
+#ifdef CFG_TSEC3
case 3:
mask = PIXIS_VSPEED2_TSEC3SER;
switch_mask = PIXIS_VCFGEN1_TSEC3SER;
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board/freescale/mpc8548cds/mpc8548cds.c
index 7ef204763eaa..cbe8e0ddca99 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -216,7 +216,7 @@ int board_eth_init(struct bd_info *bis)
SET_STD_TSEC_INFO(tsec_info[num], 2);
num++;
#endif
-#ifdef CONFIG_TSEC3
+#ifdef CFG_TSEC3
/* initialize TSEC3 only if Carrier is 1.3 or above on CDS */
if (get_board_version() >= 0x13) {
SET_STD_TSEC_INFO(tsec_info[num], 3);
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
index e7ba90a8d1a3..4f98d7a5e2c6 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -497,7 +497,7 @@ int board_eth_init(struct bd_info *bis)
SET_STD_TSEC_INFO(tsec_info[num], 2);
num++;
#endif
-#ifdef CONFIG_TSEC3
+#ifdef CFG_TSEC3
/* P1014 and it's derivatives do not support eTSEC3 */
if (cpu->soc_ver != SVR_P1014) {
SET_STD_TSEC_INFO(tsec_info[num], 3);
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 5dac8fcce2cb..b9f519aba6e9 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -385,7 +385,7 @@ int board_eth_init(struct bd_info *bis)
}
num++;
#endif
-#ifdef CONFIG_TSEC3
+#ifdef CFG_TSEC3
SET_STD_TSEC_INFO(tsec_info[num], 3);
num++;
#endif
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 7287c6ad4cbb..985cde092bca 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -41,7 +41,7 @@ static struct tsec_info_struct tsec_info[] = {
.mii_devname = DEFAULT_MII_NAME
}, /* FEC */
#endif
-#ifdef CONFIG_TSEC3
+#ifdef CFG_TSEC3
STD_TSEC_INFO(3), /* TSEC3 */
#endif
#ifdef CONFIG_TSEC4
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 35154630add0..7bc8f238e05b 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -289,8 +289,8 @@
#define CFG_TSEC1_NAME "eTSEC0"
#define CFG_TSEC2 1
#define CFG_TSEC2_NAME "eTSEC1"
-#define CONFIG_TSEC3 1
-#define CONFIG_TSEC3_NAME "eTSEC2"
+#define CFG_TSEC3 1
+#define CFG_TSEC3_NAME "eTSEC2"
#define CONFIG_TSEC4
#define CONFIG_TSEC4_NAME "eTSEC3"
#undef CONFIG_MPC85XX_FEC
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index b01b3b019662..dd8dd42b54d5 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -355,8 +355,8 @@ extern unsigned long get_sdram_size(void);
#define CFG_TSEC1_NAME "eTSEC1"
#define CFG_TSEC2 1
#define CFG_TSEC2_NAME "eTSEC2"
-#define CONFIG_TSEC3 1
-#define CONFIG_TSEC3_NAME "eTSEC3"
+#define CFG_TSEC3 1
+#define CFG_TSEC3_NAME "eTSEC3"
#define TSEC1_PHY_ADDR 1
#define TSEC2_PHY_ADDR 0
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 8747ef260b89..c3c526d8558e 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -257,8 +257,8 @@
#define CFG_TSEC1_NAME "eTSEC1"
#define CFG_TSEC2 1
#define CFG_TSEC2_NAME "eTSEC2"
-#define CONFIG_TSEC3 1
-#define CONFIG_TSEC3_NAME "eTSEC3"
+#define CFG_TSEC3 1
+#define CFG_TSEC3_NAME "eTSEC3"
#define TSEC1_PHY_ADDR 1
#define TSEC2_PHY_ADDR 2
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index dfb2679883a9..4560a432bed6 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -371,8 +371,8 @@
#define C
[PoC 213/241] global: Migrate CONFIG_TSEC2 to CFG
Signed-off-by: Tom Rini
---
board/freescale/common/pixis.c | 2 +-
board/freescale/mpc8548cds/mpc8548cds.c | 2 +-
board/freescale/p1010rdb/p1010rdb.c | 2 +-
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
drivers/net/tsec.c | 2 +-
include/configs/MPC837XERDB.h | 6 +++---
include/configs/MPC8548CDS.h| 4 ++--
include/configs/P1010RDB.h | 4 ++--
include/configs/ls1021aiot.h| 4 ++--
include/configs/ls1021aqds.h| 4 ++--
include/configs/p1_p2_rdb_pc.h | 4 ++--
scripts/config_whitelist.txt| 4 ++--
12 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index 37d502f7ff4b..87deb4538a22 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -302,7 +302,7 @@ static int pixis_set_sgmii(struct cmd_tbl *cmdtp, int flag,
int argc,
switch_mask = PIXIS_VCFGEN1_TSEC1SER;
break;
#endif
-#ifdef CONFIG_TSEC2
+#ifdef CFG_TSEC2
case 2:
mask = PIXIS_VSPEED2_TSEC2SER;
switch_mask = PIXIS_VCFGEN1_TSEC2SER;
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board/freescale/mpc8548cds/mpc8548cds.c
index 4c10b1075e53..7ef204763eaa 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -212,7 +212,7 @@ int board_eth_init(struct bd_info *bis)
SET_STD_TSEC_INFO(tsec_info[num], 1);
num++;
#endif
-#ifdef CONFIG_TSEC2
+#ifdef CFG_TSEC2
SET_STD_TSEC_INFO(tsec_info[num], 2);
num++;
#endif
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
index a527d44d6865..e7ba90a8d1a3 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -493,7 +493,7 @@ int board_eth_init(struct bd_info *bis)
SET_STD_TSEC_INFO(tsec_info[num], 1);
num++;
#endif
-#ifdef CONFIG_TSEC2
+#ifdef CFG_TSEC2
SET_STD_TSEC_INFO(tsec_info[num], 2);
num++;
#endif
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 7d2b8ec12d9f..5dac8fcce2cb 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -377,7 +377,7 @@ int board_eth_init(struct bd_info *bis)
SET_STD_TSEC_INFO(tsec_info[num], 1);
num++;
#endif
-#ifdef CONFIG_TSEC2
+#ifdef CFG_TSEC2
SET_STD_TSEC_INFO(tsec_info[num], 2);
if (is_serdes_configured(SGMII_TSEC2)) {
printf("eTSEC2 is in sgmii mode.\n");
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index ad2c68e2a73d..7287c6ad4cbb 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -29,7 +29,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CFG_TSEC1
STD_TSEC_INFO(1), /* TSEC1 */
#endif
-#ifdef CONFIG_TSEC2
+#ifdef CFG_TSEC2
STD_TSEC_INFO(2), /* TSEC2 */
#endif
#ifdef CONFIG_MPC85XX_FEC
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 82101ced5323..b9ac67fae0be 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -41,7 +41,7 @@
#ifdef CONFIG_VSC7385_ENET
-#define CONFIG_TSEC2
+#define CFG_TSEC2
/* The flash address and size of the VSC7385 firmware image */
#define CONFIG_VSC7385_IMAGE 0xFE7FE000
@@ -195,8 +195,8 @@
#define TSEC1_PHYIDX 0
#endif
-#ifdef CONFIG_TSEC2
-#define CONFIG_TSEC2_NAME "TSEC1"
+#ifdef CFG_TSEC2
+#define CFG_TSEC2_NAME "TSEC1"
#define TSEC2_PHY_ADDR 0x1c
#define TSEC2_FLAGS(TSEC_GIGABIT | TSEC_REDUCED)
#define TSEC2_PHYIDX 0
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 53639db0b9dd..35154630add0 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -287,8 +287,8 @@
#define CFG_TSEC1 1
#define CFG_TSEC1_NAME "eTSEC0"
-#define CONFIG_TSEC2 1
-#define CONFIG_TSEC2_NAME "eTSEC1"
+#define CFG_TSEC2 1
+#define CFG_TSEC2_NAME "eTSEC1"
#define CONFIG_TSEC3 1
#define CONFIG_TSEC3_NAME "eTSEC2"
#define CONFIG_TSEC4
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 88865aac01eb..b01b3b019662 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -353,8 +353,8 @@ extern unsigned long get_sdram_size(void);
#define CFG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
#define CFG_TSEC1 1
#define CFG_TSEC1_NAME "eTSEC1"
-#define CONFIG_TSEC2 1
-#define CONFIG_TSEC2_NAME "eTSEC2"
+#define CFG_TSEC2 1
+#define CFG_TSEC2_NAME "eTSEC2"
#define CONFIG_TSEC3 1
#define CONFIG_TSEC3_NAME "eTSEC3"
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index fff4e816ecc
[PoC 211/241] global: Migrate CONFIG_TPM_TIS_BASE_ADDRESS to CFG
Signed-off-by: Tom Rini --- README| 2 +- include/configs/efi-x86_app.h | 2 +- include/configs/x86-common.h | 2 +- scripts/config_whitelist.txt | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/README b/README index 57ca5733dd64..aeb94d003f6a 100644 --- a/README +++ b/README @@ -585,7 +585,7 @@ The following options need to be configured: Support for generic parallel port TPM devices. Only one device per system is supported at this time. - CONFIG_TPM_TIS_BASE_ADDRESS + CFG_TPM_TIS_BASE_ADDRESS Base address where the generic TPM device is mapped to. Contemporary x86 systems usually map it at 0xfed4. diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 96ad15b535d1..3420b4265a58 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -8,7 +8,7 @@ #include -#undef CONFIG_TPM_TIS_BASE_ADDRESS +#undef CFG_TPM_TIS_BASE_ADDRESS #define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=vidconsole\0" \ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 9cfaa02958c8..becc87b1a6b4 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -16,7 +16,7 @@ */ /* Generic TPM interfaced through LPC bus */ -#define CONFIG_TPM_TIS_BASE_ADDRESS0xfed4 +#define CFG_TPM_TIS_BASE_ADDRESS0xfed4 /*--- * Serial Configuration diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b78294211ab0..34a34a2f0776 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -220,7 +220,7 @@ CFG_TEGRA_VDD_CORE_TPS62366A_SET1 CFG_TESTPIN_MASK CFG_TESTPIN_REG CFG_THOR_RESET_OFF -CONFIG_TPM_TIS_BASE_ADDRESS +CFG_TPM_TIS_BASE_ADDRESS CONFIG_TSEC1 CONFIG_TSEC1_NAME CONFIG_TSEC2 -- 2.25.1
[PoC 212/241] global: Migrate CONFIG_TSEC1 to CFG
Signed-off-by: Tom Rini
---
board/freescale/common/pixis.c | 2 +-
board/freescale/mpc8548cds/mpc8548cds.c | 2 +-
board/freescale/p1010rdb/p1010rdb.c | 2 +-
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
drivers/net/tsec.c | 2 +-
include/configs/MPC837XERDB.h | 6 +++---
include/configs/MPC8548CDS.h| 4 ++--
include/configs/P1010RDB.h | 4 ++--
include/configs/ls1021aiot.h| 4 ++--
include/configs/ls1021aqds.h| 4 ++--
include/configs/p1_p2_rdb_pc.h | 4 ++--
include/configs/socrates.h | 4 ++--
scripts/config_whitelist.txt| 4 ++--
13 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index 6fdb11039e54..37d502f7ff4b 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -296,7 +296,7 @@ static int pixis_set_sgmii(struct cmd_tbl *cmdtp, int flag,
int argc,
which_tsec = simple_strtoul(argv[1], NULL, 0);
switch (which_tsec) {
-#ifdef CONFIG_TSEC1
+#ifdef CFG_TSEC1
case 1:
mask = PIXIS_VSPEED2_TSEC1SER;
switch_mask = PIXIS_VCFGEN1_TSEC1SER;
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board/freescale/mpc8548cds/mpc8548cds.c
index 73e024eaa011..4c10b1075e53 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -208,7 +208,7 @@ int board_eth_init(struct bd_info *bis)
struct tsec_info_struct tsec_info[4];
int num = 0;
-#ifdef CONFIG_TSEC1
+#ifdef CFG_TSEC1
SET_STD_TSEC_INFO(tsec_info[num], 1);
num++;
#endif
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
index 0f014823c935..a527d44d6865 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -489,7 +489,7 @@ int board_eth_init(struct bd_info *bis)
cpu = gd->arch.cpu;
-#ifdef CONFIG_TSEC1
+#ifdef CFG_TSEC1
SET_STD_TSEC_INFO(tsec_info[num], 1);
num++;
#endif
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 9e26c201b7a8..7d2b8ec12d9f 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -373,7 +373,7 @@ int board_eth_init(struct bd_info *bis)
(void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
int num = 0;
-#ifdef CONFIG_TSEC1
+#ifdef CFG_TSEC1
SET_STD_TSEC_INFO(tsec_info[num], 1);
num++;
#endif
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 8b6f034ea165..ad2c68e2a73d 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -26,7 +26,7 @@
/* Default initializations for TSEC controllers. */
static struct tsec_info_struct tsec_info[] = {
-#ifdef CONFIG_TSEC1
+#ifdef CFG_TSEC1
STD_TSEC_INFO(1), /* TSEC1 */
#endif
#ifdef CONFIG_TSEC2
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 2ca7862147de..82101ced5323 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -185,10 +185,10 @@
#define CFG_GMII /* MII PHY management */
-#define CONFIG_TSEC1
+#define CFG_TSEC1
-#ifdef CONFIG_TSEC1
-#define CONFIG_TSEC1_NAME "TSEC0"
+#ifdef CFG_TSEC1
+#define CFG_TSEC1_NAME "TSEC0"
#define CFG_SYS_TSEC1_OFFSET 0x24000
#define TSEC1_PHY_ADDR 2
#define TSEC1_FLAGS(TSEC_GIGABIT | TSEC_REDUCED)
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index d47378e19352..53639db0b9dd 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -285,8 +285,8 @@
#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "eTSEC0"
+#define CFG_TSEC1 1
+#define CFG_TSEC1_NAME "eTSEC0"
#define CONFIG_TSEC2 1
#define CONFIG_TSEC2_NAME "eTSEC1"
#define CONFIG_TSEC3 1
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 04f270e11806..88865aac01eb 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -351,8 +351,8 @@ extern unsigned long get_sdram_size(void);
#if defined(CONFIG_TSEC_ENET)
#define CFG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "eTSEC1"
+#define CFG_TSEC1 1
+#define CFG_TSEC1_NAME "eTSEC1"
#define CONFIG_TSEC2 1
#define CONFIG_TSEC2_NAME "eTSEC2"
#define CONFIG_TSEC3 1
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 08532dc3e0aa..fff4e816ecc1 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -72,8 +72,8 @@
#ifdef CONFIG_TSEC_ENET
#define CFG_MII_DEFAULT_TSEC 1
-#define CONFIG_TSEC1 1
-#define CO
[PoC 209/241] global: Migrate CONFIG_TESTPIN_REG to CFG
Signed-off-by: Tom Rini
---
board/keymile/km83xx/km83xx.c | 2 +-
include/configs/kmcoge5ne.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 73e3709bbba2..9ec1dbc6f97b 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -216,7 +216,7 @@ int post_hotkeys_pressed(void)
int testpin = 0;
struct km_bec_fpga *base =
(struct km_bec_fpga *)CFG_SYS_KMBEC_FPGA_BASE;
- int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG);
+ int testpin_reg = in_8(&base->CFG_TESTPIN_REG);
testpin = (testpin_reg & CFG_TESTPIN_MASK) != 0;
debug("post_hotkeys_pressed: %d\n", !testpin);
return testpin;
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index 161b07406f3a..8ca64f8e9e9a 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -36,7 +36,7 @@
#define CFG_POST (CFG_SYS_POST_MEMORY|CFG_SYS_POST_MEM_REGIONS)
#define CFG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END
-#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
+#define CFG_TESTPIN_REG gprt3 /* for kmcoge5ne */
#define CFG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
#endif /* CONFIG */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 56a7f2f656c5..dbb98c572076 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -218,7 +218,7 @@ CFG_TEGRA_UARTA_SDIO1
CFG_TEGRA_VDD_CORE_TPS62361B_SET3
CFG_TEGRA_VDD_CORE_TPS62366A_SET1
CFG_TESTPIN_MASK
-CONFIG_TESTPIN_REG
+CFG_TESTPIN_REG
CONFIG_THOR_RESET_OFF
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_TSEC1
--
2.25.1
[PoC 210/241] global: Migrate CONFIG_THOR_RESET_OFF to CFG
Signed-off-by: Tom Rini
---
drivers/usb/gadget/f_thor.c | 4 ++--
drivers/usb/gadget/f_thor.h | 2 +-
include/configs/xilinx_versal.h | 2 +-
include/configs/xilinx_versal_net.h | 2 +-
include/configs/xilinx_zynqmp.h | 2 +-
include/configs/zynq-common.h | 2 +-
scripts/config_whitelist.txt| 2 +-
7 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 47ef55b2fd31..a83fd6fe90b0 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -129,7 +129,7 @@ static int process_rqt_cmd(const struct rqt_box *rqt)
send_rsp(rsp);
g_dnl_unregister();
dfu_free_entities();
-#ifdef CONFIG_THOR_RESET_OFF
+#ifdef CFG_THOR_RESET_OFF
return RESET_DONE;
#endif
run_command("reset", 0);
@@ -726,7 +726,7 @@ int thor_handle(void)
if (ret > 0) {
ret = process_data();
-#ifdef CONFIG_THOR_RESET_OFF
+#ifdef CFG_THOR_RESET_OFF
if (ret == RESET_DONE)
break;
#endif
diff --git a/drivers/usb/gadget/f_thor.h b/drivers/usb/gadget/f_thor.h
index 8ba3fa21b733..2c22ccef542b 100644
--- a/drivers/usb/gadget/f_thor.h
+++ b/drivers/usb/gadget/f_thor.h
@@ -120,7 +120,7 @@ struct f_thor {
#define F_NAME_BUF_SIZE 32
#define THOR_PACKET_SIZE SZ_1M /* 1 MiB */
#define THOR_STORE_UNIT_SIZE SZ_32M /* 32 MiB */
-#ifdef CONFIG_THOR_RESET_OFF
+#ifdef CFG_THOR_RESET_OFF
#define RESET_DONE 0x
#endif
#endif /* _USB_THOR_H_ */
diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h
index 836a6506b1ad..00e466528e87 100644
--- a/include/configs/xilinx_versal.h
+++ b/include/configs/xilinx_versal.h
@@ -25,7 +25,7 @@
#if defined(CONFIG_CMD_DFU)
#define DFU_DEFAULT_POLL_TIMEOUT 300
-#define CONFIG_THOR_RESET_OFF
+#define CFG_THOR_RESET_OFF
#endif
/* Ethernet driver */
diff --git a/include/configs/xilinx_versal_net.h
b/include/configs/xilinx_versal_net.h
index b8d2685246f3..672c54e79fd9 100644
--- a/include/configs/xilinx_versal_net.h
+++ b/include/configs/xilinx_versal_net.h
@@ -25,7 +25,7 @@
#if defined(CONFIG_CMD_DFU)
#define DFU_DEFAULT_POLL_TIMEOUT 300
-#define CONFIG_THOR_RESET_OFF
+#define CFG_THOR_RESET_OFF
#define DFU_ALT_INFO_RAM \
"dfu_ram_info=" \
"setenv dfu_alt_info " \
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index f07e7d3f0ac3..2452f81570a8 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -31,7 +31,7 @@
#if defined(CONFIG_ZYNQMP_USB)
#define DFU_DEFAULT_POLL_TIMEOUT 300
-#define CONFIG_THOR_RESET_OFF
+#define CFG_THOR_RESET_OFF
# define PARTS_DEFAULT \
"partitions=uuid_disk=${uuid_gpt_disk};" \
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 1edd49a784d4..901f602d3d4e 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -41,7 +41,7 @@
#ifdef CONFIG_USB_EHCI_ZYNQ
# define DFU_DEFAULT_POLL_TIMEOUT 300
-# define CONFIG_THOR_RESET_OFF
+# define CFG_THOR_RESET_OFF
#endif
/* enable preboot to be loaded before CONFIG_BOOTDELAY */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index dbb98c572076..b78294211ab0 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -219,7 +219,7 @@ CFG_TEGRA_VDD_CORE_TPS62361B_SET3
CFG_TEGRA_VDD_CORE_TPS62366A_SET1
CFG_TESTPIN_MASK
CFG_TESTPIN_REG
-CONFIG_THOR_RESET_OFF
+CFG_THOR_RESET_OFF
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_TSEC1
CONFIG_TSEC1_NAME
--
2.25.1
[PoC 208/241] global: Migrate CONFIG_TESTPIN_MASK to CFG
Signed-off-by: Tom Rini
---
board/keymile/km83xx/km83xx.c | 2 +-
include/configs/kmcoge5ne.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 88afc76bbbf6..73e3709bbba2 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -217,7 +217,7 @@ int post_hotkeys_pressed(void)
struct km_bec_fpga *base =
(struct km_bec_fpga *)CFG_SYS_KMBEC_FPGA_BASE;
int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG);
- testpin = (testpin_reg & CONFIG_TESTPIN_MASK) != 0;
+ testpin = (testpin_reg & CFG_TESTPIN_MASK) != 0;
debug("post_hotkeys_pressed: %d\n", !testpin);
return testpin;
}
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index c8da6aa3ce4e..161b07406f3a 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -37,6 +37,6 @@
#define CFG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END
#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
-#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
+#define CFG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
#endif /* CONFIG */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8bb49acc7595..56a7f2f656c5 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -217,7 +217,7 @@ CFG_TEGRA_UARTA_GPU
CFG_TEGRA_UARTA_SDIO1
CFG_TEGRA_VDD_CORE_TPS62361B_SET3
CFG_TEGRA_VDD_CORE_TPS62366A_SET1
-CONFIG_TESTPIN_MASK
+CFG_TESTPIN_MASK
CONFIG_TESTPIN_REG
CONFIG_THOR_RESET_OFF
CONFIG_TPM_TIS_BASE_ADDRESS
--
2.25.1
[PoC 206/241] global: Migrate CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 to CFG
Signed-off-by: Tom Rini --- arch/arm/mach-tegra/tegra30/cpu.c | 2 +- include/configs/cardhu.h | 2 +- scripts/config_whitelist.txt | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c index 651edd27ee87..1e2848b5049b 100644 --- a/arch/arm/mach-tegra/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -62,7 +62,7 @@ static void enable_cpu_power_rail(void) tegra_i2c_ll_write_addr(TPS62366A_I2C_ADDR, 2); tegra_i2c_ll_write_data(TPS62366A_SET1_DATA, I2C_SEND_2_BYTES); #endif -#ifdef CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 +#ifdef CFG_TEGRA_VDD_CORE_TPS62361B_SET3 tegra_i2c_ll_write_addr(TPS62361B_I2C_ADDR, 2); tegra_i2c_ll_write_data(TPS62361B_SET3_DATA, I2C_SEND_2_BYTES); #endif diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 722e09d43bf3..8079acc47c29 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -11,7 +11,7 @@ #include "tegra30-common.h" /* VDD core PMIC */ -#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 +#define CFG_TEGRA_VDD_CORE_TPS62361B_SET3 /* High-level configuration options */ #define CFG_TEGRA_BOARD_STRING "NVIDIA Cardhu" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index bb11839ede29..7b609b55e8cf 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -215,7 +215,7 @@ CFG_TEGRA_SLINK_CTRLS CFG_TEGRA_SPI CFG_TEGRA_UARTA_GPU CFG_TEGRA_UARTA_SDIO1 -CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 +CFG_TEGRA_VDD_CORE_TPS62361B_SET3 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 CONFIG_TESTPIN_MASK CONFIG_TESTPIN_REG -- 2.25.1
[PoC 207/241] global: Migrate CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 to CFG
Signed-off-by: Tom Rini --- arch/arm/mach-tegra/tegra30/cpu.c | 2 +- include/configs/beaver.h | 2 +- scripts/config_whitelist.txt | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c index 1e2848b5049b..0e6835306b64 100644 --- a/arch/arm/mach-tegra/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -58,7 +58,7 @@ static void enable_cpu_power_rail(void) writel(reg, &pmc->pmc_cntrl); /* Set VDD_CORE to 1.200V. */ -#ifdef CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 +#ifdef CFG_TEGRA_VDD_CORE_TPS62366A_SET1 tegra_i2c_ll_write_addr(TPS62366A_I2C_ADDR, 2); tegra_i2c_ll_write_data(TPS62366A_SET1_DATA, I2C_SEND_2_BYTES); #endif diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 35af678d2199..cfe47c65f5eb 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -11,7 +11,7 @@ #include "tegra30-common.h" /* VDD core PMIC */ -#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 +#define CFG_TEGRA_VDD_CORE_TPS62366A_SET1 /* High-level configuration options */ #define CFG_TEGRA_BOARD_STRING "NVIDIA Beaver" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 7b609b55e8cf..8bb49acc7595 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -216,7 +216,7 @@ CFG_TEGRA_SPI CFG_TEGRA_UARTA_GPU CFG_TEGRA_UARTA_SDIO1 CFG_TEGRA_VDD_CORE_TPS62361B_SET3 -CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 +CFG_TEGRA_VDD_CORE_TPS62366A_SET1 CONFIG_TESTPIN_MASK CONFIG_TESTPIN_REG CONFIG_THOR_RESET_OFF -- 2.25.1
[PoC 204/241] global: Migrate CONFIG_TEGRA_UARTA_GPU to CFG
Signed-off-by: Tom Rini
---
arch/arm/mach-tegra/board.c | 2 +-
include/configs/trimslice.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index b4e30de509b7..e4f5540cab52 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -168,7 +168,7 @@ static int uart_configs[] = {
#if defined(CONFIG_TEGRA20)
#if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
FUNCMUX_UART1_UAA_UAB,
- #elif defined(CONFIG_TEGRA_UARTA_GPU)
+ #elif defined(CFG_TEGRA_UARTA_GPU)
FUNCMUX_UART1_GPU,
#elif defined(CONFIG_TEGRA_UARTA_SDIO1)
FUNCMUX_UART1_SDIO1,
diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index ca5462fe4727..920cbc82d0c1 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -15,7 +15,7 @@
/* Board-specific serial config */
#define CFG_TEGRA_ENABLE_UARTA
-#define CONFIG_TEGRA_UARTA_GPU
+#define CFG_TEGRA_UARTA_GPU
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* SPI */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2acc5a7412d6..f3cb0607741b 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -213,7 +213,7 @@ CFG_TEGRA_ENABLE_UARTA
CFG_TEGRA_ENABLE_UARTD
CFG_TEGRA_SLINK_CTRLS
CFG_TEGRA_SPI
-CONFIG_TEGRA_UARTA_GPU
+CFG_TEGRA_UARTA_GPU
CONFIG_TEGRA_UARTA_SDIO1
CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
--
2.25.1
[PoC 205/241] global: Migrate CONFIG_TEGRA_UARTA_SDIO1 to CFG
Signed-off-by: Tom Rini
---
arch/arm/mach-tegra/board.c | 2 +-
include/configs/colibri_t20.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index e4f5540cab52..45bc1b8c9673 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -170,7 +170,7 @@ static int uart_configs[] = {
FUNCMUX_UART1_UAA_UAB,
#elif defined(CFG_TEGRA_UARTA_GPU)
FUNCMUX_UART1_GPU,
- #elif defined(CONFIG_TEGRA_UARTA_SDIO1)
+ #elif defined(CFG_TEGRA_UARTA_SDIO1)
FUNCMUX_UART1_SDIO1,
#else
FUNCMUX_UART1_IRRX_IRTX,
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index 19044be6cc06..206221606fa3 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -12,7 +12,7 @@
/* Board-specific serial config */
#define CFG_TEGRA_ENABLE_UARTA
-#define CONFIG_TEGRA_UARTA_SDIO1
+#define CFG_TEGRA_UARTA_SDIO1
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* NAND support */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f3cb0607741b..bb11839ede29 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -214,7 +214,7 @@ CFG_TEGRA_ENABLE_UARTD
CFG_TEGRA_SLINK_CTRLS
CFG_TEGRA_SPI
CFG_TEGRA_UARTA_GPU
-CONFIG_TEGRA_UARTA_SDIO1
+CFG_TEGRA_UARTA_SDIO1
CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
CONFIG_TESTPIN_MASK
--
2.25.1
[PoC 203/241] global: Migrate CONFIG_TEGRA_SPI to CFG
Signed-off-by: Tom Rini --- arch/arm/mach-tegra/board2.c| 2 +- include/configs/tegra-common-post.h | 2 +- scripts/config_whitelist.txt| 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index c7a45f4ff82a..615d0ee43c0e 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -125,7 +125,7 @@ int board_init(void) tegra_gpu_config(); -#ifdef CONFIG_TEGRA_SPI +#ifdef CFG_TEGRA_SPI pin_mux_spi(); #endif diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 31c82822a2af..69fbe57e2649 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -74,7 +74,7 @@ BOARD_EXTRA_ENV_SETTINGS #if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI) -#define CONFIG_TEGRA_SPI +#define CFG_TEGRA_SPI #endif #endif /* __TEGRA_COMMON_POST_H */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b7f8b290bff3..2acc5a7412d6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -212,7 +212,7 @@ CFG_TEGRA_BOARD_STRING CFG_TEGRA_ENABLE_UARTA CFG_TEGRA_ENABLE_UARTD CFG_TEGRA_SLINK_CTRLS -CONFIG_TEGRA_SPI +CFG_TEGRA_SPI CONFIG_TEGRA_UARTA_GPU CONFIG_TEGRA_UARTA_SDIO1 CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 -- 2.25.1
[PoC 202/241] global: Migrate CONFIG_TEGRA_SLINK_CTRLS to CFG
Signed-off-by: Tom Rini --- include/configs/beaver.h | 2 +- include/configs/cardhu.h | 2 +- include/configs/tec-ng.h | 2 +- scripts/config_whitelist.txt | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 43bc8dc32159..35af678d2199 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -21,7 +21,7 @@ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 +#define CFG_TEGRA_SLINK_CTRLS 6 #define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 29d5e011e6ef..722e09d43bf3 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -25,7 +25,7 @@ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 +#define CFG_TEGRA_SLINK_CTRLS 6 #define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 22099a86d5f6..8b231e7c77a6 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -19,7 +19,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 +#define CFG_TEGRA_SLINK_CTRLS 6 #define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c3ff80696412..b7f8b290bff3 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -211,7 +211,7 @@ CFG_STD_DEVICES_SETTINGS CFG_TEGRA_BOARD_STRING CFG_TEGRA_ENABLE_UARTA CFG_TEGRA_ENABLE_UARTD -CONFIG_TEGRA_SLINK_CTRLS +CFG_TEGRA_SLINK_CTRLS CONFIG_TEGRA_SPI CONFIG_TEGRA_UARTA_GPU CONFIG_TEGRA_UARTA_SDIO1 -- 2.25.1
[PoC 201/241] global: Migrate CONFIG_TEGRA_ENABLE_UARTD to CFG
Signed-off-by: Tom Rini --- arch/arm/mach-tegra/board.c | 2 +- include/configs/cei-tk1-som.h | 2 +- include/configs/dalmore.h | 2 +- include/configs/harmony.h | 2 +- include/configs/jetson-tk1.h | 2 +- include/configs/medcom-wide.h | 2 +- include/configs/plutux.h | 2 +- include/configs/seaboard.h| 2 +- include/configs/tec-ng.h | 2 +- include/configs/tec.h | 2 +- include/configs/ventana.h | 2 +- scripts/config_whitelist.txt | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index b4b73df2265e..b4e30de509b7 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -247,7 +247,7 @@ void board_init_uart_f(void) #ifdef CONFIG_TEGRA_ENABLE_UARTC uart_ids |= UARTC; #endif -#ifdef CONFIG_TEGRA_ENABLE_UARTD +#ifdef CFG_TEGRA_ENABLE_UARTD uart_ids |= UARTD; #endif #ifdef CONFIG_TEGRA_ENABLE_UARTE diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 045cd25104d7..73b51336973e 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -19,7 +19,7 @@ #define CFG_TEGRA_BOARD_STRING "CEI tk1-som" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD +#define CFG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* SPI */ diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 8f97848b1714..806fcd039f22 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -14,7 +14,7 @@ #define CFG_TEGRA_BOARD_STRING "NVIDIA Dalmore" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD +#define CFG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 59ead58587db..028ff8b8144b 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -14,7 +14,7 @@ #define CFG_TEGRA_BOARD_STRING "NVIDIA Harmony" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD +#define CFG_TEGRA_ENABLE_UARTD /* UARTD: keyboard satellite board UART, default */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 4878e6526b5a..0f29d21e9d47 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -15,7 +15,7 @@ #define CFG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD +#define CFG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index e0d947f7e3c5..0096d1be50a4 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -15,7 +15,7 @@ #define CFG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ +#define CFG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 82ef6959fd2f..385b1aef7b81 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -15,7 +15,7 @@ #define CFG_TEGRA_BOARD_STRING "Avionic Design Plutux" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ +#define CFG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 5cbc33461251..9b2fa23e076a 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -15,7 +15,7 @@ #define CFG_TEGRA_BOARD_STRING "NVIDIA Seaboard" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD +#define CFG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 966750539b5d..22099a86d5f6 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -13,7 +13,7 @@ #define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD +#define CFG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/tec.h b/include/configs/tec.h index b8819909b6bc..b344b3e5f16e 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -15,7 +15,7 @@ #define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluatio
[PoC 200/241] global: Migrate CONFIG_TEGRA_ENABLE_UARTA to CFG
Signed-off-by: Tom Rini --- arch/arm/mach-tegra/board.c | 2 +- include/configs/apalis-tk1.h | 2 +- include/configs/apalis_t30.h | 2 +- include/configs/beaver.h | 2 +- include/configs/cardhu.h | 2 +- include/configs/colibri_t20.h | 2 +- include/configs/colibri_t30.h | 2 +- include/configs/harmony.h | 2 +- include/configs/nyan-big.h| 2 +- include/configs/p2371-.h | 2 +- include/configs/p2371-2180.h | 2 +- include/configs/p2571.h | 2 +- include/configs/p3450-.h | 2 +- include/configs/paz00.h | 2 +- include/configs/trimslice.h | 2 +- include/configs/venice2.h | 2 +- scripts/config_whitelist.txt | 2 +- 17 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index f8b61a2b3e3b..b4b73df2265e 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -238,7 +238,7 @@ void board_init_uart_f(void) #if IS_ENABLED(CONFIG_TEGRA_PINCTRL) int uart_ids = 0; /* bit mask of which UART ids to enable */ -#ifdef CONFIG_TEGRA_ENABLE_UARTA +#ifdef CFG_TEGRA_ENABLE_UARTA uart_ids |= UARTA; #endif #ifdef CONFIG_TEGRA_ENABLE_UARTB diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 7fd99ea907d1..8600529379d1 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -13,7 +13,7 @@ #include "tegra124-common.h" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define CFG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define FDT_MODULE "apalis-v1.2" diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 4f00b3bad3f4..6d017d88707b 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -20,7 +20,7 @@ * Apalis UART3: NVIDIA UARTB * Apalis UART4: NVIDIA UARTC */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define CFG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ diff --git a/include/configs/beaver.h b/include/configs/beaver.h index c22cdaed3f74..43bc8dc32159 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -17,7 +17,7 @@ #define CFG_TEGRA_BOARD_STRING "NVIDIA Beaver" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define CFG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index c9cf110147a2..29d5e011e6ef 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -21,7 +21,7 @@ "fdtfile=tegra30-cardhu-a04.dtb\0" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define CFG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 2ba3c3bc87db..19044be6cc06 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -11,7 +11,7 @@ #include "tegra20-common.h" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define CFG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_UARTA_SDIO1 #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index ffed71a2e828..86097670c275 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -21,7 +21,7 @@ * Colibri UART-B: NVIDIA UARTD * Colibri UART-C: NVIDIA UARTB */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define CFG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 97914889092b..59ead58587db 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -18,7 +18,7 @@ /* UARTD: keyboard satellite board UART, default */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -#ifdef CONFIG_TEGRA_ENABLE_UARTA +#ifdef CFG_TEGRA_ENABLE_UARTA /* UARTA: debug board UART */ #define CFG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE #endif diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index 946759f4fb20..02f8b2c624b3 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -15,7 +15,7 @@ #define CFG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define CFG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ diff --git a/include/configs/p2371-.h b/include/configs/p2371-.h index 8b734e1e948c..e22cb8e8eb1b 100644 --- a/include/configs/p2371-.h +++ b/include/configs/p2371-.h @@ -15,7 +15,7 @@ #define CFG_TEGRA_BOARD_STRING "NVIDIA P2371-" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA +#define
[PoC 199/241] global: Migrate CONFIG_TEGRA_BOARD_STRING to CFG
Signed-off-by: Tom Rini
---
arch/arm/mach-tegra/board2.c | 2 +-
include/configs/beaver.h | 2 +-
include/configs/cardhu.h | 2 +-
include/configs/cei-tk1-som.h | 2 +-
include/configs/dalmore.h | 2 +-
include/configs/harmony.h | 2 +-
include/configs/jetson-tk1.h | 2 +-
include/configs/medcom-wide.h | 2 +-
include/configs/nyan-big.h| 2 +-
include/configs/p2371-.h | 2 +-
include/configs/p2371-2180.h | 2 +-
include/configs/p2571.h | 2 +-
include/configs/p2771-.h | 2 +-
include/configs/p3450-.h | 2 +-
include/configs/paz00.h | 2 +-
include/configs/plutux.h | 2 +-
include/configs/seaboard.h| 2 +-
include/configs/tec-ng.h | 2 +-
include/configs/tec.h | 2 +-
include/configs/trimslice.h | 2 +-
include/configs/venice2.h | 2 +-
include/configs/ventana.h | 2 +-
scripts/config_whitelist.txt | 2 +-
23 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 54bbd8a776e9..c7a45f4ff82a 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -89,7 +89,7 @@ int checkboard(void)
{
int board_id = tegra_board_id();
- printf("Board: %s", CONFIG_TEGRA_BOARD_STRING);
+ printf("Board: %s", CFG_TEGRA_BOARD_STRING);
if (board_id != -1)
printf(", ID: %d\n", board_id);
printf("\n");
diff --git a/include/configs/beaver.h b/include/configs/beaver.h
index 1a540c9f7122..c22cdaed3f74 100644
--- a/include/configs/beaver.h
+++ b/include/configs/beaver.h
@@ -14,7 +14,7 @@
#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver"
+#define CFG_TEGRA_BOARD_STRING "NVIDIA Beaver"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index 0a5eaf03d9a5..c9cf110147a2 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -14,7 +14,7 @@
#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu"
+#define CFG_TEGRA_BOARD_STRING "NVIDIA Cardhu"
#define BOARD_EXTRA_ENV_SETTINGS \
"board_name=cardhu-a04\0" \
diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h
index 3aaed94e15cb..045cd25104d7 100644
--- a/include/configs/cei-tk1-som.h
+++ b/include/configs/cei-tk1-som.h
@@ -16,7 +16,7 @@
#include "tegra124-common.h"
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som"
+#define CFG_TEGRA_BOARD_STRING "CEI tk1-som"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h
index 39e1aded3730..8f97848b1714 100644
--- a/include/configs/dalmore.h
+++ b/include/configs/dalmore.h
@@ -11,7 +11,7 @@
#include "tegra114-common.h"
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore"
+#define CFG_TEGRA_BOARD_STRING "NVIDIA Dalmore"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 211dab4d2337..97914889092b 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -11,7 +11,7 @@
#include "tegra20-common.h"
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony"
+#define CFG_TEGRA_BOARD_STRING "NVIDIA Harmony"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index d3bb6d760376..4878e6526b5a 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -12,7 +12,7 @@
#include "tegra124-common.h"
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1"
+#define CFG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h
index a8d8d8b09e02..e0d947f7e3c5 100644
--- a/include/configs/medcom-wide.h
+++ b/include/configs/medcom-wide.h
@@ -12,7 +12,7 @@
#include "tegra20-common.h"
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide"
+#define CFG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h
index fbba4ca701db..946759f4fb20 100644
--- a/include/configs/nyan-big.h
+++ b/include/configs/nyan-big.h
@@ -12,7 +12,7 @@
#include "tegra124-common.h"
/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big"
+#define CFG_TEGRA_BOARD_STRING "Google/N
[PoC 198/241] global: Migrate CONFIG_STD_DEVICES_SETTINGS to CFG
Signed-off-by: Tom Rini --- include/configs/bayleybay.h | 2 +- include/configs/cherryhill.h | 2 +- include/configs/chromebook_coral.h| 4 ++-- include/configs/chromebook_samus.h| 4 ++-- include/configs/conga-qeval20-qa3-e3845.h | 2 +- include/configs/coreboot.h| 2 +- include/configs/cougarcanyon2.h | 2 +- include/configs/crownbay.h| 2 +- include/configs/dfi-bt700.h | 2 +- include/configs/efi-x86_app.h | 2 +- include/configs/efi-x86_payload.h | 2 +- include/configs/galileo.h | 2 +- include/configs/minnowmax.h | 2 +- include/configs/qemu-x86.h| 2 +- include/configs/slimbootloader.h | 4 ++-- include/configs/som-db5800-som-6867.h | 2 +- include/configs/theadorable-x86-common.h | 2 +- include/configs/x86-chromebook.h | 2 +- include/configs/x86-common.h | 2 +- scripts/config_whitelist.txt | 2 +- 20 files changed, 23 insertions(+), 23 deletions(-) diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index b347125f2fa0..b0df328cd84b 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS"stdin=serial,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/cherryhill.h b/include/configs/cherryhill.h index 726c43d35ea0..d6ce70a96aea 100644 --- a/include/configs/cherryhill.h +++ b/include/configs/cherryhill.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS"stdin=usbkbd,serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h index d14c1d445b25..43fdc394416d 100644 --- a/include/configs/chromebook_coral.h +++ b/include/configs/chromebook_coral.h @@ -13,8 +13,8 @@ #include #include -#undef CONFIG_STD_DEVICES_SETTINGS -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#undef CFG_STD_DEVICES_SETTINGS +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index e29be3fda4ac..03a1033c5735 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -15,8 +15,8 @@ #include #include -#undef CONFIG_STD_DEVICES_SETTINGS -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#undef CFG_STD_DEVICES_SETTINGS +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 31cfd2b12923..1066da3f8326 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index f73004386fda..b4f49bf5289d 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -15,7 +15,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS"stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index b64c7df1b25f..31639e48da88 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS"stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index ff74deb3d400..387bb8800e89 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -12,7 +12,7 @@ #i
[PoC 195/241] global: Migrate CONFIG_SPI_N25Q256A_RESET to CFG
Signed-off-by: Tom Rini --- include/configs/socfpga_sr1500.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 70df27241ca6..30663c08f2e2 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -16,7 +16,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* Enable SPI NOR flash reset, needed for SPI booting */ -#define CONFIG_SPI_N25Q256A_RESET +#define CFG_SPI_N25Q256A_RESET /* Environment setting for SPI flash */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c83653e9ca94..7058ba72ba7f 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -204,7 +204,7 @@ CFG_SPI_BOOTING CFG_SPI_FLASH_QUAD CFG_SPI_FLASH_SIZE CFG_SPI_HALF_DUPLEX -CONFIG_SPI_N25Q256A_RESET +CFG_SPI_N25Q256A_RESET CONFIG_STACKBASE CONFIG_STANDALONE_LOAD_ADDR CONFIG_STD_DEVICES_SETTINGS -- 2.25.1
[PoC 197/241] global: Migrate CONFIG_STANDALONE_LOAD_ADDR to CFG
Signed-off-by: Tom Rini --- README| 2 +- arch/arc/config.mk| 2 +- arch/arm/config.mk| 6 +++--- arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 +- arch/m68k/config.mk | 2 +- arch/microblaze/config.mk | 2 +- arch/mips/config.mk | 4 ++-- arch/nios2/config.mk | 2 +- arch/powerpc/config.mk| 2 +- arch/riscv/config.mk | 2 +- arch/sh/config.mk | 2 +- arch/x86/config.mk| 2 +- config.mk | 2 +- examples/standalone/Makefile | 2 +- include/configs/display5.h| 2 +- include/configs/microchip_mpfs_icicle.h | 2 +- include/configs/opos6uldev.h | 2 +- include/configs/qemu-riscv.h | 2 +- include/configs/sifive-unleashed.h| 2 +- include/configs/sifive-unmatched.h| 2 +- include/configs/sunxi-common.h| 2 +- include/configs/xtfpga.h | 6 +++--- scripts/config_whitelist.txt | 2 +- tools/patman/test_checkpatch.py | 2 +- 24 files changed, 29 insertions(+), 29 deletions(-) diff --git a/README b/README index 3eb882c6a248..57ca5733dd64 100644 --- a/README +++ b/README @@ -1224,7 +1224,7 @@ The following options need to be configured: this is instead controlled by the value of /config/load-environment. - CONFIG_STANDALONE_LOAD_ADDR + CFG_STANDALONE_LOAD_ADDR This option defines a board specific value for the address where standalone program gets loaded, thus diff --git a/arch/arc/config.mk b/arch/arc/config.mk index 2b70945ac342..05e0eb7c9e4b 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -23,4 +23,4 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common LDFLAGS_FINAL += -pie --gc-sections # Load address for standalone apps -CONFIG_STANDALONE_LOAD_ADDR ?= 0x8200 +CFG_STANDALONE_LOAD_ADDR ?= 0x8200 diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 2065438d0530..9f9d5964dccd 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -3,11 +3,11 @@ # (C) Copyright 2000-2002 # Wolfgang Denk, DENX Software Engineering, w...@denx.de. -ifndef CONFIG_STANDALONE_LOAD_ADDR +ifndef CFG_STANDALONE_LOAD_ADDR ifneq ($(CONFIG_ARCH_OMAP2PLUS),) -CONFIG_STANDALONE_LOAD_ADDR = 0x8030 +CFG_STANDALONE_LOAD_ADDR = 0x8030 else -CONFIG_STANDALONE_LOAD_ADDR = 0xc10 +CFG_STANDALONE_LOAD_ADDR = 0xc10 endif endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index b82aac9126d0..c3af74f1d83f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -14,7 +14,7 @@ #include #endif -#define CONFIG_STANDALONE_LOAD_ADDR0x8030 +#define CFG_STANDALONE_LOAD_ADDR 0x8030 /* * Reserve secure memory diff --git a/arch/m68k/config.mk b/arch/m68k/config.mk index ed592334af2e..9b54b0b8f9ff 100644 --- a/arch/m68k/config.mk +++ b/arch/m68k/config.mk @@ -3,7 +3,7 @@ # (C) Copyright 2000-2002 # Wolfgang Denk, DENX Software Engineering, w...@denx.de. -CONFIG_STANDALONE_LOAD_ADDR ?= 0x2 +CFG_STANDALONE_LOAD_ADDR ?= 0x2 PLATFORM_CPPFLAGS += -D__M68K__ KBUILD_LDFLAGS += -n diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index d35b4f6db7a1..83e51fee649f 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -6,7 +6,7 @@ # (C) Copyright 2004 Atmark Techno, Inc. # Yasushi SHOJI -CONFIG_STANDALONE_LOAD_ADDR ?= 0x80F0 +CFG_STANDALONE_LOAD_ADDR ?= 0x80F0 PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__ PLATFORM_CPPFLAGS += -fdata-sections -ffunction-sections diff --git a/arch/mips/config.mk b/arch/mips/config.mk index 04f362780580..5434507a958b 100644 --- a/arch/mips/config.mk +++ b/arch/mips/config.mk @@ -25,14 +25,14 @@ ifdef CONFIG_32BIT PLATFORM_CPPFLAGS += -mabi=32 KBUILD_LDFLAGS += -m $(32bit-emul) OBJCOPYFLAGS += -O $(32bit-bfd) -CONFIG_STANDALONE_LOAD_ADDR?= 0x8020 +CFG_STANDALONE_LOAD_ADDR ?= 0x8020 endif ifdef CONFIG_64BIT PLATFORM_CPPFLAGS += -mabi=64 KBUILD_LDFLAGS += -m$(64bit-emul) OBJCOPYFLAGS += -O $(64bit-bfd) -CONFIG_STANDALONE_LOAD_ADDR?= 0x8020 +CFG_STANDALONE_LOAD_ADDR ?= 0x8020 endif PLATFORM_CPPFLAGS += -D__MIPS__ diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk index 44260b1431cb..ddf73e3ac2a3 100644 --- a/arch/nios2/config.mk +++ b/ar
[PoC 192/241] global: Migrate CONFIG_SPI_FLASH_QUAD to CFG
Signed-off-by: Tom Rini --- include/configs/alt.h| 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/configs/alt.h b/include/configs/alt.h index 45918c2af439..1b29420db63d 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -21,7 +21,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* FLASH */ -#define CONFIG_SPI_FLASH_QUAD +#define CFG_SPI_FLASH_QUAD /* SH Ether */ #define CFG_SH_ETHER_USE_PORT 0 diff --git a/include/configs/porter.h b/include/configs/porter.h index 1526f470e8e1..65d5eb95739f 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -22,7 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) /* FLASH */ -#define CONFIG_SPI_FLASH_QUAD +#define CFG_SPI_FLASH_QUAD /* SH Ether */ #define CFG_SH_ETHER_USE_PORT 0 diff --git a/include/configs/silk.h b/include/configs/silk.h index c7346a356542..be73a7f01ace 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -22,7 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* FLASH */ -#define CONFIG_SPI_FLASH_QUAD +#define CFG_SPI_FLASH_QUAD /* SH Ether */ #define CFG_SH_ETHER_USE_PORT 0 diff --git a/include/configs/stout.h b/include/configs/stout.h index 910997e08c7e..d9b8ebf311d9 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -26,7 +26,7 @@ #define CFG_SCIF_A /* SPI */ -#define CONFIG_SPI_FLASH_QUAD +#define CFG_SPI_FLASH_QUAD /* SH Ether */ #define CFG_SH_ETHER_USE_PORT 0 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index cb15aa3c8f4e..371a292a17de 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -201,7 +201,7 @@ CFG_SMP_PEN_ADDR CFG_SOCRATES CFG_SPI_ADDR CFG_SPI_BOOTING -CONFIG_SPI_FLASH_QUAD +CFG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET -- 2.25.1
[PoC 187/241] global: Migrate CONFIG_SMDK5420 to CFG
Signed-off-by: Tom Rini --- include/configs/smdk5420.h | 8 scripts/config_whitelist.txt | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 0392530c0adf..e182625dd633 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -5,18 +5,18 @@ * Configuration settings for the SAMSUNG SMDK5420 board. */ -#ifndef __CONFIG_SMDK5420_H -#define __CONFIG_SMDK5420_H +#ifndef __CFG_SMDK5420_H +#define __CFG_SMDK5420_H #include #include #include -#define CONFIG_SMDK5420/* which is in a SMDK5420 */ +#define CFG_SMDK5420 /* which is in a SMDK5420 */ #define CFG_SYS_SDRAM_BASE 0x2000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE(512UL << 20UL) /* 512 MB */ -#endif /* __CONFIG_SMDK5420_H */ +#endif /* __CFG_SMDK5420_H */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c1129ffb9e53..4cf75324d291 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -196,7 +196,7 @@ CFG_SH_ETHER_PHY_MODE CFG_SH_ETHER_USE_PORT CFG_SH_QSPI_BASE CFG_SLIC -CONFIG_SMDK5420 +CFG_SMDK5420 CONFIG_SMP_PEN_ADDR CONFIG_SOCRATES CONFIG_SPI_ADDR -- 2.25.1
[PoC 189/241] global: Migrate CONFIG_SOCRATES to CFG
Signed-off-by: Tom Rini --- include/configs/socrates.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/socrates.h b/include/configs/socrates.h index eb5c14fff28e..ddbd257d08a5 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -17,7 +17,7 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_SOCRATES1 +#define CFG_SOCRATES 1 /* * Only possible on E500 Version 2 or newer cores. diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index fa6ceab52d5c..9f28554caab4 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -198,7 +198,7 @@ CFG_SH_QSPI_BASE CFG_SLIC CFG_SMDK5420 CFG_SMP_PEN_ADDR -CONFIG_SOCRATES +CFG_SOCRATES CONFIG_SPI_ADDR CONFIG_SPI_BOOTING CONFIG_SPI_FLASH_QUAD -- 2.25.1
[PoC 184/241] global: Migrate CONFIG_SH_ETHER_USE_PORT to CFG
Signed-off-by: Tom Rini --- README | 2 +- drivers/net/sh_eth.c | 8 include/configs/alt.h| 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h| 2 +- include/configs/koelsch.h| 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 12 files changed, 15 insertions(+), 15 deletions(-) diff --git a/README b/README index 0ae3c6b97c15..3eb882c6a248 100644 --- a/README +++ b/README @@ -547,7 +547,7 @@ The following options need to be configured: CONFIG_SH_ETHER Support for Renesas on-chip Ethernet controller - CONFIG_SH_ETHER_USE_PORT + CFG_SH_ETHER_USE_PORT Define the number of ports to be used CFG_SH_ETHER_PHY_ADDR diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 9bdc42ced24f..1775d801544c 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -32,8 +32,8 @@ #include "sh_eth.h" -#ifndef CONFIG_SH_ETHER_USE_PORT -# error "Please define CONFIG_SH_ETHER_USE_PORT" +#ifndef CFG_SH_ETHER_USE_PORT +# error "Please define CFG_SH_ETHER_USE_PORT" #endif #ifndef CFG_SH_ETHER_PHY_ADDR # error "Please define CFG_SH_ETHER_PHY_ADDR" @@ -635,7 +635,7 @@ int sh_eth_initialize(struct bd_info *bd) memset(dev, 0, sizeof(struct eth_device)); memset(eth, 0, sizeof(struct sh_eth_dev)); - eth->port = CONFIG_SH_ETHER_USE_PORT; + eth->port = CFG_SH_ETHER_USE_PORT; eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(BASE_IO_ADDR + 0x800 * eth->port); @@ -852,7 +852,7 @@ static int sh_ether_probe(struct udevice *udev) priv->bus = miiphy_get_dev_by_name(udev->name); - eth->port = CONFIG_SH_ETHER_USE_PORT; + eth->port = CFG_SH_ETHER_USE_PORT; eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port); diff --git a/include/configs/alt.h b/include/configs/alt.h index 283af8a324e3..45918c2af439 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -24,7 +24,7 @@ #define CONFIG_SPI_FLASH_QUAD /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/condor.h b/include/configs/condor.h index 2c9817cf02c5..50c8d1733838 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -14,7 +14,7 @@ /* Environment compatibility */ /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/gose.h b/include/configs/gose.h index ed7dd70dd964..7ae0726518da 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 6a11aa61f0fb..8de4a36e931a 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -17,7 +17,7 @@ #define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024) /* Network interface */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 31d0795f07fb..d47d70178ccd 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/lager.h b/include/configs/lager.h index 991fc9020ee0..2577c7a7da67 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -21,7 +21,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_
[PoC 185/241] global: Migrate CONFIG_SH_QSPI_BASE to CFG
Signed-off-by: Tom Rini --- include/configs/blanche.h| 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/blanche.h b/include/configs/blanche.h index dc74ed3e79d6..5bc3df06aa11 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -23,7 +23,7 @@ /* FLASH */ #if !defined(CONFIG_MTD_NOR_FLASH) -#define CONFIG_SH_QSPI_BASE0xE6B1 +#define CFG_SH_QSPI_BASE 0xE6B1 #else #define CFG_FLASH_SHOW_PROGRESS45 #define CFG_SYS_FLASH_BASE 0x diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 36cc068c4473..8a23b09ef5c0 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -194,7 +194,7 @@ CFG_SH_ETHER_CACHE_WRITEBACK CFG_SH_ETHER_PHY_ADDR CFG_SH_ETHER_PHY_MODE CFG_SH_ETHER_USE_PORT -CONFIG_SH_QSPI_BASE +CFG_SH_QSPI_BASE CONFIG_SLIC CONFIG_SMDK5420 CONFIG_SMP_PEN_ADDR -- 2.25.1
[PoC 182/241] global: Migrate CONFIG_SH_ETHER_PHY_ADDR to CFG
Signed-off-by: Tom Rini --- README | 2 +- drivers/net/sh_eth.c | 8 include/configs/alt.h| 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h| 2 +- include/configs/koelsch.h| 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 12 files changed, 15 insertions(+), 15 deletions(-) diff --git a/README b/README index c35207cb2af5..0ae3c6b97c15 100644 --- a/README +++ b/README @@ -550,7 +550,7 @@ The following options need to be configured: CONFIG_SH_ETHER_USE_PORT Define the number of ports to be used - CONFIG_SH_ETHER_PHY_ADDR + CFG_SH_ETHER_PHY_ADDR Define the ETH PHY's address CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 72fdf7ad89a1..70ec27999062 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -35,8 +35,8 @@ #ifndef CONFIG_SH_ETHER_USE_PORT # error "Please define CONFIG_SH_ETHER_USE_PORT" #endif -#ifndef CONFIG_SH_ETHER_PHY_ADDR -# error "Please define CONFIG_SH_ETHER_PHY_ADDR" +#ifndef CFG_SH_ETHER_PHY_ADDR +# error "Please define CFG_SH_ETHER_PHY_ADDR" #endif #if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \ @@ -636,7 +636,7 @@ int sh_eth_initialize(struct bd_info *bd) memset(eth, 0, sizeof(struct sh_eth_dev)); eth->port = CONFIG_SH_ETHER_USE_PORT; - eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR; + eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(BASE_IO_ADDR + 0x800 * eth->port); @@ -853,7 +853,7 @@ static int sh_ether_probe(struct udevice *udev) priv->bus = miiphy_get_dev_by_name(udev->name); eth->port = CONFIG_SH_ETHER_USE_PORT; - eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR; + eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port); diff --git a/include/configs/alt.h b/include/configs/alt.h index 93aee6b6a460..8dd4b101c668 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -25,7 +25,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/condor.h b/include/configs/condor.h index 3f99cbf9dab9..43b88f127213 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -15,7 +15,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/gose.h b/include/configs/gose.h index 45a537341b0e..5184db41061f 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -21,7 +21,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 3fde61407094..8ba9b73672c8 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -18,7 +18,7 @@ /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0 +#define CFG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index b3b6f03e08d4..2910336def6c 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -21,7 +21,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/lager.h b/include/configs/lager.h index 16d15ccdd913..815239a73bd4 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_
[PoC 188/241] global: Migrate CONFIG_SMP_PEN_ADDR to CFG
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/nonsec_virt.S | 4 ++--
board/samsung/arndale/arndale.c | 4 ++--
include/configs/arndale.h| 2 +-
include/configs/km/pg-wcom-ls102xa.h | 2 +-
include/configs/ls1021aiot.h | 2 +-
include/configs/ls1021aqds.h | 2 +-
include/configs/ls1021atwr.h | 2 +-
scripts/config_whitelist.txt | 2 +-
8 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
index 51beda79c967..9794ade40463 100644
--- a/arch/arm/cpu/armv7/nonsec_virt.S
+++ b/arch/arm/cpu/armv7/nonsec_virt.S
@@ -205,11 +205,11 @@ ENTRY(_nonsec_init)
bx lr
ENDPROC(_nonsec_init)
-#ifdef CONFIG_SMP_PEN_ADDR
+#ifdef CFG_SMP_PEN_ADDR
/* void __weak smp_waitloop(unsigned previous_address); */
ENTRY(smp_waitloop)
wfi
- ldr r1, =CONFIG_SMP_PEN_ADDR@ load start address
+ ldr r1, =CFG_SMP_PEN_ADDR @ load start address
ldr r1, [r1]
#ifdef CFG_PEN_ADDR_BIG_ENDIAN
rev r1, r1
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index a992dc684291..3ebf600e1d7c 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -112,10 +112,10 @@ int checkboard(void)
}
#endif
-#ifdef CONFIG_SMP_PEN_ADDR
+#ifdef CFG_SMP_PEN_ADDR
void smp_set_core_boot_addr(unsigned long addr, int corenr)
{
- writel(addr, CONFIG_SMP_PEN_ADDR);
+ writel(addr, CFG_SMP_PEN_ADDR);
/* make sure this write is really executed */
__asm__ volatile ("dsb\n");
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index 8acc525b11c9..b56effcd411e 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -16,7 +16,7 @@
/* Miscellaneous configurable options */
-#define CONFIG_SMP_PEN_ADDR0x0202
+#define CFG_SMP_PEN_ADDR 0x0202
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it
*/
#define CFG_ARM_GIC_BASE_ADDRESS 0x1048
diff --git a/include/configs/km/pg-wcom-ls102xa.h
b/include/configs/km/pg-wcom-ls102xa.h
index 7e850517494e..3b0ecf578063 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -164,7 +164,7 @@
{1, {I2C_NULL_HOP} }, \
}
-#define CONFIG_SMP_PEN_ADDR0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index d6122856f069..08532dc3e0aa 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -90,7 +90,7 @@
#define FSL_PCIE_COMPAT"fsl,ls1021a-pcie"
#define CFG_PEN_ADDR_BIG_ENDIAN
-#define CONFIG_SMP_PEN_ADDR0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index ccbf7c2e70dc..498c89c3cf21 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -274,7 +274,7 @@
#endif
#define CFG_PEN_ADDR_BIG_ENDIAN
-#define CONFIG_SMP_PEN_ADDR0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index a554ee459042..128d80f48062 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -155,7 +155,7 @@
/* GPIO */
#define CFG_PEN_ADDR_BIG_ENDIAN
-#define CONFIG_SMP_PEN_ADDR0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 4cf75324d291..fa6ceab52d5c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -197,7 +197,7 @@ CFG_SH_ETHER_USE_PORT
CFG_SH_QSPI_BASE
CFG_SLIC
CFG_SMDK5420
-CONFIG_SMP_PEN_ADDR
+CFG_SMP_PEN_ADDR
CONFIG_SOCRATES
CONFIG_SPI_ADDR
CONFIG_SPI_BOOTING
--
2.25.1
[PoC 172/241] global: Migrate CONFIG_SCIF_A to CFG
Signed-off-by: Tom Rini
---
drivers/serial/serial_sh.c | 2 +-
drivers/serial/serial_sh.h | 8
include/configs/stout.h | 2 +-
scripts/config_whitelist.txt | 2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index e6c23cedff11..4671217b59a0 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -274,7 +274,7 @@ U_BOOT_DRIVER(serial_sh) = {
# error "Default SCIF doesn't set."
#endif
-#if defined(CONFIG_SCIF_A)
+#if defined(CFG_SCIF_A)
#define SCIF_BASE_PORT PORT_SCIFA
#elif defined(CONFIG_SCI)
#define SCIF_BASE_PORT PORT_SCI
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 11deaa951168..e6ab6f1b9b76 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -92,7 +92,7 @@ struct uart_port {
# define SCIF_ORER 0x0001 /* overrun error bit */
#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_GEN3) || \
defined(CONFIG_R7S72100)
-# if defined(CONFIG_SCIF_A)
+# if defined(CFG_SCIF_A)
# define SCIF_ORER0x0200
# else
# define SCIF_ORER0x0001
@@ -164,7 +164,7 @@ struct uart_port {
# define SCIF2_TXROOM_MAX 16
#elif defined(CONFIG_RCAR_GEN2)
# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
-# if defined(CONFIG_SCIF_A)
+# if defined(CFG_SCIF_A)
# define SCIF_RFDC_MASK 0x007f
# else
# define SCIF_RFDC_MASK 0x001f
@@ -380,7 +380,7 @@ SCIF_FNS(SCFDR, 0, 0, 0x1C, 16)
SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
SCIF_FNS(DL, 0, 0, 0x30, 16)
SCIF_FNS(CKS,0, 0, 0x34, 16)
-#if defined(CONFIG_SCIF_A)
+#if defined(CFG_SCIF_A)
SCIF_FNS(SCLSR, 0, 0, 0x14, 16)
#else
SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
@@ -491,7 +491,7 @@ static inline int scbrr_calc(struct uart_port *port, int
bps, int clk)
#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
#elif defined(CONFIG_RCAR_GEN2)
#define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
- #if defined(CONFIG_SCIF_A)
+ #if defined(CFG_SCIF_A)
#define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */
#else
#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */
diff --git a/include/configs/stout.h b/include/configs/stout.h
index 5058e0a204d7..be9013bcf93d 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -23,7 +23,7 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_A
+#define CFG_SCIF_A
/* SPI */
#define CONFIG_SPI_FLASH_QUAD
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index bdb3b68f8c80..d77171c2c553 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -181,7 +181,7 @@ CFG_SANDBOX_SPI_MAX_BUS
CFG_SANDBOX_SPI_MAX_CS
CFG_SAR2_REG
CFG_SAR_REG
-CONFIG_SCIF_A
+CFG_SCIF_A
CONFIG_SCSI_DEV_LIST
CONFIG_SC_TIMER_CLK
CONFIG_SERIAL_BOOT
--
2.25.1
[PoC 169/241] global: Migrate CONFIG_SANDBOX_SPI_MAX_CS to CFG
Signed-off-by: Tom Rini
---
arch/sandbox/include/asm/config.h | 4 ++--
arch/sandbox/include/asm/state.h | 2 +-
drivers/spi/sandbox_spi.c | 2 +-
scripts/config_whitelist.txt | 2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/sandbox/include/asm/config.h
b/arch/sandbox/include/asm/config.h
index 36833987330c..2ffe94f10bc8 100644
--- a/arch/sandbox/include/asm/config.h
+++ b/arch/sandbox/include/asm/config.h
@@ -12,8 +12,8 @@
#ifndef CFG_SANDBOX_SPI_MAX_BUS
#define CFG_SANDBOX_SPI_MAX_BUS 1
#endif
-#ifndef CONFIG_SANDBOX_SPI_MAX_CS
-#define CONFIG_SANDBOX_SPI_MAX_CS 10
+#ifndef CFG_SANDBOX_SPI_MAX_CS
+#define CFG_SANDBOX_SPI_MAX_CS 10
#endif
#endif
diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h
index ada85be5cb1a..e99a7d04e8da 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -99,7 +99,7 @@ struct sandbox_state {
/* Pointer to information for each SPI bus/cs */
struct sandbox_spi_info spi[CFG_SANDBOX_SPI_MAX_BUS]
- [CONFIG_SANDBOX_SPI_MAX_CS];
+ [CFG_SANDBOX_SPI_MAX_CS];
/* Information about Watchdog */
struct sandbox_wdt_info wdt;
diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index 0c645904da14..0065a5c65755 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -90,7 +90,7 @@ static int sandbox_spi_xfer(struct udevice *slave, unsigned
int bitlen,
busnum = dev_seq(bus);
cs = spi_chip_select(slave);
if (busnum >= CFG_SANDBOX_SPI_MAX_BUS ||
- cs >= CONFIG_SANDBOX_SPI_MAX_CS) {
+ cs >= CFG_SANDBOX_SPI_MAX_CS) {
printf("%s: busnum=%u, cs=%u: out of range\n", __func__,
busnum, cs);
return -ENOENT;
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 815d8f8f12ba..7af096ee8f63 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -178,7 +178,7 @@ CFG_ROCKCHIP_SDHCI_MAX_FREQ
CFG_ROOTPATH
CFG_SANDBOX_ARCH
CFG_SANDBOX_SPI_MAX_BUS
-CONFIG_SANDBOX_SPI_MAX_CS
+CFG_SANDBOX_SPI_MAX_CS
CONFIG_SAR2_REG
CONFIG_SAR_REG
CONFIG_SCIF_A
--
2.25.1
[PoC 175/241] global: Migrate CONFIG_SERIAL_BOOT to CFG
Signed-off-by: Tom Rini
---
arch/m68k/cpu/mcf5445x/cpu_init.c | 2 +-
arch/m68k/cpu/mcf5445x/start.S| 10 +-
include/configs/stmark2.h | 2 +-
scripts/config_whitelist.txt | 2 +-
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c
b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 1ce244872f14..257af6c965d2 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -28,7 +28,7 @@ void init_fbcs(void)
{
fbcs_t *fbcs __maybe_unused = (fbcs_t *) MMAP_FBCS;
-#if !defined(CONFIG_SERIAL_BOOT)
+#if !defined(CFG_SERIAL_BOOT)
#if (defined(CFG_SYS_CS0_BASE) && defined(CFG_SYS_CS0_MASK) &&
defined(CFG_SYS_CS0_CTRL))
out_be32(&fbcs->csar0, CFG_SYS_CS0_BASE);
out_be32(&fbcs->cscr0, CFG_SYS_CS0_CTRL);
diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index a083c3d45d27..0beacb38dfbb 100644
--- a/arch/m68k/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -25,7 +25,7 @@
addl#60,%sp;/* space for 15 regs */ \
rte;
-#if defined(CONFIG_SERIAL_BOOT)
+#if defined(CFG_SERIAL_BOOT)
#define ASM_DRAMINIT (asm_dram_init - CONFIG_TEXT_BASE + \
CFG_SYS_INIT_RAM_ADDR)
#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_TEXT_BASE)
@@ -40,7 +40,7 @@
* These vectors are to catch any un-intended traps.
*/
_vectors:
-#if defined(CONFIG_SERIAL_BOOT)
+#if defined(CFG_SERIAL_BOOT)
INITSP:.long 0 /* Initial SP */
#ifdef CONFIG_CF_SBF
@@ -68,7 +68,7 @@ vector10_17:
vector18_1F:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-#if !defined(CONFIG_SERIAL_BOOT)
+#if !defined(CFG_SERIAL_BOOT)
/* TRAP #0 - #15 */
vector20_2F:
@@ -111,7 +111,7 @@ vector192_255:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
#endif
-#if defined(CONFIG_SERIAL_BOOT)
+#if defined(CFG_SERIAL_BOOT)
/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
asm_sbf_img_hdr:
.long 0x /* checksum, not yet implemented */
@@ -436,7 +436,7 @@ asm_delay:
. = 0x400
.globl _start
_start:
-#if !defined(CONFIG_SERIAL_BOOT)
+#if !defined(CFG_SERIAL_BOOT)
nop
nop
move.w #0x2700,%sr /* Mask off Interrupt */
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 3b4743905596..ca3eb6a31b1e 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -64,7 +64,7 @@
#define CFG_SYS_DRAM_TEST
#if defined(CONFIG_CF_SBF)
-#define CONFIG_SERIAL_BOOT
+#define CFG_SERIAL_BOOT
#endif
/* Reserve 256 kB for Monitor */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b45fcaa9432c..0d58f8ff0a1b 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -184,7 +184,7 @@ CFG_SAR_REG
CFG_SCIF_A
CFG_SCSI_DEV_LIST
CFG_SC_TIMER_CLK
-CONFIG_SERIAL_BOOT
+CFG_SERIAL_BOOT
CONFIG_SERVERIP
CONFIG_SETUP_INITRD_TAG
CONFIG_SET_DFU_ALT_BUF_LEN
--
2.25.1
[PoC 150/241] global: Migrate CONFIG_PL01x_PORTS to CFG
Signed-off-by: Tom Rini
---
README| 2 +-
drivers/serial/serial_pl01x.c | 2 +-
include/configs/lx2160a_common.h | 2 +-
include/configs/mxs.h | 2 +-
include/configs/s5p4418_nanopi2.h | 2 +-
include/configs/synquacer.h | 2 +-
include/configs/vexpress_common.h | 2 +-
scripts/config_whitelist.txt | 2 +-
8 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/README b/README
index 1eda285312be..3e5af3e204c3 100644
--- a/README
+++ b/README
@@ -424,7 +424,7 @@ The following options need to be configured:
If you have Amba PrimeCell PL011 UARTs, set this variable to
the clock speed of the UARTs.
- CONFIG_PL01x_PORTS
+ CFG_PL01x_PORTS
If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
define this to a list of base addresses for each (supported)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index dd2881931dfd..7449e9b90430 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_DM_SERIAL
-static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
+static volatile unsigned char *const port[] = CFG_PL01x_PORTS;
static enum pl01x_type pl01x_type __section(".data");
static struct pl01x_regs *base_regs __section(".data");
#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index ea59f772064a..dea14f28828d 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -47,7 +47,7 @@
#define CFG_SYS_SERIAL20x21e
#define CFG_SYS_SERIAL30x21f
/*below might needs to be removed*/
-#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS{(void *)CFG_SYS_SERIAL0, \
(void *)CFG_SYS_SERIAL1, \
(void *)CFG_SYS_SERIAL2, \
(void *)CFG_SYS_SERIAL3 }
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 212d2201e7cc..17b4295d2d6d 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -78,7 +78,7 @@
* Conflicts with AUART driver which can be set by board.
*/
#define CFG_PL011_CLOCK2400
-#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
+#define CFG_PL01x_PORTS{ (void *)MXS_UARTDBG_BASE }
/* Default baudrate can be overridden by board! */
/* NAND */
diff --git a/include/configs/s5p4418_nanopi2.h
b/include/configs/s5p4418_nanopi2.h
index c9cef6a77c62..c192d733c1db 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -79,7 +79,7 @@
* serial console configuration
*/
#define CFG_PL011_CLOCK5000
-#define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \
+#define CFG_PL01x_PORTS{(void *)PHY_BASEADDR_UART0, \
(void *)PHY_BASEADDR_UART1, \
(void *)PHY_BASEADDR_UART2, \
(void *)PHY_BASEADDR_UART3}
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index d0b56cb48f7d..be606ce2955b 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -33,7 +33,7 @@
/* Serial (pl011) */
#define UART_CLK (6250)
#define CFG_PL011_CLOCKUART_CLK
-#define CONFIG_PL01x_PORTS {(void *)(0x2a40)}
+#define CFG_PL01x_PORTS{(void *)(0x2a40)}
/* Support MTD */
#define CFG_SYS_FLASH_BASE (0x0800)
diff --git a/include/configs/vexpress_common.h
b/include/configs/vexpress_common.h
index 3fc70de57713..ba7731bfca6b 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -117,7 +117,7 @@
/* PL011 Serial Configuration */
#define CFG_PL011_CLOCK2400
-#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS{(void *)CFG_SYS_SERIAL0, \
(void *)CFG_SYS_SERIAL1}
#define CFG_SYS_SERIAL0V2M_UART0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 0ea10f2edb32..390299fa0a8f 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -159,7 +159,7 @@ CFG_PHY_ID
CFG_PHY_INTERFACE_MODE
CFG_PHY_IRAM_BASE
CFG_PL011_CLOCK
-CONFIG_PL01x_PORTS
+CFG_PL01x_PORTS
CONFIG_PME_PLAT_CLK_DIV
CONFIG_POST
CONFIG_POSTBOOTMENU
--
2.25.1
[PoC 191/241] global: Migrate CONFIG_SPI_BOOTING to CFG
Signed-off-by: Tom Rini
---
arch/arm/mach-exynos/spl_boot.c | 6 +++---
include/configs/exynos5-dt-common.h | 2 +-
scripts/config_whitelist.txt| 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c
index 553dac75b61d..83bdee9f8579 100644
--- a/arch/arm/mach-exynos/spl_boot.c
+++ b/arch/arm/mach-exynos/spl_boot.c
@@ -94,7 +94,7 @@ static int config_branch_prediction(int set_cr_z)
}
#endif
-#ifdef CONFIG_SPI_BOOTING
+#ifdef CFG_SPI_BOOTING
static void spi_rx_tx(struct exynos_spi *regs, int todo,
void *dinp, void const *doutp, int i)
{
@@ -220,7 +220,7 @@ void copy_uboot_to_ram(void)
u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst) = NULL;
u32 offset = 0, size = 0;
-#ifdef CONFIG_SPI_BOOTING
+#ifdef CFG_SPI_BOOTING
struct spl_machine_param *param = spl_get_machine_params();
#endif
#ifdef CONFIG_SUPPORT_EMMC_BOOT
@@ -248,7 +248,7 @@ void copy_uboot_to_ram(void)
bootmode = get_boot_mode();
switch (bootmode) {
-#ifdef CONFIG_SPI_BOOTING
+#ifdef CFG_SPI_BOOTING
case BOOT_MODE_SERIAL:
/* Customised function to copy u-boot from SF */
exynos_spi_copy(param->uboot_size, CONFIG_TEXT_BASE);
diff --git a/include/configs/exynos5-dt-common.h
b/include/configs/exynos5-dt-common.h
index c9e0c13172cc..a0cdbd746a9a 100644
--- a/include/configs/exynos5-dt-common.h
+++ b/include/configs/exynos5-dt-common.h
@@ -17,6 +17,6 @@
#define CFG_SYS_SPI_BASE 0x12D3
#define FLASH_SIZE (4 << 20)
-#define CONFIG_SPI_BOOTING
+#define CFG_SPI_BOOTING
#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 9989d7052f14..cb15aa3c8f4e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -200,7 +200,7 @@ CFG_SMDK5420
CFG_SMP_PEN_ADDR
CFG_SOCRATES
CFG_SPI_ADDR
-CONFIG_SPI_BOOTING
+CFG_SPI_BOOTING
CONFIG_SPI_FLASH_QUAD
CONFIG_SPI_FLASH_SIZE
CONFIG_SPI_HALF_DUPLEX
--
2.25.1
[PoC 181/241] global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG
Signed-off-by: Tom Rini --- README | 2 +- drivers/net/sh_eth.c | 2 +- include/configs/alt.h| 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h| 2 +- include/configs/koelsch.h| 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) diff --git a/README b/README index aa989f67e2c0..c35207cb2af5 100644 --- a/README +++ b/README @@ -553,7 +553,7 @@ The following options need to be configured: CONFIG_SH_ETHER_PHY_ADDR Define the ETH PHY's address - CONFIG_SH_ETHER_CACHE_WRITEBACK + CFG_SH_ETHER_CACHE_WRITEBACK If this option is set, the driver enables cache flush. - TPM Support: diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 38049b380d7c..72fdf7ad89a1 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -39,7 +39,7 @@ # error "Please define CONFIG_SH_ETHER_PHY_ADDR" #endif -#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \ +#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \ !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #define flush_cache_wback(addr, len)\ flush_dcache_range((unsigned long)addr, \ diff --git a/include/configs/alt.h b/include/configs/alt.h index 940169b42043..93aee6b6a460 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -27,7 +27,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/condor.h b/include/configs/condor.h index fa3edef9b300..3f99cbf9dab9 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -17,7 +17,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/gose.h b/include/configs/gose.h index e54f4b24e048..45a537341b0e 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -23,7 +23,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 5ae17f70e909..3fde61407094 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -20,7 +20,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 1d8aa6def88f..b3b6f03e08d4 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -23,7 +23,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/lager.h b/include/configs/lager.h index bb8cc5fecb7a..16d15ccdd913 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/porter.h b/include/configs/porter.h index 907cf29d0318..7a1d9d48a150 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -28,7 +28,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/silk.h b/include/configs/silk.h index 7361daa27c49..4edb1bc3c533 100644 ---
[PoC 183/241] global: Migrate CONFIG_SH_ETHER_PHY_MODE to CFG
Signed-off-by: Tom Rini --- drivers/net/sh_eth.c | 2 +- include/configs/alt.h| 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h| 2 +- include/configs/koelsch.h| 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 70ec27999062..9bdc42ced24f 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -536,7 +536,7 @@ static int sh_eth_phy_config_legacy(struct sh_eth_dev *eth) phydev = phy_connect( miiphy_get_dev_by_name(dev->name), - port_info->phy_addr, dev, CONFIG_SH_ETHER_PHY_MODE); + port_info->phy_addr, dev, CFG_SH_ETHER_PHY_MODE); port_info->phydev = phydev; phy_config(phydev); diff --git a/include/configs/alt.h b/include/configs/alt.h index 8dd4b101c668..283af8a324e3 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -26,7 +26,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/condor.h b/include/configs/condor.h index 43b88f127213..2c9817cf02c5 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -16,7 +16,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/gose.h b/include/configs/gose.h index 5184db41061f..ed7dd70dd964 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 8ba9b73672c8..6a11aa61f0fb 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -19,7 +19,7 @@ /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 2910336def6c..31d0795f07fb 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/lager.h b/include/configs/lager.h index 815239a73bd4..991fc9020ee0 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/porter.h b/include/configs/porter.h index 8ba6a7d3bc8e..3b7dcd8e94b8 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -27,7 +27,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/silk.h b/include/configs/silk.h index df5f0a246241..46615c46f6ec 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -27,7 +27,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_
[PoC 190/241] global: Migrate CONFIG_SPI_ADDR to CFG
Signed-off-by: Tom Rini --- include/configs/mt7629.h | 4 ++-- scripts/config_whitelist.txt | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index d7700673f6f7..6fc851f2079c 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -17,8 +17,8 @@ /* Defines for SPL */ -#define CONFIG_SPI_ADDR0x3000 -#define CFG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) +#define CFG_SPI_ADDR 0x3000 +#define CFG_SYS_UBOOT_BASE (CFG_SPI_ADDR + CONFIG_SPL_PAD_TO) /* SPL -> Uboot */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 9f28554caab4..9989d7052f14 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -199,7 +199,7 @@ CFG_SLIC CFG_SMDK5420 CFG_SMP_PEN_ADDR CFG_SOCRATES -CONFIG_SPI_ADDR +CFG_SPI_ADDR CONFIG_SPI_BOOTING CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE -- 2.25.1
[PoC 193/241] global: Migrate CONFIG_SPI_FLASH_SIZE to CFG
Signed-off-by: Tom Rini --- include/configs/beaver.h | 2 +- include/configs/cardhu.h | 2 +- include/configs/cei-tk1-som.h | 2 +- include/configs/dalmore.h | 2 +- include/configs/jetson-tk1.h | 2 +- include/configs/nyan-big.h| 2 +- include/configs/p2371-.h | 2 +- include/configs/p2371-2180.h | 2 +- include/configs/p2571.h | 2 +- include/configs/p3450-.h | 2 +- include/configs/tec-ng.h | 2 +- include/configs/venice2.h | 2 +- scripts/config_whitelist.txt | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 6b5f650811b8..1a540c9f7122 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -22,7 +22,7 @@ /* SPI */ #define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 35c5a4f12261..0a5eaf03d9a5 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -26,7 +26,7 @@ /* SPI */ #define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 55e2d744c4a0..3aaed94e15cb 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -23,7 +23,7 @@ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 24cf554649ba..39e1aded3730 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -20,7 +20,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index b846889541c7..d3bb6d760376 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -21,7 +21,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index baa452156ecd..fbba4ca701db 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -19,7 +19,7 @@ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/p2371-.h b/include/configs/p2371-.h index ecd0405d297b..dd756a5056c8 100644 --- a/include/configs/p2371-.h +++ b/include/configs/p2371-.h @@ -20,7 +20,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 7f942888e74d..10b36e6a1657 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -20,7 +20,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 50cddb4a4acb..6578350990d7 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -20,7 +20,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegra-common-post.h" diff --git a/include/configs/p3450-.h b/include/configs/p3450-.h index ec1a8634e718..34ab82fe1173 100644 --- a/include/configs/p3450-.h +++ b/include/configs/p3450-.h @@ -24,7 +24,7 @@ func(DHCP, dhcp, na) /* Environment at end of QSPI, in the VER partition */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #define BOARD_EXTRA_ENV_SETTINGS \ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 098796637010..6566dc170ff6 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -20,7 +20,7 @@ /* SPI */ #define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) +#define CFG_SPI_FLASH_SIZE (4 << 20) #include "tegr
[PoC 148/241] global: Migrate CONFIG_PHY_IRAM_BASE to CFG
Signed-off-by: Tom Rini
---
arch/arm/mach-exynos/lowlevel_init.c | 6 +++---
include/configs/exynos5420-common.h | 2 +-
scripts/config_whitelist.txt | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/lowlevel_init.c
b/arch/arm/mach-exynos/lowlevel_init.c
index 243b5c80c90e..c57b8aee7989 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -77,10 +77,10 @@ static void low_power_start(void)
branch_bx(0x0);
}
- reg_val = readl(CONFIG_PHY_IRAM_BASE + 0x4);
+ reg_val = readl(CFG_PHY_IRAM_BASE + 0x4);
if (reg_val != (uint32_t)&low_power_start) {
/* Store jump address as low_power_start if not present */
- writel((uint32_t)&low_power_start, CONFIG_PHY_IRAM_BASE + 0x4);
+ writel((uint32_t)&low_power_start, CFG_PHY_IRAM_BASE + 0x4);
dsb();
sev();
}
@@ -164,7 +164,7 @@ static void secondary_cores_configure(void)
writel((uint32_t)&low_power_start, CFG_LOWPOWER_ADDR);
writel(CPU_RST_FLAG_VAL, EXYNOS5420_SPARE_BASE);
/* Store jump address for power down */
- writel((uint32_t)&power_down_core, CONFIG_PHY_IRAM_BASE + 0x4);
+ writel((uint32_t)&power_down_core, CFG_PHY_IRAM_BASE + 0x4);
/* Need all core power down check */
dsb();
diff --git a/include/configs/exynos5420-common.h
b/include/configs/exynos5420-common.h
index b617c062881b..791ad154242e 100644
--- a/include/configs/exynos5420-common.h
+++ b/include/configs/exynos5420-common.h
@@ -12,7 +12,7 @@
#define CFG_IRAM_TOP 0x02074000
-#define CONFIG_PHY_IRAM_BASE 0x0202
+#define CFG_PHY_IRAM_BASE 0x0202
/*
* Low Power settings
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 9438ee6afdd7..3e9d0d66f56d 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -157,7 +157,7 @@ CFG_PHY_BASE_ADR
CFG_PHY_ET1011C_TX_CLK_FIX
CFG_PHY_ID
CFG_PHY_INTERFACE_MODE
-CONFIG_PHY_IRAM_BASE
+CFG_PHY_IRAM_BASE
CONFIG_PL011_CLOCK
CONFIG_PL01x_PORTS
CONFIG_PME_PLAT_CLK_DIV
--
2.25.1
[PoC 196/241] global: Migrate CONFIG_STACKBASE to CFG
Signed-off-by: Tom Rini --- include/configs/tegra-common.h| 2 +- include/configs/tegra114-common.h | 2 +- include/configs/tegra124-common.h | 2 +- include/configs/tegra20-common.h | 2 +- include/configs/tegra30-common.h | 2 +- scripts/config_whitelist.txt | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 66cf7ae5847e..bde7ffce008f 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -45,7 +45,7 @@ #define CFG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ #ifndef CONFIG_ARM64 -#define CFG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE +#define CFG_SYS_INIT_RAM_ADDR CFG_STACKBASE #define CFG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN /* Defines for SPL */ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 87ec1f5a99d6..ab4fa5504c52 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -15,7 +15,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x8380 /* 56MB */ +#define CFG_STACKBASE 0x8380 /* 56MB */ /*--- * Physical Memory Map diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 0485fea6ccb8..b413e2512128 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -17,7 +17,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x8380 /* 56MB */ +#define CFG_STACKBASE 0x8380 /* 56MB */ /*--- * Physical Memory Map diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 617bfb2197cf..a313ac2041a9 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x0380 /* 56MB */ +#define CFG_STACKBASE 0x0380 /* 56MB */ /*--- * Physical Memory Map diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 04fcf11ed82d..c57d2d157e33 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x8380 /* 56MB */ +#define CFG_STACKBASE 0x8380 /* 56MB */ /* * Memory layout for where various images get loaded by boot scripts: diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 7058ba72ba7f..f271ba83faca 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -205,7 +205,7 @@ CFG_SPI_FLASH_QUAD CFG_SPI_FLASH_SIZE CFG_SPI_HALF_DUPLEX CFG_SPI_N25Q256A_RESET -CONFIG_STACKBASE +CFG_STACKBASE CONFIG_STANDALONE_LOAD_ADDR CONFIG_STD_DEVICES_SETTINGS CONFIG_TEGRA_BOARD_STRING -- 2.25.1
[PoC 194/241] global: Migrate CONFIG_SPI_HALF_DUPLEX to CFG
Signed-off-by: Tom Rini --- include/configs/mxs.h| 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 17b4295d2d6d..8d917dc12d2d 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -88,7 +88,7 @@ /* SPI */ #ifdef CONFIG_CMD_SPI -#define CONFIG_SPI_HALF_DUPLEX +#define CFG_SPI_HALF_DUPLEX #endif #endif /* __CONFIGS_MXS_H__ */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c1e6c9cc89bc..c83653e9ca94 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -203,7 +203,7 @@ CFG_SPI_ADDR CFG_SPI_BOOTING CFG_SPI_FLASH_QUAD CFG_SPI_FLASH_SIZE -CONFIG_SPI_HALF_DUPLEX +CFG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET CONFIG_STACKBASE CONFIG_STANDALONE_LOAD_ADDR -- 2.25.1
[PoC 186/241] global: Migrate CONFIG_SLIC to CFG
Signed-off-by: Tom Rini --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +- include/configs/p1_p2_rdb_pc.h | 4 ++-- scripts/config_whitelist.txt| 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index ab7972442970..9e26c201b7a8 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -187,7 +187,7 @@ void board_gpio_init(void) setbits_be32(&pgpio->gpdat, 0x0008); #endif -#ifdef CONFIG_SLIC +#ifdef CFG_SLIC /* reset SLIC */ setbits_be32(&pgpio->gpdir, 0x0004); setbits_be32(&pgpio->gpdat, 0x0004); diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index ccc000227b19..4ab2efd528d1 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -13,7 +13,7 @@ #include #if defined(CONFIG_TARGET_P1020RDB_PC) -#define CONFIG_SLIC +#define CFG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x5c #define __SW_BOOT_SPI 0x1c @@ -42,7 +42,7 @@ * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off */ #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_SLIC +#define CFG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x64 #define __SW_BOOT_SPI 0x34 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 8a23b09ef5c0..c1129ffb9e53 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -195,7 +195,7 @@ CFG_SH_ETHER_PHY_ADDR CFG_SH_ETHER_PHY_MODE CFG_SH_ETHER_USE_PORT CFG_SH_QSPI_BASE -CONFIG_SLIC +CFG_SLIC CONFIG_SMDK5420 CONFIG_SMP_PEN_ADDR CONFIG_SOCRATES -- 2.25.1
[PoC 178/241] global: Migrate CONFIG_SET_DFU_ALT_BUF_LEN to CFG
Signed-off-by: Tom Rini
---
board/samsung/common/misc.c | 2 +-
include/configs/odroid.h | 2 +-
include/configs/odroid_xu3.h | 2 +-
scripts/config_whitelist.txt | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 9c0ec29c937b..5ffa216e2e5d 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -41,7 +41,7 @@ DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SET_DFU_ALT_INFO
void set_dfu_alt_info(char *interface, char *devstr)
{
- size_t buf_size = CONFIG_SET_DFU_ALT_BUF_LEN;
+ size_t buf_size = CFG_SET_DFU_ALT_BUF_LEN;
ALLOC_CACHE_ALIGN_BUFFER(char, buf, buf_size);
char *alt_info = "Settings not found!";
char *status = "error!\n";
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 3ac13a65d63f..560a23c23efb 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -37,7 +37,7 @@
""PARTS_BOOT" part 0 1;" \
""PARTS_ROOT" part 0 2\0" \
-#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K)
+#define CFG_SET_DFU_ALT_BUF_LEN(SZ_1K)
#define CFG_DFU_ALT_BOOT_EMMC \
"u-boot raw 0x3e 0x800 mmcpart 1;" \
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 93f88ef53eba..e8ec504c355e 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -57,7 +57,7 @@
"params.bin raw 0x1880 0x20\0"
/* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */
-#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K)
+#define CFG_SET_DFU_ALT_BUF_LEN(SZ_1K)
/* Set soc_rev, soc_id, board_rev, board_name, fdtfile */
#define CFG_ODROID_REV_AIN 9
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index c8e2d10fe0be..6ffe0779b47d 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -187,7 +187,7 @@ CFG_SC_TIMER_CLK
CFG_SERIAL_BOOT
CFG_SERVERIP
CFG_SETUP_INITRD_TAG
-CONFIG_SET_DFU_ALT_BUF_LEN
+CFG_SET_DFU_ALT_BUF_LEN
CONFIG_SH_ETHER_ALIGNE_SIZE
CONFIG_SH_ETHER_CACHE_INVALIDATE
CONFIG_SH_ETHER_CACHE_WRITEBACK
--
2.25.1
[PoC 177/241] global: Migrate CONFIG_SETUP_INITRD_TAG to CFG
Signed-off-by: Tom Rini --- include/configs/legoev3.h| 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 3a0622ab0b3b..15864f20350d 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -48,7 +48,7 @@ * Linux Information */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_SETUP_INITRD_TAG +#define CFG_SETUP_INITRD_TAG #define CFG_EXTRA_ENV_SETTINGS \ "bootenvfile=uEnv.txt\0" \ "fdtfile=da850-lego-ev3.dtb\0" \ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 9abd8a58bc37..c8e2d10fe0be 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -186,7 +186,7 @@ CFG_SCSI_DEV_LIST CFG_SC_TIMER_CLK CFG_SERIAL_BOOT CFG_SERVERIP -CONFIG_SETUP_INITRD_TAG +CFG_SETUP_INITRD_TAG CONFIG_SET_DFU_ALT_BUF_LEN CONFIG_SH_ETHER_ALIGNE_SIZE CONFIG_SH_ETHER_CACHE_INVALIDATE -- 2.25.1
[PoC 147/241] global: Migrate CONFIG_PHY_INTERFACE_MODE to CFG
Signed-off-by: Tom Rini --- include/configs/socfpga_sr1500.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 432144cb40ce..70df27241ca6 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -11,7 +11,7 @@ #define PHYS_SDRAM_1_SIZE 0x4000 /* 1GiB on SR1500 */ /* Ethernet on SoC (EMAC) */ -#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII +#define CFG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII /* The PHY is autodetected, so no MII PHY address is needed here */ #define PHY_ANEG_TIMEOUT 8000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 664b59d44050..9438ee6afdd7 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -156,7 +156,7 @@ CFG_PEN_ADDR_BIG_ENDIAN CFG_PHY_BASE_ADR CFG_PHY_ET1011C_TX_CLK_FIX CFG_PHY_ID -CONFIG_PHY_INTERFACE_MODE +CFG_PHY_INTERFACE_MODE CONFIG_PHY_IRAM_BASE CONFIG_PL011_CLOCK CONFIG_PL01x_PORTS -- 2.25.1
[PoC 146/241] global: Migrate CONFIG_PHY_ID to CFG
Signed-off-by: Tom Rini --- board/egnite/ethernut5/ethernut5.c | 2 +- include/configs/ethernut5.h| 2 +- scripts/config_whitelist.txt | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c index ceb0d2cf0aa3..9953df017e19 100644 --- a/board/egnite/ethernut5/ethernut5.c +++ b/board/egnite/ethernut5/ethernut5.c @@ -160,7 +160,7 @@ int board_eth_init(struct bd_info *bis) /* Set peripheral pins. */ at91_macb_hw_init(); /* Basic EMAC initialization. */ - if (macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, CONFIG_PHY_ID)) + if (macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, CFG_PHY_ID)) return -1; /* * Early board revisions have a pull-down at the PHY's MODE0 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 2859188e60c9..18c643478f76 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -48,7 +48,7 @@ /* JFFS2 */ /* Ethernet */ -#define CONFIG_PHY_ID 0 +#define CFG_PHY_ID 0 #define CFG_MACB_SEARCH_PHY /* MMC */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index ebbc0b068611..664b59d44050 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -155,7 +155,7 @@ CFG_PCIE_IMX_POWER_GPIO CFG_PEN_ADDR_BIG_ENDIAN CFG_PHY_BASE_ADR CFG_PHY_ET1011C_TX_CLK_FIX -CONFIG_PHY_ID +CFG_PHY_ID CONFIG_PHY_INTERFACE_MODE CONFIG_PHY_IRAM_BASE CONFIG_PL011_CLOCK -- 2.25.1
[PoC 143/241] global: Migrate CONFIG_PEN_ADDR_BIG_ENDIAN to CFG
Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/nonsec_virt.S | 2 +- include/configs/ls1021aiot.h | 2 +- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atwr.h | 2 +- scripts/config_whitelist.txt | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index b6d144f065d2..51beda79c967 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -211,7 +211,7 @@ ENTRY(smp_waitloop) wfi ldr r1, =CONFIG_SMP_PEN_ADDR@ load start address ldr r1, [r1] -#ifdef CONFIG_PEN_ADDR_BIG_ENDIAN +#ifdef CFG_PEN_ADDR_BIG_ENDIAN rev r1, r1 #endif cmp r0, r1 @ make sure we dont execute this code diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 7a9a89d02390..cc6d07b40620 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -89,7 +89,7 @@ #define FSL_PCIE_COMPAT"fsl,ls1021a-pcie" -#define CONFIG_PEN_ADDR_BIG_ENDIAN +#define CFG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index be05ab9de8cb..ccbf7c2e70dc 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -273,7 +273,7 @@ #define TSEC3_PHYIDX 0 #endif -#define CONFIG_PEN_ADDR_BIG_ENDIAN +#define CFG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index da1e409e5c77..a554ee459042 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -154,7 +154,7 @@ /* GPIO */ -#define CONFIG_PEN_ADDR_BIG_ENDIAN +#define CFG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index adf41306e819..ca5faaeea1a3 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -152,7 +152,7 @@ CFG_OTHBOOTARGS CFG_OVERWRITE_ETHADDR_ONCE CFG_PCIE_IMX_PERST_GPIO CFG_PCIE_IMX_POWER_GPIO -CONFIG_PEN_ADDR_BIG_ENDIAN +CFG_PEN_ADDR_BIG_ENDIAN CONFIG_PHY_BASE_ADR CONFIG_PHY_ET1011C_TX_CLK_FIX CONFIG_PHY_ID -- 2.25.1
