RE: [PATCH] arch: arm: mach-socfpga: To notify SDM when U-Boot pass control to Linux
Hi,
> -Original Message-
> From: Lim, Jit Loon
> Sent: Wednesday, 31 August, 2022 2:46 PM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki ; Vignesh R
> ; Vasut, Marek ; Simon
> ; Chee, Tien Fong
> ; Hea, Kok Kiang ;
> Lim, Elly Siew Chin ; Kho, Sin Hui
> ; Lokanathan, Raaj ;
> Maniyam, Dinesh ; Ng, Boon Khai
> ; Yuslaimi, Alif Zakuan
> ; Chong, Teik Heng
> ; Zamri, Muhammad Hazim Izzat
> ; Tang, Sieu Mun
> ; Lim, Jit Loon ; Chin
> Liang See
> Subject: [PATCH] arch: arm: mach-socfpga: To notify SDM when U-Boot pass
> control to Linux
>
> From: Chin Liang See
>
> Prior U-Boot pass control to Linux, U-Boot will send a mailbox command
> "HPS_STAGE_NOTIFY" to notify Secure Device Manager (SDM) on HPS SW
> transition.
>
> Signed-off-by: Chin Liang See
> Signed-off-by: Jit Loon Lim
> ---
> arch/arm/mach-socfpga/misc_soc64.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-
> socfpga/misc_soc64.c
> index 2acdfad07b..00852d27d9 100644
> --- a/arch/arm/mach-socfpga/misc_soc64.c
> +++ b/arch/arm/mach-socfpga/misc_soc64.c
> @@ -89,3 +89,8 @@ void do_bridge_reset(int enable, unsigned int mask)
>
> socfpga_bridges_reset(enable);
> }
> +
> +void arch_preboot_os(void)
> +{
> + mbox_hps_stage_notify(HPS_EXECUTION_STATE_OS);
I don't see this function in https://source.denx.de/u-boot/u-boot, you need to
submit the patch for this function first.
> +}
> --
> 2.26.2
Best regards,
TF.
Re: [PATCH v2 1/1] arm: mvebu: Espressobin: Fix default env variables
Hi Derek,
On 12/7/22 21:56, Derek LaHousse wrote:
Default env variables on Espressobin boards are broken since
commit c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") as well as the 'env default -a' command.
The algorithm to find free space in the default_environment[] array
returns after the first env variable instead of the correct position of
the last variable, where there is allocated free space.
This causes that U-Boot board_late_init() function to overwrite a
portion of the default environment with $ethXaddr and $fdtfile
variables immediately after the first env variable and so it is
overwriting other variables.
This patch also adds an additional null byte to terminate the
environment array.
But U-Boot board_late_init() function do not fill this nul byte
explicitly. And because of that, U-Boot is later trying to interpret
remaining buffer as a continuation of variable list. Normally buffer
should be empty but due to the above issue, it contains garbage from
remaining env variables.
For example 'env default -a' command results in damaging variable
names. It was observed that scritaddr variable name was changed to
criptaddr (without leading 's').
This bug was reported and discussed on the Armbian forum:
https://forum.armbian.com/topic/19564-making-espressobin-v7-work-in-2022/?do=findComment=138136
Fix these issues in two steps:
1) Change code which finds free space for dynamic env variables in
default_environment[] array by jumping to the end of the variable
list instead of jumping after the first defined variable. [By Derek]
2) Add code which appends terminating nul byte as indication of the end
of the env list, after the last nul term env string. [By Pali]
Fixes: c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable")
Signed-off-by: Derek LaHousse
Signed-off-by: Pali Rohár
---
Changes in v2:
- Include Pali's end-of-array null
- Better tags
- More documentation of what is fixed
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index c6ecc323bb99..44c72344e8be 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -99,9 +99,16 @@ int board_late_init(void)
if (!of_machine_is_compatible("globalscale,espressobin"))
return 0;
- /* Find free buffer in default_environment[] for new variables
*/
- while (*ptr != '\0' && *(ptr+1) != '\0') ptr++;
- ptr += 2;
+ /*
+* Find free space for new variables in default_environment[]
array.
+* Free space is after the last variable, each variable is
termined
+* by nul byte and after the last variable is additional nul
byte.
+* Move ptr to the position where new variable can be filled.
+*/
+ while (*ptr != '\0') {
+ do { ptr++; } while (*ptr != '\0');
+ ptr++;
+ }
Thanks for working on this so quickly. But as you can see above, there
are multiple lines wrapped. Please use "git send-email" or some other
means to send the patch correctly.
Thanks,
Stefan
/*
* Ensure that 'env default -a' does not erase permanent MAC
addresses
@@ -145,6 +152,13 @@ int board_late_init(void)
strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin-
emmc.dtb");
else
strcpy(ptr, "fdtfile=marvell/armada-3720-
espressobin.dtb");
+ ptr += strlen(ptr) + 1;
+
+ /*
+* After the last variable (which is nul term string) append
another nul
+* byte which terminates the list. So everything after ptr is
ignored.
+*/
+ *ptr = '\0';
return 0;
}
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH V3 0/2] spi: cqspi: Fix register reads in STIG Mode
Hi, A Gentle reminder for this series. On 25/11/22 11:29, Dhruva Gole wrote: Intent of these patches is to fix register reads in STIG mode and also use STIG mode while reading flash registers. Currently if you try to read a register while in STIG mode there is no support for ADDR and thus naturally a register never gets read from the flash. This series supercedes the previously sent: https://lore.kernel.org/u-boot/20221115114926.174351-1-d-g...@ti.com/ Logs demonstrating the usage and working of QSPI-NOR Flash (Cypress s25hs512t) can be found on the link below: https://gist.github.com/DhruvaG2000/11e7b4ee6a381be9d86b69b2bc2616e4 [...] Dhruva Gole (2): spi: cadence_qspi: setup ADDR Bits in cmd reads spi: cadence_qspi: use STIG mode for small reads drivers/spi/cadence_qspi.c | 8 +++- drivers/spi/cadence_qspi_apb.c | 13 + 2 files changed, 20 insertions(+), 1 deletion(-) It's an important fix because without this reading flash registers is a problem in some cases. I was unable to get one of the QSPI Flash from Cypress working just because STIG read of registers was not supported. It would be great if we could get this merged for the coming release. -- Thanks and Regards, Dhruva Gole
Re: [PATCH] efi_loader: Measure the loaded DTB
On 12/7/22 16:11, Etienne Carriere wrote:
Measures the DTB passed to the EFI application upon new boolean config
switch CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB. For platforms where the
content of the DTB passed to the OS can change across reboots, there is
not point measuring it hence the config switch to allow platform to not
embed this feature.
Co-developed-by: Ilias Apalodimas
Signed-off-by: Ilias Apalodimas
Signed-off-by: Etienne Carriere
---
cmd/bootefi.c | 9 +
include/efi_loader.h | 2 ++
include/efi_tcg2.h| 10 ++
include/tpm-v2.h | 2 ++
lib/efi_loader/Kconfig| 12
lib/efi_loader/efi_tcg2.c | 36
6 files changed, 71 insertions(+)
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 2a7d42925d..56e4a1909f 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -315,6 +315,15 @@ efi_status_t efi_install_fdt(void *fdt)
return EFI_LOAD_ERROR;
}
+ /* Measure the installed DTB */
+ if (CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL_MEASURE_DTB)) {
+ ret = efi_tcg2_measure_dtb(fdt);
Why measure here and not in efi_tcg2_measure_efi_app_invocation() where
we measure the SMBIOS table every time when an app is started with
StartImage()? Which may mean measuring it multiple times like when
starting iPXE, when starting GRUB, and again when starting Linux.
What is the value of measuring the device-tree here when GRUB or
systemd-boot afterwards load a different device-tree or modify the
provided device-tree?
+ if (ret == EFI_SECURITY_VIOLATION) {
+ log_err("ERROR: failed to measure DTB\n");
+ return ret;
+ }
+ }
+
/* Prepare device tree for payload */
ret = copy_fdt();
if (ret) {
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 0899e293e5..7538b6b828 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -530,6 +530,8 @@ efi_status_t
efi_tcg2_notify_exit_boot_services_failed(void);
efi_status_t efi_tcg2_measure_efi_app_invocation(struct efi_loaded_image_obj
*handle);
/* Measure efi application exit */
efi_status_t efi_tcg2_measure_efi_app_exit(void);
+/* Measure DTB */
+efi_status_t efi_tcg2_measure_dtb(void *fdt);
/* Called by bootefi to initialize root node */
efi_status_t efi_root_node_register(void);
/* Called by bootefi to initialize runtime */
diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h
index 874306dc11..b1c3abd097 100644
--- a/include/efi_tcg2.h
+++ b/include/efi_tcg2.h
@@ -233,6 +233,16 @@ struct efi_gpt_data {
gpt_entry partitions[];
} __packed;
+/**
+ * struct tdUEFI_PLATFORM_FIRMWARE_BLOB2
+ * @blob_description_size: Byte size of @data
+ * @data: Description data
+ */
+struct uefi_platform_firmware_blob2 {
+ u8 blob_description_size;
+ u8 data[];
+} __packed;
+
struct efi_tcg2_protocol {
efi_status_t (EFIAPI * get_capability)(struct efi_tcg2_protocol *this,
struct
efi_tcg2_boot_service_capability *capability);
diff --git a/include/tpm-v2.h b/include/tpm-v2.h
index 737e57551d..2df3dad553 100644
--- a/include/tpm-v2.h
+++ b/include/tpm-v2.h
@@ -105,6 +105,8 @@ struct udevice;
"Exit Boot Services Returned with Failure"
#define EFI_EXIT_BOOT_SERVICES_SUCCEEDED\
"Exit Boot Services Returned with Success"
+#define EFI_DTB_EVENT_STRING \
+ "DTB DATA"
/* TPMS_TAGGED_PROPERTY Structure */
struct tpms_tagged_property {
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index e2b643871b..e490236d14 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -337,6 +337,18 @@ config EFI_TCG2_PROTOCOL_EVENTLOG_SIZE
this is going to be allocated twice. One for the eventlog it
self
and one for the configuration table that is required from the
spec
+config EFI_TCG2_PROTOCOL_MEASURE_DTB
+ bool "Measure DTB with EFI_TCG2_PROTOCOL"
+ depends on EFI_TCG2_PROTOCOL
+ default n
This line has no effect.
+ help
+ When enabled, the DTB image passed to the booted EFI image is
+ measured using EFI TCG2 protocol. Do not enable this feature if
%s/using/using the/
+ the passed DTB contains data that change across platform reboots
+ and cannot be used has a predictable measurement. Otherwise
How should the user know this? Shall we create dependencies to other
Kconfig symbols? e.g.
depends on !NET_RANDOM_ETHADDR
+ this feature allows better measurement of the system boot
+ sequence.
+
config EFI_LOAD_FILE2_INITRD
bool "EFI_FILE_LOAD2_PROTOCOL for Linux initial ramdisk"
default y
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index a525ebf75b..51c9d80828 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
Re: [PATCH] net: ipv6: Fix link-partner MAC address assignment
On 12/7/22 12:25, Vyacheslav Mitrofanov V wrote: On Tue, 2022-12-06 at 13:22 +0100, Daniel Schwierzeck wrote: «Внимание! Данное письмо от внешнего адресата!» On 12/6/22 08:08, Viacheslav Mitrofanov wrote: MAC address of a link-partner is not saved for future use because of bad condition of if statement. Moreover it can potentially cause to NULL-pointer dereference. Signed-off-by: Viacheslav Mitrofanov --- net/ndisc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Daniel Schwierzeck diff --git a/net/ndisc.c b/net/ndisc.c index 3c0eeeaea3..56fc6390bc 100644 --- a/net/ndisc.c +++ b/net/ndisc.c @@ -264,7 +264,7 @@ int ndisc_receive(struct ethernet_hdr *et, struct ip6_hdr *ip6, int len) ndisc_extract_enetaddr(ndisc, neigh_eth_addr); /* save address for later use */ - if (!net_nd_packet_mac) + if (net_nd_packet_mac) memcpy(net_nd_packet_mac, neigh_eth_addr, 7); /* modify header, and transmit it */ -- - Daniel This patch is not appropriate!net_nd_packet_mac is just a pointer, moreover there is no memory allocation. It has just keep a pointer to neigh_eth_addr. So the solution must be sth. like net_nd_packet_mac = neigh_eth_addr; that wouldn't make much sense. You would assign a global pointer to an array defined in local function scope. After ndisc_receive() has finished, the pointer will have an invalid address. The same problem exists in ping6_send(). Also the pointer is assigned in net_send_udp_packet6() to an array so the memcpy in ndisc_receive() would work. BTW: the same approach is used with IPv4 and the arp_wait_packet_ethaddr pointer. The pointer is assigned in net_send_ip_packet() to an array and arp_receive() does a memcpy to that pointer if it is not NULL. I think this patch is correct but you should revisit the assignment of net_nd_packet_mac in ping6_send(). You copy net_null_ethaddr to the local mac array and assign net_nd_packet_mac to the mac array. Either the assignment is useless or it should be a memcpy too. -- - Daniel
[PATCH v2 1/1] arm: mvebu: Espressobin: Fix default env variables
Default env variables on Espressobin boards are broken since
commit c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") as well as the 'env default -a' command.
The algorithm to find free space in the default_environment[] array
returns after the first env variable instead of the correct position of
the last variable, where there is allocated free space.
This causes that U-Boot board_late_init() function to overwrite a
portion of the default environment with $ethXaddr and $fdtfile
variables immediately after the first env variable and so it is
overwriting other variables.
This patch also adds an additional null byte to terminate the
environment array.
But U-Boot board_late_init() function do not fill this nul byte
explicitly. And because of that, U-Boot is later trying to interpret
remaining buffer as a continuation of variable list. Normally buffer
should be empty but due to the above issue, it contains garbage from
remaining env variables.
For example 'env default -a' command results in damaging variable
names. It was observed that scritaddr variable name was changed to
criptaddr (without leading 's').
This bug was reported and discussed on the Armbian forum:
https://forum.armbian.com/topic/19564-making-espressobin-v7-work-in-2022/?do=findComment=138136
Fix these issues in two steps:
1) Change code which finds free space for dynamic env variables in
default_environment[] array by jumping to the end of the variable
list instead of jumping after the first defined variable. [By Derek]
2) Add code which appends terminating nul byte as indication of the end
of the env list, after the last nul term env string. [By Pali]
Fixes: c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable")
Signed-off-by: Derek LaHousse
Signed-off-by: Pali Rohár
---
Changes in v2:
- Include Pali's end-of-array null
- Better tags
- More documentation of what is fixed
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index c6ecc323bb99..44c72344e8be 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -99,9 +99,16 @@ int board_late_init(void)
if (!of_machine_is_compatible("globalscale,espressobin"))
return 0;
- /* Find free buffer in default_environment[] for new variables
*/
- while (*ptr != '\0' && *(ptr+1) != '\0') ptr++;
- ptr += 2;
+ /*
+* Find free space for new variables in default_environment[]
array.
+* Free space is after the last variable, each variable is
termined
+* by nul byte and after the last variable is additional nul
byte.
+* Move ptr to the position where new variable can be filled.
+*/
+ while (*ptr != '\0') {
+ do { ptr++; } while (*ptr != '\0');
+ ptr++;
+ }
/*
* Ensure that 'env default -a' does not erase permanent MAC
addresses
@@ -145,6 +152,13 @@ int board_late_init(void)
strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin-
emmc.dtb");
else
strcpy(ptr, "fdtfile=marvell/armada-3720-
espressobin.dtb");
+ ptr += strlen(ptr) + 1;
+
+ /*
+* After the last variable (which is nul term string) append
another nul
+* byte which terminates the list. So everything after ptr is
ignored.
+*/
+ *ptr = '\0';
return 0;
}
Re: [PATCH v4 0/7] binman: rockchip: Migrate from rockchip SPL_FIT_GENERATOR script
Hi Quentin, On Wed, 7 Dec 2022 at 23:19, Quentin Schulz wrote: > > Hi Simon, > > On 12/7/22 02:08, Simon Glass wrote: > > Hi Kevar, > > > > On Mon, 7 Nov 2022 at 11:40, Simon Glass wrote: > >> > >> At present rockchip 64-bit boards make use of a FIT-generator script > >> written in Python. The script supports splitting an ELF file into several > >> 'loadable' nodes in the FIT. Binman does not current support this feature. > >> > >> This series adds binman support for ELF splitting. This works by adding a > >> new 'fit,operation' property to the FIT subnodes, allowing this new way of > >> generating nodes. > >> > >> Some other fixes and improvements are needed along the way. > >> > >> A new, common binman description is added for 64-bit boards which includes > >> the required u-boot.itb file. > >> > >> The existing script is removed, so that only a few zynq boards are now > >> using a SPL_FIT_GENERATOR script: > >> > >> avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0 > >> xilinx_zynqmp_virt > >> > >> Migration of those is hopefully in progress. > >> > >> Note however that tools/k3_fit_atf.sh remains, used by a few boards that > >> enable CONFIG_TI_SECURE_DEVICE so this series is copied there too: > >> > >> am335x_hs_evm > >> am335x_hs_evm_uart > >> am43xx_hs_evm > >> am57xx_hs_evm > >> am57xx_hs_evm_usb > >> am65x_hs_evm_a53 > >> am65x_hs_evm_r5 > >> dra7xx_hs_evm > >> dra7xx_hs_evm_usb > >> j721e_hs_evm_a72 > >> j721e_hs_evm_r5 > >> k2e_hs_evm > >> k2g_hs_evm > >> k2hk_hs_evm > >> k2l_hs_evm > >> > >> Ivan Mikhaylov has sent a patch to help with these, but I need to take a > >> look at the testing side. In any case they should really be using binman > >> for the image generation. > >> > >> Changes in v4: > >> - Add new patch to disable USE_SPL_FIT_GENERATOR by default > >> > >> Changes in v3: > >> - Add an offset to the FIT description > >> - Add support for writing sections in binman > >> - Rebase to master > >> > >> Changes in v2: > >> - Rename op-tee to tee-os > >> - Drop use of .itb2 > >> - Drop patches previously applied > >> - Add various suggestions from Alper Nebi Yasak > >> - Add patches to refactor binman's FIT support > >> > >> Simon Glass (7): > >>binman: Allow writing section contents to a file > >>rockchip: evb-rk3288: Drop raw-image support > >>rockchip: Include binman script in 64-bit boards > >>rockchip: Support building the all output files in binman > >>rockchip: Convert all boards to use binman > >>rockchip: Drop the FIT generator script > >>treewide: Disable USE_SPL_FIT_GENERATOR by default > >> > > > > Can this one please be applied in time for the release? > > > > You still have review/questions left unanswered/unaddressed: > https://lore.kernel.org/u-boot/a29f8d62-c7be-60e7-8a79-b52f589a9...@linaro.org/ > https://lore.kernel.org/u-boot/67717a66-13d5-a72c-a34c-fac191a23...@theobroma-systems.com/ > https://lore.kernel.org/u-boot/67717a66-13d5-a72c-a34c-fac191a23...@theobroma-systems.com/ Oh I see. I did v5 but never sent it out! Thanks for noticing it. I will get it out soon. Regards, Simon
Re: [PATCH v4 0/7] binman: rockchip: Migrate from rockchip SPL_FIT_GENERATOR script
Hi Simon, On 12/7/22 02:08, Simon Glass wrote: Hi Kevar, On Mon, 7 Nov 2022 at 11:40, Simon Glass wrote: At present rockchip 64-bit boards make use of a FIT-generator script written in Python. The script supports splitting an ELF file into several 'loadable' nodes in the FIT. Binman does not current support this feature. This series adds binman support for ELF splitting. This works by adding a new 'fit,operation' property to the FIT subnodes, allowing this new way of generating nodes. Some other fixes and improvements are needed along the way. A new, common binman description is added for 64-bit boards which includes the required u-boot.itb file. The existing script is removed, so that only a few zynq boards are now using a SPL_FIT_GENERATOR script: avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0 xilinx_zynqmp_virt Migration of those is hopefully in progress. Note however that tools/k3_fit_atf.sh remains, used by a few boards that enable CONFIG_TI_SECURE_DEVICE so this series is copied there too: am335x_hs_evm am335x_hs_evm_uart am43xx_hs_evm am57xx_hs_evm am57xx_hs_evm_usb am65x_hs_evm_a53 am65x_hs_evm_r5 dra7xx_hs_evm dra7xx_hs_evm_usb j721e_hs_evm_a72 j721e_hs_evm_r5 k2e_hs_evm k2g_hs_evm k2hk_hs_evm k2l_hs_evm Ivan Mikhaylov has sent a patch to help with these, but I need to take a look at the testing side. In any case they should really be using binman for the image generation. Changes in v4: - Add new patch to disable USE_SPL_FIT_GENERATOR by default Changes in v3: - Add an offset to the FIT description - Add support for writing sections in binman - Rebase to master Changes in v2: - Rename op-tee to tee-os - Drop use of .itb2 - Drop patches previously applied - Add various suggestions from Alper Nebi Yasak - Add patches to refactor binman's FIT support Simon Glass (7): binman: Allow writing section contents to a file rockchip: evb-rk3288: Drop raw-image support rockchip: Include binman script in 64-bit boards rockchip: Support building the all output files in binman rockchip: Convert all boards to use binman rockchip: Drop the FIT generator script treewide: Disable USE_SPL_FIT_GENERATOR by default Can this one please be applied in time for the release? You still have review/questions left unanswered/unaddressed: https://lore.kernel.org/u-boot/a29f8d62-c7be-60e7-8a79-b52f589a9...@linaro.org/ https://lore.kernel.org/u-boot/67717a66-13d5-a72c-a34c-fac191a23...@theobroma-systems.com/ https://lore.kernel.org/u-boot/67717a66-13d5-a72c-a34c-fac191a23...@theobroma-systems.com/ Cheers, Quentin
[PATCH 00/71] bootstd: Allow migration from distro_bootcmd scripts
So far, standard boot does not replicate all the of the functionality of the distro_bootcmd scripts. In particular it lacks some bootdevs and some of the bootmeths are incomplete. Also there is currently no internal mechanism to enumerate buses in order to discover bootdevs, e.g. with USB. This series addresses these shortcomings: - Adds the concept of a 'bootdev hunter' to enumerate buses, etc. in an effort to find bootdevs of a certain priority - Adds bootdevs for SCSI, IDE, NVMe, virtio, SPI flash - Handles PXE and DHCP properly - Supports reading the device tree with EFI and reading scripts from the network It also tidies up label processing, so it is possible to use: bootflow scan mmc2 to scan just one MMC device (with BOOTSTD_FULL). As before this implementation still relies on CONFIG_CMDLINE being enabled, mostly for the network stack. Further work would be required to disentangle that. Quite a few tests are added but there are some gaps: - SPI flash bootdev - EFI FDT loading Note that SATA works via SCSI (CONFIG_SCSI_AHCI) and does not use driver model. Only pogo_v4 seems to be affected. Probably all thats is needed is to call bootdev_setup_sibling_blk() in the Marvell SATA driver. Also, while it would be possible to init MMC in a bootdev hunter, there is no point since U-Boot always inits MMC on startup, if present. With this series it should be possible to migrate boards to standard boot by removing the inclusion of config_distro_bootcmd.h and instead adding a suitable value for boot_targets to the environment, e.g.: boot_targets=mmc1 mmc0 nvme scsi usb pxe dhcp spi Thus it is possible to boot automatically without scripts and boards can use a text-based environment instead of the config.h files. To demonstrate this, rockpro64-rk3399 is migrated to standard boot in this series. Full migration could probably be automated using a script, similar in concept to moveconfig: - obtain the board environment via 'make u-boot-initial-env' - get the value of "boot_targets" - drop config_distro_bootcmd.h from the config.h file - rebuild again to get the environment without distro scripts - write the environment (adding boot_targets) to board.env - remove CONFIG_EXTRA_ENV_SETTINGS from the config.h file This series relies on one test-related patch from the boot menu series[1]. The tree is available at u-boot-dm/dis-working [1] https://patchwork.ozlabs.org/project/uboot/list/?series=326614 Simon Glass (71): dm: core: Correct ordering of uclasses IDs dm: core: Support sorting devices with dm tree dm: test: Correct assertion in dm_test_part() lib: Add a function to split a string into substrings bootstd: Remove special-case code for boot_targets bootstd: Simplify locating existing bootdevs test: Fix the help for the ut command test: Drop duplicate restore of DM state sandbox: mmc: Start off with a zeroed file vbe: Avoid a build failure when bloblist is not enabled vbe: sandbox: Drop VBE node in chosen dm: part: Update test to use mmc2 dm: test: Correct ordering of DM setup ide: Drop non-DM code for BLK dm: mmc: Use bootdev_setup_sibling_blk() bootstd: Add a default method to get bootflows sandbox: Allow ethernet to be disabled at runtime sandbox: Allow ethernet bootdevs to be disabled for tests sandbox: Enable the Ethernet bootdev lib: Support printing an error string event: Correct duplicate log message in event_notify() efi: Improve logging in efi_disk bootstd: Add the concept of a bootdev hunter bootstd: Support running bootdev hunters dm: usb: Drop some dead code dm: usb: Mark the device name as alloced when binding test: Add a generic function to skip delays bootstd: Add a USB hunter bootstd: Add an MMC hunter net: Add a function to run dhcp bootstd: Add a hunter for ethernet part: Add a function to find the first bootable partition bootstd: Only scan bootable partitions scsi: Correct allocation of block-device name scsi: Remove all children of SCSI devices before rescanning bootstd: Add a SCSI bootdev bootstd: Add an IDE bootdev bootstd: Add an NVMe bootdev virtio: Avoid repeating a long expression virtio: Fix returning -ENODEV virtio: Avoid strange behaviour on removal virtio: Add a block device bootstd: Add a virtio bootdev ata: Don't try to use non-existent ports bootstd: Rename bootdev checkers bootstd: Allow reading an EFI file from the network bootstd: Include the device tree in the bootflow bootstd: Support reading the device tree with EFI bootstd: Set the distro_bootpart env var with scripts bootstd: Update docs on bootmeth_try_file() for sandbox bootstd: Move label parsing into its own function bootstd: Add a new bootmeth method to set the bootflow sandbox: Allow SPI flash bootdevs to be disabled for tests bootstd: Add a SPI flash bootdev bootstd: Support reading a script from network or SPI flash bootstd: Treat DHCP and PXE as bootdev
[PATCH] ARM: dts: aspeed: add Meta greatlakes board (AST2600)
Add initial version of device tree for Meta Greatlakes BMC which is
equipped with Aspeed AST2600 BMC SoC.
Signed-off-by: Delphine CC Chiu
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-greatlakes.dts | 191 ++
configs/ast2600_openbmc_spl_defconfig | 1 +
3 files changed, 193 insertions(+)
create mode 100644 arch/arm/dts/ast2600-greatlakes.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6c34b83336..c9cb54cddd 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -686,6 +686,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-evb.dtb \
ast2600-dcscm.dtb \
ast2600-fpga.dtb \
+ ast2600-greatlakes.dtb \
ast2600-intel.dtb \
ast2600-ncsi.dtb \
ast2600-p10bmc.dtb \
diff --git a/arch/arm/dts/ast2600-greatlakes.dts
b/arch/arm/dts/ast2600-greatlakes.dts
new file mode 100644
index 00..94caf295da
--- /dev/null
+++ b/arch/arm/dts/ast2600-greatlakes.dts
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2022 Meta Platforms Inc.
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "Facebook Greatlakes BMC";
+ compatible = "facebook,greatlakes-bmc", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x4000>;
+ };
+
+ chosen {
+ stdout-path =
+ };
+
+ aliases {
+ spi0 =
+ ethernet3 =
+ };
+
+ cpus {
+ cpu@0 {
+ clock-frequency = <8>;
+ };
+ cpu@1 {
+ clock-frequency = <8>;
+ };
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+ {
+ clock-frequency = <4>;
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <_mdio4_default>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy3: ethernet-phy@3 {
+ reg = <0>;
+ };
+};
+
+ {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_rgmii4_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_fmcquad_default>;
+};
+
+ {
+ status = "okay";
+ line_148 {
+ gpio-hog;
+ gpios = <148 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "bmc-slot1-isolated-enabled";
+ };
+ line_149 {
+ gpio-hog;
+ gpios = <149 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "bmc-slot2-isolated-enabled";
+ };
+ line_150 {
+ gpio-hog;
+ gpios = <150 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "bmc-slot3-isolated-enabled";
+ };
+ line_151 {
+ gpio-hog;
+ gpios = <151 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "bmc-slot4-isolated-enabled";
+ };
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c1_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c2_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c3_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c4_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c5_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c6_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c7_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c8_default>;
+};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c9_default>;
+};
+
+ {
+ mac0-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+ mac1-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+ mac2-clk-delay = <0x08 0x04
+ 0x08 0x04
+ 0x08 0x04>;
+ mac3-clk-delay = <0x08 0x04
+ 0x08 0x04
+ 0x08 0x04>;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
diff --git a/configs/ast2600_openbmc_spl_defconfig
b/configs/ast2600_openbmc_spl_defconfig
index 95d7651b8e..efd683570f 100644
--- a/configs/ast2600_openbmc_spl_defconfig
+++ b/configs/ast2600_openbmc_spl_defconfig
@@ -100,6
Re: [PATCH 01/41] xenguest_arm64: Disable networking support more fully
On Sun, Nov 27, 2022 at 10:24:56AM -0500, Tom Rini wrote: > This platform had largely disabled networking support before. More > completely disable it by turning off CONFIG_NET. > > Cc: Anastasiia Lukianenko > Cc: Oleksandr Andrushchenko > Signed-off-by: Tom Rini Except for patch 6, for the series, applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] rtc: add ht1380 driver
Hi Sergei,
On Thu, 8 Dec 2022 at 06:09, Sergei Antonov wrote:
>
> On Wed, 7 Dec 2022 at 04:08, Simon Glass wrote:
> >
> > Hi Sergei,
> >
> > On Tue, 6 Dec 2022 at 23:07, Sergei Antonov wrote:
> > >
> > > Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds
> > > , minutes, hours, day of the week, date, month and year information.
> > >
> > > Datasheet:
> > > https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf
> > >
> > > Signed-off-by: Sergei Antonov
> > > ---
> > >
> > > v2:
> > > * The RESET pin is now to be described as ACTIVE_LOW in dts.
> > >
> > > Changes suggested by Simon Glass:
> > > * a more detailed driver description in Kconfig
> > > * multi-line comments' style
> > > * enum for 0x80 and the 0x20 at top of file
> > > * lower-case hex constants
> > > * function comments for ht1380_reset_on/off
> > > * blank line before returns
> > >
> > > PROTECT remains in a function scope for the sake of locality of
> > > definitions.
> > >
> > > drivers/rtc/Kconfig | 8 +
> > > drivers/rtc/Makefile | 1 +
> > > drivers/rtc/ht1380.c | 337 +++
> > > 3 files changed, 346 insertions(+)
> > > create mode 100644 drivers/rtc/ht1380.c
> > >
[..]
> > > +static int ht1380_rtc_get(struct udevice *dev, struct rtc_time *tm)
> > > +{
> > > + struct ht1380_priv *priv = dev_get_priv(dev);
> > > + int ret, i, bit, reg[N_REGS];
> > > +
> > > + ret = dm_gpio_set_value(>clk_desc, 0);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + ret = dm_gpio_set_dir_flags(>dat_desc, GPIOD_IS_OUT);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + ret = ht1380_reset_off(priv);
> > > + if (ret)
> > > + goto exit;
> > > +
> > > + ret = ht1380_send_byte(priv, BURST + READ);
> > > + if (ret)
> > > + goto exit;
> > > +
> > > + ret = dm_gpio_set_dir_flags(>dat_desc, GPIOD_IS_IN);
> > > + if (ret)
> > > + goto exit;
> > > +
> >
> > Is this some sort of I2C protocol?
>
> Like I2C it uses a pin for clock and a pin for data in/out. Unlike I2C
> it does not use addressing. I am not sure whether this driver can
> utilize some of the existing I2C code in U-Boot. Wrote my own bit
> banging routines.
Yes you can use i2c, by setting the offset_len to 0, e.g. with:
u-boot,i2c-offset-len = <0>;
>
> > > + for (i = 0; i < N_REGS; i++) {
> > > + reg[i] = 0;
> > > +
> > > + for (bit = 0; bit < 8; bit++) {
> > > + ht1380_half_period_delay();
> > > +
> > > + ret = dm_gpio_set_value(>clk_desc, 1);
> > > + if (ret)
> > > + goto exit;
> > > + ht1380_half_period_delay();
> > > +
> > > + reg[i] |= dm_gpio_get_value(>dat_desc) <<
> > > bit;
> > > + ret = dm_gpio_set_value(>clk_desc, 0);
> > > + if (ret)
> > > + goto exit;
> > > + }
> > > + }
> > > +
> > > + ret = -EINVAL;
> > > +
> > > + /* Correctness check: some bits are always zero */
> > > + if ((reg[MIN] & 0x80) || (reg[HOUR] & 0x40) || (reg[MDAY] & 0xc0)
> > > ||
> > > + (reg[MONTH] & 0xe0) || (reg[WDAY] & 0xf8) || (reg[WP] & 0x7f))
> > > + goto exit;
> >
> > Drop extra brackets ?
>
> OK. Will be done in v3. I put extra brackets expecting reviewers to
> criticize code readability :).
:)
Regards,
Simon
[PATCH] Makefile: link with --no-warn-rwx-segments
We borrow from the Linux Kernel 0d362be5b142 ("Makefile: link with -z
noexecstack --no-warn-rwx-segments") here to disable the RWX segment
linking warnings. We do not also bring in -z noexecstack as that
requires auditing and using ".note.GNU-stack" on assembly functions
which do need this feature. Further, we now introduce KBUILD_EFILDFLAGS
so that we can also pass --no-warn-rwx-segments when linking EFI
applications, and those do explicitly pass -z execstack.
Cc: Heinrich Schuchardt
Cc: Ilias Apalodimas
Signed-off-by: Tom Rini
---
Makefile | 2 ++
scripts/Makefile.lib | 6 --
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile
index 11efc4180414..839733836d9b 100644
--- a/Makefile
+++ b/Makefile
@@ -806,6 +806,8 @@ KBUILD_CPPFLAGS += $(KCPPFLAGS)
KBUILD_AFLAGS += $(KAFLAGS)
KBUILD_CFLAGS += $(KCFLAGS)
+KBUILD_LDFLAGS += $(call ld-option,--no-warn-rwx-segments)
+
KBUILD_HOSTCFLAGS += $(if $(CONFIG_TOOLS_DEBUG),-g)
# Use UBOOTINCLUDE when you must reference the include/ directory.
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 8e13bf2b986d..ac45a8847859 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -425,9 +425,11 @@ cmd_efi_objcopy = $(OBJCOPY) -j .header -j .text -j .sdata
-j .data -j \
$(obj)/%.efi: $(obj)/%_efi.so
$(call cmd,efi_objcopy)
+KBUILD_EFILDFLAGS = -nostdlib -zexecstack -znocombreloc -znorelro
+KBUILD_EFILDFLAGS += $(call ld-option,--no-warn-rwx-segments)
quiet_cmd_efi_ld = LD $@
-cmd_efi_ld = $(LD) -nostdlib -zexecstack -znocombreloc -T $(EFI_LDS_PATH) \
- -shared -Bsymbolic -znorelro -s $^ -o $@
+cmd_efi_ld = $(LD) $(KBUILD_EFILDFLAGS) -T $(EFI_LDS_PATH) \
+ -shared -Bsymbolic -s $^ -o $@
EFI_LDS_PATH = $(srctree)/arch/$(ARCH)/lib/$(EFI_LDS)
--
2.25.1
[PATCH] ARM: imx: mx5: Convert MX53 Menlo board to DM SERIAL
Convert the board from legacy serial code to DM SERIAL. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Stefano Babic --- configs/m53menlo_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index b4ada56a36b..024a35e265f 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -105,6 +105,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SYSRESET_WATCHDOG=y -- 2.35.1
Re: [PATCH] dts: Re-add aliases for imx6qdl-sabrelite devices
On Wed, Dec 07, 2022 at 03:08:46PM -0500, Detlev Casanova wrote:
> On Wednesday, December 7, 2022 3:03:56 P.M. EST Tom Rini wrote:
> > On Mon, Dec 05, 2022 at 02:33:48PM -0300, Fabio Estevam wrote:
> > > On Mon, Dec 5, 2022 at 12:37 PM Tom Rini wrote:
> > > > I'm not really happy with this approach. It's not that upstream doesn't
> > > > have aliases now, it's that it has different aliases, right? That's why
> > > > they won't accept these?
> > >
> > > imx6q.dtsi does have the default mmc aliases:
> > >
> > > mmc0 =
> > > mmc1 =
> > > mmc2 =
> > > mmc3 =
> > >
> > > Upstream does not want to change mmc alias because users may rely on
> > > this mmc aliases.
> > >
> > > Changing it now may cause the board not to boot anymore as the rootfs
> > > cannot be found.
> > >
> > > It is OK to change mmc alias for a newly introduced board, but please
> > > keep in mind that
> > > wandboard and sabrelite have been launched many many years ago.
> > >
> > > So for upstream Linux the message was clear: don't change the mmc
> > > alias for these boards.
> > >
> > > Now let's talk about U-Boot.
> > >
> > > Prior to d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with
> > >
> > > linux") the mmc alias for sabrelite was present:
> > >mmc0 =
> > >mmc1 =
> > >
> > > After this commit, the mmc alias is gone and causes the boot
> > > regression as reported by Detlev.
> > >
> > > We don't want to cause regressions in U-Boot as well, so that's why I
> > > propose just adding the alias into u-boot.dtsi.
> > >
> > > There are many boards that does the same.
> > >
> > > > But this also highlights that we really need to get these kind of
> > > > aliases and similar (a) re-synced with upstream ASAP and (b) do that at
> > >
> > > imx6 dts files are already synced with Linux.
> > >
> > > > the start. I don't know which group of "users are broken by this change"
> > > > is bigger, the group that needs the aliases we have or the group that
> > > > needs the other aliases, but the group that gets changes upstream first
> > > > "wins" here is how the OSS world works.
> > >
> > > I prefer to not break things for anyone, hence my proposal.
> > >
> > > If you are still not happy with it, please feel free to submit a patch
> > > with your proposal.
> >
> > I don't know what we can do about the existing boards, but we need to
> > NOT do this moving forward. We need to use whatever the aliases are
> > upstream already, or upstream the aliases we want to use.
>
> Yes, I agree that aliases should be kept in sync with the kernel. But this
> case is particular because this board has been using different aliases in u-
> boot and in linux for some time (maybe since forever).
>
> So this should be kept to avoid breaking existing u-boot setups when they are
> upgraded.
I wonder just how many users would end up needing to be fixed here,
but... since this is imx6 and not something brand new like 8 or 9, I'll
just let it go, here.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] dts: Re-add aliases for imx6qdl-sabrelite devices
On Wednesday, December 7, 2022 3:03:56 P.M. EST Tom Rini wrote:
> On Mon, Dec 05, 2022 at 02:33:48PM -0300, Fabio Estevam wrote:
> > On Mon, Dec 5, 2022 at 12:37 PM Tom Rini wrote:
> > > I'm not really happy with this approach. It's not that upstream doesn't
> > > have aliases now, it's that it has different aliases, right? That's why
> > > they won't accept these?
> >
> > imx6q.dtsi does have the default mmc aliases:
> >
> > mmc0 =
> > mmc1 =
> > mmc2 =
> > mmc3 =
> >
> > Upstream does not want to change mmc alias because users may rely on
> > this mmc aliases.
> >
> > Changing it now may cause the board not to boot anymore as the rootfs
> > cannot be found.
> >
> > It is OK to change mmc alias for a newly introduced board, but please
> > keep in mind that
> > wandboard and sabrelite have been launched many many years ago.
> >
> > So for upstream Linux the message was clear: don't change the mmc
> > alias for these boards.
> >
> > Now let's talk about U-Boot.
> >
> > Prior to d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with
> >
> > linux") the mmc alias for sabrelite was present:
> >mmc0 =
> >mmc1 =
> >
> > After this commit, the mmc alias is gone and causes the boot
> > regression as reported by Detlev.
> >
> > We don't want to cause regressions in U-Boot as well, so that's why I
> > propose just adding the alias into u-boot.dtsi.
> >
> > There are many boards that does the same.
> >
> > > But this also highlights that we really need to get these kind of
> > > aliases and similar (a) re-synced with upstream ASAP and (b) do that at
> >
> > imx6 dts files are already synced with Linux.
> >
> > > the start. I don't know which group of "users are broken by this change"
> > > is bigger, the group that needs the aliases we have or the group that
> > > needs the other aliases, but the group that gets changes upstream first
> > > "wins" here is how the OSS world works.
> >
> > I prefer to not break things for anyone, hence my proposal.
> >
> > If you are still not happy with it, please feel free to submit a patch
> > with your proposal.
>
> I don't know what we can do about the existing boards, but we need to
> NOT do this moving forward. We need to use whatever the aliases are
> upstream already, or upstream the aliases we want to use.
Yes, I agree that aliases should be kept in sync with the kernel. But this
case is particular because this board has been using different aliases in u-
boot and in linux for some time (maybe since forever).
So this should be kept to avoid breaking existing u-boot setups when they are
upgraded.
Re: [PATCH] dts: Re-add aliases for imx6qdl-sabrelite devices
On Mon, Dec 05, 2022 at 02:33:48PM -0300, Fabio Estevam wrote:
> On Mon, Dec 5, 2022 at 12:37 PM Tom Rini wrote:
>
> > I'm not really happy with this approach. It's not that upstream doesn't
> > have aliases now, it's that it has different aliases, right? That's why
> > they won't accept these?
>
> imx6q.dtsi does have the default mmc aliases:
>
> mmc0 =
> mmc1 =
> mmc2 =
> mmc3 =
>
> Upstream does not want to change mmc alias because users may rely on
> this mmc aliases.
>
> Changing it now may cause the board not to boot anymore as the rootfs
> cannot be found.
>
> It is OK to change mmc alias for a newly introduced board, but please
> keep in mind that
> wandboard and sabrelite have been launched many many years ago.
>
> So for upstream Linux the message was clear: don't change the mmc
> alias for these boards.
>
> Now let's talk about U-Boot.
>
> Prior to d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with
> linux") the mmc alias for sabrelite was present:
>
>mmc0 =
>mmc1 =
>
> After this commit, the mmc alias is gone and causes the boot
> regression as reported by Detlev.
>
> We don't want to cause regressions in U-Boot as well, so that's why I
> propose just adding the alias into u-boot.dtsi.
>
> There are many boards that does the same.
>
> > But this also highlights that we really need to get these kind of
> > aliases and similar (a) re-synced with upstream ASAP and (b) do that at
>
> imx6 dts files are already synced with Linux.
>
> > the start. I don't know which group of "users are broken by this change"
> > is bigger, the group that needs the aliases we have or the group that
> > needs the other aliases, but the group that gets changes upstream first
> > "wins" here is how the OSS world works.
>
> I prefer to not break things for anyone, hence my proposal.
>
> If you are still not happy with it, please feel free to submit a patch
> with your proposal.
I don't know what we can do about the existing boards, but we need to
NOT do this moving forward. We need to use whatever the aliases are
upstream already, or upstream the aliases we want to use.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] dts: Re-add aliases for imx6qdl-sabrelite devices
On Wed, Dec 07, 2022 at 02:53:10PM -0500, Detlev Casanova wrote:
> On Monday, December 5, 2022 12:33:48 P.M. EST Fabio Estevam wrote:
> > On Mon, Dec 5, 2022 at 12:37 PM Tom Rini wrote:
> > > I'm not really happy with this approach. It's not that upstream doesn't
> > > have aliases now, it's that it has different aliases, right? That's why
> > > they won't accept these?
> >
> > imx6q.dtsi does have the default mmc aliases:
> >
> > mmc0 =
> > mmc1 =
> > mmc2 =
> > mmc3 =
> >
> > Upstream does not want to change mmc alias because users may rely on
> > this mmc aliases.
> >
> > Changing it now may cause the board not to boot anymore as the rootfs
> > cannot be found.
> >
> > It is OK to change mmc alias for a newly introduced board, but please
> > keep in mind that
> > wandboard and sabrelite have been launched many many years ago.
> >
> > So for upstream Linux the message was clear: don't change the mmc
> > alias for these boards.
> >
> > Now let's talk about U-Boot.
> >
> > Prior to d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with
> > linux") the mmc alias for sabrelite was present:
> >
> >mmc0 =
> >mmc1 =
> >
> > After this commit, the mmc alias is gone and causes the boot
> > regression as reported by Detlev.
> >
> > We don't want to cause regressions in U-Boot as well, so that's why I
> > propose just adding the alias into u-boot.dtsi.
> >
> > There are many boards that does the same.
> >
> > > But this also highlights that we really need to get these kind of
> > > aliases and similar (a) re-synced with upstream ASAP and (b) do that at
> >
> > imx6 dts files are already synced with Linux.
> >
> > > the start. I don't know which group of "users are broken by this change"
> > > is bigger, the group that needs the aliases we have or the group that
> > > needs the other aliases, but the group that gets changes upstream first
> > > "wins" here is how the OSS world works.
> >
> > I prefer to not break things for anyone, hence my proposal.
> >
> > If you are still not happy with it, please feel free to submit a patch
> > with your proposal.
>
> There is no SPL enabled for the imx.6 Sabrelite, Isn't that needed to use the
> *-u-boot.dtsi files ?
>
> It is not clear to me how those are loaded.
The -u-boot.dtsi files are automatically included from scripts/Makefile.lib:
u_boot_dtsi_options = $(strip $(wildcard $(dir $<)$(basename $(notdir
$<))-u-boot.dtsi) \
$(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \
$(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \
$(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \
$(wildcard $(dir $<)u-boot.dtsi))
And then manually #included at times as the above logic will only pick
one file and sometimes we do need to combine multiple.
--
Tom
signature.asc
Description: PGP signature
[PATCH v5 7/7] treewide: Disable USE_SPL_FIT_GENERATOR by default
This option is deprecated and only used by two boards. Enable it for just those two boards, so others don't accidentally enable it. Signed-off-by: Simon Glass --- Changes in v5: - Add new patch to disable USE_SPL_FIT_GENERATOR by default Changes in v3: - Add support for writing sections in binman - Rebase to master Changes in v2: - Drop patches previously applied - Add various suggestions from Alper Nebi Yasak - Add patches to refactor binman's FIT support boot/Kconfig | 5 +++-- configs/am335x_evm_defconfig | 1 - configs/am335x_hs_evm_defconfig | 1 - configs/am335x_hs_evm_uart_defconfig | 1 - configs/am43xx_evm_defconfig | 1 - configs/am43xx_evm_rtconly_defconfig | 1 - configs/am43xx_evm_usbhost_boot_defconfig| 1 - configs/am43xx_hs_evm_defconfig | 1 - configs/am57xx_evm_defconfig | 1 - configs/am57xx_hs_evm_defconfig | 1 - configs/am57xx_hs_evm_usb_defconfig | 1 - configs/am65x_evm_a53_defconfig | 1 - configs/am65x_evm_r5_defconfig | 1 - configs/am65x_hs_evm_a53_defconfig | 1 - configs/am65x_hs_evm_r5_defconfig| 1 - .../avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/cgtqmx8_defconfig| 1 - configs/chromebook_link64_defconfig | 1 - configs/dh_imx6_defconfig| 1 - configs/display5_defconfig | 1 - configs/display5_factory_defconfig | 1 - configs/dra7xx_evm_defconfig | 1 - configs/dra7xx_hs_evm_defconfig | 1 - configs/dra7xx_hs_evm_usb_defconfig | 1 - configs/evb-ast2600_defconfig| 1 - configs/evb-rk3229_defconfig | 1 - configs/evb-rk3288_defconfig | 1 - configs/gwventana_emmc_defconfig | 1 - configs/gwventana_gw5904_defconfig | 1 - configs/gwventana_nand_defconfig | 1 - configs/imx6qdl_icore_mipi_defconfig | 1 - configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_rqs_defconfig | 1 - configs/imx8mm-cl-iot-gate-optee_defconfig | 1 - configs/imx8mm-cl-iot-gate_defconfig | 1 - configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 - configs/imx8mm-icore-mx8mm-edimm2.2_defconfig| 1 - configs/imx8mm-mx8menlo_defconfig| 1 - configs/imx8mm_beacon_defconfig | 1 - configs/imx8mm_data_modul_edm_sbc_defconfig | 1 - configs/imx8mm_evk_defconfig | 1 - configs/imx8mm_evk_fspi_defconfig| 1 - configs/imx8mm_venice_defconfig | 1 - configs/imx8mn_beacon_2g_defconfig | 1 - configs/imx8mn_beacon_defconfig | 1 - configs/imx8mn_bsh_smm_s2_defconfig | 1 - configs/imx8mn_bsh_smm_s2pro_defconfig | 1 - configs/imx8mn_ddr4_evk_defconfig| 1 - configs/imx8mn_evk_defconfig | 1 - configs/imx8mn_var_som_defconfig | 1 - configs/imx8mn_venice_defconfig | 1 - configs/imx8mp-icore-mx8mp-edimm2.2_defconfig| 1 - configs/imx8mp_dhcom_pdk2_defconfig | 1 - configs/imx8mp_evk_defconfig | 1 - configs/imx8mp_rsb3720a1_4G_defconfig| 1 - configs/imx8mp_rsb3720a1_6G_defconfig| 1 - configs/imx8mp_venice_defconfig | 1 - configs/imx8mq_cm_defconfig | 1 - configs/imx8mq_evk_defconfig | 1 - configs/imx8mq_phanbell_defconfig| 1 - configs/imx8qm_rom7720_a1_4G_defconfig | 1 - configs/iot2050_defconfig| 1 - configs/j7200_evm_a72_defconfig | 1 - configs/j7200_evm_r5_defconfig | 1 - configs/j7200_hs_evm_a72_defconfig | 1 - configs/j7200_hs_evm_r5_defconfig| 1 - configs/j721e_evm_a72_defconfig
[PATCH v5 6/7] rockchip: Drop the FIT generator script
This is not used anymore. Drop it.
Signed-off-by: Simon Glass
---
(no changes since v1)
Makefile | 3 -
arch/arm/mach-rockchip/make_fit_atf.py | 267 -
boot/Kconfig | 1 -
3 files changed, 271 deletions(-)
delete mode 100755 arch/arm/mach-rockchip/make_fit_atf.py
diff --git a/Makefile b/Makefile
index 5d386015a4c..3d0a4c60c2f 100644
--- a/Makefile
+++ b/Makefile
@@ -1371,9 +1371,6 @@ $(U_BOOT_ITS): $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
else
ifneq ($(CONFIG_USE_SPL_FIT_GENERATOR),)
U_BOOT_ITS := u-boot.its
-ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py")
-U_BOOT_ITS_DEPS += u-boot
-endif
$(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE
$(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py
b/arch/arm/mach-rockchip/make_fit_atf.py
deleted file mode 100755
index 08cfe9f51e9..000
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ /dev/null
@@ -1,267 +0,0 @@
-#!/usr/bin/env python3
-"""
-# SPDX-License-Identifier: GPL-2.0+
-#
-# A script to generate FIT image source for rockchip boards
-# with ARM Trusted Firmware
-# and multiple device trees (given on the command line)
-#
-# usage: $0 [ [;
-
- images {
-"""
-
-DT_UBOOT = """
- uboot {
- description = "U-Boot (64-bit)";
- data = /incbin/("u-boot-nodtb.bin");
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <0x%08x>;
- };
-
-"""
-
-DT_IMAGES_NODE_END = """ };
-
-"""
-
-DT_END = "};"
-
-def append_bl31_node(file, atf_index, phy_addr, elf_entry):
-# Append BL31 DT node to input FIT dts file.
-data = 'bl31_0x%08x.bin' % phy_addr
-file.write('\t\tatf_%d {\n' % atf_index)
-file.write('\t\t\tdescription = \"ARM Trusted Firmware\";\n')
-file.write('\t\t\tdata = /incbin/("%s");\n' % data)
-file.write('\t\t\ttype = "firmware";\n')
-file.write('\t\t\tarch = "arm64";\n')
-file.write('\t\t\tos = "arm-trusted-firmware";\n')
-file.write('\t\t\tcompression = "none";\n')
-file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
-if atf_index == 1:
-file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry)
-file.write('\t\t};\n')
-file.write('\n')
-
-def append_tee_node(file, atf_index, phy_addr, elf_entry):
-# Append TEE DT node to input FIT dts file.
-data = 'tee_0x%08x.bin' % phy_addr
-file.write('\t\tatf_%d {\n' % atf_index)
-file.write('\t\t\tdescription = \"TEE\";\n')
-file.write('\t\t\tdata = /incbin/("%s");\n' % data)
-file.write('\t\t\ttype = "tee";\n')
-file.write('\t\t\tarch = "arm64";\n')
-file.write('\t\t\tos = "tee";\n')
-file.write('\t\t\tcompression = "none";\n')
-file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
-file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry)
-file.write('\t\t};\n')
-file.write('\n')
-
-def append_fdt_node(file, dtbs):
-# Append FDT nodes.
-cnt = 1
-for dtb in dtbs:
-dtname = os.path.basename(dtb)
-file.write('\t\tfdt_%d {\n' % cnt)
-file.write('\t\t\tdescription = "%s";\n' % dtname)
-file.write('\t\t\tdata = /incbin/("%s");\n' % dtb)
-file.write('\t\t\ttype = "flat_dt";\n')
-file.write('\t\t\tcompression = "none";\n')
-file.write('\t\t};\n')
-file.write('\n')
-cnt = cnt + 1
-
-def append_conf_section(file, cnt, dtname, segments):
-file.write('\t\tconfig_%d {\n' % cnt)
-file.write('\t\t\tdescription = "%s";\n' % dtname)
-file.write('\t\t\tfirmware = "atf_1";\n')
-file.write('\t\t\tloadables = "uboot"')
-if segments > 1:
-file.write(',')
-for i in range(1, segments):
-file.write('"atf_%d"' % (i + 1))
-if i != (segments - 1):
-file.write(',')
-else:
-file.write(';\n')
-if segments <= 1:
-file.write(';\n')
-file.write('\t\t\tfdt = "fdt_%d";\n' % cnt)
-file.write('\t\t};\n')
-file.write('\n')
-
-def append_conf_node(file, dtbs, segments):
-# Append configeration nodes.
-cnt = 1
-file.write('\tconfigurations {\n')
-file.write('\t\tdefault = "config_1";\n')
-for dtb in dtbs:
-dtname = os.path.basename(dtb)
-append_conf_section(file, cnt, dtname, segments)
-cnt = cnt + 1
-file.write('\t};\n')
-file.write('\n')
-
-def generate_atf_fit_dts_uboot(fit_file, uboot_file_name):
-segments = unpack_elf(uboot_file_name)
-if len(segments) != 1:
-raise ValueError("Invalid u-boot ELF image '%s'" % uboot_file_name)
-index, entry, p_paddr, data = segments[0]
-fit_file.write(DT_UBOOT % p_paddr)
-
-def
[PATCH v5 4/7] rockchip: Support building the all output files in binman
Add the required binman images to replace the Makefile rules which are
currently used. This includes subsuming:
- tpl/u-boot-tpl-rockchip.bin if TPL is enabled
- idbloader.img if either or both of SPL and TPL are enabled
- u-boot.itb if SPL_FIT is enabled
- u-boot-rockchip.bin if SPL is used, either using u-boot.itb when
SPL_FIT is enabled or u-boot.img when it isn't
Note that the intermediate files are dropped with binman, since it
producing everything in one pass. This means that
tpl/u-boot-tpl-rockchip.bin is not created, for example.
Note that for some 32-bit rk3288 boards, rockchip-optee.dtsi is included.
Signed-off-by: Simon Glass
---
Changes in v5:
- Rename blob to fit for puma and also SPI image
Changes in v3:
- Add an offset to the FIT description
Changes in v2:
- Rename op-tee to tee-os
- Drop use of .itb2
arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 4 +-
arch/arm/dts/rockchip-u-boot.dtsi | 76 +++--
2 files changed, 72 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
index f8335c74a74..906098fae07 100644
--- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
@@ -46,14 +46,14 @@
{
simple-bin {
- blob {
+ fit {
offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR -
64) * 512)>;
};
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
simple-bin-spi {
- blob {
+ fit {
/* same as u-boot,spl-payload-offset */
offset = <0x8>;
};
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 584f21eb5bf..22dfbbb3661 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -30,14 +30,77 @@
};
};
-#ifdef CONFIG_ARM64
- blob {
+#if defined(CONFIG_SPL_FIT) && defined(CONFIG_ARM64)
+ fit: fit {
+ description = "FIT image for U-Boot with bl31 (TF-A)";
+ #address-cells = <1>;
+ fit,fdt-list = "of-list";
filename = "u-boot.itb";
+ fit,external-offset = ;
+ offset = ;
+ images {
+ u-boot {
+ description = "U-Boot (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = ;
+ u-boot-nodtb {
+ };
+ };
+
+ @atf-SEQ {
+ fit,operation = "split-elf";
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ os = "arm-trusted-firmware";
+ compression = "none";
+ fit,load;
+ fit,entry;
+ fit,data;
+
+ atf-bl31 {
+ };
+ };
+ @tee-SEQ {
+ fit,operation = "split-elf";
+ description = "TEE";
+ type = "tee";
+ arch = "arm64";
+ os = "tee";
+ compression = "none";
+ fit,load;
+ fit,entry;
+ fit,data;
+
+ tee-os {
+ };
+ };
+
+ @fdt-SEQ {
+ description = "fdt-NAME";
+ compression = "none";
+ type = "flat_dt";
+ };
+ };
+
+ configurations {
+ default = "@config-DEFAULT-SEQ";
+ @config-SEQ {
+ description = "NAME.dtb";
+ fdt = "fdt-SEQ";
+
[PATCH v5 5/7] rockchip: Convert all boards to use binman
Instead of the bash script, use binman to generate the FIT for arm64. For 32-bit boards, use binman for all images, dropping the intermediate files. With this change, only Zynq is now using SPL_FIT_GENERATOR so update the Kconfig rule accordingly. Clean up the Makefile to the extent possible. Unfortunately, two boards do not use SPL_FRAMEWORK so don't enable the u-boot.img rule: evb-rk3036 kylin-rk3036 So a small remnant remains. Signed-off-by: Simon Glass --- (no changes since v1) Makefile | 8 +--- boot/Kconfig | 2 +- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/Makefile b/Makefile index de5746399a6..5d386015a4c 100644 --- a/Makefile +++ b/Makefile @@ -1004,14 +1004,9 @@ ifeq ($(CONFIG_INIT_SP_RELATIVE)$(CONFIG_OF_SEPARATE),yy) INPUTS-y += init_sp_bss_offset_check endif -ifeq ($(CONFIG_ARCH_ROCKCHIP)$(CONFIG_SPL),yy) -# Binman image dependencies -ifeq ($(CONFIG_ARM64),y) -INPUTS-y += u-boot.itb -else +ifeq ($(CONFIG_ARCH_ROCKCHIP)_$(CONFIG_SPL_FRAMEWORK),y_) INPUTS-y += u-boot.img endif -endif INPUTS-$(CONFIG_X86) += u-boot-x86-start16.bin u-boot-x86-reset16.bin \ $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ @@ -1483,7 +1478,6 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \ u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE $(call if_changed,pad_cat) - ifeq ($(CONFIG_ARCH_LPC32XX)$(CONFIG_SPL),yy) MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE) diff --git a/boot/Kconfig b/boot/Kconfig index 4a001bcee85..4eb48df650b 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -277,7 +277,7 @@ config SPL_FIT_SOURCE config USE_SPL_FIT_GENERATOR bool "Use a script to generate the .its script" - default y if SPL_FIT && (!ARCH_SUNXI && !RISCV) + default y if SPL_FIT && ARCH_ZYNQMP config SPL_FIT_GENERATOR string ".its file generator script for U-Boot FIT image" -- 2.39.0.rc1.256.g54fd8350bd-goog
[PATCH v5 3/7] rockchip: Use multiple-images for rk3399
Enable multiple-images so we can generate more than one image. Also
add a comment for the end of the #if block.
Signed-off-by: Simon Glass
---
Changes in v5:
- Rename from 'Include binman script in 64-bit boards'
- Drop duplicate #include in rk3368-u-boot.dtsi
- Keep the name as fit for puma
- Drop redundant check for CONFIG_ROCKCHIP_SPI_IMAGE
- Drop imply of BINMAN in Kconfig (rely on ARCH_ROCKCHIP instead)
arch/arm/dts/rk3399-u-boot.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 3c1a15fe51b..85a4f472d5d 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -62,6 +62,7 @@
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
{
+ multiple-images;
rom {
filename = "u-boot.rom";
size = <0x40>;
@@ -82,7 +83,7 @@
};
};
};
-#endif
+#endif /* CONFIG_ROCKCHIP_SPI_IMAGE */
{
u-boot,dm-pre-reloc;
--
2.39.0.rc1.256.g54fd8350bd-goog
[PATCH v5 2/7] rockchip: evb-rk3288: Drop raw-image support
This boards uses SPL_FIT so does not need to support loading a raw image. Drop it to avoid binman trying to insert a symbol which has no value. Signed-off-by: Simon Glass --- (no changes since v1) configs/evb-rk3288_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 7c0b856ca56..92c365af2f7 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y -- 2.39.0.rc1.256.g54fd8350bd-goog
[PATCH v5 0/7] binman: rockchip: Migrate from rockchip SPL_FIT_GENERATOR script
At present rockchip 64-bit boards make use of a FIT-generator script written in Python. The script supports splitting an ELF file into several 'loadable' nodes in the FIT. Binman does not current support this feature. This series adds binman support for ELF splitting. This works by adding a new 'fit,operation' property to the FIT subnodes, allowing this new way of generating nodes. Some other fixes and improvements are needed along the way. A new, common binman description is added for 64-bit boards which includes the required u-boot.itb file. The existing script is removed, so that only a few zynq boards are now using a SPL_FIT_GENERATOR script: avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0 xilinx_zynqmp_virt Migration of those is hopefully in progress. Note however that tools/k3_fit_atf.sh remains, used by a few boards that enable CONFIG_TI_SECURE_DEVICE so this series is copied there too: am335x_hs_evm am335x_hs_evm_uart am43xx_hs_evm am57xx_hs_evm am57xx_hs_evm_usb am65x_hs_evm_a53 am65x_hs_evm_r5 dra7xx_hs_evm dra7xx_hs_evm_usb j721e_hs_evm_a72 j721e_hs_evm_r5 k2e_hs_evm k2g_hs_evm k2hk_hs_evm k2l_hs_evm Ivan Mikhaylov has sent a patch to help with these, but I need to take a look at the testing side. In any case they should really be using binman for the image generation. Changes in v5: - Update commit message to mention using parts of one image in another - Rename from 'Include binman script in 64-bit boards' - Drop duplicate #include in rk3368-u-boot.dtsi - Keep the name as fit for puma - Drop redundant check for CONFIG_ROCKCHIP_SPI_IMAGE - Drop imply of BINMAN in Kconfig (rely on ARCH_ROCKCHIP instead) - Rename blob to fit for puma and also SPI image - Add new patch to disable USE_SPL_FIT_GENERATOR by default Changes in v3: - Add an offset to the FIT description - Add support for writing sections in binman - Rebase to master Changes in v2: - Rename op-tee to tee-os - Drop use of .itb2 - Drop patches previously applied - Add various suggestions from Alper Nebi Yasak - Add patches to refactor binman's FIT support Simon Glass (7): binman: Allow writing section contents to a file rockchip: evb-rk3288: Drop raw-image support rockchip: Use multiple-images for rk3399 rockchip: Support building the all output files in binman rockchip: Convert all boards to use binman rockchip: Drop the FIT generator script treewide: Disable USE_SPL_FIT_GENERATOR by default Makefile | 11 +- arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 4 +- arch/arm/dts/rk3399-u-boot.dtsi | 3 +- arch/arm/dts/rockchip-u-boot.dtsi | 76 - arch/arm/mach-rockchip/make_fit_atf.py| 267 -- boot/Kconfig | 6 +- configs/am335x_evm_defconfig | 1 - configs/am335x_hs_evm_defconfig | 1 - configs/am335x_hs_evm_uart_defconfig | 1 - configs/am43xx_evm_defconfig | 1 - configs/am43xx_evm_rtconly_defconfig | 1 - configs/am43xx_evm_usbhost_boot_defconfig | 1 - configs/am43xx_hs_evm_defconfig | 1 - configs/am57xx_evm_defconfig | 1 - configs/am57xx_hs_evm_defconfig | 1 - configs/am57xx_hs_evm_usb_defconfig | 1 - configs/am65x_evm_a53_defconfig | 1 - configs/am65x_evm_r5_defconfig| 1 - configs/am65x_hs_evm_a53_defconfig| 1 - configs/am65x_hs_evm_r5_defconfig | 1 - ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/cgtqmx8_defconfig | 1 - configs/chromebook_link64_defconfig | 1 - configs/dh_imx6_defconfig | 1 - configs/display5_defconfig| 1 - configs/display5_factory_defconfig| 1 - configs/dra7xx_evm_defconfig | 1 - configs/dra7xx_hs_evm_defconfig | 1 - configs/dra7xx_hs_evm_usb_defconfig | 1 - configs/evb-ast2600_defconfig | 1 - configs/evb-rk3229_defconfig | 1 - configs/evb-rk3288_defconfig | 2 +- configs/gwventana_emmc_defconfig | 1 - configs/gwventana_gw5904_defconfig| 1 - configs/gwventana_nand_defconfig | 1 - configs/imx6qdl_icore_mipi_defconfig | 1 - configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_rqs_defconfig | 1 - configs/imx8mm-cl-iot-gate-optee_defconfig| 1 - configs/imx8mm-cl-iot-gate_defconfig | 1 - configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 - configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 - configs/imx8mm-mx8menlo_defconfig | 1 - configs/imx8mm_beacon_defconfig | 1 - configs/imx8mm_data_modul_edm_sbc_defconfig | 1 -
[PATCH v5 1/7] binman: Allow writing section contents to a file
At present only the image (which is a section) has a filename. Move this
implementation to the entry_Section class so that any section can have a
filename. With this, the section data is written to a file.
This allows parts of an image to be written, along with the entire image.
Make a note that this can be used to include the contents of a section in
one image in another (later) image.
Signed-off-by: Simon Glass
---
Changes in v5:
- Update commit message to mention using parts of one image in another
tools/binman/binman.rst | 5 +
tools/binman/etype/section.py | 12 +-
tools/binman/ftest.py | 14
tools/binman/image.py | 3 ---
tools/binman/test/261_section_fname.dts | 29 +
5 files changed, 59 insertions(+), 4 deletions(-)
create mode 100644 tools/binman/test/261_section_fname.dts
diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index e7b231e0712..b091114fb91 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -836,6 +836,11 @@ name-prefix:
renamed to 'ro-u-boot' and 'rw-u-boot'. This can be useful to
distinguish binaries with otherwise identical names.
+filename:
+This allows the contents of the section to be written to a file in the
+output directory. This can sometimes be useful to use the data in one
+section in different image, since there is currently no way to share data
+beteen images other than through files.
Image Properties
diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py
index da561e2bcc7..305155c8461 100644
--- a/tools/binman/etype/section.py
+++ b/tools/binman/etype/section.py
@@ -144,6 +144,10 @@ class Entry_section(Entry):
be written at offset 4 in the image file, since the first 16 bytes are
skipped when writing.
+filename
+filename to write the unpadded section contents to within the output
+directory (None to skip this).
+
Since a section is also an entry, it inherits all the properies of entries
too.
@@ -163,6 +167,7 @@ class Entry_section(Entry):
self._skip_at_start = None
self._end_4gb = False
self._ignore_missing = False
+self._filename = None
def ReadNode(self):
"""Read properties from the section node"""
@@ -183,6 +188,8 @@ class Entry_section(Entry):
self._skip_at_start = 0
self._name_prefix = fdt_util.GetString(self._node, 'name-prefix')
self.align_default = fdt_util.GetInt(self._node, 'align-default', 0)
+self._filename = fdt_util.GetString(self._node, 'filename',
+self._filename)
self.ReadEntries()
@@ -348,7 +355,8 @@ class Entry_section(Entry):
"""Get the contents of an entry
This builds the contents of the section, stores this as the contents of
-the section and returns it
+the section and returns it. If the section has a filename, the data is
+written there also.
Args:
required: True if the data must be present, False if it is OK to
@@ -363,6 +371,8 @@ class Entry_section(Entry):
if data is None:
return None
self.SetContents(data)
+if self._filename:
+tools.write_file(tools.get_output_filename(self._filename), data)
return data
def GetOffsets(self):
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 62ee86b9b75..c3cb32dca26 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -6077,5 +6077,19 @@ fdt fdtmapExtract the devicetree
blob from the fdtmap
'Cannot write symbols to an ELF file without Python elftools',
str(exc.exception))
+def testSectionFilename(self):
+"""Check writing of section contents to a file"""
+data = self._DoReadFile('261_section_fname.dts')
+expected = (b'&&' + U_BOOT_DATA + b'&&&' +
+tools.get_bytes(ord('!'), 7) +
+U_BOOT_DATA + tools.get_bytes(ord('&'), 12))
+self.assertEqual(expected, data)
+
+sect_fname = tools.get_output_filename('outfile.bin')
+self.assertTrue(os.path.exists(sect_fname))
+sect_data = tools.read_file(sect_fname)
+self.assertEqual(U_BOOT_DATA, sect_data)
+
+
if __name__ == "__main__":
unittest.main()
diff --git a/tools/binman/image.py b/tools/binman/image.py
index 6d4bff58436..b84dd21e22a 100644
--- a/tools/binman/image.py
+++ b/tools/binman/image.py
@@ -94,9 +94,6 @@ class Image(section.Entry_section):
def ReadNode(self):
super().ReadNode()
-filename = fdt_util.GetString(self._node, 'filename')
-if filename:
-self._filename = filename
self.allow_repack = fdt_util.GetBool(self._node, 'allow-repack')
self._symlink =
Re: [PATCH] dts: Re-add aliases for imx6qdl-sabrelite devices
On Monday, December 5, 2022 12:33:48 P.M. EST Fabio Estevam wrote:
> On Mon, Dec 5, 2022 at 12:37 PM Tom Rini wrote:
> > I'm not really happy with this approach. It's not that upstream doesn't
> > have aliases now, it's that it has different aliases, right? That's why
> > they won't accept these?
>
> imx6q.dtsi does have the default mmc aliases:
>
> mmc0 =
> mmc1 =
> mmc2 =
> mmc3 =
>
> Upstream does not want to change mmc alias because users may rely on
> this mmc aliases.
>
> Changing it now may cause the board not to boot anymore as the rootfs
> cannot be found.
>
> It is OK to change mmc alias for a newly introduced board, but please
> keep in mind that
> wandboard and sabrelite have been launched many many years ago.
>
> So for upstream Linux the message was clear: don't change the mmc
> alias for these boards.
>
> Now let's talk about U-Boot.
>
> Prior to d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with
> linux") the mmc alias for sabrelite was present:
>
>mmc0 =
>mmc1 =
>
> After this commit, the mmc alias is gone and causes the boot
> regression as reported by Detlev.
>
> We don't want to cause regressions in U-Boot as well, so that's why I
> propose just adding the alias into u-boot.dtsi.
>
> There are many boards that does the same.
>
> > But this also highlights that we really need to get these kind of
> > aliases and similar (a) re-synced with upstream ASAP and (b) do that at
>
> imx6 dts files are already synced with Linux.
>
> > the start. I don't know which group of "users are broken by this change"
> > is bigger, the group that needs the aliases we have or the group that
> > needs the other aliases, but the group that gets changes upstream first
> > "wins" here is how the OSS world works.
>
> I prefer to not break things for anyone, hence my proposal.
>
> If you are still not happy with it, please feel free to submit a patch
> with your proposal.
There is no SPL enabled for the imx.6 Sabrelite, Isn't that needed to use the
*-u-boot.dtsi files ?
It is not clear to me how those are loaded.
Detlev.
Re: [PATCH v2 1/4] ARM: stm32: Fix ECDSA authentication with Dcache enabled
On 12/7/22 11:08, Patrick DELAUNAY wrote:
Hi Marek,
Hello Patrick,
Sorry for the delay.
No worries.
I cross-check with ROM code team to understood this API limitation.
Thank you!
On 12/6/22 23:49, Marek Vasut wrote:
In case Dcache is enabled while the ECDSA authentication function is
called via BootROM ROM API, the CRYP DMA might pick stale version of
data from DRAM. Disable Dcache around the BootROM call to avoid this
issue.
Signed-off-by: Marek Vasut
---
Cc: Alexandru Gagniuc
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
V2: - Initialize reenable_dcache variable
---
arch/arm/mach-stm32mp/ecdsa_romapi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/mach-stm32mp/ecdsa_romapi.c
b/arch/arm/mach-stm32mp/ecdsa_romapi.c
index a2f63ff879f..082178ce83f 100644
--- a/arch/arm/mach-stm32mp/ecdsa_romapi.c
+++ b/arch/arm/mach-stm32mp/ecdsa_romapi.c
@@ -63,6 +63,7 @@ static int romapi_ecdsa_verify(struct udevice *dev,
const void *hash, size_t hash_len,
const void *signature, size_t sig_len)
{
+ bool reenable_dcache = false;
struct ecdsa_rom_api rom;
uint8_t raw_key[64];
uint32_t rom_ret;
@@ -81,8 +82,21 @@ static int romapi_ecdsa_verify(struct udevice *dev,
memcpy(raw_key + 32, pubkey->y, 32);
stm32mp_rom_get_ecdsa_functions();
+
+ /*
+ * Disable D-cache before calling into BootROM, else CRYP DMA
+ * may fail to pick up the correct data.
+ */
+ if (dcache_status()) {
+ dcache_disable();
+ reenable_dcache = true;
+ }
+
rom_ret = rom.ecdsa_verify_signature(hash, raw_key, signature,
algo);
+ if (reenable_dcache)
+ dcache_enable();
+
return rom_ret == ROM_API_SUCCESS ? 0 : -EPERM;
}
In fact, the ecdsa_verify_signature() don't use the HW (no DMA and no
use of CRYP IP )
Hmmm, what does the BootROM use CRYP for then ?
It is necessary to have MP15xC/F for the authenticated boot to work, but
it seems the only difference there is the presence of CRYP. Or is there
some BootROM fuse too ?
It is only a SW library, integrated in ROM code and exported to avoid
the need
to include the same library in FSBL = TF-A, with size limitation (SYSRAM).
This library don't need to deactivate the data cache, the only impact of
this deactivation it
is to reduce the execution performance
After cross-check, I think the only problem today it the U-Boot MMU
configuration of STM32MP15x
plaform: by default only the DDR is marked executable in U-Boot, all the
other region are
defined as DEVICE memory/not executable (DCACHE_OFF in mmu_setup).
Deactivate the data cache only avoids the exception which occurs on jump
to NotExecutable region
because in U-Boot "dcache OFF" imply "MMU off" (see cache_enable in
./arch/arm/lib/cache-cp15.c)
and with MMU deactivated the check on executable MMU tag is also
deactivated.
I think the next patch is enough:
#define STM32MP_ROM_BASE U(0x)
static int romapi_ecdsa_verify(struct udevice *dev,
const void *hash, size_t hash_len,
const void *signature, size_t sig_len)
{
struct ecdsa_rom_api rom;
uint8_t raw_key[64];
uint32_t rom_ret;
@@ -81,8 +82,21 @@ static int romapi_ecdsa_verify(struct udevice *dev,
memcpy(raw_key + 32, pubkey->y, 32);
stm32mp_rom_get_ecdsa_functions();
+
+ /* mark executable the exported ROM code function: */
+ mmu_set_region_dcache_behaviour(STM32MP_ROM_BASE, MMU_SECTION_SIZE,
DCACHE_DEFAULT_OPTION);
+
rom_ret = rom.ecdsa_verify_signature(hash, raw_key, signature, algo);
return rom_ret == ROM_API_SUCCESS ? 0 : -EPERM;
}
This indeed works, tested and sent V3.
Sorry again for the first review, not complete...
Thank you for checking !
[PATCH v3 4/4] ARM: stm32: Make ECDSA authentication available to U-Boot
With U-Boot having access to ROM API call table, it is possible to use the ROM API call it authenticate e.g. signed kernel fitImages using the BootROM ECDSA support. Make this available by pulling the ECDSA BootROM call support from SPL-only guard. Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay Signed-off-by: Marek Vasut --- Cc: Alexandru Gagniuc Cc: Patrice Chotard Cc: Patrick Delaunay --- V2: Add RB from Patrice and Patrick V3: No change --- arch/arm/mach-stm32mp/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 1db9057e049..a19b2797c8b 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -11,10 +11,10 @@ obj-y += bsec.o obj-$(CONFIG_STM32MP13x) += stm32mp13x.o obj-$(CONFIG_STM32MP15x) += stm32mp15x.o +obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o ifdef CONFIG_SPL_BUILD obj-y += spl.o obj-y += tzc400.o -obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o else obj-y += cmd_stm32prog/ obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o -- 2.35.1
[PATCH v3 3/4] ARM: stm32: Pass ROM API table pointer to U-Boot proper
The ROM API table pointer is no longer accessible from U-Boot, fix
this by passing the ROM API pointer through. This makes it possible
for U-Boot to call ROM API functions to authenticate payload like
signed fitImages.
Signed-off-by: Marek Vasut
---
Cc: Alexandru Gagniuc
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
V2: - Rename image_entry_noargs_t to image_entry_stm32_t
- Add missing __noreturn
V3: No change
---
arch/arm/mach-stm32mp/cpu.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index ee59866bb73..dc4112d5e6c 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
/*
* early TLB into the .data section so that it not get cleared
@@ -413,3 +414,17 @@ uintptr_t get_stm32mp_bl2_dtb(void)
{
return nt_fw_dtb;
}
+
+#ifdef CONFIG_SPL_BUILD
+void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
+{
+ typedef void __noreturn (*image_entry_stm32_t)(u32 romapi);
+ uintptr_t romapi = get_stm32mp_rom_api_table();
+
+ image_entry_stm32_t image_entry =
+ (image_entry_stm32_t)spl_image->entry_point;
+
+ printf("image entry point: 0x%lx\n", spl_image->entry_point);
+ image_entry(romapi);
+}
+#endif
--
2.35.1
[PATCH v3 2/4] ARM: stm32: Factor out save_boot_params
The STM32MP15xx platform currently comes with two incompatible
implementations of save_boot_params() weak function override.
Factor the save_boot_params() implementation into common cpu.c
code and provide accessors to read out both ROM API table address
and DT address from any place in the code instead.
Signed-off-by: Marek Vasut
---
Cc: Alexandru Gagniuc
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
V2: Avoid #if CONFIG... , use if (CONFIG... instead
V3: No change
---
arch/arm/mach-stm32mp/boot_params.c | 20 ++-
arch/arm/mach-stm32mp/cpu.c | 35 +++
arch/arm/mach-stm32mp/ecdsa_romapi.c | 20 ++-
.../arm/mach-stm32mp/include/mach/sys_proto.h | 3 ++
4 files changed, 42 insertions(+), 36 deletions(-)
diff --git a/arch/arm/mach-stm32mp/boot_params.c
b/arch/arm/mach-stm32mp/boot_params.c
index e91ef1b2fc7..e40cca938ef 100644
--- a/arch/arm/mach-stm32mp/boot_params.c
+++ b/arch/arm/mach-stm32mp/boot_params.c
@@ -11,30 +11,14 @@
#include
#include
-/*
- * Force data-section, as .bss will not be valid
- * when save_boot_params is invoked.
- */
-static unsigned long nt_fw_dtb __section(".data");
-
-/*
- * Save the FDT address provided by TF-A in r2 at boot time
- * This function is called from start.S
- */
-void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
- unsigned long r3)
-{
- nt_fw_dtb = r2;
-
- save_boot_params_ret();
-}
-
/*
* Use the saved FDT address provided by TF-A at boot time (NT_FW_CONFIG =
* Non Trusted Firmware configuration file) when the pointer is valid
*/
void *board_fdt_blob_setup(int *err)
{
+ unsigned long nt_fw_dtb = get_stm32mp_bl2_dtb();
+
log_debug("%s: nt_fw_dtb=%lx\n", __func__, nt_fw_dtb);
*err = 0;
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 855fc755fe0..ee59866bb73 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -378,3 +378,38 @@ int arch_misc_init(void)
return 0;
}
+
+/*
+ * Without forcing the ".data" section, this would get saved in ".bss". BSS
+ * will be cleared soon after, so it's not suitable.
+ */
+static uintptr_t rom_api_table __section(".data");
+static uintptr_t nt_fw_dtb __section(".data");
+
+/*
+ * The ROM gives us the API location in r0 when starting. This is only
available
+ * during SPL, as there isn't (yet) a mechanism to pass this on to u-boot. Save
+ * the FDT address provided by TF-A in r2 at boot time. This function is called
+ * from start.S
+ */
+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
+ unsigned long r3)
+{
+ if (IS_ENABLED(CONFIG_STM32_ECDSA_VERIFY))
+ rom_api_table = r0;
+
+ if (IS_ENABLED(CONFIG_TFABOOT))
+ nt_fw_dtb = r2;
+
+ save_boot_params_ret();
+}
+
+uintptr_t get_stm32mp_rom_api_table(void)
+{
+ return rom_api_table;
+}
+
+uintptr_t get_stm32mp_bl2_dtb(void)
+{
+ return nt_fw_dtb;
+}
diff --git a/arch/arm/mach-stm32mp/ecdsa_romapi.c
b/arch/arm/mach-stm32mp/ecdsa_romapi.c
index 6156526253c..12b42b9d59c 100644
--- a/arch/arm/mach-stm32mp/ecdsa_romapi.c
+++ b/arch/arm/mach-stm32mp/ecdsa_romapi.c
@@ -24,26 +24,10 @@ struct ecdsa_rom_api {
uint32_t ecc_algo);
};
-/*
- * Without forcing the ".data" section, this would get saved in ".bss". BSS
- * will be cleared soon after, so it's not suitable.
- */
-static uintptr_t rom_api_loc __section(".data");
-
-/*
- * The ROM gives us the API location in r0 when starting. This is only
available
- * during SPL, as there isn't (yet) a mechanism to pass this on to u-boot.
- */
-void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
- unsigned long r3)
-{
- rom_api_loc = r0;
- save_boot_params_ret();
-}
-
static void stm32mp_rom_get_ecdsa_functions(struct ecdsa_rom_api *rom)
{
- uintptr_t verify_ptr = rom_api_loc + ROM_API_OFFSET_ECDSA_VERIFY;
+ uintptr_t verify_ptr = get_stm32mp_rom_api_table() +
+ ROM_API_OFFSET_ECDSA_VERIFY;
rom->ecdsa_verify_signature = *(void **)verify_ptr;
}
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index f19a70e53e0..0d39b67178e 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -77,3 +77,6 @@ void stm32mp_misc_init(void);
/* helper function: read data from OTP */
u32 get_otp(int index, int shift, int mask);
+
+uintptr_t get_stm32mp_rom_api_table(void);
+uintptr_t get_stm32mp_bl2_dtb(void);
--
2.35.1
[PATCH v3 1/4] ARM: stm32: Fix ECDSA authentication with Dcache enabled
In case Dcache is enabled while the ECDSA authentication function is called via BootROM ROM API, the MMU tables are set up and the BootROM region is not marked as executable, so an attempt to run code from it results in a hang. Mark the BootROM region as executable as suggested by Patrick to prevent the hang. Signed-off-by: Marek Vasut --- Cc: Alexandru Gagniuc Cc: Patrice Chotard Cc: Patrick Delaunay --- V2: - Initialize reenable_dcache variable V3: - Mark BootROM as executable instead --- arch/arm/mach-stm32mp/ecdsa_romapi.c | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-stm32mp/ecdsa_romapi.c b/arch/arm/mach-stm32mp/ecdsa_romapi.c index a2f63ff879f..6156526253c 100644 --- a/arch/arm/mach-stm32mp/ecdsa_romapi.c +++ b/arch/arm/mach-stm32mp/ecdsa_romapi.c @@ -81,6 +81,10 @@ static int romapi_ecdsa_verify(struct udevice *dev, memcpy(raw_key + 32, pubkey->y, 32); stm32mp_rom_get_ecdsa_functions(); + + /* Mark BootROM region as executable. */ + mmu_set_region_dcache_behaviour(0, SZ_2M, DCACHE_DEFAULT_OPTION); + rom_ret = rom.ecdsa_verify_signature(hash, raw_key, signature, algo); return rom_ret == ROM_API_SUCCESS ? 0 : -EPERM; -- 2.35.1
Re: [PATCH] rtc: add ht1380 driver
On Wed, 7 Dec 2022 at 04:08, Simon Glass wrote:
>
> Hi Sergei,
>
> On Tue, 6 Dec 2022 at 23:07, Sergei Antonov wrote:
> >
> > Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds
> > , minutes, hours, day of the week, date, month and year information.
> >
> > Datasheet:
> > https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf
> >
> > Signed-off-by: Sergei Antonov
> > ---
> >
> > v2:
> > * The RESET pin is now to be described as ACTIVE_LOW in dts.
> >
> > Changes suggested by Simon Glass:
> > * a more detailed driver description in Kconfig
> > * multi-line comments' style
> > * enum for 0x80 and the 0x20 at top of file
> > * lower-case hex constants
> > * function comments for ht1380_reset_on/off
> > * blank line before returns
> >
> > PROTECT remains in a function scope for the sake of locality of definitions.
> >
> > drivers/rtc/Kconfig | 8 +
> > drivers/rtc/Makefile | 1 +
> > drivers/rtc/ht1380.c | 337 +++
> > 3 files changed, 346 insertions(+)
> > create mode 100644 drivers/rtc/ht1380.c
> >
> > diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> > index 23963271928a..eed48e35a578 100644
> > --- a/drivers/rtc/Kconfig
> > +++ b/drivers/rtc/Kconfig
> > @@ -220,4 +220,12 @@ config RTC_ZYNQMP
> > Say "yes" here to support the on chip real time clock
> > present on Xilinx ZynqMP SoC.
> >
> > +config RTC_HT1380
> > + bool "Enable Holtek HT1380/HT1381 RTC driver"
> > + depends on DM_RTC && DM_GPIO
> > + help
> > + Say "yes" here to get support for Holtek HT1380/HT1381
> > + Serial Timekeeper IC which provides seconds, minutes, hours,
> > + day of the week, date, month and year information.
>
> Perhaps mention how it is connected, i.e. three GPIOs.
>
> > +
> > endmenu
> > diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> > index 009dd9d28c95..f3164782b605 100644
> > --- a/drivers/rtc/Makefile
> > +++ b/drivers/rtc/Makefile
> > @@ -24,6 +24,7 @@ obj-$(CONFIG_RTC_DS3231) += ds3231.o
> > obj-$(CONFIG_RTC_DS3232) += ds3232.o
> > obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o
> > obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
> > +obj-$(CONFIG_RTC_HT1380) += ht1380.o
> > obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o
> > obj-$(CONFIG_RTC_IMXDI) += imxdi.o
> > obj-$(CONFIG_RTC_ISL1208) += isl1208.o
> > diff --git a/drivers/rtc/ht1380.c b/drivers/rtc/ht1380.c
> > new file mode 100644
> > index ..25335227d893
> > --- /dev/null
> > +++ b/drivers/rtc/ht1380.c
> > @@ -0,0 +1,337 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Holtek HT1380/HT1381 Serial Timekeeper Chip
> > + *
> > + * Communication with the chip is vendor-specific.
> > + * It is done via 3 GPIO pins: reset, clock, and data.
> > + * Describe in .dts this way:
> > + *
> > + * rtc {
> > + * compatible = "holtek,ht1380";
> > + * rst-gpio = < 19 GPIO_ACTIVE_LOW>;
> > + * clk-gpio = < 20 GPIO_ACTIVE_HIGH>;
> > + * dat-gpio = < 21 GPIO_ACTIVE_HIGH>;
> > + * };
>
> Is there a binding file for this?
Not in the U-Boot repo yet. I am going to submit a .dts file binding
to this driver. But I need to submit 2 more device drivers first. I
guess, submitting .dts should be the final step.
> I believe the standard name should be rst-gpios (i.e. plural)?
I grepped files in arch/arm/dts and it was not clear. There were more
plural names however. So I can change it to plural in v3.
> > + *
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +struct ht1380_priv {
> > + struct gpio_desc rst_desc;
> > + struct gpio_desc clk_desc;
> > + struct gpio_desc dat_desc;
> > +};
> > +
> > +enum registers {
> > + SEC,
> > + MIN,
> > + HOUR,
> > + MDAY,
> > + MONTH,
> > + WDAY,
> > + YEAR,
> > + WP,
> > + N_REGS
> > +};
> > +
> > +enum hour_mode {
> > + AMPM_MODE = 0x80, /* RTC is in AM/PM mode */
> > + PM_NOW = 0x20,/* set if PM, clear if AM */
> > +};
> > +
> > +static const int BURST = 0xbe;
> > +static const int READ = 1;
> > +
> > +static void ht1380_half_period_delay(void)
> > +{
> > + /*
> > +* Delay for half a period. 1 us complies with the 500 KHz maximum
> > +* input serial clock limit given by the datasheet.
> > +*/
> > + udelay(1);
> > +}
> > +
> > +static int ht1380_send_byte(struct ht1380_priv *priv, int byte)
> > +{
> > + int ret;
> > +
> > + for (int bit = 0; bit < 8; bit++) {
> > + ret = dm_gpio_set_value(>dat_desc, byte >> bit & 1);
> > + if (ret)
> > + break;
> > + ht1380_half_period_delay();
> > +
> > + ret = dm_gpio_set_value(>clk_desc, 1);
> > + if (ret)
> > + break;
> > + ht1380_half_period_delay();
> > +
> > + ret =
RE: [PATCH 0/7] updates for km board series
> On Wed, Dec 07, 2022 at 02:27:37PM +, Holger Brunck wrote: > > > > - migrate all boards to environment.txt files > > > > - migrate PPC boards to DM_I2C > > > > - some cleanup > > > > > > > > Holger Brunck (7): > > > > board/km: move ls102xa boards to environment text files > > > > km/powerpc: migrate to env.txt file > > > > board/km/cent2: migrate to environment text file > > > > board/km/secu: migrate to use environment text files > > > > board/km: remove obsolete ARCH_KIRKWOOD > > > > km/ppc: migrate all mpc83xx to DM_I2C > > > > km/mpc8360: remove unused CONFIG_SYS_PAXE defines > > > > > > Thanks for doing this. As this is the first in my mind big > > > environment conversion, do you have any further feedback on the > > > mechanism, things that would make this easier / more useful, etc? > > > > > > > it was quite straight forward and especially for board series which > > use a hierarchical structure as we do it is easy to use and afterwards > > much easier to read and to maintain. > > > > I only struggled about the strings I had defined in Kconfig as > > discussed in another thread about double quoted strings. I removed them > from there in the end. > > > > What would maybe be helpful to have a small script which converts the > > generated include/generated/environment.h into a textfile which then > > looks like the environment in your u-boot if you dump it. Then you can > > quickly do a diff between a dump from your old and your textfile to > > see if your newly migrated environment is identical. > > Ah good. Perhaps > https://patchwork.ozlabs.org/project/uboot/patch/20221128084122.3456680 > -2-max.oss...@gmail.com/ > and some documentation / guide around that would help then? > yes this would have been helpful for me. Best regards Holger
Re: [PATCH 3/3] ARM: stm32: Increment WDT by default on DHSOM
On 12/6/22 08:38, Patrice CHOTARD wrote: > Hi Marek > > On 12/6/22 03:35, Marek Vasut wrote: >> Enable watchdog timer on the DHSOM by default, both in U-Boot proper and >> in SPL. This can be used in combination with boot counter by either SPL >> or U-Boot proper to boot either copy of system software, e.g. in case of >> full A/B update strategy. >> >> Signed-off-by: Marek Vasut >> --- >> Cc: Patrice Chotard >> Cc: Patrick Delaunay >> --- >> configs/stm32mp15_dhcom_basic_defconfig | 2 ++ >> configs/stm32mp15_dhcor_basic_defconfig | 2 ++ >> 2 files changed, 4 insertions(+) >> >> diff --git a/configs/stm32mp15_dhcom_basic_defconfig >> b/configs/stm32mp15_dhcom_basic_defconfig >> index f1eb022bc66..26c2e73aa04 100644 >> --- a/configs/stm32mp15_dhcom_basic_defconfig >> +++ b/configs/stm32mp15_dhcom_basic_defconfig >> @@ -175,6 +175,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 >> CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 >> CONFIG_USB_GADGET_DWC2_OTG=y >> CONFIG_USB_GADGET_DOWNLOAD=y >> +CONFIG_WDT=y >> +CONFIG_WDT_STM32MP=y >> CONFIG_FAT_WRITE=y >> # CONFIG_BINMAN_FDT is not set >> CONFIG_FDT_FIXUP_PARTITIONS=y >> diff --git a/configs/stm32mp15_dhcor_basic_defconfig >> b/configs/stm32mp15_dhcor_basic_defconfig >> index 2e9f2049784..f76e13eafd7 100644 >> --- a/configs/stm32mp15_dhcor_basic_defconfig >> +++ b/configs/stm32mp15_dhcor_basic_defconfig >> @@ -174,6 +174,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 >> CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 >> CONFIG_USB_GADGET_DWC2_OTG=y >> CONFIG_USB_GADGET_DOWNLOAD=y >> +CONFIG_WDT=y >> +CONFIG_WDT_STM32MP=y >> CONFIG_FAT_WRITE=y >> # CONFIG_BINMAN_FDT is not set >> CONFIG_FDT_FIXUP_PARTITIONS=y > > Reviewed-by: Patrice Chotard > Thanks > Patrice Applied to u-boot-stm/master Thanks Patrice
Re: [PATCH 2/3] ARM: stm32: Increment boot counter in SPL on DHSOM
On 12/6/22 08:39, Patrice CHOTARD wrote: > Hi > > On 12/6/22 03:35, Marek Vasut wrote: >> Increment the boot counter already in U-Boot SPL instead of incrementing >> it only later in U-Boot proper. This can be used by SPL to boot either of >> two U-Boot copies and improve redundancy of software on the platform, e.g. >> in case of full A/B update strategy. >> >> Signed-off-by: Marek Vasut >> --- >> Cc: Patrice Chotard >> Cc: Patrick Delaunay >> --- >> configs/stm32mp15_dhcom_basic_defconfig | 1 + >> configs/stm32mp15_dhcor_basic_defconfig | 1 + >> 2 files changed, 2 insertions(+) >> >> diff --git a/configs/stm32mp15_dhcom_basic_defconfig >> b/configs/stm32mp15_dhcom_basic_defconfig >> index 92ccbb70939..f1eb022bc66 100644 >> --- a/configs/stm32mp15_dhcom_basic_defconfig >> +++ b/configs/stm32mp15_dhcom_basic_defconfig >> @@ -36,6 +36,7 @@ CONFIG_CONSOLE_MUX=y >> CONFIG_BOARD_EARLY_INIT_F=y >> CONFIG_SPL_FOOTPRINT_LIMIT=y >> CONFIG_SPL_MAX_FOOTPRINT=0x3db00 >> +CONFIG_SPL_BOOTCOUNT_LIMIT=y >> CONFIG_SPL_LEGACY_IMAGE_FORMAT=y >> # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set >> CONFIG_SPL_STACK=0x3000 >> diff --git a/configs/stm32mp15_dhcor_basic_defconfig >> b/configs/stm32mp15_dhcor_basic_defconfig >> index 306221404df..2e9f2049784 100644 >> --- a/configs/stm32mp15_dhcor_basic_defconfig >> +++ b/configs/stm32mp15_dhcor_basic_defconfig >> @@ -34,6 +34,7 @@ CONFIG_CONSOLE_MUX=y >> CONFIG_BOARD_EARLY_INIT_F=y >> CONFIG_SPL_FOOTPRINT_LIMIT=y >> CONFIG_SPL_MAX_FOOTPRINT=0x3db00 >> +CONFIG_SPL_BOOTCOUNT_LIMIT=y >> CONFIG_SPL_LEGACY_IMAGE_FORMAT=y >> # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set >> CONFIG_SPL_STACK=0x3000 > > Reviewed-by: Patrice Chotard > Thanks > Patrice Applied to u-boot-stm/master Thanks Patrice
Re: [PATCH 1/3] ARM: stm32: Enable assorted ST specific commands on DHSOM
On 12/6/22 08:39, Patrice CHOTARD wrote: > Hi > > On 12/6/22 03:35, Marek Vasut wrote: >> Enable the stm32prog, stm32key, stboard commands on DHSOM. >> Those can be used e.g. to implement verified boot. >> >> Signed-off-by: Marek Vasut >> --- >> Cc: Patrice Chotard >> Cc: Patrick Delaunay >> --- >> configs/stm32mp15_dhcom_basic_defconfig | 4 >> configs/stm32mp15_dhcor_basic_defconfig | 4 >> 2 files changed, 8 insertions(+) >> >> diff --git a/configs/stm32mp15_dhcom_basic_defconfig >> b/configs/stm32mp15_dhcom_basic_defconfig >> index fd261d96105..92ccbb70939 100644 >> --- a/configs/stm32mp15_dhcom_basic_defconfig >> +++ b/configs/stm32mp15_dhcom_basic_defconfig >> @@ -11,7 +11,11 @@ CONFIG_SPL_MMC=y >> CONFIG_BOOTCOUNT_BOOTLIMIT=3 >> CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C >> CONFIG_SPL=y >> +CONFIG_CMD_STM32KEY=y >> +CONFIG_CMD_STBOARD=y >> CONFIG_TARGET_DH_STM32MP1_PDK2=y >> +CONFIG_CMD_STM32PROG=y >> +CONFIG_CMD_STM32PROG_OTP=y >> CONFIG_SPL_SPI_FLASH_SUPPORT=y >> CONFIG_SPL_SPI=y >> # CONFIG_ARMV7_VIRT is not set >> diff --git a/configs/stm32mp15_dhcor_basic_defconfig >> b/configs/stm32mp15_dhcor_basic_defconfig >> index 947bc6b502e..306221404df 100644 >> --- a/configs/stm32mp15_dhcor_basic_defconfig >> +++ b/configs/stm32mp15_dhcor_basic_defconfig >> @@ -11,7 +11,11 @@ CONFIG_SPL_MMC=y >> CONFIG_BOOTCOUNT_BOOTLIMIT=3 >> CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C >> CONFIG_SPL=y >> +CONFIG_CMD_STM32KEY=y >> +CONFIG_CMD_STBOARD=y >> CONFIG_TARGET_DH_STM32MP1_PDK2=y >> +CONFIG_CMD_STM32PROG=y >> +CONFIG_CMD_STM32PROG_OTP=y >> CONFIG_SPL_SPI_FLASH_SUPPORT=y >> CONFIG_SPL_SPI=y >> # CONFIG_ARMV7_VIRT is not set > > Reviewed-by: Patrice Chotard > Thanks > Patrice Applied to u-boot-stm/master Thanks Patrice
Re: [PATCH] ARM: stm32: Add version variable to DHSOM
On 11/2/22 09:26, Patrice CHOTARD wrote: > > > On 11/1/22 23:35, Marek Vasut wrote: >> Enable insertion of version variable into U-Boot environment on DHSOM, >> to make it possible to check U-Boot version e.g. in U-Boot scripts. >> >> Signed-off-by: Marek Vasut >> --- >> Cc: Patrice Chotard >> Cc: Patrick Delaunay >> --- >> configs/stm32mp15_dhcom_basic_defconfig | 1 + >> configs/stm32mp15_dhcor_basic_defconfig | 1 + >> 2 files changed, 2 insertions(+) >> >> diff --git a/configs/stm32mp15_dhcom_basic_defconfig >> b/configs/stm32mp15_dhcom_basic_defconfig >> index c8093c4e152..fd261d96105 100644 >> --- a/configs/stm32mp15_dhcom_basic_defconfig >> +++ b/configs/stm32mp15_dhcom_basic_defconfig >> @@ -97,6 +97,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y >> CONFIG_SYS_REDUNDAND_ENVIRONMENT=y >> CONFIG_SYS_RELOC_GD_ENV_ADDR=y >> CONFIG_SPL_ENV_IS_NOWHERE=y >> +CONFIG_VERSION_VARIABLE=y >> CONFIG_NET_RANDOM_ETHADDR=y >> CONFIG_IP_DEFRAG=y >> CONFIG_TFTP_TSIZE=y >> diff --git a/configs/stm32mp15_dhcor_basic_defconfig >> b/configs/stm32mp15_dhcor_basic_defconfig >> index 7b2b92e15e3..947bc6b502e 100644 >> --- a/configs/stm32mp15_dhcor_basic_defconfig >> +++ b/configs/stm32mp15_dhcor_basic_defconfig >> @@ -94,6 +94,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y >> CONFIG_SYS_REDUNDAND_ENVIRONMENT=y >> CONFIG_SYS_RELOC_GD_ENV_ADDR=y >> CONFIG_SPL_ENV_IS_NOWHERE=y >> +CONFIG_VERSION_VARIABLE=y >> CONFIG_NET_RANDOM_ETHADDR=y >> CONFIG_IP_DEFRAG=y >> CONFIG_TFTP_TSIZE=y > > Reviewed-by: Patrice Chotard > > Thanks > Patrice Applied to u-boot-stm/master Thanks Patrice
Re: [PATCH] ARM: stm32: Add boot counter to DHSOM
On 10/28/22 09:05, Patrice CHOTARD wrote: > > On 10/27/22 23:17, Marek Vasut wrote: >> Add boot counter to STM32MP15xx DHSOM. This aligns the software with >> other upstream DHSOM products which already do enable boot counter. >> >> The boot counter on STM32MP15xx is placed in the TAMP block TAMP_BKPxR >> register 19, right past register 17 and 18 used for CM4 resource table >> and state by the Linux kernel. The TAMP_BKPxR register block is used >> because its contents survives warm reset, but not cold reset. >> >> Signed-off-by: Marek Vasut >> Cc: Patrice Chotard >> Cc: Patrick Delaunay >> --- >> configs/stm32mp15_dhcom_basic_defconfig | 5 + >> configs/stm32mp15_dhcor_basic_defconfig | 5 + >> 2 files changed, 10 insertions(+) >> >> diff --git a/configs/stm32mp15_dhcom_basic_defconfig >> b/configs/stm32mp15_dhcom_basic_defconfig >> index 3ba396b9671..c8093c4e152 100644 >> --- a/configs/stm32mp15_dhcom_basic_defconfig >> +++ b/configs/stm32mp15_dhcom_basic_defconfig >> @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2" >> CONFIG_SPL_TEXT_BASE=0x2FFC2500 >> CONFIG_SYS_PROMPT="STM32MP> " >> CONFIG_SPL_MMC=y >> +CONFIG_BOOTCOUNT_BOOTLIMIT=3 >> +CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C >> CONFIG_SPL=y >> CONFIG_TARGET_DH_STM32MP1_PDK2=y >> CONFIG_SPL_SPI_FLASH_SUPPORT=y >> @@ -74,6 +76,7 @@ CONFIG_CMD_SPI=y >> CONFIG_CMD_USB=y >> CONFIG_CMD_USB_MASS_STORAGE=y >> CONFIG_SYS_DISABLE_AUTOLOAD=y >> +CONFIG_CMD_BOOTCOUNT=y >> CONFIG_CMD_CACHE=y >> CONFIG_CMD_TIME=y >> CONFIG_CMD_TIMER=y >> @@ -99,6 +102,8 @@ CONFIG_IP_DEFRAG=y >> CONFIG_TFTP_TSIZE=y >> CONFIG_STM32_ADC=y >> CONFIG_SPL_BLOCK_CACHE=y >> +CONFIG_BOOTCOUNT_LIMIT=y >> +CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4 >> CONFIG_DFU_MMC=y >> CONFIG_DFU_MTD=y >> CONFIG_DFU_RAM=y >> diff --git a/configs/stm32mp15_dhcor_basic_defconfig >> b/configs/stm32mp15_dhcor_basic_defconfig >> index ddd96ac4d29..7b2b92e15e3 100644 >> --- a/configs/stm32mp15_dhcor_basic_defconfig >> +++ b/configs/stm32mp15_dhcor_basic_defconfig >> @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96" >> CONFIG_SPL_TEXT_BASE=0x2FFC2500 >> CONFIG_SYS_PROMPT="STM32MP> " >> CONFIG_SPL_MMC=y >> +CONFIG_BOOTCOUNT_BOOTLIMIT=3 >> +CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C >> CONFIG_SPL=y >> CONFIG_TARGET_DH_STM32MP1_PDK2=y >> CONFIG_SPL_SPI_FLASH_SUPPORT=y >> @@ -72,6 +74,7 @@ CONFIG_CMD_SPI=y >> CONFIG_CMD_USB=y >> CONFIG_CMD_USB_MASS_STORAGE=y >> CONFIG_SYS_DISABLE_AUTOLOAD=y >> +CONFIG_CMD_BOOTCOUNT=y >> CONFIG_CMD_CACHE=y >> CONFIG_CMD_TIME=y >> CONFIG_CMD_TIMER=y >> @@ -96,6 +99,8 @@ CONFIG_IP_DEFRAG=y >> CONFIG_TFTP_TSIZE=y >> CONFIG_STM32_ADC=y >> CONFIG_SPL_BLOCK_CACHE=y >> +CONFIG_BOOTCOUNT_LIMIT=y >> +CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4 >> CONFIG_DFU_MMC=y >> CONFIG_DFU_MTD=y >> CONFIG_DFU_RAM=y > > > Reviewed-by: Patrice Chotard > > Thanks > Patrice Applied to u-boot-stm/master Thanks Patrice
Re: [Uboot-stm32] [PATCH 2/2] ARM: dts: stm32: Drop MMCI interrupt-names
On 11/3/22 08:46, Patrice CHOTARD wrote: > > > On 11/2/22 14:53, Yann Gautier wrote: >> From: Marek Vasut >> >> The pl18x MMCI driver does not use the interrupt-names property, >> the binding document has been updated to recommend this property >> be unused, remove it. >> Backport of Marek's Linux patch: >> https://lore.kernel.org/linux-arm-kernel/20221013221242.218808-3-ma...@denx.de/ >> >> Reviewed-by: Linus Walleij >> Reviewed-by: Yann Gautier >> Signed-off-by: Marek Vasut >> Signed-off-by: Alexandre Torgue >> Signed-off-by: Yann Gautier >> --- >> >> arch/arm/dts/stm32h743.dtsi | 2 -- >> arch/arm/dts/stm32mp131.dtsi | 2 -- >> arch/arm/dts/stm32mp151.dtsi | 3 --- >> 3 files changed, 7 deletions(-) >> >> diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi >> index ceb629c4fa..c490d0a571 100644 >> --- a/arch/arm/dts/stm32h743.dtsi >> +++ b/arch/arm/dts/stm32h743.dtsi >> @@ -339,7 +339,6 @@ >> arm,primecell-periphid = <0x10153180>; >> reg = <0x52007000 0x1000>; >> interrupts = <49>; >> -interrupt-names = "cmd_irq"; >> clocks = < SDMMC1_CK>; >> clock-names = "apb_pclk"; >> resets = < STM32H7_AHB3_RESET(SDMMC1)>; >> @@ -353,7 +352,6 @@ >> arm,primecell-periphid = <0x10153180>; >> reg = <0x48022400 0x400>; >> interrupts = <124>; >> -interrupt-names = "cmd_irq"; >> clocks = < SDMMC2_CK>; >> clock-names = "apb_pclk"; >> resets = < STM32H7_AHB2_RESET(SDMMC2)>; >> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi >> index a1c6d0d00b..661d329b45 100644 >> --- a/arch/arm/dts/stm32mp131.dtsi >> +++ b/arch/arm/dts/stm32mp131.dtsi >> @@ -231,7 +231,6 @@ >> arm,primecell-periphid = <0x20253180>; >> reg = <0x58005000 0x1000>, <0x58006000 0x1000>; >> interrupts = ; >> -interrupt-names = "cmd_irq"; >> clocks = <_pll4_p>; >> clock-names = "apb_pclk"; >> cap-sd-highspeed; >> @@ -245,7 +244,6 @@ >> arm,primecell-periphid = <0x20253180>; >> reg = <0x58007000 0x1000>, <0x58008000 0x1000>; >> interrupts = ; >> -interrupt-names = "cmd_irq"; >> clocks = <_pll4_p>; >> clock-names = "apb_pclk"; >> cap-sd-highspeed; >> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi >> index f0fb022fc6..8bbb1aef2e 100644 >> --- a/arch/arm/dts/stm32mp151.dtsi >> +++ b/arch/arm/dts/stm32mp151.dtsi >> @@ -1102,7 +1102,6 @@ >> arm,primecell-periphid = <0x00253180>; >> reg = <0x48004000 0x400>; >> interrupts = ; >> -interrupt-names = "cmd_irq"; >> clocks = < SDMMC3_K>; >> clock-names = "apb_pclk"; >> resets = < SDMMC3_R>; >> @@ -1435,7 +1434,6 @@ >> arm,primecell-periphid = <0x00253180>; >> reg = <0x58005000 0x1000>; >> interrupts = ; >> -interrupt-names = "cmd_irq"; >> clocks = < SDMMC1_K>; >> clock-names = "apb_pclk"; >> resets = < SDMMC1_R>; >> @@ -1450,7 +1448,6 @@ >> arm,primecell-periphid = <0x00253180>; >> reg = <0x58007000 0x1000>; >> interrupts = ; >> -interrupt-names = "cmd_irq"; >> clocks = < SDMMC2_K>; >> clock-names = "apb_pclk"; >> resets = < SDMMC2_R>; > > Reviewed-by: Patrice Chotard > > Thanks > Patrice > ___ > Uboot-stm32 mailing list > uboot-st...@st-md-mailman.stormreply.com > https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32 Applied to u-boot-stm/master Thanks Patrice
Re: [Uboot-stm32] [PATCH 1/2] ARM: dts: stm32: add sdmmc cd-gpios for STM32MP135F-DK
On 11/3/22 08:45, Patrice CHOTARD wrote: > > > On 11/2/22 14:53, Yann Gautier wrote: >> On STM32MP135F-DK, the SD card detect GPIO is GPIOH4. >> Backport of the Linux patch: >> https://lore.kernel.org/linux-arm-kernel/20220921160334.3227138-1-yann.gaut...@foss.st.com/ >> >> Signed-off-by: Yann Gautier >> Signed-off-by: Alexandre Torgue >> --- >> >> arch/arm/dts/stm32mp135f-dk.dts | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/dts/stm32mp135f-dk.dts >> b/arch/arm/dts/stm32mp135f-dk.dts >> index e6b8ffd332..52f86596ce 100644 >> --- a/arch/arm/dts/stm32mp135f-dk.dts >> +++ b/arch/arm/dts/stm32mp135f-dk.dts >> @@ -82,7 +82,7 @@ >> pinctrl-0 = <_b4_pins_a _clk_pins_a>; >> pinctrl-1 = <_b4_od_pins_a _clk_pins_a>; >> pinctrl-2 = <_b4_sleep_pins_a>; >> -broken-cd; >> +cd-gpios = < 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; >> disable-wp; >> st,neg-edge; >> bus-width = <4>; > Reviewed-by: Patrice Chotard > > Thanks > Patrice > ___ > Uboot-stm32 mailing list > uboot-st...@st-md-mailman.stormreply.com > https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32 Applied to u-boot-stm/master Thanks Patrice
Re: [PATCH 0/7] updates for km board series
On Wed, Dec 07, 2022 at 02:27:37PM +, Holger Brunck wrote: > > > - migrate all boards to environment.txt files > > > - migrate PPC boards to DM_I2C > > > - some cleanup > > > > > > Holger Brunck (7): > > > board/km: move ls102xa boards to environment text files > > > km/powerpc: migrate to env.txt file > > > board/km/cent2: migrate to environment text file > > > board/km/secu: migrate to use environment text files > > > board/km: remove obsolete ARCH_KIRKWOOD > > > km/ppc: migrate all mpc83xx to DM_I2C > > > km/mpc8360: remove unused CONFIG_SYS_PAXE defines > > > > Thanks for doing this. As this is the first in my mind big environment > > conversion, > > do you have any further feedback on the mechanism, things that would make > > this easier / more useful, etc? > > > > it was quite straight forward and especially for board series which use a > hierarchical structure as we do it is easy to use and afterwards much easier > to > read and to maintain. > > I only struggled about the strings I had defined in Kconfig as discussed in > another > thread about double quoted strings. I removed them from there in the end. > > What would maybe be helpful to have a small script which converts the > generated include/generated/environment.h into a textfile which then looks > like the environment in your u-boot if you dump it. Then you can quickly do > a diff between a dump from your old and your textfile to see if your > newly migrated environment is identical. Ah good. Perhaps https://patchwork.ozlabs.org/project/uboot/patch/20221128084122.3456680-2-max.oss...@gmail.com/ and some documentation / guide around that would help then? -- Tom signature.asc Description: PGP signature
Re: [Uboot-stm32] [PATCH 2/2] adc: stm32mp15: add support of generic channels binding
On 12/7/22 16:57, Patrice CHOTARD wrote:
>
>
> On 11/23/22 16:20, Olivier Moysan wrote:
>> Add support of generic IIO channels binding:
>> ./devicetree/bindings/iio/adc/adc.yaml
>> Keep support of st,adc-channels for backward compatibility.
>>
>> Signed-off-by: Olivier Moysan
>> ---
>>
>> drivers/adc/stm32-adc.c | 51 -
>> 1 file changed, 45 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
>> index 1250385fbb92..85efc119dbf1 100644
>> --- a/drivers/adc/stm32-adc.c
>> +++ b/drivers/adc/stm32-adc.c
>> @@ -200,24 +200,63 @@ static int stm32_adc_legacy_chan_init(struct udevice
>> *dev, unsigned int num_chan
>> return ret;
>> }
>>
>> +static int stm32_adc_generic_chan_init(struct udevice *dev, unsigned int
>> num_channels)
>> +{
>> +struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
>> +struct stm32_adc *adc = dev_get_priv(dev);
>> +ofnode child;
>> +int val, ret;
>> +
>> +ofnode_for_each_subnode(child, dev_ofnode(dev)) {
>> +ret = ofnode_read_u32(child, "reg", );
>> +if (ret) {
>> +dev_err(dev, "Missing channel index %d\n", ret);
>> +return ret;
>> +}
>> +
>> +if (val >= adc->cfg->max_channels) {
>> +dev_err(dev, "Invalid channel %d\n", val);
>> +return -EINVAL;
>> +}
>> +
>> +uc_pdata->channel_mask |= 1 << val;
>> +}
>> +
>> +return 0;
>> +}
>> +
>> static int stm32_adc_chan_of_init(struct udevice *dev)
>> {
>> struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
>> struct stm32_adc *adc = dev_get_priv(dev);
>> unsigned int num_channels;
>> int ret;
>> -
>> -ret = stm32_adc_get_legacy_chan_count(dev);
>> -if (ret < 0)
>> -return ret;
>> -num_channels = ret;
>> +bool legacy = false;
>> +
>> +num_channels = dev_get_child_count(dev);
>> +/* If no channels have been found, fallback to channels legacy
>> properties. */
>> +if (!num_channels) {
>> +legacy = true;
>> +
>> +ret = stm32_adc_get_legacy_chan_count(dev);
>> +if (!ret) {
>> +dev_err(dev, "No channel found\n");
>> +return -ENODATA;
>> +} else if (ret < 0) {
>> +return ret;
>> +}
>> +num_channels = ret;
>> +}
>>
>> if (num_channels > adc->cfg->max_channels) {
>> dev_err(dev, "too many st,adc-channels: %d\n", num_channels);
>> return -EINVAL;
>> }
>>
>> -ret = stm32_adc_legacy_chan_init(dev, num_channels);
>> +if (legacy)
>> +ret = stm32_adc_legacy_chan_init(dev, num_channels);
>> +else
>> +ret = stm32_adc_generic_chan_init(dev, num_channels);
>> if (ret < 0)
>> return ret;
>>
> Reviewed-by: Patrice Chotard
>
> Thanks
> Patrice
> ___
> Uboot-stm32 mailing list
> uboot-st...@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
Applied to u-boot-stm/master
Thanks
Patrice
Re: [Uboot-stm32] [PATCH 1/2] adc: stm32mp15: split channel init into several routines
On 12/7/22 16:54, Patrice CHOTARD wrote:
>
>
> On 11/23/22 16:20, Olivier Moysan wrote:
>> Split stm32_adc_chan_of_init channel initialization function into
>> several routines to increase readability and prepare channel
>> generic binding handling.
>>
>> Signed-off-by: Olivier Moysan
>> ---
>>
>> drivers/adc/stm32-adc.c | 44 +++--
>> 1 file changed, 34 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
>> index ad8d1a32cdba..1250385fbb92 100644
>> --- a/drivers/adc/stm32-adc.c
>> +++ b/drivers/adc/stm32-adc.c
>> @@ -162,12 +162,8 @@ static int stm32_adc_channel_data(struct udevice *dev,
>> int channel,
>> return 0;
>> }
>>
>> -static int stm32_adc_chan_of_init(struct udevice *dev)
>> +static int stm32_adc_get_legacy_chan_count(struct udevice *dev)
>> {
>> -struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
>> -struct stm32_adc *adc = dev_get_priv(dev);
>> -u32 chans[STM32_ADC_CH_MAX];
>> -unsigned int i, num_channels;
>> int ret;
>>
>> /* Retrieve single ended channels listed in device tree */
>> @@ -176,12 +172,16 @@ static int stm32_adc_chan_of_init(struct udevice *dev)
>> dev_err(dev, "can't get st,adc-channels: %d\n", ret);
>> return ret;
>> }
>> -num_channels = ret / sizeof(u32);
>>
>> -if (num_channels > adc->cfg->max_channels) {
>> -dev_err(dev, "too many st,adc-channels: %d\n", num_channels);
>> -return -EINVAL;
>> -}
>> +return (ret / sizeof(u32));
>> +}
>> +
>> +static int stm32_adc_legacy_chan_init(struct udevice *dev, unsigned int
>> num_channels)
>> +{
>> +struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
>> +struct stm32_adc *adc = dev_get_priv(dev);
>> +u32 chans[STM32_ADC_CH_MAX];
>> +int i, ret;
>>
>> ret = dev_read_u32_array(dev, "st,adc-channels", chans, num_channels);
>> if (ret < 0) {
>> @@ -197,6 +197,30 @@ static int stm32_adc_chan_of_init(struct udevice *dev)
>> uc_pdata->channel_mask |= 1 << chans[i];
>> }
>>
>> +return ret;
>> +}
>> +
>> +static int stm32_adc_chan_of_init(struct udevice *dev)
>> +{
>> +struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
>> +struct stm32_adc *adc = dev_get_priv(dev);
>> +unsigned int num_channels;
>> +int ret;
>> +
>> +ret = stm32_adc_get_legacy_chan_count(dev);
>> +if (ret < 0)
>> +return ret;
>> +num_channels = ret;
>> +
>> +if (num_channels > adc->cfg->max_channels) {
>> +dev_err(dev, "too many st,adc-channels: %d\n", num_channels);
>> +return -EINVAL;
>> +}
>> +
>> +ret = stm32_adc_legacy_chan_init(dev, num_channels);
>> +if (ret < 0)
>> +return ret;
>> +
>> uc_pdata->data_mask = (1 << adc->cfg->num_bits) - 1;
>> uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
>> uc_pdata->data_timeout_us = 10;
>
>
> Reviewed-by: Patrice Chotard
>
> Thanks
> Patrice
> ___
> Uboot-stm32 mailing list
> uboot-st...@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
Applied to u-boot-stm/master
Thanks
Patrice
Re: [PATCH 2/2] adc: stm32mp15: add support of generic channels binding
On 11/23/22 16:20, Olivier Moysan wrote:
> Add support of generic IIO channels binding:
> ./devicetree/bindings/iio/adc/adc.yaml
> Keep support of st,adc-channels for backward compatibility.
>
> Signed-off-by: Olivier Moysan
> ---
>
> drivers/adc/stm32-adc.c | 51 -
> 1 file changed, 45 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
> index 1250385fbb92..85efc119dbf1 100644
> --- a/drivers/adc/stm32-adc.c
> +++ b/drivers/adc/stm32-adc.c
> @@ -200,24 +200,63 @@ static int stm32_adc_legacy_chan_init(struct udevice
> *dev, unsigned int num_chan
> return ret;
> }
>
> +static int stm32_adc_generic_chan_init(struct udevice *dev, unsigned int
> num_channels)
> +{
> + struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
> + struct stm32_adc *adc = dev_get_priv(dev);
> + ofnode child;
> + int val, ret;
> +
> + ofnode_for_each_subnode(child, dev_ofnode(dev)) {
> + ret = ofnode_read_u32(child, "reg", );
> + if (ret) {
> + dev_err(dev, "Missing channel index %d\n", ret);
> + return ret;
> + }
> +
> + if (val >= adc->cfg->max_channels) {
> + dev_err(dev, "Invalid channel %d\n", val);
> + return -EINVAL;
> + }
> +
> + uc_pdata->channel_mask |= 1 << val;
> + }
> +
> + return 0;
> +}
> +
> static int stm32_adc_chan_of_init(struct udevice *dev)
> {
> struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
> struct stm32_adc *adc = dev_get_priv(dev);
> unsigned int num_channels;
> int ret;
> -
> - ret = stm32_adc_get_legacy_chan_count(dev);
> - if (ret < 0)
> - return ret;
> - num_channels = ret;
> + bool legacy = false;
> +
> + num_channels = dev_get_child_count(dev);
> + /* If no channels have been found, fallback to channels legacy
> properties. */
> + if (!num_channels) {
> + legacy = true;
> +
> + ret = stm32_adc_get_legacy_chan_count(dev);
> + if (!ret) {
> + dev_err(dev, "No channel found\n");
> + return -ENODATA;
> + } else if (ret < 0) {
> + return ret;
> + }
> + num_channels = ret;
> + }
>
> if (num_channels > adc->cfg->max_channels) {
> dev_err(dev, "too many st,adc-channels: %d\n", num_channels);
> return -EINVAL;
> }
>
> - ret = stm32_adc_legacy_chan_init(dev, num_channels);
> + if (legacy)
> + ret = stm32_adc_legacy_chan_init(dev, num_channels);
> + else
> + ret = stm32_adc_generic_chan_init(dev, num_channels);
> if (ret < 0)
> return ret;
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 1/2] adc: stm32mp15: split channel init into several routines
On 11/23/22 16:20, Olivier Moysan wrote:
> Split stm32_adc_chan_of_init channel initialization function into
> several routines to increase readability and prepare channel
> generic binding handling.
>
> Signed-off-by: Olivier Moysan
> ---
>
> drivers/adc/stm32-adc.c | 44 +++--
> 1 file changed, 34 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
> index ad8d1a32cdba..1250385fbb92 100644
> --- a/drivers/adc/stm32-adc.c
> +++ b/drivers/adc/stm32-adc.c
> @@ -162,12 +162,8 @@ static int stm32_adc_channel_data(struct udevice *dev,
> int channel,
> return 0;
> }
>
> -static int stm32_adc_chan_of_init(struct udevice *dev)
> +static int stm32_adc_get_legacy_chan_count(struct udevice *dev)
> {
> - struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
> - struct stm32_adc *adc = dev_get_priv(dev);
> - u32 chans[STM32_ADC_CH_MAX];
> - unsigned int i, num_channels;
> int ret;
>
> /* Retrieve single ended channels listed in device tree */
> @@ -176,12 +172,16 @@ static int stm32_adc_chan_of_init(struct udevice *dev)
> dev_err(dev, "can't get st,adc-channels: %d\n", ret);
> return ret;
> }
> - num_channels = ret / sizeof(u32);
>
> - if (num_channels > adc->cfg->max_channels) {
> - dev_err(dev, "too many st,adc-channels: %d\n", num_channels);
> - return -EINVAL;
> - }
> + return (ret / sizeof(u32));
> +}
> +
> +static int stm32_adc_legacy_chan_init(struct udevice *dev, unsigned int
> num_channels)
> +{
> + struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
> + struct stm32_adc *adc = dev_get_priv(dev);
> + u32 chans[STM32_ADC_CH_MAX];
> + int i, ret;
>
> ret = dev_read_u32_array(dev, "st,adc-channels", chans, num_channels);
> if (ret < 0) {
> @@ -197,6 +197,30 @@ static int stm32_adc_chan_of_init(struct udevice *dev)
> uc_pdata->channel_mask |= 1 << chans[i];
> }
>
> + return ret;
> +}
> +
> +static int stm32_adc_chan_of_init(struct udevice *dev)
> +{
> + struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
> + struct stm32_adc *adc = dev_get_priv(dev);
> + unsigned int num_channels;
> + int ret;
> +
> + ret = stm32_adc_get_legacy_chan_count(dev);
> + if (ret < 0)
> + return ret;
> + num_channels = ret;
> +
> + if (num_channels > adc->cfg->max_channels) {
> + dev_err(dev, "too many st,adc-channels: %d\n", num_channels);
> + return -EINVAL;
> + }
> +
> + ret = stm32_adc_legacy_chan_init(dev, num_channels);
> + if (ret < 0)
> + return ret;
> +
> uc_pdata->data_mask = (1 << adc->cfg->num_bits) - 1;
> uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
> uc_pdata->data_timeout_us = 10;
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH v4 3/3] arm: dts: stm32mp13: add support of RCC driver
On 12/7/22 16:47, Patrice CHOTARD wrote:
>
>
> On 11/24/22 11:36, Gabriel Fernandez wrote:
>> Adds support of Clock and Reset drivers for STM32MP13 platform.
>>
>> Signed-off-by: Gabriel Fernandez
>> Reviewed-by: Patrick Delaunay
>>
>> ---
>>
>> (no changes since v2)
>>
>> Changes in v2:
>> - missing support of CRYP1 clock
>>
>> arch/arm/dts/stm32mp13-u-boot.dtsi | 4 +
>> arch/arm/dts/stm32mp131.dtsi | 119 +++--
>> arch/arm/dts/stm32mp133.dtsi | 4 +-
>> arch/arm/dts/stm32mp13xc.dtsi | 3 +-
>> arch/arm/dts/stm32mp13xf.dtsi | 3 +-
>> 5 files changed, 54 insertions(+), 79 deletions(-)
>>
>> diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi
>> b/arch/arm/dts/stm32mp13-u-boot.dtsi
>> index 47a43649bb..3730f474b2 100644
>> --- a/arch/arm/dts/stm32mp13-u-boot.dtsi
>> +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
>> @@ -92,6 +92,10 @@
>> u-boot,dm-pre-reloc;
>> };
>>
>> + {
>> +u-boot,dm-pre-reloc;
>> +};
>> +
>> {
>> u-boot,dm-pre-reloc;
>> };
>> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
>> index a1c6d0d00b..d893bc24b4 100644
>> --- a/arch/arm/dts/stm32mp131.dtsi
>> +++ b/arch/arm/dts/stm32mp131.dtsi
>> @@ -4,6 +4,8 @@
>> * Author: Alexandre Torgue for
>> STMicroelectronics.
>> */
>> #include
>> +#include
>> +#include
>>
>> / {
>> #address-cells = <1>;
>> @@ -52,62 +54,6 @@
>> };
>> };
>>
>> -clocks {
>> -clk_axi: clk-axi {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <26650>;
>> -};
>> -
>> -clk_hse: clk-hse {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <2400>;
>> -};
>> -
>> -clk_hsi: clk-hsi {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <6400>;
>> -};
>> -
>> -clk_lsi: clk-lsi {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <32000>;
>> -};
>> -
>> -clk_pclk3: clk-pclk3 {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <104438965>;
>> -};
>> -
>> -clk_pclk4: clk-pclk4 {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <13325>;
>> -};
>> -
>> -clk_pll4_p: clk-pll4_p {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <5000>;
>> -};
>> -
>> -clk_pll4_r: clk-pll4_r {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <9900>;
>> -};
>> -
>> -clk_rtc_k: clk-rtc-k {
>> -#clock-cells = <0>;
>> -compatible = "fixed-clock";
>> -clock-frequency = <32768>;
>> -};
>> -};
>> -
>> intc: interrupt-controller@a0021000 {
>> compatible = "arm,cortex-a7-gic";
>> #interrupt-cells = <3>;
>> @@ -155,7 +101,8 @@
>> compatible = "st,stm32h7-uart";
>> reg = <0x4001 0x400>;
>> interrupts = ;
>> -clocks = <_hsi>;
>> +clocks = < UART4_K>;
>> +resets = < UART4_R>;
>> status = "disabled";
>> };
>>
>> @@ -170,7 +117,8 @@
>> ,
>> ,
>> ;
>> -clocks = <_pclk4>;
>> +clocks = < DMA1>;
>> +resets = < DMA1_R>;
>> #dma-cells = <4>;
>> st,mem2mem;
>> dma-requests = <8>;
>> @@ -187,7 +135,8 @@
>> ,
>> ,
>> ;
>> -clocks = <_pclk4>;
>> +clocks = < DMA2>;
>> +resets = < DMA2_R>;
>> #dma-cells = <4>;
>> st,mem2mem;
>> dma-requests = <8>;
>> @@ -196,13 +145,29 @@
>> dmamux1: dma-router@48002000 {
>> compatible = "st,stm32h7-dmamux";
>> reg = <0x48002000 0x40>;
>> -clocks = <_pclk4>;
>> +clocks = < DMAMUX1>;
>> +resets = < DMAMUX1_R>;
>>
Re: [PATCH v4 2/3] clk: stm32mp13: introduce STM32MP13 RCC driver
On 12/7/22 16:46, Patrice CHOTARD wrote: > > > On 11/24/22 11:36, Gabriel Fernandez wrote: >> STM32MP13 RCC driver uses Common Clock Framework and also a >> 'clk-stm32-core' API. Then STM32MPx RCC driver will contain only data >> configuration (gates, mux, dividers and the way to check security) >> or some specific clocks. >> This API will be used by all new other generations of ST Socs. >> >> Signed-off-by: Gabriel Fernandez >> Reviewed-by: Patrick Delaunay >> Reviewed-by: Sean Anderson >> Tested-by: Patrick Delaunay >> >> --- >> >> (no changes since v3) >> >> Changes in v3: >> - fix cosmetic >> - add comments in commit message >> - explanation of stm32 clock gating >> >> Changes in v2: >> - deference check_security() call back >> - use of ccf_clk_(enable/disable/get_rate/set_rate) ops >> - fix gate refcounting >> - documented structures in clock-core API >> - remove useless spinlocks >> - cosmetic changes >> - remove useless defines >> >> drivers/clk/stm32/Kconfig | 15 + >> drivers/clk/stm32/Makefile | 2 + >> drivers/clk/stm32/clk-stm32-core.c | 268 + >> drivers/clk/stm32/clk-stm32-core.h | 276 ++ >> drivers/clk/stm32/clk-stm32mp13.c | 841 + >> drivers/clk/stm32/stm32mp13_rcc.h | 288 ++ >> 6 files changed, 1690 insertions(+) >> create mode 100644 drivers/clk/stm32/clk-stm32-core.c >> create mode 100644 drivers/clk/stm32/clk-stm32-core.h >> create mode 100644 drivers/clk/stm32/clk-stm32mp13.c >> create mode 100644 drivers/clk/stm32/stm32mp13_rcc.h >> > > [...] > > Reviewed-by: Patrice Chotard > Thanks > Patrice Applied to u-boot-stm/master Thanks Patrice
Re: [PATCH v4 1/3] dt-bindings: stm32mp13: add clock & reset support for STM32MP13
On 12/7/22 16:42, Patrice CHOTARD wrote: > > > On 11/24/22 11:36, Gabriel Fernandez wrote: >> Add support of stm32mp13 DT bindings of clock and reset. >> >> Signed-off-by: Gabriel Fernandez >> Reviewed-by: Patrick Delaunay >> >> --- >> >> Changes in v4: >> - update MAINTAINERS files >> >> MAINTAINERS | 5 +- >> include/dt-bindings/clock/stm32mp13-clks.h | 229 +++ >> include/dt-bindings/reset/stm32mp13-resets.h | 100 >> 3 files changed, 331 insertions(+), 3 deletions(-) >> create mode 100644 include/dt-bindings/clock/stm32mp13-clks.h >> create mode 100644 include/dt-bindings/reset/stm32mp13-resets.h >> > > [...] > > Reviewed-by: Patrice Chotard Applied to u-boot-stm/master Thanks Patrice
Re: [PATCH v4 3/3] arm: dts: stm32mp13: add support of RCC driver
On 11/24/22 11:36, Gabriel Fernandez wrote:
> Adds support of Clock and Reset drivers for STM32MP13 platform.
>
> Signed-off-by: Gabriel Fernandez
> Reviewed-by: Patrick Delaunay
>
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - missing support of CRYP1 clock
>
> arch/arm/dts/stm32mp13-u-boot.dtsi | 4 +
> arch/arm/dts/stm32mp131.dtsi | 119 +++--
> arch/arm/dts/stm32mp133.dtsi | 4 +-
> arch/arm/dts/stm32mp13xc.dtsi | 3 +-
> arch/arm/dts/stm32mp13xf.dtsi | 3 +-
> 5 files changed, 54 insertions(+), 79 deletions(-)
>
> diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi
> b/arch/arm/dts/stm32mp13-u-boot.dtsi
> index 47a43649bb..3730f474b2 100644
> --- a/arch/arm/dts/stm32mp13-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
> @@ -92,6 +92,10 @@
> u-boot,dm-pre-reloc;
> };
>
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> {
> u-boot,dm-pre-reloc;
> };
> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
> index a1c6d0d00b..d893bc24b4 100644
> --- a/arch/arm/dts/stm32mp131.dtsi
> +++ b/arch/arm/dts/stm32mp131.dtsi
> @@ -4,6 +4,8 @@
> * Author: Alexandre Torgue for
> STMicroelectronics.
> */
> #include
> +#include
> +#include
>
> / {
> #address-cells = <1>;
> @@ -52,62 +54,6 @@
> };
> };
>
> - clocks {
> - clk_axi: clk-axi {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <26650>;
> - };
> -
> - clk_hse: clk-hse {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <2400>;
> - };
> -
> - clk_hsi: clk-hsi {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <6400>;
> - };
> -
> - clk_lsi: clk-lsi {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <32000>;
> - };
> -
> - clk_pclk3: clk-pclk3 {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <104438965>;
> - };
> -
> - clk_pclk4: clk-pclk4 {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <13325>;
> - };
> -
> - clk_pll4_p: clk-pll4_p {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <5000>;
> - };
> -
> - clk_pll4_r: clk-pll4_r {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <9900>;
> - };
> -
> - clk_rtc_k: clk-rtc-k {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <32768>;
> - };
> - };
> -
> intc: interrupt-controller@a0021000 {
> compatible = "arm,cortex-a7-gic";
> #interrupt-cells = <3>;
> @@ -155,7 +101,8 @@
> compatible = "st,stm32h7-uart";
> reg = <0x4001 0x400>;
> interrupts = ;
> - clocks = <_hsi>;
> + clocks = < UART4_K>;
> + resets = < UART4_R>;
> status = "disabled";
> };
>
> @@ -170,7 +117,8 @@
>,
>,
>;
> - clocks = <_pclk4>;
> + clocks = < DMA1>;
> + resets = < DMA1_R>;
> #dma-cells = <4>;
> st,mem2mem;
> dma-requests = <8>;
> @@ -187,7 +135,8 @@
>,
>,
>;
> - clocks = <_pclk4>;
> + clocks = < DMA2>;
> + resets = < DMA2_R>;
> #dma-cells = <4>;
> st,mem2mem;
> dma-requests = <8>;
> @@ -196,13 +145,29 @@
> dmamux1: dma-router@48002000 {
> compatible = "st,stm32h7-dmamux";
> reg = <0x48002000 0x40>;
> - clocks = <_pclk4>;
> + clocks = < DMAMUX1>;
> + resets = < DMAMUX1_R>;
> #dma-cells = <3>;
> dma-masters = < >;
>
Re: [PATCH v4 2/3] clk: stm32mp13: introduce STM32MP13 RCC driver
On 11/24/22 11:36, Gabriel Fernandez wrote: > STM32MP13 RCC driver uses Common Clock Framework and also a > 'clk-stm32-core' API. Then STM32MPx RCC driver will contain only data > configuration (gates, mux, dividers and the way to check security) > or some specific clocks. > This API will be used by all new other generations of ST Socs. > > Signed-off-by: Gabriel Fernandez > Reviewed-by: Patrick Delaunay > Reviewed-by: Sean Anderson > Tested-by: Patrick Delaunay > > --- > > (no changes since v3) > > Changes in v3: > - fix cosmetic > - add comments in commit message > - explanation of stm32 clock gating > > Changes in v2: > - deference check_security() call back > - use of ccf_clk_(enable/disable/get_rate/set_rate) ops > - fix gate refcounting > - documented structures in clock-core API > - remove useless spinlocks > - cosmetic changes > - remove useless defines > > drivers/clk/stm32/Kconfig | 15 + > drivers/clk/stm32/Makefile | 2 + > drivers/clk/stm32/clk-stm32-core.c | 268 + > drivers/clk/stm32/clk-stm32-core.h | 276 ++ > drivers/clk/stm32/clk-stm32mp13.c | 841 + > drivers/clk/stm32/stm32mp13_rcc.h | 288 ++ > 6 files changed, 1690 insertions(+) > create mode 100644 drivers/clk/stm32/clk-stm32-core.c > create mode 100644 drivers/clk/stm32/clk-stm32-core.h > create mode 100644 drivers/clk/stm32/clk-stm32mp13.c > create mode 100644 drivers/clk/stm32/stm32mp13_rcc.h > [...] Reviewed-by: Patrice Chotard Thanks Patrice
Re: [PATCH v4 1/3] dt-bindings: stm32mp13: add clock & reset support for STM32MP13
On 11/24/22 11:36, Gabriel Fernandez wrote: > Add support of stm32mp13 DT bindings of clock and reset. > > Signed-off-by: Gabriel Fernandez > Reviewed-by: Patrick Delaunay > > --- > > Changes in v4: > - update MAINTAINERS files > > MAINTAINERS | 5 +- > include/dt-bindings/clock/stm32mp13-clks.h | 229 +++ > include/dt-bindings/reset/stm32mp13-resets.h | 100 > 3 files changed, 331 insertions(+), 3 deletions(-) > create mode 100644 include/dt-bindings/clock/stm32mp13-clks.h > create mode 100644 include/dt-bindings/reset/stm32mp13-resets.h > [...] Reviewed-by: Patrice Chotard
[PATCH 2/2] tee: optee: discover services dependent on tee-supplicant
Makes OP-TEE to enumerate also services depending on tee-supplicant
support in U-Boot. This change allows OP-TEE services like fTPM TA
to be discovered and get a TPM device registered in U-Boot.
Signed-off-by: Etienne Carriere
---
drivers/tee/optee/core.c | 32 +++-
1 file changed, 23 insertions(+), 9 deletions(-)
diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c
index 604fd1414f..b21031d7d8 100644
--- a/drivers/tee/optee/core.c
+++ b/drivers/tee/optee/core.c
@@ -102,13 +102,14 @@ static int bind_service_list(struct udevice *dev, struct
tee_shm *service_list,
return 0;
}
-static int __enum_services(struct udevice *dev, struct tee_shm *shm, size_t
*shm_size, u32 tee_sess)
+static int __enum_services(struct udevice *dev, struct tee_shm *shm, size_t
*shm_size, u32 tee_sess,
+ unsigned int pta_cmd)
{
struct tee_invoke_arg arg = { };
struct tee_param param = { };
int ret = 0;
- arg.func = PTA_CMD_GET_DEVICES;
+ arg.func = pta_cmd;
arg.session = tee_sess;
/* Fill invoke cmd params */
@@ -118,7 +119,7 @@ static int __enum_services(struct udevice *dev, struct
tee_shm *shm, size_t *shm
ret = tee_invoke_func(dev, , 1, );
if (ret || (arg.ret && arg.ret != TEE_ERROR_SHORT_BUFFER)) {
- dev_err(dev, "PTA_CMD_GET_DEVICES invoke function err: 0x%x\n",
arg.ret);
+ dev_err(dev, "Enumeration command 0x%x failed: 0x%x\n",
pta_cmd, arg.ret);
return -EINVAL;
}
@@ -127,12 +128,13 @@ static int __enum_services(struct udevice *dev, struct
tee_shm *shm, size_t *shm
return 0;
}
-static int enum_services(struct udevice *dev, struct tee_shm **shm, size_t
*count, u32 tee_sess)
+static int enum_services(struct udevice *dev, struct tee_shm **shm, size_t
*count, u32 tee_sess,
+unsigned int pta_cmd)
{
size_t shm_size = 0;
int ret;
- ret = __enum_services(dev, NULL, _size, tee_sess);
+ ret = __enum_services(dev, NULL, _size, tee_sess, pta_cmd);
if (ret)
return ret;
@@ -142,7 +144,7 @@ static int enum_services(struct udevice *dev, struct
tee_shm **shm, size_t *coun
return ret;
}
- ret = __enum_services(dev, *shm, _size, tee_sess);
+ ret = __enum_services(dev, *shm, _size, tee_sess, pta_cmd);
if (!ret)
*count = shm_size / sizeof(struct tee_optee_ta_uuid);
@@ -174,20 +176,32 @@ static int bind_service_drivers(struct udevice *dev)
struct tee_shm *service_list = NULL;
size_t service_count;
u32 tee_sess;
- int ret;
+ int ret, ret2;
ret = open_enum_session(dev, _sess);
if (ret)
return ret;
- ret = enum_services(dev, _list, _count, tee_sess);
+ ret = enum_services(dev, _list, _count, tee_sess,
+ PTA_CMD_GET_DEVICES);
if (!ret)
ret = bind_service_list(dev, service_list, service_count);
tee_shm_free(service_list);
+
+ ret2 = enum_services(dev, _list, _count, tee_sess,
+PTA_CMD_GET_DEVICES_SUPP);
+ if (!ret2)
+ ret2 = bind_service_list(dev, service_list, service_count);
+
+ tee_shm_free(service_list);
+
tee_close_session(dev, tee_sess);
- return ret;
+ if (ret)
+ return ret;
+
+ return ret2;
}
/**
--
2.25.1
[PATCH 1/2] tee: optee: don't fail probe because of optee-rng
Fixes optee-rng driver bind sequence in optee driver to print a warning message but not report an error status when a optee-rng service driver fails to be bound as the optee driver itself is still fully functional. Signed-off-by: Etienne Carriere --- drivers/tee/optee/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index 9240277579..604fd1414f 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c @@ -834,7 +834,7 @@ static int optee_probe(struct udevice *dev) */ ret = device_bind_driver(dev, "optee-rng", "optee-rng", NULL); if (ret) - return ret; + dev_warn(dev, "ftpm_tee failed to bind: %d\n", ret); } return 0; -- 2.25.1
[PATCH] tpm2: ftpm: open session with privileged ree login
Opens the fTPM session with TEE_LOGIN_REE_KERNEL as fTPM may restrict access to that login when Linux based OS is running as applications are expected to got through the Linux TPMv2 driver. Signed-off-by: Etienne Carriere --- drivers/tpm/tpm2_ftpm_tee.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tpm/tpm2_ftpm_tee.c b/drivers/tpm/tpm2_ftpm_tee.c index 53e59f42b4..3c4c12983d 100644 --- a/drivers/tpm/tpm2_ftpm_tee.c +++ b/drivers/tpm/tpm2_ftpm_tee.c @@ -186,6 +186,7 @@ static int ftpm_tee_probe(struct udevice *dev) /* Open a session with the fTPM TA */ memset(_arg, 0, sizeof(sess_arg)); + sess_arg.clnt_login = TEE_LOGIN_REE_KERNEL; tee_optee_ta_uuid_to_octets(sess_arg.uuid, ); rc = tee_open_session(context->tee_dev, _arg, 0, NULL); -- 2.25.1
[PATCH] efi_loader: Measure the loaded DTB
Measures the DTB passed to the EFI application upon new boolean config
switch CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB. For platforms where the
content of the DTB passed to the OS can change across reboots, there is
not point measuring it hence the config switch to allow platform to not
embed this feature.
Co-developed-by: Ilias Apalodimas
Signed-off-by: Ilias Apalodimas
Signed-off-by: Etienne Carriere
---
cmd/bootefi.c | 9 +
include/efi_loader.h | 2 ++
include/efi_tcg2.h| 10 ++
include/tpm-v2.h | 2 ++
lib/efi_loader/Kconfig| 12
lib/efi_loader/efi_tcg2.c | 36
6 files changed, 71 insertions(+)
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 2a7d42925d..56e4a1909f 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -315,6 +315,15 @@ efi_status_t efi_install_fdt(void *fdt)
return EFI_LOAD_ERROR;
}
+ /* Measure the installed DTB */
+ if (CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL_MEASURE_DTB)) {
+ ret = efi_tcg2_measure_dtb(fdt);
+ if (ret == EFI_SECURITY_VIOLATION) {
+ log_err("ERROR: failed to measure DTB\n");
+ return ret;
+ }
+ }
+
/* Prepare device tree for payload */
ret = copy_fdt();
if (ret) {
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 0899e293e5..7538b6b828 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -530,6 +530,8 @@ efi_status_t
efi_tcg2_notify_exit_boot_services_failed(void);
efi_status_t efi_tcg2_measure_efi_app_invocation(struct efi_loaded_image_obj
*handle);
/* Measure efi application exit */
efi_status_t efi_tcg2_measure_efi_app_exit(void);
+/* Measure DTB */
+efi_status_t efi_tcg2_measure_dtb(void *fdt);
/* Called by bootefi to initialize root node */
efi_status_t efi_root_node_register(void);
/* Called by bootefi to initialize runtime */
diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h
index 874306dc11..b1c3abd097 100644
--- a/include/efi_tcg2.h
+++ b/include/efi_tcg2.h
@@ -233,6 +233,16 @@ struct efi_gpt_data {
gpt_entry partitions[];
} __packed;
+/**
+ * struct tdUEFI_PLATFORM_FIRMWARE_BLOB2
+ * @blob_description_size: Byte size of @data
+ * @data: Description data
+ */
+struct uefi_platform_firmware_blob2 {
+ u8 blob_description_size;
+ u8 data[];
+} __packed;
+
struct efi_tcg2_protocol {
efi_status_t (EFIAPI * get_capability)(struct efi_tcg2_protocol *this,
struct
efi_tcg2_boot_service_capability *capability);
diff --git a/include/tpm-v2.h b/include/tpm-v2.h
index 737e57551d..2df3dad553 100644
--- a/include/tpm-v2.h
+++ b/include/tpm-v2.h
@@ -105,6 +105,8 @@ struct udevice;
"Exit Boot Services Returned with Failure"
#define EFI_EXIT_BOOT_SERVICES_SUCCEEDED\
"Exit Boot Services Returned with Success"
+#define EFI_DTB_EVENT_STRING \
+ "DTB DATA"
/* TPMS_TAGGED_PROPERTY Structure */
struct tpms_tagged_property {
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index e2b643871b..e490236d14 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -337,6 +337,18 @@ config EFI_TCG2_PROTOCOL_EVENTLOG_SIZE
this is going to be allocated twice. One for the eventlog it
self
and one for the configuration table that is required from the
spec
+config EFI_TCG2_PROTOCOL_MEASURE_DTB
+ bool "Measure DTB with EFI_TCG2_PROTOCOL"
+ depends on EFI_TCG2_PROTOCOL
+ default n
+ help
+ When enabled, the DTB image passed to the booted EFI image is
+ measured using EFI TCG2 protocol. Do not enable this feature if
+ the passed DTB contains data that change across platform reboots
+ and cannot be used has a predictable measurement. Otherwise
+ this feature allows better measurement of the system boot
+ sequence.
+
config EFI_LOAD_FILE2_INITRD
bool "EFI_FILE_LOAD2_PROTOCOL for Linux initial ramdisk"
default y
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index a525ebf75b..51c9d80828 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -2175,6 +2175,42 @@ out1:
return ret;
}
+/**
+ * efi_tcg2_measure_dtb() - measure the dtb used to boot our OS
+ *
+ * @fdt: pointer to the device tree blob
+ *
+ * Return: status code
+ */
+efi_status_t efi_tcg2_measure_dtb(void *fdt)
+{
+ efi_status_t ret;
+ struct uefi_platform_firmware_blob2 *blob;
+ struct udevice *dev;
+ u32 event_size;
+
+ if (!is_tcg2_protocol_installed())
+ return EFI_SUCCESS;
+
+ ret = platform_get_tpm2_device();
+ if (ret != EFI_SUCCESS)
+ return EFI_SECURITY_VIOLATION;
+
+ event_size = sizeof(*blob) + sizeof(EFI_DTB_EVENT_STRING) +
Re: [PATCH 00/18] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
On 12/7/22 15:14, Sergiu Moga wrote: > This series of patches is meant to add support for USB Mass Storage > on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into > Driver Model. In order for this to be achieved, the respective > DT nodes have been added, the USB clock has been registered into CCF > and the required defconfigs have been added to the boards' defconfig. > What is more, in order for the VBUS to stay enabled, a `child_pre_probe` > method has been added to overcome the DM core disabling it in > `usb_scan_device`: when the generic `device_probe` method is called, > the pinctrl is processed once again, undoing whatever changes have > been made in our driver's probe method. > In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY > drivers were required. > > Cristian Birsan (2): >ARM: at91: add sama7 SFR definitions >usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv` > > Sergiu Moga (16): >ARM: dts: sam9x60ek: Add OHCI and EHCI DT nodes >clk: at91: Add support for sam9x60 USB clock >clk: at91: sam9x60: Register the required clocks for USB >clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates >usb: ohci-at91: Enable OHCI functionality and register into DM >configs: at91: sam9x60ek: Add required configs for the USB command >dt-bindings: reset: add sama7g5 definitions >dt-bindings: clk: at91: Define additional UTMI related clocks >ARM: dts: at91: sama7: Add USB related DT nodes >reset: at91: Add reset driver for basic assert/deassert operations >phy: at91: Add support for the USB 2.0 PHY's of SAMA7 >usb: ohci-at91: Add USB PHY functionality >configs: at91: sama7: Enable USB and RESET functionality >ARM: dts: at91: sama5d2_icp: Add pinctrl nodes for USB related DT > nodes >ARM: dts: at91: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes >configs: at91: sama5d2: Enable OHCI/EHCI related configs > > arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 ++ > arch/arm/dts/at91-sama5d2_icp.dts | 22 ++ > arch/arm/dts/at91-sama7g5ek.dts | 34 +++ > arch/arm/dts/sam9x60.dtsi | 18 ++ > arch/arm/dts/sam9x60ek.dts| 21 ++ > arch/arm/dts/sama7g5.dtsi | 73 ++ > arch/arm/mach-at91/include/mach/sama7-sfr.h | 59 + > configs/sam9x60ek_mmc_defconfig | 10 + > configs/sam9x60ek_nandflash_defconfig | 10 + > configs/sam9x60ek_qspiflash_defconfig | 10 + > configs/sama5d27_som1_ek_mmc1_defconfig | 5 + > configs/sama5d27_som1_ek_mmc_defconfig| 5 + > configs/sama5d27_som1_ek_qspiflash_defconfig | 5 + > configs/sama5d27_wlsom1_ek_mmc_defconfig | 6 + > .../sama5d27_wlsom1_ek_qspiflash_defconfig| 5 + > configs/sama5d2_icp_mmc_defconfig | 9 + > configs/sama5d2_icp_qspiflash_defconfig | 9 + > configs/sama5d2_ptc_ek_mmc_defconfig | 5 + > configs/sama5d2_ptc_ek_nandflash_defconfig| 5 + > configs/sama5d2_xplained_emmc_defconfig | 5 + > configs/sama5d2_xplained_mmc_defconfig| 5 + > configs/sama5d2_xplained_qspiflash_defconfig | 5 + > configs/sama5d2_xplained_spiflash_defconfig | 5 + > configs/sama7g5ek_mmc1_defconfig | 13 ++ > configs/sama7g5ek_mmc_defconfig | 13 ++ > drivers/clk/at91/Kconfig | 7 + > drivers/clk/at91/Makefile | 1 + > drivers/clk/at91/clk-sam9x60-usb.c| 156 + > drivers/clk/at91/pmc.h| 11 + > drivers/clk/at91/sam9x60.c| 99 +++- > drivers/phy/Kconfig | 10 + > drivers/phy/Makefile | 1 + > drivers/phy/phy-sama7-usb.c | 92 > drivers/phy/phy-sama7-utmi-clk.c | 202 + > drivers/reset/Kconfig | 8 + > drivers/reset/Makefile| 1 + > drivers/reset/reset-at91.c| 143 > drivers/sysreset/sysreset_at91.c | 10 +- > drivers/usb/host/ohci-at91.c | 214 ++ > include/dt-bindings/clk/at91.h| 5 + > include/dt-bindings/reset/sama7g5-reset.h | 10 + > 41 files changed, 1342 insertions(+), 10 deletions(-) > create mode 100644 arch/arm/mach-at91/include/mach/sama7-sfr.h > create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c > create mode 100644 drivers/phy/phy-sama7-usb.c > create mode 100644 drivers/phy/phy-sama7-utmi-clk.c > create mode 100644 drivers/reset/reset-at91.c > create mode 100644 include/dt-bindings/reset/sama7g5-reset.h > Hi Sergiu, When enabling the configs, I get plenty of errors like this in lots of boards: ./arch/arm/include/asm/arch/clk.h: In function ‘get_h32mxdiv’:
Re: [PATCH 1/1] net: missing break after net_ip6_handler()
On Wed, 2022-12-07 at 09:42 -0500, Tom Rini wrote:
> On Wed, Dec 07, 2022 at 03:29:37PM +0100, Heinrich Schuchardt wrote:
>
> > Don't fall through to handling an IPv6 header as IPv4.
> >
> > Fixes: ffdbf3bad5f3 ("net: ipv6: Incorporate IPv6 support into u-
> > boot net subsystem")
> > Addresses-Coverity-ID: 430975 ("Missing break in switch")
> > Signed-off-by: Heinrich Schuchardt <
> > heinrich.schucha...@canonical.com>
> > ---
> > Do we have a unit trest of IPv6?
> > I guess we should at least do a IPv6 ping.
>
> There are a few tests, yes, but more would be good.
>
Hello!
I have tested IPv6 (ping6 and tftpboot) with my own python scripts before
sending to pathwork. I'll do some test conversion to use them with u-boot or
add new tests for that soon!
Thanks!
Re: Gitlab CI: "build all 32bit ARM platforms" can't be completed due to timeout
On Wed, Dec 07, 2022 at 03:41:18PM +0100, Patrice CHOTARD wrote: > Hi All > > Just to notice that 3 times in a raw, "build all 32bit ARM platforms" can't > be completed due to 1 hour timeout, > we got the following execution status : > > ERROR: Job failed: execution took longer than 1h0m0s seconds > > see : > > https://source.denx.de/u-boot/custodians/u-boot-stm/-/jobs/539133 > https://source.denx.de/u-boot/custodians/u-boot-stm/-/jobs/539132 > https://source.denx.de/u-boot/custodians/u-boot-stm/-/jobs/539078 > > Is it possible to extend this timeout to 1h30min ? Yes, it's under https://source.denx.de/u-boot/custodians/u-boot-stm/-/settings/ci_cd and I think I have 4h (far too large really) set in my jobs. There's I think unfortunately not a way to make this change globally. -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] net: missing break after net_ip6_handler()
On Wed, Dec 07, 2022 at 03:29:37PM +0100, Heinrich Schuchardt wrote:
> Don't fall through to handling an IPv6 header as IPv4.
>
> Fixes: ffdbf3bad5f3 ("net: ipv6: Incorporate IPv6 support into u-boot net
> subsystem")
> Addresses-Coverity-ID: 430975 ("Missing break in switch")
> Signed-off-by: Heinrich Schuchardt
> ---
> Do we have a unit trest of IPv6?
> I guess we should at least do a IPv6 ping.
There are a few tests, yes, but more would be good.
--
Tom
signature.asc
Description: PGP signature
Gitlab CI: "build all 32bit ARM platforms" can't be completed due to timeout
Hi All Just to notice that 3 times in a raw, "build all 32bit ARM platforms" can't be completed due to 1 hour timeout, we got the following execution status : ERROR: Job failed: execution took longer than 1h0m0s seconds see : https://source.denx.de/u-boot/custodians/u-boot-stm/-/jobs/539133 https://source.denx.de/u-boot/custodians/u-boot-stm/-/jobs/539132 https://source.denx.de/u-boot/custodians/u-boot-stm/-/jobs/539078 Is it possible to extend this timeout to 1h30min ? Thanks Patrice
Re: [PATCH 0/5] Complete the migration of MTDPARTS_DEFAULT / MTDIDS_DEFAULT
On Wed, Dec 07, 2022 at 09:26:39AM +0100, Patrick Delaunay wrote:
> Addition for previous commit a331017c237c ("Complete migration of
> MTDPARTS_DEFAULT / MTDIDS_DEFAULT, include in environment")
>
> Remove the remaining defines MTDPARTS_DEFAULT and MTDIDS_DEFAULT
> in the configuration files (include/configs/*.h).
>
> After this serie, the only remaining references of these 2 defines are
> located in cmd/mtdparts.c and only for local purpose when
> CONFIG_MTDIDS_DEFAULT or CONFIG_MTDPART_DEFAULT are not defined.
Thanks for doing this! I suspect this means I can follow-up and remove
the defaults from cmd/mtparts.c later.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] rtc: add ht1380 driver
On Tue, Dec 06, 2022 at 01:06:59PM +0300, Sergei Antonov wrote: > Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds > , minutes, hours, day of the week, date, month and year information. > > Datasheet: > https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf > > Signed-off-by: Sergei Antonov Please enable this on sandbox so that it gets build tested and not removed later as unused / dead code, thanks. -- Tom signature.asc Description: PGP signature
[PATCH 1/1] net: missing break after net_ip6_handler()
Don't fall through to handling an IPv6 header as IPv4.
Fixes: ffdbf3bad5f3 ("net: ipv6: Incorporate IPv6 support into u-boot net
subsystem")
Addresses-Coverity-ID: 430975 ("Missing break in switch")
Signed-off-by: Heinrich Schuchardt
---
Do we have a unit trest of IPv6?
I guess we should at least do a IPv6 ping.
---
net/net.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/net.c b/net/net.c
index 1c39acc493..57da9bda85 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1269,6 +1269,7 @@ void net_process_received_packet(uchar *in_packet, int
len)
#if IS_ENABLED(CONFIG_IPV6)
case PROT_IP6:
net_ip6_handler(et, (struct ip6_hdr *)ip, len);
+ break;
#endif
case PROT_IP:
debug_cond(DEBUG_NET_PKT, "Got IP\n");
--
2.37.2
RE: [PATCH 0/7] updates for km board series
> > - migrate all boards to environment.txt files > > - migrate PPC boards to DM_I2C > > - some cleanup > > > > Holger Brunck (7): > > board/km: move ls102xa boards to environment text files > > km/powerpc: migrate to env.txt file > > board/km/cent2: migrate to environment text file > > board/km/secu: migrate to use environment text files > > board/km: remove obsolete ARCH_KIRKWOOD > > km/ppc: migrate all mpc83xx to DM_I2C > > km/mpc8360: remove unused CONFIG_SYS_PAXE defines > > Thanks for doing this. As this is the first in my mind big environment > conversion, > do you have any further feedback on the mechanism, things that would make > this easier / more useful, etc? > it was quite straight forward and especially for board series which use a hierarchical structure as we do it is easy to use and afterwards much easier to read and to maintain. I only struggled about the strings I had defined in Kconfig as discussed in another thread about double quoted strings. I removed them from there in the end. What would maybe be helpful to have a small script which converts the generated include/generated/environment.h into a textfile which then looks like the environment in your u-boot if you dump it. Then you can quickly do a diff between a dump from your old and your textfile to see if your newly migrated environment is identical. Best regards Holger
[PATCH] CI: Reduce aarch64 catchall job matches
The aarch64 catch-all job is getting close to the hard time limit in Azure for the free tier. Move i.MX9 boards to the i.MX8 job and move amlogic entirely to its own job. This brings us down from 85 boards to 51 boards and so should be safe for a while. Signed-off-by: Tom Rini --- .azure-pipelines.yml | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index d31b183ba68f..d70798d33cac 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -447,6 +447,8 @@ stages: matrix: arc_microblaze_xtensa: BUILDMAN: "arc microblaze xtensa" +amlogic: + BUILDMAN: "amlogic" arm11_arm7_arm920t_arm946es: BUILDMAN: "arm11 arm7 arm920t arm946es" arm926ejs: @@ -477,8 +479,8 @@ stages: BUILDMAN: "mx6 -x boundary,engicam,freescale,technexion,toradex" imx: BUILDMAN: "mx -x mx6,freescale,technexion,toradex" -imx8: - BUILDMAN: "imx8" +imx8_imx9: + BUILDMAN: "imx8,imx9" keystone2_keystone3: BUILDMAN: "k2 k3" sandbox_asan: @@ -532,7 +534,7 @@ stages: uniphier: BUILDMAN: "uniphier" aarch64_catch_all: - BUILDMAN: "aarch64 -x bcm,imx8,k3,tegra,ls1,ls2,lx216,mvebu,uniphier,renesas,sunxi,samsung,socfpga,rk,versal,zynq" + BUILDMAN: "aarch64 -x amlogic,bcm,imx8,imx9,k3,tegra,ls1,ls2,lx216,mvebu,uniphier,renesas,sunxi,samsung,socfpga,rk,versal,zynq" rockchip: BUILDMAN: "rk" renesas: -- 2.25.1
Re: [PATCH 1/1] powerpc: fix fdt_fixup_liodn_tbl_fman()
On Wed, 12 Oct 2022 19:13:11 +0200, Heinrich Schuchardt wrote: > Builiding with GCC 12.2 fails: > > arch/powerpc/cpu/mpc85xx/liodn.c: In function 'fdt_fixup_liodn_tbl_fman': > arch/powerpc/cpu/mpc85xx/liodn.c:340:35: error: the comparison will > always evaluate as 'false' for the address of 'compat' > will never be NULL [-Werror=address] > 340 | if (tbl[i].compat == NULL) > | > > [...] I know there was some discussion of a more optimal or useful set of checks here but since that hasn't been posted and I want to mvoe to gcc-12.2 now, this is applied to u-boot/next. -- Tom
Re: [PATCH 1/6] buildman: Fetch 12.2.0 toolchains by default
On Tue, 22 Nov 2022 12:31:53 -0500, Tom Rini wrote: > Update the toolchain list to be first 12.2.0 and second 11.1.0 and > that's it. > > Applied to u-boot/next, thanks! -- Tom
[PATCH 17/18] configs: at91: sama5d2: Enable OHCI/EHCI related configs
Enable the OHCI and EHCI related configs required in order to be able to use the USB command properly. Signed-off-by: Sergiu Moga --- configs/sama5d27_som1_ek_mmc1_defconfig| 5 + configs/sama5d27_som1_ek_mmc_defconfig | 5 + configs/sama5d27_som1_ek_qspiflash_defconfig | 5 + configs/sama5d27_wlsom1_ek_mmc_defconfig | 6 ++ configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 5 + configs/sama5d2_icp_mmc_defconfig | 9 + configs/sama5d2_icp_qspiflash_defconfig| 9 + configs/sama5d2_ptc_ek_mmc_defconfig | 5 + configs/sama5d2_ptc_ek_nandflash_defconfig | 5 + configs/sama5d2_xplained_emmc_defconfig| 5 + configs/sama5d2_xplained_mmc_defconfig | 5 + configs/sama5d2_xplained_qspiflash_defconfig | 5 + configs/sama5d2_xplained_spiflash_defconfig| 5 + 13 files changed, 74 insertions(+) diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 93ae714b62..935afd633f 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -108,6 +108,11 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_DM_USB=y +CONFIG_USB_ATMEL=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama5d27_som1_ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 5096366de7..c52ce7e8a3 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -109,6 +109,11 @@ CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_USB_OHCI_HCD=y +CONFIG_DM_USB=y +CONFIG_USB_ATMEL=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama5d27_som1_ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_VIDEO=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index d7c7f42c93..9385e7bd96 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -108,6 +108,11 @@ CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_USB_OHCI_HCD=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama5d27_som1_ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_VIDEO=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 7634a6c68f..c0d5d2d165 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -114,6 +114,12 @@ CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_USB_OHCI_HCD=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama5d27_wlsom1_ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_VIDEO=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index bb018d4c69..d581b0e389 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -118,6 +118,11 @@ CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_USB_OHCI_HCD=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama5d27_wlsom1_ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_VIDEO=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 51f7104b35..cf72910e0c 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -111,4 +111,13 @@ CONFIG_SPL_TIMER=y CONFIG_ATMEL_TCB_TIMER=y CONFIG_SPL_ATMEL_TCB_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_CMD_USB=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_OHCI_HCD=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama5d2_icp" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=4 +CONFIG_USB_ATMEL=y # CONFIG_EFI_LOADER_HII is not set diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index ab7308848f..e8181b1a0c 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -96,6 +96,15 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_CMD_USB=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_OHCI_HCD=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama5d2_icp" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=4 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git
[PATCH 18/18] usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv`
From: Cristian Birsan
The `ohci_register` function expects that the OHCI driver's
priv is a struct whose first field is of type `ohci_t`.
The original conversion to DM did not have it and this
inconsistency revealed itself whenever U-Boot required
multiple memory allocations resulting in a memory overwrite
of where this field would supposedly be.
Thus, add this missing field and automatically increase
the implicit size of the driver's priv to avoid whatever
future memory allocations may take place from overwriting
it.
Fixes: de1cf0a9c6 ("drivers: usb: ohci-at91: Enable OHCI functionality and
register into DM")
Signed-off-by: Cristian Birsan
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
drivers/usb/host/ohci-at91.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 43d3ed3bde..b53d80e3f5 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -89,6 +89,7 @@ struct at91_usbh_data {
};
struct ohci_at91_priv {
+ ohci_t ohci;
struct clk *iclk;
struct clk *fclk;
struct clk *hclk;
--
2.34.1
[PATCH 16/18] ARM: dts: at91: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
Add the pinctrl nodes required by the USB related DT nodes.
Signed-off-by: Sergiu Moga
---
arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
index eec183d5de..6d4b35ea96 100644
--- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
@@ -143,7 +143,32 @@
pinmux = ;
bias-pull-up;
};
+
+ pinctrl_usb_default: usb_default {
+ pinmux = ;
+ bias-disable;
+ };
+
+ pinctrl_usba_vbus: usba_vbus {
+ pinmux = ;
+ bias-disable;
+ };
};
};
};
};
+
+ {
+ num-ports = <3>;
+ atmel,vbus-gpio = <0
+ PIN_PA10 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ pinctrl-names = "default";
+ pinctrl-0 = <_usb_default>;
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
--
2.34.1
[PATCH 15/18] ARM: dts: at91: sama5d2_icp: Add pinctrl nodes for USB related DT nodes
Add the pinctrl subnodes required by the USB related DT nodes.
Signed-off-by: Sergiu Moga
---
arch/arm/dts/at91-sama5d2_icp.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts
b/arch/arm/dts/at91-sama5d2_icp.dts
index 2dffae9c5c..4f796c6c94 100644
--- a/arch/arm/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/dts/at91-sama5d2_icp.dts
@@ -154,7 +154,29 @@
;
bias-disable;
};
+
+ pinctrl_usb_default: usb_default {
+ pinmux = ;
+ bias-disable;
+ };
+
+ pinctrl_usba_vbus: usba_vbus {
+ pinmux = ;
+ bias-disable;
+ };
};
};
};
};
+
+ {
+ num-ports = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_usb_default>;
+ status = "okay";
+};
+
+ {
+ phy_type = "hsic";
+ status = "okay";
+};
--
2.34.1
[PATCH 13/18] usb: ohci-at91: Add USB PHY functionality
Add the ability to enable/disable whatever USB PHY's are
passed to the AT91 OHCI driver through DT.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
drivers/usb/host/ohci-at91.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 362ab01c3d..43d3ed3bde 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -73,6 +73,10 @@ int usb_cpu_init_fail(void)
#include
#include "ohci.h"
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+#include
+#endif
+
#define AT91_MAX_USBH_PORTS3
#define at91_for_each_port(index) \
@@ -89,6 +93,10 @@ struct ohci_at91_priv {
struct clk *fclk;
struct clk *hclk;
bool clocked;
+
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ struct phy phy[AT91_MAX_USBH_PORTS];
+#endif
};
static void at91_start_clock(struct ohci_at91_priv *ohci_at91)
@@ -96,6 +104,13 @@ static void at91_start_clock(struct ohci_at91_priv
*ohci_at91)
if (ohci_at91->clocked)
return;
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ int i;
+
+ at91_for_each_port(i)
+ generic_phy_power_on(_at91->phy[i]);
+#endif
+
clk_set_rate(ohci_at91->fclk, 4800);
clk_prepare_enable(ohci_at91->hclk);
clk_prepare_enable(ohci_at91->iclk);
@@ -108,6 +123,13 @@ static void at91_stop_clock(struct ohci_at91_priv
*ohci_at91)
if (!ohci_at91->clocked)
return;
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ int i;
+
+ at91_for_each_port(i)
+ generic_phy_power_off(_at91->phy[i]);
+#endif
+
clk_disable_unprepare(ohci_at91->fclk);
clk_disable_unprepare(ohci_at91->iclk);
clk_disable_unprepare(ohci_at91->hclk);
@@ -213,6 +235,14 @@ static int ohci_atmel_probe(struct udevice *dev)
goto fail;
}
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ at91_for_each_port(i) {
+ generic_phy_get_by_index(dev, i, _at91->phy[i]);
+ generic_phy_init(_at91->phy[i]);
+ generic_phy_configure(_at91->phy[i], NULL);
+ }
+#endif
+
at91_start_hc(dev);
return ohci_register(dev, regs);
@@ -227,6 +257,7 @@ fail:
static const struct udevice_id ohci_usb_ids[] = {
{ .compatible = "atmel,at91rm9200-ohci", },
+ { .compatible = "microchip,sama7g5-ohci", },
{ }
};
--
2.34.1
[PATCH 14/18] configs: at91: sama7: Enable USB and RESET functionality
Enable USB and RESET functionality. In order for USB to work properly on SAMA7, the driver needs to be able to have access to PHY's, which, in turn, need to have access to the RSTC driver's assert/deassert functionalities. Signed-off-by: Sergiu Moga Tested-by: Mihai Sain --- configs/sama7g5ek_mmc1_defconfig | 13 + configs/sama7g5ek_mmc_defconfig | 13 + 2 files changed, 26 insertions(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index f004e44803..afe7676d90 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -78,4 +78,17 @@ CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama7g5ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 +CONFIG_USB_ATMEL=y +CONFIG_PHY=y +CONFIG_PHY_MICROCHIP_SAMA7_USB=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y # CONFIG_EFI_LOADER_HII is not set diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 5b42fc63f3..9865b070be 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -78,4 +78,17 @@ CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sama7g5ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 +CONFIG_USB_ATMEL=y +CONFIG_PHY=y +CONFIG_PHY_MICROCHIP_SAMA7_USB=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y # CONFIG_EFI_LOADER_HII is not set -- 2.34.1
[PATCH 12/18] phy: at91: Add support for the USB 2.0 PHY's of SAMA7
In order to have USB functionality, drivers for SAMA7's
USB 2.0 PHY's have been added. There is one driver
for UTMI clock's SFR and RESET required functionalities and
one for its three possible subclocks of the phy's themselves.
In order for this layout to properly work in conjunction with
CCF and DT, the former driver will also act as a clock provider
for the three phy's with the help of a custom hook into the
driver's of_xlate method.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
drivers/phy/Kconfig | 10 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-sama7-usb.c | 92 ++
drivers/phy/phy-sama7-utmi-clk.c | 202 +++
4 files changed, 305 insertions(+)
create mode 100644 drivers/phy/phy-sama7-usb.c
create mode 100644 drivers/phy/phy-sama7-utmi-clk.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index cf4d5908d7..9fbb956783 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -281,6 +281,16 @@ config PHY_XILINX_ZYNQMP
Enable this to support ZynqMP High Speed Gigabit Transceiver
that is part of ZynqMP SoC.
+config PHY_MICROCHIP_SAMA7_USB
+ tristate "Microchip SAMA7 USB 2.0 PHY"
+ depends on PHY && ARCH_AT91
+ help
+Enable this to support SAMA7 USB 2.0 PHY.
+
+The USB 2.0 PHY integrates high-speed, full-speed and low-speed
+termination and signal switching. With a single resistor, it
+requires minimal external components.
+
source "drivers/phy/rockchip/Kconfig"
source "drivers/phy/cadence/Kconfig"
source "drivers/phy/ti/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a3b9f3c5b1..9d50affd47 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o
+obj-$(CONFIG_PHY_MICROCHIP_SAMA7_USB) += phy-sama7-utmi-clk.o phy-sama7-usb.o
obj-y += cadence/
obj-y += ti/
obj-y += qcom/
diff --git a/drivers/phy/phy-sama7-usb.c b/drivers/phy/phy-sama7-usb.c
new file mode 100644
index 00..b6fe40ecc1
--- /dev/null
+++ b/drivers/phy/phy-sama7-usb.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip USB PHY's.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct sama7_usb_phy {
+ struct clk *uclk;
+ struct regmap *sfr;
+ int port;
+};
+
+int sama7_usb_phy_init(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+ int port = sama7_phy->port;
+
+ regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+ SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X,
+ SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X);
+
+ regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+ SAMA7_SFR_UTMI_RX_VBUS,
+ SAMA7_SFR_UTMI_RX_VBUS);
+
+ return 0;
+}
+
+int sama7_phy_power_on(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+ clk_prepare_enable(sama7_phy->uclk);
+
+ return 0;
+}
+
+int sama7_phy_power_off(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+ clk_disable_unprepare(sama7_phy->uclk);
+
+ return 0;
+}
+
+int sama7_usb_phy_probe(struct udevice *dev)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(dev);
+
+ sama7_phy->uclk = devm_clk_get(dev, "utmi_clk");
+ if (IS_ERR(sama7_phy->uclk))
+ return PTR_ERR(sama7_phy->uclk);
+
+ sama7_phy->sfr = syscon_regmap_lookup_by_phandle(dev, "sfr-phandle");
+ if (IS_ERR(sama7_phy->sfr)) {
+ sama7_phy->sfr = NULL;
+ return PTR_ERR(sama7_phy->sfr);
+ }
+
+ return dev_read_u32(dev, "reg", _phy->port);
+}
+
+static const struct phy_ops sama7_usb_phy_ops = {
+ .init = sama7_usb_phy_init,
+ .power_on = sama7_phy_power_on,
+ .power_off = sama7_phy_power_off,
+};
+
+static const struct udevice_id sama7_usb_phy_of_match[] = {
+ { .compatible = "microchip,sama7g5-usb-phy", },
+ { },
+};
+
+U_BOOT_DRIVER(sama7_usb_phy_driver) = {
+ .name = "sama7-usb-phy",
+ .id = UCLASS_PHY,
+ .of_match = sama7_usb_phy_of_match,
+ .ops = _usb_phy_ops,
+ .probe = sama7_usb_phy_probe,
+ .priv_auto = sizeof(struct sama7_usb_phy),
+};
diff --git a/drivers/phy/phy-sama7-utmi-clk.c b/drivers/phy/phy-sama7-utmi-clk.c
new file mode 100644
index 00..ab9fddccf6
--- /dev/null
+++ b/drivers/phy/phy-sama7-utmi-clk.c
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip USB PHY's.
+ *
+ * Copyright (C)
[PATCH 11/18] reset: at91: Add reset driver for basic assert/deassert operations
Add support for at91 reset controller's basic assert/deassert
operations. Since this driver conflicts with the
SYSRESET driver because they both bind to the same RSTC node,
implement a custom bind hook that would manually bind the
sysreset driver, if enabled, to the same RSTC DT node.
Furthermore, delete the no longer needed compatibles from the
SYSRESET driver and rename it to make sure than any possible
conflicts are avoided.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
drivers/reset/Kconfig| 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-at91.c | 143 +++
drivers/sysreset/sysreset_at91.c | 10 +--
4 files changed, 153 insertions(+), 9 deletions(-)
create mode 100644 drivers/reset/reset-at91.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 4cb0ba0850..e4039d7474 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -211,4 +211,12 @@ config RESET_DRA7
help
Support for TI DRA7-RESET subsystem. Basic Assert/Deassert
is supported.
+
+config RESET_AT91
+ bool "Enable support for Microchip/Atmel Reset Controller driver"
+ depends on DM_RESET && ARCH_AT91
+ help
+ This enables the Reset Controller driver support for Microchip/Atmel
+ SoCs. Mainly used to expose assert/deassert methods to other drivers
+ that require it.
endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0620b62809..6c8b45ecba 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o
obj-$(CONFIG_RESET_DRA7) += reset-dra7.o
+obj-$(CONFIG_RESET_AT91) += reset-at91.o
diff --git a/drivers/reset/reset-at91.c b/drivers/reset/reset-at91.c
new file mode 100644
index 00..ee035a8934
--- /dev/null
+++ b/drivers/reset/reset-at91.c
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip Reset Controller.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct at91_reset {
+ void __iomem *dev_base;
+ struct at91_reset_data *data;
+};
+
+struct at91_reset_data {
+ u32 n_device_reset;
+ u8 device_reset_min_id;
+ u8 device_reset_max_id;
+};
+
+static const struct at91_reset_data sama7g5_data = {
+ .n_device_reset = 3,
+ .device_reset_min_id = SAMA7G5_RESET_USB_PHY1,
+ .device_reset_max_id = SAMA7G5_RESET_USB_PHY3,
+};
+
+static int at91_rst_update(struct at91_reset *reset, unsigned long id,
+ bool assert)
+{
+ u32 val;
+
+ if (!reset->dev_base)
+ return 0;
+
+ val = readl(reset->dev_base);
+ if (assert)
+ val |= BIT(id);
+ else
+ val &= ~BIT(id);
+ writel(val, reset->dev_base);
+
+ return 0;
+}
+
+static int at91_reset_of_xlate(struct reset_ctl *reset_ctl,
+ struct ofnode_phandle_args *args)
+{
+ struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+ if (!reset->data->n_device_reset ||
+ args->args[0] < reset->data->device_reset_min_id ||
+ args->args[0] > reset->data->device_reset_max_id)
+ return -EINVAL;
+
+ reset_ctl->id = args->args[0];
+
+ return 0;
+}
+
+static int at91_rst_assert(struct reset_ctl *reset_ctl)
+{
+ struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+ return at91_rst_update(reset, reset_ctl->id, true);
+}
+
+static int at91_rst_deassert(struct reset_ctl *reset_ctl)
+{
+ struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+ return at91_rst_update(reset, reset_ctl->id, false);
+}
+
+struct reset_ops at91_reset_ops = {
+ .of_xlate = at91_reset_of_xlate,
+ .rst_assert = at91_rst_assert,
+ .rst_deassert = at91_rst_deassert,
+};
+
+static int at91_reset_probe(struct udevice *dev)
+{
+ struct at91_reset *reset = dev_get_priv(dev);
+ struct clk sclk;
+ int ret;
+
+ reset->data = (struct at91_reset_data *)dev_get_driver_data(dev);
+ reset->dev_base = dev_remap_addr_index(dev, 1);
+ if (reset->data && reset->data->n_device_reset && !reset->dev_base)
+ return -EINVAL;
+
+ ret = clk_get_by_index(dev, 0, );
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable();
+
+ return ret;
+}
+
+static int at91_reset_bind(struct udevice *dev)
+{
+ struct udevice *at91_sysreset;
+
+ if (CONFIG_IS_ENABLED(SYSRESET_AT91))
+ return device_bind_driver_to_node(dev, "at91_sysreset",
+ "at91_sysreset",
+
[PATCH 10/18] ARM: at91: add sama7 SFR definitions
From: Cristian Birsan Special Function Registers(SFR) definitions for SAMA7 product family. Signed-off-by: Cristian Birsan Signed-off-by: Sergiu Moga --- arch/arm/mach-at91/include/mach/sama7-sfr.h | 59 + 1 file changed, 59 insertions(+) create mode 100644 arch/arm/mach-at91/include/mach/sama7-sfr.h diff --git a/arch/arm/mach-at91/include/mach/sama7-sfr.h b/arch/arm/mach-at91/include/mach/sama7-sfr.h new file mode 100644 index 00..a987ff5465 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/sama7-sfr.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Microchip SFR (Special Function Registers) registers for SAMA7 family. + * + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries + * + * Author: Cristian Birsan + */ + +#ifndef _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H +#define _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H + +#define SAMA7_SFR_OHCIICR 0x00/* OHCI INT Configuration Register */ +#define SAMA7_SFR_OHCIISR 0x04/* OHCI INT Status Register */ +/* 0x08 ~ 0xe3: Reserved */ +#define SAMA7_SFR_WPMR 0xe4/* Write Protection Mode Register */ +#define SAMA7_SFR_WPSR 0xe4/* Write Protection Status Register */ +/* 0xec ~ 0x200b: Reserved */ +#define SAMA7_SFR_DEBUG0x200c /* Debug Register */ + +/* 0x2010 ~ 0x2027: Reserved */ +#define SAMA7_SFR_EHCIOHCI 0x2020 /* EHCI OHCI Clock Configuration Reg */ + +#define SAMA7_SFR_HSS_AXI_QOS 0x2028 /* HSS AXI QOS Register */ +#define SAMA7_SFR_UDDRC0x202c /* UDDRC Register */ +#define SAMA7_SFR_CAN_SRAM_SEL 0x2030 /* CAN SRAM Select. Register */ +/* 0x2034 ~ 0x203f: Reserved */ + +#define SAMA7_SFR_UTMI00x2040 +#define SAMA7_SFR_UTMI0R(x)(SAMA7_SFR_UTMI0 + 4 * (x)) + +#define SAMA7_SFR_UTMI0R0 0x2040 /* UTMI0 Configuration Register */ +#define SAMA7_SFR_UTMI0R1 0x2044 /* UTMI1 Configuration Register */ +#define SAMA7_SFR_UTMI0R2 0x2048 /* UTMI2 Configuration Register */ + +/* Field definitions */ +#define SAMA7_SFR_OHCIICR_ARIE BIT(0) +#define SAMA7_SFR_OHCIICR_APPSTART BIT(1) +#define SAMA7_SFR_OHCIICR_USB_SUSP(x) BIT(8 + (x)) +#define SAMA7_SFR_OHCIICR_USB_SUSPEND GENMASK(10, 8) + +#define SAMA7_SFR_OHCIISR_RIS(x) BIT(x) + +#define SAMA7_SFR_WPMR_WPENBIT(0) +#define SAMA7_SFR_WPMR_KEY 0x53465200 /* SFR in ASCII*/ +#define SAMA7_SFR_WPMR_WPKEY_MASK GENMASK(31, 8) + +#define SAMA7_SFR_WPSR_WPSRC_MASK GENMASK(23, 8) +#define SAMA7_SFR_WPSR_WPVS_MASK BIT(0) + +#define SAMA7_SFR_CAN_SRAM_UPPER(x)BIT(x) + +#define SAMA7_SFR_UTMI_RX_VBUS BIT(25) /* VBUS Valid bit */ +#define SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X BIT(23) /* TXPREEMPAMPTUNE 1x */ +#define SAMA7_SFR_UTMI_COMMONONBIT(3) /* PLL Common ON bit */ + +#define SAMA7_SFR_EHCIOHCI_PHYCLK BIT(1) /* Alternate PHY Clk */ + +#endif /* _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H */ -- 2.34.1
[PATCH 09/18] ARM: dts: at91: sama7: Add USB related DT nodes
Add the USB related DT nodes for the sama7g5ek board.
Signed-off-by: Sergiu Moga
---
arch/arm/dts/at91-sama7g5ek.dts | 34 +++
arch/arm/dts/sama7g5.dtsi | 73 +
2 files changed, 107 insertions(+)
diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts
index 9b247fcaf6..31adc4d3e7 100644
--- a/arch/arm/dts/at91-sama7g5ek.dts
+++ b/arch/arm/dts/at91-sama7g5ek.dts
@@ -761,6 +761,11 @@
pinmux = ;
bias-disable;
};
+
+ pinctrl_usb_default: usb_default {
+ pinmux = ;
+ bias-disable;
+ };
};
{
@@ -837,6 +842,35 @@
status = "okay";
};
+ {
+ num-ports = <3>;
+ atmel,vbus-gpio = <0
+ 0
+ PIN_PC6 GPIO_ACTIVE_HIGH
+ >;
+ pinctrl-names = "default";
+ pinctrl-0 = <_usb_default>;
+ phys = <_phy2>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+_phy0 {
+ status = "okay";
+};
+
+_phy1 {
+ status = "okay";
+};
+
+_phy2 {
+ status = "okay";
+};
+
{
vin-supply = <_3v3>;
status = "okay";
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 6388a60e53..a6521aaa82 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -16,6 +16,8 @@
#include
#include
#include
+#include
+#include
/ {
model = "Microchip SAMA7G5 family SoC";
@@ -103,6 +105,54 @@
};
};
+ utmi_clk: utmi-clk {
+ compatible = "microchip,sama7g5-utmi-clk";
+ sfr-phandle = <>;
+ #clock-cells = <1>;
+ clocks = < PMC_TYPE_CORE 27>;
+ clock-names = "utmi_clk";
+ resets = <_controller SAMA7G5_RESET_USB_PHY1>,
+<_controller SAMA7G5_RESET_USB_PHY2>,
+<_controller SAMA7G5_RESET_USB_PHY3>;
+ reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
+ };
+
+ utmi {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb_phy0: phy@0 {
+ compatible = "microchip,sama7g5-usb-phy";
+ sfr-phandle = <>;
+ reg = <0>;
+ clocks = <_clk UTMI1>;
+ clock-names = "utmi_clk";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb_phy1: phy@1 {
+ compatible = "microchip,sama7g5-usb-phy";
+ sfr-phandle = <>;
+ reg = <1>;
+ clocks = <_clk UTMI2>;
+ clock-names = "utmi_clk";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb_phy2: phy@2 {
+ compatible = "microchip,sama7g5-usb-phy";
+ sfr-phandle = <>;
+ reg = <2>;
+ clocks = <_clk UTMI3>;
+ clock-names = "utmi_clk";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
+
vddout25: fixed-regulator-vddout25 {
compatible = "regulator-fixed";
@@ -127,6 +177,24 @@
#size-cells = <1>;
ranges;
+ usb2: ohci@40 {
+ compatible = "microchip,sama7g5-ohci", "usb-ohci";
+ reg = <0x0040 0x10>;
+ interrupts = ;
+ clocks = < PMC_TYPE_PERIPHERAL 106>, <_clk
UTMI1>, <_clk>;
+ clock-names = "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+
+ usb3: ehci@50 {
+ compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+ reg = <0x0050 0x10>;
+ interrupts = ;
+ clocks = <_clk>, < PMC_TYPE_PERIPHERAL 106>;
+ clock-names = "usb_clk", "ehci_clk";
+ status = "disabled";
+ };
+
nfc_sram: sram@60 {
compatible = "mmio-sram";
no-memory-wc;
@@ -559,6 +627,11 @@
status = "disabled";
};
+ sfr: sfr@e1624000 {
+ compatible = "microchip,sama7g5-sfr", "syscon";
+ reg = <0xe1624000 0x4000>;
+ };
+
eic: interrupt-controller@e1628000 {
compatible = "microchip,sama7g5-eic";
reg = <0xe1628000 0xec>;
--
2.34.1
[PATCH 08/18] dt-bindings: clk: at91: Define additional UTMI related clocks
Add definitions for an additional main UTMI clock as well as its respective subclocks. Signed-off-by: Sergiu Moga --- include/dt-bindings/clk/at91.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clk/at91.h index e30756b280..386f01cf31 100644 --- a/include/dt-bindings/clk/at91.h +++ b/include/dt-bindings/clk/at91.h @@ -18,5 +18,10 @@ #define PMC_TYPE_PERIPHERAL3 #define PMC_TYPE_GCK 4 #define PMC_TYPE_SLOW 5 +#define UTMI 6 + +#define UTMI1 0 +#define UTMI2 1 +#define UTMI3 2 #endif -- 2.34.1
[PATCH 07/18] dt-bindings: reset: add sama7g5 definitions
Upstream linux commit 5994f58977e0. Add reset bindings for SAMA7G5. At the moment only USB PHYs are included. Signed-off-by: Sergiu Moga --- include/dt-bindings/reset/sama7g5-reset.h | 10 ++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 00..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H + +#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6 + +#endif /* __DT_BINDINGS_RESET_SAMA7G5_H */ -- 2.34.1
[PATCH 06/18] configs: at91: sam9x60ek: Add required configs for the USB command
Add the configs required to use the USB-related functionalities within the bootloader. Signed-off-by: Sergiu Moga --- configs/sam9x60ek_mmc_defconfig | 10 ++ configs/sam9x60ek_nandflash_defconfig | 10 ++ configs/sam9x60ek_qspiflash_defconfig | 10 ++ 3 files changed, 30 insertions(+) diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 268a485456..79780b6689 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -59,6 +59,7 @@ CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_AT91_SAM9X60_USB=y CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y @@ -100,3 +101,12 @@ CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y CONFIG_W1_EEPROM_DS24XXX=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sam9x60ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index a9cbb6e953..13774f0764 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -61,6 +61,7 @@ CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_AT91_SAM9X60_USB=y CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y @@ -102,3 +103,12 @@ CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y CONFIG_W1_EEPROM_DS24XXX=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sam9x60ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 72f08f1375..587d0da20f 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -61,6 +61,7 @@ CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_AT91_SAM9X60_USB=y CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y @@ -101,3 +102,12 @@ CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y CONFIG_W1_EEPROM_DS24XXX=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="sam9x60ek" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y -- 2.34.1
[PATCH 05/18] usb: ohci-at91: Enable OHCI functionality and register into DM
Register the OHCI driver into DM by properly initializing the required
clocks and pins required by the DT node of OHCI. In order for the VBUS
to stay enabled, a `child_pre_probe` method has been added to overcome
the DM core disabling it in `usb_scan_device`: when the generic
`device_probe` method is called, the pinctrl is processed once again,
undoing whatever changes have been made in our driver's probe method.
Signed-off-by: Sergiu Moga
---
drivers/usb/host/ohci-at91.c | 182 +++
1 file changed, 182 insertions(+)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 9b955c1bd6..362ab01c3d 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -7,6 +7,8 @@
#include
#include
+#if !(CONFIG_IS_ENABLED(DM_USB))
+
int usb_cpu_init(void)
{
#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
@@ -62,3 +64,183 @@ int usb_cpu_init_fail(void)
{
return usb_cpu_stop();
}
+
+#elif CONFIG_IS_ENABLED(DM_GPIO)
+
+#include
+#include
+#include
+#include
+#include "ohci.h"
+
+#define AT91_MAX_USBH_PORTS3
+
+#define at91_for_each_port(index) \
+ for ((index) = 0; (index) < AT91_MAX_USBH_PORTS; (index)++)
+
+struct at91_usbh_data {
+ enum usb_init_type init_type;
+ struct gpio_desc vbus_pin[AT91_MAX_USBH_PORTS];
+ u8 ports; /* number of ports on root hub
*/
+};
+
+struct ohci_at91_priv {
+ struct clk *iclk;
+ struct clk *fclk;
+ struct clk *hclk;
+ bool clocked;
+};
+
+static void at91_start_clock(struct ohci_at91_priv *ohci_at91)
+{
+ if (ohci_at91->clocked)
+ return;
+
+ clk_set_rate(ohci_at91->fclk, 4800);
+ clk_prepare_enable(ohci_at91->hclk);
+ clk_prepare_enable(ohci_at91->iclk);
+ clk_prepare_enable(ohci_at91->fclk);
+ ohci_at91->clocked = true;
+}
+
+static void at91_stop_clock(struct ohci_at91_priv *ohci_at91)
+{
+ if (!ohci_at91->clocked)
+ return;
+
+ clk_disable_unprepare(ohci_at91->fclk);
+ clk_disable_unprepare(ohci_at91->iclk);
+ clk_disable_unprepare(ohci_at91->hclk);
+ ohci_at91->clocked = false;
+}
+
+static void ohci_at91_set_power(struct at91_usbh_data *pdata, int port,
+ bool enable)
+{
+ if (!dm_gpio_is_valid(>vbus_pin[port]))
+ return;
+
+ if (enable)
+ dm_gpio_set_dir_flags(>vbus_pin[port],
+ GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+ else
+ dm_gpio_set_dir_flags(>vbus_pin[port], 0);
+}
+
+static void at91_start_hc(struct udevice *dev)
+{
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+ at91_start_clock(ohci_at91);
+}
+
+static void at91_stop_hc(struct udevice *dev)
+{
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+ at91_stop_clock(ohci_at91);
+}
+
+static int ohci_atmel_deregister(struct udevice *dev)
+{
+ struct at91_usbh_data *pdata = dev_get_plat(dev);
+ int i;
+
+ at91_stop_hc(dev);
+
+ at91_for_each_port(i) {
+ if (i >= pdata->ports)
+ break;
+
+ ohci_at91_set_power(pdata, i, false);
+ }
+
+ return ohci_deregister(dev);
+}
+
+static int ohci_atmel_child_pre_probe(struct udevice *dev)
+{
+ struct udevice *ohci_controller = dev_get_parent(dev);
+ struct at91_usbh_data *pdata = dev_get_plat(ohci_controller);
+ int i;
+
+ at91_for_each_port(i) {
+ if (i >= pdata->ports)
+ break;
+
+ ohci_at91_set_power(pdata, i, true);
+ }
+
+ return 0;
+}
+
+static int ohci_atmel_probe(struct udevice *dev)
+{
+ struct at91_usbh_data *pdata = dev_get_plat(dev);
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+ int i;
+ int ret;
+ u32 ports;
+ struct ohci_regs *regs = (struct ohci_regs *)dev_read_addr(dev);
+
+ if (!dev_read_u32(dev, "num-ports", ))
+ pdata->ports = ports;
+
+ at91_for_each_port(i) {
+ if (i >= pdata->ports)
+ break;
+
+ gpio_request_by_name(dev, "atmel,vbus-gpio", i,
+>vbus_pin[i], GPIOD_IS_OUT |
+GPIOD_IS_OUT_ACTIVE);
+ }
+
+ ohci_at91->iclk = devm_clk_get(dev, "ohci_clk");
+ if (IS_ERR(ohci_at91->iclk)) {
+ ret = PTR_ERR(ohci_at91->iclk);
+ goto fail;
+ }
+
+ ohci_at91->fclk = devm_clk_get(dev, "uhpck");
+ if (IS_ERR(ohci_at91->fclk)) {
+ ret = PTR_ERR(ohci_at91->fclk);
+ goto fail;
+ }
+
+ ohci_at91->hclk = devm_clk_get(dev, "hclk");
+ if (IS_ERR(ohci_at91->hclk)) {
+ ret = PTR_ERR(ohci_at91->hclk);
+
[PATCH 04/18] clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates
In order for some of the functionalities, such as the USB clocks,
to work properly we need some clocks to be properly initialised
at the very beginning of booting.
Signed-off-by: Sergiu Moga
---
drivers/clk/at91/sam9x60.c | 62 +-
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index eaf70c4668..4336148f73 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -380,6 +380,36 @@ static const struct {
{ .n = "dbgu_gclk", .id = 47, },
};
+/**
+ * Clock setup description
+ * @cid: clock id corresponding to clock subsystem
+ * @pid: parent clock id corresponding to clock subsystem
+ * @rate: clock rate
+ * @prate: parent rate
+ */
+static const struct pmc_clk_setup {
+ unsigned int cid;
+ unsigned int pid;
+ unsigned long rate;
+ unsigned long prate;
+} sam9x60_clk_setup[] = {
+ {
+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_FRAC),
+ .rate = 96000,
+ },
+
+ {
+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
+ .rate = 48000,
+ },
+
+ {
+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK),
+ .pid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
+ .rate = 4800,
+ },
+};
+
#define prepare_mux_table(_allocs, _index, _dst, _src, _num, _label) \
do {\
int _i; \
@@ -399,7 +429,7 @@ static int sam9x60_clk_probe(struct udevice *dev)
unsigned int *clkmuxallocs[64], *muxallocs[64];
const char *p[10];
unsigned int cm[10], m[10], *tmpclkmux, *tmpmux;
- struct clk clk, *c;
+ struct clk clk, *c, *parent;
int ret, muxallocindex = 0, clkmuxallocindex = 0, i;
static const struct clk_range r = { 0, 0 };
@@ -672,6 +702,36 @@ static int sam9x60_clk_probe(struct udevice *dev)
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_GCK, sam9x60_gck[i].id), c);
}
+ /* Setup clocks. */
+ for (i = 0; i < ARRAY_SIZE(sam9x60_clk_setup); i++) {
+ ret = clk_get_by_id(sam9x60_clk_setup[i].cid, );
+ if (ret)
+ goto fail;
+
+ if (sam9x60_clk_setup[i].pid) {
+ ret = clk_get_by_id(sam9x60_clk_setup[i].pid, );
+ if (ret)
+ goto fail;
+
+ ret = clk_set_parent(c, parent);
+ if (ret)
+ goto fail;
+
+ if (sam9x60_clk_setup[i].prate) {
+ ret = clk_set_rate(parent,
+ sam9x60_clk_setup[i].prate);
+ if (ret < 0)
+ goto fail;
+ }
+ }
+
+ if (sam9x60_clk_setup[i].rate) {
+ ret = clk_set_rate(c, sam9x60_clk_setup[i].rate);
+ if (ret < 0)
+ goto fail;
+ }
+ }
+
return 0;
fail:
--
2.34.1
[PATCH 03/18] clk: at91: sam9x60: Register the required clocks for USB
Register into DM the clocks required to properly enable USB functionality
within the bootloader.
Signed-off-by: Sergiu Moga
---
drivers/clk/at91/sam9x60.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 6b5486c6c9..eaf70c4668 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -76,6 +76,8 @@ enum pmc_clk_ids {
ID_QSPI = 18,
ID_MCK_PRES = 19,
+ ID_USBCK= 20,
+ ID_UHPCK= 21,
ID_MAX,
};
@@ -99,6 +101,7 @@ static const char *clk_names[] = {
[ID_PLL_A_DIV] = "plla_divpmcck",
[ID_MCK_PRES] = "mck_pres",
[ID_MCK_DIV]= "mck_div",
+ [ID_USBCK] = "usbck",
};
/* Fractional PLL output range. */
@@ -171,6 +174,15 @@ static const struct clk_pcr_layout pcr_layout = {
.pid_mask = GENMASK(6, 0),
};
+#if CONFIG_IS_ENABLED(AT91_SAM9X60_USB)
+/* USB clock layout */
+static const struct clk_usbck_layout usbck_layout = {
+ .offset = 0x38,
+ .usbs_mask = GENMASK(1, 0),
+ .usbdiv_mask = GENMASK(11, 8),
+};
+#endif
+
/**
* PLL clocks description
* @n: clock name
@@ -266,6 +278,7 @@ static const struct {
u8 cid;
} sam9x60_systemck[] = {
{ .n = "ddrck", .p = "mck_div", .id = 2, .cid = ID_DDR, },
+ { .n = "uhpck", .p = "usbck",.id = 6, .cid = ID_UHPCK },
{ .n = "pck0", .p = "prog0",.id = 8, .cid = ID_PCK0, },
{ .n = "pck1", .p = "prog1",.id = 9, .cid = ID_PCK1, },
{ .n = "qspick",.p = "mck_div", .id = 19, .cid = ID_QSPI, },
@@ -543,6 +556,30 @@ static int sam9x60_clk_probe(struct udevice *dev)
}
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV), c);
+#if CONFIG_IS_ENABLED(AT91_SAM9X60_USB)
+ /* Register usbck. */
+ p[0] = clk_names[ID_PLL_A_DIV];
+ p[1] = clk_names[ID_PLL_U_DIV];
+ p[2] = clk_names[ID_MAIN_XTAL];
+ m[0] = 0;
+ m[1] = 1;
+ m[2] = 2;
+ cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV);
+ cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
+ cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAIN_XTAL);
+ prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm,
+ 3, fail);
+ prepare_mux_table(muxallocs, muxallocindex, tmpmux, m, 3, fail);
+ c = sam9x60_clk_register_usb(base, clk_names[ID_USBCK], p, 3,
+_layout, tmpclkmux, tmpmux,
+ID_USBCK);
+ if (IS_ERR(c)) {
+ ret = PTR_ERR(c);
+ goto fail;
+ }
+ clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK), c);
+#endif
+
/* Register programmable clocks. */
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
--
2.34.1
[PATCH 01/18] ARM: dts: sam9x60ek: Add OHCI and EHCI DT nodes
Add the OHCI and EHCI DT nodes for the sam9x60 board.
Signed-off-by: Sergiu Moga
---
arch/arm/dts/sam9x60.dtsi | 18 ++
arch/arm/dts/sam9x60ek.dts | 21 +
2 files changed, 39 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 17224ef771..e36a540f78 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -69,6 +69,24 @@
#size-cells = <1>;
ranges;
+ usb1: ohci@60 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x0060 0x10>;
+ clocks = < PMC_TYPE_PERIPHERAL 22>, <
PMC_TYPE_PERIPHERAL 22>, < PMC_TYPE_SYSTEM 21>;
+ clock-names = "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+
+ usb2: ehci@70 {
+ compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+ reg = <0x0070 0x10>;
+ clocks = < PMC_TYPE_CORE 8>, <
PMC_TYPE_PERIPHERAL 22>;
+ clock-names = "usb_clk", "ehci_clk";
+ assigned-clocks = < PMC_TYPE_CORE 8>;
+ assigned-clock-rates = <48000>;
+ status = "disabled";
+ };
+
ebi: ebi@1000 {
compatible = "microchip,sam9x60-ebi";
#address-cells = <2>;
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 1a02e2cb79..45e2f4cc40 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -139,6 +139,13 @@
;
};
+ usb1 {
+ pinctrl_usb_default: usb_default {
+ atmel,pins = ;
+ };
+ };
+
};
};
};
@@ -213,3 +220,17 @@
phy-mode = "rmii";
status = "okay";
};
+
+ {
+ num-ports = <3>;
+ atmel,vbus-gpio = <0
+ 15 GPIO_ACTIVE_HIGH
+ 16 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_usb_default>;
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
--
2.34.1
[PATCH 02/18] clk: at91: Add support for sam9x60 USB clock
Implement sam9x60 USB clock driver. This clock has
three parents: PLLA, UPLL and MAINXTAL. The driver is
aware of the three possible parents with the help of the
two mux tables provied to the driver during the registration
of the clock.
Signed-off-by: Sergiu Moga
---
drivers/clk/at91/Kconfig | 7 ++
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-sam9x60-usb.c | 156 +
drivers/clk/at91/pmc.h | 11 ++
4 files changed, 175 insertions(+)
create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c
diff --git a/drivers/clk/at91/Kconfig b/drivers/clk/at91/Kconfig
index 4abc8026b4..4563892647 100644
--- a/drivers/clk/at91/Kconfig
+++ b/drivers/clk/at91/Kconfig
@@ -61,3 +61,10 @@ config AT91_SAM9X60_PLL
help
This option is used to enable the AT91 SAM9X60's PLL clock
driver.
+
+config AT91_SAM9X60_USB
+ bool "USB Clock support for SAM9X60 SoCs"
+ depends on CLK_AT91
+ help
+ This option is used to enable the AT91 SAM9X60's USB clock
+ driver.
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 580b406d7b..e53dcb4ca7 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -9,6 +9,7 @@ obj-y += clk-peripheral.o
obj-$(CONFIG_AT91_GENERIC_CLK) += clk-generic.o
obj-$(CONFIG_AT91_UTMI)+= clk-utmi.o
obj-$(CONFIG_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o
+obj-$(CONFIG_AT91_SAM9X60_USB) += clk-sam9x60-usb.o
obj-$(CONFIG_SAMA7G5) += sama7g5.o
obj-$(CONFIG_SAM9X60) += sam9x60.o
else
diff --git a/drivers/clk/at91/clk-sam9x60-usb.c
b/drivers/clk/at91/clk-sam9x60-usb.c
new file mode 100644
index 00..0ccdc1494d
--- /dev/null
+++ b/drivers/clk/at91/clk-sam9x60-usb.c
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SAM9X60's USB Clock support.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga
+ */
+
+#include
+#include
+#include
+
+#include "pmc.h"
+
+#define UBOOT_DM_CLK_AT91_SAM9X60_USB "at91-sam9x60-usb-clk"
+
+struct sam9x60_usb {
+ const struct clk_usbck_layout *layout;
+ void__iomem *base;
+ struct clk clk;
+ const u32 *clk_mux_table;
+ const u32 *mux_table;
+ const char * const *parent_names;
+ u32 num_parents;
+ u8 id;
+};
+
+#define to_sam9x60_usb(_clk) container_of(_clk, struct sam9x60_usb, clk)
+#define USB_MAX_DIV15
+
+static int sam9x60_usb_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+ u32 val, index;
+
+ index = at91_clk_mux_val_to_index(usb->clk_mux_table, usb->num_parents,
+ parent->id);
+ if (index < 0)
+ return index;
+
+ index = at91_clk_mux_index_to_val(usb->mux_table, usb->num_parents,
+ index);
+ if (index < 0)
+ return index;
+
+ pmc_read(usb->base, usb->layout->offset, );
+ val &= ~usb->layout->usbs_mask;
+ val |= index << (ffs(usb->layout->usbs_mask - 1));
+ pmc_write(usb->base, usb->layout->offset, val);
+
+ return 0;
+}
+
+static ulong sam9x60_usb_clk_get_rate(struct clk *clk)
+{
+ struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+ ulong parent_rate = clk_get_parent_rate(clk);
+ u32 val, usbdiv;
+
+ if (!parent_rate)
+ return 0;
+
+ pmc_read(usb->base, usb->layout->offset, );
+ usbdiv = (val & usb->layout->usbdiv_mask) >>
+ (ffs(usb->layout->usbdiv_mask) - 1);
+ return parent_rate / (usbdiv + 1);
+}
+
+static ulong sam9x60_usb_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+ ulong parent_rate = clk_get_parent_rate(clk);
+ u32 usbdiv, val;
+
+ if (!parent_rate)
+ return 0;
+
+ usbdiv = DIV_ROUND_CLOSEST(parent_rate, rate);
+ if (usbdiv > USB_MAX_DIV + 1 || !usbdiv)
+ return 0;
+
+ pmc_read(usb->base, usb->layout->offset, );
+ val &= usb->layout->usbdiv_mask;
+ val |= (usbdiv - 1) << (ffs(usb->layout->usbdiv_mask) - 1);
+ pmc_write(usb->base, usb->layout->offset, val);
+
+ return parent_rate / usbdiv;
+}
+
+static const struct clk_ops sam9x60_usb_ops = {
+ .set_parent = sam9x60_usb_clk_set_parent,
+ .set_rate = sam9x60_usb_clk_set_rate,
+ .get_rate = sam9x60_usb_clk_get_rate,
+};
+
+struct clk *
+sam9x60_clk_register_usb(void __iomem *base, const char *name,
+const char * const *parent_names, u8 num_parents,
+const struct
[PATCH 00/18] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
This series of patches is meant to add support for USB Mass Storage on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into Driver Model. In order for this to be achieved, the respective DT nodes have been added, the USB clock has been registered into CCF and the required defconfigs have been added to the boards' defconfig. What is more, in order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY drivers were required. Cristian Birsan (2): ARM: at91: add sama7 SFR definitions usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv` Sergiu Moga (16): ARM: dts: sam9x60ek: Add OHCI and EHCI DT nodes clk: at91: Add support for sam9x60 USB clock clk: at91: sam9x60: Register the required clocks for USB clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates usb: ohci-at91: Enable OHCI functionality and register into DM configs: at91: sam9x60ek: Add required configs for the USB command dt-bindings: reset: add sama7g5 definitions dt-bindings: clk: at91: Define additional UTMI related clocks ARM: dts: at91: sama7: Add USB related DT nodes reset: at91: Add reset driver for basic assert/deassert operations phy: at91: Add support for the USB 2.0 PHY's of SAMA7 usb: ohci-at91: Add USB PHY functionality configs: at91: sama7: Enable USB and RESET functionality ARM: dts: at91: sama5d2_icp: Add pinctrl nodes for USB related DT nodes ARM: dts: at91: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes configs: at91: sama5d2: Enable OHCI/EHCI related configs arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 ++ arch/arm/dts/at91-sama5d2_icp.dts | 22 ++ arch/arm/dts/at91-sama7g5ek.dts | 34 +++ arch/arm/dts/sam9x60.dtsi | 18 ++ arch/arm/dts/sam9x60ek.dts| 21 ++ arch/arm/dts/sama7g5.dtsi | 73 ++ arch/arm/mach-at91/include/mach/sama7-sfr.h | 59 + configs/sam9x60ek_mmc_defconfig | 10 + configs/sam9x60ek_nandflash_defconfig | 10 + configs/sam9x60ek_qspiflash_defconfig | 10 + configs/sama5d27_som1_ek_mmc1_defconfig | 5 + configs/sama5d27_som1_ek_mmc_defconfig| 5 + configs/sama5d27_som1_ek_qspiflash_defconfig | 5 + configs/sama5d27_wlsom1_ek_mmc_defconfig | 6 + .../sama5d27_wlsom1_ek_qspiflash_defconfig| 5 + configs/sama5d2_icp_mmc_defconfig | 9 + configs/sama5d2_icp_qspiflash_defconfig | 9 + configs/sama5d2_ptc_ek_mmc_defconfig | 5 + configs/sama5d2_ptc_ek_nandflash_defconfig| 5 + configs/sama5d2_xplained_emmc_defconfig | 5 + configs/sama5d2_xplained_mmc_defconfig| 5 + configs/sama5d2_xplained_qspiflash_defconfig | 5 + configs/sama5d2_xplained_spiflash_defconfig | 5 + configs/sama7g5ek_mmc1_defconfig | 13 ++ configs/sama7g5ek_mmc_defconfig | 13 ++ drivers/clk/at91/Kconfig | 7 + drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-sam9x60-usb.c| 156 + drivers/clk/at91/pmc.h| 11 + drivers/clk/at91/sam9x60.c| 99 +++- drivers/phy/Kconfig | 10 + drivers/phy/Makefile | 1 + drivers/phy/phy-sama7-usb.c | 92 drivers/phy/phy-sama7-utmi-clk.c | 202 + drivers/reset/Kconfig | 8 + drivers/reset/Makefile| 1 + drivers/reset/reset-at91.c| 143 drivers/sysreset/sysreset_at91.c | 10 +- drivers/usb/host/ohci-at91.c | 214 ++ include/dt-bindings/clk/at91.h| 5 + include/dt-bindings/reset/sama7g5-reset.h | 10 + 41 files changed, 1342 insertions(+), 10 deletions(-) create mode 100644 arch/arm/mach-at91/include/mach/sama7-sfr.h create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c create mode 100644 drivers/phy/phy-sama7-usb.c create mode 100644 drivers/phy/phy-sama7-utmi-clk.c create mode 100644 drivers/reset/reset-at91.c create mode 100644 include/dt-bindings/reset/sama7g5-reset.h -- 2.34.1
Re: [PATCH 0/4] Synquacer DT schema fixes
Hi Rob, Ilias, On Wed, 7 Dec 2022 at 15:58, Ilias Apalodimas wrote: > > Hi Rob > > On Tue, 6 Dec 2022 at 18:16, Rob Herring wrote: > > > > This is a series of DT fixes for the Synquacer. These issues were found > > running the dtschema tools. > > > > I don't have a board, but Ilias has tested the changes for me. Thanks! > > I did and fwiw for the series > Tested-by: Ilias Apalodimas > Reviewed-by: Ilias Apalodimas > > but I'd prefer having someone from Socionext config that. Kojima-san > does it look ok to you as well? I have checked and tested this series and everything is fine. Thank you for the modification. Regards, Masahisa Kojima > > Regards > /Ilias > > > > Signed-off-by: Rob Herring > > > > --- > > Rob Herring (4): > > dts: synquacer: Drop CPU 'arm,armv8' compatibles > > dts: synquacer: Use generic node names > > dts: synquacer: Fix "arm,armv7-timer-mem" node address sizes > > dts: synquacer: Fix idle-states 'entry-method' value > > > > .../dts/synquacer-sc2a11-developerbox-u-boot.dtsi | 2 +- > > arch/arm/dts/synquacer-sc2a11-developerbox.dts | 2 +- > > arch/arm/dts/synquacer-sc2a11.dtsi | 70 > > +++--- > > 3 files changed, 37 insertions(+), 37 deletions(-) > > --- > > base-commit: bebb393b340295edb9ba50a996fc0510cd1b6ac0 > > change-id: 20221206-synquacer-dts-521500f88a1d > > > > Best regards, > > -- > > Rob Herring
Re: [PATCH v5 3/3] board: qemu-riscv: enable semihosting
Hi Leo, Thanks! I have sent a v6 of this patchset wherein I have rebased the patchset on the latest master. I have removed the last patch with default config options for qemu-riscv64 targets and have replaced it with a patch with Sean's suggestion for adding to the dependencies. Thanks again. On Wed, Dec 7, 2022 at 12:31 PM Leo Liang wrote: > > Hi Kautuk, > > On Tue, Dec 06, 2022 at 05:02:49PM +0530, Kautuk Consul wrote: > > Hi Leo, > > > > On Tue, Dec 6, 2022 at 4:29 PM Leo Liang wrote: > > > > > > Hi Kautuk, > > > > > > We have tested your patchset with QEMU 7.1.0. > > > It generally looks fine, but CI error seems to persist. > > > https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/14314 > > > > > > The error comes from CI testcase timed-out. > > > The reason for the time-out is not yet confirmed, > > > but we suspect it's because when executing under semihosting, > > > QEMU could not exit normally. (thru ctrl+x a) > > > > > > There is a seemingly relevent patchset that sits on QEMU mailing list for > > > some time. > > > https://lore.kernel.org/all/20220620190834.ga16...@ws2101.lin.mbt.kalray.eu/T/#m1bc32cc32511b6ac8adfaf67983dc2bccd4b9ec9 > > > > > > On the u-boot side, what do you think if we disable semihosting by > > > default? > > > (i.e., not adding CONFIG_SEMIHOSTING_XXX in qemu's defconfig) > > > > I think it is okay to disable semihosting by default. Then the user > > will configure it when needed. > > So then can you ACK the first 2 patches ? I think we can leave out the > > 3rd qemu config patch for now. > > > > No problem! > Additionally, could you rebase the patchset to current master, > add what Sean suggested, and then send again? > I think I could merge your patch as soon as you re-send it. > > Best regards, > Leo > > > > > > > Best regards, > > > Leo > > > > > > On Tue, Dec 06, 2022 at 11:12:41AM +0530, Kautuk Consul wrote: > > > > Hi, > > > > > > > > On Mon, Dec 5, 2022 at 8:46 PM Sean Anderson > > > > wrote: > > > > > > > > > > On 12/5/22 00:51, Kautuk Consul wrote: > > > > > > Hi, > > > > > > > > > > > > On Sat, Dec 3, 2022 at 9:44 AM Bin Meng wrote: > > > > > >> > > > > > >> On Fri, Sep 23, 2022 at 3:03 PM Kautuk Consul > > > > > >> wrote: > > > > > >> > > > > > > >> > To enable semihosting we also need to enable the following > > > > > >> > configs in defconfigs: > > > > > >> > CONFIG_SEMIHOSTING > > > > > >> > CONFIG_SPL_SEMIHOSTING > > > > > >> > CONFIG_SEMIHOSTING_SERIAL > > > > > >> > CONFIG_SERIAL_PROBE_ALL > > > > > >> > CONFIG_SPL_FS_EXT4 > > > > > >> > CONFIG_SPL_FS_FAT > > > > > >> > > > > > >> Why should these _SPL_FS_xxx be required? If it's required by > > > > > >> SEMIHOSTING, could the dependency be fixed there? > > > > > > > > > > > > The build dependencies require that these options be there. > > > > > > > > > > What error do you get? > > > > > > > > If I disable both the _SPL_FS_* config options then I get the > > > > following compilation error: > > > > common/spl/spl_semihosting.c: In function 'spl_smh_load_image': > > > > common/spl/spl_semihosting.c:27:32: error: > > > > 'CONFIG_SPL_FS_LOAD_PAYLOAD_NAME' undeclared (first use in this > > > > function) > > > >27 | const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME; > > > > |^~~ > > > > common/spl/spl_semihosting.c:27:32: note: each undeclared identifier > > > > is reported only once for each function it appears in > > > > > > > > Bin/Sean: This error is not really related to the semihosting feature > > > > but is related to COFIG_SPL in general. > > > > Can you please accept this patch-set and then I'll try and find time > > > > in the future maybe to rectify this build dependency > > > > problem ? > > > > > > > > > > > > > > --Sean > > > > > > > > > > >> > > > > > >> > > > > > > >> > Signed-off-by: Kautuk Consul > > > > > >> > --- > > > > > >> > configs/qemu-riscv32_defconfig | 4 > > > > > >> > configs/qemu-riscv32_smode_defconfig | 4 > > > > > >> > configs/qemu-riscv32_spl_defconfig | 7 +++ > > > > > >> > configs/qemu-riscv64_defconfig | 4 > > > > > >> > configs/qemu-riscv64_smode_defconfig | 4 > > > > > >> > configs/qemu-riscv64_spl_defconfig | 7 +++ > > > > > >> > 6 files changed, 30 insertions(+) > > > > > >> > > > > > > >> > > > > > >> Regards, > > > > > >> Bin > > > > >
[PATCH v6 3/3] common/spl/Kconfig: add dependency on SPL_SEMIHOSTING for SPL payload
When we enable CONFIG_SPL and CONFIG_SPL_SEMIHOSTING then the code in common/spl/spl_semihosting.c tries to use the CONFIG_SPL_FS_LOAD_PAYLOAD_NAME string which remains undeclared unless SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS are configured. Add a dependency of SPL_SEMIHOSTING in the depends for SPL_FS_LOAD_PAYLOAD_NAME so that the code compiles fine. Signed-off-by: Kautuk Consul --- common/spl/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index fef01bdd7d..6c4848f3b9 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -691,7 +691,7 @@ config SPL_FS_FAT config SPL_FS_LOAD_PAYLOAD_NAME string "File to load for U-Boot from the filesystem" - depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS + depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS || SPL_SEMIHOSTING default "tispl.bin" if SYS_K3_SPL_ATF default "u-boot.itb" if SPL_LOAD_FIT default "u-boot.img" -- 2.34.1
[PATCH v6 2/3] arch/riscv: add semihosting support for RISC-V
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv/include/asm/spl.h | 1 +
arch/riscv/lib/Makefile | 2 ++
arch/riscv/lib/interrupts.c | 25 +
arch/riscv/lib/semihosting.c | 24
lib/Kconfig | 10 +-
5 files changed, 57 insertions(+), 5 deletions(-)
create mode 100644 arch/riscv/lib/semihosting.c
diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h
index e8a94fcb1f..2898a770ee 100644
--- a/arch/riscv/include/asm/spl.h
+++ b/arch/riscv/include/asm/spl.h
@@ -25,6 +25,7 @@ enum {
BOOT_DEVICE_DFU,
BOOT_DEVICE_XIP,
BOOT_DEVICE_BOOTROM,
+ BOOT_DEVICE_SMH,
BOOT_DEVICE_NONE
};
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index d6a8ae9728..e5a81ba722 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -42,3 +42,5 @@ extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
+
+obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index 100be2e966..e966afa7e3 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -9,6 +9,7 @@
* Copyright (C) 2019 Sean Anderson
*/
+#include
#include
#include
#include
@@ -17,6 +18,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -149,6 +151,29 @@ ulong handle_trap(ulong cause, ulong epc, ulong tval,
struct pt_regs *regs)
/* An UEFI application may have changed gd. Restore U-Boot's gd. */
efi_restore_gd();
+ if (cause == CAUSE_BREAKPOINT &&
+ CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)) {
+ ulong pre_addr = epc - 4, post_addr = epc + 4;
+
+ /* Check for prior and post addresses to be in same page. */
+ if ((pre_addr & ~(PAGE_SIZE - 1)) ==
+ (post_addr & ~(PAGE_SIZE - 1))) {
+ u32 pre = *(u32 *)pre_addr;
+ u32 post = *(u32 *)post_addr;
+
+ /* Check for semihosting, i.e.:
+* sllizero,zero,0x1f
+* ebreak
+* sraizero,zero,0x7
+*/
+ if (pre == 0x01f01013 && post == 0x40705013) {
+ disable_semihosting();
+ epc += 4;
+ return epc;
+ }
+ }
+ }
+
is_irq = (cause & MCAUSE_INT);
irq = (cause & ~MCAUSE_INT);
diff --git a/arch/riscv/lib/semihosting.c b/arch/riscv/lib/semihosting.c
new file mode 100644
index 00..d6593b02a6
--- /dev/null
+++ b/arch/riscv/lib/semihosting.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Ventana Micro Systems Inc.
+ */
+
+#include
+
+long smh_trap(int sysnum, void *addr)
+{
+ register int ret asm ("a0") = sysnum;
+ register void *param0 asm ("a1") = addr;
+
+ asm volatile (".align 4\n"
+ ".option push\n"
+ ".option norvc\n"
+
+ "slli zero, zero, 0x1f\n"
+ "ebreak\n"
+ "srai zero, zero, 7\n"
+ ".option pop\n"
+ : "+r" (ret) : "r" (param0) : "memory");
+
+ return ret;
+}
diff --git a/lib/Kconfig b/lib/Kconfig
index b8833e0183..3c5a4ab386 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -73,7 +73,7 @@ config LIB_UUID
config SEMIHOSTING
bool "Support semihosting"
- depends on ARM
+ depends on ARM || RISCV
help
Semihosting is a method for a target to communicate with a host
debugger. It uses special instructions which the debugger will trap
@@ -86,7 +86,7 @@ config SEMIHOSTING
config SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails"
- depends on SEMIHOSTING && ARM64
+ depends on SEMIHOSTING && (ARM64 || RISCV)
default y
help
Normally, if U-Boot makes a semihosting call and no debugger is
@@ -96,7 +96,7 @@ config SEMIHOSTING_FALLBACK
config SPL_SEMIHOSTING
bool "Support semihosting in SPL"
- depends on SPL && ARM
+ depends on SPL && (ARM || RISCV)
help
Semihosting is a method for a target to communicate with a host
debugger. It uses special instructions which the debugger will trap
@@ -109,8 +109,8 @@ config SPL_SEMIHOSTING
config SPL_SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails
[PATCH v6 1/3] lib: Add common semihosting library
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul
---
arch/arm/Kconfig | 46 -
arch/arm/lib/semihosting.c | 181 +---
include/semihosting.h | 11 +++
lib/Kconfig| 47 ++
lib/Makefile | 2 +
lib/semihosting.c | 186 +
6 files changed, 247 insertions(+), 226 deletions(-)
create mode 100644 lib/semihosting.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3f68d0988b..cac4fa09fd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -413,52 +413,6 @@ config ARM_SMCCC
This should be enabled if U-Boot needs to communicate with system
firmware (for example, PSCI) according to SMCCC.
-config SEMIHOSTING
- bool "Support ARM semihosting"
- help
- Semihosting is a method for a target to communicate with a host
- debugger. It uses special instructions which the debugger will trap
- on and interpret. This allows U-Boot to read/write files, print to
- the console, and execute arbitrary commands on the host system.
-
- Enabling this option will add support for reading and writing files
- on the host system. If you don't have a debugger attached then trying
- to do this will likely cause U-Boot to hang. Say 'n' if you are
unsure.
-
-config SEMIHOSTING_FALLBACK
- bool "Recover gracefully when semihosting fails"
- depends on SEMIHOSTING && ARM64
- default y
- help
- Normally, if U-Boot makes a semihosting call and no debugger is
- attached, then it will panic due to a synchronous abort
- exception. This config adds an exception handler which will allow
- U-Boot to recover. Say 'y' if unsure.
-
-config SPL_SEMIHOSTING
- bool "Support ARM semihosting in SPL"
- depends on SPL
- help
- Semihosting is a method for a target to communicate with a host
- debugger. It uses special instructions which the debugger will trap
- on and interpret. This allows U-Boot to read/write files, print to
- the console, and execute arbitrary commands on the host system.
-
- Enabling this option will add support for reading and writing files
- on the host system. If you don't have a debugger attached then trying
- to do this will likely cause U-Boot to hang. Say 'n' if you are
unsure.
-
-config SPL_SEMIHOSTING_FALLBACK
- bool "Recover gracefully when semihosting fails in SPL"
- depends on SPL_SEMIHOSTING && ARM64
- select ARMV8_SPL_EXCEPTION_VECTORS
- default y
- help
- Normally, if U-Boot makes a semihosting call and no debugger is
- attached, then it will panic due to a synchronous abort
- exception. This config adds an exception handler which will allow
- U-Boot to recover. Say 'y' if unsure.
-
config SYS_THUMB_BUILD
bool "Build U-Boot using the Thumb instruction set"
depends on !ARM64
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 939c0f7513..7b7669bed0 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -5,20 +5,6 @@
*/
#include
-#include
-#include
-
-#define SYSOPEN0x01
-#define SYSCLOSE 0x02
-#define SYSWRITEC 0x03
-#define SYSWRITE0 0x04
-#define SYSWRITE 0x05
-#define SYSREAD0x06
-#define SYSREADC 0x07
-#define SYSISERROR 0x08
-#define SYSSEEK0x0A
-#define SYSFLEN0x0C
-#define SYSERRNO 0x13
/*
* Macro to force the compiler to *populate* memory (for an array or struct)
@@ -39,7 +25,7 @@
/*
* Call the handler
*/
-static long smh_trap(unsigned int sysnum, void *addr)
+long smh_trap(unsigned int sysnum, void *addr)
{
register long result asm("r0");
register void *_addr asm("r1") = addr;
@@ -59,168 +45,3 @@ static long smh_trap(unsigned int sysnum, void *addr)
return result;
}
-
-#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
-static bool _semihosting_enabled = true;
-static bool try_semihosting = true;
-
-bool semihosting_enabled(void)
-{
- if (try_semihosting) {
- smh_trap(SYSERRNO, NULL);
- try_semihosting = false;
- }
-
- return _semihosting_enabled;
-}
-
-void disable_semihosting(void)
-{
- _semihosting_enabled = false;
-}
-#endif
-
-/**
- * smh_errno() - Read the host's errno
- *
- * This gets the value of the host's errno and negates it. The host's errno may
- * or may not be set, so only call this function if a previous semihosting call
- * has failed.
- *
- * Return: a negative error value
- */
-static int smh_errno(void)
-{
- long ret = smh_trap(SYSERRNO, NULL);
-
- if (ret > 0 && ret < INT_MAX)
-
[PATCH v6 0/3] Add riscv semihosting support in u-boot
Semihosting is a mechanism that enables code running on a target to communicate and use the Input/Output facilities on a host computer that is running a debugger. This patchset adds support for semihosting in u-boot for RISCV64 targets. CHANGES since v5: - Removed patch 3/3: default enablement of semihosting removed for the qemu-riscv64 targets due to failure of the CI test-cases. This is happening due to the qemu version and some commits currently not taken into qemu latest version. - Added patch 3/3: Added a 3rd patch which adds a dependency on SPL_SEMIHOSTING for the SPL_FS_LOAD_PAYLOAD_NAME config option. This will remove the need for the user to enable any of the SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS config options for SPL_SEMIHOSTING compilations. Compilation and test commands for SPL and S-mode configurations = U-Boot S-mode on QEMU virt // Compilation of S-mode u-boot ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- make qemu-riscv64_smode_defconfig make // Run riscv 64-bit u-boot with opensbi on qemu qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\ opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\ u-boot/u-boot.bin -semihosting-config enable=on U-Boot SPL on QEMU virt // Compilation of u-boot-spl ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- make qemu-riscv64_spl_defconfig make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin // Run 64-bit u-boot-spl in qemu qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\ u-boot/spl/u-boot-spl.bin -device\ loader,file=u-boot/u-boot.itb,addr=0x8020 -semihosting-config enable=on Kautuk Consul (3): lib: Add common semihosting library arch/riscv: add semihosting support for RISC-V common/spl/Kconfig: add dependency on SPL_SEMIHOSTING for SPL payload arch/arm/Kconfig | 46 - arch/arm/lib/semihosting.c | 181 +- arch/riscv/include/asm/spl.h | 1 + arch/riscv/lib/Makefile | 2 + arch/riscv/lib/interrupts.c | 25 + arch/riscv/lib/semihosting.c | 24 + common/spl/Kconfig | 2 +- include/semihosting.h| 11 +++ lib/Kconfig | 47 + lib/Makefile | 2 + lib/semihosting.c| 186 +++ 11 files changed, 300 insertions(+), 227 deletions(-) create mode 100644 arch/riscv/lib/semihosting.c create mode 100644 lib/semihosting.c -- 2.34.1
Re: [PATCH] net: ipv6: Fix link-partner MAC address assignment
On Tue, 2022-12-06 at 13:22 +0100, Daniel Schwierzeck wrote: > «Внимание! Данное письмо от внешнего адресата!» > > On 12/6/22 08:08, Viacheslav Mitrofanov wrote: > > MAC address of a link-partner is not saved for future use because > > of > > bad condition of if statement. Moreover it can potentially cause to > > NULL-pointer dereference. > > > > Signed-off-by: Viacheslav Mitrofanov > > --- > > net/ndisc.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > Reviewed-by: Daniel Schwierzeck > > > diff --git a/net/ndisc.c b/net/ndisc.c > > index 3c0eeeaea3..56fc6390bc 100644 > > --- a/net/ndisc.c > > +++ b/net/ndisc.c > > @@ -264,7 +264,7 @@ int ndisc_receive(struct ethernet_hdr *et, > > struct ip6_hdr *ip6, int len) > > ndisc_extract_enetaddr(ndisc, > > neigh_eth_addr); > > > > /* save address for later use */ > > - if (!net_nd_packet_mac) > > + if (net_nd_packet_mac) > > memcpy(net_nd_packet_mac, > > neigh_eth_addr, 7); > > > > /* modify header, and transmit it */ > > -- > - Daniel > This patch is not appropriate!net_nd_packet_mac is just a pointer, moreover there is no memory allocation. It has just keep a pointer to neigh_eth_addr. So the solution must be sth. like net_nd_packet_mac = neigh_eth_addr;
Re: [PATCH 1/1] net: don't memcpy to NULL
On Wed, 2022-12-07 at 11:53 +0100, Heinrich Schuchardt wrote:
> «Внимание! Данное письмо от внешнего адресата!»
>
> In ndisc_receive() 7 bytes are copied from a buffer of size 6 to
> NULL.
>
> net_nd_packet_mac is a pointer. If it is NULL, we should set it to
> the
> address of the buffer with the MAC address.
>
> Addresses-Coverity-ID: 430974 ("Out-of-bounds access")
> Fixes: c6610e1d90ea ("net: ipv6: Add Neighbor Discovery Protocol
> (NDP)")
> Signed-off-by: Heinrich Schuchardt >
> ---
> net/ndisc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/net/ndisc.c b/net/ndisc.c
> index 3c0eeeaea3..367dae7676 100644
> --- a/net/ndisc.c
> +++ b/net/ndisc.c
> @@ -265,7 +265,7 @@ int ndisc_receive(struct ethernet_hdr *et, struct
> ip6_hdr *ip6, int len)
>
> /* save address for later use */
> if (!net_nd_packet_mac)
> - memcpy(net_nd_packet_mac,
> neigh_eth_addr, 7);
> + net_nd_packet_mac = neigh_eth_addr;
>
> /* modify header, and transmit it */
> memcpy(((struct ethernet_hdr
> *)net_nd_tx_packet)->et_dest,
> --
> 2.37.2
>
>
Reviewed-by: Viacheslav Mitrofanov
Re: [PATCH 1/1] net: don't memcpy to NULL
On Wed, Dec 7, 2022 at 6:53 PM Heinrich Schuchardt
wrote:
>
> In ndisc_receive() 7 bytes are copied from a buffer of size 6 to NULL.
>
> net_nd_packet_mac is a pointer. If it is NULL, we should set it to the
> address of the buffer with the MAC address.
>
> Addresses-Coverity-ID: 430974 ("Out-of-bounds access")
> Fixes: c6610e1d90ea ("net: ipv6: Add Neighbor Discovery Protocol (NDP)")
> Signed-off-by: Heinrich Schuchardt
> ---
> net/ndisc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Bin Meng
[PATCH 1/1] net: don't memcpy to NULL
In ndisc_receive() 7 bytes are copied from a buffer of size 6 to NULL.
net_nd_packet_mac is a pointer. If it is NULL, we should set it to the
address of the buffer with the MAC address.
Addresses-Coverity-ID: 430974 ("Out-of-bounds access")
Fixes: c6610e1d90ea ("net: ipv6: Add Neighbor Discovery Protocol (NDP)")
Signed-off-by: Heinrich Schuchardt
---
net/ndisc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/ndisc.c b/net/ndisc.c
index 3c0eeeaea3..367dae7676 100644
--- a/net/ndisc.c
+++ b/net/ndisc.c
@@ -265,7 +265,7 @@ int ndisc_receive(struct ethernet_hdr *et, struct ip6_hdr
*ip6, int len)
/* save address for later use */
if (!net_nd_packet_mac)
- memcpy(net_nd_packet_mac, neigh_eth_addr, 7);
+ net_nd_packet_mac = neigh_eth_addr;
/* modify header, and transmit it */
memcpy(((struct ethernet_hdr
*)net_nd_tx_packet)->et_dest,
--
2.37.2
Re: [PATCH v2 1/4] ARM: stm32: Fix ECDSA authentication with Dcache enabled
Hi Marek,
Sorry for the delay.
I cross-check with ROM code team to understood this API limitation.
On 12/6/22 23:49, Marek Vasut wrote:
In case Dcache is enabled while the ECDSA authentication function is
called via BootROM ROM API, the CRYP DMA might pick stale version of
data from DRAM. Disable Dcache around the BootROM call to avoid this
issue.
Signed-off-by: Marek Vasut
---
Cc: Alexandru Gagniuc
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
V2: - Initialize reenable_dcache variable
---
arch/arm/mach-stm32mp/ecdsa_romapi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/mach-stm32mp/ecdsa_romapi.c
b/arch/arm/mach-stm32mp/ecdsa_romapi.c
index a2f63ff879f..082178ce83f 100644
--- a/arch/arm/mach-stm32mp/ecdsa_romapi.c
+++ b/arch/arm/mach-stm32mp/ecdsa_romapi.c
@@ -63,6 +63,7 @@ static int romapi_ecdsa_verify(struct udevice *dev,
const void *hash, size_t hash_len,
const void *signature, size_t sig_len)
{
+ bool reenable_dcache = false;
struct ecdsa_rom_api rom;
uint8_t raw_key[64];
uint32_t rom_ret;
@@ -81,8 +82,21 @@ static int romapi_ecdsa_verify(struct udevice *dev,
memcpy(raw_key + 32, pubkey->y, 32);
stm32mp_rom_get_ecdsa_functions();
+
+ /*
+* Disable D-cache before calling into BootROM, else CRYP DMA
+* may fail to pick up the correct data.
+*/
+ if (dcache_status()) {
+ dcache_disable();
+ reenable_dcache = true;
+ }
+
rom_ret = rom.ecdsa_verify_signature(hash, raw_key, signature, algo);
+ if (reenable_dcache)
+ dcache_enable();
+
return rom_ret == ROM_API_SUCCESS ? 0 : -EPERM;
}
In fact, the ecdsa_verify_signature() don't use the HW (no DMA and no
use of CRYP IP )
It is only a SW library, integrated in ROM code and exported to avoid
the need
to include the same library in FSBL = TF-A, with size limitation (SYSRAM).
This library don't need to deactivate the data cache, the only impact of
this deactivation it
is to reduce the execution performance
After cross-check, I think the only problem today it the U-Boot MMU
configuration of STM32MP15x
plaform: by default only the DDR is marked executable in U-Boot, all the
other region are
defined as DEVICE memory/not executable (DCACHE_OFF in mmu_setup).
Deactivate the data cache only avoids the exception which occurs on jump
to NotExecutable region
because in U-Boot "dcache OFF" imply "MMU off" (see cache_enable in
./arch/arm/lib/cache-cp15.c)
and with MMU deactivated the check on executable MMU tag is also
deactivated.
I think the next patch is enough:
#define STM32MP_ROM_BASE U(0x)
static int romapi_ecdsa_verify(struct udevice *dev,
const void *hash, size_t hash_len,
const void *signature, size_t sig_len)
{
struct ecdsa_rom_api rom;
uint8_t raw_key[64];
uint32_t rom_ret;
@@ -81,8 +82,21 @@ static int romapi_ecdsa_verify(struct udevice *dev,
memcpy(raw_key + 32, pubkey->y, 32);
stm32mp_rom_get_ecdsa_functions();
+
+ /* mark executable the exported ROM code function: */
+ mmu_set_region_dcache_behaviour(STM32MP_ROM_BASE, MMU_SECTION_SIZE,
DCACHE_DEFAULT_OPTION);
+
rom_ret = rom.ecdsa_verify_signature(hash, raw_key, signature, algo);
return rom_ret == ROM_API_SUCCESS ? 0 : -EPERM;
}
Sorry again for the first review, not complete...
Regards
Patrick
Reference in TF-A code:
arm-trusted-firmware/plat/st/common/stm32mp_crypto_lib.c
uint32_t verify_signature(uint8_t *hash_in, uint8_t *pubkey_in,
uint8_t *signature, uint32_t ecc_algo)
{
int ret;
ret = mmap_add_dynamic_region(STM32MP_ROM_BASE, STM32MP_ROM_BASE,
STM32MP_ROM_SIZE_2MB_ALIGNED, MT_CODE | MT_SECURE);
ret = auth_ops.verify_signature(hash_in, pubkey_in, signature,
ecc_algo);
mmap_remove_dynamic_region(STM32MP_ROM_BASE,
STM32MP_ROM_SIZE_2MB_ALIGNED);
return ret;
}
[PATCH 66/71] bootstd: Allow scanning a single bootdev label
We want to support scanning a single label, like 'mmc' or 'usb0'. Add
this feature by plumbing the label through to the iterator, setting a
flag to indicate that only siblings of the initial device should be used.
This means that scanning a bootdev by its name is not supported anymore.
That feature doesn't seem very useful in practice, so it is no great loss.
Add a test for bootdev_find_by_any() while we are here.
Signed-off-by: Simon Glass
---
boot/bootdev-uclass.c | 28 ++
boot/bootflow.c | 43 +++---
cmd/bootflow.c| 86 +--
include/bootdev.h | 11 --
include/bootflow.h| 10 +++--
test/boot/bootdev.c | 2 +-
test/boot/bootflow.c | 62 ++-
7 files changed, 166 insertions(+), 76 deletions(-)
diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
index 334be7662a1..522ecf38eb3 100644
--- a/boot/bootdev-uclass.c
+++ b/boot/bootdev-uclass.c
@@ -649,10 +649,10 @@ int bootdev_next_prio(struct bootflow_iter *iter, struct
udevice **devp)
return 0;
}
-int bootdev_setup_iter(struct bootflow_iter *iter, struct udevice **devp,
- int *method_flagsp)
+int bootdev_setup_iter(struct bootflow_iter *iter, const char *label,
+ struct udevice **devp, int *method_flagsp)
{
- struct udevice *bootstd, *dev = *devp;
+ struct udevice *bootstd, *dev = NULL;
bool show = iter->flags & BOOTFLOWF_SHOW;
int method_flags;
int ret;
@@ -671,10 +671,24 @@ int bootdev_setup_iter(struct bootflow_iter *iter, struct
udevice **devp,
}
/* Handle scanning a single device */
- if (dev) {
- iter->flags |= BOOTFLOWF_SINGLE_DEV;
- log_debug("Selected boodev: %s\n", dev->name);
- method_flags = 0;
+ if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && label) {
+ if (iter->flags & BOOTFLOWF_HUNT) {
+ ret = bootdev_hunt(label, show);
+ if (ret)
+ return log_msg_ret("hun", ret);
+ }
+ ret = bootdev_find_by_any(label, , _flags);
+ if (ret)
+ return log_msg_ret("lab", ret);
+
+ log_debug("method_flags: %x\n", method_flags);
+ if (method_flags & BOOTFLOW_METHF_SINGLE_UCLASS)
+ iter->flags |= BOOTFLOWF_SINGLE_UCLASS;
+ else if (method_flags & BOOTFLOW_METHF_SINGLE_DEV)
+ iter->flags |= BOOTFLOWF_SINGLE_DEV;
+ else
+ iter->flags |= BOOTFLOWF_SINGLE_MEDIA;
+ log_debug("Selected label: %s, flags %x\n", label, iter->flags);
} else {
bool ok;
diff --git a/boot/bootflow.c b/boot/bootflow.c
index b84df6fefbe..da462a6ffdc 100644
--- a/boot/bootflow.c
+++ b/boot/bootflow.c
@@ -215,7 +215,37 @@ static int iter_incr(struct bootflow_iter *iter)
dev = iter->dev;
log_debug("inc_dev=%d\n", inc_dev);
if (!inc_dev) {
- ret = bootdev_setup_iter(iter, , _flags);
+ ret = bootdev_setup_iter(iter, NULL, ,
+_flags);
+ } else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) &&
+ (iter->flags & BOOTFLOWF_SINGLE_UCLASS)) {
+ /* Move to the next bootdev in this uclass */
+ uclass_find_next_device();
+ if (!dev) {
+ log_debug("finished uclass %s\n",
+ dev_get_uclass_name(dev));
+ ret = -ENODEV;
+ }
+ } else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) &&
+ iter->flags & BOOTFLOWF_SINGLE_MEDIA) {
+ log_debug("next in single\n");
+ method_flags = 0;
+ do {
+ /*
+* Move to the next bootdev child of this media
+* device. This ensures that we cover all the
+* available SCSI IDs and LUNs.
+*/
+ device_find_next_child();
+ log_debug("- next %s\n",
+ dev ? dev->name : "(none)");
+ } while (dev && device_get_uclass_id(dev) !=
+ UCLASS_BOOTDEV);
+ if (!dev) {
+ log_debug("finished uclass %s\n",
+ dev_get_uclass_name(dev));
+ ret = -ENODEV;
+ }
} else {
log_debug("labels %p\n",
[PATCH 12/71] dm: part: Update test to use mmc2
At present this test sets up a partition table on mmc1. But this is used
by the bootstd tests, so it is not possible to run those after this test
has run, without restarting the Python test harness.
This is inconvenient when running tests repeatedly with 'ut dm'. Move the
test to use mmc2, which is not used by anything.
Signed-off-by: Simon Glass
---
test/dm/part.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/test/dm/part.c b/test/dm/part.c
index 5e4efa587c3..b60687114f1 100644
--- a/test/dm/part.c
+++ b/test/dm/part.c
@@ -43,7 +43,7 @@ static int dm_test_part(struct unit_test_state *uts)
},
};
- ut_asserteq(1, blk_get_device_by_str("mmc", "1", _dev_desc));
+ ut_asserteq(2, blk_get_device_by_str("mmc", "2", _dev_desc));
if (CONFIG_IS_ENABLED(RANDOM_UUID)) {
gen_rand_uuid_str(parts[0].uuid, UUID_STR_FORMAT_STD);
gen_rand_uuid_str(parts[1].uuid, UUID_STR_FORMAT_STD);
@@ -63,7 +63,7 @@ static int dm_test_part(struct unit_test_state *uts)
env_set("bootdevice", "0");
test(0, NULL, true);
test(0, "", true);
- env_set("bootdevice", "1");
+ env_set("bootdevice", "2");
test(1, NULL, false);
test(1, "", false);
test(1, "-", false);
@@ -74,8 +74,8 @@ static int dm_test_part(struct unit_test_state *uts)
test(0, ".0", true);
test(0, ".0:0", true);
test(-EINVAL, "#test1", true);
- test(1, "1", false);
- test(1, "1", true);
+ test(1, "2", false);
+ test(1, "2", true);
test(-ENOENT, "1:0", false);
test(0, "1:0", true);
test(1, "1:1", false);
@@ -85,8 +85,8 @@ static int dm_test_part(struct unit_test_state *uts)
test(1, "1.0:1", false);
test(2, "1.0:2", false);
test(-EINVAL, "1#bogus", false);
- test(1, "1#test1", false);
- test(2, "1#test2", false);
+ test(1, "2#test1", false);
+ test(2, "2#test2", false);
ret = 0;
env_set("bootdevice", oldbootdevice);
--
2.39.0.rc0.267.gcb52ba06e7-goog
